├── .gitignore ├── .gitmodules ├── DATASHEET.md ├── LICENSE.md ├── README.md ├── _config.yml ├── _layouts └── default.html ├── assets ├── css │ └── style.scss └── img │ ├── AHB-Lite_PLIC_Worksheet.png │ ├── CONFIG.png │ ├── Folders.png │ ├── PLIC-block-diagram.png │ ├── RoaLogicLogo.png │ ├── plic-handshake.png │ ├── plic-if.png │ ├── plic-ports.png │ └── plic-system.png ├── bench └── verilog │ ├── ahb3lite_bfm.sv │ ├── test.sv │ └── testbench_top.sv ├── docs ├── AHB-Lite_PLIC_Datasheet.pdf ├── AHB-Lite_PLIC_Datasheet.tex ├── AHB-Lite_PLIC_Markdown.tex ├── DATASHEET.html ├── Getting_Started.md ├── assets │ ├── csv │ │ ├── RegisterMapping.xlsx │ │ └── configreg.xlsx │ ├── graffle │ │ └── AHB-Lite PLIC.graffle │ └── img │ │ ├── AHB-Lite PLIC.eps │ │ ├── AHB-Lite_PLIC_Worksheet.png │ │ ├── CONFIG.png │ │ ├── PLIC-block-diagram-eps-converted-to.pdf │ │ ├── PLIC-block-diagram.eps │ │ ├── RoaLogicHeader-eps-converted-to.pdf │ │ ├── RoaLogicHeader.eps │ │ ├── Tagged_Logo-eps-converted-to.pdf │ │ ├── Tagged_Logo.eps │ │ ├── plic-handshake-eps-converted-to.pdf │ │ ├── plic-handshake.eps │ │ ├── plic-if-eps-converted-to.pdf │ │ ├── plic-if.eps │ │ ├── plic-ports-eps-converted-to.pdf │ │ ├── plic-ports.eps │ │ ├── plic-system-eps-converted-to.pdf │ │ └── plic-system.eps ├── markdown │ ├── compile.sh │ ├── frontmatter.md │ └── lpp.pl ├── pkg │ └── roalogictitle.sty └── tex │ ├── configuration.tex │ ├── history.tex │ ├── interfaces-ahblite.tex │ ├── interfaces.tex │ ├── introduction.tex │ ├── preamble.tex │ ├── references.tex │ ├── resources.tex │ ├── setup.tex │ ├── specification.tex │ └── tableofcontents.tex ├── rtl ├── filelist_ahb3lite.f ├── filelist_apb4.f └── verilog │ ├── LICENSE.txt │ ├── ahb3lite │ └── ahb3lite_plic_top.sv │ ├── apb4 │ └── apb4_plic_top.sv │ └── core │ ├── plic_cell.sv │ ├── plic_core.sv │ ├── plic_dynamic_registers.sv │ ├── plic_gateway.sv │ ├── plic_priority_index.sv │ └── plic_target.sv └── sim └── ahb3lite ├── bin ├── Makefile ├── Makefile.include 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