├── DSP ├── Examples │ ├── .gitignore │ └── ARM │ │ ├── arm_fir_example │ │ ├── Abstract.txt │ │ ├── arm_fir_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── CMakeLists.txt │ │ ├── ARMCM4_FP_config.txt │ │ └── ARMCM7_SP_config.txt │ │ ├── arm_svm_example │ │ ├── Abstract.txt │ │ ├── arm_svm_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── CMakeLists.txt │ │ ├── ARMCM4_FP_config.txt │ │ └── ARMCM7_SP_config.txt │ │ ├── arm_bayes_example │ │ ├── Abstract.txt │ │ ├── arm_bayes_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── CMakeLists.txt │ │ ├── ARMCM4_FP_config.txt │ │ └── ARMCM7_SP_config.txt │ │ ├── arm_fft_bin_example │ │ ├── Abstract.txt │ │ ├── arm_fft_bin_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── CMakeLists.txt │ │ ├── ARMCM4_FP_config.txt │ │ └── ARMCM7_SP_config.txt │ │ ├── arm_matrix_example │ │ ├── Abstract.txt │ │ ├── arm_matrix_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── CMakeLists.txt │ │ ├── ARMCM4_FP_config.txt │ │ └── ARMCM7_SP_config.txt │ │ ├── arm_sin_cos_example │ │ ├── Abstract.txt │ │ ├── arm_sin_cos_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── CMakeLists.txt │ │ ├── ARMCM4_FP_config.txt │ │ └── ARMCM7_SP_config.txt │ │ ├── arm_variance_example │ │ ├── Abstract.txt │ │ ├── arm_variance_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── CMakeLists.txt │ │ ├── ARMCM4_FP_config.txt │ │ └── ARMCM7_SP_config.txt │ │ ├── arm_class_marks_example │ │ ├── Abstract.txt │ │ ├── arm_class_marks_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── CMakeLists.txt │ │ ├── ARMCM4_FP_config.txt │ │ └── ARMCM7_SP_config.txt │ │ ├── arm_dotproduct_example │ │ ├── Abstract.txt │ │ ├── arm_dotproduct_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── CMakeLists.txt │ │ ├── ARMCM4_FP_config.txt │ │ └── ARMCM7_SP_config.txt │ │ ├── arm_convolution_example │ │ ├── Abstract.txt │ │ ├── arm_convolution_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── CMakeLists.txt │ │ ├── ARMCM4_FP_config.txt │ │ └── ARMCM7_SP_config.txt │ │ ├── arm_linear_interp_example │ │ ├── Abstract.txt │ │ ├── arm_linear_interp_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── ARMCM4_FP_config.txt │ │ ├── ARMCM7_SP_config.txt │ │ └── CMakeLists.txt │ │ ├── arm_signal_converge_example │ │ ├── Abstract.txt │ │ ├── arm_signal_converge_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── ARMCM4_FP_config.txt │ │ ├── ARMCM7_SP_config.txt │ │ └── CMakeLists.txt │ │ └── arm_graphic_equalizer_example │ │ ├── Abstract.txt │ │ ├── arm_graphic_equalizer_example.ini │ │ ├── ARMCM0_config.txt │ │ ├── ARMCM3_config.txt │ │ ├── ARMCM4_FP_config.txt │ │ ├── ARMCM7_SP_config.txt │ │ └── CMakeLists.txt ├── Source │ ├── BayesFunctions │ │ ├── CMakeLists.txt │ │ ├── BayesFunctionsF16.c │ │ └── BayesFunctions.c │ ├── SupportFunctions │ │ ├── CMakeLists.txt │ │ ├── SupportFunctionsF16.c │ │ ├── arm_sort_init_f32.c │ │ ├── arm_merge_sort_init_f32.c │ │ ├── arm_fill_f64.c │ │ └── arm_copy_f64.c │ ├── QuaternionMathFunctions │ │ ├── CMakeLists.txt │ │ └── QuaternionMathFunctions.c │ ├── BasicMathFunctions │ │ ├── CMakeLists.txt │ │ ├── BasicMathFunctionsF16.c │ │ └── arm_negate_f64.c │ ├── CommonTables │ │ ├── CommonTables.c │ │ ├── CommonTablesF16.c │ │ └── CMakeLists.txt │ ├── ControllerFunctions │ │ ├── CMakeLists.txt │ │ ├── ControllerFunctions.c │ │ ├── arm_pid_reset_q15.c │ │ ├── arm_pid_reset_q31.c │ │ └── arm_pid_reset_f32.c │ ├── InterpolationFunctions │ │ ├── InterpolationFunctionsF16.c │ │ ├── CMakeLists.txt │ │ └── InterpolationFunctions.c │ ├── FastMathFunctions │ │ ├── FastMathFunctionsF16.c │ │ ├── arm_vexp_f64.c │ │ └── arm_vlog_f64.c │ ├── ComplexMathFunctions │ │ └── ComplexMathFunctionsF16.c │ ├── configDsp.cmake │ ├── SVMFunctions │ │ ├── SVMFunctions.c │ │ ├── SVMFunctionsF16.c │ │ └── CMakeLists.txt │ ├── DistanceFunctions │ │ ├── DistanceFunctionsF16.c │ │ ├── arm_euclidean_distance_f64.c │ │ ├── arm_cityblock_distance_f64.c │ │ ├── arm_cosine_distance_f64.c │ │ ├── arm_boolean_distance.c │ │ ├── DistanceFunctions.c │ │ ├── arm_cosine_distance_f32.c │ │ └── arm_hamming_distance.c │ ├── FilteringFunctions │ │ └── FilteringFunctionsF16.c │ ├── TransformFunctions │ │ └── TransformFunctionsF16.c │ ├── MatrixFunctions │ │ ├── MatrixFunctionsF16.c │ │ ├── CMakeLists.txt │ │ ├── arm_mat_init_q15.c │ │ └── arm_mat_init_q31.c │ ├── StatisticsFunctions │ │ ├── StatisticsFunctionsF16.c │ │ ├── arm_std_f64.c │ │ ├── arm_entropy_f64.c │ │ ├── arm_std_f16.c │ │ └── arm_logsumexp_dot_prod_f32.c │ └── interpol.cmake ├── ComputeLibrary │ └── README.md └── Include │ ├── dsp │ ├── controller_functions_f16.h │ └── svm_defines.h │ └── arm_math_f16.h ├── .gitignore ├── NN ├── .gitignore ├── Examples │ └── README.md ├── Source │ ├── ReshapeFunctions │ │ ├── CMakeLists.txt │ │ └── arm_reshape_s8.c │ ├── SVDFunctions │ │ └── CMakeLists.txt │ ├── ActivationFunctions │ │ ├── CMakeLists.txt │ │ └── arm_relu6_s8.c │ ├── BasicMathFunctions │ │ └── CMakeLists.txt │ ├── ConcatenationFunctions │ │ ├── CMakeLists.txt │ │ └── arm_concatenation_s8_w.c │ ├── FullyConnectedFunctions │ │ └── CMakeLists.txt │ ├── PoolingFunctions │ │ └── CMakeLists.txt │ ├── ConvolutionFunctions │ │ └── CMakeLists.txt │ ├── SoftmaxFunctions │ │ ├── CMakeLists.txt │ │ └── arm_softmax_s8_s16.c │ └── NNSupportFunctions │ │ └── CMakeLists.txt ├── CMakeLists.txt ├── .clang-format └── Include │ └── arm_nn_tables.h ├── .github ├── ISSUE_TEMPLATE.md └── PULL_REQUEST_TEMPLATE.md ├── Documentation └── index.html ├── SECURITY.md ├── Include └── cmsis_version.h └── Core ├── Include └── cmsis_version.h └── Template └── ARMv8-M └── main_s.c /DSP/Examples/.gitignore: -------------------------------------------------------------------------------- 1 | build/ 2 | *_debug/ 3 | EventRecorderStub.scvd 4 | _ARMCM0/ 5 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | *.breadcrumb 2 | *.junit 3 | **/__pycache__ 4 | Local_Release/ 5 | CMSIS/Documentation/ 6 | *.uvguix.* 7 | *.uvmpw.uvgui.* 8 | *.zip 9 | output 10 | #Ignore modules added by the repo script 11 | Device/ST/ 12 | -------------------------------------------------------------------------------- /NN/.gitignore: -------------------------------------------------------------------------------- 1 | Tests/UnitTest/TestCases/*/Unity/TestRunner/* 2 | Tests/UnitTest/TestCases/*/Unity/TestRunner/* 3 | Tests/UnitTest/TestCases/TestData/*/*.tflite 4 | Tests/UnitTest/TestCases/TestData/*.json 5 | Tests/UnitTest/Output/* 6 | Tests/UnitTest/Unity/* -------------------------------------------------------------------------------- /.github/ISSUE_TEMPLATE.md: -------------------------------------------------------------------------------- 1 | ## IMPORTANT INFORMATION 2 | 3 | * This repository is not intended to accept contributions as its content is cloned from [CMSIS](https://github.com/ARM-software/CMSIS_5) Arm(TM) owned repository. 4 | * Any issue or pull-request shall be be addressed to Arm(TM) and reported [here](https://github.com/ARM-software/CMSIS_5/issues). 5 | -------------------------------------------------------------------------------- /.github/PULL_REQUEST_TEMPLATE.md: -------------------------------------------------------------------------------- 1 | ## IMPORTANT INFORMATION 2 | 3 | * This repository is not intended to accept contributions as its content is cloned from [CMSIS](https://github.com/ARM-software/CMSIS_5) Arm(TM) owned repository. 4 | * Any issue or pull-request shall be be addressed to Arm(TM) and reported [here](https://github.com/ARM-software/CMSIS_5/issues). 5 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fir_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_fir_example. 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_svm_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_svm_example. 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_bayes_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_class_marks_example 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fft_bin_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_fft_bin_example. 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_matrix_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_matrix_example. 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_sin_cos_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_sin_cos_example. 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_variance_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_variance_example. 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_class_marks_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_class_marks_example 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_dotproduct_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_dotproduct_example. 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_convolution_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_convolution_example. 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_linear_interp_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_linear_interp_example. 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_signal_converge_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_signal_converge_example. 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_graphic_equalizer_example/Abstract.txt: -------------------------------------------------------------------------------- 1 | CMSIS DSP_Lib example arm_graphic_equalizer_example. 2 | 3 | The example is available for different targets: 4 | Cortex-M0 5 | Cortex-M3 6 | Cortex-M4 with FPU 7 | Cortex-M7 with single precision FPU 8 | Cortex-M55 with double precision FPU, Integer + Floating Point MVE 9 | 10 | The example is configured for Models Debugger 11 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fir_example/arm_fir_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_fir_lpf_example.ini 7 | 8 | */ 9 | 10 | // usual initialisation for target setup 11 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 12 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 13 | 14 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fft_bin_example/arm_fft_bin_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_fft_bin_example.ini 7 | 8 | */ 9 | 10 | // usual initialisation for target setup 11 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 12 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 13 | 14 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_bayes_example/arm_bayes_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_class_marks_example.ini 7 | 8 | */ 9 | 10 | 11 | // usual initialisation for target setup 12 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 13 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 14 | 15 | 16 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_dotproduct_example/arm_dotproduct_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_dotproduct_example.ini 7 | 8 | */ 9 | 10 | // usual initialisation for target setup 11 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 12 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 13 | 14 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_matrix_example/arm_matrix_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_matrix_example.ini 7 | 8 | */ 9 | 10 | 11 | // usual initialisation for target setup 12 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 13 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 14 | 15 | 16 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_sin_cos_example/arm_sin_cos_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_sin_cos_example.ini 7 | 8 | */ 9 | 10 | 11 | // usual initialisation for target setup 12 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 13 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 14 | 15 | 16 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_svm_example/arm_svm_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_class_marks_example.ini 7 | 8 | */ 9 | 10 | 11 | // usual initialisation for target setup 12 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 13 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 14 | 15 | 16 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_variance_example/arm_variance_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_variance_example.ini 7 | 8 | */ 9 | 10 | 11 | // usual initialisation for target setup 12 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 13 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 14 | 15 | 16 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_class_marks_example/arm_class_marks_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_class_marks_example.ini 7 | 8 | */ 9 | 10 | 11 | // usual initialisation for target setup 12 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 13 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 14 | 15 | 16 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_convolution_example/arm_convolution_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_convolution_example.ini 7 | 8 | */ 9 | 10 | 11 | // usual initialisation for target setup 12 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 13 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 14 | 15 | 16 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_linear_interp_example/arm_linear_interp_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_linear_interp_example.ini 7 | 8 | */ 9 | 10 | 11 | // usual initialisation for target setup 12 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 13 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 14 | 15 | 16 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_graphic_equalizer_example/arm_graphic_equalizer_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_geq_5band_example.ini 7 | 8 | */ 9 | 10 | 11 | // usual initialisation for target setup 12 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 13 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 14 | 15 | 16 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_signal_converge_example/arm_signal_converge_example.ini: -------------------------------------------------------------------------------- 1 | 2 | /* This file demonstrates how to Map memory ranges, specify read, write, and execute permissions 3 | 4 | The file can be executed in the following way: 5 | 1) manually from uVision command window (in debug mode) using command: 6 | INCLUIDE arm_signal_converge_example.ini 7 | 8 | */ 9 | 10 | 11 | // usual initialisation for target setup 12 | MAP 0x00000000, 0x0003FFFF EXEC READ // 256K Flash 13 | MAP 0x20000000, 0x20007FFF READ WRITE // 32K RAM 14 | 15 | 16 | -------------------------------------------------------------------------------- /NN/Examples/README.md: -------------------------------------------------------------------------------- 1 | # CMSIS-NN examples 2 | All CMSIS-NN examples are external, please follow the links to the respective repositories to find how they were implemented. 3 | ## Image recognition on STMicroelectonics(R) STM32F4 using Arm(R) Mbed(TM) CLI 2 4 | Image recognition on the STM32F4 board utilizing CMSIS-NN and Mbed CLI 2. 5 | Visit [here](https://github.com/ARM-software/ML-examples/tree/master/tflm-cmsisnn-mbed-image-recognition) for more information and the source code. There is also a [blog post](https://community.arm.com/arm-community-blogs/b/ai-and-ml-blog/posts/image-recognition-on-arm-powered-microcontrollers) for this demo. 6 | -------------------------------------------------------------------------------- /DSP/Source/BayesFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | 3 | project(CMSISDSPBayes) 4 | 5 | include(configLib) 6 | include(configDsp) 7 | 8 | file(GLOB SRC "./*_*.c") 9 | 10 | add_library(CMSISDSPBayes STATIC) 11 | 12 | target_sources(CMSISDSPBayes PRIVATE arm_gaussian_naive_bayes_predict_f32.c) 13 | 14 | configLib(CMSISDSPBayes ${ROOT}) 15 | configDsp(CMSISDSPBayes ${ROOT}) 16 | 17 | ### Includes 18 | target_include_directories(CMSISDSPBayes PUBLIC "${DSP}/Include") 19 | 20 | if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) 21 | target_sources(CMSISDSPBayes PRIVATE arm_gaussian_naive_bayes_predict_f16.c) 22 | endif() 23 | 24 | -------------------------------------------------------------------------------- /Documentation/index.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | Redirect to the CMSIS main page after 0 seconds 5 | 6 | 7 | 8 | 9 | 10 | 11 | If the automatic redirection is failing, click open CMSIS Documentation. 12 | 13 | 14 | 15 | -------------------------------------------------------------------------------- /NN/Source/ReshapeFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2019-2021 Arm Limited. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the License); you may 7 | # not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | # 18 | 19 | file(GLOB SRC "./*_*.c") 20 | target_sources(cmsis-nn PRIVATE ${SRC}) 21 | -------------------------------------------------------------------------------- /NN/Source/SVDFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2019-2021 Arm Limited. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the License); you may 7 | # not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | # 18 | 19 | file(GLOB SRC "./*_s8.c") 20 | target_sources(cmsis-nn PRIVATE ${SRC}) 21 | -------------------------------------------------------------------------------- /NN/Source/ActivationFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2019-2021 Arm Limited. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the License); you may 7 | # not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | # 18 | 19 | file(GLOB SRC "./*_s8.c") 20 | target_sources(cmsis-nn PRIVATE ${SRC}) 21 | -------------------------------------------------------------------------------- /NN/Source/BasicMathFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2019-2021 Arm Limited. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the License); you may 7 | # not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | # 18 | 19 | file(GLOB SRC "./*_*.c") 20 | target_sources(cmsis-nn PRIVATE ${SRC}) 21 | -------------------------------------------------------------------------------- /NN/Source/ConcatenationFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2019-2021 Arm Limited. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the License); you may 7 | # not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | # 18 | 19 | file(GLOB SRC "./*_*.c") 20 | target_sources(cmsis-nn PRIVATE ${SRC}) 21 | -------------------------------------------------------------------------------- /NN/Source/FullyConnectedFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2019-2021 Arm Limited. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the License); you may 7 | # not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | # 18 | 19 | file(GLOB SRC "./*_s8.c") 20 | target_sources(cmsis-nn PRIVATE ${SRC} arm_fully_connected_s16.c) 21 | 22 | -------------------------------------------------------------------------------- /NN/Source/PoolingFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2019-2022 Arm Limited. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the License); you may 7 | # not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | # 18 | 19 | file(GLOB SRC "./*_s8.c") 20 | file(GLOB SRC_S16 "./*_s16.c") 21 | target_sources(cmsis-nn PRIVATE ${SRC} ${SRC_S16}) 22 | 23 | 24 | 25 | -------------------------------------------------------------------------------- /NN/Source/ConvolutionFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2019-2022 Arm Limited. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the License); you may 7 | # not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | # 18 | 19 | file(GLOB SRC "./*_s8*.c") 20 | file(GLOB SRC_S16 "./*_s16*.c") 21 | target_sources(cmsis-nn PRIVATE ${SRC} ${SRC_S16}) 22 | 23 | 24 | 25 | -------------------------------------------------------------------------------- /DSP/ComputeLibrary/README.md: -------------------------------------------------------------------------------- 1 | README 2 | ====== 3 | 4 | This folder is containing two files imported, and slightly modified, from the ComputeLibrary: 5 | 6 | NEMath.h and arm_cl_tables.c 7 | 8 | In the original compute library, there are instead two other files: 9 | 10 | NEMath.h and NEMath.inl 11 | 12 | NEMath.inl is included from NEMath.h whereas in this CMSIS DSP implementation, there is no NEMath.inl and its content is copied into NEMath.h 13 | 14 | The tables contained in NEMath.inl have been moved to arm_cl_tables.c and finally the files are in C for the CMSIS DSP library and in C++ in the original Compute Library. 15 | 16 | Otherwise, the features and implementations are the same : a few optimized Neon functions. 17 | 18 | The license covering those files is different : It is a MIT license. 19 | Other parts of the CMSIS-DSP are covered with an Apache-2.0 license. 20 | -------------------------------------------------------------------------------- /NN/Source/SoftmaxFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2019-2022 Arm Limited. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the License); you may 7 | # not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | # 18 | 19 | file(GLOB SRC "./*_s8.c") 20 | target_sources(cmsis-nn PRIVATE ${SRC} arm_softmax_s8_s16.c 21 | arm_softmax_s16.c 22 | arm_nn_softmax_common_s8.c) 23 | -------------------------------------------------------------------------------- /NN/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2019-2021 Arm Limited. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the License); you may 7 | # not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | # 18 | 19 | cmake_minimum_required(VERSION 3.15.6) 20 | 21 | project(CMSISNN) 22 | 23 | set(CMSIS_PATH "${CMAKE_CURRENT_SOURCE_DIR}/../..") 24 | 25 | option(BUILD_CMSIS_NN_FUNCTIONS "Build CMSIS-NN Source." ON) 26 | 27 | if(BUILD_CMSIS_NN_FUNCTIONS) 28 | add_subdirectory(Source) 29 | endif() 30 | -------------------------------------------------------------------------------- /DSP/Source/SupportFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | 3 | project(CMSISDSPSupport) 4 | 5 | include(configLib) 6 | include(configDsp) 7 | 8 | file(GLOB SRC "./*_*.c") 9 | 10 | add_library(CMSISDSPSupport STATIC ${SRC}) 11 | 12 | configLib(CMSISDSPSupport ${ROOT}) 13 | configDsp(CMSISDSPSupport ${ROOT}) 14 | 15 | ### Includes 16 | target_include_directories(CMSISDSPSupport PUBLIC "${DSP}/Include") 17 | 18 | if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) 19 | target_sources(CMSISDSPSupport PRIVATE arm_copy_f16.c) 20 | target_sources(CMSISDSPSupport PRIVATE arm_fill_f16.c) 21 | target_sources(CMSISDSPSupport PRIVATE arm_f16_to_q15.c) 22 | target_sources(CMSISDSPSupport PRIVATE arm_q15_to_f16.c) 23 | target_sources(CMSISDSPSupport PRIVATE arm_float_to_f16.c) 24 | target_sources(CMSISDSPSupport PRIVATE arm_f16_to_float.c) 25 | target_sources(CMSISDSPSupport PRIVATE arm_weighted_sum_f16.c) 26 | target_sources(CMSISDSPSupport PRIVATE arm_barycenter_f16.c) 27 | endif() 28 | 29 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fir_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fir_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_svm_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_svm_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_bayes_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_bayes_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fft_bin_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fft_bin_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_matrix_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_matrix_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_sin_cos_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_sin_cos_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_variance_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_variance_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_class_marks_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_class_marks_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_convolution_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_convolution_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_dotproduct_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_dotproduct_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_linear_interp_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_linear_interp_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_signal_converge_example/ARMCM0_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_signal_converge_example/ARMCM3_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | #------------------------------------------------------------------------------ 9 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_svm_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_svm_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_svm_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_svm_example ${ROOT}) 39 | 40 | target_sources(arm_svm_example PRIVATE arm_svm_example_f32.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_svm_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_bayes_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_bayes_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_bayes_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_bayes_example ${ROOT}) 39 | 40 | target_sources(arm_bayes_example PRIVATE arm_bayes_example_f32.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_bayes_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fir_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_fir_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_fir_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_fir_example ${ROOT}) 39 | 40 | target_sources(arm_fir_example PRIVATE arm_fir_data.c math_helper.c arm_fir_example_f32.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_fir_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_sin_cos_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_sin_cos_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_sin_cos_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_sin_cos_example ${ROOT}) 39 | 40 | target_sources(arm_sin_cos_example PRIVATE arm_sin_cos_example_f32.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_sin_cos_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_matrix_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_matrix_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_matrix_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_matrix_example ${ROOT}) 39 | 40 | target_sources(arm_matrix_example PRIVATE math_helper.c arm_matrix_example_f32.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_matrix_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_variance_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_variance_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_variance_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_variance_example ${ROOT}) 39 | 40 | target_sources(arm_variance_example PRIVATE arm_variance_example_f32.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_variance_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Source/QuaternionMathFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | 3 | project(CMSISDSPQuaternionMath) 4 | 5 | include(configLib) 6 | include(configDsp) 7 | 8 | 9 | 10 | add_library(CMSISDSPQuaternionMath STATIC arm_quaternion_norm_f32.c) 11 | target_sources(CMSISDSPQuaternionMath PRIVATE arm_quaternion_inverse_f32.c) 12 | target_sources(CMSISDSPQuaternionMath PRIVATE arm_quaternion_conjugate_f32.c) 13 | target_sources(CMSISDSPQuaternionMath PRIVATE arm_quaternion_normalize_f32.c) 14 | target_sources(CMSISDSPQuaternionMath PRIVATE arm_quaternion_product_single_f32.c) 15 | target_sources(CMSISDSPQuaternionMath PRIVATE arm_quaternion_product_f32.c) 16 | target_sources(CMSISDSPQuaternionMath PRIVATE arm_quaternion2rotation_f32.c) 17 | target_sources(CMSISDSPQuaternionMath PRIVATE arm_rotation2quaternion_f32.c) 18 | 19 | 20 | if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) 21 | endif() 22 | 23 | 24 | configLib(CMSISDSPQuaternionMath ${ROOT}) 25 | configDsp(CMSISDSPQuaternionMath ${ROOT}) 26 | 27 | ### Includes 28 | target_include_directories(CMSISDSPQuaternionMath PUBLIC "${DSP}/Include") 29 | 30 | 31 | 32 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_dotproduct_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_dotproduct_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_dotproduct_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_dotproduct_example ${ROOT}) 39 | 40 | target_sources(arm_dotproduct_example PRIVATE arm_dotproduct_example_f32.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_dotproduct_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fft_bin_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_fft_bin_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_fft_bin_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_fft_bin_example ${ROOT}) 39 | 40 | target_sources(arm_fft_bin_example PRIVATE arm_fft_bin_data.c arm_fft_bin_example_f32.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_fft_bin_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_class_marks_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_class_marks_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_class_marks_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_class_marks_example ${ROOT}) 39 | 40 | target_sources(arm_class_marks_example PRIVATE arm_class_marks_example_f32.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_class_marks_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_bayes_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_bayes_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_convolution_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_convolution_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_convolution_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_convolution_example ${ROOT}) 39 | 40 | target_sources(arm_convolution_example PRIVATE arm_convolution_example_f32.c math_helper.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_convolution_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fir_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fir_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_matrix_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_matrix_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_svm_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_svm_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_class_marks_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_class_marks_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_convolution_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_convolution_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_dotproduct_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_dotproduct_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fft_bin_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_fft_bin_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_sin_cos_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_sin_cos_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_variance_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_variance_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_linear_interp_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_linear_interp_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_signal_converge_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_signal_converge_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM4_FP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_graphic_equalizer_example/ARMCM7_SP_config.txt: -------------------------------------------------------------------------------- 1 | # Parameters: 2 | # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] 3 | #------------------------------------------------------------------------------ 4 | armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. 5 | armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) 6 | armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) 7 | armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) 8 | armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support 9 | #------------------------------------------------------------------------------ 10 | -------------------------------------------------------------------------------- /NN/Source/NNSupportFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2019-2022 Arm Limited. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the License); you may 7 | # not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | # 18 | 19 | file(GLOB SRC "./*_s8.c") 20 | target_sources(cmsis-nn PRIVATE ${SRC} arm_q7_to_q15_with_offset.c 21 | arm_nn_mat_mul_kernel_s16.c 22 | arm_q7_to_q15_with_offset.c 23 | arm_nn_mat_mul_kernel_s16.c 24 | arm_nn_vec_mat_mult_t_s16.c 25 | arm_q7_to_q15_no_shift.c) 26 | 27 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_linear_interp_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_linear_interp_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_linear_interp_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_linear_interp_example ${ROOT}) 39 | 40 | target_sources(arm_linear_interp_example PRIVATE math_helper.c arm_linear_interp_data.c arm_linear_interp_example_f32.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_linear_interp_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Source/BayesFunctions/BayesFunctionsF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: BayesFunctions.c 4 | * Description: Combination of all bayes function f16 source files. 5 | * 6 | * 7 | * Target Processor: Cortex-M cores 8 | * -------------------------------------------------------------------- */ 9 | /* 10 | * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. 11 | * 12 | * SPDX-License-Identifier: Apache-2.0 13 | * 14 | * Licensed under the Apache License, Version 2.0 (the License); you may 15 | * not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at 17 | * 18 | * www.apache.org/licenses/LICENSE-2.0 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | */ 26 | 27 | #include "arm_gaussian_naive_bayes_predict_f16.c" 28 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_graphic_equalizer_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_graphic_equalizer_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_graphic_equalizer_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_graphic_equalizer_example ${ROOT}) 39 | 40 | target_sources(arm_graphic_equalizer_example PRIVATE math_helper.c arm_graphic_equalizer_data.c arm_graphic_equalizer_example_q31.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_graphic_equalizer_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Examples/ARM/arm_signal_converge_example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | project (arm_signal_convergence_example VERSION 0.1) 3 | 4 | 5 | # Needed to include the configBoot module 6 | # Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake) 7 | set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..) 8 | set(DSP ${ROOT}/CMSIS/DSP) 9 | 10 | # Add DSP folder to module path 11 | list(APPEND CMAKE_MODULE_PATH ${DSP}) 12 | 13 | ################################### 14 | # 15 | # LIBRARIES 16 | # 17 | ################################### 18 | 19 | ########### 20 | # 21 | # CMSIS DSP 22 | # 23 | 24 | add_subdirectory(../../../Source bin_dsp) 25 | 26 | 27 | ################################### 28 | # 29 | # TEST APPLICATION 30 | # 31 | ################################### 32 | 33 | 34 | add_executable(arm_signal_convergence_example) 35 | 36 | 37 | include(config) 38 | configApp(arm_signal_convergence_example ${ROOT}) 39 | 40 | target_sources(arm_signal_convergence_example PRIVATE math_helper.c arm_signal_converge_data.c arm_signal_converge_example_f32.c) 41 | 42 | ### Sources and libs 43 | 44 | target_link_libraries(arm_signal_convergence_example PRIVATE CMSISDSP) 45 | 46 | -------------------------------------------------------------------------------- /DSP/Source/BayesFunctions/BayesFunctions.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: BayesFunctions.c 4 | * Description: Combination of all bayes function source files. 5 | * 6 | * $Date: 16. March 2020 7 | * $Revision: V1.0.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_gaussian_naive_bayes_predict_f32.c" 30 | -------------------------------------------------------------------------------- /DSP/Source/BasicMathFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | 3 | project(CMSISDSPBasicMath) 4 | 5 | include(configLib) 6 | include(configDsp) 7 | 8 | file(GLOB SRCF64 "./*_f64.c") 9 | file(GLOB SRCF32 "./*_f32.c") 10 | file(GLOB SRCF16 "./*_f16.c") 11 | file(GLOB SRCQ31 "./*_q31.c") 12 | file(GLOB SRCQ15 "./*_q15.c") 13 | file(GLOB SRCQ7 "./*_q7.c") 14 | 15 | file(GLOB SRCU32 "./*_u32.c") 16 | file(GLOB SRCU16 "./*_u16.c") 17 | file(GLOB SRCU8 "./*_u8.c") 18 | 19 | add_library(CMSISDSPBasicMath STATIC ${SRCF64}) 20 | target_sources(CMSISDSPBasicMath PRIVATE ${SRCF32}) 21 | 22 | if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) 23 | target_sources(CMSISDSPBasicMath PRIVATE ${SRCF16}) 24 | endif() 25 | 26 | target_sources(CMSISDSPBasicMath PRIVATE ${SRCQ31}) 27 | target_sources(CMSISDSPBasicMath PRIVATE ${SRCQ15}) 28 | target_sources(CMSISDSPBasicMath PRIVATE ${SRCQ7}) 29 | 30 | target_sources(CMSISDSPBasicMath PRIVATE ${SRCU32}) 31 | target_sources(CMSISDSPBasicMath PRIVATE ${SRCU16}) 32 | target_sources(CMSISDSPBasicMath PRIVATE ${SRCU8}) 33 | 34 | configLib(CMSISDSPBasicMath ${ROOT}) 35 | configDsp(CMSISDSPBasicMath ${ROOT}) 36 | 37 | ### Includes 38 | target_include_directories(CMSISDSPBasicMath PUBLIC "${DSP}/Include") 39 | 40 | 41 | 42 | -------------------------------------------------------------------------------- /DSP/Source/CommonTables/CommonTables.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: CommonTables.c 4 | * Description: Combination of all common table source files. 5 | * 6 | * $Date: 08. January 2020 7 | * $Revision: V1.1.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_common_tables.c" 30 | #include "arm_const_structs.c" 31 | #include "arm_mve_tables.c" 32 | -------------------------------------------------------------------------------- /DSP/Source/ControllerFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | 3 | project(CMSISDSPController) 4 | 5 | include(configLib) 6 | include(configDsp) 7 | 8 | add_library(CMSISDSPController STATIC) 9 | 10 | configLib(CMSISDSPController ${ROOT}) 11 | configDsp(CMSISDSPController ${ROOT}) 12 | 13 | include(interpol) 14 | interpol(CMSISDSPController) 15 | 16 | if (CONFIGTABLE AND ALLFAST) 17 | target_compile_definitions(CMSISDSPController PUBLIC ARM_ALL_FAST_TABLES) 18 | endif() 19 | 20 | target_sources(CMSISDSPController PRIVATE arm_pid_init_f32.c) 21 | target_sources(CMSISDSPController PRIVATE arm_pid_init_q15.c) 22 | target_sources(CMSISDSPController PRIVATE arm_pid_init_q31.c) 23 | target_sources(CMSISDSPController PRIVATE arm_pid_reset_f32.c) 24 | target_sources(CMSISDSPController PRIVATE arm_pid_reset_q15.c) 25 | target_sources(CMSISDSPController PRIVATE arm_pid_reset_q31.c) 26 | 27 | if (NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_COS_F32) 28 | target_sources(CMSISDSPController PRIVATE arm_sin_cos_f32.c) 29 | endif() 30 | 31 | if (NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_COS_Q31) 32 | target_sources(CMSISDSPController PRIVATE arm_sin_cos_q31.c) 33 | endif() 34 | 35 | 36 | 37 | ### Includes 38 | target_include_directories(CMSISDSPController PUBLIC "${DSP}/Include") 39 | 40 | 41 | 42 | -------------------------------------------------------------------------------- /DSP/Source/CommonTables/CommonTablesF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: CommonTables.c 4 | * Description: Combination of all common table source files. 5 | * 6 | * $Date: 08. January 2020 7 | * $Revision: V1.1.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_common_tables_f16.c" 30 | #include "arm_const_structs_f16.c" 31 | #include "arm_mve_tables_f16.c" 32 | -------------------------------------------------------------------------------- /DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: InterpolationFunctions.c 4 | * Description: Combination of all interpolation function source files. 5 | * 6 | * $Date: 22. July 2020 7 | * $Revision: V1.0.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_bilinear_interp_f16.c" 30 | #include "arm_linear_interp_f16.c" 31 | 32 | 33 | 34 | -------------------------------------------------------------------------------- /DSP/Source/FastMathFunctions/FastMathFunctionsF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: FastMathFunctions.c 4 | * Description: Combination of all fast math function source files. 5 | * 6 | * $Date: 16. March 2020 7 | * $Revision: V1.1.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_vexp_f16.c" 30 | #include "arm_vlog_f16.c" 31 | #include "arm_vinverse_f16.c" 32 | #include "arm_atan2_f16.c" 33 | -------------------------------------------------------------------------------- /DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: CompexMathFunctionsF16.c 4 | * Description: Combination of all complex math function f16 source files. 5 | * 6 | * 7 | * Target Processor: Cortex-M cores 8 | * -------------------------------------------------------------------- */ 9 | /* 10 | * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. 11 | * 12 | * SPDX-License-Identifier: Apache-2.0 13 | * 14 | * Licensed under the Apache License, Version 2.0 (the License); you may 15 | * not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at 17 | * 18 | * www.apache.org/licenses/LICENSE-2.0 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | */ 26 | 27 | #include "arm_cmplx_conj_f16.c" 28 | #include "arm_cmplx_dot_prod_f16.c" 29 | #include "arm_cmplx_mag_f16.c" 30 | #include "arm_cmplx_mag_squared_f16.c" 31 | #include "arm_cmplx_mult_cmplx_f16.c" 32 | #include "arm_cmplx_mult_real_f16.c" 33 | -------------------------------------------------------------------------------- /DSP/Source/InterpolationFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | 3 | project(CMSISDSPInterpolation) 4 | 5 | include(configLib) 6 | include(configDsp) 7 | 8 | 9 | add_library(CMSISDSPInterpolation STATIC) 10 | 11 | target_sources(CMSISDSPInterpolation PRIVATE arm_bilinear_interp_f32.c) 12 | target_sources(CMSISDSPInterpolation PRIVATE arm_bilinear_interp_q15.c) 13 | target_sources(CMSISDSPInterpolation PRIVATE arm_bilinear_interp_q31.c) 14 | target_sources(CMSISDSPInterpolation PRIVATE arm_bilinear_interp_q7.c) 15 | target_sources(CMSISDSPInterpolation PRIVATE arm_linear_interp_f32.c) 16 | target_sources(CMSISDSPInterpolation PRIVATE arm_linear_interp_q15.c) 17 | target_sources(CMSISDSPInterpolation PRIVATE arm_linear_interp_q31.c) 18 | target_sources(CMSISDSPInterpolation PRIVATE arm_linear_interp_q7.c) 19 | target_sources(CMSISDSPInterpolation PRIVATE arm_spline_interp_f32.c) 20 | target_sources(CMSISDSPInterpolation PRIVATE arm_spline_interp_init_f32.c) 21 | 22 | 23 | configLib(CMSISDSPInterpolation ${ROOT}) 24 | configDsp(CMSISDSPInterpolation ${ROOT}) 25 | 26 | ### Includes 27 | target_include_directories(CMSISDSPInterpolation PUBLIC "${DSP}/Include") 28 | 29 | 30 | 31 | if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) 32 | target_sources(CMSISDSPInterpolation PRIVATE arm_bilinear_interp_f16.c) 33 | target_sources(CMSISDSPInterpolation PRIVATE arm_linear_interp_f16.c) 34 | endif() -------------------------------------------------------------------------------- /DSP/Source/configDsp.cmake: -------------------------------------------------------------------------------- 1 | function(configDsp project root) 2 | 3 | if (HOST) 4 | target_compile_definitions(${project} PUBLIC __GNUC_PYTHON__) 5 | endif() 6 | 7 | if (CONFIGTABLE) 8 | # Public because initialization for FFT may be defined in client code 9 | # and needs access to the table. 10 | target_compile_definitions(${project} PUBLIC ARM_DSP_CONFIG_TABLES) 11 | endif() 12 | 13 | if (LOOPUNROLL) 14 | target_compile_definitions(${project} PRIVATE ARM_MATH_LOOPUNROLL) 15 | endif() 16 | 17 | if (ROUNDING) 18 | target_compile_definitions(${project} PRIVATE ARM_MATH_ROUNDING) 19 | endif() 20 | 21 | if (MATRIXCHECK) 22 | target_compile_definitions(${project} PRIVATE ARM_MATH_MATRIX_CHECK) 23 | endif() 24 | 25 | if (AUTOVECTORIZE) 26 | target_compile_definitions(${project} PRIVATE ARM_MATH_AUTOVECTORIZE) 27 | endif() 28 | 29 | if (NEON OR NEONEXPERIMENTAL) 30 | # Used in arm_vec_math.h 31 | target_include_directories(${project} PUBLIC "${root}/CMSIS/DSP/ComputeLibrary/Include") 32 | endif() 33 | 34 | if (MVEFLOAT16) 35 | target_compile_definitions(${project} PRIVATE ARM_MATH_MVE_FLOAT16) 36 | endif() 37 | 38 | if (HELIUM OR MVEF OR SUPPORT) 39 | target_include_directories(${project} PRIVATE "${root}/CMSIS/DSP/PrivateInclude") 40 | endif() 41 | 42 | if (DISABLEFLOAT16) 43 | target_compile_definitions(${project} PRIVATE DISABLEFLOAT16) 44 | endif() 45 | 46 | 47 | endfunction() 48 | -------------------------------------------------------------------------------- /DSP/Source/SupportFunctions/SupportFunctionsF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: SupportFunctions.c 4 | * Description: Combination of all support function source files. 5 | * 6 | * $Date: 16. March 2020 7 | * $Revision: V1.1.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_copy_f16.c" 30 | #include "arm_fill_f16.c" 31 | #include "arm_f16_to_q15.c" 32 | #include "arm_f16_to_float.c" 33 | #include "arm_q15_to_f16.c" 34 | #include "arm_float_to_f16.c" 35 | #include "arm_weighted_sum_f16.c" 36 | #include "arm_barycenter_f16.c" 37 | -------------------------------------------------------------------------------- /DSP/Include/dsp/controller_functions_f16.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file controller_functions_f16.h 3 | * @brief Public header file for CMSIS DSP Library 4 | * @version V1.10.0 5 | * @date 08 July 2021 6 | * Target Processor: Cortex-M and Cortex-A cores 7 | ******************************************************************************/ 8 | /* 9 | * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. 10 | * 11 | * SPDX-License-Identifier: Apache-2.0 12 | * 13 | * Licensed under the Apache License, Version 2.0 (the License); you may 14 | * not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at 16 | * 17 | * www.apache.org/licenses/LICENSE-2.0 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | */ 25 | 26 | 27 | #ifndef _CONTROLLER_FUNCTIONS_F16_H_ 28 | #define _CONTROLLER_FUNCTIONS_F16_H_ 29 | 30 | #ifdef __cplusplus 31 | extern "C" 32 | { 33 | #endif 34 | 35 | #if defined(ARM_FLOAT16_SUPPORTED) 36 | #endif /*defined(ARM_FLOAT16_SUPPORTED)*/ 37 | #ifdef __cplusplus 38 | } 39 | #endif 40 | 41 | #endif /* ifndef _CONTROLLER_FUNCTIONS_F16_H_ */ 42 | -------------------------------------------------------------------------------- /DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: BasicMathFunctionsF16.c 4 | * Description: Combination of all basic math function f16 source files. 5 | * 6 | * $Date: 20. April 2020 7 | * $Revision: V1.1.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_abs_f16.c" 30 | #include "arm_add_f16.c" 31 | #include "arm_dot_prod_f16.c" 32 | #include "arm_mult_f16.c" 33 | #include "arm_negate_f16.c" 34 | #include "arm_offset_f16.c" 35 | #include "arm_scale_f16.c" 36 | #include "arm_sub_f16.c" 37 | #include "arm_clip_f16.c" 38 | -------------------------------------------------------------------------------- /DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: QuaternionMathFunctions.c 4 | * Description: Combination of all quaternion math function source files. 5 | * 6 | * 7 | * Target Processor: Cortex-M cores 8 | * -------------------------------------------------------------------- */ 9 | /* 10 | * Copyright (C) 2019-2021 ARM Limited or its affiliates. All rights reserved. 11 | * 12 | * SPDX-License-Identifier: Apache-2.0 13 | * 14 | * Licensed under the Apache License, Version 2.0 (the License); you may 15 | * not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at 17 | * 18 | * www.apache.org/licenses/LICENSE-2.0 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | */ 26 | 27 | #include "arm_quaternion_norm_f32.c" 28 | #include "arm_quaternion_inverse_f32.c" 29 | #include "arm_quaternion_conjugate_f32.c" 30 | #include "arm_quaternion_normalize_f32.c" 31 | #include "arm_quaternion_product_single_f32.c" 32 | #include "arm_quaternion_product_f32.c" 33 | #include "arm_quaternion2rotation_f32.c" 34 | #include "arm_rotation2quaternion_f32.c" 35 | -------------------------------------------------------------------------------- /DSP/Source/SVMFunctions/SVMFunctions.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: BayesFunctions.c 4 | * Description: Combination of all SVM function source files. 5 | * 6 | * $Date: 16. March 2020 7 | * $Revision: V1.0.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_svm_linear_init_f32.c" 30 | #include "arm_svm_linear_predict_f32.c" 31 | #include "arm_svm_polynomial_init_f32.c" 32 | #include "arm_svm_polynomial_predict_f32.c" 33 | #include "arm_svm_rbf_init_f32.c" 34 | #include "arm_svm_rbf_predict_f32.c" 35 | #include "arm_svm_sigmoid_init_f32.c" 36 | #include "arm_svm_sigmoid_predict_f32.c" 37 | -------------------------------------------------------------------------------- /DSP/Source/SVMFunctions/SVMFunctionsF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: BayesFunctions.c 4 | * Description: Combination of all SVM function source files. 5 | * 6 | * $Date: 16. March 2020 7 | * $Revision: V1.0.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_svm_linear_init_f16.c" 30 | #include "arm_svm_linear_predict_f16.c" 31 | #include "arm_svm_polynomial_init_f16.c" 32 | #include "arm_svm_polynomial_predict_f16.c" 33 | #include "arm_svm_rbf_init_f16.c" 34 | #include "arm_svm_rbf_predict_f16.c" 35 | #include "arm_svm_sigmoid_init_f16.c" 36 | #include "arm_svm_sigmoid_predict_f16.c" 37 | -------------------------------------------------------------------------------- /DSP/Source/DistanceFunctions/DistanceFunctionsF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: DistanceFunctions.c 4 | * Description: Combination of all distance function f16 source files. 5 | * 6 | * 7 | * Target Processor: Cortex-M cores 8 | * -------------------------------------------------------------------- */ 9 | /* 10 | * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. 11 | * 12 | * SPDX-License-Identifier: Apache-2.0 13 | * 14 | * Licensed under the Apache License, Version 2.0 (the License); you may 15 | * not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at 17 | * 18 | * www.apache.org/licenses/LICENSE-2.0 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | */ 26 | 27 | #include "arm_braycurtis_distance_f16.c" 28 | #include "arm_canberra_distance_f16.c" 29 | #include "arm_chebyshev_distance_f16.c" 30 | #include "arm_cityblock_distance_f16.c" 31 | #include "arm_correlation_distance_f16.c" 32 | #include "arm_cosine_distance_f16.c" 33 | #include "arm_euclidean_distance_f16.c" 34 | #include "arm_jensenshannon_distance_f16.c" 35 | #include "arm_minkowski_distance_f16.c" 36 | 37 | -------------------------------------------------------------------------------- /DSP/Source/SVMFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | 3 | project(CMSISDSPSVM) 4 | 5 | include(configLib) 6 | include(configDsp) 7 | 8 | 9 | add_library(CMSISDSPSVM STATIC) 10 | 11 | target_sources(CMSISDSPSVM PRIVATE arm_svm_linear_init_f32.c) 12 | target_sources(CMSISDSPSVM PRIVATE arm_svm_rbf_init_f32.c) 13 | target_sources(CMSISDSPSVM PRIVATE arm_svm_linear_predict_f32.c) 14 | target_sources(CMSISDSPSVM PRIVATE arm_svm_rbf_predict_f32.c) 15 | target_sources(CMSISDSPSVM PRIVATE arm_svm_polynomial_init_f32.c) 16 | target_sources(CMSISDSPSVM PRIVATE arm_svm_sigmoid_init_f32.c) 17 | target_sources(CMSISDSPSVM PRIVATE arm_svm_polynomial_predict_f32.c) 18 | target_sources(CMSISDSPSVM PRIVATE arm_svm_sigmoid_predict_f32.c) 19 | 20 | 21 | 22 | configLib(CMSISDSPSVM ${ROOT}) 23 | configDsp(CMSISDSPSVM ${ROOT}) 24 | 25 | ### Includes 26 | target_include_directories(CMSISDSPSVM PUBLIC "${DSP}/Include") 27 | 28 | if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) 29 | target_sources(CMSISDSPSVM PRIVATE arm_svm_linear_init_f16.c) 30 | target_sources(CMSISDSPSVM PRIVATE arm_svm_rbf_init_f16.c) 31 | target_sources(CMSISDSPSVM PRIVATE arm_svm_linear_predict_f16.c) 32 | target_sources(CMSISDSPSVM PRIVATE arm_svm_rbf_predict_f16.c) 33 | target_sources(CMSISDSPSVM PRIVATE arm_svm_polynomial_init_f16.c) 34 | target_sources(CMSISDSPSVM PRIVATE arm_svm_sigmoid_init_f16.c) 35 | target_sources(CMSISDSPSVM PRIVATE arm_svm_polynomial_predict_f16.c) 36 | target_sources(CMSISDSPSVM PRIVATE arm_svm_sigmoid_predict_f16.c) 37 | endif() 38 | 39 | 40 | 41 | 42 | -------------------------------------------------------------------------------- /DSP/Source/FilteringFunctions/FilteringFunctionsF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: FilteringFunctions.c 4 | * Description: Combination of all filtering function f16 source files. 5 | * 6 | * 7 | * Target Processor: Cortex-M cores 8 | * -------------------------------------------------------------------- */ 9 | /* 10 | * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. 11 | * 12 | * SPDX-License-Identifier: Apache-2.0 13 | * 14 | * Licensed under the Apache License, Version 2.0 (the License); you may 15 | * not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at 17 | * 18 | * www.apache.org/licenses/LICENSE-2.0 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | */ 26 | 27 | #include "arm_fir_f16.c" 28 | #include "arm_fir_init_f16.c" 29 | #include "arm_biquad_cascade_df1_f16.c" 30 | #include "arm_biquad_cascade_df1_init_f16.c" 31 | #include "arm_biquad_cascade_df2T_f16.c" 32 | #include "arm_biquad_cascade_df2T_init_f16.c" 33 | #include "arm_biquad_cascade_stereo_df2T_f16.c" 34 | #include "arm_biquad_cascade_stereo_df2T_init_f16.c" 35 | #include "arm_correlate_f16.c" 36 | #include "arm_levinson_durbin_f16.c" 37 | -------------------------------------------------------------------------------- /DSP/Source/InterpolationFunctions/InterpolationFunctions.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: InterpolationFunctions.c 4 | * Description: Combination of all interpolation function source files. 5 | * 6 | * $Date: 22. July 2020 7 | * $Revision: V1.0.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_bilinear_interp_f32.c" 30 | #include "arm_bilinear_interp_q15.c" 31 | #include "arm_bilinear_interp_q31.c" 32 | #include "arm_bilinear_interp_q7.c" 33 | #include "arm_linear_interp_f32.c" 34 | #include "arm_linear_interp_q15.c" 35 | #include "arm_linear_interp_q31.c" 36 | #include "arm_linear_interp_q7.c" 37 | #include "arm_spline_interp_f32.c" 38 | #include "arm_spline_interp_init_f32.c" 39 | 40 | 41 | 42 | -------------------------------------------------------------------------------- /DSP/Include/dsp/svm_defines.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file svm_defines.h 3 | * @brief Public header file for CMSIS DSP Library 4 | * @version V1.10.0 5 | * @date 08 July 2021 6 | * 7 | * Target Processor: Cortex-M and Cortex-A cores 8 | ******************************************************************************/ 9 | /* 10 | * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved. 11 | * 12 | * SPDX-License-Identifier: Apache-2.0 13 | * 14 | * Licensed under the Apache License, Version 2.0 (the License); you may 15 | * not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at 17 | * 18 | * www.apache.org/licenses/LICENSE-2.0 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | */ 26 | 27 | 28 | #ifndef _SVM_DEFINES_H_ 29 | #define _SVM_DEFINES_H_ 30 | 31 | /** 32 | * @brief Struct for specifying SVM Kernel 33 | */ 34 | typedef enum 35 | { 36 | ARM_ML_KERNEL_LINEAR = 0, 37 | /**< Linear kernel */ 38 | ARM_ML_KERNEL_POLYNOMIAL = 1, 39 | /**< Polynomial kernel */ 40 | ARM_ML_KERNEL_RBF = 2, 41 | /**< Radial Basis Function kernel */ 42 | ARM_ML_KERNEL_SIGMOID = 3 43 | /**< Sigmoid kernel */ 44 | } arm_ml_kernel_type; 45 | 46 | #endif 47 | -------------------------------------------------------------------------------- /NN/.clang-format: -------------------------------------------------------------------------------- 1 | 2 | # Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the License); you may 7 | # not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | 18 | --- 19 | Language: Cpp 20 | # BasedOnStyle: LLVM 21 | AccessModifierOffset: -2 22 | AlignAfterOpenBracket: Align 23 | AlignConsecutiveAssignments: false 24 | AlignConsecutiveDeclarations: false 25 | AlignEscapedNewlinesLeft: false 26 | AlignOperands: false 27 | AlignTrailingComments: true 28 | AllowAllParametersOfDeclarationOnNextLine: false 29 | BinPackArguments: false 30 | BinPackParameters: false 31 | BraceWrapping: 32 | AfterClass: false 33 | AfterControlStatement: true 34 | AfterEnum: true 35 | AfterExternBlock: false 36 | AfterFunction: true 37 | AfterStruct: true 38 | AfterUnion: true 39 | BeforeElse: true 40 | IndentBraces: false 41 | BreakBeforeBinaryOperators: None 42 | BreakBeforeBraces: Custom 43 | ColumnLimit: 120 44 | DerivePointerAlignment: false 45 | IndentWidth: 4 46 | IndentWrappedFunctionNames: false 47 | PointerAlignment: Right 48 | ... 49 | 50 | -------------------------------------------------------------------------------- /NN/Source/ReshapeFunctions/arm_reshape_s8.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2010-2021 Arm Limited or its affiliates. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | */ 18 | 19 | /* ---------------------------------------------------------------------- 20 | * Project: CMSIS NN Library 21 | * Title: arm_reshape_s8.c 22 | * Description: Reshape a s8 vector 23 | * 24 | * $Date: September 2019 25 | * $Revision: V.1.0.0 26 | * 27 | * Target Processor: Cortex-M cores 28 | * 29 | * -------------------------------------------------------------------- */ 30 | 31 | #include "arm_nnfunctions.h" 32 | #include "arm_nnsupportfunctions.h" 33 | 34 | /** 35 | * @ingroup groupNN 36 | */ 37 | 38 | /** 39 | * @addtogroup Reshape 40 | * @{ 41 | */ 42 | 43 | /** 44 | * Basic s8 reshape function. 45 | * 46 | * Refer header file for details. 47 | * 48 | */ 49 | 50 | void arm_reshape_s8(const int8_t *input, int8_t *output, const uint32_t total_size) 51 | { 52 | arm_memcpy_q7(output, input, total_size); 53 | } 54 | 55 | /** 56 | * @} end of Reshape group 57 | */ 58 | -------------------------------------------------------------------------------- /DSP/Source/TransformFunctions/TransformFunctionsF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: TransformFunctionsF16.c 4 | * Description: Combination of all transform function f16 source files. 5 | * 6 | * $Date: 20. April 2020 7 | * $Revision: V1.0.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_cfft_f16.c" 30 | #include "arm_cfft_init_f16.c" 31 | #include "arm_cfft_radix2_f16.c" 32 | #include "arm_cfft_radix4_f16.c" 33 | #include "arm_rfft_fast_init_f16.c" 34 | #include "arm_rfft_fast_f16.c" 35 | #include "arm_cfft_radix8_f16.c" 36 | 37 | #include "arm_bitreversal_f16.c" 38 | 39 | #include "arm_mfcc_init_f16.c" 40 | #include "arm_mfcc_f16.c" 41 | 42 | /* Deprecated */ 43 | #include "arm_cfft_radix2_init_f16.c" 44 | #include "arm_cfft_radix4_init_f16.c" 45 | -------------------------------------------------------------------------------- /DSP/Source/MatrixFunctions/MatrixFunctionsF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: MatrixFunctions.c 4 | * Description: Combination of all matrix function f16 source files. 5 | * 6 | * $Date: 18. March 2020 7 | * $Revision: V1.0.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_mat_add_f16.c" 30 | #include "arm_mat_sub_f16.c" 31 | #include "arm_mat_trans_f16.c" 32 | #include "arm_mat_scale_f16.c" 33 | #include "arm_mat_mult_f16.c" 34 | #include "arm_mat_vec_mult_f16.c" 35 | #include "arm_mat_cmplx_trans_f16.c" 36 | #include "arm_mat_cmplx_mult_f16.c" 37 | #include "arm_mat_inverse_f16.c" 38 | #include "arm_mat_init_f16.c" 39 | #include "arm_mat_cholesky_f16.c" 40 | #include "arm_mat_solve_upper_triangular_f16.c" 41 | #include "arm_mat_solve_lower_triangular_f16.c" 42 | -------------------------------------------------------------------------------- /DSP/Source/FastMathFunctions/arm_vexp_f64.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_vlog_f64.c 4 | * Description: Fast vectorized log 5 | * 6 | * $Date: 13 September 2021 7 | * $Revision: V1.10.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/fast_math_functions.h" 30 | #include "arm_common_tables.h" 31 | 32 | void arm_vexp_f64( 33 | const float64_t * pSrc, 34 | float64_t * pDst, 35 | uint32_t blockSize) 36 | { 37 | uint32_t blkCnt; 38 | 39 | blkCnt = blockSize; 40 | 41 | while (blkCnt > 0U) 42 | { 43 | /* C = log(A) */ 44 | 45 | /* Calculate log and store result in destination buffer. */ 46 | *pDst++ = exp(*pSrc++); 47 | 48 | /* Decrement loop counter */ 49 | blkCnt--; 50 | } 51 | } 52 | -------------------------------------------------------------------------------- /DSP/Source/FastMathFunctions/arm_vlog_f64.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_vlog_f64.c 4 | * Description: Fast vectorized log 5 | * 6 | * $Date: 13 September 2021 7 | * $Revision: V1.10.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/fast_math_functions.h" 30 | #include "arm_common_tables.h" 31 | 32 | void arm_vlog_f64( 33 | const float64_t * pSrc, 34 | float64_t * pDst, 35 | uint32_t blockSize) 36 | { 37 | uint32_t blkCnt; 38 | 39 | blkCnt = blockSize; 40 | 41 | while (blkCnt > 0U) 42 | { 43 | /* C = log(A) */ 44 | 45 | /* Calculate log and store result in destination buffer. */ 46 | *pDst++ = log(*pSrc++); 47 | 48 | /* Decrement loop counter */ 49 | blkCnt--; 50 | } 51 | } 52 | -------------------------------------------------------------------------------- /NN/Source/ActivationFunctions/arm_relu6_s8.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2010-2019 Arm Limited or its affiliates. All rights reserved. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | */ 18 | 19 | /* ---------------------------------------------------------------------- 20 | * Project: CMSIS NN Library 21 | * Title: arm_relu6_s8.c 22 | * Description: Basic s8 version of ReLU6 23 | * 24 | * $Date: 09. October 2020 25 | * $Revision: V.1.0.1 26 | * 27 | * Target Processor: Cortex-M cores 28 | * 29 | * -------------------------------------------------------------------- */ 30 | 31 | #include "arm_nnfunctions.h" 32 | #include "arm_nnsupportfunctions.h" 33 | 34 | /** 35 | * @ingroup groupNN 36 | */ 37 | 38 | /** 39 | * @addtogroup Acti 40 | * @{ 41 | */ 42 | 43 | /* 44 | * Basic ReLU6 function 45 | * 46 | * Refer to header file for details. 47 | * 48 | */ 49 | 50 | void arm_relu6_s8(q7_t *data, uint16_t size) 51 | { 52 | int32_t i; 53 | 54 | for (i = 0; i < size; i++) 55 | { 56 | int32_t ip = data[i]; 57 | 58 | ip = MAX(ip, 0); 59 | data[i] = MIN(ip, 6); 60 | } 61 | } 62 | 63 | /** 64 | * @} end of Acti group 65 | */ 66 | -------------------------------------------------------------------------------- /SECURITY.md: -------------------------------------------------------------------------------- 1 | # Report potential product security vulnerabilities 2 | 3 | ST places a high priority on security, and our Product Security Incident 4 | Response Team (PSIRT) is committed to rapidly addressing potential security 5 | vulnerabilities affecting our products. PSIRT's long history and vast experience 6 | in security allows ST to perform clear analyses and provide appropriate guidance 7 | on mitigations and solutions when applicable. 8 | 9 | If you wish to report potential security vulnerabilities regarding our products, 10 | **please do not report them through public GitHub issues.** Instead, we 11 | encourage you to report them to our ST PSIRT following the process described at: 12 | **https://www.st.com/content/st_com/en/security/report-vulnerabilities.html** 13 | 14 | ### IMPORTANT - READ CAREFULLY: 15 | 16 | STMicroelectronics International N.V., on behalf of itself, its affiliates and 17 | subsidiaries, (collectively “ST”) takes all potential security vulnerability 18 | reports or other related communications (“Report(s)”) seriously. In order to 19 | review Your Report (the terms “You” and “Yours” include your employer, and all 20 | affiliates, subsidiaries and related persons or entities) and take actions as 21 | deemed appropriate, ST requires that we have the rights and Your permission to 22 | do so. 23 | 24 | As such, by submitting Your Report to ST, You agree that You have the right to 25 | do so, and You grant to ST the rights to use the Report for purposes related to 26 | security vulnerability analysis, testing, correction, patching, reporting and 27 | any other related purpose or function. 28 | 29 | By submitting Your Report, You agree that ST’s 30 | [Privacy Policy](https://www.st.com/content/st_com/en/common/privacy-portal.html) 31 | applies to all related communications. 32 | -------------------------------------------------------------------------------- /DSP/Source/SupportFunctions/arm_sort_init_f32.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_sort_init_f32.c 4 | * Description: Floating point sort initialization function 5 | * 6 | * $Date: 23 April 2021 7 | * $Revision: V1.9.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_sorting.h" 30 | 31 | /** 32 | @ingroup groupSupport 33 | */ 34 | 35 | /** 36 | @addtogroup Sorting 37 | @{ 38 | */ 39 | 40 | 41 | /** 42 | * @param[in,out] S points to an instance of the sorting structure. 43 | * @param[in] alg Selected algorithm. 44 | * @param[in] dir Sorting order. 45 | */ 46 | void arm_sort_init_f32(arm_sort_instance_f32 * S, arm_sort_alg alg, arm_sort_dir dir) 47 | { 48 | S->alg = alg; 49 | S->dir = dir; 50 | } 51 | 52 | /** 53 | @} end of Sorting group 54 | */ 55 | -------------------------------------------------------------------------------- /DSP/Source/ControllerFunctions/ControllerFunctions.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: ControllerFunctions.c 4 | * Description: Combination of all controller function source files. 5 | * 6 | * $Date: 18. March 2019 7 | * $Revision: V1.0.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_pid_init_f32.c" 30 | #include "arm_pid_init_q15.c" 31 | #include "arm_pid_init_q31.c" 32 | #include "arm_pid_reset_f32.c" 33 | #include "arm_pid_reset_q15.c" 34 | #include "arm_pid_reset_q31.c" 35 | 36 | #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES) 37 | 38 | #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32) 39 | #include "arm_sin_cos_f32.c" 40 | #endif 41 | 42 | #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31) 43 | #include "arm_sin_cos_q31.c" 44 | #endif 45 | 46 | #endif 47 | -------------------------------------------------------------------------------- /DSP/Source/SupportFunctions/arm_merge_sort_init_f32.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_merge_sort_init_f32.c 4 | * Description: Floating point merge sort initialization function 5 | * 6 | * $Date: 23 April 2021 7 | * $Revision: V1.9.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/support_functions.h" 30 | 31 | /** 32 | @ingroup groupSupport 33 | */ 34 | 35 | /** 36 | @addtogroup Sorting 37 | @{ 38 | */ 39 | 40 | 41 | /** 42 | * @param[in,out] S points to an instance of the sorting structure. 43 | * @param[in] dir Sorting order. 44 | * @param[in] buffer Working buffer. 45 | */ 46 | void arm_merge_sort_init_f32(arm_merge_sort_instance_f32 * S, arm_sort_dir dir, float32_t * buffer) 47 | { 48 | S->dir = dir; 49 | S->buffer = buffer; 50 | } 51 | /** 52 | @} end of Sorting group 53 | */ 54 | -------------------------------------------------------------------------------- /DSP/Source/ControllerFunctions/arm_pid_reset_q15.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_pid_reset_q15.c 4 | * Description: Q15 PID Control reset function 5 | * 6 | * $Date: 23 April 2021 7 | * $Revision: V1.9.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/controller_functions.h" 30 | 31 | /** 32 | @addtogroup PID 33 | @{ 34 | */ 35 | 36 | /** 37 | @brief Reset function for the Q15 PID Control. 38 | @param[in,out] S points to an instance of the Q15 PID structure 39 | @return none 40 | 41 | @par Details 42 | The function resets the state buffer to zeros. 43 | */ 44 | 45 | void arm_pid_reset_q15( 46 | arm_pid_instance_q15 * S) 47 | { 48 | /* Reset state to zero, The size will be always 3 samples */ 49 | memset(S->state, 0, 3U * sizeof(q15_t)); 50 | } 51 | 52 | /** 53 | @} end of PID group 54 | */ 55 | -------------------------------------------------------------------------------- /DSP/Source/ControllerFunctions/arm_pid_reset_q31.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_pid_reset_q31.c 4 | * Description: Q31 PID Control reset function 5 | * 6 | * $Date: 23 April 2021 7 | * $Revision: V1.9.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/controller_functions.h" 30 | 31 | /** 32 | @addtogroup PID 33 | @{ 34 | */ 35 | 36 | /** 37 | @brief Reset function for the Q31 PID Control. 38 | @param[in,out] S points to an instance of the Q31 PID structure 39 | @return none 40 | 41 | @par Details 42 | The function resets the state buffer to zeros. 43 | */ 44 | 45 | void arm_pid_reset_q31( 46 | arm_pid_instance_q31 * S) 47 | { 48 | /* Reset state to zero, The size will be always 3 samples */ 49 | memset(S->state, 0, 3U * sizeof(q31_t)); 50 | } 51 | 52 | /** 53 | @} end of PID group 54 | */ 55 | -------------------------------------------------------------------------------- /DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: StatisticsFunctions.c 4 | * Description: Combination of all statistics function source files. 5 | * 6 | * $Date: 16. March 2020 7 | * $Revision: V1.1.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_max_f16.c" 30 | #include "arm_min_f16.c" 31 | #include "arm_mean_f16.c" 32 | #include "arm_power_f16.c" 33 | #include "arm_rms_f16.c" 34 | #include "arm_std_f16.c" 35 | #include "arm_var_f16.c" 36 | #include "arm_entropy_f16.c" 37 | #include "arm_kullback_leibler_f16.c" 38 | #include "arm_logsumexp_dot_prod_f16.c" 39 | #include "arm_logsumexp_f16.c" 40 | #include "arm_max_no_idx_f16.c" 41 | #include "arm_min_no_idx_f16.c" 42 | #include "arm_absmax_f16.c" 43 | #include "arm_absmin_f16.c" 44 | #include "arm_absmax_no_idx_f16.c" 45 | #include "arm_absmin_no_idx_f16.c" 46 | #include "arm_mse_f16.c" 47 | -------------------------------------------------------------------------------- /DSP/Source/CommonTables/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | 3 | project(CMSISDSPCommon) 4 | 5 | include(configLib) 6 | include(configDsp) 7 | 8 | add_library(CMSISDSPCommon STATIC arm_common_tables.c arm_common_tables_f16.c) 9 | 10 | configLib(CMSISDSPCommon ${ROOT}) 11 | configDsp(CMSISDSPCommon ${ROOT}) 12 | 13 | if (CONFIGTABLE AND ALLFFT) 14 | target_compile_definitions(CMSISDSPCommon PUBLIC ARM_ALL_FFT_TABLES) 15 | endif() 16 | 17 | if (CONFIGTABLE AND ALLFAST) 18 | target_compile_definitions(CMSISDSPCommon PUBLIC ARM_ALL_FAST_TABLES) 19 | endif() 20 | 21 | include(fft) 22 | fft(CMSISDSPCommon) 23 | 24 | include(interpol) 25 | interpol(CMSISDSPCommon) 26 | 27 | target_sources(CMSISDSPCommon PRIVATE arm_const_structs.c) 28 | target_sources(CMSISDSPCommon PRIVATE arm_const_structs_f16.c) 29 | 30 | 31 | ### Includes 32 | target_include_directories(CMSISDSPCommon PUBLIC "${DSP}/Include") 33 | 34 | if (NEON OR NEONEXPERIMENTAL) 35 | target_sources(CMSISDSPCommon PRIVATE "${DSP}/ComputeLibrary/Source/arm_cl_tables.c") 36 | endif() 37 | 38 | if (HELIUM OR MVEF) 39 | target_sources(CMSISDSPCommon PRIVATE "${DSP}/Source/CommonTables/arm_mve_tables.c") 40 | target_sources(CMSISDSPCommon PRIVATE "${DSP}/Source/CommonTables/arm_mve_tables_f16.c") 41 | endif() 42 | 43 | 44 | if (WRAPPER) 45 | target_compile_definitions(CMSISDSPCommon PUBLIC ARM_TABLE_BITREV_1024) 46 | target_compile_definitions(CMSISDSPCommon PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096) 47 | target_compile_definitions(CMSISDSPCommon PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_4096) 48 | target_compile_definitions(CMSISDSPCommon PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_4096) 49 | if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) 50 | target_compile_definitions(CMSISDSPCommon PUBLIC ARM_TABLE_TWIDDLECOEF_F16_4096) 51 | endif() 52 | endif() -------------------------------------------------------------------------------- /Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.5 5 | * @date 02. February 2022 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2022 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 6U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /Core/Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.5 5 | * @date 02. February 2022 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2022 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 6U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /DSP/Source/ControllerFunctions/arm_pid_reset_f32.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_pid_reset_f32.c 4 | * Description: Floating-point PID Control reset function 5 | * 6 | * $Date: 23 April 2021 7 | * $Revision: V1.9.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/controller_functions.h" 30 | 31 | /** 32 | @addtogroup PID 33 | @{ 34 | */ 35 | 36 | /** 37 | @brief Reset function for the floating-point PID Control. 38 | @param[in,out] S points to an instance of the floating-point PID structure 39 | @return none 40 | 41 | @par Details 42 | The function resets the state buffer to zeros. 43 | */ 44 | 45 | void arm_pid_reset_f32( 46 | arm_pid_instance_f32 * S) 47 | { 48 | /* Reset state to zero, The size will be always 3 samples */ 49 | memset(S->state, 0, 3U * sizeof(float32_t)); 50 | } 51 | 52 | /** 53 | @} end of PID group 54 | */ 55 | -------------------------------------------------------------------------------- /NN/Source/SoftmaxFunctions/arm_softmax_s8_s16.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Arm Limited or its affiliates. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | */ 18 | 19 | /* ---------------------------------------------------------------------- 20 | * Project: CMSIS NN Library 21 | * Title: arm_softmax_s8_s16.c 22 | * Description: S8 to s16 softmax function 23 | * 24 | * $Date: 7 January 2022 25 | * $Revision: V.1.0.0 26 | * 27 | * Target Processor: Cortex-M cores 28 | * 29 | * -------------------------------------------------------------------- */ 30 | 31 | #include "arm_nnfunctions.h" 32 | #include "arm_nnsupportfunctions.h" 33 | 34 | /** 35 | * @ingroup groupNN 36 | */ 37 | 38 | /** 39 | * @addtogroup Softmax 40 | * @{ 41 | */ 42 | 43 | void arm_softmax_s8_s16(const int8_t *input, 44 | const int32_t num_rows, 45 | const int32_t row_size, 46 | const int32_t mult, 47 | const int32_t shift, 48 | const int32_t diff_min, 49 | int16_t *output) 50 | { 51 | arm_nn_softmax_common_s8(input, num_rows, row_size, mult, shift, diff_min, true, (void *)output); 52 | } 53 | /** 54 | * @} end of Softmax group 55 | */ 56 | -------------------------------------------------------------------------------- /DSP/Source/StatisticsFunctions/arm_std_f64.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_std_f64.c 4 | * Description: Standard deviation of the elements of a floating-point vector 5 | * 6 | * $Date: 13 September 2021 7 | * $Revision: V1.10.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/statistics_functions.h" 30 | 31 | /** 32 | @ingroup groupStats 33 | */ 34 | 35 | /** 36 | @addtogroup STD 37 | @{ 38 | */ 39 | 40 | /** 41 | @brief Standard deviation of the elements of a floating-point vector. 42 | @param[in] pSrc points to the input vector 43 | @param[in] blockSize number of samples in input vector 44 | @param[out] pResult standard deviation value returned here 45 | @return none 46 | */ 47 | void arm_std_f64( 48 | const float64_t * pSrc, 49 | uint32_t blockSize, 50 | float64_t * pResult) 51 | { 52 | float64_t var; 53 | arm_var_f64(pSrc,blockSize,&var); 54 | *pResult = sqrt(var); 55 | } 56 | 57 | /** 58 | @} end of STD group 59 | */ 60 | -------------------------------------------------------------------------------- /DSP/Source/MatrixFunctions/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required (VERSION 3.14) 2 | 3 | project(CMSISDSPMatrix) 4 | 5 | include(configLib) 6 | include(configDsp) 7 | 8 | file(GLOB SRCF64 "./*_f64.c") 9 | file(GLOB SRCF32 "./*_f32.c") 10 | file(GLOB SRCF16 "./*_f16.c") 11 | file(GLOB SRCQ31 "./*_q31.c") 12 | file(GLOB SRCQ15 "./*_q15.c") 13 | file(GLOB SRCQ7 "./*_q7.c") 14 | 15 | file(GLOB SRCU32 "./*_u32.c") 16 | file(GLOB SRCU16 "./*_u16.c") 17 | file(GLOB SRCU8 "./*_u8.c") 18 | 19 | add_library(CMSISDSPMatrix STATIC ${SRCF64}) 20 | target_sources(CMSISDSPMatrix PRIVATE ${SRCF32}) 21 | 22 | if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) 23 | target_sources(CMSISDSPMatrix PRIVATE ${SRCF16}) 24 | endif() 25 | 26 | target_sources(CMSISDSPMatrix PRIVATE ${SRCQ31}) 27 | target_sources(CMSISDSPMatrix PRIVATE ${SRCQ15}) 28 | target_sources(CMSISDSPMatrix PRIVATE ${SRCQ7}) 29 | 30 | target_sources(CMSISDSPMatrix PRIVATE ${SRCU32}) 31 | target_sources(CMSISDSPMatrix PRIVATE ${SRCU16}) 32 | target_sources(CMSISDSPMatrix PRIVATE ${SRCU8}) 33 | 34 | configLib(CMSISDSPMatrix ${ROOT}) 35 | configDsp(CMSISDSPMatrix ${ROOT}) 36 | 37 | ### Includes 38 | target_include_directories(CMSISDSPMatrix PUBLIC "${DSP}/Include") 39 | 40 | 41 | if ((NOT ARMAC5) AND (NOT DISABLEFLOAT16)) 42 | target_sources(CMSISDSPMatrix PRIVATE arm_mat_add_f16.c) 43 | target_sources(CMSISDSPMatrix PRIVATE arm_mat_sub_f16.c) 44 | target_sources(CMSISDSPMatrix PRIVATE arm_mat_trans_f16.c) 45 | target_sources(CMSISDSPMatrix PRIVATE arm_mat_scale_f16.c) 46 | target_sources(CMSISDSPMatrix PRIVATE arm_mat_mult_f16.c) 47 | target_sources(CMSISDSPMatrix PRIVATE arm_mat_vec_mult_f16.c) 48 | target_sources(CMSISDSPMatrix PRIVATE arm_mat_cmplx_trans_f16.c) 49 | target_sources(CMSISDSPMatrix PRIVATE arm_mat_cmplx_mult_f16.c) 50 | target_sources(CMSISDSPMatrix PRIVATE arm_mat_inverse_f16.c) 51 | target_sources(CMSISDSPMatrix PRIVATE arm_mat_init_f16.c) 52 | target_sources(CMSISDSPMatrix PRIVATE arm_mat_cholesky_f16.c) 53 | 54 | endif() 55 | -------------------------------------------------------------------------------- /NN/Include/arm_nn_tables.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS NN Library 3 | * Title: arm_nn_tables.h 4 | * Description: Extern declaration for NN tables 5 | * 6 | * $Date: 17. August 2021 7 | * $Revision: V.1.0.2 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #ifndef _ARM_NN_TABLES_H 30 | #define _ARM_NN_TABLES_H 31 | 32 | #include "arm_nn_math_types.h" 33 | 34 | /** 35 | * @brief tables for various activation functions 36 | * 37 | */ 38 | 39 | extern const q15_t sigmoidTable_q15[256]; 40 | extern const q7_t sigmoidTable_q7[256]; 41 | 42 | extern const q7_t tanhTable_q7[256]; 43 | extern const q15_t tanhTable_q15[256]; 44 | 45 | /** 46 | * @brief 2-way tables for various activation functions 47 | * 48 | * 2-way table, H table for value larger than 1/4 49 | * L table for value smaller than 1/4, H table for remaining 50 | * We have this only for the q15_t version. It does not make 51 | * sense to have it for q7_t type 52 | */ 53 | extern const q15_t sigmoidHTable_q15[192]; 54 | extern const q15_t sigmoidLTable_q15[128]; 55 | 56 | #endif /* ARM_NN_TABLES_H */ 57 | -------------------------------------------------------------------------------- /DSP/Source/DistanceFunctions/arm_euclidean_distance_f64.c: -------------------------------------------------------------------------------- 1 | 2 | /* ---------------------------------------------------------------------- 3 | * Project: CMSIS DSP Library 4 | * Title: arm_euclidean_distance_f64.c 5 | * Description: Euclidean distance between two vectors 6 | * 7 | * $Date: 13 September 2021 8 | * $Revision: V1.10.0 9 | * 10 | * Target Processor: Cortex-M and Cortex-A cores 11 | * -------------------------------------------------------------------- */ 12 | /* 13 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 14 | * 15 | * SPDX-License-Identifier: Apache-2.0 16 | * 17 | * Licensed under the Apache License, Version 2.0 (the License); you may 18 | * not use this file except in compliance with the License. 19 | * You may obtain a copy of the License at 20 | * 21 | * www.apache.org/licenses/LICENSE-2.0 22 | * 23 | * Unless required by applicable law or agreed to in writing, software 24 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 25 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 26 | * See the License for the specific language governing permissions and 27 | * limitations under the License. 28 | */ 29 | 30 | #include "dsp/distance_functions.h" 31 | #include 32 | #include 33 | 34 | 35 | 36 | /** 37 | @addtogroup Euclidean 38 | @{ 39 | */ 40 | 41 | 42 | /** 43 | * @brief Euclidean distance between two vectors 44 | * @param[in] pA First vector 45 | * @param[in] pB Second vector 46 | * @param[in] blockSize vector length 47 | * @return distance 48 | * 49 | */ 50 | float64_t arm_euclidean_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize) 51 | { 52 | float64_t accum=0.,tmp; 53 | 54 | while(blockSize > 0) 55 | { 56 | tmp = *pA++ - *pB++; 57 | accum += SQ(tmp); 58 | blockSize --; 59 | } 60 | tmp = sqrt(accum); 61 | return(tmp); 62 | } 63 | 64 | /** 65 | * @} end of Euclidean group 66 | */ 67 | -------------------------------------------------------------------------------- /DSP/Source/StatisticsFunctions/arm_entropy_f64.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_logsumexp_f64.c 4 | * Description: LogSumExp 5 | * 6 | * $Date: 23 April 2021 7 | * $Revision: V1.9.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/statistics_functions.h" 30 | #include 31 | #include 32 | 33 | /** 34 | * @addtogroup Entropy 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @brief Entropy 40 | * 41 | * @param[in] pSrcA Array of input values. 42 | * @param[in] blockSize Number of samples in the input array. 43 | * @return Entropy -Sum(p ln p) 44 | * 45 | */ 46 | 47 | float64_t arm_entropy_f64(const float64_t * pSrcA, uint32_t blockSize) 48 | { 49 | const float64_t *pIn; 50 | uint32_t blkCnt; 51 | float64_t accum, p; 52 | 53 | pIn = pSrcA; 54 | blkCnt = blockSize; 55 | 56 | accum = 0.0; 57 | 58 | while(blkCnt > 0) 59 | { 60 | p = *pIn++; 61 | 62 | accum += p * log(p); 63 | 64 | blkCnt--; 65 | 66 | } 67 | 68 | return(-accum); 69 | } 70 | 71 | /** 72 | * @} end of Entropy group 73 | */ 74 | -------------------------------------------------------------------------------- /DSP/Include/arm_math_f16.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file arm_math_f16.h 3 | * @brief Public header file for f16 function of the CMSIS DSP Library 4 | * @version V1.10.0 5 | * @date 08 July 2021 6 | * Target Processor: Cortex-M and Cortex-A cores 7 | ******************************************************************************/ 8 | /* 9 | * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved. 10 | * 11 | * SPDX-License-Identifier: Apache-2.0 12 | * 13 | * Licensed under the Apache License, Version 2.0 (the License); you may 14 | * not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at 16 | * 17 | * www.apache.org/licenses/LICENSE-2.0 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 21 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | */ 25 | 26 | #ifndef _ARM_MATH_F16_H 27 | #define _ARM_MATH_F16_H 28 | 29 | #include "arm_math.h" 30 | 31 | #ifdef __cplusplus 32 | extern "C" 33 | { 34 | #endif 35 | 36 | #include "arm_math_types_f16.h" 37 | #include "dsp/none.h" 38 | #include "dsp/utils.h" 39 | #include "dsp/basic_math_functions_f16.h" 40 | #include "dsp/interpolation_functions_f16.h" 41 | #include "dsp/bayes_functions_f16.h" 42 | #include "dsp/matrix_functions_f16.h" 43 | #include "dsp/complex_math_functions_f16.h" 44 | #include "dsp/statistics_functions_f16.h" 45 | #include "dsp/controller_functions_f16.h" 46 | #include "dsp/support_functions_f16.h" 47 | #include "dsp/distance_functions_f16.h" 48 | #include "dsp/svm_functions_f16.h" 49 | #include "dsp/fast_math_functions_f16.h" 50 | #include "dsp/transform_functions_f16.h" 51 | #include "dsp/filtering_functions_f16.h" 52 | 53 | #ifdef __cplusplus 54 | } 55 | #endif 56 | 57 | #endif /* _ARM_MATH_F16_H */ 58 | 59 | 60 | -------------------------------------------------------------------------------- /Core/Template/ARMv8-M/main_s.c: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file main_s.c 3 | * @brief Code template for secure main function 4 | * @version V1.1.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2013-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | /* Use CMSE intrinsics */ 26 | #include 27 | 28 | #include "RTE_Components.h" 29 | #include CMSIS_device_header 30 | 31 | /* TZ_START_NS: Start address of non-secure application */ 32 | #ifndef TZ_START_NS 33 | #define TZ_START_NS (0x200000U) 34 | #endif 35 | 36 | /* typedef for non-secure callback functions */ 37 | typedef void (*funcptr_void) (void) __attribute__((cmse_nonsecure_call)); 38 | 39 | /* Secure main() */ 40 | int main(void) { 41 | funcptr_void NonSecure_ResetHandler; 42 | 43 | /* Add user setup code for secure part here*/ 44 | 45 | /* Set non-secure main stack (MSP_NS) */ 46 | __TZ_set_MSP_NS(*((uint32_t *)(TZ_START_NS))); 47 | 48 | /* Get non-secure reset handler */ 49 | NonSecure_ResetHandler = (funcptr_void)(*((uint32_t *)((TZ_START_NS) + 4U))); 50 | 51 | /* Start non-secure state software application */ 52 | NonSecure_ResetHandler(); 53 | 54 | /* Non-secure software does not return, this code is not executed */ 55 | while (1) { 56 | __NOP(); 57 | } 58 | } 59 | -------------------------------------------------------------------------------- /DSP/Source/DistanceFunctions/arm_cityblock_distance_f64.c: -------------------------------------------------------------------------------- 1 | 2 | /* ---------------------------------------------------------------------- 3 | * Project: CMSIS DSP Library 4 | * Title: arm_cityblock_distance_f64.c 5 | * Description: Cityblock (Manhattan) distance between two vectors 6 | * 7 | * $Date: 13 September 2021 8 | * $Revision: V1.10.0 9 | * 10 | * Target Processor: Cortex-M and Cortex-A cores 11 | * -------------------------------------------------------------------- */ 12 | /* 13 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 14 | * 15 | * SPDX-License-Identifier: Apache-2.0 16 | * 17 | * Licensed under the Apache License, Version 2.0 (the License); you may 18 | * not use this file except in compliance with the License. 19 | * You may obtain a copy of the License at 20 | * 21 | * www.apache.org/licenses/LICENSE-2.0 22 | * 23 | * Unless required by applicable law or agreed to in writing, software 24 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 25 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 26 | * See the License for the specific language governing permissions and 27 | * limitations under the License. 28 | */ 29 | 30 | #include "dsp/distance_functions.h" 31 | #include 32 | #include 33 | 34 | /** 35 | @addtogroup Manhattan 36 | @{ 37 | */ 38 | 39 | 40 | /** 41 | * @brief Cityblock (Manhattan) distance between two vectors 42 | * @param[in] pA First vector 43 | * @param[in] pB Second vector 44 | * @param[in] blockSize vector length 45 | * @return distance 46 | * 47 | */ 48 | float64_t arm_cityblock_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize) 49 | { 50 | float64_t accum,tmpA, tmpB; 51 | 52 | accum = 0.; 53 | while(blockSize > 0) 54 | { 55 | tmpA = *pA++; 56 | tmpB = *pB++; 57 | accum += fabs(tmpA - tmpB); 58 | 59 | blockSize --; 60 | } 61 | 62 | return(accum); 63 | } 64 | 65 | /** 66 | * @} end of Manhattan group 67 | */ 68 | -------------------------------------------------------------------------------- /DSP/Source/DistanceFunctions/arm_cosine_distance_f64.c: -------------------------------------------------------------------------------- 1 | 2 | /* ---------------------------------------------------------------------- 3 | * Project: CMSIS DSP Library 4 | * Title: arm_cosine_distance_f64.c 5 | * Description: Cosine distance between two vectors 6 | * 7 | * $Date: 13 September 2021 8 | * $Revision: V1.10.0 9 | * 10 | * Target Processor: Cortex-M and Cortex-A cores 11 | * -------------------------------------------------------------------- */ 12 | /* 13 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 14 | * 15 | * SPDX-License-Identifier: Apache-2.0 16 | * 17 | * Licensed under the Apache License, Version 2.0 (the License); you may 18 | * not use this file except in compliance with the License. 19 | * You may obtain a copy of the License at 20 | * 21 | * www.apache.org/licenses/LICENSE-2.0 22 | * 23 | * Unless required by applicable law or agreed to in writing, software 24 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 25 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 26 | * See the License for the specific language governing permissions and 27 | * limitations under the License. 28 | */ 29 | 30 | #include "dsp/distance_functions.h" 31 | #include 32 | #include 33 | 34 | 35 | /** 36 | @addtogroup CosineDist 37 | @{ 38 | */ 39 | 40 | 41 | 42 | /** 43 | * @brief Cosine distance between two vectors 44 | * 45 | * @param[in] pA First vector 46 | * @param[in] pB Second vector 47 | * @param[in] blockSize vector length 48 | * @return distance 49 | * 50 | */ 51 | 52 | float64_t arm_cosine_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize) 53 | { 54 | float64_t pwra,pwrb,dot,tmp; 55 | 56 | arm_power_f64(pA, blockSize, &pwra); 57 | arm_power_f64(pB, blockSize, &pwrb); 58 | 59 | arm_dot_prod_f64(pA,pB,blockSize,&dot); 60 | 61 | tmp = sqrt(pwra * pwrb); 62 | return(1. - dot / tmp); 63 | 64 | } 65 | 66 | 67 | 68 | /** 69 | * @} end of CosineDist group 70 | */ 71 | -------------------------------------------------------------------------------- /DSP/Source/StatisticsFunctions/arm_std_f16.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_std_f16.c 4 | * Description: Standard deviation of the elements of a floating-point vector 5 | * 6 | * $Date: 23 April 2021 7 | * $Revision: V1.9.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/statistics_functions_f16.h" 30 | 31 | #if defined(ARM_FLOAT16_SUPPORTED) 32 | 33 | 34 | /** 35 | @ingroup groupStats 36 | */ 37 | 38 | 39 | 40 | /** 41 | @addtogroup STD 42 | @{ 43 | */ 44 | 45 | /** 46 | @brief Standard deviation of the elements of a floating-point vector. 47 | @param[in] pSrc points to the input vector 48 | @param[in] blockSize number of samples in input vector 49 | @param[out] pResult standard deviation value returned here 50 | @return none 51 | */ 52 | void arm_std_f16( 53 | const float16_t * pSrc, 54 | uint32_t blockSize, 55 | float16_t * pResult) 56 | { 57 | float16_t var; 58 | arm_var_f16(pSrc,blockSize,&var); 59 | arm_sqrt_f16(var, pResult); 60 | } 61 | 62 | /** 63 | @} end of STD group 64 | */ 65 | 66 | #endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 67 | 68 | -------------------------------------------------------------------------------- /DSP/Source/DistanceFunctions/arm_boolean_distance.c: -------------------------------------------------------------------------------- 1 | 2 | /* ---------------------------------------------------------------------- 3 | * Project: CMSIS DSP Library 4 | * Title: arm_svm_linear_init_f32.c 5 | * Description: SVM Linear Instance Initialization 6 | * 7 | * $Date: 23 April 2021 8 | * $Revision: V1.9.0 9 | * 10 | * Target Processor: Cortex-M and Cortex-A cores 11 | * -------------------------------------------------------------------- */ 12 | /* 13 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 14 | * 15 | * SPDX-License-Identifier: Apache-2.0 16 | * 17 | * Licensed under the Apache License, Version 2.0 (the License); you may 18 | * not use this file except in compliance with the License. 19 | * You may obtain a copy of the License at 20 | * 21 | * www.apache.org/licenses/LICENSE-2.0 22 | * 23 | * Unless required by applicable law or agreed to in writing, software 24 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 25 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 26 | * See the License for the specific language governing permissions and 27 | * limitations under the License. 28 | */ 29 | 30 | #include "dsp/distance_functions.h" 31 | #include 32 | #include 33 | 34 | 35 | 36 | 37 | #if defined(ARM_MATH_NEON) 38 | 39 | #include "NEMath.h" 40 | 41 | #endif 42 | 43 | 44 | #define TT 45 | #define TF 46 | #define FT 47 | #define EXT _TT_TF_FT 48 | #include "arm_boolean_distance_template.h" 49 | 50 | #undef TT 51 | #undef FF 52 | #undef TF 53 | #undef FT 54 | #undef EXT 55 | #define TF 56 | #define FT 57 | #define EXT _TF_FT 58 | #include "arm_boolean_distance_template.h" 59 | 60 | #undef TT 61 | #undef FF 62 | #undef TF 63 | #undef FT 64 | #undef EXT 65 | #define TT 66 | #define FF 67 | #define TF 68 | #define FT 69 | #define EXT _TT_FF_TF_FT 70 | #include "arm_boolean_distance_template.h" 71 | 72 | #undef TT 73 | #undef FF 74 | #undef TF 75 | #undef FT 76 | #undef EXT 77 | #define TT 78 | #define EXT _TT 79 | #include "arm_boolean_distance_template.h" 80 | 81 | -------------------------------------------------------------------------------- /DSP/Source/interpol.cmake: -------------------------------------------------------------------------------- 1 | function(interpol PROJECT) 2 | 3 | if (CONFIGTABLE AND ARM_SQRT_Q31) 4 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SQRT_Q31) 5 | endif() 6 | 7 | if (CONFIGTABLE AND ARM_SQRT_Q15) 8 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SQRT_Q15) 9 | endif() 10 | 11 | if (CONFIGTABLE AND ARM_COS_F32) 12 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_F32) 13 | endif() 14 | 15 | if (CONFIGTABLE AND ARM_COS_Q31) 16 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q31) 17 | endif() 18 | 19 | if (CONFIGTABLE AND ARM_COS_Q15) 20 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q15) 21 | endif() 22 | 23 | if (CONFIGTABLE AND ARM_SIN_F32) 24 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_F32) 25 | endif() 26 | 27 | if (CONFIGTABLE AND ARM_SIN_Q31) 28 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q31) 29 | endif() 30 | 31 | if (CONFIGTABLE AND ARM_SIN_Q15) 32 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q15) 33 | endif() 34 | 35 | if (CONFIGTABLE AND ARM_SIN_COS_F32) 36 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_F32) 37 | endif() 38 | 39 | if (CONFIGTABLE AND ARM_SIN_COS_Q31) 40 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q31) 41 | endif() 42 | 43 | if (CONFIGTABLE AND ARM_LMS_NORM_Q31) 44 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_RECIP_Q31) 45 | endif() 46 | 47 | if (CONFIGTABLE AND ARM_LMS_NORM_Q15) 48 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_RECIP_Q15) 49 | endif() 50 | 51 | if (CONFIGTABLE AND ARM_CMPLX_MAG_Q31 AND (MVEI OR HELIUM)) 52 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_FAST_SQRT_Q31_MVE) 53 | endif() 54 | 55 | if (CONFIGTABLE AND ARM_CMPLX_MAG_Q15 AND (MVEI OR HELIUM)) 56 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_FAST_SQRT_Q31_MVE) 57 | endif() 58 | 59 | if (CONFIGTABLE AND ARM_CMPLX_MAG_FAST_Q15 AND (MVEI OR HELIUM)) 60 | target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_FAST_SQRT_Q15_MVE) 61 | endif() 62 | 63 | endfunction() -------------------------------------------------------------------------------- /DSP/Source/MatrixFunctions/arm_mat_init_q15.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_mat_init_q15.c 4 | * Description: Q15 matrix initialization 5 | * 6 | * $Date: 23 April 2021 7 | * $Revision: V1.9.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/matrix_functions.h" 30 | 31 | /** 32 | @ingroup groupMatrix 33 | */ 34 | 35 | /** 36 | @addtogroup MatrixInit 37 | @{ 38 | */ 39 | 40 | /** 41 | @brief Q15 matrix initialization. 42 | @param[in,out] S points to an instance of the floating-point matrix structure 43 | @param[in] nRows number of rows in the matrix 44 | @param[in] nColumns number of columns in the matrix 45 | @param[in] pData points to the matrix data array 46 | @return none 47 | */ 48 | 49 | void arm_mat_init_q15( 50 | arm_matrix_instance_q15 * S, 51 | uint16_t nRows, 52 | uint16_t nColumns, 53 | q15_t * pData) 54 | { 55 | /* Assign Number of Rows */ 56 | S->numRows = nRows; 57 | 58 | /* Assign Number of Columns */ 59 | S->numCols = nColumns; 60 | 61 | /* Assign Data pointer */ 62 | S->pData = pData; 63 | } 64 | 65 | /** 66 | @} end of MatrixInit group 67 | */ 68 | -------------------------------------------------------------------------------- /DSP/Source/DistanceFunctions/DistanceFunctions.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: BayesFunctions.c 4 | * Description: Combination of all distance function source files. 5 | * 6 | * $Date: 16. March 2020 7 | * $Revision: V1.0.0 8 | * 9 | * Target Processor: Cortex-M cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "arm_boolean_distance.c" 30 | #include "arm_braycurtis_distance_f32.c" 31 | #include "arm_canberra_distance_f32.c" 32 | #include "arm_chebyshev_distance_f32.c" 33 | #include "arm_chebyshev_distance_f64.c" 34 | #include "arm_cityblock_distance_f32.c" 35 | #include "arm_cityblock_distance_f64.c" 36 | #include "arm_correlation_distance_f32.c" 37 | #include "arm_cosine_distance_f32.c" 38 | #include "arm_cosine_distance_f64.c" 39 | #include "arm_dice_distance.c" 40 | #include "arm_euclidean_distance_f32.c" 41 | #include "arm_euclidean_distance_f64.c" 42 | #include "arm_hamming_distance.c" 43 | #include "arm_jaccard_distance.c" 44 | #include "arm_jensenshannon_distance_f32.c" 45 | #include "arm_kulsinski_distance.c" 46 | #include "arm_minkowski_distance_f32.c" 47 | #include "arm_rogerstanimoto_distance.c" 48 | #include "arm_russellrao_distance.c" 49 | #include "arm_sokalmichener_distance.c" 50 | #include "arm_sokalsneath_distance.c" 51 | #include "arm_yule_distance.c" 52 | -------------------------------------------------------------------------------- /DSP/Source/MatrixFunctions/arm_mat_init_q31.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_mat_init_q31.c 4 | * Description: Q31 matrix initialization 5 | * 6 | * $Date: 23 April 2021 7 | * $Revision: V1.9.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/matrix_functions.h" 30 | 31 | /** 32 | @ingroup groupMatrix 33 | */ 34 | 35 | /** 36 | @defgroup MatrixInit Matrix Initialization 37 | 38 | */ 39 | 40 | /** 41 | @addtogroup MatrixInit 42 | @{ 43 | */ 44 | 45 | /** 46 | @brief Q31 matrix initialization. 47 | @param[in,out] S points to an instance of the Q31 matrix structure 48 | @param[in] nRows number of rows in the matrix 49 | @param[in] nColumns number of columns in the matrix 50 | @param[in] pData points to the matrix data array 51 | @return none 52 | */ 53 | 54 | void arm_mat_init_q31( 55 | arm_matrix_instance_q31 * S, 56 | uint16_t nRows, 57 | uint16_t nColumns, 58 | q31_t * pData) 59 | { 60 | /* Assign Number of Rows */ 61 | S->numRows = nRows; 62 | 63 | /* Assign Number of Columns */ 64 | S->numCols = nColumns; 65 | 66 | /* Assign Data pointer */ 67 | S->pData = pData; 68 | } 69 | 70 | /** 71 | @} end of MatrixInit group 72 | */ 73 | -------------------------------------------------------------------------------- /NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2010-2021 Arm Limited or its affiliates. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * Licensed under the Apache License, Version 2.0 (the License); you may 7 | * not use this file except in compliance with the License. 8 | * You may obtain a copy of the License at 9 | * 10 | * www.apache.org/licenses/LICENSE-2.0 11 | * 12 | * Unless required by applicable law or agreed to in writing, software 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | * See the License for the specific language governing permissions and 16 | * limitations under the License. 17 | */ 18 | 19 | /* ---------------------------------------------------------------------- 20 | * Project: CMSIS NN Library 21 | * Title: arm_concatenation_s8_w.c 22 | * Description: s8 version of concatenation along the W axis 23 | * 24 | * $Date: October 2019 25 | * $Revision: V.1.0.0 26 | * 27 | * Target Processor: Cortex-M cores 28 | * 29 | * -------------------------------------------------------------------- */ 30 | 31 | #include "arm_nnfunctions.h" 32 | #include "arm_nnsupportfunctions.h" 33 | 34 | /** 35 | * @ingroup groupNN 36 | */ 37 | 38 | /** 39 | * @addtogroup Concatenation 40 | * @{ 41 | */ 42 | 43 | /* 44 | * s8 version of concatenation along the W axis 45 | * 46 | * Refer to header file for details. 47 | * 48 | */ 49 | void arm_concatenation_s8_w(const int8_t *input, 50 | const uint16_t input_x, 51 | const uint16_t input_y, 52 | const uint16_t input_z, 53 | const uint16_t input_w, 54 | int8_t *output, 55 | const uint32_t offset_w) 56 | { 57 | const uint32_t input_copy_size = input_x * input_y * input_z * input_w; 58 | 59 | output += offset_w * (input_x * input_y * input_z); 60 | 61 | arm_memcpy_q7(output, input, input_copy_size); 62 | } 63 | 64 | /** 65 | * @} end of Concatenation group 66 | */ 67 | -------------------------------------------------------------------------------- /DSP/Source/SupportFunctions/arm_fill_f64.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_fill_f64.c 4 | * Description: Fills a constant value into a floating-point vector 5 | * 6 | * $Date: 13 September 2021 7 | * $Revision: V1.10.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/support_functions.h" 30 | 31 | /** 32 | @ingroup groupSupport 33 | */ 34 | 35 | /** 36 | @addtogroup Fill 37 | @{ 38 | */ 39 | 40 | /** 41 | @brief Fills a constant value into a floating-point vector. 42 | @param[in] value input value to be filled 43 | @param[out] pDst points to output vector 44 | @param[in] blockSize number of samples in each vector 45 | @return none 46 | */ 47 | void arm_fill_f64( 48 | float64_t value, 49 | float64_t * pDst, 50 | uint32_t blockSize) 51 | { 52 | uint32_t blkCnt; /* Loop counter */ 53 | 54 | /* Initialize blkCnt with number of samples */ 55 | blkCnt = blockSize; 56 | 57 | while (blkCnt > 0U) 58 | { 59 | /* C = value */ 60 | 61 | /* Fill value in destination buffer */ 62 | *pDst++ = value; 63 | 64 | /* Decrement loop counter */ 65 | blkCnt--; 66 | } 67 | } 68 | 69 | /** 70 | @} end of Fill group 71 | */ 72 | -------------------------------------------------------------------------------- /DSP/Source/DistanceFunctions/arm_cosine_distance_f32.c: -------------------------------------------------------------------------------- 1 | 2 | /* ---------------------------------------------------------------------- 3 | * Project: CMSIS DSP Library 4 | * Title: arm_cosine_distance_f32.c 5 | * Description: Cosine distance between two vectors 6 | * 7 | * $Date: 23 April 2021 8 | * $Revision: V1.9.0 9 | * 10 | * Target Processor: Cortex-M and Cortex-A cores 11 | * -------------------------------------------------------------------- */ 12 | /* 13 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 14 | * 15 | * SPDX-License-Identifier: Apache-2.0 16 | * 17 | * Licensed under the Apache License, Version 2.0 (the License); you may 18 | * not use this file except in compliance with the License. 19 | * You may obtain a copy of the License at 20 | * 21 | * www.apache.org/licenses/LICENSE-2.0 22 | * 23 | * Unless required by applicable law or agreed to in writing, software 24 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 25 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 26 | * See the License for the specific language governing permissions and 27 | * limitations under the License. 28 | */ 29 | 30 | #include "dsp/distance_functions.h" 31 | #include 32 | #include 33 | 34 | 35 | /** 36 | @addtogroup CosineDist 37 | @{ 38 | */ 39 | 40 | 41 | 42 | /** 43 | * @brief Cosine distance between two vectors 44 | * 45 | * @param[in] pA First vector 46 | * @param[in] pB Second vector 47 | * @param[in] blockSize vector length 48 | * @return distance 49 | * 50 | * @par Description 51 | * cosine_distance(u,v) is 1 - u . v / (Norm(u) Norm(v)) 52 | */ 53 | 54 | float32_t arm_cosine_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize) 55 | { 56 | float32_t pwra,pwrb,dot,tmp; 57 | 58 | arm_power_f32(pA, blockSize, &pwra); 59 | arm_power_f32(pB, blockSize, &pwrb); 60 | 61 | arm_dot_prod_f32(pA,pB,blockSize,&dot); 62 | 63 | arm_sqrt_f32(pwra * pwrb, &tmp); 64 | return(1.0f - dot / tmp); 65 | 66 | } 67 | 68 | 69 | 70 | /** 71 | * @} end of CosineDist group 72 | */ 73 | -------------------------------------------------------------------------------- /DSP/Source/SupportFunctions/arm_copy_f64.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_copy_f64.c 4 | * Description: Copies the elements of a floating-point vector 5 | * 6 | * $Date: 13 September 2021 7 | * $Revision: V1.10.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/support_functions.h" 30 | 31 | /** 32 | @ingroup groupSupport 33 | */ 34 | 35 | /** 36 | @addtogroup copy 37 | @{ 38 | */ 39 | 40 | /** 41 | @brief Copies the elements of a floating-point vector. 42 | @param[in] pSrc points to input vector 43 | @param[out] pDst points to output vector 44 | @param[in] blockSize number of samples in each vector 45 | @return none 46 | */ 47 | void arm_copy_f64( 48 | const float64_t * pSrc, 49 | float64_t * pDst, 50 | uint32_t blockSize) 51 | { 52 | uint32_t blkCnt; /* Loop counter */ 53 | 54 | /* Initialize blkCnt with number of samples */ 55 | blkCnt = blockSize; 56 | 57 | while (blkCnt > 0U) 58 | { 59 | /* C = A */ 60 | 61 | /* Copy and store result in destination buffer */ 62 | *pDst++ = *pSrc++; 63 | 64 | /* Decrement loop counter */ 65 | blkCnt--; 66 | } 67 | } 68 | 69 | /** 70 | @} end of BasicCopy group 71 | */ 72 | -------------------------------------------------------------------------------- /DSP/Source/BasicMathFunctions/arm_negate_f64.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_negate_f64.c 4 | * Description: Negates floating-point vectors 5 | * 6 | * $Date: 13 September 2021 7 | * $Revision: V1.10.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/basic_math_functions.h" 30 | 31 | /** 32 | @ingroup groupMath 33 | */ 34 | 35 | /** 36 | @addtogroup BasicNegate 37 | @{ 38 | */ 39 | 40 | /** 41 | @brief Negates the elements of a floating-point vector. 42 | @param[in] pSrc points to input vector. 43 | @param[out] pDst points to output vector. 44 | @param[in] blockSize number of samples in each vector. 45 | @return none 46 | */ 47 | 48 | void arm_negate_f64( 49 | const float64_t * pSrc, 50 | float64_t * pDst, 51 | uint32_t blockSize) 52 | { 53 | uint32_t blkCnt; /* Loop counter */ 54 | 55 | /* Initialize blkCnt with number of samples */ 56 | blkCnt = blockSize; 57 | 58 | while (blkCnt > 0U) 59 | { 60 | /* C = -A */ 61 | 62 | /* Negate and store result in destination buffer. */ 63 | *pDst++ = -*pSrc++; 64 | 65 | /* Decrement loop counter */ 66 | blkCnt--; 67 | } 68 | 69 | } 70 | 71 | /** 72 | @} end of BasicNegate group 73 | */ 74 | -------------------------------------------------------------------------------- /DSP/Source/DistanceFunctions/arm_hamming_distance.c: -------------------------------------------------------------------------------- 1 | 2 | /* ---------------------------------------------------------------------- 3 | * Project: CMSIS DSP Library 4 | * Title: arm_hamming_distance.c 5 | * Description: Hamming distance between two vectors 6 | * 7 | * $Date: 23 April 2021 8 | * $Revision: V1.9.0 9 | * 10 | * Target Processor: Cortex-M and Cortex-A cores 11 | * -------------------------------------------------------------------- */ 12 | /* 13 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 14 | * 15 | * SPDX-License-Identifier: Apache-2.0 16 | * 17 | * Licensed under the Apache License, Version 2.0 (the License); you may 18 | * not use this file except in compliance with the License. 19 | * You may obtain a copy of the License at 20 | * 21 | * www.apache.org/licenses/LICENSE-2.0 22 | * 23 | * Unless required by applicable law or agreed to in writing, software 24 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 25 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 26 | * See the License for the specific language governing permissions and 27 | * limitations under the License. 28 | */ 29 | 30 | #include "dsp/distance_functions.h" 31 | #include 32 | #include 33 | 34 | 35 | extern void arm_boolean_distance_TF_FT(const uint32_t *pA 36 | , const uint32_t *pB 37 | , uint32_t numberOfBools 38 | , uint32_t *cTF 39 | , uint32_t *cFT 40 | ); 41 | 42 | /** 43 | @addtogroup BoolDist 44 | @{ 45 | */ 46 | 47 | 48 | /** 49 | * @brief Hamming distance between two vectors 50 | * 51 | * @param[in] pA First vector of packed booleans 52 | * @param[in] pB Second vector of packed booleans 53 | * @param[in] numberOfBools Number of booleans 54 | * @return distance 55 | * 56 | */ 57 | 58 | float32_t arm_hamming_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools) 59 | { 60 | uint32_t ctf=0,cft=0; 61 | 62 | arm_boolean_distance_TF_FT(pA, pB, numberOfBools, &ctf, &cft); 63 | 64 | return(1.0*(ctf + cft) / numberOfBools); 65 | } 66 | 67 | 68 | /** 69 | * @} end of BoolDist group 70 | */ 71 | -------------------------------------------------------------------------------- /DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Project: CMSIS DSP Library 3 | * Title: arm_logsumexp_f32.c 4 | * Description: LogSumExp 5 | * 6 | * $Date: 23 April 2021 7 | * $Revision: V1.9.0 8 | * 9 | * Target Processor: Cortex-M and Cortex-A cores 10 | * -------------------------------------------------------------------- */ 11 | /* 12 | * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved. 13 | * 14 | * SPDX-License-Identifier: Apache-2.0 15 | * 16 | * Licensed under the Apache License, Version 2.0 (the License); you may 17 | * not use this file except in compliance with the License. 18 | * You may obtain a copy of the License at 19 | * 20 | * www.apache.org/licenses/LICENSE-2.0 21 | * 22 | * Unless required by applicable law or agreed to in writing, software 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 | * See the License for the specific language governing permissions and 26 | * limitations under the License. 27 | */ 28 | 29 | #include "dsp/statistics_functions.h" 30 | #include 31 | #include 32 | 33 | 34 | /** 35 | * @addtogroup LogSumExp 36 | * @{ 37 | */ 38 | 39 | 40 | /** 41 | * @brief Dot product with log arithmetic 42 | * 43 | * Vectors are containing the log of the samples 44 | * 45 | * @param[in] *pSrcA points to the first input vector 46 | * @param[in] *pSrcB points to the second input vector 47 | * @param[in] blockSize number of samples in each vector 48 | * @param[in] *pTmpBuffer temporary buffer of length blockSize 49 | * @return The log of the dot product. 50 | * 51 | */ 52 | 53 | 54 | float32_t arm_logsumexp_dot_prod_f32(const float32_t * pSrcA, 55 | const float32_t * pSrcB, 56 | uint32_t blockSize, 57 | float32_t *pTmpBuffer) 58 | { 59 | float32_t result; 60 | arm_add_f32((float32_t*)pSrcA, (float32_t*)pSrcB, pTmpBuffer, blockSize); 61 | 62 | result = arm_logsumexp_f32(pTmpBuffer, blockSize); 63 | return(result); 64 | } 65 | 66 | /** 67 | * @} end of LogSumExp group 68 | */ 69 | --------------------------------------------------------------------------------