├── .github ├── ISSUE_TEMPLATE │ ├── bug_report.md │ └── other-issue.md └── PULL_REQUEST_TEMPLATE.md ├── CODE_OF_CONDUCT.md ├── CONTRIBUTING.md ├── Include ├── stm32f100xb.h ├── stm32f100xe.h ├── stm32f101x6.h ├── stm32f101xb.h ├── stm32f101xe.h ├── stm32f101xg.h ├── stm32f102x6.h ├── stm32f102xb.h ├── stm32f103x6.h ├── stm32f103xb.h ├── stm32f103xe.h ├── stm32f103xg.h ├── stm32f105xc.h ├── stm32f107xc.h ├── stm32f1xx.h └── system_stm32f1xx.h ├── License.md ├── README.md ├── Release_Notes.html ├── SECURITY.md ├── Source └── Templates │ ├── arm │ ├── startup_stm32f100xb.s │ ├── startup_stm32f100xe.s │ ├── startup_stm32f101x6.s │ ├── startup_stm32f101xb.s │ ├── startup_stm32f101xe.s │ ├── startup_stm32f101xg.s │ ├── startup_stm32f102x6.s │ ├── startup_stm32f102xb.s │ ├── startup_stm32f103x6.s │ ├── startup_stm32f103xb.s │ ├── startup_stm32f103xe.s │ ├── startup_stm32f103xg.s │ ├── startup_stm32f105xc.s │ └── startup_stm32f107xc.s │ ├── gcc │ ├── linker │ │ ├── STM32F100XB_FLASH.ld │ │ ├── STM32F100XE_FLASH.ld │ │ ├── STM32F101X6_FLASH.ld │ │ ├── STM32F101XB_FLASH.ld │ │ ├── STM32F101XE_FLASH.ld │ │ ├── STM32F101XG_FLASH.ld │ │ ├── STM32F102X6_FLASH.ld │ │ ├── STM32F102XB_FLASH.ld │ │ ├── STM32F103X6_FLASH.ld │ │ ├── STM32F103XB_FLASH.ld │ │ ├── STM32F103XE_FLASH.ld │ │ ├── STM32F103XG_FLASH.ld │ │ ├── STM32F105XC_FLASH.ld │ │ └── STM32F107XC_FLASH.ld │ ├── startup_stm32f100xb.s │ ├── startup_stm32f100xe.s │ ├── startup_stm32f101x6.s │ ├── startup_stm32f101xb.s │ ├── startup_stm32f101xe.s │ ├── startup_stm32f101xg.s │ ├── startup_stm32f102x6.s │ ├── startup_stm32f102xb.s │ ├── startup_stm32f103x6.s │ ├── startup_stm32f103xb.s │ ├── startup_stm32f103xe.s │ ├── startup_stm32f103xg.s │ ├── startup_stm32f105xc.s │ └── startup_stm32f107xc.s │ ├── iar │ ├── linker │ │ ├── stm32f100xb_flash.icf │ │ ├── stm32f100xb_sram.icf │ │ ├── stm32f100xe_flash.icf │ │ ├── stm32f100xe_sram.icf │ │ ├── stm32f101x6_flash.icf │ │ ├── stm32f101x6_sram.icf │ │ ├── stm32f101xb_flash.icf │ │ ├── stm32f101xb_sram.icf │ │ ├── stm32f101xe_flash.icf │ │ ├── stm32f101xe_sram.icf │ │ ├── stm32f101xg_flash.icf │ │ ├── stm32f101xg_sram.icf │ │ ├── stm32f102x6_flash.icf │ │ ├── stm32f102x6_sram.icf │ │ ├── stm32f102xb_flash.icf │ │ ├── stm32f102xb_sram.icf │ │ ├── stm32f103x6_flash.icf │ │ ├── stm32f103x6_sram.icf │ │ ├── stm32f103xb_flash.icf │ │ ├── stm32f103xb_sram.icf │ │ ├── stm32f103xe_flash.icf │ │ ├── stm32f103xe_sram.icf │ │ ├── stm32f103xg_flash.icf │ │ ├── stm32f103xg_sram.icf │ │ ├── stm32f105xc_flash.icf │ │ ├── stm32f105xc_sram.icf │ │ ├── stm32f107xc_flash.icf │ │ └── stm32f107xc_sram.icf │ ├── startup_stm32f100xb.s │ ├── startup_stm32f100xe.s │ ├── startup_stm32f101x6.s │ ├── startup_stm32f101xb.s │ ├── startup_stm32f101xe.s │ ├── startup_stm32f101xg.s │ ├── startup_stm32f102x6.s │ ├── startup_stm32f102xb.s │ ├── startup_stm32f103x6.s │ ├── startup_stm32f103xb.s │ ├── startup_stm32f103xe.s │ ├── startup_stm32f103xg.s │ ├── startup_stm32f105xc.s │ └── startup_stm32f107xc.s │ └── system_stm32f1xx.c └── _htmresc ├── favicon.png ├── mini-st_2020.css └── st_logo_2020.png /.github/ISSUE_TEMPLATE/bug_report.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: Bug report 3 | about: Create a report to help us improve 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | 8 | --- 9 | 10 | **Caution** 11 | The Issues are strictly limited for the reporting of problem encountered with the software provided in this project. 12 | For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post a topic in the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus). 13 | 14 | **Describe the set-up** 15 | * The board (either ST RPN reference or your custom board) 16 | * IDE or at least the compiler and its version 17 | 18 | **Describe the bug** 19 | A clear and concise description of what the bug is. 20 | 21 | **How To Reproduce** 22 | 1. Indicate the global behavior of your application project 23 | 24 | 2. The modules that you suspect to be the cause of the problem (Driver, BSP, MW ...) 25 | 26 | 3. The use case that generates the problem 27 | 28 | 4. How we can reproduce the problem 29 | 30 | 31 | **Additional context** 32 | If you have a first analysis or patch correction, thank you to share your proposal. 33 | 34 | **Screenshots** 35 | If applicable, add screenshots to help explain your problem. 36 | -------------------------------------------------------------------------------- /.github/ISSUE_TEMPLATE/other-issue.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: 'Other Issue ' 3 | about: Generic issue description 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | 8 | --- 9 | 10 | **Caution** 11 | The Issues are strictly limited for the reporting of problem encountered with the software provided in this project. 12 | For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post a topic in the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus). 13 | 14 | **Describe the set-up** 15 | * The board (either ST RPN reference or your custom board) 16 | * IDE or at least the compiler and its version 17 | 18 | **Additional context** 19 | If you have a first analysis or a patch proposal, thank you to share your proposal. 20 | 21 | **Screenshots** 22 | If applicable, add screenshots to help explain your problem. 23 | -------------------------------------------------------------------------------- /.github/PULL_REQUEST_TEMPLATE.md: -------------------------------------------------------------------------------- 1 | ## IMPORTANT INFORMATION 2 | 3 | ### Contributor License Agreement (CLA) 4 | * The Pull Request feature will be considered by STMicroelectronics after the signature of a **Contributor License Agreement (CLA)** by the submiter. 5 | * If you have not signed such agreement, please follow the rules mentioned in the CONTRIBUTING.md file. 6 | 7 | 8 | 9 | -------------------------------------------------------------------------------- /CODE_OF_CONDUCT.md: -------------------------------------------------------------------------------- 1 | # Contributor Covenant Code of Conduct 2 | 3 | ## Our Pledge 4 | 5 | In the interest of fostering an open and welcoming environment, we as 6 | contributors and maintainers pledge to making participation in our project and 7 | our community a harassment-free experience for everyone, regardless of age, body 8 | size, disability, ethnicity, sex characteristics, gender identity and expression, 9 | level of experience, education, socio-economic status, nationality, personal 10 | appearance, race, religion, or sexual identity and orientation. 11 | 12 | ## Our Standards 13 | 14 | Examples of behavior that contributes to creating a positive environment 15 | include: 16 | 17 | * Using welcoming and inclusive language 18 | * Being respectful of differing viewpoints and experiences 19 | * Gracefully accepting constructive criticism 20 | * Focusing on what is best for the community 21 | * Showing empathy towards other community members 22 | 23 | Examples of unacceptable behavior by participants include: 24 | 25 | * The use of sexualized language or imagery and unwelcome sexual attention or 26 | advances 27 | * Trolling, insulting/derogatory comments, and personal or political attacks 28 | * Public or private harassment 29 | * Publishing others' private information, such as a physical or electronic 30 | address, without explicit permission 31 | * Other conduct which could reasonably be considered inappropriate in a 32 | professional setting 33 | 34 | ## Our Responsibilities 35 | 36 | Project maintainers are responsible for clarifying the standards of acceptable 37 | behavior and are expected to take appropriate and fair corrective action in 38 | response to any instances of unacceptable behavior. 39 | 40 | Project maintainers have the right and responsibility to remove, edit, or 41 | reject comments, commits, code, wiki edits, issues, and other contributions 42 | that are not aligned to this Code of Conduct, or to ban temporarily or 43 | permanently any contributor for other behaviors that they deem inappropriate, 44 | threatening, offensive, or harmful. 45 | 46 | ## Scope 47 | 48 | This Code of Conduct applies both within project spaces and in public spaces 49 | when an individual is representing the project or its community. Examples of 50 | representing a project or community include using an official project e-mail 51 | address, posting via an official social media account, or acting as an appointed 52 | representative at an online or offline event. Representation of a project may be 53 | further defined and clarified by project maintainers. 54 | 55 | ## Enforcement 56 | 57 | Instances of abusive, harassing, or otherwise unacceptable behavior may be 58 | reported by contacting the project team at https://www.st.com/content/st_com/en/contact-us.html. All 59 | complaints will be reviewed and investigated and will result in a response that 60 | is deemed necessary and appropriate to the circumstances. The project team is 61 | obligated to maintain confidentiality with regard to the reporter of an incident. 62 | Further details of specific enforcement policies may be posted separately. 63 | 64 | Project maintainers who do not follow or enforce the Code of Conduct in good 65 | faith may face temporary or permanent repercussions as determined by other 66 | members of the project's leadership. 67 | 68 | ## Attribution 69 | 70 | This Code of Conduct is adapted from the [Contributor Covenant][homepage], version 1.4, 71 | available at https://www.contributor-covenant.org/version/1/4/code-of-conduct.html 72 | 73 | [homepage]: https://www.contributor-covenant.org 74 | 75 | For answers to common questions about this code of conduct, see 76 | https://www.contributor-covenant.org/faq 77 | -------------------------------------------------------------------------------- /CONTRIBUTING.md: -------------------------------------------------------------------------------- 1 | ## Contributing guide 2 | This document serves as a checklist before contributing to this repository. 3 | It includes links to read up on if topics are unclear to you. 4 | 5 | This guide mainly focuses on the proper use of Git. 6 | 7 | ### 1. Before opening an issue 8 | To report a bug/request please file an issue in the right repository 9 | (example for [cmsis_device_f1](https://github.com/STMicroelectronics/cmsis_device_f1/issues/new/choose)). 10 | But check the following boxes before posting an issue: 11 | 12 | - [ ] `Make sure you are using the latest commit (major releases are Tagged, but corrections are available as new commits).` 13 | - [ ] `Make sure your issue is a question/feedback/suggestions RELATED TO the software provided in this repo.` Otherwise, it should be discussed on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus). 14 | - [ ] `Make sure your issue is not already reported/fixed on GitHub or discussed on a previous Issue.` Please refer to this [dashboard](https://github.com/orgs/STMicroelectronics/projects/2) for the list of issues and pull-requests. Do not forget to browse into the **closed** issues. 15 | 16 | 17 | ### 2. Posting the issue 18 | When you have checked the previous boxes. You will find two templates Issues (Bug Report or Other Issue) available in the **Issues** tab of the repo 19 | 20 | ### 3. Pull Requests 21 | STMicrolectronics is happy to receive contributions from the community, based on an initial Contributor License Agreement (CLA) procedure. 22 | 23 | **From April 7th 2020** 24 | 25 | * If you are an individual writing original source code and you are sure you own the intellectual property, then you need to sign an Individual CLA (https://cla.st.com) 26 | * If you work for a company that wants also to allow you to contribute your work, your company needs to provide a Corporate CLA (https://cla.st.com) mentioning your GitHub account name 27 | * If you’re not sure that a CLA (Individual or Corporate) has been signed for your GitHub account you can check here (https://cla.st.com). Please note that Corporate CLA will always take precedence over Individual CLA 28 | 29 | One CLA submition is sufficient, for any project proposed by STMicroelectronics 30 | 31 | #### How to proceed 32 | 33 | * We recommend to engage first a communication thru an **Issue**, in order to present your proposal. Just to confirm that it correspond to STMicroelectronics domain or scope. 34 | * Then fork the project in your GitHub account to further develop your contribution. Please use the latest commit version. 35 | * Please, submit one Pull Request for one new feature or proposal. This will ease the analysis and final merge if accepted 36 | -------------------------------------------------------------------------------- /Include/stm32f1xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS STM32F1xx Device Peripheral Access Layer Header File. 6 | * 7 | * The file is the unique include file that the application programmer 8 | * is using in the C source code, usually in main.c. This file contains: 9 | * - Configuration section that allows to select: 10 | * - The STM32F1xx device used in the target application 11 | * - To use or not the peripheral's drivers in application code(i.e. 12 | * code will be based on direct access to peripheral's registers 13 | * rather than drivers API), this option is controlled by 14 | * "#define USE_HAL_DRIVER" 15 | * 16 | ****************************************************************************** 17 | * @attention 18 | * 19 | * Copyright (c) 2017-2021 STMicroelectronics. 20 | * All rights reserved. 21 | * 22 | * This software is licensed under terms that can be found in the LICENSE file 23 | * in the root directory of this software component. 24 | * If no LICENSE file comes with this software, it is provided AS-IS. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /** @addtogroup CMSIS 30 | * @{ 31 | */ 32 | 33 | /** @addtogroup stm32f1xx 34 | * @{ 35 | */ 36 | 37 | #ifndef __STM32F1XX_H 38 | #define __STM32F1XX_H 39 | 40 | #ifdef __cplusplus 41 | extern "C" { 42 | #endif /* __cplusplus */ 43 | 44 | /** @addtogroup Library_configuration_section 45 | * @{ 46 | */ 47 | 48 | /** 49 | * @brief STM32 Family 50 | */ 51 | #if !defined (STM32F1) 52 | #define STM32F1 53 | #endif /* STM32F1 */ 54 | 55 | /* Uncomment the line below according to the target STM32L device used in your 56 | application 57 | */ 58 | 59 | #if !defined (STM32F100xB) && !defined (STM32F100xE) && !defined (STM32F101x6) && \ 60 | !defined (STM32F101xB) && !defined (STM32F101xE) && !defined (STM32F101xG) && !defined (STM32F102x6) && !defined (STM32F102xB) && !defined (STM32F103x6) && \ 61 | !defined (STM32F103xB) && !defined (STM32F103xE) && !defined (STM32F103xG) && !defined (STM32F105xC) && !defined (STM32F107xC) 62 | /* #define STM32F100xB */ /*!< STM32F100C4, STM32F100R4, STM32F100C6, STM32F100R6, STM32F100C8, STM32F100R8, STM32F100V8, STM32F100CB, STM32F100RB and STM32F100VB */ 63 | /* #define STM32F100xE */ /*!< STM32F100RC, STM32F100VC, STM32F100ZC, STM32F100RD, STM32F100VD, STM32F100ZD, STM32F100RE, STM32F100VE and STM32F100ZE */ 64 | /* #define STM32F101x6 */ /*!< STM32F101C4, STM32F101R4, STM32F101T4, STM32F101C6, STM32F101R6 and STM32F101T6 Devices */ 65 | /* #define STM32F101xB */ /*!< STM32F101C8, STM32F101R8, STM32F101T8, STM32F101V8, STM32F101CB, STM32F101RB, STM32F101TB and STM32F101VB */ 66 | /* #define STM32F101xE */ /*!< STM32F101RC, STM32F101VC, STM32F101ZC, STM32F101RD, STM32F101VD, STM32F101ZD, STM32F101RE, STM32F101VE and STM32F101ZE */ 67 | /* #define STM32F101xG */ /*!< STM32F101RF, STM32F101VF, STM32F101ZF, STM32F101RG, STM32F101VG and STM32F101ZG */ 68 | /* #define STM32F102x6 */ /*!< STM32F102C4, STM32F102R4, STM32F102C6 and STM32F102R6 */ 69 | /* #define STM32F102xB */ /*!< STM32F102C8, STM32F102R8, STM32F102CB and STM32F102RB */ 70 | /* #define STM32F103x6 */ /*!< STM32F103C4, STM32F103R4, STM32F103T4, STM32F103C6, STM32F103R6 and STM32F103T6 */ 71 | /* #define STM32F103xB */ /*!< STM32F103C8, STM32F103R8, STM32F103T8, STM32F103V8, STM32F103CB, STM32F103RB, STM32F103TB and STM32F103VB */ 72 | /* #define STM32F103xE */ /*!< STM32F103RC, STM32F103VC, STM32F103ZC, STM32F103RD, STM32F103VD, STM32F103ZD, STM32F103RE, STM32F103VE and STM32F103ZE */ 73 | /* #define STM32F103xG */ /*!< STM32F103RF, STM32F103VF, STM32F103ZF, STM32F103RG, STM32F103VG and STM32F103ZG */ 74 | /* #define STM32F105xC */ /*!< STM32F105R8, STM32F105V8, STM32F105RB, STM32F105VB, STM32F105RC and STM32F105VC */ 75 | /* #define STM32F107xC */ /*!< STM32F107RB, STM32F107VB, STM32F107RC and STM32F107VC */ 76 | #endif 77 | 78 | /* Tip: To avoid modifying this file each time you need to switch between these 79 | devices, you can define the device in your toolchain compiler preprocessor. 80 | */ 81 | 82 | #if !defined (USE_HAL_DRIVER) 83 | /** 84 | * @brief Comment the line below if you will not use the peripherals drivers. 85 | In this case, these drivers will not be included and the application code will 86 | be based on direct access to peripherals registers 87 | */ 88 | /*#define USE_HAL_DRIVER */ 89 | #endif /* USE_HAL_DRIVER */ 90 | 91 | /** 92 | * @brief CMSIS Device version number 93 | */ 94 | #define __STM32F1_CMSIS_VERSION_MAIN (0x04) /*!< [31:24] main version */ 95 | #define __STM32F1_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */ 96 | #define __STM32F1_CMSIS_VERSION_SUB2 (0x05) /*!< [15:8] sub2 version */ 97 | #define __STM32F1_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */ 98 | #define __STM32F1_CMSIS_VERSION ((__STM32F1_CMSIS_VERSION_MAIN << 24)\ 99 | |(__STM32F1_CMSIS_VERSION_SUB1 << 16)\ 100 | |(__STM32F1_CMSIS_VERSION_SUB2 << 8 )\ 101 | |(__STM32F1_CMSIS_VERSION_RC)) 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /** @addtogroup Device_Included 108 | * @{ 109 | */ 110 | 111 | #if defined(STM32F100xB) 112 | #include "stm32f100xb.h" 113 | #elif defined(STM32F100xE) 114 | #include "stm32f100xe.h" 115 | #elif defined(STM32F101x6) 116 | #include "stm32f101x6.h" 117 | #elif defined(STM32F101xB) 118 | #include "stm32f101xb.h" 119 | #elif defined(STM32F101xE) 120 | #include "stm32f101xe.h" 121 | #elif defined(STM32F101xG) 122 | #include "stm32f101xg.h" 123 | #elif defined(STM32F102x6) 124 | #include "stm32f102x6.h" 125 | #elif defined(STM32F102xB) 126 | #include "stm32f102xb.h" 127 | #elif defined(STM32F103x6) 128 | #include "stm32f103x6.h" 129 | #elif defined(STM32F103xB) 130 | #include "stm32f103xb.h" 131 | #elif defined(STM32F103xE) 132 | #include "stm32f103xe.h" 133 | #elif defined(STM32F103xG) 134 | #include "stm32f103xg.h" 135 | #elif defined(STM32F105xC) 136 | #include "stm32f105xc.h" 137 | #elif defined(STM32F107xC) 138 | #include "stm32f107xc.h" 139 | #else 140 | #error "Please select first the target STM32F1xx device used in your application (in stm32f1xx.h file)" 141 | #endif 142 | 143 | /** 144 | * @} 145 | */ 146 | 147 | /** @addtogroup Exported_types 148 | * @{ 149 | */ 150 | typedef enum 151 | { 152 | RESET = 0, 153 | SET = !RESET 154 | } FlagStatus, ITStatus; 155 | 156 | typedef enum 157 | { 158 | DISABLE = 0, 159 | ENABLE = !DISABLE 160 | } FunctionalState; 161 | #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) 162 | 163 | typedef enum 164 | { 165 | SUCCESS = 0U, 166 | ERROR = !SUCCESS 167 | } ErrorStatus; 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | 174 | /** @addtogroup Exported_macros 175 | * @{ 176 | */ 177 | #define SET_BIT(REG, BIT) ((REG) |= (BIT)) 178 | 179 | #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) 180 | 181 | #define READ_BIT(REG, BIT) ((REG) & (BIT)) 182 | 183 | #define CLEAR_REG(REG) ((REG) = (0x0)) 184 | 185 | #define WRITE_REG(REG, VAL) ((REG) = (VAL)) 186 | 187 | #define READ_REG(REG) ((REG)) 188 | 189 | #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) 190 | 191 | #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) 192 | 193 | /* Use of CMSIS compiler intrinsics for register exclusive access */ 194 | /* Atomic 32-bit register access macro to set one or several bits */ 195 | #define ATOMIC_SET_BIT(REG, BIT) \ 196 | do { \ 197 | uint32_t val; \ 198 | do { \ 199 | val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \ 200 | } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ 201 | } while(0) 202 | 203 | /* Atomic 32-bit register access macro to clear one or several bits */ 204 | #define ATOMIC_CLEAR_BIT(REG, BIT) \ 205 | do { \ 206 | uint32_t val; \ 207 | do { \ 208 | val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \ 209 | } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ 210 | } while(0) 211 | 212 | /* Atomic 32-bit register access macro to clear and set one or several bits */ 213 | #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ 214 | do { \ 215 | uint32_t val; \ 216 | do { \ 217 | val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ 218 | } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ 219 | } while(0) 220 | 221 | /* Atomic 16-bit register access macro to set one or several bits */ 222 | #define ATOMIC_SETH_BIT(REG, BIT) \ 223 | do { \ 224 | uint16_t val; \ 225 | do { \ 226 | val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \ 227 | } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ 228 | } while(0) 229 | 230 | /* Atomic 16-bit register access macro to clear one or several bits */ 231 | #define ATOMIC_CLEARH_BIT(REG, BIT) \ 232 | do { \ 233 | uint16_t val; \ 234 | do { \ 235 | val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \ 236 | } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ 237 | } while(0) 238 | 239 | /* Atomic 16-bit register access macro to clear and set one or several bits */ 240 | #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \ 241 | do { \ 242 | uint16_t val; \ 243 | do { \ 244 | val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ 245 | } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ 246 | } while(0) 247 | 248 | 249 | /** 250 | * @} 251 | */ 252 | 253 | #if defined (USE_HAL_DRIVER) 254 | #include "stm32f1xx_hal.h" 255 | #endif /* USE_HAL_DRIVER */ 256 | 257 | 258 | #ifdef __cplusplus 259 | } 260 | #endif /* __cplusplus */ 261 | 262 | #endif /* __STM32F1xx_H */ 263 | /** 264 | * @} 265 | */ 266 | 267 | /** 268 | * @} 269 | */ 270 | 271 | 272 | 273 | 274 | -------------------------------------------------------------------------------- /Include/system_stm32f1xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f1xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017-2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /** @addtogroup CMSIS 20 | * @{ 21 | */ 22 | 23 | /** @addtogroup stm32f10x_system 24 | * @{ 25 | */ 26 | 27 | /** 28 | * @brief Define to prevent recursive inclusion 29 | */ 30 | #ifndef __SYSTEM_STM32F10X_H 31 | #define __SYSTEM_STM32F10X_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /** @addtogroup STM32F10x_System_Includes 38 | * @{ 39 | */ 40 | 41 | /** 42 | * @} 43 | */ 44 | 45 | 46 | /** @addtogroup STM32F10x_System_Exported_types 47 | * @{ 48 | */ 49 | 50 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 51 | extern const uint8_t AHBPrescTable[16U]; /*!< AHB prescalers table values */ 52 | extern const uint8_t APBPrescTable[8U]; /*!< APB prescalers table values */ 53 | 54 | /** 55 | * @} 56 | */ 57 | 58 | /** @addtogroup STM32F10x_System_Exported_Constants 59 | * @{ 60 | */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @addtogroup STM32F10x_System_Exported_Macros 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @addtogroup STM32F10x_System_Exported_Functions 75 | * @{ 76 | */ 77 | 78 | extern void SystemInit(void); 79 | extern void SystemCoreClockUpdate(void); 80 | /** 81 | * @} 82 | */ 83 | 84 | #ifdef __cplusplus 85 | } 86 | #endif 87 | 88 | #endif /*__SYSTEM_STM32F10X_H */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /** 95 | * @} 96 | */ 97 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # STM32CubeF1 CMSIS Device MCU Component 2 | 3 | ## Overview 4 | 5 | **STM32Cube** is an STMicroelectronics original initiative to ease the developers life by reducing efforts, time and cost. 6 | 7 | **STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform, delivered for each STM32 series. 8 | * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product 9 | * The STM32 HAL-LL drivers : an abstraction drivers layer, the API ensuring maximized portability across the STM32 portfolio 10 | * The BSP Drivers of each evaluation or demonstration board provided by this STM32 series 11 | * A consistent set of middlewares components such as RTOS, USB, FatFS, Graphics, STM32_TouchSensing_Library ... 12 | * A full set of software projects (basic examples, applications or demonstrations) for each board provided by this STM32 series 13 | 14 | Two models of publication are proposed for the STM32Cube embedded software : 15 | * The monolithic **MCU Package** : all STM32Cube software modules of one STM32 series are present (Drivers, Middlewares, Projects, Utilities) in the repo (usual name **STM32Cubexx**, xx corresponding to the STM32 series) 16 | * The **MCU component** : progressively from November 2019, each STM32Cube software module being part of the STM32Cube MCU Package, will be delivered as an individual repo, allowing the user to select and get only the required software functions. 17 | 18 | ## Description 19 | 20 | This **cmsis_device_f1** MCU component repo is one element of the STM32CubeF1 MCU embedded software package, providing the **cmsis device** part. 21 | 22 | ## Release note 23 | 24 | Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/cmsis_device_f1/blob/master/Release_Notes.html). 25 | 26 | ## Compatibility information 27 | 28 | In this table, you can find the successive versions of this CMSIS Device component, in-line with the corresponding versions of the full MCU package: 29 | 30 | CMSIS Device F1 | CMSIS Core | Was delivered in the full MCU package 31 | --------------- | ---------- | ------------------------------------- 32 | Tag v4.3.1 | Tag v5.4.0_cm3 | Tag v1.8.0 33 | Tag v4.3.1 | Tag v5.4.0_cm3 | Tag v1.8.1 34 | Tag v4.3.2 | Tag v5.4.0_cm3 | Tag v1.8.2 35 | Tag v4.3.3 | Tag v5.4.0_cm3 | Tag v1.8.4 36 | 37 | The full **STM32CubeF1** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF1). 38 | 39 | ## Troubleshooting 40 | If you have any issue with the **Software content** of this repo, you can [file an issue on Github](https://github.com/STMicroelectronics/cmsis_device_f1/issues/new). 41 | 42 | For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus). -------------------------------------------------------------------------------- /SECURITY.md: -------------------------------------------------------------------------------- 1 | # Report potential product security vulnerabilities 2 | 3 | ST places a high priority on security, and our Product Security Incident 4 | Response Team (PSIRT) is committed to rapidly addressing potential security 5 | vulnerabilities affecting our products. PSIRT's long history and vast experience 6 | in security allows ST to perform clear analyses and provide appropriate guidance 7 | on mitigations and solutions when applicable. 8 | 9 | If you wish to report potential security vulnerabilities regarding our products, 10 | **please do not report them through public GitHub issues.** Instead, we 11 | encourage you to report them to our ST PSIRT following the process described at: 12 | **https://www.st.com/content/st_com/en/security/report-vulnerabilities.html** 13 | 14 | ### IMPORTANT - READ CAREFULLY: 15 | 16 | STMicroelectronics International N.V., on behalf of itself, its affiliates and 17 | subsidiaries, (collectively “ST”) takes all potential security vulnerability 18 | reports or other related communications (“Report(s)”) seriously. In order to 19 | review Your Report (the terms “You” and “Yours” include your employer, and all 20 | affiliates, subsidiaries and related persons or entities) and take actions as 21 | deemed appropriate, ST requires that we have the rights and Your permission to 22 | do so. 23 | 24 | As such, by submitting Your Report to ST, You agree that You have the right to 25 | do so, and You grant to ST the rights to use the Report for purposes related to 26 | security vulnerability analysis, testing, correction, patching, reporting and 27 | any other related purpose or function. 28 | 29 | By submitting Your Report, You agree that ST’s 30 | [Privacy Policy](https://www.st.com/content/st_com/en/common/privacy-portal.html) 31 | applies to all related communications. 32 | -------------------------------------------------------------------------------- /Source/Templates/arm/startup_stm32f101x6.s: -------------------------------------------------------------------------------- 1 | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ******************** 2 | ;* File Name : startup_stm32f101x6.s 3 | ;* Author : MCD Application Team 4 | ;* Description : STM32F101x6 Devices vector table for MDK-ARM toolchain. 5 | ;* This module performs: 6 | ;* - Set the initial SP 7 | ;* - Set the initial PC == Reset_Handler 8 | ;* - Set the vector table entries with the exceptions ISR address 9 | ;* - Configure the clock system 10 | ;* - Branches to __main in the C library (which eventually 11 | ;* calls main()). 12 | ;* After Reset the Cortex-M3 processor is in Thread mode, 13 | ;* priority is Privileged, and the Stack is set to Main. 14 | ;****************************************************************************** 15 | ;* @attention 16 | ;* 17 | ;* Copyright (c) 2017-2021 STMicroelectronics. 18 | ;* All rights reserved. 19 | ;* 20 | ;* This software is licensed under terms that can be found in the LICENSE file 21 | ;* in the root directory of this software component. 22 | ;* If no LICENSE file comes with this software, it is provided AS-IS. 23 | ;* 24 | ;****************************************************************************** 25 | 26 | ; Amount of memory (in bytes) allocated for Stack 27 | ; Tailor this value to your application needs 28 | ; Stack Configuration 29 | ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 30 | ; 31 | 32 | Stack_Size EQU 0x00000400 33 | 34 | AREA STACK, NOINIT, READWRITE, ALIGN=3 35 | Stack_Mem SPACE Stack_Size 36 | __initial_sp 37 | 38 | 39 | ; Heap Configuration 40 | ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 41 | ; 42 | 43 | Heap_Size EQU 0x00000200 44 | 45 | AREA HEAP, NOINIT, READWRITE, ALIGN=3 46 | __heap_base 47 | Heap_Mem SPACE Heap_Size 48 | __heap_limit 49 | 50 | PRESERVE8 51 | THUMB 52 | 53 | 54 | ; Vector Table Mapped to Address 0 at Reset 55 | AREA RESET, DATA, READONLY 56 | EXPORT __Vectors 57 | EXPORT __Vectors_End 58 | EXPORT __Vectors_Size 59 | 60 | __Vectors DCD __initial_sp ; Top of Stack 61 | DCD Reset_Handler ; Reset Handler 62 | DCD NMI_Handler ; NMI Handler 63 | DCD HardFault_Handler ; Hard Fault Handler 64 | DCD MemManage_Handler ; MPU Fault Handler 65 | DCD BusFault_Handler ; Bus Fault Handler 66 | DCD UsageFault_Handler ; Usage Fault Handler 67 | DCD 0 ; Reserved 68 | DCD 0 ; Reserved 69 | DCD 0 ; Reserved 70 | DCD 0 ; Reserved 71 | DCD SVC_Handler ; SVCall Handler 72 | DCD DebugMon_Handler ; Debug Monitor Handler 73 | DCD 0 ; Reserved 74 | DCD PendSV_Handler ; PendSV Handler 75 | DCD SysTick_Handler ; SysTick Handler 76 | 77 | ; External Interrupts 78 | DCD WWDG_IRQHandler ; Window Watchdog 79 | DCD PVD_IRQHandler ; PVD through EXTI Line detect 80 | DCD TAMPER_IRQHandler ; Tamper 81 | DCD RTC_IRQHandler ; RTC 82 | DCD FLASH_IRQHandler ; Flash 83 | DCD RCC_IRQHandler ; RCC 84 | DCD EXTI0_IRQHandler ; EXTI Line 0 85 | DCD EXTI1_IRQHandler ; EXTI Line 1 86 | DCD EXTI2_IRQHandler ; EXTI Line 2 87 | DCD EXTI3_IRQHandler ; EXTI Line 3 88 | DCD EXTI4_IRQHandler ; EXTI Line 4 89 | DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 90 | DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 91 | DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 92 | DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 93 | DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 94 | DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 95 | DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 96 | DCD ADC1_IRQHandler ; ADC1 97 | DCD 0 ; Reserved 98 | DCD 0 ; Reserved 99 | DCD 0 ; Reserved 100 | DCD 0 ; Reserved 101 | DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 102 | DCD 0 ; Reserved 103 | DCD 0 ; Reserved 104 | DCD 0 ; Reserved 105 | DCD 0 ; Reserved 106 | DCD TIM2_IRQHandler ; TIM2 107 | DCD TIM3_IRQHandler ; TIM3 108 | DCD 0 ; Reserved 109 | DCD I2C1_EV_IRQHandler ; I2C1 Event 110 | DCD I2C1_ER_IRQHandler ; I2C1 Error 111 | DCD 0 ; Reserved 112 | DCD 0 ; Reserved 113 | DCD SPI1_IRQHandler ; SPI1 114 | DCD 0 ; Reserved 115 | DCD USART1_IRQHandler ; USART1 116 | DCD USART2_IRQHandler ; USART2 117 | DCD 0 ; Reserved 118 | DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 119 | DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line 120 | __Vectors_End 121 | 122 | __Vectors_Size EQU __Vectors_End - __Vectors 123 | 124 | AREA |.text|, CODE, READONLY 125 | 126 | ; Reset handler routine 127 | Reset_Handler PROC 128 | EXPORT Reset_Handler [WEAK] 129 | IMPORT __main 130 | IMPORT SystemInit 131 | LDR R0, =SystemInit 132 | BLX R0 133 | LDR R0, =__main 134 | BX R0 135 | ENDP 136 | 137 | ; Dummy Exception Handlers (infinite loops which can be modified) 138 | 139 | NMI_Handler PROC 140 | EXPORT NMI_Handler [WEAK] 141 | B . 142 | ENDP 143 | HardFault_Handler\ 144 | PROC 145 | EXPORT HardFault_Handler [WEAK] 146 | B . 147 | ENDP 148 | MemManage_Handler\ 149 | PROC 150 | EXPORT MemManage_Handler [WEAK] 151 | B . 152 | ENDP 153 | BusFault_Handler\ 154 | PROC 155 | EXPORT BusFault_Handler [WEAK] 156 | B . 157 | ENDP 158 | UsageFault_Handler\ 159 | PROC 160 | EXPORT UsageFault_Handler [WEAK] 161 | B . 162 | ENDP 163 | SVC_Handler PROC 164 | EXPORT SVC_Handler [WEAK] 165 | B . 166 | ENDP 167 | DebugMon_Handler\ 168 | PROC 169 | EXPORT DebugMon_Handler [WEAK] 170 | B . 171 | ENDP 172 | PendSV_Handler PROC 173 | EXPORT PendSV_Handler [WEAK] 174 | B . 175 | ENDP 176 | SysTick_Handler PROC 177 | EXPORT SysTick_Handler [WEAK] 178 | B . 179 | ENDP 180 | 181 | Default_Handler PROC 182 | 183 | EXPORT WWDG_IRQHandler [WEAK] 184 | EXPORT PVD_IRQHandler [WEAK] 185 | EXPORT TAMPER_IRQHandler [WEAK] 186 | EXPORT RTC_IRQHandler [WEAK] 187 | EXPORT FLASH_IRQHandler [WEAK] 188 | EXPORT RCC_IRQHandler [WEAK] 189 | EXPORT EXTI0_IRQHandler [WEAK] 190 | EXPORT EXTI1_IRQHandler [WEAK] 191 | EXPORT EXTI2_IRQHandler [WEAK] 192 | EXPORT EXTI3_IRQHandler [WEAK] 193 | EXPORT EXTI4_IRQHandler [WEAK] 194 | EXPORT DMA1_Channel1_IRQHandler [WEAK] 195 | EXPORT DMA1_Channel2_IRQHandler [WEAK] 196 | EXPORT DMA1_Channel3_IRQHandler [WEAK] 197 | EXPORT DMA1_Channel4_IRQHandler [WEAK] 198 | EXPORT DMA1_Channel5_IRQHandler [WEAK] 199 | EXPORT DMA1_Channel6_IRQHandler [WEAK] 200 | EXPORT DMA1_Channel7_IRQHandler [WEAK] 201 | EXPORT ADC1_IRQHandler [WEAK] 202 | EXPORT EXTI9_5_IRQHandler [WEAK] 203 | EXPORT TIM2_IRQHandler [WEAK] 204 | EXPORT TIM3_IRQHandler [WEAK] 205 | EXPORT I2C1_EV_IRQHandler [WEAK] 206 | EXPORT I2C1_ER_IRQHandler [WEAK] 207 | EXPORT SPI1_IRQHandler [WEAK] 208 | EXPORT USART1_IRQHandler [WEAK] 209 | EXPORT USART2_IRQHandler [WEAK] 210 | EXPORT EXTI15_10_IRQHandler [WEAK] 211 | EXPORT RTC_Alarm_IRQHandler [WEAK] 212 | 213 | WWDG_IRQHandler 214 | PVD_IRQHandler 215 | TAMPER_IRQHandler 216 | RTC_IRQHandler 217 | FLASH_IRQHandler 218 | RCC_IRQHandler 219 | EXTI0_IRQHandler 220 | EXTI1_IRQHandler 221 | EXTI2_IRQHandler 222 | EXTI3_IRQHandler 223 | EXTI4_IRQHandler 224 | DMA1_Channel1_IRQHandler 225 | DMA1_Channel2_IRQHandler 226 | DMA1_Channel3_IRQHandler 227 | DMA1_Channel4_IRQHandler 228 | DMA1_Channel5_IRQHandler 229 | DMA1_Channel6_IRQHandler 230 | DMA1_Channel7_IRQHandler 231 | ADC1_IRQHandler 232 | EXTI9_5_IRQHandler 233 | TIM2_IRQHandler 234 | TIM3_IRQHandler 235 | I2C1_EV_IRQHandler 236 | I2C1_ER_IRQHandler 237 | SPI1_IRQHandler 238 | USART1_IRQHandler 239 | USART2_IRQHandler 240 | EXTI15_10_IRQHandler 241 | RTC_Alarm_IRQHandler 242 | 243 | B . 244 | 245 | ENDP 246 | 247 | ALIGN 248 | 249 | ;******************************************************************************* 250 | ; User Stack and Heap initialization 251 | ;******************************************************************************* 252 | IF :DEF:__MICROLIB 253 | 254 | EXPORT __initial_sp 255 | EXPORT __heap_base 256 | EXPORT __heap_limit 257 | 258 | ELSE 259 | 260 | IMPORT __use_two_region_memory 261 | EXPORT __user_initial_stackheap 262 | 263 | __user_initial_stackheap 264 | 265 | LDR R0, = Heap_Mem 266 | LDR R1, =(Stack_Mem + Stack_Size) 267 | LDR R2, = (Heap_Mem + Heap_Size) 268 | LDR R3, = Stack_Mem 269 | BX LR 270 | 271 | ALIGN 272 | 273 | ENDIF 274 | 275 | END 276 | 277 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F100XB_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F100XB_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F100xB Device with 7 | ** 128KByte FLASH, 8KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x20001FFF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F100XE_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F100XE_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F100xE Device with 7 | ** 512KByte FLASH, 32KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x20007FFF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F101X6_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F101X6_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F101x6 Device with 7 | ** 32KByte FLASH, 6KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x200017FF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 6K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F101XB_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F101XB_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F101xB Device with 7 | ** 128KByte FLASH, 16KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x20003FFF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F101XE_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F101XE_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F101xE Device with 7 | ** 512KByte FLASH, 48KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x2000BFFF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 48K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F101XG_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F101XG_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F101xG Device with 7 | ** 1000KByte FLASH, 80KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x20013FFF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1000K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 80K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F102X6_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F102X6_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F102x6 Device with 7 | ** 32KByte FLASH, 6KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x200017FF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 6K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F102XB_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F102XB_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F102xB Device with 7 | ** 128KByte FLASH, 16KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x20003FFF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F103X6_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F103X6_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F103x6 Device with 7 | ** 32KByte FLASH, 10KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x200027FF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 10K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F103XB_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F103XB_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F103xB Device with 7 | ** 128KByte FLASH, 20KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x20004FFF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F103XE_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F103XE_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F103xE Device with 7 | ** 512KByte FLASH, 64KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x2000FFFF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F103XG_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F103XG_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F103xG Device with 7 | ** 1000KByte FLASH, 96KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x20017FFF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1000K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F105XC_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F105XC_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F105xC Device with 7 | ** 256KByte FLASH, 64KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x2000FFFF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/linker/STM32F107XC_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : STM32F107XC_FLASH.ld 5 | ** 6 | ** Abstract : Linker script for STM32F107xC Device with 7 | ** 256KByte FLASH, 64KByte RAM 8 | ** 9 | ** Set heap size, stack size and stack location according 10 | ** to application requirements. 11 | ** 12 | ** Set memory bank area and size if external memory is used. 13 | ** 14 | ** Target : STMicroelectronics STM32 15 | ** 16 | ** 17 | ** Distribution: The file is distributed as is, without any warranty 18 | ** of any kind. 19 | ** 20 | ** (c)Copyright Ac6. 21 | ** You may use this file as-is or modify it according to the needs of your 22 | ** project. Distribution of this file (unmodified or modified) is not 23 | ** permitted. Ac6 permit registered System Workbench for MCU users the 24 | ** rights to distribute the assembled, compiled & linked contents of this 25 | ** file as part of an application binary file, provided that it is built 26 | ** using the System Workbench for MCU toolchain. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x2000FFFF; /* end of RAM */ 36 | 37 | /* Generate a link error if heap and stack don't fit into RAM */ 38 | _Min_Heap_Size = 0x200; /* required amount of heap */ 39 | _Min_Stack_Size = 0x400; /* required amount of stack */ 40 | 41 | /* Specify the memory areas */ 42 | MEMORY 43 | { 44 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K 45 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into FLASH */ 52 | .isr_vector : 53 | { 54 | . = ALIGN(4); 55 | KEEP(*(.isr_vector)) /* Startup code */ 56 | . = ALIGN(4); 57 | } >FLASH 58 | 59 | /* The program code and other data goes into FLASH */ 60 | .text : 61 | { 62 | . = ALIGN(4); 63 | *(.text) /* .text sections (code) */ 64 | *(.text*) /* .text* sections (code) */ 65 | *(.glue_7) /* glue arm to thumb code */ 66 | *(.glue_7t) /* glue thumb to arm code */ 67 | *(.eh_frame) 68 | 69 | KEEP (*(.init)) 70 | KEEP (*(.fini)) 71 | 72 | . = ALIGN(4); 73 | _etext = .; /* define a global symbols at end of code */ 74 | } >FLASH 75 | 76 | /* Constant data goes into FLASH */ 77 | .rodata : 78 | { 79 | . = ALIGN(4); 80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 82 | . = ALIGN(4); 83 | } >FLASH 84 | 85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 86 | .ARM : { 87 | __exidx_start = .; 88 | *(.ARM.exidx*) 89 | __exidx_end = .; 90 | } >FLASH 91 | 92 | .preinit_array : 93 | { 94 | PROVIDE_HIDDEN (__preinit_array_start = .); 95 | KEEP (*(.preinit_array*)) 96 | PROVIDE_HIDDEN (__preinit_array_end = .); 97 | } >FLASH 98 | .init_array : 99 | { 100 | PROVIDE_HIDDEN (__init_array_start = .); 101 | KEEP (*(SORT(.init_array.*))) 102 | KEEP (*(.init_array*)) 103 | PROVIDE_HIDDEN (__init_array_end = .); 104 | } >FLASH 105 | .fini_array : 106 | { 107 | PROVIDE_HIDDEN (__fini_array_start = .); 108 | KEEP (*(SORT(.fini_array.*))) 109 | KEEP (*(.fini_array*)) 110 | PROVIDE_HIDDEN (__fini_array_end = .); 111 | } >FLASH 112 | 113 | /* used by the startup to initialize data */ 114 | _sidata = LOADADDR(.data); 115 | 116 | /* Initialized data sections goes into RAM, load LMA copy after code */ 117 | .data : 118 | { 119 | . = ALIGN(4); 120 | _sdata = .; /* create a global symbol at data start */ 121 | *(.data) /* .data sections */ 122 | *(.data*) /* .data* sections */ 123 | 124 | . = ALIGN(4); 125 | _edata = .; /* define a global symbol at data end */ 126 | } >RAM AT> FLASH 127 | 128 | 129 | /* Uninitialized data section */ 130 | . = ALIGN(4); 131 | .bss : 132 | { 133 | /* This is used by the startup in order to initialize the .bss section */ 134 | _sbss = .; /* define a global symbol at bss start */ 135 | __bss_start__ = _sbss; 136 | *(.bss) 137 | *(.bss*) 138 | *(COMMON) 139 | 140 | . = ALIGN(4); 141 | _ebss = .; /* define a global symbol at bss end */ 142 | __bss_end__ = _ebss; 143 | } >RAM 144 | 145 | /* User_heap_stack section, used to check that there is enough RAM left */ 146 | ._user_heap_stack : 147 | { 148 | . = ALIGN(8); 149 | PROVIDE ( end = . ); 150 | PROVIDE ( _end = . ); 151 | . = . + _Min_Heap_Size; 152 | . = . + _Min_Stack_Size; 153 | . = ALIGN(8); 154 | } >RAM 155 | 156 | 157 | 158 | /* Remove information from the standard libraries */ 159 | /DISCARD/ : 160 | { 161 | libc.a ( * ) 162 | libm.a ( * ) 163 | libgcc.a ( * ) 164 | } 165 | 166 | .ARM.attributes 0 : { *(.ARM.attributes) } 167 | } 168 | -------------------------------------------------------------------------------- /Source/Templates/gcc/startup_stm32f101x6.s: -------------------------------------------------------------------------------- 1 | /** 2 | *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ 3 | * @file startup_stm32f101x6.s 4 | * @author MCD Application Team 5 | * @brief STM32F101x6 Devices vector table for Atollic toolchain. 6 | * This module performs: 7 | * - Set the initial SP 8 | * - Set the initial PC == Reset_Handler, 9 | * - Set the vector table entries with the exceptions ISR address 10 | * - Configure the clock system 11 | * - Branches to main in the C library (which eventually 12 | * calls main()). 13 | * After Reset the Cortex-M3 processor is in Thread mode, 14 | * priority is Privileged, and the Stack is set to Main. 15 | ****************************************************************************** 16 | * @attention 17 | * 18 | * Copyright (c) 2017-2021 STMicroelectronics. 19 | * All rights reserved. 20 | * 21 | * This software is licensed under terms that can be found in the LICENSE file 22 | * in the root directory of this software component. 23 | * If no LICENSE file comes with this software, it is provided AS-IS. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | .syntax unified 29 | .cpu cortex-m3 30 | .fpu softvfp 31 | .thumb 32 | 33 | .global g_pfnVectors 34 | .global Default_Handler 35 | 36 | /* start address for the initialization values of the .data section. 37 | defined in linker script */ 38 | .word _sidata 39 | /* start address for the .data section. defined in linker script */ 40 | .word _sdata 41 | /* end address for the .data section. defined in linker script */ 42 | .word _edata 43 | /* start address for the .bss section. defined in linker script */ 44 | .word _sbss 45 | /* end address for the .bss section. defined in linker script */ 46 | .word _ebss 47 | 48 | .equ BootRAM, 0xF108F85F 49 | /** 50 | * @brief This is the code that gets called when the processor first 51 | * starts execution following a reset event. Only the absolutely 52 | * necessary set is performed, after which the application 53 | * supplied main() routine is called. 54 | * @param None 55 | * @retval : None 56 | */ 57 | 58 | .section .text.Reset_Handler 59 | .weak Reset_Handler 60 | .type Reset_Handler, %function 61 | Reset_Handler: 62 | 63 | /* Call the clock system initialization function.*/ 64 | bl SystemInit 65 | 66 | /* Copy the data segment initializers from flash to SRAM */ 67 | ldr r0, =_sdata 68 | ldr r1, =_edata 69 | ldr r2, =_sidata 70 | movs r3, #0 71 | b LoopCopyDataInit 72 | 73 | CopyDataInit: 74 | ldr r4, [r2, r3] 75 | str r4, [r0, r3] 76 | adds r3, r3, #4 77 | 78 | LoopCopyDataInit: 79 | adds r4, r0, r3 80 | cmp r4, r1 81 | bcc CopyDataInit 82 | 83 | /* Zero fill the bss segment. */ 84 | ldr r2, =_sbss 85 | ldr r4, =_ebss 86 | movs r3, #0 87 | b LoopFillZerobss 88 | 89 | FillZerobss: 90 | str r3, [r2] 91 | adds r2, r2, #4 92 | 93 | LoopFillZerobss: 94 | cmp r2, r4 95 | bcc FillZerobss 96 | 97 | /* Call static constructors */ 98 | bl __libc_init_array 99 | /* Call the application's entry point.*/ 100 | bl main 101 | bx lr 102 | .size Reset_Handler, .-Reset_Handler 103 | 104 | /** 105 | * @brief This is the code that gets called when the processor receives an 106 | * unexpected interrupt. This simply enters an infinite loop, preserving 107 | * the system state for examination by a debugger. 108 | * 109 | * @param None 110 | * @retval : None 111 | */ 112 | .section .text.Default_Handler,"ax",%progbits 113 | Default_Handler: 114 | Infinite_Loop: 115 | b Infinite_Loop 116 | .size Default_Handler, .-Default_Handler 117 | /****************************************************************************** 118 | * 119 | * The minimal vector table for a Cortex M3. Note that the proper constructs 120 | * must be placed on this to ensure that it ends up at physical address 121 | * 0x0000.0000. 122 | * 123 | ******************************************************************************/ 124 | .section .isr_vector,"a",%progbits 125 | .type g_pfnVectors, %object 126 | .size g_pfnVectors, .-g_pfnVectors 127 | 128 | 129 | g_pfnVectors: 130 | 131 | 132 | .word _estack 133 | .word Reset_Handler 134 | .word NMI_Handler 135 | .word HardFault_Handler 136 | .word MemManage_Handler 137 | .word BusFault_Handler 138 | .word UsageFault_Handler 139 | .word 0 140 | .word 0 141 | .word 0 142 | .word 0 143 | .word SVC_Handler 144 | .word DebugMon_Handler 145 | .word 0 146 | .word PendSV_Handler 147 | .word SysTick_Handler 148 | .word WWDG_IRQHandler 149 | .word PVD_IRQHandler 150 | .word TAMPER_IRQHandler 151 | .word RTC_IRQHandler 152 | .word FLASH_IRQHandler 153 | .word RCC_IRQHandler 154 | .word EXTI0_IRQHandler 155 | .word EXTI1_IRQHandler 156 | .word EXTI2_IRQHandler 157 | .word EXTI3_IRQHandler 158 | .word EXTI4_IRQHandler 159 | .word DMA1_Channel1_IRQHandler 160 | .word DMA1_Channel2_IRQHandler 161 | .word DMA1_Channel3_IRQHandler 162 | .word DMA1_Channel4_IRQHandler 163 | .word DMA1_Channel5_IRQHandler 164 | .word DMA1_Channel6_IRQHandler 165 | .word DMA1_Channel7_IRQHandler 166 | .word ADC1_IRQHandler 167 | .word 0 168 | .word 0 169 | .word 0 170 | .word 0 171 | .word EXTI9_5_IRQHandler 172 | .word 0 173 | .word 0 174 | .word 0 175 | .word 0 176 | .word TIM2_IRQHandler 177 | .word TIM3_IRQHandler 178 | .word 0 179 | .word I2C1_EV_IRQHandler 180 | .word I2C1_ER_IRQHandler 181 | .word 0 182 | .word 0 183 | .word SPI1_IRQHandler 184 | .word 0 185 | .word USART1_IRQHandler 186 | .word USART2_IRQHandler 187 | .word 0 188 | .word EXTI15_10_IRQHandler 189 | .word RTC_Alarm_IRQHandler 190 | .word 0 191 | .word 0 192 | .word 0 193 | .word 0 194 | .word 0 195 | .word 0 196 | .word 0 197 | .word 0 198 | .word BootRAM /* @0x108. This is for boot in RAM mode for 199 | STM32F10x Low Density devices.*/ 200 | 201 | /******************************************************************************* 202 | * 203 | * Provide weak aliases for each Exception handler to the Default_Handler. 204 | * As they are weak aliases, any function with the same name will override 205 | * this definition. 206 | * 207 | *******************************************************************************/ 208 | 209 | .weak NMI_Handler 210 | .thumb_set NMI_Handler,Default_Handler 211 | 212 | .weak HardFault_Handler 213 | .thumb_set HardFault_Handler,Default_Handler 214 | 215 | .weak MemManage_Handler 216 | .thumb_set MemManage_Handler,Default_Handler 217 | 218 | .weak BusFault_Handler 219 | .thumb_set BusFault_Handler,Default_Handler 220 | 221 | .weak UsageFault_Handler 222 | .thumb_set UsageFault_Handler,Default_Handler 223 | 224 | .weak SVC_Handler 225 | .thumb_set SVC_Handler,Default_Handler 226 | 227 | .weak DebugMon_Handler 228 | .thumb_set DebugMon_Handler,Default_Handler 229 | 230 | .weak PendSV_Handler 231 | .thumb_set PendSV_Handler,Default_Handler 232 | 233 | .weak SysTick_Handler 234 | .thumb_set SysTick_Handler,Default_Handler 235 | 236 | .weak WWDG_IRQHandler 237 | .thumb_set WWDG_IRQHandler,Default_Handler 238 | 239 | .weak PVD_IRQHandler 240 | .thumb_set PVD_IRQHandler,Default_Handler 241 | 242 | .weak TAMPER_IRQHandler 243 | .thumb_set TAMPER_IRQHandler,Default_Handler 244 | 245 | .weak RTC_IRQHandler 246 | .thumb_set RTC_IRQHandler,Default_Handler 247 | 248 | .weak FLASH_IRQHandler 249 | .thumb_set FLASH_IRQHandler,Default_Handler 250 | 251 | .weak RCC_IRQHandler 252 | .thumb_set RCC_IRQHandler,Default_Handler 253 | 254 | .weak EXTI0_IRQHandler 255 | .thumb_set EXTI0_IRQHandler,Default_Handler 256 | 257 | .weak EXTI1_IRQHandler 258 | .thumb_set EXTI1_IRQHandler,Default_Handler 259 | 260 | .weak EXTI2_IRQHandler 261 | .thumb_set EXTI2_IRQHandler,Default_Handler 262 | 263 | .weak EXTI3_IRQHandler 264 | .thumb_set EXTI3_IRQHandler,Default_Handler 265 | 266 | .weak EXTI4_IRQHandler 267 | .thumb_set EXTI4_IRQHandler,Default_Handler 268 | 269 | .weak DMA1_Channel1_IRQHandler 270 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 271 | 272 | .weak DMA1_Channel2_IRQHandler 273 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler 274 | 275 | .weak DMA1_Channel3_IRQHandler 276 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler 277 | 278 | .weak DMA1_Channel4_IRQHandler 279 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler 280 | 281 | .weak DMA1_Channel5_IRQHandler 282 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler 283 | 284 | .weak DMA1_Channel6_IRQHandler 285 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler 286 | 287 | .weak DMA1_Channel7_IRQHandler 288 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler 289 | 290 | .weak ADC1_IRQHandler 291 | .thumb_set ADC1_IRQHandler,Default_Handler 292 | 293 | .weak EXTI9_5_IRQHandler 294 | .thumb_set EXTI9_5_IRQHandler,Default_Handler 295 | 296 | .weak TIM2_IRQHandler 297 | .thumb_set TIM2_IRQHandler,Default_Handler 298 | 299 | .weak TIM3_IRQHandler 300 | .thumb_set TIM3_IRQHandler,Default_Handler 301 | 302 | .weak I2C1_EV_IRQHandler 303 | .thumb_set I2C1_EV_IRQHandler,Default_Handler 304 | 305 | .weak I2C1_ER_IRQHandler 306 | .thumb_set I2C1_ER_IRQHandler,Default_Handler 307 | 308 | .weak SPI1_IRQHandler 309 | .thumb_set SPI1_IRQHandler,Default_Handler 310 | 311 | .weak USART1_IRQHandler 312 | .thumb_set USART1_IRQHandler,Default_Handler 313 | 314 | .weak USART2_IRQHandler 315 | .thumb_set USART2_IRQHandler,Default_Handler 316 | 317 | .weak EXTI15_10_IRQHandler 318 | .thumb_set EXTI15_10_IRQHandler,Default_Handler 319 | 320 | .weak RTC_Alarm_IRQHandler 321 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler 322 | 323 | -------------------------------------------------------------------------------- /Source/Templates/gcc/startup_stm32f101xb.s: -------------------------------------------------------------------------------- 1 | /** 2 | *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ 3 | * @file startup_stm32f101xb.s 4 | * @author MCD Application Team 5 | * @brief STM32F101xB Devices vector table for Atollic toolchain. 6 | * This module performs: 7 | * - Set the initial SP 8 | * - Set the initial PC == Reset_Handler, 9 | * - Set the vector table entries with the exceptions ISR address 10 | * - Configure the clock system 11 | * - Branches to main in the C library (which eventually 12 | * calls main()). 13 | * After Reset the Cortex-M3 processor is in Thread mode, 14 | * priority is Privileged, and the Stack is set to Main. 15 | ****************************************************************************** 16 | * @attention 17 | * 18 | * Copyright (c) 2017-2021 STMicroelectronics. 19 | * All rights reserved. 20 | * 21 | * This software is licensed under terms that can be found in the LICENSE file 22 | * in the root directory of this software component. 23 | * If no LICENSE file comes with this software, it is provided AS-IS. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | .syntax unified 29 | .cpu cortex-m3 30 | .fpu softvfp 31 | .thumb 32 | 33 | .global g_pfnVectors 34 | .global Default_Handler 35 | 36 | /* start address for the initialization values of the .data section. 37 | defined in linker script */ 38 | .word _sidata 39 | /* start address for the .data section. defined in linker script */ 40 | .word _sdata 41 | /* end address for the .data section. defined in linker script */ 42 | .word _edata 43 | /* start address for the .bss section. defined in linker script */ 44 | .word _sbss 45 | /* end address for the .bss section. defined in linker script */ 46 | .word _ebss 47 | 48 | .equ BootRAM, 0xF108F85F 49 | /** 50 | * @brief This is the code that gets called when the processor first 51 | * starts execution following a reset event. Only the absolutely 52 | * necessary set is performed, after which the application 53 | * supplied main() routine is called. 54 | * @param None 55 | * @retval : None 56 | */ 57 | 58 | .section .text.Reset_Handler 59 | .weak Reset_Handler 60 | .type Reset_Handler, %function 61 | Reset_Handler: 62 | 63 | /* Call the clock system initialization function.*/ 64 | bl SystemInit 65 | 66 | /* Copy the data segment initializers from flash to SRAM */ 67 | ldr r0, =_sdata 68 | ldr r1, =_edata 69 | ldr r2, =_sidata 70 | movs r3, #0 71 | b LoopCopyDataInit 72 | 73 | CopyDataInit: 74 | ldr r4, [r2, r3] 75 | str r4, [r0, r3] 76 | adds r3, r3, #4 77 | 78 | LoopCopyDataInit: 79 | adds r4, r0, r3 80 | cmp r4, r1 81 | bcc CopyDataInit 82 | 83 | /* Zero fill the bss segment. */ 84 | ldr r2, =_sbss 85 | ldr r4, =_ebss 86 | movs r3, #0 87 | b LoopFillZerobss 88 | 89 | FillZerobss: 90 | str r3, [r2] 91 | adds r2, r2, #4 92 | 93 | LoopFillZerobss: 94 | cmp r2, r4 95 | bcc FillZerobss 96 | 97 | /* Call static constructors */ 98 | bl __libc_init_array 99 | /* Call the application's entry point.*/ 100 | bl main 101 | bx lr 102 | .size Reset_Handler, .-Reset_Handler 103 | 104 | /** 105 | * @brief This is the code that gets called when the processor receives an 106 | * unexpected interrupt. This simply enters an infinite loop, preserving 107 | * the system state for examination by a debugger. 108 | * 109 | * @param None 110 | * @retval : None 111 | */ 112 | .section .text.Default_Handler,"ax",%progbits 113 | Default_Handler: 114 | Infinite_Loop: 115 | b Infinite_Loop 116 | .size Default_Handler, .-Default_Handler 117 | /****************************************************************************** 118 | * 119 | * The minimal vector table for a Cortex M3. Note that the proper constructs 120 | * must be placed on this to ensure that it ends up at physical address 121 | * 0x0000.0000. 122 | * 123 | ******************************************************************************/ 124 | .section .isr_vector,"a",%progbits 125 | .type g_pfnVectors, %object 126 | .size g_pfnVectors, .-g_pfnVectors 127 | 128 | 129 | g_pfnVectors: 130 | 131 | .word _estack 132 | .word Reset_Handler 133 | .word NMI_Handler 134 | .word HardFault_Handler 135 | .word MemManage_Handler 136 | .word BusFault_Handler 137 | .word UsageFault_Handler 138 | .word 0 139 | .word 0 140 | .word 0 141 | .word 0 142 | .word SVC_Handler 143 | .word DebugMon_Handler 144 | .word 0 145 | .word PendSV_Handler 146 | .word SysTick_Handler 147 | .word WWDG_IRQHandler 148 | .word PVD_IRQHandler 149 | .word TAMPER_IRQHandler 150 | .word RTC_IRQHandler 151 | .word FLASH_IRQHandler 152 | .word RCC_IRQHandler 153 | .word EXTI0_IRQHandler 154 | .word EXTI1_IRQHandler 155 | .word EXTI2_IRQHandler 156 | .word EXTI3_IRQHandler 157 | .word EXTI4_IRQHandler 158 | .word DMA1_Channel1_IRQHandler 159 | .word DMA1_Channel2_IRQHandler 160 | .word DMA1_Channel3_IRQHandler 161 | .word DMA1_Channel4_IRQHandler 162 | .word DMA1_Channel5_IRQHandler 163 | .word DMA1_Channel6_IRQHandler 164 | .word DMA1_Channel7_IRQHandler 165 | .word ADC1_IRQHandler 166 | .word 0 167 | .word 0 168 | .word 0 169 | .word 0 170 | .word EXTI9_5_IRQHandler 171 | .word 0 172 | .word 0 173 | .word 0 174 | .word 0 175 | .word TIM2_IRQHandler 176 | .word TIM3_IRQHandler 177 | .word TIM4_IRQHandler 178 | .word I2C1_EV_IRQHandler 179 | .word I2C1_ER_IRQHandler 180 | .word I2C2_EV_IRQHandler 181 | .word I2C2_ER_IRQHandler 182 | .word SPI1_IRQHandler 183 | .word SPI2_IRQHandler 184 | .word USART1_IRQHandler 185 | .word USART2_IRQHandler 186 | .word USART3_IRQHandler 187 | .word EXTI15_10_IRQHandler 188 | .word RTC_Alarm_IRQHandler 189 | .word 0 190 | .word 0 191 | .word 0 192 | .word 0 193 | .word 0 194 | .word 0 195 | .word 0 196 | .word 0 197 | .word BootRAM /* @0x108. This is for boot in RAM mode for 198 | STM32F10x Medium Density devices. */ 199 | 200 | /******************************************************************************* 201 | * 202 | * Provide weak aliases for each Exception handler to the Default_Handler. 203 | * As they are weak aliases, any function with the same name will override 204 | * this definition. 205 | * 206 | *******************************************************************************/ 207 | 208 | .weak NMI_Handler 209 | .thumb_set NMI_Handler,Default_Handler 210 | 211 | .weak HardFault_Handler 212 | .thumb_set HardFault_Handler,Default_Handler 213 | 214 | .weak MemManage_Handler 215 | .thumb_set MemManage_Handler,Default_Handler 216 | 217 | .weak BusFault_Handler 218 | .thumb_set BusFault_Handler,Default_Handler 219 | 220 | .weak UsageFault_Handler 221 | .thumb_set UsageFault_Handler,Default_Handler 222 | 223 | .weak SVC_Handler 224 | .thumb_set SVC_Handler,Default_Handler 225 | 226 | .weak DebugMon_Handler 227 | .thumb_set DebugMon_Handler,Default_Handler 228 | 229 | .weak PendSV_Handler 230 | .thumb_set PendSV_Handler,Default_Handler 231 | 232 | .weak SysTick_Handler 233 | .thumb_set SysTick_Handler,Default_Handler 234 | 235 | .weak WWDG_IRQHandler 236 | .thumb_set WWDG_IRQHandler,Default_Handler 237 | 238 | .weak PVD_IRQHandler 239 | .thumb_set PVD_IRQHandler,Default_Handler 240 | 241 | .weak TAMPER_IRQHandler 242 | .thumb_set TAMPER_IRQHandler,Default_Handler 243 | 244 | .weak RTC_IRQHandler 245 | .thumb_set RTC_IRQHandler,Default_Handler 246 | 247 | .weak FLASH_IRQHandler 248 | .thumb_set FLASH_IRQHandler,Default_Handler 249 | 250 | .weak RCC_IRQHandler 251 | .thumb_set RCC_IRQHandler,Default_Handler 252 | 253 | .weak EXTI0_IRQHandler 254 | .thumb_set EXTI0_IRQHandler,Default_Handler 255 | 256 | .weak EXTI1_IRQHandler 257 | .thumb_set EXTI1_IRQHandler,Default_Handler 258 | 259 | .weak EXTI2_IRQHandler 260 | .thumb_set EXTI2_IRQHandler,Default_Handler 261 | 262 | .weak EXTI3_IRQHandler 263 | .thumb_set EXTI3_IRQHandler,Default_Handler 264 | 265 | .weak EXTI4_IRQHandler 266 | .thumb_set EXTI4_IRQHandler,Default_Handler 267 | 268 | .weak DMA1_Channel1_IRQHandler 269 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 270 | 271 | .weak DMA1_Channel2_IRQHandler 272 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler 273 | 274 | .weak DMA1_Channel3_IRQHandler 275 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler 276 | 277 | .weak DMA1_Channel4_IRQHandler 278 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler 279 | 280 | .weak DMA1_Channel5_IRQHandler 281 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler 282 | 283 | .weak DMA1_Channel6_IRQHandler 284 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler 285 | 286 | .weak DMA1_Channel7_IRQHandler 287 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler 288 | 289 | .weak ADC1_IRQHandler 290 | .thumb_set ADC1_IRQHandler,Default_Handler 291 | 292 | .weak EXTI9_5_IRQHandler 293 | .thumb_set EXTI9_5_IRQHandler,Default_Handler 294 | 295 | .weak TIM2_IRQHandler 296 | .thumb_set TIM2_IRQHandler,Default_Handler 297 | 298 | .weak TIM3_IRQHandler 299 | .thumb_set TIM3_IRQHandler,Default_Handler 300 | 301 | .weak TIM4_IRQHandler 302 | .thumb_set TIM4_IRQHandler,Default_Handler 303 | 304 | .weak I2C1_EV_IRQHandler 305 | .thumb_set I2C1_EV_IRQHandler,Default_Handler 306 | 307 | .weak I2C1_ER_IRQHandler 308 | .thumb_set I2C1_ER_IRQHandler,Default_Handler 309 | 310 | .weak I2C2_EV_IRQHandler 311 | .thumb_set I2C2_EV_IRQHandler,Default_Handler 312 | 313 | .weak I2C2_ER_IRQHandler 314 | .thumb_set I2C2_ER_IRQHandler,Default_Handler 315 | 316 | .weak SPI1_IRQHandler 317 | .thumb_set SPI1_IRQHandler,Default_Handler 318 | 319 | .weak SPI2_IRQHandler 320 | .thumb_set SPI2_IRQHandler,Default_Handler 321 | 322 | .weak USART1_IRQHandler 323 | .thumb_set USART1_IRQHandler,Default_Handler 324 | 325 | .weak USART2_IRQHandler 326 | .thumb_set USART2_IRQHandler,Default_Handler 327 | 328 | .weak USART3_IRQHandler 329 | .thumb_set USART3_IRQHandler,Default_Handler 330 | 331 | .weak EXTI15_10_IRQHandler 332 | .thumb_set EXTI15_10_IRQHandler,Default_Handler 333 | 334 | .weak RTC_Alarm_IRQHandler 335 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler 336 | 337 | 338 | 339 | -------------------------------------------------------------------------------- /Source/Templates/gcc/startup_stm32f102x6.s: -------------------------------------------------------------------------------- 1 | /** 2 | *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ 3 | * @file startup_stm32f102x6.s 4 | * @author MCD Application Team 5 | * @brief STM32F102x6 Devices vector table for Atollic toolchain. 6 | * This module performs: 7 | * - Set the initial SP 8 | * - Set the initial PC == Reset_Handler, 9 | * - Set the vector table entries with the exceptions ISR address 10 | * - Configure the clock system 11 | * - Branches to main in the C library (which eventually 12 | * calls main()). 13 | * After Reset the Cortex-M3 processor is in Thread mode, 14 | * priority is Privileged, and the Stack is set to Main. 15 | ****************************************************************************** 16 | * @attention 17 | * 18 | * Copyright (c) 2017-2021 STMicroelectronics. 19 | * All rights reserved. 20 | * 21 | * This software is licensed under terms that can be found in the LICENSE file 22 | * in the root directory of this software component. 23 | * If no LICENSE file comes with this software, it is provided AS-IS. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | .syntax unified 29 | .cpu cortex-m3 30 | .fpu softvfp 31 | .thumb 32 | 33 | .global g_pfnVectors 34 | .global Default_Handler 35 | 36 | /* start address for the initialization values of the .data section. 37 | defined in linker script */ 38 | .word _sidata 39 | /* start address for the .data section. defined in linker script */ 40 | .word _sdata 41 | /* end address for the .data section. defined in linker script */ 42 | .word _edata 43 | /* start address for the .bss section. defined in linker script */ 44 | .word _sbss 45 | /* end address for the .bss section. defined in linker script */ 46 | .word _ebss 47 | 48 | .equ BootRAM, 0xF108F85F 49 | /** 50 | * @brief This is the code that gets called when the processor first 51 | * starts execution following a reset event. Only the absolutely 52 | * necessary set is performed, after which the application 53 | * supplied main() routine is called. 54 | * @param None 55 | * @retval : None 56 | */ 57 | 58 | .section .text.Reset_Handler 59 | .weak Reset_Handler 60 | .type Reset_Handler, %function 61 | Reset_Handler: 62 | 63 | /* Call the clock system initialization function.*/ 64 | bl SystemInit 65 | 66 | /* Copy the data segment initializers from flash to SRAM */ 67 | ldr r0, =_sdata 68 | ldr r1, =_edata 69 | ldr r2, =_sidata 70 | movs r3, #0 71 | b LoopCopyDataInit 72 | 73 | CopyDataInit: 74 | ldr r4, [r2, r3] 75 | str r4, [r0, r3] 76 | adds r3, r3, #4 77 | 78 | LoopCopyDataInit: 79 | adds r4, r0, r3 80 | cmp r4, r1 81 | bcc CopyDataInit 82 | 83 | /* Zero fill the bss segment. */ 84 | ldr r2, =_sbss 85 | ldr r4, =_ebss 86 | movs r3, #0 87 | b LoopFillZerobss 88 | 89 | FillZerobss: 90 | str r3, [r2] 91 | adds r2, r2, #4 92 | 93 | LoopFillZerobss: 94 | cmp r2, r4 95 | bcc FillZerobss 96 | 97 | /* Call static constructors */ 98 | bl __libc_init_array 99 | /* Call the application's entry point.*/ 100 | bl main 101 | bx lr 102 | .size Reset_Handler, .-Reset_Handler 103 | 104 | /** 105 | * @brief This is the code that gets called when the processor receives an 106 | * unexpected interrupt. This simply enters an infinite loop, preserving 107 | * the system state for examination by a debugger. 108 | * 109 | * @param None 110 | * @retval : None 111 | */ 112 | .section .text.Default_Handler,"ax",%progbits 113 | Default_Handler: 114 | Infinite_Loop: 115 | b Infinite_Loop 116 | .size Default_Handler, .-Default_Handler 117 | /****************************************************************************** 118 | * 119 | * The minimal vector table for a Cortex M3. Note that the proper constructs 120 | * must be placed on this to ensure that it ends up at physical address 121 | * 0x0000.0000. 122 | * 123 | ******************************************************************************/ 124 | .section .isr_vector,"a",%progbits 125 | .type g_pfnVectors, %object 126 | .size g_pfnVectors, .-g_pfnVectors 127 | 128 | 129 | g_pfnVectors: 130 | 131 | .word _estack 132 | .word Reset_Handler 133 | .word NMI_Handler 134 | .word HardFault_Handler 135 | .word MemManage_Handler 136 | .word BusFault_Handler 137 | .word UsageFault_Handler 138 | .word 0 139 | .word 0 140 | .word 0 141 | .word 0 142 | .word SVC_Handler 143 | .word DebugMon_Handler 144 | .word 0 145 | .word PendSV_Handler 146 | .word SysTick_Handler 147 | .word WWDG_IRQHandler 148 | .word PVD_IRQHandler 149 | .word TAMPER_IRQHandler 150 | .word RTC_IRQHandler 151 | .word FLASH_IRQHandler 152 | .word RCC_IRQHandler 153 | .word EXTI0_IRQHandler 154 | .word EXTI1_IRQHandler 155 | .word EXTI2_IRQHandler 156 | .word EXTI3_IRQHandler 157 | .word EXTI4_IRQHandler 158 | .word DMA1_Channel1_IRQHandler 159 | .word DMA1_Channel2_IRQHandler 160 | .word DMA1_Channel3_IRQHandler 161 | .word DMA1_Channel4_IRQHandler 162 | .word DMA1_Channel5_IRQHandler 163 | .word DMA1_Channel6_IRQHandler 164 | .word DMA1_Channel7_IRQHandler 165 | .word ADC1_IRQHandler 166 | .word USB_HP_IRQHandler 167 | .word USB_LP_IRQHandler 168 | .word 0 169 | .word 0 170 | .word EXTI9_5_IRQHandler 171 | .word 0 172 | .word 0 173 | .word 0 174 | .word 0 175 | .word TIM2_IRQHandler 176 | .word TIM3_IRQHandler 177 | .word 0 178 | .word I2C1_EV_IRQHandler 179 | .word I2C1_ER_IRQHandler 180 | .word 0 181 | .word 0 182 | .word SPI1_IRQHandler 183 | .word 0 184 | .word USART1_IRQHandler 185 | .word USART2_IRQHandler 186 | .word 0 187 | .word EXTI15_10_IRQHandler 188 | .word RTC_Alarm_IRQHandler 189 | .word USBWakeUp_IRQHandler 190 | .word 0 191 | .word 0 192 | .word 0 193 | .word 0 194 | .word 0 195 | .word 0 196 | .word 0 197 | .word BootRAM /* @0x108. This is for boot in RAM mode for 198 | STM32F10x Low Density devices.*/ 199 | 200 | /******************************************************************************* 201 | * 202 | * Provide weak aliases for each Exception handler to the Default_Handler. 203 | * As they are weak aliases, any function with the same name will override 204 | * this definition. 205 | * 206 | *******************************************************************************/ 207 | 208 | .weak NMI_Handler 209 | .thumb_set NMI_Handler,Default_Handler 210 | 211 | .weak HardFault_Handler 212 | .thumb_set HardFault_Handler,Default_Handler 213 | 214 | .weak MemManage_Handler 215 | .thumb_set MemManage_Handler,Default_Handler 216 | 217 | .weak BusFault_Handler 218 | .thumb_set BusFault_Handler,Default_Handler 219 | 220 | .weak UsageFault_Handler 221 | .thumb_set UsageFault_Handler,Default_Handler 222 | 223 | .weak SVC_Handler 224 | .thumb_set SVC_Handler,Default_Handler 225 | 226 | .weak DebugMon_Handler 227 | .thumb_set DebugMon_Handler,Default_Handler 228 | 229 | .weak PendSV_Handler 230 | .thumb_set PendSV_Handler,Default_Handler 231 | 232 | .weak SysTick_Handler 233 | .thumb_set SysTick_Handler,Default_Handler 234 | 235 | .weak WWDG_IRQHandler 236 | .thumb_set WWDG_IRQHandler,Default_Handler 237 | 238 | .weak PVD_IRQHandler 239 | .thumb_set PVD_IRQHandler,Default_Handler 240 | 241 | .weak TAMPER_IRQHandler 242 | .thumb_set TAMPER_IRQHandler,Default_Handler 243 | 244 | .weak RTC_IRQHandler 245 | .thumb_set RTC_IRQHandler,Default_Handler 246 | 247 | .weak FLASH_IRQHandler 248 | .thumb_set FLASH_IRQHandler,Default_Handler 249 | 250 | .weak RCC_IRQHandler 251 | .thumb_set RCC_IRQHandler,Default_Handler 252 | 253 | .weak EXTI0_IRQHandler 254 | .thumb_set EXTI0_IRQHandler,Default_Handler 255 | 256 | .weak EXTI1_IRQHandler 257 | .thumb_set EXTI1_IRQHandler,Default_Handler 258 | 259 | .weak EXTI2_IRQHandler 260 | .thumb_set EXTI2_IRQHandler,Default_Handler 261 | 262 | .weak EXTI3_IRQHandler 263 | .thumb_set EXTI3_IRQHandler,Default_Handler 264 | 265 | .weak EXTI4_IRQHandler 266 | .thumb_set EXTI4_IRQHandler,Default_Handler 267 | 268 | .weak DMA1_Channel1_IRQHandler 269 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 270 | 271 | .weak DMA1_Channel2_IRQHandler 272 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler 273 | 274 | .weak DMA1_Channel3_IRQHandler 275 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler 276 | 277 | .weak DMA1_Channel4_IRQHandler 278 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler 279 | 280 | .weak DMA1_Channel5_IRQHandler 281 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler 282 | 283 | .weak DMA1_Channel6_IRQHandler 284 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler 285 | 286 | .weak DMA1_Channel7_IRQHandler 287 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler 288 | 289 | .weak ADC1_IRQHandler 290 | .thumb_set ADC1_IRQHandler,Default_Handler 291 | 292 | .weak USB_HP_IRQHandler 293 | .thumb_set USB_HP_IRQHandler,Default_Handler 294 | 295 | .weak USB_LP_IRQHandler 296 | .thumb_set USB_LP_IRQHandler,Default_Handler 297 | 298 | .weak EXTI9_5_IRQHandler 299 | .thumb_set EXTI9_5_IRQHandler,Default_Handler 300 | 301 | .weak TIM2_IRQHandler 302 | .thumb_set TIM2_IRQHandler,Default_Handler 303 | 304 | .weak TIM3_IRQHandler 305 | .thumb_set TIM3_IRQHandler,Default_Handler 306 | 307 | .weak I2C1_EV_IRQHandler 308 | .thumb_set I2C1_EV_IRQHandler,Default_Handler 309 | 310 | .weak I2C1_ER_IRQHandler 311 | .thumb_set I2C1_ER_IRQHandler,Default_Handler 312 | 313 | .weak SPI1_IRQHandler 314 | .thumb_set SPI1_IRQHandler,Default_Handler 315 | 316 | .weak USART1_IRQHandler 317 | .thumb_set USART1_IRQHandler,Default_Handler 318 | 319 | .weak USART2_IRQHandler 320 | .thumb_set USART2_IRQHandler,Default_Handler 321 | 322 | .weak EXTI15_10_IRQHandler 323 | .thumb_set EXTI15_10_IRQHandler,Default_Handler 324 | 325 | .weak RTC_Alarm_IRQHandler 326 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler 327 | 328 | .weak USBWakeUp_IRQHandler 329 | .thumb_set USBWakeUp_IRQHandler,Default_Handler 330 | 331 | -------------------------------------------------------------------------------- /Source/Templates/gcc/startup_stm32f102xb.s: -------------------------------------------------------------------------------- 1 | /** 2 | *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ 3 | * @file startup_stm32f102xb.s 4 | * @author MCD Application Team 5 | * @brief STM32F102xB Value Line Devices vector table for Atollic toolchain. 6 | * This module performs: 7 | * - Set the initial SP 8 | * - Set the initial PC == Reset_Handler, 9 | * - Set the vector table entries with the exceptions ISR address 10 | * - Configure the clock system 11 | * - Branches to main in the C library (which eventually 12 | * calls main()). 13 | * After Reset the Cortex-M3 processor is in Thread mode, 14 | * priority is Privileged, and the Stack is set to Main. 15 | ****************************************************************************** 16 | * @attention 17 | * 18 | * Copyright (c) 2017-2021 STMicroelectronics. 19 | * All rights reserved. 20 | * 21 | * This software is licensed under terms that can be found in the LICENSE file 22 | * in the root directory of this software component. 23 | * If no LICENSE file comes with this software, it is provided AS-IS. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | .syntax unified 29 | .cpu cortex-m3 30 | .fpu softvfp 31 | .thumb 32 | 33 | .global g_pfnVectors 34 | .global Default_Handler 35 | 36 | /* start address for the initialization values of the .data section. 37 | defined in linker script */ 38 | .word _sidata 39 | /* start address for the .data section. defined in linker script */ 40 | .word _sdata 41 | /* end address for the .data section. defined in linker script */ 42 | .word _edata 43 | /* start address for the .bss section. defined in linker script */ 44 | .word _sbss 45 | /* end address for the .bss section. defined in linker script */ 46 | .word _ebss 47 | 48 | .equ BootRAM, 0xF108F85F 49 | /** 50 | * @brief This is the code that gets called when the processor first 51 | * starts execution following a reset event. Only the absolutely 52 | * necessary set is performed, after which the application 53 | * supplied main() routine is called. 54 | * @param None 55 | * @retval : None 56 | */ 57 | 58 | .section .text.Reset_Handler 59 | .weak Reset_Handler 60 | .type Reset_Handler, %function 61 | Reset_Handler: 62 | 63 | /* Call the clock system initialization function.*/ 64 | bl SystemInit 65 | 66 | /* Copy the data segment initializers from flash to SRAM */ 67 | ldr r0, =_sdata 68 | ldr r1, =_edata 69 | ldr r2, =_sidata 70 | movs r3, #0 71 | b LoopCopyDataInit 72 | 73 | CopyDataInit: 74 | ldr r4, [r2, r3] 75 | str r4, [r0, r3] 76 | adds r3, r3, #4 77 | 78 | LoopCopyDataInit: 79 | adds r4, r0, r3 80 | cmp r4, r1 81 | bcc CopyDataInit 82 | 83 | /* Zero fill the bss segment. */ 84 | ldr r2, =_sbss 85 | ldr r4, =_ebss 86 | movs r3, #0 87 | b LoopFillZerobss 88 | 89 | FillZerobss: 90 | str r3, [r2] 91 | adds r2, r2, #4 92 | 93 | LoopFillZerobss: 94 | cmp r2, r4 95 | bcc FillZerobss 96 | 97 | /* Call static constructors */ 98 | bl __libc_init_array 99 | /* Call the application's entry point.*/ 100 | bl main 101 | bx lr 102 | .size Reset_Handler, .-Reset_Handler 103 | 104 | /** 105 | * @brief This is the code that gets called when the processor receives an 106 | * unexpected interrupt. This simply enters an infinite loop, preserving 107 | * the system state for examination by a debugger. 108 | * 109 | * @param None 110 | * @retval : None 111 | */ 112 | .section .text.Default_Handler,"ax",%progbits 113 | Default_Handler: 114 | Infinite_Loop: 115 | b Infinite_Loop 116 | .size Default_Handler, .-Default_Handler 117 | /****************************************************************************** 118 | * 119 | * The minimal vector table for a Cortex M3. Note that the proper constructs 120 | * must be placed on this to ensure that it ends up at physical address 121 | * 0x0000.0000. 122 | * 123 | ******************************************************************************/ 124 | .section .isr_vector,"a",%progbits 125 | .type g_pfnVectors, %object 126 | .size g_pfnVectors, .-g_pfnVectors 127 | 128 | 129 | g_pfnVectors: 130 | 131 | .word _estack 132 | .word Reset_Handler 133 | .word NMI_Handler 134 | .word HardFault_Handler 135 | .word MemManage_Handler 136 | .word BusFault_Handler 137 | .word UsageFault_Handler 138 | .word 0 139 | .word 0 140 | .word 0 141 | .word 0 142 | .word SVC_Handler 143 | .word DebugMon_Handler 144 | .word 0 145 | .word PendSV_Handler 146 | .word SysTick_Handler 147 | .word WWDG_IRQHandler 148 | .word PVD_IRQHandler 149 | .word TAMPER_IRQHandler 150 | .word RTC_IRQHandler 151 | .word FLASH_IRQHandler 152 | .word RCC_IRQHandler 153 | .word EXTI0_IRQHandler 154 | .word EXTI1_IRQHandler 155 | .word EXTI2_IRQHandler 156 | .word EXTI3_IRQHandler 157 | .word EXTI4_IRQHandler 158 | .word DMA1_Channel1_IRQHandler 159 | .word DMA1_Channel2_IRQHandler 160 | .word DMA1_Channel3_IRQHandler 161 | .word DMA1_Channel4_IRQHandler 162 | .word DMA1_Channel5_IRQHandler 163 | .word DMA1_Channel6_IRQHandler 164 | .word DMA1_Channel7_IRQHandler 165 | .word ADC1_IRQHandler 166 | .word USB_HP_IRQHandler 167 | .word USB_LP_IRQHandler 168 | .word 0 169 | .word 0 170 | .word EXTI9_5_IRQHandler 171 | .word 0 172 | .word 0 173 | .word 0 174 | .word 0 175 | .word TIM2_IRQHandler 176 | .word TIM3_IRQHandler 177 | .word TIM4_IRQHandler 178 | .word I2C1_EV_IRQHandler 179 | .word I2C1_ER_IRQHandler 180 | .word I2C2_EV_IRQHandler 181 | .word I2C2_ER_IRQHandler 182 | .word SPI1_IRQHandler 183 | .word SPI2_IRQHandler 184 | .word USART1_IRQHandler 185 | .word USART2_IRQHandler 186 | .word USART3_IRQHandler 187 | .word EXTI15_10_IRQHandler 188 | .word RTC_Alarm_IRQHandler 189 | .word USBWakeUp_IRQHandler 190 | .word 0 191 | .word 0 192 | .word 0 193 | .word 0 194 | .word 0 195 | .word 0 196 | .word 0 197 | .word BootRAM /* @0x108. This is for boot in RAM mode for 198 | STM32F10x Medium Density devices. */ 199 | 200 | /******************************************************************************* 201 | * 202 | * Provide weak aliases for each Exception handler to the Default_Handler. 203 | * As they are weak aliases, any function with the same name will override 204 | * this definition. 205 | * 206 | *******************************************************************************/ 207 | 208 | .weak NMI_Handler 209 | .thumb_set NMI_Handler,Default_Handler 210 | 211 | .weak HardFault_Handler 212 | .thumb_set HardFault_Handler,Default_Handler 213 | 214 | .weak MemManage_Handler 215 | .thumb_set MemManage_Handler,Default_Handler 216 | 217 | .weak BusFault_Handler 218 | .thumb_set BusFault_Handler,Default_Handler 219 | 220 | .weak UsageFault_Handler 221 | .thumb_set UsageFault_Handler,Default_Handler 222 | 223 | .weak SVC_Handler 224 | .thumb_set SVC_Handler,Default_Handler 225 | 226 | .weak DebugMon_Handler 227 | .thumb_set DebugMon_Handler,Default_Handler 228 | 229 | .weak PendSV_Handler 230 | .thumb_set PendSV_Handler,Default_Handler 231 | 232 | .weak SysTick_Handler 233 | .thumb_set SysTick_Handler,Default_Handler 234 | 235 | .weak WWDG_IRQHandler 236 | .thumb_set WWDG_IRQHandler,Default_Handler 237 | 238 | .weak PVD_IRQHandler 239 | .thumb_set PVD_IRQHandler,Default_Handler 240 | 241 | .weak TAMPER_IRQHandler 242 | .thumb_set TAMPER_IRQHandler,Default_Handler 243 | 244 | .weak RTC_IRQHandler 245 | .thumb_set RTC_IRQHandler,Default_Handler 246 | 247 | .weak FLASH_IRQHandler 248 | .thumb_set FLASH_IRQHandler,Default_Handler 249 | 250 | .weak RCC_IRQHandler 251 | .thumb_set RCC_IRQHandler,Default_Handler 252 | 253 | .weak EXTI0_IRQHandler 254 | .thumb_set EXTI0_IRQHandler,Default_Handler 255 | 256 | .weak EXTI1_IRQHandler 257 | .thumb_set EXTI1_IRQHandler,Default_Handler 258 | 259 | .weak EXTI2_IRQHandler 260 | .thumb_set EXTI2_IRQHandler,Default_Handler 261 | 262 | .weak EXTI3_IRQHandler 263 | .thumb_set EXTI3_IRQHandler,Default_Handler 264 | 265 | .weak EXTI4_IRQHandler 266 | .thumb_set EXTI4_IRQHandler,Default_Handler 267 | 268 | .weak DMA1_Channel1_IRQHandler 269 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 270 | 271 | .weak DMA1_Channel2_IRQHandler 272 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler 273 | 274 | .weak DMA1_Channel3_IRQHandler 275 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler 276 | 277 | .weak DMA1_Channel4_IRQHandler 278 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler 279 | 280 | .weak DMA1_Channel5_IRQHandler 281 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler 282 | 283 | .weak DMA1_Channel6_IRQHandler 284 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler 285 | 286 | .weak DMA1_Channel7_IRQHandler 287 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler 288 | 289 | .weak ADC1_IRQHandler 290 | .thumb_set ADC1_IRQHandler,Default_Handler 291 | 292 | .weak USB_HP_IRQHandler 293 | .thumb_set USB_HP_IRQHandler,Default_Handler 294 | 295 | .weak USB_LP_IRQHandler 296 | .thumb_set USB_LP_IRQHandler,Default_Handler 297 | 298 | .weak EXTI9_5_IRQHandler 299 | .thumb_set EXTI9_5_IRQHandler,Default_Handler 300 | 301 | .weak TIM2_IRQHandler 302 | .thumb_set TIM2_IRQHandler,Default_Handler 303 | 304 | .weak TIM3_IRQHandler 305 | .thumb_set TIM3_IRQHandler,Default_Handler 306 | 307 | .weak TIM4_IRQHandler 308 | .thumb_set TIM4_IRQHandler,Default_Handler 309 | 310 | .weak I2C1_EV_IRQHandler 311 | .thumb_set I2C1_EV_IRQHandler,Default_Handler 312 | 313 | .weak I2C1_ER_IRQHandler 314 | .thumb_set I2C1_ER_IRQHandler,Default_Handler 315 | 316 | .weak I2C2_EV_IRQHandler 317 | .thumb_set I2C2_EV_IRQHandler,Default_Handler 318 | 319 | .weak I2C2_ER_IRQHandler 320 | .thumb_set I2C2_ER_IRQHandler,Default_Handler 321 | 322 | .weak SPI1_IRQHandler 323 | .thumb_set SPI1_IRQHandler,Default_Handler 324 | 325 | .weak SPI2_IRQHandler 326 | .thumb_set SPI2_IRQHandler,Default_Handler 327 | 328 | .weak USART1_IRQHandler 329 | .thumb_set USART1_IRQHandler,Default_Handler 330 | 331 | .weak USART2_IRQHandler 332 | .thumb_set USART2_IRQHandler,Default_Handler 333 | 334 | .weak USART3_IRQHandler 335 | .thumb_set USART3_IRQHandler,Default_Handler 336 | 337 | .weak EXTI15_10_IRQHandler 338 | .thumb_set EXTI15_10_IRQHandler,Default_Handler 339 | 340 | .weak RTC_Alarm_IRQHandler 341 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler 342 | 343 | .weak USBWakeUp_IRQHandler 344 | .thumb_set USBWakeUp_IRQHandler,Default_Handler 345 | 346 | 347 | -------------------------------------------------------------------------------- /Source/Templates/gcc/startup_stm32f103x6.s: -------------------------------------------------------------------------------- 1 | /** 2 | *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ 3 | * @file startup_stm32f103x6.s 4 | * @author MCD Application Team 5 | * @brief STM32F103x6 Devices vector table for Atollic toolchain. 6 | * This module performs: 7 | * - Set the initial SP 8 | * - Set the initial PC == Reset_Handler, 9 | * - Set the vector table entries with the exceptions ISR address 10 | * - Configure the clock system 11 | * - Branches to main in the C library (which eventually 12 | * calls main()). 13 | * After Reset the Cortex-M3 processor is in Thread mode, 14 | * priority is Privileged, and the Stack is set to Main. 15 | ****************************************************************************** 16 | * @attention 17 | * 18 | * Copyright (c) 2017-2021 STMicroelectronics. 19 | * All rights reserved. 20 | * 21 | * This software is licensed under terms that can be found in the LICENSE file 22 | * in the root directory of this software component. 23 | * If no LICENSE file comes with this software, it is provided AS-IS. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | .syntax unified 29 | .cpu cortex-m3 30 | .fpu softvfp 31 | .thumb 32 | 33 | .global g_pfnVectors 34 | .global Default_Handler 35 | 36 | /* start address for the initialization values of the .data section. 37 | defined in linker script */ 38 | .word _sidata 39 | /* start address for the .data section. defined in linker script */ 40 | .word _sdata 41 | /* end address for the .data section. defined in linker script */ 42 | .word _edata 43 | /* start address for the .bss section. defined in linker script */ 44 | .word _sbss 45 | /* end address for the .bss section. defined in linker script */ 46 | .word _ebss 47 | 48 | .equ BootRAM, 0xF108F85F 49 | /** 50 | * @brief This is the code that gets called when the processor first 51 | * starts execution following a reset event. Only the absolutely 52 | * necessary set is performed, after which the application 53 | * supplied main() routine is called. 54 | * @param None 55 | * @retval : None 56 | */ 57 | 58 | .section .text.Reset_Handler 59 | .weak Reset_Handler 60 | .type Reset_Handler, %function 61 | Reset_Handler: 62 | 63 | /* Call the clock system initialization function.*/ 64 | bl SystemInit 65 | 66 | /* Copy the data segment initializers from flash to SRAM */ 67 | ldr r0, =_sdata 68 | ldr r1, =_edata 69 | ldr r2, =_sidata 70 | movs r3, #0 71 | b LoopCopyDataInit 72 | 73 | CopyDataInit: 74 | ldr r4, [r2, r3] 75 | str r4, [r0, r3] 76 | adds r3, r3, #4 77 | 78 | LoopCopyDataInit: 79 | adds r4, r0, r3 80 | cmp r4, r1 81 | bcc CopyDataInit 82 | 83 | /* Zero fill the bss segment. */ 84 | ldr r2, =_sbss 85 | ldr r4, =_ebss 86 | movs r3, #0 87 | b LoopFillZerobss 88 | 89 | FillZerobss: 90 | str r3, [r2] 91 | adds r2, r2, #4 92 | 93 | LoopFillZerobss: 94 | cmp r2, r4 95 | bcc FillZerobss 96 | 97 | /* Call static constructors */ 98 | bl __libc_init_array 99 | /* Call the application's entry point.*/ 100 | bl main 101 | bx lr 102 | .size Reset_Handler, .-Reset_Handler 103 | 104 | /** 105 | * @brief This is the code that gets called when the processor receives an 106 | * unexpected interrupt. This simply enters an infinite loop, preserving 107 | * the system state for examination by a debugger. 108 | * 109 | * @param None 110 | * @retval : None 111 | */ 112 | .section .text.Default_Handler,"ax",%progbits 113 | Default_Handler: 114 | Infinite_Loop: 115 | b Infinite_Loop 116 | .size Default_Handler, .-Default_Handler 117 | /****************************************************************************** 118 | * 119 | * The minimal vector table for a Cortex M3. Note that the proper constructs 120 | * must be placed on this to ensure that it ends up at physical address 121 | * 0x0000.0000. 122 | * 123 | ******************************************************************************/ 124 | .section .isr_vector,"a",%progbits 125 | .type g_pfnVectors, %object 126 | .size g_pfnVectors, .-g_pfnVectors 127 | 128 | 129 | g_pfnVectors: 130 | 131 | .word _estack 132 | .word Reset_Handler 133 | .word NMI_Handler 134 | .word HardFault_Handler 135 | .word MemManage_Handler 136 | .word BusFault_Handler 137 | .word UsageFault_Handler 138 | .word 0 139 | .word 0 140 | .word 0 141 | .word 0 142 | .word SVC_Handler 143 | .word DebugMon_Handler 144 | .word 0 145 | .word PendSV_Handler 146 | .word SysTick_Handler 147 | .word WWDG_IRQHandler 148 | .word PVD_IRQHandler 149 | .word TAMPER_IRQHandler 150 | .word RTC_IRQHandler 151 | .word FLASH_IRQHandler 152 | .word RCC_IRQHandler 153 | .word EXTI0_IRQHandler 154 | .word EXTI1_IRQHandler 155 | .word EXTI2_IRQHandler 156 | .word EXTI3_IRQHandler 157 | .word EXTI4_IRQHandler 158 | .word DMA1_Channel1_IRQHandler 159 | .word DMA1_Channel2_IRQHandler 160 | .word DMA1_Channel3_IRQHandler 161 | .word DMA1_Channel4_IRQHandler 162 | .word DMA1_Channel5_IRQHandler 163 | .word DMA1_Channel6_IRQHandler 164 | .word DMA1_Channel7_IRQHandler 165 | .word ADC1_2_IRQHandler 166 | .word USB_HP_CAN1_TX_IRQHandler 167 | .word USB_LP_CAN1_RX0_IRQHandler 168 | .word CAN1_RX1_IRQHandler 169 | .word CAN1_SCE_IRQHandler 170 | .word EXTI9_5_IRQHandler 171 | .word TIM1_BRK_IRQHandler 172 | .word TIM1_UP_IRQHandler 173 | .word TIM1_TRG_COM_IRQHandler 174 | .word TIM1_CC_IRQHandler 175 | .word TIM2_IRQHandler 176 | .word TIM3_IRQHandler 177 | .word 0 178 | .word I2C1_EV_IRQHandler 179 | .word I2C1_ER_IRQHandler 180 | .word 0 181 | .word 0 182 | .word SPI1_IRQHandler 183 | .word 0 184 | .word USART1_IRQHandler 185 | .word USART2_IRQHandler 186 | .word 0 187 | .word EXTI15_10_IRQHandler 188 | .word RTC_Alarm_IRQHandler 189 | .word USBWakeUp_IRQHandler 190 | .word 0 191 | .word 0 192 | .word 0 193 | .word 0 194 | .word 0 195 | .word 0 196 | .word 0 197 | .word BootRAM /* @0x108. This is for boot in RAM mode for 198 | STM32F10x Low Density devices.*/ 199 | 200 | /******************************************************************************* 201 | * 202 | * Provide weak aliases for each Exception handler to the Default_Handler. 203 | * As they are weak aliases, any function with the same name will override 204 | * this definition. 205 | * 206 | *******************************************************************************/ 207 | 208 | .weak NMI_Handler 209 | .thumb_set NMI_Handler,Default_Handler 210 | 211 | .weak HardFault_Handler 212 | .thumb_set HardFault_Handler,Default_Handler 213 | 214 | .weak MemManage_Handler 215 | .thumb_set MemManage_Handler,Default_Handler 216 | 217 | .weak BusFault_Handler 218 | .thumb_set BusFault_Handler,Default_Handler 219 | 220 | .weak UsageFault_Handler 221 | .thumb_set UsageFault_Handler,Default_Handler 222 | 223 | .weak SVC_Handler 224 | .thumb_set SVC_Handler,Default_Handler 225 | 226 | .weak DebugMon_Handler 227 | .thumb_set DebugMon_Handler,Default_Handler 228 | 229 | .weak PendSV_Handler 230 | .thumb_set PendSV_Handler,Default_Handler 231 | 232 | .weak SysTick_Handler 233 | .thumb_set SysTick_Handler,Default_Handler 234 | 235 | .weak WWDG_IRQHandler 236 | .thumb_set WWDG_IRQHandler,Default_Handler 237 | 238 | .weak PVD_IRQHandler 239 | .thumb_set PVD_IRQHandler,Default_Handler 240 | 241 | .weak TAMPER_IRQHandler 242 | .thumb_set TAMPER_IRQHandler,Default_Handler 243 | 244 | .weak RTC_IRQHandler 245 | .thumb_set RTC_IRQHandler,Default_Handler 246 | 247 | .weak FLASH_IRQHandler 248 | .thumb_set FLASH_IRQHandler,Default_Handler 249 | 250 | .weak RCC_IRQHandler 251 | .thumb_set RCC_IRQHandler,Default_Handler 252 | 253 | .weak EXTI0_IRQHandler 254 | .thumb_set EXTI0_IRQHandler,Default_Handler 255 | 256 | .weak EXTI1_IRQHandler 257 | .thumb_set EXTI1_IRQHandler,Default_Handler 258 | 259 | .weak EXTI2_IRQHandler 260 | .thumb_set EXTI2_IRQHandler,Default_Handler 261 | 262 | .weak EXTI3_IRQHandler 263 | .thumb_set EXTI3_IRQHandler,Default_Handler 264 | 265 | .weak EXTI4_IRQHandler 266 | .thumb_set EXTI4_IRQHandler,Default_Handler 267 | 268 | .weak DMA1_Channel1_IRQHandler 269 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 270 | 271 | .weak DMA1_Channel2_IRQHandler 272 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler 273 | 274 | .weak DMA1_Channel3_IRQHandler 275 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler 276 | 277 | .weak DMA1_Channel4_IRQHandler 278 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler 279 | 280 | .weak DMA1_Channel5_IRQHandler 281 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler 282 | 283 | .weak DMA1_Channel6_IRQHandler 284 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler 285 | 286 | .weak DMA1_Channel7_IRQHandler 287 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler 288 | 289 | .weak ADC1_2_IRQHandler 290 | .thumb_set ADC1_2_IRQHandler,Default_Handler 291 | 292 | .weak USB_HP_CAN1_TX_IRQHandler 293 | .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler 294 | 295 | .weak USB_LP_CAN1_RX0_IRQHandler 296 | .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler 297 | 298 | .weak CAN1_RX1_IRQHandler 299 | .thumb_set CAN1_RX1_IRQHandler,Default_Handler 300 | 301 | .weak CAN1_SCE_IRQHandler 302 | .thumb_set CAN1_SCE_IRQHandler,Default_Handler 303 | 304 | .weak EXTI9_5_IRQHandler 305 | .thumb_set EXTI9_5_IRQHandler,Default_Handler 306 | 307 | .weak TIM1_BRK_IRQHandler 308 | .thumb_set TIM1_BRK_IRQHandler,Default_Handler 309 | 310 | .weak TIM1_UP_IRQHandler 311 | .thumb_set TIM1_UP_IRQHandler,Default_Handler 312 | 313 | .weak TIM1_TRG_COM_IRQHandler 314 | .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler 315 | 316 | .weak TIM1_CC_IRQHandler 317 | .thumb_set TIM1_CC_IRQHandler,Default_Handler 318 | 319 | .weak TIM2_IRQHandler 320 | .thumb_set TIM2_IRQHandler,Default_Handler 321 | 322 | .weak TIM3_IRQHandler 323 | .thumb_set TIM3_IRQHandler,Default_Handler 324 | 325 | .weak I2C1_EV_IRQHandler 326 | .thumb_set I2C1_EV_IRQHandler,Default_Handler 327 | 328 | .weak I2C1_ER_IRQHandler 329 | .thumb_set I2C1_ER_IRQHandler,Default_Handler 330 | 331 | .weak SPI1_IRQHandler 332 | .thumb_set SPI1_IRQHandler,Default_Handler 333 | 334 | .weak USART1_IRQHandler 335 | .thumb_set USART1_IRQHandler,Default_Handler 336 | 337 | .weak USART2_IRQHandler 338 | .thumb_set USART2_IRQHandler,Default_Handler 339 | 340 | .weak EXTI15_10_IRQHandler 341 | .thumb_set EXTI15_10_IRQHandler,Default_Handler 342 | 343 | .weak RTC_Alarm_IRQHandler 344 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler 345 | 346 | .weak USBWakeUp_IRQHandler 347 | .thumb_set USBWakeUp_IRQHandler,Default_Handler 348 | 349 | -------------------------------------------------------------------------------- /Source/Templates/gcc/startup_stm32f103xb.s: -------------------------------------------------------------------------------- 1 | /** 2 | *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ 3 | * @file startup_stm32f103xb.s 4 | * @author MCD Application Team 5 | * @brief STM32F103xB Devices vector table for Atollic toolchain. 6 | * This module performs: 7 | * - Set the initial SP 8 | * - Set the initial PC == Reset_Handler, 9 | * - Set the vector table entries with the exceptions ISR address 10 | * - Configure the clock system 11 | * - Branches to main in the C library (which eventually 12 | * calls main()). 13 | * After Reset the Cortex-M3 processor is in Thread mode, 14 | * priority is Privileged, and the Stack is set to Main. 15 | ****************************************************************************** 16 | * @attention 17 | * 18 | * Copyright (c) 2017-2021 STMicroelectronics. 19 | * All rights reserved. 20 | * 21 | * This software is licensed under terms that can be found in the LICENSE file 22 | * in the root directory of this software component. 23 | * If no LICENSE file comes with this software, it is provided AS-IS. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | .syntax unified 29 | .cpu cortex-m3 30 | .fpu softvfp 31 | .thumb 32 | 33 | .global g_pfnVectors 34 | .global Default_Handler 35 | 36 | /* start address for the initialization values of the .data section. 37 | defined in linker script */ 38 | .word _sidata 39 | /* start address for the .data section. defined in linker script */ 40 | .word _sdata 41 | /* end address for the .data section. defined in linker script */ 42 | .word _edata 43 | /* start address for the .bss section. defined in linker script */ 44 | .word _sbss 45 | /* end address for the .bss section. defined in linker script */ 46 | .word _ebss 47 | 48 | .equ BootRAM, 0xF108F85F 49 | /** 50 | * @brief This is the code that gets called when the processor first 51 | * starts execution following a reset event. Only the absolutely 52 | * necessary set is performed, after which the application 53 | * supplied main() routine is called. 54 | * @param None 55 | * @retval : None 56 | */ 57 | 58 | .section .text.Reset_Handler 59 | .weak Reset_Handler 60 | .type Reset_Handler, %function 61 | Reset_Handler: 62 | 63 | /* Call the clock system initialization function.*/ 64 | bl SystemInit 65 | 66 | /* Copy the data segment initializers from flash to SRAM */ 67 | ldr r0, =_sdata 68 | ldr r1, =_edata 69 | ldr r2, =_sidata 70 | movs r3, #0 71 | b LoopCopyDataInit 72 | 73 | CopyDataInit: 74 | ldr r4, [r2, r3] 75 | str r4, [r0, r3] 76 | adds r3, r3, #4 77 | 78 | LoopCopyDataInit: 79 | adds r4, r0, r3 80 | cmp r4, r1 81 | bcc CopyDataInit 82 | 83 | /* Zero fill the bss segment. */ 84 | ldr r2, =_sbss 85 | ldr r4, =_ebss 86 | movs r3, #0 87 | b LoopFillZerobss 88 | 89 | FillZerobss: 90 | str r3, [r2] 91 | adds r2, r2, #4 92 | 93 | LoopFillZerobss: 94 | cmp r2, r4 95 | bcc FillZerobss 96 | 97 | /* Call static constructors */ 98 | bl __libc_init_array 99 | /* Call the application's entry point.*/ 100 | bl main 101 | bx lr 102 | .size Reset_Handler, .-Reset_Handler 103 | 104 | /** 105 | * @brief This is the code that gets called when the processor receives an 106 | * unexpected interrupt. This simply enters an infinite loop, preserving 107 | * the system state for examination by a debugger. 108 | * 109 | * @param None 110 | * @retval : None 111 | */ 112 | .section .text.Default_Handler,"ax",%progbits 113 | Default_Handler: 114 | Infinite_Loop: 115 | b Infinite_Loop 116 | .size Default_Handler, .-Default_Handler 117 | /****************************************************************************** 118 | * 119 | * The minimal vector table for a Cortex M3. Note that the proper constructs 120 | * must be placed on this to ensure that it ends up at physical address 121 | * 0x0000.0000. 122 | * 123 | ******************************************************************************/ 124 | .section .isr_vector,"a",%progbits 125 | .type g_pfnVectors, %object 126 | .size g_pfnVectors, .-g_pfnVectors 127 | 128 | 129 | g_pfnVectors: 130 | 131 | .word _estack 132 | .word Reset_Handler 133 | .word NMI_Handler 134 | .word HardFault_Handler 135 | .word MemManage_Handler 136 | .word BusFault_Handler 137 | .word UsageFault_Handler 138 | .word 0 139 | .word 0 140 | .word 0 141 | .word 0 142 | .word SVC_Handler 143 | .word DebugMon_Handler 144 | .word 0 145 | .word PendSV_Handler 146 | .word SysTick_Handler 147 | .word WWDG_IRQHandler 148 | .word PVD_IRQHandler 149 | .word TAMPER_IRQHandler 150 | .word RTC_IRQHandler 151 | .word FLASH_IRQHandler 152 | .word RCC_IRQHandler 153 | .word EXTI0_IRQHandler 154 | .word EXTI1_IRQHandler 155 | .word EXTI2_IRQHandler 156 | .word EXTI3_IRQHandler 157 | .word EXTI4_IRQHandler 158 | .word DMA1_Channel1_IRQHandler 159 | .word DMA1_Channel2_IRQHandler 160 | .word DMA1_Channel3_IRQHandler 161 | .word DMA1_Channel4_IRQHandler 162 | .word DMA1_Channel5_IRQHandler 163 | .word DMA1_Channel6_IRQHandler 164 | .word DMA1_Channel7_IRQHandler 165 | .word ADC1_2_IRQHandler 166 | .word USB_HP_CAN1_TX_IRQHandler 167 | .word USB_LP_CAN1_RX0_IRQHandler 168 | .word CAN1_RX1_IRQHandler 169 | .word CAN1_SCE_IRQHandler 170 | .word EXTI9_5_IRQHandler 171 | .word TIM1_BRK_IRQHandler 172 | .word TIM1_UP_IRQHandler 173 | .word TIM1_TRG_COM_IRQHandler 174 | .word TIM1_CC_IRQHandler 175 | .word TIM2_IRQHandler 176 | .word TIM3_IRQHandler 177 | .word TIM4_IRQHandler 178 | .word I2C1_EV_IRQHandler 179 | .word I2C1_ER_IRQHandler 180 | .word I2C2_EV_IRQHandler 181 | .word I2C2_ER_IRQHandler 182 | .word SPI1_IRQHandler 183 | .word SPI2_IRQHandler 184 | .word USART1_IRQHandler 185 | .word USART2_IRQHandler 186 | .word USART3_IRQHandler 187 | .word EXTI15_10_IRQHandler 188 | .word RTC_Alarm_IRQHandler 189 | .word USBWakeUp_IRQHandler 190 | .word 0 191 | .word 0 192 | .word 0 193 | .word 0 194 | .word 0 195 | .word 0 196 | .word 0 197 | .word BootRAM /* @0x108. This is for boot in RAM mode for 198 | STM32F10x Medium Density devices. */ 199 | 200 | /******************************************************************************* 201 | * 202 | * Provide weak aliases for each Exception handler to the Default_Handler. 203 | * As they are weak aliases, any function with the same name will override 204 | * this definition. 205 | * 206 | *******************************************************************************/ 207 | 208 | .weak NMI_Handler 209 | .thumb_set NMI_Handler,Default_Handler 210 | 211 | .weak HardFault_Handler 212 | .thumb_set HardFault_Handler,Default_Handler 213 | 214 | .weak MemManage_Handler 215 | .thumb_set MemManage_Handler,Default_Handler 216 | 217 | .weak BusFault_Handler 218 | .thumb_set BusFault_Handler,Default_Handler 219 | 220 | .weak UsageFault_Handler 221 | .thumb_set UsageFault_Handler,Default_Handler 222 | 223 | .weak SVC_Handler 224 | .thumb_set SVC_Handler,Default_Handler 225 | 226 | .weak DebugMon_Handler 227 | .thumb_set DebugMon_Handler,Default_Handler 228 | 229 | .weak PendSV_Handler 230 | .thumb_set PendSV_Handler,Default_Handler 231 | 232 | .weak SysTick_Handler 233 | .thumb_set SysTick_Handler,Default_Handler 234 | 235 | .weak WWDG_IRQHandler 236 | .thumb_set WWDG_IRQHandler,Default_Handler 237 | 238 | .weak PVD_IRQHandler 239 | .thumb_set PVD_IRQHandler,Default_Handler 240 | 241 | .weak TAMPER_IRQHandler 242 | .thumb_set TAMPER_IRQHandler,Default_Handler 243 | 244 | .weak RTC_IRQHandler 245 | .thumb_set RTC_IRQHandler,Default_Handler 246 | 247 | .weak FLASH_IRQHandler 248 | .thumb_set FLASH_IRQHandler,Default_Handler 249 | 250 | .weak RCC_IRQHandler 251 | .thumb_set RCC_IRQHandler,Default_Handler 252 | 253 | .weak EXTI0_IRQHandler 254 | .thumb_set EXTI0_IRQHandler,Default_Handler 255 | 256 | .weak EXTI1_IRQHandler 257 | .thumb_set EXTI1_IRQHandler,Default_Handler 258 | 259 | .weak EXTI2_IRQHandler 260 | .thumb_set EXTI2_IRQHandler,Default_Handler 261 | 262 | .weak EXTI3_IRQHandler 263 | .thumb_set EXTI3_IRQHandler,Default_Handler 264 | 265 | .weak EXTI4_IRQHandler 266 | .thumb_set EXTI4_IRQHandler,Default_Handler 267 | 268 | .weak DMA1_Channel1_IRQHandler 269 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 270 | 271 | .weak DMA1_Channel2_IRQHandler 272 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler 273 | 274 | .weak DMA1_Channel3_IRQHandler 275 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler 276 | 277 | .weak DMA1_Channel4_IRQHandler 278 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler 279 | 280 | .weak DMA1_Channel5_IRQHandler 281 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler 282 | 283 | .weak DMA1_Channel6_IRQHandler 284 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler 285 | 286 | .weak DMA1_Channel7_IRQHandler 287 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler 288 | 289 | .weak ADC1_2_IRQHandler 290 | .thumb_set ADC1_2_IRQHandler,Default_Handler 291 | 292 | .weak USB_HP_CAN1_TX_IRQHandler 293 | .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler 294 | 295 | .weak USB_LP_CAN1_RX0_IRQHandler 296 | .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler 297 | 298 | .weak CAN1_RX1_IRQHandler 299 | .thumb_set CAN1_RX1_IRQHandler,Default_Handler 300 | 301 | .weak CAN1_SCE_IRQHandler 302 | .thumb_set CAN1_SCE_IRQHandler,Default_Handler 303 | 304 | .weak EXTI9_5_IRQHandler 305 | .thumb_set EXTI9_5_IRQHandler,Default_Handler 306 | 307 | .weak TIM1_BRK_IRQHandler 308 | .thumb_set TIM1_BRK_IRQHandler,Default_Handler 309 | 310 | .weak TIM1_UP_IRQHandler 311 | .thumb_set TIM1_UP_IRQHandler,Default_Handler 312 | 313 | .weak TIM1_TRG_COM_IRQHandler 314 | .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler 315 | 316 | .weak TIM1_CC_IRQHandler 317 | .thumb_set TIM1_CC_IRQHandler,Default_Handler 318 | 319 | .weak TIM2_IRQHandler 320 | .thumb_set TIM2_IRQHandler,Default_Handler 321 | 322 | .weak TIM3_IRQHandler 323 | .thumb_set TIM3_IRQHandler,Default_Handler 324 | 325 | .weak TIM4_IRQHandler 326 | .thumb_set TIM4_IRQHandler,Default_Handler 327 | 328 | .weak I2C1_EV_IRQHandler 329 | .thumb_set I2C1_EV_IRQHandler,Default_Handler 330 | 331 | .weak I2C1_ER_IRQHandler 332 | .thumb_set I2C1_ER_IRQHandler,Default_Handler 333 | 334 | .weak I2C2_EV_IRQHandler 335 | .thumb_set I2C2_EV_IRQHandler,Default_Handler 336 | 337 | .weak I2C2_ER_IRQHandler 338 | .thumb_set I2C2_ER_IRQHandler,Default_Handler 339 | 340 | .weak SPI1_IRQHandler 341 | .thumb_set SPI1_IRQHandler,Default_Handler 342 | 343 | .weak SPI2_IRQHandler 344 | .thumb_set SPI2_IRQHandler,Default_Handler 345 | 346 | .weak USART1_IRQHandler 347 | .thumb_set USART1_IRQHandler,Default_Handler 348 | 349 | .weak USART2_IRQHandler 350 | .thumb_set USART2_IRQHandler,Default_Handler 351 | 352 | .weak USART3_IRQHandler 353 | .thumb_set USART3_IRQHandler,Default_Handler 354 | 355 | .weak EXTI15_10_IRQHandler 356 | .thumb_set EXTI15_10_IRQHandler,Default_Handler 357 | 358 | .weak RTC_Alarm_IRQHandler 359 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler 360 | 361 | .weak USBWakeUp_IRQHandler 362 | .thumb_set USBWakeUp_IRQHandler,Default_Handler 363 | 364 | 365 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f100xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f100xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f100xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f100xe_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f101x6_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f101x6_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f101xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f101xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f101xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f101xe_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f101xg_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f101xg_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f102x6_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f102x6_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f102xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f102xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f103x6_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f103x6_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f103xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f103xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f103xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f103xe_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f103xg_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f103xg_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f105xc_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f105xc_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f107xc_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Source/Templates/iar/linker/stm32f107xc_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /_htmresc/favicon.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/cmsis-device-f1/c8e9a4a4f16b6d2cb2a2083cbe5161025280fb22/_htmresc/favicon.png -------------------------------------------------------------------------------- /_htmresc/st_logo_2020.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/cmsis-device-f1/c8e9a4a4f16b6d2cb2a2083cbe5161025280fb22/_htmresc/st_logo_2020.png --------------------------------------------------------------------------------