├── .github ├── ISSUE_TEMPLATE │ ├── bug_report.md │ └── other-issue.md └── PULL_REQUEST_TEMPLATE.md ├── CODE_OF_CONDUCT.md ├── CONTRIBUTING.md ├── Inc ├── Legacy │ ├── stm32_hal_legacy.h │ └── stm32f0xx_hal_can_legacy.h ├── stm32_assert_template.h ├── stm32f0xx_hal.h ├── stm32f0xx_hal_adc.h ├── stm32f0xx_hal_adc_ex.h ├── stm32f0xx_hal_can.h ├── stm32f0xx_hal_cec.h ├── stm32f0xx_hal_comp.h ├── stm32f0xx_hal_conf_template.h ├── stm32f0xx_hal_cortex.h ├── stm32f0xx_hal_crc.h ├── stm32f0xx_hal_crc_ex.h ├── stm32f0xx_hal_dac.h ├── stm32f0xx_hal_dac_ex.h ├── stm32f0xx_hal_def.h ├── stm32f0xx_hal_dma.h ├── stm32f0xx_hal_dma_ex.h ├── stm32f0xx_hal_exti.h ├── stm32f0xx_hal_flash.h ├── stm32f0xx_hal_flash_ex.h ├── stm32f0xx_hal_gpio.h ├── stm32f0xx_hal_gpio_ex.h ├── stm32f0xx_hal_i2c.h ├── stm32f0xx_hal_i2c_ex.h ├── stm32f0xx_hal_i2s.h ├── stm32f0xx_hal_irda.h ├── stm32f0xx_hal_irda_ex.h ├── stm32f0xx_hal_iwdg.h ├── stm32f0xx_hal_pcd.h ├── stm32f0xx_hal_pcd_ex.h ├── stm32f0xx_hal_pwr.h ├── stm32f0xx_hal_pwr_ex.h ├── stm32f0xx_hal_rcc.h ├── stm32f0xx_hal_rcc_ex.h ├── stm32f0xx_hal_rtc.h ├── stm32f0xx_hal_rtc_ex.h ├── stm32f0xx_hal_smartcard.h ├── stm32f0xx_hal_smartcard_ex.h ├── stm32f0xx_hal_smbus.h ├── stm32f0xx_hal_spi.h ├── stm32f0xx_hal_spi_ex.h ├── stm32f0xx_hal_tim.h ├── stm32f0xx_hal_tim_ex.h ├── stm32f0xx_hal_tsc.h ├── stm32f0xx_hal_uart.h ├── stm32f0xx_hal_uart_ex.h ├── stm32f0xx_hal_usart.h ├── stm32f0xx_hal_usart_ex.h ├── stm32f0xx_hal_wwdg.h ├── stm32f0xx_ll_adc.h ├── stm32f0xx_ll_bus.h ├── stm32f0xx_ll_comp.h ├── stm32f0xx_ll_cortex.h ├── stm32f0xx_ll_crc.h ├── stm32f0xx_ll_crs.h ├── stm32f0xx_ll_dac.h ├── stm32f0xx_ll_dma.h ├── stm32f0xx_ll_exti.h ├── stm32f0xx_ll_gpio.h ├── stm32f0xx_ll_i2c.h ├── stm32f0xx_ll_iwdg.h ├── stm32f0xx_ll_pwr.h ├── stm32f0xx_ll_rcc.h ├── stm32f0xx_ll_rtc.h ├── stm32f0xx_ll_spi.h ├── stm32f0xx_ll_system.h ├── stm32f0xx_ll_tim.h ├── stm32f0xx_ll_usart.h ├── stm32f0xx_ll_usb.h ├── stm32f0xx_ll_utils.h └── stm32f0xx_ll_wwdg.h ├── LICENSE.md ├── README.md ├── Release_Notes.html ├── SECURITY.md ├── Src ├── Legacy │ └── stm32f0xx_hal_can.c ├── stm32f0xx_hal.c ├── stm32f0xx_hal_adc.c ├── stm32f0xx_hal_adc_ex.c ├── stm32f0xx_hal_can.c ├── stm32f0xx_hal_cec.c ├── stm32f0xx_hal_comp.c ├── stm32f0xx_hal_cortex.c ├── stm32f0xx_hal_crc.c ├── stm32f0xx_hal_crc_ex.c ├── stm32f0xx_hal_dac.c ├── stm32f0xx_hal_dac_ex.c ├── stm32f0xx_hal_dma.c ├── stm32f0xx_hal_exti.c ├── stm32f0xx_hal_flash.c ├── stm32f0xx_hal_flash_ex.c ├── stm32f0xx_hal_gpio.c ├── stm32f0xx_hal_i2c.c ├── stm32f0xx_hal_i2c_ex.c ├── stm32f0xx_hal_i2s.c ├── stm32f0xx_hal_irda.c ├── stm32f0xx_hal_iwdg.c ├── stm32f0xx_hal_msp_template.c ├── stm32f0xx_hal_pcd.c ├── stm32f0xx_hal_pcd_ex.c ├── stm32f0xx_hal_pwr.c ├── stm32f0xx_hal_pwr_ex.c ├── stm32f0xx_hal_rcc.c ├── stm32f0xx_hal_rcc_ex.c ├── stm32f0xx_hal_rtc.c ├── stm32f0xx_hal_rtc_ex.c ├── stm32f0xx_hal_smartcard.c ├── stm32f0xx_hal_smartcard_ex.c ├── stm32f0xx_hal_smbus.c ├── stm32f0xx_hal_spi.c ├── stm32f0xx_hal_spi_ex.c ├── stm32f0xx_hal_tim.c ├── stm32f0xx_hal_tim_ex.c ├── stm32f0xx_hal_timebase_rtc_alarm_template.c ├── stm32f0xx_hal_timebase_rtc_wakeup_template.c ├── stm32f0xx_hal_timebase_tim_template.c ├── stm32f0xx_hal_tsc.c ├── stm32f0xx_hal_uart.c ├── stm32f0xx_hal_uart_ex.c ├── stm32f0xx_hal_usart.c ├── stm32f0xx_hal_usart_ex.c ├── stm32f0xx_hal_wwdg.c ├── stm32f0xx_ll_adc.c ├── stm32f0xx_ll_comp.c ├── stm32f0xx_ll_crc.c ├── stm32f0xx_ll_crs.c ├── stm32f0xx_ll_dac.c ├── stm32f0xx_ll_dma.c ├── stm32f0xx_ll_exti.c ├── stm32f0xx_ll_gpio.c ├── stm32f0xx_ll_i2c.c ├── stm32f0xx_ll_pwr.c ├── stm32f0xx_ll_rcc.c ├── stm32f0xx_ll_rtc.c ├── stm32f0xx_ll_spi.c ├── stm32f0xx_ll_tim.c ├── stm32f0xx_ll_usart.c ├── stm32f0xx_ll_usb.c └── stm32f0xx_ll_utils.c └── _htmresc ├── favicon.png ├── mini-st_2020.css └── st_logo_2020.png /.github/ISSUE_TEMPLATE/bug_report.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: Bug report 3 | about: Create a report to help us improve 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | 8 | --- 9 | 10 | **Caution** 11 | The Issues are strictly limited for the reporting of problem encountered with the software provided in this project. 12 | For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post a topic in the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus) 13 | 14 | **Describe the set-up** 15 | * The board (either ST RPN reference or your custom board) 16 | * IDE or at least the compiler and its version 17 | 18 | **Describe the bug** 19 | A clear and concise description of what the bug is. 20 | 21 | **How To Reproduce** 22 | 1. Indicate the global behavior of your application project 23 | 24 | 2. The modules that you suspect to be the cause of the problem (Driver, BSP, MW ...) 25 | 26 | 3. The use case that generates the problem 27 | 28 | 4. How we can reproduce the problem 29 | 30 | 31 | **Additional context** 32 | If you have a first analysis or patch correction, thank you to share your proposal. 33 | 34 | **Screenshots** 35 | If applicable, add screenshots to help explain your problem. 36 | -------------------------------------------------------------------------------- /.github/ISSUE_TEMPLATE/other-issue.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: 'Other Issue ' 3 | about: Generic issue description 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | 8 | --- 9 | 10 | **Caution** 11 | The Issues are strictly limited for the reporting of problem encountered with the software provided in this project. 12 | For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post a topic in the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus) 13 | 14 | **Describe the set-up** 15 | * The board (either ST RPN reference or your custom board) 16 | * IDE or at least the compiler and its version 17 | 18 | **Additional context** 19 | If you have a first analysis or a patch proposal, thank you to share your proposal. 20 | 21 | **Screenshots** 22 | If applicable, add screenshots to help explain your problem. 23 | -------------------------------------------------------------------------------- /.github/PULL_REQUEST_TEMPLATE.md: -------------------------------------------------------------------------------- 1 | ## IMPORTANT INFORMATION 2 | 3 | ### Contributor License Agreement (CLA) 4 | * The Pull Request feature will be considered by STMicroelectronics after the signature of a **Contributor License Agreement (CLA)** by the submitter. 5 | * If you did not sign such agreement, please follow the steps mentioned in the CONTRIBUTING.md file. 6 | -------------------------------------------------------------------------------- /CODE_OF_CONDUCT.md: -------------------------------------------------------------------------------- 1 | # Contributor Covenant Code of Conduct 2 | 3 | ## Our Pledge 4 | 5 | In the interest of fostering an open and welcoming environment, we as 6 | contributors and maintainers pledge to making participation in our project and 7 | our community a harassment-free experience for everyone, regardless of age, body 8 | size, disability, ethnicity, sex characteristics, gender identity and expression, 9 | level of experience, education, socio-economic status, nationality, personal 10 | appearance, race, religion, or sexual identity and orientation. 11 | 12 | ## Our Standards 13 | 14 | Examples of behavior that contributes to creating a positive environment 15 | include: 16 | 17 | * Using welcoming and inclusive language 18 | * Being respectful of differing viewpoints and experiences 19 | * Gracefully accepting constructive criticism 20 | * Focusing on what is best for the community 21 | * Showing empathy towards other community members 22 | 23 | Examples of unacceptable behavior by participants include: 24 | 25 | * The use of sexualized language or imagery and unwelcome sexual attention or 26 | advances 27 | * Trolling, insulting/derogatory comments, and personal or political attacks 28 | * Public or private harassment 29 | * Publishing others' private information, such as a physical or electronic 30 | address, without explicit permission 31 | * Other conduct which could reasonably be considered inappropriate in a 32 | professional setting 33 | 34 | ## Our Responsibilities 35 | 36 | Project maintainers are responsible for clarifying the standards of acceptable 37 | behavior and are expected to take appropriate and fair corrective action in 38 | response to any instances of unacceptable behavior. 39 | 40 | Project maintainers have the right and responsibility to remove, edit, or 41 | reject comments, commits, code, wiki edits, issues, and other contributions 42 | that are not aligned to this Code of Conduct, or to ban temporarily or 43 | permanently any contributor for other behaviors that they deem inappropriate, 44 | threatening, offensive, or harmful. 45 | 46 | ## Scope 47 | 48 | This Code of Conduct applies both within project spaces and in public spaces 49 | when an individual is representing the project or its community. Examples of 50 | representing a project or community include using an official project e-mail 51 | address, posting via an official social media account, or acting as an appointed 52 | representative at an online or offline event. Representation of a project may be 53 | further defined and clarified by project maintainers. 54 | 55 | ## Enforcement 56 | 57 | Instances of abusive, harassing, or otherwise unacceptable behavior may be 58 | reported by contacting the project team at https://www.st.com/content/st_com/en/contact-us.html. All 59 | complaints will be reviewed and investigated and will result in a response that 60 | is deemed necessary and appropriate to the circumstances. The project team is 61 | obligated to maintain confidentiality with regard to the reporter of an incident. 62 | Further details of specific enforcement policies may be posted separately. 63 | 64 | Project maintainers who do not follow or enforce the Code of Conduct in good 65 | faith may face temporary or permanent repercussions as determined by other 66 | members of the project's leadership. 67 | 68 | ## Attribution 69 | 70 | This Code of Conduct is adapted from the [Contributor Covenant][homepage], version 1.4, 71 | available [here](https://www.contributor-covenant.org/version/1/4/code-of-conduct.html). 72 | 73 | [homepage]: https://www.contributor-covenant.org 74 | 75 | For answers to common questions about this code of conduct, refer to the FAQ section [here](https://www.contributor-covenant.org/faq). 76 | -------------------------------------------------------------------------------- /CONTRIBUTING.md: -------------------------------------------------------------------------------- 1 | # Contributing guide 2 | 3 | This guide serves as a checklist before contributing to this repository. It mainly focuses on the steps to follow to submit an issue or a pull-request. 4 | 5 | ## 1. Issues 6 | 7 | ### 1.1 Before opening an issue 8 | 9 | Please check the following points before posting an issue: 10 | * Make sure you are using the latest commit (major releases are tagged, but corrections are available as new commits). 11 | * Make sure your issue is a question/feedback/suggestions **related to** the software provided in this repository. Otherwise, please refer to section [3](CONTRIBUTING.md#3-support-requests-and-questions) below. 12 | * Make sure your issue is not already reported/fixed on GitHub or discussed on a previous issue. Do not forget to browse into the **closed** issues. 13 | 14 | ### 1.2 Posting the issue 15 | 16 | When you have checked the previous points, create a new report from the **Issues** tab of this repository. A template is available [here](../../issues/new/choose) to help you report the issue you are facing or the enhancement you would like to propose. 17 | 18 | ## 2. Pull Requests 19 | 20 | ### 2.1 Before opening a pull-request 21 | 22 | STMicrolectronics is happy to receive contributions from the community, based on an initial Contributor License Agreement (CLA) procedure. 23 | 24 | * If you are an individual writing original source code and you are sure **you own the intellectual property**, then you need to sign an Individual [CLA](https://cla.st.com). 25 | * If you work for a company that wants also to allow you to contribute with your work, your company needs to provide a Corporate [CLA](https://cla.st.com) mentioning your GitHub account name. 26 | * If you are not sure that a CLA (Individual or Corporate) has been signed for your GitHub account you can check the [CLA](https://cla.st.com) dedicated page. 27 | 28 | Please note that: 29 | * The Corporate CLA will always take precedence over the Individual CLA. 30 | * One CLA submission is sufficient, for any project proposed by STMicroelectronics. 31 | 32 | ### 2.2 How to proceed 33 | 34 | * We recommend to engage first a communication thru an issue, in order to present your proposal, just to confirm that it corresponds to STMicroelectronics' domain or scope. 35 | * Then fork the project to your GitHub account to further develop your contribution. Please use the latest commit version. 36 | * Please, submit one pull-request per new feature or proposal. This will ease the analysis and the final merge if accepted. 37 | 38 | ## 3. Support requests and questions 39 | 40 | For support requests or any other question related to the product, the tools, the environment, you can submit a post to the **ST Community** on the appropriate topic [page](https://community.st.com/s/topiccatalog). 41 | -------------------------------------------------------------------------------- /Inc/stm32_assert_template.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32_assert.h 4 | * @author MCD Application Team 5 | * @brief STM32 assert template file. 6 | * This file should be copied to the application folder and renamed 7 | * to stm32_assert.h. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * Copyright (c) 2016 STMicroelectronics. 12 | * All rights reserved. 13 | * 14 | * This software is licensed under terms that can be found in the LICENSE file 15 | * in the root directory of this software component. 16 | * If no LICENSE file comes with this software, it is provided AS-IS. 17 | * 18 | ****************************************************************************** 19 | */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef __STM32_ASSERT_H 23 | #define __STM32_ASSERT_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Exported types ------------------------------------------------------------*/ 30 | /* Exported constants --------------------------------------------------------*/ 31 | /* Includes ------------------------------------------------------------------*/ 32 | /* Exported macro ------------------------------------------------------------*/ 33 | #ifdef USE_FULL_ASSERT 34 | /** 35 | * @brief The assert_param macro is used for function's parameters check. 36 | * @param expr If expr is false, it calls assert_failed function 37 | * which reports the name of the source file and the source 38 | * line number of the call that failed. 39 | * If expr is true, it returns no value. 40 | * @retval None 41 | */ 42 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) 43 | /* Exported functions ------------------------------------------------------- */ 44 | void assert_failed(uint8_t* file, uint32_t line); 45 | #else 46 | #define assert_param(expr) ((void)0U) 47 | #endif /* USE_FULL_ASSERT */ 48 | 49 | #ifdef __cplusplus 50 | } 51 | #endif 52 | 53 | #endif /* __STM32_ASSERT_H */ 54 | 55 | 56 | 57 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_hal_cortex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_cortex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CORTEX HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef __STM32F0xx_HAL_CORTEX_H 21 | #define __STM32F0xx_HAL_CORTEX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup CORTEX CORTEX 35 | * @{ 36 | */ 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* Exported constants --------------------------------------------------------*/ 39 | 40 | /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants 41 | * @{ 42 | */ 43 | 44 | /** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source 45 | * @{ 46 | */ 47 | #define SYSTICK_CLKSOURCE_HCLK_DIV8 (0x00000000U) 48 | #define SYSTICK_CLKSOURCE_HCLK (0x00000004U) 49 | 50 | /** 51 | * @} 52 | */ 53 | 54 | /** 55 | * @} 56 | */ 57 | 58 | /* Exported Macros -----------------------------------------------------------*/ 59 | 60 | /* Exported functions --------------------------------------------------------*/ 61 | /** @addtogroup CORTEX_Exported_Functions CORTEX Exported Functions 62 | * @{ 63 | */ 64 | /** @addtogroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions 65 | * @brief Initialization and Configuration functions 66 | * @{ 67 | */ 68 | /* Initialization and de-initialization functions *******************************/ 69 | void HAL_NVIC_SetPriority(IRQn_Type IRQn,uint32_t PreemptPriority, uint32_t SubPriority); 70 | void HAL_NVIC_EnableIRQ(IRQn_Type IRQn); 71 | void HAL_NVIC_DisableIRQ(IRQn_Type IRQn); 72 | void HAL_NVIC_SystemReset(void); 73 | uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb); 74 | /** 75 | * @} 76 | */ 77 | 78 | /** @addtogroup CORTEX_Exported_Functions_Group2 Peripheral Control functions 79 | * @brief Cortex control functions 80 | * @{ 81 | */ 82 | 83 | /* Peripheral Control functions *************************************************/ 84 | uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn); 85 | uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn); 86 | void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn); 87 | void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn); 88 | void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource); 89 | void HAL_SYSTICK_IRQHandler(void); 90 | void HAL_SYSTICK_Callback(void); 91 | /** 92 | * @} 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /* Private types -------------------------------------------------------------*/ 100 | /* Private variables ---------------------------------------------------------*/ 101 | /* Private constants ---------------------------------------------------------*/ 102 | /* Private macros ------------------------------------------------------------*/ 103 | /** @defgroup CORTEX_Private_Macros CORTEX Private Macros 104 | * @{ 105 | */ 106 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x4) 107 | 108 | #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00) 109 | 110 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \ 111 | ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8)) 112 | /** 113 | * @} 114 | */ 115 | 116 | /** 117 | * @} 118 | */ 119 | 120 | /** 121 | * @} 122 | */ 123 | 124 | #ifdef __cplusplus 125 | } 126 | #endif 127 | 128 | #endif /* __STM32F0xx_HAL_CORTEX_H */ 129 | 130 | 131 | 132 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_hal_crc_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_crc_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC HAL extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F0xx_HAL_CRC_EX_H 21 | #define STM32F0xx_HAL_CRC_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup CRCEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /** @defgroup CRCEx_Exported_Constants CRC Extended Exported Constants 41 | * @{ 42 | */ 43 | 44 | /** @defgroup CRCEx_Input_Data_Inversion Input Data Inversion Modes 45 | * @{ 46 | */ 47 | #define CRC_INPUTDATA_INVERSION_NONE 0x00000000U /*!< No input data inversion */ 48 | #define CRC_INPUTDATA_INVERSION_BYTE CRC_CR_REV_IN_0 /*!< Byte-wise input data inversion */ 49 | #define CRC_INPUTDATA_INVERSION_HALFWORD CRC_CR_REV_IN_1 /*!< HalfWord-wise input data inversion */ 50 | #define CRC_INPUTDATA_INVERSION_WORD CRC_CR_REV_IN /*!< Word-wise input data inversion */ 51 | /** 52 | * @} 53 | */ 54 | 55 | /** @defgroup CRCEx_Output_Data_Inversion Output Data Inversion Modes 56 | * @{ 57 | */ 58 | #define CRC_OUTPUTDATA_INVERSION_DISABLE 0x00000000U /*!< No output data inversion */ 59 | #define CRC_OUTPUTDATA_INVERSION_ENABLE CRC_CR_REV_OUT /*!< Bit-wise output data inversion */ 60 | /** 61 | * @} 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /* Exported macro ------------------------------------------------------------*/ 69 | /** @defgroup CRCEx_Exported_Macros CRC Extended Exported Macros 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief Set CRC output reversal 75 | * @param __HANDLE__ CRC handle 76 | * @retval None 77 | */ 78 | #define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT) 79 | 80 | /** 81 | * @brief Unset CRC output reversal 82 | * @param __HANDLE__ CRC handle 83 | * @retval None 84 | */ 85 | #define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT)) 86 | 87 | /** 88 | * @brief Set CRC non-default polynomial 89 | * @param __HANDLE__ CRC handle 90 | * @param __POLYNOMIAL__ 7, 8, 16 or 32-bit polynomial 91 | * @retval None 92 | */ 93 | #define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__)) 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /* Private macros --------------------------------------------------------*/ 100 | /** @defgroup CRCEx_Private_Macros CRC Extended Private Macros 101 | * @{ 102 | */ 103 | 104 | #define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \ 105 | ((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \ 106 | ((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \ 107 | ((MODE) == CRC_INPUTDATA_INVERSION_WORD)) 108 | 109 | #define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \ 110 | ((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLE)) 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /* Exported functions --------------------------------------------------------*/ 117 | 118 | /** @addtogroup CRCEx_Exported_Functions 119 | * @{ 120 | */ 121 | 122 | /** @addtogroup CRCEx_Exported_Functions_Group1 123 | * @{ 124 | */ 125 | /* Initialization and de-initialization functions ****************************/ 126 | HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength); 127 | HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode); 128 | HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode); 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | /** 135 | * @} 136 | */ 137 | 138 | /** 139 | * @} 140 | */ 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | #ifdef __cplusplus 147 | } 148 | #endif 149 | 150 | #endif /* STM32F0xx_HAL_CRC_EX_H */ 151 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_def.h 4 | * @author MCD Application Team 5 | * @brief This file contains HAL common defines, enumeration, macros and 6 | * structures definitions. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2016 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32F0xx_HAL_DEF 22 | #define __STM32F0xx_HAL_DEF 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f0xx.h" 30 | #include "Legacy/stm32_hal_legacy.h" 31 | #include 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | 35 | /** 36 | * @brief HAL Status structures definition 37 | */ 38 | typedef enum 39 | { 40 | HAL_OK = 0x00U, 41 | HAL_ERROR = 0x01U, 42 | HAL_BUSY = 0x02U, 43 | HAL_TIMEOUT = 0x03U 44 | } HAL_StatusTypeDef; 45 | 46 | /** 47 | * @brief HAL Lock structures definition 48 | */ 49 | typedef enum 50 | { 51 | HAL_UNLOCKED = 0x00U, 52 | HAL_LOCKED = 0x01U 53 | } HAL_LockTypeDef; 54 | 55 | /* Exported macro ------------------------------------------------------------*/ 56 | 57 | #if !defined(UNUSED) 58 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ 59 | #endif /* UNUSED */ 60 | 61 | #define HAL_MAX_DELAY 0xFFFFFFFFU 62 | 63 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) 64 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) 65 | 66 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ 67 | do{ \ 68 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ 69 | (__DMA_HANDLE__).Parent = (__HANDLE__); \ 70 | } while(0U) 71 | 72 | /** @brief Reset the Handle's State field. 73 | * @param __HANDLE__ specifies the Peripheral Handle. 74 | * @note This macro can be used for the following purpose: 75 | * - When the Handle is declared as local variable; before passing it as parameter 76 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 77 | * to set to 0 the Handle's "State" field. 78 | * Otherwise, "State" field may have any random value and the first time the function 79 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 80 | * (i.e. HAL_PPP_MspInit() will not be executed). 81 | * - When there is a need to reconfigure the low level hardware: instead of calling 82 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 83 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function 84 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 85 | * @retval None 86 | */ 87 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U) 88 | 89 | #if (USE_RTOS == 1U) 90 | /* Reserved for future use */ 91 | #error " USE_RTOS should be 0 in the current HAL release " 92 | #else 93 | #define __HAL_LOCK(__HANDLE__) \ 94 | do{ \ 95 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 96 | { \ 97 | return HAL_BUSY; \ 98 | } \ 99 | else \ 100 | { \ 101 | (__HANDLE__)->Lock = HAL_LOCKED; \ 102 | } \ 103 | }while (0U) 104 | 105 | #define __HAL_UNLOCK(__HANDLE__) \ 106 | do{ \ 107 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 108 | }while (0U) 109 | #endif /* USE_RTOS */ 110 | 111 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */ 112 | #ifndef __weak 113 | #define __weak __attribute__((weak)) 114 | #endif 115 | #ifndef __packed 116 | #define __packed __attribute__((packed)) 117 | #endif 118 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 119 | #ifndef __weak 120 | #define __weak __attribute__((weak)) 121 | #endif /* __weak */ 122 | #ifndef __packed 123 | #define __packed __attribute__((__packed__)) 124 | #endif /* __packed */ 125 | #endif /* __GNUC__ */ 126 | 127 | 128 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 129 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */ 130 | #ifndef __ALIGN_BEGIN 131 | #define __ALIGN_BEGIN 132 | #endif 133 | #ifndef __ALIGN_END 134 | #define __ALIGN_END __attribute__ ((aligned (4))) 135 | #endif 136 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 137 | #ifndef __ALIGN_END 138 | #define __ALIGN_END __attribute__ ((aligned (4))) 139 | #endif /* __ALIGN_END */ 140 | #ifndef __ALIGN_BEGIN 141 | #define __ALIGN_BEGIN 142 | #endif /* __ALIGN_BEGIN */ 143 | #else 144 | #ifndef __ALIGN_END 145 | #define __ALIGN_END 146 | #endif /* __ALIGN_END */ 147 | #ifndef __ALIGN_BEGIN 148 | #if defined (__CC_ARM) /* ARM Compiler V5*/ 149 | #define __ALIGN_BEGIN __align(4) 150 | #elif defined (__ICCARM__) /* IAR Compiler */ 151 | #define __ALIGN_BEGIN 152 | #endif /* __CC_ARM */ 153 | #endif /* __ALIGN_BEGIN */ 154 | #endif /* __GNUC__ */ 155 | 156 | /** 157 | * @brief __NOINLINE definition 158 | */ 159 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ ) 160 | /* ARM V4/V5 and V6 & GNU Compiler 161 | ------------------------------- 162 | */ 163 | #define __NOINLINE __attribute__ ( (noinline) ) 164 | 165 | #elif defined ( __ICCARM__ ) 166 | /* ICCARM Compiler 167 | --------------- 168 | */ 169 | #define __NOINLINE _Pragma("optimize = no_inline") 170 | 171 | #endif 172 | 173 | #ifdef __cplusplus 174 | } 175 | #endif 176 | 177 | #endif /* ___STM32F0xx_HAL_DEF */ 178 | 179 | 180 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_hal_i2c_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_i2c_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of I2C HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F0xx_HAL_I2C_EX_H 21 | #define STM32F0xx_HAL_I2C_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup I2CEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | 41 | /** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants 42 | * @{ 43 | */ 44 | 45 | /** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter 46 | * @{ 47 | */ 48 | #define I2C_ANALOGFILTER_ENABLE 0x00000000U 49 | #define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF 50 | /** 51 | * @} 52 | */ 53 | 54 | /** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus 55 | * @{ 56 | */ 57 | #define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */ 58 | #if defined(SYSCFG_CFGR1_I2C_FMP_PA9) 59 | #define I2C_FASTMODEPLUS_PA9 SYSCFG_CFGR1_I2C_FMP_PA9 /*!< Enable Fast Mode Plus on PA9 */ 60 | #define I2C_FASTMODEPLUS_PA10 SYSCFG_CFGR1_I2C_FMP_PA10 /*!< Enable Fast Mode Plus on PA10 */ 61 | #else 62 | #define I2C_FASTMODEPLUS_PA9 (uint32_t)(0x00000001U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PA9 not supported */ 63 | #define I2C_FASTMODEPLUS_PA10 (uint32_t)(0x00000002U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PA10 not supported */ 64 | #endif /* SYSCFG_CFGR1_I2C_FMP_PA9 */ 65 | #define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_FMP_PB6 /*!< Enable Fast Mode Plus on PB6 */ 66 | #define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_FMP_PB7 /*!< Enable Fast Mode Plus on PB7 */ 67 | #define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_FMP_PB8 /*!< Enable Fast Mode Plus on PB8 */ 68 | #define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_FMP_PB9 /*!< Enable Fast Mode Plus on PB9 */ 69 | #if defined(SYSCFG_CFGR1_I2C_FMP_I2C1) 70 | #define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C_FMP_I2C1 /*!< Enable Fast Mode Plus on I2C1 pins */ 71 | #else 72 | #define I2C_FASTMODEPLUS_I2C1 (uint32_t)(0x00000100U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C1 not supported */ 73 | #endif /* SYSCFG_CFGR1_I2C_FMP_I2C1 */ 74 | #if defined(SYSCFG_CFGR1_I2C_FMP_I2C2) 75 | #define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C_FMP_I2C2 /*!< Enable Fast Mode Plus on I2C2 pins */ 76 | #else 77 | #define I2C_FASTMODEPLUS_I2C2 (uint32_t)(0x00000200U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C2 not supported */ 78 | #endif /* SYSCFG_CFGR1_I2C_FMP_I2C2 */ 79 | /** 80 | * @} 81 | */ 82 | 83 | /** 84 | * @} 85 | */ 86 | 87 | /* Exported macro ------------------------------------------------------------*/ 88 | /* Exported functions --------------------------------------------------------*/ 89 | 90 | /** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions 91 | * @{ 92 | */ 93 | 94 | /** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions 95 | * @brief Extended features functions 96 | * @{ 97 | */ 98 | 99 | /** @addtogroup I2CEx_Exported_Functions_Group1 Filter Mode Functions 100 | * @{ 101 | */ 102 | HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, 103 | uint32_t AnalogFilter); 104 | HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, 105 | uint32_t DigitalFilter); 106 | /** 107 | * @} 108 | */ 109 | #if defined(I2C_CR1_WUPEN) 110 | 111 | /** @addtogroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions 112 | * @{ 113 | */ 114 | HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c); 115 | HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c); 116 | /** 117 | * @} 118 | */ 119 | #endif /* I2C_CR1_WUPEN */ 120 | 121 | /** @addtogroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions 122 | * @{ 123 | */ 124 | void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus); 125 | void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); 126 | /** 127 | * @} 128 | */ 129 | 130 | /* Private constants ---------------------------------------------------------*/ 131 | /** @defgroup I2CEx_Private_Constants I2C Extended Private Constants 132 | * @{ 133 | */ 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | /* Private macros ------------------------------------------------------------*/ 140 | /** @defgroup I2CEx_Private_Macro I2C Extended Private Macros 141 | * @{ 142 | */ 143 | #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \ 144 | ((FILTER) == I2C_ANALOGFILTER_DISABLE)) 145 | 146 | #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) 147 | 148 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \ 149 | ((((__CONFIG__) & (I2C_FASTMODEPLUS_PA9)) == I2C_FASTMODEPLUS_PA9) || \ 150 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PA10)) == I2C_FASTMODEPLUS_PA10) || \ 151 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \ 152 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \ 153 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \ 154 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \ 155 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \ 156 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2))) 157 | /** 158 | * @} 159 | */ 160 | 161 | /* Private Functions ---------------------------------------------------------*/ 162 | /** @defgroup I2CEx_Private_Functions I2C Extended Private Functions 163 | * @{ 164 | */ 165 | /* Private functions are defined in stm32f0xx_hal_i2c_ex.c file */ 166 | /** 167 | * @} 168 | */ 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | /** 183 | * @} 184 | */ 185 | 186 | #ifdef __cplusplus 187 | } 188 | #endif 189 | 190 | #endif /* STM32F0xx_HAL_I2C_EX_H */ 191 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_hal_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_iwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of IWDG HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F0xx_HAL_IWDG_H 21 | #define STM32F0xx_HAL_IWDG_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @defgroup IWDG IWDG 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup IWDG_Exported_Types IWDG Exported Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @brief IWDG Init structure definition 45 | */ 46 | typedef struct 47 | { 48 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. 49 | This parameter can be a value of @ref IWDG_Prescaler */ 50 | 51 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. 52 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 53 | 54 | uint32_t Window; /*!< Specifies the window value to be compared to the down-counter. 55 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 56 | 57 | } IWDG_InitTypeDef; 58 | 59 | /** 60 | * @brief IWDG Handle Structure definition 61 | */ 62 | typedef struct 63 | { 64 | IWDG_TypeDef *Instance; /*!< Register base address */ 65 | 66 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ 67 | } IWDG_HandleTypeDef; 68 | 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /* Exported constants --------------------------------------------------------*/ 75 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants 76 | * @{ 77 | */ 78 | 79 | /** @defgroup IWDG_Prescaler IWDG Prescaler 80 | * @{ 81 | */ 82 | #define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */ 83 | #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ 84 | #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ 85 | #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ 86 | #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ 87 | #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ 88 | #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @defgroup IWDG_Window_option IWDG Window option 94 | * @{ 95 | */ 96 | #define IWDG_WINDOW_DISABLE IWDG_WINR_WIN 97 | /** 98 | * @} 99 | */ 100 | 101 | /** 102 | * @} 103 | */ 104 | 105 | /* Exported macros -----------------------------------------------------------*/ 106 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros 107 | * @{ 108 | */ 109 | 110 | /** 111 | * @brief Enable the IWDG peripheral. 112 | * @param __HANDLE__ IWDG handle 113 | * @retval None 114 | */ 115 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) 116 | 117 | /** 118 | * @brief Reload IWDG counter with value defined in the reload register 119 | * (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled). 120 | * @param __HANDLE__ IWDG handle 121 | * @retval None 122 | */ 123 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | /* Exported functions --------------------------------------------------------*/ 130 | /** @defgroup IWDG_Exported_Functions IWDG Exported Functions 131 | * @{ 132 | */ 133 | 134 | /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions 135 | * @{ 136 | */ 137 | /* Initialization/Start functions ********************************************/ 138 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); 139 | /** 140 | * @} 141 | */ 142 | 143 | /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions 144 | * @{ 145 | */ 146 | /* I/O operation functions ****************************************************/ 147 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); 148 | /** 149 | * @} 150 | */ 151 | 152 | /** 153 | * @} 154 | */ 155 | 156 | /* Private constants ---------------------------------------------------------*/ 157 | /** @defgroup IWDG_Private_Constants IWDG Private Constants 158 | * @{ 159 | */ 160 | 161 | /** 162 | * @brief IWDG Key Register BitMask 163 | */ 164 | #define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */ 165 | #define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */ 166 | #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */ 167 | #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */ 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | /* Private macros ------------------------------------------------------------*/ 174 | /** @defgroup IWDG_Private_Macros IWDG Private Macros 175 | * @{ 176 | */ 177 | 178 | /** 179 | * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. 180 | * @param __HANDLE__ IWDG handle 181 | * @retval None 182 | */ 183 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) 184 | 185 | /** 186 | * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. 187 | * @param __HANDLE__ IWDG handle 188 | * @retval None 189 | */ 190 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) 191 | 192 | /** 193 | * @brief Check IWDG prescaler value. 194 | * @param __PRESCALER__ IWDG prescaler value 195 | * @retval None 196 | */ 197 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ 198 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ 199 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ 200 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ 201 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ 202 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ 203 | ((__PRESCALER__) == IWDG_PRESCALER_256)) 204 | 205 | /** 206 | * @brief Check IWDG reload value. 207 | * @param __RELOAD__ IWDG reload value 208 | * @retval None 209 | */ 210 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) 211 | 212 | /** 213 | * @brief Check IWDG window value. 214 | * @param __WINDOW__ IWDG window value 215 | * @retval None 216 | */ 217 | #define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN) 218 | 219 | 220 | /** 221 | * @} 222 | */ 223 | 224 | /** 225 | * @} 226 | */ 227 | 228 | /** 229 | * @} 230 | */ 231 | 232 | 233 | #ifdef __cplusplus 234 | } 235 | #endif 236 | 237 | #endif /* STM32F0xx_HAL_IWDG_H */ 238 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_hal_pcd_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_pcd_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of PCD HAL Extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F0xx_HAL_PCD_EX_H 21 | #define STM32F0xx_HAL_PCD_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif /* __cplusplus */ 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f0xx_hal_def.h" 29 | 30 | #if defined (USB) 31 | /** @addtogroup STM32F0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup PCDEx 36 | * @{ 37 | */ 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* Exported macros -----------------------------------------------------------*/ 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions 43 | * @{ 44 | */ 45 | /** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 46 | * @{ 47 | */ 48 | 49 | 50 | 51 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, 52 | uint16_t ep_kind, uint32_t pmaadress); 53 | 54 | 55 | HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); 56 | HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); 57 | 58 | 59 | HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd); 60 | HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd); 61 | void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd); 62 | 63 | void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); 64 | void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); 65 | 66 | /** 67 | * @} 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | #endif /* defined (USB) */ 82 | 83 | #ifdef __cplusplus 84 | } 85 | #endif /* __cplusplus */ 86 | 87 | 88 | #endif /* STM32F0xx_HAL_PCD_EX_H */ 89 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_hal_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_pwr.h 4 | * @author MCD Application Team 5 | * @brief Header file of PWR HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef __STM32F0xx_HAL_PWR_H 21 | #define __STM32F0xx_HAL_PWR_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup PWR PWR 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | 41 | /** @defgroup PWR_Exported_Constants PWR Exported Constants 42 | * @{ 43 | */ 44 | 45 | /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in STOP mode 46 | * @{ 47 | */ 48 | #define PWR_MAINREGULATOR_ON (0x00000000U) 49 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS 50 | 51 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 52 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 53 | /** 54 | * @} 55 | */ 56 | 57 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 58 | * @{ 59 | */ 60 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U) 61 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U) 62 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 68 | * @{ 69 | */ 70 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01U) 71 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02U) 72 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 73 | /** 74 | * @} 75 | */ 76 | 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | /* Exported macro ------------------------------------------------------------*/ 83 | /** @defgroup PWR_Exported_Macro PWR Exported Macro 84 | * @{ 85 | */ 86 | 87 | /** @brief Check PWR flag is set or not. 88 | * @param __FLAG__ specifies the flag to check. 89 | * This parameter can be one of the following values: 90 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 91 | * was received from the WKUP pin or from the RTC alarm (Alarm A), 92 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup. 93 | * An additional wakeup event is detected if the WKUP pin is enabled 94 | * (by setting the EWUP bit) when the WKUP pin level is already high. 95 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 96 | * resumed from StandBy mode. 97 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 98 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 99 | * For this reason, this bit is equal to 0 after Standby or reset 100 | * until the PVDE bit is set. 101 | * Warning: this Flag is not available on STM32F030x8 products 102 | * @arg PWR_FLAG_VREFINTRDY: This flag indicates that the internal reference 103 | * voltage VREFINT is ready. 104 | * Warning: this Flag is not available on STM32F030x8 products 105 | * @retval The new state of __FLAG__ (TRUE or FALSE). 106 | */ 107 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) 108 | 109 | /** @brief Clear the PWR's pending flags. 110 | * @param __FLAG__ specifies the flag to clear. 111 | * This parameter can be one of the following values: 112 | * @arg PWR_FLAG_WU: Wake Up flag 113 | * @arg PWR_FLAG_SB: StandBy flag 114 | */ 115 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U) 116 | 117 | 118 | /** 119 | * @} 120 | */ 121 | 122 | /* Include PWR HAL Extension module */ 123 | #include "stm32f0xx_hal_pwr_ex.h" 124 | 125 | /* Exported functions --------------------------------------------------------*/ 126 | 127 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions 128 | * @{ 129 | */ 130 | 131 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 132 | * @{ 133 | */ 134 | 135 | /* Initialization and de-initialization functions *****************************/ 136 | void HAL_PWR_DeInit(void); 137 | 138 | /** 139 | * @} 140 | */ 141 | 142 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 143 | * @{ 144 | */ 145 | 146 | /* Peripheral Control functions **********************************************/ 147 | void HAL_PWR_EnableBkUpAccess(void); 148 | void HAL_PWR_DisableBkUpAccess(void); 149 | 150 | /* WakeUp pins configuration functions ****************************************/ 151 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); 152 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 153 | 154 | /* Low Power modes configuration functions ************************************/ 155 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 156 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 157 | void HAL_PWR_EnterSTANDBYMode(void); 158 | 159 | void HAL_PWR_EnableSleepOnExit(void); 160 | void HAL_PWR_DisableSleepOnExit(void); 161 | void HAL_PWR_EnableSEVOnPend(void); 162 | void HAL_PWR_DisableSEVOnPend(void); 163 | 164 | /** 165 | * @} 166 | */ 167 | 168 | /** 169 | * @} 170 | */ 171 | 172 | /** 173 | * @} 174 | */ 175 | 176 | /** 177 | * @} 178 | */ 179 | 180 | #ifdef __cplusplus 181 | } 182 | #endif 183 | 184 | 185 | #endif /* __STM32F0xx_HAL_PWR_H */ 186 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_hal_spi_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_spi_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of SPI HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F0xx_HAL_SPI_EX_H 21 | #define STM32F0xx_HAL_SPI_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup SPIEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* Exported macros -----------------------------------------------------------*/ 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup SPIEx_Exported_Functions 43 | * @{ 44 | */ 45 | 46 | /* Initialization and de-initialization functions ****************************/ 47 | /* IO operation functions *****************************************************/ 48 | /** @addtogroup SPIEx_Exported_Functions_Group1 49 | * @{ 50 | */ 51 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi); 52 | /** 53 | * @} 54 | */ 55 | 56 | /** 57 | * @} 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | #ifdef __cplusplus 69 | } 70 | #endif 71 | 72 | #endif /* STM32F0xx_HAL_SPI_EX_H */ 73 | 74 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_hal_tim_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_tim_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of TIM HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F0xx_HAL_TIM_EX_H 21 | #define STM32F0xx_HAL_TIM_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup TIMEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @brief TIM Hall sensor Configuration Structure definition 45 | */ 46 | 47 | typedef struct 48 | { 49 | uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. 50 | This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 51 | 52 | uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. 53 | This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ 54 | 55 | uint32_t IC1Filter; /*!< Specifies the input capture filter. 56 | This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 57 | 58 | uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 59 | This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 60 | } TIM_HallSensor_InitTypeDef; 61 | /** 62 | * @} 63 | */ 64 | /* End of exported types -----------------------------------------------------*/ 65 | 66 | /* Exported constants --------------------------------------------------------*/ 67 | /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 68 | * @{ 69 | */ 70 | 71 | /** @defgroup TIMEx_Remap TIM Extended Remapping 72 | * @{ 73 | */ 74 | #define TIM_TIM14_GPIO (0x00000000U) /*!< TIM14 TI1 is connected to GPIO */ 75 | #define TIM_TIM14_RTC (0x00000001U) /*!< TIM14 TI1 is connected to RTC_clock */ 76 | #define TIM_TIM14_HSE (0x00000002U) /*!< TIM14 TI1 is connected to HSE/32U */ 77 | #define TIM_TIM14_MCO (0x00000003U) /*!< TIM14 TI1 is connected to MCO */ 78 | /** 79 | * @} 80 | */ 81 | 82 | /** 83 | * @} 84 | */ 85 | /* End of exported constants -------------------------------------------------*/ 86 | 87 | /* Exported macro ------------------------------------------------------------*/ 88 | /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 89 | * @{ 90 | */ 91 | 92 | /** 93 | * @} 94 | */ 95 | /* End of exported macro -----------------------------------------------------*/ 96 | 97 | /* Private macro -------------------------------------------------------------*/ 98 | /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 99 | * @{ 100 | */ 101 | #define IS_TIM_REMAP(__INSTANCE__, __REMAP__) \ 102 | (((__INSTANCE__) == TIM14) && (((__REMAP__) & 0xFFFFFFFCU) == 0x00000000U)) 103 | 104 | /** 105 | * @} 106 | */ 107 | /* End of private macro ------------------------------------------------------*/ 108 | 109 | /* Exported functions --------------------------------------------------------*/ 110 | /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 111 | * @{ 112 | */ 113 | 114 | /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 115 | * @brief Timer Hall Sensor functions 116 | * @{ 117 | */ 118 | /* Timer Hall Sensor functions **********************************************/ 119 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig); 120 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); 121 | 122 | void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); 123 | void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); 124 | 125 | /* Blocking mode: Polling */ 126 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); 127 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); 128 | /* Non-Blocking mode: Interrupt */ 129 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); 130 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); 131 | /* Non-Blocking mode: DMA */ 132 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); 133 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); 134 | /** 135 | * @} 136 | */ 137 | 138 | /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 139 | * @brief Timer Complementary Output Compare functions 140 | * @{ 141 | */ 142 | /* Timer Complementary Output Compare functions *****************************/ 143 | /* Blocking mode: Polling */ 144 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 145 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 146 | 147 | /* Non-Blocking mode: Interrupt */ 148 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 149 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 150 | 151 | /* Non-Blocking mode: DMA */ 152 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, 153 | uint16_t Length); 154 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 155 | /** 156 | * @} 157 | */ 158 | 159 | /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 160 | * @brief Timer Complementary PWM functions 161 | * @{ 162 | */ 163 | /* Timer Complementary PWM functions ****************************************/ 164 | /* Blocking mode: Polling */ 165 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 166 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 167 | 168 | /* Non-Blocking mode: Interrupt */ 169 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 170 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 171 | /* Non-Blocking mode: DMA */ 172 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, 173 | uint16_t Length); 174 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 175 | /** 176 | * @} 177 | */ 178 | 179 | /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 180 | * @brief Timer Complementary One Pulse functions 181 | * @{ 182 | */ 183 | /* Timer Complementary One Pulse functions **********************************/ 184 | /* Blocking mode: Polling */ 185 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 186 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 187 | 188 | /* Non-Blocking mode: Interrupt */ 189 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 190 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 191 | /** 192 | * @} 193 | */ 194 | 195 | /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 196 | * @brief Peripheral Control functions 197 | * @{ 198 | */ 199 | /* Extended Control functions ************************************************/ 200 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 201 | uint32_t CommutationSource); 202 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 203 | uint32_t CommutationSource); 204 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 205 | uint32_t CommutationSource); 206 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, 207 | const TIM_MasterConfigTypeDef *sMasterConfig); 208 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 209 | const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); 210 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 211 | /** 212 | * @} 213 | */ 214 | 215 | /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 216 | * @brief Extended Callbacks functions 217 | * @{ 218 | */ 219 | /* Extended Callback **********************************************************/ 220 | void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim); 221 | void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim); 222 | void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); 223 | /** 224 | * @} 225 | */ 226 | 227 | /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 228 | * @brief Extended Peripheral State functions 229 | * @{ 230 | */ 231 | /* Extended Peripheral State functions ***************************************/ 232 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim); 233 | HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN); 234 | /** 235 | * @} 236 | */ 237 | 238 | /** 239 | * @} 240 | */ 241 | /* End of exported functions -------------------------------------------------*/ 242 | 243 | /* Private functions----------------------------------------------------------*/ 244 | /** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions 245 | * @{ 246 | */ 247 | void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); 248 | void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma); 249 | /** 250 | * @} 251 | */ 252 | /* End of private functions --------------------------------------------------*/ 253 | 254 | /** 255 | * @} 256 | */ 257 | 258 | /** 259 | * @} 260 | */ 261 | 262 | #ifdef __cplusplus 263 | } 264 | #endif 265 | 266 | 267 | #endif /* STM32F0xx_HAL_TIM_EX_H */ 268 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_hal_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_wwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of WWDG HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F0xx_HAL_WWDG_H 21 | #define STM32F0xx_HAL_WWDG_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup WWDG 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | 40 | /** @defgroup WWDG_Exported_Types WWDG Exported Types 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @brief WWDG Init structure definition 46 | */ 47 | typedef struct 48 | { 49 | uint32_t Prescaler; /*!< Specifies the prescaler value of the WWDG. 50 | This parameter can be a value of @ref WWDG_Prescaler */ 51 | 52 | uint32_t Window; /*!< Specifies the WWDG window value to be compared to the downcounter. 53 | This parameter must be a number Min_Data = 0x40 and Max_Data = 0x7F */ 54 | 55 | uint32_t Counter; /*!< Specifies the WWDG free-running downcounter value. 56 | This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7F */ 57 | 58 | uint32_t EWIMode ; /*!< Specifies if WWDG Early Wakeup Interrupt is enable or not. 59 | This parameter can be a value of @ref WWDG_EWI_Mode */ 60 | 61 | } WWDG_InitTypeDef; 62 | 63 | /** 64 | * @brief WWDG handle Structure definition 65 | */ 66 | #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) 67 | typedef struct __WWDG_HandleTypeDef 68 | #else 69 | typedef struct 70 | #endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */ 71 | { 72 | WWDG_TypeDef *Instance; /*!< Register base address */ 73 | 74 | WWDG_InitTypeDef Init; /*!< WWDG required parameters */ 75 | 76 | #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) 77 | void (* EwiCallback)(struct __WWDG_HandleTypeDef *hwwdg); /*!< WWDG Early WakeUp Interrupt callback */ 78 | 79 | void (* MspInitCallback)(struct __WWDG_HandleTypeDef *hwwdg); /*!< WWDG Msp Init callback */ 80 | #endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */ 81 | } WWDG_HandleTypeDef; 82 | 83 | #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) 84 | /** 85 | * @brief HAL WWDG common Callback ID enumeration definition 86 | */ 87 | typedef enum 88 | { 89 | HAL_WWDG_EWI_CB_ID = 0x00U, /*!< WWDG EWI callback ID */ 90 | HAL_WWDG_MSPINIT_CB_ID = 0x01U, /*!< WWDG MspInit callback ID */ 91 | } HAL_WWDG_CallbackIDTypeDef; 92 | 93 | /** 94 | * @brief HAL WWDG Callback pointer definition 95 | */ 96 | typedef void (*pWWDG_CallbackTypeDef)(WWDG_HandleTypeDef *hppp); /*!< pointer to a WWDG common callback functions */ 97 | 98 | #endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */ 99 | /** 100 | * @} 101 | */ 102 | 103 | /* Exported constants --------------------------------------------------------*/ 104 | 105 | /** @defgroup WWDG_Exported_Constants WWDG Exported Constants 106 | * @{ 107 | */ 108 | 109 | /** @defgroup WWDG_Interrupt_definition WWDG Interrupt definition 110 | * @{ 111 | */ 112 | #define WWDG_IT_EWI WWDG_CFR_EWI /*!< Early wakeup interrupt */ 113 | /** 114 | * @} 115 | */ 116 | 117 | /** @defgroup WWDG_Flag_definition WWDG Flag definition 118 | * @brief WWDG Flag definition 119 | * @{ 120 | */ 121 | #define WWDG_FLAG_EWIF WWDG_SR_EWIF /*!< Early wakeup interrupt flag */ 122 | /** 123 | * @} 124 | */ 125 | 126 | /** @defgroup WWDG_Prescaler WWDG Prescaler 127 | * @{ 128 | */ 129 | #define WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096)/1 */ 130 | #define WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */ 131 | #define WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */ 132 | #define WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_1 | WWDG_CFR_WDGTB_0) /*!< WWDG counter clock = (PCLK1/4096)/8 */ 133 | /** 134 | * @} 135 | */ 136 | 137 | /** @defgroup WWDG_EWI_Mode WWDG Early Wakeup Interrupt Mode 138 | * @{ 139 | */ 140 | #define WWDG_EWI_DISABLE 0x00000000u /*!< EWI Disable */ 141 | #define WWDG_EWI_ENABLE WWDG_CFR_EWI /*!< EWI Enable */ 142 | /** 143 | * @} 144 | */ 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | /* Private macros ------------------------------------------------------------*/ 151 | 152 | /** @defgroup WWDG_Private_Macros WWDG Private Macros 153 | * @{ 154 | */ 155 | #define IS_WWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == WWDG_PRESCALER_1) || \ 156 | ((__PRESCALER__) == WWDG_PRESCALER_2) || \ 157 | ((__PRESCALER__) == WWDG_PRESCALER_4) || \ 158 | ((__PRESCALER__) == WWDG_PRESCALER_8)) 159 | 160 | #define IS_WWDG_WINDOW(__WINDOW__) (((__WINDOW__) >= WWDG_CFR_W_6) && ((__WINDOW__) <= WWDG_CFR_W)) 161 | 162 | #define IS_WWDG_COUNTER(__COUNTER__) (((__COUNTER__) >= WWDG_CR_T_6) && ((__COUNTER__) <= WWDG_CR_T)) 163 | 164 | #define IS_WWDG_EWI_MODE(__MODE__) (((__MODE__) == WWDG_EWI_ENABLE) || \ 165 | ((__MODE__) == WWDG_EWI_DISABLE)) 166 | /** 167 | * @} 168 | */ 169 | 170 | 171 | /* Exported macros ------------------------------------------------------------*/ 172 | 173 | /** @defgroup WWDG_Exported_Macros WWDG Exported Macros 174 | * @{ 175 | */ 176 | 177 | /** 178 | * @brief Enable the WWDG peripheral. 179 | * @param __HANDLE__ WWDG handle 180 | * @retval None 181 | */ 182 | #define __HAL_WWDG_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, WWDG_CR_WDGA) 183 | 184 | /** 185 | * @brief Enable the WWDG early wakeup interrupt. 186 | * @param __HANDLE__: WWDG handle 187 | * @param __INTERRUPT__ specifies the interrupt to enable. 188 | * This parameter can be one of the following values: 189 | * @arg WWDG_IT_EWI: Early wakeup interrupt 190 | * @note Once enabled this interrupt cannot be disabled except by a system reset. 191 | * @retval None 192 | */ 193 | #define __HAL_WWDG_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFR, (__INTERRUPT__)) 194 | 195 | /** 196 | * @brief Check whether the selected WWDG interrupt has occurred or not. 197 | * @param __HANDLE__ WWDG handle 198 | * @param __INTERRUPT__ specifies the it to check. 199 | * This parameter can be one of the following values: 200 | * @arg WWDG_FLAG_EWIF: Early wakeup interrupt IT 201 | * @retval The new state of WWDG_FLAG (SET or RESET). 202 | */ 203 | #define __HAL_WWDG_GET_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_GET_FLAG((__HANDLE__),(__INTERRUPT__)) 204 | 205 | /** @brief Clear the WWDG interrupt pending bits. 206 | * bits to clear the selected interrupt pending bits. 207 | * @param __HANDLE__ WWDG handle 208 | * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 209 | * This parameter can be one of the following values: 210 | * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag 211 | */ 212 | #define __HAL_WWDG_CLEAR_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_CLEAR_FLAG((__HANDLE__), (__INTERRUPT__)) 213 | 214 | /** 215 | * @brief Check whether the specified WWDG flag is set or not. 216 | * @param __HANDLE__ WWDG handle 217 | * @param __FLAG__ specifies the flag to check. 218 | * This parameter can be one of the following values: 219 | * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag 220 | * @retval The new state of WWDG_FLAG (SET or RESET). 221 | */ 222 | #define __HAL_WWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) 223 | 224 | /** 225 | * @brief Clear the WWDG's pending flags. 226 | * @param __HANDLE__ WWDG handle 227 | * @param __FLAG__ specifies the flag to clear. 228 | * This parameter can be one of the following values: 229 | * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag 230 | * @retval None 231 | */ 232 | #define __HAL_WWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) 233 | 234 | /** @brief Check whether the specified WWDG interrupt source is enabled or not. 235 | * @param __HANDLE__ WWDG Handle. 236 | * @param __INTERRUPT__ specifies the WWDG interrupt source to check. 237 | * This parameter can be one of the following values: 238 | * @arg WWDG_IT_EWI: Early Wakeup Interrupt 239 | * @retval state of __INTERRUPT__ (TRUE or FALSE). 240 | */ 241 | #define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR\ 242 | & (__INTERRUPT__)) == (__INTERRUPT__)) 243 | 244 | /** 245 | * @} 246 | */ 247 | 248 | /* Exported functions --------------------------------------------------------*/ 249 | 250 | /** @addtogroup WWDG_Exported_Functions 251 | * @{ 252 | */ 253 | 254 | /** @addtogroup WWDG_Exported_Functions_Group1 255 | * @{ 256 | */ 257 | /* Initialization/de-initialization functions **********************************/ 258 | HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg); 259 | void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg); 260 | /* Callbacks Register/UnRegister functions ***********************************/ 261 | #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) 262 | HAL_StatusTypeDef HAL_WWDG_RegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID, 263 | pWWDG_CallbackTypeDef pCallback); 264 | HAL_StatusTypeDef HAL_WWDG_UnRegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID); 265 | #endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */ 266 | 267 | /** 268 | * @} 269 | */ 270 | 271 | /** @addtogroup WWDG_Exported_Functions_Group2 272 | * @{ 273 | */ 274 | /* I/O operation functions ******************************************************/ 275 | HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg); 276 | void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg); 277 | void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg); 278 | /** 279 | * @} 280 | */ 281 | 282 | /** 283 | * @} 284 | */ 285 | 286 | /** 287 | * @} 288 | */ 289 | 290 | /** 291 | * @} 292 | */ 293 | 294 | #ifdef __cplusplus 295 | } 296 | #endif 297 | 298 | #endif /* STM32F0xx_HAL_WWDG_H */ 299 | 300 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_ll_cortex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_cortex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CORTEX LL module. 6 | @verbatim 7 | ============================================================================== 8 | ##### How to use this driver ##### 9 | ============================================================================== 10 | [..] 11 | The LL CORTEX driver contains a set of generic APIs that can be 12 | used by user: 13 | (+) SYSTICK configuration used by LL_mDelay and LL_Init1msTick 14 | functions 15 | (+) Low power mode configuration (SCB register of Cortex-MCU) 16 | (+) API to access to MCU info (CPUID register) 17 | 18 | @endverbatim 19 | ****************************************************************************** 20 | * @attention 21 | * 22 | * Copyright (c) 2016 STMicroelectronics. 23 | * All rights reserved. 24 | * 25 | * This software is licensed under terms that can be found in the LICENSE file in 26 | * the root directory of this software component. 27 | * If no LICENSE file comes with this software, it is provided AS-IS. 28 | * 29 | ****************************************************************************** 30 | */ 31 | 32 | /* Define to prevent recursive inclusion -------------------------------------*/ 33 | #ifndef __STM32F0xx_LL_CORTEX_H 34 | #define __STM32F0xx_LL_CORTEX_H 35 | 36 | #ifdef __cplusplus 37 | extern "C" { 38 | #endif 39 | 40 | /* Includes ------------------------------------------------------------------*/ 41 | #include "stm32f0xx.h" 42 | 43 | /** @addtogroup STM32F0xx_LL_Driver 44 | * @{ 45 | */ 46 | 47 | /** @defgroup CORTEX_LL CORTEX 48 | * @{ 49 | */ 50 | 51 | /* Private types -------------------------------------------------------------*/ 52 | /* Private variables ---------------------------------------------------------*/ 53 | 54 | /* Private constants ---------------------------------------------------------*/ 55 | 56 | /* Private macros ------------------------------------------------------------*/ 57 | 58 | /* Exported types ------------------------------------------------------------*/ 59 | /* Exported constants --------------------------------------------------------*/ 60 | /** @defgroup CORTEX_LL_Exported_Constants CORTEX Exported Constants 61 | * @{ 62 | */ 63 | 64 | /** @defgroup CORTEX_LL_EC_CLKSOURCE_HCLK SYSTICK Clock Source 65 | * @{ 66 | */ 67 | #define LL_SYSTICK_CLKSOURCE_HCLK_DIV8 0x00000000U /*!< AHB clock divided by 8 selected as SysTick clock source.*/ 68 | #define LL_SYSTICK_CLKSOURCE_HCLK SysTick_CTRL_CLKSOURCE_Msk /*!< AHB clock selected as SysTick clock source. */ 69 | /** 70 | * @} 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /* Exported macro ------------------------------------------------------------*/ 78 | 79 | /* Exported functions --------------------------------------------------------*/ 80 | /** @defgroup CORTEX_LL_Exported_Functions CORTEX Exported Functions 81 | * @{ 82 | */ 83 | 84 | /** @defgroup CORTEX_LL_EF_SYSTICK SYSTICK 85 | * @{ 86 | */ 87 | 88 | /** 89 | * @brief This function checks if the Systick counter flag is active or not. 90 | * @note It can be used in timeout function on application side. 91 | * @rmtoll STK_CTRL COUNTFLAG LL_SYSTICK_IsActiveCounterFlag 92 | * @retval State of bit (1 or 0). 93 | */ 94 | __STATIC_INLINE uint32_t LL_SYSTICK_IsActiveCounterFlag(void) 95 | { 96 | return ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == (SysTick_CTRL_COUNTFLAG_Msk)); 97 | } 98 | 99 | /** 100 | * @brief Configures the SysTick clock source 101 | * @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_SetClkSource 102 | * @param Source This parameter can be one of the following values: 103 | * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8 104 | * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK 105 | * @retval None 106 | */ 107 | __STATIC_INLINE void LL_SYSTICK_SetClkSource(uint32_t Source) 108 | { 109 | if (Source == LL_SYSTICK_CLKSOURCE_HCLK) 110 | { 111 | SET_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); 112 | } 113 | else 114 | { 115 | CLEAR_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); 116 | } 117 | } 118 | 119 | /** 120 | * @brief Get the SysTick clock source 121 | * @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_GetClkSource 122 | * @retval Returned value can be one of the following values: 123 | * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8 124 | * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK 125 | */ 126 | __STATIC_INLINE uint32_t LL_SYSTICK_GetClkSource(void) 127 | { 128 | return READ_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); 129 | } 130 | 131 | /** 132 | * @brief Enable SysTick exception request 133 | * @rmtoll STK_CTRL TICKINT LL_SYSTICK_EnableIT 134 | * @retval None 135 | */ 136 | __STATIC_INLINE void LL_SYSTICK_EnableIT(void) 137 | { 138 | SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); 139 | } 140 | 141 | /** 142 | * @brief Disable SysTick exception request 143 | * @rmtoll STK_CTRL TICKINT LL_SYSTICK_DisableIT 144 | * @retval None 145 | */ 146 | __STATIC_INLINE void LL_SYSTICK_DisableIT(void) 147 | { 148 | CLEAR_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); 149 | } 150 | 151 | /** 152 | * @brief Checks if the SYSTICK interrupt is enabled or disabled. 153 | * @rmtoll STK_CTRL TICKINT LL_SYSTICK_IsEnabledIT 154 | * @retval State of bit (1 or 0). 155 | */ 156 | __STATIC_INLINE uint32_t LL_SYSTICK_IsEnabledIT(void) 157 | { 158 | return (READ_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk) == (SysTick_CTRL_TICKINT_Msk)); 159 | } 160 | 161 | /** 162 | * @} 163 | */ 164 | 165 | /** @defgroup CORTEX_LL_EF_LOW_POWER_MODE LOW POWER MODE 166 | * @{ 167 | */ 168 | 169 | /** 170 | * @brief Processor uses sleep as its low power mode 171 | * @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep 172 | * @retval None 173 | */ 174 | __STATIC_INLINE void LL_LPM_EnableSleep(void) 175 | { 176 | /* Clear SLEEPDEEP bit of Cortex System Control Register */ 177 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 178 | } 179 | 180 | /** 181 | * @brief Processor uses deep sleep as its low power mode 182 | * @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableDeepSleep 183 | * @retval None 184 | */ 185 | __STATIC_INLINE void LL_LPM_EnableDeepSleep(void) 186 | { 187 | /* Set SLEEPDEEP bit of Cortex System Control Register */ 188 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 189 | } 190 | 191 | /** 192 | * @brief Configures sleep-on-exit when returning from Handler mode to Thread mode. 193 | * @note Setting this bit to 1 enables an interrupt-driven application to avoid returning to an 194 | * empty main application. 195 | * @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_EnableSleepOnExit 196 | * @retval None 197 | */ 198 | __STATIC_INLINE void LL_LPM_EnableSleepOnExit(void) 199 | { 200 | /* Set SLEEPONEXIT bit of Cortex System Control Register */ 201 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); 202 | } 203 | 204 | /** 205 | * @brief Do not sleep when returning to Thread mode. 206 | * @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_DisableSleepOnExit 207 | * @retval None 208 | */ 209 | __STATIC_INLINE void LL_LPM_DisableSleepOnExit(void) 210 | { 211 | /* Clear SLEEPONEXIT bit of Cortex System Control Register */ 212 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); 213 | } 214 | 215 | /** 216 | * @brief Enabled events and all interrupts, including disabled interrupts, can wakeup the 217 | * processor. 218 | * @rmtoll SCB_SCR SEVEONPEND LL_LPM_EnableEventOnPend 219 | * @retval None 220 | */ 221 | __STATIC_INLINE void LL_LPM_EnableEventOnPend(void) 222 | { 223 | /* Set SEVEONPEND bit of Cortex System Control Register */ 224 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); 225 | } 226 | 227 | /** 228 | * @brief Only enabled interrupts or events can wakeup the processor, disabled interrupts are 229 | * excluded 230 | * @rmtoll SCB_SCR SEVEONPEND LL_LPM_DisableEventOnPend 231 | * @retval None 232 | */ 233 | __STATIC_INLINE void LL_LPM_DisableEventOnPend(void) 234 | { 235 | /* Clear SEVEONPEND bit of Cortex System Control Register */ 236 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); 237 | } 238 | 239 | /** 240 | * @} 241 | */ 242 | 243 | /** @defgroup CORTEX_LL_EF_MCU_INFO MCU INFO 244 | * @{ 245 | */ 246 | 247 | /** 248 | * @brief Get Implementer code 249 | * @rmtoll SCB_CPUID IMPLEMENTER LL_CPUID_GetImplementer 250 | * @retval Value should be equal to 0x41 for ARM 251 | */ 252 | __STATIC_INLINE uint32_t LL_CPUID_GetImplementer(void) 253 | { 254 | return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos); 255 | } 256 | 257 | /** 258 | * @brief Get Variant number (The r value in the rnpn product revision identifier) 259 | * @rmtoll SCB_CPUID VARIANT LL_CPUID_GetVariant 260 | * @retval Value between 0 and 255 (0x0: revision 0) 261 | */ 262 | __STATIC_INLINE uint32_t LL_CPUID_GetVariant(void) 263 | { 264 | return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos); 265 | } 266 | 267 | /** 268 | * @brief Get Architecture number 269 | * @rmtoll SCB_CPUID ARCHITECTURE LL_CPUID_GetArchitecture 270 | * @retval Value should be equal to 0xC for Cortex-M0 devices 271 | */ 272 | __STATIC_INLINE uint32_t LL_CPUID_GetArchitecture(void) 273 | { 274 | return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos); 275 | } 276 | 277 | /** 278 | * @brief Get Part number 279 | * @rmtoll SCB_CPUID PARTNO LL_CPUID_GetParNo 280 | * @retval Value should be equal to 0xC20 for Cortex-M0 281 | */ 282 | __STATIC_INLINE uint32_t LL_CPUID_GetParNo(void) 283 | { 284 | return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos); 285 | } 286 | 287 | /** 288 | * @brief Get Revision number (The p value in the rnpn product revision identifier, indicates patch release) 289 | * @rmtoll SCB_CPUID REVISION LL_CPUID_GetRevision 290 | * @retval Value between 0 and 255 (0x1: patch 1) 291 | */ 292 | __STATIC_INLINE uint32_t LL_CPUID_GetRevision(void) 293 | { 294 | return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos); 295 | } 296 | 297 | /** 298 | * @} 299 | */ 300 | 301 | /** 302 | * @} 303 | */ 304 | 305 | /** 306 | * @} 307 | */ 308 | 309 | /** 310 | * @} 311 | */ 312 | 313 | #ifdef __cplusplus 314 | } 315 | #endif 316 | 317 | #endif /* __STM32F0xx_LL_CORTEX_H */ 318 | 319 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_ll_usb.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_usb.h 4 | * @author MCD Application Team 5 | * @brief Header file of USB Low Layer HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F0xx_LL_USB_H 21 | #define STM32F0xx_LL_USB_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif /* __cplusplus */ 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f0xx_hal_def.h" 29 | 30 | #if defined (USB) 31 | /** @addtogroup STM32F0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup USB_LL 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | 41 | /** 42 | * @brief USB Mode definition 43 | */ 44 | 45 | typedef enum 46 | { 47 | USB_DEVICE_MODE = 0 48 | } USB_ModeTypeDef; 49 | 50 | 51 | /** 52 | * @brief USB Instance Initialization Structure definition 53 | */ 54 | typedef struct 55 | { 56 | uint8_t dev_endpoints; /*!< Device Endpoints number. 57 | This parameter depends on the used USB core. 58 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 59 | 60 | uint8_t speed; /*!< USB Core speed. 61 | This parameter can be any value of @ref PCD_Speed/HCD_Speed 62 | (HCD_SPEED_xxx, HCD_SPEED_xxx) */ 63 | 64 | uint8_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */ 65 | 66 | uint8_t phy_itface; /*!< Select the used PHY interface. 67 | This parameter can be any value of @ref PCD_PHY_Module/HCD_PHY_Module */ 68 | 69 | uint8_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ 70 | 71 | uint8_t low_power_enable; /*!< Enable or disable the low Power Mode. */ 72 | 73 | uint8_t lpm_enable; /*!< Enable or disable Link Power Management. */ 74 | 75 | uint8_t battery_charging_enable; /*!< Enable or disable Battery charging. */ 76 | } USB_CfgTypeDef; 77 | 78 | typedef struct 79 | { 80 | uint8_t num; /*!< Endpoint number 81 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 82 | 83 | uint8_t is_in; /*!< Endpoint direction 84 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 85 | 86 | uint8_t is_stall; /*!< Endpoint stall condition 87 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 88 | 89 | uint8_t type; /*!< Endpoint type 90 | This parameter can be any value of @ref USB_LL_EP_Type */ 91 | 92 | uint8_t data_pid_start; /*!< Initial data PID 93 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 94 | 95 | 96 | uint16_t pmaadress; /*!< PMA Address 97 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ 98 | 99 | uint16_t pmaaddr0; /*!< PMA Address0 100 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ 101 | 102 | uint16_t pmaaddr1; /*!< PMA Address1 103 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ 104 | 105 | uint8_t doublebuffer; /*!< Double buffer enable 106 | This parameter can be 0 or 1 */ 107 | 108 | 109 | uint32_t maxpacket; /*!< Endpoint Max packet size 110 | This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ 111 | 112 | uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ 113 | 114 | uint32_t xfer_len; /*!< Current transfer length */ 115 | 116 | uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ 117 | 118 | uint32_t xfer_len_db; /*!< double buffer transfer length used with bulk double buffer in */ 119 | 120 | uint8_t xfer_fill_db; /*!< double buffer Need to Fill new buffer used with bulk_in */ 121 | } USB_EPTypeDef; 122 | 123 | /* Exported constants --------------------------------------------------------*/ 124 | 125 | /** @defgroup PCD_Exported_Constants PCD Exported Constants 126 | * @{ 127 | */ 128 | /** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS 129 | * @{ 130 | */ 131 | #define EP_MPS_64 0U 132 | #define EP_MPS_32 1U 133 | #define EP_MPS_16 2U 134 | #define EP_MPS_8 3U 135 | /** 136 | * @} 137 | */ 138 | 139 | /** @defgroup USB_LL_EP_Type USB Low Layer EP Type 140 | * @{ 141 | */ 142 | #define EP_TYPE_CTRL 0U 143 | #define EP_TYPE_ISOC 1U 144 | #define EP_TYPE_BULK 2U 145 | #define EP_TYPE_INTR 3U 146 | #define EP_TYPE_MSK 3U 147 | /** 148 | * @} 149 | */ 150 | 151 | /** @defgroup USB_LL Device Speed 152 | * @{ 153 | */ 154 | #define USBD_FS_SPEED 2U 155 | /** 156 | * @} 157 | */ 158 | 159 | 160 | #define BTABLE_ADDRESS 0x000U 161 | #define PMA_ACCESS 1U 162 | 163 | #ifndef USB_EP_RX_STRX 164 | #define USB_EP_RX_STRX (0x3U << 12) 165 | #endif /* USB_EP_RX_STRX */ 166 | 167 | #define EP_ADDR_MSK 0x7U 168 | 169 | #ifndef USE_USB_DOUBLE_BUFFER 170 | #define USE_USB_DOUBLE_BUFFER 1U 171 | #endif /* USE_USB_DOUBLE_BUFFER */ 172 | 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | /* Exported macro ------------------------------------------------------------*/ 179 | /** 180 | * @} 181 | */ 182 | 183 | /* Exported functions --------------------------------------------------------*/ 184 | /** @addtogroup USB_LL_Exported_Functions USB Low Layer Exported Functions 185 | * @{ 186 | */ 187 | 188 | 189 | HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg); 190 | HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg); 191 | HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx); 192 | HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx); 193 | HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode); 194 | 195 | HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef const *USBx); 196 | HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef const *USBx, uint32_t num); 197 | 198 | #if defined (HAL_PCD_MODULE_ENABLED) 199 | HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); 200 | HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); 201 | HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep); 202 | HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep); 203 | HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep); 204 | HAL_StatusTypeDef USB_EPStopXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep); 205 | #endif /* defined (HAL_PCD_MODULE_ENABLED) */ 206 | 207 | HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address); 208 | HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx); 209 | HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx); 210 | HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx); 211 | uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx); 212 | HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx); 213 | HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx); 214 | 215 | void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, 216 | uint16_t wPMABufAddr, uint16_t wNBytes); 217 | 218 | void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, 219 | uint16_t wPMABufAddr, uint16_t wNBytes); 220 | 221 | /** 222 | * @} 223 | */ 224 | 225 | /** 226 | * @} 227 | */ 228 | 229 | /** 230 | * @} 231 | */ 232 | 233 | /** 234 | * @} 235 | */ 236 | #endif /* defined (USB) */ 237 | 238 | #ifdef __cplusplus 239 | } 240 | #endif /* __cplusplus */ 241 | 242 | 243 | #endif /* STM32F0xx_LL_USB_H */ 244 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_ll_utils.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_utils.h 4 | * @author MCD Application Team 5 | * @brief Header file of UTILS LL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | @verbatim 18 | ============================================================================== 19 | ##### How to use this driver ##### 20 | ============================================================================== 21 | [..] 22 | The LL UTILS driver contains a set of generic APIs that can be 23 | used by user: 24 | (+) Device electronic signature 25 | (+) Timing functions 26 | (+) PLL configuration functions 27 | 28 | @endverbatim 29 | ****************************************************************************** 30 | */ 31 | 32 | /* Define to prevent recursive inclusion -------------------------------------*/ 33 | #ifndef __STM32F0xx_LL_UTILS_H 34 | #define __STM32F0xx_LL_UTILS_H 35 | 36 | #ifdef __cplusplus 37 | extern "C" { 38 | #endif 39 | 40 | /* Includes ------------------------------------------------------------------*/ 41 | #include "stm32f0xx.h" 42 | 43 | /** @addtogroup STM32F0xx_LL_Driver 44 | * @{ 45 | */ 46 | 47 | /** @defgroup UTILS_LL UTILS 48 | * @{ 49 | */ 50 | 51 | /* Private types -------------------------------------------------------------*/ 52 | /* Private variables ---------------------------------------------------------*/ 53 | 54 | /* Private constants ---------------------------------------------------------*/ 55 | /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants 56 | * @{ 57 | */ 58 | 59 | /* Max delay can be used in LL_mDelay */ 60 | #define LL_MAX_DELAY 0xFFFFFFFFU 61 | 62 | /** 63 | * @brief Unique device ID register base address 64 | */ 65 | #define UID_BASE_ADDRESS UID_BASE 66 | 67 | /** 68 | * @brief Flash size data register base address 69 | */ 70 | #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /* Private macros ------------------------------------------------------------*/ 77 | /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros 78 | * @{ 79 | */ 80 | /** 81 | * @} 82 | */ 83 | /* Exported types ------------------------------------------------------------*/ 84 | /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures 85 | * @{ 86 | */ 87 | /** 88 | * @brief UTILS PLL structure definition 89 | */ 90 | typedef struct 91 | { 92 | uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock. 93 | This parameter can be a value of @ref RCC_LL_EC_PLL_MUL 94 | 95 | This feature can be modified afterwards using unitary function 96 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ 97 | 98 | #if defined(RCC_PLLSRC_PREDIV1_SUPPORT) 99 | uint32_t PLLDiv; /*!< Division factor for PLL VCO output clock. 100 | This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV 101 | 102 | This feature can be modified afterwards using unitary function 103 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ 104 | #else 105 | uint32_t Prediv; /*!< Division factor for HSE used as PLL clock source. 106 | This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV 107 | 108 | This feature can be modified afterwards using unitary function 109 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ 110 | #endif /* RCC_PLLSRC_PREDIV1_SUPPORT */ 111 | } LL_UTILS_PLLInitTypeDef; 112 | 113 | /** 114 | * @brief UTILS System, AHB and APB buses clock configuration structure definition 115 | */ 116 | typedef struct 117 | { 118 | uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK). 119 | This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV 120 | 121 | This feature can be modified afterwards using unitary function 122 | @ref LL_RCC_SetAHBPrescaler(). */ 123 | 124 | uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK). 125 | This parameter can be a value of @ref RCC_LL_EC_APB1_DIV 126 | 127 | This feature can be modified afterwards using unitary function 128 | @ref LL_RCC_SetAPB1Prescaler(). */ 129 | } LL_UTILS_ClkInitTypeDef; 130 | 131 | /** 132 | * @} 133 | */ 134 | 135 | /* Exported constants --------------------------------------------------------*/ 136 | /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants 137 | * @{ 138 | */ 139 | 140 | /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation 141 | * @{ 142 | */ 143 | #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */ 144 | #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */ 145 | /** 146 | * @} 147 | */ 148 | 149 | /** 150 | * @} 151 | */ 152 | 153 | /* Exported macro ------------------------------------------------------------*/ 154 | 155 | /* Exported functions --------------------------------------------------------*/ 156 | /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions 157 | * @{ 158 | */ 159 | 160 | /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE 161 | * @{ 162 | */ 163 | 164 | /** 165 | * @brief Get Word0 of the unique device identifier (UID based on 96 bits) 166 | * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format 167 | */ 168 | __STATIC_INLINE uint32_t LL_GetUID_Word0(void) 169 | { 170 | return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS))); 171 | } 172 | 173 | /** 174 | * @brief Get Word1 of the unique device identifier (UID based on 96 bits) 175 | * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40]) 176 | */ 177 | __STATIC_INLINE uint32_t LL_GetUID_Word1(void) 178 | { 179 | return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U)))); 180 | } 181 | 182 | /** 183 | * @brief Get Word2 of the unique device identifier (UID based on 96 bits) 184 | * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24] 185 | */ 186 | __STATIC_INLINE uint32_t LL_GetUID_Word2(void) 187 | { 188 | return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U)))); 189 | } 190 | 191 | /** 192 | * @brief Get Flash memory size 193 | * @note This bitfield indicates the size of the device Flash memory expressed in 194 | * Kbytes. As an example, 0x040 corresponds to 64 Kbytes. 195 | * @retval FLASH_SIZE[15:0]: Flash memory size 196 | */ 197 | __STATIC_INLINE uint32_t LL_GetFlashSize(void) 198 | { 199 | return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS))); 200 | } 201 | 202 | 203 | /** 204 | * @} 205 | */ 206 | 207 | /** @defgroup UTILS_LL_EF_DELAY DELAY 208 | * @{ 209 | */ 210 | 211 | /** 212 | * @brief This function configures the Cortex-M SysTick source of the time base. 213 | * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) 214 | * @note When a RTOS is used, it is recommended to avoid changing the SysTick 215 | * configuration by calling this function, for a delay use rather osDelay RTOS service. 216 | * @param Ticks Frequency of Ticks (Hz) 217 | * @retval None 218 | */ 219 | __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) 220 | { 221 | /* Configure the SysTick to have interrupt in 1ms time base */ 222 | SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ 223 | SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 224 | SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 225 | SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ 226 | } 227 | 228 | void LL_Init1msTick(uint32_t HCLKFrequency); 229 | void LL_mDelay(uint32_t Delay); 230 | 231 | /** 232 | * @} 233 | */ 234 | 235 | /** @defgroup UTILS_EF_SYSTEM SYSTEM 236 | * @{ 237 | */ 238 | 239 | void LL_SetSystemCoreClock(uint32_t HCLKFrequency); 240 | #if defined(FLASH_ACR_LATENCY) 241 | ErrorStatus LL_SetFlashLatency(uint32_t Frequency); 242 | #endif /* FLASH_ACR_LATENCY */ 243 | ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, 244 | LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); 245 | #if defined(RCC_CFGR_SW_HSI48) 246 | ErrorStatus LL_PLL_ConfigSystemClock_HSI48(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, 247 | LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); 248 | #endif /*RCC_CFGR_SW_HSI48*/ 249 | ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass, 250 | LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); 251 | 252 | /** 253 | * @} 254 | */ 255 | 256 | /** 257 | * @} 258 | */ 259 | 260 | /** 261 | * @} 262 | */ 263 | 264 | /** 265 | * @} 266 | */ 267 | 268 | #ifdef __cplusplus 269 | } 270 | #endif 271 | 272 | #endif /* __STM32F0xx_LL_UTILS_H */ 273 | -------------------------------------------------------------------------------- /Inc/stm32f0xx_ll_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_wwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of WWDG LL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F0xx_LL_WWDG_H 21 | #define STM32F0xx_LL_WWDG_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f0xx.h" 29 | 30 | /** @addtogroup STM32F0xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (WWDG) 35 | 36 | /** @defgroup WWDG_LL WWDG 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /* Exported types ------------------------------------------------------------*/ 45 | /* Exported constants --------------------------------------------------------*/ 46 | /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants 47 | * @{ 48 | */ 49 | 50 | /** @defgroup WWDG_LL_EC_IT IT Defines 51 | * @brief IT defines which can be used with LL_WWDG_ReadReg and LL_WWDG_WriteReg functions 52 | * @{ 53 | */ 54 | #define LL_WWDG_CFR_EWI WWDG_CFR_EWI 55 | /** 56 | * @} 57 | */ 58 | 59 | /** @defgroup WWDG_LL_EC_PRESCALER PRESCALER 60 | * @{ 61 | */ 62 | #define LL_WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096)/1 */ 63 | #define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */ 64 | #define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */ 65 | #define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */ 66 | /** 67 | * @} 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /* Exported macro ------------------------------------------------------------*/ 75 | /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros 76 | * @{ 77 | */ 78 | /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros 79 | * @{ 80 | */ 81 | /** 82 | * @brief Write a value in WWDG register 83 | * @param __INSTANCE__ WWDG Instance 84 | * @param __REG__ Register to be written 85 | * @param __VALUE__ Value to be written in the register 86 | * @retval None 87 | */ 88 | #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 89 | 90 | /** 91 | * @brief Read a value in WWDG register 92 | * @param __INSTANCE__ WWDG Instance 93 | * @param __REG__ Register to be read 94 | * @retval Register value 95 | */ 96 | #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 97 | /** 98 | * @} 99 | */ 100 | 101 | /** 102 | * @} 103 | */ 104 | 105 | /* Exported functions --------------------------------------------------------*/ 106 | /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions 107 | * @{ 108 | */ 109 | 110 | /** @defgroup WWDG_LL_EF_Configuration Configuration 111 | * @{ 112 | */ 113 | /** 114 | * @brief Enable Window Watchdog. The watchdog is always disabled after a reset. 115 | * @note It is enabled by setting the WDGA bit in the WWDG_CR register, 116 | * then it cannot be disabled again except by a reset. 117 | * This bit is set by software and only cleared by hardware after a reset. 118 | * When WDGA = 1, the watchdog can generate a reset. 119 | * @rmtoll CR WDGA LL_WWDG_Enable 120 | * @param WWDGx WWDG Instance 121 | * @retval None 122 | */ 123 | __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx) 124 | { 125 | SET_BIT(WWDGx->CR, WWDG_CR_WDGA); 126 | } 127 | 128 | /** 129 | * @brief Checks if Window Watchdog is enabled 130 | * @rmtoll CR WDGA LL_WWDG_IsEnabled 131 | * @param WWDGx WWDG Instance 132 | * @retval State of bit (1 or 0). 133 | */ 134 | __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(const WWDG_TypeDef *WWDGx) 135 | { 136 | return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); 137 | } 138 | 139 | /** 140 | * @brief Set the Watchdog counter value to provided value (7-bits T[6:0]) 141 | * @note When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset 142 | * This counter is decremented every (4096 x 2expWDGTB) PCLK cycles 143 | * A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared) 144 | * Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled) 145 | * @rmtoll CR T LL_WWDG_SetCounter 146 | * @param WWDGx WWDG Instance 147 | * @param Counter 0..0x7F (7 bit counter value) 148 | * @retval None 149 | */ 150 | __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter) 151 | { 152 | MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter); 153 | } 154 | 155 | /** 156 | * @brief Return current Watchdog Counter Value (7 bits counter value) 157 | * @rmtoll CR T LL_WWDG_GetCounter 158 | * @param WWDGx WWDG Instance 159 | * @retval 7 bit Watchdog Counter value 160 | */ 161 | __STATIC_INLINE uint32_t LL_WWDG_GetCounter(const WWDG_TypeDef *WWDGx) 162 | { 163 | return (READ_BIT(WWDGx->CR, WWDG_CR_T)); 164 | } 165 | 166 | /** 167 | * @brief Set the time base of the prescaler (WDGTB). 168 | * @note Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter 169 | * is decremented every (4096 x 2expWDGTB) PCLK cycles 170 | * @rmtoll CFR WDGTB LL_WWDG_SetPrescaler 171 | * @param WWDGx WWDG Instance 172 | * @param Prescaler This parameter can be one of the following values: 173 | * @arg @ref LL_WWDG_PRESCALER_1 174 | * @arg @ref LL_WWDG_PRESCALER_2 175 | * @arg @ref LL_WWDG_PRESCALER_4 176 | * @arg @ref LL_WWDG_PRESCALER_8 177 | * @retval None 178 | */ 179 | __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler) 180 | { 181 | MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler); 182 | } 183 | 184 | /** 185 | * @brief Return current Watchdog Prescaler Value 186 | * @rmtoll CFR WDGTB LL_WWDG_GetPrescaler 187 | * @param WWDGx WWDG Instance 188 | * @retval Returned value can be one of the following values: 189 | * @arg @ref LL_WWDG_PRESCALER_1 190 | * @arg @ref LL_WWDG_PRESCALER_2 191 | * @arg @ref LL_WWDG_PRESCALER_4 192 | * @arg @ref LL_WWDG_PRESCALER_8 193 | */ 194 | __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(const WWDG_TypeDef *WWDGx) 195 | { 196 | return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); 197 | } 198 | 199 | /** 200 | * @brief Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]). 201 | * @note This window value defines when write in the WWDG_CR register 202 | * to program Watchdog counter is allowed. 203 | * Watchdog counter value update must occur only when the counter value 204 | * is lower than the Watchdog window register value. 205 | * Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value 206 | * (in the control register) is refreshed before the downcounter has reached 207 | * the watchdog window register value. 208 | * Physically is possible to set the Window lower then 0x40 but it is not recommended. 209 | * To generate an immediate reset, it is possible to set the Counter lower than 0x40. 210 | * @rmtoll CFR W LL_WWDG_SetWindow 211 | * @param WWDGx WWDG Instance 212 | * @param Window 0x00..0x7F (7 bit Window value) 213 | * @retval None 214 | */ 215 | __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window) 216 | { 217 | MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window); 218 | } 219 | 220 | /** 221 | * @brief Return current Watchdog Window Value (7 bits value) 222 | * @rmtoll CFR W LL_WWDG_GetWindow 223 | * @param WWDGx WWDG Instance 224 | * @retval 7 bit Watchdog Window value 225 | */ 226 | __STATIC_INLINE uint32_t LL_WWDG_GetWindow(const WWDG_TypeDef *WWDGx) 227 | { 228 | return (READ_BIT(WWDGx->CFR, WWDG_CFR_W)); 229 | } 230 | 231 | /** 232 | * @} 233 | */ 234 | 235 | /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management 236 | * @{ 237 | */ 238 | /** 239 | * @brief Indicates if the WWDG Early Wakeup Interrupt Flag is set or not. 240 | * @note This bit is set by hardware when the counter has reached the value 0x40. 241 | * It must be cleared by software by writing 0. 242 | * A write of 1 has no effect. This bit is also set if the interrupt is not enabled. 243 | * @rmtoll SR EWIF LL_WWDG_IsActiveFlag_EWKUP 244 | * @param WWDGx WWDG Instance 245 | * @retval State of bit (1 or 0). 246 | */ 247 | __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(const WWDG_TypeDef *WWDGx) 248 | { 249 | return ((READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)) ? 1UL : 0UL); 250 | } 251 | 252 | /** 253 | * @brief Clear WWDG Early Wakeup Interrupt Flag (EWIF) 254 | * @rmtoll SR EWIF LL_WWDG_ClearFlag_EWKUP 255 | * @param WWDGx WWDG Instance 256 | * @retval None 257 | */ 258 | __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx) 259 | { 260 | WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF); 261 | } 262 | 263 | /** 264 | * @} 265 | */ 266 | 267 | /** @defgroup WWDG_LL_EF_IT_Management IT_Management 268 | * @{ 269 | */ 270 | /** 271 | * @brief Enable the Early Wakeup Interrupt. 272 | * @note When set, an interrupt occurs whenever the counter reaches value 0x40. 273 | * This interrupt is only cleared by hardware after a reset 274 | * @rmtoll CFR EWI LL_WWDG_EnableIT_EWKUP 275 | * @param WWDGx WWDG Instance 276 | * @retval None 277 | */ 278 | __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx) 279 | { 280 | SET_BIT(WWDGx->CFR, WWDG_CFR_EWI); 281 | } 282 | 283 | /** 284 | * @brief Check if Early Wakeup Interrupt is enabled 285 | * @rmtoll CFR EWI LL_WWDG_IsEnabledIT_EWKUP 286 | * @param WWDGx WWDG Instance 287 | * @retval State of bit (1 or 0). 288 | */ 289 | __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(const WWDG_TypeDef *WWDGx) 290 | { 291 | return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL); 292 | } 293 | 294 | /** 295 | * @} 296 | */ 297 | 298 | /** 299 | * @} 300 | */ 301 | 302 | /** 303 | * @} 304 | */ 305 | 306 | #endif /* WWDG */ 307 | 308 | /** 309 | * @} 310 | */ 311 | 312 | #ifdef __cplusplus 313 | } 314 | #endif 315 | 316 | #endif /* STM32F0xx_LL_WWDG_H */ 317 | -------------------------------------------------------------------------------- /LICENSE.md: -------------------------------------------------------------------------------- 1 | Copyright 2016 STMicroelectronics. 2 | All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without modification, 5 | are permitted provided that the following conditions are met: 6 | 7 | 1. Redistributions of source code must retain the above copyright notice, this 8 | list of conditions and the following disclaimer. 9 | 10 | 2. Redistributions in binary form must reproduce the above copyright notice, 11 | this list of conditions and the following disclaimer in the documentation and/or 12 | other materials provided with the distribution. 13 | 14 | 3. Neither the name of the copyright holder nor the names of its contributors 15 | may be used to endorse or promote products derived from this software without 16 | specific prior written permission. 17 | 18 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # STM32CubeF0 HAL Driver MCU Component 2 | 3 | ![latest tag](https://img.shields.io/github/v/tag/STMicroelectronics/stm32f0xx_hal_driver.svg?color=brightgreen) 4 | 5 | ## Overview 6 | 7 | **STM32Cube** is an STMicroelectronics original initiative to ease developers' life by reducing efforts, time and cost. 8 | 9 | **STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform delivered for each STM32 series. 10 | * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product. 11 | * The STM32 HAL-LL drivers, an abstraction layer offering a set of APIs ensuring maximized portability across the STM32 portfolio. 12 | * The BSP drivers of each evaluation, demonstration or nucleo board provided for this STM32 series. 13 | * A consistent set of middleware libraries such as RTOS, USB, FatFS, graphics, touch sensing library... 14 | * A full set of software projects (basic examples, applications, and demonstrations) for each board provided for this STM32 series. 15 | 16 | Two models of publication are proposed for the STM32Cube embedded software: 17 | * The monolithic **MCU Package**: all STM32Cube software modules of one STM32 series are present (Drivers, Middleware, Projects, Utilities) in the repository (usual name **STM32Cubexx**, xx corresponding to the STM32 series). 18 | * The **MCU component**: each STM32Cube software module being part of the STM32Cube MCU Package, is delivered as an individual repository, allowing the user to select and get only the required software functions. 19 | 20 | ## Description 21 | 22 | This **stm32f0xx_hal_driver** MCU component repo is one element of the STM32CubeF0 MCU embedded software package, providing the **HAL-LL Drivers** part. 23 | 24 | ## Release note 25 | 26 | Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/stm32f0xx_hal_driver/blob/master/Release_Notes.html). 27 | 28 | ## Compatibility information 29 | 30 | It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeF0/blob/master/Release_Notes.html) release note. 31 | 32 | The full **STM32CubeF0** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF0). 33 | 34 | ## Troubleshooting 35 | 36 | Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide. 37 | -------------------------------------------------------------------------------- /SECURITY.md: -------------------------------------------------------------------------------- 1 | # Report potential product security vulnerabilities 2 | 3 | ST places a high priority on security, and our Product Security Incident 4 | Response Team (PSIRT) is committed to rapidly addressing potential security 5 | vulnerabilities affecting our products. PSIRT's long history and vast experience 6 | in security allows ST to perform clear analyses and provide appropriate guidance 7 | on mitigations and solutions when applicable. 8 | 9 | If you wish to report potential security vulnerabilities regarding our products, 10 | **please do not report them through public GitHub issues.** Instead, we 11 | encourage you to report them to our ST PSIRT following the process described at: 12 | **https://www.st.com/content/st_com/en/security/report-vulnerabilities.html** 13 | 14 | ### IMPORTANT - READ CAREFULLY: 15 | 16 | STMicroelectronics International N.V., on behalf of itself, its affiliates and 17 | subsidiaries, (collectively “ST”) takes all potential security vulnerability 18 | reports or other related communications (“Report(s)”) seriously. In order to 19 | review Your Report (the terms “You” and “Yours” include your employer, and all 20 | affiliates, subsidiaries and related persons or entities) and take actions as 21 | deemed appropriate, ST requires that we have the rights and Your permission to 22 | do so. 23 | 24 | As such, by submitting Your Report to ST, You agree that You have the right to 25 | do so, and You grant to ST the rights to use the Report for purposes related to 26 | security vulnerability analysis, testing, correction, patching, reporting and 27 | any other related purpose or function. 28 | 29 | By submitting Your Report, You agree that ST’s 30 | [Privacy Policy](https://www.st.com/content/st_com/en/common/privacy-portal.html) 31 | applies to all related communications. 32 | -------------------------------------------------------------------------------- /Src/stm32f0xx_hal_adc_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_adc_ex.c 4 | * @author MCD Application Team 5 | * @brief This file provides firmware functions to manage the following 6 | * functionalities of the Analog to Digital Convertor (ADC) 7 | * peripheral: 8 | * + Peripheral Control functions 9 | * Other functions (generic functions) are available in file 10 | * "stm32f0xx_hal_adc.c". 11 | * 12 | ****************************************************************************** 13 | * @attention 14 | * 15 | * Copyright (c) 2016 STMicroelectronics. 16 | * All rights reserved. 17 | * 18 | * This software is licensed under terms that can be found in the LICENSE file 19 | * in the root directory of this software component. 20 | * If no LICENSE file comes with this software, it is provided AS-IS. 21 | * 22 | ****************************************************************************** 23 | @verbatim 24 | [..] 25 | (@) Sections "ADC peripheral features" and "How to use this driver" are 26 | available in file of generic functions "stm32l1xx_hal_adc.c". 27 | [..] 28 | @endverbatim 29 | */ 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f0xx_hal.h" 33 | 34 | /** @addtogroup STM32F0xx_HAL_Driver 35 | * @{ 36 | */ 37 | 38 | /** @defgroup ADCEx ADCEx 39 | * @brief ADC HAL module driver 40 | * @{ 41 | */ 42 | 43 | #ifdef HAL_ADC_MODULE_ENABLED 44 | 45 | /* Private typedef -----------------------------------------------------------*/ 46 | /* Private define ------------------------------------------------------------*/ 47 | /** @defgroup ADCEx_Private_Constants ADCEx Private Constants 48 | * @{ 49 | */ 50 | 51 | /* Fixed timeout values for ADC calibration, enable settling time, disable */ 52 | /* settling time. */ 53 | /* Values defined to be higher than worst cases: low clock frequency, */ 54 | /* maximum prescaler. */ 55 | /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */ 56 | /* prescaler 4. */ 57 | /* Unit: ms */ 58 | #define ADC_DISABLE_TIMEOUT 2 59 | #define ADC_CALIBRATION_TIMEOUT 2U 60 | /** 61 | * @} 62 | */ 63 | 64 | /* Private macros -------------------------------------------------------------*/ 65 | /* Private variables ---------------------------------------------------------*/ 66 | /* Private function prototypes -----------------------------------------------*/ 67 | /* Private functions ---------------------------------------------------------*/ 68 | 69 | /** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions 70 | * @{ 71 | */ 72 | 73 | /** @defgroup ADCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions 74 | * @brief Extended Initialization and Configuration functions 75 | * 76 | @verbatim 77 | =============================================================================== 78 | ##### IO operation functions ##### 79 | =============================================================================== 80 | [..] This section provides functions allowing to: 81 | (+) Perform the ADC calibration. 82 | @endverbatim 83 | * @{ 84 | */ 85 | 86 | /** 87 | * @brief Perform an ADC automatic self-calibration 88 | * Calibration prerequisite: ADC must be disabled (execute this 89 | * function before HAL_ADC_Start() or after HAL_ADC_Stop() ). 90 | * @note Calibration factor can be read after calibration, using function 91 | * HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]). 92 | * @param hadc ADC handle 93 | * @retval HAL status 94 | */ 95 | HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) 96 | { 97 | HAL_StatusTypeDef tmp_hal_status = HAL_OK; 98 | uint32_t tickstart = 0U; 99 | uint32_t backup_setting_adc_dma_transfer = 0; /* Note: Variable not declared as volatile because register read is already declared as volatile */ 100 | 101 | /* Check the parameters */ 102 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 103 | 104 | /* Process locked */ 105 | __HAL_LOCK(hadc); 106 | 107 | /* Calibration prerequisite: ADC must be disabled. */ 108 | if (ADC_IS_ENABLE(hadc) == RESET) 109 | { 110 | /* Set ADC state */ 111 | ADC_STATE_CLR_SET(hadc->State, 112 | HAL_ADC_STATE_REG_BUSY, 113 | HAL_ADC_STATE_BUSY_INTERNAL); 114 | 115 | /* Disable ADC DMA transfer request during calibration */ 116 | /* Note: Specificity of this STM32 series: Calibration factor is */ 117 | /* available in data register and also transferred by DMA. */ 118 | /* To not insert ADC calibration factor among ADC conversion data */ 119 | /* in array variable, DMA transfer must be disabled during */ 120 | /* calibration. */ 121 | backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG); 122 | CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG); 123 | 124 | /* Start ADC calibration */ 125 | hadc->Instance->CR |= ADC_CR_ADCAL; 126 | 127 | tickstart = HAL_GetTick(); 128 | 129 | /* Wait for calibration completion */ 130 | while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) 131 | { 132 | if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) 133 | { 134 | /* New check to avoid false timeout detection in case of preemption */ 135 | if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) 136 | { 137 | /* Update ADC state machine to error */ 138 | ADC_STATE_CLR_SET(hadc->State, 139 | HAL_ADC_STATE_BUSY_INTERNAL, 140 | HAL_ADC_STATE_ERROR_INTERNAL); 141 | 142 | /* Process unlocked */ 143 | __HAL_UNLOCK(hadc); 144 | 145 | return HAL_ERROR; 146 | } 147 | } 148 | } 149 | 150 | /* Restore ADC DMA transfer request after calibration */ 151 | SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer); 152 | 153 | /* Set ADC state */ 154 | ADC_STATE_CLR_SET(hadc->State, 155 | HAL_ADC_STATE_BUSY_INTERNAL, 156 | HAL_ADC_STATE_READY); 157 | } 158 | else 159 | { 160 | /* Update ADC state machine to error */ 161 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 162 | 163 | tmp_hal_status = HAL_ERROR; 164 | } 165 | 166 | /* Process unlocked */ 167 | __HAL_UNLOCK(hadc); 168 | 169 | /* Return function status */ 170 | return tmp_hal_status; 171 | } 172 | 173 | /** 174 | * @} 175 | */ 176 | 177 | /** 178 | * @} 179 | */ 180 | 181 | #endif /* HAL_ADC_MODULE_ENABLED */ 182 | /** 183 | * @} 184 | */ 185 | 186 | /** 187 | * @} 188 | */ 189 | 190 | -------------------------------------------------------------------------------- /Src/stm32f0xx_hal_crc_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_crc_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended CRC HAL module driver. 6 | * This file provides firmware functions to manage the extended 7 | * functionalities of the CRC peripheral. 8 | * 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * Copyright (c) 2016 STMicroelectronics. 13 | * All rights reserved. 14 | * 15 | * This software is licensed under terms that can be found in the LICENSE file 16 | * in the root directory of this software component. 17 | * If no LICENSE file comes with this software, it is provided AS-IS. 18 | * 19 | ****************************************************************************** 20 | @verbatim 21 | ================================================================================ 22 | ##### How to use this driver ##### 23 | ================================================================================ 24 | [..] 25 | (+) Set user-defined generating polynomial through HAL_CRCEx_Polynomial_Set() 26 | (+) Configure Input or Output data inversion 27 | 28 | @endverbatim 29 | ****************************************************************************** 30 | */ 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "stm32f0xx_hal.h" 34 | 35 | /** @addtogroup STM32F0xx_HAL_Driver 36 | * @{ 37 | */ 38 | 39 | /** @defgroup CRCEx CRCEx 40 | * @brief CRC Extended HAL module driver 41 | * @{ 42 | */ 43 | 44 | #ifdef HAL_CRC_MODULE_ENABLED 45 | 46 | /* Private typedef -----------------------------------------------------------*/ 47 | /* Private define ------------------------------------------------------------*/ 48 | /* Private macro -------------------------------------------------------------*/ 49 | /* Private variables ---------------------------------------------------------*/ 50 | /* Private function prototypes -----------------------------------------------*/ 51 | /* Exported functions --------------------------------------------------------*/ 52 | 53 | /** @defgroup CRCEx_Exported_Functions CRC Extended Exported Functions 54 | * @{ 55 | */ 56 | 57 | /** @defgroup CRCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions 58 | * @brief Extended Initialization and Configuration functions. 59 | * 60 | @verbatim 61 | =============================================================================== 62 | ##### Extended configuration functions ##### 63 | =============================================================================== 64 | [..] This section provides functions allowing to: 65 | (+) Configure the generating polynomial 66 | (+) Configure the input data inversion 67 | (+) Configure the output data inversion 68 | 69 | @endverbatim 70 | * @{ 71 | */ 72 | 73 | 74 | #if defined(CRC_POL_POL) 75 | /** 76 | * @brief Initialize the CRC polynomial if different from default one. 77 | * @param hcrc CRC handle 78 | * @param Pol CRC generating polynomial (7, 8, 16 or 32-bit long). 79 | * This parameter is written in normal representation, e.g. 80 | * @arg for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65 81 | * @arg for a polynomial of degree 16, X^16 + X^12 + X^5 + 1 is written 0x1021 82 | * @param PolyLength CRC polynomial length. 83 | * This parameter can be one of the following values: 84 | * @arg @ref CRC_POLYLENGTH_7B 7-bit long CRC (generating polynomial of degree 7) 85 | * @arg @ref CRC_POLYLENGTH_8B 8-bit long CRC (generating polynomial of degree 8) 86 | * @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16) 87 | * @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32) 88 | * @retval HAL status 89 | */ 90 | HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength) 91 | { 92 | HAL_StatusTypeDef status = HAL_OK; 93 | uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */ 94 | 95 | /* Check the parameters */ 96 | assert_param(IS_CRC_POL_LENGTH(PolyLength)); 97 | 98 | /* Ensure that the generating polynomial is odd */ 99 | if ((Pol & (uint32_t)(0x1U)) == 0U) 100 | { 101 | status = HAL_ERROR; 102 | } 103 | else 104 | { 105 | /* check polynomial definition vs polynomial size: 106 | * polynomial length must be aligned with polynomial 107 | * definition. HAL_ERROR is reported if Pol degree is 108 | * larger than that indicated by PolyLength. 109 | * Look for MSB position: msb will contain the degree of 110 | * the second to the largest polynomial member. E.g., for 111 | * X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */ 112 | while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U)) 113 | { 114 | } 115 | 116 | switch (PolyLength) 117 | { 118 | 119 | case CRC_POLYLENGTH_7B: 120 | if (msb >= HAL_CRC_LENGTH_7B) 121 | { 122 | status = HAL_ERROR; 123 | } 124 | break; 125 | case CRC_POLYLENGTH_8B: 126 | if (msb >= HAL_CRC_LENGTH_8B) 127 | { 128 | status = HAL_ERROR; 129 | } 130 | break; 131 | case CRC_POLYLENGTH_16B: 132 | if (msb >= HAL_CRC_LENGTH_16B) 133 | { 134 | status = HAL_ERROR; 135 | } 136 | break; 137 | 138 | case CRC_POLYLENGTH_32B: 139 | /* no polynomial definition vs. polynomial length issue possible */ 140 | break; 141 | default: 142 | status = HAL_ERROR; 143 | break; 144 | } 145 | } 146 | if (status == HAL_OK) 147 | { 148 | /* set generating polynomial */ 149 | WRITE_REG(hcrc->Instance->POL, Pol); 150 | 151 | /* set generating polynomial size */ 152 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength); 153 | } 154 | /* Return function status */ 155 | return status; 156 | } 157 | #endif /* CRC_POL_POL */ 158 | 159 | /** 160 | * @brief Set the Reverse Input data mode. 161 | * @param hcrc CRC handle 162 | * @param InputReverseMode Input Data inversion mode. 163 | * This parameter can be one of the following values: 164 | * @arg @ref CRC_INPUTDATA_INVERSION_NONE no change in bit order (default value) 165 | * @arg @ref CRC_INPUTDATA_INVERSION_BYTE Byte-wise bit reversal 166 | * @arg @ref CRC_INPUTDATA_INVERSION_HALFWORD HalfWord-wise bit reversal 167 | * @arg @ref CRC_INPUTDATA_INVERSION_WORD Word-wise bit reversal 168 | * @retval HAL status 169 | */ 170 | HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode) 171 | { 172 | /* Check the parameters */ 173 | assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(InputReverseMode)); 174 | 175 | /* Change CRC peripheral state */ 176 | hcrc->State = HAL_CRC_STATE_BUSY; 177 | 178 | /* set input data inversion mode */ 179 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, InputReverseMode); 180 | /* Change CRC peripheral state */ 181 | hcrc->State = HAL_CRC_STATE_READY; 182 | 183 | /* Return function status */ 184 | return HAL_OK; 185 | } 186 | 187 | /** 188 | * @brief Set the Reverse Output data mode. 189 | * @param hcrc CRC handle 190 | * @param OutputReverseMode Output Data inversion mode. 191 | * This parameter can be one of the following values: 192 | * @arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion (default value) 193 | * @arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE bit-level inversion (e.g. for a 8-bit CRC: 0xB5 becomes 0xAD) 194 | * @retval HAL status 195 | */ 196 | HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode) 197 | { 198 | /* Check the parameters */ 199 | assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(OutputReverseMode)); 200 | 201 | /* Change CRC peripheral state */ 202 | hcrc->State = HAL_CRC_STATE_BUSY; 203 | 204 | /* set output data inversion mode */ 205 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, OutputReverseMode); 206 | 207 | /* Change CRC peripheral state */ 208 | hcrc->State = HAL_CRC_STATE_READY; 209 | 210 | /* Return function status */ 211 | return HAL_OK; 212 | } 213 | 214 | 215 | /** 216 | * @} 217 | */ 218 | 219 | 220 | /** 221 | * @} 222 | */ 223 | 224 | 225 | #endif /* HAL_CRC_MODULE_ENABLED */ 226 | /** 227 | * @} 228 | */ 229 | 230 | /** 231 | * @} 232 | */ 233 | -------------------------------------------------------------------------------- /Src/stm32f0xx_hal_msp_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_msp_template.c 4 | * @author MCD Application Team 5 | * @brief HAL MSP module. 6 | * This file template is located in the HAL folder and should be copied 7 | * to the user folder. 8 | * 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * Copyright (c) 2016 STMicroelectronics. 13 | * All rights reserved. 14 | * 15 | * This software is licensed under terms that can be found in the LICENSE file 16 | * in the root directory of this software component. 17 | * If no LICENSE file comes with this software, it is provided AS-IS. 18 | * 19 | ****************************************************************************** 20 | @verbatim 21 | =============================================================================== 22 | ##### How to use this driver ##### 23 | =============================================================================== 24 | [..] 25 | 26 | @endverbatim 27 | ****************************************************************************** 28 | */ 29 | 30 | /* Includes ------------------------------------------------------------------*/ 31 | #include "stm32f0xx_hal.h" 32 | 33 | /** @addtogroup STM32F0xx_HAL_Driver 34 | * @{ 35 | */ 36 | 37 | /** @defgroup HAL_MSP HAL MSP module driver 38 | * @brief HAL MSP module. 39 | * @{ 40 | */ 41 | 42 | /* Private typedef -----------------------------------------------------------*/ 43 | /* Private define ------------------------------------------------------------*/ 44 | /* Private macro -------------------------------------------------------------*/ 45 | /* Private variables ---------------------------------------------------------*/ 46 | /* Private function prototypes -----------------------------------------------*/ 47 | /* Private functions ---------------------------------------------------------*/ 48 | 49 | /** @defgroup HAL_MSP_Private_Functions HAL MSP Private Functions 50 | * @{ 51 | */ 52 | 53 | /** 54 | * @brief Initializes the Global MSP. 55 | * @retval None 56 | */ 57 | void HAL_MspInit(void) 58 | { 59 | 60 | } 61 | 62 | /** 63 | * @brief DeInitializes the Global MSP. 64 | * @retval None 65 | */ 66 | void HAL_MspDeInit(void) 67 | { 68 | 69 | } 70 | 71 | /** 72 | * @brief Initializes the PPP MSP. 73 | * @retval None 74 | */ 75 | void HAL_PPP_MspInit(void) 76 | { 77 | 78 | } 79 | 80 | /** 81 | * @brief DeInitializes the PPP MSP. 82 | * @retval None 83 | */ 84 | void HAL_PPP_MspDeInit(void) 85 | { 86 | 87 | } 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** 94 | * @} 95 | */ 96 | 97 | /** 98 | * @} 99 | */ 100 | 101 | 102 | -------------------------------------------------------------------------------- /Src/stm32f0xx_hal_pcd_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_pcd_ex.c 4 | * @author MCD Application Team 5 | * @brief PCD Extended HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the USB Peripheral Controller: 8 | * + Extended features functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2016 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "stm32f0xx_hal.h" 25 | 26 | /** @addtogroup STM32F0xx_HAL_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup PCDEx PCDEx 31 | * @brief PCD Extended HAL module driver 32 | * @{ 33 | */ 34 | 35 | #ifdef HAL_PCD_MODULE_ENABLED 36 | 37 | #if defined (USB) 38 | /* Private types -------------------------------------------------------------*/ 39 | /* Private variables ---------------------------------------------------------*/ 40 | /* Private constants ---------------------------------------------------------*/ 41 | /* Private macros ------------------------------------------------------------*/ 42 | /* Private functions ---------------------------------------------------------*/ 43 | /* Exported functions --------------------------------------------------------*/ 44 | 45 | /** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions 46 | * @{ 47 | */ 48 | 49 | /** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 50 | * @brief PCDEx control functions 51 | * 52 | @verbatim 53 | =============================================================================== 54 | ##### Extended features functions ##### 55 | =============================================================================== 56 | [..] This section provides functions allowing to: 57 | (+) Update FIFO configuration 58 | 59 | @endverbatim 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @brief Configure PMA for EP 65 | * @param hpcd Device instance 66 | * @param ep_addr endpoint address 67 | * @param ep_kind endpoint Kind 68 | * USB_SNG_BUF: Single Buffer used 69 | * USB_DBL_BUF: Double Buffer used 70 | * @param pmaadress: EP address in The PMA: In case of single buffer endpoint 71 | * this parameter is 16-bit value providing the address 72 | * in PMA allocated to endpoint. 73 | * In case of double buffer endpoint this parameter 74 | * is a 32-bit value providing the endpoint buffer 0 address 75 | * in the LSB part of 32-bit value and endpoint buffer 1 address 76 | * in the MSB part of 32-bit value. 77 | * @retval HAL status 78 | */ 79 | 80 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, 81 | uint16_t ep_kind, uint32_t pmaadress) 82 | { 83 | PCD_EPTypeDef *ep; 84 | 85 | /* initialize ep structure*/ 86 | if ((0x80U & ep_addr) == 0x80U) 87 | { 88 | ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 89 | } 90 | else 91 | { 92 | ep = &hpcd->OUT_ep[ep_addr]; 93 | } 94 | 95 | /* Here we check if the endpoint is single or double Buffer*/ 96 | if (ep_kind == PCD_SNG_BUF) 97 | { 98 | /* Single Buffer */ 99 | ep->doublebuffer = 0U; 100 | /* Configure the PMA */ 101 | ep->pmaadress = (uint16_t)pmaadress; 102 | } 103 | #if (USE_USB_DOUBLE_BUFFER == 1U) 104 | else /* USB_DBL_BUF */ 105 | { 106 | /* Double Buffer Endpoint */ 107 | ep->doublebuffer = 1U; 108 | /* Configure the PMA */ 109 | ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); 110 | ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); 111 | } 112 | #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ 113 | 114 | return HAL_OK; 115 | } 116 | 117 | /** 118 | * @brief Activate BatteryCharging feature. 119 | * @param hpcd PCD handle 120 | * @retval HAL status 121 | */ 122 | HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) 123 | { 124 | USB_TypeDef *USBx = hpcd->Instance; 125 | hpcd->battery_charging_active = 1U; 126 | 127 | /* Enable BCD feature */ 128 | USBx->BCDR |= USB_BCDR_BCDEN; 129 | 130 | /* Enable DCD : Data Contact Detect */ 131 | USBx->BCDR &= ~(USB_BCDR_PDEN); 132 | USBx->BCDR &= ~(USB_BCDR_SDEN); 133 | USBx->BCDR |= USB_BCDR_DCDEN; 134 | 135 | return HAL_OK; 136 | } 137 | 138 | /** 139 | * @brief Deactivate BatteryCharging feature. 140 | * @param hpcd PCD handle 141 | * @retval HAL status 142 | */ 143 | HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) 144 | { 145 | USB_TypeDef *USBx = hpcd->Instance; 146 | hpcd->battery_charging_active = 0U; 147 | 148 | /* Disable BCD feature */ 149 | USBx->BCDR &= ~(USB_BCDR_BCDEN); 150 | 151 | return HAL_OK; 152 | } 153 | 154 | /** 155 | * @brief Handle BatteryCharging Process. 156 | * @param hpcd PCD handle 157 | * @retval HAL status 158 | */ 159 | void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) 160 | { 161 | USB_TypeDef *USBx = hpcd->Instance; 162 | uint32_t tickstart = HAL_GetTick(); 163 | 164 | /* Wait for Min DCD Timeout */ 165 | HAL_Delay(300U); 166 | 167 | /* Data Pin Contact ? Check Detect flag */ 168 | if ((USBx->BCDR & USB_BCDR_DCDET) == USB_BCDR_DCDET) 169 | { 170 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 171 | hpcd->BCDCallback(hpcd, PCD_BCD_CONTACT_DETECTION); 172 | #else 173 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); 174 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 175 | } 176 | /* Primary detection: checks if connected to Standard Downstream Port 177 | (without charging capability) */ 178 | USBx->BCDR &= ~(USB_BCDR_DCDEN); 179 | HAL_Delay(50U); 180 | USBx->BCDR |= (USB_BCDR_PDEN); 181 | HAL_Delay(50U); 182 | 183 | /* If Charger detect ? */ 184 | if ((USBx->BCDR & USB_BCDR_PDET) == USB_BCDR_PDET) 185 | { 186 | /* Start secondary detection to check connection to Charging Downstream 187 | Port or Dedicated Charging Port */ 188 | USBx->BCDR &= ~(USB_BCDR_PDEN); 189 | HAL_Delay(50U); 190 | USBx->BCDR |= (USB_BCDR_SDEN); 191 | HAL_Delay(50U); 192 | 193 | /* If CDP ? */ 194 | if ((USBx->BCDR & USB_BCDR_SDET) == USB_BCDR_SDET) 195 | { 196 | /* Dedicated Downstream Port DCP */ 197 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 198 | hpcd->BCDCallback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); 199 | #else 200 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); 201 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 202 | } 203 | else 204 | { 205 | /* Charging Downstream Port CDP */ 206 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 207 | hpcd->BCDCallback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); 208 | #else 209 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); 210 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 211 | } 212 | } 213 | else /* NO */ 214 | { 215 | /* Standard Downstream Port */ 216 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 217 | hpcd->BCDCallback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); 218 | #else 219 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); 220 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 221 | } 222 | 223 | /* Battery Charging capability discovery finished Start Enumeration */ 224 | (void)HAL_PCDEx_DeActivateBCD(hpcd); 225 | 226 | /* Check for the Timeout, else start USB Device */ 227 | if ((HAL_GetTick() - tickstart) > 1000U) 228 | { 229 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 230 | hpcd->BCDCallback(hpcd, PCD_BCD_ERROR); 231 | #else 232 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); 233 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 234 | } 235 | else 236 | { 237 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 238 | hpcd->BCDCallback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); 239 | #else 240 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); 241 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 242 | } 243 | } 244 | 245 | 246 | /** 247 | * @brief Activate LPM feature. 248 | * @param hpcd PCD handle 249 | * @retval HAL status 250 | */ 251 | HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) 252 | { 253 | 254 | USB_TypeDef *USBx = hpcd->Instance; 255 | hpcd->lpm_active = 1U; 256 | hpcd->LPM_State = LPM_L0; 257 | 258 | USBx->LPMCSR |= USB_LPMCSR_LMPEN; 259 | USBx->LPMCSR |= USB_LPMCSR_LPMACK; 260 | 261 | return HAL_OK; 262 | } 263 | 264 | /** 265 | * @brief Deactivate LPM feature. 266 | * @param hpcd PCD handle 267 | * @retval HAL status 268 | */ 269 | HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) 270 | { 271 | USB_TypeDef *USBx = hpcd->Instance; 272 | 273 | hpcd->lpm_active = 0U; 274 | 275 | USBx->LPMCSR &= ~(USB_LPMCSR_LMPEN); 276 | USBx->LPMCSR &= ~(USB_LPMCSR_LPMACK); 277 | 278 | return HAL_OK; 279 | } 280 | 281 | 282 | 283 | /** 284 | * @brief Send LPM message to user layer callback. 285 | * @param hpcd PCD handle 286 | * @param msg LPM message 287 | * @retval HAL status 288 | */ 289 | __weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) 290 | { 291 | /* Prevent unused argument(s) compilation warning */ 292 | UNUSED(hpcd); 293 | UNUSED(msg); 294 | 295 | /* NOTE : This function should not be modified, when the callback is needed, 296 | the HAL_PCDEx_LPM_Callback could be implemented in the user file 297 | */ 298 | } 299 | 300 | /** 301 | * @brief Send BatteryCharging message to user layer callback. 302 | * @param hpcd PCD handle 303 | * @param msg LPM message 304 | * @retval HAL status 305 | */ 306 | __weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) 307 | { 308 | /* Prevent unused argument(s) compilation warning */ 309 | UNUSED(hpcd); 310 | UNUSED(msg); 311 | 312 | /* NOTE : This function should not be modified, when the callback is needed, 313 | the HAL_PCDEx_BCD_Callback could be implemented in the user file 314 | */ 315 | } 316 | 317 | /** 318 | * @} 319 | */ 320 | 321 | /** 322 | * @} 323 | */ 324 | #endif /* defined (USB) */ 325 | #endif /* HAL_PCD_MODULE_ENABLED */ 326 | 327 | /** 328 | * @} 329 | */ 330 | 331 | /** 332 | * @} 333 | */ 334 | -------------------------------------------------------------------------------- /Src/stm32f0xx_hal_pwr_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_pwr_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended PWR HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the Power Controller (PWR) peripheral: 8 | * + Extended Initialization and de-initialization functions 9 | * + Extended Peripheral Control functions 10 | * 11 | ****************************************************************************** 12 | * @attention 13 | * 14 | * Copyright (c) 2016 STMicroelectronics. 15 | * All rights reserved. 16 | * 17 | * This software is licensed under terms that can be found in the LICENSE file 18 | * in the root directory of this software component. 19 | * If no LICENSE file comes with this software, it is provided AS-IS. 20 | * 21 | ****************************************************************************** 22 | */ 23 | 24 | /* Includes ------------------------------------------------------------------*/ 25 | #include "stm32f0xx_hal.h" 26 | 27 | /** @addtogroup STM32F0xx_HAL_Driver 28 | * @{ 29 | */ 30 | 31 | /** @defgroup PWREx PWREx 32 | * @brief PWREx HAL module driver 33 | * @{ 34 | */ 35 | 36 | #ifdef HAL_PWR_MODULE_ENABLED 37 | 38 | /* Private typedef -----------------------------------------------------------*/ 39 | /* Private define ------------------------------------------------------------*/ 40 | /** @defgroup PWREx_Private_Constants PWREx Private Constants 41 | * @{ 42 | */ 43 | #define PVD_MODE_IT (0x00010000U) 44 | #define PVD_MODE_EVT (0x00020000U) 45 | #define PVD_RISING_EDGE (0x00000001U) 46 | #define PVD_FALLING_EDGE (0x00000002U) 47 | /** 48 | * @} 49 | */ 50 | 51 | /* Private macro -------------------------------------------------------------*/ 52 | /* Private variables ---------------------------------------------------------*/ 53 | /* Private function prototypes -----------------------------------------------*/ 54 | /* Exported functions ---------------------------------------------------------*/ 55 | 56 | /** @defgroup PWREx_Exported_Functions PWREx Exported Functions 57 | * @{ 58 | */ 59 | 60 | /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions 61 | * @brief Extended Peripheral Control functions 62 | * 63 | @verbatim 64 | 65 | =============================================================================== 66 | ##### Peripheral extended control functions ##### 67 | =============================================================================== 68 | 69 | *** PVD configuration *** 70 | ========================= 71 | [..] 72 | (+) The PVD is used to monitor the VDD power supply by comparing it to a 73 | threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). 74 | (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower 75 | than the PVD threshold. This event is internally connected to the EXTI 76 | line16 and can generate an interrupt if enabled. This is done through 77 | HAL_PWR_ConfigPVD(), HAL_PWR_EnablePVD() functions. 78 | (+) The PVD is stopped in Standby mode. 79 | -@- PVD is not available on STM32F030x4/x6/x8 80 | 81 | *** VDDIO2 Monitor Configuration *** 82 | ==================================== 83 | [..] 84 | (+) VDDIO2 monitor is used to monitor the VDDIO2 power supply by comparing it 85 | to VREFInt Voltage 86 | (+) This monitor is internally connected to the EXTI line31 87 | and can generate an interrupt if enabled. This is done through 88 | HAL_PWREx_EnableVddio2Monitor() function. 89 | -@- VDDIO2 is available on STM32F07x/09x/04x 90 | 91 | @endverbatim 92 | * @{ 93 | */ 94 | 95 | #if defined (STM32F031x6) || defined (STM32F051x8) || \ 96 | defined (STM32F071xB) || defined (STM32F091xC) || \ 97 | defined (STM32F042x6) || defined (STM32F072xB) 98 | /** 99 | * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). 100 | * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration 101 | * information for the PVD. 102 | * @note Refer to the electrical characteristics of your device datasheet for 103 | * more details about the voltage threshold corresponding to each 104 | * detection level. 105 | * @retval None 106 | */ 107 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) 108 | { 109 | /* Check the parameters */ 110 | assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); 111 | assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); 112 | 113 | /* Set PLS[7:5] bits according to PVDLevel value */ 114 | MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); 115 | 116 | /* Clear any previous config. Keep it clear if no event or IT mode is selected */ 117 | __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); 118 | __HAL_PWR_PVD_EXTI_DISABLE_IT(); 119 | __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); 120 | 121 | /* Configure interrupt mode */ 122 | if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) 123 | { 124 | __HAL_PWR_PVD_EXTI_ENABLE_IT(); 125 | } 126 | 127 | /* Configure event mode */ 128 | if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) 129 | { 130 | __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); 131 | } 132 | 133 | /* Configure the edge */ 134 | if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) 135 | { 136 | __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); 137 | } 138 | 139 | if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) 140 | { 141 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); 142 | } 143 | } 144 | 145 | /** 146 | * @brief Enables the Power Voltage Detector(PVD). 147 | * @retval None 148 | */ 149 | void HAL_PWR_EnablePVD(void) 150 | { 151 | PWR->CR |= (uint32_t)PWR_CR_PVDE; 152 | } 153 | 154 | /** 155 | * @brief Disables the Power Voltage Detector(PVD). 156 | * @retval None 157 | */ 158 | void HAL_PWR_DisablePVD(void) 159 | { 160 | PWR->CR &= ~((uint32_t)PWR_CR_PVDE); 161 | } 162 | 163 | /** 164 | * @brief This function handles the PWR PVD interrupt request. 165 | * @note This API should be called under the PVD_IRQHandler() or PVD_VDDIO2_IRQHandler(). 166 | * @retval None 167 | */ 168 | void HAL_PWR_PVD_IRQHandler(void) 169 | { 170 | /* Check PWR exti flag */ 171 | if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) 172 | { 173 | /* PWR PVD interrupt user callback */ 174 | HAL_PWR_PVDCallback(); 175 | 176 | /* Clear PWR Exti pending bit */ 177 | __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); 178 | } 179 | } 180 | 181 | /** 182 | * @brief PWR PVD interrupt callback 183 | * @retval None 184 | */ 185 | __weak void HAL_PWR_PVDCallback(void) 186 | { 187 | /* NOTE : This function Should not be modified, when the callback is needed, 188 | the HAL_PWR_PVDCallback could be implemented in the user file 189 | */ 190 | } 191 | 192 | #endif /* defined (STM32F031x6) || defined (STM32F051x8) || */ 193 | /* defined (STM32F071xB) || defined (STM32F091xC) || */ 194 | /* defined (STM32F042x6) || defined (STM32F072xB) */ 195 | 196 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ 197 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ 198 | defined (STM32F091xC) || defined (STM32F098xx) 199 | /** 200 | * @brief Enable VDDIO2 monitor: enable Exti 31 and falling edge detection. 201 | * @note If Exti 31 is enable correlty and VDDIO2 voltage goes below Vrefint, 202 | an interrupt is generated Irq line 1. 203 | NVIS has to be enable by user. 204 | * @retval None 205 | */ 206 | void HAL_PWREx_EnableVddio2Monitor(void) 207 | { 208 | __HAL_PWR_VDDIO2_EXTI_ENABLE_IT(); 209 | __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE(); 210 | } 211 | 212 | /** 213 | * @brief Disable the Vddio2 Monitor. 214 | * @retval None 215 | */ 216 | void HAL_PWREx_DisableVddio2Monitor(void) 217 | { 218 | __HAL_PWR_VDDIO2_EXTI_DISABLE_IT(); 219 | __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE(); 220 | 221 | } 222 | 223 | /** 224 | * @brief This function handles the PWR Vddio2 monitor interrupt request. 225 | * @note This API should be called under the VDDIO2_IRQHandler() PVD_VDDIO2_IRQHandler(). 226 | * @retval None 227 | */ 228 | void HAL_PWREx_Vddio2Monitor_IRQHandler(void) 229 | { 230 | /* Check PWR exti flag */ 231 | if(__HAL_PWR_VDDIO2_EXTI_GET_FLAG() != RESET) 232 | { 233 | /* PWR Vddio2 monitor interrupt user callback */ 234 | HAL_PWREx_Vddio2MonitorCallback(); 235 | 236 | /* Clear PWR Exti pending bit */ 237 | __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG(); 238 | } 239 | } 240 | 241 | /** 242 | * @brief PWR Vddio2 Monitor interrupt callback 243 | * @retval None 244 | */ 245 | __weak void HAL_PWREx_Vddio2MonitorCallback(void) 246 | { 247 | /* NOTE : This function Should not be modified, when the callback is needed, 248 | the HAL_PWREx_Vddio2MonitorCallback could be implemented in the user file 249 | */ 250 | } 251 | 252 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ 253 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ 254 | defined (STM32F091xC) || defined (STM32F098xx) */ 255 | 256 | /** 257 | * @} 258 | */ 259 | 260 | /** 261 | * @} 262 | */ 263 | 264 | #endif /* HAL_PWR_MODULE_ENABLED */ 265 | /** 266 | * @} 267 | */ 268 | 269 | /** 270 | * @} 271 | */ 272 | -------------------------------------------------------------------------------- /Src/stm32f0xx_hal_smartcard_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_smartcard_ex.c 4 | * @author MCD Application Team 5 | * @brief SMARTCARD HAL module driver. 6 | * This file provides extended firmware functions to manage the following 7 | * functionalities of the SmartCard. 8 | * + Initialization and de-initialization functions 9 | * + Peripheral Control functions 10 | * 11 | ****************************************************************************** 12 | * @attention 13 | * 14 | * Copyright (c) 2016 STMicroelectronics. 15 | * All rights reserved. 16 | * 17 | * This software is licensed under terms that can be found in the LICENSE file 18 | * in the root directory of this software component. 19 | * If no LICENSE file comes with this software, it is provided AS-IS. 20 | * 21 | ****************************************************************************** 22 | @verbatim 23 | ============================================================================= 24 | ##### SMARTCARD peripheral extended features ##### 25 | ============================================================================= 26 | [..] 27 | The Extended SMARTCARD HAL driver can be used as follows: 28 | 29 | (#) After having configured the SMARTCARD basic features with HAL_SMARTCARD_Init(), 30 | then program SMARTCARD advanced features if required (TX/RX pins swap, TimeOut, 31 | auto-retry counter,...) in the hsmartcard AdvancedInit structure. 32 | @endverbatim 33 | ****************************************************************************** 34 | */ 35 | #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) \ 36 | && !defined(STM32F070xB) && !defined(STM32F030xC) 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f0xx_hal.h" 39 | 40 | /** @addtogroup STM32F0xx_HAL_Driver 41 | * @{ 42 | */ 43 | 44 | /** @defgroup SMARTCARDEx SMARTCARDEx 45 | * @brief SMARTCARD Extended HAL module driver 46 | * @{ 47 | */ 48 | #ifdef HAL_SMARTCARD_MODULE_ENABLED 49 | 50 | /* Private typedef -----------------------------------------------------------*/ 51 | /* Private define ------------------------------------------------------------*/ 52 | /* Private macros ------------------------------------------------------------*/ 53 | /* Private variables ---------------------------------------------------------*/ 54 | /* Private function prototypes -----------------------------------------------*/ 55 | /* Exported functions --------------------------------------------------------*/ 56 | /** @defgroup SMARTCARDEx_Exported_Functions SMARTCARD Extended Exported Functions 57 | * @{ 58 | */ 59 | 60 | /** @defgroup SMARTCARDEx_Exported_Functions_Group1 Extended Peripheral Control functions 61 | * @brief Extended control functions 62 | * 63 | @verbatim 64 | =============================================================================== 65 | ##### Peripheral Control functions ##### 66 | =============================================================================== 67 | [..] 68 | This subsection provides a set of functions allowing to initialize the SMARTCARD. 69 | (+) HAL_SMARTCARDEx_BlockLength_Config() API allows to configure the Block Length on the fly 70 | (+) HAL_SMARTCARDEx_TimeOut_Config() API allows to configure the receiver timeout value on the fly 71 | (+) HAL_SMARTCARDEx_EnableReceiverTimeOut() API enables the receiver timeout feature 72 | (+) HAL_SMARTCARDEx_DisableReceiverTimeOut() API disables the receiver timeout feature 73 | 74 | @endverbatim 75 | * @{ 76 | */ 77 | 78 | /** @brief Update on the fly the SMARTCARD block length in RTOR register. 79 | * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains 80 | * the configuration information for the specified SMARTCARD module. 81 | * @param BlockLength SMARTCARD block length (8-bit long at most) 82 | * @retval None 83 | */ 84 | void HAL_SMARTCARDEx_BlockLength_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t BlockLength) 85 | { 86 | MODIFY_REG(hsmartcard->Instance->RTOR, USART_RTOR_BLEN, ((uint32_t)BlockLength << USART_RTOR_BLEN_Pos)); 87 | } 88 | 89 | /** @brief Update on the fly the receiver timeout value in RTOR register. 90 | * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains 91 | * the configuration information for the specified SMARTCARD module. 92 | * @param TimeOutValue receiver timeout value in number of baud blocks. The timeout 93 | * value must be less or equal to 0x0FFFFFFFF. 94 | * @retval None 95 | */ 96 | void HAL_SMARTCARDEx_TimeOut_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t TimeOutValue) 97 | { 98 | assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsmartcard->Init.TimeOutValue)); 99 | MODIFY_REG(hsmartcard->Instance->RTOR, USART_RTOR_RTO, TimeOutValue); 100 | } 101 | 102 | /** @brief Enable the SMARTCARD receiver timeout feature. 103 | * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains 104 | * the configuration information for the specified SMARTCARD module. 105 | * @retval HAL status 106 | */ 107 | HAL_StatusTypeDef HAL_SMARTCARDEx_EnableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard) 108 | { 109 | if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY) 110 | { 111 | /* Process Locked */ 112 | __HAL_LOCK(hsmartcard); 113 | 114 | hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY; 115 | 116 | /* Set the USART RTOEN bit */ 117 | SET_BIT(hsmartcard->Instance->CR2, USART_CR2_RTOEN); 118 | 119 | hsmartcard->gState = HAL_SMARTCARD_STATE_READY; 120 | 121 | /* Process Unlocked */ 122 | __HAL_UNLOCK(hsmartcard); 123 | 124 | return HAL_OK; 125 | } 126 | else 127 | { 128 | return HAL_BUSY; 129 | } 130 | } 131 | 132 | /** @brief Disable the SMARTCARD receiver timeout feature. 133 | * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains 134 | * the configuration information for the specified SMARTCARD module. 135 | * @retval HAL status 136 | */ 137 | HAL_StatusTypeDef HAL_SMARTCARDEx_DisableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard) 138 | { 139 | if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY) 140 | { 141 | /* Process Locked */ 142 | __HAL_LOCK(hsmartcard); 143 | 144 | hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY; 145 | 146 | /* Clear the USART RTOEN bit */ 147 | CLEAR_BIT(hsmartcard->Instance->CR2, USART_CR2_RTOEN); 148 | 149 | hsmartcard->gState = HAL_SMARTCARD_STATE_READY; 150 | 151 | /* Process Unlocked */ 152 | __HAL_UNLOCK(hsmartcard); 153 | 154 | return HAL_OK; 155 | } 156 | else 157 | { 158 | return HAL_BUSY; 159 | } 160 | } 161 | 162 | /** 163 | * @} 164 | */ 165 | 166 | /** @defgroup SMARTCARDEx_Exported_Functions_Group2 Extended Peripheral IO operation functions 167 | * @brief SMARTCARD Transmit and Receive functions 168 | * 169 | * @{ 170 | */ 171 | 172 | /** 173 | * @} 174 | */ 175 | 176 | 177 | /** 178 | * @} 179 | */ 180 | 181 | /** @defgroup SMARTCARDEx_Private_Functions SMARTCARD Extended Private Functions 182 | * @{ 183 | */ 184 | 185 | /** 186 | * @} 187 | */ 188 | 189 | #endif /* HAL_SMARTCARD_MODULE_ENABLED */ 190 | 191 | /** 192 | * @} 193 | */ 194 | 195 | /** 196 | * @} 197 | */ 198 | #endif /* !STM32F030x6 && !STM32F030x8 && !STM32F070x6 && !STM32F070xB && !STM32F030xC */ 199 | -------------------------------------------------------------------------------- /Src/stm32f0xx_hal_spi_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_spi_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended SPI HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * SPI peripheral extended functionalities : 8 | * + IO operation functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2016 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "stm32f0xx_hal.h" 25 | 26 | /** @addtogroup STM32F0xx_HAL_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup SPIEx SPIEx 31 | * @brief SPI Extended HAL module driver 32 | * @{ 33 | */ 34 | #ifdef HAL_SPI_MODULE_ENABLED 35 | 36 | /* Private typedef -----------------------------------------------------------*/ 37 | /* Private defines -----------------------------------------------------------*/ 38 | /** @defgroup SPIEx_Private_Constants SPIEx Private Constants 39 | * @{ 40 | */ 41 | #define SPI_FIFO_SIZE 4UL 42 | /** 43 | * @} 44 | */ 45 | 46 | /* Private macros ------------------------------------------------------------*/ 47 | /* Private variables ---------------------------------------------------------*/ 48 | /* Private function prototypes -----------------------------------------------*/ 49 | /* Exported functions --------------------------------------------------------*/ 50 | 51 | /** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions 52 | * @{ 53 | */ 54 | 55 | /** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions 56 | * @brief Data transfers functions 57 | * 58 | @verbatim 59 | ============================================================================== 60 | ##### IO operation functions ##### 61 | =============================================================================== 62 | [..] 63 | This subsection provides a set of extended functions to manage the SPI 64 | data transfers. 65 | 66 | (#) Rx data flush function: 67 | (++) HAL_SPIEx_FlushRxFifo() 68 | 69 | @endverbatim 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief Flush the RX fifo. 75 | * @param hspi pointer to a SPI_HandleTypeDef structure that contains 76 | * the configuration information for the specified SPI module. 77 | * @retval HAL status 78 | */ 79 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi) 80 | { 81 | __IO uint32_t tmpreg; 82 | uint8_t count = 0U; 83 | while ((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_FRLVL_EMPTY) 84 | { 85 | count++; 86 | tmpreg = hspi->Instance->DR; 87 | UNUSED(tmpreg); /* To avoid GCC warning */ 88 | if (count == SPI_FIFO_SIZE) 89 | { 90 | return HAL_TIMEOUT; 91 | } 92 | } 93 | return HAL_OK; 94 | } 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | #endif /* HAL_SPI_MODULE_ENABLED */ 105 | 106 | /** 107 | * @} 108 | */ 109 | 110 | /** 111 | * @} 112 | */ 113 | -------------------------------------------------------------------------------- /Src/stm32f0xx_hal_timebase_rtc_alarm_template.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/stm32f0xx-hal-driver/94399697cb5eeaf8511b81b7f50dc62f0a5a3f6c/Src/stm32f0xx_hal_timebase_rtc_alarm_template.c -------------------------------------------------------------------------------- /Src/stm32f0xx_hal_timebase_rtc_wakeup_template.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/stm32f0xx-hal-driver/94399697cb5eeaf8511b81b7f50dc62f0a5a3f6c/Src/stm32f0xx_hal_timebase_rtc_wakeup_template.c -------------------------------------------------------------------------------- /Src/stm32f0xx_hal_timebase_tim_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_timebase_tim_template.c 4 | * @brief HAL time base based on the hardware TIM Template. 5 | * 6 | * This file override the native HAL time base functions (defined as weak) 7 | * the TIM time base: 8 | * + Initializes the TIM peripheral generate a Period elapsed Event each 1ms 9 | * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms 10 | * 11 | ****************************************************************************** 12 | * @attention 13 | * 14 | * Copyright (c) 2016 STMicroelectronics. 15 | * All rights reserved. 16 | * 17 | * This software is licensed under terms that can be found in the LICENSE file 18 | * in the root directory of this software component. 19 | * If no LICENSE file comes with this software, it is provided AS-IS. 20 | * 21 | ****************************************************************************** 22 | */ 23 | 24 | /* Includes ------------------------------------------------------------------*/ 25 | #include "stm32f0xx_hal.h" 26 | 27 | /** @addtogroup STM32F0xx_HAL_Driver 28 | * @{ 29 | */ 30 | 31 | /** @addtogroup HAL_TimeBase_TIM 32 | * @{ 33 | */ 34 | 35 | /* Private typedef -----------------------------------------------------------*/ 36 | /* Private define ------------------------------------------------------------*/ 37 | /* Private macro -------------------------------------------------------------*/ 38 | /* Private variables ---------------------------------------------------------*/ 39 | TIM_HandleTypeDef TimHandle; 40 | /* Private function prototypes -----------------------------------------------*/ 41 | void TIM6_DAC_IRQHandler(void); 42 | /* Private functions ---------------------------------------------------------*/ 43 | 44 | /** 45 | * @brief This function configures the TIM6 as a time base source. 46 | * The time source is configured to have 1ms time base with a dedicated 47 | * Tick interrupt priority. 48 | * @note This function is called automatically at the beginning of program after 49 | * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). 50 | * @param TickPriority Tick interrupt priority. 51 | * @retval HAL status 52 | */ 53 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority) 54 | { 55 | RCC_ClkInitTypeDef clkconfig; 56 | uint32_t uwTimclock, uwAPB1Prescaler = 0U; 57 | uint32_t uwPrescalerValue = 0U; 58 | uint32_t pFLatency; 59 | HAL_StatusTypeDef status; 60 | 61 | /* Enable TIM6 clock */ 62 | __HAL_RCC_TIM6_CLK_ENABLE(); 63 | 64 | /* Get clock configuration */ 65 | HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); 66 | 67 | /* Get APB1 prescaler */ 68 | uwAPB1Prescaler = clkconfig.APB1CLKDivider; 69 | 70 | /* Compute TIM6 clock */ 71 | if (uwAPB1Prescaler == RCC_HCLK_DIV1) 72 | { 73 | uwTimclock = HAL_RCC_GetPCLK1Freq(); 74 | } 75 | else 76 | { 77 | uwTimclock = 2 * HAL_RCC_GetPCLK1Freq(); 78 | } 79 | 80 | /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */ 81 | uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U); 82 | 83 | /* Initialize TIM6 */ 84 | TimHandle.Instance = TIM6; 85 | 86 | /* Initialize TIMx peripheral as follow: 87 | + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base. 88 | + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. 89 | + ClockDivision = 0 90 | + Counter direction = Up 91 | */ 92 | TimHandle.Init.Period = (1000000U / 1000U) - 1U; 93 | TimHandle.Init.Prescaler = uwPrescalerValue; 94 | TimHandle.Init.ClockDivision = 0U; 95 | TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP; 96 | TimHandle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 97 | status = HAL_TIM_Base_Init(&TimHandle); 98 | if (status == HAL_OK) 99 | { 100 | /* Start the TIM time Base generation in interrupt mode */ 101 | status = HAL_TIM_Base_Start_IT(&TimHandle); 102 | if (status == HAL_OK) 103 | { 104 | /* Enable the TIM6 global Interrupt */ 105 | HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn); 106 | 107 | if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 108 | { 109 | /* Enable the TIM6 global Interrupt */ 110 | HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0); 111 | uwTickPrio = TickPriority; 112 | } 113 | else 114 | { 115 | status = HAL_ERROR; 116 | } 117 | } 118 | } 119 | /* Return function status */ 120 | return status; 121 | } 122 | 123 | /** 124 | * @brief Suspend Tick increment. 125 | * @note Disable the tick increment by disabling TIM6 update interrupt. 126 | * @param None 127 | * @retval None 128 | */ 129 | void HAL_SuspendTick(void) 130 | { 131 | /* Disable TIM6 update Interrupt */ 132 | __HAL_TIM_DISABLE_IT(&TimHandle, TIM_IT_UPDATE); 133 | } 134 | 135 | /** 136 | * @brief Resume Tick increment. 137 | * @note Enable the tick increment by Enabling TIM6 update interrupt. 138 | * @param None 139 | * @retval None 140 | */ 141 | void HAL_ResumeTick(void) 142 | { 143 | /* Enable TIM6 Update interrupt */ 144 | __HAL_TIM_ENABLE_IT(&TimHandle, TIM_IT_UPDATE); 145 | } 146 | 147 | /** 148 | * @brief Period elapsed callback in non blocking mode 149 | * @note This function is called when TIM6 interrupt took place, inside 150 | * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment 151 | * a global variable "uwTick" used as application time base. 152 | * @param htim TIM handle 153 | * @retval None 154 | */ 155 | void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) 156 | { 157 | HAL_IncTick(); 158 | } 159 | 160 | /** 161 | * @brief This function handles TIM interrupt request. 162 | * @param None 163 | * @retval None 164 | */ 165 | void TIM6_DAC_IRQHandler(void) 166 | { 167 | HAL_TIM_IRQHandler(&TimHandle); 168 | } 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | 179 | -------------------------------------------------------------------------------- /Src/stm32f0xx_hal_usart_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_usart_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended USART HAL module driver. 6 | * This file provides firmware functions to manage the following extended 7 | * functionalities of the Universal Synchronous Receiver Transmitter Peripheral (USART). 8 | * + Peripheral Control functions 9 | * 10 | * 11 | ****************************************************************************** 12 | * @attention 13 | * 14 | * Copyright (c) 2016 STMicroelectronics. 15 | * All rights reserved. 16 | * 17 | * This software is licensed under terms that can be found in the LICENSE file 18 | * in the root directory of this software component. 19 | * If no LICENSE file comes with this software, it is provided AS-IS. 20 | * 21 | ****************************************************************************** 22 | @verbatim 23 | ============================================================================== 24 | ##### USART peripheral extended features ##### 25 | ============================================================================== 26 | 27 | (#) FIFO mode enabling/disabling and RX/TX FIFO threshold programming. 28 | 29 | -@- When USART operates in FIFO mode, FIFO mode must be enabled prior 30 | starting RX/TX transfers. Also RX/TX FIFO thresholds must be 31 | configured prior starting RX/TX transfers. 32 | 33 | (#) Slave mode enabling/disabling and NSS pin configuration. 34 | 35 | -@- When USART operates in Slave mode, Slave mode must be enabled prior 36 | starting RX/TX transfers. 37 | 38 | @endverbatim 39 | ****************************************************************************** 40 | */ 41 | 42 | /* Includes ------------------------------------------------------------------*/ 43 | #include "stm32f0xx_hal.h" 44 | 45 | /** @addtogroup STM32F0xx_HAL_Driver 46 | * @{ 47 | */ 48 | 49 | /** @defgroup USARTEx USARTEx 50 | * @brief USART Extended HAL module driver 51 | * @{ 52 | */ 53 | 54 | #ifdef HAL_USART_MODULE_ENABLED 55 | 56 | /* Private typedef -----------------------------------------------------------*/ 57 | /* Private define ------------------------------------------------------------*/ 58 | /* Private macros ------------------------------------------------------------*/ 59 | /* Private variables ---------------------------------------------------------*/ 60 | /* Private function prototypes -----------------------------------------------*/ 61 | 62 | /* Exported functions --------------------------------------------------------*/ 63 | 64 | /** @defgroup USARTEx_Exported_Functions USARTEx Exported Functions 65 | * @{ 66 | */ 67 | 68 | /** @defgroup USARTEx_Exported_Functions_Group1 IO operation functions 69 | * @brief Extended USART Transmit/Receive functions 70 | * 71 | @verbatim 72 | =============================================================================== 73 | ##### IO operation functions ##### 74 | =============================================================================== 75 | This subsection provides a set of FIFO mode related callback functions. 76 | 77 | (#) TX/RX Fifos Callbacks: 78 | (+) HAL_USARTEx_RxFifoFullCallback() 79 | (+) HAL_USARTEx_TxFifoEmptyCallback() 80 | 81 | @endverbatim 82 | * @{ 83 | */ 84 | 85 | 86 | /** 87 | * @} 88 | */ 89 | 90 | /** @defgroup USARTEx_Exported_Functions_Group2 Peripheral Control functions 91 | * @brief Extended Peripheral Control functions 92 | * 93 | @verbatim 94 | =============================================================================== 95 | ##### Peripheral Control functions ##### 96 | =============================================================================== 97 | [..] This section provides the following functions: 98 | (+) HAL_USARTEx_EnableSPISlaveMode() API enables the SPI slave mode 99 | (+) HAL_USARTEx_DisableSPISlaveMode() API disables the SPI slave mode 100 | (+) HAL_USARTEx_ConfigNSS API configures the Slave Select input pin (NSS) 101 | (+) HAL_USARTEx_EnableFifoMode() API enables the FIFO mode 102 | (+) HAL_USARTEx_DisableFifoMode() API disables the FIFO mode 103 | (+) HAL_USARTEx_SetTxFifoThreshold() API sets the TX FIFO threshold 104 | (+) HAL_USARTEx_SetRxFifoThreshold() API sets the RX FIFO threshold 105 | 106 | 107 | @endverbatim 108 | * @{ 109 | */ 110 | 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /** 117 | * @} 118 | */ 119 | 120 | /** @addtogroup USARTEx_Private_Functions 121 | * @{ 122 | */ 123 | 124 | /** 125 | * @} 126 | */ 127 | 128 | #endif /* HAL_USART_MODULE_ENABLED */ 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | /** 135 | * @} 136 | */ 137 | 138 | -------------------------------------------------------------------------------- /Src/stm32f0xx_ll_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_crc.c 4 | * @author MCD Application Team 5 | * @brief CRC LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32f0xx_ll_crc.h" 22 | #include "stm32f0xx_ll_bus.h" 23 | 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif /* USE_FULL_ASSERT */ 29 | 30 | /** @addtogroup STM32F0xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (CRC) 35 | 36 | /** @addtogroup CRC_LL 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /* Private function prototypes -----------------------------------------------*/ 45 | 46 | /* Exported functions --------------------------------------------------------*/ 47 | /** @addtogroup CRC_LL_Exported_Functions 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup CRC_LL_EF_Init 52 | * @{ 53 | */ 54 | 55 | /** 56 | * @brief De-initialize CRC registers (Registers restored to their default values). 57 | * @param CRCx CRC Instance 58 | * @retval An ErrorStatus enumeration value: 59 | * - SUCCESS: CRC registers are de-initialized 60 | * - ERROR: CRC registers are not de-initialized 61 | */ 62 | ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx) 63 | { 64 | ErrorStatus status = SUCCESS; 65 | 66 | /* Check the parameters */ 67 | assert_param(IS_CRC_ALL_INSTANCE(CRCx)); 68 | 69 | if (CRCx == CRC) 70 | { 71 | #if defined(CRC_POL_POL) 72 | /* Set programmable polynomial size in CR register to reset value (32 bits)*/ 73 | LL_CRC_SetPolynomialSize(CRCx, LL_CRC_POLYLENGTH_32B); 74 | 75 | /* Set programmable polynomial in POL register to reset value */ 76 | LL_CRC_SetPolynomialCoef(CRCx, LL_CRC_DEFAULT_CRC32_POLY); 77 | #endif /* CRC_POL_POL */ 78 | 79 | /* Set INIT register to reset value */ 80 | LL_CRC_SetInitialData(CRCx, LL_CRC_DEFAULT_CRC_INITVALUE); 81 | 82 | /* Set Reversibility options on I/O data values in CR register to reset value */ 83 | LL_CRC_SetInputDataReverseMode(CRCx, LL_CRC_INDATA_REVERSE_NONE); 84 | LL_CRC_SetOutputDataReverseMode(CRCx, LL_CRC_OUTDATA_REVERSE_NONE); 85 | 86 | /* Reset the CRC calculation unit */ 87 | LL_CRC_ResetCRCCalculationUnit(CRCx); 88 | 89 | /* Reset IDR register */ 90 | LL_CRC_Write_IDR(CRCx, 0x00U); 91 | } 92 | else 93 | { 94 | status = ERROR; 95 | } 96 | 97 | return (status); 98 | } 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | /** 105 | * @} 106 | */ 107 | 108 | /** 109 | * @} 110 | */ 111 | 112 | #endif /* defined (CRC) */ 113 | 114 | /** 115 | * @} 116 | */ 117 | 118 | #endif /* USE_FULL_LL_DRIVER */ 119 | -------------------------------------------------------------------------------- /Src/stm32f0xx_ll_crs.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_crs.h 4 | * @author MCD Application Team 5 | * @brief CRS LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f0xx_ll_crs.h" 23 | #include "stm32f0xx_ll_bus.h" 24 | 25 | /** @addtogroup STM32F0xx_LL_Driver 26 | * @{ 27 | */ 28 | 29 | #if defined(CRS) 30 | 31 | /** @defgroup CRS_LL CRS 32 | * @{ 33 | */ 34 | 35 | /* Private types -------------------------------------------------------------*/ 36 | /* Private variables ---------------------------------------------------------*/ 37 | /* Private constants ---------------------------------------------------------*/ 38 | /* Private macros ------------------------------------------------------------*/ 39 | /* Private function prototypes -----------------------------------------------*/ 40 | 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup CRS_LL_Exported_Functions 43 | * @{ 44 | */ 45 | 46 | /** @addtogroup CRS_LL_EF_Init 47 | * @{ 48 | */ 49 | 50 | /** 51 | * @brief De-Initializes CRS peripheral registers to their default reset values. 52 | * @retval An ErrorStatus enumeration value: 53 | * - SUCCESS: CRS registers are de-initialized 54 | * - ERROR: not applicable 55 | */ 56 | ErrorStatus LL_CRS_DeInit(void) 57 | { 58 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_CRS); 59 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_CRS); 60 | 61 | return SUCCESS; 62 | } 63 | 64 | 65 | 66 | /** 67 | * @} 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | #endif /* defined(CRS) */ 79 | 80 | /** 81 | * @} 82 | */ 83 | 84 | #endif /* USE_FULL_LL_DRIVER */ 85 | -------------------------------------------------------------------------------- /Src/stm32f0xx_ll_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_exti.c 4 | * @author MCD Application Team 5 | * @brief EXTI LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f0xx_ll_exti.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif 28 | 29 | /** @addtogroup STM32F0xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined (EXTI) 34 | 35 | /** @defgroup EXTI_LL EXTI 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | /** @addtogroup EXTI_LL_Private_Macros 44 | * @{ 45 | */ 46 | 47 | #define IS_LL_EXTI_LINE_0_31(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U) 48 | 49 | #define IS_LL_EXTI_MODE(__VALUE__) (((__VALUE__) == LL_EXTI_MODE_IT) \ 50 | || ((__VALUE__) == LL_EXTI_MODE_EVENT) \ 51 | || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT)) 52 | 53 | 54 | #define IS_LL_EXTI_TRIGGER(__VALUE__) (((__VALUE__) == LL_EXTI_TRIGGER_NONE) \ 55 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING) \ 56 | || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING) \ 57 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING)) 58 | 59 | /** 60 | * @} 61 | */ 62 | 63 | /* Private function prototypes -----------------------------------------------*/ 64 | 65 | /* Exported functions --------------------------------------------------------*/ 66 | /** @addtogroup EXTI_LL_Exported_Functions 67 | * @{ 68 | */ 69 | 70 | /** @addtogroup EXTI_LL_EF_Init 71 | * @{ 72 | */ 73 | 74 | /** 75 | * @brief De-initialize the EXTI registers to their default reset values. 76 | * @retval An ErrorStatus enumeration value: 77 | * - SUCCESS: EXTI registers are de-initialized 78 | * - ERROR: not applicable 79 | */ 80 | uint32_t LL_EXTI_DeInit(void) 81 | { 82 | /* Interrupt mask register set to default reset values */ 83 | #if defined(STM32F030x6) || defined(STM32F031x6) ||defined(STM32F038xx) 84 | LL_EXTI_WriteReg(IMR, 0x0FF40000U); 85 | #elif defined(STM32F070x6) || defined(STM32F042x6) || defined(STM32F048xx) 86 | LL_EXTI_WriteReg(IMR, 0x7FF40000U); 87 | #elif defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx) 88 | LL_EXTI_WriteReg(IMR, 0x0F940000U); 89 | #else 90 | LL_EXTI_WriteReg(IMR, 0x7F840000U); 91 | #endif 92 | /* Event mask register set to default reset values */ 93 | LL_EXTI_WriteReg(EMR, 0x00000000U); 94 | /* Rising Trigger selection register set to default reset values */ 95 | LL_EXTI_WriteReg(RTSR, 0x00000000U); 96 | /* Falling Trigger selection register set to default reset values */ 97 | LL_EXTI_WriteReg(FTSR, 0x00000000U); 98 | /* Software interrupt event register set to default reset values */ 99 | LL_EXTI_WriteReg(SWIER, 0x00000000U); 100 | /* Pending register clear */ 101 | LL_EXTI_WriteReg(PR, 0x007BFFFFU); 102 | 103 | return SUCCESS; 104 | } 105 | 106 | /** 107 | * @brief Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct. 108 | * @param EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure. 109 | * @retval An ErrorStatus enumeration value: 110 | * - SUCCESS: EXTI registers are initialized 111 | * - ERROR: not applicable 112 | */ 113 | uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct) 114 | { 115 | ErrorStatus status = SUCCESS; 116 | /* Check the parameters */ 117 | assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31)); 118 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand)); 119 | assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode)); 120 | 121 | /* ENABLE LineCommand */ 122 | if (EXTI_InitStruct->LineCommand != DISABLE) 123 | { 124 | assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger)); 125 | 126 | /* Configure EXTI Lines in range from 0 to 31 */ 127 | if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE) 128 | { 129 | switch (EXTI_InitStruct->Mode) 130 | { 131 | case LL_EXTI_MODE_IT: 132 | /* First Disable Event on provided Lines */ 133 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 134 | /* Then Enable IT on provided Lines */ 135 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 136 | break; 137 | case LL_EXTI_MODE_EVENT: 138 | /* First Disable IT on provided Lines */ 139 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 140 | /* Then Enable Event on provided Lines */ 141 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 142 | break; 143 | case LL_EXTI_MODE_IT_EVENT: 144 | /* Directly Enable IT & Event on provided Lines */ 145 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 146 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 147 | break; 148 | default: 149 | status = ERROR; 150 | break; 151 | } 152 | if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE) 153 | { 154 | switch (EXTI_InitStruct->Trigger) 155 | { 156 | case LL_EXTI_TRIGGER_RISING: 157 | /* First Disable Falling Trigger on provided Lines */ 158 | LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 159 | /* Then Enable Rising Trigger on provided Lines */ 160 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 161 | break; 162 | case LL_EXTI_TRIGGER_FALLING: 163 | /* First Disable Rising Trigger on provided Lines */ 164 | LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 165 | /* Then Enable Falling Trigger on provided Lines */ 166 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 167 | break; 168 | case LL_EXTI_TRIGGER_RISING_FALLING: 169 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 170 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 171 | break; 172 | default: 173 | status = ERROR; 174 | break; 175 | } 176 | } 177 | } 178 | } 179 | /* DISABLE LineCommand */ 180 | else 181 | { 182 | /* De-configure EXTI Lines in range from 0 to 31 */ 183 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 184 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 185 | } 186 | return status; 187 | } 188 | 189 | /** 190 | * @brief Set each @ref LL_EXTI_InitTypeDef field to default value. 191 | * @param EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure. 192 | * @retval None 193 | */ 194 | void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct) 195 | { 196 | EXTI_InitStruct->Line_0_31 = LL_EXTI_LINE_NONE; 197 | EXTI_InitStruct->LineCommand = DISABLE; 198 | EXTI_InitStruct->Mode = LL_EXTI_MODE_IT; 199 | EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING; 200 | } 201 | 202 | /** 203 | * @} 204 | */ 205 | 206 | /** 207 | * @} 208 | */ 209 | 210 | /** 211 | * @} 212 | */ 213 | 214 | #endif /* defined (EXTI) */ 215 | 216 | /** 217 | * @} 218 | */ 219 | 220 | #endif /* USE_FULL_LL_DRIVER */ 221 | 222 | -------------------------------------------------------------------------------- /Src/stm32f0xx_ll_gpio.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_gpio.c 4 | * @author MCD Application Team 5 | * @brief GPIO LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f0xx_ll_gpio.h" 23 | #include "stm32f0xx_ll_bus.h" 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif 29 | 30 | /** @addtogroup STM32F0xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) 35 | 36 | /** @addtogroup GPIO_LL 37 | * @{ 38 | */ 39 | /** MISRA C:2012 deviation rule has been granted for following rules: 40 | * Rule-12.2 - Medium: RHS argument is in interval [0,INF] which is out of 41 | * range of the shift operator in following API : 42 | * LL_GPIO_Init 43 | * LL_GPIO_DeInit 44 | * LL_GPIO_SetPinMode 45 | * LL_GPIO_GetPinMode 46 | * LL_GPIO_SetPinSpeed 47 | * LL_GPIO_GetPinSpeed 48 | * LL_GPIO_SetPinPull 49 | * LL_GPIO_GetPinPull 50 | * LL_GPIO_GetAFPin_0_7 51 | * LL_GPIO_SetAFPin_0_7 52 | * LL_GPIO_SetAFPin_8_15 53 | * LL_GPIO_GetAFPin_8_15 54 | */ 55 | 56 | /* Private types -------------------------------------------------------------*/ 57 | /* Private variables ---------------------------------------------------------*/ 58 | /* Private constants ---------------------------------------------------------*/ 59 | /* Private macros ------------------------------------------------------------*/ 60 | /** @addtogroup GPIO_LL_Private_Macros 61 | * @{ 62 | */ 63 | #define IS_LL_GPIO_PIN(__VALUE__) (((0x00u) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL))) 64 | 65 | #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) ||\ 66 | ((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\ 67 | ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\ 68 | ((__VALUE__) == LL_GPIO_MODE_ANALOG)) 69 | 70 | #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\ 71 | ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN)) 72 | 73 | #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\ 74 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\ 75 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH)) 76 | 77 | #define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_NO) ||\ 78 | ((__VALUE__) == LL_GPIO_PULL_UP) ||\ 79 | ((__VALUE__) == LL_GPIO_PULL_DOWN)) 80 | 81 | #define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\ 82 | ((__VALUE__) == LL_GPIO_AF_1 ) ||\ 83 | ((__VALUE__) == LL_GPIO_AF_2 ) ||\ 84 | ((__VALUE__) == LL_GPIO_AF_3 ) ||\ 85 | ((__VALUE__) == LL_GPIO_AF_4 ) ||\ 86 | ((__VALUE__) == LL_GPIO_AF_5 ) ||\ 87 | ((__VALUE__) == LL_GPIO_AF_6 ) ||\ 88 | ((__VALUE__) == LL_GPIO_AF_7 )) 89 | /** 90 | * @} 91 | */ 92 | 93 | /* Private function prototypes -----------------------------------------------*/ 94 | 95 | /* Exported functions --------------------------------------------------------*/ 96 | /** @addtogroup GPIO_LL_Exported_Functions 97 | * @{ 98 | */ 99 | 100 | /** @addtogroup GPIO_LL_EF_Init 101 | * @{ 102 | */ 103 | 104 | /** 105 | * @brief De-initialize GPIO registers (Registers restored to their default values). 106 | * @param GPIOx GPIO Port 107 | * @retval An ErrorStatus enumeration value: 108 | * - SUCCESS: GPIO registers are de-initialized 109 | * - ERROR: Wrong GPIO Port 110 | */ 111 | ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx) 112 | { 113 | ErrorStatus status = SUCCESS; 114 | 115 | /* Check the parameters */ 116 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 117 | 118 | /* Force and Release reset on clock of GPIOx Port */ 119 | if (GPIOx == GPIOA) 120 | { 121 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOA); 122 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOA); 123 | } 124 | else if (GPIOx == GPIOB) 125 | { 126 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOB); 127 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOB); 128 | } 129 | else if (GPIOx == GPIOC) 130 | { 131 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOC); 132 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOC); 133 | } 134 | #if defined(GPIOD) 135 | else if (GPIOx == GPIOD) 136 | { 137 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOD); 138 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOD); 139 | } 140 | #endif /* GPIOD */ 141 | #if defined(GPIOE) 142 | else if (GPIOx == GPIOE) 143 | { 144 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOE); 145 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOE); 146 | } 147 | #endif /* GPIOE */ 148 | #if defined(GPIOF) 149 | else if (GPIOx == GPIOF) 150 | { 151 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOF); 152 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOF); 153 | } 154 | #endif /* GPIOF */ 155 | else 156 | { 157 | status = ERROR; 158 | } 159 | 160 | return (status); 161 | } 162 | 163 | /** 164 | * @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct. 165 | * @param GPIOx GPIO Port 166 | * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure 167 | * that contains the configuration information for the specified GPIO peripheral. 168 | * @retval An ErrorStatus enumeration value: 169 | * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content 170 | * - ERROR: Not applicable 171 | */ 172 | ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct) 173 | { 174 | uint32_t pinpos; 175 | uint32_t currentpin; 176 | 177 | /* Check the parameters */ 178 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 179 | assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin)); 180 | assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode)); 181 | assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull)); 182 | 183 | /* ------------------------- Configure the port pins ---------------- */ 184 | /* Initialize pinpos on first pin set */ 185 | pinpos = 0; 186 | 187 | /* Configure the port pins */ 188 | while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00u) 189 | { 190 | /* Get current io position */ 191 | currentpin = (GPIO_InitStruct->Pin) & (0x00000001uL << pinpos); 192 | 193 | if (currentpin != 0x00u) 194 | { 195 | if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) 196 | { 197 | /* Check Speed mode parameters */ 198 | assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed)); 199 | 200 | /* Speed mode configuration */ 201 | LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed); 202 | 203 | /* Check Output mode parameters */ 204 | assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType)); 205 | 206 | /* Output mode configuration*/ 207 | LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType); 208 | } 209 | 210 | /* Pull-up Pull down resistor configuration*/ 211 | LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull); 212 | 213 | if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE) 214 | { 215 | /* Check Alternate parameter */ 216 | assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate)); 217 | 218 | /* Speed mode configuration */ 219 | if (currentpin < LL_GPIO_PIN_8) 220 | { 221 | LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate); 222 | } 223 | else 224 | { 225 | LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate); 226 | } 227 | } 228 | 229 | /* Pin Mode configuration */ 230 | LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode); 231 | } 232 | pinpos++; 233 | } 234 | 235 | return (SUCCESS); 236 | } 237 | 238 | /** 239 | * @brief Set each @ref LL_GPIO_InitTypeDef field to default value. 240 | * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure 241 | * whose fields will be set to default values. 242 | * @retval None 243 | */ 244 | 245 | void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct) 246 | { 247 | /* Reset GPIO init structure parameters values */ 248 | GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL; 249 | GPIO_InitStruct->Mode = LL_GPIO_MODE_ANALOG; 250 | GPIO_InitStruct->Speed = LL_GPIO_SPEED_FREQ_LOW; 251 | GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL; 252 | GPIO_InitStruct->Pull = LL_GPIO_PULL_NO; 253 | GPIO_InitStruct->Alternate = LL_GPIO_AF_0; 254 | } 255 | 256 | /** 257 | * @} 258 | */ 259 | 260 | /** 261 | * @} 262 | */ 263 | 264 | /** 265 | * @} 266 | */ 267 | 268 | #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) */ 269 | 270 | /** 271 | * @} 272 | */ 273 | 274 | #endif /* USE_FULL_LL_DRIVER */ 275 | 276 | -------------------------------------------------------------------------------- /Src/stm32f0xx_ll_i2c.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_i2c.c 4 | * @author MCD Application Team 5 | * @brief I2C LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32f0xx_ll_i2c.h" 22 | #include "stm32f0xx_ll_bus.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif /* USE_FULL_ASSERT */ 28 | 29 | /** @addtogroup STM32F0xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined (I2C1) || defined (I2C2) 34 | 35 | /** @defgroup I2C_LL I2C 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | /** @addtogroup I2C_LL_Private_Macros 44 | * @{ 45 | */ 46 | 47 | #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \ 48 | ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \ 49 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \ 50 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP)) 51 | 52 | #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \ 53 | ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE)) 54 | 55 | #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU) 56 | 57 | #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU) 58 | 59 | #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \ 60 | ((__VALUE__) == LL_I2C_NACK)) 61 | 62 | #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \ 63 | ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT)) 64 | /** 65 | * @} 66 | */ 67 | 68 | /* Private function prototypes -----------------------------------------------*/ 69 | 70 | /* Exported functions --------------------------------------------------------*/ 71 | /** @addtogroup I2C_LL_Exported_Functions 72 | * @{ 73 | */ 74 | 75 | /** @addtogroup I2C_LL_EF_Init 76 | * @{ 77 | */ 78 | 79 | /** 80 | * @brief De-initialize the I2C registers to their default reset values. 81 | * @param I2Cx I2C Instance. 82 | * @retval An ErrorStatus enumeration value: 83 | * - SUCCESS: I2C registers are de-initialized 84 | * - ERROR: I2C registers are not de-initialized 85 | */ 86 | ErrorStatus LL_I2C_DeInit(const I2C_TypeDef *I2Cx) 87 | { 88 | ErrorStatus status = SUCCESS; 89 | 90 | /* Check the I2C Instance I2Cx */ 91 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 92 | 93 | if (I2Cx == I2C1) 94 | { 95 | /* Force reset of I2C clock */ 96 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1); 97 | 98 | /* Release reset of I2C clock */ 99 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1); 100 | } 101 | #if defined(I2C2) 102 | else if (I2Cx == I2C2) 103 | { 104 | /* Force reset of I2C clock */ 105 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2); 106 | 107 | /* Release reset of I2C clock */ 108 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2); 109 | 110 | } 111 | #endif /* I2C2 */ 112 | else 113 | { 114 | status = ERROR; 115 | } 116 | 117 | return status; 118 | } 119 | 120 | /** 121 | * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct. 122 | * @param I2Cx I2C Instance. 123 | * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure. 124 | * @retval An ErrorStatus enumeration value: 125 | * - SUCCESS: I2C registers are initialized 126 | * - ERROR: Not applicable 127 | */ 128 | ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, const LL_I2C_InitTypeDef *I2C_InitStruct) 129 | { 130 | /* Check the I2C Instance I2Cx */ 131 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 132 | 133 | /* Check the I2C parameters from I2C_InitStruct */ 134 | assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode)); 135 | assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter)); 136 | assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter)); 137 | assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1)); 138 | assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge)); 139 | assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize)); 140 | 141 | /* Disable the selected I2Cx Peripheral */ 142 | LL_I2C_Disable(I2Cx); 143 | 144 | /*---------------------------- I2Cx CR1 Configuration ------------------------ 145 | * Configure the analog and digital noise filters with parameters : 146 | * - AnalogFilter: I2C_CR1_ANFOFF bit 147 | * - DigitalFilter: I2C_CR1_DNF[3:0] bits 148 | */ 149 | LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter); 150 | 151 | /*---------------------------- I2Cx TIMINGR Configuration -------------------- 152 | * Configure the SDA setup, hold time and the SCL high, low period with parameter : 153 | * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0], 154 | * I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits 155 | */ 156 | LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing); 157 | 158 | /* Enable the selected I2Cx Peripheral */ 159 | LL_I2C_Enable(I2Cx); 160 | 161 | /*---------------------------- I2Cx OAR1 Configuration ----------------------- 162 | * Disable, Configure and Enable I2Cx device own address 1 with parameters : 163 | * - OwnAddress1: I2C_OAR1_OA1[9:0] bits 164 | * - OwnAddrSize: I2C_OAR1_OA1MODE bit 165 | */ 166 | LL_I2C_DisableOwnAddress1(I2Cx); 167 | LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize); 168 | 169 | /* OwnAdress1 == 0 is reserved for General Call address */ 170 | if (I2C_InitStruct->OwnAddress1 != 0U) 171 | { 172 | LL_I2C_EnableOwnAddress1(I2Cx); 173 | } 174 | 175 | /*---------------------------- I2Cx MODE Configuration ----------------------- 176 | * Configure I2Cx peripheral mode with parameter : 177 | * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits 178 | */ 179 | LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode); 180 | 181 | /*---------------------------- I2Cx CR2 Configuration ------------------------ 182 | * Configure the ACKnowledge or Non ACKnowledge condition 183 | * after the address receive match code or next received byte with parameter : 184 | * - TypeAcknowledge: I2C_CR2_NACK bit 185 | */ 186 | LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge); 187 | 188 | return SUCCESS; 189 | } 190 | 191 | /** 192 | * @brief Set each @ref LL_I2C_InitTypeDef field to default value. 193 | * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure. 194 | * @retval None 195 | */ 196 | void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct) 197 | { 198 | /* Set I2C_InitStruct fields to default values */ 199 | I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C; 200 | I2C_InitStruct->Timing = 0U; 201 | I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE; 202 | I2C_InitStruct->DigitalFilter = 0U; 203 | I2C_InitStruct->OwnAddress1 = 0U; 204 | I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK; 205 | I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; 206 | } 207 | 208 | /** 209 | * @} 210 | */ 211 | 212 | /** 213 | * @} 214 | */ 215 | 216 | /** 217 | * @} 218 | */ 219 | 220 | #endif /* I2C1 || I2C2 */ 221 | 222 | /** 223 | * @} 224 | */ 225 | 226 | #endif /* USE_FULL_LL_DRIVER */ 227 | -------------------------------------------------------------------------------- /Src/stm32f0xx_ll_pwr.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_pwr.c 4 | * @author MCD Application Team 5 | * @brief PWR LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f0xx_ll_pwr.h" 23 | #include "stm32f0xx_ll_bus.h" 24 | 25 | /** @addtogroup STM32F0xx_LL_Driver 26 | * @{ 27 | */ 28 | 29 | #if defined(PWR) 30 | 31 | /** @defgroup PWR_LL PWR 32 | * @{ 33 | */ 34 | 35 | /* Private types -------------------------------------------------------------*/ 36 | /* Private variables ---------------------------------------------------------*/ 37 | /* Private constants ---------------------------------------------------------*/ 38 | /* Private macros ------------------------------------------------------------*/ 39 | /* Private function prototypes -----------------------------------------------*/ 40 | 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup PWR_LL_Exported_Functions 43 | * @{ 44 | */ 45 | 46 | /** @addtogroup PWR_LL_EF_Init 47 | * @{ 48 | */ 49 | 50 | /** 51 | * @brief De-initialize the PWR registers to their default reset values. 52 | * @retval An ErrorStatus enumeration value: 53 | * - SUCCESS: PWR registers are de-initialized 54 | * - ERROR: not applicable 55 | */ 56 | ErrorStatus LL_PWR_DeInit(void) 57 | { 58 | /* Force reset of PWR clock */ 59 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR); 60 | 61 | /* Release reset of PWR clock */ 62 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR); 63 | 64 | return SUCCESS; 65 | } 66 | 67 | /** 68 | * @} 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** 76 | * @} 77 | */ 78 | #endif /* defined(PWR) */ 79 | /** 80 | * @} 81 | */ 82 | 83 | #endif /* USE_FULL_LL_DRIVER */ 84 | -------------------------------------------------------------------------------- /_htmresc/favicon.png: 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