├── .github ├── ISSUE_TEMPLATE │ ├── bug_report.md │ └── other-issue.md └── PULL_REQUEST_TEMPLATE.md ├── CODE_OF_CONDUCT.md ├── CONTRIBUTING.md ├── Inc ├── Legacy │ ├── stm32_hal_legacy.h │ ├── stm32f1xx_hal_can_ex_legacy.h │ └── stm32f1xx_hal_can_legacy.h ├── stm32_assert_template.h ├── stm32f1xx_hal.h ├── stm32f1xx_hal_adc.h ├── stm32f1xx_hal_adc_ex.h ├── stm32f1xx_hal_can.h ├── stm32f1xx_hal_cec.h ├── stm32f1xx_hal_conf_template.h ├── stm32f1xx_hal_cortex.h ├── stm32f1xx_hal_crc.h ├── stm32f1xx_hal_dac.h ├── stm32f1xx_hal_dac_ex.h ├── stm32f1xx_hal_def.h ├── stm32f1xx_hal_dma.h ├── stm32f1xx_hal_dma_ex.h ├── stm32f1xx_hal_eth.h ├── stm32f1xx_hal_exti.h ├── stm32f1xx_hal_flash.h ├── stm32f1xx_hal_flash_ex.h ├── stm32f1xx_hal_gpio.h ├── stm32f1xx_hal_gpio_ex.h ├── stm32f1xx_hal_hcd.h ├── stm32f1xx_hal_i2c.h ├── stm32f1xx_hal_i2s.h ├── stm32f1xx_hal_irda.h ├── stm32f1xx_hal_iwdg.h ├── stm32f1xx_hal_mmc.h ├── stm32f1xx_hal_nand.h ├── stm32f1xx_hal_nor.h ├── stm32f1xx_hal_pccard.h ├── stm32f1xx_hal_pcd.h ├── stm32f1xx_hal_pcd_ex.h ├── stm32f1xx_hal_pwr.h ├── stm32f1xx_hal_rcc.h ├── stm32f1xx_hal_rcc_ex.h ├── stm32f1xx_hal_rtc.h ├── stm32f1xx_hal_rtc_ex.h ├── stm32f1xx_hal_sd.h ├── stm32f1xx_hal_smartcard.h ├── stm32f1xx_hal_spi.h ├── stm32f1xx_hal_sram.h ├── stm32f1xx_hal_tim.h ├── stm32f1xx_hal_tim_ex.h ├── stm32f1xx_hal_uart.h ├── stm32f1xx_hal_usart.h ├── stm32f1xx_hal_wwdg.h ├── stm32f1xx_ll_adc.h ├── stm32f1xx_ll_bus.h ├── stm32f1xx_ll_cortex.h ├── stm32f1xx_ll_crc.h ├── stm32f1xx_ll_dac.h ├── stm32f1xx_ll_dma.h ├── stm32f1xx_ll_exti.h ├── stm32f1xx_ll_fsmc.h ├── stm32f1xx_ll_gpio.h ├── stm32f1xx_ll_i2c.h ├── stm32f1xx_ll_iwdg.h ├── stm32f1xx_ll_pwr.h ├── stm32f1xx_ll_rcc.h ├── stm32f1xx_ll_rtc.h ├── stm32f1xx_ll_sdmmc.h ├── stm32f1xx_ll_spi.h ├── stm32f1xx_ll_system.h ├── stm32f1xx_ll_tim.h ├── stm32f1xx_ll_usart.h ├── stm32f1xx_ll_usb.h ├── stm32f1xx_ll_utils.h └── stm32f1xx_ll_wwdg.h ├── LICENSE.md ├── README.md ├── Release_Notes.html ├── SECURITY.md ├── Src ├── Legacy │ └── stm32f1xx_hal_can.c ├── stm32f1xx_hal.c ├── stm32f1xx_hal_adc.c ├── stm32f1xx_hal_adc_ex.c ├── stm32f1xx_hal_can.c ├── stm32f1xx_hal_cec.c ├── stm32f1xx_hal_cortex.c ├── stm32f1xx_hal_crc.c ├── stm32f1xx_hal_dac.c ├── stm32f1xx_hal_dac_ex.c ├── stm32f1xx_hal_dma.c ├── stm32f1xx_hal_eth.c ├── stm32f1xx_hal_exti.c ├── stm32f1xx_hal_flash.c ├── stm32f1xx_hal_flash_ex.c ├── stm32f1xx_hal_gpio.c ├── stm32f1xx_hal_gpio_ex.c ├── stm32f1xx_hal_hcd.c ├── stm32f1xx_hal_i2c.c ├── stm32f1xx_hal_i2s.c ├── stm32f1xx_hal_irda.c ├── stm32f1xx_hal_iwdg.c ├── stm32f1xx_hal_mmc.c ├── stm32f1xx_hal_msp_template.c ├── stm32f1xx_hal_nand.c ├── stm32f1xx_hal_nor.c ├── stm32f1xx_hal_pccard.c ├── stm32f1xx_hal_pcd.c ├── stm32f1xx_hal_pcd_ex.c ├── stm32f1xx_hal_pwr.c ├── stm32f1xx_hal_rcc.c ├── stm32f1xx_hal_rcc_ex.c ├── stm32f1xx_hal_rtc.c ├── stm32f1xx_hal_rtc_ex.c ├── stm32f1xx_hal_sd.c ├── stm32f1xx_hal_smartcard.c ├── stm32f1xx_hal_spi.c ├── stm32f1xx_hal_sram.c ├── stm32f1xx_hal_tim.c ├── stm32f1xx_hal_tim_ex.c ├── stm32f1xx_hal_timebase_rtc_alarm_template.c ├── stm32f1xx_hal_timebase_tim_template.c ├── stm32f1xx_hal_uart.c ├── stm32f1xx_hal_usart.c ├── stm32f1xx_hal_wwdg.c ├── stm32f1xx_ll_adc.c ├── stm32f1xx_ll_crc.c ├── stm32f1xx_ll_dac.c ├── stm32f1xx_ll_dma.c ├── stm32f1xx_ll_exti.c ├── stm32f1xx_ll_fsmc.c ├── stm32f1xx_ll_gpio.c ├── stm32f1xx_ll_i2c.c ├── stm32f1xx_ll_pwr.c ├── stm32f1xx_ll_rcc.c ├── stm32f1xx_ll_rtc.c ├── stm32f1xx_ll_sdmmc.c ├── stm32f1xx_ll_spi.c ├── stm32f1xx_ll_tim.c ├── stm32f1xx_ll_usart.c ├── stm32f1xx_ll_usb.c └── stm32f1xx_ll_utils.c └── _htmresc ├── favicon.png ├── mini-st_2020.css └── st_logo_2020.png /.github/ISSUE_TEMPLATE/bug_report.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: Bug report 3 | about: Create a report to help us improve 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | 8 | --- 9 | 10 | **Caution** 11 | The Issues are strictly limited for the reporting of problem encountered with the software provided in this project. 12 | For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post a topic in the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus) 13 | 14 | **Describe the set-up** 15 | * The board (either ST RPN reference or your custom board) 16 | * IDE or at least the compiler and its version 17 | 18 | **Describe the bug** 19 | A clear and concise description of what the bug is. 20 | 21 | **How To Reproduce** 22 | 1. Indicate the global behavior of your application project 23 | 24 | 2. The modules that you suspect to be the cause of the problem (Driver, BSP, MW ...) 25 | 26 | 3. The use case that generates the problem 27 | 28 | 4. How we can reproduce the problem 29 | 30 | 31 | **Additional context** 32 | If you have a first analysis or patch correction, thank you to share your proposal. 33 | 34 | **Screenshots** 35 | If applicable, add screenshots to help explain your problem. 36 | -------------------------------------------------------------------------------- /.github/ISSUE_TEMPLATE/other-issue.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: 'Other Issue ' 3 | about: Generic issue description 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | 8 | --- 9 | 10 | **Caution** 11 | The Issues are strictly limited for the reporting of problem encountered with the software provided in this project. 12 | For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post a topic in the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus) 13 | 14 | **Describe the set-up** 15 | * The board (either ST RPN reference or your custom board) 16 | * IDE or at least the compiler and its version 17 | 18 | **Additional context** 19 | If you have a first analysis or a patch proposal, thank you to share your proposal. 20 | 21 | **Screenshots** 22 | If applicable, add screenshots to help explain your problem. 23 | -------------------------------------------------------------------------------- /.github/PULL_REQUEST_TEMPLATE.md: -------------------------------------------------------------------------------- 1 | ## IMPORTANT INFORMATION 2 | 3 | ### Contributor License Agreement (CLA) 4 | * The Pull Request feature will be considered by STMicroelectronics after the signature of a **Contributor License Agreement (CLA)** by the submitter. 5 | * If you did not sign such agreement, please follow the steps mentioned in the CONTRIBUTING.md file. 6 | -------------------------------------------------------------------------------- /CODE_OF_CONDUCT.md: -------------------------------------------------------------------------------- 1 | # Contributor Covenant Code of Conduct 2 | 3 | ## Our Pledge 4 | 5 | In the interest of fostering an open and welcoming environment, we as 6 | contributors and maintainers pledge to making participation in our project and 7 | our community a harassment-free experience for everyone, regardless of age, body 8 | size, disability, ethnicity, sex characteristics, gender identity and expression, 9 | level of experience, education, socio-economic status, nationality, personal 10 | appearance, race, religion, or sexual identity and orientation. 11 | 12 | ## Our Standards 13 | 14 | Examples of behavior that contributes to creating a positive environment 15 | include: 16 | 17 | * Using welcoming and inclusive language 18 | * Being respectful of differing viewpoints and experiences 19 | * Gracefully accepting constructive criticism 20 | * Focusing on what is best for the community 21 | * Showing empathy towards other community members 22 | 23 | Examples of unacceptable behavior by participants include: 24 | 25 | * The use of sexualized language or imagery and unwelcome sexual attention or 26 | advances 27 | * Trolling, insulting/derogatory comments, and personal or political attacks 28 | * Public or private harassment 29 | * Publishing others' private information, such as a physical or electronic 30 | address, without explicit permission 31 | * Other conduct which could reasonably be considered inappropriate in a 32 | professional setting 33 | 34 | ## Our Responsibilities 35 | 36 | Project maintainers are responsible for clarifying the standards of acceptable 37 | behavior and are expected to take appropriate and fair corrective action in 38 | response to any instances of unacceptable behavior. 39 | 40 | Project maintainers have the right and responsibility to remove, edit, or 41 | reject comments, commits, code, wiki edits, issues, and other contributions 42 | that are not aligned to this Code of Conduct, or to ban temporarily or 43 | permanently any contributor for other behaviors that they deem inappropriate, 44 | threatening, offensive, or harmful. 45 | 46 | ## Scope 47 | 48 | This Code of Conduct applies both within project spaces and in public spaces 49 | when an individual is representing the project or its community. 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It mainly focuses on the steps to follow to submit an issue or a pull-request. 4 | 5 | ## 1. Issues 6 | 7 | ### 1.1 Before opening an issue 8 | 9 | Please check the following points before posting an issue: 10 | * Make sure you are using the latest commit (major releases are tagged, but corrections are available as new commits). 11 | * Make sure your issue is a question/feedback/suggestions **related to** the software provided in this repository. Otherwise, please refer to section [3](CONTRIBUTING.md#3-support-requests-and-questions) below. 12 | * Make sure your issue is not already reported/fixed on GitHub or discussed on a previous issue. Do not forget to browse into the **closed** issues. 13 | 14 | ### 1.2 Posting the issue 15 | 16 | When you have checked the previous points, create a new report from the **Issues** tab of this repository. A template is available [here](../../issues/new/choose) to help you report the issue you are facing or the enhancement you would like to propose. 17 | 18 | ## 2. Pull Requests 19 | 20 | ### 2.1 Before opening a pull-request 21 | 22 | STMicrolectronics is happy to receive contributions from the community, based on an initial Contributor License Agreement (CLA) procedure. 23 | 24 | * If you are an individual writing original source code and you are sure **you own the intellectual property**, then you need to sign an Individual [CLA](https://cla.st.com). 25 | * If you work for a company that wants also to allow you to contribute with your work, your company needs to provide a Corporate [CLA](https://cla.st.com) mentioning your GitHub account name. 26 | * If you are not sure that a CLA (Individual or Corporate) has been signed for your GitHub account you can check the [CLA](https://cla.st.com) dedicated page. 27 | 28 | Please note that: 29 | * The Corporate CLA will always take precedence over the Individual CLA. 30 | * One CLA submission is sufficient, for any project proposed by STMicroelectronics. 31 | 32 | ### 2.2 How to proceed 33 | 34 | * We recommend to engage first a communication thru an issue, in order to present your proposal, just to confirm that it corresponds to STMicroelectronics' domain or scope. 35 | * Then fork the project to your GitHub account to further develop your contribution. Please use the latest commit version. 36 | * Please, submit one pull-request per new feature or proposal. This will ease the analysis and the final merge if accepted. 37 | 38 | ## 3. Support requests and questions 39 | 40 | For support requests or any other question related to the product, the tools, the environment, you can submit a post to the **ST Community** on the appropriate topic [page](https://community.st.com/s/topiccatalog). 41 | -------------------------------------------------------------------------------- /Inc/Legacy/stm32f1xx_hal_can_ex_legacy.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_can_ex_legacy.h 4 | * @author MCD Application Team 5 | * @brief Header file of CAN HAL Extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef __STM32F1xx_HAL_CAN_EX_LEGACY_H 21 | #define __STM32F1xx_HAL_CAN_EX_LEGACY_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | #if defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || \ 28 | defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC) 29 | 30 | /* Includes ------------------------------------------------------------------*/ 31 | #include "stm32f1xx_hal_def.h" 32 | 33 | /** @addtogroup STM32F1xx_HAL_Driver 34 | * @{ 35 | */ 36 | 37 | /** @defgroup CANEx CANEx 38 | * @{ 39 | */ 40 | 41 | /* Exported types ------------------------------------------------------------*/ 42 | 43 | /** 44 | * @brief CAN filter configuration structure definition 45 | */ 46 | /* CAN filter banks differences over STM32F1 devices: */ 47 | /* - STM32F1 Connectivity line: 28 filter banks shared between CAN1 and CAN2 */ 48 | /* - Other STM32F10x devices: 14 filter banks */ 49 | 50 | typedef struct 51 | { 52 | uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit 53 | configuration, first one for a 16-bit configuration). 54 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 55 | 56 | uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit 57 | configuration, second one for a 16-bit configuration). 58 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 59 | 60 | uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, 61 | according to the mode (MSBs for a 32-bit configuration, 62 | first one for a 16-bit configuration). 63 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 64 | 65 | uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, 66 | according to the mode (LSBs for a 32-bit configuration, 67 | second one for a 16-bit configuration). 68 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 69 | 70 | uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter. 71 | This parameter can be a value of @ref CAN_filter_FIFO */ 72 | #if defined(STM32F105xC) || defined(STM32F107xC) 73 | uint32_t FilterNumber; /*!< Specifies the filter which will be initialized. 74 | This parameter must be a number between Min_Data = 0 and Max_Data = 27. */ 75 | #else 76 | uint32_t FilterNumber; /*!< Specifies the filter which will be initialized. 77 | This parameter must be a number between Min_Data = 0 and Max_Data = 13. */ 78 | #endif /* STM32F105xC || STM32F107xC */ 79 | uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. 80 | This parameter can be a value of @ref CAN_filter_mode */ 81 | 82 | uint32_t FilterScale; /*!< Specifies the filter scale. 83 | This parameter can be a value of @ref CAN_filter_scale */ 84 | 85 | uint32_t FilterActivation; /*!< Enable or disable the filter. 86 | This parameter can be set to ENABLE or DISABLE. */ 87 | 88 | uint32_t BankNumber; /*!< Select the start slave bank filter 89 | This parameter must be a number between Min_Data = 0 and Max_Data = 28. */ 90 | 91 | }CAN_FilterConfTypeDef; 92 | 93 | /* Exported constants --------------------------------------------------------*/ 94 | /* Exported macro ------------------------------------------------------------*/ 95 | /* Private macro -------------------------------------------------------------*/ 96 | 97 | /** @defgroup CANEx_Private_Macros CAN Extended Private Macros 98 | * @{ 99 | */ 100 | #if defined(STM32F105xC) || defined(STM32F107xC) 101 | #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27U) 102 | #else 103 | #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 13U) 104 | #endif /* STM32F105xC || STM32F107xC */ 105 | 106 | /** 107 | * @} 108 | */ 109 | 110 | 111 | /** 112 | * @} 113 | */ 114 | 115 | /** 116 | * @} 117 | */ 118 | 119 | #endif /* STM32F103x6) || STM32F103xB || STM32F103xE || STM32F103xG) || STM32F105xC || STM32F107xC */ 120 | 121 | #ifdef __cplusplus 122 | } 123 | #endif 124 | 125 | #endif /* __STM32F1xx_HAL_CAN_EX_LEGACY_H */ 126 | -------------------------------------------------------------------------------- /Inc/stm32_assert_template.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32_assert.h 4 | * @author MCD Application Team 5 | * @brief STM32 assert template file. 6 | * This file should be copied to the application folder and renamed 7 | * to stm32_assert.h. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * Copyright (c) 2016 STMicroelectronics. 12 | * All rights reserved. 13 | * 14 | * This software is licensed under terms that can be found in the LICENSE file 15 | * in the root directory of this software component. 16 | * If no LICENSE file comes with this software, it is provided AS-IS. 17 | * 18 | ****************************************************************************** 19 | */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef __STM32_ASSERT_H 23 | #define __STM32_ASSERT_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Exported types ------------------------------------------------------------*/ 30 | /* Exported constants --------------------------------------------------------*/ 31 | /* Includes ------------------------------------------------------------------*/ 32 | /* Exported macro ------------------------------------------------------------*/ 33 | #ifdef USE_FULL_ASSERT 34 | /** 35 | * @brief The assert_param macro is used for function's parameters check. 36 | * @param expr If expr is false, it calls assert_failed function 37 | * which reports the name of the source file and the source 38 | * line number of the call that failed. 39 | * If expr is true, it returns no value. 40 | * @retval None 41 | */ 42 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) 43 | /* Exported functions ------------------------------------------------------- */ 44 | void assert_failed(uint8_t* file, uint32_t line); 45 | #else 46 | #define assert_param(expr) ((void)0U) 47 | #endif /* USE_FULL_ASSERT */ 48 | 49 | #ifdef __cplusplus 50 | } 51 | #endif 52 | 53 | #endif /* __STM32_ASSERT_H */ 54 | 55 | 56 | 57 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_hal.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal.h 4 | * @author MCD Application Team 5 | * @brief This file contains all the functions prototypes for the HAL 6 | * module driver. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2017 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32F1xx_HAL_H 22 | #define __STM32F1xx_HAL_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f1xx_hal_conf.h" 30 | 31 | /** @addtogroup STM32F1xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup HAL 36 | * @{ 37 | */ 38 | 39 | /* Exported constants --------------------------------------------------------*/ 40 | 41 | /** @defgroup HAL_Exported_Constants HAL Exported Constants 42 | * @{ 43 | */ 44 | 45 | /** @defgroup HAL_TICK_FREQ Tick Frequency 46 | * @{ 47 | */ 48 | typedef enum 49 | { 50 | HAL_TICK_FREQ_10HZ = 100U, 51 | HAL_TICK_FREQ_100HZ = 10U, 52 | HAL_TICK_FREQ_1KHZ = 1U, 53 | HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ 54 | } HAL_TickFreqTypeDef; 55 | /** 56 | * @} 57 | */ 58 | /* Exported types ------------------------------------------------------------*/ 59 | extern __IO uint32_t uwTick; 60 | extern uint32_t uwTickPrio; 61 | extern HAL_TickFreqTypeDef uwTickFreq; 62 | 63 | /** 64 | * @} 65 | */ 66 | /* Exported macro ------------------------------------------------------------*/ 67 | /** @defgroup HAL_Exported_Macros HAL Exported Macros 68 | * @{ 69 | */ 70 | 71 | /** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode 72 | * @brief Freeze/Unfreeze Peripherals in Debug mode 73 | * Note: On devices STM32F10xx8 and STM32F10xxB, 74 | * STM32F101xC/D/E and STM32F103xC/D/E, 75 | * STM32F101xF/G and STM32F103xF/G 76 | * STM32F10xx4 and STM32F10xx6 77 | * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in 78 | * debug mode (not accessible by the user software in normal mode). 79 | * Refer to errata sheet of these devices for more details. 80 | * @{ 81 | */ 82 | 83 | /* Peripherals on APB1 */ 84 | /** 85 | * @brief TIM2 Peripherals Debug mode 86 | */ 87 | #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP) 88 | #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP) 89 | 90 | /** 91 | * @brief TIM3 Peripherals Debug mode 92 | */ 93 | #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP) 94 | #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP) 95 | 96 | #if defined (DBGMCU_CR_DBG_TIM4_STOP) 97 | /** 98 | * @brief TIM4 Peripherals Debug mode 99 | */ 100 | #define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP) 101 | #define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP) 102 | #endif 103 | 104 | #if defined (DBGMCU_CR_DBG_TIM5_STOP) 105 | /** 106 | * @brief TIM5 Peripherals Debug mode 107 | */ 108 | #define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP) 109 | #define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP) 110 | #endif 111 | 112 | #if defined (DBGMCU_CR_DBG_TIM6_STOP) 113 | /** 114 | * @brief TIM6 Peripherals Debug mode 115 | */ 116 | #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP) 117 | #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP) 118 | #endif 119 | 120 | #if defined (DBGMCU_CR_DBG_TIM7_STOP) 121 | /** 122 | * @brief TIM7 Peripherals Debug mode 123 | */ 124 | #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP) 125 | #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP) 126 | #endif 127 | 128 | #if defined (DBGMCU_CR_DBG_TIM12_STOP) 129 | /** 130 | * @brief TIM12 Peripherals Debug mode 131 | */ 132 | #define __HAL_DBGMCU_FREEZE_TIM12() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP) 133 | #define __HAL_DBGMCU_UNFREEZE_TIM12() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP) 134 | #endif 135 | 136 | #if defined (DBGMCU_CR_DBG_TIM13_STOP) 137 | /** 138 | * @brief TIM13 Peripherals Debug mode 139 | */ 140 | #define __HAL_DBGMCU_FREEZE_TIM13() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP) 141 | #define __HAL_DBGMCU_UNFREEZE_TIM13() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP) 142 | #endif 143 | 144 | #if defined (DBGMCU_CR_DBG_TIM14_STOP) 145 | /** 146 | * @brief TIM14 Peripherals Debug mode 147 | */ 148 | #define __HAL_DBGMCU_FREEZE_TIM14() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP) 149 | #define __HAL_DBGMCU_UNFREEZE_TIM14() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP) 150 | #endif 151 | 152 | /** 153 | * @brief WWDG Peripherals Debug mode 154 | */ 155 | #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP) 156 | #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP) 157 | 158 | /** 159 | * @brief IWDG Peripherals Debug mode 160 | */ 161 | #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP) 162 | #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP) 163 | 164 | /** 165 | * @brief I2C1 Peripherals Debug mode 166 | */ 167 | #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT) 168 | #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT) 169 | 170 | #if defined (DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT) 171 | /** 172 | * @brief I2C2 Peripherals Debug mode 173 | */ 174 | #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT) 175 | #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT) 176 | #endif 177 | 178 | #if defined (DBGMCU_CR_DBG_CAN1_STOP) 179 | /** 180 | * @brief CAN1 Peripherals Debug mode 181 | */ 182 | #define __HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP) 183 | #define __HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP) 184 | #endif 185 | 186 | #if defined (DBGMCU_CR_DBG_CAN2_STOP) 187 | /** 188 | * @brief CAN2 Peripherals Debug mode 189 | */ 190 | #define __HAL_DBGMCU_FREEZE_CAN2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP) 191 | #define __HAL_DBGMCU_UNFREEZE_CAN2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP) 192 | #endif 193 | 194 | /* Peripherals on APB2 */ 195 | #if defined (DBGMCU_CR_DBG_TIM1_STOP) 196 | /** 197 | * @brief TIM1 Peripherals Debug mode 198 | */ 199 | #define __HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP) 200 | #define __HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP) 201 | #endif 202 | 203 | #if defined (DBGMCU_CR_DBG_TIM8_STOP) 204 | /** 205 | * @brief TIM8 Peripherals Debug mode 206 | */ 207 | #define __HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP) 208 | #define __HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP) 209 | #endif 210 | 211 | #if defined (DBGMCU_CR_DBG_TIM9_STOP) 212 | /** 213 | * @brief TIM9 Peripherals Debug mode 214 | */ 215 | #define __HAL_DBGMCU_FREEZE_TIM9() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP) 216 | #define __HAL_DBGMCU_UNFREEZE_TIM9() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP) 217 | #endif 218 | 219 | #if defined (DBGMCU_CR_DBG_TIM10_STOP) 220 | /** 221 | * @brief TIM10 Peripherals Debug mode 222 | */ 223 | #define __HAL_DBGMCU_FREEZE_TIM10() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP) 224 | #define __HAL_DBGMCU_UNFREEZE_TIM10() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP) 225 | #endif 226 | 227 | #if defined (DBGMCU_CR_DBG_TIM11_STOP) 228 | /** 229 | * @brief TIM11 Peripherals Debug mode 230 | */ 231 | #define __HAL_DBGMCU_FREEZE_TIM11() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP) 232 | #define __HAL_DBGMCU_UNFREEZE_TIM11() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP) 233 | #endif 234 | 235 | 236 | #if defined (DBGMCU_CR_DBG_TIM15_STOP) 237 | /** 238 | * @brief TIM15 Peripherals Debug mode 239 | */ 240 | #define __HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP) 241 | #define __HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP) 242 | #endif 243 | 244 | #if defined (DBGMCU_CR_DBG_TIM16_STOP) 245 | /** 246 | * @brief TIM16 Peripherals Debug mode 247 | */ 248 | #define __HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP) 249 | #define __HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP) 250 | #endif 251 | 252 | #if defined (DBGMCU_CR_DBG_TIM17_STOP) 253 | /** 254 | * @brief TIM17 Peripherals Debug mode 255 | */ 256 | #define __HAL_DBGMCU_FREEZE_TIM17() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP) 257 | #define __HAL_DBGMCU_UNFREEZE_TIM17() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP) 258 | #endif 259 | 260 | /** 261 | * @} 262 | */ 263 | 264 | /** @defgroup HAL_Private_Macros HAL Private Macros 265 | * @{ 266 | */ 267 | #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \ 268 | ((FREQ) == HAL_TICK_FREQ_100HZ) || \ 269 | ((FREQ) == HAL_TICK_FREQ_1KHZ)) 270 | /** 271 | * @} 272 | */ 273 | 274 | /* Exported functions --------------------------------------------------------*/ 275 | /** @addtogroup HAL_Exported_Functions 276 | * @{ 277 | */ 278 | /** @addtogroup HAL_Exported_Functions_Group1 279 | * @{ 280 | */ 281 | /* Initialization and de-initialization functions ******************************/ 282 | HAL_StatusTypeDef HAL_Init(void); 283 | HAL_StatusTypeDef HAL_DeInit(void); 284 | void HAL_MspInit(void); 285 | void HAL_MspDeInit(void); 286 | HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority); 287 | /** 288 | * @} 289 | */ 290 | 291 | /** @addtogroup HAL_Exported_Functions_Group2 292 | * @{ 293 | */ 294 | /* Peripheral Control functions ************************************************/ 295 | void HAL_IncTick(void); 296 | void HAL_Delay(uint32_t Delay); 297 | uint32_t HAL_GetTick(void); 298 | uint32_t HAL_GetTickPrio(void); 299 | HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq); 300 | HAL_TickFreqTypeDef HAL_GetTickFreq(void); 301 | void HAL_SuspendTick(void); 302 | void HAL_ResumeTick(void); 303 | uint32_t HAL_GetHalVersion(void); 304 | uint32_t HAL_GetREVID(void); 305 | uint32_t HAL_GetDEVID(void); 306 | uint32_t HAL_GetUIDw0(void); 307 | uint32_t HAL_GetUIDw1(void); 308 | uint32_t HAL_GetUIDw2(void); 309 | void HAL_DBGMCU_EnableDBGSleepMode(void); 310 | void HAL_DBGMCU_DisableDBGSleepMode(void); 311 | void HAL_DBGMCU_EnableDBGStopMode(void); 312 | void HAL_DBGMCU_DisableDBGStopMode(void); 313 | void HAL_DBGMCU_EnableDBGStandbyMode(void); 314 | void HAL_DBGMCU_DisableDBGStandbyMode(void); 315 | /** 316 | * @} 317 | */ 318 | 319 | /** 320 | * @} 321 | */ 322 | 323 | /** 324 | * @} 325 | */ 326 | /* Private types -------------------------------------------------------------*/ 327 | /* Private variables ---------------------------------------------------------*/ 328 | /** @defgroup HAL_Private_Variables HAL Private Variables 329 | * @{ 330 | */ 331 | /** 332 | * @} 333 | */ 334 | /* Private constants ---------------------------------------------------------*/ 335 | /** @defgroup HAL_Private_Constants HAL Private Constants 336 | * @{ 337 | */ 338 | /** 339 | * @} 340 | */ 341 | /* Private macros ------------------------------------------------------------*/ 342 | /* Private functions ---------------------------------------------------------*/ 343 | /** 344 | * @} 345 | */ 346 | 347 | /** 348 | * @} 349 | */ 350 | 351 | #ifdef __cplusplus 352 | } 353 | #endif 354 | 355 | #endif /* __STM32F1xx_HAL_H */ 356 | 357 | 358 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_hal_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_crc.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F1xx_HAL_CRC_H 21 | #define STM32F1xx_HAL_CRC_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f1xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F1xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup CRC 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup CRC_Exported_Types CRC Exported Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @brief CRC HAL State Structure definition 45 | */ 46 | typedef enum 47 | { 48 | HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */ 49 | HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */ 50 | HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */ 51 | HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */ 52 | HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */ 53 | } HAL_CRC_StateTypeDef; 54 | 55 | 56 | /** 57 | * @brief CRC Handle Structure definition 58 | */ 59 | typedef struct 60 | { 61 | CRC_TypeDef *Instance; /*!< Register base address */ 62 | 63 | HAL_LockTypeDef Lock; /*!< CRC Locking object */ 64 | 65 | __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */ 66 | 67 | } CRC_HandleTypeDef; 68 | /** 69 | * @} 70 | */ 71 | 72 | /* Exported constants --------------------------------------------------------*/ 73 | /** @defgroup CRC_Exported_Constants CRC Exported Constants 74 | * @{ 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | 81 | /* Exported macros -----------------------------------------------------------*/ 82 | /** @defgroup CRC_Exported_Macros CRC Exported Macros 83 | * @{ 84 | */ 85 | 86 | /** @brief Reset CRC handle state. 87 | * @param __HANDLE__ CRC handle. 88 | * @retval None 89 | */ 90 | #define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET) 91 | 92 | /** 93 | * @brief Reset CRC Data Register. 94 | * @param __HANDLE__ CRC handle 95 | * @retval None 96 | */ 97 | #define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET) 98 | 99 | /** 100 | * @brief Store data in the Independent Data (ID) register. 101 | * @param __HANDLE__ CRC handle 102 | * @param __VALUE__ Value to be stored in the ID register 103 | * @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits 104 | * @retval None 105 | */ 106 | #define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__))) 107 | 108 | /** 109 | * @brief Return the data stored in the Independent Data (ID) register. 110 | * @param __HANDLE__ CRC handle 111 | * @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits 112 | * @retval Value of the ID register 113 | */ 114 | #define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR) 115 | /** 116 | * @} 117 | */ 118 | 119 | 120 | /* Private macros --------------------------------------------------------*/ 121 | /** @defgroup CRC_Private_Macros CRC Private Macros 122 | * @{ 123 | */ 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | /* Exported functions --------------------------------------------------------*/ 130 | /** @defgroup CRC_Exported_Functions CRC Exported Functions 131 | * @{ 132 | */ 133 | 134 | /* Initialization and de-initialization functions ****************************/ 135 | /** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions 136 | * @{ 137 | */ 138 | HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc); 139 | HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc); 140 | void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc); 141 | void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc); 142 | /** 143 | * @} 144 | */ 145 | 146 | /* Peripheral Control functions ***********************************************/ 147 | /** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions 148 | * @{ 149 | */ 150 | uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); 151 | uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); 152 | /** 153 | * @} 154 | */ 155 | 156 | /* Peripheral State and Error functions ***************************************/ 157 | /** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions 158 | * @{ 159 | */ 160 | HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc); 161 | /** 162 | * @} 163 | */ 164 | 165 | /** 166 | * @} 167 | */ 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | /** 174 | * @} 175 | */ 176 | 177 | #ifdef __cplusplus 178 | } 179 | #endif 180 | 181 | #endif /* STM32F1xx_HAL_CRC_H */ 182 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_def.h 4 | * @author MCD Application Team 5 | * @brief This file contains HAL common defines, enumeration, macros and 6 | * structures definitions. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2017 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32F1xx_HAL_DEF 22 | #define __STM32F1xx_HAL_DEF 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f1xx.h" 30 | #include "Legacy/stm32_hal_legacy.h" 31 | #include 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | 35 | /** 36 | * @brief HAL Status structures definition 37 | */ 38 | typedef enum 39 | { 40 | HAL_OK = 0x00U, 41 | HAL_ERROR = 0x01U, 42 | HAL_BUSY = 0x02U, 43 | HAL_TIMEOUT = 0x03U 44 | } HAL_StatusTypeDef; 45 | 46 | /** 47 | * @brief HAL Lock structures definition 48 | */ 49 | typedef enum 50 | { 51 | HAL_UNLOCKED = 0x00U, 52 | HAL_LOCKED = 0x01U 53 | } HAL_LockTypeDef; 54 | 55 | /* Exported macro ------------------------------------------------------------*/ 56 | #define HAL_MAX_DELAY 0xFFFFFFFFU 57 | 58 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != 0U) 59 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) 60 | 61 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ 62 | do{ \ 63 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ 64 | (__DMA_HANDLE__).Parent = (__HANDLE__); \ 65 | } while(0U) 66 | 67 | #if !defined(UNUSED) 68 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ 69 | #endif /* UNUSED */ 70 | 71 | /** @brief Reset the Handle's State field. 72 | * @param __HANDLE__ specifies the Peripheral Handle. 73 | * @note This macro can be used for the following purpose: 74 | * - When the Handle is declared as local variable; before passing it as parameter 75 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 76 | * to set to 0 the Handle's "State" field. 77 | * Otherwise, "State" field may have any random value and the first time the function 78 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 79 | * (i.e. HAL_PPP_MspInit() will not be executed). 80 | * - When there is a need to reconfigure the low level hardware: instead of calling 81 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 82 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function 83 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 84 | * @retval None 85 | */ 86 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U) 87 | 88 | #if (USE_RTOS == 1U) 89 | /* Reserved for future use */ 90 | #error "USE_RTOS should be 0 in the current HAL release" 91 | #else 92 | #define __HAL_LOCK(__HANDLE__) \ 93 | do{ \ 94 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 95 | { \ 96 | return HAL_BUSY; \ 97 | } \ 98 | else \ 99 | { \ 100 | (__HANDLE__)->Lock = HAL_LOCKED; \ 101 | } \ 102 | }while (0U) 103 | 104 | #define __HAL_UNLOCK(__HANDLE__) \ 105 | do{ \ 106 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 107 | }while (0U) 108 | #endif /* USE_RTOS */ 109 | 110 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */ 111 | #ifndef __weak 112 | #define __weak __attribute__((weak)) 113 | #endif 114 | #ifndef __packed 115 | #define __packed __attribute__((packed)) 116 | #endif 117 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 118 | #ifndef __weak 119 | #define __weak __attribute__((weak)) 120 | #endif /* __weak */ 121 | #ifndef __packed 122 | #define __packed __attribute__((__packed__)) 123 | #endif /* __packed */ 124 | #endif /* __GNUC__ */ 125 | 126 | 127 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 128 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */ 129 | #ifndef __ALIGN_BEGIN 130 | #define __ALIGN_BEGIN 131 | #endif 132 | #ifndef __ALIGN_END 133 | #define __ALIGN_END __attribute__ ((aligned (4))) 134 | #endif 135 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 136 | #ifndef __ALIGN_END 137 | #define __ALIGN_END __attribute__ ((aligned (4))) 138 | #endif /* __ALIGN_END */ 139 | #ifndef __ALIGN_BEGIN 140 | #define __ALIGN_BEGIN 141 | #endif /* __ALIGN_BEGIN */ 142 | #else 143 | #ifndef __ALIGN_END 144 | #define __ALIGN_END 145 | #endif /* __ALIGN_END */ 146 | #ifndef __ALIGN_BEGIN 147 | #if defined (__CC_ARM) /* ARM Compiler V5*/ 148 | #define __ALIGN_BEGIN __align(4) 149 | #elif defined (__ICCARM__) /* IAR Compiler */ 150 | #define __ALIGN_BEGIN 151 | #endif /* __CC_ARM */ 152 | #endif /* __ALIGN_BEGIN */ 153 | #endif /* __GNUC__ */ 154 | 155 | 156 | /** 157 | * @brief __RAM_FUNC definition 158 | */ 159 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) 160 | /* ARM Compiler V4/V5 and V6 161 | -------------------------- 162 | RAM functions are defined using the toolchain options. 163 | Functions that are executed in RAM should reside in a separate source module. 164 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 165 | area of a module to a memory space in physical RAM. 166 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 167 | dialog. 168 | */ 169 | #define __RAM_FUNC 170 | 171 | #elif defined ( __ICCARM__ ) 172 | /* ICCARM Compiler 173 | --------------- 174 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 175 | */ 176 | #define __RAM_FUNC __ramfunc 177 | 178 | #elif defined ( __GNUC__ ) 179 | /* GNU Compiler 180 | ------------ 181 | RAM functions are defined using a specific toolchain attribute 182 | "__attribute__((section(".RamFunc")))". 183 | */ 184 | #define __RAM_FUNC __attribute__((section(".RamFunc"))) 185 | 186 | #endif 187 | 188 | /** 189 | * @brief __NOINLINE definition 190 | */ 191 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ ) 192 | /* ARM V4/V5 and V6 & GNU Compiler 193 | ------------------------------- 194 | */ 195 | #define __NOINLINE __attribute__ ( (noinline) ) 196 | 197 | #elif defined ( __ICCARM__ ) 198 | /* ICCARM Compiler 199 | --------------- 200 | */ 201 | #define __NOINLINE _Pragma("optimize = no_inline") 202 | 203 | #endif 204 | 205 | #ifdef __cplusplus 206 | } 207 | #endif 208 | 209 | #endif /* ___STM32F1xx_HAL_DEF */ 210 | 211 | 212 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_hal_flash.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_flash.h 4 | * @author MCD Application Team 5 | * @brief Header file of Flash HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | ****************************************************************************** 16 | */ 17 | 18 | /* Define to prevent recursive inclusion -------------------------------------*/ 19 | #ifndef __STM32F1xx_HAL_FLASH_H 20 | #define __STM32F1xx_HAL_FLASH_H 21 | 22 | #ifdef __cplusplus 23 | extern "C" { 24 | #endif 25 | 26 | /* Includes ------------------------------------------------------------------*/ 27 | #include "stm32f1xx_hal_def.h" 28 | 29 | /** @addtogroup STM32F1xx_HAL_Driver 30 | * @{ 31 | */ 32 | 33 | /** @addtogroup FLASH 34 | * @{ 35 | */ 36 | 37 | /** @addtogroup FLASH_Private_Constants 38 | * @{ 39 | */ 40 | #define FLASH_TIMEOUT_VALUE 50000U /* 50 s */ 41 | /** 42 | * @} 43 | */ 44 | 45 | /** @addtogroup FLASH_Private_Macros 46 | * @{ 47 | */ 48 | 49 | #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_HALFWORD) || \ 50 | ((VALUE) == FLASH_TYPEPROGRAM_WORD) || \ 51 | ((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD)) 52 | 53 | #if defined(FLASH_ACR_LATENCY) 54 | #define IS_FLASH_LATENCY(__LATENCY__) (((__LATENCY__) == FLASH_LATENCY_0) || \ 55 | ((__LATENCY__) == FLASH_LATENCY_1) || \ 56 | ((__LATENCY__) == FLASH_LATENCY_2)) 57 | 58 | #else 59 | #define IS_FLASH_LATENCY(__LATENCY__) ((__LATENCY__) == FLASH_LATENCY_0) 60 | #endif /* FLASH_ACR_LATENCY */ 61 | /** 62 | * @} 63 | */ 64 | 65 | /* Exported types ------------------------------------------------------------*/ 66 | /** @defgroup FLASH_Exported_Types FLASH Exported Types 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @brief FLASH Procedure structure definition 72 | */ 73 | typedef enum 74 | { 75 | FLASH_PROC_NONE = 0U, 76 | FLASH_PROC_PAGEERASE = 1U, 77 | FLASH_PROC_MASSERASE = 2U, 78 | FLASH_PROC_PROGRAMHALFWORD = 3U, 79 | FLASH_PROC_PROGRAMWORD = 4U, 80 | FLASH_PROC_PROGRAMDOUBLEWORD = 5U 81 | } FLASH_ProcedureTypeDef; 82 | 83 | /** 84 | * @brief FLASH handle Structure definition 85 | */ 86 | typedef struct 87 | { 88 | __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */ 89 | 90 | __IO uint32_t DataRemaining; /*!< Internal variable to save the remaining pages to erase or half-word to program in IT context */ 91 | 92 | __IO uint32_t Address; /*!< Internal variable to save address selected for program or erase */ 93 | 94 | __IO uint64_t Data; /*!< Internal variable to save data to be programmed */ 95 | 96 | HAL_LockTypeDef Lock; /*!< FLASH locking object */ 97 | 98 | __IO uint32_t ErrorCode; /*!< FLASH error code 99 | This parameter can be a value of @ref FLASH_Error_Codes */ 100 | } FLASH_ProcessTypeDef; 101 | 102 | /** 103 | * @} 104 | */ 105 | 106 | /* Exported constants --------------------------------------------------------*/ 107 | /** @defgroup FLASH_Exported_Constants FLASH Exported Constants 108 | * @{ 109 | */ 110 | 111 | /** @defgroup FLASH_Error_Codes FLASH Error Codes 112 | * @{ 113 | */ 114 | 115 | #define HAL_FLASH_ERROR_NONE 0x00U /*!< No error */ 116 | #define HAL_FLASH_ERROR_PROG 0x01U /*!< Programming error */ 117 | #define HAL_FLASH_ERROR_WRP 0x02U /*!< Write protection error */ 118 | #define HAL_FLASH_ERROR_OPTV 0x04U /*!< Option validity error */ 119 | 120 | /** 121 | * @} 122 | */ 123 | 124 | /** @defgroup FLASH_Type_Program FLASH Type Program 125 | * @{ 126 | */ 127 | #define FLASH_TYPEPROGRAM_HALFWORD 0x01U /*!ACR |= FLASH_ACR_HLFCYA) 181 | 182 | /** 183 | * @brief Disable the FLASH half cycle access. 184 | * @note half cycle access can only be used with a low-frequency clock of less than 185 | 8 MHz that can be obtained with the use of HSI or HSE but not of PLL. 186 | * @retval None 187 | */ 188 | #define __HAL_FLASH_HALF_CYCLE_ACCESS_DISABLE() (FLASH->ACR &= (~FLASH_ACR_HLFCYA)) 189 | 190 | /** 191 | * @} 192 | */ 193 | 194 | #if defined(FLASH_ACR_LATENCY) 195 | /** @defgroup FLASH_EM_Latency FLASH Latency 196 | * @brief macros to handle FLASH Latency 197 | * @{ 198 | */ 199 | 200 | /** 201 | * @brief Set the FLASH Latency. 202 | * @param __LATENCY__ FLASH Latency 203 | * The value of this parameter depend on device used within the same series 204 | * @retval None 205 | */ 206 | #define __HAL_FLASH_SET_LATENCY(__LATENCY__) (FLASH->ACR = (FLASH->ACR&(~FLASH_ACR_LATENCY)) | (__LATENCY__)) 207 | 208 | 209 | /** 210 | * @brief Get the FLASH Latency. 211 | * @retval FLASH Latency 212 | * The value of this parameter depend on device used within the same series 213 | */ 214 | #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) 215 | 216 | /** 217 | * @} 218 | */ 219 | 220 | #endif /* FLASH_ACR_LATENCY */ 221 | /** @defgroup FLASH_Prefetch FLASH Prefetch 222 | * @brief macros to handle FLASH Prefetch buffer 223 | * @{ 224 | */ 225 | /** 226 | * @brief Enable the FLASH prefetch buffer. 227 | * @retval None 228 | */ 229 | #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() (FLASH->ACR |= FLASH_ACR_PRFTBE) 230 | 231 | /** 232 | * @brief Disable the FLASH prefetch buffer. 233 | * @retval None 234 | */ 235 | #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() (FLASH->ACR &= (~FLASH_ACR_PRFTBE)) 236 | 237 | /** 238 | * @} 239 | */ 240 | 241 | /** 242 | * @} 243 | */ 244 | 245 | /* Include FLASH HAL Extended module */ 246 | #include "stm32f1xx_hal_flash_ex.h" 247 | 248 | /* Exported functions --------------------------------------------------------*/ 249 | /** @addtogroup FLASH_Exported_Functions 250 | * @{ 251 | */ 252 | 253 | /** @addtogroup FLASH_Exported_Functions_Group1 254 | * @{ 255 | */ 256 | /* IO operation functions *****************************************************/ 257 | HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data); 258 | HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data); 259 | 260 | /* FLASH IRQ handler function */ 261 | void HAL_FLASH_IRQHandler(void); 262 | /* Callbacks in non blocking modes */ 263 | void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); 264 | void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); 265 | 266 | /** 267 | * @} 268 | */ 269 | 270 | /** @addtogroup FLASH_Exported_Functions_Group2 271 | * @{ 272 | */ 273 | /* Peripheral Control functions ***********************************************/ 274 | HAL_StatusTypeDef HAL_FLASH_Unlock(void); 275 | HAL_StatusTypeDef HAL_FLASH_Lock(void); 276 | HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); 277 | HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); 278 | void HAL_FLASH_OB_Launch(void); 279 | 280 | /** 281 | * @} 282 | */ 283 | 284 | /** @addtogroup FLASH_Exported_Functions_Group3 285 | * @{ 286 | */ 287 | /* Peripheral State and Error functions ***************************************/ 288 | uint32_t HAL_FLASH_GetError(void); 289 | 290 | /** 291 | * @} 292 | */ 293 | 294 | /** 295 | * @} 296 | */ 297 | 298 | /* Private function -------------------------------------------------*/ 299 | /** @addtogroup FLASH_Private_Functions 300 | * @{ 301 | */ 302 | HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); 303 | #if defined(FLASH_BANK2_END) 304 | HAL_StatusTypeDef FLASH_WaitForLastOperationBank2(uint32_t Timeout); 305 | #endif /* FLASH_BANK2_END */ 306 | 307 | /** 308 | * @} 309 | */ 310 | 311 | /** 312 | * @} 313 | */ 314 | 315 | /** 316 | * @} 317 | */ 318 | 319 | #ifdef __cplusplus 320 | } 321 | #endif 322 | 323 | #endif /* __STM32F1xx_HAL_FLASH_H */ 324 | 325 | 326 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_hal_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_iwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of IWDG HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F1xx_HAL_IWDG_H 21 | #define STM32F1xx_HAL_IWDG_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f1xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F1xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @defgroup IWDG IWDG 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup IWDG_Exported_Types IWDG Exported Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @brief IWDG Init structure definition 45 | */ 46 | typedef struct 47 | { 48 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. 49 | This parameter can be a value of @ref IWDG_Prescaler */ 50 | 51 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. 52 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 53 | 54 | } IWDG_InitTypeDef; 55 | 56 | /** 57 | * @brief IWDG Handle Structure definition 58 | */ 59 | typedef struct 60 | { 61 | IWDG_TypeDef *Instance; /*!< Register base address */ 62 | 63 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ 64 | } IWDG_HandleTypeDef; 65 | 66 | 67 | /** 68 | * @} 69 | */ 70 | 71 | /* Exported constants --------------------------------------------------------*/ 72 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants 73 | * @{ 74 | */ 75 | 76 | /** @defgroup IWDG_Prescaler IWDG Prescaler 77 | * @{ 78 | */ 79 | #define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */ 80 | #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ 81 | #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ 82 | #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ 83 | #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ 84 | #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ 85 | #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ 86 | /** 87 | * @} 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /* Exported macros -----------------------------------------------------------*/ 95 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros 96 | * @{ 97 | */ 98 | 99 | /** 100 | * @brief Enable the IWDG peripheral. 101 | * @param __HANDLE__ IWDG handle 102 | * @retval None 103 | */ 104 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) 105 | 106 | /** 107 | * @brief Reload IWDG counter with value defined in the reload register 108 | * (write access to IWDG_PR and IWDG_RLR registers disabled). 109 | * @param __HANDLE__ IWDG handle 110 | * @retval None 111 | */ 112 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) 113 | 114 | /** 115 | * @} 116 | */ 117 | 118 | /* Exported functions --------------------------------------------------------*/ 119 | /** @defgroup IWDG_Exported_Functions IWDG Exported Functions 120 | * @{ 121 | */ 122 | 123 | /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions 124 | * @{ 125 | */ 126 | /* Initialization/Start functions ********************************************/ 127 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); 128 | /** 129 | * @} 130 | */ 131 | 132 | /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions 133 | * @{ 134 | */ 135 | /* I/O operation functions ****************************************************/ 136 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); 137 | /** 138 | * @} 139 | */ 140 | 141 | /** 142 | * @} 143 | */ 144 | 145 | /* Private constants ---------------------------------------------------------*/ 146 | /** @defgroup IWDG_Private_Constants IWDG Private Constants 147 | * @{ 148 | */ 149 | 150 | /** 151 | * @brief IWDG Key Register BitMask 152 | */ 153 | #define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */ 154 | #define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */ 155 | #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */ 156 | #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */ 157 | 158 | /** 159 | * @} 160 | */ 161 | 162 | /* Private macros ------------------------------------------------------------*/ 163 | /** @defgroup IWDG_Private_Macros IWDG Private Macros 164 | * @{ 165 | */ 166 | 167 | /** 168 | * @brief Enable write access to IWDG_PR and IWDG_RLR registers. 169 | * @param __HANDLE__ IWDG handle 170 | * @retval None 171 | */ 172 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) 173 | 174 | /** 175 | * @brief Disable write access to IWDG_PR and IWDG_RLR registers. 176 | * @param __HANDLE__ IWDG handle 177 | * @retval None 178 | */ 179 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) 180 | 181 | /** 182 | * @brief Check IWDG prescaler value. 183 | * @param __PRESCALER__ IWDG prescaler value 184 | * @retval None 185 | */ 186 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ 187 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ 188 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ 189 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ 190 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ 191 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ 192 | ((__PRESCALER__) == IWDG_PRESCALER_256)) 193 | 194 | /** 195 | * @brief Check IWDG reload value. 196 | * @param __RELOAD__ IWDG reload value 197 | * @retval None 198 | */ 199 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) 200 | 201 | 202 | 203 | /** 204 | * @} 205 | */ 206 | 207 | /** 208 | * @} 209 | */ 210 | 211 | /** 212 | * @} 213 | */ 214 | 215 | 216 | #ifdef __cplusplus 217 | } 218 | #endif 219 | 220 | #endif /* STM32F1xx_HAL_IWDG_H */ 221 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_hal_nor.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_nor.h 4 | * @author MCD Application Team 5 | * @brief Header file of NOR HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F1xx_HAL_NOR_H 21 | #define STM32F1xx_HAL_NOR_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | #if defined(FSMC_BANK1) 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32f1xx_ll_fsmc.h" 31 | 32 | /** @addtogroup STM32F1xx_HAL_Driver 33 | * @{ 34 | */ 35 | 36 | /** @addtogroup NOR 37 | * @{ 38 | */ 39 | 40 | /* Exported typedef ----------------------------------------------------------*/ 41 | /** @defgroup NOR_Exported_Types NOR Exported Types 42 | * @{ 43 | */ 44 | 45 | /** 46 | * @brief HAL SRAM State structures definition 47 | */ 48 | typedef enum 49 | { 50 | HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */ 51 | HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */ 52 | HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */ 53 | HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */ 54 | HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */ 55 | } HAL_NOR_StateTypeDef; 56 | 57 | /** 58 | * @brief FSMC NOR Status typedef 59 | */ 60 | typedef enum 61 | { 62 | HAL_NOR_STATUS_SUCCESS = 0U, 63 | HAL_NOR_STATUS_ONGOING, 64 | HAL_NOR_STATUS_ERROR, 65 | HAL_NOR_STATUS_TIMEOUT 66 | } HAL_NOR_StatusTypeDef; 67 | 68 | /** 69 | * @brief FSMC NOR ID typedef 70 | */ 71 | typedef struct 72 | { 73 | uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */ 74 | 75 | uint16_t Device_Code1; 76 | 77 | uint16_t Device_Code2; 78 | 79 | uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory. 80 | These codes can be accessed by performing read operations with specific 81 | control signals and addresses set.They can also be accessed by issuing 82 | an Auto Select command */ 83 | } NOR_IDTypeDef; 84 | 85 | /** 86 | * @brief FSMC NOR CFI typedef 87 | */ 88 | typedef struct 89 | { 90 | /*!< Defines the information stored in the memory's Common flash interface 91 | which contains a description of various electrical and timing parameters, 92 | density information and functions supported by the memory */ 93 | 94 | uint16_t CFI_1; 95 | 96 | uint16_t CFI_2; 97 | 98 | uint16_t CFI_3; 99 | 100 | uint16_t CFI_4; 101 | } NOR_CFITypeDef; 102 | 103 | /** 104 | * @brief NOR handle Structure definition 105 | */ 106 | #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 107 | typedef struct __NOR_HandleTypeDef 108 | #else 109 | typedef struct 110 | #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 111 | 112 | { 113 | FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ 114 | 115 | FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ 116 | 117 | FSMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */ 118 | 119 | HAL_LockTypeDef Lock; /*!< NOR locking object */ 120 | 121 | __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */ 122 | 123 | uint32_t CommandSet; /*!< NOR algorithm command set and control */ 124 | 125 | #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 126 | void (* MspInitCallback)(struct __NOR_HandleTypeDef *hnor); /*!< NOR Msp Init callback */ 127 | void (* MspDeInitCallback)(struct __NOR_HandleTypeDef *hnor); /*!< NOR Msp DeInit callback */ 128 | #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 129 | } NOR_HandleTypeDef; 130 | 131 | #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 132 | /** 133 | * @brief HAL NOR Callback ID enumeration definition 134 | */ 135 | typedef enum 136 | { 137 | HAL_NOR_MSP_INIT_CB_ID = 0x00U, /*!< NOR MspInit Callback ID */ 138 | HAL_NOR_MSP_DEINIT_CB_ID = 0x01U /*!< NOR MspDeInit Callback ID */ 139 | } HAL_NOR_CallbackIDTypeDef; 140 | 141 | /** 142 | * @brief HAL NOR Callback pointer definition 143 | */ 144 | typedef void (*pNOR_CallbackTypeDef)(NOR_HandleTypeDef *hnor); 145 | #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 146 | /** 147 | * @} 148 | */ 149 | 150 | /* Exported constants --------------------------------------------------------*/ 151 | /* Exported macro ------------------------------------------------------------*/ 152 | /** @defgroup NOR_Exported_Macros NOR Exported Macros 153 | * @{ 154 | */ 155 | /** @brief Reset NOR handle state 156 | * @param __HANDLE__ specifies the NOR handle. 157 | * @retval None 158 | */ 159 | #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 160 | #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) do { \ 161 | (__HANDLE__)->State = HAL_NOR_STATE_RESET; \ 162 | (__HANDLE__)->MspInitCallback = NULL; \ 163 | (__HANDLE__)->MspDeInitCallback = NULL; \ 164 | } while(0) 165 | #else 166 | #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET) 167 | #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 168 | /** 169 | * @} 170 | */ 171 | 172 | /* Exported functions --------------------------------------------------------*/ 173 | /** @addtogroup NOR_Exported_Functions NOR Exported Functions 174 | * @{ 175 | */ 176 | 177 | /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions 178 | * @{ 179 | */ 180 | 181 | /* Initialization/de-initialization functions ********************************/ 182 | HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing, 183 | FSMC_NORSRAM_TimingTypeDef *ExtTiming); 184 | HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor); 185 | void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor); 186 | void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor); 187 | void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout); 188 | /** 189 | * @} 190 | */ 191 | 192 | /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions 193 | * @{ 194 | */ 195 | 196 | /* I/O operation functions ***************************************************/ 197 | HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID); 198 | HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor); 199 | HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); 200 | HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); 201 | 202 | HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, 203 | uint32_t uwBufferSize); 204 | HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, 205 | uint32_t uwBufferSize); 206 | 207 | HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address); 208 | HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address); 209 | HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI); 210 | 211 | #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 212 | /* NOR callback registering/unregistering */ 213 | HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId, 214 | pNOR_CallbackTypeDef pCallback); 215 | HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId); 216 | #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 217 | /** 218 | * @} 219 | */ 220 | 221 | /** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions 222 | * @{ 223 | */ 224 | 225 | /* NOR Control functions *****************************************************/ 226 | HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor); 227 | HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor); 228 | /** 229 | * @} 230 | */ 231 | 232 | /** @addtogroup NOR_Exported_Functions_Group4 NOR State functions 233 | * @{ 234 | */ 235 | 236 | /* NOR State functions ********************************************************/ 237 | HAL_NOR_StateTypeDef HAL_NOR_GetState(const NOR_HandleTypeDef *hnor); 238 | HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout); 239 | /** 240 | * @} 241 | */ 242 | 243 | /** 244 | * @} 245 | */ 246 | 247 | /* Private types -------------------------------------------------------------*/ 248 | /* Private variables ---------------------------------------------------------*/ 249 | /* Private constants ---------------------------------------------------------*/ 250 | /** @defgroup NOR_Private_Constants NOR Private Constants 251 | * @{ 252 | */ 253 | /* NOR device IDs addresses */ 254 | #define MC_ADDRESS ((uint16_t)0x0000) 255 | #define DEVICE_CODE1_ADDR ((uint16_t)0x0001) 256 | #define DEVICE_CODE2_ADDR ((uint16_t)0x000E) 257 | #define DEVICE_CODE3_ADDR ((uint16_t)0x000F) 258 | 259 | /* NOR CFI IDs addresses */ 260 | #define CFI1_ADDRESS ((uint16_t)0x0061) 261 | #define CFI2_ADDRESS ((uint16_t)0x0062) 262 | #define CFI3_ADDRESS ((uint16_t)0x0063) 263 | #define CFI4_ADDRESS ((uint16_t)0x0064) 264 | 265 | /* NOR operation wait timeout */ 266 | #define NOR_TMEOUT ((uint16_t)0xFFFF) 267 | 268 | /* NOR memory data width */ 269 | #define NOR_MEMORY_8B ((uint8_t)0x00) 270 | #define NOR_MEMORY_16B ((uint8_t)0x01) 271 | 272 | /* NOR memory device read/write start address */ 273 | #define NOR_MEMORY_ADRESS1 (0x60000000U) 274 | #define NOR_MEMORY_ADRESS2 (0x64000000U) 275 | #define NOR_MEMORY_ADRESS3 (0x68000000U) 276 | #define NOR_MEMORY_ADRESS4 (0x6C000000U) 277 | /** 278 | * @} 279 | */ 280 | 281 | /* Private macros ------------------------------------------------------------*/ 282 | /** @defgroup NOR_Private_Macros NOR Private Macros 283 | * @{ 284 | */ 285 | /** 286 | * @brief NOR memory address shifting. 287 | * @param __NOR_ADDRESS NOR base address 288 | * @param __NOR_MEMORY_WIDTH_ NOR memory width 289 | * @param __ADDRESS__ NOR memory address 290 | * @retval NOR shifted address value 291 | */ 292 | #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \ 293 | ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \ 294 | ((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \ 295 | ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__))))) 296 | 297 | /** 298 | * @brief NOR memory write data to specified address. 299 | * @param __ADDRESS__ NOR memory address 300 | * @param __DATA__ Data to write 301 | * @retval None 302 | */ 303 | #define NOR_WRITE(__ADDRESS__, __DATA__) do{ \ 304 | (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \ 305 | __DSB(); \ 306 | } while(0) 307 | 308 | /** 309 | * @} 310 | */ 311 | 312 | /** 313 | * @} 314 | */ 315 | 316 | /** 317 | * @} 318 | */ 319 | 320 | #endif /* FSMC_BANK1 */ 321 | 322 | #ifdef __cplusplus 323 | } 324 | #endif 325 | 326 | #endif /* STM32F1xx_HAL_NOR_H */ 327 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_hal_pcd_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_pcd_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of PCD HAL Extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F1xx_HAL_PCD_EX_H 21 | #define STM32F1xx_HAL_PCD_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif /* __cplusplus */ 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f1xx_hal_def.h" 29 | 30 | #if defined (USB) || defined (USB_OTG_FS) 31 | /** @addtogroup STM32F1xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup PCDEx 36 | * @{ 37 | */ 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* Exported macros -----------------------------------------------------------*/ 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions 43 | * @{ 44 | */ 45 | /** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 46 | * @{ 47 | */ 48 | 49 | #if defined (USB_OTG_FS) 50 | HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size); 51 | HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size); 52 | #endif /* defined (USB_OTG_FS) */ 53 | 54 | #if defined (USB) 55 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, 56 | uint16_t ep_kind, uint32_t pmaadress); 57 | 58 | void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state); 59 | #endif /* defined (USB) */ 60 | void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); 61 | void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** 68 | * @} 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** 76 | * @} 77 | */ 78 | #endif /* defined (USB) || defined (USB_OTG_FS) */ 79 | 80 | #ifdef __cplusplus 81 | } 82 | #endif /* __cplusplus */ 83 | 84 | 85 | #endif /* STM32F1xx_HAL_PCD_EX_H */ 86 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_hal_sram.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_sram.h 4 | * @author MCD Application Team 5 | * @brief Header file of SRAM HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F1xx_HAL_SRAM_H 21 | #define STM32F1xx_HAL_SRAM_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | #if defined(FSMC_BANK1) 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32f1xx_ll_fsmc.h" 31 | 32 | /** @addtogroup STM32F1xx_HAL_Driver 33 | * @{ 34 | */ 35 | /** @addtogroup SRAM 36 | * @{ 37 | */ 38 | 39 | /* Exported typedef ----------------------------------------------------------*/ 40 | 41 | /** @defgroup SRAM_Exported_Types SRAM Exported Types 42 | * @{ 43 | */ 44 | /** 45 | * @brief HAL SRAM State structures definition 46 | */ 47 | typedef enum 48 | { 49 | HAL_SRAM_STATE_RESET = 0x00U, /*!< SRAM not yet initialized or disabled */ 50 | HAL_SRAM_STATE_READY = 0x01U, /*!< SRAM initialized and ready for use */ 51 | HAL_SRAM_STATE_BUSY = 0x02U, /*!< SRAM internal process is ongoing */ 52 | HAL_SRAM_STATE_ERROR = 0x03U, /*!< SRAM error state */ 53 | HAL_SRAM_STATE_PROTECTED = 0x04U /*!< SRAM peripheral NORSRAM device write protected */ 54 | 55 | } HAL_SRAM_StateTypeDef; 56 | 57 | /** 58 | * @brief SRAM handle Structure definition 59 | */ 60 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 61 | typedef struct __SRAM_HandleTypeDef 62 | #else 63 | typedef struct 64 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 65 | { 66 | FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ 67 | 68 | FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ 69 | 70 | FSMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */ 71 | 72 | HAL_LockTypeDef Lock; /*!< SRAM locking object */ 73 | 74 | __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */ 75 | 76 | DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ 77 | 78 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 79 | void (* MspInitCallback)(struct __SRAM_HandleTypeDef *hsram); /*!< SRAM Msp Init callback */ 80 | void (* MspDeInitCallback)(struct __SRAM_HandleTypeDef *hsram); /*!< SRAM Msp DeInit callback */ 81 | void (* DmaXferCpltCallback)(DMA_HandleTypeDef *hdma); /*!< SRAM DMA Xfer Complete callback */ 82 | void (* DmaXferErrorCallback)(DMA_HandleTypeDef *hdma); /*!< SRAM DMA Xfer Error callback */ 83 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 84 | } SRAM_HandleTypeDef; 85 | 86 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 87 | /** 88 | * @brief HAL SRAM Callback ID enumeration definition 89 | */ 90 | typedef enum 91 | { 92 | HAL_SRAM_MSP_INIT_CB_ID = 0x00U, /*!< SRAM MspInit Callback ID */ 93 | HAL_SRAM_MSP_DEINIT_CB_ID = 0x01U, /*!< SRAM MspDeInit Callback ID */ 94 | HAL_SRAM_DMA_XFER_CPLT_CB_ID = 0x02U, /*!< SRAM DMA Xfer Complete Callback ID */ 95 | HAL_SRAM_DMA_XFER_ERR_CB_ID = 0x03U /*!< SRAM DMA Xfer Complete Callback ID */ 96 | } HAL_SRAM_CallbackIDTypeDef; 97 | 98 | /** 99 | * @brief HAL SRAM Callback pointer definition 100 | */ 101 | typedef void (*pSRAM_CallbackTypeDef)(SRAM_HandleTypeDef *hsram); 102 | typedef void (*pSRAM_DmaCallbackTypeDef)(DMA_HandleTypeDef *hdma); 103 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 104 | /** 105 | * @} 106 | */ 107 | 108 | /* Exported constants --------------------------------------------------------*/ 109 | /* Exported macro ------------------------------------------------------------*/ 110 | 111 | /** @defgroup SRAM_Exported_Macros SRAM Exported Macros 112 | * @{ 113 | */ 114 | 115 | /** @brief Reset SRAM handle state 116 | * @param __HANDLE__ SRAM handle 117 | * @retval None 118 | */ 119 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 120 | #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) do { \ 121 | (__HANDLE__)->State = HAL_SRAM_STATE_RESET; \ 122 | (__HANDLE__)->MspInitCallback = NULL; \ 123 | (__HANDLE__)->MspDeInitCallback = NULL; \ 124 | } while(0) 125 | #else 126 | #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET) 127 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 128 | 129 | /** 130 | * @} 131 | */ 132 | 133 | /* Exported functions --------------------------------------------------------*/ 134 | /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions 135 | * @{ 136 | */ 137 | 138 | /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions 139 | * @{ 140 | */ 141 | 142 | /* Initialization/de-initialization functions ********************************/ 143 | HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing, 144 | FSMC_NORSRAM_TimingTypeDef *ExtTiming); 145 | HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram); 146 | void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram); 147 | void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram); 148 | 149 | /** 150 | * @} 151 | */ 152 | 153 | /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions 154 | * @{ 155 | */ 156 | 157 | /* I/O operation functions ***************************************************/ 158 | HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, 159 | uint32_t BufferSize); 160 | HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, 161 | uint32_t BufferSize); 162 | HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, 163 | uint32_t BufferSize); 164 | HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, 165 | uint32_t BufferSize); 166 | HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, 167 | uint32_t BufferSize); 168 | HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, 169 | uint32_t BufferSize); 170 | HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, 171 | uint32_t BufferSize); 172 | HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, 173 | uint32_t BufferSize); 174 | 175 | void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); 176 | void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); 177 | 178 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 179 | /* SRAM callback registering/unregistering */ 180 | HAL_StatusTypeDef HAL_SRAM_RegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, 181 | pSRAM_CallbackTypeDef pCallback); 182 | HAL_StatusTypeDef HAL_SRAM_UnRegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId); 183 | HAL_StatusTypeDef HAL_SRAM_RegisterDmaCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, 184 | pSRAM_DmaCallbackTypeDef pCallback); 185 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | /** @addtogroup SRAM_Exported_Functions_Group3 Control functions 192 | * @{ 193 | */ 194 | 195 | /* SRAM Control functions ****************************************************/ 196 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram); 197 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram); 198 | 199 | /** 200 | * @} 201 | */ 202 | 203 | /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions 204 | * @{ 205 | */ 206 | 207 | /* SRAM State functions ******************************************************/ 208 | HAL_SRAM_StateTypeDef HAL_SRAM_GetState(const SRAM_HandleTypeDef *hsram); 209 | 210 | /** 211 | * @} 212 | */ 213 | 214 | /** 215 | * @} 216 | */ 217 | 218 | /** 219 | * @} 220 | */ 221 | 222 | /** 223 | * @} 224 | */ 225 | 226 | #endif /* FSMC_BANK1 */ 227 | 228 | #ifdef __cplusplus 229 | } 230 | #endif 231 | 232 | #endif /* STM32F1xx_HAL_SRAM_H */ 233 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_hal_tim_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_tim_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of TIM HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F1xx_HAL_TIM_EX_H 21 | #define STM32F1xx_HAL_TIM_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f1xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F1xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup TIMEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @brief TIM Hall sensor Configuration Structure definition 45 | */ 46 | 47 | typedef struct 48 | { 49 | uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. 50 | This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 51 | 52 | uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. 53 | This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ 54 | 55 | uint32_t IC1Filter; /*!< Specifies the input capture filter. 56 | This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 57 | 58 | uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 59 | This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 60 | } TIM_HallSensor_InitTypeDef; 61 | /** 62 | * @} 63 | */ 64 | /* End of exported types -----------------------------------------------------*/ 65 | 66 | /* Exported constants --------------------------------------------------------*/ 67 | /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 68 | * @{ 69 | */ 70 | 71 | /** @defgroup TIMEx_Remap TIM Extended Remapping 72 | * @{ 73 | */ 74 | /** 75 | * @} 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | /* End of exported constants -------------------------------------------------*/ 82 | 83 | /* Exported macro ------------------------------------------------------------*/ 84 | /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 85 | * @{ 86 | */ 87 | 88 | /** 89 | * @} 90 | */ 91 | /* End of exported macro -----------------------------------------------------*/ 92 | 93 | /* Private macro -------------------------------------------------------------*/ 94 | /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 95 | * @{ 96 | */ 97 | 98 | /** 99 | * @} 100 | */ 101 | /* End of private macro ------------------------------------------------------*/ 102 | 103 | /* Exported functions --------------------------------------------------------*/ 104 | /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 105 | * @{ 106 | */ 107 | 108 | /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 109 | * @brief Timer Hall Sensor functions 110 | * @{ 111 | */ 112 | /* Timer Hall Sensor functions **********************************************/ 113 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig); 114 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); 115 | 116 | void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); 117 | void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); 118 | 119 | /* Blocking mode: Polling */ 120 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); 121 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); 122 | /* Non-Blocking mode: Interrupt */ 123 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); 124 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); 125 | /* Non-Blocking mode: DMA */ 126 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); 127 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); 128 | /** 129 | * @} 130 | */ 131 | 132 | /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 133 | * @brief Timer Complementary Output Compare functions 134 | * @{ 135 | */ 136 | /* Timer Complementary Output Compare functions *****************************/ 137 | /* Blocking mode: Polling */ 138 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 139 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 140 | 141 | /* Non-Blocking mode: Interrupt */ 142 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 143 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 144 | 145 | /* Non-Blocking mode: DMA */ 146 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, 147 | uint16_t Length); 148 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 149 | /** 150 | * @} 151 | */ 152 | 153 | /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 154 | * @brief Timer Complementary PWM functions 155 | * @{ 156 | */ 157 | /* Timer Complementary PWM functions ****************************************/ 158 | /* Blocking mode: Polling */ 159 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 160 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 161 | 162 | /* Non-Blocking mode: Interrupt */ 163 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 164 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 165 | /* Non-Blocking mode: DMA */ 166 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, 167 | uint16_t Length); 168 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 169 | /** 170 | * @} 171 | */ 172 | 173 | /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 174 | * @brief Timer Complementary One Pulse functions 175 | * @{ 176 | */ 177 | /* Timer Complementary One Pulse functions **********************************/ 178 | /* Blocking mode: Polling */ 179 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 180 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 181 | 182 | /* Non-Blocking mode: Interrupt */ 183 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 184 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 185 | /** 186 | * @} 187 | */ 188 | 189 | /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 190 | * @brief Peripheral Control functions 191 | * @{ 192 | */ 193 | /* Extended Control functions ************************************************/ 194 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 195 | uint32_t CommutationSource); 196 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 197 | uint32_t CommutationSource); 198 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 199 | uint32_t CommutationSource); 200 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, 201 | const TIM_MasterConfigTypeDef *sMasterConfig); 202 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 203 | const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); 204 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 205 | /** 206 | * @} 207 | */ 208 | 209 | /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 210 | * @brief Extended Callbacks functions 211 | * @{ 212 | */ 213 | /* Extended Callback **********************************************************/ 214 | void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim); 215 | void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim); 216 | void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); 217 | /** 218 | * @} 219 | */ 220 | 221 | /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 222 | * @brief Extended Peripheral State functions 223 | * @{ 224 | */ 225 | /* Extended Peripheral State functions ***************************************/ 226 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim); 227 | HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN); 228 | /** 229 | * @} 230 | */ 231 | 232 | /** 233 | * @} 234 | */ 235 | /* End of exported functions -------------------------------------------------*/ 236 | 237 | /* Private functions----------------------------------------------------------*/ 238 | /** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions 239 | * @{ 240 | */ 241 | void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); 242 | void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma); 243 | /** 244 | * @} 245 | */ 246 | /* End of private functions --------------------------------------------------*/ 247 | 248 | /** 249 | * @} 250 | */ 251 | 252 | /** 253 | * @} 254 | */ 255 | 256 | #ifdef __cplusplus 257 | } 258 | #endif 259 | 260 | 261 | #endif /* STM32F1xx_HAL_TIM_EX_H */ 262 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_hal_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_wwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of WWDG HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F1xx_HAL_WWDG_H 21 | #define STM32F1xx_HAL_WWDG_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f1xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F1xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup WWDG 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | 40 | /** @defgroup WWDG_Exported_Types WWDG Exported Types 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @brief WWDG Init structure definition 46 | */ 47 | typedef struct 48 | { 49 | uint32_t Prescaler; /*!< Specifies the prescaler value of the WWDG. 50 | This parameter can be a value of @ref WWDG_Prescaler */ 51 | 52 | uint32_t Window; /*!< Specifies the WWDG window value to be compared to the downcounter. 53 | This parameter must be a number Min_Data = 0x40 and Max_Data = 0x7F */ 54 | 55 | uint32_t Counter; /*!< Specifies the WWDG free-running downcounter value. 56 | This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7F */ 57 | 58 | uint32_t EWIMode ; /*!< Specifies if WWDG Early Wakeup Interrupt is enable or not. 59 | This parameter can be a value of @ref WWDG_EWI_Mode */ 60 | 61 | } WWDG_InitTypeDef; 62 | 63 | /** 64 | * @brief WWDG handle Structure definition 65 | */ 66 | #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) 67 | typedef struct __WWDG_HandleTypeDef 68 | #else 69 | typedef struct 70 | #endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */ 71 | { 72 | WWDG_TypeDef *Instance; /*!< Register base address */ 73 | 74 | WWDG_InitTypeDef Init; /*!< WWDG required parameters */ 75 | 76 | #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) 77 | void (* EwiCallback)(struct __WWDG_HandleTypeDef *hwwdg); /*!< WWDG Early WakeUp Interrupt callback */ 78 | 79 | void (* MspInitCallback)(struct __WWDG_HandleTypeDef *hwwdg); /*!< WWDG Msp Init callback */ 80 | #endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */ 81 | } WWDG_HandleTypeDef; 82 | 83 | #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) 84 | /** 85 | * @brief HAL WWDG common Callback ID enumeration definition 86 | */ 87 | typedef enum 88 | { 89 | HAL_WWDG_EWI_CB_ID = 0x00U, /*!< WWDG EWI callback ID */ 90 | HAL_WWDG_MSPINIT_CB_ID = 0x01U, /*!< WWDG MspInit callback ID */ 91 | } HAL_WWDG_CallbackIDTypeDef; 92 | 93 | /** 94 | * @brief HAL WWDG Callback pointer definition 95 | */ 96 | typedef void (*pWWDG_CallbackTypeDef)(WWDG_HandleTypeDef *hppp); /*!< pointer to a WWDG common callback functions */ 97 | 98 | #endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */ 99 | /** 100 | * @} 101 | */ 102 | 103 | /* Exported constants --------------------------------------------------------*/ 104 | 105 | /** @defgroup WWDG_Exported_Constants WWDG Exported Constants 106 | * @{ 107 | */ 108 | 109 | /** @defgroup WWDG_Interrupt_definition WWDG Interrupt definition 110 | * @{ 111 | */ 112 | #define WWDG_IT_EWI WWDG_CFR_EWI /*!< Early wakeup interrupt */ 113 | /** 114 | * @} 115 | */ 116 | 117 | /** @defgroup WWDG_Flag_definition WWDG Flag definition 118 | * @brief WWDG Flag definition 119 | * @{ 120 | */ 121 | #define WWDG_FLAG_EWIF WWDG_SR_EWIF /*!< Early wakeup interrupt flag */ 122 | /** 123 | * @} 124 | */ 125 | 126 | /** @defgroup WWDG_Prescaler WWDG Prescaler 127 | * @{ 128 | */ 129 | #define WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096)/1 */ 130 | #define WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */ 131 | #define WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */ 132 | #define WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_1 | WWDG_CFR_WDGTB_0) /*!< WWDG counter clock = (PCLK1/4096)/8 */ 133 | /** 134 | * @} 135 | */ 136 | 137 | /** @defgroup WWDG_EWI_Mode WWDG Early Wakeup Interrupt Mode 138 | * @{ 139 | */ 140 | #define WWDG_EWI_DISABLE 0x00000000u /*!< EWI Disable */ 141 | #define WWDG_EWI_ENABLE WWDG_CFR_EWI /*!< EWI Enable */ 142 | /** 143 | * @} 144 | */ 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | /* Private macros ------------------------------------------------------------*/ 151 | 152 | /** @defgroup WWDG_Private_Macros WWDG Private Macros 153 | * @{ 154 | */ 155 | #define IS_WWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == WWDG_PRESCALER_1) || \ 156 | ((__PRESCALER__) == WWDG_PRESCALER_2) || \ 157 | ((__PRESCALER__) == WWDG_PRESCALER_4) || \ 158 | ((__PRESCALER__) == WWDG_PRESCALER_8)) 159 | 160 | #define IS_WWDG_WINDOW(__WINDOW__) (((__WINDOW__) >= WWDG_CFR_W_6) && ((__WINDOW__) <= WWDG_CFR_W)) 161 | 162 | #define IS_WWDG_COUNTER(__COUNTER__) (((__COUNTER__) >= WWDG_CR_T_6) && ((__COUNTER__) <= WWDG_CR_T)) 163 | 164 | #define IS_WWDG_EWI_MODE(__MODE__) (((__MODE__) == WWDG_EWI_ENABLE) || \ 165 | ((__MODE__) == WWDG_EWI_DISABLE)) 166 | /** 167 | * @} 168 | */ 169 | 170 | 171 | /* Exported macros ------------------------------------------------------------*/ 172 | 173 | /** @defgroup WWDG_Exported_Macros WWDG Exported Macros 174 | * @{ 175 | */ 176 | 177 | /** 178 | * @brief Enable the WWDG peripheral. 179 | * @param __HANDLE__ WWDG handle 180 | * @retval None 181 | */ 182 | #define __HAL_WWDG_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, WWDG_CR_WDGA) 183 | 184 | /** 185 | * @brief Enable the WWDG early wakeup interrupt. 186 | * @param __HANDLE__: WWDG handle 187 | * @param __INTERRUPT__ specifies the interrupt to enable. 188 | * This parameter can be one of the following values: 189 | * @arg WWDG_IT_EWI: Early wakeup interrupt 190 | * @note Once enabled this interrupt cannot be disabled except by a system reset. 191 | * @retval None 192 | */ 193 | #define __HAL_WWDG_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFR, (__INTERRUPT__)) 194 | 195 | /** 196 | * @brief Check whether the selected WWDG interrupt has occurred or not. 197 | * @param __HANDLE__ WWDG handle 198 | * @param __INTERRUPT__ specifies the it to check. 199 | * This parameter can be one of the following values: 200 | * @arg WWDG_FLAG_EWIF: Early wakeup interrupt IT 201 | * @retval The new state of WWDG_FLAG (SET or RESET). 202 | */ 203 | #define __HAL_WWDG_GET_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_GET_FLAG((__HANDLE__),(__INTERRUPT__)) 204 | 205 | /** @brief Clear the WWDG interrupt pending bits. 206 | * bits to clear the selected interrupt pending bits. 207 | * @param __HANDLE__ WWDG handle 208 | * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 209 | * This parameter can be one of the following values: 210 | * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag 211 | */ 212 | #define __HAL_WWDG_CLEAR_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_CLEAR_FLAG((__HANDLE__), (__INTERRUPT__)) 213 | 214 | /** 215 | * @brief Check whether the specified WWDG flag is set or not. 216 | * @param __HANDLE__ WWDG handle 217 | * @param __FLAG__ specifies the flag to check. 218 | * This parameter can be one of the following values: 219 | * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag 220 | * @retval The new state of WWDG_FLAG (SET or RESET). 221 | */ 222 | #define __HAL_WWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) 223 | 224 | /** 225 | * @brief Clear the WWDG's pending flags. 226 | * @param __HANDLE__ WWDG handle 227 | * @param __FLAG__ specifies the flag to clear. 228 | * This parameter can be one of the following values: 229 | * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag 230 | * @retval None 231 | */ 232 | #define __HAL_WWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) 233 | 234 | /** @brief Check whether the specified WWDG interrupt source is enabled or not. 235 | * @param __HANDLE__ WWDG Handle. 236 | * @param __INTERRUPT__ specifies the WWDG interrupt source to check. 237 | * This parameter can be one of the following values: 238 | * @arg WWDG_IT_EWI: Early Wakeup Interrupt 239 | * @retval state of __INTERRUPT__ (TRUE or FALSE). 240 | */ 241 | #define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR\ 242 | & (__INTERRUPT__)) == (__INTERRUPT__)) 243 | 244 | /** 245 | * @} 246 | */ 247 | 248 | /* Exported functions --------------------------------------------------------*/ 249 | 250 | /** @addtogroup WWDG_Exported_Functions 251 | * @{ 252 | */ 253 | 254 | /** @addtogroup WWDG_Exported_Functions_Group1 255 | * @{ 256 | */ 257 | /* Initialization/de-initialization functions **********************************/ 258 | HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg); 259 | void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg); 260 | /* Callbacks Register/UnRegister functions ***********************************/ 261 | #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) 262 | HAL_StatusTypeDef HAL_WWDG_RegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID, 263 | pWWDG_CallbackTypeDef pCallback); 264 | HAL_StatusTypeDef HAL_WWDG_UnRegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID); 265 | #endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */ 266 | 267 | /** 268 | * @} 269 | */ 270 | 271 | /** @addtogroup WWDG_Exported_Functions_Group2 272 | * @{ 273 | */ 274 | /* I/O operation functions ******************************************************/ 275 | HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg); 276 | void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg); 277 | void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg); 278 | /** 279 | * @} 280 | */ 281 | 282 | /** 283 | * @} 284 | */ 285 | 286 | /** 287 | * @} 288 | */ 289 | 290 | /** 291 | * @} 292 | */ 293 | 294 | #ifdef __cplusplus 295 | } 296 | #endif 297 | 298 | #endif /* STM32F1xx_HAL_WWDG_H */ 299 | 300 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_ll_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_crc.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC LL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F1xx_LL_CRC_H 21 | #define STM32F1xx_LL_CRC_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f1xx.h" 29 | 30 | /** @addtogroup STM32F1xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined(CRC) 35 | 36 | /** @defgroup CRC_LL CRC 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | 45 | /* Exported types ------------------------------------------------------------*/ 46 | /* Exported constants --------------------------------------------------------*/ 47 | /** @defgroup CRC_LL_Exported_Constants CRC Exported Constants 48 | * @{ 49 | */ 50 | 51 | /** 52 | * @} 53 | */ 54 | 55 | /* Exported macro ------------------------------------------------------------*/ 56 | /** @defgroup CRC_LL_Exported_Macros CRC Exported Macros 57 | * @{ 58 | */ 59 | 60 | /** @defgroup CRC_LL_EM_WRITE_READ Common Write and read registers Macros 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @brief Write a value in CRC register 66 | * @param __INSTANCE__ CRC Instance 67 | * @param __REG__ Register to be written 68 | * @param __VALUE__ Value to be written in the register 69 | * @retval None 70 | */ 71 | #define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, __VALUE__) 72 | 73 | /** 74 | * @brief Read a value in CRC register 75 | * @param __INSTANCE__ CRC Instance 76 | * @param __REG__ Register to be read 77 | * @retval Register value 78 | */ 79 | #define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 80 | /** 81 | * @} 82 | */ 83 | 84 | /** 85 | * @} 86 | */ 87 | 88 | 89 | /* Exported functions --------------------------------------------------------*/ 90 | /** @defgroup CRC_LL_Exported_Functions CRC Exported Functions 91 | * @{ 92 | */ 93 | 94 | /** @defgroup CRC_LL_EF_Configuration CRC Configuration functions 95 | * @{ 96 | */ 97 | 98 | /** 99 | * @brief Reset the CRC calculation unit. 100 | * @note If Programmable Initial CRC value feature 101 | * is available, also set the Data Register to the value stored in the 102 | * CRC_INIT register, otherwise, reset Data Register to its default value. 103 | * @rmtoll CR RESET LL_CRC_ResetCRCCalculationUnit 104 | * @param CRCx CRC Instance 105 | * @retval None 106 | */ 107 | __STATIC_INLINE void LL_CRC_ResetCRCCalculationUnit(CRC_TypeDef *CRCx) 108 | { 109 | SET_BIT(CRCx->CR, CRC_CR_RESET); 110 | } 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /** @defgroup CRC_LL_EF_Data_Management Data_Management 117 | * @{ 118 | */ 119 | 120 | /** 121 | * @brief Write given 32-bit data to the CRC calculator 122 | * @rmtoll DR DR LL_CRC_FeedData32 123 | * @param CRCx CRC Instance 124 | * @param InData value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFFFFFF 125 | * @retval None 126 | */ 127 | __STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData) 128 | { 129 | WRITE_REG(CRCx->DR, InData); 130 | } 131 | 132 | /** 133 | * @brief Return current CRC calculation result. 32 bits value is returned. 134 | * @rmtoll DR DR LL_CRC_ReadData32 135 | * @param CRCx CRC Instance 136 | * @retval Current CRC calculation result as stored in CRC_DR register (32 bits). 137 | */ 138 | __STATIC_INLINE uint32_t LL_CRC_ReadData32(const CRC_TypeDef *CRCx) 139 | { 140 | return (uint32_t)(READ_REG(CRCx->DR)); 141 | } 142 | 143 | /** 144 | * @brief Return data stored in the Independent Data(IDR) register. 145 | * @note This register can be used as a temporary storage location for one byte. 146 | * @rmtoll IDR IDR LL_CRC_Read_IDR 147 | * @param CRCx CRC Instance 148 | * @retval Value stored in CRC_IDR register (General-purpose 8-bit data register). 149 | */ 150 | __STATIC_INLINE uint32_t LL_CRC_Read_IDR(CRC_TypeDef *CRCx) 151 | { 152 | return (uint32_t)(READ_REG(CRCx->IDR)); 153 | } 154 | 155 | /** 156 | * @brief Store data in the Independent Data(IDR) register. 157 | * @note This register can be used as a temporary storage location for one byte. 158 | * @rmtoll IDR IDR LL_CRC_Write_IDR 159 | * @param CRCx CRC Instance 160 | * @param InData value to be stored in CRC_IDR register (8-bit) between Min_Data=0 and Max_Data=0xFF 161 | * @retval None 162 | */ 163 | __STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData) 164 | { 165 | *((uint8_t __IO *)(&CRCx->IDR)) = (uint8_t) InData; 166 | } 167 | /** 168 | * @} 169 | */ 170 | 171 | #if defined(USE_FULL_LL_DRIVER) 172 | /** @defgroup CRC_LL_EF_Init Initialization and de-initialization functions 173 | * @{ 174 | */ 175 | 176 | ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx); 177 | 178 | /** 179 | * @} 180 | */ 181 | #endif /* USE_FULL_LL_DRIVER */ 182 | 183 | /** 184 | * @} 185 | */ 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | #endif /* defined(CRC) */ 192 | 193 | /** 194 | * @} 195 | */ 196 | 197 | #ifdef __cplusplus 198 | } 199 | #endif 200 | 201 | #endif /* STM32F1xx_LL_CRC_H */ 202 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_ll_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_iwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of IWDG LL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F1xx_LL_IWDG_H 21 | #define STM32F1xx_LL_IWDG_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f1xx.h" 29 | 30 | /** @addtogroup STM32F1xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined(IWDG) 35 | 36 | /** @defgroup IWDG_LL IWDG 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | 43 | /* Private constants ---------------------------------------------------------*/ 44 | /** @defgroup IWDG_LL_Private_Constants IWDG Private Constants 45 | * @{ 46 | */ 47 | #define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ 48 | #define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ 49 | #define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ 50 | #define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ 51 | /** 52 | * @} 53 | */ 54 | 55 | /* Private macros ------------------------------------------------------------*/ 56 | 57 | /* Exported types ------------------------------------------------------------*/ 58 | /* Exported constants --------------------------------------------------------*/ 59 | /** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants 60 | * @{ 61 | */ 62 | 63 | /** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines 64 | * @brief Flags defines which can be used with LL_IWDG_ReadReg function 65 | * @{ 66 | */ 67 | #define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */ 68 | #define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */ 69 | /** 70 | * @} 71 | */ 72 | 73 | /** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider 74 | * @{ 75 | */ 76 | #define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */ 77 | #define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */ 78 | #define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */ 79 | #define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */ 80 | #define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */ 81 | #define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */ 82 | #define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */ 83 | /** 84 | * @} 85 | */ 86 | 87 | /** 88 | * @} 89 | */ 90 | 91 | /* Exported macro ------------------------------------------------------------*/ 92 | /** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros 93 | * @{ 94 | */ 95 | 96 | /** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros 97 | * @{ 98 | */ 99 | 100 | /** 101 | * @brief Write a value in IWDG register 102 | * @param __INSTANCE__ IWDG Instance 103 | * @param __REG__ Register to be written 104 | * @param __VALUE__ Value to be written in the register 105 | * @retval None 106 | */ 107 | #define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 108 | 109 | /** 110 | * @brief Read a value in IWDG register 111 | * @param __INSTANCE__ IWDG Instance 112 | * @param __REG__ Register to be read 113 | * @retval Register value 114 | */ 115 | #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 116 | /** 117 | * @} 118 | */ 119 | 120 | /** 121 | * @} 122 | */ 123 | 124 | 125 | /* Exported functions --------------------------------------------------------*/ 126 | /** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions 127 | * @{ 128 | */ 129 | /** @defgroup IWDG_LL_EF_Configuration Configuration 130 | * @{ 131 | */ 132 | 133 | /** 134 | * @brief Start the Independent Watchdog 135 | * @note Except if the hardware watchdog option is selected 136 | * @rmtoll KR KEY LL_IWDG_Enable 137 | * @param IWDGx IWDG Instance 138 | * @retval None 139 | */ 140 | __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx) 141 | { 142 | WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE); 143 | } 144 | 145 | /** 146 | * @brief Reloads IWDG counter with value defined in the reload register 147 | * @rmtoll KR KEY LL_IWDG_ReloadCounter 148 | * @param IWDGx IWDG Instance 149 | * @retval None 150 | */ 151 | __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx) 152 | { 153 | WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD); 154 | } 155 | 156 | /** 157 | * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers 158 | * @rmtoll KR KEY LL_IWDG_EnableWriteAccess 159 | * @param IWDGx IWDG Instance 160 | * @retval None 161 | */ 162 | __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx) 163 | { 164 | WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE); 165 | } 166 | 167 | /** 168 | * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers 169 | * @rmtoll KR KEY LL_IWDG_DisableWriteAccess 170 | * @param IWDGx IWDG Instance 171 | * @retval None 172 | */ 173 | __STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx) 174 | { 175 | WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE); 176 | } 177 | 178 | /** 179 | * @brief Select the prescaler of the IWDG 180 | * @rmtoll PR PR LL_IWDG_SetPrescaler 181 | * @param IWDGx IWDG Instance 182 | * @param Prescaler This parameter can be one of the following values: 183 | * @arg @ref LL_IWDG_PRESCALER_4 184 | * @arg @ref LL_IWDG_PRESCALER_8 185 | * @arg @ref LL_IWDG_PRESCALER_16 186 | * @arg @ref LL_IWDG_PRESCALER_32 187 | * @arg @ref LL_IWDG_PRESCALER_64 188 | * @arg @ref LL_IWDG_PRESCALER_128 189 | * @arg @ref LL_IWDG_PRESCALER_256 190 | * @retval None 191 | */ 192 | __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler) 193 | { 194 | WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler); 195 | } 196 | 197 | /** 198 | * @brief Get the selected prescaler of the IWDG 199 | * @rmtoll PR PR LL_IWDG_GetPrescaler 200 | * @param IWDGx IWDG Instance 201 | * @retval Returned value can be one of the following values: 202 | * @arg @ref LL_IWDG_PRESCALER_4 203 | * @arg @ref LL_IWDG_PRESCALER_8 204 | * @arg @ref LL_IWDG_PRESCALER_16 205 | * @arg @ref LL_IWDG_PRESCALER_32 206 | * @arg @ref LL_IWDG_PRESCALER_64 207 | * @arg @ref LL_IWDG_PRESCALER_128 208 | * @arg @ref LL_IWDG_PRESCALER_256 209 | */ 210 | __STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx) 211 | { 212 | return (READ_REG(IWDGx->PR)); 213 | } 214 | 215 | /** 216 | * @brief Specify the IWDG down-counter reload value 217 | * @rmtoll RLR RL LL_IWDG_SetReloadCounter 218 | * @param IWDGx IWDG Instance 219 | * @param Counter Value between Min_Data=0 and Max_Data=0x0FFF 220 | * @retval None 221 | */ 222 | __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter) 223 | { 224 | WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter); 225 | } 226 | 227 | /** 228 | * @brief Get the specified IWDG down-counter reload value 229 | * @rmtoll RLR RL LL_IWDG_GetReloadCounter 230 | * @param IWDGx IWDG Instance 231 | * @retval Value between Min_Data=0 and Max_Data=0x0FFF 232 | */ 233 | __STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx) 234 | { 235 | return (READ_REG(IWDGx->RLR)); 236 | } 237 | 238 | /** 239 | * @} 240 | */ 241 | 242 | /** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management 243 | * @{ 244 | */ 245 | 246 | /** 247 | * @brief Check if flag Prescaler Value Update is set or not 248 | * @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU 249 | * @param IWDGx IWDG Instance 250 | * @retval State of bit (1 or 0). 251 | */ 252 | __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx) 253 | { 254 | return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL); 255 | } 256 | 257 | /** 258 | * @brief Check if flag Reload Value Update is set or not 259 | * @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU 260 | * @param IWDGx IWDG Instance 261 | * @retval State of bit (1 or 0). 262 | */ 263 | __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx) 264 | { 265 | return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL); 266 | } 267 | 268 | /** 269 | * @brief Check if flags Prescaler & Reload Value Update are reset or not 270 | * @rmtoll SR PVU LL_IWDG_IsReady\n 271 | * SR RVU LL_IWDG_IsReady 272 | * @param IWDGx IWDG Instance 273 | * @retval State of bits (1 or 0). 274 | */ 275 | __STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx) 276 | { 277 | return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU) == 0U) ? 1UL : 0UL); 278 | } 279 | 280 | /** 281 | * @} 282 | */ 283 | 284 | /** 285 | * @} 286 | */ 287 | 288 | /** 289 | * @} 290 | */ 291 | 292 | #endif /* IWDG */ 293 | 294 | /** 295 | * @} 296 | */ 297 | 298 | #ifdef __cplusplus 299 | } 300 | #endif 301 | 302 | #endif /* STM32F1xx_LL_IWDG_H */ 303 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_ll_utils.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_utils.h 4 | * @author MCD Application Team 5 | * @brief Header file of UTILS LL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | @verbatim 18 | ============================================================================== 19 | ##### How to use this driver ##### 20 | ============================================================================== 21 | [..] 22 | The LL UTILS driver contains a set of generic APIs that can be 23 | used by user: 24 | (+) Device electronic signature 25 | (+) Timing functions 26 | (+) PLL configuration functions 27 | 28 | @endverbatim 29 | ****************************************************************************** 30 | */ 31 | 32 | /* Define to prevent recursive inclusion -------------------------------------*/ 33 | #ifndef __STM32F1xx_LL_UTILS_H 34 | #define __STM32F1xx_LL_UTILS_H 35 | 36 | #ifdef __cplusplus 37 | extern "C" { 38 | #endif 39 | 40 | /* Includes ------------------------------------------------------------------*/ 41 | #include "stm32f1xx.h" 42 | 43 | /** @addtogroup STM32F1xx_LL_Driver 44 | * @{ 45 | */ 46 | 47 | /** @defgroup UTILS_LL UTILS 48 | * @{ 49 | */ 50 | 51 | /* Private types -------------------------------------------------------------*/ 52 | /* Private variables ---------------------------------------------------------*/ 53 | 54 | /* Private constants ---------------------------------------------------------*/ 55 | /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants 56 | * @{ 57 | */ 58 | 59 | /* Max delay can be used in LL_mDelay */ 60 | #define LL_MAX_DELAY 0xFFFFFFFFU 61 | 62 | /** 63 | * @brief Unique device ID register base address 64 | */ 65 | #define UID_BASE_ADDRESS UID_BASE 66 | 67 | /** 68 | * @brief Flash size data register base address 69 | */ 70 | #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /* Private macros ------------------------------------------------------------*/ 77 | /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros 78 | * @{ 79 | */ 80 | /** 81 | * @} 82 | */ 83 | /* Exported types ------------------------------------------------------------*/ 84 | /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures 85 | * @{ 86 | */ 87 | /** 88 | * @brief UTILS PLL structure definition 89 | */ 90 | typedef struct 91 | { 92 | uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock. 93 | This parameter can be a value of @ref RCC_LL_EC_PLL_MUL 94 | 95 | This feature can be modified afterwards using unitary function 96 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ 97 | 98 | uint32_t Prediv; /*!< Division factor for HSE used as PLL clock source. 99 | This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV 100 | 101 | This feature can be modified afterwards using unitary function 102 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ 103 | } LL_UTILS_PLLInitTypeDef; 104 | 105 | /** 106 | * @brief UTILS System, AHB and APB buses clock configuration structure definition 107 | */ 108 | typedef struct 109 | { 110 | uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK). 111 | This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV 112 | 113 | This feature can be modified afterwards using unitary function 114 | @ref LL_RCC_SetAHBPrescaler(). */ 115 | 116 | uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK). 117 | This parameter can be a value of @ref RCC_LL_EC_APB1_DIV 118 | 119 | This feature can be modified afterwards using unitary function 120 | @ref LL_RCC_SetAPB1Prescaler(). */ 121 | 122 | uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK). 123 | This parameter can be a value of @ref RCC_LL_EC_APB2_DIV 124 | 125 | This feature can be modified afterwards using unitary function 126 | @ref LL_RCC_SetAPB2Prescaler(). */ 127 | 128 | } LL_UTILS_ClkInitTypeDef; 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | /* Exported constants --------------------------------------------------------*/ 135 | /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants 136 | * @{ 137 | */ 138 | 139 | /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation 140 | * @{ 141 | */ 142 | #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */ 143 | #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */ 144 | /** 145 | * @} 146 | */ 147 | 148 | /** 149 | * @} 150 | */ 151 | 152 | /* Exported macro ------------------------------------------------------------*/ 153 | 154 | /* Exported functions --------------------------------------------------------*/ 155 | /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions 156 | * @{ 157 | */ 158 | 159 | /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE 160 | * @{ 161 | */ 162 | 163 | /** 164 | * @brief Get Word0 of the unique device identifier (UID based on 96 bits) 165 | * @retval UID[31:0] 166 | */ 167 | __STATIC_INLINE uint32_t LL_GetUID_Word0(void) 168 | { 169 | return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS))); 170 | } 171 | 172 | /** 173 | * @brief Get Word1 of the unique device identifier (UID based on 96 bits) 174 | * @retval UID[63:32] 175 | */ 176 | __STATIC_INLINE uint32_t LL_GetUID_Word1(void) 177 | { 178 | return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U)))); 179 | } 180 | 181 | /** 182 | * @brief Get Word2 of the unique device identifier (UID based on 96 bits) 183 | * @retval UID[95:64] 184 | */ 185 | __STATIC_INLINE uint32_t LL_GetUID_Word2(void) 186 | { 187 | return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U)))); 188 | } 189 | 190 | /** 191 | * @brief Get Flash memory size 192 | * @note This bitfield indicates the size of the device Flash memory expressed in 193 | * Kbytes. As an example, 0x040 corresponds to 64 Kbytes. 194 | * @retval FLASH_SIZE[15:0]: Flash memory size 195 | */ 196 | __STATIC_INLINE uint32_t LL_GetFlashSize(void) 197 | { 198 | return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS))); 199 | } 200 | 201 | 202 | /** 203 | * @} 204 | */ 205 | 206 | /** @defgroup UTILS_LL_EF_DELAY DELAY 207 | * @{ 208 | */ 209 | 210 | /** 211 | * @brief This function configures the Cortex-M SysTick source of the time base. 212 | * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) 213 | * @note When a RTOS is used, it is recommended to avoid changing the SysTick 214 | * configuration by calling this function, for a delay use rather osDelay RTOS service. 215 | * @param Ticks Frequency of Ticks (Hz) 216 | * @retval None 217 | */ 218 | __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) 219 | { 220 | /* Configure the SysTick to have interrupt in 1ms time base */ 221 | SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ 222 | SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 223 | SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 224 | SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ 225 | } 226 | 227 | void LL_Init1msTick(uint32_t HCLKFrequency); 228 | void LL_mDelay(uint32_t Delay); 229 | 230 | /** 231 | * @} 232 | */ 233 | 234 | /** @defgroup UTILS_EF_SYSTEM SYSTEM 235 | * @{ 236 | */ 237 | 238 | void LL_SetSystemCoreClock(uint32_t HCLKFrequency); 239 | #if defined(FLASH_ACR_LATENCY) 240 | ErrorStatus LL_SetFlashLatency(uint32_t Frequency); 241 | #endif /* FLASH_ACR_LATENCY */ 242 | ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, 243 | LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); 244 | ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass, 245 | LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); 246 | #if defined(RCC_PLL2_SUPPORT) 247 | ErrorStatus LL_PLL_ConfigSystemClock_PLL2(uint32_t HSEFrequency, uint32_t HSEBypass, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, 248 | LL_UTILS_PLLInitTypeDef *UTILS_PLL2InitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); 249 | #endif /* RCC_PLL2_SUPPORT */ 250 | /** 251 | * @} 252 | */ 253 | 254 | /** 255 | * @} 256 | */ 257 | 258 | /** 259 | * @} 260 | */ 261 | 262 | /** 263 | * @} 264 | */ 265 | 266 | #ifdef __cplusplus 267 | } 268 | #endif 269 | 270 | #endif /* __STM32F1xx_LL_UTILS_H */ 271 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_ll_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_wwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of WWDG LL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F1xx_LL_WWDG_H 21 | #define STM32F1xx_LL_WWDG_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f1xx.h" 29 | 30 | /** @addtogroup STM32F1xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (WWDG) 35 | 36 | /** @defgroup WWDG_LL WWDG 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /* Exported types ------------------------------------------------------------*/ 45 | /* Exported constants --------------------------------------------------------*/ 46 | /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants 47 | * @{ 48 | */ 49 | 50 | /** @defgroup WWDG_LL_EC_IT IT Defines 51 | * @brief IT defines which can be used with LL_WWDG_ReadReg and LL_WWDG_WriteReg functions 52 | * @{ 53 | */ 54 | #define LL_WWDG_CFR_EWI WWDG_CFR_EWI 55 | /** 56 | * @} 57 | */ 58 | 59 | /** @defgroup WWDG_LL_EC_PRESCALER PRESCALER 60 | * @{ 61 | */ 62 | #define LL_WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096)/1 */ 63 | #define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */ 64 | #define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */ 65 | #define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */ 66 | /** 67 | * @} 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /* Exported macro ------------------------------------------------------------*/ 75 | /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros 76 | * @{ 77 | */ 78 | /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros 79 | * @{ 80 | */ 81 | /** 82 | * @brief Write a value in WWDG register 83 | * @param __INSTANCE__ WWDG Instance 84 | * @param __REG__ Register to be written 85 | * @param __VALUE__ Value to be written in the register 86 | * @retval None 87 | */ 88 | #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 89 | 90 | /** 91 | * @brief Read a value in WWDG register 92 | * @param __INSTANCE__ WWDG Instance 93 | * @param __REG__ Register to be read 94 | * @retval Register value 95 | */ 96 | #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 97 | /** 98 | * @} 99 | */ 100 | 101 | /** 102 | * @} 103 | */ 104 | 105 | /* Exported functions --------------------------------------------------------*/ 106 | /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions 107 | * @{ 108 | */ 109 | 110 | /** @defgroup WWDG_LL_EF_Configuration Configuration 111 | * @{ 112 | */ 113 | /** 114 | * @brief Enable Window Watchdog. The watchdog is always disabled after a reset. 115 | * @note It is enabled by setting the WDGA bit in the WWDG_CR register, 116 | * then it cannot be disabled again except by a reset. 117 | * This bit is set by software and only cleared by hardware after a reset. 118 | * When WDGA = 1, the watchdog can generate a reset. 119 | * @rmtoll CR WDGA LL_WWDG_Enable 120 | * @param WWDGx WWDG Instance 121 | * @retval None 122 | */ 123 | __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx) 124 | { 125 | SET_BIT(WWDGx->CR, WWDG_CR_WDGA); 126 | } 127 | 128 | /** 129 | * @brief Checks if Window Watchdog is enabled 130 | * @rmtoll CR WDGA LL_WWDG_IsEnabled 131 | * @param WWDGx WWDG Instance 132 | * @retval State of bit (1 or 0). 133 | */ 134 | __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(const WWDG_TypeDef *WWDGx) 135 | { 136 | return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); 137 | } 138 | 139 | /** 140 | * @brief Set the Watchdog counter value to provided value (7-bits T[6:0]) 141 | * @note When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset 142 | * This counter is decremented every (4096 x 2expWDGTB) PCLK cycles 143 | * A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared) 144 | * Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled) 145 | * @rmtoll CR T LL_WWDG_SetCounter 146 | * @param WWDGx WWDG Instance 147 | * @param Counter 0..0x7F (7 bit counter value) 148 | * @retval None 149 | */ 150 | __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter) 151 | { 152 | MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter); 153 | } 154 | 155 | /** 156 | * @brief Return current Watchdog Counter Value (7 bits counter value) 157 | * @rmtoll CR T LL_WWDG_GetCounter 158 | * @param WWDGx WWDG Instance 159 | * @retval 7 bit Watchdog Counter value 160 | */ 161 | __STATIC_INLINE uint32_t LL_WWDG_GetCounter(const WWDG_TypeDef *WWDGx) 162 | { 163 | return (READ_BIT(WWDGx->CR, WWDG_CR_T)); 164 | } 165 | 166 | /** 167 | * @brief Set the time base of the prescaler (WDGTB). 168 | * @note Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter 169 | * is decremented every (4096 x 2expWDGTB) PCLK cycles 170 | * @rmtoll CFR WDGTB LL_WWDG_SetPrescaler 171 | * @param WWDGx WWDG Instance 172 | * @param Prescaler This parameter can be one of the following values: 173 | * @arg @ref LL_WWDG_PRESCALER_1 174 | * @arg @ref LL_WWDG_PRESCALER_2 175 | * @arg @ref LL_WWDG_PRESCALER_4 176 | * @arg @ref LL_WWDG_PRESCALER_8 177 | * @retval None 178 | */ 179 | __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler) 180 | { 181 | MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler); 182 | } 183 | 184 | /** 185 | * @brief Return current Watchdog Prescaler Value 186 | * @rmtoll CFR WDGTB LL_WWDG_GetPrescaler 187 | * @param WWDGx WWDG Instance 188 | * @retval Returned value can be one of the following values: 189 | * @arg @ref LL_WWDG_PRESCALER_1 190 | * @arg @ref LL_WWDG_PRESCALER_2 191 | * @arg @ref LL_WWDG_PRESCALER_4 192 | * @arg @ref LL_WWDG_PRESCALER_8 193 | */ 194 | __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(const WWDG_TypeDef *WWDGx) 195 | { 196 | return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); 197 | } 198 | 199 | /** 200 | * @brief Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]). 201 | * @note This window value defines when write in the WWDG_CR register 202 | * to program Watchdog counter is allowed. 203 | * Watchdog counter value update must occur only when the counter value 204 | * is lower than the Watchdog window register value. 205 | * Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value 206 | * (in the control register) is refreshed before the downcounter has reached 207 | * the watchdog window register value. 208 | * Physically is possible to set the Window lower then 0x40 but it is not recommended. 209 | * To generate an immediate reset, it is possible to set the Counter lower than 0x40. 210 | * @rmtoll CFR W LL_WWDG_SetWindow 211 | * @param WWDGx WWDG Instance 212 | * @param Window 0x00..0x7F (7 bit Window value) 213 | * @retval None 214 | */ 215 | __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window) 216 | { 217 | MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window); 218 | } 219 | 220 | /** 221 | * @brief Return current Watchdog Window Value (7 bits value) 222 | * @rmtoll CFR W LL_WWDG_GetWindow 223 | * @param WWDGx WWDG Instance 224 | * @retval 7 bit Watchdog Window value 225 | */ 226 | __STATIC_INLINE uint32_t LL_WWDG_GetWindow(const WWDG_TypeDef *WWDGx) 227 | { 228 | return (READ_BIT(WWDGx->CFR, WWDG_CFR_W)); 229 | } 230 | 231 | /** 232 | * @} 233 | */ 234 | 235 | /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management 236 | * @{ 237 | */ 238 | /** 239 | * @brief Indicates if the WWDG Early Wakeup Interrupt Flag is set or not. 240 | * @note This bit is set by hardware when the counter has reached the value 0x40. 241 | * It must be cleared by software by writing 0. 242 | * A write of 1 has no effect. This bit is also set if the interrupt is not enabled. 243 | * @rmtoll SR EWIF LL_WWDG_IsActiveFlag_EWKUP 244 | * @param WWDGx WWDG Instance 245 | * @retval State of bit (1 or 0). 246 | */ 247 | __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(const WWDG_TypeDef *WWDGx) 248 | { 249 | return ((READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)) ? 1UL : 0UL); 250 | } 251 | 252 | /** 253 | * @brief Clear WWDG Early Wakeup Interrupt Flag (EWIF) 254 | * @rmtoll SR EWIF LL_WWDG_ClearFlag_EWKUP 255 | * @param WWDGx WWDG Instance 256 | * @retval None 257 | */ 258 | __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx) 259 | { 260 | WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF); 261 | } 262 | 263 | /** 264 | * @} 265 | */ 266 | 267 | /** @defgroup WWDG_LL_EF_IT_Management IT_Management 268 | * @{ 269 | */ 270 | /** 271 | * @brief Enable the Early Wakeup Interrupt. 272 | * @note When set, an interrupt occurs whenever the counter reaches value 0x40. 273 | * This interrupt is only cleared by hardware after a reset 274 | * @rmtoll CFR EWI LL_WWDG_EnableIT_EWKUP 275 | * @param WWDGx WWDG Instance 276 | * @retval None 277 | */ 278 | __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx) 279 | { 280 | SET_BIT(WWDGx->CFR, WWDG_CFR_EWI); 281 | } 282 | 283 | /** 284 | * @brief Check if Early Wakeup Interrupt is enabled 285 | * @rmtoll CFR EWI LL_WWDG_IsEnabledIT_EWKUP 286 | * @param WWDGx WWDG Instance 287 | * @retval State of bit (1 or 0). 288 | */ 289 | __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(const WWDG_TypeDef *WWDGx) 290 | { 291 | return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL); 292 | } 293 | 294 | /** 295 | * @} 296 | */ 297 | 298 | /** 299 | * @} 300 | */ 301 | 302 | /** 303 | * @} 304 | */ 305 | 306 | #endif /* WWDG */ 307 | 308 | /** 309 | * @} 310 | */ 311 | 312 | #ifdef __cplusplus 313 | } 314 | #endif 315 | 316 | #endif /* STM32F1xx_LL_WWDG_H */ 317 | -------------------------------------------------------------------------------- /LICENSE.md: -------------------------------------------------------------------------------- 1 | Copyright 2016 STMicroelectronics. 2 | All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without modification, 5 | are permitted provided that the following conditions are met: 6 | 7 | 1. Redistributions of source code must retain the above copyright notice, this 8 | list of conditions and the following disclaimer. 9 | 10 | 2. Redistributions in binary form must reproduce the above copyright notice, 11 | this list of conditions and the following disclaimer in the documentation and/or 12 | other materials provided with the distribution. 13 | 14 | 3. Neither the name of the copyright holder nor the names of its contributors 15 | may be used to endorse or promote products derived from this software without 16 | specific prior written permission. 17 | 18 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # STM32CubeF1 HAL Driver MCU Component 2 | 3 | ![latest tag](https://img.shields.io/github/v/tag/STMicroelectronics/stm32f1xx_hal_driver.svg?color=brightgreen) 4 | 5 | ## Overview 6 | 7 | **STM32Cube** is an STMicroelectronics original initiative to ease the developers' life by reducing efforts, time and cost. 8 | 9 | **STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform, delivered for each STM32 series. 10 | * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product. 11 | * The STM32 HAL-LL drivers, an abstraction layer offering a set of APIs ensuring maximized portability across the STM32 portfolio. 12 | * The BSP drivers of each evaluation, demonstration or nucleo board provided for this STM32 series. 13 | * A consistent set of middleware libraries such as RTOS, USB, FatFS, graphics, touch sensing library... 14 | * A full set of software projects (basic examples, applications, and demonstrations) for each board provided for this STM32 series. 15 | 16 | Two models of publication are proposed for the STM32Cube embedded software: 17 | * The monolithic **MCU Package**: all STM32Cube software modules of one STM32 series are present (Drivers, Middleware, Projects, Utilities) in the repository (usual name **STM32Cubexx**, xx corresponding to the STM32 series). 18 | * The **MCU component**: each STM32Cube software module being part of the STM32Cube MCU Package, is delivered as an individual repository, allowing the user to select and get only the required software functions. 19 | 20 | ## Description 21 | 22 | This **stm32f1xx_hal_driver** MCU component repo is one element of the STM32CubeF1 MCU embedded software package, providing the **HAL-LL Drivers** part. 23 | 24 | ## Release note 25 | 26 | Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/stm32f1xx_hal_driver/blob/master/Release_Notes.html). 27 | 28 | ## Compatibility information 29 | 30 | In this table, you can find the successive versions of this HAL-LL Driver component, in line with the corresponding versions of the full MCU package: 31 | 32 | It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in this table. 33 | 34 | HAL Driver F1 | CMSIS Device F1 | CMSIS Core | Was delivered in the full MCU package 35 | ------------- | --------------- | ---------- | ------------------------------------- 36 | Tag v1.1.4 | Tag v4.3.1 | Tag v5.4.0_cm3 | Tag v1.8.0 (and following, if any, till next HAL tag) 37 | Tag v1.1.5 | Tag v4.3.1 | Tag v5.4.0_cm3 | Tag v1.8.1 (and following, if any, till next HAL tag) 38 | Tag v1.1.6 | Tag v4.3.2 | Tag v5.4.0_cm3 | Tag v1.8.2 (and following, if any, till next HAL tag) 39 | Tag v1.1.8 | Tag v4.3.2 | Tag v5.4.0_cm3 | Tag v1.8.3 (and following, if any, till next HAL tag) 40 | Tag v1.1.8 | Tag v4.3.3 | Tag v5.4.0_cm3 | Tag v1.8.4 (and following, if any, till next HAL tag) 41 | 42 | The full **STM32CubeF1** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF1). 43 | 44 | ## Troubleshooting 45 | 46 | Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide. 47 | -------------------------------------------------------------------------------- /SECURITY.md: -------------------------------------------------------------------------------- 1 | # Report potential product security vulnerabilities 2 | 3 | ST places a high priority on security, and our Product Security Incident 4 | Response Team (PSIRT) is committed to rapidly addressing potential security 5 | vulnerabilities affecting our products. PSIRT's long history and vast experience 6 | in security allows ST to perform clear analyses and provide appropriate guidance 7 | on mitigations and solutions when applicable. 8 | 9 | If you wish to report potential security vulnerabilities regarding our products, 10 | **please do not report them through public GitHub issues.** Instead, we 11 | encourage you to report them to our ST PSIRT following the process described at: 12 | **https://www.st.com/content/st_com/en/security/report-vulnerabilities.html** 13 | 14 | ### IMPORTANT - READ CAREFULLY: 15 | 16 | STMicroelectronics International N.V., on behalf of itself, its affiliates and 17 | subsidiaries, (collectively “ST”) takes all potential security vulnerability 18 | reports or other related communications (“Report(s)”) seriously. In order to 19 | review Your Report (the terms “You” and “Yours” include your employer, and all 20 | affiliates, subsidiaries and related persons or entities) and take actions as 21 | deemed appropriate, ST requires that we have the rights and Your permission to 22 | do so. 23 | 24 | As such, by submitting Your Report to ST, You agree that You have the right to 25 | do so, and You grant to ST the rights to use the Report for purposes related to 26 | security vulnerability analysis, testing, correction, patching, reporting and 27 | any other related purpose or function. 28 | 29 | By submitting Your Report, You agree that ST’s 30 | [Privacy Policy](https://www.st.com/content/st_com/en/common/privacy-portal.html) 31 | applies to all related communications. 32 | -------------------------------------------------------------------------------- /Src/stm32f1xx_hal_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_crc.c 4 | * @author MCD Application Team 5 | * @brief CRC HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the Cyclic Redundancy Check (CRC) peripheral: 8 | * + Initialization and de-initialization functions 9 | * + Peripheral Control functions 10 | * + Peripheral State functions 11 | * 12 | ****************************************************************************** 13 | * @attention 14 | * 15 | * Copyright (c) 2016 STMicroelectronics. 16 | * All rights reserved. 17 | * 18 | * This software is licensed under terms that can be found in the LICENSE file 19 | * in the root directory of this software component. 20 | * If no LICENSE file comes with this software, it is provided AS-IS. 21 | * 22 | ****************************************************************************** 23 | @verbatim 24 | =============================================================================== 25 | ##### How to use this driver ##### 26 | =============================================================================== 27 | [..] 28 | (+) Enable CRC AHB clock using __HAL_RCC_CRC_CLK_ENABLE(); 29 | (+) Initialize CRC calculator 30 | (++) specify generating polynomial (peripheral default or non-default one) 31 | (++) specify initialization value (peripheral default or non-default one) 32 | (++) specify input data format 33 | (++) specify input or output data inversion mode if any 34 | (+) Use HAL_CRC_Accumulate() function to compute the CRC value of the 35 | input data buffer starting with the previously computed CRC as 36 | initialization value 37 | (+) Use HAL_CRC_Calculate() function to compute the CRC value of the 38 | input data buffer starting with the defined initialization value 39 | (default or non-default) to initiate CRC calculation 40 | 41 | @endverbatim 42 | ****************************************************************************** 43 | */ 44 | 45 | /* Includes ------------------------------------------------------------------*/ 46 | #include "stm32f1xx_hal.h" 47 | 48 | /** @addtogroup STM32F1xx_HAL_Driver 49 | * @{ 50 | */ 51 | 52 | /** @defgroup CRC CRC 53 | * @brief CRC HAL module driver. 54 | * @{ 55 | */ 56 | 57 | #ifdef HAL_CRC_MODULE_ENABLED 58 | 59 | /* Private typedef -----------------------------------------------------------*/ 60 | /* Private define ------------------------------------------------------------*/ 61 | /* Private macro -------------------------------------------------------------*/ 62 | /* Private variables ---------------------------------------------------------*/ 63 | /* Private function prototypes -----------------------------------------------*/ 64 | 65 | /* Exported functions --------------------------------------------------------*/ 66 | 67 | /** @defgroup CRC_Exported_Functions CRC Exported Functions 68 | * @{ 69 | */ 70 | 71 | /** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions 72 | * @brief Initialization and Configuration functions. 73 | * 74 | @verbatim 75 | =============================================================================== 76 | ##### Initialization and de-initialization functions ##### 77 | =============================================================================== 78 | [..] This section provides functions allowing to: 79 | (+) Initialize the CRC according to the specified parameters 80 | in the CRC_InitTypeDef and create the associated handle 81 | (+) DeInitialize the CRC peripheral 82 | (+) Initialize the CRC MSP (MCU Specific Package) 83 | (+) DeInitialize the CRC MSP 84 | 85 | @endverbatim 86 | * @{ 87 | */ 88 | 89 | /** 90 | * @brief Initialize the CRC according to the specified 91 | * parameters in the CRC_InitTypeDef and create the associated handle. 92 | * @param hcrc CRC handle 93 | * @retval HAL status 94 | */ 95 | HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) 96 | { 97 | /* Check the CRC handle allocation */ 98 | if (hcrc == NULL) 99 | { 100 | return HAL_ERROR; 101 | } 102 | 103 | /* Check the parameters */ 104 | assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance)); 105 | 106 | if (hcrc->State == HAL_CRC_STATE_RESET) 107 | { 108 | /* Allocate lock resource and initialize it */ 109 | hcrc->Lock = HAL_UNLOCKED; 110 | /* Init the low level hardware */ 111 | HAL_CRC_MspInit(hcrc); 112 | } 113 | 114 | /* Change CRC peripheral state */ 115 | hcrc->State = HAL_CRC_STATE_READY; 116 | 117 | /* Return function status */ 118 | return HAL_OK; 119 | } 120 | 121 | /** 122 | * @brief DeInitialize the CRC peripheral. 123 | * @param hcrc CRC handle 124 | * @retval HAL status 125 | */ 126 | HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc) 127 | { 128 | /* Check the CRC handle allocation */ 129 | if (hcrc == NULL) 130 | { 131 | return HAL_ERROR; 132 | } 133 | 134 | /* Check the parameters */ 135 | assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance)); 136 | 137 | /* Check the CRC peripheral state */ 138 | if (hcrc->State == HAL_CRC_STATE_BUSY) 139 | { 140 | return HAL_BUSY; 141 | } 142 | 143 | /* Change CRC peripheral state */ 144 | hcrc->State = HAL_CRC_STATE_BUSY; 145 | 146 | /* Reset CRC calculation unit */ 147 | __HAL_CRC_DR_RESET(hcrc); 148 | 149 | /* Reset IDR register content */ 150 | __HAL_CRC_SET_IDR(hcrc, 0); 151 | 152 | /* DeInit the low level hardware */ 153 | HAL_CRC_MspDeInit(hcrc); 154 | 155 | /* Change CRC peripheral state */ 156 | hcrc->State = HAL_CRC_STATE_RESET; 157 | 158 | /* Process unlocked */ 159 | __HAL_UNLOCK(hcrc); 160 | 161 | /* Return function status */ 162 | return HAL_OK; 163 | } 164 | 165 | /** 166 | * @brief Initializes the CRC MSP. 167 | * @param hcrc CRC handle 168 | * @retval None 169 | */ 170 | __weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc) 171 | { 172 | /* Prevent unused argument(s) compilation warning */ 173 | UNUSED(hcrc); 174 | 175 | /* NOTE : This function should not be modified, when the callback is needed, 176 | the HAL_CRC_MspInit can be implemented in the user file 177 | */ 178 | } 179 | 180 | /** 181 | * @brief DeInitialize the CRC MSP. 182 | * @param hcrc CRC handle 183 | * @retval None 184 | */ 185 | __weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc) 186 | { 187 | /* Prevent unused argument(s) compilation warning */ 188 | UNUSED(hcrc); 189 | 190 | /* NOTE : This function should not be modified, when the callback is needed, 191 | the HAL_CRC_MspDeInit can be implemented in the user file 192 | */ 193 | } 194 | 195 | /** 196 | * @} 197 | */ 198 | 199 | /** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions 200 | * @brief management functions. 201 | * 202 | @verbatim 203 | =============================================================================== 204 | ##### Peripheral Control functions ##### 205 | =============================================================================== 206 | [..] This section provides functions allowing to: 207 | (+) compute the 32-bit CRC value of a 32-bit data buffer 208 | using combination of the previous CRC value and the new one. 209 | 210 | [..] or 211 | 212 | (+) compute the 32-bit CRC value of a 32-bit data buffer 213 | independently of the previous CRC value. 214 | 215 | @endverbatim 216 | * @{ 217 | */ 218 | 219 | /** 220 | * @brief Compute the 32-bit CRC value of a 32-bit data buffer 221 | * starting with the previously computed CRC as initialization value. 222 | * @param hcrc CRC handle 223 | * @param pBuffer pointer to the input data buffer. 224 | * @param BufferLength input data buffer length (number of uint32_t words). 225 | * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits) 226 | */ 227 | uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength) 228 | { 229 | uint32_t index; /* CRC input data buffer index */ 230 | uint32_t temp = 0U; /* CRC output (read from hcrc->Instance->DR register) */ 231 | 232 | /* Change CRC peripheral state */ 233 | hcrc->State = HAL_CRC_STATE_BUSY; 234 | 235 | /* Enter Data to the CRC calculator */ 236 | for (index = 0U; index < BufferLength; index++) 237 | { 238 | hcrc->Instance->DR = pBuffer[index]; 239 | } 240 | temp = hcrc->Instance->DR; 241 | 242 | /* Change CRC peripheral state */ 243 | hcrc->State = HAL_CRC_STATE_READY; 244 | 245 | /* Return the CRC computed value */ 246 | return temp; 247 | } 248 | 249 | /** 250 | * @brief Compute the 32-bit CRC value of a 32-bit data buffer 251 | * starting with hcrc->Instance->INIT as initialization value. 252 | * @param hcrc CRC handle 253 | * @param pBuffer pointer to the input data buffer. 254 | * @param BufferLength input data buffer length (number of uint32_t words). 255 | * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits) 256 | */ 257 | uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength) 258 | { 259 | uint32_t index; /* CRC input data buffer index */ 260 | uint32_t temp = 0U; /* CRC output (read from hcrc->Instance->DR register) */ 261 | 262 | /* Change CRC peripheral state */ 263 | hcrc->State = HAL_CRC_STATE_BUSY; 264 | 265 | /* Reset CRC Calculation Unit (hcrc->Instance->INIT is 266 | * written in hcrc->Instance->DR) */ 267 | __HAL_CRC_DR_RESET(hcrc); 268 | 269 | /* Enter 32-bit input data to the CRC calculator */ 270 | for (index = 0U; index < BufferLength; index++) 271 | { 272 | hcrc->Instance->DR = pBuffer[index]; 273 | } 274 | temp = hcrc->Instance->DR; 275 | 276 | /* Change CRC peripheral state */ 277 | hcrc->State = HAL_CRC_STATE_READY; 278 | 279 | /* Return the CRC computed value */ 280 | return temp; 281 | } 282 | 283 | /** 284 | * @} 285 | */ 286 | 287 | /** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions 288 | * @brief Peripheral State functions. 289 | * 290 | @verbatim 291 | =============================================================================== 292 | ##### Peripheral State functions ##### 293 | =============================================================================== 294 | [..] 295 | This subsection permits to get in run-time the status of the peripheral. 296 | 297 | @endverbatim 298 | * @{ 299 | */ 300 | 301 | /** 302 | * @brief Return the CRC handle state. 303 | * @param hcrc CRC handle 304 | * @retval HAL state 305 | */ 306 | HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc) 307 | { 308 | /* Return CRC handle state */ 309 | return hcrc->State; 310 | } 311 | 312 | /** 313 | * @} 314 | */ 315 | 316 | /** 317 | * @} 318 | */ 319 | 320 | 321 | #endif /* HAL_CRC_MODULE_ENABLED */ 322 | /** 323 | * @} 324 | */ 325 | 326 | /** 327 | * @} 328 | */ 329 | -------------------------------------------------------------------------------- /Src/stm32f1xx_hal_gpio_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_gpio_ex.c 4 | * @author MCD Application Team 5 | * @brief GPIO Extension HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the General Purpose Input/Output (GPIO) extension peripheral. 8 | * + Extended features functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2016 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | @verbatim 22 | ============================================================================== 23 | ##### GPIO Peripheral extension features ##### 24 | ============================================================================== 25 | [..] GPIO module on STM32F1 family, manage also the AFIO register: 26 | (+) Possibility to use the EVENTOUT Cortex feature 27 | 28 | ##### How to use this driver ##### 29 | ============================================================================== 30 | [..] This driver provides functions to use EVENTOUT Cortex feature 31 | (#) Configure EVENTOUT Cortex feature using the function HAL_GPIOEx_ConfigEventout() 32 | (#) Activate EVENTOUT Cortex feature using the HAL_GPIOEx_EnableEventout() 33 | (#) Deactivate EVENTOUT Cortex feature using the HAL_GPIOEx_DisableEventout() 34 | 35 | @endverbatim 36 | ****************************************************************************** 37 | */ 38 | 39 | /* Includes ------------------------------------------------------------------*/ 40 | #include "stm32f1xx_hal.h" 41 | 42 | /** @addtogroup STM32F1xx_HAL_Driver 43 | * @{ 44 | */ 45 | 46 | /** @defgroup GPIOEx GPIOEx 47 | * @brief GPIO HAL module driver 48 | * @{ 49 | */ 50 | 51 | #ifdef HAL_GPIO_MODULE_ENABLED 52 | 53 | /** @defgroup GPIOEx_Exported_Functions GPIOEx Exported Functions 54 | * @{ 55 | */ 56 | 57 | /** @defgroup GPIOEx_Exported_Functions_Group1 Extended features functions 58 | * @brief Extended features functions 59 | * 60 | @verbatim 61 | ============================================================================== 62 | ##### Extended features functions ##### 63 | ============================================================================== 64 | [..] This section provides functions allowing to: 65 | (+) Configure EVENTOUT Cortex feature using the function HAL_GPIOEx_ConfigEventout() 66 | (+) Activate EVENTOUT Cortex feature using the HAL_GPIOEx_EnableEventout() 67 | (+) Deactivate EVENTOUT Cortex feature using the HAL_GPIOEx_DisableEventout() 68 | 69 | @endverbatim 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief Configures the port and pin on which the EVENTOUT Cortex signal will be connected. 75 | * @param GPIO_PortSource Select the port used to output the Cortex EVENTOUT signal. 76 | * This parameter can be a value of @ref GPIOEx_EVENTOUT_PORT. 77 | * @param GPIO_PinSource Select the pin used to output the Cortex EVENTOUT signal. 78 | * This parameter can be a value of @ref GPIOEx_EVENTOUT_PIN. 79 | * @retval None 80 | */ 81 | void HAL_GPIOEx_ConfigEventout(uint32_t GPIO_PortSource, uint32_t GPIO_PinSource) 82 | { 83 | /* Verify the parameters */ 84 | assert_param(IS_AFIO_EVENTOUT_PORT(GPIO_PortSource)); 85 | assert_param(IS_AFIO_EVENTOUT_PIN(GPIO_PinSource)); 86 | 87 | /* Apply the new configuration */ 88 | MODIFY_REG(AFIO->EVCR, (AFIO_EVCR_PORT) | (AFIO_EVCR_PIN), (GPIO_PortSource) | (GPIO_PinSource)); 89 | } 90 | 91 | /** 92 | * @brief Enables the Event Output. 93 | * @retval None 94 | */ 95 | void HAL_GPIOEx_EnableEventout(void) 96 | { 97 | SET_BIT(AFIO->EVCR, AFIO_EVCR_EVOE); 98 | } 99 | 100 | /** 101 | * @brief Disables the Event Output. 102 | * @retval None 103 | */ 104 | void HAL_GPIOEx_DisableEventout(void) 105 | { 106 | CLEAR_BIT(AFIO->EVCR, AFIO_EVCR_EVOE); 107 | } 108 | 109 | /** 110 | * @} 111 | */ 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | #endif /* HAL_GPIO_MODULE_ENABLED */ 118 | 119 | /** 120 | * @} 121 | */ 122 | 123 | /** 124 | * @} 125 | */ 126 | 127 | -------------------------------------------------------------------------------- /Src/stm32f1xx_hal_iwdg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_iwdg.c 4 | * @author MCD Application Team 5 | * @brief IWDG HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the Independent Watchdog (IWDG) peripheral: 8 | * + Initialization and Start functions 9 | * + IO operation functions 10 | * 11 | ****************************************************************************** 12 | * @attention 13 | * 14 | * Copyright (c) 2016 STMicroelectronics. 15 | * All rights reserved. 16 | * 17 | * This software is licensed under terms that can be found in the LICENSE file 18 | * in the root directory of this software component. 19 | * If no LICENSE file comes with this software, it is provided AS-IS. 20 | * 21 | ****************************************************************************** 22 | @verbatim 23 | ============================================================================== 24 | ##### IWDG Generic features ##### 25 | ============================================================================== 26 | [..] 27 | (+) The IWDG can be started by either software or hardware (configurable 28 | through option byte). 29 | 30 | (+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays 31 | active even if the main clock fails. 32 | 33 | (+) Once the IWDG is started, the LSI is forced ON and both cannot be 34 | disabled. The counter starts counting down from the reset value (0xFFF). 35 | When it reaches the end of count value (0x000) a reset signal is 36 | generated (IWDG reset). 37 | 38 | (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register, 39 | the IWDG_RLR value is reloaded into the counter and the watchdog reset 40 | is prevented. 41 | 42 | (+) The IWDG is implemented in the VDD voltage domain that is still functional 43 | in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY). 44 | IWDGRST flag in RCC_CSR register can be used to inform when an IWDG 45 | reset occurs. 46 | 47 | (+) Debug mode: When the microcontroller enters debug mode (core halted), 48 | the IWDG counter either continues to work normally or stops, depending 49 | on DBG_IWDG_STOP configuration bit in DBG module, accessible through 50 | __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros. 51 | 52 | [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s 53 | The IWDG timeout may vary due to LSI clock frequency dispersion. 54 | STM32F1xx devices provide the capability to measure the LSI clock 55 | frequency (LSI clock is internally connected to TIM5 CH4 input capture). 56 | The measured value can be used to have an IWDG timeout with an 57 | acceptable accuracy. 58 | 59 | [..] Default timeout value (necessary for IWDG_SR status register update): 60 | Constant LSI_VALUE is defined based on the nominal LSI clock frequency. 61 | This frequency being subject to variations as mentioned above, the 62 | default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT 63 | below) may become too short or too long. 64 | In such cases, this default timeout value can be tuned by redefining 65 | the constant LSI_VALUE at user-application level (based, for instance, 66 | on the measured LSI clock frequency as explained above). 67 | 68 | ##### How to use this driver ##### 69 | ============================================================================== 70 | [..] 71 | (#) Use IWDG using HAL_IWDG_Init() function to : 72 | (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI 73 | clock is forced ON and IWDG counter starts counting down. 74 | (++) Enable write access to configuration registers: 75 | IWDG_PR and IWDG_RLR. 76 | (++) Configure the IWDG prescaler and counter reload value. This reload 77 | value will be loaded in the IWDG counter each time the watchdog is 78 | reloaded, then the IWDG will start counting down from this value. 79 | (++) Wait for status flags to be reset. 80 | 81 | (#) Then the application program must refresh the IWDG counter at regular 82 | intervals during normal operation to prevent an MCU reset, using 83 | HAL_IWDG_Refresh() function. 84 | 85 | *** IWDG HAL driver macros list *** 86 | ==================================== 87 | [..] 88 | Below the list of most used macros in IWDG HAL driver: 89 | (+) __HAL_IWDG_START: Enable the IWDG peripheral 90 | (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in 91 | the reload register 92 | 93 | @endverbatim 94 | */ 95 | 96 | /* Includes ------------------------------------------------------------------*/ 97 | #include "stm32f1xx_hal.h" 98 | 99 | /** @addtogroup STM32F1xx_HAL_Driver 100 | * @{ 101 | */ 102 | 103 | #ifdef HAL_IWDG_MODULE_ENABLED 104 | /** @addtogroup IWDG 105 | * @brief IWDG HAL module driver. 106 | * @{ 107 | */ 108 | 109 | /* Private typedef -----------------------------------------------------------*/ 110 | /* Private define ------------------------------------------------------------*/ 111 | /** @defgroup IWDG_Private_Defines IWDG Private Defines 112 | * @{ 113 | */ 114 | /* Status register needs up to 5 LSI clock periods divided by the clock 115 | prescaler to be updated. The number of LSI clock periods is upper-rounded to 116 | 6 for the timeout value calculation. 117 | The timeout value is calculated using the highest prescaler (256) and 118 | the LSI_VALUE constant. The value of this constant can be changed by the user 119 | to take into account possible LSI clock period variations. 120 | The timeout value is multiplied by 1000 to be converted in milliseconds. 121 | LSI startup time is also considered here by adding LSI_STARTUP_TIME 122 | converted in milliseconds. */ 123 | #define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \ 124 | ((LSI_STARTUP_TIME / 1000UL) + 1UL)) 125 | #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_RVU | IWDG_SR_PVU) 126 | /** 127 | * @} 128 | */ 129 | 130 | /* Private macro -------------------------------------------------------------*/ 131 | /* Private variables ---------------------------------------------------------*/ 132 | /* Private function prototypes -----------------------------------------------*/ 133 | /* Exported functions --------------------------------------------------------*/ 134 | 135 | /** @addtogroup IWDG_Exported_Functions 136 | * @{ 137 | */ 138 | 139 | /** @addtogroup IWDG_Exported_Functions_Group1 140 | * @brief Initialization and Start functions. 141 | * 142 | @verbatim 143 | =============================================================================== 144 | ##### Initialization and Start functions ##### 145 | =============================================================================== 146 | [..] This section provides functions allowing to: 147 | (+) Initialize the IWDG according to the specified parameters in the 148 | IWDG_InitTypeDef of associated handle. 149 | (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog 150 | is reloaded in order to exit function with correct time base. 151 | 152 | @endverbatim 153 | * @{ 154 | */ 155 | 156 | /** 157 | * @brief Initialize the IWDG according to the specified parameters in the 158 | * IWDG_InitTypeDef and start watchdog. Before exiting function, 159 | * watchdog is refreshed in order to have correct time base. 160 | * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains 161 | * the configuration information for the specified IWDG module. 162 | * @retval HAL status 163 | */ 164 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg) 165 | { 166 | uint32_t tickstart; 167 | 168 | /* Check the IWDG handle allocation */ 169 | if (hiwdg == NULL) 170 | { 171 | return HAL_ERROR; 172 | } 173 | 174 | /* Check the parameters */ 175 | assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance)); 176 | assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler)); 177 | assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload)); 178 | 179 | /* Enable IWDG. LSI is turned on automatically */ 180 | __HAL_IWDG_START(hiwdg); 181 | 182 | /* Enable write access to IWDG_PR and IWDG_RLR registers by writing 183 | 0x5555 in KR */ 184 | IWDG_ENABLE_WRITE_ACCESS(hiwdg); 185 | 186 | /* Write to IWDG registers the Prescaler & Reload values to work with */ 187 | hiwdg->Instance->PR = hiwdg->Init.Prescaler; 188 | hiwdg->Instance->RLR = hiwdg->Init.Reload; 189 | 190 | /* Check pending flag, if previous update not done, return timeout */ 191 | tickstart = HAL_GetTick(); 192 | 193 | /* Wait for register to be updated */ 194 | while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) 195 | { 196 | if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT) 197 | { 198 | if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) 199 | { 200 | return HAL_TIMEOUT; 201 | } 202 | } 203 | } 204 | 205 | /* Reload IWDG counter with value defined in the reload register */ 206 | __HAL_IWDG_RELOAD_COUNTER(hiwdg); 207 | 208 | /* Return function status */ 209 | return HAL_OK; 210 | } 211 | 212 | 213 | /** 214 | * @} 215 | */ 216 | 217 | 218 | /** @addtogroup IWDG_Exported_Functions_Group2 219 | * @brief IO operation functions 220 | * 221 | @verbatim 222 | =============================================================================== 223 | ##### IO operation functions ##### 224 | =============================================================================== 225 | [..] This section provides functions allowing to: 226 | (+) Refresh the IWDG. 227 | 228 | @endverbatim 229 | * @{ 230 | */ 231 | 232 | /** 233 | * @brief Refresh the IWDG. 234 | * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains 235 | * the configuration information for the specified IWDG module. 236 | * @retval HAL status 237 | */ 238 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg) 239 | { 240 | /* Reload IWDG counter with value defined in the reload register */ 241 | __HAL_IWDG_RELOAD_COUNTER(hiwdg); 242 | 243 | /* Return function status */ 244 | return HAL_OK; 245 | } 246 | 247 | 248 | /** 249 | * @} 250 | */ 251 | 252 | /** 253 | * @} 254 | */ 255 | 256 | #endif /* HAL_IWDG_MODULE_ENABLED */ 257 | /** 258 | * @} 259 | */ 260 | 261 | /** 262 | * @} 263 | */ 264 | -------------------------------------------------------------------------------- /Src/stm32f1xx_hal_msp_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_msp_template.c 4 | * @author MCD Application Team 5 | * @brief HAL BSP module. 6 | * This file template is located in the HAL folder and should be copied 7 | * to the user folder. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * Copyright (c) 2016 STMicroelectronics. 12 | * All rights reserved. 13 | * 14 | * This software is licensed under terms that can be found in the LICENSE file 15 | * in the root directory of this software component. 16 | * If no LICENSE file comes with this software, it is provided AS-IS. 17 | * 18 | ****************************************************************************** 19 | */ 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f1xx_hal.h" 23 | 24 | /** @addtogroup STM32F1xx_HAL_Driver 25 | * @{ 26 | */ 27 | 28 | /** @defgroup HAL_MSP HAL_MSP 29 | * @brief HAL MSP module. 30 | * @{ 31 | */ 32 | 33 | /* Private typedef -----------------------------------------------------------*/ 34 | /* Private define ------------------------------------------------------------*/ 35 | /* Private macro -------------------------------------------------------------*/ 36 | /* Private variables ---------------------------------------------------------*/ 37 | /* Private function prototypes -----------------------------------------------*/ 38 | /* Private functions ---------------------------------------------------------*/ 39 | 40 | /** @defgroup HAL_MSP_Exported_Functions HAL MSP Exported Functions 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @brief Initializes the Global MSP. 46 | * @retval None 47 | */ 48 | void HAL_MspInit(void) 49 | { 50 | 51 | } 52 | 53 | /** 54 | * @brief DeInitializes the Global MSP. 55 | * @retval None 56 | */ 57 | void HAL_MspDeInit(void) 58 | { 59 | 60 | } 61 | 62 | /** 63 | * @brief Initializes the PPP MSP. 64 | * @retval None 65 | */ 66 | void HAL_PPP_MspInit(void) 67 | { 68 | 69 | } 70 | 71 | /** 72 | * @brief DeInitializes the PPP MSP. 73 | * @retval None 74 | */ 75 | void HAL_PPP_MspDeInit(void) 76 | { 77 | 78 | } 79 | 80 | /** 81 | * @} 82 | */ 83 | 84 | /** 85 | * @} 86 | */ 87 | 88 | /** 89 | * @} 90 | */ 91 | 92 | 93 | -------------------------------------------------------------------------------- /Src/stm32f1xx_hal_pcd_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_pcd_ex.c 4 | * @author MCD Application Team 5 | * @brief PCD Extended HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the USB Peripheral Controller: 8 | * + Extended features functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2016 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "stm32f1xx_hal.h" 25 | 26 | /** @addtogroup STM32F1xx_HAL_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup PCDEx PCDEx 31 | * @brief PCD Extended HAL module driver 32 | * @{ 33 | */ 34 | 35 | #ifdef HAL_PCD_MODULE_ENABLED 36 | 37 | #if defined (USB) || defined (USB_OTG_FS) 38 | /* Private types -------------------------------------------------------------*/ 39 | /* Private variables ---------------------------------------------------------*/ 40 | /* Private constants ---------------------------------------------------------*/ 41 | /* Private macros ------------------------------------------------------------*/ 42 | /* Private functions ---------------------------------------------------------*/ 43 | /* Exported functions --------------------------------------------------------*/ 44 | 45 | /** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions 46 | * @{ 47 | */ 48 | 49 | /** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 50 | * @brief PCDEx control functions 51 | * 52 | @verbatim 53 | =============================================================================== 54 | ##### Extended features functions ##### 55 | =============================================================================== 56 | [..] This section provides functions allowing to: 57 | (+) Update FIFO configuration 58 | 59 | @endverbatim 60 | * @{ 61 | */ 62 | #if defined (USB_OTG_FS) 63 | /** 64 | * @brief Set Tx FIFO 65 | * @param hpcd PCD handle 66 | * @param fifo The number of Tx fifo 67 | * @param size Fifo size 68 | * @retval HAL status 69 | */ 70 | HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size) 71 | { 72 | uint8_t i; 73 | uint32_t Tx_Offset; 74 | 75 | /* TXn min size = 16 words. (n : Transmit FIFO index) 76 | When a TxFIFO is not used, the Configuration should be as follows: 77 | case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes) 78 | --> Txm can use the space allocated for Txn. 79 | case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes) 80 | --> Txn should be configured with the minimum space of 16 words 81 | The FIFO is used optimally when used TxFIFOs are allocated in the top 82 | of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones. 83 | When DMA is used 3n * FIFO locations should be reserved for internal DMA registers */ 84 | 85 | Tx_Offset = hpcd->Instance->GRXFSIZ; 86 | 87 | if (fifo == 0U) 88 | { 89 | hpcd->Instance->DIEPTXF0_HNPTXFSIZ = ((uint32_t)size << 16) | Tx_Offset; 90 | } 91 | else 92 | { 93 | Tx_Offset += (hpcd->Instance->DIEPTXF0_HNPTXFSIZ) >> 16; 94 | for (i = 0U; i < (fifo - 1U); i++) 95 | { 96 | Tx_Offset += (hpcd->Instance->DIEPTXF[i] >> 16); 97 | } 98 | 99 | /* Multiply Tx_Size by 2 to get higher performance */ 100 | hpcd->Instance->DIEPTXF[fifo - 1U] = ((uint32_t)size << 16) | Tx_Offset; 101 | } 102 | 103 | return HAL_OK; 104 | } 105 | 106 | /** 107 | * @brief Set Rx FIFO 108 | * @param hpcd PCD handle 109 | * @param size Size of Rx fifo 110 | * @retval HAL status 111 | */ 112 | HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size) 113 | { 114 | hpcd->Instance->GRXFSIZ = size; 115 | 116 | return HAL_OK; 117 | } 118 | #endif /* defined (USB_OTG_FS) */ 119 | #if defined (USB) 120 | /** 121 | * @brief Configure PMA for EP 122 | * @param hpcd Device instance 123 | * @param ep_addr endpoint address 124 | * @param ep_kind endpoint Kind 125 | * USB_SNG_BUF: Single Buffer used 126 | * USB_DBL_BUF: Double Buffer used 127 | * @param pmaadress: EP address in The PMA: In case of single buffer endpoint 128 | * this parameter is 16-bit value providing the address 129 | * in PMA allocated to endpoint. 130 | * In case of double buffer endpoint this parameter 131 | * is a 32-bit value providing the endpoint buffer 0 address 132 | * in the LSB part of 32-bit value and endpoint buffer 1 address 133 | * in the MSB part of 32-bit value. 134 | * @retval HAL status 135 | */ 136 | 137 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, 138 | uint16_t ep_kind, uint32_t pmaadress) 139 | { 140 | PCD_EPTypeDef *ep; 141 | 142 | /* initialize ep structure*/ 143 | if ((0x80U & ep_addr) == 0x80U) 144 | { 145 | ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 146 | } 147 | else 148 | { 149 | ep = &hpcd->OUT_ep[ep_addr]; 150 | } 151 | 152 | /* Here we check if the endpoint is single or double Buffer*/ 153 | if (ep_kind == PCD_SNG_BUF) 154 | { 155 | /* Single Buffer */ 156 | ep->doublebuffer = 0U; 157 | /* Configure the PMA */ 158 | ep->pmaadress = (uint16_t)pmaadress; 159 | } 160 | #if (USE_USB_DOUBLE_BUFFER == 1U) 161 | else /* USB_DBL_BUF */ 162 | { 163 | /* Double Buffer Endpoint */ 164 | ep->doublebuffer = 1U; 165 | /* Configure the PMA */ 166 | ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); 167 | ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); 168 | } 169 | #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ 170 | 171 | return HAL_OK; 172 | } 173 | 174 | /** 175 | * @brief Software Device Connection, 176 | * this function is not required by USB OTG FS peripheral, it is used 177 | * only by USB Device FS peripheral. 178 | * @param hpcd PCD handle 179 | * @param state connection state (0 : disconnected / 1: connected) 180 | * @retval None 181 | */ 182 | __weak void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) 183 | { 184 | /* Prevent unused argument(s) compilation warning */ 185 | UNUSED(hpcd); 186 | UNUSED(state); 187 | /* NOTE : This function Should not be modified, when the callback is needed, 188 | the HAL_PCDEx_SetConnectionState could be implemented in the user file 189 | */ 190 | } 191 | #endif /* defined (USB) */ 192 | 193 | /** 194 | * @brief Send LPM message to user layer callback. 195 | * @param hpcd PCD handle 196 | * @param msg LPM message 197 | * @retval HAL status 198 | */ 199 | __weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) 200 | { 201 | /* Prevent unused argument(s) compilation warning */ 202 | UNUSED(hpcd); 203 | UNUSED(msg); 204 | 205 | /* NOTE : This function should not be modified, when the callback is needed, 206 | the HAL_PCDEx_LPM_Callback could be implemented in the user file 207 | */ 208 | } 209 | 210 | /** 211 | * @brief Send BatteryCharging message to user layer callback. 212 | * @param hpcd PCD handle 213 | * @param msg LPM message 214 | * @retval HAL status 215 | */ 216 | __weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) 217 | { 218 | /* Prevent unused argument(s) compilation warning */ 219 | UNUSED(hpcd); 220 | UNUSED(msg); 221 | 222 | /* NOTE : This function should not be modified, when the callback is needed, 223 | the HAL_PCDEx_BCD_Callback could be implemented in the user file 224 | */ 225 | } 226 | 227 | /** 228 | * @} 229 | */ 230 | 231 | /** 232 | * @} 233 | */ 234 | #endif /* defined (USB) || defined (USB_OTG_FS) */ 235 | #endif /* HAL_PCD_MODULE_ENABLED */ 236 | 237 | /** 238 | * @} 239 | */ 240 | 241 | /** 242 | * @} 243 | */ 244 | -------------------------------------------------------------------------------- /Src/stm32f1xx_hal_timebase_rtc_alarm_template.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/stm32f1xx-hal-driver/18074e3e5ecad0b380a5cf5a9131fe4b5ed1b2b7/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c -------------------------------------------------------------------------------- /Src/stm32f1xx_hal_timebase_tim_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_timebase_tim_template.c 4 | * @author MCD Application Team 5 | * @brief HAL time base based on the hardware TIM Template. 6 | * 7 | * This file overrides the native HAL time base functions (defined as weak) 8 | * the TIM time base: 9 | * + Initializes the TIM peripheral generate a Period elapsed Event each 1ms 10 | * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms 11 | * 12 | ****************************************************************************** 13 | * @attention 14 | * 15 | * Copyright (c) 2017 STMicroelectronics. 16 | * All rights reserved. 17 | * 18 | * This software is licensed under terms that can be found in the LICENSE file 19 | * in the root directory of this software component. 20 | * If no LICENSE file comes with this software, it is provided AS-IS. 21 | * 22 | ****************************************************************************** 23 | */ 24 | 25 | /* Includes ------------------------------------------------------------------*/ 26 | #include "stm32f1xx_hal.h" 27 | 28 | /** @addtogroup STM32F1xx_HAL_Driver 29 | * @{ 30 | */ 31 | 32 | /** @addtogroup HAL_TimeBase_TIM 33 | * @{ 34 | */ 35 | 36 | /* Private typedef -----------------------------------------------------------*/ 37 | /* Private define ------------------------------------------------------------*/ 38 | /* Private macro -------------------------------------------------------------*/ 39 | /* Private variables ---------------------------------------------------------*/ 40 | TIM_HandleTypeDef TimHandle; 41 | /* Private function prototypes -----------------------------------------------*/ 42 | void TIM2_IRQHandler(void); 43 | /* Private functions ---------------------------------------------------------*/ 44 | 45 | /** 46 | * @brief This function configures the TIM2 as a time base source. 47 | * The time source is configured to have 1ms time base with a dedicated 48 | * Tick interrupt priority. 49 | * @note This function is called automatically at the beginning of program after 50 | * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). 51 | * @param TickPriority Tick interrupt priority. 52 | * @retval HAL status 53 | */ 54 | HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) 55 | { 56 | RCC_ClkInitTypeDef clkconfig; 57 | uint32_t uwTimclock, uwAPB1Prescaler = 0U; 58 | uint32_t uwPrescalerValue = 0U; 59 | uint32_t pFLatency; 60 | HAL_StatusTypeDef status = HAL_OK; 61 | 62 | 63 | /* Enable TIM2 clock */ 64 | __HAL_RCC_TIM2_CLK_ENABLE(); 65 | 66 | /* Get clock configuration */ 67 | HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); 68 | 69 | /* Get APB1 prescaler */ 70 | uwAPB1Prescaler = clkconfig.APB1CLKDivider; 71 | 72 | /* Compute TIM2 clock */ 73 | if (uwAPB1Prescaler == RCC_HCLK_DIV1) 74 | { 75 | uwTimclock = HAL_RCC_GetPCLK1Freq(); 76 | } 77 | else 78 | { 79 | uwTimclock = 2 * HAL_RCC_GetPCLK1Freq(); 80 | } 81 | 82 | /* Compute the prescaler value to have TIM2 counter clock equal to 1MHz */ 83 | uwPrescalerValue = (uint32_t)((uwTimclock / 1000000U) - 1U); 84 | 85 | /* Initialize TIM2 */ 86 | TimHandle.Instance = TIM2; 87 | 88 | /* Initialize TIMx peripheral as follow: 89 | + Period = [(TIM2CLK/1000) - 1]. to have a (1/1000) s time base. 90 | + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. 91 | + ClockDivision = 0 92 | + Counter direction = Up 93 | */ 94 | TimHandle.Init.Period = (1000000U / 1000U) - 1U; 95 | TimHandle.Init.Prescaler = uwPrescalerValue; 96 | TimHandle.Init.ClockDivision = 0U; 97 | TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP; 98 | TimHandle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 99 | status = HAL_TIM_Base_Init(&TimHandle); 100 | if (status == HAL_OK) 101 | { 102 | /* Start the TIM time Base generation in interrupt mode */ 103 | status = HAL_TIM_Base_Start_IT(&TimHandle); 104 | if (status == HAL_OK) 105 | { 106 | /* Enable the TIM2 global Interrupt */ 107 | HAL_NVIC_EnableIRQ(TIM2_IRQn); 108 | 109 | if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 110 | { 111 | /*Configure the TIM2 IRQ priority */ 112 | HAL_NVIC_SetPriority(TIM2_IRQn, TickPriority ,0); 113 | uwTickPrio = TickPriority; 114 | } 115 | else 116 | { 117 | status = HAL_ERROR; 118 | } 119 | } 120 | } 121 | 122 | /* Return function status */ 123 | return status; 124 | } 125 | 126 | /** 127 | * @brief Suspend Tick increment. 128 | * @note Disable the tick increment by disabling TIM2 update interrupt. 129 | * @retval None 130 | */ 131 | void HAL_SuspendTick(void) 132 | { 133 | /* Disable TIM2 update Interrupt */ 134 | __HAL_TIM_DISABLE_IT(&TimHandle, TIM_IT_UPDATE); 135 | } 136 | 137 | /** 138 | * @brief Resume Tick increment. 139 | * @note Enable the tick increment by Enabling TIM2 update interrupt. 140 | * @retval None 141 | */ 142 | void HAL_ResumeTick(void) 143 | { 144 | /* Enable TIM2 Update interrupt */ 145 | __HAL_TIM_ENABLE_IT(&TimHandle, TIM_IT_UPDATE); 146 | } 147 | 148 | /** 149 | * @brief Period elapsed callback in non blocking mode 150 | * @note This function is called when TIM2 interrupt took place, inside 151 | * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment 152 | * a global variable "uwTick" used as application time base. 153 | * @param htim TIM handle 154 | * @retval None 155 | */ 156 | void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) 157 | { 158 | HAL_IncTick(); 159 | } 160 | 161 | /** 162 | * @brief This function handles TIM interrupt request. 163 | * @retval None 164 | */ 165 | void TIM2_IRQHandler(void) 166 | { 167 | HAL_TIM_IRQHandler(&TimHandle); 168 | } 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | 179 | -------------------------------------------------------------------------------- /Src/stm32f1xx_ll_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_crc.c 4 | * @author MCD Application Team 5 | * @brief CRC LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32f1xx_ll_crc.h" 22 | #include "stm32f1xx_ll_bus.h" 23 | 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif /* USE_FULL_ASSERT */ 29 | 30 | /** @addtogroup STM32F1xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (CRC) 35 | 36 | /** @addtogroup CRC_LL 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /* Private function prototypes -----------------------------------------------*/ 45 | 46 | /* Exported functions --------------------------------------------------------*/ 47 | /** @addtogroup CRC_LL_Exported_Functions 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup CRC_LL_EF_Init 52 | * @{ 53 | */ 54 | 55 | /** 56 | * @brief De-initialize CRC registers (Registers restored to their default values). 57 | * @param CRCx CRC Instance 58 | * @retval An ErrorStatus enumeration value: 59 | * - SUCCESS: CRC registers are de-initialized 60 | * - ERROR: CRC registers are not de-initialized 61 | */ 62 | ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx) 63 | { 64 | ErrorStatus status = SUCCESS; 65 | 66 | /* Check the parameters */ 67 | assert_param(IS_CRC_ALL_INSTANCE(CRCx)); 68 | 69 | if (CRCx == CRC) 70 | { 71 | 72 | /* Reset the CRC calculation unit */ 73 | LL_CRC_ResetCRCCalculationUnit(CRCx); 74 | 75 | /* Reset IDR register */ 76 | LL_CRC_Write_IDR(CRCx, 0x00U); 77 | } 78 | else 79 | { 80 | status = ERROR; 81 | } 82 | 83 | return (status); 84 | } 85 | 86 | /** 87 | * @} 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | #endif /* defined (CRC) */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | #endif /* USE_FULL_LL_DRIVER */ 105 | -------------------------------------------------------------------------------- /Src/stm32f1xx_ll_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_exti.c 4 | * @author MCD Application Team 5 | * @brief EXTI LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f1xx_ll_exti.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif 28 | 29 | /** @addtogroup STM32F1xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined (EXTI) 34 | 35 | /** @defgroup EXTI_LL EXTI 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | /** @addtogroup EXTI_LL_Private_Macros 44 | * @{ 45 | */ 46 | 47 | #define IS_LL_EXTI_LINE_0_31(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U) 48 | 49 | #define IS_LL_EXTI_MODE(__VALUE__) (((__VALUE__) == LL_EXTI_MODE_IT) \ 50 | || ((__VALUE__) == LL_EXTI_MODE_EVENT) \ 51 | || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT)) 52 | 53 | 54 | #define IS_LL_EXTI_TRIGGER(__VALUE__) (((__VALUE__) == LL_EXTI_TRIGGER_NONE) \ 55 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING) \ 56 | || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING) \ 57 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING)) 58 | 59 | /** 60 | * @} 61 | */ 62 | 63 | /* Private function prototypes -----------------------------------------------*/ 64 | 65 | /* Exported functions --------------------------------------------------------*/ 66 | /** @addtogroup EXTI_LL_Exported_Functions 67 | * @{ 68 | */ 69 | 70 | /** @addtogroup EXTI_LL_EF_Init 71 | * @{ 72 | */ 73 | 74 | /** 75 | * @brief De-initialize the EXTI registers to their default reset values. 76 | * @retval An ErrorStatus enumeration value: 77 | * - SUCCESS: EXTI registers are de-initialized 78 | * - ERROR: not applicable 79 | */ 80 | uint32_t LL_EXTI_DeInit(void) 81 | { 82 | /* Interrupt mask register set to default reset values */ 83 | LL_EXTI_WriteReg(IMR, 0x00000000U); 84 | /* Event mask register set to default reset values */ 85 | LL_EXTI_WriteReg(EMR, 0x00000000U); 86 | /* Rising Trigger selection register set to default reset values */ 87 | LL_EXTI_WriteReg(RTSR, 0x00000000U); 88 | /* Falling Trigger selection register set to default reset values */ 89 | LL_EXTI_WriteReg(FTSR, 0x00000000U); 90 | /* Software interrupt event register set to default reset values */ 91 | LL_EXTI_WriteReg(SWIER, 0x00000000U); 92 | /* Pending register clear */ 93 | LL_EXTI_WriteReg(PR, 0x000FFFFFU); 94 | 95 | return SUCCESS; 96 | } 97 | 98 | /** 99 | * @brief Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct. 100 | * @param EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure. 101 | * @retval An ErrorStatus enumeration value: 102 | * - SUCCESS: EXTI registers are initialized 103 | * - ERROR: not applicable 104 | */ 105 | uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct) 106 | { 107 | ErrorStatus status = SUCCESS; 108 | /* Check the parameters */ 109 | assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31)); 110 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand)); 111 | assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode)); 112 | 113 | /* ENABLE LineCommand */ 114 | if (EXTI_InitStruct->LineCommand != DISABLE) 115 | { 116 | assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger)); 117 | 118 | /* Configure EXTI Lines in range from 0 to 31 */ 119 | if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE) 120 | { 121 | switch (EXTI_InitStruct->Mode) 122 | { 123 | case LL_EXTI_MODE_IT: 124 | /* First Disable Event on provided Lines */ 125 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 126 | /* Then Enable IT on provided Lines */ 127 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 128 | break; 129 | case LL_EXTI_MODE_EVENT: 130 | /* First Disable IT on provided Lines */ 131 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 132 | /* Then Enable Event on provided Lines */ 133 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 134 | break; 135 | case LL_EXTI_MODE_IT_EVENT: 136 | /* Directly Enable IT & Event on provided Lines */ 137 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 138 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 139 | break; 140 | default: 141 | status = ERROR; 142 | break; 143 | } 144 | if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE) 145 | { 146 | switch (EXTI_InitStruct->Trigger) 147 | { 148 | case LL_EXTI_TRIGGER_RISING: 149 | /* First Disable Falling Trigger on provided Lines */ 150 | LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 151 | /* Then Enable Rising Trigger on provided Lines */ 152 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 153 | break; 154 | case LL_EXTI_TRIGGER_FALLING: 155 | /* First Disable Rising Trigger on provided Lines */ 156 | LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 157 | /* Then Enable Falling Trigger on provided Lines */ 158 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 159 | break; 160 | case LL_EXTI_TRIGGER_RISING_FALLING: 161 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 162 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 163 | break; 164 | default: 165 | status = ERROR; 166 | break; 167 | } 168 | } 169 | } 170 | } 171 | /* DISABLE LineCommand */ 172 | else 173 | { 174 | /* De-configure EXTI Lines in range from 0 to 31 */ 175 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 176 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 177 | } 178 | return status; 179 | } 180 | 181 | /** 182 | * @brief Set each @ref LL_EXTI_InitTypeDef field to default value. 183 | * @param EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure. 184 | * @retval None 185 | */ 186 | void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct) 187 | { 188 | EXTI_InitStruct->Line_0_31 = LL_EXTI_LINE_NONE; 189 | EXTI_InitStruct->LineCommand = DISABLE; 190 | EXTI_InitStruct->Mode = LL_EXTI_MODE_IT; 191 | EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING; 192 | } 193 | 194 | /** 195 | * @} 196 | */ 197 | 198 | /** 199 | * @} 200 | */ 201 | 202 | /** 203 | * @} 204 | */ 205 | 206 | #endif /* defined (EXTI) */ 207 | 208 | /** 209 | * @} 210 | */ 211 | 212 | #endif /* USE_FULL_LL_DRIVER */ 213 | 214 | -------------------------------------------------------------------------------- /Src/stm32f1xx_ll_gpio.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_gpio.c 4 | * @author MCD Application Team 5 | * @brief GPIO LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f1xx_ll_gpio.h" 23 | #include "stm32f1xx_ll_bus.h" 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif 29 | 30 | /** @addtogroup STM32F1xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) 35 | 36 | /** @addtogroup GPIO_LL 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /** @addtogroup GPIO_LL_Private_Macros 45 | * @{ 46 | */ 47 | 48 | #define IS_LL_GPIO_PIN(__VALUE__) ((((__VALUE__) & LL_GPIO_PIN_ALL)!= 0u) &&\ 49 | (((__VALUE__) & (~LL_GPIO_PIN_ALL))== 0u)) 50 | 51 | #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_ANALOG) ||\ 52 | ((__VALUE__) == LL_GPIO_MODE_FLOATING) ||\ 53 | ((__VALUE__) == LL_GPIO_MODE_INPUT) ||\ 54 | ((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\ 55 | ((__VALUE__) == LL_GPIO_MODE_ALTERNATE)) 56 | 57 | #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\ 58 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\ 59 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH)) 60 | 61 | #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\ 62 | ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN)) 63 | 64 | #define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_DOWN) ||\ 65 | ((__VALUE__) == LL_GPIO_PULL_UP)) 66 | 67 | /** 68 | * @} 69 | */ 70 | 71 | /* Private function prototypes -----------------------------------------------*/ 72 | 73 | /* Exported functions --------------------------------------------------------*/ 74 | /** @addtogroup GPIO_LL_Exported_Functions 75 | * @{ 76 | */ 77 | 78 | /** @addtogroup GPIO_LL_EF_Init 79 | * @{ 80 | */ 81 | 82 | /** 83 | * @brief De-initialize GPIO registers (Registers restored to their default values). 84 | * @param GPIOx GPIO Port 85 | * @retval An ErrorStatus enumeration value: 86 | * - SUCCESS: GPIO registers are de-initialized 87 | * - ERROR: Wrong GPIO Port 88 | */ 89 | ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx) 90 | { 91 | ErrorStatus status = SUCCESS; 92 | 93 | /* Check the parameters */ 94 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 95 | 96 | /* Force and Release reset on clock of GPIOx Port */ 97 | if (GPIOx == GPIOA) 98 | { 99 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOA); 100 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOA); 101 | } 102 | else if (GPIOx == GPIOB) 103 | { 104 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOB); 105 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOB); 106 | } 107 | else if (GPIOx == GPIOC) 108 | { 109 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOC); 110 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOC); 111 | } 112 | else if (GPIOx == GPIOD) 113 | { 114 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOD); 115 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOD); 116 | } 117 | #if defined(GPIOE) 118 | else if (GPIOx == GPIOE) 119 | { 120 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOE); 121 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOE); 122 | } 123 | #endif 124 | #if defined(GPIOF) 125 | else if (GPIOx == GPIOF) 126 | { 127 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOF); 128 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOF); 129 | } 130 | #endif 131 | #if defined(GPIOG) 132 | else if (GPIOx == GPIOG) 133 | { 134 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOG); 135 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOG); 136 | } 137 | #endif 138 | else 139 | { 140 | status = ERROR; 141 | } 142 | 143 | return (status); 144 | } 145 | 146 | /** 147 | * @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct. 148 | * @param GPIOx GPIO Port 149 | * @param GPIO_InitStruct: pointer to a @ref LL_GPIO_InitTypeDef structure 150 | * that contains the configuration information for the specified GPIO peripheral. 151 | * @retval An ErrorStatus enumeration value: 152 | * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content 153 | * - ERROR: Not applicable 154 | */ 155 | ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct) 156 | { 157 | uint32_t pinmask; 158 | uint32_t pinpos; 159 | uint32_t currentpin; 160 | 161 | /* Check the parameters */ 162 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 163 | assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin)); 164 | 165 | /* ------------------------- Configure the port pins ---------------- */ 166 | /* Initialize pinpos on first pin set */ 167 | 168 | pinmask = ((GPIO_InitStruct->Pin) << GPIO_PIN_MASK_POS) >> GPIO_PIN_NB; 169 | pinpos = POSITION_VAL(pinmask); 170 | 171 | /* Configure the port pins */ 172 | while ((pinmask >> pinpos) != 0u) 173 | { 174 | /* skip if bit is not set */ 175 | if ((pinmask & (1u << pinpos)) != 0u) 176 | { 177 | /* Get current io position */ 178 | if (pinpos < GPIO_PIN_MASK_POS) 179 | { 180 | currentpin = (0x00000101uL << pinpos); 181 | } 182 | else 183 | { 184 | currentpin = ((0x00010001u << (pinpos - GPIO_PIN_MASK_POS)) | 0x04000000u); 185 | } 186 | 187 | if (GPIO_InitStruct->Mode == LL_GPIO_MODE_INPUT) 188 | { 189 | /* Check The Pull parameter */ 190 | assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull)); 191 | 192 | /* Pull-up Pull-down resistor configuration*/ 193 | LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull); 194 | } 195 | 196 | /* Check Pin Mode parameters */ 197 | assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode)); 198 | 199 | /* Pin Mode configuration */ 200 | LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode); 201 | 202 | if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) 203 | { 204 | /* Check speed and Output mode parameters */ 205 | assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed)); 206 | assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType)); 207 | 208 | /* Speed mode configuration */ 209 | LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed); 210 | 211 | /* Output mode configuration*/ 212 | LL_GPIO_SetPinOutputType(GPIOx, currentpin, GPIO_InitStruct->OutputType); 213 | } 214 | } 215 | pinpos++; 216 | } 217 | return (SUCCESS); 218 | } 219 | 220 | /** 221 | * @brief Set each @ref LL_GPIO_InitTypeDef field to default value. 222 | * @param GPIO_InitStruct: pointer to a @ref LL_GPIO_InitTypeDef structure 223 | * whose fields will be set to default values. 224 | * @retval None 225 | */ 226 | 227 | void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct) 228 | { 229 | /* Reset GPIO init structure parameters values */ 230 | GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL; 231 | GPIO_InitStruct->Mode = LL_GPIO_MODE_FLOATING; 232 | GPIO_InitStruct->Speed = LL_GPIO_SPEED_FREQ_LOW; 233 | GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_OPENDRAIN; 234 | GPIO_InitStruct->Pull = LL_GPIO_PULL_DOWN; 235 | } 236 | 237 | /** 238 | * @} 239 | */ 240 | 241 | /** 242 | * @} 243 | */ 244 | 245 | /** 246 | * @} 247 | */ 248 | 249 | #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) */ 250 | 251 | /** 252 | * @} 253 | */ 254 | 255 | #endif /* USE_FULL_LL_DRIVER */ 256 | 257 | -------------------------------------------------------------------------------- /Src/stm32f1xx_ll_i2c.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_i2c.c 4 | * @author MCD Application Team 5 | * @brief I2C LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32f1xx_ll_i2c.h" 22 | #include "stm32f1xx_ll_bus.h" 23 | #include "stm32f1xx_ll_rcc.h" 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif 29 | 30 | /** @addtogroup STM32F1xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (I2C1) || defined (I2C2) 35 | 36 | /** @defgroup I2C_LL I2C 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /** @addtogroup I2C_LL_Private_Macros 45 | * @{ 46 | */ 47 | 48 | #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \ 49 | ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \ 50 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \ 51 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP)) 52 | 53 | #define IS_LL_I2C_CLOCK_SPEED(__VALUE__) (((__VALUE__) > 0U) && ((__VALUE__) <= LL_I2C_MAX_SPEED_FAST)) 54 | 55 | #define IS_LL_I2C_DUTY_CYCLE(__VALUE__) (((__VALUE__) == LL_I2C_DUTYCYCLE_2) || \ 56 | ((__VALUE__) == LL_I2C_DUTYCYCLE_16_9)) 57 | 58 | #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU) 59 | 60 | #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \ 61 | ((__VALUE__) == LL_I2C_NACK)) 62 | 63 | #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \ 64 | ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT)) 65 | /** 66 | * @} 67 | */ 68 | 69 | /* Private function prototypes -----------------------------------------------*/ 70 | 71 | /* Exported functions --------------------------------------------------------*/ 72 | /** @addtogroup I2C_LL_Exported_Functions 73 | * @{ 74 | */ 75 | 76 | /** @addtogroup I2C_LL_EF_Init 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief De-initialize the I2C registers to their default reset values. 82 | * @param I2Cx I2C Instance. 83 | * @retval An ErrorStatus enumeration value: 84 | * - SUCCESS I2C registers are de-initialized 85 | * - ERROR I2C registers are not de-initialized 86 | */ 87 | uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx) 88 | { 89 | ErrorStatus status = SUCCESS; 90 | 91 | /* Check the I2C Instance I2Cx */ 92 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 93 | 94 | if (I2Cx == I2C1) 95 | { 96 | /* Force reset of I2C clock */ 97 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1); 98 | 99 | /* Release reset of I2C clock */ 100 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1); 101 | } 102 | #if defined(I2C2) 103 | else if (I2Cx == I2C2) 104 | { 105 | /* Force reset of I2C clock */ 106 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2); 107 | 108 | /* Release reset of I2C clock */ 109 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2); 110 | 111 | } 112 | #endif /* I2C2 */ 113 | else 114 | { 115 | status = ERROR; 116 | } 117 | 118 | return status; 119 | } 120 | 121 | /** 122 | * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct. 123 | * @param I2Cx I2C Instance. 124 | * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure. 125 | * @retval An ErrorStatus enumeration value: 126 | * - SUCCESS I2C registers are initialized 127 | * - ERROR Not applicable 128 | */ 129 | uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct) 130 | { 131 | LL_RCC_ClocksTypeDef rcc_clocks; 132 | 133 | /* Check the I2C Instance I2Cx */ 134 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 135 | 136 | /* Check the I2C parameters from I2C_InitStruct */ 137 | assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode)); 138 | assert_param(IS_LL_I2C_CLOCK_SPEED(I2C_InitStruct->ClockSpeed)); 139 | assert_param(IS_LL_I2C_DUTY_CYCLE(I2C_InitStruct->DutyCycle)); 140 | assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1)); 141 | assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge)); 142 | assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize)); 143 | 144 | /* Disable the selected I2Cx Peripheral */ 145 | LL_I2C_Disable(I2Cx); 146 | 147 | /* Retrieve Clock frequencies */ 148 | LL_RCC_GetSystemClocksFreq(&rcc_clocks); 149 | 150 | /*---------------------------- I2Cx SCL Clock Speed Configuration ------------ 151 | * Configure the SCL speed : 152 | * - ClockSpeed: I2C_CR2_FREQ[5:0], I2C_TRISE_TRISE[5:0], I2C_CCR_FS, 153 | * and I2C_CCR_CCR[11:0] bits 154 | * - DutyCycle: I2C_CCR_DUTY[7:0] bits 155 | */ 156 | LL_I2C_ConfigSpeed(I2Cx, rcc_clocks.PCLK1_Frequency, I2C_InitStruct->ClockSpeed, I2C_InitStruct->DutyCycle); 157 | 158 | /*---------------------------- I2Cx OAR1 Configuration ----------------------- 159 | * Disable, Configure and Enable I2Cx device own address 1 with parameters : 160 | * - OwnAddress1: I2C_OAR1_ADD[9:8], I2C_OAR1_ADD[7:1] and I2C_OAR1_ADD0 bits 161 | * - OwnAddrSize: I2C_OAR1_ADDMODE bit 162 | */ 163 | LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize); 164 | 165 | /*---------------------------- I2Cx MODE Configuration ----------------------- 166 | * Configure I2Cx peripheral mode with parameter : 167 | * - PeripheralMode: I2C_CR1_SMBUS, I2C_CR1_SMBTYPE and I2C_CR1_ENARP bits 168 | */ 169 | LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode); 170 | 171 | /* Enable the selected I2Cx Peripheral */ 172 | LL_I2C_Enable(I2Cx); 173 | 174 | /*---------------------------- I2Cx CR2 Configuration ------------------------ 175 | * Configure the ACKnowledge or Non ACKnowledge condition 176 | * after the address receive match code or next received byte with parameter : 177 | * - TypeAcknowledge: I2C_CR2_NACK bit 178 | */ 179 | LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge); 180 | 181 | return SUCCESS; 182 | } 183 | 184 | /** 185 | * @brief Set each @ref LL_I2C_InitTypeDef field to default value. 186 | * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure. 187 | * @retval None 188 | */ 189 | void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct) 190 | { 191 | /* Set I2C_InitStruct fields to default values */ 192 | I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C; 193 | I2C_InitStruct->ClockSpeed = 5000U; 194 | I2C_InitStruct->DutyCycle = LL_I2C_DUTYCYCLE_2; 195 | I2C_InitStruct->OwnAddress1 = 0U; 196 | I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK; 197 | I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; 198 | } 199 | 200 | /** 201 | * @} 202 | */ 203 | 204 | /** 205 | * @} 206 | */ 207 | 208 | /** 209 | * @} 210 | */ 211 | 212 | #endif /* I2C1 || I2C2 */ 213 | 214 | /** 215 | * @} 216 | */ 217 | 218 | #endif /* USE_FULL_LL_DRIVER */ 219 | 220 | -------------------------------------------------------------------------------- /Src/stm32f1xx_ll_pwr.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_pwr.c 4 | * @author MCD Application Team 5 | * @brief PWR LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f1xx_ll_pwr.h" 23 | #include "stm32f1xx_ll_bus.h" 24 | 25 | /** @addtogroup STM32F1xx_LL_Driver 26 | * @{ 27 | */ 28 | 29 | #if defined(PWR) 30 | 31 | /** @defgroup PWR_LL PWR 32 | * @{ 33 | */ 34 | 35 | /* Private types -------------------------------------------------------------*/ 36 | /* Private variables ---------------------------------------------------------*/ 37 | /* Private constants ---------------------------------------------------------*/ 38 | /* Private macros ------------------------------------------------------------*/ 39 | /* Private function prototypes -----------------------------------------------*/ 40 | 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup PWR_LL_Exported_Functions 43 | * @{ 44 | */ 45 | 46 | /** @addtogroup PWR_LL_EF_Init 47 | * @{ 48 | */ 49 | 50 | /** 51 | * @brief De-initialize the PWR registers to their default reset values. 52 | * @retval An ErrorStatus enumeration value: 53 | * - SUCCESS: PWR registers are de-initialized 54 | * - ERROR: not applicable 55 | */ 56 | ErrorStatus LL_PWR_DeInit(void) 57 | { 58 | /* Force reset of PWR clock */ 59 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR); 60 | 61 | /* Release reset of PWR clock */ 62 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR); 63 | 64 | return SUCCESS; 65 | } 66 | 67 | /** 68 | * @} 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** 76 | * @} 77 | */ 78 | #endif /* defined(PWR) */ 79 | /** 80 | * @} 81 | */ 82 | 83 | #endif /* USE_FULL_LL_DRIVER */ 84 | -------------------------------------------------------------------------------- /_htmresc/favicon.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/stm32f1xx-hal-driver/18074e3e5ecad0b380a5cf5a9131fe4b5ed1b2b7/_htmresc/favicon.png -------------------------------------------------------------------------------- /_htmresc/st_logo_2020.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/stm32f1xx-hal-driver/18074e3e5ecad0b380a5cf5a9131fe4b5ed1b2b7/_htmresc/st_logo_2020.png --------------------------------------------------------------------------------