├── _htmresc ├── favicon.png └── st_logo_2020.png ├── Src ├── stm32g0xx_hal_timebase_rtc_alarm_template.c ├── stm32g0xx_hal_timebase_rtc_wakeup_template.c ├── stm32g0xx_ll_crs.c ├── stm32g0xx_ll_pwr.c ├── stm32g0xx_ll_crc.c ├── stm32g0xx_hal_msp_template.c ├── stm32g0xx_hal_spi_ex.c ├── stm32g0xx_ll_rng.c ├── stm32g0xx_ll_ucpd.c ├── stm32g0xx_hal_timebase_tim_template.c ├── stm32g0xx_hal_crc_ex.c ├── stm32g0xx_ll_i2c.c ├── stm32g0xx_hal_smbus_ex.c ├── stm32g0xx_hal_pcd_ex.c ├── stm32g0xx_ll_comp.c ├── stm32g0xx_ll_gpio.c ├── stm32g0xx_ll_lptim.c ├── stm32g0xx_hal_iwdg.c └── stm32g0xx_hal_dma_ex.c ├── .github ├── PULL_REQUEST_TEMPLATE.md └── ISSUE_TEMPLATE │ ├── other-issue.md │ └── bug_report.md ├── LICENSE.md ├── SECURITY.md ├── Inc ├── stm32g0xx_hal_spi_ex.h ├── stm32_assert_template.h ├── stm32g0xx_hal_pcd_ex.h ├── stm32g0xx_hal_cryp_ex.h ├── stm32g0xx_hal_flash_ex.h ├── stm32g0xx_hal_crc_ex.h ├── stm32g0xx_hal_smbus_ex.h ├── stm32g0xx_hal_i2c_ex.h ├── stm32g0xx_hal_adc_ex.h ├── stm32g0xx_hal_iwdg.h ├── stm32g0xx_hal_def.h ├── stm32g0xx_ll_iwdg.h └── stm32g0xx_hal_wwdg.h ├── CONTRIBUTING.md ├── README.md └── CODE_OF_CONDUCT.md /_htmresc/favicon.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/stm32g0xx-hal-driver/HEAD/_htmresc/favicon.png -------------------------------------------------------------------------------- /_htmresc/st_logo_2020.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/stm32g0xx-hal-driver/HEAD/_htmresc/st_logo_2020.png -------------------------------------------------------------------------------- /Src/stm32g0xx_hal_timebase_rtc_alarm_template.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/stm32g0xx-hal-driver/HEAD/Src/stm32g0xx_hal_timebase_rtc_alarm_template.c -------------------------------------------------------------------------------- /Src/stm32g0xx_hal_timebase_rtc_wakeup_template.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/stm32g0xx-hal-driver/HEAD/Src/stm32g0xx_hal_timebase_rtc_wakeup_template.c -------------------------------------------------------------------------------- /.github/PULL_REQUEST_TEMPLATE.md: -------------------------------------------------------------------------------- 1 | ## IMPORTANT INFORMATION 2 | 3 | ### Contributor License Agreement (CLA) 4 | * The Pull Request feature will be considered by STMicroelectronics after the signature of a **Contributor License Agreement (CLA)** by the submitter. 5 | * If you did not sign such agreement, please follow the steps mentioned in the CONTRIBUTING.md file. 6 | -------------------------------------------------------------------------------- /.github/ISSUE_TEMPLATE/other-issue.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: 'Other Issue ' 3 | about: Generic issue description 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | 8 | --- 9 | 10 | **Caution** 11 | The Issues are strictly limited for the reporting of problem encountered with the software provided in this project. 12 | For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post a topic in the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus) 13 | 14 | **Describe the set-up** 15 | * The board (either ST RPN reference or your custom board) 16 | * IDE or at least the compiler and its version 17 | 18 | **Additional context** 19 | If you have a first analysis or a patch proposal, thank you to share your proposal. 20 | 21 | **Screenshots** 22 | If applicable, add screenshots to help explain your problem. 23 | -------------------------------------------------------------------------------- /.github/ISSUE_TEMPLATE/bug_report.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: Bug report 3 | about: Create a report to help us improve 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | 8 | --- 9 | 10 | **Caution** 11 | The Issues are strictly limited for the reporting of problem encountered with the software provided in this project. 12 | For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post a topic in the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus) 13 | 14 | **Describe the set-up** 15 | * The board (either ST RPN reference or your custom board) 16 | * IDE or at least the compiler and its version 17 | 18 | **Describe the bug** 19 | A clear and concise description of what the bug is. 20 | 21 | **How To Reproduce** 22 | 1. Indicate the global behavior of your application project 23 | 24 | 2. The modules that you suspect to be the cause of the problem (Driver, BSP, MW ...) 25 | 26 | 3. The use case that generates the problem 27 | 28 | 4. How we can reproduce the problem 29 | 30 | 31 | **Additional context** 32 | If you have a first analysis or patch correction, thank you to share your proposal. 33 | 34 | **Screenshots** 35 | If applicable, add screenshots to help explain your problem. 36 | -------------------------------------------------------------------------------- /LICENSE.md: -------------------------------------------------------------------------------- 1 | Copyright 2018 STMicroelectronics. 2 | All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without modification, 5 | are permitted provided that the following conditions are met: 6 | 7 | 1. Redistributions of source code must retain the above copyright notice, this 8 | list of conditions and the following disclaimer. 9 | 10 | 2. Redistributions in binary form must reproduce the above copyright notice, 11 | this list of conditions and the following disclaimer in the documentation and/or 12 | other materials provided with the distribution. 13 | 14 | 3. Neither the name of the copyright holder nor the names of its contributors 15 | may be used to endorse or promote products derived from this software without 16 | specific prior written permission. 17 | 18 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | -------------------------------------------------------------------------------- /SECURITY.md: -------------------------------------------------------------------------------- 1 | # Report potential product security vulnerabilities 2 | 3 | ST places a high priority on security, and our Product Security Incident 4 | Response Team (PSIRT) is committed to rapidly addressing potential security 5 | vulnerabilities affecting our products. PSIRT's long history and vast experience 6 | in security allows ST to perform clear analyses and provide appropriate guidance 7 | on mitigations and solutions when applicable. 8 | 9 | If you wish to report potential security vulnerabilities regarding our products, 10 | **please do not report them through public GitHub issues.** Instead, we 11 | encourage you to report them to our ST PSIRT following the process described at: 12 | **https://www.st.com/content/st_com/en/security/report-vulnerabilities.html** 13 | 14 | ### IMPORTANT - READ CAREFULLY: 15 | 16 | STMicroelectronics International N.V., on behalf of itself, its affiliates and 17 | subsidiaries, (collectively “ST”) takes all potential security vulnerability 18 | reports or other related communications (“Report(s)”) seriously. In order to 19 | review Your Report (the terms “You” and “Yours” include your employer, and all 20 | affiliates, subsidiaries and related persons or entities) and take actions as 21 | deemed appropriate, ST requires that we have the rights and Your permission to 22 | do so. 23 | 24 | As such, by submitting Your Report to ST, You agree that You have the right to 25 | do so, and You grant to ST the rights to use the Report for purposes related to 26 | security vulnerability analysis, testing, correction, patching, reporting and 27 | any other related purpose or function. 28 | 29 | By submitting Your Report, You agree that ST’s 30 | [Privacy Policy](https://www.st.com/content/st_com/en/common/privacy-portal.html) 31 | applies to all related communications. 32 | -------------------------------------------------------------------------------- /Inc/stm32g0xx_hal_spi_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_spi_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of SPI HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G0xx_HAL_SPI_EX_H 21 | #define STM32G0xx_HAL_SPI_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup SPIEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* Exported macros -----------------------------------------------------------*/ 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup SPIEx_Exported_Functions 43 | * @{ 44 | */ 45 | 46 | /* Initialization and de-initialization functions ****************************/ 47 | /* IO operation functions *****************************************************/ 48 | /** @addtogroup SPIEx_Exported_Functions_Group1 49 | * @{ 50 | */ 51 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi); 52 | /** 53 | * @} 54 | */ 55 | 56 | /** 57 | * @} 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | #ifdef __cplusplus 69 | } 70 | #endif 71 | 72 | #endif /* STM32G0xx_HAL_SPI_EX_H */ 73 | 74 | -------------------------------------------------------------------------------- /Inc/stm32_assert_template.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32_assert.h 4 | * @author MCD Application Team 5 | * @brief STM32 assert template file. 6 | * This file should be copied to the application folder and renamed 7 | * to stm32_assert.h. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * Copyright (c) 2018 STMicroelectronics. 12 | * All rights reserved. 13 | * 14 | * This software is licensed under terms that can be found in the LICENSE file 15 | * in the root directory of this software component. 16 | * If no LICENSE file comes with this software, it is provided AS-IS. 17 | * 18 | ****************************************************************************** 19 | */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef STM32_ASSERT_H 23 | #define STM32_ASSERT_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Exported types ------------------------------------------------------------*/ 30 | /* Exported constants --------------------------------------------------------*/ 31 | /* Includes ------------------------------------------------------------------*/ 32 | /* Exported macro ------------------------------------------------------------*/ 33 | #ifdef USE_FULL_ASSERT 34 | /** 35 | * @brief The assert_param macro is used for functions parameters check. 36 | * @param expr: If expr is false, it calls assert_failed function 37 | * which reports the name of the source file and the source 38 | * line number of the call that failed. 39 | * If expr is true, it returns no value. 40 | * @retval None 41 | */ 42 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) 43 | /* Exported functions ------------------------------------------------------- */ 44 | void assert_failed(uint8_t *file, uint32_t line); 45 | #else 46 | #define assert_param(expr) ((void)0U) 47 | #endif /* USE_FULL_ASSERT */ 48 | 49 | #ifdef __cplusplus 50 | } 51 | #endif 52 | 53 | #endif /* STM32_ASSERT_H */ 54 | 55 | 56 | 57 | -------------------------------------------------------------------------------- /Src/stm32g0xx_ll_crs.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_crs.h 4 | * @author MCD Application Team 5 | * @brief CRS LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g0xx_ll_crs.h" 22 | #include "stm32g0xx_ll_bus.h" 23 | 24 | /** @addtogroup STM32G0xx_LL_Driver 25 | * @{ 26 | */ 27 | 28 | #if defined(CRS) 29 | 30 | /** @defgroup CRS_LL CRS 31 | * @{ 32 | */ 33 | 34 | /* Private types -------------------------------------------------------------*/ 35 | /* Private variables ---------------------------------------------------------*/ 36 | /* Private constants ---------------------------------------------------------*/ 37 | /* Private macros ------------------------------------------------------------*/ 38 | /* Private function prototypes -----------------------------------------------*/ 39 | 40 | /* Exported functions --------------------------------------------------------*/ 41 | /** @addtogroup CRS_LL_Exported_Functions 42 | * @{ 43 | */ 44 | 45 | /** @addtogroup CRS_LL_EF_Init 46 | * @{ 47 | */ 48 | 49 | /** 50 | * @brief De-Initializes CRS peripheral registers to their default reset values. 51 | * @retval An ErrorStatus enumeration value: 52 | * - SUCCESS: CRS registers are de-initialized 53 | * - ERROR: not applicable 54 | */ 55 | ErrorStatus LL_CRS_DeInit(void) 56 | { 57 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_CRS); 58 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_CRS); 59 | 60 | return SUCCESS; 61 | } 62 | 63 | 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | #endif /* defined(CRS) */ 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | #endif /* USE_FULL_LL_DRIVER */ 84 | -------------------------------------------------------------------------------- /Src/stm32g0xx_ll_pwr.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_pwr.c 4 | * @author MCD Application Team 5 | * @brief PWR LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g0xx_ll_pwr.h" 22 | #include "stm32g0xx_ll_bus.h" 23 | 24 | /** @addtogroup STM32G0xx_LL_Driver 25 | * @{ 26 | */ 27 | 28 | #if defined(PWR) 29 | 30 | /** @defgroup PWR_LL PWR 31 | * @{ 32 | */ 33 | 34 | /* Private types -------------------------------------------------------------*/ 35 | /* Private variables ---------------------------------------------------------*/ 36 | /* Private constants ---------------------------------------------------------*/ 37 | /* Private macros ------------------------------------------------------------*/ 38 | /* Private function prototypes -----------------------------------------------*/ 39 | 40 | /* Exported functions --------------------------------------------------------*/ 41 | /** @addtogroup PWR_LL_Exported_Functions 42 | * @{ 43 | */ 44 | 45 | /** @addtogroup PWR_LL_EF_Init 46 | * @{ 47 | */ 48 | 49 | /** 50 | * @brief De-initialize the PWR registers to their default reset values. 51 | * @retval An ErrorStatus enumeration value: 52 | * - SUCCESS: PWR registers are de-initialized 53 | * - ERROR: not applicable 54 | */ 55 | ErrorStatus LL_PWR_DeInit(void) 56 | { 57 | /* Force reset of PWR clock */ 58 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR); 59 | 60 | /* Release reset of PWR clock */ 61 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR); 62 | 63 | return SUCCESS; 64 | } 65 | 66 | /** 67 | * @} 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | #endif /* defined(PWR) */ 78 | /** 79 | * @} 80 | */ 81 | 82 | #endif /* USE_FULL_LL_DRIVER */ 83 | -------------------------------------------------------------------------------- /CONTRIBUTING.md: -------------------------------------------------------------------------------- 1 | # Contributing guide 2 | 3 | This guide serves as a checklist before contributing to this repository. It mainly focuses on the steps to follow to submit an issue or a pull-request. 4 | 5 | ## 1. Issues 6 | 7 | ### 1.1 Before opening an issue 8 | 9 | Please check the following points before posting an issue: 10 | * Make sure you are using the latest commit (major releases are tagged, but corrections are available as new commits). 11 | * Make sure your issue is a question/feedback/suggestions **related to** the software provided in this repository. Otherwise, please refer to section [3](CONTRIBUTING.md#3-support-requests-and-questions) below. 12 | * Make sure your issue is not already reported/fixed on GitHub or discussed on a previous issue. Do not forget to browse into the **closed** issues. 13 | 14 | ### 1.2 Posting the issue 15 | 16 | When you have checked the previous points, create a new report from the **Issues** tab of this repository. A template is available [here](../../issues/new/choose) to help you report the issue you are facing or the enhancement you would like to propose. 17 | 18 | ## 2. Pull Requests 19 | 20 | ### 2.1 Before opening a pull-request 21 | 22 | STMicrolectronics is happy to receive contributions from the community, based on an initial Contributor License Agreement (CLA) procedure. 23 | 24 | * If you are an individual writing original source code and you are sure **you own the intellectual property**, then you need to sign an Individual [CLA](https://cla.st.com). 25 | * If you work for a company that wants also to allow you to contribute with your work, your company needs to provide a Corporate [CLA](https://cla.st.com) mentioning your GitHub account name. 26 | * If you are not sure that a CLA (Individual or Corporate) has been signed for your GitHub account you can check the [CLA](https://cla.st.com) dedicated page. 27 | 28 | Please note that: 29 | * The Corporate CLA will always take precedence over the Individual CLA. 30 | * One CLA submission is sufficient, for any project proposed by STMicroelectronics. 31 | 32 | ### 2.2 How to proceed 33 | 34 | * We recommend to engage first a communication thru an issue, in order to present your proposal, just to confirm that it corresponds to STMicroelectronics' domain or scope. 35 | * Then fork the project to your GitHub account to further develop your contribution. Please use the latest commit version. 36 | * Please, submit one pull-request per new feature or proposal. This will ease the analysis and the final merge if accepted. 37 | 38 | ## 3. Support requests and questions 39 | 40 | For support requests or any other question related to the product, the tools, the environment, you can submit a post to the **ST Community** on the appropriate topic [page](https://community.st.com/s/topiccatalog). 41 | -------------------------------------------------------------------------------- /Inc/stm32g0xx_hal_pcd_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_pcd_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of PCD HAL Extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G0xx_HAL_PCD_EX_H 21 | #define STM32G0xx_HAL_PCD_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif /* __cplusplus */ 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g0xx_hal_def.h" 29 | 30 | #if defined (USB_DRD_FS) 31 | /** @addtogroup STM32G0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup PCDEx 36 | * @{ 37 | */ 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* Exported macros -----------------------------------------------------------*/ 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions 43 | * @{ 44 | */ 45 | /** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 46 | * @{ 47 | */ 48 | 49 | 50 | 51 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, 52 | uint16_t ep_kind, uint32_t pmaadress); 53 | 54 | 55 | HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); 56 | HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); 57 | 58 | 59 | HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd); 60 | HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd); 61 | void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd); 62 | 63 | void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); 64 | void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); 65 | 66 | /** 67 | * @} 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | #endif /* defined (USB_DRD_FS) */ 82 | 83 | #ifdef __cplusplus 84 | } 85 | #endif /* __cplusplus */ 86 | 87 | 88 | #endif /* STM32G0xx_HAL_PCD_EX_H */ 89 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # STM32CubeG0 HAL Driver MCU Component 2 | 3 | ![latest tag](https://img.shields.io/github/v/tag/STMicroelectronics/stm32g0xx_hal_driver.svg?color=brightgreen) 4 | 5 | ## Overview 6 | 7 | **STM32Cube** is an STMicroelectronics original initiative to ease developers' life by reducing efforts, time and cost. 8 | 9 | **STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform delivered for each STM32 series. 10 | * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product. 11 | * The STM32 HAL-LL drivers, an abstraction layer offering a set of APIs ensuring maximized portability across the STM32 portfolio. 12 | * The BSP drivers of each evaluation, demonstration or nucleo board provided for this STM32 series. 13 | * A consistent set of middleware libraries such as RTOS, USB, FatFS, graphics, touch sensing library... 14 | * A full set of software projects (basic examples, applications, and demonstrations) for each board provided for this STM32 series. 15 | 16 | Two models of publication are proposed for the STM32Cube embedded software: 17 | * The monolithic **MCU Package**: all STM32Cube software modules of one STM32 series are present (Drivers, Middleware, Projects, Utilities) in the repository (usual name **STM32Cubexx**, xx corresponding to the STM32 series). 18 | * The **MCU component**: each STM32Cube software module being part of the STM32Cube MCU Package, is delivered as an individual repository, allowing the user to select and get only the required software functions. 19 | 20 | ## Description 21 | 22 | This **stm32g0xx_hal_driver** MCU component repo is one element of the STM32CubeG0 MCU embedded software package, providing the **HAL-LL Drivers** part. 23 | 24 | ## Release note 25 | 26 | Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/stm32g0xx_hal_driver/blob/master/Release_Notes.html). 27 | 28 | ## Compatibility information 29 | 30 | It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeG0/blob/master/Release_Notes.html) release note. 31 | 32 | The full **STM32CubeG0** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeG0). 33 | 34 | ## Troubleshooting 35 | 36 | If you have any issue with the **software content** of this repository, you can file an issue [here](https://github.com/STMicroelectronics/stm32g0xx_hal_driver/issues/new). 37 | 38 | For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus). 39 | -------------------------------------------------------------------------------- /Src/stm32g0xx_ll_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_crc.c 4 | * @author MCD Application Team 5 | * @brief CRC LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g0xx_ll_crc.h" 22 | #include "stm32g0xx_ll_bus.h" 23 | 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif /* USE_FULL_ASSERT */ 29 | 30 | /** @addtogroup STM32G0xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (CRC) 35 | 36 | /** @addtogroup CRC_LL 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /* Private function prototypes -----------------------------------------------*/ 45 | 46 | /* Exported functions --------------------------------------------------------*/ 47 | /** @addtogroup CRC_LL_Exported_Functions 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup CRC_LL_EF_Init 52 | * @{ 53 | */ 54 | 55 | /** 56 | * @brief De-initialize CRC registers (Registers restored to their default values). 57 | * @param CRCx CRC Instance 58 | * @retval An ErrorStatus enumeration value: 59 | * - SUCCESS: CRC registers are de-initialized 60 | * - ERROR: CRC registers are not de-initialized 61 | */ 62 | ErrorStatus LL_CRC_DeInit(const CRC_TypeDef *CRCx) 63 | { 64 | ErrorStatus status = SUCCESS; 65 | 66 | /* Check the parameters */ 67 | assert_param(IS_CRC_ALL_INSTANCE(CRCx)); 68 | 69 | if (CRCx == CRC) 70 | { 71 | /* Force CRC reset */ 72 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_CRC); 73 | 74 | /* Release CRC reset */ 75 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_CRC); 76 | } 77 | else 78 | { 79 | status = ERROR; 80 | } 81 | 82 | return (status); 83 | } 84 | 85 | /** 86 | * @} 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** 94 | * @} 95 | */ 96 | 97 | #endif /* defined (CRC) */ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | #endif /* USE_FULL_LL_DRIVER */ 104 | -------------------------------------------------------------------------------- /Src/stm32g0xx_hal_msp_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_msp_template.c 4 | * @author MCD Application Team 5 | * @brief HAL MSP module. 6 | * This file template is located in the HAL folder and should be copied 7 | * to the user folder. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * Copyright (c) 2018 STMicroelectronics. 12 | * All rights reserved. 13 | * 14 | * This software is licensed under terms that can be found in the LICENSE file 15 | * in the root directory of this software component. 16 | * If no LICENSE file comes with this software, it is provided AS-IS. 17 | * 18 | ****************************************************************************** 19 | */ 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32g0xx_hal.h" 23 | 24 | /** @addtogroup STM32G0xx_HAL_Driver 25 | * @{ 26 | */ 27 | 28 | /** @defgroup HAL_MSP HAL MSP module driver 29 | * @brief HAL MSP module. 30 | * @{ 31 | */ 32 | 33 | /* Private typedef -----------------------------------------------------------*/ 34 | /* Private define ------------------------------------------------------------*/ 35 | /* Private macro -------------------------------------------------------------*/ 36 | /* Private variables ---------------------------------------------------------*/ 37 | /* Private function prototypes -----------------------------------------------*/ 38 | /* Private functions ---------------------------------------------------------*/ 39 | 40 | /** @defgroup HAL_MSP_Private_Functions 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @brief Initialize the Global MSP. 46 | * @retval None 47 | */ 48 | void HAL_MspInit(void) 49 | { 50 | /* NOTE : This function is generated automatically by STM32CubeMX and eventually 51 | modified by the user 52 | */ 53 | } 54 | 55 | /** 56 | * @brief DeInitialize the Global MSP. 57 | * @retval None 58 | */ 59 | void HAL_MspDeInit(void) 60 | { 61 | /* NOTE : This function is generated automatically by STM32CubeMX and eventually 62 | modified by the user 63 | */ 64 | } 65 | 66 | /** 67 | * @brief Initialize the PPP MSP. 68 | * @retval None 69 | */ 70 | void HAL_PPP_MspInit(void) 71 | { 72 | /* NOTE : This function is generated automatically by STM32CubeMX and eventually 73 | modified by the user 74 | */ 75 | } 76 | 77 | /** 78 | * @brief DeInitialize the PPP MSP. 79 | * @retval None 80 | */ 81 | void HAL_PPP_MspDeInit(void) 82 | { 83 | /* NOTE : This function is generated automatically by STM32CubeMX and eventually 84 | modified by the user 85 | */ 86 | } 87 | 88 | /** 89 | * @} 90 | */ 91 | 92 | /** 93 | * @} 94 | */ 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | 101 | -------------------------------------------------------------------------------- /Src/stm32g0xx_hal_spi_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_spi_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended SPI HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * SPI peripheral extended functionalities : 8 | * + IO operation functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2018 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "stm32g0xx_hal.h" 25 | 26 | /** @addtogroup STM32G0xx_HAL_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup SPIEx SPIEx 31 | * @brief SPI Extended HAL module driver 32 | * @{ 33 | */ 34 | #ifdef HAL_SPI_MODULE_ENABLED 35 | 36 | /* Private typedef -----------------------------------------------------------*/ 37 | /* Private defines -----------------------------------------------------------*/ 38 | /** @defgroup SPIEx_Private_Constants SPIEx Private Constants 39 | * @{ 40 | */ 41 | #define SPI_FIFO_SIZE 4UL 42 | /** 43 | * @} 44 | */ 45 | 46 | /* Private macros ------------------------------------------------------------*/ 47 | /* Private variables ---------------------------------------------------------*/ 48 | /* Private function prototypes -----------------------------------------------*/ 49 | /* Exported functions --------------------------------------------------------*/ 50 | 51 | /** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions 52 | * @{ 53 | */ 54 | 55 | /** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions 56 | * @brief Data transfers functions 57 | * 58 | @verbatim 59 | ============================================================================== 60 | ##### IO operation functions ##### 61 | =============================================================================== 62 | [..] 63 | This subsection provides a set of extended functions to manage the SPI 64 | data transfers. 65 | 66 | (#) Rx data flush function: 67 | (++) HAL_SPIEx_FlushRxFifo() 68 | 69 | @endverbatim 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief Flush the RX fifo. 75 | * @param hspi pointer to a SPI_HandleTypeDef structure that contains 76 | * the configuration information for the specified SPI module. 77 | * @retval HAL status 78 | */ 79 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi) 80 | { 81 | __IO uint32_t tmpreg; 82 | uint8_t count = 0U; 83 | while ((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_FRLVL_EMPTY) 84 | { 85 | count++; 86 | tmpreg = hspi->Instance->DR; 87 | UNUSED(tmpreg); /* To avoid GCC warning */ 88 | if (count == SPI_FIFO_SIZE) 89 | { 90 | return HAL_TIMEOUT; 91 | } 92 | } 93 | return HAL_OK; 94 | } 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | #endif /* HAL_SPI_MODULE_ENABLED */ 105 | 106 | /** 107 | * @} 108 | */ 109 | 110 | /** 111 | * @} 112 | */ 113 | -------------------------------------------------------------------------------- /CODE_OF_CONDUCT.md: -------------------------------------------------------------------------------- 1 | # Contributor Covenant Code of Conduct 2 | 3 | ## Our Pledge 4 | 5 | In the interest of fostering an open and welcoming environment, we as 6 | contributors and maintainers pledge to making participation in our project and 7 | our community a harassment-free experience for everyone, regardless of age, body 8 | size, disability, ethnicity, sex characteristics, gender identity and expression, 9 | level of experience, education, socio-economic status, nationality, personal 10 | appearance, race, religion, or sexual identity and orientation. 11 | 12 | ## Our Standards 13 | 14 | Examples of behavior that contributes to creating a positive environment 15 | include: 16 | 17 | * Using welcoming and inclusive language 18 | * Being respectful of differing viewpoints and experiences 19 | * Gracefully accepting constructive criticism 20 | * Focusing on what is best for the community 21 | * Showing empathy towards other community members 22 | 23 | Examples of unacceptable behavior by participants include: 24 | 25 | * The use of sexualized language or imagery and unwelcome sexual attention or 26 | advances 27 | * Trolling, insulting/derogatory comments, and personal or political attacks 28 | * Public or private harassment 29 | * Publishing others' private information, such as a physical or electronic 30 | address, without explicit permission 31 | * Other conduct which could reasonably be considered inappropriate in a 32 | professional setting 33 | 34 | ## Our Responsibilities 35 | 36 | Project maintainers are responsible for clarifying the standards of acceptable 37 | behavior and are expected to take appropriate and fair corrective action in 38 | response to any instances of unacceptable behavior. 39 | 40 | Project maintainers have the right and responsibility to remove, edit, or 41 | reject comments, commits, code, wiki edits, issues, and other contributions 42 | that are not aligned to this Code of Conduct, or to ban temporarily or 43 | permanently any contributor for other behaviors that they deem inappropriate, 44 | threatening, offensive, or harmful. 45 | 46 | ## Scope 47 | 48 | This Code of Conduct applies both within project spaces and in public spaces 49 | when an individual is representing the project or its community. Examples of 50 | representing a project or community include using an official project e-mail 51 | address, posting via an official social media account, or acting as an appointed 52 | representative at an online or offline event. Representation of a project may be 53 | further defined and clarified by project maintainers. 54 | 55 | ## Enforcement 56 | 57 | Instances of abusive, harassing, or otherwise unacceptable behavior may be 58 | reported by contacting the project team at https://www.st.com/content/st_com/en/contact-us.html. All 59 | complaints will be reviewed and investigated and will result in a response that 60 | is deemed necessary and appropriate to the circumstances. The project team is 61 | obligated to maintain confidentiality with regard to the reporter of an incident. 62 | Further details of specific enforcement policies may be posted separately. 63 | 64 | Project maintainers who do not follow or enforce the Code of Conduct in good 65 | faith may face temporary or permanent repercussions as determined by other 66 | members of the project's leadership. 67 | 68 | ## Attribution 69 | 70 | This Code of Conduct is adapted from the [Contributor Covenant][homepage], version 1.4, 71 | available at https://www.contributor-covenant.org/version/1/4/code-of-conduct.html 72 | 73 | [homepage]: https://www.contributor-covenant.org 74 | 75 | For answers to common questions about this code of conduct, see 76 | https://www.contributor-covenant.org/faq 77 | -------------------------------------------------------------------------------- /Inc/stm32g0xx_hal_cryp_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_cryp_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRYPEx HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G0xx_HAL_CRYP_EX_H 21 | #define STM32G0xx_HAL_CRYP_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined(AES) 35 | 36 | /** @defgroup CRYPEx CRYPEx 37 | * @brief CRYP Extension HAL module driver. 38 | * @{ 39 | */ 40 | 41 | /* Exported types ------------------------------------------------------------*/ 42 | /* Exported constants --------------------------------------------------------*/ 43 | /* Private types -------------------------------------------------------------*/ 44 | /** @defgroup CRYPEx_Private_Types CRYPEx Private Types 45 | * @{ 46 | */ 47 | 48 | /** 49 | * @} 50 | */ 51 | 52 | /* Private variables ---------------------------------------------------------*/ 53 | /** @defgroup CRYPEx_Private_Variables CRYPEx Private Variables 54 | * @{ 55 | */ 56 | 57 | /** 58 | * @} 59 | */ 60 | 61 | /* Private constants ---------------------------------------------------------*/ 62 | /** @defgroup CRYPEx_Private_Constants CRYPEx Private Constants 63 | * @{ 64 | */ 65 | 66 | /** 67 | * @} 68 | */ 69 | 70 | /* Private macros ------------------------------------------------------------*/ 71 | /** @defgroup CRYPEx_Private_Macros CRYPEx Private Macros 72 | * @{ 73 | */ 74 | 75 | /** 76 | * @} 77 | */ 78 | 79 | /* Private functions ---------------------------------------------------------*/ 80 | /** @defgroup CRYPEx_Private_Functions CRYPEx Private Functions 81 | * @{ 82 | */ 83 | 84 | /** 85 | * @} 86 | */ 87 | 88 | /* Exported functions --------------------------------------------------------*/ 89 | /** @defgroup CRYPEx_Exported_Functions CRYPEx Exported Functions 90 | * @{ 91 | */ 92 | 93 | /** @addtogroup CRYPEx_Exported_Functions_Group1 94 | * @{ 95 | */ 96 | HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout); 97 | HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout); 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /** @addtogroup CRYPEx_Exported_Functions_Group2 104 | * @{ 105 | */ 106 | void HAL_CRYPEx_EnableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp); 107 | void HAL_CRYPEx_DisableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp); 108 | 109 | /** 110 | * @} 111 | */ 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | /** 118 | * @} 119 | */ 120 | #endif /* AES */ 121 | 122 | /** 123 | * @} 124 | */ 125 | 126 | #ifdef __cplusplus 127 | } 128 | #endif 129 | 130 | #endif /* STM32G0xx_HAL_CRYP_EX_H */ 131 | -------------------------------------------------------------------------------- /Inc/stm32g0xx_hal_flash_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_flash_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of FLASH HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | ****************************************************************************** 16 | */ 17 | 18 | /* Define to prevent recursive inclusion -------------------------------------*/ 19 | #ifndef STM32G0xx_HAL_FLASH_EX_H 20 | #define STM32G0xx_HAL_FLASH_EX_H 21 | 22 | #ifdef __cplusplus 23 | extern "C" { 24 | #endif 25 | 26 | /* Includes ------------------------------------------------------------------*/ 27 | #include "stm32g0xx_hal_def.h" 28 | 29 | /** @addtogroup STM32G0xx_HAL_Driver 30 | * @{ 31 | */ 32 | 33 | /** @addtogroup FLASHEx 34 | * @{ 35 | */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* Exported constants --------------------------------------------------------*/ 39 | /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants 40 | * @{ 41 | */ 42 | /** @defgroup FLASHEx_Empty_Check FLASHEx Empty Check 43 | * @{ 44 | */ 45 | #define FLASH_PROG_NOT_EMPTY 0x00000000u /*!< 1st location in Flash is programmed */ 46 | #define FLASH_PROG_EMPTY FLASH_ACR_PROGEMPTY /*!< 1st location in Flash is empty */ 47 | /** 48 | * @} 49 | */ 50 | /** 51 | * @} 52 | */ 53 | 54 | /* Exported macro ------------------------------------------------------------*/ 55 | /* Exported functions --------------------------------------------------------*/ 56 | /** @addtogroup FLASHEx_Exported_Functions 57 | * @{ 58 | */ 59 | 60 | /* Extended Program operation functions *************************************/ 61 | /** @addtogroup FLASHEx_Exported_Functions_Group1 62 | * @{ 63 | */ 64 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); 65 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 66 | void HAL_FLASHEx_EnableDebugger(void); 67 | void HAL_FLASHEx_DisableDebugger(void); 68 | uint32_t HAL_FLASHEx_FlashEmptyCheck(void); 69 | void HAL_FLASHEx_ForceFlashEmpty(uint32_t FlashEmpty); 70 | #if defined(FLASH_SECURABLE_MEMORY_SUPPORT) 71 | void HAL_FLASHEx_EnableSecMemProtection(uint32_t Banks); 72 | #endif /* FLASH_SECURABLE_MEMORY_SUPPORT */ 73 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 74 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 75 | /** 76 | * @} 77 | */ 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | /* Private macros ------------------------------------------------------------*/ 84 | /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants 85 | * @{ 86 | */ 87 | #define FLASH_PCROP_GRANULARITY_OFFSET 9u /*!< FLASH Code Readout Protection granularity offset */ 88 | #define FLASH_PCROP_GRANULARITY (1UL << FLASH_PCROP_GRANULARITY_OFFSET) /*!< FLASH Code Readout Protection granularity, 512 Bytes */ 89 | /** 90 | * @} 91 | */ 92 | 93 | 94 | /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros 95 | * @{ 96 | */ 97 | #define IS_FLASH_EMPTY_CHECK(__VALUE__) (((__VALUE__) == FLASH_PROG_EMPTY) || ((__VALUE__) == FLASH_PROG_NOT_EMPTY)) 98 | void FLASH_PageErase(uint32_t Banks, uint32_t Page); 99 | /** 100 | * @} 101 | */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | #ifdef __cplusplus 112 | } 113 | #endif 114 | 115 | #endif /* STM32G0xx_HAL_FLASH_EX_H */ 116 | 117 | -------------------------------------------------------------------------------- /Src/stm32g0xx_ll_rng.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_rng.c 4 | * @author MCD Application Team 5 | * @brief RNG LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g0xx_ll_rng.h" 22 | #include "stm32g0xx_ll_bus.h" 23 | 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif /* USE_FULL_ASSERT */ 29 | 30 | /** @addtogroup STM32G0xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (RNG) 35 | 36 | /** @addtogroup RNG_LL 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /** @defgroup RNG_LL_Private_Macros RNG Private Macros 45 | * @{ 46 | */ 47 | #define IS_LL_RNG_CED(__MODE__) (((__MODE__) == LL_RNG_CED_ENABLE) || \ 48 | ((__MODE__) == LL_RNG_CED_DISABLE)) 49 | 50 | /** 51 | * @} 52 | */ 53 | /* Private function prototypes -----------------------------------------------*/ 54 | 55 | /* Exported functions --------------------------------------------------------*/ 56 | /** @addtogroup RNG_LL_Exported_Functions 57 | * @{ 58 | */ 59 | 60 | /** @addtogroup RNG_LL_EF_Init 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @brief De-initialize RNG registers (Registers restored to their default values). 66 | * @param RNGx RNG Instance 67 | * @retval An ErrorStatus enumeration value: 68 | * - SUCCESS: RNG registers are de-initialized 69 | * - ERROR: not applicable 70 | */ 71 | ErrorStatus LL_RNG_DeInit(const RNG_TypeDef *RNGx) 72 | { 73 | ErrorStatus status = SUCCESS; 74 | 75 | /* Check the parameters */ 76 | assert_param(IS_RNG_ALL_INSTANCE(RNGx)); 77 | if (RNGx == RNG) 78 | { 79 | /* Enable RNG reset state */ 80 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_RNG); 81 | 82 | /* Release RNG from reset state */ 83 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_RNG); 84 | } 85 | else 86 | { 87 | status = ERROR; 88 | } 89 | 90 | return status; 91 | } 92 | 93 | /** 94 | * @brief Initialize RNG registers according to the specified parameters in RNG_InitStruct. 95 | * @param RNGx RNG Instance 96 | * @param RNG_InitStruct pointer to a LL_RNG_InitTypeDef structure 97 | * that contains the configuration information for the specified RNG peripheral. 98 | * @retval An ErrorStatus enumeration value: 99 | * - SUCCESS: RNG registers are initialized according to RNG_InitStruct content 100 | * - ERROR: not applicable 101 | */ 102 | ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, LL_RNG_InitTypeDef *RNG_InitStruct) 103 | { 104 | /* Check the parameters */ 105 | assert_param(IS_RNG_ALL_INSTANCE(RNGx)); 106 | assert_param(IS_LL_RNG_CED(RNG_InitStruct->ClockErrorDetection)); 107 | 108 | /* Clock Error Detection configuration */ 109 | MODIFY_REG(RNGx->CR, RNG_CR_CED, RNG_InitStruct->ClockErrorDetection); 110 | 111 | return (SUCCESS); 112 | } 113 | 114 | /** 115 | * @brief Set each @ref LL_RNG_InitTypeDef field to default value. 116 | * @param RNG_InitStruct pointer to a @ref LL_RNG_InitTypeDef structure 117 | * whose fields will be set to default values. 118 | * @retval None 119 | */ 120 | void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct) 121 | { 122 | /* Set RNG_InitStruct fields to default values */ 123 | RNG_InitStruct->ClockErrorDetection = LL_RNG_CED_ENABLE; 124 | 125 | } 126 | /** 127 | * @} 128 | */ 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | /** 135 | * @} 136 | */ 137 | 138 | #endif /* RNG */ 139 | 140 | /** 141 | * @} 142 | */ 143 | 144 | #endif /* USE_FULL_LL_DRIVER */ 145 | 146 | -------------------------------------------------------------------------------- /Inc/stm32g0xx_hal_crc_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_crc_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC HAL extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G0xx_HAL_CRC_EX_H 21 | #define STM32G0xx_HAL_CRC_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup CRCEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /** @defgroup CRCEx_Exported_Constants CRC Extended Exported Constants 41 | * @{ 42 | */ 43 | 44 | /** @defgroup CRCEx_Input_Data_Inversion Input Data Inversion Modes 45 | * @{ 46 | */ 47 | #define CRC_INPUTDATA_INVERSION_NONE 0x00000000U /*!< No input data inversion */ 48 | #define CRC_INPUTDATA_INVERSION_BYTE CRC_CR_REV_IN_0 /*!< Byte-wise input data inversion */ 49 | #define CRC_INPUTDATA_INVERSION_HALFWORD CRC_CR_REV_IN_1 /*!< HalfWord-wise input data inversion */ 50 | #define CRC_INPUTDATA_INVERSION_WORD CRC_CR_REV_IN /*!< Word-wise input data inversion */ 51 | /** 52 | * @} 53 | */ 54 | 55 | /** @defgroup CRCEx_Output_Data_Inversion Output Data Inversion Modes 56 | * @{ 57 | */ 58 | #define CRC_OUTPUTDATA_INVERSION_DISABLE 0x00000000U /*!< No output data inversion */ 59 | #define CRC_OUTPUTDATA_INVERSION_ENABLE CRC_CR_REV_OUT /*!< Bit-wise output data inversion */ 60 | /** 61 | * @} 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /* Exported macro ------------------------------------------------------------*/ 69 | /** @defgroup CRCEx_Exported_Macros CRC Extended Exported Macros 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief Set CRC output reversal 75 | * @param __HANDLE__ CRC handle 76 | * @retval None 77 | */ 78 | #define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT) 79 | 80 | /** 81 | * @brief Unset CRC output reversal 82 | * @param __HANDLE__ CRC handle 83 | * @retval None 84 | */ 85 | #define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT)) 86 | 87 | /** 88 | * @brief Set CRC non-default polynomial 89 | * @param __HANDLE__ CRC handle 90 | * @param __POLYNOMIAL__ 7, 8, 16 or 32-bit polynomial 91 | * @retval None 92 | */ 93 | #define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__)) 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /* Private macros --------------------------------------------------------*/ 100 | /** @defgroup CRCEx_Private_Macros CRC Extended Private Macros 101 | * @{ 102 | */ 103 | 104 | #define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \ 105 | ((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \ 106 | ((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \ 107 | ((MODE) == CRC_INPUTDATA_INVERSION_WORD)) 108 | 109 | #define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \ 110 | ((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLE)) 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /* Exported functions --------------------------------------------------------*/ 117 | 118 | /** @addtogroup CRCEx_Exported_Functions 119 | * @{ 120 | */ 121 | 122 | /** @addtogroup CRCEx_Exported_Functions_Group1 123 | * @{ 124 | */ 125 | /* Initialization and de-initialization functions ****************************/ 126 | HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength); 127 | HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode); 128 | HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode); 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | /** 135 | * @} 136 | */ 137 | 138 | /** 139 | * @} 140 | */ 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | #ifdef __cplusplus 147 | } 148 | #endif 149 | 150 | #endif /* STM32G0xx_HAL_CRC_EX_H */ 151 | -------------------------------------------------------------------------------- /Src/stm32g0xx_ll_ucpd.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_ucpd.c 4 | * @author MCD Application Team 5 | * @brief UCPD LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g0xx_ll_ucpd.h" 22 | #include "stm32g0xx_ll_bus.h" 23 | #include "stm32g0xx_ll_rcc.h" 24 | 25 | #ifdef USE_FULL_ASSERT 26 | #include "stm32_assert.h" 27 | #else 28 | #define assert_param(expr) ((void)0U) 29 | #endif /* USE_FULL_ASSERT */ 30 | 31 | /** @addtogroup STM32G0xx_LL_Driver 32 | * @{ 33 | */ 34 | #if defined (UCPD1) || defined (UCPD2) 35 | /** @addtogroup UCPD_LL 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | 42 | /* Private constants ---------------------------------------------------------*/ 43 | /** @defgroup UCPD_LL_Private_Constants UCPD Private Constants 44 | * @{ 45 | */ 46 | 47 | /** 48 | * @} 49 | */ 50 | 51 | /* Private macros ------------------------------------------------------------*/ 52 | /** @defgroup UCPD_LL_Private_Macros UCPD Private Macros 53 | * @{ 54 | */ 55 | 56 | 57 | /** 58 | * @} 59 | */ 60 | 61 | /* Private function prototypes -----------------------------------------------*/ 62 | 63 | /* Exported functions --------------------------------------------------------*/ 64 | /** @addtogroup UCPD_LL_Exported_Functions 65 | * @{ 66 | */ 67 | 68 | /** @addtogroup UCPD_LL_EF_Init 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @brief De-initialize the UCPD registers to their default reset values. 74 | * @param UCPDx ucpd Instance 75 | * @retval An ErrorStatus enumeration value: 76 | * - SUCCESS: ucpd registers are de-initialized 77 | * - ERROR: ucpd registers are not de-initialized 78 | */ 79 | ErrorStatus LL_UCPD_DeInit(UCPD_TypeDef *UCPDx) 80 | { 81 | ErrorStatus status = ERROR; 82 | 83 | /* Check the parameters */ 84 | assert_param(IS_UCPD_ALL_INSTANCE(UCPDx)); 85 | 86 | LL_UCPD_Disable(UCPDx); 87 | 88 | if (UCPD1 == UCPDx) 89 | { 90 | /* Force reset of ucpd clock */ 91 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UCPD1); 92 | 93 | /* Release reset of ucpd clock */ 94 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UCPD1); 95 | 96 | /* Disable ucpd clock */ 97 | LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_UCPD1); 98 | 99 | status = SUCCESS; 100 | } 101 | if (UCPD2 == UCPDx) 102 | { 103 | /* Force reset of ucpd clock */ 104 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UCPD2); 105 | 106 | /* Release reset of ucpd clock */ 107 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UCPD2); 108 | 109 | /* Disable ucpd clock */ 110 | LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_UCPD2); 111 | 112 | status = SUCCESS; 113 | } 114 | 115 | return status; 116 | } 117 | 118 | /** 119 | * @brief Initialize the ucpd registers according to the specified parameters in UCPD_InitStruct. 120 | * @note As some bits in ucpd configuration registers can only be written when the ucpd is disabled 121 | * (ucpd_CR1_SPE bit =0), UCPD peripheral should be in disabled state prior calling this function. 122 | * Otherwise, ERROR result will be returned. 123 | * @param UCPDx UCPD Instance 124 | * @param UCPD_InitStruct pointer to a @ref LL_UCPD_InitTypeDef structure that contains 125 | * the configuration information for the UCPD peripheral. 126 | * @retval An ErrorStatus enumeration value. (Return always SUCCESS) 127 | */ 128 | ErrorStatus LL_UCPD_Init(UCPD_TypeDef *UCPDx, LL_UCPD_InitTypeDef *UCPD_InitStruct) 129 | { 130 | /* Check the ucpd Instance UCPDx*/ 131 | assert_param(IS_UCPD_ALL_INSTANCE(UCPDx)); 132 | 133 | if (UCPD1 == UCPDx) 134 | { 135 | LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_UCPD1); 136 | } 137 | 138 | if (UCPD2 == UCPDx) 139 | { 140 | LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_UCPD2); 141 | } 142 | 143 | LL_UCPD_Disable(UCPDx); 144 | 145 | /*---------------------------- UCPDx CFG1 Configuration ------------------------*/ 146 | MODIFY_REG(UCPDx->CFG1, 147 | UCPD_CFG1_PSC_UCPDCLK | UCPD_CFG1_TRANSWIN | UCPD_CFG1_IFRGAP | UCPD_CFG1_HBITCLKDIV, 148 | UCPD_InitStruct->psc_ucpdclk | (UCPD_InitStruct->transwin << UCPD_CFG1_TRANSWIN_Pos) | 149 | (UCPD_InitStruct->IfrGap << UCPD_CFG1_IFRGAP_Pos) | UCPD_InitStruct->HbitClockDiv); 150 | 151 | return SUCCESS; 152 | } 153 | 154 | /** 155 | * @brief Set each @ref LL_UCPD_InitTypeDef field to default value. 156 | * @param UCPD_InitStruct pointer to a @ref LL_UCPD_InitTypeDef structure 157 | * whose fields will be set to default values. 158 | * @retval None 159 | */ 160 | void LL_UCPD_StructInit(LL_UCPD_InitTypeDef *UCPD_InitStruct) 161 | { 162 | /* Set UCPD_InitStruct fields to default values */ 163 | UCPD_InitStruct->psc_ucpdclk = LL_UCPD_PSC_DIV2; 164 | UCPD_InitStruct->transwin = 0x7; /* Divide by 8 */ 165 | UCPD_InitStruct->IfrGap = 0x10; /* Divide by 17 */ 166 | UCPD_InitStruct->HbitClockDiv = 0x0D; /* Divide by 14 to produce HBITCLK */ 167 | } 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | /** 174 | * @} 175 | */ 176 | 177 | /** 178 | * @} 179 | */ 180 | #endif /* defined (UCPD1) || defined (UCPD2) */ 181 | /** 182 | * @} 183 | */ 184 | 185 | #endif /* USE_FULL_LL_DRIVER */ 186 | 187 | -------------------------------------------------------------------------------- /Inc/stm32g0xx_hal_smbus_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_smbus_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of SMBUS HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G0xx_HAL_SMBUS_EX_H 21 | #define STM32G0xx_HAL_SMBUS_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup SMBUSEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /** @defgroup SMBUSEx_Exported_Constants SMBUS Extended Exported Constants 41 | * @{ 42 | */ 43 | 44 | /** @defgroup SMBUSEx_FastModePlus SMBUS Extended Fast Mode Plus 45 | * @{ 46 | */ 47 | #define SMBUS_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */ 48 | #define SMBUS_FASTMODEPLUS_PA9 SYSCFG_CFGR1_I2C_PA9_FMP /*!< Enable Fast Mode Plus on PA9 */ 49 | #define SMBUS_FASTMODEPLUS_PA10 SYSCFG_CFGR1_I2C_PA10_FMP /*!< Enable Fast Mode Plus on PA10 */ 50 | #define SMBUS_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ 51 | #define SMBUS_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ 52 | #define SMBUS_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ 53 | #define SMBUS_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ 54 | #define SMBUS_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ 55 | #define SMBUS_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */ 56 | #if defined(SYSCFG_CFGR1_I2C3_FMP) 57 | #define SMBUS_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */ 58 | #else 59 | #define SMBUS_FASTMODEPLUS_I2C3 (uint32_t)(0x00000400U | SMBUS_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C3 not supported */ 60 | #endif /* SYSCFG_CFGR1_I2C3_FMP */ 61 | /** 62 | * @} 63 | */ 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | /* Exported macro ------------------------------------------------------------*/ 70 | /** @defgroup SMBUSEx_Exported_Macros SMBUS Extended Exported Macros 71 | * @{ 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | /* Exported functions --------------------------------------------------------*/ 79 | /** @addtogroup SMBUSEx_Exported_Functions SMBUS Extended Exported Functions 80 | * @{ 81 | */ 82 | 83 | /** @addtogroup SMBUSEx_Exported_Functions_Group2 WakeUp Mode Functions 84 | * @{ 85 | */ 86 | /* Peripheral Control functions ************************************************/ 87 | HAL_StatusTypeDef HAL_SMBUSEx_EnableWakeUp(SMBUS_HandleTypeDef *hsmbus); 88 | HAL_StatusTypeDef HAL_SMBUSEx_DisableWakeUp(SMBUS_HandleTypeDef *hsmbus); 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @addtogroup SMBUSEx_Exported_Functions_Group3 Fast Mode Plus Functions 94 | * @{ 95 | */ 96 | void HAL_SMBUSEx_EnableFastModePlus(uint32_t ConfigFastModePlus); 97 | void HAL_SMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus); 98 | /** 99 | * @} 100 | */ 101 | 102 | /** 103 | * @} 104 | */ 105 | 106 | /* Private constants ---------------------------------------------------------*/ 107 | /** @defgroup SMBUSEx_Private_Constants SMBUS Extended Private Constants 108 | * @{ 109 | */ 110 | 111 | /** 112 | * @} 113 | */ 114 | 115 | /* Private macros ------------------------------------------------------------*/ 116 | /** @defgroup SMBUSEx_Private_Macro SMBUS Extended Private Macros 117 | * @{ 118 | */ 119 | #define IS_SMBUS_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & SMBUS_FMP_NOT_SUPPORTED) != SMBUS_FMP_NOT_SUPPORTED) && \ 120 | ((((__CONFIG__) & (SMBUS_FASTMODEPLUS_PA9)) == SMBUS_FASTMODEPLUS_PA9) || \ 121 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PA10)) == SMBUS_FASTMODEPLUS_PA10) || \ 122 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB6)) == SMBUS_FASTMODEPLUS_PB6) || \ 123 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB7)) == SMBUS_FASTMODEPLUS_PB7) || \ 124 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB8)) == SMBUS_FASTMODEPLUS_PB8) || \ 125 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB9)) == SMBUS_FASTMODEPLUS_PB9) || \ 126 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C1)) == SMBUS_FASTMODEPLUS_I2C1) || \ 127 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C2)) == SMBUS_FASTMODEPLUS_I2C2) || \ 128 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C3)) == SMBUS_FASTMODEPLUS_I2C3))) 129 | /** 130 | * @} 131 | */ 132 | 133 | /* Private Functions ---------------------------------------------------------*/ 134 | /** @defgroup SMBUSEx_Private_Functions SMBUS Extended Private Functions 135 | * @{ 136 | */ 137 | /* Private functions are defined in stm32g0xx_hal_smbus_ex.c file */ 138 | /** 139 | * @} 140 | */ 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | #ifdef __cplusplus 151 | } 152 | #endif 153 | 154 | #endif /* STM32G0xx_HAL_SMBUS_EX_H */ 155 | -------------------------------------------------------------------------------- /Inc/stm32g0xx_hal_i2c_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_i2c_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of I2C HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G0xx_HAL_I2C_EX_H 21 | #define STM32G0xx_HAL_I2C_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup I2CEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants 41 | * @{ 42 | */ 43 | 44 | /** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter 45 | * @{ 46 | */ 47 | #define I2C_ANALOGFILTER_ENABLE 0x00000000U 48 | #define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF 49 | /** 50 | * @} 51 | */ 52 | 53 | /** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus 54 | * @{ 55 | */ 56 | #define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */ 57 | #define I2C_FASTMODEPLUS_PA9 SYSCFG_CFGR1_I2C_PA9_FMP /*!< Enable Fast Mode Plus on PA9 */ 58 | #define I2C_FASTMODEPLUS_PA10 SYSCFG_CFGR1_I2C_PA10_FMP /*!< Enable Fast Mode Plus on PA10 */ 59 | #define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ 60 | #define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ 61 | #define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ 62 | #define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ 63 | #define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ 64 | #define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */ 65 | #if defined(SYSCFG_CFGR1_I2C3_FMP) 66 | #define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */ 67 | #else 68 | #define I2C_FASTMODEPLUS_I2C3 (uint32_t)(0x00000400U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C3 not supported */ 69 | #endif /* SYSCFG_CFGR1_I2C3_FMP */ 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | /* Exported macro ------------------------------------------------------------*/ 79 | /** @defgroup I2CEx_Exported_Macros I2C Extended Exported Macros 80 | * @{ 81 | */ 82 | 83 | /** 84 | * @} 85 | */ 86 | 87 | /* Exported functions --------------------------------------------------------*/ 88 | /** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions 89 | * @{ 90 | */ 91 | 92 | /** @addtogroup I2CEx_Exported_Functions_Group1 Filter Mode Functions 93 | * @{ 94 | */ 95 | /* Peripheral Control functions ************************************************/ 96 | HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter); 97 | HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter); 98 | /** 99 | * @} 100 | */ 101 | 102 | /** @addtogroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions 103 | * @{ 104 | */ 105 | HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c); 106 | HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c); 107 | /** 108 | * @} 109 | */ 110 | 111 | /** @addtogroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions 112 | * @{ 113 | */ 114 | void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus); 115 | void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); 116 | /** 117 | * @} 118 | */ 119 | 120 | /** 121 | * @} 122 | */ 123 | 124 | /* Private constants ---------------------------------------------------------*/ 125 | /** @defgroup I2CEx_Private_Constants I2C Extended Private Constants 126 | * @{ 127 | */ 128 | 129 | /** 130 | * @} 131 | */ 132 | 133 | /* Private macros ------------------------------------------------------------*/ 134 | /** @defgroup I2CEx_Private_Macro I2C Extended Private Macros 135 | * @{ 136 | */ 137 | #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \ 138 | ((FILTER) == I2C_ANALOGFILTER_DISABLE)) 139 | 140 | #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) 141 | 142 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \ 143 | ((((__CONFIG__) & (I2C_FASTMODEPLUS_PA9)) == I2C_FASTMODEPLUS_PA9) || \ 144 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PA10)) == I2C_FASTMODEPLUS_PA10) || \ 145 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \ 146 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \ 147 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \ 148 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \ 149 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \ 150 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \ 151 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3))) 152 | /** 153 | * @} 154 | */ 155 | 156 | /* Private Functions ---------------------------------------------------------*/ 157 | /** @defgroup I2CEx_Private_Functions I2C Extended Private Functions 158 | * @{ 159 | */ 160 | /* Private functions are defined in stm32g0xx_hal_i2c_ex.c file */ 161 | /** 162 | * @} 163 | */ 164 | 165 | /** 166 | * @} 167 | */ 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | #ifdef __cplusplus 174 | } 175 | #endif 176 | 177 | #endif /* STM32G0xx_HAL_I2C_EX_H */ 178 | -------------------------------------------------------------------------------- /Inc/stm32g0xx_hal_adc_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_adc_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of ADC HAL extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G0xx_HAL_ADC_EX_H 21 | #define STM32G0xx_HAL_ADC_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup ADCEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup ADCEx_Exported_Types ADC Extended Exported Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @} 45 | */ 46 | 47 | /* Exported constants --------------------------------------------------------*/ 48 | 49 | /** @defgroup ADCEx_Exported_Constants ADC Extended Exported Constants 50 | * @{ 51 | */ 52 | 53 | /** @defgroup ADC_HAL_EC_GROUPS ADC instance - Groups 54 | * @{ 55 | */ 56 | #define ADC_REGULAR_GROUP (LL_ADC_GROUP_REGULAR) /*!< ADC group regular (available on 57 | all STM32 devices) */ 58 | /** 59 | * @} 60 | */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /* Exported macros -----------------------------------------------------------*/ 67 | 68 | /* Private macros ------------------------------------------------------------*/ 69 | 70 | /** @defgroup ADCEx_Private_Macro_internal_HAL_driver ADC Extended Private Macros 71 | * @{ 72 | */ 73 | /* Macro reserved for internal HAL driver usage, not intended to be used in */ 74 | /* code of final user. */ 75 | 76 | /** 77 | * @brief Check whether or not ADC is independent. 78 | * @param __HANDLE__ ADC handle. 79 | * @note When multimode feature is not available, the macro always returns SET. 80 | * @retval SET (ADC is independent) or RESET (ADC is not). 81 | */ 82 | #define ADC_IS_INDEPENDENT(__HANDLE__) (SET) 83 | 84 | 85 | /** 86 | * @brief Calibration factor size verification (7 bits maximum). 87 | * @param __CALIBRATION_FACTOR__ Calibration factor value. 88 | * @retval SET (__CALIBRATION_FACTOR__ is within the authorized size) or RESET (__CALIBRATION_FACTOR__ is too large) 89 | */ 90 | #define IS_ADC_CALFACT(__CALIBRATION_FACTOR__) ((__CALIBRATION_FACTOR__) <= (0x7FU)) 91 | 92 | /** 93 | * @brief Verify the ADC oversampling ratio. 94 | * @param __RATIO__ programmed ADC oversampling ratio. 95 | * @retval SET (__RATIO__ is a valid value) or RESET (__RATIO__ is invalid) 96 | */ 97 | #define IS_ADC_OVERSAMPLING_RATIO(__RATIO__) (((__RATIO__) == ADC_OVERSAMPLING_RATIO_2 ) || \ 98 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_4 ) || \ 99 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_8 ) || \ 100 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_16 ) || \ 101 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_32 ) || \ 102 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_64 ) || \ 103 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_128 ) || \ 104 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_256 )) 105 | 106 | /** 107 | * @brief Verify the ADC oversampling shift. 108 | * @param __SHIFT__ programmed ADC oversampling shift. 109 | * @retval SET (__SHIFT__ is a valid value) or RESET (__SHIFT__ is invalid) 110 | */ 111 | #define IS_ADC_RIGHT_BIT_SHIFT(__SHIFT__) (((__SHIFT__) == ADC_RIGHTBITSHIFT_NONE) || \ 112 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_1 ) || \ 113 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_2 ) || \ 114 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_3 ) || \ 115 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_4 ) || \ 116 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_5 ) || \ 117 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_6 ) || \ 118 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_7 ) || \ 119 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_8 )) 120 | 121 | /** 122 | * @brief Verify the ADC oversampling triggered mode. 123 | * @param __MODE__ programmed ADC oversampling triggered mode. 124 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 125 | */ 126 | #define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(__MODE__) (((__MODE__) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) || \ 127 | ((__MODE__) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) ) 128 | 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | 135 | /* Exported functions --------------------------------------------------------*/ 136 | /** @addtogroup ADCEx_Exported_Functions 137 | * @{ 138 | */ 139 | 140 | /** @addtogroup ADCEx_Exported_Functions_Group1 141 | * @{ 142 | */ 143 | /* IO operation functions *****************************************************/ 144 | 145 | /* ADC calibration */ 146 | HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc); 147 | uint32_t HAL_ADCEx_Calibration_GetValue(const ADC_HandleTypeDef *hadc); 148 | HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t CalibrationFactor); 149 | 150 | /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */ 151 | void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc); 152 | void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc); 153 | void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc); 154 | void HAL_ADCEx_ChannelConfigReadyCallback(ADC_HandleTypeDef *hadc); 155 | 156 | /** 157 | * @} 158 | */ 159 | 160 | /** @addtogroup ADCEx_Exported_Functions_Group2 161 | * @{ 162 | */ 163 | /* Peripheral Control functions ***********************************************/ 164 | HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc); 165 | 166 | /** 167 | * @} 168 | */ 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | #ifdef __cplusplus 183 | } 184 | #endif 185 | 186 | #endif /* STM32G0xx_HAL_ADC_EX_H */ 187 | -------------------------------------------------------------------------------- /Src/stm32g0xx_hal_timebase_tim_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_timebase_tim_template.c 4 | * @author MCD Application Team 5 | * @brief HAL time base based on the hardware TIM Template. 6 | * 7 | * This file overrides the native HAL time base functions (defined as weak) 8 | * the TIM time base: 9 | * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms 10 | * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms 11 | * 12 | ****************************************************************************** 13 | * @attention 14 | * 15 | * Copyright (c) 2018 STMicroelectronics. 16 | * All rights reserved. 17 | * 18 | * This software is licensed under terms that can be found in the LICENSE file 19 | * in the root directory of this software component. 20 | * If no LICENSE file comes with this software, it is provided AS-IS. 21 | * 22 | ****************************************************************************** 23 | @verbatim 24 | ============================================================================== 25 | ##### How to use this driver ##### 26 | ============================================================================== 27 | [..] 28 | This file must be copied to the application folder and modified as follows: 29 | (#) Rename it to 'stm32g0xx_hal_timebase_tim.c' 30 | (#) Add this file and the TIM HAL driver files to your project and make sure 31 | HAL_TIM_MODULE_ENABLED is defined in stm32g0xx_hal_conf.h 32 | 33 | [..] 34 | (@) The application needs to ensure that the time base is always set to 1 millisecond 35 | to have correct HAL operation. 36 | 37 | @endverbatim 38 | ****************************************************************************** 39 | */ 40 | 41 | /* Includes ------------------------------------------------------------------*/ 42 | #include "stm32g0xx_hal.h" 43 | 44 | /** @addtogroup STM32G0xx_HAL_Driver 45 | * @{ 46 | */ 47 | 48 | /** @addtogroup HAL_TimeBase_TIM 49 | * @{ 50 | */ 51 | 52 | /* Private typedef -----------------------------------------------------------*/ 53 | /* Private define ------------------------------------------------------------*/ 54 | /* Private macro -------------------------------------------------------------*/ 55 | /* Private variables ---------------------------------------------------------*/ 56 | TIM_HandleTypeDef TimHandle = {.Init = {0}}; 57 | 58 | /* Private function prototypes -----------------------------------------------*/ 59 | void TIM14_IRQHandler(void); 60 | /* Private functions ---------------------------------------------------------*/ 61 | 62 | /** 63 | * @brief This function configures the TIM14 as a time base source. 64 | * The time source is configured to have 1ms time base with a dedicated 65 | * Tick interrupt priority. 66 | * @note This function is called automatically at the beginning of program 67 | * after reset by HAL_Init() or at any time when clock is configured, 68 | * by HAL_RCC_ClockConfig(). 69 | * @param TickPriority Tick interrupt priority. 70 | * @retval HAL status 71 | */ 72 | HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) 73 | { 74 | RCC_ClkInitTypeDef clkconfig; 75 | uint32_t uwTimclock; 76 | uint32_t uwAPB1Prescaler; 77 | uint32_t uwPrescalerValue; 78 | uint32_t pFLatency; 79 | HAL_StatusTypeDef status = HAL_OK; 80 | 81 | /* Check uwTickFreq for MisraC 2012 (even if uwTickFreq is a enum type that don't take the value zero)*/ 82 | if ((uint32_t)uwTickFreq != 0U) 83 | { 84 | /* Enable TIM14 clock */ 85 | __HAL_RCC_TIM14_CLK_ENABLE(); 86 | 87 | /* Get clock configuration */ 88 | HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); 89 | 90 | /* Get APB1 prescaler */ 91 | uwAPB1Prescaler = clkconfig.APB1CLKDivider; 92 | 93 | /* Compute TIM14 clock */ 94 | if (uwAPB1Prescaler == RCC_HCLK_DIV1) 95 | { 96 | uwTimclock = HAL_RCC_GetPCLK1Freq(); 97 | } 98 | else 99 | { 100 | uwTimclock = 2U*HAL_RCC_GetPCLK1Freq(); 101 | } 102 | 103 | /* Compute the prescaler value to have TIM14 counter clock equal to 1MHz */ 104 | uwPrescalerValue = (uint32_t)((uwTimclock / 1000000U) - 1U); 105 | 106 | /* Initialize TIM14 */ 107 | TimHandle.Instance = TIM14; 108 | 109 | /* Initialize TIMx peripheral as follow: 110 | + Period = [(TIM14CLK/uwTickFreq) - 1]. to have a (1/uwTickFreq) s time base. 111 | + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. 112 | + ClockDivision = 0 113 | + Counter direction = Up 114 | */ 115 | TimHandle.Init.Period = (1000000U / (1000U / (uint32_t)uwTickFreq)) - 1U; 116 | TimHandle.Init.Prescaler = uwPrescalerValue; 117 | TimHandle.Init.ClockDivision = 0U; 118 | TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP; 119 | TimHandle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 120 | if (HAL_TIM_Base_Init(&TimHandle) == HAL_OK) 121 | { 122 | /* Start the TIM time Base generation in interrupt mode */ 123 | if (HAL_TIM_Base_Start_IT(&TimHandle) == HAL_OK) 124 | { 125 | /* Enable the TIM14 global Interrupt */ 126 | HAL_NVIC_EnableIRQ(TIM14_IRQn); 127 | 128 | /* Configure the SysTick IRQ priority */ 129 | if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 130 | { 131 | /*Configure the TIM14 IRQ priority */ 132 | HAL_NVIC_SetPriority(TIM14_IRQn, TickPriority,0U); 133 | uwTickPrio = TickPriority; 134 | } 135 | else 136 | { 137 | status = HAL_ERROR; 138 | } 139 | } 140 | else 141 | { 142 | status = HAL_ERROR; 143 | } 144 | } 145 | else 146 | { 147 | status = HAL_ERROR; 148 | } 149 | } 150 | else 151 | { 152 | status = HAL_ERROR; 153 | } 154 | 155 | /* Return function status */ 156 | return status; 157 | } 158 | 159 | /** 160 | * @brief Suspend Tick increment. 161 | * @note Disable the tick increment by disabling TIM14 update interrupt. 162 | * @retval None 163 | */ 164 | void HAL_SuspendTick(void) 165 | { 166 | /* Disable TIM14 update interrupt */ 167 | __HAL_TIM_DISABLE_IT(&TimHandle, TIM_IT_UPDATE); 168 | } 169 | 170 | /** 171 | * @brief Resume Tick increment. 172 | * @note Enable the tick increment by enabling TIM14 update interrupt. 173 | * @retval None 174 | */ 175 | void HAL_ResumeTick(void) 176 | { 177 | /* Enable TIM14 update interrupt */ 178 | __HAL_TIM_ENABLE_IT(&TimHandle, TIM_IT_UPDATE); 179 | } 180 | 181 | /** 182 | * @brief Period elapsed callback in non blocking mode 183 | * @note This function is called when TIM14 interrupt took place, inside 184 | * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment 185 | * a global variable "uwTick" used as application time base. 186 | * @param htim TIM handle 187 | * @retval None 188 | */ 189 | void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) 190 | { 191 | HAL_IncTick(); 192 | } 193 | 194 | /** 195 | * @brief This function handles TIM interrupt request. 196 | * @retval None 197 | */ 198 | void TIM14_IRQHandler(void) 199 | { 200 | HAL_TIM_IRQHandler(&TimHandle); 201 | } 202 | 203 | /** 204 | * @} 205 | */ 206 | 207 | /** 208 | * @} 209 | */ 210 | 211 | 212 | -------------------------------------------------------------------------------- /Inc/stm32g0xx_hal_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_iwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of IWDG HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G0xx_HAL_IWDG_H 21 | #define STM32G0xx_HAL_IWDG_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @defgroup IWDG IWDG 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup IWDG_Exported_Types IWDG Exported Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @brief IWDG Init structure definition 45 | */ 46 | typedef struct 47 | { 48 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. 49 | This parameter can be a value of @ref IWDG_Prescaler */ 50 | 51 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. 52 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 53 | 54 | uint32_t Window; /*!< Specifies the window value to be compared to the down-counter. 55 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 56 | 57 | } IWDG_InitTypeDef; 58 | 59 | /** 60 | * @brief IWDG Handle Structure definition 61 | */ 62 | typedef struct 63 | { 64 | IWDG_TypeDef *Instance; /*!< Register base address */ 65 | 66 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ 67 | } IWDG_HandleTypeDef; 68 | 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /* Exported constants --------------------------------------------------------*/ 75 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants 76 | * @{ 77 | */ 78 | 79 | /** @defgroup IWDG_Prescaler IWDG Prescaler 80 | * @{ 81 | */ 82 | #define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */ 83 | #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ 84 | #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ 85 | #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ 86 | #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ 87 | #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ 88 | #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @defgroup IWDG_Window_option IWDG Window option 94 | * @{ 95 | */ 96 | #define IWDG_WINDOW_DISABLE IWDG_WINR_WIN 97 | /** 98 | * @} 99 | */ 100 | 101 | /** 102 | * @} 103 | */ 104 | 105 | /* Exported macros -----------------------------------------------------------*/ 106 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros 107 | * @{ 108 | */ 109 | 110 | /** 111 | * @brief Enable the IWDG peripheral. 112 | * @param __HANDLE__ IWDG handle 113 | * @retval None 114 | */ 115 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) 116 | 117 | /** 118 | * @brief Reload IWDG counter with value defined in the reload register 119 | * (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled). 120 | * @param __HANDLE__ IWDG handle 121 | * @retval None 122 | */ 123 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | /* Exported functions --------------------------------------------------------*/ 130 | /** @defgroup IWDG_Exported_Functions IWDG Exported Functions 131 | * @{ 132 | */ 133 | 134 | /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions 135 | * @{ 136 | */ 137 | /* Initialization/Start functions ********************************************/ 138 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); 139 | /** 140 | * @} 141 | */ 142 | 143 | /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions 144 | * @{ 145 | */ 146 | /* I/O operation functions ****************************************************/ 147 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); 148 | /** 149 | * @} 150 | */ 151 | 152 | /** 153 | * @} 154 | */ 155 | 156 | /* Private constants ---------------------------------------------------------*/ 157 | /** @defgroup IWDG_Private_Constants IWDG Private Constants 158 | * @{ 159 | */ 160 | 161 | /** 162 | * @brief IWDG Key Register BitMask 163 | */ 164 | #define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */ 165 | #define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */ 166 | #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */ 167 | #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */ 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | /* Private macros ------------------------------------------------------------*/ 174 | /** @defgroup IWDG_Private_Macros IWDG Private Macros 175 | * @{ 176 | */ 177 | 178 | /** 179 | * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. 180 | * @param __HANDLE__ IWDG handle 181 | * @retval None 182 | */ 183 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) 184 | 185 | /** 186 | * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. 187 | * @param __HANDLE__ IWDG handle 188 | * @retval None 189 | */ 190 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) 191 | 192 | /** 193 | * @brief Check IWDG prescaler value. 194 | * @param __PRESCALER__ IWDG prescaler value 195 | * @retval None 196 | */ 197 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ 198 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ 199 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ 200 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ 201 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ 202 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ 203 | ((__PRESCALER__) == IWDG_PRESCALER_256)) 204 | 205 | /** 206 | * @brief Check IWDG reload value. 207 | * @param __RELOAD__ IWDG reload value 208 | * @retval None 209 | */ 210 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) 211 | 212 | /** 213 | * @brief Check IWDG window value. 214 | * @param __WINDOW__ IWDG window value 215 | * @retval None 216 | */ 217 | #define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN) 218 | 219 | 220 | /** 221 | * @} 222 | */ 223 | 224 | /** 225 | * @} 226 | */ 227 | 228 | /** 229 | * @} 230 | */ 231 | 232 | 233 | #ifdef __cplusplus 234 | } 235 | #endif 236 | 237 | #endif /* STM32G0xx_HAL_IWDG_H */ 238 | -------------------------------------------------------------------------------- /Src/stm32g0xx_hal_crc_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_crc_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended CRC HAL module driver. 6 | * This file provides firmware functions to manage the extended 7 | * functionalities of the CRC peripheral. 8 | * 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * Copyright (c) 2018 STMicroelectronics. 13 | * All rights reserved. 14 | * 15 | * This software is licensed under terms that can be found in the LICENSE file 16 | * in the root directory of this software component. 17 | * If no LICENSE file comes with this software, it is provided AS-IS. 18 | * 19 | ****************************************************************************** 20 | @verbatim 21 | ================================================================================ 22 | ##### How to use this driver ##### 23 | ================================================================================ 24 | [..] 25 | (+) Set user-defined generating polynomial through HAL_CRCEx_Polynomial_Set() 26 | (+) Configure Input or Output data inversion 27 | 28 | @endverbatim 29 | ****************************************************************************** 30 | */ 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "stm32g0xx_hal.h" 34 | 35 | /** @addtogroup STM32G0xx_HAL_Driver 36 | * @{ 37 | */ 38 | 39 | /** @defgroup CRCEx CRCEx 40 | * @brief CRC Extended HAL module driver 41 | * @{ 42 | */ 43 | 44 | #ifdef HAL_CRC_MODULE_ENABLED 45 | 46 | /* Private typedef -----------------------------------------------------------*/ 47 | /* Private define ------------------------------------------------------------*/ 48 | /* Private macro -------------------------------------------------------------*/ 49 | /* Private variables ---------------------------------------------------------*/ 50 | /* Private function prototypes -----------------------------------------------*/ 51 | /* Exported functions --------------------------------------------------------*/ 52 | 53 | /** @defgroup CRCEx_Exported_Functions CRC Extended Exported Functions 54 | * @{ 55 | */ 56 | 57 | /** @defgroup CRCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions 58 | * @brief Extended Initialization and Configuration functions. 59 | * 60 | @verbatim 61 | =============================================================================== 62 | ##### Extended configuration functions ##### 63 | =============================================================================== 64 | [..] This section provides functions allowing to: 65 | (+) Configure the generating polynomial 66 | (+) Configure the input data inversion 67 | (+) Configure the output data inversion 68 | 69 | @endverbatim 70 | * @{ 71 | */ 72 | 73 | 74 | /** 75 | * @brief Initialize the CRC polynomial if different from default one. 76 | * @param hcrc CRC handle 77 | * @param Pol CRC generating polynomial (7, 8, 16 or 32-bit long). 78 | * This parameter is written in normal representation, e.g. 79 | * @arg for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65 80 | * @arg for a polynomial of degree 16, X^16 + X^12 + X^5 + 1 is written 0x1021 81 | * @param PolyLength CRC polynomial length. 82 | * This parameter can be one of the following values: 83 | * @arg @ref CRC_POLYLENGTH_7B 7-bit long CRC (generating polynomial of degree 7) 84 | * @arg @ref CRC_POLYLENGTH_8B 8-bit long CRC (generating polynomial of degree 8) 85 | * @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16) 86 | * @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32) 87 | * @retval HAL status 88 | */ 89 | HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength) 90 | { 91 | HAL_StatusTypeDef status = HAL_OK; 92 | uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */ 93 | 94 | /* Check the parameters */ 95 | assert_param(IS_CRC_POL_LENGTH(PolyLength)); 96 | 97 | /* Ensure that the generating polynomial is odd */ 98 | if ((Pol & (uint32_t)(0x1U)) == 0U) 99 | { 100 | status = HAL_ERROR; 101 | } 102 | else 103 | { 104 | /* check polynomial definition vs polynomial size: 105 | * polynomial length must be aligned with polynomial 106 | * definition. HAL_ERROR is reported if Pol degree is 107 | * larger than that indicated by PolyLength. 108 | * Look for MSB position: msb will contain the degree of 109 | * the second to the largest polynomial member. E.g., for 110 | * X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */ 111 | while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U)) 112 | { 113 | } 114 | 115 | switch (PolyLength) 116 | { 117 | 118 | case CRC_POLYLENGTH_7B: 119 | if (msb >= HAL_CRC_LENGTH_7B) 120 | { 121 | status = HAL_ERROR; 122 | } 123 | break; 124 | case CRC_POLYLENGTH_8B: 125 | if (msb >= HAL_CRC_LENGTH_8B) 126 | { 127 | status = HAL_ERROR; 128 | } 129 | break; 130 | case CRC_POLYLENGTH_16B: 131 | if (msb >= HAL_CRC_LENGTH_16B) 132 | { 133 | status = HAL_ERROR; 134 | } 135 | break; 136 | 137 | case CRC_POLYLENGTH_32B: 138 | /* no polynomial definition vs. polynomial length issue possible */ 139 | break; 140 | default: 141 | status = HAL_ERROR; 142 | break; 143 | } 144 | } 145 | if (status == HAL_OK) 146 | { 147 | /* set generating polynomial */ 148 | WRITE_REG(hcrc->Instance->POL, Pol); 149 | 150 | /* set generating polynomial size */ 151 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength); 152 | } 153 | /* Return function status */ 154 | return status; 155 | } 156 | 157 | /** 158 | * @brief Set the Reverse Input data mode. 159 | * @param hcrc CRC handle 160 | * @param InputReverseMode Input Data inversion mode. 161 | * This parameter can be one of the following values: 162 | * @arg @ref CRC_INPUTDATA_INVERSION_NONE no change in bit order (default value) 163 | * @arg @ref CRC_INPUTDATA_INVERSION_BYTE Byte-wise bit reversal 164 | * @arg @ref CRC_INPUTDATA_INVERSION_HALFWORD HalfWord-wise bit reversal 165 | * @arg @ref CRC_INPUTDATA_INVERSION_WORD Word-wise bit reversal 166 | * @retval HAL status 167 | */ 168 | HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode) 169 | { 170 | /* Check the parameters */ 171 | assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(InputReverseMode)); 172 | 173 | /* Change CRC peripheral state */ 174 | hcrc->State = HAL_CRC_STATE_BUSY; 175 | 176 | /* set input data inversion mode */ 177 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, InputReverseMode); 178 | /* Change CRC peripheral state */ 179 | hcrc->State = HAL_CRC_STATE_READY; 180 | 181 | /* Return function status */ 182 | return HAL_OK; 183 | } 184 | 185 | /** 186 | * @brief Set the Reverse Output data mode. 187 | * @param hcrc CRC handle 188 | * @param OutputReverseMode Output Data inversion mode. 189 | * This parameter can be one of the following values: 190 | * @arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion (default value) 191 | * @arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE bit-level inversion (e.g. for a 8-bit CRC: 0xB5 becomes 0xAD) 192 | * @retval HAL status 193 | */ 194 | HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode) 195 | { 196 | /* Check the parameters */ 197 | assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(OutputReverseMode)); 198 | 199 | /* Change CRC peripheral state */ 200 | hcrc->State = HAL_CRC_STATE_BUSY; 201 | 202 | /* set output data inversion mode */ 203 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, OutputReverseMode); 204 | 205 | /* Change CRC peripheral state */ 206 | hcrc->State = HAL_CRC_STATE_READY; 207 | 208 | /* Return function status */ 209 | return HAL_OK; 210 | } 211 | 212 | 213 | 214 | 215 | /** 216 | * @} 217 | */ 218 | 219 | 220 | /** 221 | * @} 222 | */ 223 | 224 | 225 | #endif /* HAL_CRC_MODULE_ENABLED */ 226 | /** 227 | * @} 228 | */ 229 | 230 | /** 231 | * @} 232 | */ 233 | -------------------------------------------------------------------------------- /Inc/stm32g0xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_def.h 4 | * @author MCD Application Team 5 | * @brief This file contains HAL common defines, enumeration, macros and 6 | * structures definitions. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2018 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32G0xx_HAL_DEF 22 | #define STM32G0xx_HAL_DEF 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32g0xx.h" 30 | #include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */ 31 | #include 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | 35 | /** 36 | * @brief HAL Status structures definition 37 | */ 38 | typedef enum 39 | { 40 | HAL_OK = 0x00U, 41 | HAL_ERROR = 0x01U, 42 | HAL_BUSY = 0x02U, 43 | HAL_TIMEOUT = 0x03U 44 | } HAL_StatusTypeDef; 45 | 46 | /** 47 | * @brief HAL Lock structures definition 48 | */ 49 | typedef enum 50 | { 51 | HAL_UNLOCKED = 0x00U, 52 | HAL_LOCKED = 0x01U 53 | } HAL_LockTypeDef; 54 | 55 | /* Exported macros -----------------------------------------------------------*/ 56 | 57 | #if !defined(UNUSED) 58 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ 59 | #endif /* UNUSED */ 60 | 61 | #define HAL_MAX_DELAY 0xFFFFFFFFU 62 | 63 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) 64 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) 65 | 66 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ 67 | do{ \ 68 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ 69 | (__DMA_HANDLE__).Parent = (__HANDLE__); \ 70 | } while(0U) 71 | 72 | /** @brief Reset the Handles State field. 73 | * @param __HANDLE__ specifies the Peripheral Handle. 74 | * @note This macro can be used for the following purpose: 75 | * - When the Handle is declared as local variable; before passing it as parameter 76 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 77 | * to set to 0 the Handles "State" field. 78 | * Otherwise, "State" field may have any random value and the first time the function 79 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 80 | * (i.e. HAL_PPP_MspInit() will not be executed). 81 | * - When there is a need to reconfigure the low level hardware: instead of calling 82 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 83 | * In this later function, when the Handles "State" field is set to 0, it will execute the function 84 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 85 | * @retval None 86 | */ 87 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U) 88 | 89 | #if (USE_RTOS == 1U) 90 | /* Reserved for future use */ 91 | #error " USE_RTOS should be 0 in the current HAL release " 92 | #else 93 | #define __HAL_LOCK(__HANDLE__) \ 94 | do{ \ 95 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 96 | { \ 97 | return HAL_BUSY; \ 98 | } \ 99 | else \ 100 | { \ 101 | (__HANDLE__)->Lock = HAL_LOCKED; \ 102 | } \ 103 | }while (0U) 104 | 105 | #define __HAL_UNLOCK(__HANDLE__) \ 106 | do{ \ 107 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 108 | }while (0U) 109 | #endif /* USE_RTOS */ 110 | 111 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 112 | #ifndef __weak 113 | #define __weak __attribute__((weak)) 114 | #endif /* __weak */ 115 | #ifndef __packed 116 | #define __packed __attribute__((packed)) 117 | #endif /* __packed */ 118 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 119 | #ifndef __weak 120 | #define __weak __attribute__((weak)) 121 | #endif /* __weak */ 122 | #ifndef __packed 123 | #define __packed __attribute__((__packed__)) 124 | #endif /* __packed */ 125 | #endif /* __GNUC__ */ 126 | 127 | 128 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 129 | /* GNU Compiler */ 130 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */ 131 | #ifndef __ALIGN_BEGIN 132 | #define __ALIGN_BEGIN 133 | #endif /* __ALIGN_BEGIN */ 134 | #ifndef __ALIGN_END 135 | #define __ALIGN_END __attribute__ ((aligned (4))) 136 | #endif /* __ALIGN_END */ 137 | #elif defined (__GNUC__) && !defined (__CC_ARM) /* GNU Compiler */ 138 | #ifndef __ALIGN_END 139 | #define __ALIGN_END __attribute__ ((aligned (4U))) 140 | #endif /* __ALIGN_END */ 141 | #ifndef __ALIGN_BEGIN 142 | #define __ALIGN_BEGIN 143 | #endif /* __ALIGN_BEGIN */ 144 | #else 145 | #ifndef __ALIGN_END 146 | #define __ALIGN_END 147 | #endif /* __ALIGN_END */ 148 | #ifndef __ALIGN_BEGIN 149 | /* ARM Compiler */ 150 | #if defined (__CC_ARM) /* ARM Compiler V5 */ 151 | #define __ALIGN_BEGIN __align(4U) 152 | /* IAR Compiler */ 153 | #elif defined (__ICCARM__) 154 | #define __ALIGN_BEGIN 155 | #endif /* __CC_ARM */ 156 | #endif /* __ALIGN_BEGIN */ 157 | #endif /* __GNUC__ */ 158 | 159 | /** 160 | * @brief __RAM_FUNC definition 161 | */ 162 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) 163 | /* ARM Compiler V4/V5 and V6 164 | -------------------------- 165 | RAM functions are defined using the toolchain options. 166 | Functions that are executed in RAM should reside in a separate source module. 167 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 168 | area of a module to a memory space in physical RAM. 169 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 170 | dialog. 171 | */ 172 | #define __RAM_FUNC 173 | 174 | #elif defined ( __ICCARM__ ) 175 | /* ICCARM Compiler 176 | --------------- 177 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 178 | */ 179 | #define __RAM_FUNC __ramfunc 180 | 181 | #elif defined ( __GNUC__ ) 182 | /* GNU Compiler 183 | ------------ 184 | RAM functions are defined using a specific toolchain attribute 185 | "__attribute__((section(".RamFunc")))". 186 | */ 187 | #define __RAM_FUNC __attribute__((section(".RamFunc"))) 188 | 189 | #endif /* __CC_ARM || __ARMCC_VERSION */ 190 | 191 | /** 192 | * @brief __NOINLINE definition 193 | */ 194 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ ) 195 | /* ARM V4/V5 and V6 & GNU Compiler 196 | ------------------------------- 197 | */ 198 | #define __NOINLINE __attribute__ ( (noinline) ) 199 | 200 | #elif defined ( __ICCARM__ ) 201 | /* ICCARM Compiler 202 | --------------- 203 | */ 204 | #define __NOINLINE _Pragma("optimize = no_inline") 205 | 206 | #endif /* __CC_ARM || __ARMCC_VERSION */ 207 | 208 | 209 | #ifdef __cplusplus 210 | } 211 | #endif 212 | 213 | #endif /* STM32G0xx_HAL_DEF */ 214 | 215 | 216 | -------------------------------------------------------------------------------- /Src/stm32g0xx_ll_i2c.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_i2c.c 4 | * @author MCD Application Team 5 | * @brief I2C LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g0xx_ll_i2c.h" 22 | #include "stm32g0xx_ll_bus.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif /* USE_FULL_ASSERT */ 28 | 29 | /** @addtogroup STM32G0xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined (I2C1) || defined (I2C2) || defined (I2C3) 34 | 35 | /** @defgroup I2C_LL I2C 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | /** @addtogroup I2C_LL_Private_Macros 44 | * @{ 45 | */ 46 | 47 | #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \ 48 | ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \ 49 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \ 50 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP)) 51 | 52 | #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \ 53 | ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE)) 54 | 55 | #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU) 56 | 57 | #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU) 58 | 59 | #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \ 60 | ((__VALUE__) == LL_I2C_NACK)) 61 | 62 | #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \ 63 | ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT)) 64 | /** 65 | * @} 66 | */ 67 | 68 | /* Private function prototypes -----------------------------------------------*/ 69 | 70 | /* Exported functions --------------------------------------------------------*/ 71 | /** @addtogroup I2C_LL_Exported_Functions 72 | * @{ 73 | */ 74 | 75 | /** @addtogroup I2C_LL_EF_Init 76 | * @{ 77 | */ 78 | 79 | /** 80 | * @brief De-initialize the I2C registers to their default reset values. 81 | * @param I2Cx I2C Instance. 82 | * @retval An ErrorStatus enumeration value: 83 | * - SUCCESS: I2C registers are de-initialized 84 | * - ERROR: I2C registers are not de-initialized 85 | */ 86 | ErrorStatus LL_I2C_DeInit(const I2C_TypeDef *I2Cx) 87 | { 88 | ErrorStatus status = SUCCESS; 89 | 90 | /* Check the I2C Instance I2Cx */ 91 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 92 | 93 | if (I2Cx == I2C1) 94 | { 95 | /* Force reset of I2C clock */ 96 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1); 97 | 98 | /* Release reset of I2C clock */ 99 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1); 100 | } 101 | else if (I2Cx == I2C2) 102 | { 103 | /* Force reset of I2C clock */ 104 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2); 105 | 106 | /* Release reset of I2C clock */ 107 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2); 108 | 109 | } 110 | #if defined(I2C3) 111 | else if (I2Cx == I2C3) 112 | { 113 | /* Force reset of I2C clock */ 114 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C3); 115 | 116 | /* Release reset of I2C clock */ 117 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C3); 118 | } 119 | #endif /* I2C3 */ 120 | else 121 | { 122 | status = ERROR; 123 | } 124 | 125 | return status; 126 | } 127 | 128 | /** 129 | * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct. 130 | * @param I2Cx I2C Instance. 131 | * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure. 132 | * @retval An ErrorStatus enumeration value: 133 | * - SUCCESS: I2C registers are initialized 134 | * - ERROR: Not applicable 135 | */ 136 | ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, const LL_I2C_InitTypeDef *I2C_InitStruct) 137 | { 138 | /* Check the I2C Instance I2Cx */ 139 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 140 | 141 | /* Check the I2C parameters from I2C_InitStruct */ 142 | assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode)); 143 | assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter)); 144 | assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter)); 145 | assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1)); 146 | assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge)); 147 | assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize)); 148 | 149 | /* Disable the selected I2Cx Peripheral */ 150 | LL_I2C_Disable(I2Cx); 151 | 152 | /*---------------------------- I2Cx CR1 Configuration ------------------------ 153 | * Configure the analog and digital noise filters with parameters : 154 | * - AnalogFilter: I2C_CR1_ANFOFF bit 155 | * - DigitalFilter: I2C_CR1_DNF[3:0] bits 156 | */ 157 | LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter); 158 | 159 | /*---------------------------- I2Cx TIMINGR Configuration -------------------- 160 | * Configure the SDA setup, hold time and the SCL high, low period with parameter : 161 | * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0], 162 | * I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits 163 | */ 164 | LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing); 165 | 166 | /* Enable the selected I2Cx Peripheral */ 167 | LL_I2C_Enable(I2Cx); 168 | 169 | /*---------------------------- I2Cx OAR1 Configuration ----------------------- 170 | * Disable, Configure and Enable I2Cx device own address 1 with parameters : 171 | * - OwnAddress1: I2C_OAR1_OA1[9:0] bits 172 | * - OwnAddrSize: I2C_OAR1_OA1MODE bit 173 | */ 174 | LL_I2C_DisableOwnAddress1(I2Cx); 175 | LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize); 176 | 177 | /* OwnAdress1 == 0 is reserved for General Call address */ 178 | if (I2C_InitStruct->OwnAddress1 != 0U) 179 | { 180 | LL_I2C_EnableOwnAddress1(I2Cx); 181 | } 182 | 183 | /*---------------------------- I2Cx MODE Configuration ----------------------- 184 | * Configure I2Cx peripheral mode with parameter : 185 | * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits 186 | */ 187 | LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode); 188 | 189 | /*---------------------------- I2Cx CR2 Configuration ------------------------ 190 | * Configure the ACKnowledge or Non ACKnowledge condition 191 | * after the address receive match code or next received byte with parameter : 192 | * - TypeAcknowledge: I2C_CR2_NACK bit 193 | */ 194 | LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge); 195 | 196 | return SUCCESS; 197 | } 198 | 199 | /** 200 | * @brief Set each @ref LL_I2C_InitTypeDef field to default value. 201 | * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure. 202 | * @retval None 203 | */ 204 | void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct) 205 | { 206 | /* Set I2C_InitStruct fields to default values */ 207 | I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C; 208 | I2C_InitStruct->Timing = 0U; 209 | I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE; 210 | I2C_InitStruct->DigitalFilter = 0U; 211 | I2C_InitStruct->OwnAddress1 = 0U; 212 | I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK; 213 | I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; 214 | } 215 | 216 | /** 217 | * @} 218 | */ 219 | 220 | /** 221 | * @} 222 | */ 223 | 224 | /** 225 | * @} 226 | */ 227 | 228 | #endif /* I2C1 || I2C2 || I2C3 */ 229 | 230 | /** 231 | * @} 232 | */ 233 | 234 | #endif /* USE_FULL_LL_DRIVER */ 235 | -------------------------------------------------------------------------------- /Src/stm32g0xx_hal_smbus_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_smbus_ex.c 4 | * @author MCD Application Team 5 | * @brief SMBUS Extended HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of SMBUS Extended peripheral: 8 | * + Extended features functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2018 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | @verbatim 22 | ============================================================================== 23 | ##### SMBUS peripheral Extended features ##### 24 | ============================================================================== 25 | 26 | [..] Comparing to other previous devices, the SMBUS interface for STM32G0xx 27 | devices contains the following additional features 28 | 29 | (+) Disable or enable wakeup from Stop mode(s) 30 | (+) Disable or enable Fast Mode Plus 31 | 32 | ##### How to use this driver ##### 33 | ============================================================================== 34 | (#) Configure the enable or disable of SMBUS Wake Up Mode using the functions : 35 | (++) HAL_SMBUSEx_EnableWakeUp() 36 | (++) HAL_SMBUSEx_DisableWakeUp() 37 | (#) Configure the enable or disable of fast mode plus driving capability using the functions : 38 | (++) HAL_SMBUSEx_EnableFastModePlus() 39 | (++) HAL_SMBUSEx_DisableFastModePlus() 40 | @endverbatim 41 | */ 42 | 43 | /* Includes ------------------------------------------------------------------*/ 44 | #include "stm32g0xx_hal.h" 45 | 46 | /** @addtogroup STM32G0xx_HAL_Driver 47 | * @{ 48 | */ 49 | 50 | /** @defgroup SMBUSEx SMBUSEx 51 | * @brief SMBUS Extended HAL module driver 52 | * @{ 53 | */ 54 | 55 | #ifdef HAL_SMBUS_MODULE_ENABLED 56 | 57 | /* Private typedef -----------------------------------------------------------*/ 58 | /* Private define ------------------------------------------------------------*/ 59 | /* Private macro -------------------------------------------------------------*/ 60 | /* Private variables ---------------------------------------------------------*/ 61 | /* Private function prototypes -----------------------------------------------*/ 62 | /* Private functions ---------------------------------------------------------*/ 63 | 64 | /** @defgroup SMBUSEx_Exported_Functions SMBUS Extended Exported Functions 65 | * @{ 66 | */ 67 | 68 | /** @defgroup SMBUSEx_Exported_Functions_Group2 WakeUp Mode Functions 69 | * @brief WakeUp Mode Functions 70 | * 71 | @verbatim 72 | =============================================================================== 73 | ##### WakeUp Mode Functions ##### 74 | =============================================================================== 75 | [..] This section provides functions allowing to: 76 | (+) Configure Wake Up Feature 77 | 78 | @endverbatim 79 | * @{ 80 | */ 81 | 82 | /** 83 | * @brief Enable SMBUS wakeup from Stop mode(s). 84 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains 85 | * the configuration information for the specified SMBUSx peripheral. 86 | * @retval HAL status 87 | */ 88 | HAL_StatusTypeDef HAL_SMBUSEx_EnableWakeUp(SMBUS_HandleTypeDef *hsmbus) 89 | { 90 | /* Check the parameters */ 91 | assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hsmbus->Instance)); 92 | 93 | if (hsmbus->State == HAL_SMBUS_STATE_READY) 94 | { 95 | /* Process Locked */ 96 | __HAL_LOCK(hsmbus); 97 | 98 | hsmbus->State = HAL_SMBUS_STATE_BUSY; 99 | 100 | /* Disable the selected SMBUS peripheral */ 101 | __HAL_SMBUS_DISABLE(hsmbus); 102 | 103 | /* Enable wakeup from stop mode */ 104 | hsmbus->Instance->CR1 |= I2C_CR1_WUPEN; 105 | 106 | __HAL_SMBUS_ENABLE(hsmbus); 107 | 108 | hsmbus->State = HAL_SMBUS_STATE_READY; 109 | 110 | /* Process Unlocked */ 111 | __HAL_UNLOCK(hsmbus); 112 | 113 | return HAL_OK; 114 | } 115 | else 116 | { 117 | return HAL_BUSY; 118 | } 119 | } 120 | 121 | /** 122 | * @brief Disable SMBUS wakeup from Stop mode(s). 123 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains 124 | * the configuration information for the specified SMBUSx peripheral. 125 | * @retval HAL status 126 | */ 127 | HAL_StatusTypeDef HAL_SMBUSEx_DisableWakeUp(SMBUS_HandleTypeDef *hsmbus) 128 | { 129 | /* Check the parameters */ 130 | assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hsmbus->Instance)); 131 | 132 | if (hsmbus->State == HAL_SMBUS_STATE_READY) 133 | { 134 | /* Process Locked */ 135 | __HAL_LOCK(hsmbus); 136 | 137 | hsmbus->State = HAL_SMBUS_STATE_BUSY; 138 | 139 | /* Disable the selected SMBUS peripheral */ 140 | __HAL_SMBUS_DISABLE(hsmbus); 141 | 142 | /* Disable wakeup from stop mode */ 143 | hsmbus->Instance->CR1 &= ~(I2C_CR1_WUPEN); 144 | 145 | __HAL_SMBUS_ENABLE(hsmbus); 146 | 147 | hsmbus->State = HAL_SMBUS_STATE_READY; 148 | 149 | /* Process Unlocked */ 150 | __HAL_UNLOCK(hsmbus); 151 | 152 | return HAL_OK; 153 | } 154 | else 155 | { 156 | return HAL_BUSY; 157 | } 158 | } 159 | /** 160 | * @} 161 | */ 162 | 163 | /** @defgroup SMBUSEx_Exported_Functions_Group3 Fast Mode Plus Functions 164 | * @brief Fast Mode Plus Functions 165 | * 166 | @verbatim 167 | =============================================================================== 168 | ##### Fast Mode Plus Functions ##### 169 | =============================================================================== 170 | [..] This section provides functions allowing to: 171 | (+) Configure Fast Mode Plus 172 | 173 | @endverbatim 174 | * @{ 175 | */ 176 | 177 | /** 178 | * @brief Enable the SMBUS fast mode plus driving capability. 179 | * @param ConfigFastModePlus Selects the pin. 180 | * This parameter can be one of the @ref SMBUSEx_FastModePlus values 181 | * @note For I2C1, fast mode plus driving capability can be enabled on all selected 182 | * I2C1 pins using SMBUS_FASTMODEPLUS_I2C1 parameter or independently 183 | * on each one of the following pins PB6, PB7, PB8 and PB9. 184 | * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability 185 | * can be enabled only by using SMBUS_FASTMODEPLUS_I2C1 parameter. 186 | * @note For all I2C2 pins fast mode plus driving capability can be enabled 187 | * only by using SMBUS_FASTMODEPLUS_I2C2 parameter. 188 | * @note For all I2C3 pins fast mode plus driving capability can be enabled 189 | * only by using SMBUS_FASTMODEPLUS_I2C3 parameter. 190 | * @retval None 191 | */ 192 | void HAL_SMBUSEx_EnableFastModePlus(uint32_t ConfigFastModePlus) 193 | { 194 | /* Check the parameter */ 195 | assert_param(IS_SMBUS_FASTMODEPLUS(ConfigFastModePlus)); 196 | 197 | /* Enable SYSCFG clock */ 198 | __HAL_RCC_SYSCFG_CLK_ENABLE(); 199 | 200 | /* Enable fast mode plus driving capability for selected pin */ 201 | SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); 202 | } 203 | 204 | /** 205 | * @brief Disable the SMBUS fast mode plus driving capability. 206 | * @param ConfigFastModePlus Selects the pin. 207 | * This parameter can be one of the @ref SMBUSEx_FastModePlus values 208 | * @note For I2C1, fast mode plus driving capability can be disabled on all selected 209 | * I2C1 pins using SMBUS_FASTMODEPLUS_I2C1 parameter or independently 210 | * on each one of the following pins PB6, PB7, PB8 and PB9. 211 | * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability 212 | * can be disabled only by using SMBUS_FASTMODEPLUS_I2C1 parameter. 213 | * @note For all I2C2 pins fast mode plus driving capability can be disabled 214 | * only by using SMBUS_FASTMODEPLUS_I2C2 parameter. 215 | * @note For all I2C3 pins fast mode plus driving capability can be disabled 216 | * only by using SMBUS_FASTMODEPLUS_I2C3 parameter. 217 | * @retval None 218 | */ 219 | void HAL_SMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus) 220 | { 221 | /* Check the parameter */ 222 | assert_param(IS_SMBUS_FASTMODEPLUS(ConfigFastModePlus)); 223 | 224 | /* Enable SYSCFG clock */ 225 | __HAL_RCC_SYSCFG_CLK_ENABLE(); 226 | 227 | /* Disable fast mode plus driving capability for selected pin */ 228 | CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); 229 | } 230 | 231 | /** 232 | * @} 233 | */ 234 | 235 | /** 236 | * @} 237 | */ 238 | 239 | /** 240 | * @} 241 | */ 242 | 243 | #endif /* HAL_SMBUS_MODULE_ENABLED */ 244 | /** 245 | * @} 246 | */ 247 | 248 | /** 249 | * @} 250 | */ 251 | -------------------------------------------------------------------------------- /Src/stm32g0xx_hal_pcd_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_pcd_ex.c 4 | * @author MCD Application Team 5 | * @brief PCD Extended HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the USB Peripheral Controller: 8 | * + Extended features functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2018 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "stm32g0xx_hal.h" 25 | 26 | /** @addtogroup STM32G0xx_HAL_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup PCDEx PCDEx 31 | * @brief PCD Extended HAL module driver 32 | * @{ 33 | */ 34 | 35 | #ifdef HAL_PCD_MODULE_ENABLED 36 | 37 | #if defined (USB_DRD_FS) 38 | /* Private types -------------------------------------------------------------*/ 39 | /* Private variables ---------------------------------------------------------*/ 40 | /* Private constants ---------------------------------------------------------*/ 41 | /* Private macros ------------------------------------------------------------*/ 42 | /* Private functions ---------------------------------------------------------*/ 43 | /* Exported functions --------------------------------------------------------*/ 44 | 45 | /** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions 46 | * @{ 47 | */ 48 | 49 | /** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 50 | * @brief PCDEx control functions 51 | * 52 | @verbatim 53 | =============================================================================== 54 | ##### Extended features functions ##### 55 | =============================================================================== 56 | [..] This section provides functions allowing to: 57 | (+) Update FIFO configuration 58 | 59 | @endverbatim 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @brief Configure PMA for EP 65 | * @param hpcd Device instance 66 | * @param ep_addr endpoint address 67 | * @param ep_kind endpoint Kind 68 | * USB_SNG_BUF: Single Buffer used 69 | * USB_DBL_BUF: Double Buffer used 70 | * @param pmaadress: EP address in The PMA: In case of single buffer endpoint 71 | * this parameter is 16-bit value providing the address 72 | * in PMA allocated to endpoint. 73 | * In case of double buffer endpoint this parameter 74 | * is a 32-bit value providing the endpoint buffer 0 address 75 | * in the LSB part of 32-bit value and endpoint buffer 1 address 76 | * in the MSB part of 32-bit value. 77 | * @retval HAL status 78 | */ 79 | 80 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, 81 | uint16_t ep_kind, uint32_t pmaadress) 82 | { 83 | PCD_EPTypeDef *ep; 84 | 85 | /* initialize ep structure*/ 86 | if ((0x80U & ep_addr) == 0x80U) 87 | { 88 | ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 89 | } 90 | else 91 | { 92 | ep = &hpcd->OUT_ep[ep_addr]; 93 | } 94 | 95 | /* Here we check if the endpoint is single or double Buffer*/ 96 | if (ep_kind == PCD_SNG_BUF) 97 | { 98 | /* Single Buffer */ 99 | ep->doublebuffer = 0U; 100 | /* Configure the PMA */ 101 | ep->pmaadress = (uint16_t)pmaadress; 102 | } 103 | #if (USE_USB_DOUBLE_BUFFER == 1U) 104 | else /* USB_DBL_BUF */ 105 | { 106 | /* Double Buffer Endpoint */ 107 | ep->doublebuffer = 1U; 108 | /* Configure the PMA */ 109 | ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); 110 | ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); 111 | } 112 | #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ 113 | 114 | return HAL_OK; 115 | } 116 | 117 | /** 118 | * @brief Activate BatteryCharging feature. 119 | * @param hpcd PCD handle 120 | * @retval HAL status 121 | */ 122 | HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) 123 | { 124 | USB_DRD_TypeDef *USBx = hpcd->Instance; 125 | hpcd->battery_charging_active = 1U; 126 | 127 | /* Enable BCD feature */ 128 | USBx->BCDR |= USB_BCDR_BCDEN; 129 | 130 | /* Enable DCD : Data Contact Detect */ 131 | USBx->BCDR &= ~(USB_BCDR_PDEN); 132 | USBx->BCDR &= ~(USB_BCDR_SDEN); 133 | USBx->BCDR |= USB_BCDR_DCDEN; 134 | 135 | return HAL_OK; 136 | } 137 | 138 | /** 139 | * @brief Deactivate BatteryCharging feature. 140 | * @param hpcd PCD handle 141 | * @retval HAL status 142 | */ 143 | HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) 144 | { 145 | USB_DRD_TypeDef *USBx = hpcd->Instance; 146 | hpcd->battery_charging_active = 0U; 147 | 148 | /* Disable BCD feature */ 149 | USBx->BCDR &= ~(USB_BCDR_BCDEN); 150 | 151 | return HAL_OK; 152 | } 153 | 154 | /** 155 | * @brief Handle BatteryCharging Process. 156 | * @param hpcd PCD handle 157 | * @retval HAL status 158 | */ 159 | void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) 160 | { 161 | USB_DRD_TypeDef *USBx = hpcd->Instance; 162 | uint32_t tickstart = HAL_GetTick(); 163 | 164 | /* Wait for Min DCD Timeout */ 165 | HAL_Delay(300U); 166 | 167 | /* Data Pin Contact ? Check Detect flag */ 168 | if ((USBx->BCDR & USB_BCDR_DCDET) == USB_BCDR_DCDET) 169 | { 170 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 171 | hpcd->BCDCallback(hpcd, PCD_BCD_CONTACT_DETECTION); 172 | #else 173 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); 174 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 175 | } 176 | /* Primary detection: checks if connected to Standard Downstream Port 177 | (without charging capability) */ 178 | USBx->BCDR &= ~(USB_BCDR_DCDEN); 179 | HAL_Delay(50U); 180 | USBx->BCDR |= (USB_BCDR_PDEN); 181 | HAL_Delay(50U); 182 | 183 | /* If Charger detect ? */ 184 | if ((USBx->BCDR & USB_BCDR_PDET) == USB_BCDR_PDET) 185 | { 186 | /* Start secondary detection to check connection to Charging Downstream 187 | Port or Dedicated Charging Port */ 188 | USBx->BCDR &= ~(USB_BCDR_PDEN); 189 | HAL_Delay(50U); 190 | USBx->BCDR |= (USB_BCDR_SDEN); 191 | HAL_Delay(50U); 192 | 193 | /* If CDP ? */ 194 | if ((USBx->BCDR & USB_BCDR_SDET) == USB_BCDR_SDET) 195 | { 196 | /* Dedicated Downstream Port DCP */ 197 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 198 | hpcd->BCDCallback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); 199 | #else 200 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); 201 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 202 | } 203 | else 204 | { 205 | /* Charging Downstream Port CDP */ 206 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 207 | hpcd->BCDCallback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); 208 | #else 209 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); 210 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 211 | } 212 | } 213 | else /* NO */ 214 | { 215 | /* Standard Downstream Port */ 216 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 217 | hpcd->BCDCallback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); 218 | #else 219 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); 220 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 221 | } 222 | 223 | /* Battery Charging capability discovery finished Start Enumeration */ 224 | (void)HAL_PCDEx_DeActivateBCD(hpcd); 225 | 226 | /* Check for the Timeout, else start USB Device */ 227 | if ((HAL_GetTick() - tickstart) > 1000U) 228 | { 229 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 230 | hpcd->BCDCallback(hpcd, PCD_BCD_ERROR); 231 | #else 232 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); 233 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 234 | } 235 | else 236 | { 237 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 238 | hpcd->BCDCallback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); 239 | #else 240 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); 241 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 242 | } 243 | } 244 | 245 | 246 | /** 247 | * @brief Activate LPM feature. 248 | * @param hpcd PCD handle 249 | * @retval HAL status 250 | */ 251 | HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) 252 | { 253 | 254 | USB_DRD_TypeDef *USBx = hpcd->Instance; 255 | hpcd->lpm_active = 1U; 256 | hpcd->LPM_State = LPM_L0; 257 | 258 | USBx->LPMCSR |= USB_LPMCSR_LMPEN; 259 | USBx->LPMCSR |= USB_LPMCSR_LPMACK; 260 | 261 | return HAL_OK; 262 | } 263 | 264 | /** 265 | * @brief Deactivate LPM feature. 266 | * @param hpcd PCD handle 267 | * @retval HAL status 268 | */ 269 | HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) 270 | { 271 | USB_DRD_TypeDef *USBx = hpcd->Instance; 272 | 273 | hpcd->lpm_active = 0U; 274 | 275 | USBx->LPMCSR &= ~(USB_LPMCSR_LMPEN); 276 | USBx->LPMCSR &= ~(USB_LPMCSR_LPMACK); 277 | 278 | return HAL_OK; 279 | } 280 | 281 | 282 | 283 | /** 284 | * @brief Send LPM message to user layer callback. 285 | * @param hpcd PCD handle 286 | * @param msg LPM message 287 | * @retval HAL status 288 | */ 289 | __weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) 290 | { 291 | /* Prevent unused argument(s) compilation warning */ 292 | UNUSED(hpcd); 293 | UNUSED(msg); 294 | 295 | /* NOTE : This function should not be modified, when the callback is needed, 296 | the HAL_PCDEx_LPM_Callback could be implemented in the user file 297 | */ 298 | } 299 | 300 | /** 301 | * @brief Send BatteryCharging message to user layer callback. 302 | * @param hpcd PCD handle 303 | * @param msg LPM message 304 | * @retval HAL status 305 | */ 306 | __weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) 307 | { 308 | /* Prevent unused argument(s) compilation warning */ 309 | UNUSED(hpcd); 310 | UNUSED(msg); 311 | 312 | /* NOTE : This function should not be modified, when the callback is needed, 313 | the HAL_PCDEx_BCD_Callback could be implemented in the user file 314 | */ 315 | } 316 | 317 | /** 318 | * @} 319 | */ 320 | 321 | /** 322 | * @} 323 | */ 324 | #endif /* defined (USB_DRD_FS) */ 325 | #endif /* HAL_PCD_MODULE_ENABLED */ 326 | 327 | /** 328 | * @} 329 | */ 330 | 331 | /** 332 | * @} 333 | */ 334 | -------------------------------------------------------------------------------- /Src/stm32g0xx_ll_comp.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_comp.c 4 | * @author MCD Application Team 5 | * @brief COMP LL module driver 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32g0xx_ll_comp.h" 23 | 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif /* USE_FULL_ASSERT */ 29 | 30 | /** @addtogroup STM32G0xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (COMP1) || defined (COMP2) 35 | 36 | /** @addtogroup COMP_LL COMP 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | 45 | /** @addtogroup COMP_LL_Private_Macros 46 | * @{ 47 | */ 48 | 49 | /* Check of parameters for configuration of COMP hierarchical scope: */ 50 | /* COMP instance. */ 51 | 52 | #define IS_LL_COMP_POWER_MODE(__POWER_MODE__) \ 53 | (((__POWER_MODE__) == LL_COMP_POWERMODE_HIGHSPEED) \ 54 | || ((__POWER_MODE__) == LL_COMP_POWERMODE_MEDIUMSPEED) \ 55 | ) 56 | 57 | /* Note: On this STM32 series, comparator input plus parameters are */ 58 | /* the same on all COMP instances. */ 59 | /* However, comparator instance kept as macro parameter for */ 60 | /* compatibility with other STM32 families. */ 61 | #define IS_LL_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__) \ 62 | (((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO1) \ 63 | || ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO2) \ 64 | || ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO3) \ 65 | ) 66 | 67 | /* Note: On this STM32 series, comparator input minus parameters are */ 68 | /* the same on all COMP instances. */ 69 | /* However, comparator instance kept as macro parameter for */ 70 | /* compatibility with other STM32 families. */ 71 | #define IS_LL_COMP_INPUT_MINUS(__COMP_INSTANCE__, __INPUT_MINUS__) \ 72 | (((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_1_4VREFINT) \ 73 | || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_1_2VREFINT) \ 74 | || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_3_4VREFINT) \ 75 | || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_VREFINT) \ 76 | || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_DAC1_CH1) \ 77 | || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_DAC1_CH2) \ 78 | || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_IO1) \ 79 | || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_IO2) \ 80 | || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_IO3) \ 81 | ) 82 | 83 | #define IS_LL_COMP_INPUT_HYSTERESIS(__INPUT_HYSTERESIS__) \ 84 | (((__INPUT_HYSTERESIS__) == LL_COMP_HYSTERESIS_NONE) \ 85 | || ((__INPUT_HYSTERESIS__) == LL_COMP_HYSTERESIS_LOW) \ 86 | || ((__INPUT_HYSTERESIS__) == LL_COMP_HYSTERESIS_MEDIUM) \ 87 | || ((__INPUT_HYSTERESIS__) == LL_COMP_HYSTERESIS_HIGH) \ 88 | ) 89 | 90 | #define IS_LL_COMP_OUTPUT_POLARITY(__POLARITY__) \ 91 | (((__POLARITY__) == LL_COMP_OUTPUTPOL_NONINVERTED) \ 92 | || ((__POLARITY__) == LL_COMP_OUTPUTPOL_INVERTED) \ 93 | ) 94 | 95 | #define IS_LL_COMP_OUTPUT_BLANKING_SOURCE(__OUTPUT_BLANKING_SOURCE__) \ 96 | (((__OUTPUT_BLANKING_SOURCE__) == LL_COMP_BLANKINGSRC_NONE) \ 97 | || ((__OUTPUT_BLANKING_SOURCE__) == LL_COMP_BLANKINGSRC_TIM1_OC4) \ 98 | || ((__OUTPUT_BLANKING_SOURCE__) == LL_COMP_BLANKINGSRC_TIM1_OC5) \ 99 | || ((__OUTPUT_BLANKING_SOURCE__) == LL_COMP_BLANKINGSRC_TIM2_OC3) \ 100 | || ((__OUTPUT_BLANKING_SOURCE__) == LL_COMP_BLANKINGSRC_TIM3_OC3) \ 101 | || ((__OUTPUT_BLANKING_SOURCE__) == LL_COMP_BLANKINGSRC_TIM15_OC2) \ 102 | ) 103 | 104 | /** 105 | * @} 106 | */ 107 | 108 | 109 | /* Private function prototypes -----------------------------------------------*/ 110 | 111 | /* Exported functions --------------------------------------------------------*/ 112 | /** @addtogroup COMP_LL_Exported_Functions 113 | * @{ 114 | */ 115 | 116 | /** @addtogroup COMP_LL_EF_Init 117 | * @{ 118 | */ 119 | 120 | /** 121 | * @brief De-initialize registers of the selected COMP instance 122 | * to their default reset values. 123 | * @note If comparator is locked, de-initialization by software is 124 | * not possible. 125 | * The only way to unlock the comparator is a device hardware reset. 126 | * @param COMPx COMP instance 127 | * @retval An ErrorStatus enumeration value: 128 | * - SUCCESS: COMP registers are de-initialized 129 | * - ERROR: COMP registers are not de-initialized 130 | */ 131 | ErrorStatus LL_COMP_DeInit(COMP_TypeDef *COMPx) 132 | { 133 | ErrorStatus status = SUCCESS; 134 | 135 | /* Check the parameters */ 136 | assert_param(IS_COMP_ALL_INSTANCE(COMPx)); 137 | 138 | /* Note: Hardware constraint (refer to description of this function): */ 139 | /* COMP instance must not be locked. */ 140 | if (LL_COMP_IsLocked(COMPx) == 0UL) 141 | { 142 | LL_COMP_WriteReg(COMPx, CSR, 0x00000000UL); 143 | 144 | } 145 | else 146 | { 147 | /* Comparator instance is locked: de-initialization by software is */ 148 | /* not possible. */ 149 | /* The only way to unlock the comparator is a device hardware reset. */ 150 | status = ERROR; 151 | } 152 | 153 | return status; 154 | } 155 | 156 | /** 157 | * @brief Initialize some features of COMP instance. 158 | * @note This function configures features of the selected COMP instance. 159 | * Some features are also available at scope COMP common instance 160 | * (common to several COMP instances). 161 | * Refer to functions having argument "COMPxy_COMMON" as parameter. 162 | * @param COMPx COMP instance 163 | * @param COMP_InitStruct Pointer to a @ref LL_COMP_InitTypeDef structure 164 | * @retval An ErrorStatus enumeration value: 165 | * - SUCCESS: COMP registers are initialized 166 | * - ERROR: COMP registers are not initialized 167 | */ 168 | ErrorStatus LL_COMP_Init(COMP_TypeDef *COMPx, const LL_COMP_InitTypeDef *COMP_InitStruct) 169 | { 170 | ErrorStatus status = SUCCESS; 171 | 172 | /* Check the parameters */ 173 | assert_param(IS_COMP_ALL_INSTANCE(COMPx)); 174 | assert_param(IS_LL_COMP_POWER_MODE(COMP_InitStruct->PowerMode)); 175 | assert_param(IS_LL_COMP_INPUT_PLUS(COMPx, COMP_InitStruct->InputPlus)); 176 | assert_param(IS_LL_COMP_INPUT_MINUS(COMPx, COMP_InitStruct->InputMinus)); 177 | assert_param(IS_LL_COMP_INPUT_HYSTERESIS(COMP_InitStruct->InputHysteresis)); 178 | assert_param(IS_LL_COMP_OUTPUT_POLARITY(COMP_InitStruct->OutputPolarity)); 179 | assert_param(IS_LL_COMP_OUTPUT_BLANKING_SOURCE(COMP_InitStruct->OutputBlankingSource)); 180 | 181 | /* Note: Hardware constraint (refer to description of this function) */ 182 | /* COMP instance must not be locked. */ 183 | if (LL_COMP_IsLocked(COMPx) == 0UL) 184 | { 185 | /* Configuration of comparator instance : */ 186 | /* - PowerMode */ 187 | /* - InputPlus */ 188 | /* - InputMinus */ 189 | /* - InputHysteresis */ 190 | /* - OutputPolarity */ 191 | /* - OutputBlankingSource */ 192 | MODIFY_REG(COMPx->CSR, 193 | COMP_CSR_PWRMODE 194 | | COMP_CSR_INPSEL 195 | | COMP_CSR_INMSEL 196 | | COMP_CSR_HYST 197 | | COMP_CSR_POLARITY 198 | | COMP_CSR_BLANKING 199 | , 200 | COMP_InitStruct->PowerMode 201 | | COMP_InitStruct->InputPlus 202 | | COMP_InitStruct->InputMinus 203 | | COMP_InitStruct->InputHysteresis 204 | | COMP_InitStruct->OutputPolarity 205 | | COMP_InitStruct->OutputBlankingSource 206 | ); 207 | 208 | } 209 | else 210 | { 211 | /* Initialization error: COMP instance is locked. */ 212 | status = ERROR; 213 | } 214 | 215 | return status; 216 | } 217 | 218 | /** 219 | * @brief Set each @ref LL_COMP_InitTypeDef field to default value. 220 | * @param COMP_InitStruct Pointer to a @ref LL_COMP_InitTypeDef structure 221 | * whose fields will be set to default values. 222 | * @retval None 223 | */ 224 | void LL_COMP_StructInit(LL_COMP_InitTypeDef *COMP_InitStruct) 225 | { 226 | /* Set COMP_InitStruct fields to default values */ 227 | COMP_InitStruct->PowerMode = LL_COMP_POWERMODE_MEDIUMSPEED; 228 | COMP_InitStruct->InputPlus = LL_COMP_INPUT_PLUS_IO1; 229 | COMP_InitStruct->InputMinus = LL_COMP_INPUT_MINUS_VREFINT; 230 | COMP_InitStruct->InputHysteresis = LL_COMP_HYSTERESIS_NONE; 231 | COMP_InitStruct->OutputPolarity = LL_COMP_OUTPUTPOL_NONINVERTED; 232 | COMP_InitStruct->OutputBlankingSource = LL_COMP_BLANKINGSRC_NONE; 233 | } 234 | 235 | /** 236 | * @} 237 | */ 238 | 239 | /** 240 | * @} 241 | */ 242 | 243 | /** 244 | * @} 245 | */ 246 | 247 | #endif /* COMP1 || COMP2 */ 248 | 249 | /** 250 | * @} 251 | */ 252 | 253 | #endif /* USE_FULL_LL_DRIVER */ 254 | -------------------------------------------------------------------------------- /Src/stm32g0xx_ll_gpio.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_gpio.c 4 | * @author MCD Application Team 5 | * @brief GPIO LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g0xx_ll_gpio.h" 22 | #include "stm32g0xx_ll_bus.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif /* USE_FULL_ASSERT */ 28 | 29 | /** @addtogroup STM32G0xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) 34 | 35 | /** @addtogroup GPIO_LL 36 | * @{ 37 | */ 38 | /** MISRA C:2012 deviation rule has been granted for following rules: 39 | * Rule-12.2 - Medium: RHS argument is in interval [0,INF] which is out of 40 | * range of the shift operator in following API : 41 | * LL_GPIO_Init 42 | */ 43 | 44 | /* Private types -------------------------------------------------------------*/ 45 | /* Private variables ---------------------------------------------------------*/ 46 | /* Private constants ---------------------------------------------------------*/ 47 | /* Private macros ------------------------------------------------------------*/ 48 | /** @addtogroup GPIO_LL_Private_Macros 49 | * @{ 50 | */ 51 | #define IS_LL_GPIO_PIN(__VALUE__) (((0x00u) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL))) 52 | 53 | #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) ||\ 54 | ((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\ 55 | ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\ 56 | ((__VALUE__) == LL_GPIO_MODE_ANALOG)) 57 | 58 | #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\ 59 | ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN)) 60 | 61 | #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\ 62 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\ 63 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH) ||\ 64 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_VERY_HIGH)) 65 | 66 | #define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_NO) ||\ 67 | ((__VALUE__) == LL_GPIO_PULL_UP) ||\ 68 | ((__VALUE__) == LL_GPIO_PULL_DOWN)) 69 | 70 | #if defined(GPIOE) 71 | #define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\ 72 | ((__VALUE__) == LL_GPIO_AF_1 ) ||\ 73 | ((__VALUE__) == LL_GPIO_AF_2 ) ||\ 74 | ((__VALUE__) == LL_GPIO_AF_3 ) ||\ 75 | ((__VALUE__) == LL_GPIO_AF_4 ) ||\ 76 | ((__VALUE__) == LL_GPIO_AF_5 ) ||\ 77 | ((__VALUE__) == LL_GPIO_AF_6 ) ||\ 78 | ((__VALUE__) == LL_GPIO_AF_7 ) ||\ 79 | ((__VALUE__) == LL_GPIO_AF_8 ) ||\ 80 | ((__VALUE__) == LL_GPIO_AF_9 ) ||\ 81 | ((__VALUE__) == LL_GPIO_AF_10 )) 82 | #else 83 | #define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\ 84 | ((__VALUE__) == LL_GPIO_AF_1 ) ||\ 85 | ((__VALUE__) == LL_GPIO_AF_2 ) ||\ 86 | ((__VALUE__) == LL_GPIO_AF_3 ) ||\ 87 | ((__VALUE__) == LL_GPIO_AF_4 ) ||\ 88 | ((__VALUE__) == LL_GPIO_AF_5 ) ||\ 89 | ((__VALUE__) == LL_GPIO_AF_6 ) ||\ 90 | ((__VALUE__) == LL_GPIO_AF_7 )) 91 | #endif /* GPIOE */ 92 | /** 93 | * @} 94 | */ 95 | 96 | /* Private function prototypes -----------------------------------------------*/ 97 | 98 | /* Exported functions --------------------------------------------------------*/ 99 | /** @addtogroup GPIO_LL_Exported_Functions 100 | * @{ 101 | */ 102 | 103 | /** @addtogroup GPIO_LL_EF_Init 104 | * @{ 105 | */ 106 | 107 | /** 108 | * @brief De-initialize GPIO registers (Registers restored to their default values). 109 | * @param GPIOx GPIO Port 110 | * @retval An ErrorStatus enumeration value: 111 | * - SUCCESS: GPIO registers are de-initialized 112 | * - ERROR: Wrong GPIO Port 113 | */ 114 | ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx) 115 | { 116 | ErrorStatus status = SUCCESS; 117 | 118 | /* Check the parameters */ 119 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 120 | 121 | /* Force and Release reset on clock of GPIOx Port */ 122 | if (GPIOx == GPIOA) 123 | { 124 | LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOA); 125 | LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOA); 126 | } 127 | else if (GPIOx == GPIOB) 128 | { 129 | LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOB); 130 | LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOB); 131 | } 132 | else if (GPIOx == GPIOC) 133 | { 134 | LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOC); 135 | LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOC); 136 | } 137 | #if defined(GPIOD) 138 | else if (GPIOx == GPIOD) 139 | { 140 | LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOD); 141 | LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOD); 142 | } 143 | #endif /* GPIOD */ 144 | #if defined(GPIOE) 145 | else if (GPIOx == GPIOE) 146 | { 147 | LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOE); 148 | LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOE); 149 | } 150 | #endif /* GPIOE */ 151 | #if defined(GPIOF) 152 | else if (GPIOx == GPIOF) 153 | { 154 | LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOF); 155 | LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOF); 156 | } 157 | #endif /* GPIOF */ 158 | else 159 | { 160 | status = ERROR; 161 | } 162 | 163 | return (status); 164 | } 165 | 166 | /** 167 | * @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct. 168 | * @param GPIOx GPIO Port 169 | * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure 170 | * that contains the configuration information for the specified GPIO peripheral. 171 | * @retval An ErrorStatus enumeration value: 172 | * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content 173 | * - ERROR: Not applicable 174 | */ 175 | ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct) 176 | { 177 | uint32_t pinpos; 178 | uint32_t currentpin; 179 | 180 | /* Check the parameters */ 181 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 182 | assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin)); 183 | assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode)); 184 | assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull)); 185 | 186 | /* ------------------------- Configure the port pins ---------------- */ 187 | /* Initialize pinpos on first pin set */ 188 | pinpos = 0; 189 | 190 | /* Configure the port pins */ 191 | while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00u) 192 | { 193 | /* Get current io position */ 194 | currentpin = (GPIO_InitStruct->Pin) & (0x00000001uL << pinpos); 195 | 196 | if (currentpin != 0x00u) 197 | { 198 | if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) 199 | { 200 | /* Check Speed mode parameters */ 201 | assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed)); 202 | 203 | /* Speed mode configuration */ 204 | LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed); 205 | 206 | /* Check Output mode parameters */ 207 | assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType)); 208 | 209 | /* Output mode configuration*/ 210 | LL_GPIO_SetPinOutputType(GPIOx, currentpin, GPIO_InitStruct->OutputType); 211 | } 212 | 213 | /* Pull-up Pull down resistor configuration*/ 214 | LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull); 215 | 216 | if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE) 217 | { 218 | /* Check Alternate parameter */ 219 | assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate)); 220 | 221 | /* Speed mode configuration */ 222 | if (currentpin < LL_GPIO_PIN_8) 223 | { 224 | LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate); 225 | } 226 | else 227 | { 228 | LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate); 229 | } 230 | } 231 | 232 | /* Pin Mode configuration */ 233 | LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode); 234 | } 235 | pinpos++; 236 | } 237 | 238 | return (SUCCESS); 239 | } 240 | 241 | /** 242 | * @brief Set each @ref LL_GPIO_InitTypeDef field to default value. 243 | * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure 244 | * whose fields will be set to default values. 245 | * @retval None 246 | */ 247 | 248 | void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct) 249 | { 250 | /* Reset GPIO init structure parameters values */ 251 | GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL; 252 | GPIO_InitStruct->Mode = LL_GPIO_MODE_ANALOG; 253 | GPIO_InitStruct->Speed = LL_GPIO_SPEED_FREQ_LOW; 254 | GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL; 255 | GPIO_InitStruct->Pull = LL_GPIO_PULL_NO; 256 | GPIO_InitStruct->Alternate = LL_GPIO_AF_0; 257 | } 258 | 259 | /** 260 | * @} 261 | */ 262 | 263 | /** 264 | * @} 265 | */ 266 | 267 | /** 268 | * @} 269 | */ 270 | 271 | #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) */ 272 | 273 | /** 274 | * @} 275 | */ 276 | 277 | #endif /* USE_FULL_LL_DRIVER */ 278 | 279 | -------------------------------------------------------------------------------- /Src/stm32g0xx_ll_lptim.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_lptim.c 4 | * @author MCD Application Team 5 | * @brief LPTIM LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g0xx_ll_lptim.h" 22 | #include "stm32g0xx_ll_bus.h" 23 | #include "stm32g0xx_ll_rcc.h" 24 | 25 | 26 | #ifdef USE_FULL_ASSERT 27 | #include "stm32_assert.h" 28 | #else 29 | #define assert_param(expr) ((void)0U) 30 | #endif /* USE_FULL_ASSERT */ 31 | 32 | /** @addtogroup STM32G0xx_LL_Driver 33 | * @{ 34 | */ 35 | 36 | #if defined (LPTIM1) || defined (LPTIM2) 37 | 38 | /** @addtogroup LPTIM_LL 39 | * @{ 40 | */ 41 | 42 | /* Private types -------------------------------------------------------------*/ 43 | /* Private variables ---------------------------------------------------------*/ 44 | /* Private constants ---------------------------------------------------------*/ 45 | /* Private macros ------------------------------------------------------------*/ 46 | /** @addtogroup LPTIM_LL_Private_Macros 47 | * @{ 48 | */ 49 | #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \ 50 | || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL)) 51 | 52 | #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1) \ 53 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2) \ 54 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4) \ 55 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8) \ 56 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16) \ 57 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32) \ 58 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64) \ 59 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128)) 60 | 61 | #define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \ 62 | || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE)) 63 | 64 | #define IS_LL_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \ 65 | || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE)) 66 | /** 67 | * @} 68 | */ 69 | 70 | 71 | /* Private function prototypes -----------------------------------------------*/ 72 | /* Private functions ---------------------------------------------------------*/ 73 | /** @defgroup LPTIM_Private_Functions LPTIM Private Functions 74 | * @{ 75 | */ 76 | /** 77 | * @} 78 | */ 79 | /* Exported functions --------------------------------------------------------*/ 80 | /** @addtogroup LPTIM_LL_Exported_Functions 81 | * @{ 82 | */ 83 | 84 | /** @addtogroup LPTIM_LL_EF_Init 85 | * @{ 86 | */ 87 | 88 | /** 89 | * @brief Set LPTIMx registers to their reset values. 90 | * @param LPTIMx LP Timer instance 91 | * @retval An ErrorStatus enumeration value: 92 | * - SUCCESS: LPTIMx registers are de-initialized 93 | * - ERROR: invalid LPTIMx instance 94 | */ 95 | ErrorStatus LL_LPTIM_DeInit(const LPTIM_TypeDef *LPTIMx) 96 | { 97 | ErrorStatus result = SUCCESS; 98 | 99 | /* Check the parameters */ 100 | assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 101 | 102 | if (LPTIMx == LPTIM1) 103 | { 104 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1); 105 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1); 106 | } 107 | #if defined(LPTIM2) 108 | else if (LPTIMx == LPTIM2) 109 | { 110 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM2); 111 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM2); 112 | } 113 | #endif /* LPTIM2 */ 114 | else 115 | { 116 | result = ERROR; 117 | } 118 | 119 | return result; 120 | } 121 | 122 | /** 123 | * @brief Set each fields of the LPTIM_InitStruct structure to its default 124 | * value. 125 | * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure 126 | * @retval None 127 | */ 128 | void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct) 129 | { 130 | /* Set the default configuration */ 131 | LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL; 132 | LPTIM_InitStruct->Prescaler = LL_LPTIM_PRESCALER_DIV1; 133 | LPTIM_InitStruct->Waveform = LL_LPTIM_OUTPUT_WAVEFORM_PWM; 134 | LPTIM_InitStruct->Polarity = LL_LPTIM_OUTPUT_POLARITY_REGULAR; 135 | } 136 | 137 | /** 138 | * @brief Configure the LPTIMx peripheral according to the specified parameters. 139 | * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled. 140 | * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable(). 141 | * @param LPTIMx LP Timer Instance 142 | * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure 143 | * @retval An ErrorStatus enumeration value: 144 | * - SUCCESS: LPTIMx instance has been initialized 145 | * - ERROR: LPTIMx instance hasn't been initialized 146 | */ 147 | ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct) 148 | { 149 | ErrorStatus result = SUCCESS; 150 | /* Check the parameters */ 151 | assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 152 | assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource)); 153 | assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler)); 154 | assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform)); 155 | assert_param(IS_LL_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity)); 156 | 157 | /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled 158 | (ENABLE bit is reset to 0). 159 | */ 160 | if (LL_LPTIM_IsEnabled(LPTIMx) == 1UL) 161 | { 162 | result = ERROR; 163 | } 164 | else 165 | { 166 | /* Set CKSEL bitfield according to ClockSource value */ 167 | /* Set PRESC bitfield according to Prescaler value */ 168 | /* Set WAVE bitfield according to Waveform value */ 169 | /* Set WAVEPOL bitfield according to Polarity value */ 170 | MODIFY_REG(LPTIMx->CFGR, 171 | (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL), 172 | LPTIM_InitStruct->ClockSource | \ 173 | LPTIM_InitStruct->Prescaler | \ 174 | LPTIM_InitStruct->Waveform | \ 175 | LPTIM_InitStruct->Polarity); 176 | } 177 | 178 | return result; 179 | } 180 | 181 | /** 182 | * @brief Disable the LPTIM instance 183 | * @rmtoll CR ENABLE LL_LPTIM_Disable 184 | * @param LPTIMx Low-Power Timer instance 185 | * @note The following sequence is required to solve LPTIM disable HW limitation. 186 | * Please check Errata Sheet ES0335 for more details under "MCU may remain 187 | * stuck in LPTIM interrupt when entering Stop mode" section. 188 | * @retval None 189 | */ 190 | void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx) 191 | { 192 | LL_RCC_ClocksTypeDef rcc_clock; 193 | uint32_t tmpclksource = 0; 194 | uint32_t tmpIER; 195 | uint32_t tmpCFGR; 196 | uint32_t tmpCMP; 197 | uint32_t tmpARR; 198 | uint32_t primask_bit; 199 | uint32_t tmpCFGR2; 200 | 201 | /* Check the parameters */ 202 | assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 203 | 204 | /* Enter critical section */ 205 | primask_bit = __get_PRIMASK(); 206 | __set_PRIMASK(1) ; 207 | 208 | /********** Save LPTIM Config *********/ 209 | /* Save LPTIM source clock */ 210 | switch ((uint32_t)LPTIMx) 211 | { 212 | case LPTIM1_BASE: 213 | tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE); 214 | break; 215 | #if defined(LPTIM2) 216 | case LPTIM2_BASE: 217 | tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE); 218 | break; 219 | #endif /* LPTIM2 */ 220 | default: 221 | break; 222 | } 223 | 224 | /* Save LPTIM configuration registers */ 225 | tmpIER = LPTIMx->IER; 226 | tmpCFGR = LPTIMx->CFGR; 227 | tmpCMP = LPTIMx->CMP; 228 | tmpARR = LPTIMx->ARR; 229 | tmpCFGR2 = LPTIMx->CFGR2; 230 | 231 | /************* Reset LPTIM ************/ 232 | (void)LL_LPTIM_DeInit(LPTIMx); 233 | 234 | /********* Restore LPTIM Config *******/ 235 | LL_RCC_GetSystemClocksFreq(&rcc_clock); 236 | 237 | if ((tmpCMP != 0UL) || (tmpARR != 0UL)) 238 | { 239 | /* Force LPTIM source kernel clock from APB */ 240 | switch ((uint32_t)LPTIMx) 241 | { 242 | case LPTIM1_BASE: 243 | LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_PCLK1); 244 | break; 245 | #if defined(LPTIM2) 246 | case LPTIM2_BASE: 247 | LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE_PCLK1); 248 | break; 249 | #endif /* LPTIM2 */ 250 | default: 251 | break; 252 | } 253 | 254 | if (tmpCMP != 0UL) 255 | { 256 | /* Restore CMP and ARR registers (LPTIM should be enabled first) */ 257 | LPTIMx->CR |= LPTIM_CR_ENABLE; 258 | LPTIMx->CMP = tmpCMP; 259 | 260 | /* Polling on CMP write ok status after above restore operation */ 261 | do 262 | { 263 | rcc_clock.SYSCLK_Frequency--; /* Used for timeout */ 264 | } while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL)); 265 | 266 | LL_LPTIM_ClearFlag_CMPOK(LPTIMx); 267 | } 268 | 269 | if (tmpARR != 0UL) 270 | { 271 | LPTIMx->CR |= LPTIM_CR_ENABLE; 272 | LPTIMx->ARR = tmpARR; 273 | 274 | LL_RCC_GetSystemClocksFreq(&rcc_clock); 275 | /* Polling on ARR write ok status after above restore operation */ 276 | do 277 | { 278 | rcc_clock.SYSCLK_Frequency--; /* Used for timeout */ 279 | } while (((LL_LPTIM_IsActiveFlag_ARROK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL)); 280 | 281 | LL_LPTIM_ClearFlag_ARROK(LPTIMx); 282 | } 283 | 284 | 285 | /* Restore LPTIM source kernel clock */ 286 | LL_RCC_SetLPTIMClockSource(tmpclksource); 287 | } 288 | 289 | /* Restore configuration registers (LPTIM should be disabled first) */ 290 | LPTIMx->CR &= ~(LPTIM_CR_ENABLE); 291 | LPTIMx->IER = tmpIER; 292 | LPTIMx->CFGR = tmpCFGR; 293 | LPTIMx->CFGR2 = tmpCFGR2; 294 | 295 | /* Exit critical section: restore previous priority mask */ 296 | __set_PRIMASK(primask_bit); 297 | } 298 | 299 | /** 300 | * @} 301 | */ 302 | 303 | /** 304 | * @} 305 | */ 306 | 307 | /** 308 | * @} 309 | */ 310 | 311 | #endif /* LPTIM1 || LPTIM2 */ 312 | 313 | /** 314 | * @} 315 | */ 316 | 317 | #endif /* USE_FULL_LL_DRIVER */ 318 | -------------------------------------------------------------------------------- /Src/stm32g0xx_hal_iwdg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_iwdg.c 4 | * @author MCD Application Team 5 | * @brief IWDG HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the Independent Watchdog (IWDG) peripheral: 8 | * + Initialization and Start functions 9 | * + IO operation functions 10 | * 11 | ****************************************************************************** 12 | * @attention 13 | * 14 | * Copyright (c) 2018 STMicroelectronics. 15 | * All rights reserved. 16 | * 17 | * This software is licensed under terms that can be found in the LICENSE file 18 | * in the root directory of this software component. 19 | * If no LICENSE file comes with this software, it is provided AS-IS. 20 | * 21 | ****************************************************************************** 22 | @verbatim 23 | ============================================================================== 24 | ##### IWDG Generic features ##### 25 | ============================================================================== 26 | [..] 27 | (+) The IWDG can be started by either software or hardware (configurable 28 | through option byte). 29 | 30 | (+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays 31 | active even if the main clock fails. 32 | 33 | (+) Once the IWDG is started, the LSI is forced ON and both cannot be 34 | disabled. The counter starts counting down from the reset value (0xFFF). 35 | When it reaches the end of count value (0x000) a reset signal is 36 | generated (IWDG reset). 37 | 38 | (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register, 39 | the IWDG_RLR value is reloaded into the counter and the watchdog reset 40 | is prevented. 41 | 42 | (+) The IWDG is implemented in the VDD voltage domain that is still functional 43 | in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY). 44 | IWDGRST flag in RCC_CSR register can be used to inform when an IWDG 45 | reset occurs. 46 | 47 | (+) Debug mode: When the microcontroller enters debug mode (core halted), 48 | the IWDG counter either continues to work normally or stops, depending 49 | on DBG_IWDG_STOP configuration bit in DBG module, accessible through 50 | __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros. 51 | 52 | [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s 53 | The IWDG timeout may vary due to LSI clock frequency dispersion. 54 | STM32G0xx devices provide the capability to measure the LSI clock 55 | frequency (LSI clock is internally connected to TIM16 CH1 input capture). 56 | The measured value can be used to have an IWDG timeout with an 57 | acceptable accuracy. 58 | 59 | [..] Default timeout value (necessary for IWDG_SR status register update): 60 | Constant LSI_VALUE is defined based on the nominal LSI clock frequency. 61 | This frequency being subject to variations as mentioned above, the 62 | default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT 63 | below) may become too short or too long. 64 | In such cases, this default timeout value can be tuned by redefining 65 | the constant LSI_VALUE at user-application level (based, for instance, 66 | on the measured LSI clock frequency as explained above). 67 | 68 | ##### How to use this driver ##### 69 | ============================================================================== 70 | [..] 71 | (#) Use IWDG using HAL_IWDG_Init() function to : 72 | (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI 73 | clock is forced ON and IWDG counter starts counting down. 74 | (++) Enable write access to configuration registers: 75 | IWDG_PR, IWDG_RLR and IWDG_WINR. 76 | (++) Configure the IWDG prescaler and counter reload value. This reload 77 | value will be loaded in the IWDG counter each time the watchdog is 78 | reloaded, then the IWDG will start counting down from this value. 79 | (++) Depending on window parameter: 80 | (+++) If Window Init parameter is same as Window register value, 81 | nothing more is done but reload counter value in order to exit 82 | function with exact time base. 83 | (+++) Else modify Window register. This will automatically reload 84 | watchdog counter. 85 | (++) Wait for status flags to be reset. 86 | 87 | (#) Then the application program must refresh the IWDG counter at regular 88 | intervals during normal operation to prevent an MCU reset, using 89 | HAL_IWDG_Refresh() function. 90 | 91 | *** IWDG HAL driver macros list *** 92 | ==================================== 93 | [..] 94 | Below the list of most used macros in IWDG HAL driver: 95 | (+) __HAL_IWDG_START: Enable the IWDG peripheral 96 | (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in 97 | the reload register 98 | 99 | @endverbatim 100 | */ 101 | 102 | /* Includes ------------------------------------------------------------------*/ 103 | #include "stm32g0xx_hal.h" 104 | 105 | /** @addtogroup STM32G0xx_HAL_Driver 106 | * @{ 107 | */ 108 | 109 | #ifdef HAL_IWDG_MODULE_ENABLED 110 | /** @addtogroup IWDG 111 | * @brief IWDG HAL module driver. 112 | * @{ 113 | */ 114 | 115 | /* Private typedef -----------------------------------------------------------*/ 116 | /* Private define ------------------------------------------------------------*/ 117 | /** @defgroup IWDG_Private_Defines IWDG Private Defines 118 | * @{ 119 | */ 120 | /* Status register needs up to 5 LSI clock periods divided by the clock 121 | prescaler to be updated. The number of LSI clock periods is upper-rounded to 122 | 6 for the timeout value calculation. 123 | The timeout value is calculated using the highest prescaler (256) and 124 | the LSI_VALUE constant. The value of this constant can be changed by the user 125 | to take into account possible LSI clock period variations. 126 | The timeout value is multiplied by 1000 to be converted in milliseconds. 127 | LSI startup time is also considered here by adding LSI_STARTUP_TIME 128 | converted in milliseconds. */ 129 | #define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL)) 130 | #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU) 131 | /** 132 | * @} 133 | */ 134 | 135 | /* Private macro -------------------------------------------------------------*/ 136 | /* Private variables ---------------------------------------------------------*/ 137 | /* Private function prototypes -----------------------------------------------*/ 138 | /* Exported functions --------------------------------------------------------*/ 139 | 140 | /** @addtogroup IWDG_Exported_Functions 141 | * @{ 142 | */ 143 | 144 | /** @addtogroup IWDG_Exported_Functions_Group1 145 | * @brief Initialization and Start functions. 146 | * 147 | @verbatim 148 | =============================================================================== 149 | ##### Initialization and Start functions ##### 150 | =============================================================================== 151 | [..] This section provides functions allowing to: 152 | (+) Initialize the IWDG according to the specified parameters in the 153 | IWDG_InitTypeDef of associated handle. 154 | (+) Manage Window option. 155 | (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog 156 | is reloaded in order to exit function with correct time base. 157 | 158 | @endverbatim 159 | * @{ 160 | */ 161 | 162 | /** 163 | * @brief Initialize the IWDG according to the specified parameters in the 164 | * IWDG_InitTypeDef and start watchdog. Before exiting function, 165 | * watchdog is refreshed in order to have correct time base. 166 | * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains 167 | * the configuration information for the specified IWDG module. 168 | * @retval HAL status 169 | */ 170 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg) 171 | { 172 | uint32_t tickstart; 173 | 174 | /* Check the IWDG handle allocation */ 175 | if (hiwdg == NULL) 176 | { 177 | return HAL_ERROR; 178 | } 179 | 180 | /* Check the parameters */ 181 | assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance)); 182 | assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler)); 183 | assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload)); 184 | assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window)); 185 | 186 | /* Enable IWDG. LSI is turned on automatically */ 187 | __HAL_IWDG_START(hiwdg); 188 | 189 | /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing 190 | 0x5555 in KR */ 191 | IWDG_ENABLE_WRITE_ACCESS(hiwdg); 192 | 193 | /* Write to IWDG registers the Prescaler & Reload values to work with */ 194 | hiwdg->Instance->PR = hiwdg->Init.Prescaler; 195 | hiwdg->Instance->RLR = hiwdg->Init.Reload; 196 | 197 | /* Check pending flag, if previous update not done, return timeout */ 198 | tickstart = HAL_GetTick(); 199 | 200 | /* Wait for register to be updated */ 201 | while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) 202 | { 203 | if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT) 204 | { 205 | if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) 206 | { 207 | return HAL_TIMEOUT; 208 | } 209 | } 210 | } 211 | 212 | /* If window parameter is different than current value, modify window 213 | register */ 214 | if (hiwdg->Instance->WINR != hiwdg->Init.Window) 215 | { 216 | /* Write to IWDG WINR the IWDG_Window value to compare with. In any case, 217 | even if window feature is disabled, Watchdog will be reloaded by writing 218 | windows register */ 219 | hiwdg->Instance->WINR = hiwdg->Init.Window; 220 | } 221 | else 222 | { 223 | /* Reload IWDG counter with value defined in the reload register */ 224 | __HAL_IWDG_RELOAD_COUNTER(hiwdg); 225 | } 226 | 227 | /* Return function status */ 228 | return HAL_OK; 229 | } 230 | 231 | 232 | /** 233 | * @} 234 | */ 235 | 236 | 237 | /** @addtogroup IWDG_Exported_Functions_Group2 238 | * @brief IO operation functions 239 | * 240 | @verbatim 241 | =============================================================================== 242 | ##### IO operation functions ##### 243 | =============================================================================== 244 | [..] This section provides functions allowing to: 245 | (+) Refresh the IWDG. 246 | 247 | @endverbatim 248 | * @{ 249 | */ 250 | 251 | /** 252 | * @brief Refresh the IWDG. 253 | * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains 254 | * the configuration information for the specified IWDG module. 255 | * @retval HAL status 256 | */ 257 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg) 258 | { 259 | /* Reload IWDG counter with value defined in the reload register */ 260 | __HAL_IWDG_RELOAD_COUNTER(hiwdg); 261 | 262 | /* Return function status */ 263 | return HAL_OK; 264 | } 265 | 266 | 267 | /** 268 | * @} 269 | */ 270 | 271 | /** 272 | * @} 273 | */ 274 | 275 | #endif /* HAL_IWDG_MODULE_ENABLED */ 276 | /** 277 | * @} 278 | */ 279 | 280 | /** 281 | * @} 282 | */ 283 | -------------------------------------------------------------------------------- /Inc/stm32g0xx_ll_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_iwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of IWDG LL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G0xx_LL_IWDG_H 21 | #define STM32G0xx_LL_IWDG_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g0xx.h" 29 | 30 | /** @addtogroup STM32G0xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined(IWDG) 35 | 36 | /** @defgroup IWDG_LL IWDG 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | 43 | /* Private constants ---------------------------------------------------------*/ 44 | /** @defgroup IWDG_LL_Private_Constants IWDG Private Constants 45 | * @{ 46 | */ 47 | #define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ 48 | #define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ 49 | #define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ 50 | #define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ 51 | /** 52 | * @} 53 | */ 54 | 55 | /* Private macros ------------------------------------------------------------*/ 56 | 57 | /* Exported types ------------------------------------------------------------*/ 58 | /* Exported constants --------------------------------------------------------*/ 59 | /** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants 60 | * @{ 61 | */ 62 | 63 | /** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines 64 | * @brief Flags defines which can be used with LL_IWDG_ReadReg function 65 | * @{ 66 | */ 67 | #define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */ 68 | #define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */ 69 | #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */ 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider 75 | * @{ 76 | */ 77 | #define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */ 78 | #define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */ 79 | #define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */ 80 | #define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */ 81 | #define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */ 82 | #define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */ 83 | #define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */ 84 | /** 85 | * @} 86 | */ 87 | 88 | /** 89 | * @} 90 | */ 91 | 92 | /* Exported macro ------------------------------------------------------------*/ 93 | /** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros 94 | * @{ 95 | */ 96 | 97 | /** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros 98 | * @{ 99 | */ 100 | 101 | /** 102 | * @brief Write a value in IWDG register 103 | * @param __INSTANCE__ IWDG Instance 104 | * @param __REG__ Register to be written 105 | * @param __VALUE__ Value to be written in the register 106 | * @retval None 107 | */ 108 | #define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 109 | 110 | /** 111 | * @brief Read a value in IWDG register 112 | * @param __INSTANCE__ IWDG Instance 113 | * @param __REG__ Register to be read 114 | * @retval Register value 115 | */ 116 | #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 117 | /** 118 | * @} 119 | */ 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | 126 | /* Exported functions --------------------------------------------------------*/ 127 | /** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions 128 | * @{ 129 | */ 130 | /** @defgroup IWDG_LL_EF_Configuration Configuration 131 | * @{ 132 | */ 133 | 134 | /** 135 | * @brief Start the Independent Watchdog 136 | * @note Except if the hardware watchdog option is selected 137 | * @rmtoll KR KEY LL_IWDG_Enable 138 | * @param IWDGx IWDG Instance 139 | * @retval None 140 | */ 141 | __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx) 142 | { 143 | WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE); 144 | } 145 | 146 | /** 147 | * @brief Reloads IWDG counter with value defined in the reload register 148 | * @rmtoll KR KEY LL_IWDG_ReloadCounter 149 | * @param IWDGx IWDG Instance 150 | * @retval None 151 | */ 152 | __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx) 153 | { 154 | WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD); 155 | } 156 | 157 | /** 158 | * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers 159 | * @rmtoll KR KEY LL_IWDG_EnableWriteAccess 160 | * @param IWDGx IWDG Instance 161 | * @retval None 162 | */ 163 | __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx) 164 | { 165 | WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE); 166 | } 167 | 168 | /** 169 | * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers 170 | * @rmtoll KR KEY LL_IWDG_DisableWriteAccess 171 | * @param IWDGx IWDG Instance 172 | * @retval None 173 | */ 174 | __STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx) 175 | { 176 | WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE); 177 | } 178 | 179 | /** 180 | * @brief Select the prescaler of the IWDG 181 | * @rmtoll PR PR LL_IWDG_SetPrescaler 182 | * @param IWDGx IWDG Instance 183 | * @param Prescaler This parameter can be one of the following values: 184 | * @arg @ref LL_IWDG_PRESCALER_4 185 | * @arg @ref LL_IWDG_PRESCALER_8 186 | * @arg @ref LL_IWDG_PRESCALER_16 187 | * @arg @ref LL_IWDG_PRESCALER_32 188 | * @arg @ref LL_IWDG_PRESCALER_64 189 | * @arg @ref LL_IWDG_PRESCALER_128 190 | * @arg @ref LL_IWDG_PRESCALER_256 191 | * @retval None 192 | */ 193 | __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler) 194 | { 195 | WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler); 196 | } 197 | 198 | /** 199 | * @brief Get the selected prescaler of the IWDG 200 | * @rmtoll PR PR LL_IWDG_GetPrescaler 201 | * @param IWDGx IWDG Instance 202 | * @retval Returned value can be one of the following values: 203 | * @arg @ref LL_IWDG_PRESCALER_4 204 | * @arg @ref LL_IWDG_PRESCALER_8 205 | * @arg @ref LL_IWDG_PRESCALER_16 206 | * @arg @ref LL_IWDG_PRESCALER_32 207 | * @arg @ref LL_IWDG_PRESCALER_64 208 | * @arg @ref LL_IWDG_PRESCALER_128 209 | * @arg @ref LL_IWDG_PRESCALER_256 210 | */ 211 | __STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx) 212 | { 213 | return (READ_REG(IWDGx->PR)); 214 | } 215 | 216 | /** 217 | * @brief Specify the IWDG down-counter reload value 218 | * @rmtoll RLR RL LL_IWDG_SetReloadCounter 219 | * @param IWDGx IWDG Instance 220 | * @param Counter Value between Min_Data=0 and Max_Data=0x0FFF 221 | * @retval None 222 | */ 223 | __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter) 224 | { 225 | WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter); 226 | } 227 | 228 | /** 229 | * @brief Get the specified IWDG down-counter reload value 230 | * @rmtoll RLR RL LL_IWDG_GetReloadCounter 231 | * @param IWDGx IWDG Instance 232 | * @retval Value between Min_Data=0 and Max_Data=0x0FFF 233 | */ 234 | __STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx) 235 | { 236 | return (READ_REG(IWDGx->RLR)); 237 | } 238 | 239 | /** 240 | * @brief Specify high limit of the window value to be compared to the down-counter. 241 | * @rmtoll WINR WIN LL_IWDG_SetWindow 242 | * @param IWDGx IWDG Instance 243 | * @param Window Value between Min_Data=0 and Max_Data=0x0FFF 244 | * @retval None 245 | */ 246 | __STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window) 247 | { 248 | WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window); 249 | } 250 | 251 | /** 252 | * @brief Get the high limit of the window value specified. 253 | * @rmtoll WINR WIN LL_IWDG_GetWindow 254 | * @param IWDGx IWDG Instance 255 | * @retval Value between Min_Data=0 and Max_Data=0x0FFF 256 | */ 257 | __STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx) 258 | { 259 | return (READ_REG(IWDGx->WINR)); 260 | } 261 | 262 | /** 263 | * @} 264 | */ 265 | 266 | /** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management 267 | * @{ 268 | */ 269 | 270 | /** 271 | * @brief Check if flag Prescaler Value Update is set or not 272 | * @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU 273 | * @param IWDGx IWDG Instance 274 | * @retval State of bit (1 or 0). 275 | */ 276 | __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) 277 | { 278 | return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL); 279 | } 280 | 281 | /** 282 | * @brief Check if flag Reload Value Update is set or not 283 | * @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU 284 | * @param IWDGx IWDG Instance 285 | * @retval State of bit (1 or 0). 286 | */ 287 | __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) 288 | { 289 | return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL); 290 | } 291 | 292 | /** 293 | * @brief Check if flag Window Value Update is set or not 294 | * @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU 295 | * @param IWDGx IWDG Instance 296 | * @retval State of bit (1 or 0). 297 | */ 298 | __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx) 299 | { 300 | return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); 301 | } 302 | 303 | /** 304 | * @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not 305 | * @rmtoll SR PVU LL_IWDG_IsReady\n 306 | * SR RVU LL_IWDG_IsReady\n 307 | * SR WVU LL_IWDG_IsReady 308 | * @param IWDGx IWDG Instance 309 | * @retval State of bits (1 or 0). 310 | */ 311 | __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx) 312 | { 313 | return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); 314 | } 315 | 316 | /** 317 | * @} 318 | */ 319 | 320 | /** 321 | * @} 322 | */ 323 | 324 | /** 325 | * @} 326 | */ 327 | 328 | #endif /* IWDG */ 329 | 330 | /** 331 | * @} 332 | */ 333 | 334 | #ifdef __cplusplus 335 | } 336 | #endif 337 | 338 | #endif /* STM32G0xx_LL_IWDG_H */ 339 | -------------------------------------------------------------------------------- /Inc/stm32g0xx_hal_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_wwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of WWDG HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G0xx_HAL_WWDG_H 21 | #define STM32G0xx_HAL_WWDG_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup WWDG 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | 40 | /** @defgroup WWDG_Exported_Types WWDG Exported Types 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @brief WWDG Init structure definition 46 | */ 47 | typedef struct 48 | { 49 | uint32_t Prescaler; /*!< Specifies the prescaler value of the WWDG. 50 | This parameter can be a value of @ref WWDG_Prescaler */ 51 | 52 | uint32_t Window; /*!< Specifies the WWDG window value to be compared to the downcounter. 53 | This parameter must be a number Min_Data = 0x40 and Max_Data = 0x7F */ 54 | 55 | uint32_t Counter; /*!< Specifies the WWDG free-running downcounter value. 56 | This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7F */ 57 | 58 | uint32_t EWIMode ; /*!< Specifies if WWDG Early Wakeup Interrupt is enable or not. 59 | This parameter can be a value of @ref WWDG_EWI_Mode */ 60 | 61 | } WWDG_InitTypeDef; 62 | 63 | /** 64 | * @brief WWDG handle Structure definition 65 | */ 66 | #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) 67 | typedef struct __WWDG_HandleTypeDef 68 | #else 69 | typedef struct 70 | #endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */ 71 | { 72 | WWDG_TypeDef *Instance; /*!< Register base address */ 73 | 74 | WWDG_InitTypeDef Init; /*!< WWDG required parameters */ 75 | 76 | #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) 77 | void (* EwiCallback)(struct __WWDG_HandleTypeDef *hwwdg); /*!< WWDG Early WakeUp Interrupt callback */ 78 | 79 | void (* MspInitCallback)(struct __WWDG_HandleTypeDef *hwwdg); /*!< WWDG Msp Init callback */ 80 | #endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */ 81 | } WWDG_HandleTypeDef; 82 | 83 | #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) 84 | /** 85 | * @brief HAL WWDG common Callback ID enumeration definition 86 | */ 87 | typedef enum 88 | { 89 | HAL_WWDG_EWI_CB_ID = 0x00U, /*!< WWDG EWI callback ID */ 90 | HAL_WWDG_MSPINIT_CB_ID = 0x01U, /*!< WWDG MspInit callback ID */ 91 | } HAL_WWDG_CallbackIDTypeDef; 92 | 93 | /** 94 | * @brief HAL WWDG Callback pointer definition 95 | */ 96 | typedef void (*pWWDG_CallbackTypeDef)(WWDG_HandleTypeDef *hppp); /*!< pointer to a WWDG common callback functions */ 97 | 98 | #endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */ 99 | /** 100 | * @} 101 | */ 102 | 103 | /* Exported constants --------------------------------------------------------*/ 104 | 105 | /** @defgroup WWDG_Exported_Constants WWDG Exported Constants 106 | * @{ 107 | */ 108 | 109 | /** @defgroup WWDG_Interrupt_definition WWDG Interrupt definition 110 | * @{ 111 | */ 112 | #define WWDG_IT_EWI WWDG_CFR_EWI /*!< Early wakeup interrupt */ 113 | /** 114 | * @} 115 | */ 116 | 117 | /** @defgroup WWDG_Flag_definition WWDG Flag definition 118 | * @brief WWDG Flag definition 119 | * @{ 120 | */ 121 | #define WWDG_FLAG_EWIF WWDG_SR_EWIF /*!< Early wakeup interrupt flag */ 122 | /** 123 | * @} 124 | */ 125 | 126 | /** @defgroup WWDG_Prescaler WWDG Prescaler 127 | * @{ 128 | */ 129 | #define WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096)/1 */ 130 | #define WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */ 131 | #define WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */ 132 | #define WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_1 | WWDG_CFR_WDGTB_0) /*!< WWDG counter clock = (PCLK1/4096)/8 */ 133 | #define WWDG_PRESCALER_16 WWDG_CFR_WDGTB_2 /*!< WWDG counter clock = (PCLK1/4096)/16 */ 134 | #define WWDG_PRESCALER_32 (WWDG_CFR_WDGTB_2 | WWDG_CFR_WDGTB_0) /*!< WWDG counter clock = (PCLK1/4096)/32 */ 135 | #define WWDG_PRESCALER_64 (WWDG_CFR_WDGTB_2 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/64 */ 136 | #define WWDG_PRESCALER_128 WWDG_CFR_WDGTB /*!< WWDG counter clock = (PCLK1/4096)/128 */ 137 | /** 138 | * @} 139 | */ 140 | 141 | /** @defgroup WWDG_EWI_Mode WWDG Early Wakeup Interrupt Mode 142 | * @{ 143 | */ 144 | #define WWDG_EWI_DISABLE 0x00000000u /*!< EWI Disable */ 145 | #define WWDG_EWI_ENABLE WWDG_CFR_EWI /*!< EWI Enable */ 146 | /** 147 | * @} 148 | */ 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /* Private macros ------------------------------------------------------------*/ 155 | 156 | /** @defgroup WWDG_Private_Macros WWDG Private Macros 157 | * @{ 158 | */ 159 | #define IS_WWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == WWDG_PRESCALER_1) || \ 160 | ((__PRESCALER__) == WWDG_PRESCALER_2) || \ 161 | ((__PRESCALER__) == WWDG_PRESCALER_4) || \ 162 | ((__PRESCALER__) == WWDG_PRESCALER_8) || \ 163 | ((__PRESCALER__) == WWDG_PRESCALER_16) || \ 164 | ((__PRESCALER__) == WWDG_PRESCALER_32) || \ 165 | ((__PRESCALER__) == WWDG_PRESCALER_64) || \ 166 | ((__PRESCALER__) == WWDG_PRESCALER_128)) 167 | 168 | #define IS_WWDG_WINDOW(__WINDOW__) (((__WINDOW__) >= WWDG_CFR_W_6) && ((__WINDOW__) <= WWDG_CFR_W)) 169 | 170 | #define IS_WWDG_COUNTER(__COUNTER__) (((__COUNTER__) >= WWDG_CR_T_6) && ((__COUNTER__) <= WWDG_CR_T)) 171 | 172 | #define IS_WWDG_EWI_MODE(__MODE__) (((__MODE__) == WWDG_EWI_ENABLE) || \ 173 | ((__MODE__) == WWDG_EWI_DISABLE)) 174 | /** 175 | * @} 176 | */ 177 | 178 | 179 | /* Exported macros ------------------------------------------------------------*/ 180 | 181 | /** @defgroup WWDG_Exported_Macros WWDG Exported Macros 182 | * @{ 183 | */ 184 | 185 | /** 186 | * @brief Enable the WWDG peripheral. 187 | * @param __HANDLE__ WWDG handle 188 | * @retval None 189 | */ 190 | #define __HAL_WWDG_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, WWDG_CR_WDGA) 191 | 192 | /** 193 | * @brief Enable the WWDG early wakeup interrupt. 194 | * @param __HANDLE__: WWDG handle 195 | * @param __INTERRUPT__ specifies the interrupt to enable. 196 | * This parameter can be one of the following values: 197 | * @arg WWDG_IT_EWI: Early wakeup interrupt 198 | * @note Once enabled this interrupt cannot be disabled except by a system reset. 199 | * @retval None 200 | */ 201 | #define __HAL_WWDG_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFR, (__INTERRUPT__)) 202 | 203 | /** 204 | * @brief Check whether the selected WWDG interrupt has occurred or not. 205 | * @param __HANDLE__ WWDG handle 206 | * @param __INTERRUPT__ specifies the it to check. 207 | * This parameter can be one of the following values: 208 | * @arg WWDG_FLAG_EWIF: Early wakeup interrupt IT 209 | * @retval The new state of WWDG_FLAG (SET or RESET). 210 | */ 211 | #define __HAL_WWDG_GET_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_GET_FLAG((__HANDLE__),(__INTERRUPT__)) 212 | 213 | /** @brief Clear the WWDG interrupt pending bits. 214 | * bits to clear the selected interrupt pending bits. 215 | * @param __HANDLE__ WWDG handle 216 | * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 217 | * This parameter can be one of the following values: 218 | * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag 219 | */ 220 | #define __HAL_WWDG_CLEAR_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_CLEAR_FLAG((__HANDLE__), (__INTERRUPT__)) 221 | 222 | /** 223 | * @brief Check whether the specified WWDG flag is set or not. 224 | * @param __HANDLE__ WWDG handle 225 | * @param __FLAG__ specifies the flag to check. 226 | * This parameter can be one of the following values: 227 | * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag 228 | * @retval The new state of WWDG_FLAG (SET or RESET). 229 | */ 230 | #define __HAL_WWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) 231 | 232 | /** 233 | * @brief Clear the WWDG's pending flags. 234 | * @param __HANDLE__ WWDG handle 235 | * @param __FLAG__ specifies the flag to clear. 236 | * This parameter can be one of the following values: 237 | * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag 238 | * @retval None 239 | */ 240 | #define __HAL_WWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) 241 | 242 | /** @brief Check whether the specified WWDG interrupt source is enabled or not. 243 | * @param __HANDLE__ WWDG Handle. 244 | * @param __INTERRUPT__ specifies the WWDG interrupt source to check. 245 | * This parameter can be one of the following values: 246 | * @arg WWDG_IT_EWI: Early Wakeup Interrupt 247 | * @retval state of __INTERRUPT__ (TRUE or FALSE). 248 | */ 249 | #define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR\ 250 | & (__INTERRUPT__)) == (__INTERRUPT__)) 251 | 252 | /** 253 | * @} 254 | */ 255 | 256 | /* Exported functions --------------------------------------------------------*/ 257 | 258 | /** @addtogroup WWDG_Exported_Functions 259 | * @{ 260 | */ 261 | 262 | /** @addtogroup WWDG_Exported_Functions_Group1 263 | * @{ 264 | */ 265 | /* Initialization/de-initialization functions **********************************/ 266 | HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg); 267 | void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg); 268 | /* Callbacks Register/UnRegister functions ***********************************/ 269 | #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1) 270 | HAL_StatusTypeDef HAL_WWDG_RegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID, 271 | pWWDG_CallbackTypeDef pCallback); 272 | HAL_StatusTypeDef HAL_WWDG_UnRegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID); 273 | #endif /* USE_HAL_WWDG_REGISTER_CALLBACKS */ 274 | 275 | /** 276 | * @} 277 | */ 278 | 279 | /** @addtogroup WWDG_Exported_Functions_Group2 280 | * @{ 281 | */ 282 | /* I/O operation functions ******************************************************/ 283 | HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg); 284 | void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg); 285 | void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg); 286 | /** 287 | * @} 288 | */ 289 | 290 | /** 291 | * @} 292 | */ 293 | 294 | /** 295 | * @} 296 | */ 297 | 298 | /** 299 | * @} 300 | */ 301 | 302 | #ifdef __cplusplus 303 | } 304 | #endif 305 | 306 | #endif /* STM32G0xx_HAL_WWDG_H */ 307 | 308 | -------------------------------------------------------------------------------- /Src/stm32g0xx_hal_dma_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_dma_ex.c 4 | * @author MCD Application Team 5 | * @brief DMA Extension HAL module driver 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the DMA Extension peripheral: 8 | * + Extended features functions 9 | * 10 | @verbatim 11 | ============================================================================== 12 | ##### How to use this driver ##### 13 | ============================================================================== 14 | [..] 15 | The DMA Extension HAL driver can be used as follows: 16 | (+) Configure the DMAMUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function. 17 | (+) Configure the DMAMUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function. 18 | Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used 19 | to respectively enable/disable the request generator. 20 | 21 | (+) To handle the DMAMUX Interrupts, the function HAL_DMAEx_MUX_IRQHandler should be called from 22 | the DMAMUX IRQ handler i.e DMAMUX1_OVR_IRQHandler. 23 | As only one interrupt line is available for all DMAMUX channels and request generators , HAL_DMAEx_MUX_IRQHandler should be 24 | called with, as parameter, the appropriate DMA handle as many as used DMAs in the user project 25 | (exception done if a given DMA is not using the DMAMUX SYNC block neither a request generator) 26 | 27 | @endverbatim 28 | ****************************************************************************** 29 | * @attention 30 | * 31 | * Copyright (c) 2018 STMicroelectronics. 32 | * All rights reserved. 33 | * 34 | * This software is licensed under terms that can be found in the LICENSE file 35 | * in the root directory of this software component. 36 | * If no LICENSE file comes with this software, it is provided AS-IS. 37 | * 38 | ****************************************************************************** 39 | */ 40 | 41 | /* Includes ------------------------------------------------------------------*/ 42 | #include "stm32g0xx_hal.h" 43 | 44 | /** @addtogroup STM32G0xx_HAL_Driver 45 | * @{ 46 | */ 47 | 48 | /** @defgroup DMAEx DMAEx 49 | * @brief DMA Extended HAL module driver 50 | * @{ 51 | */ 52 | 53 | #ifdef HAL_DMA_MODULE_ENABLED 54 | 55 | /* Private typedef -----------------------------------------------------------*/ 56 | /* Private define ------------------------------------------------------------*/ 57 | /* Private macro -------------------------------------------------------------*/ 58 | /* Private variables ---------------------------------------------------------*/ 59 | /* Private Constants ---------------------------------------------------------*/ 60 | /* Private function prototypes -----------------------------------------------*/ 61 | /* Exported functions --------------------------------------------------------*/ 62 | 63 | 64 | /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions 65 | * @{ 66 | */ 67 | 68 | /** @defgroup DMAEx_Exported_Functions_Group1 DMAEx Extended features functions 69 | * @brief Extended features functions 70 | * 71 | @verbatim 72 | =============================================================================== 73 | ##### Extended features functions ##### 74 | =============================================================================== 75 | [..] This section provides functions allowing to: 76 | 77 | (+) Configure the DMAMUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function. 78 | (+) Configure the DMAMUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function. 79 | Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used 80 | to respectively enable/disable the request generator. 81 | (+) Handle DMAMUX interrupts using HAL_DMAEx_MUX_IRQHandler : should be called from 82 | the DMAMUX IRQ handler 83 | 84 | @endverbatim 85 | * @{ 86 | */ 87 | 88 | /** 89 | * @brief Configure the DMAMUX synchronization parameters for a given DMA channel (instance). 90 | * @param hdma Pointer to a DMA_HandleTypeDef structure that contains 91 | * the configuration information for the specified DMA channel. 92 | * @param pSyncConfig Pointer to HAL_DMA_MuxSyncConfigTypeDef contains the DMAMUX synchronization parameters 93 | * @retval HAL status 94 | */ 95 | HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig) 96 | { 97 | /* Check the parameters */ 98 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); 99 | 100 | assert_param(IS_DMAMUX_SYNC_SIGNAL_ID(pSyncConfig->SyncSignalID)); 101 | 102 | assert_param(IS_DMAMUX_SYNC_POLARITY(pSyncConfig-> SyncPolarity)); 103 | assert_param(IS_DMAMUX_SYNC_STATE(pSyncConfig->SyncEnable)); 104 | assert_param(IS_DMAMUX_SYNC_EVENT(pSyncConfig->EventEnable)); 105 | assert_param(IS_DMAMUX_SYNC_REQUEST_NUMBER(pSyncConfig->RequestNumber)); 106 | 107 | /*Check if the DMA state is ready */ 108 | if (hdma->State == HAL_DMA_STATE_READY) 109 | { 110 | /* Process Locked */ 111 | __HAL_LOCK(hdma); 112 | 113 | /* Set the new synchronization parameters (and keep the request ID filled during the Init)*/ 114 | MODIFY_REG(hdma->DMAmuxChannel->CCR, \ 115 | (~DMAMUX_CxCR_DMAREQ_ID), \ 116 | (pSyncConfig->SyncSignalID | ((pSyncConfig->RequestNumber - 1U) << DMAMUX_CxCR_NBREQ_Pos) | \ 117 | pSyncConfig->SyncPolarity | ((uint32_t)pSyncConfig->SyncEnable << DMAMUX_CxCR_SE_Pos) | \ 118 | ((uint32_t)pSyncConfig->EventEnable << DMAMUX_CxCR_EGE_Pos))); 119 | 120 | /* Process UnLocked */ 121 | __HAL_UNLOCK(hdma); 122 | 123 | return HAL_OK; 124 | } 125 | else 126 | { 127 | /* Set the error code to busy */ 128 | hdma->ErrorCode = HAL_DMA_ERROR_BUSY; 129 | 130 | /* Return error status */ 131 | return HAL_ERROR; 132 | } 133 | } 134 | 135 | /** 136 | * @brief Configure the DMAMUX request generator block used by the given DMA channel (instance). 137 | * @param hdma Pointer to a DMA_HandleTypeDef structure that contains 138 | * the configuration information for the specified DMA channel. 139 | * @param pRequestGeneratorConfig Pointer to HAL_DMA_MuxRequestGeneratorConfigTypeDef 140 | * contains the request generator parameters. 141 | * 142 | * @retval HAL status 143 | */ 144 | HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma, 145 | HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig) 146 | { 147 | HAL_StatusTypeDef status; 148 | HAL_DMA_StateTypeDef temp_state = hdma->State; 149 | 150 | /* Check the parameters */ 151 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); 152 | 153 | assert_param(IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(pRequestGeneratorConfig->SignalID)); 154 | 155 | assert_param(IS_DMAMUX_REQUEST_GEN_POLARITY(pRequestGeneratorConfig->Polarity)); 156 | assert_param(IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(pRequestGeneratorConfig->RequestNumber)); 157 | 158 | /* check if the DMA state is ready 159 | and DMA is using a DMAMUX request generator block 160 | */ 161 | if (hdma->DMAmuxRequestGen == 0U) 162 | { 163 | /* Set the error code to busy */ 164 | hdma->ErrorCode = HAL_DMA_ERROR_PARAM; 165 | 166 | /* error status */ 167 | status = HAL_ERROR; 168 | } 169 | else if (((hdma->DMAmuxRequestGen->RGCR & DMAMUX_RGxCR_GE) == 0U) && (temp_state == HAL_DMA_STATE_READY)) 170 | { 171 | /* RequestGenerator must be disable prior to the configuration i.e GE bit is 0 */ 172 | 173 | /* Process Locked */ 174 | __HAL_LOCK(hdma); 175 | 176 | /* Set the request generator new parameters*/ 177 | hdma->DMAmuxRequestGen->RGCR = pRequestGeneratorConfig->SignalID | \ 178 | ((pRequestGeneratorConfig->RequestNumber - 1U) << DMAMUX_RGxCR_GNBREQ_Pos) | \ 179 | pRequestGeneratorConfig->Polarity; 180 | /* Process UnLocked */ 181 | __HAL_UNLOCK(hdma); 182 | 183 | return HAL_OK; 184 | } 185 | else 186 | { 187 | /* Set the error code to busy */ 188 | hdma->ErrorCode = HAL_DMA_ERROR_BUSY; 189 | 190 | /* error status */ 191 | status = HAL_ERROR; 192 | } 193 | 194 | return status; 195 | } 196 | 197 | /** 198 | * @brief Enable the DMAMUX request generator block used by the given DMA channel (instance). 199 | * @param hdma Pointer to a DMA_HandleTypeDef structure that contains 200 | * the configuration information for the specified DMA channel. 201 | * @retval HAL status 202 | */ 203 | HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator(DMA_HandleTypeDef *hdma) 204 | { 205 | /* Check the parameters */ 206 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); 207 | 208 | /* check if the DMA state is ready 209 | and DMA is using a DMAMUX request generator block 210 | */ 211 | if ((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0)) 212 | { 213 | 214 | /* Enable the request generator*/ 215 | hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_GE; 216 | 217 | return HAL_OK; 218 | } 219 | else 220 | { 221 | return HAL_ERROR; 222 | } 223 | } 224 | 225 | /** 226 | * @brief Disable the DMAMUX request generator block used by the given DMA channel (instance). 227 | * @param hdma Pointer to a DMA_HandleTypeDef structure that contains 228 | * the configuration information for the specified DMA channel. 229 | * @retval HAL status 230 | */ 231 | HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator(DMA_HandleTypeDef *hdma) 232 | { 233 | /* Check the parameters */ 234 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); 235 | 236 | /* check if the DMA state is ready 237 | and DMA is using a DMAMUX request generator block 238 | */ 239 | if ((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0)) 240 | { 241 | 242 | /* Disable the request generator*/ 243 | hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_GE; 244 | 245 | return HAL_OK; 246 | } 247 | else 248 | { 249 | return HAL_ERROR; 250 | } 251 | } 252 | 253 | /** 254 | * @brief Handles DMAMUX interrupt request. 255 | * @param hdma Pointer to a DMA_HandleTypeDef structure that contains 256 | * the configuration information for the specified DMA channel. 257 | * @retval None 258 | */ 259 | void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma) 260 | { 261 | /* Check for DMAMUX Synchronization overrun */ 262 | if ((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U) 263 | { 264 | /* Disable the synchro overrun interrupt */ 265 | hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; 266 | 267 | /* Clear the DMAMUX synchro overrun flag */ 268 | hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; 269 | 270 | /* Update error code */ 271 | hdma->ErrorCode |= HAL_DMA_ERROR_SYNC; 272 | 273 | if (hdma->XferErrorCallback != NULL) 274 | { 275 | /* Transfer error callback */ 276 | hdma->XferErrorCallback(hdma); 277 | } 278 | } 279 | 280 | if (hdma->DMAmuxRequestGen != 0) 281 | { 282 | /* if using a DMAMUX request generator block Check for DMAMUX request generator overrun */ 283 | if ((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U) 284 | { 285 | /* Disable the request gen overrun interrupt */ 286 | hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; 287 | 288 | /* Clear the DMAMUX request generator overrun flag */ 289 | hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; 290 | 291 | /* Update error code */ 292 | hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN; 293 | 294 | if (hdma->XferErrorCallback != NULL) 295 | { 296 | /* Transfer error callback */ 297 | hdma->XferErrorCallback(hdma); 298 | } 299 | } 300 | } 301 | } 302 | 303 | /** 304 | * @} 305 | */ 306 | 307 | /** 308 | * @} 309 | */ 310 | 311 | #endif /* HAL_DMA_MODULE_ENABLED */ 312 | /** 313 | * @} 314 | */ 315 | 316 | /** 317 | * @} 318 | */ 319 | 320 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 321 | --------------------------------------------------------------------------------