├── _htmresc └── st_logo.png ├── .github ├── PULL_REQUEST_TEMPLATE.md └── ISSUE_TEMPLATE │ ├── other-issue.md │ └── bug_report.md ├── LICENSE.md ├── SECURITY.md ├── Inc ├── stm32g4xx_hal_spi_ex.h ├── stm32_assert_template.h ├── stm32g4xx_hal_flash_ramfunc.h ├── stm32g4xx_hal_pcd_ex.h ├── stm32g4xx_hal_flash_ex.h ├── stm32g4xx_hal_sai_ex.h ├── stm32g4xx_hal_opamp_ex.h ├── stm32g4xx_hal_cryp_ex.h ├── stm32g4xx_hal_crc_ex.h ├── stm32g4xx_hal_smbus_ex.h ├── stm32g4xx_hal_def.h ├── stm32g4xx_hal_i2c_ex.h ├── stm32g4xx_hal_iwdg.h ├── stm32g4xx_ll_usb.h └── stm32g4xx_hal_sram.h ├── Src ├── stm32g4xx_ll_crs.c ├── stm32g4xx_ll_pwr.c ├── stm32g4xx_ll_hrtim.c ├── stm32g4xx_ll_crc.c ├── stm32g4xx_ll_cordic.c ├── stm32g4xx_hal_msp_template.c ├── stm32g4xx_hal_spi_ex.c ├── stm32g4xx_ll_fmac.c ├── stm32g4xx_hal_sai_ex.c ├── stm32g4xx_ll_rng.c ├── stm32g4xx_ll_ucpd.c ├── stm32g4xx_hal_timebase_tim_template.c ├── stm32g4xx_hal_crc_ex.c ├── stm32g4xx_hal_flash_ramfunc.c ├── stm32g4xx_ll_i2c.c ├── stm32g4xx_hal_smbus_ex.c ├── stm32g4xx_ll_lptim.c ├── stm32g4xx_hal_pcd_ex.c ├── stm32g4xx_ll_opamp.c ├── stm32g4xx_ll_gpio.c └── stm32g4xx_hal_dma_ex.c ├── README.md ├── CONTRIBUTING.md └── CODE_OF_CONDUCT.md /_htmresc/st_logo.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/stm32g4xx-hal-driver/HEAD/_htmresc/st_logo.png -------------------------------------------------------------------------------- /.github/PULL_REQUEST_TEMPLATE.md: -------------------------------------------------------------------------------- 1 | ## IMPORTANT INFORMATION 2 | 3 | ### Contributor License Agreement (CLA) 4 | * The Pull Request feature will be considered by STMicroelectronics after the signature of a **Contributor License Agreement (CLA)** by the submitter. 5 | * If you did not sign such agreement, please follow the steps mentioned in the CONTRIBUTING.md file. 6 | -------------------------------------------------------------------------------- /.github/ISSUE_TEMPLATE/other-issue.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: 'Other Issue ' 3 | about: Generic issue description 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | 8 | --- 9 | 10 | **Caution** 11 | The Issues are strictly limited for the reporting of problem encountered with the software provided in this project. 12 | For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post a topic in the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus) 13 | 14 | **Describe the set-up** 15 | * The board (either ST RPN reference or your custom board) 16 | * IDE or at least the compiler and its version 17 | 18 | **Additional context** 19 | If you have a first analysis or a patch proposal, thank you to share your proposal. 20 | 21 | **Screenshots** 22 | If applicable, add screenshots to help explain your problem. 23 | -------------------------------------------------------------------------------- /.github/ISSUE_TEMPLATE/bug_report.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: Bug report 3 | about: Create a report to help us improve 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | 8 | --- 9 | 10 | **Caution** 11 | The Issues are strictly limited for the reporting of problem encountered with the software provided in this project. 12 | For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post a topic in the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus) 13 | 14 | **Describe the set-up** 15 | * The board (either ST RPN reference or your custom board) 16 | * IDE or at least the compiler and its version 17 | 18 | **Describe the bug** 19 | A clear and concise description of what the bug is. 20 | 21 | **How To Reproduce** 22 | 1. Indicate the global behavior of your application project 23 | 24 | 2. The modules that you suspect to be the cause of the problem (Driver, BSP, MW ...) 25 | 26 | 3. The use case that generates the problem 27 | 28 | 4. How we can reproduce the problem 29 | 30 | 31 | **Additional context** 32 | If you have a first analysis or patch correction, thank you to share your proposal. 33 | 34 | **Screenshots** 35 | If applicable, add screenshots to help explain your problem. 36 | -------------------------------------------------------------------------------- /LICENSE.md: -------------------------------------------------------------------------------- 1 | Copyright 2017 STMicroelectronics. 2 | All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without modification, 5 | are permitted provided that the following conditions are met: 6 | 7 | 1. Redistributions of source code must retain the above copyright notice, this 8 | list of conditions and the following disclaimer. 9 | 10 | 2. Redistributions in binary form must reproduce the above copyright notice, 11 | this list of conditions and the following disclaimer in the documentation and/or 12 | other materials provided with the distribution. 13 | 14 | 3. Neither the name of the copyright holder nor the names of its contributors 15 | may be used to endorse or promote products derived from this software without 16 | specific prior written permission. 17 | 18 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | -------------------------------------------------------------------------------- /SECURITY.md: -------------------------------------------------------------------------------- 1 | # Report potential product security vulnerabilities 2 | 3 | ST places a high priority on security, and our Product Security Incident 4 | Response Team (PSIRT) is committed to rapidly addressing potential security 5 | vulnerabilities affecting our products. PSIRT's long history and vast experience 6 | in security allows ST to perform clear analyses and provide appropriate guidance 7 | on mitigations and solutions when applicable. 8 | 9 | If you wish to report potential security vulnerabilities regarding our products, 10 | **please do not report them through public GitHub issues.** Instead, we 11 | encourage you to report them to our ST PSIRT following the process described at: 12 | **https://www.st.com/content/st_com/en/security/report-vulnerabilities.html** 13 | 14 | ### IMPORTANT - READ CAREFULLY: 15 | 16 | STMicroelectronics International N.V., on behalf of itself, its affiliates and 17 | subsidiaries, (collectively “ST”) takes all potential security vulnerability 18 | reports or other related communications (“Report(s)”) seriously. In order to 19 | review Your Report (the terms “You” and “Yours” include your employer, and all 20 | affiliates, subsidiaries and related persons or entities) and take actions as 21 | deemed appropriate, ST requires that we have the rights and Your permission to 22 | do so. 23 | 24 | As such, by submitting Your Report to ST, You agree that You have the right to 25 | do so, and You grant to ST the rights to use the Report for purposes related to 26 | security vulnerability analysis, testing, correction, patching, reporting and 27 | any other related purpose or function. 28 | 29 | By submitting Your Report, You agree that ST’s 30 | [Privacy Policy](https://www.st.com/content/st_com/en/common/privacy-portal.html) 31 | applies to all related communications. 32 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_spi_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_spi_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of SPI HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G4xx_HAL_SPI_EX_H 21 | #define STM32G4xx_HAL_SPI_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup SPIEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* Exported macros -----------------------------------------------------------*/ 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup SPIEx_Exported_Functions 43 | * @{ 44 | */ 45 | 46 | /* Initialization and de-initialization functions ****************************/ 47 | /* IO operation functions *****************************************************/ 48 | /** @addtogroup SPIEx_Exported_Functions_Group1 49 | * @{ 50 | */ 51 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi); 52 | /** 53 | * @} 54 | */ 55 | 56 | /** 57 | * @} 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | #ifdef __cplusplus 69 | } 70 | #endif 71 | 72 | #endif /* STM32G4xx_HAL_SPI_EX_H */ 73 | 74 | -------------------------------------------------------------------------------- /Inc/stm32_assert_template.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32_assert.h 4 | * @author MCD Application Team 5 | * @brief STM32 assert template file. 6 | * This file should be copied to the application folder and renamed 7 | * to stm32_assert.h. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * Copyright (c) 2019 STMicroelectronics. 12 | * All rights reserved. 13 | * 14 | * This software is licensed under terms that can be found in the LICENSE file 15 | * in the root directory of this software component. 16 | * If no LICENSE file comes with this software, it is provided AS-IS. 17 | * 18 | ****************************************************************************** 19 | */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef STM32_ASSERT_H 23 | #define STM32_ASSERT_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Exported types ------------------------------------------------------------*/ 30 | /* Exported constants --------------------------------------------------------*/ 31 | /* Includes ------------------------------------------------------------------*/ 32 | /* Exported macro ------------------------------------------------------------*/ 33 | #ifdef USE_FULL_ASSERT 34 | /** 35 | * @brief The assert_param macro is used for function's parameters check. 36 | * @param expr: If expr is false, it calls assert_failed function 37 | * which reports the name of the source file and the source 38 | * line number of the call that failed. 39 | * If expr is true, it returns no value. 40 | * @retval None 41 | */ 42 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) 43 | /* Exported functions ------------------------------------------------------- */ 44 | void assert_failed(uint8_t *file, uint32_t line); 45 | #else 46 | #define assert_param(expr) ((void)0U) 47 | #endif /* USE_FULL_ASSERT */ 48 | 49 | #ifdef __cplusplus 50 | } 51 | #endif 52 | 53 | #endif /* STM32_ASSERT_H */ 54 | 55 | 56 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_flash_ramfunc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_flash_ramfunc.h 4 | * @author MCD Application Team 5 | * @brief Header file of FLASH RAMFUNC driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | ****************************************************************************** 16 | */ 17 | 18 | /* Define to prevent recursive inclusion -------------------------------------*/ 19 | #ifndef STM32G4xx_FLASH_RAMFUNC_H 20 | #define STM32G4xx_FLASH_RAMFUNC_H 21 | 22 | #ifdef __cplusplus 23 | extern "C" { 24 | #endif 25 | 26 | /* Includes ------------------------------------------------------------------*/ 27 | #include "stm32g4xx_hal_def.h" 28 | 29 | /** @addtogroup STM32G4xx_HAL_Driver 30 | * @{ 31 | */ 32 | 33 | /** @addtogroup FLASH_RAMFUNC 34 | * @{ 35 | */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* Exported macro ------------------------------------------------------------*/ 39 | /* Exported functions --------------------------------------------------------*/ 40 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1 45 | * @{ 46 | */ 47 | /* Peripheral Control functions ************************************************/ 48 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void); 49 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void); 50 | #if defined (FLASH_OPTR_DBANK) 51 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig); 52 | #endif 53 | /** 54 | * @} 55 | */ 56 | 57 | /** 58 | * @} 59 | */ 60 | 61 | /** 62 | * @} 63 | */ 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | #ifdef __cplusplus 70 | } 71 | #endif 72 | 73 | #endif /* STM32G4xx_FLASH_RAMFUNC_H */ 74 | 75 | -------------------------------------------------------------------------------- /Src/stm32g4xx_ll_crs.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_crs.h 4 | * @author MCD Application Team 5 | * @brief CRS LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g4xx_ll_crs.h" 22 | #include "stm32g4xx_ll_bus.h" 23 | 24 | /** @addtogroup STM32G4xx_LL_Driver 25 | * @{ 26 | */ 27 | 28 | #if defined(CRS) 29 | 30 | /** @defgroup CRS_LL CRS 31 | * @{ 32 | */ 33 | 34 | /* Private types -------------------------------------------------------------*/ 35 | /* Private variables ---------------------------------------------------------*/ 36 | /* Private constants ---------------------------------------------------------*/ 37 | /* Private macros ------------------------------------------------------------*/ 38 | /* Private function prototypes -----------------------------------------------*/ 39 | 40 | /* Exported functions --------------------------------------------------------*/ 41 | /** @addtogroup CRS_LL_Exported_Functions 42 | * @{ 43 | */ 44 | 45 | /** @addtogroup CRS_LL_EF_Init 46 | * @{ 47 | */ 48 | 49 | /** 50 | * @brief De-Initializes CRS peripheral registers to their default reset values. 51 | * @retval An ErrorStatus enumeration value: 52 | * - SUCCESS: CRS registers are de-initialized 53 | * - ERROR: not applicable 54 | */ 55 | ErrorStatus LL_CRS_DeInit(void) 56 | { 57 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_CRS); 58 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_CRS); 59 | 60 | return SUCCESS; 61 | } 62 | 63 | 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | #endif /* defined(CRS) */ 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | #endif /* USE_FULL_LL_DRIVER */ 84 | 85 | -------------------------------------------------------------------------------- /Src/stm32g4xx_ll_pwr.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_pwr.c 4 | * @author MCD Application Team 5 | * @brief PWR LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g4xx_ll_pwr.h" 22 | #include "stm32g4xx_ll_bus.h" 23 | 24 | /** @addtogroup STM32G4xx_LL_Driver 25 | * @{ 26 | */ 27 | 28 | #if defined(PWR) 29 | 30 | /** @defgroup PWR_LL PWR 31 | * @{ 32 | */ 33 | 34 | /* Private types -------------------------------------------------------------*/ 35 | /* Private variables ---------------------------------------------------------*/ 36 | /* Private constants ---------------------------------------------------------*/ 37 | /* Private macros ------------------------------------------------------------*/ 38 | /* Private function prototypes -----------------------------------------------*/ 39 | 40 | /* Exported functions --------------------------------------------------------*/ 41 | /** @addtogroup PWR_LL_Exported_Functions 42 | * @{ 43 | */ 44 | 45 | /** @addtogroup PWR_LL_EF_Init 46 | * @{ 47 | */ 48 | 49 | /** 50 | * @brief De-initialize the PWR registers to their default reset values. 51 | * @retval An ErrorStatus enumeration value: 52 | * - SUCCESS: PWR registers are de-initialized 53 | * - ERROR: not applicable 54 | */ 55 | ErrorStatus LL_PWR_DeInit(void) 56 | { 57 | /* Force reset of PWR clock */ 58 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR); 59 | 60 | /* Release reset of PWR clock */ 61 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR); 62 | 63 | return SUCCESS; 64 | } 65 | 66 | /** 67 | * @} 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | #endif /* defined(PWR) */ 78 | /** 79 | * @} 80 | */ 81 | 82 | #endif /* USE_FULL_LL_DRIVER */ 83 | 84 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # STM32CubeG4 HAL Driver MCU Component 2 | 3 | ![latest tag](https://img.shields.io/github/v/tag/STMicroelectronics/stm32g4xx-hal-driver.svg?color=brightgreen) 4 | 5 | ## Overview 6 | 7 | **STM32Cube** is a STMicroelectronics original initiative aimed at making life easier for developers by reducing effort, time and cost. 8 | 9 | **STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform delivered for each STM32 series. 10 | * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product. 11 | * The STM32 HAL-LL drivers, an abstraction layer offering a set of APIs ensuring maximized portability across the STM32 portfolio. 12 | * The BSP drivers of each evaluation, discovery, or nucleo board provided for this STM32 series. 13 | * A consistent set of middleware libraries such as RTOS, USB, FatFS, graphics, touch sensing library... 14 | * A full set of software projects (basic examples, applications, and demonstrations) for each board, each project developed in three flavors using three toolchains (EWARM, MDK-ARM, and STM32CubeIDE). 15 | 16 | Two models of publication are proposed for the STM32Cube embedded software: 17 | * The monolithic **MCU Package**: all STM32Cube software modules of one STM32 series are present (Drivers, Middleware, Projects, Utilities) in the repository (usual name **STM32Cubexx**, xx corresponding to the STM32 series). 18 | * The **MCU component**: each STM32Cube software module being part of the STM32Cube MCU Package, is delivered as an individual repository, allowing the user to select and get only the required software functions. 19 | 20 | ## Description 21 | 22 | This **stm32g4xx_hal_driver** MCU component repo is one element of the STM32CubeG4 MCU embedded software package, providing the **HAL-LL Drivers** part. 23 | 24 | ## Release note 25 | 26 | Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/stm32g4xx-hal-driver/blob/master/Release_Notes.html). 27 | 28 | ## Compatibility information 29 | 30 | It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeG4/blob/master/Release_Notes.html) release note. 31 | 32 | The full **STM32CubeG4** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeG4). 33 | 34 | ## Troubleshooting 35 | 36 | Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide. 37 | -------------------------------------------------------------------------------- /CONTRIBUTING.md: -------------------------------------------------------------------------------- 1 | # Contributing guide 2 | 3 | This guide serves as a checklist before contributing to this repository. It mainly focuses on the steps to follow to submit an issue or a pull-request. 4 | 5 | ## 1. Issues 6 | 7 | ### 1.1 Before opening an issue 8 | 9 | Please check the following points before posting an issue: 10 | * Make sure you are using the latest commit (major releases are tagged, but corrections are available as new commits). 11 | * Make sure your issue is a question/feedback/suggestions **related to** the software provided in this repository. Otherwise, please refer to section [3](CONTRIBUTING.md#3-support-requests-and-questions) below. 12 | * Make sure your issue is not already reported/fixed on GitHub or discussed on a previous issue. Do not forget to browse into the **closed** issues. 13 | 14 | ### 1.2 Posting the issue 15 | 16 | When you have checked the previous points, create a new report from the **Issues** tab of this repository. A template is available [here](../../issues/new/choose) to help you report the issue you are facing or the enhancement you would like to propose. 17 | 18 | ## 2. Pull Requests 19 | 20 | ### 2.1 Before opening a pull-request 21 | 22 | STMicrolectronics is happy to receive contributions from the community, based on an initial Contributor License Agreement (CLA) procedure. 23 | 24 | * If you are an individual writing original source code and you are sure **you own the intellectual property**, then you need to sign an Individual [CLA](https://cla.st.com). 25 | * If you work for a company that wants also to allow you to contribute with your work, your company needs to provide a Corporate [CLA](https://cla.st.com) mentioning your GitHub account name. 26 | * If you are not sure that a CLA (Individual or Corporate) has been signed for your GitHub account you can check the [CLA](https://cla.st.com) dedicated page. 27 | 28 | Please note that: 29 | * The Corporate CLA will always take precedence over the Individual CLA. 30 | * One CLA submission is sufficient, for any project proposed by STMicroelectronics. 31 | 32 | ### 2.2 How to proceed 33 | 34 | * We recommend to engage first a communication thru an issue, in order to present your proposal, just to confirm that it corresponds to STMicroelectronics' domain or scope. 35 | * Then fork the project to your GitHub account to further develop your contribution. Please use the latest commit version. 36 | * Please, submit one pull-request per new feature or proposal. This will ease the analysis and the final merge if accepted. 37 | 38 | ## 3. Support requests and questions 39 | 40 | For support requests or any other question related to the product, the tools, the environment, you can submit a post to the **ST Community** on the appropriate topic [page](https://community.st.com/s/topiccatalog). 41 | -------------------------------------------------------------------------------- /Src/stm32g4xx_ll_hrtim.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_hrtim.c 4 | * @author MCD Application Team 5 | * @brief HRTIM LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g4xx_ll_hrtim.h" 22 | #include "stm32g4xx_ll_bus.h" 23 | 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif 29 | 30 | /** @addtogroup STM32G4xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (HRTIM1) 35 | 36 | /** @addtogroup HRTIM_LL 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /* Private function prototypes -----------------------------------------------*/ 45 | /* Exported functions --------------------------------------------------------*/ 46 | /** @addtogroup HRTIM_LL_Exported_Functions 47 | * @{ 48 | */ 49 | /** 50 | * @brief Set HRTIM instance registers to their reset values. 51 | * @param HRTIMx High Resolution Timer instance 52 | * @retval ErrorStatus enumeration value: 53 | * - SUCCESS: HRTIMx registers are de-initialized 54 | * - ERROR: invalid HRTIMx instance 55 | */ 56 | ErrorStatus LL_HRTIM_DeInit(HRTIM_TypeDef *HRTIMx) 57 | { 58 | ErrorStatus status = SUCCESS; 59 | 60 | /* Check the parameters */ 61 | assert_param(IS_HRTIM_ALL_INSTANCE(HRTIMx)); 62 | 63 | if (HRTIMx == HRTIM1) 64 | { 65 | /* Force HRTIM reset */ 66 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_HRTIM1); 67 | 68 | /* Release HRTIM reset */ 69 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_HRTIM1); 70 | } 71 | else 72 | { 73 | status = ERROR; 74 | } 75 | 76 | return status; 77 | } 78 | /** 79 | * @} 80 | */ 81 | 82 | /** 83 | * @} 84 | */ 85 | 86 | #endif /* HRTIM1 */ 87 | 88 | /** 89 | * @} 90 | */ 91 | 92 | #endif /* USE_FULL_LL_DRIVER */ 93 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_pcd_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_pcd_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of PCD HAL Extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G4xx_HAL_PCD_EX_H 21 | #define STM32G4xx_HAL_PCD_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif /* __cplusplus */ 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g4xx_hal_def.h" 29 | 30 | #if defined (USB) 31 | /** @addtogroup STM32G4xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup PCDEx 36 | * @{ 37 | */ 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* Exported macros -----------------------------------------------------------*/ 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions 43 | * @{ 44 | */ 45 | /** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 46 | * @{ 47 | */ 48 | 49 | 50 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, 51 | uint16_t ep_kind, uint32_t pmaadress); 52 | 53 | 54 | HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); 55 | HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); 56 | 57 | 58 | HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd); 59 | HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd); 60 | void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd); 61 | 62 | void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); 63 | void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | #endif /* defined (USB) */ 81 | 82 | #ifdef __cplusplus 83 | } 84 | #endif /* __cplusplus */ 85 | 86 | 87 | #endif /* STM32G4xx_HAL_PCD_EX_H */ 88 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_flash_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_flash_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of FLASH HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | ****************************************************************************** 16 | */ 17 | 18 | /* Define to prevent recursive inclusion -------------------------------------*/ 19 | #ifndef STM32G4xx_HAL_FLASH_EX_H 20 | #define STM32G4xx_HAL_FLASH_EX_H 21 | 22 | #ifdef __cplusplus 23 | extern "C" { 24 | #endif 25 | 26 | /* Includes ------------------------------------------------------------------*/ 27 | #include "stm32g4xx_hal_def.h" 28 | 29 | /** @addtogroup STM32G4xx_HAL_Driver 30 | * @{ 31 | */ 32 | 33 | /** @addtogroup FLASHEx 34 | * @{ 35 | */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | 39 | /* Exported constants --------------------------------------------------------*/ 40 | 41 | /* Exported macro ------------------------------------------------------------*/ 42 | 43 | /* Exported functions --------------------------------------------------------*/ 44 | /** @addtogroup FLASHEx_Exported_Functions 45 | * @{ 46 | */ 47 | 48 | /* Extended Program operation functions *************************************/ 49 | /** @addtogroup FLASHEx_Exported_Functions_Group1 50 | * @{ 51 | */ 52 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); 53 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 54 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 55 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 56 | HAL_StatusTypeDef HAL_FLASHEx_EnableSecMemProtection(uint32_t Bank); 57 | void HAL_FLASHEx_EnableDebugger(void); 58 | void HAL_FLASHEx_DisableDebugger(void); 59 | /** 60 | * @} 61 | */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @addtogroup FLASHEx_Private_Functions 68 | * @{ 69 | */ 70 | void FLASH_PageErase(uint32_t Page, uint32_t Banks); 71 | void FLASH_FlushCaches(void); 72 | /** 73 | * @} 74 | */ 75 | 76 | /** 77 | * @} 78 | */ 79 | 80 | /** 81 | * @} 82 | */ 83 | 84 | #ifdef __cplusplus 85 | } 86 | #endif 87 | 88 | #endif /* STM32G4xx_HAL_FLASH_EX_H */ 89 | 90 | -------------------------------------------------------------------------------- /Src/stm32g4xx_ll_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_crc.c 4 | * @author MCD Application Team 5 | * @brief CRC LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g4xx_ll_crc.h" 22 | #include "stm32g4xx_ll_bus.h" 23 | 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif /* USE_FULL_ASSERT */ 29 | 30 | /** @addtogroup STM32G4xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (CRC) 35 | 36 | /** @addtogroup CRC_LL 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /* Private function prototypes -----------------------------------------------*/ 45 | 46 | /* Exported functions --------------------------------------------------------*/ 47 | /** @addtogroup CRC_LL_Exported_Functions 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup CRC_LL_EF_Init 52 | * @{ 53 | */ 54 | 55 | /** 56 | * @brief De-initialize CRC registers (Registers restored to their default values). 57 | * @param CRCx CRC Instance 58 | * @retval An ErrorStatus enumeration value: 59 | * - SUCCESS: CRC registers are de-initialized 60 | * - ERROR: CRC registers are not de-initialized 61 | */ 62 | ErrorStatus LL_CRC_DeInit(const CRC_TypeDef *CRCx) 63 | { 64 | ErrorStatus status = SUCCESS; 65 | 66 | /* Check the parameters */ 67 | assert_param(IS_CRC_ALL_INSTANCE(CRCx)); 68 | 69 | if (CRCx == CRC) 70 | { 71 | /* Force CRC reset */ 72 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_CRC); 73 | 74 | /* Release CRC reset */ 75 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_CRC); 76 | } 77 | else 78 | { 79 | status = ERROR; 80 | } 81 | 82 | return (status); 83 | } 84 | 85 | /** 86 | * @} 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** 94 | * @} 95 | */ 96 | 97 | #endif /* defined (CRC) */ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | #endif /* USE_FULL_LL_DRIVER */ 104 | -------------------------------------------------------------------------------- /Src/stm32g4xx_ll_cordic.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_cordic.c 4 | * @author MCD Application Team 5 | * @brief CORDIC LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g4xx_ll_cordic.h" 22 | #include "stm32g4xx_ll_bus.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif /* USE_FULL_ASSERT */ 28 | 29 | /** @addtogroup STM32G4xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined(CORDIC) 34 | 35 | /** @addtogroup CORDIC_LL 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | /* Private function prototypes -----------------------------------------------*/ 44 | 45 | /* Exported functions --------------------------------------------------------*/ 46 | /** @addtogroup CORDIC_LL_Exported_Functions 47 | * @{ 48 | */ 49 | 50 | /** @addtogroup CORDIC_LL_EF_Init 51 | * @{ 52 | */ 53 | 54 | /** 55 | * @brief De-Initialize CORDIC peripheral registers to their default reset values. 56 | * @param CORDICx CORDIC Instance 57 | * @retval An ErrorStatus enumeration value: 58 | * - SUCCESS: CORDIC registers are de-initialized 59 | * - ERROR: CORDIC registers are not de-initialized 60 | */ 61 | ErrorStatus LL_CORDIC_DeInit(const CORDIC_TypeDef *CORDICx) 62 | { 63 | ErrorStatus status = SUCCESS; 64 | 65 | /* Check the parameters */ 66 | assert_param(IS_CORDIC_ALL_INSTANCE(CORDICx)); 67 | 68 | if (CORDICx == CORDIC) 69 | { 70 | /* Force CORDIC reset */ 71 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_CORDIC); 72 | 73 | /* Release CORDIC reset */ 74 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_CORDIC); 75 | } 76 | else 77 | { 78 | status = ERROR; 79 | } 80 | 81 | return (status); 82 | } 83 | 84 | /** 85 | * @} 86 | */ 87 | 88 | /** 89 | * @} 90 | */ 91 | 92 | /** 93 | * @} 94 | */ 95 | 96 | #endif /* defined(CORDIC) */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | #endif /* USE_FULL_LL_DRIVER */ 103 | -------------------------------------------------------------------------------- /Src/stm32g4xx_hal_msp_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_msp_template.c 4 | * @author MCD Application Team 5 | * @brief HAL MSP module. 6 | * This file template is located in the HAL folder and should be copied 7 | * to the user folder. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * Copyright (c) 2019 STMicroelectronics. 12 | * All rights reserved. 13 | * 14 | * This software is licensed under terms that can be found in the LICENSE file 15 | * in the root directory of this software component. 16 | * If no LICENSE file comes with this software, it is provided AS-IS. 17 | * 18 | ****************************************************************************** 19 | */ 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32g4xx_hal.h" 23 | 24 | /** @addtogroup STM32G4xx_HAL_Driver 25 | * @{ 26 | */ 27 | 28 | /** @defgroup HAL_MSP HAL MSP module driver 29 | * @brief HAL MSP module. 30 | * @{ 31 | */ 32 | 33 | /* Private typedef -----------------------------------------------------------*/ 34 | /* Private define ------------------------------------------------------------*/ 35 | /* Private macro -------------------------------------------------------------*/ 36 | /* Private variables ---------------------------------------------------------*/ 37 | /* Private function prototypes -----------------------------------------------*/ 38 | /* Private functions ---------------------------------------------------------*/ 39 | 40 | /** @defgroup HAL_MSP_Private_Functions 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @brief Initialize the Global MSP. 46 | * @param None 47 | * @retval None 48 | */ 49 | void HAL_MspInit(void) 50 | { 51 | /* NOTE : This function is generated automatically by STM32CubeMX and eventually 52 | modified by the user 53 | */ 54 | } 55 | 56 | /** 57 | * @brief DeInitialize the Global MSP. 58 | * @param None 59 | * @retval None 60 | */ 61 | void HAL_MspDeInit(void) 62 | { 63 | /* NOTE : This function is generated automatically by STM32CubeMX and eventually 64 | modified by the user 65 | */ 66 | } 67 | 68 | /** 69 | * @brief Initialize the PPP MSP. 70 | * @param None 71 | * @retval None 72 | */ 73 | void HAL_PPP_MspInit(void) 74 | { 75 | /* NOTE : This function is generated automatically by STM32CubeMX and eventually 76 | modified by the user 77 | */ 78 | } 79 | 80 | /** 81 | * @brief DeInitialize the PPP MSP. 82 | * @param None 83 | * @retval None 84 | */ 85 | void HAL_PPP_MspDeInit(void) 86 | { 87 | /* NOTE : This function is generated automatically by STM32CubeMX and eventually 88 | modified by the user 89 | */ 90 | } 91 | 92 | /** 93 | * @} 94 | */ 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_sai_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_sai_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of SAI HAL extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G4xx_HAL_SAI_EX_H 21 | #define STM32G4xx_HAL_SAI_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined(SAI1) 35 | 36 | /** @addtogroup SAIEx 37 | * @{ 38 | */ 39 | 40 | /* Exported types ------------------------------------------------------------*/ 41 | /** @defgroup SAIEx_Exported_Types SAIEx Exported Types 42 | * @{ 43 | */ 44 | 45 | /** 46 | * @brief PDM microphone delay structure definition 47 | */ 48 | typedef struct 49 | { 50 | uint32_t MicPair; /*!< Specifies which pair of microphones is selected. 51 | This parameter must be a number between Min_Data = 1 and Max_Data = 3. */ 52 | 53 | uint32_t LeftDelay; /*!< Specifies the delay in PDM clock unit to apply on left microphone. 54 | This parameter must be a number between Min_Data = 0 and Max_Data = 7. */ 55 | 56 | uint32_t RightDelay; /*!< Specifies the delay in PDM clock unit to apply on right microphone. 57 | This parameter must be a number between Min_Data = 0 and Max_Data = 7. */ 58 | } SAIEx_PdmMicDelayParamTypeDef; 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | /* Exported constants --------------------------------------------------------*/ 65 | /* Exported macros -----------------------------------------------------------*/ 66 | /* Exported functions --------------------------------------------------------*/ 67 | /** @addtogroup SAIEx_Exported_Functions SAIEx Extended Exported Functions 68 | * @{ 69 | */ 70 | 71 | /** @addtogroup SAIEx_Exported_Functions_Group1 Peripheral Control functions 72 | * @{ 73 | */ 74 | HAL_StatusTypeDef HAL_SAIEx_ConfigPdmMicDelay(const SAI_HandleTypeDef *hsai, 75 | const SAIEx_PdmMicDelayParamTypeDef *pdmMicDelay); 76 | /** 77 | * @} 78 | */ 79 | 80 | /** 81 | * @} 82 | */ 83 | 84 | /* Private macros ------------------------------------------------------------*/ 85 | /** @addtogroup SAIEx_Private_Macros SAIEx Extended Private Macros 86 | * @{ 87 | */ 88 | #define IS_SAI_PDM_MIC_DELAY(VALUE) ((VALUE) <= 7U) 89 | /** 90 | * @} 91 | */ 92 | 93 | /** 94 | * @} 95 | */ 96 | 97 | #endif /* SAI1 */ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | #ifdef __cplusplus 104 | } 105 | #endif 106 | 107 | #endif /* STM32G4xx_HAL_SAI_EX_H */ 108 | 109 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_opamp_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_opamp_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of OPAMP HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G4xx_HAL_OPAMP_EX_H 21 | #define STM32G4xx_HAL_OPAMP_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (OPAMP1) || defined (OPAMP2) || defined (OPAMP3) || defined (OPAMP4) || defined (OPAMP5) || defined (OPAMP6) 35 | 36 | /** @addtogroup OPAMPEx OPAMPEx 37 | * @{ 38 | */ 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macro ------------------------------------------------------------*/ 42 | /* Exported functions --------------------------------------------------------*/ 43 | /** @addtogroup OPAMPEx_Exported_Functions OPAMP Extended Exported Functions 44 | * @{ 45 | */ 46 | 47 | /** @addtogroup OPAMPEx_Exported_Functions_Group1 Extended Input and Output operation functions 48 | * @{ 49 | */ 50 | 51 | /* I/O operation functions *****************************************************/ 52 | 53 | #if defined(STM32G473xx) || defined(STM32G474xx) || defined(STM32G483xx) || defined(STM32G484xx) 54 | HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPAMP_HandleTypeDef *hopamp2, 55 | OPAMP_HandleTypeDef *hopamp3, OPAMP_HandleTypeDef *hopamp4, OPAMP_HandleTypeDef *hopamp5, OPAMP_HandleTypeDef *hopamp6); 56 | #elif defined(STM32GBK1CB) || defined(STM32G431xx) || defined(STM32G441xx) || defined(STM32G471xx) 57 | HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPAMP_HandleTypeDef *hopamp2, 58 | OPAMP_HandleTypeDef *hopamp3); 59 | #elif defined(STM32G491xx) || defined(STM32G4A1xx) 60 | HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPAMP_HandleTypeDef *hopamp2, 61 | OPAMP_HandleTypeDef *hopamp3, OPAMP_HandleTypeDef *hopamp6); 62 | #elif defined(STM32G411xB) || defined(STM32G411xC) 63 | HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1); 64 | #endif /* STM32G473xx || STM32G474xx || STM32G483xx || STM32G484xx */ 65 | 66 | /** 67 | * @} 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | #endif /* OPAMP1 || OPAMP2 || OPAMP3 || OPAMP4 || OPAMP5 || OPAMP6 */ 79 | 80 | /** 81 | * @} 82 | */ 83 | 84 | #ifdef __cplusplus 85 | } 86 | #endif 87 | 88 | 89 | #endif /* STM32G4xx_HAL_OPAMP_EX_H */ 90 | -------------------------------------------------------------------------------- /Src/stm32g4xx_hal_spi_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_spi_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended SPI HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * SPI peripheral extended functionalities : 8 | * + IO operation functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2019 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "stm32g4xx_hal.h" 25 | 26 | /** @addtogroup STM32G4xx_HAL_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup SPIEx SPIEx 31 | * @brief SPI Extended HAL module driver 32 | * @{ 33 | */ 34 | #ifdef HAL_SPI_MODULE_ENABLED 35 | 36 | /* Private typedef -----------------------------------------------------------*/ 37 | /* Private defines -----------------------------------------------------------*/ 38 | /** @defgroup SPIEx_Private_Constants SPIEx Private Constants 39 | * @{ 40 | */ 41 | #define SPI_FIFO_SIZE 4UL 42 | /** 43 | * @} 44 | */ 45 | 46 | /* Private macros ------------------------------------------------------------*/ 47 | /* Private variables ---------------------------------------------------------*/ 48 | /* Private function prototypes -----------------------------------------------*/ 49 | /* Exported functions --------------------------------------------------------*/ 50 | 51 | /** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions 52 | * @{ 53 | */ 54 | 55 | /** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions 56 | * @brief Data transfers functions 57 | * 58 | @verbatim 59 | ============================================================================== 60 | ##### IO operation functions ##### 61 | =============================================================================== 62 | [..] 63 | This subsection provides a set of extended functions to manage the SPI 64 | data transfers. 65 | 66 | (#) Rx data flush function: 67 | (++) HAL_SPIEx_FlushRxFifo() 68 | 69 | @endverbatim 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief Flush the RX fifo. 75 | * @param hspi pointer to a SPI_HandleTypeDef structure that contains 76 | * the configuration information for the specified SPI module. 77 | * @retval HAL status 78 | */ 79 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi) 80 | { 81 | __IO uint32_t tmpreg; 82 | uint8_t count = 0U; 83 | while ((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_FRLVL_EMPTY) 84 | { 85 | count++; 86 | tmpreg = hspi->Instance->DR; 87 | UNUSED(tmpreg); /* To avoid GCC warning */ 88 | if (count == SPI_FIFO_SIZE) 89 | { 90 | return HAL_TIMEOUT; 91 | } 92 | } 93 | return HAL_OK; 94 | } 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | #endif /* HAL_SPI_MODULE_ENABLED */ 105 | 106 | /** 107 | * @} 108 | */ 109 | 110 | /** 111 | * @} 112 | */ 113 | -------------------------------------------------------------------------------- /CODE_OF_CONDUCT.md: -------------------------------------------------------------------------------- 1 | # Contributor Covenant Code of Conduct 2 | 3 | ## Our Pledge 4 | 5 | In the interest of fostering an open and welcoming environment, we as 6 | contributors and maintainers pledge to making participation in our project and 7 | our community a harassment-free experience for everyone, regardless of age, body 8 | size, disability, ethnicity, sex characteristics, gender identity and expression, 9 | level of experience, education, socio-economic status, nationality, personal 10 | appearance, race, religion, or sexual identity and orientation. 11 | 12 | ## Our Standards 13 | 14 | Examples of behavior that contributes to creating a positive environment 15 | include: 16 | 17 | * Using welcoming and inclusive language 18 | * Being respectful of differing viewpoints and experiences 19 | * Gracefully accepting constructive criticism 20 | * Focusing on what is best for the community 21 | * Showing empathy towards other community members 22 | 23 | Examples of unacceptable behavior by participants include: 24 | 25 | * The use of sexualized language or imagery and unwelcome sexual attention or 26 | advances 27 | * Trolling, insulting/derogatory comments, and personal or political attacks 28 | * Public or private harassment 29 | * Publishing others' private information, such as a physical or electronic 30 | address, without explicit permission 31 | * Other conduct which could reasonably be considered inappropriate in a 32 | professional setting 33 | 34 | ## Our Responsibilities 35 | 36 | Project maintainers are responsible for clarifying the standards of acceptable 37 | behavior and are expected to take appropriate and fair corrective action in 38 | response to any instances of unacceptable behavior. 39 | 40 | Project maintainers have the right and responsibility to remove, edit, or 41 | reject comments, commits, code, wiki edits, issues, and other contributions 42 | that are not aligned to this Code of Conduct, or to ban temporarily or 43 | permanently any contributor for other behaviors that they deem inappropriate, 44 | threatening, offensive, or harmful. 45 | 46 | ## Scope 47 | 48 | This Code of Conduct applies both within project spaces and in public spaces 49 | when an individual is representing the project or its community. Examples of 50 | representing a project or community include using an official project e-mail 51 | address, posting via an official social media account, or acting as an appointed 52 | representative at an online or offline event. Representation of a project may be 53 | further defined and clarified by project maintainers. 54 | 55 | ## Enforcement 56 | 57 | Instances of abusive, harassing, or otherwise unacceptable behavior may be 58 | reported by contacting the project team at https://www.st.com/content/st_com/en/contact-us.html. All 59 | complaints will be reviewed and investigated and will result in a response that 60 | is deemed necessary and appropriate to the circumstances. The project team is 61 | obligated to maintain confidentiality with regard to the reporter of an incident. 62 | Further details of specific enforcement policies may be posted separately. 63 | 64 | Project maintainers who do not follow or enforce the Code of Conduct in good 65 | faith may face temporary or permanent repercussions as determined by other 66 | members of the project's leadership. 67 | 68 | ## Attribution 69 | 70 | This Code of Conduct is adapted from the [Contributor Covenant][homepage], version 1.4, 71 | available at https://www.contributor-covenant.org/version/1/4/code-of-conduct.html 72 | 73 | [homepage]: https://www.contributor-covenant.org 74 | 75 | For answers to common questions about this code of conduct, see 76 | https://www.contributor-covenant.org/faq 77 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_cryp_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_cryp_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRYPEx HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G4xx_HAL_CRYP_EX_H 21 | #define STM32G4xx_HAL_CRYP_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined(AES) 35 | 36 | /** @defgroup CRYPEx CRYPEx 37 | * @brief CRYP Extension HAL module driver. 38 | * @{ 39 | */ 40 | 41 | /* Exported types ------------------------------------------------------------*/ 42 | /* Exported constants --------------------------------------------------------*/ 43 | /* Private types -------------------------------------------------------------*/ 44 | /** @defgroup CRYPEx_Private_Types CRYPEx Private Types 45 | * @{ 46 | */ 47 | 48 | /** 49 | * @} 50 | */ 51 | 52 | /* Private variables ---------------------------------------------------------*/ 53 | /** @defgroup CRYPEx_Private_Variables CRYPEx Private Variables 54 | * @{ 55 | */ 56 | 57 | /** 58 | * @} 59 | */ 60 | 61 | /* Private constants ---------------------------------------------------------*/ 62 | /** @defgroup CRYPEx_Private_Constants CRYPEx Private Constants 63 | * @{ 64 | */ 65 | 66 | /** 67 | * @} 68 | */ 69 | 70 | /* Private macros ------------------------------------------------------------*/ 71 | /** @defgroup CRYPEx_Private_Macros CRYPEx Private Macros 72 | * @{ 73 | */ 74 | 75 | /** 76 | * @} 77 | */ 78 | 79 | /* Private functions ---------------------------------------------------------*/ 80 | /** @defgroup CRYPEx_Private_Functions CRYPEx Private Functions 81 | * @{ 82 | */ 83 | 84 | /** 85 | * @} 86 | */ 87 | 88 | /* Exported functions --------------------------------------------------------*/ 89 | /** @defgroup CRYPEx_Exported_Functions CRYPEx Exported Functions 90 | * @{ 91 | */ 92 | 93 | /** @addtogroup CRYPEx_Exported_Functions_Group1 94 | * @{ 95 | */ 96 | HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout); 97 | HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout); 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /** @addtogroup CRYPEx_Exported_Functions_Group2 104 | * @{ 105 | */ 106 | void HAL_CRYPEx_EnableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp); 107 | void HAL_CRYPEx_DisableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp); 108 | 109 | /** 110 | * @} 111 | */ 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | /** 118 | * @} 119 | */ 120 | #endif /* AES */ 121 | 122 | /** 123 | * @} 124 | */ 125 | 126 | #ifdef __cplusplus 127 | } 128 | #endif 129 | 130 | #endif /* STM32G4xx_HAL_CRYP_EX_H */ 131 | -------------------------------------------------------------------------------- /Src/stm32g4xx_ll_fmac.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_fmac.c 4 | * @author MCD Application Team 5 | * @brief Header for stm32g4xx_ll_fmac.c module 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g4xx_ll_fmac.h" 22 | #include "stm32g4xx_ll_bus.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif /* USE_FULL_ASSERT */ 28 | 29 | /** @addtogroup STM32G4xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined(FMAC) 34 | 35 | /** @addtogroup FMAC_LL 36 | * @{ 37 | */ 38 | 39 | /* Private typedef -----------------------------------------------------------*/ 40 | /* Private defines -----------------------------------------------------------*/ 41 | /* Private macros ------------------------------------------------------------*/ 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* Global variables ----------------------------------------------------------*/ 44 | /* Private function prototypes -----------------------------------------------*/ 45 | /* Functions Definition ------------------------------------------------------*/ 46 | /** @addtogroup FMAC_LL_Exported_Functions 47 | * @{ 48 | */ 49 | 50 | /** @addtogroup FMAC_LL_EF_Init 51 | * @{ 52 | */ 53 | 54 | /** 55 | * @brief Initialize FMAC peripheral registers to their default reset values. 56 | * @param FMACx FMAC Instance 57 | * @retval ErrorStatus enumeration value: 58 | * - SUCCESS: FMAC registers are initialized 59 | * - ERROR: FMAC registers are not initialized 60 | */ 61 | ErrorStatus LL_FMAC_Init(FMAC_TypeDef *FMACx) 62 | { 63 | ErrorStatus status = SUCCESS; 64 | 65 | /* Check the parameters */ 66 | assert_param(IS_FMAC_ALL_INSTANCE(FMACx)); 67 | 68 | if (FMACx == FMAC) 69 | { 70 | /* Perform the reset */ 71 | LL_FMAC_EnableReset(FMACx); 72 | 73 | /* Wait until flag is reset */ 74 | while (LL_FMAC_IsEnabledReset(FMACx) != 0UL) 75 | { 76 | } 77 | } 78 | else 79 | { 80 | status = ERROR; 81 | } 82 | 83 | return (status); 84 | } 85 | 86 | /** 87 | * @brief De-Initialize FMAC peripheral registers to their default reset values. 88 | * @param FMACx FMAC Instance 89 | * @retval An ErrorStatus enumeration value: 90 | * - SUCCESS: FMAC registers are de-initialized 91 | * - ERROR: FMAC registers are not de-initialized 92 | */ 93 | ErrorStatus LL_FMAC_DeInit(const FMAC_TypeDef *FMACx) 94 | { 95 | ErrorStatus status = SUCCESS; 96 | 97 | /* Check the parameters */ 98 | assert_param(IS_FMAC_ALL_INSTANCE(FMACx)); 99 | 100 | if (FMACx == FMAC) 101 | { 102 | /* Force FMAC reset */ 103 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_FMAC); 104 | 105 | /* Release FMAC reset */ 106 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_FMAC); 107 | } 108 | else 109 | { 110 | status = ERROR; 111 | } 112 | 113 | return (status); 114 | } 115 | 116 | /** 117 | * @} 118 | */ 119 | 120 | /** 121 | * @} 122 | */ 123 | 124 | /** 125 | * @} 126 | */ 127 | 128 | #endif /* defined(FMAC) */ 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | #endif /* USE_FULL_LL_DRIVER */ 135 | -------------------------------------------------------------------------------- /Src/stm32g4xx_hal_sai_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_sai_ex.c 4 | * @author MCD Application Team 5 | * @brief SAI Extended HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionality of the SAI Peripheral Controller: 8 | * + Modify PDM microphone delays. 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2019 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "stm32g4xx_hal.h" 25 | 26 | /** @addtogroup STM32G4xx_HAL_Driver 27 | * @{ 28 | */ 29 | 30 | #if defined(SAI1) 31 | #ifdef HAL_SAI_MODULE_ENABLED 32 | 33 | /** @defgroup SAIEx SAIEx 34 | * @brief SAI Extended HAL module driver 35 | * @{ 36 | */ 37 | 38 | /* Private types -------------------------------------------------------------*/ 39 | /* Private variables ---------------------------------------------------------*/ 40 | /* Private constants ---------------------------------------------------------*/ 41 | /** @defgroup SAIEx_Private_Defines SAIEx Extended Private Defines 42 | * @{ 43 | */ 44 | #define SAI_PDM_DELAY_MASK 0x77U 45 | #define SAI_PDM_DELAY_OFFSET 8U 46 | #define SAI_PDM_RIGHT_DELAY_OFFSET 4U 47 | /** 48 | * @} 49 | */ 50 | 51 | /* Private macros ------------------------------------------------------------*/ 52 | /* Private functions ---------------------------------------------------------*/ 53 | /* Exported functions --------------------------------------------------------*/ 54 | /** @defgroup SAIEx_Exported_Functions SAIEx Extended Exported Functions 55 | * @{ 56 | */ 57 | 58 | /** @defgroup SAIEx_Exported_Functions_Group1 Peripheral Control functions 59 | * @brief SAIEx control functions 60 | * 61 | @verbatim 62 | =============================================================================== 63 | ##### Extended features functions ##### 64 | =============================================================================== 65 | [..] This section provides functions allowing to: 66 | (+) Modify PDM microphone delays 67 | 68 | @endverbatim 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @brief Configure PDM microphone delays. 74 | * @param hsai SAI handle. 75 | * @param pdmMicDelay Microphone delays configuration. 76 | * @retval HAL status 77 | */ 78 | HAL_StatusTypeDef HAL_SAIEx_ConfigPdmMicDelay(const SAI_HandleTypeDef *hsai, 79 | const SAIEx_PdmMicDelayParamTypeDef *pdmMicDelay) 80 | { 81 | HAL_StatusTypeDef status = HAL_OK; 82 | uint32_t offset; 83 | 84 | /* Check that SAI sub-block is SAI1 sub-block A */ 85 | if (hsai->Instance != SAI1_Block_A) 86 | { 87 | status = HAL_ERROR; 88 | } 89 | else 90 | { 91 | /* Check microphone delay parameters */ 92 | assert_param(IS_SAI_PDM_MIC_PAIRS_NUMBER(pdmMicDelay->MicPair)); 93 | assert_param(IS_SAI_PDM_MIC_DELAY(pdmMicDelay->LeftDelay)); 94 | assert_param(IS_SAI_PDM_MIC_DELAY(pdmMicDelay->RightDelay)); 95 | 96 | /* Compute offset on PDMDLY register according mic pair number */ 97 | offset = SAI_PDM_DELAY_OFFSET * (pdmMicDelay->MicPair - 1U); 98 | 99 | /* Check SAI state and offset */ 100 | if ((hsai->State != HAL_SAI_STATE_RESET) && (offset <= 24U)) 101 | { 102 | /* Reset current delays for specified microphone */ 103 | SAI1->PDMDLY &= ~(SAI_PDM_DELAY_MASK << offset); 104 | 105 | /* Apply new microphone delays */ 106 | SAI1->PDMDLY |= (((pdmMicDelay->RightDelay << SAI_PDM_RIGHT_DELAY_OFFSET) | pdmMicDelay->LeftDelay) << offset); 107 | } 108 | else 109 | { 110 | status = HAL_ERROR; 111 | } 112 | } 113 | return status; 114 | } 115 | 116 | /** 117 | * @} 118 | */ 119 | 120 | /** 121 | * @} 122 | */ 123 | 124 | /** 125 | * @} 126 | */ 127 | 128 | #endif /* HAL_SAI_MODULE_ENABLED */ 129 | #endif /* SAI1 */ 130 | 131 | /** 132 | * @} 133 | */ 134 | -------------------------------------------------------------------------------- /Src/stm32g4xx_ll_rng.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_rng.c 4 | * @author MCD Application Team 5 | * @brief RNG LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g4xx_ll_rng.h" 22 | #include "stm32g4xx_ll_bus.h" 23 | 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif /* USE_FULL_ASSERT */ 29 | 30 | /** @addtogroup STM32G4xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (RNG) 35 | 36 | /** @addtogroup RNG_LL 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /** @defgroup RNG_LL_Private_Macros RNG Private Macros 45 | * @{ 46 | */ 47 | #define IS_LL_RNG_CED(__MODE__) (((__MODE__) == LL_RNG_CED_ENABLE) || \ 48 | ((__MODE__) == LL_RNG_CED_DISABLE)) 49 | 50 | /** 51 | * @} 52 | */ 53 | /* Private function prototypes -----------------------------------------------*/ 54 | 55 | /* Exported functions --------------------------------------------------------*/ 56 | /** @addtogroup RNG_LL_Exported_Functions 57 | * @{ 58 | */ 59 | 60 | /** @addtogroup RNG_LL_EF_Init 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @brief De-initialize RNG registers (Registers restored to their default values). 66 | * @param RNGx RNG Instance 67 | * @retval An ErrorStatus enumeration value: 68 | * - SUCCESS: RNG registers are de-initialized 69 | * - ERROR: not applicable 70 | */ 71 | ErrorStatus LL_RNG_DeInit(const RNG_TypeDef *RNGx) 72 | { 73 | ErrorStatus status = SUCCESS; 74 | 75 | /* Check the parameters */ 76 | assert_param(IS_RNG_ALL_INSTANCE(RNGx)); 77 | if (RNGx == RNG) 78 | { 79 | /* Enable RNG reset state */ 80 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_RNG); 81 | 82 | /* Release RNG from reset state */ 83 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_RNG); 84 | } 85 | else 86 | { 87 | status = ERROR; 88 | } 89 | 90 | return status; 91 | } 92 | 93 | /** 94 | * @brief Initialize RNG registers according to the specified parameters in RNG_InitStruct. 95 | * @param RNGx RNG Instance 96 | * @param RNG_InitStruct pointer to a LL_RNG_InitTypeDef structure 97 | * that contains the configuration information for the specified RNG peripheral. 98 | * @retval An ErrorStatus enumeration value: 99 | * - SUCCESS: RNG registers are initialized according to RNG_InitStruct content 100 | * - ERROR: not applicable 101 | */ 102 | ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, const LL_RNG_InitTypeDef *RNG_InitStruct) 103 | { 104 | /* Check the parameters */ 105 | assert_param(IS_RNG_ALL_INSTANCE(RNGx)); 106 | assert_param(IS_LL_RNG_CED(RNG_InitStruct->ClockErrorDetection)); 107 | 108 | /* Clock Error Detection configuration */ 109 | MODIFY_REG(RNGx->CR, RNG_CR_CED, RNG_InitStruct->ClockErrorDetection); 110 | 111 | return (SUCCESS); 112 | } 113 | 114 | /** 115 | * @brief Set each @ref LL_RNG_InitTypeDef field to default value. 116 | * @param RNG_InitStruct pointer to a @ref LL_RNG_InitTypeDef structure 117 | * whose fields will be set to default values. 118 | * @retval None 119 | */ 120 | void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct) 121 | { 122 | /* Set RNG_InitStruct fields to default values */ 123 | RNG_InitStruct->ClockErrorDetection = LL_RNG_CED_ENABLE; 124 | 125 | } 126 | /** 127 | * @} 128 | */ 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | /** 135 | * @} 136 | */ 137 | 138 | #endif /* RNG */ 139 | 140 | /** 141 | * @} 142 | */ 143 | 144 | #endif /* USE_FULL_LL_DRIVER */ 145 | 146 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_crc_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_crc_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC HAL extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G4xx_HAL_CRC_EX_H 21 | #define STM32G4xx_HAL_CRC_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup CRCEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /** @defgroup CRCEx_Exported_Constants CRC Extended Exported Constants 41 | * @{ 42 | */ 43 | 44 | /** @defgroup CRCEx_Input_Data_Inversion Input Data Inversion Modes 45 | * @{ 46 | */ 47 | #define CRC_INPUTDATA_INVERSION_NONE 0x00000000U /*!< No input data inversion */ 48 | #define CRC_INPUTDATA_INVERSION_BYTE CRC_CR_REV_IN_0 /*!< Byte-wise input data inversion */ 49 | #define CRC_INPUTDATA_INVERSION_HALFWORD CRC_CR_REV_IN_1 /*!< HalfWord-wise input data inversion */ 50 | #define CRC_INPUTDATA_INVERSION_WORD CRC_CR_REV_IN /*!< Word-wise input data inversion */ 51 | /** 52 | * @} 53 | */ 54 | 55 | /** @defgroup CRCEx_Output_Data_Inversion Output Data Inversion Modes 56 | * @{ 57 | */ 58 | #define CRC_OUTPUTDATA_INVERSION_DISABLE 0x00000000U /*!< No output data inversion */ 59 | #define CRC_OUTPUTDATA_INVERSION_ENABLE CRC_CR_REV_OUT /*!< Bit-wise output data inversion */ 60 | /** 61 | * @} 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /* Exported macro ------------------------------------------------------------*/ 69 | /** @defgroup CRCEx_Exported_Macros CRC Extended Exported Macros 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief Set CRC output reversal 75 | * @param __HANDLE__ CRC handle 76 | * @retval None 77 | */ 78 | #define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT) 79 | 80 | /** 81 | * @brief Unset CRC output reversal 82 | * @param __HANDLE__ CRC handle 83 | * @retval None 84 | */ 85 | #define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT)) 86 | 87 | /** 88 | * @brief Set CRC non-default polynomial 89 | * @param __HANDLE__ CRC handle 90 | * @param __POLYNOMIAL__ 7, 8, 16 or 32-bit polynomial 91 | * @retval None 92 | */ 93 | #define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__)) 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /* Private macros --------------------------------------------------------*/ 100 | /** @defgroup CRCEx_Private_Macros CRC Extended Private Macros 101 | * @{ 102 | */ 103 | 104 | #define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \ 105 | ((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \ 106 | ((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \ 107 | ((MODE) == CRC_INPUTDATA_INVERSION_WORD)) 108 | 109 | #define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \ 110 | ((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLE)) 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /* Exported functions --------------------------------------------------------*/ 117 | 118 | /** @addtogroup CRCEx_Exported_Functions 119 | * @{ 120 | */ 121 | 122 | /** @addtogroup CRCEx_Exported_Functions_Group1 123 | * @{ 124 | */ 125 | /* Initialization and de-initialization functions ****************************/ 126 | HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength); 127 | HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode); 128 | HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode); 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | /** 135 | * @} 136 | */ 137 | 138 | /** 139 | * @} 140 | */ 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | #ifdef __cplusplus 147 | } 148 | #endif 149 | 150 | #endif /* STM32G4xx_HAL_CRC_EX_H */ 151 | -------------------------------------------------------------------------------- /Src/stm32g4xx_ll_ucpd.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_ucpd.c 4 | * @author MCD Application Team 5 | * @brief UCPD LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g4xx_ll_ucpd.h" 22 | #include "stm32g4xx_ll_bus.h" 23 | #include "stm32g4xx_ll_rcc.h" 24 | 25 | #ifdef USE_FULL_ASSERT 26 | #include "stm32_assert.h" 27 | #else 28 | #define assert_param(expr) ((void)0U) 29 | #endif /* USE_FULL_ASSERT */ 30 | 31 | /** @addtogroup STM32G4xx_LL_Driver 32 | * @{ 33 | */ 34 | #if defined (UCPD1) 35 | /** @addtogroup UCPD_LL 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | 42 | /* Private constants ---------------------------------------------------------*/ 43 | /** @defgroup UCPD_LL_Private_Constants UCPD Private Constants 44 | * @{ 45 | */ 46 | 47 | /** 48 | * @} 49 | */ 50 | 51 | /* Private macros ------------------------------------------------------------*/ 52 | /** @defgroup UCPD_LL_Private_Macros UCPD Private Macros 53 | * @{ 54 | */ 55 | 56 | 57 | /** 58 | * @} 59 | */ 60 | 61 | /* Private function prototypes -----------------------------------------------*/ 62 | 63 | /* Exported functions --------------------------------------------------------*/ 64 | /** @addtogroup UCPD_LL_Exported_Functions 65 | * @{ 66 | */ 67 | 68 | /** @addtogroup UCPD_LL_EF_Init 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @brief De-initialize the UCPD registers to their default reset values. 74 | * @param UCPDx ucpd Instance 75 | * @retval An ErrorStatus enumeration value: 76 | * - SUCCESS: ucpd registers are de-initialized 77 | * - ERROR: ucpd registers are not de-initialized 78 | */ 79 | ErrorStatus LL_UCPD_DeInit(UCPD_TypeDef *UCPDx) 80 | { 81 | ErrorStatus status = ERROR; 82 | 83 | /* Check the parameters */ 84 | assert_param(IS_UCPD_ALL_INSTANCE(UCPDx)); 85 | 86 | LL_UCPD_Disable(UCPDx); 87 | 88 | if (UCPD1 == UCPDx) 89 | { 90 | /* Force reset of ucpd clock */ 91 | LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_UCPD1); 92 | 93 | /* Release reset of ucpd clock */ 94 | LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_UCPD1); 95 | 96 | /* Disable ucpd clock */ 97 | LL_APB1_GRP2_DisableClock(LL_APB1_GRP2_PERIPH_UCPD1); 98 | 99 | status = SUCCESS; 100 | } 101 | 102 | return status; 103 | } 104 | 105 | /** 106 | * @brief Initialize the ucpd registers according to the specified parameters in UCPD_InitStruct. 107 | * @note As some bits in ucpd configuration registers can only be written when the ucpd is disabled 108 | * (ucpd_CR1_SPE bit =0), UCPD peripheral should be in disabled state prior calling this function. 109 | * Otherwise, ERROR result will be returned. 110 | * @param UCPDx UCPD Instance 111 | * @param UCPD_InitStruct pointer to a @ref LL_UCPD_InitTypeDef structure that contains 112 | * the configuration information for the UCPD peripheral. 113 | * @retval An ErrorStatus enumeration value. (Return always SUCCESS) 114 | */ 115 | ErrorStatus LL_UCPD_Init(UCPD_TypeDef *UCPDx, const LL_UCPD_InitTypeDef *UCPD_InitStruct) 116 | { 117 | /* Check the ucpd Instance UCPDx*/ 118 | assert_param(IS_UCPD_ALL_INSTANCE(UCPDx)); 119 | 120 | if (UCPD1 == UCPDx) 121 | { 122 | LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_UCPD1); 123 | } 124 | 125 | 126 | LL_UCPD_Disable(UCPDx); 127 | 128 | /*---------------------------- UCPDx CFG1 Configuration ------------------------*/ 129 | MODIFY_REG(UCPDx->CFG1, 130 | UCPD_CFG1_PSC_UCPDCLK | UCPD_CFG1_TRANSWIN | UCPD_CFG1_IFRGAP | UCPD_CFG1_HBITCLKDIV, 131 | UCPD_InitStruct->psc_ucpdclk | (UCPD_InitStruct->transwin << UCPD_CFG1_TRANSWIN_Pos) | 132 | (UCPD_InitStruct->IfrGap << UCPD_CFG1_IFRGAP_Pos) | UCPD_InitStruct->HbitClockDiv); 133 | 134 | return SUCCESS; 135 | } 136 | 137 | /** 138 | * @brief Set each @ref LL_UCPD_InitTypeDef field to default value. 139 | * @param UCPD_InitStruct pointer to a @ref LL_UCPD_InitTypeDef structure 140 | * whose fields will be set to default values. 141 | * @retval None 142 | */ 143 | void LL_UCPD_StructInit(LL_UCPD_InitTypeDef *UCPD_InitStruct) 144 | { 145 | /* Set UCPD_InitStruct fields to default values */ 146 | UCPD_InitStruct->psc_ucpdclk = LL_UCPD_PSC_DIV2; 147 | UCPD_InitStruct->transwin = 0x7; /* Divide by 8 */ 148 | UCPD_InitStruct->IfrGap = 0x10; /* Divide by 17 */ 149 | UCPD_InitStruct->HbitClockDiv = 0x0D; /* Divide by 14 to produce HBITCLK */ 150 | } 151 | 152 | /** 153 | * @} 154 | */ 155 | 156 | /** 157 | * @} 158 | */ 159 | 160 | /** 161 | * @} 162 | */ 163 | #endif /* defined (UCPD1) */ 164 | /** 165 | * @} 166 | */ 167 | 168 | #endif /* USE_FULL_LL_DRIVER */ 169 | 170 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_smbus_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_smbus_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of SMBUS HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G4xx_HAL_SMBUS_EX_H 21 | #define STM32G4xx_HAL_SMBUS_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup SMBUSEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /** @defgroup SMBUSEx_Exported_Constants SMBUS Extended Exported Constants 41 | * @{ 42 | */ 43 | 44 | /** @defgroup SMBUSEx_FastModePlus SMBUS Extended Fast Mode Plus 45 | * @{ 46 | */ 47 | #define SMBUS_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */ 48 | #define SMBUS_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ 49 | #define SMBUS_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ 50 | #define SMBUS_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ 51 | #define SMBUS_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ 52 | #define SMBUS_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ 53 | #define SMBUS_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */ 54 | #if defined(SYSCFG_CFGR1_I2C3_FMP) 55 | #define SMBUS_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */ 56 | #else 57 | #define SMBUS_FASTMODEPLUS_I2C3 (uint32_t)(0x00000400U | SMBUS_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C3 not supported */ 58 | #endif /* SYSCFG_CFGR1_I2C3_FMP */ 59 | #if defined(SYSCFG_CFGR1_I2C4_FMP) 60 | #define SMBUS_FASTMODEPLUS_I2C4 SYSCFG_CFGR1_I2C4_FMP /*!< Enable Fast Mode Plus on I2C4 pins */ 61 | #else 62 | #define SMBUS_FASTMODEPLUS_I2C4 (uint32_t)(0x00000800U | SMBUS_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C4 not supported */ 63 | #endif /* SYSCFG_CFGR1_I2C4_FMP */ 64 | /** 65 | * @} 66 | */ 67 | 68 | /** 69 | * @} 70 | */ 71 | 72 | /* Exported macro ------------------------------------------------------------*/ 73 | /** @defgroup SMBUSEx_Exported_Macros SMBUS Extended Exported Macros 74 | * @{ 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | 81 | /* Exported functions --------------------------------------------------------*/ 82 | /** @addtogroup SMBUSEx_Exported_Functions SMBUS Extended Exported Functions 83 | * @{ 84 | */ 85 | 86 | /** @addtogroup SMBUSEx_Exported_Functions_Group2 WakeUp Mode Functions 87 | * @{ 88 | */ 89 | /* Peripheral Control functions ************************************************/ 90 | HAL_StatusTypeDef HAL_SMBUSEx_EnableWakeUp(SMBUS_HandleTypeDef *hsmbus); 91 | HAL_StatusTypeDef HAL_SMBUSEx_DisableWakeUp(SMBUS_HandleTypeDef *hsmbus); 92 | /** 93 | * @} 94 | */ 95 | 96 | /** @addtogroup SMBUSEx_Exported_Functions_Group3 Fast Mode Plus Functions 97 | * @{ 98 | */ 99 | void HAL_SMBUSEx_EnableFastModePlus(uint32_t ConfigFastModePlus); 100 | void HAL_SMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus); 101 | /** 102 | * @} 103 | */ 104 | 105 | /** 106 | * @} 107 | */ 108 | 109 | /* Private constants ---------------------------------------------------------*/ 110 | /** @defgroup SMBUSEx_Private_Constants SMBUS Extended Private Constants 111 | * @{ 112 | */ 113 | 114 | /** 115 | * @} 116 | */ 117 | 118 | /* Private macros ------------------------------------------------------------*/ 119 | /** @defgroup SMBUSEx_Private_Macro SMBUS Extended Private Macros 120 | * @{ 121 | */ 122 | #define IS_SMBUS_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & SMBUS_FMP_NOT_SUPPORTED) != SMBUS_FMP_NOT_SUPPORTED) && \ 123 | ((((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB6)) == SMBUS_FASTMODEPLUS_PB6) || \ 124 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB7)) == SMBUS_FASTMODEPLUS_PB7) || \ 125 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB8)) == SMBUS_FASTMODEPLUS_PB8) || \ 126 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB9)) == SMBUS_FASTMODEPLUS_PB9) || \ 127 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C1)) == SMBUS_FASTMODEPLUS_I2C1) || \ 128 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C2)) == SMBUS_FASTMODEPLUS_I2C2) || \ 129 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C3)) == SMBUS_FASTMODEPLUS_I2C3) || \ 130 | (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C4)) == SMBUS_FASTMODEPLUS_I2C4))) 131 | /** 132 | * @} 133 | */ 134 | 135 | /* Private Functions ---------------------------------------------------------*/ 136 | /** @defgroup SMBUSEx_Private_Functions SMBUS Extended Private Functions 137 | * @{ 138 | */ 139 | /* Private functions are defined in stm32g4xx_hal_smbus_ex.c file */ 140 | /** 141 | * @} 142 | */ 143 | 144 | /** 145 | * @} 146 | */ 147 | 148 | /** 149 | * @} 150 | */ 151 | 152 | #ifdef __cplusplus 153 | } 154 | #endif 155 | 156 | #endif /* STM32G4xx_HAL_SMBUS_EX_H */ 157 | -------------------------------------------------------------------------------- /Src/stm32g4xx_hal_timebase_tim_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_timebase_tim_template.c 4 | * @author MCD Application Team 5 | * @brief HAL time base based on the hardware TIM Template. 6 | * 7 | * This file override the native HAL time base functions (defined as weak) 8 | * the TIM time base: 9 | * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms 10 | * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms 11 | ****************************************************************************** 12 | * @attention 13 | * 14 | * Copyright (c) 2019 STMicroelectronics. 15 | * All rights reserved. 16 | * 17 | * This software is licensed under terms that can be found in the LICENSE file 18 | * in the root directory of this software component. 19 | * If no LICENSE file comes with this software, it is provided AS-IS. 20 | * 21 | ****************************************************************************** 22 | @verbatim 23 | ============================================================================== 24 | ##### How to use this driver ##### 25 | ============================================================================== 26 | [..] 27 | This file must be copied to the application folder and modified as follows: 28 | (#) Rename it to 'stm32g4xx_hal_timebase_tim.c' 29 | (#) Add this file and the TIM HAL driver files to your project and make sure 30 | HAL_TIM_MODULE_ENABLED is defined in stm32g4xx_hal_conf.h 31 | 32 | [..] 33 | (@) The application needs to ensure that the time base is always set to 1 millisecond 34 | to have correct HAL operation. 35 | 36 | @endverbatim 37 | ****************************************************************************** 38 | */ 39 | 40 | /* Includes ------------------------------------------------------------------*/ 41 | #include "stm32g4xx_hal.h" 42 | 43 | /** @addtogroup STM32G4xx_HAL_Driver 44 | * @{ 45 | */ 46 | 47 | /** @addtogroup HAL_TimeBase 48 | * @{ 49 | */ 50 | 51 | /* Private typedef -----------------------------------------------------------*/ 52 | /* Private define ------------------------------------------------------------*/ 53 | /* Private macro -------------------------------------------------------------*/ 54 | /* Private variables ---------------------------------------------------------*/ 55 | TIM_HandleTypeDef TimHandle; 56 | /* Private function prototypes -----------------------------------------------*/ 57 | void TIM6_DAC_IRQHandler(void); 58 | /* Private functions ---------------------------------------------------------*/ 59 | 60 | /** 61 | * @brief This function configures the TIM6 as a time base source. 62 | * The time source is configured to have 1ms time base with a dedicated 63 | * Tick interrupt priority. 64 | * @note This function is called automatically at the beginning of program after 65 | * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). 66 | * @param TickPriority: Tick interrupt priority. 67 | * @retval HAL status 68 | */ 69 | HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) 70 | { 71 | RCC_ClkInitTypeDef clkconfig; 72 | uint32_t uwTimclock; 73 | uint32_t uwAPB1Prescaler; 74 | uint32_t uwPrescalerValue; 75 | uint32_t pFLatency; 76 | HAL_StatusTypeDef status; 77 | 78 | /* Configure the TIM6 IRQ priority */ 79 | HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U); 80 | 81 | /* Enable the TIM6 global Interrupt */ 82 | HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn); 83 | 84 | /* Enable TIM6 clock */ 85 | __HAL_RCC_TIM6_CLK_ENABLE(); 86 | 87 | /* Get clock configuration */ 88 | HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); 89 | 90 | /* Get APB1 prescaler */ 91 | uwAPB1Prescaler = clkconfig.APB1CLKDivider; 92 | 93 | /* Compute TIM6 clock */ 94 | if (uwAPB1Prescaler == RCC_HCLK_DIV1) 95 | { 96 | uwTimclock = HAL_RCC_GetPCLK1Freq(); 97 | } 98 | else 99 | { 100 | uwTimclock = 2U * HAL_RCC_GetPCLK1Freq(); 101 | } 102 | 103 | /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */ 104 | uwPrescalerValue = (uint32_t)((uwTimclock / 1000000U) - 1U); 105 | 106 | /* Initialize TIM6 */ 107 | TimHandle.Instance = TIM6; 108 | 109 | /* Initialize TIMx peripheral as follow: 110 | + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base. 111 | + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. 112 | + ClockDivision = 0 113 | + Counter direction = Up 114 | */ 115 | TimHandle.Init.Period = (1000000U / 1000U) - 1U; 116 | TimHandle.Init.Prescaler = uwPrescalerValue; 117 | TimHandle.Init.ClockDivision = 0; 118 | TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP; 119 | status = HAL_TIM_Base_Init(&TimHandle); 120 | if (status == HAL_OK) 121 | { 122 | /* Start the TIM time Base generation in interrupt mode */ 123 | status = HAL_TIM_Base_Start_IT(&TimHandle); 124 | if (status == HAL_OK) 125 | { 126 | /* Configure the SysTick IRQ priority */ 127 | if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 128 | { 129 | /* Configure the TIM IRQ priority */ 130 | HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U); 131 | uwTickPrio = TickPriority; 132 | } 133 | else 134 | { 135 | status = HAL_ERROR; 136 | } 137 | } 138 | } 139 | 140 | /* Return function status */ 141 | return status; 142 | } 143 | 144 | /** 145 | * @brief Suspend Tick increment. 146 | * @note Disable the tick increment by disabling TIM6 update interrupt. 147 | * @param None 148 | * @retval None 149 | */ 150 | void HAL_SuspendTick(void) 151 | { 152 | /* Disable TIM6 update interrupt */ 153 | __HAL_TIM_DISABLE_IT(&TimHandle, TIM_IT_UPDATE); 154 | } 155 | 156 | /** 157 | * @brief Resume Tick increment. 158 | * @note Enable the tick increment by enabling TIM6 update interrupt. 159 | * @param None 160 | * @retval None 161 | */ 162 | void HAL_ResumeTick(void) 163 | { 164 | /* Enable TIM6 update interrupt */ 165 | __HAL_TIM_ENABLE_IT(&TimHandle, TIM_IT_UPDATE); 166 | } 167 | 168 | /** 169 | * @brief Period elapsed callback in non blocking mode 170 | * @note This function is called when TIM6 interrupt took place, inside 171 | * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment 172 | * a global variable "uwTick" used as application time base. 173 | * @param htim : TIM handle 174 | * @retval None 175 | */ 176 | void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) 177 | { 178 | HAL_IncTick(); 179 | } 180 | 181 | /** 182 | * @brief This function handles TIM interrupt request. 183 | * @param None 184 | * @retval None 185 | */ 186 | void TIM6_DAC_IRQHandler(void) 187 | { 188 | HAL_TIM_IRQHandler(&TimHandle); 189 | } 190 | 191 | /** 192 | * @} 193 | */ 194 | 195 | /** 196 | * @} 197 | */ 198 | 199 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_def.h 4 | * @author MCD Application Team 5 | * @brief This file contains HAL common defines, enumeration, macros and 6 | * structures definitions. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2019 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32G4xx_HAL_DEF 22 | #define __STM32G4xx_HAL_DEF 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32g4xx.h" 30 | #include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */ 31 | #include 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | 35 | /** 36 | * @brief HAL Status structures definition 37 | */ 38 | typedef enum 39 | { 40 | HAL_OK = 0x00U, 41 | HAL_ERROR = 0x01U, 42 | HAL_BUSY = 0x02U, 43 | HAL_TIMEOUT = 0x03U 44 | } HAL_StatusTypeDef; 45 | 46 | /** 47 | * @brief HAL Lock structures definition 48 | */ 49 | typedef enum 50 | { 51 | HAL_UNLOCKED = 0x00U, 52 | HAL_LOCKED = 0x01U 53 | } HAL_LockTypeDef; 54 | 55 | /* Exported macros -----------------------------------------------------------*/ 56 | 57 | #define HAL_MAX_DELAY 0xFFFFFFFFU 58 | 59 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) 60 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) 61 | 62 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ 63 | do{ \ 64 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ 65 | (__DMA_HANDLE__).Parent = (__HANDLE__); \ 66 | } while(0) 67 | 68 | #if !defined(UNUSED) 69 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ 70 | #endif /* UNUSED */ 71 | 72 | /** @brief Reset the Handle's State field. 73 | * @param __HANDLE__: specifies the Peripheral Handle. 74 | * @note This macro can be used for the following purpose: 75 | * - When the Handle is declared as local variable; before passing it as parameter 76 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 77 | * to set to 0 the Handle's "State" field. 78 | * Otherwise, "State" field may have any random value and the first time the function 79 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 80 | * (i.e. HAL_PPP_MspInit() will not be executed). 81 | * - When there is a need to reconfigure the low level hardware: instead of calling 82 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 83 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function 84 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 85 | * @retval None 86 | */ 87 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0) 88 | 89 | #if (USE_RTOS == 1U) 90 | /* Reserved for future use */ 91 | #error " USE_RTOS should be 0 in the current HAL release " 92 | #else 93 | #define __HAL_LOCK(__HANDLE__) \ 94 | do{ \ 95 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 96 | { \ 97 | return HAL_BUSY; \ 98 | } \ 99 | else \ 100 | { \ 101 | (__HANDLE__)->Lock = HAL_LOCKED; \ 102 | } \ 103 | }while (0U) 104 | 105 | #define __HAL_UNLOCK(__HANDLE__) \ 106 | do{ \ 107 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 108 | }while (0U) 109 | #endif /* USE_RTOS */ 110 | 111 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */ 112 | #ifndef __weak 113 | #define __weak __attribute__((weak)) 114 | #endif 115 | #ifndef __packed 116 | #define __packed __attribute__((packed)) 117 | #endif 118 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 119 | #ifndef __weak 120 | #define __weak __attribute__((weak)) 121 | #endif /* __weak */ 122 | #ifndef __packed 123 | #define __packed __attribute__((__packed__)) 124 | #endif /* __packed */ 125 | #endif /* __GNUC__ */ 126 | 127 | 128 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 129 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */ 130 | #ifndef __ALIGN_BEGIN 131 | #define __ALIGN_BEGIN 132 | #endif 133 | #ifndef __ALIGN_END 134 | #define __ALIGN_END __attribute__ ((aligned (4))) 135 | #endif 136 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 137 | #ifndef __ALIGN_END 138 | #define __ALIGN_END __attribute__ ((aligned (4U))) 139 | #endif /* __ALIGN_END */ 140 | #ifndef __ALIGN_BEGIN 141 | #define __ALIGN_BEGIN 142 | #endif /* __ALIGN_BEGIN */ 143 | #else 144 | #ifndef __ALIGN_END 145 | #define __ALIGN_END 146 | #endif /* __ALIGN_END */ 147 | #ifndef __ALIGN_BEGIN 148 | #if defined (__CC_ARM) /* ARM Compiler V5*/ 149 | #define __ALIGN_BEGIN __align(4U) 150 | #elif defined (__ICCARM__) /* IAR Compiler */ 151 | #define __ALIGN_BEGIN 152 | #endif /* __CC_ARM */ 153 | #endif /* __ALIGN_BEGIN */ 154 | #endif /* __GNUC__ */ 155 | 156 | /** 157 | * @brief __RAM_FUNC definition 158 | */ 159 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) 160 | /* ARM Compiler V4/V5 and V6 161 | -------------------------- 162 | RAM functions are defined using the toolchain options. 163 | Functions that are executed in RAM should reside in a separate source module. 164 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 165 | area of a module to a memory space in physical RAM. 166 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 167 | dialog. 168 | */ 169 | #define __RAM_FUNC 170 | 171 | #elif defined ( __ICCARM__ ) 172 | /* ICCARM Compiler 173 | --------------- 174 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 175 | */ 176 | #define __RAM_FUNC __ramfunc 177 | 178 | #elif defined ( __GNUC__ ) 179 | /* GNU Compiler 180 | ------------ 181 | RAM functions are defined using a specific toolchain attribute 182 | "__attribute__((section(".RamFunc")))". 183 | */ 184 | #define __RAM_FUNC __attribute__((section(".RamFunc"))) 185 | 186 | #endif /* __CC_ARM */ 187 | 188 | /** 189 | * @brief __NOINLINE definition 190 | */ 191 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ ) 192 | /* ARM V4/V5 and V6 & GNU Compiler 193 | ------------------------------- 194 | */ 195 | #define __NOINLINE __attribute__ ( (noinline) ) 196 | 197 | #elif defined ( __ICCARM__ ) 198 | /* ICCARM Compiler 199 | --------------- 200 | */ 201 | #define __NOINLINE _Pragma("optimize = no_inline") 202 | 203 | #endif /* __CC_ARM || __GNUC__ */ 204 | 205 | 206 | #ifdef __cplusplus 207 | } 208 | #endif 209 | 210 | #endif /* ___STM32G4xx_HAL_DEF */ 211 | 212 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_i2c_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_i2c_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of I2C HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G4xx_HAL_I2C_EX_H 21 | #define STM32G4xx_HAL_I2C_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup I2CEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants 41 | * @{ 42 | */ 43 | 44 | /** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter 45 | * @{ 46 | */ 47 | #define I2C_ANALOGFILTER_ENABLE 0x00000000U 48 | #define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF 49 | /** 50 | * @} 51 | */ 52 | 53 | /** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus 54 | * @{ 55 | */ 56 | #define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */ 57 | #define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ 58 | #define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ 59 | #define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ 60 | #define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ 61 | #define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ 62 | #define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */ 63 | #if defined(SYSCFG_CFGR1_I2C3_FMP) 64 | #define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */ 65 | #else 66 | #define I2C_FASTMODEPLUS_I2C3 (uint32_t)(0x00000400U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C3 not supported */ 67 | #endif /* SYSCFG_CFGR1_I2C3_FMP */ 68 | #if defined(SYSCFG_CFGR1_I2C4_FMP) 69 | #define I2C_FASTMODEPLUS_I2C4 SYSCFG_CFGR1_I2C4_FMP /*!< Enable Fast Mode Plus on I2C4 pins */ 70 | #else 71 | #define I2C_FASTMODEPLUS_I2C4 (uint32_t)(0x00000800U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C4 not supported */ 72 | #endif /* SYSCFG_CFGR1_I2C4_FMP */ 73 | /** 74 | * @} 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | 81 | /* Exported macro ------------------------------------------------------------*/ 82 | /** @defgroup I2CEx_Exported_Macros I2C Extended Exported Macros 83 | * @{ 84 | */ 85 | 86 | /** 87 | * @} 88 | */ 89 | 90 | /* Exported functions --------------------------------------------------------*/ 91 | /** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions 92 | * @{ 93 | */ 94 | 95 | /** @addtogroup I2CEx_Exported_Functions_Group1 Filter Mode Functions 96 | * @{ 97 | */ 98 | /* Peripheral Control functions ************************************************/ 99 | HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter); 100 | HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter); 101 | /** 102 | * @} 103 | */ 104 | 105 | /** @addtogroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions 106 | * @{ 107 | */ 108 | HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c); 109 | HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c); 110 | /** 111 | * @} 112 | */ 113 | 114 | /** @addtogroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions 115 | * @{ 116 | */ 117 | void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus); 118 | void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); 119 | /** 120 | * @} 121 | */ 122 | 123 | /** 124 | * @} 125 | */ 126 | 127 | /* Private constants ---------------------------------------------------------*/ 128 | /** @defgroup I2CEx_Private_Constants I2C Extended Private Constants 129 | * @{ 130 | */ 131 | 132 | /** 133 | * @} 134 | */ 135 | 136 | /* Private macros ------------------------------------------------------------*/ 137 | /** @defgroup I2CEx_Private_Macro I2C Extended Private Macros 138 | * @{ 139 | */ 140 | #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \ 141 | ((FILTER) == I2C_ANALOGFILTER_DISABLE)) 142 | 143 | #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) 144 | 145 | #if defined (I2C3) 146 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \ 147 | ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \ 148 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \ 149 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \ 150 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \ 151 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \ 152 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \ 153 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3) || \ 154 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C4)) == I2C_FASTMODEPLUS_I2C4))) 155 | #else 156 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \ 157 | ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \ 158 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \ 159 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \ 160 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \ 161 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \ 162 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \ 163 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C4)) == I2C_FASTMODEPLUS_I2C4))) 164 | #endif /* I2C3 */ 165 | /** 166 | * @} 167 | */ 168 | 169 | /* Private Functions ---------------------------------------------------------*/ 170 | /** @defgroup I2CEx_Private_Functions I2C Extended Private Functions 171 | * @{ 172 | */ 173 | /* Private functions are defined in stm32g4xx_hal_i2c_ex.c file */ 174 | /** 175 | * @} 176 | */ 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | /** 183 | * @} 184 | */ 185 | 186 | #ifdef __cplusplus 187 | } 188 | #endif 189 | 190 | #endif /* STM32G4xx_HAL_I2C_EX_H */ 191 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_iwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of IWDG HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G4xx_HAL_IWDG_H 21 | #define STM32G4xx_HAL_IWDG_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @defgroup IWDG IWDG 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup IWDG_Exported_Types IWDG Exported Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @brief IWDG Init structure definition 45 | */ 46 | typedef struct 47 | { 48 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. 49 | This parameter can be a value of @ref IWDG_Prescaler */ 50 | 51 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. 52 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 53 | 54 | uint32_t Window; /*!< Specifies the window value to be compared to the down-counter. 55 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 56 | 57 | } IWDG_InitTypeDef; 58 | 59 | /** 60 | * @brief IWDG Handle Structure definition 61 | */ 62 | typedef struct 63 | { 64 | IWDG_TypeDef *Instance; /*!< Register base address */ 65 | 66 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ 67 | } IWDG_HandleTypeDef; 68 | 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /* Exported constants --------------------------------------------------------*/ 75 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants 76 | * @{ 77 | */ 78 | 79 | /** @defgroup IWDG_Prescaler IWDG Prescaler 80 | * @{ 81 | */ 82 | #define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */ 83 | #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ 84 | #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ 85 | #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ 86 | #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ 87 | #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ 88 | #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @defgroup IWDG_Window_option IWDG Window option 94 | * @{ 95 | */ 96 | #define IWDG_WINDOW_DISABLE IWDG_WINR_WIN 97 | /** 98 | * @} 99 | */ 100 | 101 | /** 102 | * @} 103 | */ 104 | 105 | /* Exported macros -----------------------------------------------------------*/ 106 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros 107 | * @{ 108 | */ 109 | 110 | /** 111 | * @brief Enable the IWDG peripheral. 112 | * @param __HANDLE__ IWDG handle 113 | * @retval None 114 | */ 115 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) 116 | 117 | /** 118 | * @brief Reload IWDG counter with value defined in the reload register 119 | * (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled). 120 | * @param __HANDLE__ IWDG handle 121 | * @retval None 122 | */ 123 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | /* Exported functions --------------------------------------------------------*/ 130 | /** @defgroup IWDG_Exported_Functions IWDG Exported Functions 131 | * @{ 132 | */ 133 | 134 | /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions 135 | * @{ 136 | */ 137 | /* Initialization/Start functions ********************************************/ 138 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); 139 | /** 140 | * @} 141 | */ 142 | 143 | /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions 144 | * @{ 145 | */ 146 | /* I/O operation functions ****************************************************/ 147 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); 148 | /** 149 | * @} 150 | */ 151 | 152 | /** 153 | * @} 154 | */ 155 | 156 | /* Private constants ---------------------------------------------------------*/ 157 | /** @defgroup IWDG_Private_Constants IWDG Private Constants 158 | * @{ 159 | */ 160 | 161 | /** 162 | * @brief IWDG Key Register BitMask 163 | */ 164 | #define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */ 165 | #define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */ 166 | #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */ 167 | #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */ 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | /* Private macros ------------------------------------------------------------*/ 174 | /** @defgroup IWDG_Private_Macros IWDG Private Macros 175 | * @{ 176 | */ 177 | 178 | /** 179 | * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. 180 | * @param __HANDLE__ IWDG handle 181 | * @retval None 182 | */ 183 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) 184 | 185 | /** 186 | * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. 187 | * @param __HANDLE__ IWDG handle 188 | * @retval None 189 | */ 190 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) 191 | 192 | /** 193 | * @brief Check IWDG prescaler value. 194 | * @param __PRESCALER__ IWDG prescaler value 195 | * @retval None 196 | */ 197 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ 198 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ 199 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ 200 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ 201 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ 202 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ 203 | ((__PRESCALER__) == IWDG_PRESCALER_256)) 204 | 205 | /** 206 | * @brief Check IWDG reload value. 207 | * @param __RELOAD__ IWDG reload value 208 | * @retval None 209 | */ 210 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) 211 | 212 | /** 213 | * @brief Check IWDG window value. 214 | * @param __WINDOW__ IWDG window value 215 | * @retval None 216 | */ 217 | #define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN) 218 | 219 | 220 | /** 221 | * @} 222 | */ 223 | 224 | /** 225 | * @} 226 | */ 227 | 228 | /** 229 | * @} 230 | */ 231 | 232 | 233 | #ifdef __cplusplus 234 | } 235 | #endif 236 | 237 | #endif /* STM32G4xx_HAL_IWDG_H */ 238 | -------------------------------------------------------------------------------- /Src/stm32g4xx_hal_crc_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_crc_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended CRC HAL module driver. 6 | * This file provides firmware functions to manage the extended 7 | * functionalities of the CRC peripheral. 8 | * 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * Copyright (c) 2019 STMicroelectronics. 13 | * All rights reserved. 14 | * 15 | * This software is licensed under terms that can be found in the LICENSE file 16 | * in the root directory of this software component. 17 | * If no LICENSE file comes with this software, it is provided AS-IS. 18 | * 19 | ****************************************************************************** 20 | @verbatim 21 | ================================================================================ 22 | ##### How to use this driver ##### 23 | ================================================================================ 24 | [..] 25 | (+) Set user-defined generating polynomial through HAL_CRCEx_Polynomial_Set() 26 | (+) Configure Input or Output data inversion 27 | 28 | @endverbatim 29 | ****************************************************************************** 30 | */ 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "stm32g4xx_hal.h" 34 | 35 | /** @addtogroup STM32G4xx_HAL_Driver 36 | * @{ 37 | */ 38 | 39 | /** @defgroup CRCEx CRCEx 40 | * @brief CRC Extended HAL module driver 41 | * @{ 42 | */ 43 | 44 | #ifdef HAL_CRC_MODULE_ENABLED 45 | 46 | /* Private typedef -----------------------------------------------------------*/ 47 | /* Private define ------------------------------------------------------------*/ 48 | /* Private macro -------------------------------------------------------------*/ 49 | /* Private variables ---------------------------------------------------------*/ 50 | /* Private function prototypes -----------------------------------------------*/ 51 | /* Exported functions --------------------------------------------------------*/ 52 | 53 | /** @defgroup CRCEx_Exported_Functions CRC Extended Exported Functions 54 | * @{ 55 | */ 56 | 57 | /** @defgroup CRCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions 58 | * @brief Extended Initialization and Configuration functions. 59 | * 60 | @verbatim 61 | =============================================================================== 62 | ##### Extended configuration functions ##### 63 | =============================================================================== 64 | [..] This section provides functions allowing to: 65 | (+) Configure the generating polynomial 66 | (+) Configure the input data inversion 67 | (+) Configure the output data inversion 68 | 69 | @endverbatim 70 | * @{ 71 | */ 72 | 73 | 74 | /** 75 | * @brief Initialize the CRC polynomial if different from default one. 76 | * @param hcrc CRC handle 77 | * @param Pol CRC generating polynomial (7, 8, 16 or 32-bit long). 78 | * This parameter is written in normal representation, e.g. 79 | * @arg for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65 80 | * @arg for a polynomial of degree 16, X^16 + X^12 + X^5 + 1 is written 0x1021 81 | * @param PolyLength CRC polynomial length. 82 | * This parameter can be one of the following values: 83 | * @arg @ref CRC_POLYLENGTH_7B 7-bit long CRC (generating polynomial of degree 7) 84 | * @arg @ref CRC_POLYLENGTH_8B 8-bit long CRC (generating polynomial of degree 8) 85 | * @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16) 86 | * @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32) 87 | * @retval HAL status 88 | */ 89 | HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength) 90 | { 91 | HAL_StatusTypeDef status = HAL_OK; 92 | uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */ 93 | 94 | /* Check the parameters */ 95 | assert_param(IS_CRC_POL_LENGTH(PolyLength)); 96 | 97 | /* Ensure that the generating polynomial is odd */ 98 | if ((Pol & (uint32_t)(0x1U)) == 0U) 99 | { 100 | status = HAL_ERROR; 101 | } 102 | else 103 | { 104 | /* check polynomial definition vs polynomial size: 105 | * polynomial length must be aligned with polynomial 106 | * definition. HAL_ERROR is reported if Pol degree is 107 | * larger than that indicated by PolyLength. 108 | * Look for MSB position: msb will contain the degree of 109 | * the second to the largest polynomial member. E.g., for 110 | * X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */ 111 | while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U)) 112 | { 113 | } 114 | 115 | switch (PolyLength) 116 | { 117 | 118 | case CRC_POLYLENGTH_7B: 119 | if (msb >= HAL_CRC_LENGTH_7B) 120 | { 121 | status = HAL_ERROR; 122 | } 123 | break; 124 | case CRC_POLYLENGTH_8B: 125 | if (msb >= HAL_CRC_LENGTH_8B) 126 | { 127 | status = HAL_ERROR; 128 | } 129 | break; 130 | case CRC_POLYLENGTH_16B: 131 | if (msb >= HAL_CRC_LENGTH_16B) 132 | { 133 | status = HAL_ERROR; 134 | } 135 | break; 136 | 137 | case CRC_POLYLENGTH_32B: 138 | /* no polynomial definition vs. polynomial length issue possible */ 139 | break; 140 | default: 141 | status = HAL_ERROR; 142 | break; 143 | } 144 | } 145 | if (status == HAL_OK) 146 | { 147 | /* set generating polynomial */ 148 | WRITE_REG(hcrc->Instance->POL, Pol); 149 | 150 | /* set generating polynomial size */ 151 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength); 152 | } 153 | /* Return function status */ 154 | return status; 155 | } 156 | 157 | /** 158 | * @brief Set the Reverse Input data mode. 159 | * @param hcrc CRC handle 160 | * @param InputReverseMode Input Data inversion mode. 161 | * This parameter can be one of the following values: 162 | * @arg @ref CRC_INPUTDATA_INVERSION_NONE no change in bit order (default value) 163 | * @arg @ref CRC_INPUTDATA_INVERSION_BYTE Byte-wise bit reversal 164 | * @arg @ref CRC_INPUTDATA_INVERSION_HALFWORD HalfWord-wise bit reversal 165 | * @arg @ref CRC_INPUTDATA_INVERSION_WORD Word-wise bit reversal 166 | * @retval HAL status 167 | */ 168 | HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode) 169 | { 170 | /* Check the parameters */ 171 | assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(InputReverseMode)); 172 | 173 | /* Change CRC peripheral state */ 174 | hcrc->State = HAL_CRC_STATE_BUSY; 175 | 176 | /* set input data inversion mode */ 177 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, InputReverseMode); 178 | /* Change CRC peripheral state */ 179 | hcrc->State = HAL_CRC_STATE_READY; 180 | 181 | /* Return function status */ 182 | return HAL_OK; 183 | } 184 | 185 | /** 186 | * @brief Set the Reverse Output data mode. 187 | * @param hcrc CRC handle 188 | * @param OutputReverseMode Output Data inversion mode. 189 | * This parameter can be one of the following values: 190 | * @arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion (default value) 191 | * @arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE bit-level inversion (e.g. for a 8-bit CRC: 0xB5 becomes 0xAD) 192 | * @retval HAL status 193 | */ 194 | HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode) 195 | { 196 | /* Check the parameters */ 197 | assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(OutputReverseMode)); 198 | 199 | /* Change CRC peripheral state */ 200 | hcrc->State = HAL_CRC_STATE_BUSY; 201 | 202 | /* set output data inversion mode */ 203 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, OutputReverseMode); 204 | 205 | /* Change CRC peripheral state */ 206 | hcrc->State = HAL_CRC_STATE_READY; 207 | 208 | /* Return function status */ 209 | return HAL_OK; 210 | } 211 | 212 | 213 | /** 214 | * @} 215 | */ 216 | 217 | 218 | /** 219 | * @} 220 | */ 221 | 222 | 223 | #endif /* HAL_CRC_MODULE_ENABLED */ 224 | /** 225 | * @} 226 | */ 227 | 228 | /** 229 | * @} 230 | */ 231 | -------------------------------------------------------------------------------- /Src/stm32g4xx_hal_flash_ramfunc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_flash_ramfunc.c 4 | * @author MCD Application Team 5 | * @brief FLASH RAMFUNC driver. 6 | * This file provides a Flash firmware functions which should be 7 | * executed from internal SRAM 8 | * + FLASH Power Down in Run mode 9 | * + FLASH DBANK User Option Byte 10 | * 11 | * 12 | @verbatim 13 | ============================================================================== 14 | ##### Flash RAM functions ##### 15 | ============================================================================== 16 | 17 | *** ARM Compiler *** 18 | -------------------- 19 | [..] RAM functions are defined using the toolchain options. 20 | Functions that are executed in RAM should reside in a separate 21 | source module. Using the 'Options for File' dialog you can simply change 22 | the 'Code / Const' area of a module to a memory space in physical RAM. 23 | Available memory areas are declared in the 'Target' tab of the 24 | Options for Target' dialog. 25 | 26 | *** ICCARM Compiler *** 27 | ----------------------- 28 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". 29 | 30 | *** GNU Compiler *** 31 | -------------------- 32 | [..] RAM functions are defined using a specific toolchain attribute 33 | "__attribute__((section(".RamFunc")))". 34 | 35 | @endverbatim 36 | ****************************************************************************** 37 | * @attention 38 | * 39 | * Copyright (c) 2019 STMicroelectronics. 40 | * All rights reserved. 41 | * 42 | * This software is licensed under terms that can be found in the LICENSE file in 43 | * the root directory of this software component. 44 | * If no LICENSE file comes with this software, it is provided AS-IS. 45 | ****************************************************************************** 46 | */ 47 | 48 | /* Includes ------------------------------------------------------------------*/ 49 | #include "stm32g4xx_hal.h" 50 | 51 | /** @addtogroup STM32G4xx_HAL_Driver 52 | * @{ 53 | */ 54 | 55 | /** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC 56 | * @brief FLASH functions executed from RAM 57 | * @{ 58 | */ 59 | 60 | #ifdef HAL_FLASH_MODULE_ENABLED 61 | 62 | /* Private typedef -----------------------------------------------------------*/ 63 | /* Private define ------------------------------------------------------------*/ 64 | /* Private macro -------------------------------------------------------------*/ 65 | /* Private variables ---------------------------------------------------------*/ 66 | /* Private function prototypes -----------------------------------------------*/ 67 | /* Exported functions -------------------------------------------------------*/ 68 | 69 | /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH_RAMFUNC Exported Functions 70 | * @{ 71 | */ 72 | 73 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions 74 | * @brief Data transfers functions 75 | * 76 | @verbatim 77 | =============================================================================== 78 | ##### ramfunc functions ##### 79 | =============================================================================== 80 | [..] 81 | This subsection provides a set of functions that should be executed from RAM. 82 | 83 | @endverbatim 84 | * @{ 85 | */ 86 | 87 | /** 88 | * @brief Enable the Power down in Run Mode 89 | * @note This function should be called and executed from SRAM memory. 90 | * @retval None 91 | */ 92 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void) 93 | { 94 | /* Enable the Power Down in Run mode*/ 95 | __HAL_FLASH_POWER_DOWN_ENABLE(); 96 | 97 | return HAL_OK; 98 | 99 | } 100 | 101 | /** 102 | * @brief Disable the Power down in Run Mode 103 | * @note This function should be called and executed from SRAM memory. 104 | * @retval None 105 | */ 106 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void) 107 | { 108 | /* Disable the Power Down in Run mode*/ 109 | __HAL_FLASH_POWER_DOWN_DISABLE(); 110 | 111 | return HAL_OK; 112 | } 113 | 114 | #if defined (FLASH_OPTR_DBANK) 115 | /** 116 | * @brief Program the FLASH DBANK User Option Byte. 117 | * 118 | * @note To configure the user option bytes, the option lock bit OPTLOCK must 119 | * be cleared with the call of the HAL_FLASH_OB_Unlock() function. 120 | * @note To modify the DBANK option byte, no PCROP region should be defined. 121 | * To deactivate PCROP, user should perform RDP changing. 122 | * 123 | * @param DBankConfig The FLASH DBANK User Option Byte value. 124 | * This parameter can be one of the following values: 125 | * @arg OB_DBANK_128_BITS: Single-bank with 128-bits data 126 | * @arg OB_DBANK_64_BITS: Dual-bank with 64-bits data 127 | * 128 | * @retval HAL_Status 129 | */ 130 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig) 131 | { 132 | uint32_t count, reg; 133 | HAL_StatusTypeDef status = HAL_ERROR; 134 | 135 | /* Process Locked */ 136 | __HAL_LOCK(&pFlash); 137 | 138 | /* Check if the PCROP is disabled */ 139 | reg = FLASH->PCROP1SR; 140 | if (reg > FLASH->PCROP1ER) 141 | { 142 | reg = FLASH->PCROP2SR; 143 | if (reg > FLASH->PCROP2ER) 144 | { 145 | /* Disable Flash prefetch */ 146 | __HAL_FLASH_PREFETCH_BUFFER_DISABLE(); 147 | 148 | if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != 0U) 149 | { 150 | /* Disable Flash instruction cache */ 151 | __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); 152 | 153 | /* Flush Flash instruction cache */ 154 | __HAL_FLASH_INSTRUCTION_CACHE_RESET(); 155 | } 156 | 157 | if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != 0U) 158 | { 159 | /* Disable Flash data cache */ 160 | __HAL_FLASH_DATA_CACHE_DISABLE(); 161 | 162 | /* Flush Flash data cache */ 163 | __HAL_FLASH_DATA_CACHE_RESET(); 164 | } 165 | 166 | /* Disable WRP zone A of 1st bank if needed */ 167 | reg = FLASH->WRP1AR; 168 | if (((reg & FLASH_WRP1AR_WRP1A_STRT) >> FLASH_WRP1AR_WRP1A_STRT_Pos) <= 169 | ((reg & FLASH_WRP1AR_WRP1A_END) >> FLASH_WRP1AR_WRP1A_END_Pos)) 170 | { 171 | MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END), FLASH_WRP1AR_WRP1A_STRT); 172 | } 173 | 174 | /* Disable WRP zone B of 1st bank if needed */ 175 | reg = FLASH->WRP1BR; 176 | if (((reg & FLASH_WRP1BR_WRP1B_STRT) >> FLASH_WRP1BR_WRP1B_STRT_Pos) <= 177 | ((reg & FLASH_WRP1BR_WRP1B_END) >> FLASH_WRP1BR_WRP1B_END_Pos)) 178 | { 179 | MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END), FLASH_WRP1BR_WRP1B_STRT); 180 | } 181 | 182 | /* Disable WRP zone A of 2nd bank if needed */ 183 | reg = FLASH->WRP2AR; 184 | if (((reg & FLASH_WRP2AR_WRP2A_STRT) >> FLASH_WRP2AR_WRP2A_STRT_Pos) <= 185 | ((reg & FLASH_WRP2AR_WRP2A_END) >> FLASH_WRP2AR_WRP2A_END_Pos)) 186 | { 187 | MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END), FLASH_WRP2AR_WRP2A_STRT); 188 | } 189 | 190 | /* Disable WRP zone B of 2nd bank if needed */ 191 | reg = FLASH->WRP2BR; 192 | if (((reg & FLASH_WRP2BR_WRP2B_STRT) >> FLASH_WRP2BR_WRP2B_STRT_Pos) <= 193 | ((reg & FLASH_WRP2BR_WRP2B_END) >> FLASH_WRP2BR_WRP2B_END_Pos)) 194 | { 195 | MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END), FLASH_WRP2BR_WRP2B_STRT); 196 | } 197 | 198 | /* Modify the DBANK user option byte */ 199 | MODIFY_REG(FLASH->OPTR, FLASH_OPTR_DBANK, DBankConfig); 200 | 201 | /* Set OPTSTRT Bit */ 202 | SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); 203 | 204 | /* Wait for last operation to be completed */ 205 | /* 8 is the number of required instruction cycles for the below loop statement (timeout expressed in ms) */ 206 | count = FLASH_TIMEOUT_VALUE * (SystemCoreClock / 8U / 1000U); 207 | do 208 | { 209 | if (count == 0U) 210 | { 211 | break; 212 | } 213 | count--; 214 | } 215 | while (__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET); 216 | 217 | /* If the option byte program operation is completed, disable the OPTSTRT Bit */ 218 | CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); 219 | 220 | /* Set the bit to force the option byte reloading */ 221 | SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); 222 | } 223 | } 224 | 225 | /* Process Unlocked */ 226 | __HAL_UNLOCK(&pFlash); 227 | 228 | return status; 229 | } 230 | #endif 231 | 232 | /** 233 | * @} 234 | */ 235 | 236 | /** 237 | * @} 238 | */ 239 | #endif /* HAL_FLASH_MODULE_ENABLED */ 240 | 241 | 242 | 243 | /** 244 | * @} 245 | */ 246 | 247 | /** 248 | * @} 249 | */ 250 | 251 | 252 | 253 | 254 | -------------------------------------------------------------------------------- /Src/stm32g4xx_ll_i2c.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_i2c.c 4 | * @author MCD Application Team 5 | * @brief I2C LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g4xx_ll_i2c.h" 22 | #include "stm32g4xx_ll_bus.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif /* USE_FULL_ASSERT */ 28 | 29 | /** @addtogroup STM32G4xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined (I2C1) || defined (I2C2) || defined (I2C3) || defined (I2C4) 34 | 35 | /** @defgroup I2C_LL I2C 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | /** @addtogroup I2C_LL_Private_Macros 44 | * @{ 45 | */ 46 | 47 | #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \ 48 | ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \ 49 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \ 50 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP)) 51 | 52 | #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \ 53 | ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE)) 54 | 55 | #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU) 56 | 57 | #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU) 58 | 59 | #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \ 60 | ((__VALUE__) == LL_I2C_NACK)) 61 | 62 | #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \ 63 | ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT)) 64 | /** 65 | * @} 66 | */ 67 | 68 | /* Private function prototypes -----------------------------------------------*/ 69 | 70 | /* Exported functions --------------------------------------------------------*/ 71 | /** @addtogroup I2C_LL_Exported_Functions 72 | * @{ 73 | */ 74 | 75 | /** @addtogroup I2C_LL_EF_Init 76 | * @{ 77 | */ 78 | 79 | /** 80 | * @brief De-initialize the I2C registers to their default reset values. 81 | * @param I2Cx I2C Instance. 82 | * @retval An ErrorStatus enumeration value: 83 | * - SUCCESS: I2C registers are de-initialized 84 | * - ERROR: I2C registers are not de-initialized 85 | */ 86 | ErrorStatus LL_I2C_DeInit(const I2C_TypeDef *I2Cx) 87 | { 88 | ErrorStatus status = SUCCESS; 89 | 90 | /* Check the I2C Instance I2Cx */ 91 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 92 | 93 | if (I2Cx == I2C1) 94 | { 95 | /* Force reset of I2C clock */ 96 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1); 97 | 98 | /* Release reset of I2C clock */ 99 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1); 100 | } 101 | else if (I2Cx == I2C2) 102 | { 103 | /* Force reset of I2C clock */ 104 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2); 105 | 106 | /* Release reset of I2C clock */ 107 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2); 108 | 109 | } 110 | #if defined(I2C3) 111 | else if (I2Cx == I2C3) 112 | { 113 | /* Force reset of I2C clock */ 114 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C3); 115 | 116 | /* Release reset of I2C clock */ 117 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C3); 118 | } 119 | #endif /* I2C3 */ 120 | #if defined(I2C4) 121 | else if (I2Cx == I2C4) 122 | { 123 | /* Force reset of I2C clock */ 124 | LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_I2C4); 125 | 126 | /* Release reset of I2C clock */ 127 | LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_I2C4); 128 | } 129 | #endif /* I2C4 */ 130 | else 131 | { 132 | status = ERROR; 133 | } 134 | 135 | return status; 136 | } 137 | 138 | /** 139 | * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct. 140 | * @param I2Cx I2C Instance. 141 | * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure. 142 | * @retval An ErrorStatus enumeration value: 143 | * - SUCCESS: I2C registers are initialized 144 | * - ERROR: Not applicable 145 | */ 146 | ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, const LL_I2C_InitTypeDef *I2C_InitStruct) 147 | { 148 | /* Check the I2C Instance I2Cx */ 149 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 150 | 151 | /* Check the I2C parameters from I2C_InitStruct */ 152 | assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode)); 153 | assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter)); 154 | assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter)); 155 | assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1)); 156 | assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge)); 157 | assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize)); 158 | 159 | /* Disable the selected I2Cx Peripheral */ 160 | LL_I2C_Disable(I2Cx); 161 | 162 | /*---------------------------- I2Cx CR1 Configuration ------------------------ 163 | * Configure the analog and digital noise filters with parameters : 164 | * - AnalogFilter: I2C_CR1_ANFOFF bit 165 | * - DigitalFilter: I2C_CR1_DNF[3:0] bits 166 | */ 167 | LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter); 168 | 169 | /*---------------------------- I2Cx TIMINGR Configuration -------------------- 170 | * Configure the SDA setup, hold time and the SCL high, low period with parameter : 171 | * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0], 172 | * I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits 173 | */ 174 | LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing); 175 | 176 | /* Enable the selected I2Cx Peripheral */ 177 | LL_I2C_Enable(I2Cx); 178 | 179 | /*---------------------------- I2Cx OAR1 Configuration ----------------------- 180 | * Disable, Configure and Enable I2Cx device own address 1 with parameters : 181 | * - OwnAddress1: I2C_OAR1_OA1[9:0] bits 182 | * - OwnAddrSize: I2C_OAR1_OA1MODE bit 183 | */ 184 | LL_I2C_DisableOwnAddress1(I2Cx); 185 | LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize); 186 | 187 | /* OwnAdress1 == 0 is reserved for General Call address */ 188 | if (I2C_InitStruct->OwnAddress1 != 0U) 189 | { 190 | LL_I2C_EnableOwnAddress1(I2Cx); 191 | } 192 | 193 | /*---------------------------- I2Cx MODE Configuration ----------------------- 194 | * Configure I2Cx peripheral mode with parameter : 195 | * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits 196 | */ 197 | LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode); 198 | 199 | /*---------------------------- I2Cx CR2 Configuration ------------------------ 200 | * Configure the ACKnowledge or Non ACKnowledge condition 201 | * after the address receive match code or next received byte with parameter : 202 | * - TypeAcknowledge: I2C_CR2_NACK bit 203 | */ 204 | LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge); 205 | 206 | return SUCCESS; 207 | } 208 | 209 | /** 210 | * @brief Set each @ref LL_I2C_InitTypeDef field to default value. 211 | * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure. 212 | * @retval None 213 | */ 214 | void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct) 215 | { 216 | /* Set I2C_InitStruct fields to default values */ 217 | I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C; 218 | I2C_InitStruct->Timing = 0U; 219 | I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE; 220 | I2C_InitStruct->DigitalFilter = 0U; 221 | I2C_InitStruct->OwnAddress1 = 0U; 222 | I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK; 223 | I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; 224 | } 225 | 226 | /** 227 | * @} 228 | */ 229 | 230 | /** 231 | * @} 232 | */ 233 | 234 | /** 235 | * @} 236 | */ 237 | 238 | #endif /* I2C1 || I2C2 || I2C3 || I2C4 */ 239 | 240 | /** 241 | * @} 242 | */ 243 | 244 | #endif /* USE_FULL_LL_DRIVER */ 245 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_ll_usb.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_usb.h 4 | * @author MCD Application Team 5 | * @brief Header file of USB Low Layer HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G4xx_LL_USB_H 21 | #define STM32G4xx_LL_USB_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif /* __cplusplus */ 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g4xx_hal_def.h" 29 | 30 | #if defined (USB) 31 | /** @addtogroup STM32G4xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup USB_LL 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | 41 | /** 42 | * @brief USB Mode definition 43 | */ 44 | 45 | typedef enum 46 | { 47 | USB_DEVICE_MODE = 0 48 | } USB_ModeTypeDef; 49 | 50 | 51 | /** 52 | * @brief USB Instance Initialization Structure definition 53 | */ 54 | typedef struct 55 | { 56 | uint8_t dev_endpoints; /*!< Device Endpoints number. 57 | This parameter depends on the used USB core. 58 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 59 | 60 | uint8_t speed; /*!< USB Core speed. 61 | This parameter can be any value of @ref PCD_Speed/HCD_Speed 62 | (HCD_SPEED_xxx, HCD_SPEED_xxx) */ 63 | 64 | uint8_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */ 65 | 66 | uint8_t phy_itface; /*!< Select the used PHY interface. 67 | This parameter can be any value of @ref PCD_PHY_Module/HCD_PHY_Module */ 68 | 69 | uint8_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ 70 | 71 | uint8_t low_power_enable; /*!< Enable or disable the low Power Mode. */ 72 | 73 | uint8_t lpm_enable; /*!< Enable or disable Link Power Management. */ 74 | 75 | uint8_t battery_charging_enable; /*!< Enable or disable Battery charging. */ 76 | } USB_CfgTypeDef; 77 | 78 | typedef struct 79 | { 80 | uint8_t num; /*!< Endpoint number 81 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 82 | 83 | uint8_t is_in; /*!< Endpoint direction 84 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 85 | 86 | uint8_t is_stall; /*!< Endpoint stall condition 87 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 88 | 89 | uint8_t type; /*!< Endpoint type 90 | This parameter can be any value of @ref USB_LL_EP_Type */ 91 | 92 | uint8_t data_pid_start; /*!< Initial data PID 93 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 94 | 95 | 96 | uint16_t pmaadress; /*!< PMA Address 97 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ 98 | 99 | uint16_t pmaaddr0; /*!< PMA Address0 100 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ 101 | 102 | uint16_t pmaaddr1; /*!< PMA Address1 103 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ 104 | 105 | uint8_t doublebuffer; /*!< Double buffer enable 106 | This parameter can be 0 or 1 */ 107 | 108 | 109 | uint32_t maxpacket; /*!< Endpoint Max packet size 110 | This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ 111 | 112 | uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ 113 | 114 | uint32_t xfer_len; /*!< Current transfer length */ 115 | 116 | uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ 117 | 118 | uint32_t xfer_len_db; /*!< double buffer transfer length used with bulk double buffer in */ 119 | 120 | uint8_t xfer_fill_db; /*!< double buffer Need to Fill new buffer used with bulk_in */ 121 | } USB_EPTypeDef; 122 | 123 | /* Exported constants --------------------------------------------------------*/ 124 | 125 | /** @defgroup PCD_Exported_Constants PCD Exported Constants 126 | * @{ 127 | */ 128 | /** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS 129 | * @{ 130 | */ 131 | #define EP_MPS_64 0U 132 | #define EP_MPS_32 1U 133 | #define EP_MPS_16 2U 134 | #define EP_MPS_8 3U 135 | /** 136 | * @} 137 | */ 138 | 139 | /** @defgroup USB_LL_EP_Type USB Low Layer EP Type 140 | * @{ 141 | */ 142 | #define EP_TYPE_CTRL 0U 143 | #define EP_TYPE_ISOC 1U 144 | #define EP_TYPE_BULK 2U 145 | #define EP_TYPE_INTR 3U 146 | #define EP_TYPE_MSK 3U 147 | /** 148 | * @} 149 | */ 150 | 151 | /** @defgroup USB_LL Device Speed 152 | * @{ 153 | */ 154 | #define USBD_FS_SPEED 2U 155 | /** 156 | * @} 157 | */ 158 | 159 | 160 | #define BTABLE_ADDRESS 0x000U 161 | #define PMA_ACCESS 1U 162 | 163 | #ifndef USB_EP_RX_STRX 164 | #define USB_EP_RX_STRX (0x3U << 12) 165 | #endif /* USB_EP_RX_STRX */ 166 | 167 | #define EP_ADDR_MSK 0x7U 168 | 169 | #ifndef USE_USB_DOUBLE_BUFFER 170 | #define USE_USB_DOUBLE_BUFFER 1U 171 | #endif /* USE_USB_DOUBLE_BUFFER */ 172 | 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | /* Exported macro ------------------------------------------------------------*/ 179 | /** 180 | * @} 181 | */ 182 | 183 | /* Exported functions --------------------------------------------------------*/ 184 | /** @addtogroup USB_LL_Exported_Functions USB Low Layer Exported Functions 185 | * @{ 186 | */ 187 | 188 | 189 | HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg); 190 | HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg); 191 | HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx); 192 | HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx); 193 | HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode); 194 | 195 | HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef const *USBx); 196 | HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef const *USBx, uint32_t num); 197 | 198 | #if defined (HAL_PCD_MODULE_ENABLED) 199 | HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); 200 | HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); 201 | HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep); 202 | HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep); 203 | HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep); 204 | HAL_StatusTypeDef USB_EPStopXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep); 205 | #endif /* defined (HAL_PCD_MODULE_ENABLED) */ 206 | 207 | HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address); 208 | HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx); 209 | HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx); 210 | HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx); 211 | uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx); 212 | HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx); 213 | HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx); 214 | 215 | void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, 216 | uint16_t wPMABufAddr, uint16_t wNBytes); 217 | 218 | void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, 219 | uint16_t wPMABufAddr, uint16_t wNBytes); 220 | 221 | /** 222 | * @} 223 | */ 224 | 225 | /** 226 | * @} 227 | */ 228 | 229 | /** 230 | * @} 231 | */ 232 | 233 | /** 234 | * @} 235 | */ 236 | #endif /* defined (USB) */ 237 | 238 | #ifdef __cplusplus 239 | } 240 | #endif /* __cplusplus */ 241 | 242 | 243 | #endif /* STM32G4xx_LL_USB_H */ 244 | -------------------------------------------------------------------------------- /Src/stm32g4xx_hal_smbus_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_smbus_ex.c 4 | * @author MCD Application Team 5 | * @brief SMBUS Extended HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of SMBUS Extended peripheral: 8 | * + Extended features functions 9 | * + WakeUp Mode Functions 10 | * + FastModePlus Functions 11 | * 12 | ****************************************************************************** 13 | * @attention 14 | * 15 | * Copyright (c) 2019 STMicroelectronics. 16 | * All rights reserved. 17 | * 18 | * This software is licensed under terms that can be found in the LICENSE file 19 | * in the root directory of this software component. 20 | * If no LICENSE file comes with this software, it is provided AS-IS. 21 | * 22 | ****************************************************************************** 23 | @verbatim 24 | ============================================================================== 25 | ##### SMBUS peripheral Extended features ##### 26 | ============================================================================== 27 | 28 | [..] Comparing to other previous devices, the SMBUS interface for STM32G4xx 29 | devices contains the following additional features 30 | 31 | (+) Disable or enable wakeup from Stop mode(s) 32 | (+) Disable or enable Fast Mode Plus 33 | 34 | ##### How to use this driver ##### 35 | ============================================================================== 36 | (#) Configure the enable or disable of SMBUS Wake Up Mode using the functions : 37 | (++) HAL_SMBUSEx_EnableWakeUp() 38 | (++) HAL_SMBUSEx_DisableWakeUp() 39 | (#) Configure the enable or disable of fast mode plus driving capability using the functions : 40 | (++) HAL_SMBUSEx_EnableFastModePlus() 41 | (++) HAL_SMBUSEx_DisableFastModePlus() 42 | @endverbatim 43 | */ 44 | 45 | /* Includes ------------------------------------------------------------------*/ 46 | #include "stm32g4xx_hal.h" 47 | 48 | /** @addtogroup STM32G4xx_HAL_Driver 49 | * @{ 50 | */ 51 | 52 | /** @defgroup SMBUSEx SMBUSEx 53 | * @brief SMBUS Extended HAL module driver 54 | * @{ 55 | */ 56 | 57 | #ifdef HAL_SMBUS_MODULE_ENABLED 58 | 59 | /* Private typedef -----------------------------------------------------------*/ 60 | /* Private define ------------------------------------------------------------*/ 61 | /* Private macro -------------------------------------------------------------*/ 62 | /* Private variables ---------------------------------------------------------*/ 63 | /* Private function prototypes -----------------------------------------------*/ 64 | /* Private functions ---------------------------------------------------------*/ 65 | 66 | /** @defgroup SMBUSEx_Exported_Functions SMBUS Extended Exported Functions 67 | * @{ 68 | */ 69 | 70 | /** @defgroup SMBUSEx_Exported_Functions_Group2 WakeUp Mode Functions 71 | * @brief WakeUp Mode Functions 72 | * 73 | @verbatim 74 | =============================================================================== 75 | ##### WakeUp Mode Functions ##### 76 | =============================================================================== 77 | [..] This section provides functions allowing to: 78 | (+) Configure Wake Up Feature 79 | 80 | @endverbatim 81 | * @{ 82 | */ 83 | 84 | /** 85 | * @brief Enable SMBUS wakeup from Stop mode(s). 86 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains 87 | * the configuration information for the specified SMBUSx peripheral. 88 | * @retval HAL status 89 | */ 90 | HAL_StatusTypeDef HAL_SMBUSEx_EnableWakeUp(SMBUS_HandleTypeDef *hsmbus) 91 | { 92 | /* Check the parameters */ 93 | assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hsmbus->Instance)); 94 | 95 | if (hsmbus->State == HAL_SMBUS_STATE_READY) 96 | { 97 | /* Process Locked */ 98 | __HAL_LOCK(hsmbus); 99 | 100 | hsmbus->State = HAL_SMBUS_STATE_BUSY; 101 | 102 | /* Disable the selected SMBUS peripheral */ 103 | __HAL_SMBUS_DISABLE(hsmbus); 104 | 105 | /* Enable wakeup from stop mode */ 106 | hsmbus->Instance->CR1 |= I2C_CR1_WUPEN; 107 | 108 | __HAL_SMBUS_ENABLE(hsmbus); 109 | 110 | hsmbus->State = HAL_SMBUS_STATE_READY; 111 | 112 | /* Process Unlocked */ 113 | __HAL_UNLOCK(hsmbus); 114 | 115 | return HAL_OK; 116 | } 117 | else 118 | { 119 | return HAL_BUSY; 120 | } 121 | } 122 | 123 | /** 124 | * @brief Disable SMBUS wakeup from Stop mode(s). 125 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains 126 | * the configuration information for the specified SMBUSx peripheral. 127 | * @retval HAL status 128 | */ 129 | HAL_StatusTypeDef HAL_SMBUSEx_DisableWakeUp(SMBUS_HandleTypeDef *hsmbus) 130 | { 131 | /* Check the parameters */ 132 | assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hsmbus->Instance)); 133 | 134 | if (hsmbus->State == HAL_SMBUS_STATE_READY) 135 | { 136 | /* Process Locked */ 137 | __HAL_LOCK(hsmbus); 138 | 139 | hsmbus->State = HAL_SMBUS_STATE_BUSY; 140 | 141 | /* Disable the selected SMBUS peripheral */ 142 | __HAL_SMBUS_DISABLE(hsmbus); 143 | 144 | /* Disable wakeup from stop mode */ 145 | hsmbus->Instance->CR1 &= ~(I2C_CR1_WUPEN); 146 | 147 | __HAL_SMBUS_ENABLE(hsmbus); 148 | 149 | hsmbus->State = HAL_SMBUS_STATE_READY; 150 | 151 | /* Process Unlocked */ 152 | __HAL_UNLOCK(hsmbus); 153 | 154 | return HAL_OK; 155 | } 156 | else 157 | { 158 | return HAL_BUSY; 159 | } 160 | } 161 | /** 162 | * @} 163 | */ 164 | 165 | /** @defgroup SMBUSEx_Exported_Functions_Group3 Fast Mode Plus Functions 166 | * @brief Fast Mode Plus Functions 167 | * 168 | @verbatim 169 | =============================================================================== 170 | ##### Fast Mode Plus Functions ##### 171 | =============================================================================== 172 | [..] This section provides functions allowing to: 173 | (+) Configure Fast Mode Plus 174 | 175 | @endverbatim 176 | * @{ 177 | */ 178 | 179 | /** 180 | * @brief Enable the SMBUS fast mode plus driving capability. 181 | * @param ConfigFastModePlus Selects the pin. 182 | * This parameter can be one of the @ref SMBUSEx_FastModePlus values 183 | * @note For I2C1, fast mode plus driving capability can be enabled on all selected 184 | * I2C1 pins using SMBUS_FASTMODEPLUS_I2C1 parameter or independently 185 | * on each one of the following pins PB6, PB7, PB8 and PB9. 186 | * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability 187 | * can be enabled only by using SMBUS_FASTMODEPLUS_I2C1 parameter. 188 | * @note For all I2C2 pins fast mode plus driving capability can be enabled 189 | * only by using SMBUS_FASTMODEPLUS_I2C2 parameter. 190 | * @note For all I2C3 pins fast mode plus driving capability can be enabled 191 | * only by using SMBUS_FASTMODEPLUS_I2C3 parameter. 192 | * @note For all I2C4 pins fast mode plus driving capability can be enabled 193 | * only by using SMBUS_FASTMODEPLUS_I2C4 parameter. 194 | * @retval None 195 | */ 196 | void HAL_SMBUSEx_EnableFastModePlus(uint32_t ConfigFastModePlus) 197 | { 198 | /* Check the parameter */ 199 | assert_param(IS_SMBUS_FASTMODEPLUS(ConfigFastModePlus)); 200 | 201 | /* Enable SYSCFG clock */ 202 | __HAL_RCC_SYSCFG_CLK_ENABLE(); 203 | 204 | /* Enable fast mode plus driving capability for selected pin */ 205 | SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); 206 | } 207 | 208 | /** 209 | * @brief Disable the SMBUS fast mode plus driving capability. 210 | * @param ConfigFastModePlus Selects the pin. 211 | * This parameter can be one of the @ref SMBUSEx_FastModePlus values 212 | * @note For I2C1, fast mode plus driving capability can be disabled on all selected 213 | * I2C1 pins using SMBUS_FASTMODEPLUS_I2C1 parameter or independently 214 | * on each one of the following pins PB6, PB7, PB8 and PB9. 215 | * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability 216 | * can be disabled only by using SMBUS_FASTMODEPLUS_I2C1 parameter. 217 | * @note For all I2C2 pins fast mode plus driving capability can be disabled 218 | * only by using SMBUS_FASTMODEPLUS_I2C2 parameter. 219 | * @note For all I2C3 pins fast mode plus driving capability can be disabled 220 | * only by using SMBUS_FASTMODEPLUS_I2C3 parameter. 221 | * @note For all I2C4 pins fast mode plus driving capability can be disabled 222 | * only by using SMBUS_FASTMODEPLUS_I2C4 parameter. 223 | * @retval None 224 | */ 225 | void HAL_SMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus) 226 | { 227 | /* Check the parameter */ 228 | assert_param(IS_SMBUS_FASTMODEPLUS(ConfigFastModePlus)); 229 | 230 | /* Enable SYSCFG clock */ 231 | __HAL_RCC_SYSCFG_CLK_ENABLE(); 232 | 233 | /* Disable fast mode plus driving capability for selected pin */ 234 | CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); 235 | } 236 | 237 | /** 238 | * @} 239 | */ 240 | 241 | /** 242 | * @} 243 | */ 244 | 245 | /** 246 | * @} 247 | */ 248 | 249 | #endif /* HAL_SMBUS_MODULE_ENABLED */ 250 | /** 251 | * @} 252 | */ 253 | 254 | /** 255 | * @} 256 | */ 257 | -------------------------------------------------------------------------------- /Inc/stm32g4xx_hal_sram.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_sram.h 4 | * @author MCD Application Team 5 | * @brief Header file of SRAM HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G4xx_HAL_SRAM_H 21 | #define STM32G4xx_HAL_SRAM_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | #if defined(FMC_BANK1) 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32g4xx_ll_fmc.h" 31 | 32 | /** @addtogroup STM32G4xx_HAL_Driver 33 | * @{ 34 | */ 35 | /** @addtogroup SRAM 36 | * @{ 37 | */ 38 | 39 | /* Exported typedef ----------------------------------------------------------*/ 40 | 41 | /** @defgroup SRAM_Exported_Types SRAM Exported Types 42 | * @{ 43 | */ 44 | /** 45 | * @brief HAL SRAM State structures definition 46 | */ 47 | typedef enum 48 | { 49 | HAL_SRAM_STATE_RESET = 0x00U, /*!< SRAM not yet initialized or disabled */ 50 | HAL_SRAM_STATE_READY = 0x01U, /*!< SRAM initialized and ready for use */ 51 | HAL_SRAM_STATE_BUSY = 0x02U, /*!< SRAM internal process is ongoing */ 52 | HAL_SRAM_STATE_ERROR = 0x03U, /*!< SRAM error state */ 53 | HAL_SRAM_STATE_PROTECTED = 0x04U /*!< SRAM peripheral NORSRAM device write protected */ 54 | 55 | } HAL_SRAM_StateTypeDef; 56 | 57 | /** 58 | * @brief SRAM handle Structure definition 59 | */ 60 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 61 | typedef struct __SRAM_HandleTypeDef 62 | #else 63 | typedef struct 64 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 65 | { 66 | FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ 67 | 68 | FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ 69 | 70 | FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */ 71 | 72 | HAL_LockTypeDef Lock; /*!< SRAM locking object */ 73 | 74 | __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */ 75 | 76 | DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ 77 | 78 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 79 | void (* MspInitCallback)(struct __SRAM_HandleTypeDef *hsram); /*!< SRAM Msp Init callback */ 80 | void (* MspDeInitCallback)(struct __SRAM_HandleTypeDef *hsram); /*!< SRAM Msp DeInit callback */ 81 | void (* DmaXferCpltCallback)(DMA_HandleTypeDef *hdma); /*!< SRAM DMA Xfer Complete callback */ 82 | void (* DmaXferErrorCallback)(DMA_HandleTypeDef *hdma); /*!< SRAM DMA Xfer Error callback */ 83 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 84 | } SRAM_HandleTypeDef; 85 | 86 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 87 | /** 88 | * @brief HAL SRAM Callback ID enumeration definition 89 | */ 90 | typedef enum 91 | { 92 | HAL_SRAM_MSP_INIT_CB_ID = 0x00U, /*!< SRAM MspInit Callback ID */ 93 | HAL_SRAM_MSP_DEINIT_CB_ID = 0x01U, /*!< SRAM MspDeInit Callback ID */ 94 | HAL_SRAM_DMA_XFER_CPLT_CB_ID = 0x02U, /*!< SRAM DMA Xfer Complete Callback ID */ 95 | HAL_SRAM_DMA_XFER_ERR_CB_ID = 0x03U /*!< SRAM DMA Xfer Complete Callback ID */ 96 | } HAL_SRAM_CallbackIDTypeDef; 97 | 98 | /** 99 | * @brief HAL SRAM Callback pointer definition 100 | */ 101 | typedef void (*pSRAM_CallbackTypeDef)(SRAM_HandleTypeDef *hsram); 102 | typedef void (*pSRAM_DmaCallbackTypeDef)(DMA_HandleTypeDef *hdma); 103 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 104 | /** 105 | * @} 106 | */ 107 | 108 | /* Exported constants --------------------------------------------------------*/ 109 | /* Exported macro ------------------------------------------------------------*/ 110 | 111 | /** @defgroup SRAM_Exported_Macros SRAM Exported Macros 112 | * @{ 113 | */ 114 | 115 | /** @brief Reset SRAM handle state 116 | * @param __HANDLE__ SRAM handle 117 | * @retval None 118 | */ 119 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 120 | #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) do { \ 121 | (__HANDLE__)->State = HAL_SRAM_STATE_RESET; \ 122 | (__HANDLE__)->MspInitCallback = NULL; \ 123 | (__HANDLE__)->MspDeInitCallback = NULL; \ 124 | } while(0) 125 | #else 126 | #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET) 127 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 128 | 129 | /** 130 | * @} 131 | */ 132 | 133 | /* Exported functions --------------------------------------------------------*/ 134 | /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions 135 | * @{ 136 | */ 137 | 138 | /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions 139 | * @{ 140 | */ 141 | 142 | /* Initialization/de-initialization functions ********************************/ 143 | HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, 144 | FMC_NORSRAM_TimingTypeDef *ExtTiming); 145 | HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram); 146 | void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram); 147 | void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram); 148 | 149 | /** 150 | * @} 151 | */ 152 | 153 | /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions 154 | * @{ 155 | */ 156 | 157 | /* I/O operation functions ***************************************************/ 158 | HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, 159 | uint32_t BufferSize); 160 | HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, 161 | uint32_t BufferSize); 162 | HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, 163 | uint32_t BufferSize); 164 | HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, 165 | uint32_t BufferSize); 166 | HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, 167 | uint32_t BufferSize); 168 | HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, 169 | uint32_t BufferSize); 170 | HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, 171 | uint32_t BufferSize); 172 | HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, 173 | uint32_t BufferSize); 174 | 175 | void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); 176 | void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); 177 | 178 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 179 | /* SRAM callback registering/unregistering */ 180 | HAL_StatusTypeDef HAL_SRAM_RegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, 181 | pSRAM_CallbackTypeDef pCallback); 182 | HAL_StatusTypeDef HAL_SRAM_UnRegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId); 183 | HAL_StatusTypeDef HAL_SRAM_RegisterDmaCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, 184 | pSRAM_DmaCallbackTypeDef pCallback); 185 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | /** @addtogroup SRAM_Exported_Functions_Group3 Control functions 192 | * @{ 193 | */ 194 | 195 | /* SRAM Control functions ****************************************************/ 196 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram); 197 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram); 198 | 199 | /** 200 | * @} 201 | */ 202 | 203 | /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions 204 | * @{ 205 | */ 206 | 207 | /* SRAM State functions ******************************************************/ 208 | HAL_SRAM_StateTypeDef HAL_SRAM_GetState(const SRAM_HandleTypeDef *hsram); 209 | 210 | /** 211 | * @} 212 | */ 213 | 214 | /** 215 | * @} 216 | */ 217 | 218 | /** 219 | * @} 220 | */ 221 | 222 | /** 223 | * @} 224 | */ 225 | 226 | #endif /* FMC_BANK1 */ 227 | 228 | #ifdef __cplusplus 229 | } 230 | #endif 231 | 232 | #endif /* STM32G4xx_HAL_SRAM_H */ 233 | -------------------------------------------------------------------------------- /Src/stm32g4xx_ll_lptim.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_lptim.c 4 | * @author MCD Application Team 5 | * @brief LPTIM LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g4xx_ll_lptim.h" 22 | #include "stm32g4xx_ll_bus.h" 23 | #include "stm32g4xx_ll_rcc.h" 24 | 25 | 26 | #ifdef USE_FULL_ASSERT 27 | #include "stm32_assert.h" 28 | #else 29 | #define assert_param(expr) ((void)0U) 30 | #endif /* USE_FULL_ASSERT */ 31 | 32 | /** @addtogroup STM32G4xx_LL_Driver 33 | * @{ 34 | */ 35 | 36 | 37 | 38 | /** @addtogroup LPTIM_LL 39 | * @{ 40 | */ 41 | 42 | /* Private types -------------------------------------------------------------*/ 43 | /* Private variables ---------------------------------------------------------*/ 44 | /* Private constants ---------------------------------------------------------*/ 45 | /* Private macros ------------------------------------------------------------*/ 46 | /** @addtogroup LPTIM_LL_Private_Macros 47 | * @{ 48 | */ 49 | #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \ 50 | || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL)) 51 | 52 | #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1) \ 53 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2) \ 54 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4) \ 55 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8) \ 56 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16) \ 57 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32) \ 58 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64) \ 59 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128)) 60 | 61 | #define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \ 62 | || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE)) 63 | 64 | #define IS_LL_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \ 65 | || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE)) 66 | /** 67 | * @} 68 | */ 69 | 70 | 71 | /* Private function prototypes -----------------------------------------------*/ 72 | /* Private functions ---------------------------------------------------------*/ 73 | /** @defgroup LPTIM_Private_Functions LPTIM Private Functions 74 | * @{ 75 | */ 76 | /** 77 | * @} 78 | */ 79 | /* Exported functions --------------------------------------------------------*/ 80 | /** @addtogroup LPTIM_LL_Exported_Functions 81 | * @{ 82 | */ 83 | 84 | /** @addtogroup LPTIM_LL_EF_Init 85 | * @{ 86 | */ 87 | 88 | /** 89 | * @brief Set LPTIMx registers to their reset values. 90 | * @param LPTIMx LP Timer instance 91 | * @retval An ErrorStatus enumeration value: 92 | * - SUCCESS: LPTIMx registers are de-initialized 93 | * - ERROR: invalid LPTIMx instance 94 | */ 95 | ErrorStatus LL_LPTIM_DeInit(const LPTIM_TypeDef *LPTIMx) 96 | { 97 | ErrorStatus result = SUCCESS; 98 | 99 | /* Check the parameters */ 100 | assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 101 | 102 | if (LPTIMx == LPTIM1) 103 | { 104 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1); 105 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1); 106 | } 107 | else 108 | { 109 | result = ERROR; 110 | } 111 | 112 | return result; 113 | } 114 | 115 | /** 116 | * @brief Set each fields of the LPTIM_InitStruct structure to its default 117 | * value. 118 | * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure 119 | * @retval None 120 | */ 121 | void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct) 122 | { 123 | /* Set the default configuration */ 124 | LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL; 125 | LPTIM_InitStruct->Prescaler = LL_LPTIM_PRESCALER_DIV1; 126 | LPTIM_InitStruct->Waveform = LL_LPTIM_OUTPUT_WAVEFORM_PWM; 127 | LPTIM_InitStruct->Polarity = LL_LPTIM_OUTPUT_POLARITY_REGULAR; 128 | } 129 | 130 | /** 131 | * @brief Configure the LPTIMx peripheral according to the specified parameters. 132 | * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled. 133 | * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable(). 134 | * @param LPTIMx LP Timer Instance 135 | * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure 136 | * @retval An ErrorStatus enumeration value: 137 | * - SUCCESS: LPTIMx instance has been initialized 138 | * - ERROR: LPTIMx instance hasn't been initialized 139 | */ 140 | ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct) 141 | { 142 | ErrorStatus result = SUCCESS; 143 | /* Check the parameters */ 144 | assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 145 | assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource)); 146 | assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler)); 147 | assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform)); 148 | assert_param(IS_LL_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity)); 149 | 150 | /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled 151 | (ENABLE bit is reset to 0). 152 | */ 153 | if (LL_LPTIM_IsEnabled(LPTIMx) == 1UL) 154 | { 155 | result = ERROR; 156 | } 157 | else 158 | { 159 | /* Set CKSEL bitfield according to ClockSource value */ 160 | /* Set PRESC bitfield according to Prescaler value */ 161 | /* Set WAVE bitfield according to Waveform value */ 162 | /* Set WAVEPOL bitfield according to Polarity value */ 163 | MODIFY_REG(LPTIMx->CFGR, 164 | (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL), 165 | LPTIM_InitStruct->ClockSource | \ 166 | LPTIM_InitStruct->Prescaler | \ 167 | LPTIM_InitStruct->Waveform | \ 168 | LPTIM_InitStruct->Polarity); 169 | } 170 | 171 | return result; 172 | } 173 | 174 | /** 175 | * @brief Disable the LPTIM instance 176 | * @rmtoll CR ENABLE LL_LPTIM_Disable 177 | * @param LPTIMx Low-Power Timer instance 178 | * @note The following sequence is required to solve LPTIM disable HW limitation. 179 | * Please check Errata Sheet ES0335 for more details under "MCU may remain 180 | * stuck in LPTIM interrupt when entering Stop mode" section. 181 | * @retval None 182 | */ 183 | void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx) 184 | { 185 | LL_RCC_ClocksTypeDef rcc_clock; 186 | uint32_t tmpclksource = 0; 187 | uint32_t tmpIER; 188 | uint32_t tmpCFGR; 189 | uint32_t tmpCMP; 190 | uint32_t tmpARR; 191 | uint32_t primask_bit; 192 | uint32_t tmpOR; 193 | 194 | /* Check the parameters */ 195 | assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 196 | 197 | /* Enter critical section */ 198 | primask_bit = __get_PRIMASK(); 199 | __set_PRIMASK(1) ; 200 | 201 | /********** Save LPTIM Config *********/ 202 | /* Save LPTIM source clock */ 203 | switch ((uint32_t)LPTIMx) 204 | { 205 | case LPTIM1_BASE: 206 | tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE); 207 | break; 208 | default: 209 | break; 210 | } 211 | 212 | /* Save LPTIM configuration registers */ 213 | tmpIER = LPTIMx->IER; 214 | tmpCFGR = LPTIMx->CFGR; 215 | tmpCMP = LPTIMx->CMP; 216 | tmpARR = LPTIMx->ARR; 217 | tmpOR = LPTIMx->OR; 218 | 219 | /************* Reset LPTIM ************/ 220 | (void)LL_LPTIM_DeInit(LPTIMx); 221 | 222 | /********* Restore LPTIM Config *******/ 223 | LL_RCC_GetSystemClocksFreq(&rcc_clock); 224 | 225 | if ((tmpCMP != 0UL) || (tmpARR != 0UL)) 226 | { 227 | /* Force LPTIM source kernel clock from APB */ 228 | switch ((uint32_t)LPTIMx) 229 | { 230 | case LPTIM1_BASE: 231 | LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_PCLK1); 232 | break; 233 | default: 234 | break; 235 | } 236 | 237 | if (tmpCMP != 0UL) 238 | { 239 | /* Restore CMP and ARR registers (LPTIM should be enabled first) */ 240 | LPTIMx->CR |= LPTIM_CR_ENABLE; 241 | LPTIMx->CMP = tmpCMP; 242 | 243 | /* Polling on CMP write ok status after above restore operation */ 244 | do 245 | { 246 | rcc_clock.SYSCLK_Frequency--; /* Used for timeout */ 247 | } while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL)); 248 | 249 | LL_LPTIM_ClearFlag_CMPOK(LPTIMx); 250 | } 251 | 252 | if (tmpARR != 0UL) 253 | { 254 | LPTIMx->CR |= LPTIM_CR_ENABLE; 255 | LPTIMx->ARR = tmpARR; 256 | 257 | LL_RCC_GetSystemClocksFreq(&rcc_clock); 258 | /* Polling on ARR write ok status after above restore operation */ 259 | do 260 | { 261 | rcc_clock.SYSCLK_Frequency--; /* Used for timeout */ 262 | } while (((LL_LPTIM_IsActiveFlag_ARROK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL)); 263 | 264 | LL_LPTIM_ClearFlag_ARROK(LPTIMx); 265 | } 266 | 267 | 268 | /* Restore LPTIM source kernel clock */ 269 | LL_RCC_SetLPTIMClockSource(tmpclksource); 270 | } 271 | 272 | /* Restore configuration registers (LPTIM should be disabled first) */ 273 | LPTIMx->CR &= ~(LPTIM_CR_ENABLE); 274 | LPTIMx->IER = tmpIER; 275 | LPTIMx->CFGR = tmpCFGR; 276 | LPTIMx->OR = tmpOR; 277 | 278 | /* Exit critical section: restore previous priority mask */ 279 | __set_PRIMASK(primask_bit); 280 | } 281 | 282 | /** 283 | * @} 284 | */ 285 | 286 | /** 287 | * @} 288 | */ 289 | 290 | /** 291 | * @} 292 | */ 293 | 294 | 295 | 296 | /** 297 | * @} 298 | */ 299 | 300 | #endif /* USE_FULL_LL_DRIVER */ 301 | -------------------------------------------------------------------------------- /Src/stm32g4xx_hal_pcd_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_pcd_ex.c 4 | * @author MCD Application Team 5 | * @brief PCD Extended HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the USB Peripheral Controller: 8 | * + Extended features functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2019 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "stm32g4xx_hal.h" 25 | 26 | /** @addtogroup STM32G4xx_HAL_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup PCDEx PCDEx 31 | * @brief PCD Extended HAL module driver 32 | * @{ 33 | */ 34 | 35 | #ifdef HAL_PCD_MODULE_ENABLED 36 | 37 | #if defined (USB) 38 | /* Private types -------------------------------------------------------------*/ 39 | /* Private variables ---------------------------------------------------------*/ 40 | /* Private constants ---------------------------------------------------------*/ 41 | /* Private macros ------------------------------------------------------------*/ 42 | /* Private functions ---------------------------------------------------------*/ 43 | /* Exported functions --------------------------------------------------------*/ 44 | 45 | /** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions 46 | * @{ 47 | */ 48 | 49 | /** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 50 | * @brief PCDEx control functions 51 | * 52 | @verbatim 53 | =============================================================================== 54 | ##### Extended features functions ##### 55 | =============================================================================== 56 | [..] This section provides functions allowing to: 57 | (+) Update FIFO configuration 58 | 59 | @endverbatim 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @brief Configure PMA for EP 65 | * @param hpcd Device instance 66 | * @param ep_addr endpoint address 67 | * @param ep_kind endpoint Kind 68 | * USB_SNG_BUF: Single Buffer used 69 | * USB_DBL_BUF: Double Buffer used 70 | * @param pmaadress: EP address in The PMA: In case of single buffer endpoint 71 | * this parameter is 16-bit value providing the address 72 | * in PMA allocated to endpoint. 73 | * In case of double buffer endpoint this parameter 74 | * is a 32-bit value providing the endpoint buffer 0 address 75 | * in the LSB part of 32-bit value and endpoint buffer 1 address 76 | * in the MSB part of 32-bit value. 77 | * @retval HAL status 78 | */ 79 | 80 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, 81 | uint16_t ep_kind, uint32_t pmaadress) 82 | { 83 | PCD_EPTypeDef *ep; 84 | 85 | /* initialize ep structure*/ 86 | if ((0x80U & ep_addr) == 0x80U) 87 | { 88 | ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 89 | } 90 | else 91 | { 92 | ep = &hpcd->OUT_ep[ep_addr]; 93 | } 94 | 95 | /* Here we check if the endpoint is single or double Buffer*/ 96 | if (ep_kind == PCD_SNG_BUF) 97 | { 98 | /* Single Buffer */ 99 | ep->doublebuffer = 0U; 100 | /* Configure the PMA */ 101 | ep->pmaadress = (uint16_t)pmaadress; 102 | } 103 | #if (USE_USB_DOUBLE_BUFFER == 1U) 104 | else /* USB_DBL_BUF */ 105 | { 106 | /* Double Buffer Endpoint */ 107 | ep->doublebuffer = 1U; 108 | /* Configure the PMA */ 109 | ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); 110 | ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); 111 | } 112 | #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ 113 | 114 | return HAL_OK; 115 | } 116 | 117 | /** 118 | * @brief Activate BatteryCharging feature. 119 | * @param hpcd PCD handle 120 | * @retval HAL status 121 | */ 122 | HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) 123 | { 124 | USB_TypeDef *USBx = hpcd->Instance; 125 | hpcd->battery_charging_active = 1U; 126 | 127 | /* Enable BCD feature */ 128 | USBx->BCDR |= USB_BCDR_BCDEN; 129 | 130 | /* Enable DCD : Data Contact Detect */ 131 | USBx->BCDR &= ~(USB_BCDR_PDEN); 132 | USBx->BCDR &= ~(USB_BCDR_SDEN); 133 | USBx->BCDR |= USB_BCDR_DCDEN; 134 | 135 | return HAL_OK; 136 | } 137 | 138 | /** 139 | * @brief Deactivate BatteryCharging feature. 140 | * @param hpcd PCD handle 141 | * @retval HAL status 142 | */ 143 | HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) 144 | { 145 | USB_TypeDef *USBx = hpcd->Instance; 146 | hpcd->battery_charging_active = 0U; 147 | 148 | /* Disable BCD feature */ 149 | USBx->BCDR &= ~(USB_BCDR_BCDEN); 150 | 151 | return HAL_OK; 152 | } 153 | 154 | /** 155 | * @brief Handle BatteryCharging Process. 156 | * @param hpcd PCD handle 157 | * @retval HAL status 158 | */ 159 | void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) 160 | { 161 | USB_TypeDef *USBx = hpcd->Instance; 162 | uint32_t tickstart = HAL_GetTick(); 163 | 164 | /* Wait for Min DCD Timeout */ 165 | HAL_Delay(300U); 166 | 167 | /* Data Pin Contact ? Check Detect flag */ 168 | if ((USBx->BCDR & USB_BCDR_DCDET) == USB_BCDR_DCDET) 169 | { 170 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 171 | hpcd->BCDCallback(hpcd, PCD_BCD_CONTACT_DETECTION); 172 | #else 173 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); 174 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 175 | } 176 | /* Primary detection: checks if connected to Standard Downstream Port 177 | (without charging capability) */ 178 | USBx->BCDR &= ~(USB_BCDR_DCDEN); 179 | HAL_Delay(50U); 180 | USBx->BCDR |= (USB_BCDR_PDEN); 181 | HAL_Delay(50U); 182 | 183 | /* If Charger detect ? */ 184 | if ((USBx->BCDR & USB_BCDR_PDET) == USB_BCDR_PDET) 185 | { 186 | /* Start secondary detection to check connection to Charging Downstream 187 | Port or Dedicated Charging Port */ 188 | USBx->BCDR &= ~(USB_BCDR_PDEN); 189 | HAL_Delay(50U); 190 | USBx->BCDR |= (USB_BCDR_SDEN); 191 | HAL_Delay(50U); 192 | 193 | /* If CDP ? */ 194 | if ((USBx->BCDR & USB_BCDR_SDET) == USB_BCDR_SDET) 195 | { 196 | /* Dedicated Downstream Port DCP */ 197 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 198 | hpcd->BCDCallback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); 199 | #else 200 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); 201 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 202 | } 203 | else 204 | { 205 | /* Charging Downstream Port CDP */ 206 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 207 | hpcd->BCDCallback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); 208 | #else 209 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); 210 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 211 | } 212 | } 213 | else /* NO */ 214 | { 215 | /* Standard Downstream Port */ 216 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 217 | hpcd->BCDCallback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); 218 | #else 219 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); 220 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 221 | } 222 | 223 | /* Battery Charging capability discovery finished Start Enumeration */ 224 | (void)HAL_PCDEx_DeActivateBCD(hpcd); 225 | 226 | /* Check for the Timeout, else start USB Device */ 227 | if ((HAL_GetTick() - tickstart) > 1000U) 228 | { 229 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 230 | hpcd->BCDCallback(hpcd, PCD_BCD_ERROR); 231 | #else 232 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); 233 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 234 | } 235 | else 236 | { 237 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 238 | hpcd->BCDCallback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); 239 | #else 240 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); 241 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 242 | } 243 | } 244 | 245 | /** 246 | * @brief Activate LPM feature. 247 | * @param hpcd PCD handle 248 | * @retval HAL status 249 | */ 250 | HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) 251 | { 252 | 253 | USB_TypeDef *USBx = hpcd->Instance; 254 | hpcd->lpm_active = 1U; 255 | hpcd->LPM_State = LPM_L0; 256 | 257 | USBx->LPMCSR |= USB_LPMCSR_LMPEN; 258 | USBx->LPMCSR |= USB_LPMCSR_LPMACK; 259 | 260 | return HAL_OK; 261 | } 262 | 263 | /** 264 | * @brief Deactivate LPM feature. 265 | * @param hpcd PCD handle 266 | * @retval HAL status 267 | */ 268 | HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) 269 | { 270 | USB_TypeDef *USBx = hpcd->Instance; 271 | 272 | hpcd->lpm_active = 0U; 273 | 274 | USBx->LPMCSR &= ~(USB_LPMCSR_LMPEN); 275 | USBx->LPMCSR &= ~(USB_LPMCSR_LPMACK); 276 | 277 | return HAL_OK; 278 | } 279 | 280 | 281 | /** 282 | * @brief Send LPM message to user layer callback. 283 | * @param hpcd PCD handle 284 | * @param msg LPM message 285 | * @retval HAL status 286 | */ 287 | __weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) 288 | { 289 | /* Prevent unused argument(s) compilation warning */ 290 | UNUSED(hpcd); 291 | UNUSED(msg); 292 | 293 | /* NOTE : This function should not be modified, when the callback is needed, 294 | the HAL_PCDEx_LPM_Callback could be implemented in the user file 295 | */ 296 | } 297 | 298 | /** 299 | * @brief Send BatteryCharging message to user layer callback. 300 | * @param hpcd PCD handle 301 | * @param msg LPM message 302 | * @retval HAL status 303 | */ 304 | __weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) 305 | { 306 | /* Prevent unused argument(s) compilation warning */ 307 | UNUSED(hpcd); 308 | UNUSED(msg); 309 | 310 | /* NOTE : This function should not be modified, when the callback is needed, 311 | the HAL_PCDEx_BCD_Callback could be implemented in the user file 312 | */ 313 | } 314 | 315 | /** 316 | * @} 317 | */ 318 | 319 | /** 320 | * @} 321 | */ 322 | #endif /* defined (USB) */ 323 | #endif /* HAL_PCD_MODULE_ENABLED */ 324 | 325 | /** 326 | * @} 327 | */ 328 | 329 | /** 330 | * @} 331 | */ 332 | -------------------------------------------------------------------------------- /Src/stm32g4xx_ll_opamp.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_opamp.c 4 | * @author MCD Application Team 5 | * @brief OPAMP LL module driver 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g4xx_ll_opamp.h" 22 | 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif 28 | 29 | /** @addtogroup STM32G4xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined (OPAMP1) || defined (OPAMP2) || defined (OPAMP3) || defined (OPAMP4) || defined (OPAMP5) || defined (OPAMP6) 34 | 35 | /** @addtogroup OPAMP_LL OPAMP 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | 44 | /** @addtogroup OPAMP_LL_Private_Macros 45 | * @{ 46 | */ 47 | 48 | /* Check of parameters for configuration of OPAMP hierarchical scope: */ 49 | /* OPAMP instance. */ 50 | 51 | #define IS_LL_OPAMP_POWER_MODE(__POWER_MODE__) \ 52 | ( ((__POWER_MODE__) == LL_OPAMP_POWERMODE_NORMALSPEED) \ 53 | || ((__POWER_MODE__) == LL_OPAMP_POWERMODE_HIGHSPEED)) 54 | 55 | #define IS_LL_OPAMP_FUNCTIONAL_MODE(__FUNCTIONAL_MODE__) \ 56 | ( ((__FUNCTIONAL_MODE__) == LL_OPAMP_MODE_STANDALONE) \ 57 | || ((__FUNCTIONAL_MODE__) == LL_OPAMP_MODE_FOLLOWER) \ 58 | || ((__FUNCTIONAL_MODE__) == LL_OPAMP_MODE_PGA) \ 59 | || ((__FUNCTIONAL_MODE__) == LL_OPAMP_MODE_PGA_IO0) \ 60 | || ((__FUNCTIONAL_MODE__) == LL_OPAMP_MODE_PGA_IO0_BIAS) \ 61 | || ((__FUNCTIONAL_MODE__) == LL_OPAMP_MODE_PGA_IO0_IO1_BIAS) \ 62 | ) 63 | 64 | #define IS_LL_OPAMP_INPUT_NONINVERTING(__INPUT_NONINVERTING__) \ 65 | ( ((__INPUT_NONINVERTING__) == LL_OPAMP_INPUT_NONINVERT_IO0) \ 66 | || ((__INPUT_NONINVERTING__) == LL_OPAMP_INPUT_NONINVERT_IO1) \ 67 | || ((__INPUT_NONINVERTING__) == LL_OPAMP_INPUT_NONINVERT_IO2) \ 68 | || ((__INPUT_NONINVERTING__) == LL_OPAMP_INPUT_NONINVERT_IO3) \ 69 | || ((__INPUT_NONINVERTING__) == LL_OPAMP_INPUT_NONINVERT_DAC) \ 70 | ) 71 | 72 | #define IS_LL_OPAMP_INPUT_INVERTING(__INPUT_INVERTING__) \ 73 | ( ((__INPUT_INVERTING__) == LL_OPAMP_INPUT_INVERT_IO0) \ 74 | || ((__INPUT_INVERTING__) == LL_OPAMP_INPUT_INVERT_IO1) \ 75 | || ((__INPUT_INVERTING__) == LL_OPAMP_INPUT_INVERT_CONNECT_NO) \ 76 | ) 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | 83 | /* Private function prototypes -----------------------------------------------*/ 84 | 85 | /* Exported functions --------------------------------------------------------*/ 86 | /** @addtogroup OPAMP_LL_Exported_Functions 87 | * @{ 88 | */ 89 | 90 | /** @addtogroup OPAMP_LL_EF_Init 91 | * @{ 92 | */ 93 | 94 | /** 95 | * @brief De-initialize registers of the selected OPAMP instance 96 | * to their default reset values. 97 | * @note If comparator is locked, de-initialization by software is 98 | * not possible. 99 | * The only way to unlock the comparator is a device hardware reset. 100 | * @param OPAMPx OPAMP instance 101 | * @retval An ErrorStatus enumeration value: 102 | * - SUCCESS: OPAMP registers are de-initialized 103 | * - ERROR: OPAMP registers are not de-initialized 104 | */ 105 | ErrorStatus LL_OPAMP_DeInit(OPAMP_TypeDef *OPAMPx) 106 | { 107 | ErrorStatus status = SUCCESS; 108 | 109 | /* Check the parameters */ 110 | assert_param(IS_OPAMP_ALL_INSTANCE(OPAMPx)); 111 | 112 | /* Note: Hardware constraint (refer to description of this function): */ 113 | /* OPAMP instance must not be locked. */ 114 | if (LL_OPAMP_IsLocked(OPAMPx) == 0UL) 115 | { 116 | LL_OPAMP_WriteReg(OPAMPx, CSR, 0x00000000UL); 117 | } 118 | else 119 | { 120 | /* OPAMP instance is locked: de-initialization by software is */ 121 | /* not possible. */ 122 | /* The only way to unlock the OPAMP is a device hardware reset. */ 123 | status = ERROR; 124 | } 125 | 126 | /* Timer controlled mux mode register reset */ 127 | if (LL_OPAMP_IsTimerMuxLocked(OPAMPx) == 0UL) 128 | { 129 | LL_OPAMP_WriteReg(OPAMPx, TCMR, 0x00000000UL); 130 | } 131 | else if (LL_OPAMP_ReadReg(OPAMPx, TCMR) != 0x80000000UL) 132 | { 133 | /* OPAMP instance timer controlled mux is locked configured, deinit error */ 134 | /* The only way to unlock the OPAMP is a device hardware reset. */ 135 | status = ERROR; 136 | } 137 | else 138 | { 139 | /* OPAMP instance timer controlled mux is locked unconfigured, deinit OK */ 140 | } 141 | 142 | return status; 143 | } 144 | 145 | /** 146 | * @brief Initialize some features of OPAMP instance. 147 | * @note This function reset bit of calibration mode to ensure 148 | * to be in functional mode, in order to have OPAMP parameters 149 | * (inputs selection, ...) set with the corresponding OPAMP mode 150 | * to be effective. 151 | * @param OPAMPx OPAMP instance 152 | * @param OPAMP_InitStruct Pointer to a @ref LL_OPAMP_InitTypeDef structure 153 | * @retval An ErrorStatus enumeration value: 154 | * - SUCCESS: OPAMP registers are initialized 155 | * - ERROR: OPAMP registers are not initialized 156 | */ 157 | ErrorStatus LL_OPAMP_Init(OPAMP_TypeDef *OPAMPx, LL_OPAMP_InitTypeDef *OPAMP_InitStruct) 158 | { 159 | ErrorStatus status = SUCCESS; 160 | 161 | /* Check the parameters */ 162 | assert_param(IS_OPAMP_ALL_INSTANCE(OPAMPx)); 163 | assert_param(IS_LL_OPAMP_POWER_MODE(OPAMP_InitStruct->PowerMode)); 164 | assert_param(IS_LL_OPAMP_FUNCTIONAL_MODE(OPAMP_InitStruct->FunctionalMode)); 165 | assert_param(IS_LL_OPAMP_INPUT_NONINVERTING(OPAMP_InitStruct->InputNonInverting)); 166 | 167 | /* Note: OPAMP inverting input can be used with OPAMP in mode standalone */ 168 | /* or PGA with external capacitors for filtering circuit. */ 169 | /* Otherwise (OPAMP in mode follower), OPAMP inverting input is */ 170 | /* not used (not connected to GPIO pin). */ 171 | if (OPAMP_InitStruct->FunctionalMode != LL_OPAMP_MODE_FOLLOWER) 172 | { 173 | assert_param(IS_LL_OPAMP_INPUT_INVERTING(OPAMP_InitStruct->InputInverting)); 174 | } 175 | 176 | /* Note: Hardware constraint (refer to description of this function): */ 177 | /* OPAMP instance must not be locked. */ 178 | if (LL_OPAMP_IsLocked(OPAMPx) == 0U) 179 | { 180 | /* Configuration of OPAMP instance : */ 181 | /* - PowerMode */ 182 | /* - Functional mode */ 183 | /* - Input non-inverting */ 184 | /* - Input inverting */ 185 | /* Note: Bit OPAMP_CSR_CALON reset to ensure to be in functional mode. */ 186 | if (OPAMP_InitStruct->FunctionalMode != LL_OPAMP_MODE_FOLLOWER) 187 | { 188 | MODIFY_REG(OPAMPx->CSR, 189 | OPAMP_CSR_HIGHSPEEDEN 190 | | OPAMP_CSR_CALON 191 | | OPAMP_CSR_VMSEL 192 | | OPAMP_CSR_VPSEL 193 | | OPAMP_CSR_PGGAIN_4 | OPAMP_CSR_PGGAIN_3 194 | , 195 | OPAMP_InitStruct->PowerMode 196 | | OPAMP_InitStruct->FunctionalMode 197 | | OPAMP_InitStruct->InputNonInverting 198 | | OPAMP_InitStruct->InputInverting 199 | ); 200 | } 201 | else 202 | { 203 | MODIFY_REG(OPAMPx->CSR, 204 | OPAMP_CSR_HIGHSPEEDEN 205 | | OPAMP_CSR_CALON 206 | | OPAMP_CSR_VMSEL 207 | | OPAMP_CSR_VPSEL 208 | | OPAMP_CSR_PGGAIN_4 | OPAMP_CSR_PGGAIN_3 209 | , 210 | OPAMP_InitStruct->PowerMode 211 | | LL_OPAMP_MODE_FOLLOWER 212 | | OPAMP_InitStruct->InputNonInverting 213 | ); 214 | } 215 | } 216 | else 217 | { 218 | /* Initialization error: OPAMP instance is locked. */ 219 | status = ERROR; 220 | } 221 | 222 | return status; 223 | } 224 | 225 | /** 226 | * @brief Set each @ref LL_OPAMP_InitTypeDef field to default value. 227 | * @param OPAMP_InitStruct pointer to a @ref LL_OPAMP_InitTypeDef structure 228 | * whose fields will be set to default values. 229 | * @retval None 230 | */ 231 | void LL_OPAMP_StructInit(LL_OPAMP_InitTypeDef *OPAMP_InitStruct) 232 | { 233 | /* Set OPAMP_InitStruct fields to default values */ 234 | OPAMP_InitStruct->PowerMode = LL_OPAMP_POWERMODE_NORMALSPEED; 235 | OPAMP_InitStruct->FunctionalMode = LL_OPAMP_MODE_FOLLOWER; 236 | OPAMP_InitStruct->InputNonInverting = LL_OPAMP_INPUT_NONINVERT_IO0; 237 | /* Note: Parameter discarded if OPAMP in functional mode follower, */ 238 | /* set anyway to its default value. */ 239 | OPAMP_InitStruct->InputInverting = LL_OPAMP_INPUT_INVERT_CONNECT_NO; 240 | } 241 | 242 | /** 243 | * @} 244 | */ 245 | 246 | /** 247 | * @} 248 | */ 249 | 250 | /** 251 | * @} 252 | */ 253 | 254 | #endif /* OPAMP1 || OPAMP2 || OPAMP3 || OPAMP4 || OPAMP5 || OPAMP6 */ 255 | 256 | /** 257 | * @} 258 | */ 259 | 260 | #endif /* USE_FULL_LL_DRIVER */ 261 | 262 | -------------------------------------------------------------------------------- /Src/stm32g4xx_ll_gpio.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_ll_gpio.c 4 | * @author MCD Application Team 5 | * @brief GPIO LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2019 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32g4xx_ll_gpio.h" 22 | #include "stm32g4xx_ll_bus.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif /* USE_FULL_ASSERT */ 28 | 29 | /** @addtogroup STM32G4xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) 34 | 35 | /** @addtogroup GPIO_LL 36 | * @{ 37 | */ 38 | /** MISRA C:2012 deviation rule has been granted for following rules: 39 | * Rule-12.2 - Medium: RHS argument is in interval [0,INF] which is out of 40 | * range of the shift operator in following API : 41 | * LL_GPIO_Init 42 | */ 43 | 44 | /* Private types -------------------------------------------------------------*/ 45 | /* Private variables ---------------------------------------------------------*/ 46 | /* Private constants ---------------------------------------------------------*/ 47 | /* Private macros ------------------------------------------------------------*/ 48 | /** @addtogroup GPIO_LL_Private_Macros 49 | * @{ 50 | */ 51 | #define IS_LL_GPIO_PIN(__VALUE__) (((0x00000000U) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL))) 52 | 53 | #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) ||\ 54 | ((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\ 55 | ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\ 56 | ((__VALUE__) == LL_GPIO_MODE_ANALOG)) 57 | 58 | #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\ 59 | ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN)) 60 | 61 | #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\ 62 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\ 63 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH) ||\ 64 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_VERY_HIGH)) 65 | 66 | #define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_NO) ||\ 67 | ((__VALUE__) == LL_GPIO_PULL_UP) ||\ 68 | ((__VALUE__) == LL_GPIO_PULL_DOWN)) 69 | 70 | #define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\ 71 | ((__VALUE__) == LL_GPIO_AF_1 ) ||\ 72 | ((__VALUE__) == LL_GPIO_AF_2 ) ||\ 73 | ((__VALUE__) == LL_GPIO_AF_3 ) ||\ 74 | ((__VALUE__) == LL_GPIO_AF_4 ) ||\ 75 | ((__VALUE__) == LL_GPIO_AF_5 ) ||\ 76 | ((__VALUE__) == LL_GPIO_AF_6 ) ||\ 77 | ((__VALUE__) == LL_GPIO_AF_7 ) ||\ 78 | ((__VALUE__) == LL_GPIO_AF_8 ) ||\ 79 | ((__VALUE__) == LL_GPIO_AF_9 ) ||\ 80 | ((__VALUE__) == LL_GPIO_AF_10 ) ||\ 81 | ((__VALUE__) == LL_GPIO_AF_11 ) ||\ 82 | ((__VALUE__) == LL_GPIO_AF_12 ) ||\ 83 | ((__VALUE__) == LL_GPIO_AF_13 ) ||\ 84 | ((__VALUE__) == LL_GPIO_AF_14 ) ||\ 85 | ((__VALUE__) == LL_GPIO_AF_15 )) 86 | /** 87 | * @} 88 | */ 89 | 90 | /* Private function prototypes -----------------------------------------------*/ 91 | 92 | /* Exported functions --------------------------------------------------------*/ 93 | /** @addtogroup GPIO_LL_Exported_Functions 94 | * @{ 95 | */ 96 | 97 | /** @addtogroup GPIO_LL_EF_Init 98 | * @{ 99 | */ 100 | 101 | /** 102 | * @brief De-initialize GPIO registers (Registers restored to their default values). 103 | * @param GPIOx GPIO Port 104 | * @retval An ErrorStatus enumeration value: 105 | * - SUCCESS: GPIO registers are de-initialized 106 | * - ERROR: Wrong GPIO Port 107 | */ 108 | ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx) 109 | { 110 | ErrorStatus status = SUCCESS; 111 | 112 | /* Check the parameters */ 113 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 114 | 115 | /* Force and Release reset on clock of GPIOx Port */ 116 | if (GPIOx == GPIOA) 117 | { 118 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOA); 119 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOA); 120 | } 121 | else if (GPIOx == GPIOB) 122 | { 123 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOB); 124 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOB); 125 | } 126 | else if (GPIOx == GPIOC) 127 | { 128 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOC); 129 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOC); 130 | } 131 | else if (GPIOx == GPIOD) 132 | { 133 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOD); 134 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOD); 135 | } 136 | else if (GPIOx == GPIOE) 137 | { 138 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOE); 139 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOE); 140 | } 141 | else if (GPIOx == GPIOF) 142 | { 143 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOF); 144 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOF); 145 | } 146 | else if (GPIOx == GPIOG) 147 | { 148 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_GPIOG); 149 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_GPIOG); 150 | } 151 | else 152 | { 153 | status = ERROR; 154 | } 155 | 156 | return (status); 157 | } 158 | 159 | /** 160 | * @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct. 161 | * @param GPIOx GPIO Port 162 | * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure 163 | * that contains the configuration information for the specified GPIO peripheral. 164 | * @retval An ErrorStatus enumeration value: 165 | * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content 166 | * - ERROR: Not applicable 167 | */ 168 | ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct) 169 | { 170 | uint32_t pinpos; 171 | uint32_t currentpin; 172 | 173 | /* Check the parameters */ 174 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 175 | assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin)); 176 | assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode)); 177 | assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull)); 178 | 179 | /* ------------------------- Configure the port pins ---------------- */ 180 | /* Initialize pinpos on first pin set */ 181 | pinpos = POSITION_VAL(GPIO_InitStruct->Pin); 182 | 183 | /* Configure the port pins */ 184 | while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U) 185 | { 186 | /* Get current io position */ 187 | currentpin = (GPIO_InitStruct->Pin) & (0x00000001UL << pinpos); 188 | 189 | if (currentpin != 0x00u) 190 | { 191 | if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) 192 | { 193 | /* Check Speed mode parameters */ 194 | assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed)); 195 | 196 | /* Speed mode configuration */ 197 | LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed); 198 | 199 | /* Check Output mode parameters */ 200 | assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType)); 201 | 202 | /* Output mode configuration*/ 203 | LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType); 204 | } 205 | 206 | /* Pull-up Pull down resistor configuration*/ 207 | LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull); 208 | 209 | if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE) 210 | { 211 | /* Check Alternate parameter */ 212 | assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate)); 213 | 214 | /* Speed mode configuration */ 215 | if (currentpin < LL_GPIO_PIN_8) 216 | { 217 | LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate); 218 | } 219 | else 220 | { 221 | LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate); 222 | } 223 | } 224 | 225 | /* Pin Mode configuration */ 226 | LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode); 227 | } 228 | pinpos++; 229 | } 230 | return (SUCCESS); 231 | } 232 | 233 | /** 234 | * @brief Set each @ref LL_GPIO_InitTypeDef field to default value. 235 | * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure 236 | * whose fields will be set to default values. 237 | * @retval None 238 | */ 239 | 240 | void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct) 241 | { 242 | /* Reset GPIO init structure parameters values */ 243 | GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL; 244 | GPIO_InitStruct->Mode = LL_GPIO_MODE_ANALOG; 245 | GPIO_InitStruct->Speed = LL_GPIO_SPEED_FREQ_LOW; 246 | GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL; 247 | GPIO_InitStruct->Pull = LL_GPIO_PULL_NO; 248 | GPIO_InitStruct->Alternate = LL_GPIO_AF_0; 249 | } 250 | 251 | /** 252 | * @} 253 | */ 254 | 255 | /** 256 | * @} 257 | */ 258 | 259 | /** 260 | * @} 261 | */ 262 | 263 | #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) */ 264 | 265 | /** 266 | * @} 267 | */ 268 | 269 | #endif /* USE_FULL_LL_DRIVER */ 270 | 271 | -------------------------------------------------------------------------------- /Src/stm32g4xx_hal_dma_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g4xx_hal_dma_ex.c 4 | * @author MCD Application Team 5 | * @brief DMA Extension HAL module driver 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the DMA Extension peripheral: 8 | * + Extended features functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2019 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | @verbatim 22 | ============================================================================== 23 | ##### How to use this driver ##### 24 | ============================================================================== 25 | [..] 26 | The DMA Extension HAL driver can be used as follows: 27 | 28 | (+) Configure the DMA_MUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function. 29 | (+) Configure the DMA_MUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function. 30 | Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used 31 | to respectively enable/disable the request generator. 32 | 33 | (+) To handle the DMAMUX Interrupts, the function HAL_DMAEx_MUX_IRQHandler should be called from 34 | the DMAMUX IRQ handler i.e DMAMUX1_OVR_IRQHandler. 35 | As only one interrupt line is available for all DMAMUX channels and request generators , HAL_DMAEx_MUX_IRQHandler should be 36 | called with, as parameter, the appropriate DMA handle as many as used DMAs in the user project 37 | (exception done if a given DMA is not using the DMAMUX SYNC block neither a request generator) 38 | 39 | @endverbatim 40 | */ 41 | 42 | /* Includes ------------------------------------------------------------------*/ 43 | #include "stm32g4xx_hal.h" 44 | 45 | /** @addtogroup STM32G4xx_HAL_Driver 46 | * @{ 47 | */ 48 | 49 | /** @defgroup DMAEx DMAEx 50 | * @brief DMA Extended HAL module driver 51 | * @{ 52 | */ 53 | 54 | #ifdef HAL_DMA_MODULE_ENABLED 55 | 56 | /* Private typedef -----------------------------------------------------------*/ 57 | /* Private define ------------------------------------------------------------*/ 58 | /* Private macro -------------------------------------------------------------*/ 59 | /* Private variables ---------------------------------------------------------*/ 60 | /* Private Constants ---------------------------------------------------------*/ 61 | /* Private function prototypes -----------------------------------------------*/ 62 | /* Private functions ---------------------------------------------------------*/ 63 | 64 | 65 | /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions 66 | * @{ 67 | */ 68 | 69 | /** @defgroup DMAEx_Exported_Functions_Group1 DMAEx Extended features functions 70 | * @brief Extended features functions 71 | * 72 | @verbatim 73 | =============================================================================== 74 | ##### Extended features functions ##### 75 | =============================================================================== 76 | [..] This section provides functions allowing to: 77 | 78 | (+) Configure the DMAMUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function. 79 | (+) Configure the DMAMUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function. 80 | Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used 81 | to respectively enable/disable the request generator. 82 | 83 | @endverbatim 84 | * @{ 85 | */ 86 | 87 | 88 | /** 89 | * @brief Configure the DMAMUX synchronization parameters for a given DMA channel (instance). 90 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains 91 | * the configuration information for the specified DMA channel. 92 | * @param pSyncConfig : pointer to HAL_DMA_MuxSyncConfigTypeDef : contains the DMAMUX synchronization parameters 93 | * @retval HAL status 94 | */ 95 | HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig) 96 | { 97 | /* Check the parameters */ 98 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); 99 | 100 | assert_param(IS_DMAMUX_SYNC_SIGNAL_ID(pSyncConfig->SyncSignalID)); 101 | 102 | assert_param(IS_DMAMUX_SYNC_POLARITY(pSyncConfig-> SyncPolarity)); 103 | assert_param(IS_DMAMUX_SYNC_STATE(pSyncConfig->SyncEnable)); 104 | assert_param(IS_DMAMUX_SYNC_EVENT(pSyncConfig->EventEnable)); 105 | assert_param(IS_DMAMUX_SYNC_REQUEST_NUMBER(pSyncConfig->RequestNumber)); 106 | 107 | /*Check if the DMA state is ready */ 108 | if (hdma->State == HAL_DMA_STATE_READY) 109 | { 110 | /* Process Locked */ 111 | __HAL_LOCK(hdma); 112 | 113 | /* Set the new synchronization parameters (and keep the request ID filled during the Init)*/ 114 | MODIFY_REG(hdma->DMAmuxChannel->CCR, \ 115 | (~DMAMUX_CxCR_DMAREQ_ID), \ 116 | ((pSyncConfig->SyncSignalID) << DMAMUX_CxCR_SYNC_ID_Pos) | ((pSyncConfig->RequestNumber - 1U) << DMAMUX_CxCR_NBREQ_Pos) | \ 117 | pSyncConfig->SyncPolarity | ((uint32_t)pSyncConfig->SyncEnable << DMAMUX_CxCR_SE_Pos) | \ 118 | ((uint32_t)pSyncConfig->EventEnable << DMAMUX_CxCR_EGE_Pos)); 119 | 120 | /* Process UnLocked */ 121 | __HAL_UNLOCK(hdma); 122 | 123 | return HAL_OK; 124 | } 125 | else 126 | { 127 | /*DMA State not Ready*/ 128 | return HAL_ERROR; 129 | } 130 | } 131 | 132 | /** 133 | * @brief Configure the DMAMUX request generator block used by the given DMA channel (instance). 134 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains 135 | * the configuration information for the specified DMA channel. 136 | * @param pRequestGeneratorConfig : pointer to HAL_DMA_MuxRequestGeneratorConfigTypeDef : 137 | * contains the request generator parameters. 138 | * 139 | * @retval HAL status 140 | */ 141 | HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma, 142 | HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig) 143 | { 144 | /* Check the parameters */ 145 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); 146 | 147 | assert_param(IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(pRequestGeneratorConfig->SignalID)); 148 | 149 | assert_param(IS_DMAMUX_REQUEST_GEN_POLARITY(pRequestGeneratorConfig->Polarity)); 150 | assert_param(IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(pRequestGeneratorConfig->RequestNumber)); 151 | 152 | /* check if the DMA state is ready 153 | and DMA is using a DMAMUX request generator block 154 | */ 155 | if ((hdma->State == HAL_DMA_STATE_READY) && (hdma->DMAmuxRequestGen != 0U)) 156 | { 157 | /* Process Locked */ 158 | __HAL_LOCK(hdma); 159 | 160 | /* Set the request generator new parameters */ 161 | hdma->DMAmuxRequestGen->RGCR = pRequestGeneratorConfig->SignalID | \ 162 | ((pRequestGeneratorConfig->RequestNumber - 1U) << (POSITION_VAL(DMAMUX_RGxCR_GNBREQ) & 0x1FU)) | \ 163 | pRequestGeneratorConfig->Polarity; 164 | /* Process UnLocked */ 165 | __HAL_UNLOCK(hdma); 166 | 167 | return HAL_OK; 168 | } 169 | else 170 | { 171 | return HAL_ERROR; 172 | } 173 | } 174 | 175 | /** 176 | * @brief Enable the DMAMUX request generator block used by the given DMA channel (instance). 177 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains 178 | * the configuration information for the specified DMA channel. 179 | * @retval HAL status 180 | */ 181 | HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator(DMA_HandleTypeDef *hdma) 182 | { 183 | /* Check the parameters */ 184 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); 185 | 186 | /* check if the DMA state is ready 187 | and DMA is using a DMAMUX request generator block 188 | */ 189 | if ((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0)) 190 | { 191 | 192 | /* Enable the request generator*/ 193 | hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_GE; 194 | 195 | return HAL_OK; 196 | } 197 | else 198 | { 199 | return HAL_ERROR; 200 | } 201 | } 202 | 203 | /** 204 | * @brief Disable the DMAMUX request generator block used by the given DMA channel (instance). 205 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains 206 | * the configuration information for the specified DMA channel. 207 | * @retval HAL status 208 | */ 209 | HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator(DMA_HandleTypeDef *hdma) 210 | { 211 | /* Check the parameters */ 212 | assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); 213 | 214 | /* check if the DMA state is ready 215 | and DMA is using a DMAMUX request generator block 216 | */ 217 | if ((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0)) 218 | { 219 | 220 | /* Disable the request generator*/ 221 | hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_GE; 222 | 223 | return HAL_OK; 224 | } 225 | else 226 | { 227 | return HAL_ERROR; 228 | } 229 | } 230 | 231 | /** 232 | * @brief Handles DMAMUX interrupt request. 233 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains 234 | * the configuration information for the specified DMA channel. 235 | * @retval None 236 | */ 237 | void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma) 238 | { 239 | /* Check for DMAMUX Synchronization overrun */ 240 | if ((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U) 241 | { 242 | /* Disable the synchro overrun interrupt */ 243 | hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; 244 | 245 | /* Clear the DMAMUX synchro overrun flag */ 246 | hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; 247 | 248 | /* Update error code */ 249 | hdma->ErrorCode |= HAL_DMA_ERROR_SYNC; 250 | 251 | if (hdma->XferErrorCallback != NULL) 252 | { 253 | /* Transfer error callback */ 254 | hdma->XferErrorCallback(hdma); 255 | } 256 | } 257 | 258 | if (hdma->DMAmuxRequestGen != 0) 259 | { 260 | /* if using a DMAMUX request generator block Check for DMAMUX request generator overrun */ 261 | if ((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U) 262 | { 263 | /* Disable the request gen overrun interrupt */ 264 | hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; 265 | 266 | /* Clear the DMAMUX request generator overrun flag */ 267 | hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; 268 | 269 | /* Update error code */ 270 | hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN; 271 | 272 | if (hdma->XferErrorCallback != NULL) 273 | { 274 | /* Transfer error callback */ 275 | hdma->XferErrorCallback(hdma); 276 | } 277 | } 278 | } 279 | } 280 | 281 | /** 282 | * @} 283 | */ 284 | 285 | /** 286 | * @} 287 | */ 288 | 289 | #endif /* HAL_DMA_MODULE_ENABLED */ 290 | 291 | /** 292 | * @} 293 | */ 294 | 295 | /** 296 | * @} 297 | */ 298 | 299 | --------------------------------------------------------------------------------