├── .github ├── ISSUE_TEMPLATE.md └── PULL_REQUEST_TEMPLATE.md ├── CODE_OF_CONDUCT.md ├── CONTRIBUTING.md ├── Inc ├── Legacy │ └── stm32_hal_legacy.h ├── stm32_assert_template.h ├── stm32u5xx_hal.h ├── stm32u5xx_hal_adc.h ├── stm32u5xx_hal_adc_ex.h ├── stm32u5xx_hal_comp.h ├── stm32u5xx_hal_conf_template.h ├── stm32u5xx_hal_cordic.h ├── stm32u5xx_hal_cortex.h ├── stm32u5xx_hal_crc.h ├── stm32u5xx_hal_crc_ex.h ├── stm32u5xx_hal_cryp.h ├── stm32u5xx_hal_cryp_ex.h ├── stm32u5xx_hal_dac.h ├── stm32u5xx_hal_dac_ex.h ├── stm32u5xx_hal_dcache.h ├── stm32u5xx_hal_dcmi.h ├── stm32u5xx_hal_def.h ├── stm32u5xx_hal_dma.h ├── stm32u5xx_hal_dma2d.h ├── stm32u5xx_hal_dma_ex.h ├── stm32u5xx_hal_dsi.h ├── stm32u5xx_hal_exti.h ├── stm32u5xx_hal_fdcan.h ├── stm32u5xx_hal_flash.h ├── stm32u5xx_hal_flash_ex.h ├── stm32u5xx_hal_fmac.h ├── stm32u5xx_hal_gfxmmu.h ├── stm32u5xx_hal_gfxtim.h ├── stm32u5xx_hal_gpio.h ├── stm32u5xx_hal_gpio_ex.h ├── stm32u5xx_hal_gpu2d.h ├── stm32u5xx_hal_gtzc.h ├── stm32u5xx_hal_hash.h ├── stm32u5xx_hal_hash_ex.h ├── stm32u5xx_hal_hcd.h ├── stm32u5xx_hal_i2c.h ├── stm32u5xx_hal_i2c_ex.h ├── stm32u5xx_hal_icache.h ├── stm32u5xx_hal_irda.h ├── stm32u5xx_hal_irda_ex.h ├── stm32u5xx_hal_iwdg.h ├── stm32u5xx_hal_jpeg.h ├── stm32u5xx_hal_lptim.h ├── stm32u5xx_hal_ltdc.h ├── stm32u5xx_hal_ltdc_ex.h ├── stm32u5xx_hal_mdf.h ├── stm32u5xx_hal_mmc.h ├── stm32u5xx_hal_mmc_ex.h ├── stm32u5xx_hal_nand.h ├── stm32u5xx_hal_nor.h ├── stm32u5xx_hal_opamp.h ├── stm32u5xx_hal_opamp_ex.h ├── stm32u5xx_hal_ospi.h ├── stm32u5xx_hal_otfdec.h ├── stm32u5xx_hal_pcd.h ├── stm32u5xx_hal_pcd_ex.h ├── stm32u5xx_hal_pka.h ├── stm32u5xx_hal_pssi.h ├── stm32u5xx_hal_pwr.h ├── stm32u5xx_hal_pwr_ex.h ├── stm32u5xx_hal_ramcfg.h ├── stm32u5xx_hal_rcc.h ├── stm32u5xx_hal_rcc_ex.h ├── stm32u5xx_hal_rng.h ├── stm32u5xx_hal_rng_ex.h ├── stm32u5xx_hal_rtc.h ├── stm32u5xx_hal_rtc_ex.h ├── stm32u5xx_hal_sai.h ├── stm32u5xx_hal_sai_ex.h ├── stm32u5xx_hal_sd.h ├── stm32u5xx_hal_sd_ex.h ├── stm32u5xx_hal_sdio.h ├── stm32u5xx_hal_smartcard.h ├── stm32u5xx_hal_smartcard_ex.h ├── stm32u5xx_hal_smbus.h ├── stm32u5xx_hal_smbus_ex.h ├── stm32u5xx_hal_spi.h ├── stm32u5xx_hal_spi_ex.h ├── stm32u5xx_hal_sram.h ├── stm32u5xx_hal_tim.h ├── stm32u5xx_hal_tim_ex.h ├── stm32u5xx_hal_tsc.h ├── stm32u5xx_hal_uart.h ├── stm32u5xx_hal_uart_ex.h ├── stm32u5xx_hal_usart.h ├── stm32u5xx_hal_usart_ex.h ├── stm32u5xx_hal_wwdg.h ├── stm32u5xx_hal_xspi.h ├── stm32u5xx_ll_adc.h ├── stm32u5xx_ll_bus.h ├── stm32u5xx_ll_comp.h ├── stm32u5xx_ll_cordic.h ├── stm32u5xx_ll_cortex.h ├── stm32u5xx_ll_crc.h ├── stm32u5xx_ll_crs.h ├── stm32u5xx_ll_dac.h ├── stm32u5xx_ll_dcache.h ├── stm32u5xx_ll_dlyb.h ├── stm32u5xx_ll_dma.h ├── stm32u5xx_ll_dma2d.h ├── stm32u5xx_ll_exti.h ├── stm32u5xx_ll_fmac.h ├── stm32u5xx_ll_fmc.h ├── stm32u5xx_ll_gpio.h ├── stm32u5xx_ll_i2c.h ├── stm32u5xx_ll_icache.h ├── stm32u5xx_ll_iwdg.h ├── stm32u5xx_ll_lpgpio.h ├── stm32u5xx_ll_lptim.h ├── stm32u5xx_ll_lpuart.h ├── stm32u5xx_ll_opamp.h ├── stm32u5xx_ll_pka.h ├── stm32u5xx_ll_pwr.h ├── stm32u5xx_ll_rcc.h ├── stm32u5xx_ll_rng.h ├── stm32u5xx_ll_rtc.h ├── stm32u5xx_ll_sdmmc.h ├── stm32u5xx_ll_spi.h ├── stm32u5xx_ll_system.h ├── stm32u5xx_ll_tim.h ├── stm32u5xx_ll_ucpd.h ├── stm32u5xx_ll_usart.h ├── stm32u5xx_ll_usb.h ├── stm32u5xx_ll_utils.h └── stm32u5xx_ll_wwdg.h ├── LICENSE.md ├── README.md ├── Release_Notes.html ├── SECURITY.md ├── Src ├── stm32u5xx_hal.c ├── stm32u5xx_hal_adc.c ├── stm32u5xx_hal_adc_ex.c ├── stm32u5xx_hal_comp.c ├── stm32u5xx_hal_cordic.c ├── stm32u5xx_hal_cortex.c ├── stm32u5xx_hal_crc.c ├── stm32u5xx_hal_crc_ex.c ├── stm32u5xx_hal_cryp.c ├── stm32u5xx_hal_cryp_ex.c ├── stm32u5xx_hal_dac.c ├── stm32u5xx_hal_dac_ex.c ├── stm32u5xx_hal_dcache.c ├── stm32u5xx_hal_dcmi.c ├── stm32u5xx_hal_dma.c ├── stm32u5xx_hal_dma2d.c ├── stm32u5xx_hal_dma_ex.c ├── stm32u5xx_hal_dsi.c ├── stm32u5xx_hal_exti.c ├── stm32u5xx_hal_fdcan.c ├── stm32u5xx_hal_flash.c ├── stm32u5xx_hal_flash_ex.c ├── stm32u5xx_hal_fmac.c ├── stm32u5xx_hal_gfxmmu.c ├── stm32u5xx_hal_gfxtim.c ├── stm32u5xx_hal_gpio.c ├── stm32u5xx_hal_gpu2d.c ├── stm32u5xx_hal_gtzc.c ├── stm32u5xx_hal_hash.c ├── stm32u5xx_hal_hash_ex.c ├── stm32u5xx_hal_hcd.c ├── stm32u5xx_hal_i2c.c ├── stm32u5xx_hal_i2c_ex.c ├── stm32u5xx_hal_icache.c ├── stm32u5xx_hal_irda.c ├── stm32u5xx_hal_iwdg.c ├── stm32u5xx_hal_jpeg.c ├── stm32u5xx_hal_lptim.c ├── stm32u5xx_hal_ltdc.c ├── stm32u5xx_hal_ltdc_ex.c ├── stm32u5xx_hal_mdf.c ├── stm32u5xx_hal_mmc.c ├── stm32u5xx_hal_mmc_ex.c ├── stm32u5xx_hal_msp_template.c ├── stm32u5xx_hal_nand.c ├── stm32u5xx_hal_nor.c ├── stm32u5xx_hal_opamp.c ├── stm32u5xx_hal_opamp_ex.c ├── stm32u5xx_hal_ospi.c ├── stm32u5xx_hal_otfdec.c ├── stm32u5xx_hal_pcd.c ├── stm32u5xx_hal_pcd_ex.c ├── stm32u5xx_hal_pka.c ├── stm32u5xx_hal_pssi.c ├── stm32u5xx_hal_pwr.c ├── stm32u5xx_hal_pwr_ex.c ├── stm32u5xx_hal_ramcfg.c ├── stm32u5xx_hal_rcc.c ├── stm32u5xx_hal_rcc_ex.c ├── stm32u5xx_hal_rng.c ├── stm32u5xx_hal_rng_ex.c ├── stm32u5xx_hal_rtc.c ├── stm32u5xx_hal_rtc_ex.c ├── stm32u5xx_hal_sai.c ├── stm32u5xx_hal_sai_ex.c ├── stm32u5xx_hal_sd.c ├── stm32u5xx_hal_sd_ex.c ├── stm32u5xx_hal_sdio.c ├── stm32u5xx_hal_smartcard.c ├── stm32u5xx_hal_smartcard_ex.c ├── stm32u5xx_hal_smbus.c ├── stm32u5xx_hal_smbus_ex.c ├── stm32u5xx_hal_spi.c ├── stm32u5xx_hal_spi_ex.c ├── stm32u5xx_hal_sram.c ├── stm32u5xx_hal_tim.c ├── stm32u5xx_hal_tim_ex.c ├── stm32u5xx_hal_timebase_rtc_alarm_template.c ├── stm32u5xx_hal_timebase_rtc_wakeup_template.c ├── stm32u5xx_hal_timebase_tim_template.c ├── stm32u5xx_hal_tsc.c ├── stm32u5xx_hal_uart.c ├── stm32u5xx_hal_uart_ex.c ├── stm32u5xx_hal_usart.c ├── stm32u5xx_hal_usart_ex.c ├── stm32u5xx_hal_wwdg.c ├── stm32u5xx_hal_xspi.c ├── stm32u5xx_ll_adc.c ├── stm32u5xx_ll_comp.c ├── stm32u5xx_ll_cordic.c ├── stm32u5xx_ll_crc.c ├── stm32u5xx_ll_crs.c ├── stm32u5xx_ll_dac.c ├── stm32u5xx_ll_dlyb.c ├── stm32u5xx_ll_dma.c ├── stm32u5xx_ll_dma2d.c ├── stm32u5xx_ll_exti.c ├── stm32u5xx_ll_fmac.c ├── stm32u5xx_ll_fmc.c ├── stm32u5xx_ll_gpio.c ├── stm32u5xx_ll_i2c.c ├── stm32u5xx_ll_icache.c ├── stm32u5xx_ll_lpgpio.c ├── stm32u5xx_ll_lptim.c ├── stm32u5xx_ll_lpuart.c ├── stm32u5xx_ll_opamp.c ├── stm32u5xx_ll_pka.c ├── stm32u5xx_ll_pwr.c ├── stm32u5xx_ll_rcc.c ├── stm32u5xx_ll_rng.c ├── stm32u5xx_ll_rtc.c ├── stm32u5xx_ll_sdmmc.c ├── stm32u5xx_ll_spi.c ├── stm32u5xx_ll_tim.c ├── stm32u5xx_ll_ucpd.c ├── stm32u5xx_ll_usart.c ├── stm32u5xx_ll_usb.c └── stm32u5xx_ll_utils.c └── _htmresc ├── favicon.png ├── mini-st_2020.css └── st_logo_2020.png /.github/ISSUE_TEMPLATE.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: 'Issue report' 3 | about: 'Create a report to help us improve the quality of our software' 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | --- 8 | 9 | **Caution** 10 | 11 | The Issues are strictly limited for the reporting of problem encountered with the software provided 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Please use the latest commit version. 36 | * Please, submit one pull-request per new feature or proposal. This will ease the analysis and the final merge if accepted. 37 | 38 | ## 3. Support requests and questions 39 | 40 | For support requests or any other question related to the product, the tools, the environment, you can submit a post to the **ST Community** on the appropriate topic [page](https://community.st.com/s/topiccatalog). 41 | -------------------------------------------------------------------------------- /Inc/stm32_assert_template.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32_assert.h 4 | * @author MCD Application Team 5 | * @brief STM32 assert template file. 6 | * This file should be copied to the application folder and renamed 7 | * to stm32_assert.h. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * Copyright (c) 2021 STMicroelectronics. 12 | * All rights reserved. 13 | * 14 | * This software is licensed under terms that can be found in the LICENSE file 15 | * in the root directory of this software component. 16 | * If no LICENSE file comes with this software, it is provided AS-IS. 17 | * 18 | ****************************************************************************** 19 | */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef __STM32_ASSERT_H 23 | #define __STM32_ASSERT_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Exported types ------------------------------------------------------------*/ 30 | /* Exported constants --------------------------------------------------------*/ 31 | /* Includes ------------------------------------------------------------------*/ 32 | /* Exported macro ------------------------------------------------------------*/ 33 | #ifdef USE_FULL_ASSERT 34 | /** 35 | * @brief The assert_param macro is used for function's parameters check. 36 | * @param expr If expr is false, it calls assert_failed function 37 | * which reports the name of the source file and the source 38 | * line number of the call that failed. 39 | * If expr is true, it returns no value. 40 | * @retval None 41 | */ 42 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) 43 | /* Exported functions ------------------------------------------------------- */ 44 | void assert_failed(uint8_t *file, uint32_t line); 45 | #else 46 | #define assert_param(expr) ((void)0U) 47 | #endif /* USE_FULL_ASSERT */ 48 | 49 | #ifdef __cplusplus 50 | } 51 | #endif 52 | 53 | #endif /* __STM32_ASSERT_H */ 54 | 55 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_crc_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_crc_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC HAL extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_HAL_CRC_EX_H 21 | #define STM32U5xx_HAL_CRC_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32u5xx_hal_def.h" 29 | 30 | /** @addtogroup STM32U5xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup CRCEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /** @defgroup CRCEx_Exported_Constants CRC Extended Exported Constants 41 | * @{ 42 | */ 43 | 44 | /** @defgroup CRCEx_Input_Data_Inversion Input Data Inversion Modes 45 | * @{ 46 | */ 47 | #define CRC_INPUTDATA_INVERSION_NONE 0x00000000U /*!< No input data inversion */ 48 | #define CRC_INPUTDATA_INVERSION_BYTE CRC_CR_REV_IN_0 /*!< Byte-wise input data inversion */ 49 | #define CRC_INPUTDATA_INVERSION_HALFWORD CRC_CR_REV_IN_1 /*!< HalfWord-wise input data inversion */ 50 | #define CRC_INPUTDATA_INVERSION_WORD CRC_CR_REV_IN /*!< Word-wise input data inversion */ 51 | /** 52 | * @} 53 | */ 54 | 55 | /** @defgroup CRCEx_Output_Data_Inversion Output Data Inversion Modes 56 | * @{ 57 | */ 58 | #define CRC_OUTPUTDATA_INVERSION_DISABLE 0x00000000U /*!< No output data inversion */ 59 | #define CRC_OUTPUTDATA_INVERSION_ENABLE CRC_CR_REV_OUT /*!< Bit-wise output data inversion */ 60 | /** 61 | * @} 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /* Exported macro ------------------------------------------------------------*/ 69 | /** @defgroup CRCEx_Exported_Macros CRC Extended Exported Macros 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief Set CRC output reversal 75 | * @param __HANDLE__ CRC handle 76 | * @retval None 77 | */ 78 | #define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT) 79 | 80 | /** 81 | * @brief Unset CRC output reversal 82 | * @param __HANDLE__ CRC handle 83 | * @retval None 84 | */ 85 | #define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT)) 86 | 87 | /** 88 | * @brief Set CRC non-default polynomial 89 | * @param __HANDLE__ CRC handle 90 | * @param __POLYNOMIAL__ 7, 8, 16 or 32-bit polynomial 91 | * @retval None 92 | */ 93 | #define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__)) 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /* Private macros --------------------------------------------------------*/ 100 | /** @defgroup CRCEx_Private_Macros CRC Extended Private Macros 101 | * @{ 102 | */ 103 | 104 | #define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \ 105 | ((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \ 106 | ((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \ 107 | ((MODE) == CRC_INPUTDATA_INVERSION_WORD)) 108 | 109 | #define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \ 110 | ((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLE)) 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /* Exported functions --------------------------------------------------------*/ 117 | 118 | /** @addtogroup CRCEx_Exported_Functions 119 | * @{ 120 | */ 121 | 122 | /** @addtogroup CRCEx_Exported_Functions_Group1 123 | * @{ 124 | */ 125 | /* Initialization and de-initialization functions ****************************/ 126 | HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength); 127 | HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode); 128 | HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode); 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | /** 135 | * @} 136 | */ 137 | 138 | /** 139 | * @} 140 | */ 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | #ifdef __cplusplus 147 | } 148 | #endif 149 | 150 | #endif /* STM32U5xx_HAL_CRC_EX_H */ 151 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_cryp_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_cryp_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRYPEx HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_HAL_CRYP_EX_H 21 | #define STM32U5xx_HAL_CRYP_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32u5xx_hal_def.h" 29 | 30 | /** @addtogroup STM32U5xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined(AES) 35 | 36 | /** @defgroup CRYPEx CRYPEx 37 | * @brief CRYP Extension HAL module driver. 38 | * @{ 39 | */ 40 | 41 | /* Exported types ------------------------------------------------------------*/ 42 | /** @defgroup CRYPEx_Exported_Types CRYPEx Exported Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | /* Exported constants --------------------------------------------------------*/ 50 | /** @defgroup CRYPEx_Exported_Constants CRYPEx Constants 51 | * @{ 52 | */ 53 | 54 | /** 55 | * @} 56 | */ 57 | /* Private types -------------------------------------------------------------*/ 58 | /** @defgroup CRYPEx_Private_Types CRYPEx Private Types 59 | * @{ 60 | */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /* Private variables ---------------------------------------------------------*/ 67 | /** @defgroup CRYPEx_Private_Variables CRYPEx Private Variables 68 | * @{ 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /* Private constants ---------------------------------------------------------*/ 76 | /** @defgroup CRYPEx_Private_Constants CRYPEx Private Constants 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @} 82 | */ 83 | 84 | /* Private macros ------------------------------------------------------------*/ 85 | /** @defgroup CRYPEx_Private_Macros CRYPEx Private Macros 86 | * @{ 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /* Private functions ---------------------------------------------------------*/ 94 | /** @defgroup CRYPEx_Private_Functions CRYPEx Private Functions 95 | * @{ 96 | */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /* Exported functions --------------------------------------------------------*/ 103 | /** @defgroup CRYPEx_Exported_Functions CRYPEx Exported Functions 104 | * @{ 105 | */ 106 | 107 | /** @addtogroup CRYPEx_Exported_Functions_Group1 Extended AES processing functions 108 | * @{ 109 | */ 110 | HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, const uint32_t *pAuthTag, 111 | uint32_t Timeout); 112 | HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, const uint32_t *pAuthTag, 113 | uint32_t Timeout); 114 | /** 115 | * @} 116 | */ 117 | 118 | /** @addtogroup CRYPEx_Exported_Functions_Group2 Wrap and Unwrap key functions 119 | * @{ 120 | */ 121 | HAL_StatusTypeDef HAL_CRYPEx_UnwrapKey(CRYP_HandleTypeDef *hcryp, uint32_t *pInput, uint32_t Timeout); 122 | HAL_StatusTypeDef HAL_CRYPEx_WrapKey(CRYP_HandleTypeDef *hcryp, uint32_t *pInput, uint32_t *pOutput, uint32_t Timeout); 123 | /** 124 | * @} 125 | */ 126 | 127 | /** @addtogroup CRYPEx_Exported_Functions_Group3 Encrypt and Decrypt Shared key functions 128 | * @{ 129 | */ 130 | HAL_StatusTypeDef HAL_CRYPEx_EncryptSharedKey(CRYP_HandleTypeDef *hcryp, uint32_t *pKey, uint32_t *pOutput, uint32_t ID, 131 | uint32_t Timeout); 132 | HAL_StatusTypeDef HAL_CRYPEx_DecryptSharedKey(CRYP_HandleTypeDef *hcryp, uint32_t *pKey, uint32_t ID, uint32_t Timeout); 133 | /** 134 | * @} 135 | */ 136 | 137 | /** 138 | * @} 139 | */ 140 | 141 | /** 142 | * @} 143 | */ 144 | #endif /* AES */ 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | #ifdef __cplusplus 151 | } 152 | #endif 153 | 154 | #endif /* STM32U5xx_HAL_CRYP_EX_H */ 155 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_def.h 4 | * @author MCD Application Team 5 | * @brief This file contains HAL common defines, enumeration, macros and 6 | * structures definitions. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2021 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32U5xx_HAL_DEF 22 | #define __STM32U5xx_HAL_DEF 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 30 | #include 31 | #endif /* __ARM_FEATURE_CMSE */ 32 | 33 | #include "stm32u5xx.h" 34 | #include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */ 35 | #include 36 | #include 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | 40 | /** 41 | * @brief HAL Status structures definition 42 | */ 43 | typedef enum 44 | { 45 | HAL_OK = 0x00, 46 | HAL_ERROR = 0x01, 47 | HAL_BUSY = 0x02, 48 | HAL_TIMEOUT = 0x03 49 | } HAL_StatusTypeDef; 50 | 51 | /** 52 | * @brief HAL Lock structures definition 53 | */ 54 | typedef enum 55 | { 56 | HAL_UNLOCKED = 0x00, 57 | HAL_LOCKED = 0x01 58 | } HAL_LockTypeDef; 59 | 60 | /* Exported macros -----------------------------------------------------------*/ 61 | 62 | #define HAL_MAX_DELAY 0xFFFFFFFFU 63 | 64 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) 65 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) 66 | 67 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ 68 | do{ \ 69 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ 70 | (__DMA_HANDLE__).Parent = (__HANDLE__); \ 71 | } while(0) 72 | 73 | #if !defined(UNUSED) 74 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ 75 | #endif /* UNUSED */ 76 | 77 | /** @brief Reset the Handle's State field. 78 | * @param __HANDLE__: specifies the Peripheral Handle. 79 | * @note This macro can be used for the following purpose: 80 | * - When the Handle is declared as local variable; before passing it as parameter 81 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 82 | * to set to 0 the Handle's "State" field. 83 | * Otherwise, "State" field may have any random value and the first time the function 84 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 85 | * (i.e. HAL_PPP_MspInit() will not be executed). 86 | * - When there is a need to reconfigure the low level hardware: instead of calling 87 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 88 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function 89 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 90 | * @retval None 91 | */ 92 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0) 93 | 94 | #if (USE_RTOS == 1) 95 | /* Reserved for future use */ 96 | #error " USE_RTOS should be 0 in the current HAL release " 97 | #else 98 | #define __HAL_LOCK(__HANDLE__) \ 99 | do{ \ 100 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 101 | { \ 102 | return HAL_BUSY; \ 103 | } \ 104 | else \ 105 | { \ 106 | (__HANDLE__)->Lock = HAL_LOCKED; \ 107 | } \ 108 | }while (0) 109 | 110 | #define __HAL_UNLOCK(__HANDLE__) \ 111 | do{ \ 112 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 113 | }while (0) 114 | #endif /* USE_RTOS */ 115 | 116 | #if defined ( __GNUC__ ) 117 | #ifndef __weak 118 | #define __weak __attribute__((weak)) 119 | #endif /* __weak */ 120 | #ifndef __packed 121 | #define __packed __attribute__((__packed__)) 122 | #endif /* __packed */ 123 | #endif /* __GNUC__ */ 124 | 125 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 126 | #ifndef __weak 127 | #define __weak __attribute__((weak)) 128 | #endif /* __weak */ 129 | #ifndef __packed 130 | #define __packed __attribute__((packed)) 131 | #endif /* __packed */ 132 | #endif /* __ARMCC_VERSION */ 133 | 134 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used 135 | instead */ 136 | #if defined (__GNUC__) /* GNU Compiler */ 137 | #ifndef __ALIGN_END 138 | #define __ALIGN_END __attribute__ ((aligned (4))) 139 | #endif /* __ALIGN_END */ 140 | #ifndef __ALIGN_BEGIN 141 | #define __ALIGN_BEGIN 142 | #endif /* __ALIGN_BEGIN */ 143 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 144 | #ifndef __ALIGN_END 145 | #define __ALIGN_END __ALIGNED(4) 146 | #endif /* __ALIGN_END */ 147 | #ifndef __ALIGN_BEGIN 148 | #define __ALIGN_BEGIN 149 | #endif /* __ALIGN_BEGIN */ 150 | #else 151 | #ifndef __ALIGN_END 152 | #define __ALIGN_END 153 | #endif /* __ALIGN_END */ 154 | #ifndef __ALIGN_BEGIN 155 | #if defined (__CC_ARM) /* ARM Compiler */ 156 | #define __ALIGN_BEGIN __align(4) 157 | #elif defined (__ICCARM__) /* IAR Compiler */ 158 | #define __ALIGN_BEGIN 159 | #endif /* __CC_ARM */ 160 | #endif /* __ALIGN_BEGIN */ 161 | #endif /* __GNUC__ */ 162 | 163 | /* Macro to get variable aligned on 32-bytes,needed for cache maintenance purpose */ 164 | #if defined (__GNUC__) /* GNU Compiler */ 165 | #define ALIGN_32BYTES(buf) buf __attribute__ ((aligned (32))) 166 | #elif defined (__ICCARM__) /* IAR Compiler */ 167 | #define ALIGN_32BYTES(buf) _Pragma("data_alignment=32") buf 168 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 169 | #define ALIGN_32BYTES(buf) __ALIGNED(32) buf 170 | #elif defined (__CC_ARM) /* ARM Compiler */ 171 | #define ALIGN_32BYTES(buf) __align(32) buf 172 | #endif /* __GNUC__ */ 173 | 174 | /** 175 | * @brief __RAM_FUNC definition 176 | */ 177 | #if defined ( __CC_ARM ) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) 178 | 179 | /* ARM Compiler 180 | ------------ 181 | RAM functions are defined using the toolchain options. 182 | Functions that are executed in RAM should reside in a separate source module. 183 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 184 | area of a module to a memory space in physical RAM. 185 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 186 | dialog. 187 | */ 188 | #define __RAM_FUNC HAL_StatusTypeDef 189 | 190 | #elif defined ( __ICCARM__ ) 191 | /* ICCARM Compiler 192 | --------------- 193 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 194 | */ 195 | #define __RAM_FUNC __ramfunc HAL_StatusTypeDef 196 | 197 | #elif defined ( __GNUC__ ) 198 | /* GNU Compiler 199 | ------------ 200 | RAM functions are defined using a specific toolchain attribute 201 | "__attribute__((section(".RamFunc")))". 202 | */ 203 | #define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc"))) 204 | 205 | #endif /* __RAM_FUNC */ 206 | 207 | /** 208 | * @brief __NOINLINE definition 209 | */ 210 | #if defined ( __CC_ARM ) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ ) 211 | /* ARM & GNUCompiler 212 | ---------------- 213 | */ 214 | #define __NOINLINE __attribute__ ( (noinline) ) 215 | 216 | #elif defined ( __ICCARM__ ) 217 | /* ICCARM Compiler 218 | --------------- 219 | */ 220 | #define __NOINLINE _Pragma("optimize = no_inline") 221 | 222 | #endif /* __NOINLINE */ 223 | 224 | 225 | #ifdef __cplusplus 226 | } 227 | #endif 228 | 229 | #endif /* ___STM32U5xx_HAL_DEF */ 230 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_flash_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_flash_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of FLASH HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_HAL_FLASH_EX_H 21 | #define STM32U5xx_HAL_FLASH_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32u5xx_hal_def.h" 29 | 30 | /** @addtogroup STM32U5xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup FLASHEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @addtogroup FLASHEx_Exported_Types FLASHEx Exported Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @brief FLASHEx Block-based attributes structure definition 45 | */ 46 | 47 | typedef struct 48 | { 49 | uint32_t Bank; /*!< Selection of the associated bank of Block-based Area. 50 | This parameter must be a value of @ref FLASH_Banks */ 51 | uint32_t BBAttributesType; /*!< Block-Based Attributes type. This parameter must 52 | be a value of @ref FLASH_BB_Attributes */ 53 | uint32_t BBAttributes_array[FLASH_BLOCKBASED_NB_REG]; /*!< Each bit specifies the block-based attribute configuration 54 | of a page: 0 means page non-protected, 1 means page 55 | protected. Protection (secure or privilege) depends 56 | on BBAttributesType value */ 57 | } FLASH_BBAttributesTypeDef; 58 | 59 | 60 | /** 61 | * @brief FLASHEx Operation structure definition 62 | */ 63 | typedef struct 64 | { 65 | uint32_t OperationType; /*!< Flash operation Type. 66 | This parameter must be a value of @ref FLASH_Operation_Type */ 67 | uint32_t FlashArea; /*!< Flash operation memory area. 68 | This parameter must be a value of @ref FLASH_Operation_Area */ 69 | uint32_t Address; /*!< Flash operation Address offset. 70 | This parameter is given by bank, and must be a value between 0x0 and 0xFFFF0 */ 71 | } FLASH_OperationTypeDef; 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /* Exported constants --------------------------------------------------------*/ 78 | /** @addtogroup FLASHEx_Exported_Constants 79 | * @{ 80 | */ 81 | /** @defgroup PRIV_MODE_CFG FLASH privilege mode configuration 82 | * @{ 83 | */ 84 | #define FLASH_NSPRIV_GRANTED 0x00000000U /*!< access to non-secure Flash registers is granted 85 | to privileged or unprivileged access */ 86 | #define FLASH_NSPRIV_DENIED FLASH_PRIVCFGR_NSPRIV /*!< access to non-secure Flash registers is denied 87 | to non-privilege access */ 88 | #define FLASH_SPRIV_GRANTED 0x00000000U /*!< access to secure Flash registers is granted to privileged 89 | or unprivileged access */ 90 | #define FLASH_SPRIV_DENIED FLASH_PRIVCFGR_SPRIV /*!< access to secure Flash registers is denied 91 | to non-privilege access */ 92 | /** 93 | * @} 94 | */ 95 | 96 | #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 97 | /** @defgroup SEC_INVERSION_CFG FLASH security inversion configuration 98 | * @{ 99 | */ 100 | #define FLASH_INV_DISABLE 0x00000000U /*!< Security state of Flash is not inverted */ 101 | #define FLASH_INV_ENABLE FLASH_SECCR_INV /*!< Security state of Flash is inverted */ 102 | /** 103 | * @} 104 | */ 105 | #endif /* __ARM_FEATURE_CMSE */ 106 | 107 | /** @defgroup FLASH_LPM_CFG FLASH LPM configuration 108 | * @{ 109 | */ 110 | #define FLASH_LPM_DISABLE 0x00000000U /*!< Flash is in normal read mode */ 111 | #define FLASH_LPM_ENABLE FLASH_ACR_LPM /*!< Flash is in low-power read mode */ 112 | /** 113 | * @} 114 | */ 115 | 116 | /** @defgroup FLASH_BB_Attributes FLASH Block-Base Attributes 117 | * @{ 118 | */ 119 | #define FLASH_BB_SEC 0x01U /*!< Flash Block-Based Security Attributes */ 120 | #define FLASH_BB_PRIV 0x02U /*!< Flash Block-Based Privilege Attributes */ 121 | /** 122 | * @} 123 | */ 124 | 125 | /** @defgroup FLASH_Operation_Type FLASH Operation Type 126 | * @{ 127 | */ 128 | #define FLASH_OPERATION_TYPE_NONE 00000000U /*!< No Flash operation */ 129 | #define FLASH_OPERATION_TYPE_QUADWORD FLASH_OPSR_CODE_OP_0 /*!< Single write operation */ 130 | #define FLASH_OPERATION_TYPE_BURST FLASH_OPSR_CODE_OP_1 /*!< Burst write operation */ 131 | #define FLASH_OPERATION_TYPE_PAGEERASE (FLASH_OPSR_CODE_OP_1 | FLASH_OPSR_CODE_OP_0) /*!< Page erase operation */ 132 | #define FLASH_OPERATION_TYPE_BANKERASE FLASH_OPSR_CODE_OP_2 /*!< Bank erase operation */ 133 | #define FLASH_OPERATION_TYPE_MASSERASE (FLASH_OPSR_CODE_OP_2 | FLASH_OPSR_CODE_OP_0) /*!< Mass erase operation */ 134 | #define FLASH_OPERATION_TYPE_OPTIONCHANGE (FLASH_OPSR_CODE_OP_2 | FLASH_OPSR_CODE_OP_1) /*!< Option change operation */ 135 | /** 136 | * @} 137 | */ 138 | 139 | /** @defgroup FLASH_Operation_Area FLASH Operation Area 140 | * @{ 141 | */ 142 | #define FLASH_OPERATION_AREA_BANK_1 00000000U /*!< Operation in Bank 1 */ 143 | #define FLASH_OPERATION_AREA_BANK_2 FLASH_OPSR_BK_OP /*!< Operation in Bank 2 */ 144 | #define FLASH_OPERATION_AREA_SYSF FLASH_OPSR_SYSF_OP /*!< Operation in System Flash memory */ 145 | /** 146 | * @} 147 | */ 148 | 149 | /** 150 | * @} 151 | */ 152 | 153 | /* Exported macro ------------------------------------------------------------*/ 154 | 155 | /* Exported functions --------------------------------------------------------*/ 156 | /** @addtogroup FLASHEx_Exported_Functions 157 | * @{ 158 | */ 159 | 160 | /* Extended Program operation functions *************************************/ 161 | /** @addtogroup FLASHEx_Exported_Functions_Group1 162 | * @{ 163 | */ 164 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); 165 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 166 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 167 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 168 | HAL_StatusTypeDef HAL_FLASHEx_ConfigBBAttributes(FLASH_BBAttributesTypeDef *pBBAttributes); 169 | void HAL_FLASHEx_GetConfigBBAttributes(FLASH_BBAttributesTypeDef *pBBAttributes); 170 | #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 171 | void HAL_FLASHEx_EnableSecHideProtection(uint32_t Banks); 172 | #endif /* __ARM_FEATURE_CMSE */ 173 | /** 174 | * @} 175 | */ 176 | 177 | /** @addtogroup FLASHEx_Exported_Functions_Group2 178 | * @{ 179 | */ 180 | void HAL_FLASHEx_ConfigPrivMode(uint32_t PrivMode); 181 | uint32_t HAL_FLASHEx_GetPrivMode(void); 182 | #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 183 | HAL_StatusTypeDef HAL_FLASHEx_ConfigSecInversion(uint32_t SecInvState); 184 | uint32_t HAL_FLASHEx_GetSecInversion(void); 185 | #endif /* __ARM_FEATURE_CMSE */ 186 | HAL_StatusTypeDef HAL_FLASHEx_EnablePowerDown(uint32_t Banks); 187 | HAL_StatusTypeDef HAL_FLASHEx_ConfigLowPowerRead(uint32_t ConfigLPM); 188 | uint32_t HAL_FLASHEx_GetLowPowerRead(void); 189 | void HAL_FLASHEx_GetOperation(FLASH_OperationTypeDef *pFlashOperation); 190 | /** 191 | * @} 192 | */ 193 | 194 | /** 195 | * @} 196 | */ 197 | 198 | /* Private function ----------------------------------------------------------*/ 199 | /** @addtogroup FLASHEx_Private_Functions FLASHEx Private Functions 200 | * @{ 201 | */ 202 | void FLASH_PageErase(uint32_t Page, uint32_t Banks); 203 | /** 204 | * @} 205 | */ 206 | 207 | /* Private macros ------------------------------------------------------------*/ 208 | /** @defgroup FLASHEx_Private_Macros FLASH Private Macros 209 | * @{ 210 | */ 211 | #define IS_FLASH_BB_EXCLUSIVE(CFG) (((CFG) == FLASH_BB_SEC) || \ 212 | ((CFG) == FLASH_BB_PRIV)) 213 | 214 | #define IS_FLASH_CFGPRIVMODE(CFG) (((CFG) & 0xFFFFFFFCU) == 0U) 215 | 216 | #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 217 | #define IS_FLASH_CFGSECINV(CFG) (((CFG) == FLASH_INV_DISABLE) || \ 218 | ((CFG) == FLASH_INV_ENABLE)) 219 | #endif /* __ARM_FEATURE_CMSE */ 220 | 221 | #define IS_FLASH_CFGLPM(CFG) (((CFG) == FLASH_LPM_DISABLE) || \ 222 | ((CFG) == FLASH_LPM_ENABLE)) 223 | /** 224 | * @} 225 | */ 226 | 227 | /** 228 | * @} 229 | */ 230 | 231 | /** 232 | * @} 233 | */ 234 | 235 | #ifdef __cplusplus 236 | } 237 | #endif 238 | 239 | #endif /* STM32U5xx_HAL_FLASH_EX_H */ 240 | 241 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_hash_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_hash_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of HASH HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_HAL_HASH_EX_H 21 | #define STM32U5xx_HAL_HASH_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32u5xx_hal_def.h" 29 | 30 | /** @addtogroup STM32U5xx_HAL_Driver 31 | * @{ 32 | */ 33 | #if defined (HASH) 34 | /** @addtogroup HASHEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* Exported macro ------------------------------------------------------------*/ 41 | 42 | 43 | /* Exported functions --------------------------------------------------------*/ 44 | 45 | /** @addtogroup HASHEx_Exported_Functions HASH Extended Exported Functions 46 | * @{ 47 | */ 48 | 49 | /** @addtogroup HASHEx_Exported_Functions_Group1 HASH extended processing functions in polling mode 50 | * @{ 51 | */ 52 | 53 | HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, 54 | uint8_t *pOutBuffer, uint32_t Timeout); 55 | HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 56 | HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, 57 | uint8_t *pOutBuffer, uint32_t Timeout); 58 | HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, 59 | uint8_t *pOutBuffer, uint32_t Timeout); 60 | HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 61 | HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, 62 | uint8_t *pOutBuffer, uint32_t Timeout); 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @addtogroup HASHEx_Exported_Functions_Group2 HASH extended processing functions in interrupt mode 69 | * @{ 70 | */ 71 | 72 | HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, 73 | uint8_t *pOutBuffer); 74 | HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 75 | HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, 76 | uint8_t *pOutBuffer); 77 | HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, 78 | uint8_t *pOutBuffer); 79 | HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 80 | HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, 81 | uint8_t *pOutBuffer); 82 | 83 | /** 84 | * @} 85 | */ 86 | 87 | /** @addtogroup HASHEx_Exported_Functions_Group3 HASH extended processing functions in DMA mode 88 | * @{ 89 | */ 90 | HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 91 | HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout); 92 | HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 93 | HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout); 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /** @addtogroup HASHEx_Exported_Functions_Group4 HMAC extended processing functions in polling mode 100 | * @{ 101 | */ 102 | HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, 103 | uint8_t *pOutBuffer, uint32_t Timeout); 104 | HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, 105 | uint8_t *pOutBuffer, uint32_t Timeout); 106 | /** 107 | * @} 108 | */ 109 | 110 | /** @addtogroup HASHEx_Exported_Functions_Group5 HMAC extended processing functions in interrupt mode 111 | * @{ 112 | */ 113 | 114 | HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, 115 | uint8_t *pOutBuffer); 116 | HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size, 117 | uint8_t *pOutBuffer); 118 | 119 | /** 120 | * @} 121 | */ 122 | 123 | /** @addtogroup HASHEx_Exported_Functions_Group6 HMAC extended processing functions in DMA mode 124 | * @{ 125 | */ 126 | 127 | HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 128 | HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | /** @addtogroup HASHEx_Exported_Functions_Group7 Multi-buffer HMAC extended processing functions in DMA mode 135 | * @{ 136 | */ 137 | 138 | HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 139 | HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 140 | HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 141 | 142 | HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 143 | HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 144 | HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 145 | HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 146 | HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 147 | HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 148 | 149 | HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 150 | HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 151 | HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_3_DMA(HASH_HandleTypeDef *hhash, const uint8_t *const pInBuffer, uint32_t Size); 152 | /** 153 | * @} 154 | */ 155 | 156 | /** 157 | * @} 158 | */ 159 | 160 | /** 161 | * @} 162 | */ 163 | #endif /* HASH*/ 164 | /** 165 | * @} 166 | */ 167 | 168 | 169 | #ifdef __cplusplus 170 | } 171 | #endif 172 | 173 | 174 | #endif /* STM32U5xx_HAL_HASH_EX_H */ 175 | 176 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_ltdc_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_ltdc_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of LTDC HAL Extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_HAL_LTDC_EX_H 21 | #define STM32U5xx_HAL_LTDC_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32u5xx_hal_def.h" 29 | 30 | #if defined (LTDC) && defined (DSI) 31 | 32 | #include "stm32u5xx_hal_dsi.h" 33 | 34 | /** @addtogroup STM32U5xx_HAL_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup LTDCEx 39 | * @{ 40 | */ 41 | 42 | /* Exported types ------------------------------------------------------------*/ 43 | /* Exported constants --------------------------------------------------------*/ 44 | /* Exported macro ------------------------------------------------------------*/ 45 | /* Exported functions --------------------------------------------------------*/ 46 | /** @addtogroup LTDCEx_Exported_Functions 47 | * @{ 48 | */ 49 | 50 | /** @addtogroup LTDCEx_Exported_Functions_Group1 51 | * @{ 52 | */ 53 | HAL_StatusTypeDef HAL_LTDCEx_StructInitFromVideoConfig(LTDC_HandleTypeDef *hltdc, DSI_VidCfgTypeDef *VidCfg); 54 | HAL_StatusTypeDef HAL_LTDCEx_StructInitFromAdaptedCommandConfig(LTDC_HandleTypeDef *hltdc, DSI_CmdCfgTypeDef *CmdCfg); 55 | /** 56 | * @} 57 | */ 58 | 59 | /** 60 | * @} 61 | */ 62 | 63 | /* Private types -------------------------------------------------------------*/ 64 | /* Private variables ---------------------------------------------------------*/ 65 | /* Private constants ---------------------------------------------------------*/ 66 | /* Private macros ------------------------------------------------------------*/ 67 | /* Private functions ---------------------------------------------------------*/ 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | #endif /* LTDC && DSI */ 78 | 79 | #ifdef __cplusplus 80 | } 81 | #endif 82 | 83 | #endif /* STM32U5xx_HAL_LTDC_EX_H */ 84 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_mmc_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_mmc_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of SD HAL extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_HAL_MMC_EX_H 21 | #define STM32U5xx_HAL_MMC_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32u5xx_hal_def.h" 29 | 30 | /** @addtogroup STM32U5xx_HAL_Driver 31 | * @{ 32 | */ 33 | #if defined (SDMMC1) || defined (SDMMC2) 34 | /** @addtogroup MMCEx 35 | * @brief SD HAL extended module driver 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /** @defgroup MMCEx_Exported_Types MMCEx Exported Types 41 | * @{ 42 | */ 43 | 44 | /** @defgroup MMCEx_Exported_Types_Group1 Linked List Wrapper 45 | * @{ 46 | */ 47 | /* Exported constants --------------------------------------------------------*/ 48 | /* Exported macro ------------------------------------------------------------*/ 49 | /* -----------------Linked List Wrapper --------------------------------------*/ 50 | 51 | #define MMC_DMALinkNodeTypeDef SDMMC_DMALinkNodeTypeDef 52 | #define MMC_DMALinkNodeConfTypeDef SDMMC_DMALinkNodeConfTypeDef 53 | #define MMC_DMALinkedListTypeDef SDMMC_DMALinkedListTypeDef 54 | /* ----------------- Linked Aliases ------------------------------------------*/ 55 | #define HAL_MMCx_DMALinkedList_WriteCpltCallback HAL_MMC_TxCpltCallback 56 | #define HAL_MMCx_DMALinkedList_ReadCpltCallback HAL_MMC_RxCpltCallback 57 | /** 58 | * @} 59 | */ 60 | 61 | /** 62 | * @} 63 | */ 64 | /* Exported functions --------------------------------------------------------*/ 65 | /** @defgroup MMCEx_Exported_Functions MMCEx Exported Functions 66 | * @{ 67 | */ 68 | 69 | /** @defgroup MMCEx_Exported_Functions_Group1 MultiBuffer functions 70 | * @{ 71 | */ 72 | HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_ReadBlocks(MMC_HandleTypeDef *hmmc, 73 | const MMC_DMALinkedListTypeDef *pLinkedList, 74 | uint32_t BlockAdd, uint32_t NumberOfBlocks); 75 | HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_WriteBlocks(MMC_HandleTypeDef *hmmc, 76 | const MMC_DMALinkedListTypeDef *pLinkedList, 77 | uint32_t BlockAdd, uint32_t NumberOfBlocks); 78 | 79 | HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_BuildNode(MMC_DMALinkNodeTypeDef *pNode, 80 | MMC_DMALinkNodeConfTypeDef *pNodeConf); 81 | HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_InsertNode(MMC_DMALinkedListTypeDef *pLinkedList, 82 | MMC_DMALinkNodeTypeDef *pPrevNode, 83 | MMC_DMALinkNodeTypeDef *pNewNode); 84 | HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_RemoveNode(MMC_DMALinkedListTypeDef *pLinkedList, 85 | MMC_DMALinkNodeTypeDef *pNode); 86 | HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_LockNode(MMC_DMALinkNodeTypeDef *pNode); 87 | HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_UnlockNode(MMC_DMALinkNodeTypeDef *pNode); 88 | HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_EnableCircularMode(SDMMC_DMALinkedListTypeDef *pLinkedList); 89 | HAL_StatusTypeDef HAL_MMCEx_DMALinkedList_DisableCircularMode(SDMMC_DMALinkedListTypeDef *pLinkedList); 90 | 91 | void HAL_MMCEx_Read_DMALnkLstBufCpltCallback(MMC_HandleTypeDef *hmmc); 92 | void HAL_MMCEx_Write_DMALnkLstBufCpltCallback(MMC_HandleTypeDef *hmmc); 93 | 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /* Private types -------------------------------------------------------------*/ 104 | /* Private defines -----------------------------------------------------------*/ 105 | /* Private variables ---------------------------------------------------------*/ 106 | /* Private constants ---------------------------------------------------------*/ 107 | /* Private macros ------------------------------------------------------------*/ 108 | /* Private functions prototypes ----------------------------------------------*/ 109 | /* Private functions ---------------------------------------------------------*/ 110 | 111 | /** 112 | * @} 113 | */ 114 | #endif /* SDMMC1 || SDMMC2 */ 115 | 116 | /** 117 | * @} 118 | */ 119 | #ifdef __cplusplus 120 | } 121 | #endif 122 | 123 | 124 | #endif /* STM32U5xx_HAL_MMCEx_H */ 125 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_opamp_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_opamp_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of OPAMP HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_HAL_OPAMP_EX_H 21 | #define STM32U5xx_HAL_OPAMP_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32u5xx_hal_def.h" 29 | 30 | /** @addtogroup STM32U5xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup OPAMPEx 35 | * @{ 36 | */ 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* Exported constants --------------------------------------------------------*/ 39 | /* Exported macro ------------------------------------------------------------*/ 40 | /* Exported functions --------------------------------------------------------*/ 41 | /** @addtogroup OPAMPEx_Exported_Functions OPAMPEx Exported Functions 42 | * @{ 43 | */ 44 | 45 | #if defined(OPAMP2) 46 | /* I/O operation functions *****************************************************/ 47 | /** @addtogroup OPAMPEx_Exported_Functions_Group1 Extended Input and Output operation functions 48 | * @{ 49 | */ 50 | HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPAMP_HandleTypeDef *hopamp2); 51 | 52 | /** 53 | * @} 54 | */ 55 | #endif /* OPAMP2 */ 56 | 57 | /* Peripheral Control functions ************************************************/ 58 | /** @addtogroup OPAMPEx_Exported_Functions_Group2 59 | * @{ 60 | */ 61 | HAL_StatusTypeDef HAL_OPAMPEx_Unlock(OPAMP_HandleTypeDef *hopamp); 62 | /** 63 | * @} 64 | */ 65 | 66 | /** 67 | * @} 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | #ifdef __cplusplus 79 | } 80 | #endif 81 | 82 | #endif /* STM32U5xx_HAL_OPAMP_EX_H */ 83 | 84 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_pcd_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_pcd_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of PCD HAL Extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_HAL_PCD_EX_H 21 | #define STM32U5xx_HAL_PCD_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif /* __cplusplus */ 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32u5xx_hal_def.h" 29 | 30 | #if defined (USB_OTG_FS) || defined (USB_OTG_HS) || defined (USB_DRD_FS) 31 | /** @addtogroup STM32U5xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup PCDEx 36 | * @{ 37 | */ 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* Exported macros -----------------------------------------------------------*/ 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions 43 | * @{ 44 | */ 45 | /** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 46 | * @{ 47 | */ 48 | #if defined (USB_OTG_FS) || defined (USB_OTG_HS) 49 | HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size); 50 | HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size); 51 | #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ 52 | 53 | #if defined (USB_DRD_FS) 54 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, 55 | uint16_t ep_kind, uint32_t pmaadress); 56 | #endif /* defined (USB_DRD_FS) */ 57 | 58 | HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); 59 | HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); 60 | 61 | 62 | HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd); 63 | HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd); 64 | void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd); 65 | 66 | void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); 67 | void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | 81 | /** 82 | * @} 83 | */ 84 | #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) || defined (USB_DRD_FS) */ 85 | 86 | #ifdef __cplusplus 87 | } 88 | #endif /* __cplusplus */ 89 | 90 | 91 | #endif /* STM32U5xx_HAL_PCD_EX_H */ 92 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_rng_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_rng_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of RNG HAL Extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_HAL_RNG_EX_H 21 | #define STM32U5xx_HAL_RNG_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32u5xx_hal_def.h" 29 | 30 | /** @addtogroup STM32U5xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined(RNG) 35 | #if defined(RNG_CR_CONDRST) 36 | 37 | /** @defgroup RNGEx RNGEx 38 | * @brief RNG Extension HAL module driver 39 | * @{ 40 | */ 41 | 42 | /* Exported types ------------------------------------------------------------*/ 43 | /** @defgroup RNGEx_Exported_Types RNGEx Exported Types 44 | * @brief RNGEx Exported types 45 | * @{ 46 | */ 47 | 48 | /** 49 | * @brief RNGEx Configuration Structure definition 50 | */ 51 | 52 | typedef struct 53 | { 54 | uint32_t Config1; /*!< Config1 must be a value between 0 and 0x3F */ 55 | uint32_t Config2; /*!< Config2 must be a value between 0 and 0x7 */ 56 | uint32_t Config3; /*!< Config3 must be a value between 0 and 0xF */ 57 | uint32_t ClockDivider; /*!< Clock Divider factor.This parameter can 58 | be a value of @ref RNGEx_Clock_Divider_Factor */ 59 | uint32_t NistCompliance; /*!< NIST compliance.This parameter can be a 60 | value of @ref RNGEx_NIST_Compliance */ 61 | uint32_t AutoReset; /*!< automatic reset When a noise source error occurs 62 | value of @ref RNGEx_Auto_Reset */ 63 | uint32_t HealthTest; /*!< RNG health test control must be a value 64 | between 0x0FFCABFF and 0x00005200 */ 65 | uint32_t NoiseSource; /*!< RNG noise source control(Oscillator Enable signals) 66 | must be a value between 0x0 and 0x0003FFFF */ 67 | } RNG_ConfigTypeDef; 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /* Exported constants --------------------------------------------------------*/ 74 | /** @defgroup RNGEx_Exported_Constants RNGEx Exported Constants 75 | * @{ 76 | */ 77 | 78 | /** @defgroup RNGEx_Clock_Divider_Factor Value used to configure an internal 79 | * programmable divider acting on the incoming RNG clock 80 | * @{ 81 | */ 82 | #define RNG_CLKDIV_BY_1 (0x00000000UL) /*!< No clock division */ 83 | #define RNG_CLKDIV_BY_2 (RNG_CR_CLKDIV_0) 84 | /*!< 2 RNG clock cycles per internal RNG clock */ 85 | #define RNG_CLKDIV_BY_4 (RNG_CR_CLKDIV_1) 86 | /*!< 4 RNG clock cycles per internal RNG clock */ 87 | #define RNG_CLKDIV_BY_8 (RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) 88 | /*!< 8 RNG clock cycles per internal RNG clock */ 89 | #define RNG_CLKDIV_BY_16 (RNG_CR_CLKDIV_2) 90 | /*!< 16 RNG clock cycles per internal RNG clock */ 91 | #define RNG_CLKDIV_BY_32 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_0) 92 | /*!< 32 RNG clock cycles per internal RNG clock */ 93 | #define RNG_CLKDIV_BY_64 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1) 94 | /*!< 64 RNG clock cycles per internal RNG clock */ 95 | #define RNG_CLKDIV_BY_128 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) 96 | /*!< 128 RNG clock cycles per internal RNG clock */ 97 | #define RNG_CLKDIV_BY_256 (RNG_CR_CLKDIV_3) 98 | /*!< 256 RNG clock cycles per internal RNG clock */ 99 | #define RNG_CLKDIV_BY_512 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_0) 100 | /*!< 512 RNG clock cycles per internal RNG clock */ 101 | #define RNG_CLKDIV_BY_1024 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_1) 102 | /*!< 1024 RNG clock cycles per internal RNG clock */ 103 | #define RNG_CLKDIV_BY_2048 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) 104 | /*!< 2048 RNG clock cycles per internal RNG clock */ 105 | #define RNG_CLKDIV_BY_4096 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2) 106 | /*!< 4096 RNG clock cycles per internal RNG clock */ 107 | #define RNG_CLKDIV_BY_8192 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_0) 108 | /*!< 8192 RNG clock cycles per internal RNG clock */ 109 | #define RNG_CLKDIV_BY_16384 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1) 110 | /*!< 16384 RNG clock cycles per internal RNG clock */ 111 | #define RNG_CLKDIV_BY_32768 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) 112 | /*!< 32768 RNG clock cycles per internal RNG clock */ 113 | /** 114 | * @} 115 | */ 116 | 117 | /** @defgroup RNGEx_NIST_Compliance NIST Compliance configuration 118 | * @{ 119 | */ 120 | #define RNG_NIST_COMPLIANT (0x00000000UL) /*!< NIST compliant configuration*/ 121 | #define RNG_CUSTOM_NIST (RNG_CR_NISTC) /*!< Custom NIST configuration */ 122 | 123 | /** 124 | * @} 125 | */ 126 | /** @defgroup RNGEx_Auto_Reset Auto Reset configuration 127 | * @{ 128 | */ 129 | #define RNG_ARDIS_ENABLE (0x00000000UL) /*!< automatic reset after seed error*/ 130 | #define RNG_ARDIS_DISABLE (RNG_CR_ARDIS) /*!< Disable automatic reset after seed error */ 131 | 132 | /** 133 | * @} 134 | */ 135 | 136 | /** 137 | * @} 138 | */ 139 | 140 | /* Private types -------------------------------------------------------------*/ 141 | /** @defgroup RNGEx_Private_Types RNGEx Private Types 142 | * @{ 143 | */ 144 | 145 | /** 146 | * @} 147 | */ 148 | 149 | /* Private variables ---------------------------------------------------------*/ 150 | /** @defgroup RNGEx_Private_Variables RNGEx Private Variables 151 | * @{ 152 | */ 153 | 154 | /** 155 | * @} 156 | */ 157 | 158 | /* Private constants ---------------------------------------------------------*/ 159 | /** @defgroup RNGEx_Private_Constants RNGEx Private Constants 160 | * @{ 161 | */ 162 | 163 | /** 164 | * @} 165 | */ 166 | 167 | /* Private macros ------------------------------------------------------------*/ 168 | /** @defgroup RNGEx_Private_Macros RNGEx Private Macros 169 | * @{ 170 | */ 171 | 172 | #define IS_RNG_CLOCK_DIVIDER(__CLOCK_DIV__) (((__CLOCK_DIV__) == RNG_CLKDIV_BY_1) || \ 173 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_2) || \ 174 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_4) || \ 175 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_8) || \ 176 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_16) || \ 177 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_32) || \ 178 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_64) || \ 179 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_128) || \ 180 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_256) || \ 181 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_512) || \ 182 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_1024) || \ 183 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_2048) || \ 184 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_4096) || \ 185 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_8192) || \ 186 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_16384) || \ 187 | ((__CLOCK_DIV__) == RNG_CLKDIV_BY_32768)) 188 | 189 | 190 | #define IS_RNG_NIST_COMPLIANCE(__NIST_COMPLIANCE__) (((__NIST_COMPLIANCE__) == RNG_NIST_COMPLIANT) || \ 191 | ((__NIST_COMPLIANCE__) == RNG_CUSTOM_NIST)) 192 | 193 | #define IS_RNG_CONFIG1(__CONFIG1__) ((__CONFIG1__) <= 0x3FUL) 194 | 195 | #define IS_RNG_CONFIG2(__CONFIG2__) ((__CONFIG2__) <= 0x07UL) 196 | 197 | #define IS_RNG_CONFIG3(__CONFIG3__) ((__CONFIG3__) <= 0xFUL) 198 | #define IS_RNG_ARDIS(__ARDIS__) (((__ARDIS__) == RNG_ARDIS_ENABLE) || \ 199 | ((__ARDIS__) == RNG_ARDIS_DISABLE)) 200 | 201 | 202 | /** 203 | * @} 204 | */ 205 | 206 | /* Private functions ---------------------------------------------------------*/ 207 | /** @defgroup RNGEx_Private_Functions RNGEx Private Functions 208 | * @{ 209 | */ 210 | 211 | /** 212 | * @} 213 | */ 214 | 215 | /* Exported functions --------------------------------------------------------*/ 216 | /** @addtogroup RNGEx_Exported_Functions 217 | * @{ 218 | */ 219 | 220 | /** @addtogroup RNGEx_Exported_Functions_Group1 221 | * @{ 222 | */ 223 | HAL_StatusTypeDef HAL_RNGEx_SetConfig(RNG_HandleTypeDef *hrng, const RNG_ConfigTypeDef *pConf); 224 | HAL_StatusTypeDef HAL_RNGEx_GetConfig(RNG_HandleTypeDef *hrng, RNG_ConfigTypeDef *pConf); 225 | HAL_StatusTypeDef HAL_RNGEx_LockConfig(RNG_HandleTypeDef *hrng); 226 | 227 | /** 228 | * @} 229 | */ 230 | 231 | /** @addtogroup RNGEx_Exported_Functions_Group2 232 | * @{ 233 | */ 234 | HAL_StatusTypeDef HAL_RNGEx_RecoverSeedError(RNG_HandleTypeDef *hrng); 235 | 236 | /** 237 | * @} 238 | */ 239 | 240 | /** 241 | * @} 242 | */ 243 | 244 | /** 245 | * @} 246 | */ 247 | 248 | /** 249 | * @} 250 | */ 251 | 252 | #endif /* RNG_CR_CONDRST */ 253 | #endif /* RNG */ 254 | 255 | /** 256 | * @} 257 | */ 258 | 259 | #ifdef __cplusplus 260 | } 261 | #endif 262 | 263 | 264 | #endif /* STM32U5xx_HAL_RNG_EX_H */ 265 | 266 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_sai_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_sai_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of SAI HAL extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_HAL_SAI_EX_H 21 | #define STM32U5xx_HAL_SAI_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32u5xx_hal_def.h" 29 | 30 | /** @addtogroup STM32U5xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup SAIEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup SAIEx_Exported_Types SAIEx Exported Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @brief PDM microphone delay structure definition 45 | */ 46 | typedef struct 47 | { 48 | uint32_t MicPair; /*!< Specifies which pair of microphones is selected. 49 | This parameter must be a number between Min_Data = 1 and Max_Data = 3. */ 50 | 51 | uint32_t LeftDelay; /*!< Specifies the delay in PDM clock unit to apply on left microphone. 52 | This parameter must be a number between Min_Data = 0 and Max_Data = 7. */ 53 | 54 | uint32_t RightDelay; /*!< Specifies the delay in PDM clock unit to apply on right microphone. 55 | This parameter must be a number between Min_Data = 0 and Max_Data = 7. */ 56 | } SAIEx_PdmMicDelayParamTypeDef; 57 | 58 | /** 59 | * @} 60 | */ 61 | 62 | /* Exported constants --------------------------------------------------------*/ 63 | /* Exported macros -----------------------------------------------------------*/ 64 | /* Exported functions --------------------------------------------------------*/ 65 | /** @addtogroup SAIEx_Exported_Functions SAIEx Extended Exported Functions 66 | * @{ 67 | */ 68 | 69 | /** @addtogroup SAIEx_Exported_Functions_Group1 Peripheral Control functions 70 | * @{ 71 | */ 72 | HAL_StatusTypeDef HAL_SAIEx_ConfigPdmMicDelay(const SAI_HandleTypeDef *hsai, 73 | const SAIEx_PdmMicDelayParamTypeDef *pdmMicDelay); 74 | /** 75 | * @} 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | /* Private macros ------------------------------------------------------------*/ 83 | /** @addtogroup SAIEx_Private_Macros SAIEx Extended Private Macros 84 | * @{ 85 | */ 86 | #define IS_SAI_PDM_MIC_DELAY(VALUE) ((VALUE) <= 7U) 87 | /** 88 | * @} 89 | */ 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | #ifdef __cplusplus 100 | } 101 | #endif 102 | 103 | #endif /* STM32U5xx_HAL_SAI_EX_H */ 104 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_sd_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_sd_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of SD HAL extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_HAL_SD_EX_H 21 | #define STM32U5xx_HAL_SD_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32u5xx_hal_def.h" 29 | 30 | /** @addtogroup STM32U5xx_HAL_Driver 31 | * @{ 32 | */ 33 | #if defined (SDMMC1) || defined (SDMMC2) 34 | 35 | /** @addtogroup SDEx 36 | * @brief SD HAL extended module driver 37 | * @{ 38 | */ 39 | 40 | /* Exported types ------------------------------------------------------------*/ 41 | /** @defgroup SDEx_Exported_Types SDEx Exported Types 42 | * @{ 43 | */ 44 | 45 | /** @defgroup SDEx_Exported_Types_Group1 Linked List Wrapper 46 | * @{ 47 | */ 48 | /* Exported constants --------------------------------------------------------*/ 49 | /* Exported macro ------------------------------------------------------------*/ 50 | /* -----------------Linked List Wrapper --------------------------------------*/ 51 | 52 | #define SD_DMALinkNodeTypeDef SDMMC_DMALinkNodeTypeDef 53 | #define SD_DMALinkNodeConfTypeDef SDMMC_DMALinkNodeConfTypeDef 54 | #define SD_DMALinkedListTypeDef SDMMC_DMALinkedListTypeDef 55 | /* ----------------- Linked Aliases ------------------------------------------*/ 56 | #define HAL_SDEx_DMALinkedList_WriteCpltCallback HAL_SD_TxCpltCallback 57 | #define HAL_SDEx_DMALinkedList_ReadCpltCallback HAL_SD_RxCpltCallback 58 | /** 59 | * @} 60 | */ 61 | /** 62 | * @} 63 | */ 64 | 65 | /* Exported functions --------------------------------------------------------*/ 66 | /** @defgroup SDEx_Exported_Functions SDEx Exported Functions 67 | * @{ 68 | */ 69 | /** @defgroup SDEx_Exported_Functions_Group1 Linked List functions 70 | * @{ 71 | */ 72 | HAL_StatusTypeDef HAL_SDEx_DMALinkedList_ReadBlocks(SD_HandleTypeDef *hsd, const SD_DMALinkedListTypeDef *pLinkedList, 73 | uint32_t BlockAdd, uint32_t NumberOfBlocks); 74 | HAL_StatusTypeDef HAL_SDEx_DMALinkedList_WriteBlocks(SD_HandleTypeDef *hsd, const SD_DMALinkedListTypeDef *pLinkedList, 75 | uint32_t BlockAdd, uint32_t NumberOfBlocks); 76 | 77 | HAL_StatusTypeDef HAL_SDEx_DMALinkedList_BuildNode(SD_DMALinkNodeTypeDef *pNode, SD_DMALinkNodeConfTypeDef *pNodeConf); 78 | HAL_StatusTypeDef HAL_SDEx_DMALinkedList_InsertNode(SD_DMALinkedListTypeDef *pLinkedList, 79 | SD_DMALinkNodeTypeDef *pPrevNode, SD_DMALinkNodeTypeDef *pNewNode); 80 | HAL_StatusTypeDef HAL_SDEx_DMALinkedList_RemoveNode(SD_DMALinkedListTypeDef *pLinkedList, SD_DMALinkNodeTypeDef *pNode); 81 | HAL_StatusTypeDef HAL_SDEx_DMALinkedList_LockNode(SD_DMALinkNodeTypeDef *pNode); 82 | HAL_StatusTypeDef HAL_SDEx_DMALinkedList_UnlockNode(SD_DMALinkNodeTypeDef *pNode); 83 | HAL_StatusTypeDef HAL_SDEx_DMALinkedList_EnableCircularMode(SD_DMALinkedListTypeDef *pLinkedList); 84 | HAL_StatusTypeDef HAL_SDEx_DMALinkedList_DisableCircularMode(SD_DMALinkedListTypeDef *pLinkedList); 85 | 86 | void HAL_SDEx_Read_DMALnkLstBufCpltCallback(SD_HandleTypeDef *hsd); 87 | void HAL_SDEx_Write_DMALnkLstBufCpltCallback(SD_HandleTypeDef *hsd); 88 | 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | /* Private types -------------------------------------------------------------*/ 99 | /* Private defines -----------------------------------------------------------*/ 100 | /* Private variables ---------------------------------------------------------*/ 101 | /* Private constants ---------------------------------------------------------*/ 102 | /* Private macros ------------------------------------------------------------*/ 103 | /* Private functions prototypes ----------------------------------------------*/ 104 | /* Private functions ---------------------------------------------------------*/ 105 | 106 | /** 107 | * @} 108 | */ 109 | #endif /* SDMMC1 || SDMMC2 */ 110 | 111 | /** 112 | * @} 113 | */ 114 | #ifdef __cplusplus 115 | } 116 | #endif 117 | 118 | 119 | #endif /* stm32u5xx_HAL_SD_EX_H */ 120 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_hal_sram.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_sram.h 4 | * @author MCD Application Team 5 | * @brief Header file of SRAM HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_HAL_SRAM_H 21 | #define STM32U5xx_HAL_SRAM_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | #if defined(FMC_BANK1) 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32u5xx_ll_fmc.h" 31 | 32 | /** @addtogroup STM32U5xx_HAL_Driver 33 | * @{ 34 | */ 35 | /** @addtogroup SRAM 36 | * @{ 37 | */ 38 | 39 | /* Exported typedef ----------------------------------------------------------*/ 40 | 41 | /** @defgroup SRAM_Exported_Types SRAM Exported Types 42 | * @{ 43 | */ 44 | /** 45 | * @brief HAL SRAM State structures definition 46 | */ 47 | typedef enum 48 | { 49 | HAL_SRAM_STATE_RESET = 0x00U, /*!< SRAM not yet initialized or disabled */ 50 | HAL_SRAM_STATE_READY = 0x01U, /*!< SRAM initialized and ready for use */ 51 | HAL_SRAM_STATE_BUSY = 0x02U, /*!< SRAM internal process is ongoing */ 52 | HAL_SRAM_STATE_ERROR = 0x03U, /*!< SRAM error state */ 53 | HAL_SRAM_STATE_PROTECTED = 0x04U /*!< SRAM peripheral NORSRAM device write protected */ 54 | 55 | } HAL_SRAM_StateTypeDef; 56 | 57 | /** 58 | * @brief SRAM handle Structure definition 59 | */ 60 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 61 | typedef struct __SRAM_HandleTypeDef 62 | #else 63 | typedef struct 64 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 65 | { 66 | FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ 67 | 68 | FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ 69 | 70 | FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */ 71 | 72 | HAL_LockTypeDef Lock; /*!< SRAM locking object */ 73 | 74 | __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */ 75 | 76 | DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ 77 | 78 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 79 | void (* MspInitCallback)(struct __SRAM_HandleTypeDef *hsram); /*!< SRAM Msp Init callback */ 80 | void (* MspDeInitCallback)(struct __SRAM_HandleTypeDef *hsram); /*!< SRAM Msp DeInit callback */ 81 | void (* DmaXferCpltCallback)(DMA_HandleTypeDef *hdma); /*!< SRAM DMA Xfer Complete callback */ 82 | void (* DmaXferErrorCallback)(DMA_HandleTypeDef *hdma); /*!< SRAM DMA Xfer Error callback */ 83 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 84 | } SRAM_HandleTypeDef; 85 | 86 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 87 | /** 88 | * @brief HAL SRAM Callback ID enumeration definition 89 | */ 90 | typedef enum 91 | { 92 | HAL_SRAM_MSP_INIT_CB_ID = 0x00U, /*!< SRAM MspInit Callback ID */ 93 | HAL_SRAM_MSP_DEINIT_CB_ID = 0x01U, /*!< SRAM MspDeInit Callback ID */ 94 | HAL_SRAM_DMA_XFER_CPLT_CB_ID = 0x02U, /*!< SRAM DMA Xfer Complete Callback ID */ 95 | HAL_SRAM_DMA_XFER_ERR_CB_ID = 0x03U /*!< SRAM DMA Xfer Complete Callback ID */ 96 | } HAL_SRAM_CallbackIDTypeDef; 97 | 98 | /** 99 | * @brief HAL SRAM Callback pointer definition 100 | */ 101 | typedef void (*pSRAM_CallbackTypeDef)(SRAM_HandleTypeDef *hsram); 102 | typedef void (*pSRAM_DmaCallbackTypeDef)(DMA_HandleTypeDef *hdma); 103 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 104 | /** 105 | * @} 106 | */ 107 | 108 | /* Exported constants --------------------------------------------------------*/ 109 | /* Exported macro ------------------------------------------------------------*/ 110 | 111 | /** @defgroup SRAM_Exported_Macros SRAM Exported Macros 112 | * @{ 113 | */ 114 | 115 | /** @brief Reset SRAM handle state 116 | * @param __HANDLE__ SRAM handle 117 | * @retval None 118 | */ 119 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 120 | #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) do { \ 121 | (__HANDLE__)->State = HAL_SRAM_STATE_RESET; \ 122 | (__HANDLE__)->MspInitCallback = NULL; \ 123 | (__HANDLE__)->MspDeInitCallback = NULL; \ 124 | } while(0) 125 | #else 126 | #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET) 127 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 128 | 129 | /** 130 | * @} 131 | */ 132 | 133 | /* Exported functions --------------------------------------------------------*/ 134 | /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions 135 | * @{ 136 | */ 137 | 138 | /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions 139 | * @{ 140 | */ 141 | 142 | /* Initialization/de-initialization functions ********************************/ 143 | HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, 144 | FMC_NORSRAM_TimingTypeDef *ExtTiming); 145 | HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram); 146 | void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram); 147 | void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram); 148 | 149 | /** 150 | * @} 151 | */ 152 | 153 | /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions 154 | * @{ 155 | */ 156 | 157 | /* I/O operation functions ***************************************************/ 158 | HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, 159 | uint32_t BufferSize); 160 | HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, 161 | uint32_t BufferSize); 162 | HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, 163 | uint32_t BufferSize); 164 | HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, 165 | uint32_t BufferSize); 166 | HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, 167 | uint32_t BufferSize); 168 | HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, 169 | uint32_t BufferSize); 170 | HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, 171 | uint32_t BufferSize); 172 | HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, 173 | uint32_t BufferSize); 174 | 175 | void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); 176 | void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); 177 | 178 | #if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) 179 | /* SRAM callback registering/unregistering */ 180 | HAL_StatusTypeDef HAL_SRAM_RegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, 181 | pSRAM_CallbackTypeDef pCallback); 182 | HAL_StatusTypeDef HAL_SRAM_UnRegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId); 183 | HAL_StatusTypeDef HAL_SRAM_RegisterDmaCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, 184 | pSRAM_DmaCallbackTypeDef pCallback); 185 | #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | /** @addtogroup SRAM_Exported_Functions_Group3 Control functions 192 | * @{ 193 | */ 194 | 195 | /* SRAM Control functions ****************************************************/ 196 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram); 197 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram); 198 | 199 | /** 200 | * @} 201 | */ 202 | 203 | /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions 204 | * @{ 205 | */ 206 | 207 | /* SRAM State functions ******************************************************/ 208 | HAL_SRAM_StateTypeDef HAL_SRAM_GetState(const SRAM_HandleTypeDef *hsram); 209 | 210 | /** 211 | * @} 212 | */ 213 | 214 | /** 215 | * @} 216 | */ 217 | 218 | /** 219 | * @} 220 | */ 221 | 222 | /** 223 | * @} 224 | */ 225 | 226 | #endif /* FMC_BANK1 */ 227 | 228 | #ifdef __cplusplus 229 | } 230 | #endif 231 | 232 | #endif /* STM32U5xx_HAL_SRAM_H */ 233 | -------------------------------------------------------------------------------- /Inc/stm32u5xx_ll_dlyb.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_dlyb.h 4 | * @author MCD Application Team 5 | * @brief Header file of DelayBlock module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32U5xx_LL_DLYB_H 21 | #define STM32U5xx_LL_DLYB_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32u5xx_hal_def.h" 29 | 30 | /** @addtogroup STM32U5xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_OSPI_MODULE_ENABLED) || defined(HAL_XSPI_MODULE_ENABLED) 35 | #if defined (DLYB_SDMMC1) || defined (DLYB_SDMMC2) || defined (DLYB_OCTOSPI1) || defined (DLYB_OCTOSPI2) 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | /** @defgroup DLYB_LL DLYB 39 | * @{ 40 | */ 41 | 42 | /** 43 | * @brief DLYB Configuration Structure definition 44 | */ 45 | 46 | typedef struct 47 | { 48 | uint32_t Units; /*!< Specifies the Delay of a unit delay cell. 49 | This parameter can be a value between 0 and DLYB_MAX_UNIT */ 50 | 51 | uint32_t PhaseSel; /*!< Specifies the Phase for the output clock. 52 | This parameter can be a value between 0 and DLYB_MAX_SELECT */ 53 | } LL_DLYB_CfgTypeDef; 54 | 55 | /* Exported constants --------------------------------------------------------*/ 56 | /** @defgroup DLYB_Exported_Constants DLYB Exported Constants 57 | * @{ 58 | */ 59 | 60 | #define DLYB_MAX_UNIT ((uint32_t)0x00000080U) /*!< Max UNIT value (128) */ 61 | #define DLYB_MAX_SELECT ((uint32_t)0x0000000CU) /*!< Max SELECT value (12) */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @defgroup DLYB_LL_Flags DLYB Flags 68 | * @{ 69 | */ 70 | 71 | #define DLYB_FLAG_LNGF DLYB_CFGR_LNGF 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /* Exported functions --------------------------------------------------------*/ 78 | 79 | /** @defgroup DLYB_LL_Exported_Functions DLYB Exported Functions 80 | * @{ 81 | */ 82 | 83 | /** @defgroup DLYB_LL_Configuration Configuration functions 84 | * @{ 85 | */ 86 | 87 | /** 88 | * @brief DLYB Enable 89 | * @param DLYBx DLYB Instance 90 | * @retval None 91 | */ 92 | 93 | __STATIC_INLINE void LL_DLYB_Enable(DLYB_TypeDef *DLYBx) 94 | { 95 | SET_BIT(DLYBx->CR, DLYB_CR_DEN); 96 | } 97 | 98 | /** @brief Disable the DLYB. 99 | * @param DLYBx DLYB Instance. 100 | * @retval None 101 | */ 102 | 103 | __STATIC_INLINE void LL_DLYB_Disable(DLYB_TypeDef *DLYBx) 104 | { 105 | CLEAR_BIT(DLYBx->CR, DLYB_CR_DEN); 106 | } 107 | 108 | /** 109 | * @} 110 | */ 111 | 112 | /** @defgroup DLYB_Control_Functions DLYB Control functions 113 | * @{ 114 | */ 115 | 116 | void LL_DLYB_SetDelay(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg); 117 | void LL_DLYB_GetDelay(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg); 118 | uint32_t LL_DLYB_GetClockPeriod(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg); 119 | 120 | /** 121 | * @} 122 | */ 123 | 124 | /** 125 | * @} 126 | */ 127 | 128 | /** 129 | * @} 130 | */ 131 | 132 | #endif /* DLYB_SDMMC1 || DLYB_SDMMC2 || DLYB_OCTOSPI1 || DLYB_OCTOSPI2 */ 133 | #endif /* HAL_SD_MODULE_ENABLED || HAL_OSPI_MODULE_ENABLED || HAL_XSPI_MODULE_ENABLED */ 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | #ifdef __cplusplus 140 | } 141 | #endif 142 | 143 | #endif /* STM32U5xx_LL_DLYB_H */ 144 | -------------------------------------------------------------------------------- /LICENSE.md: -------------------------------------------------------------------------------- 1 | Copyright 2021 STMicroelectronics. 2 | All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without modification, 5 | are permitted provided that the following conditions are met: 6 | 7 | 1. Redistributions of source code must retain the above copyright notice, this 8 | list of conditions and the following disclaimer. 9 | 10 | 2. Redistributions in binary form must reproduce the above copyright notice, 11 | this list of conditions and the following disclaimer in the documentation and/or 12 | other materials provided with the distribution. 13 | 14 | 3. Neither the name of the copyright holder nor the names of its contributors 15 | may be used to endorse or promote products derived from this software without 16 | specific prior written permission. 17 | 18 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # STM32CubeU5 HAL Driver MCU Component 2 | 3 | ![latest tag](https://img.shields.io/github/v/tag/STMicroelectronics/stm32u5xx_hal_driver.svg?color=brightgreen) 4 | 5 | ## Overview 6 | 7 | **STM32Cube** is a STMicroelectronics original initiative aimed at making life easier for developers by reducing effort, time and cost. 8 | 9 | **STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform delivered for each STM32 series. 10 | * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product. 11 | * The STM32 HAL-LL drivers, an abstraction layer offering a set of APIs ensuring maximized portability across the STM32 portfolio. 12 | * The BSP drivers of each evaluation, demonstration, or nucleo board provided for this STM32 series. 13 | * A consistent set of middleware libraries such as ThreadX, FileX, USBX, NetDuoX, OpenBootloader, USBPD, trustedfirmware, mbed-crypto, Network Library... 14 | * A full set of software projects (basic examples, applications, and demonstrations) for each board, each project developed in three flavors using three toolchains (EWARM, MDK-ARM, and STM32CubeIDE). 15 | * A new LPBAM utility which is a software helper that assists STM32U5 users in the elaboration of LPBAM scenarios. 16 | 17 | Two models of publication are proposed for the STM32Cube embedded software: 18 | * The monolithic **MCU Package**: all STM32Cube software modules of one STM32 series are present (Drivers, Middleware, Projects, Utilities) in the repository (usual name **STM32Cubexx**, xx corresponding to the STM32 series). 19 | * The **MCU component**: each STM32Cube software module being part of the STM32Cube MCU Package, is delivered as an individual repository, allowing the user to select and get only the required software functions. 20 | 21 | ## Description 22 | 23 | This **stm32u5xx_hal_driver** MCU component repo is one element of the STM32CubeU5 MCU embedded software package, providing the **HAL-LL Drivers** part. 24 | 25 | ## Release note 26 | 27 | Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/stm32u5xx_hal_driver/blob/master/Release_Notes.html). 28 | 29 | 30 | ## Compatibility information 31 | 32 | It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device - HAL, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeU5/blob/main/Release_Notes.html) release note. 33 | 34 | The full **STM32CubeU5** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeU5). 35 | 36 | ## Troubleshooting 37 | 38 | Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide. 39 | -------------------------------------------------------------------------------- /SECURITY.md: -------------------------------------------------------------------------------- 1 | # Report potential product security vulnerabilities 2 | 3 | ST places a high priority on security, and our Product Security Incident 4 | Response Team (PSIRT) is committed to rapidly addressing potential security 5 | vulnerabilities affecting our products. PSIRT's long history and vast experience 6 | in security allows ST to perform clear analyses and provide appropriate guidance 7 | on mitigations and solutions when applicable. 8 | 9 | If you wish to report potential security vulnerabilities regarding our products, 10 | **please do not report them through public GitHub issues.** Instead, we 11 | encourage you to report them to our ST PSIRT following the process described at: 12 | **https://www.st.com/content/st_com/en/security/report-vulnerabilities.html** 13 | 14 | ### IMPORTANT - READ CAREFULLY: 15 | 16 | STMicroelectronics International N.V., on behalf of itself, its affiliates and 17 | subsidiaries, (collectively “ST”) takes all potential security vulnerability 18 | reports or other related communications (“Report(s)”) seriously. In order to 19 | review Your Report (the terms “You” and “Yours” include your employer, and all 20 | affiliates, subsidiaries and related persons or entities) and take actions as 21 | deemed appropriate, ST requires that we have the rights and Your permission to 22 | do so. 23 | 24 | As such, by submitting Your Report to ST, You agree that You have the right to 25 | do so, and You grant to ST the rights to use the Report for purposes related to 26 | security vulnerability analysis, testing, correction, patching, reporting and 27 | any other related purpose or function. 28 | 29 | By submitting Your Report, You agree that ST’s 30 | [Privacy Policy](https://www.st.com/content/st_com/en/common/privacy-portal.html) 31 | applies to all related communications. 32 | -------------------------------------------------------------------------------- /Src/stm32u5xx_hal_crc_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_crc_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended CRC HAL module driver. 6 | * This file provides firmware functions to manage the extended 7 | * functionalities of the CRC peripheral. 8 | * 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * Copyright (c) 2021 STMicroelectronics. 13 | * All rights reserved. 14 | * 15 | * This software is licensed under terms that can be found in the LICENSE file 16 | * in the root directory of this software component. 17 | * If no LICENSE file comes with this software, it is provided AS-IS. 18 | * 19 | ****************************************************************************** 20 | @verbatim 21 | ================================================================================ 22 | ##### How to use this driver ##### 23 | ================================================================================ 24 | [..] 25 | (+) Set user-defined generating polynomial through HAL_CRCEx_Polynomial_Set() 26 | (+) Configure Input or Output data inversion 27 | 28 | @endverbatim 29 | ****************************************************************************** 30 | */ 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "stm32u5xx_hal.h" 34 | 35 | /** @addtogroup STM32U5xx_HAL_Driver 36 | * @{ 37 | */ 38 | 39 | /** @defgroup CRCEx CRCEx 40 | * @brief CRC Extended HAL module driver 41 | * @{ 42 | */ 43 | 44 | #ifdef HAL_CRC_MODULE_ENABLED 45 | 46 | /* Private typedef -----------------------------------------------------------*/ 47 | /* Private define ------------------------------------------------------------*/ 48 | /* Private macro -------------------------------------------------------------*/ 49 | /* Private variables ---------------------------------------------------------*/ 50 | /* Private function prototypes -----------------------------------------------*/ 51 | /* Exported functions --------------------------------------------------------*/ 52 | 53 | /** @defgroup CRCEx_Exported_Functions CRC Extended Exported Functions 54 | * @{ 55 | */ 56 | 57 | /** @defgroup CRCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions 58 | * @brief Extended Initialization and Configuration functions. 59 | * 60 | @verbatim 61 | =============================================================================== 62 | ##### Extended configuration functions ##### 63 | =============================================================================== 64 | [..] This section provides functions allowing to: 65 | (+) Configure the generating polynomial 66 | (+) Configure the input data inversion 67 | (+) Configure the output data inversion 68 | 69 | @endverbatim 70 | * @{ 71 | */ 72 | 73 | 74 | /** 75 | * @brief Initialize the CRC polynomial if different from default one. 76 | * @param hcrc CRC handle 77 | * @param Pol CRC generating polynomial (7, 8, 16 or 32-bit long). 78 | * This parameter is written in normal representation, e.g. 79 | * @arg for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65 80 | * @arg for a polynomial of degree 16, X^16 + X^12 + X^5 + 1 is written 0x1021 81 | * @param PolyLength CRC polynomial length. 82 | * This parameter can be one of the following values: 83 | * @arg @ref CRC_POLYLENGTH_7B 7-bit long CRC (generating polynomial of degree 7) 84 | * @arg @ref CRC_POLYLENGTH_8B 8-bit long CRC (generating polynomial of degree 8) 85 | * @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16) 86 | * @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32) 87 | * @retval HAL status 88 | */ 89 | HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength) 90 | { 91 | HAL_StatusTypeDef status = HAL_OK; 92 | uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */ 93 | 94 | /* Check the parameters */ 95 | assert_param(IS_CRC_POL_LENGTH(PolyLength)); 96 | 97 | /* Ensure that the generating polynomial is odd */ 98 | if ((Pol & (uint32_t)(0x1U)) == 0U) 99 | { 100 | status = HAL_ERROR; 101 | } 102 | else 103 | { 104 | /* check polynomial definition vs polynomial size: 105 | * polynomial length must be aligned with polynomial 106 | * definition. HAL_ERROR is reported if Pol degree is 107 | * larger than that indicated by PolyLength. 108 | * Look for MSB position: msb will contain the degree of 109 | * the second to the largest polynomial member. E.g., for 110 | * X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */ 111 | while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U)) 112 | { 113 | } 114 | 115 | switch (PolyLength) 116 | { 117 | 118 | case CRC_POLYLENGTH_7B: 119 | if (msb >= HAL_CRC_LENGTH_7B) 120 | { 121 | status = HAL_ERROR; 122 | } 123 | break; 124 | case CRC_POLYLENGTH_8B: 125 | if (msb >= HAL_CRC_LENGTH_8B) 126 | { 127 | status = HAL_ERROR; 128 | } 129 | break; 130 | case CRC_POLYLENGTH_16B: 131 | if (msb >= HAL_CRC_LENGTH_16B) 132 | { 133 | status = HAL_ERROR; 134 | } 135 | break; 136 | 137 | case CRC_POLYLENGTH_32B: 138 | /* no polynomial definition vs. polynomial length issue possible */ 139 | break; 140 | default: 141 | status = HAL_ERROR; 142 | break; 143 | } 144 | } 145 | if (status == HAL_OK) 146 | { 147 | /* set generating polynomial */ 148 | WRITE_REG(hcrc->Instance->POL, Pol); 149 | 150 | /* set generating polynomial size */ 151 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength); 152 | } 153 | /* Return function status */ 154 | return status; 155 | } 156 | 157 | /** 158 | * @brief Set the Reverse Input data mode. 159 | * @param hcrc CRC handle 160 | * @param InputReverseMode Input Data inversion mode. 161 | * This parameter can be one of the following values: 162 | * @arg @ref CRC_INPUTDATA_INVERSION_NONE no change in bit order (default value) 163 | * @arg @ref CRC_INPUTDATA_INVERSION_BYTE Byte-wise bit reversal 164 | * @arg @ref CRC_INPUTDATA_INVERSION_HALFWORD HalfWord-wise bit reversal 165 | * @arg @ref CRC_INPUTDATA_INVERSION_WORD Word-wise bit reversal 166 | * @retval HAL status 167 | */ 168 | HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode) 169 | { 170 | /* Check the parameters */ 171 | assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(InputReverseMode)); 172 | 173 | /* Change CRC peripheral state */ 174 | hcrc->State = HAL_CRC_STATE_BUSY; 175 | 176 | /* set input data inversion mode */ 177 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, InputReverseMode); 178 | /* Change CRC peripheral state */ 179 | hcrc->State = HAL_CRC_STATE_READY; 180 | 181 | /* Return function status */ 182 | return HAL_OK; 183 | } 184 | 185 | /** 186 | * @brief Set the Reverse Output data mode. 187 | * @param hcrc CRC handle 188 | * @param OutputReverseMode Output Data inversion mode. 189 | * This parameter can be one of the following values: 190 | * @arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion (default value) 191 | * @arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE bit-level inversion (e.g. for a 8-bit CRC: 0xB5 becomes 0xAD) 192 | * @retval HAL status 193 | */ 194 | HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode) 195 | { 196 | /* Check the parameters */ 197 | assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(OutputReverseMode)); 198 | 199 | /* Change CRC peripheral state */ 200 | hcrc->State = HAL_CRC_STATE_BUSY; 201 | 202 | /* set output data inversion mode */ 203 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, OutputReverseMode); 204 | 205 | /* Change CRC peripheral state */ 206 | hcrc->State = HAL_CRC_STATE_READY; 207 | 208 | /* Return function status */ 209 | return HAL_OK; 210 | } 211 | 212 | 213 | /** 214 | * @} 215 | */ 216 | 217 | 218 | /** 219 | * @} 220 | */ 221 | 222 | 223 | #endif /* HAL_CRC_MODULE_ENABLED */ 224 | /** 225 | * @} 226 | */ 227 | 228 | /** 229 | * @} 230 | */ 231 | -------------------------------------------------------------------------------- /Src/stm32u5xx_hal_ltdc_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_ltdc_ex.c 4 | * @author MCD Application Team 5 | * @brief LTDC Extension HAL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Includes ------------------------------------------------------------------*/ 20 | #include "stm32u5xx_hal.h" 21 | 22 | /** @addtogroup STM32U5xx_HAL_Driver 23 | * @{ 24 | */ 25 | 26 | #if defined(HAL_LTDC_MODULE_ENABLED) && defined(HAL_DSI_MODULE_ENABLED) 27 | 28 | #if defined (LTDC) && defined (DSI) 29 | 30 | /** @defgroup LTDCEx LTDCEx 31 | * @brief LTDC HAL module driver 32 | * @{ 33 | */ 34 | 35 | /* Private typedef -----------------------------------------------------------*/ 36 | /* Private define ------------------------------------------------------------*/ 37 | /* Private macro -------------------------------------------------------------*/ 38 | /* Private variables ---------------------------------------------------------*/ 39 | /* Private function prototypes -----------------------------------------------*/ 40 | /* Exported functions --------------------------------------------------------*/ 41 | 42 | /** @defgroup LTDCEx_Exported_Functions LTDC Extended Exported Functions 43 | * @{ 44 | */ 45 | 46 | /** @defgroup LTDCEx_Exported_Functions_Group1 Initialization and Configuration functions 47 | * @brief Initialization and Configuration functions 48 | * 49 | @verbatim 50 | =============================================================================== 51 | ##### Initialization and Configuration functions ##### 52 | =============================================================================== 53 | [..] This section provides functions allowing to: 54 | (+) Initialize and configure the LTDC 55 | 56 | @endverbatim 57 | * @{ 58 | */ 59 | 60 | /** 61 | * @brief Retrieve common parameters from DSI Video mode configuration structure 62 | * @param hltdc pointer to a LTDC_HandleTypeDef structure that contains 63 | * the configuration information for the LTDC. 64 | * @param VidCfg pointer to a DSI_VidCfgTypeDef structure that contains 65 | * the DSI video mode configuration parameters 66 | * @note The implementation of this function is taking into account the LTDC 67 | * polarities inversion as described in the current LTDC specification 68 | * @retval HAL status 69 | */ 70 | HAL_StatusTypeDef HAL_LTDCEx_StructInitFromVideoConfig(LTDC_HandleTypeDef *hltdc, DSI_VidCfgTypeDef *VidCfg) 71 | { 72 | /* Retrieve signal polarities from DSI */ 73 | 74 | /* The following polarity is inverted: 75 | LTDC_DEPOLARITY_AL <-> LTDC_DEPOLARITY_AH */ 76 | 77 | #if !defined(POLARITIES_INVERSION_UPDATED) 78 | /* Note 1 : Code in line w/ Current LTDC specification */ 79 | hltdc->Init.DEPolarity = (VidCfg->DEPolarity == \ 80 | DSI_DATA_ENABLE_ACTIVE_HIGH) ? LTDC_DEPOLARITY_AL : LTDC_DEPOLARITY_AH; 81 | hltdc->Init.VSPolarity = (VidCfg->VSPolarity == DSI_VSYNC_ACTIVE_HIGH) ? LTDC_VSPOLARITY_AH : LTDC_VSPOLARITY_AL; 82 | hltdc->Init.HSPolarity = (VidCfg->HSPolarity == DSI_HSYNC_ACTIVE_HIGH) ? LTDC_HSPOLARITY_AH : LTDC_HSPOLARITY_AL; 83 | #else 84 | /* Note 2: Code to be used in case LTDC polarities inversion updated in the specification */ 85 | hltdc->Init.DEPolarity = VidCfg->DEPolarity << 29; 86 | hltdc->Init.VSPolarity = VidCfg->VSPolarity << 29; 87 | hltdc->Init.HSPolarity = VidCfg->HSPolarity << 29; 88 | #endif /* POLARITIES_INVERSION_UPDATED */ 89 | 90 | /* Retrieve vertical timing parameters from DSI */ 91 | hltdc->Init.VerticalSync = VidCfg->VerticalSyncActive - 1U; 92 | hltdc->Init.AccumulatedVBP = VidCfg->VerticalSyncActive + VidCfg->VerticalBackPorch - 1U; 93 | hltdc->Init.AccumulatedActiveH = VidCfg->VerticalSyncActive + VidCfg->VerticalBackPorch + \ 94 | VidCfg->VerticalActive - 1U; 95 | hltdc->Init.TotalHeigh = VidCfg->VerticalSyncActive + VidCfg->VerticalBackPorch + \ 96 | VidCfg->VerticalActive + VidCfg->VerticalFrontPorch - 1U; 97 | 98 | return HAL_OK; 99 | } 100 | 101 | /** 102 | * @brief Retrieve common parameters from DSI Adapted command mode configuration structure 103 | * @param hltdc pointer to a LTDC_HandleTypeDef structure that contains 104 | * the configuration information for the LTDC. 105 | * @param CmdCfg pointer to a DSI_CmdCfgTypeDef structure that contains 106 | * the DSI command mode configuration parameters 107 | * @note The implementation of this function is taking into account the LTDC 108 | * polarities inversion as described in the current LTDC specification 109 | * @retval HAL status 110 | */ 111 | HAL_StatusTypeDef HAL_LTDCEx_StructInitFromAdaptedCommandConfig(LTDC_HandleTypeDef *hltdc, DSI_CmdCfgTypeDef *CmdCfg) 112 | { 113 | /* Retrieve signal polarities from DSI */ 114 | 115 | /* The following polarities are inverted: 116 | LTDC_DEPOLARITY_AL <-> LTDC_DEPOLARITY_AH 117 | LTDC_VSPOLARITY_AL <-> LTDC_VSPOLARITY_AH 118 | LTDC_HSPOLARITY_AL <-> LTDC_HSPOLARITY_AH)*/ 119 | 120 | #if !defined(POLARITIES_INVERSION_UPDATED) 121 | /* Note 1 : Code in line w/ Current LTDC specification */ 122 | hltdc->Init.DEPolarity = (CmdCfg->DEPolarity == \ 123 | DSI_DATA_ENABLE_ACTIVE_HIGH) ? LTDC_DEPOLARITY_AL : LTDC_DEPOLARITY_AH; 124 | hltdc->Init.VSPolarity = (CmdCfg->VSPolarity == DSI_VSYNC_ACTIVE_HIGH) ? LTDC_VSPOLARITY_AL : LTDC_VSPOLARITY_AH; 125 | hltdc->Init.HSPolarity = (CmdCfg->HSPolarity == DSI_HSYNC_ACTIVE_HIGH) ? LTDC_HSPOLARITY_AL : LTDC_HSPOLARITY_AH; 126 | #else 127 | /* Note 2: Code to be used in case LTDC polarities inversion updated in the specification */ 128 | hltdc->Init.DEPolarity = CmdCfg->DEPolarity << 29; 129 | hltdc->Init.VSPolarity = CmdCfg->VSPolarity << 29; 130 | hltdc->Init.HSPolarity = CmdCfg->HSPolarity << 29; 131 | #endif /* POLARITIES_INVERSION_UPDATED */ 132 | return HAL_OK; 133 | } 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | /** 140 | * @} 141 | */ 142 | 143 | /** 144 | * @} 145 | */ 146 | 147 | #endif /* LTDC && DSI */ 148 | 149 | #endif /* HAL_LTCD_MODULE_ENABLED && HAL_DSI_MODULE_ENABLED */ 150 | 151 | /** 152 | * @} 153 | */ 154 | 155 | -------------------------------------------------------------------------------- /Src/stm32u5xx_hal_msp_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_msp_template.c 4 | * @author MCD Application Team 5 | * @brief HAL MSP module. 6 | * This file template is located in the HAL folder and should be copied 7 | * to the user folder. 8 | * 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * Copyright (c) 2021 STMicroelectronics. 13 | * All rights reserved. 14 | * 15 | * This software is licensed under terms that can be found in the LICENSE file 16 | * in the root directory of this software component. 17 | * If no LICENSE file comes with this software, it is provided AS-IS. 18 | * 19 | ****************************************************************************** 20 | @verbatim 21 | =============================================================================== 22 | ##### How to use this driver ##### 23 | =============================================================================== 24 | [..] 25 | 26 | @endverbatim 27 | ****************************************************************************** 28 | */ 29 | 30 | /* Includes ------------------------------------------------------------------*/ 31 | #include "stm32u5xx_hal.h" 32 | 33 | /** @addtogroup STM32U5xx_HAL_Driver 34 | * @{ 35 | */ 36 | 37 | /** @defgroup HAL_MSP HAL MSP module driver 38 | * @brief HAL MSP module. 39 | * @{ 40 | */ 41 | 42 | /* Private typedef -----------------------------------------------------------*/ 43 | /* Private define ------------------------------------------------------------*/ 44 | /* Private macro -------------------------------------------------------------*/ 45 | /* Private variables ---------------------------------------------------------*/ 46 | /* Private function prototypes -----------------------------------------------*/ 47 | /* Private functions ---------------------------------------------------------*/ 48 | 49 | /** @defgroup HAL_MSP_Private_Functions HAL MSP Private Functions 50 | * @{ 51 | */ 52 | 53 | /** 54 | * @brief Initializes the Global MSP. 55 | * @retval None 56 | */ 57 | void HAL_MspInit(void) 58 | { 59 | 60 | } 61 | 62 | /** 63 | * @brief DeInitializes the Global MSP. 64 | * @retval None 65 | */ 66 | void HAL_MspDeInit(void) 67 | { 68 | 69 | } 70 | 71 | /** 72 | * @brief Initialize the PPP MSP. 73 | * @retval None 74 | */ 75 | /* 76 | void HAL_PPP_MspInit(void) 77 | { 78 | } 79 | */ 80 | 81 | /** 82 | * @brief DeInitialize the PPP MSP. 83 | * @retval None 84 | */ 85 | /* 86 | void HAL_PPP_MspDeInit(void) 87 | { 88 | } 89 | */ 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /** 100 | * @} 101 | */ 102 | -------------------------------------------------------------------------------- /Src/stm32u5xx_hal_sai_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_sai_ex.c 4 | * @author MCD Application Team 5 | * @brief SAI Extended HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionality of the SAI Peripheral Controller: 8 | * + Modify PDM microphone delays. 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2021 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "stm32u5xx_hal.h" 25 | 26 | /** @addtogroup STM32U5xx_HAL_Driver 27 | * @{ 28 | */ 29 | #ifdef HAL_SAI_MODULE_ENABLED 30 | 31 | /** @defgroup SAIEx SAIEx 32 | * @brief SAI Extended HAL module driver 33 | * @{ 34 | */ 35 | 36 | /* Private types -------------------------------------------------------------*/ 37 | /* Private variables ---------------------------------------------------------*/ 38 | /* Private constants ---------------------------------------------------------*/ 39 | /** @defgroup SAIEx_Private_Defines SAIEx Extended Private Defines 40 | * @{ 41 | */ 42 | #define SAI_PDM_DELAY_MASK 0x77U 43 | #define SAI_PDM_DELAY_OFFSET 8U 44 | #define SAI_PDM_RIGHT_DELAY_OFFSET 4U 45 | /** 46 | * @} 47 | */ 48 | 49 | /* Private macros ------------------------------------------------------------*/ 50 | /* Private functions ---------------------------------------------------------*/ 51 | /* Exported functions --------------------------------------------------------*/ 52 | /** @defgroup SAIEx_Exported_Functions SAIEx Extended Exported Functions 53 | * @{ 54 | */ 55 | 56 | /** @defgroup SAIEx_Exported_Functions_Group1 Peripheral Control functions 57 | * @brief SAIEx control functions 58 | * 59 | @verbatim 60 | =============================================================================== 61 | ##### Extended features functions ##### 62 | =============================================================================== 63 | [..] This section provides functions allowing to: 64 | (+) Modify PDM microphone delays 65 | 66 | @endverbatim 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @brief Configure PDM microphone delays. 72 | * @param hsai SAI handle. 73 | * @param pdmMicDelay Microphone delays configuration. 74 | * @retval HAL status 75 | */ 76 | HAL_StatusTypeDef HAL_SAIEx_ConfigPdmMicDelay(const SAI_HandleTypeDef *hsai, 77 | const SAIEx_PdmMicDelayParamTypeDef *pdmMicDelay) 78 | { 79 | HAL_StatusTypeDef status = HAL_OK; 80 | uint32_t offset; 81 | 82 | /* Check that SAI sub-block is SAI1 sub-block A */ 83 | if (hsai->Instance != SAI1_Block_A) 84 | { 85 | status = HAL_ERROR; 86 | } 87 | else 88 | { 89 | /* Check microphone delay parameters */ 90 | assert_param(IS_SAI_PDM_MIC_PAIRS_NUMBER(pdmMicDelay->MicPair)); 91 | assert_param(IS_SAI_PDM_MIC_DELAY(pdmMicDelay->LeftDelay)); 92 | assert_param(IS_SAI_PDM_MIC_DELAY(pdmMicDelay->RightDelay)); 93 | 94 | /* Compute offset on PDMDLY register according mic pair number */ 95 | offset = SAI_PDM_DELAY_OFFSET * (pdmMicDelay->MicPair - 1U); 96 | 97 | /* Check SAI state and offset */ 98 | if ((hsai->State != HAL_SAI_STATE_RESET) && (offset <= 24U)) 99 | { 100 | /* Reset current delays for specified microphone */ 101 | SAI1->PDMDLY &= ~(SAI_PDM_DELAY_MASK << offset); 102 | 103 | /* Apply new microphone delays */ 104 | SAI1->PDMDLY |= (((pdmMicDelay->RightDelay << SAI_PDM_RIGHT_DELAY_OFFSET) | pdmMicDelay->LeftDelay) << offset); 105 | } 106 | else 107 | { 108 | status = HAL_ERROR; 109 | } 110 | } 111 | return status; 112 | } 113 | 114 | /** 115 | * @} 116 | */ 117 | 118 | /** 119 | * @} 120 | */ 121 | 122 | /** 123 | * @} 124 | */ 125 | 126 | #endif /* HAL_SAI_MODULE_ENABLED */ 127 | /** 128 | * @} 129 | */ 130 | -------------------------------------------------------------------------------- /Src/stm32u5xx_hal_timebase_rtc_wakeup_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_timebase_rtc_wakeup_template.c 4 | * @author MCD Application Team 5 | * @brief HAL time base based on the hardware RTC_WAKEUP Template. 6 | * 7 | * This file overrides the native HAL time base functions (defined as weak) 8 | * to use the RTC WAKEUP for the time base generation: 9 | * + Initializes the RTC peripheral and configures the wakeup timer to be 10 | * incremented each 1ms 11 | * + The wakeup feature is configured to assert an interrupt each 1ms 12 | * + HAL_IncTick is called inside the HAL_RTCEx_WakeUpTimerEventCallback 13 | * + HSE (default), LSE or LSI can be selected as RTC clock source 14 | ****************************************************************************** 15 | * @attention 16 | * 17 | * Copyright (c) 2021 STMicroelectronics. 18 | * All rights reserved. 19 | * 20 | * This software is licensed under terms that can be found in the LICENSE file 21 | * in the root directory of this software component. 22 | * If no LICENSE file comes with this software, it is provided AS-IS. 23 | * 24 | ****************************************************************************** 25 | @verbatim 26 | ============================================================================== 27 | ##### How to use this driver ##### 28 | ============================================================================== 29 | [..] 30 | This file must be copied to the application folder and modified as follows: 31 | (#) Rename it to 'stm32u5xx_hal_timebase_rtc_wakeup.c' 32 | (#) Add this file and the RTC HAL drivers to your project and uncomment 33 | HAL_RTC_MODULE_ENABLED define in stm32u5xx_hal_conf.h 34 | 35 | [..] 36 | (@) HAL RTC alarm and HAL RTC wakeup drivers can not be used with low power modes: 37 | The wake up capability of the RTC may be intrusive in case of prior low power mode 38 | configuration requiring different wake up sources. 39 | Application/Example behavior is no more guaranteed 40 | (@) The stm32u5xx_hal_timebase_tim use is recommended for the Applications/Examples 41 | requiring low power modes 42 | 43 | @endverbatim 44 | ****************************************************************************** 45 | */ 46 | 47 | /* Includes ------------------------------------------------------------------*/ 48 | #include "stm32u5xx_hal.h" 49 | /** @addtogroup STM32U5xx_HAL_Driver 50 | * @{ 51 | */ 52 | 53 | /** @defgroup HAL_TimeBase_RTC_Alarm_Template HAL TimeBase RTC Alarm Template 54 | * @{ 55 | */ 56 | 57 | /* Private typedef -----------------------------------------------------------*/ 58 | /* Private define ------------------------------------------------------------*/ 59 | 60 | /* Uncomment the line below to select the appropriate RTC Clock source for your application: 61 | + RTC_CLOCK_SOURCE_HSE: can be selected for applications requiring timing precision. 62 | + RTC_CLOCK_SOURCE_LSE: can be selected for applications with low constraint on timing 63 | precision. 64 | + RTC_CLOCK_SOURCE_LSI: can be selected for applications with low constraint on timing 65 | precision. 66 | */ 67 | /* #define RTC_CLOCK_SOURCE_HSE */ 68 | /* #define RTC_CLOCK_SOURCE_LSE */ 69 | #define RTC_CLOCK_SOURCE_LSI 70 | 71 | /* The time base should be 1ms 72 | Time base = ((RTC_ASYNCH_PREDIV + 1) * (RTC_SYNCH_PREDIV + 1)) / RTC_CLOCK 73 | */ 74 | #if defined (RTC_CLOCK_SOURCE_HSE) 75 | #define RTC_ASYNCH_PREDIV 99U 76 | #define RTC_SYNCH_PREDIV 4U 77 | #elif defined (RTC_CLOCK_SOURCE_LSE) 78 | #define RTC_ASYNCH_PREDIV 0U 79 | #define RTC_SYNCH_PREDIV 32U 80 | #elif defined (RTC_CLOCK_SOURCE_LSI) 81 | #define RTC_ASYNCH_PREDIV 0U 82 | #define RTC_SYNCH_PREDIV 31U 83 | #else 84 | #error Please select the RTC Clock source 85 | #endif /* RTC_CLOCK_SOURCE_LSE */ 86 | 87 | /* Private macro -------------------------------------------------------------*/ 88 | /* Private variables ---------------------------------------------------------*/ 89 | static RTC_HandleTypeDef hRTC_Handle; 90 | 91 | /* Private function prototypes -----------------------------------------------*/ 92 | void RTC_IRQHandler(void); 93 | #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1U) 94 | void TimeBase_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc); 95 | #endif /* USE_HAL_RTC_REGISTER_CALLBACKS */ 96 | /* Private functions ---------------------------------------------------------*/ 97 | 98 | /** 99 | * @brief This function configures the RTC_ALARMA as a time base source. 100 | * The time source is configured to have 1ms time base with a dedicated 101 | * Tick interrupt priority. 102 | * @note This function is called automatically at the beginning of program after 103 | * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). 104 | * @param TickPriority Tick interrupt priority. 105 | * @retval HAL status 106 | */ 107 | HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) 108 | { 109 | HAL_StatusTypeDef Status; 110 | 111 | RCC_OscInitTypeDef RCC_OscInitStruct; 112 | RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; 113 | 114 | /* Disable bkup domain protection */ 115 | __HAL_RCC_PWR_CLK_ENABLE(); 116 | HAL_PWR_EnableBkUpAccess(); 117 | 118 | /* Force and Release the Backup domain reset */ 119 | __HAL_RCC_BACKUPRESET_FORCE(); 120 | __HAL_RCC_BACKUPRESET_RELEASE(); 121 | 122 | /* Enable RTC Clock */ 123 | __HAL_RCC_RTC_ENABLE(); 124 | __HAL_RCC_RTCAPB_CLK_ENABLE(); 125 | 126 | #if defined (RTC_CLOCK_SOURCE_LSE) 127 | /* Configure LSE as RTC clock source */ 128 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE; 129 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; 130 | RCC_OscInitStruct.LSEState = RCC_LSE_RTC_ONLY; 131 | PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; 132 | #elif defined (RTC_CLOCK_SOURCE_LSI) 133 | /* Configure LSI as RTC clock source */ 134 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI; 135 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; 136 | RCC_OscInitStruct.LSIState = RCC_LSI_ON; 137 | RCC_OscInitStruct.LSIDiv = RCC_LSI_DIV1; 138 | PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI; 139 | #elif defined (RTC_CLOCK_SOURCE_HSE) 140 | /* Configure HSE as RTC clock source */ 141 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 142 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; 143 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; 144 | PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_HSE_DIV32; 145 | #else 146 | #error Please select the RTC Clock source 147 | #endif /* RTC_CLOCK_SOURCE_LSE */ 148 | 149 | Status = HAL_RCC_OscConfig(&RCC_OscInitStruct); 150 | 151 | if (Status == HAL_OK) 152 | { 153 | PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC; 154 | Status = HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); 155 | } 156 | 157 | if (Status == HAL_OK) 158 | { 159 | hRTC_Handle.Instance = RTC; 160 | hRTC_Handle.Init.HourFormat = RTC_HOURFORMAT_24; 161 | hRTC_Handle.Init.AsynchPrediv = RTC_ASYNCH_PREDIV; 162 | hRTC_Handle.Init.SynchPrediv = RTC_SYNCH_PREDIV; 163 | hRTC_Handle.Init.OutPut = RTC_OUTPUT_DISABLE; 164 | hRTC_Handle.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; 165 | hRTC_Handle.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; 166 | hRTC_Handle.Init.BinMode = RTC_BINARY_NONE; 167 | 168 | Status = HAL_RTC_Init(&hRTC_Handle); 169 | 170 | #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1U) 171 | HAL_RTC_RegisterCallback(&hRTC_Handle, HAL_RTC_WAKEUPTIMER_EVENT_CB_ID, TimeBase_RTCEx_WakeUpTimerEventCallback); 172 | #endif /* USE_HAL_RTC_REGISTER_CALLBACKS */ 173 | } 174 | 175 | if (Status == HAL_OK) 176 | { 177 | Status = HAL_RTCEx_SetWakeUpTimer_IT(&hRTC_Handle, 0, RTC_WAKEUPCLOCK_CK_SPRE_16BITS, 0); 178 | } 179 | 180 | if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 181 | { 182 | /* Enable the RTC global Interrupt */ 183 | HAL_NVIC_SetPriority(RTC_IRQn, TickPriority, 0U); 184 | uwTickPrio = TickPriority; 185 | } 186 | else 187 | { 188 | Status = HAL_ERROR; 189 | } 190 | 191 | HAL_NVIC_EnableIRQ(RTC_IRQn); 192 | 193 | return Status; 194 | } 195 | 196 | /** 197 | * @brief Suspend Tick increment. 198 | * @note Disable the tick increment by disabling RTC_WKUP interrupt. 199 | * @retval None 200 | */ 201 | void HAL_SuspendTick(void) 202 | { 203 | /* Disable the write protection for RTC registers */ 204 | __HAL_RTC_WRITEPROTECTION_DISABLE(&hRTC_Handle); 205 | /* Disable WAKE UP TIMER Interrupt */ 206 | __HAL_RTC_WAKEUPTIMER_DISABLE_IT(&hRTC_Handle, RTC_IT_WUT); 207 | /* Enable the write protection for RTC registers */ 208 | __HAL_RTC_WRITEPROTECTION_ENABLE(&hRTC_Handle); 209 | } 210 | 211 | /** 212 | * @brief Resume Tick increment. 213 | * @note Enable the tick increment by Enabling RTC_WKUP interrupt. 214 | * @retval None 215 | */ 216 | void HAL_ResumeTick(void) 217 | { 218 | /* Disable the write protection for RTC registers */ 219 | __HAL_RTC_WRITEPROTECTION_DISABLE(&hRTC_Handle); 220 | /* Enable WAKE UP TIMER interrupt */ 221 | __HAL_RTC_WAKEUPTIMER_ENABLE_IT(&hRTC_Handle, RTC_IT_WUT); 222 | /* Enable the write protection for RTC registers */ 223 | __HAL_RTC_WRITEPROTECTION_ENABLE(&hRTC_Handle); 224 | } 225 | 226 | /** 227 | * @brief Wake Up Timer Event Callback in non blocking mode 228 | * @note This function is called when RTC_WKUP interrupt took place, inside 229 | * RTC_WKUP_IRQHandler(). It makes a direct call to HAL_IncTick() to increment 230 | * a global variable "uwTick" used as application time base. 231 | * @param hrtc RTC handle 232 | * @retval None 233 | */ 234 | #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1U) 235 | void TimeBase_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc) 236 | #else 237 | void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc) 238 | #endif /* USE_HAL_RTC_REGISTER_CALLBACKS */ 239 | { 240 | /* Prevent unused argument(s) compilation warning */ 241 | UNUSED(hrtc); 242 | 243 | HAL_IncTick(); 244 | } 245 | 246 | /** 247 | * @brief This function handles WAKE UP TIMER interrupt request. 248 | * @retval None 249 | */ 250 | void RTC_IRQHandler(void) 251 | { 252 | HAL_RTCEx_WakeUpTimerIRQHandler(&hRTC_Handle); 253 | } 254 | 255 | /** 256 | * @} 257 | */ 258 | 259 | /** 260 | * @} 261 | */ 262 | -------------------------------------------------------------------------------- /Src/stm32u5xx_hal_timebase_tim_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_hal_timebase_tim_template.c 4 | * @author MCD Application Team 5 | * @brief HAL time base based on the hardware TIM. 6 | * 7 | * This file overrides the native HAL time base functions (defined as weak) 8 | * the TIM time base: 9 | * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms 10 | * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms 11 | * 12 | ****************************************************************************** 13 | * @attention 14 | * 15 | * Copyright (c) 2021 STMicroelectronics. 16 | * All rights reserved. 17 | * 18 | * This software is licensed under terms that can be found in the LICENSE file 19 | * in the root directory of this software component. 20 | * If no LICENSE file comes with this software, it is provided AS-IS. 21 | * 22 | ****************************************************************************** 23 | @verbatim 24 | ============================================================================== 25 | ##### How to use this driver ##### 26 | ============================================================================== 27 | [..] 28 | This file must be copied to the application folder and modified as follows: 29 | (#) Rename it to 'stm32u5xx_hal_timebase_tim.c' 30 | (#) Add this file and the TIM HAL drivers to your project and uncomment 31 | HAL_TIM_MODULE_ENABLED define in stm32u5xx_hal_conf.h 32 | 33 | @endverbatim 34 | ****************************************************************************** 35 | */ 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32u5xx_hal.h" 39 | 40 | /** @addtogroup STM32U5xx_HAL_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup HAL_TimeBase 45 | * @{ 46 | */ 47 | 48 | /* Private typedef -----------------------------------------------------------*/ 49 | /* Private define ------------------------------------------------------------*/ 50 | /* Private macro -------------------------------------------------------------*/ 51 | /* Private variables ---------------------------------------------------------*/ 52 | static TIM_HandleTypeDef TimHandle; 53 | 54 | /* Private function prototypes -----------------------------------------------*/ 55 | void TIM6_IRQHandler(void); 56 | #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1U) 57 | void TimeBase_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim); 58 | #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ 59 | /* Private functions ---------------------------------------------------------*/ 60 | 61 | /** 62 | * @brief This function configures the TIM6 as a time base source. 63 | * The time source is configured to have 1ms time base with a dedicated 64 | * Tick interrupt priority. 65 | * @note This function is called automatically at the beginning of program after 66 | * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). 67 | * @param TickPriority Tick interrupt priority. 68 | * @retval HAL Status 69 | */ 70 | HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) 71 | { 72 | RCC_ClkInitTypeDef clkconfig; 73 | uint32_t uwTimclock; 74 | uint32_t uwAPB1Prescaler; 75 | uint32_t uwPrescalerValue; 76 | uint32_t pFLatency; 77 | HAL_StatusTypeDef Status; 78 | 79 | /* Enable TIM6 clock */ 80 | __HAL_RCC_TIM6_CLK_ENABLE(); 81 | 82 | /* Get clock configuration */ 83 | HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); 84 | 85 | /* Get APB1 prescaler */ 86 | uwAPB1Prescaler = clkconfig.APB1CLKDivider; 87 | 88 | /* Compute TIM6 clock */ 89 | if (uwAPB1Prescaler == RCC_HCLK_DIV1) 90 | { 91 | uwTimclock = HAL_RCC_GetPCLK1Freq(); 92 | } 93 | else 94 | { 95 | uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq(); 96 | } 97 | 98 | /* Compute the prescaler value to have TIM6 counter clock equal to 100KHz */ 99 | uwPrescalerValue = (uint32_t)((uwTimclock / 100000U) - 1U); 100 | 101 | /* Initialize TIM6 */ 102 | TimHandle.Instance = TIM6; 103 | 104 | /* Initialize TIMx peripheral as follow: 105 | + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base. 106 | + Prescaler = (uwTimclock/100000 - 1) to have a 100KHz counter clock. 107 | + ClockDivision = 0 108 | + Counter direction = Up 109 | */ 110 | TimHandle.Init.Period = (100000U / 1000U) - 1U; 111 | TimHandle.Init.Prescaler = uwPrescalerValue; 112 | TimHandle.Init.ClockDivision = 0; 113 | TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP; 114 | Status = HAL_TIM_Base_Init(&TimHandle); 115 | if (Status == HAL_OK) 116 | { 117 | #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1U) 118 | /* Register callback */ 119 | HAL_TIM_RegisterCallback(&TimHandle, HAL_TIM_PERIOD_ELAPSED_CB_ID, TimeBase_TIM_PeriodElapsedCallback); 120 | #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ 121 | 122 | /* Start the TIM time Base generation in interrupt mode */ 123 | Status = HAL_TIM_Base_Start_IT(&TimHandle); 124 | if (Status == HAL_OK) 125 | { 126 | if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 127 | { 128 | /* Configure the TIM6 global Interrupt priority */ 129 | HAL_NVIC_SetPriority(TIM6_IRQn, TickPriority, 0); 130 | 131 | /* Enable the TIM6 global Interrupt */ 132 | HAL_NVIC_EnableIRQ(TIM6_IRQn); 133 | 134 | uwTickPrio = TickPriority; 135 | } 136 | else 137 | { 138 | Status = HAL_ERROR; 139 | } 140 | } 141 | } 142 | 143 | /* Return function Status */ 144 | return Status; 145 | } 146 | 147 | /** 148 | * @brief Suspend Tick increment. 149 | * @note Disable the tick increment by disabling TIM6 update interrupt. 150 | * @param None 151 | * @retval None 152 | */ 153 | void HAL_SuspendTick(void) 154 | { 155 | /* Disable TIM6 update Interrupt */ 156 | __HAL_TIM_DISABLE_IT(&TimHandle, TIM_IT_UPDATE); 157 | } 158 | 159 | /** 160 | * @brief Resume Tick increment. 161 | * @note Enable the tick increment by Enabling TIM6 update interrupt. 162 | * @param None 163 | * @retval None 164 | */ 165 | void HAL_ResumeTick(void) 166 | { 167 | /* Enable TIM6 Update interrupt */ 168 | __HAL_TIM_ENABLE_IT(&TimHandle, TIM_IT_UPDATE); 169 | } 170 | 171 | /** 172 | * @brief Period elapsed callback in non blocking mode 173 | * @note This function is called when TIM6 interrupt took place, inside 174 | * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment 175 | * a global variable "uwTick" used as application time base. 176 | * @param htim TIM handle 177 | * @retval None 178 | */ 179 | #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1U) 180 | void TimeBase_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) 181 | #else 182 | void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) 183 | #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ 184 | { 185 | /* Prevent unused argument(s) compilation warning */ 186 | UNUSED(htim); 187 | 188 | HAL_IncTick(); 189 | } 190 | 191 | /** 192 | * @brief This function handles TIM interrupt request. 193 | * @param None 194 | * @retval None 195 | */ 196 | void TIM6_IRQHandler(void) 197 | { 198 | HAL_TIM_IRQHandler(&TimHandle); 199 | } 200 | 201 | /** 202 | * @} 203 | */ 204 | 205 | /** 206 | * @} 207 | */ 208 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_cordic.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_cordic.c 4 | * @author MCD Application Team 5 | * @brief CORDIC LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_cordic.h" 22 | #include "stm32u5xx_ll_bus.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif /* USE_FULL_ASSERT */ 28 | 29 | /** @addtogroup STM32U5xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined(CORDIC) 34 | 35 | /** @addtogroup CORDIC_LL 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | /* Private function prototypes -----------------------------------------------*/ 44 | 45 | /* Exported functions --------------------------------------------------------*/ 46 | /** @addtogroup CORDIC_LL_Exported_Functions 47 | * @{ 48 | */ 49 | 50 | /** @addtogroup CORDIC_LL_EF_Init 51 | * @{ 52 | */ 53 | 54 | /** 55 | * @brief De-Initialize CORDIC peripheral registers to their default reset values. 56 | * @param CORDICx CORDIC Instance 57 | * @retval An ErrorStatus enumeration value: 58 | * - SUCCESS: CORDIC registers are de-initialized 59 | * - ERROR: CORDIC registers are not de-initialized 60 | */ 61 | ErrorStatus LL_CORDIC_DeInit(const CORDIC_TypeDef *CORDICx) 62 | { 63 | ErrorStatus status = SUCCESS; 64 | 65 | /* Check the parameters */ 66 | assert_param(IS_CORDIC_ALL_INSTANCE(CORDICx)); 67 | 68 | if (CORDICx == CORDIC) 69 | { 70 | /* Force CORDIC reset */ 71 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_CORDIC); 72 | 73 | /* Release CORDIC reset */ 74 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_CORDIC); 75 | } 76 | else 77 | { 78 | status = ERROR; 79 | } 80 | 81 | return (status); 82 | } 83 | 84 | /** 85 | * @} 86 | */ 87 | 88 | /** 89 | * @} 90 | */ 91 | 92 | /** 93 | * @} 94 | */ 95 | 96 | #endif /* defined(CORDIC) */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | #endif /* USE_FULL_LL_DRIVER */ 103 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_crc.c 4 | * @author MCD Application Team 5 | * @brief CRC LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_crc.h" 22 | #include "stm32u5xx_ll_bus.h" 23 | 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif /* USE_FULL_ASSERT */ 29 | 30 | /** @addtogroup STM32U5xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (CRC) 35 | 36 | /** @addtogroup CRC_LL 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /* Private function prototypes -----------------------------------------------*/ 45 | 46 | /* Exported functions --------------------------------------------------------*/ 47 | /** @addtogroup CRC_LL_Exported_Functions 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup CRC_LL_EF_Init 52 | * @{ 53 | */ 54 | 55 | /** 56 | * @brief De-initialize CRC registers (Registers restored to their default values). 57 | * @param CRCx CRC Instance 58 | * @retval An ErrorStatus enumeration value: 59 | * - SUCCESS: CRC registers are de-initialized 60 | * - ERROR: CRC registers are not de-initialized 61 | */ 62 | ErrorStatus LL_CRC_DeInit(const CRC_TypeDef *CRCx) 63 | { 64 | ErrorStatus status = SUCCESS; 65 | 66 | /* Check the parameters */ 67 | assert_param(IS_CRC_ALL_INSTANCE(CRCx)); 68 | 69 | if (CRCx == CRC) 70 | { 71 | /* Force CRC reset */ 72 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_CRC); 73 | 74 | /* Release CRC reset */ 75 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_CRC); 76 | } 77 | else 78 | { 79 | status = ERROR; 80 | } 81 | 82 | return (status); 83 | } 84 | 85 | /** 86 | * @} 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** 94 | * @} 95 | */ 96 | 97 | #endif /* defined (CRC) */ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | #endif /* USE_FULL_LL_DRIVER */ 104 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_crs.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_crs.h 4 | * @author MCD Application Team 5 | * @brief CRS LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_crs.h" 22 | #include "stm32u5xx_ll_bus.h" 23 | 24 | /** @addtogroup STM32U5xx_LL_Driver 25 | * @{ 26 | */ 27 | 28 | #if defined(CRS) 29 | 30 | /** @defgroup CRS_LL CRS 31 | * @{ 32 | */ 33 | 34 | /* Private types -------------------------------------------------------------*/ 35 | /* Private variables ---------------------------------------------------------*/ 36 | /* Private constants ---------------------------------------------------------*/ 37 | /* Private macros ------------------------------------------------------------*/ 38 | /* Private function prototypes -----------------------------------------------*/ 39 | 40 | /* Exported functions --------------------------------------------------------*/ 41 | /** @addtogroup CRS_LL_Exported_Functions 42 | * @{ 43 | */ 44 | 45 | /** @addtogroup CRS_LL_EF_Init 46 | * @{ 47 | */ 48 | 49 | /** 50 | * @brief De-Initializes CRS peripheral registers to their default reset values. 51 | * @retval An ErrorStatus enumeration value: 52 | * - SUCCESS: CRS registers are de-initialized 53 | * - ERROR: not applicable 54 | */ 55 | ErrorStatus LL_CRS_DeInit(void) 56 | { 57 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_CRS); 58 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_CRS); 59 | 60 | return SUCCESS; 61 | } 62 | 63 | 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | #endif /* defined(CRS) */ 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | #endif /* USE_FULL_LL_DRIVER */ 84 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_dlyb.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_dlyb.c 4 | * @author MCD Application Team 5 | * @brief DelayBlock Low Layer HAL module driver. 6 | * 7 | * This file provides firmware functions to manage the following 8 | * functionalities of the DelayBlock peripheral: 9 | * + input clock frequency 10 | * + up to 12 oversampling phases 11 | * 12 | ****************************************************************************** 13 | * @attention 14 | * 15 | * Copyright (c) 2021 STMicroelectronics. 16 | * All rights reserved. 17 | * 18 | * This software is licensed under terms that can be found in the LICENSE file 19 | * in the root directory of this software component. 20 | * If no LICENSE file comes with this software, it is provided AS-IS. 21 | * 22 | ****************************************************************************** 23 | @verbatim 24 | ============================================================================== 25 | ##### DelayBlock peripheral features ##### 26 | ============================================================================== 27 | [..] The DelayBlock is used to generate an Output clock which is de-phased from the Input 28 | clock. The phase of the Output clock is programmed by FW. The Output clock is then used 29 | to clock the receive data in i.e. a SDMMC, OSPI or QSPI interface. 30 | The delay is Voltage and Temperature dependent, which may require FW to do re-tuning 31 | and recenter the Output clock phase to the receive data. 32 | 33 | [..] The DelayBlock features include the following: 34 | (+) Input clock frequency. 35 | (+) Up to 12 oversampling phases. 36 | 37 | ##### How to use this driver ##### 38 | ============================================================================== 39 | [..] 40 | This driver is a considered as a driver of service for external devices drivers 41 | that interfaces with the DELAY peripheral. 42 | The LL_DLYB_SetDelay() function, configure the Delay value configured on SEL and UNIT. 43 | The LL_DLYB_GetDelay() function, return the Delay value configured on SEL and UNIT. 44 | The LL_DLYB_GetClockPeriod()function, get the clock period. 45 | 46 | 47 | @endverbatim 48 | ****************************************************************************** 49 | */ 50 | 51 | /* Includes ------------------------------------------------------------------*/ 52 | #include "stm32u5xx_hal.h" 53 | 54 | /** @addtogroup STM32U5xx_LL_Driver 55 | * @{ 56 | */ 57 | 58 | /** @defgroup DLYB_LL DLYB 59 | * @brief DLYB LL module driver. 60 | * @{ 61 | */ 62 | 63 | #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_OSPI_MODULE_ENABLED) || defined(HAL_XSPI_MODULE_ENABLED) 64 | #if defined (DLYB_SDMMC1) || defined (DLYB_SDMMC2) || defined (DLYB_OCTOSPI1) || defined (DLYB_OCTOSPI2) 65 | 66 | /** 67 | @cond 0 68 | */ 69 | 70 | /* Private typedef -----------------------------------------------------------*/ 71 | /* Private define ------------------------------------------------------------*/ 72 | #define DLYB_TIMEOUT 0xFFU 73 | #define DLYB_LNG_10_0_MASK 0x07FF0000U 74 | #define DLYB_LNG_11_10_MASK 0x0C000000U 75 | /* Private macro -------------------------------------------------------------*/ 76 | /* Private variables ---------------------------------------------------------*/ 77 | /* Private function prototypes -----------------------------------------------*/ 78 | 79 | /** 80 | @endcond 81 | */ 82 | 83 | /* Exported functions --------------------------------------------------------*/ 84 | 85 | /** @addtogroup DLYB_LL_Exported_Functions 86 | * @brief Configuration and control functions 87 | * 88 | @verbatim 89 | =============================================================================== 90 | ##### Control functions ##### 91 | =============================================================================== 92 | [..] This section provides functions allowing to 93 | (+) Control the DLYB. 94 | @endverbatim 95 | * @{ 96 | */ 97 | 98 | /** @addtogroup DLYB_Control_Functions DLYB Control functions 99 | * @{ 100 | */ 101 | 102 | /** 103 | * @brief Set the Delay value configured on SEL and UNIT. 104 | * @param DLYBx: Pointer to DLYB instance. 105 | * @param pdlyb_cfg: Pointer to DLYB configuration structure. 106 | * @retval An ErrorStatus enumeration value: 107 | * - SUCCESS: the Delay value is set. 108 | * - ERROR: the Delay value is not set. 109 | */ 110 | void LL_DLYB_SetDelay(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg) 111 | { 112 | /* Check the DelayBlock instance */ 113 | assert_param(IS_DLYB_ALL_INSTANCE(DLYBx)); 114 | 115 | /* Enable the length sampling */ 116 | SET_BIT(DLYBx->CR, DLYB_CR_SEN); 117 | 118 | /* Update the UNIT and SEL field */ 119 | DLYBx->CFGR = (pdlyb_cfg->PhaseSel) | ((pdlyb_cfg->Units) << DLYB_CFGR_UNIT_Pos); 120 | 121 | /* Disable the length sampling */ 122 | CLEAR_BIT(DLYBx->CR, DLYB_CR_SEN); 123 | } 124 | 125 | /** 126 | * @brief Get the Delay value configured on SEL and UNIT. 127 | * @param DLYBx: Pointer to DLYB instance. 128 | * @param pdlyb_cfg: Pointer to DLYB configuration structure. 129 | * @retval An ErrorStatus enumeration value: 130 | * - SUCCESS: the Delay value is received. 131 | * - ERROR: the Delay value is not received. 132 | */ 133 | void LL_DLYB_GetDelay(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg) 134 | { 135 | /* Check the DelayBlock instance */ 136 | assert_param(IS_DLYB_ALL_INSTANCE(DLYBx)); 137 | 138 | /* Fill the DelayBlock configuration structure with SEL and UNIT value */ 139 | pdlyb_cfg->Units = ((DLYBx->CFGR & DLYB_CFGR_UNIT) >> DLYB_CFGR_UNIT_Pos); 140 | pdlyb_cfg->PhaseSel = (DLYBx->CFGR & DLYB_CFGR_SEL); 141 | } 142 | 143 | /** 144 | * @brief Get the clock period. 145 | * @param DLYBx: Pointer to DLYB instance. 146 | * @param pdlyb_cfg: Pointer to DLYB configuration structure. 147 | * @retval An ErrorStatus enumeration value: 148 | * - SUCCESS: there is a valid period detected and stored in pdlyb_cfg. 149 | * - ERROR: there is no valid period detected. 150 | */ 151 | uint32_t LL_DLYB_GetClockPeriod(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg) 152 | { 153 | uint32_t i = 0U; 154 | uint32_t nb ; 155 | uint32_t lng ; 156 | uint32_t tickstart; 157 | 158 | /* Check the DelayBlock instance */ 159 | assert_param(IS_DLYB_ALL_INSTANCE(DLYBx)); 160 | 161 | /* Enable the length sampling */ 162 | SET_BIT(DLYBx->CR, DLYB_CR_SEN); 163 | 164 | /* Delay line length detection */ 165 | while (i < DLYB_MAX_UNIT) 166 | { 167 | /* Set the Delay of the UNIT(s)*/ 168 | DLYBx->CFGR = DLYB_MAX_SELECT | (i << DLYB_CFGR_UNIT_Pos); 169 | 170 | /* Waiting for a LNG valid value */ 171 | tickstart = HAL_GetTick(); 172 | while ((DLYBx->CFGR & DLYB_CFGR_LNGF) == 0U) 173 | { 174 | if ((HAL_GetTick() - tickstart) >= DLYB_TIMEOUT) 175 | { 176 | /* New check to avoid false timeout detection in case of preemption */ 177 | if ((DLYBx->CFGR & DLYB_CFGR_LNGF) == 0U) 178 | { 179 | return (uint32_t) HAL_TIMEOUT; 180 | } 181 | } 182 | } 183 | 184 | if ((DLYBx->CFGR & DLYB_LNG_10_0_MASK) != 0U) 185 | { 186 | if ((DLYBx->CFGR & (DLYB_CFGR_LNG_11 | DLYB_CFGR_LNG_10)) != DLYB_LNG_11_10_MASK) 187 | { 188 | /* Delay line length is configured to one input clock period*/ 189 | break; 190 | } 191 | } 192 | i++; 193 | } 194 | 195 | if (DLYB_MAX_UNIT != i) 196 | { 197 | /* Determine how many unit delays (nb) span one input clock period */ 198 | lng = (DLYBx->CFGR & DLYB_CFGR_LNG) >> 16U; 199 | nb = 10U; 200 | while ((nb > 0U) && ((lng >> nb) == 0U)) 201 | { 202 | nb--; 203 | } 204 | if (nb != 0U) 205 | { 206 | pdlyb_cfg->PhaseSel = nb ; 207 | pdlyb_cfg->Units = i ; 208 | 209 | /* Disable the length sampling */ 210 | CLEAR_BIT(DLYBx->CR, DLYB_CR_SEN); 211 | 212 | return (uint32_t)SUCCESS; 213 | } 214 | } 215 | 216 | /* Disable the length sampling */ 217 | CLEAR_BIT(DLYBx->CR, DLYB_CR_SEN); 218 | 219 | return (uint32_t)ERROR; 220 | 221 | } 222 | 223 | /** 224 | * @} 225 | */ 226 | 227 | /** 228 | * @} 229 | */ 230 | 231 | /** 232 | * @} 233 | */ 234 | #endif /* DLYB_SDMMC1 || DLYB_SDMMC2 || DLYB_OCTOSPI1 || DLYB_OCTOSPI2 */ 235 | #endif /* HAL_SD_MODULE_ENABLED || HAL_OSPI_MODULE_ENABLED || HAL_XSPI_MODULE_ENABLED */ 236 | 237 | /** 238 | * @} 239 | */ 240 | 241 | /** 242 | * @} 243 | */ 244 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_exti.c 4 | * @author MCD Application Team 5 | * @brief EXTI LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_exti.h" 22 | #ifdef USE_FULL_ASSERT 23 | #include "stm32_assert.h" 24 | #else 25 | #define assert_param(expr) ((void)0U) 26 | #endif /* USE_FULL_ASSERT */ 27 | 28 | /** @addtogroup STM32U5xx_LL_Driver 29 | * @{ 30 | */ 31 | 32 | #if defined (EXTI) 33 | 34 | /** @defgroup EXTI_LL EXTI 35 | * @{ 36 | */ 37 | 38 | /* Private types -------------------------------------------------------------*/ 39 | /* Private variables ---------------------------------------------------------*/ 40 | /* Private constants ---------------------------------------------------------*/ 41 | /* Private macros ------------------------------------------------------------*/ 42 | /** @addtogroup EXTI_LL_Private_Macros 43 | * @{ 44 | */ 45 | 46 | #define IS_LL_EXTI_LINE_0_31(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U) 47 | 48 | #define IS_LL_EXTI_MODE(__VALUE__) (((__VALUE__) == LL_EXTI_MODE_IT) \ 49 | || ((__VALUE__) == LL_EXTI_MODE_EVENT) \ 50 | || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT)) 51 | 52 | 53 | #define IS_LL_EXTI_TRIGGER(__VALUE__) (((__VALUE__) == LL_EXTI_TRIGGER_NONE) \ 54 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING) \ 55 | || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING) \ 56 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING)) 57 | 58 | /** 59 | * @} 60 | */ 61 | 62 | /* Private function prototypes -----------------------------------------------*/ 63 | 64 | /* Exported functions --------------------------------------------------------*/ 65 | /** @addtogroup EXTI_LL_Exported_Functions 66 | * @{ 67 | */ 68 | 69 | /** @addtogroup EXTI_LL_EF_Init 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief De-initialize the EXTI registers to their default reset values. 75 | * @retval An ErrorStatus enumeration value: 76 | * - SUCCESS: EXTI registers are de-initialized 77 | * - ERROR: not applicable 78 | */ 79 | ErrorStatus LL_EXTI_DeInit(void) 80 | { 81 | /* Interrupt mask register set to default reset values */ 82 | LL_EXTI_WriteReg(IMR1, 0x00000000U); 83 | /* Event mask register set to default reset values */ 84 | LL_EXTI_WriteReg(EMR1, 0x00000000U); 85 | /* Rising Trigger selection register set to default reset values */ 86 | LL_EXTI_WriteReg(RTSR1, 0x00000000U); 87 | /* Falling Trigger selection register set to default reset values */ 88 | LL_EXTI_WriteReg(FTSR1, 0x00000000U); 89 | /* Software interrupt event register set to default reset values */ 90 | LL_EXTI_WriteReg(SWIER1, 0x00000000U); 91 | /* Pending register set to default reset values */ 92 | LL_EXTI_WriteReg(RPR1, 0xFFFFFFFFU); 93 | LL_EXTI_WriteReg(FPR1, 0xFFFFFFFFU); 94 | /* Privilege register set to default reset values */ 95 | LL_EXTI_WriteReg(PRIVCFGR1, 0x00000000U); 96 | #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 97 | /* Secure register set to default reset values */ 98 | LL_EXTI_WriteReg(SECCFGR1, 0x00000000U); 99 | #endif /* __ARM_FEATURE_CMSE */ 100 | return SUCCESS; 101 | } 102 | 103 | /** 104 | * @brief Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct. 105 | * @param EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure. 106 | * @retval An ErrorStatus enumeration value: 107 | * - SUCCESS: EXTI registers are initialized 108 | * - ERROR: not applicable 109 | */ 110 | ErrorStatus LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct) 111 | { 112 | ErrorStatus status = SUCCESS; 113 | /* Check the parameters */ 114 | assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31)); 115 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand)); 116 | assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode)); 117 | 118 | /* ENABLE LineCommand */ 119 | if (EXTI_InitStruct->LineCommand != DISABLE) 120 | { 121 | assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger)); 122 | 123 | /* Configure EXTI Lines in range from 0 to 31 */ 124 | if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE) 125 | { 126 | switch (EXTI_InitStruct->Mode) 127 | { 128 | case LL_EXTI_MODE_IT: 129 | /* First Disable Event on provided Lines */ 130 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 131 | /* Then Enable IT on provided Lines */ 132 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 133 | break; 134 | case LL_EXTI_MODE_EVENT: 135 | /* First Disable IT on provided Lines */ 136 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 137 | /* Then Enable Event on provided Lines */ 138 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 139 | break; 140 | case LL_EXTI_MODE_IT_EVENT: 141 | /* Directly Enable IT & Event on provided Lines */ 142 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 143 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 144 | break; 145 | default: 146 | status = ERROR; 147 | break; 148 | } 149 | if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE) 150 | { 151 | switch (EXTI_InitStruct->Trigger) 152 | { 153 | case LL_EXTI_TRIGGER_RISING: 154 | /* First Disable Falling Trigger on provided Lines */ 155 | LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 156 | /* Then Enable Rising Trigger on provided Lines */ 157 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 158 | break; 159 | case LL_EXTI_TRIGGER_FALLING: 160 | /* First Disable Rising Trigger on provided Lines */ 161 | LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 162 | /* Then Enable Falling Trigger on provided Lines */ 163 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 164 | break; 165 | case LL_EXTI_TRIGGER_RISING_FALLING: 166 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 167 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 168 | break; 169 | default: 170 | status = ERROR; 171 | break; 172 | } 173 | } 174 | } 175 | } 176 | /* DISABLE LineCommand */ 177 | else 178 | { 179 | /* De-configure EXTI Lines in range from 0 to 31 */ 180 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 181 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 182 | } 183 | return status; 184 | } 185 | 186 | /** 187 | * @brief Set each @ref LL_EXTI_InitTypeDef field to default value. 188 | * @param EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure. 189 | * @retval None 190 | */ 191 | void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct) 192 | { 193 | EXTI_InitStruct->Line_0_31 = LL_EXTI_LINE_NONE; 194 | EXTI_InitStruct->LineCommand = DISABLE; 195 | EXTI_InitStruct->Mode = LL_EXTI_MODE_IT; 196 | EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING; 197 | } 198 | 199 | /** 200 | * @} 201 | */ 202 | 203 | /** 204 | * @} 205 | */ 206 | 207 | /** 208 | * @} 209 | */ 210 | 211 | #endif /* defined (EXTI) */ 212 | 213 | /** 214 | * @} 215 | */ 216 | 217 | #endif /* USE_FULL_LL_DRIVER */ 218 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_fmac.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_fmac.c 4 | * @author MCD Application Team 5 | * @brief Header for stm32u5xx_ll_fmac.c module 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_fmac.h" 22 | #include "stm32u5xx_ll_bus.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif /* USE_FULL_ASSERT */ 28 | 29 | /** @addtogroup STM32U5xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined(FMAC) 34 | 35 | /** @addtogroup FMAC_LL 36 | * @{ 37 | */ 38 | 39 | /* Private typedef -----------------------------------------------------------*/ 40 | /* Private defines -----------------------------------------------------------*/ 41 | /* Private macros ------------------------------------------------------------*/ 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* Global variables ----------------------------------------------------------*/ 44 | /* Private function prototypes -----------------------------------------------*/ 45 | /* Functions Definition ------------------------------------------------------*/ 46 | /** @addtogroup FMAC_LL_Exported_Functions 47 | * @{ 48 | */ 49 | 50 | /** @addtogroup FMAC_LL_EF_Init 51 | * @{ 52 | */ 53 | 54 | /** 55 | * @brief Initialize FMAC peripheral registers to their default reset values. 56 | * @param FMACx FMAC Instance 57 | * @retval ErrorStatus enumeration value: 58 | * - SUCCESS: FMAC registers are initialized 59 | * - ERROR: FMAC registers are not initialized 60 | */ 61 | ErrorStatus LL_FMAC_Init(FMAC_TypeDef *FMACx) 62 | { 63 | ErrorStatus status = SUCCESS; 64 | 65 | /* Check the parameters */ 66 | assert_param(IS_FMAC_ALL_INSTANCE(FMACx)); 67 | 68 | if (FMACx == FMAC) 69 | { 70 | /* Perform the reset */ 71 | LL_FMAC_EnableReset(FMACx); 72 | 73 | /* Wait until flag is reset */ 74 | while (LL_FMAC_IsEnabledReset(FMACx) != 0UL) 75 | { 76 | } 77 | } 78 | else 79 | { 80 | status = ERROR; 81 | } 82 | 83 | return (status); 84 | } 85 | 86 | /** 87 | * @brief De-Initialize FMAC peripheral registers to their default reset values. 88 | * @param FMACx FMAC Instance 89 | * @retval An ErrorStatus enumeration value: 90 | * - SUCCESS: FMAC registers are de-initialized 91 | * - ERROR: FMAC registers are not de-initialized 92 | */ 93 | ErrorStatus LL_FMAC_DeInit(const FMAC_TypeDef *FMACx) 94 | { 95 | ErrorStatus status = SUCCESS; 96 | 97 | /* Check the parameters */ 98 | assert_param(IS_FMAC_ALL_INSTANCE(FMACx)); 99 | 100 | if (FMACx == FMAC) 101 | { 102 | /* Force FMAC reset */ 103 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_FMAC); 104 | 105 | /* Release FMAC reset */ 106 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_FMAC); 107 | } 108 | else 109 | { 110 | status = ERROR; 111 | } 112 | 113 | return (status); 114 | } 115 | 116 | /** 117 | * @} 118 | */ 119 | 120 | /** 121 | * @} 122 | */ 123 | 124 | /** 125 | * @} 126 | */ 127 | 128 | #endif /* defined(FMAC) */ 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | #endif /* USE_FULL_LL_DRIVER */ 135 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_i2c.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_i2c.c 4 | * @author MCD Application Team 5 | * @brief I2C LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_i2c.h" 22 | #include "stm32u5xx_ll_bus.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif /* USE_FULL_ASSERT */ 28 | 29 | /** @addtogroup STM32U5xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined (I2C1) || defined (I2C2) || defined (I2C3) || defined (I2C4) || defined (I2C5) || defined (I2C6) 34 | 35 | /** @defgroup I2C_LL I2C 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | /** @addtogroup I2C_LL_Private_Macros 44 | * @{ 45 | */ 46 | 47 | #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \ 48 | ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \ 49 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \ 50 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP)) 51 | 52 | #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \ 53 | ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE)) 54 | 55 | #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU) 56 | 57 | #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU) 58 | 59 | #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \ 60 | ((__VALUE__) == LL_I2C_NACK)) 61 | 62 | #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \ 63 | ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT)) 64 | /** 65 | * @} 66 | */ 67 | 68 | /* Private function prototypes -----------------------------------------------*/ 69 | 70 | /* Exported functions --------------------------------------------------------*/ 71 | /** @addtogroup I2C_LL_Exported_Functions 72 | * @{ 73 | */ 74 | 75 | /** @addtogroup I2C_LL_EF_Init 76 | * @{ 77 | */ 78 | 79 | /** 80 | * @brief De-initialize the I2C registers to their default reset values. 81 | * @param I2Cx I2C Instance. 82 | * @retval An ErrorStatus enumeration value: 83 | * - SUCCESS: I2C registers are de-initialized 84 | * - ERROR: I2C registers are not de-initialized 85 | */ 86 | ErrorStatus LL_I2C_DeInit(const I2C_TypeDef *I2Cx) 87 | { 88 | ErrorStatus status = SUCCESS; 89 | 90 | /* Check the I2C Instance I2Cx */ 91 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 92 | 93 | if (I2Cx == I2C1) 94 | { 95 | /* Force reset of I2C clock */ 96 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1); 97 | 98 | /* Release reset of I2C clock */ 99 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1); 100 | } 101 | else if (I2Cx == I2C2) 102 | { 103 | /* Force reset of I2C clock */ 104 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2); 105 | 106 | /* Release reset of I2C clock */ 107 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2); 108 | 109 | } 110 | else if (I2Cx == I2C3) 111 | { 112 | /* Force reset of I2C clock */ 113 | LL_APB3_GRP1_ForceReset(LL_APB3_GRP1_PERIPH_I2C3); 114 | 115 | /* Release reset of I2C clock */ 116 | LL_APB3_GRP1_ReleaseReset(LL_APB3_GRP1_PERIPH_I2C3); 117 | } 118 | else if (I2Cx == I2C4) 119 | { 120 | /* Force reset of I2C clock */ 121 | LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_I2C4); 122 | 123 | /* Release reset of I2C clock */ 124 | LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_I2C4); 125 | } 126 | #if defined(I2C5) 127 | else if (I2Cx == I2C5) 128 | { 129 | /* Force reset of I2C clock */ 130 | LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_I2C5); 131 | 132 | /* Release reset of I2C clock */ 133 | LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_I2C5); 134 | } 135 | #endif /* I2C5 */ 136 | #if defined(I2C6) 137 | else if (I2Cx == I2C6) 138 | { 139 | /* Force reset of I2C clock */ 140 | LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_I2C6); 141 | 142 | /* Release reset of I2C clock */ 143 | LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_I2C6); 144 | } 145 | #endif /* I2C6 */ 146 | else 147 | { 148 | status = ERROR; 149 | } 150 | 151 | return status; 152 | } 153 | 154 | /** 155 | * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct. 156 | * @param I2Cx I2C Instance. 157 | * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure. 158 | * @retval An ErrorStatus enumeration value: 159 | * - SUCCESS: I2C registers are initialized 160 | * - ERROR: Not applicable 161 | */ 162 | ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, const LL_I2C_InitTypeDef *I2C_InitStruct) 163 | { 164 | /* Check the I2C Instance I2Cx */ 165 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 166 | 167 | /* Check the I2C parameters from I2C_InitStruct */ 168 | assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode)); 169 | assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter)); 170 | assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter)); 171 | assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1)); 172 | assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge)); 173 | assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize)); 174 | 175 | /* Disable the selected I2Cx Peripheral */ 176 | LL_I2C_Disable(I2Cx); 177 | 178 | /*---------------------------- I2Cx CR1 Configuration ------------------------ 179 | * Configure the analog and digital noise filters with parameters : 180 | * - AnalogFilter: I2C_CR1_ANFOFF bit 181 | * - DigitalFilter: I2C_CR1_DNF[3:0] bits 182 | */ 183 | LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter); 184 | 185 | /*---------------------------- I2Cx TIMINGR Configuration -------------------- 186 | * Configure the SDA setup, hold time and the SCL high, low period with parameter : 187 | * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0], 188 | * I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits 189 | */ 190 | LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing); 191 | 192 | /* Enable the selected I2Cx Peripheral */ 193 | LL_I2C_Enable(I2Cx); 194 | 195 | /*---------------------------- I2Cx OAR1 Configuration ----------------------- 196 | * Disable, Configure and Enable I2Cx device own address 1 with parameters : 197 | * - OwnAddress1: I2C_OAR1_OA1[9:0] bits 198 | * - OwnAddrSize: I2C_OAR1_OA1MODE bit 199 | */ 200 | LL_I2C_DisableOwnAddress1(I2Cx); 201 | LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize); 202 | 203 | /* OwnAdress1 == 0 is reserved for General Call address */ 204 | if (I2C_InitStruct->OwnAddress1 != 0U) 205 | { 206 | LL_I2C_EnableOwnAddress1(I2Cx); 207 | } 208 | 209 | /*---------------------------- I2Cx MODE Configuration ----------------------- 210 | * Configure I2Cx peripheral mode with parameter : 211 | * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits 212 | */ 213 | LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode); 214 | 215 | /*---------------------------- I2Cx CR2 Configuration ------------------------ 216 | * Configure the ACKnowledge or Non ACKnowledge condition 217 | * after the address receive match code or next received byte with parameter : 218 | * - TypeAcknowledge: I2C_CR2_NACK bit 219 | */ 220 | LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge); 221 | 222 | return SUCCESS; 223 | } 224 | 225 | /** 226 | * @brief Set each @ref LL_I2C_InitTypeDef field to default value. 227 | * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure. 228 | * @retval None 229 | */ 230 | void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct) 231 | { 232 | /* Set I2C_InitStruct fields to default values */ 233 | I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C; 234 | I2C_InitStruct->Timing = 0U; 235 | I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE; 236 | I2C_InitStruct->DigitalFilter = 0U; 237 | I2C_InitStruct->OwnAddress1 = 0U; 238 | I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK; 239 | I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; 240 | } 241 | 242 | /** 243 | * @} 244 | */ 245 | 246 | /** 247 | * @} 248 | */ 249 | 250 | /** 251 | * @} 252 | */ 253 | 254 | #endif /* I2C1 || I2C2 || I2C3 || I2C4 || I2C5 || I2C6 */ 255 | 256 | /** 257 | * @} 258 | */ 259 | 260 | #endif /* USE_FULL_LL_DRIVER */ 261 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_icache.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_icache.c 4 | * @author MCD Application Team 5 | * @brief ICACHE LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_icache.h" 22 | #ifdef USE_FULL_ASSERT 23 | #include "stm32_assert.h" 24 | #else 25 | #define assert_param(expr) ((void)0U) 26 | #endif /* USE_FULL_ASSERT */ 27 | 28 | /** @addtogroup STM32U5xx_LL_Driver 29 | * @{ 30 | */ 31 | 32 | #if defined(ICACHE) 33 | 34 | /** @defgroup ICACHE_LL ICACHE 35 | * @{ 36 | */ 37 | 38 | /* Private types -------------------------------------------------------------*/ 39 | /* Private variables ---------------------------------------------------------*/ 40 | /* Private constants ---------------------------------------------------------*/ 41 | /* Private macros ------------------------------------------------------------*/ 42 | /** @defgroup ICACHE_LL_Private_Macros ICACHE Private Macros 43 | * @{ 44 | */ 45 | 46 | #define IS_LL_ICACHE_REGION(__VALUE__) (((__VALUE__) == LL_ICACHE_REGION_0) || \ 47 | ((__VALUE__) == LL_ICACHE_REGION_1) || \ 48 | ((__VALUE__) == LL_ICACHE_REGION_2) || \ 49 | ((__VALUE__) == LL_ICACHE_REGION_3)) 50 | 51 | #define IS_LL_ICACHE_REGION_SIZE(__VALUE__) (((__VALUE__) == LL_ICACHE_REGIONSIZE_2MB) || \ 52 | ((__VALUE__) == LL_ICACHE_REGIONSIZE_4MB) || \ 53 | ((__VALUE__) == LL_ICACHE_REGIONSIZE_8MB) || \ 54 | ((__VALUE__) == LL_ICACHE_REGIONSIZE_16MB) || \ 55 | ((__VALUE__) == LL_ICACHE_REGIONSIZE_32MB) || \ 56 | ((__VALUE__) == LL_ICACHE_REGIONSIZE_64MB) || \ 57 | ((__VALUE__) == LL_ICACHE_REGIONSIZE_128MB)) 58 | 59 | #define IS_LL_ICACHE_MASTER_PORT(__VALUE__) (((__VALUE__) == LL_ICACHE_MASTER1_PORT) || \ 60 | ((__VALUE__) == LL_ICACHE_MASTER2_PORT)) 61 | 62 | #define IS_LL_ICACHE_OUTPUT_BURST(__VALUE__) (((__VALUE__) == LL_ICACHE_OUTPUT_BURST_WRAP) || \ 63 | ((__VALUE__) == LL_ICACHE_OUTPUT_BURST_INCR)) 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | /* Private function prototypes -----------------------------------------------*/ 70 | 71 | /* Exported functions --------------------------------------------------------*/ 72 | /** @addtogroup ICACHE_LL_Exported_Functions 73 | * @{ 74 | */ 75 | 76 | /** @addtogroup ICACHE_LL_EF_REGION_Init 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief Configure and enable the memory remapped region. 82 | * @note The Instruction Cache and corresponding region must be disabled. 83 | * @param Region This parameter can be one of the following values: 84 | * @arg @ref LL_ICACHE_REGION_0 85 | * @arg @ref LL_ICACHE_REGION_1 86 | * @arg @ref LL_ICACHE_REGION_2 87 | * @arg @ref LL_ICACHE_REGION_3 88 | * @param pICACHE_RegionStruct pointer to a @ref LL_ICACHE_RegionTypeDef structure. 89 | * @retval None 90 | */ 91 | void LL_ICACHE_ConfigRegion(uint32_t Region, const LL_ICACHE_RegionTypeDef *const pICACHE_RegionStruct) 92 | { 93 | __IO uint32_t *p_reg; 94 | uint32_t value; 95 | 96 | /* Check the parameters */ 97 | assert_param(IS_LL_ICACHE_REGION(Region)); 98 | assert_param(IS_LL_ICACHE_REGION_SIZE(pICACHE_RegionStruct->Size)); 99 | assert_param(IS_LL_ICACHE_MASTER_PORT(pICACHE_RegionStruct->TrafficRoute)); 100 | assert_param(IS_LL_ICACHE_OUTPUT_BURST(pICACHE_RegionStruct->OutputBurstType)); 101 | 102 | /* Get region control register address */ 103 | p_reg = &(ICACHE->CRR0) + (1U * Region); 104 | 105 | /* Region 2MB: BaseAddress size 8 bits, RemapAddress size 11 bits */ 106 | /* Region 4MB: BaseAddress size 7 bits, RemapAddress size 10 bits */ 107 | /* Region 8MB: BaseAddress size 6 bits, RemapAddress size 9 bits */ 108 | /* Region 16MB: BaseAddress size 5 bits, RemapAddress size 8 bits */ 109 | /* Region 32MB: BaseAddress size 4 bits, RemapAddress size 7 bits */ 110 | /* Region 64MB: BaseAddress size 3 bits, RemapAddress size 6 bits */ 111 | /* Region 128MB: BaseAddress size 2 bits, RemapAddress size 5 bits */ 112 | value = ((pICACHE_RegionStruct->BaseAddress & 0x1FFFFFFFU) >> 21U) & \ 113 | (0xFFU & ~(pICACHE_RegionStruct->Size - 1U)); 114 | value |= ((pICACHE_RegionStruct->RemapAddress >> 5U) & \ 115 | ((uint32_t)(0x7FFU & ~(pICACHE_RegionStruct->Size - 1U)) << ICACHE_CRRx_REMAPADDR_Pos)); 116 | value |= (pICACHE_RegionStruct->Size << ICACHE_CRRx_RSIZE_Pos) | pICACHE_RegionStruct->TrafficRoute | \ 117 | pICACHE_RegionStruct->OutputBurstType; 118 | *p_reg = (value | ICACHE_CRRx_REN); /* Configure and enable region */ 119 | } 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | /** 130 | * @} 131 | */ 132 | 133 | #endif /* ICACHE */ 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | #endif /* USE_FULL_LL_DRIVER */ 140 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_lpgpio.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_lpgpio.c 4 | * @author MCD Application Team 5 | * @brief LPGPIO LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_lpgpio.h" 22 | #include "stm32u5xx_ll_bus.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif /* USE_FULL_ASSERT */ 28 | 29 | /** @addtogroup STM32U5xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined (LPGPIO1) 34 | 35 | /** @addtogroup LPGPIO_LL 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | /** @addtogroup LPGPIO_LL_Private_Macros 44 | * @{ 45 | */ 46 | #define IS_LL_LPGPIO_PIN(__VALUE__) (((0x00000000U) < (__VALUE__)) && ((__VALUE__) <= (LL_LPGPIO_PIN_ALL))) 47 | 48 | #define IS_LL_LPGPIO_MODE(__VALUE__) (((__VALUE__) == LL_LPGPIO_MODE_INPUT) ||\ 49 | ((__VALUE__) == LL_LPGPIO_MODE_OUTPUT)) 50 | 51 | /** 52 | * @} 53 | */ 54 | 55 | /* Private function prototypes -----------------------------------------------*/ 56 | 57 | /* Exported functions --------------------------------------------------------*/ 58 | /** @addtogroup LPGPIO_LL_Exported_Functions 59 | * @{ 60 | */ 61 | 62 | /** @addtogroup LPGPIO_LL_EF_Init 63 | * @{ 64 | */ 65 | 66 | /** 67 | * @brief De-initialize LPGPIO registers (Registers restored to their default values). 68 | * @param LPGPIOx LPGPIO Port 69 | * @retval An ErrorStatus enumeration value: 70 | * - SUCCESS: LPGPIO registers are de-initialized 71 | * - ERROR: Wrong LPGPIO Port 72 | */ 73 | ErrorStatus LL_LPGPIO_DeInit(const GPIO_TypeDef *LPGPIOx) 74 | { 75 | ErrorStatus status = SUCCESS; 76 | 77 | /* Check the parameters */ 78 | assert_param(IS_LPGPIO_ALL_INSTANCE(LPGPIOx)); 79 | 80 | /* Force and Release reset on clock of LPGPIOx Port */ 81 | if (LPGPIOx == LPGPIO1) 82 | { 83 | LL_AHB3_GRP1_ForceReset(LL_AHB3_GRP1_PERIPH_LPGPIO1); 84 | LL_AHB3_GRP1_ReleaseReset(LL_AHB3_GRP1_PERIPH_LPGPIO1); 85 | } 86 | else 87 | { 88 | status = ERROR; 89 | } 90 | 91 | return (status); 92 | } 93 | 94 | /** 95 | * @brief Initialize LPGPIO registers according to the specified parameters in LPGPIO_InitStruct. 96 | * @param LPGPIOx LPGPIO Port 97 | * @param LPGPIO_InitStruct: pointer to a @ref LL_LPGPIO_InitTypeDef structure 98 | * that contains the configuration information for the specified LPGPIO peripheral. 99 | * @retval An ErrorStatus enumeration value: 100 | * - SUCCESS: LPGPIO registers are initialized according to LPGPIO_InitStruct content 101 | * - ERROR: Not applicable 102 | */ 103 | ErrorStatus LL_LPGPIO_Init(GPIO_TypeDef *LPGPIOx, const LL_LPGPIO_InitTypeDef *const LPGPIO_InitStruct) 104 | { 105 | uint32_t pinpos; 106 | uint32_t currentpin; 107 | 108 | /* Check the parameters */ 109 | assert_param(IS_LPGPIO_ALL_INSTANCE(LPGPIOx)); 110 | assert_param(IS_LL_LPGPIO_PIN(LPGPIO_InitStruct->Pin)); 111 | assert_param(IS_LL_LPGPIO_MODE(LPGPIO_InitStruct->Mode)); 112 | 113 | /* ------------------------- Configure the port pins ---------------- */ 114 | /* Initialize pinpos on first pin set */ 115 | pinpos = POSITION_VAL(LPGPIO_InitStruct->Pin); 116 | 117 | /* Configure the port pins */ 118 | while (((LPGPIO_InitStruct->Pin) >> pinpos) != 0U) 119 | { 120 | /* Get current io position */ 121 | currentpin = (LPGPIO_InitStruct->Pin) & (1UL << pinpos); 122 | 123 | if (currentpin != 0U) 124 | { 125 | /* Pin Mode configuration */ 126 | LL_LPGPIO_SetPinMode(LPGPIOx, currentpin, LPGPIO_InitStruct->Mode); 127 | } 128 | pinpos++; 129 | } 130 | return (SUCCESS); 131 | } 132 | 133 | /** 134 | * @brief Set each @ref LL_LPGPIO_InitTypeDef field to default value. 135 | * @param LPGPIO_InitStruct: pointer to a @ref LL_LPGPIO_InitTypeDef structure 136 | * whose fields will be set to default values. 137 | * @retval None 138 | */ 139 | 140 | void LL_LPGPIO_StructInit(LL_LPGPIO_InitTypeDef *LPGPIO_InitStruct) 141 | { 142 | /* Reset LPGPIO init structure parameters values */ 143 | LPGPIO_InitStruct->Pin = LL_LPGPIO_PIN_ALL; 144 | LPGPIO_InitStruct->Mode = LL_LPGPIO_MODE_INPUT; 145 | } 146 | 147 | /** 148 | * @} 149 | */ 150 | 151 | /** 152 | * @} 153 | */ 154 | 155 | /** 156 | * @} 157 | */ 158 | 159 | #endif /* defined (LPGPIO1) */ 160 | 161 | /** 162 | * @} 163 | */ 164 | 165 | #endif /* USE_FULL_LL_DRIVER */ 166 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_lptim.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_lptim.c 4 | * @author MCD Application Team 5 | * @brief LPTIM LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_lptim.h" 22 | #include "stm32u5xx_ll_bus.h" 23 | #include "stm32u5xx_ll_rcc.h" 24 | 25 | 26 | #ifdef USE_FULL_ASSERT 27 | #include "stm32_assert.h" 28 | #else 29 | #define assert_param(expr) ((void)0U) 30 | #endif /* USE_FULL_ASSERT */ 31 | 32 | /** @addtogroup STM32U5xx_LL_Driver 33 | * @{ 34 | */ 35 | 36 | #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) || defined (LPTIM4) 37 | 38 | /** @addtogroup LPTIM_LL 39 | * @{ 40 | */ 41 | 42 | /* Private types -------------------------------------------------------------*/ 43 | /* Private variables ---------------------------------------------------------*/ 44 | /* Private constants ---------------------------------------------------------*/ 45 | /* Private macros ------------------------------------------------------------*/ 46 | /** @addtogroup LPTIM_LL_Private_Macros 47 | * @{ 48 | */ 49 | #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \ 50 | || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL)) 51 | 52 | #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1) \ 53 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2) \ 54 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4) \ 55 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8) \ 56 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16) \ 57 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32) \ 58 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64) \ 59 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128)) 60 | 61 | #define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \ 62 | || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE)) 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | 69 | /* Private function prototypes -----------------------------------------------*/ 70 | /* Private functions ---------------------------------------------------------*/ 71 | /** @defgroup LPTIM_Private_Functions LPTIM Private Functions 72 | * @{ 73 | */ 74 | /** 75 | * @} 76 | */ 77 | /* Exported functions --------------------------------------------------------*/ 78 | /** @addtogroup LPTIM_LL_Exported_Functions 79 | * @{ 80 | */ 81 | 82 | /** @addtogroup LPTIM_LL_EF_Init 83 | * @{ 84 | */ 85 | 86 | /** 87 | * @brief Set LPTIMx registers to their reset values. 88 | * @param LPTIMx LP Timer instance 89 | * @retval An ErrorStatus enumeration value: 90 | * - SUCCESS: LPTIMx registers are de-initialized 91 | * - ERROR: invalid LPTIMx instance 92 | */ 93 | ErrorStatus LL_LPTIM_DeInit(const LPTIM_TypeDef *LPTIMx) 94 | { 95 | ErrorStatus result = SUCCESS; 96 | 97 | /* Check the parameters */ 98 | assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 99 | 100 | if (LPTIMx == LPTIM1) 101 | { 102 | LL_APB3_GRP1_ForceReset(LL_APB3_GRP1_PERIPH_LPTIM1); 103 | LL_APB3_GRP1_ReleaseReset(LL_APB3_GRP1_PERIPH_LPTIM1); 104 | } 105 | else if (LPTIMx == LPTIM2) 106 | { 107 | LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_LPTIM2); 108 | LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_LPTIM2); 109 | } 110 | else if (LPTIMx == LPTIM3) 111 | { 112 | LL_APB3_GRP1_ForceReset(LL_APB3_GRP1_PERIPH_LPTIM3); 113 | LL_APB3_GRP1_ReleaseReset(LL_APB3_GRP1_PERIPH_LPTIM3); 114 | } 115 | else if (LPTIMx == LPTIM4) 116 | { 117 | LL_APB3_GRP1_ForceReset(LL_APB3_GRP1_PERIPH_LPTIM4); 118 | LL_APB3_GRP1_ReleaseReset(LL_APB3_GRP1_PERIPH_LPTIM4); 119 | } 120 | else 121 | { 122 | result = ERROR; 123 | } 124 | 125 | return result; 126 | } 127 | 128 | /** 129 | * @brief Set each fields of the LPTIM_InitStruct structure to its default 130 | * value. 131 | * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure 132 | * @retval None 133 | */ 134 | void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct) 135 | { 136 | /* Set the default configuration */ 137 | LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL; 138 | LPTIM_InitStruct->Prescaler = LL_LPTIM_PRESCALER_DIV1; 139 | LPTIM_InitStruct->Waveform = LL_LPTIM_OUTPUT_WAVEFORM_PWM; 140 | } 141 | 142 | /** 143 | * @brief Configure the LPTIMx peripheral according to the specified parameters. 144 | * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled. 145 | * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable(). 146 | * @param LPTIMx LP Timer Instance 147 | * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure 148 | * @retval An ErrorStatus enumeration value: 149 | * - SUCCESS: LPTIMx instance has been initialized 150 | * - ERROR: LPTIMx instance hasn't been initialized 151 | */ 152 | ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct) 153 | { 154 | ErrorStatus result = SUCCESS; 155 | /* Check the parameters */ 156 | assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 157 | assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource)); 158 | assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler)); 159 | assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform)); 160 | 161 | /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled 162 | (ENABLE bit is reset to 0). 163 | */ 164 | if (LL_LPTIM_IsEnabled(LPTIMx) == 1UL) 165 | { 166 | result = ERROR; 167 | } 168 | else 169 | { 170 | /* Set CKSEL bitfield according to ClockSource value */ 171 | /* Set PRESC bitfield according to Prescaler value */ 172 | /* Set WAVE bitfield according to Waveform value */ 173 | MODIFY_REG(LPTIMx->CFGR, 174 | (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE), 175 | LPTIM_InitStruct->ClockSource | \ 176 | LPTIM_InitStruct->Prescaler | \ 177 | LPTIM_InitStruct->Waveform); 178 | } 179 | 180 | return result; 181 | } 182 | 183 | /** 184 | * @} 185 | */ 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | /** 192 | * @} 193 | */ 194 | 195 | #endif /* LPTIM1 || LPTIM2 || LPTIM3 || LPTIM4 */ 196 | 197 | /** 198 | * @} 199 | */ 200 | 201 | #endif /* USE_FULL_LL_DRIVER */ 202 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_opamp.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_opamp.c 4 | * @author MCD Application Team 5 | * @brief OPAMP LL module driver 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_opamp.h" 22 | 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif /* USE_FULL_ASSERT */ 28 | 29 | /** @addtogroup STM32U5xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined (OPAMP1) || defined (OPAMP2) 34 | 35 | /** @addtogroup OPAMP_LL OPAMP 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | 44 | /** @addtogroup OPAMP_LL_Private_Macros 45 | * @{ 46 | */ 47 | 48 | /* Check of parameters for configuration of OPAMP hierarchical scope: */ 49 | /* OPAMP instance. */ 50 | 51 | #define IS_LL_OPAMP_POWER_MODE(__POWER_MODE__) (((__POWER_MODE__) == LL_OPAMP_POWERMODE_NORMALPOWER_NORMALSPEED) ||\ 52 | ((__POWER_MODE__) == LL_OPAMP_POWERMODE_NORMALPOWER_HIGHSPEED) ||\ 53 | ((__POWER_MODE__) == LL_OPAMP_POWERMODE_LOWPOWER_NORMALSPEED)||\ 54 | ((__POWER_MODE__) == LL_OPAMP_POWERMODE_LOWPOWER_HIGHSPEED)) 55 | 56 | 57 | #define IS_LL_OPAMP_FUNCTIONAL_MODE(__FUNCTIONAL_MODE__) (((__FUNCTIONAL_MODE__) == LL_OPAMP_MODE_STANDALONE) ||\ 58 | ((__FUNCTIONAL_MODE__) == LL_OPAMP_MODE_FOLLOWER) ||\ 59 | ((__FUNCTIONAL_MODE__) == LL_OPAMP_MODE_PGA)) 60 | 61 | /* Note: Comparator non-inverting inputs parameters are the same on all */ 62 | /* OPAMP instances. */ 63 | /* However, comparator instance kept as macro parameter for */ 64 | /* compatibility with other STM32 families. */ 65 | #define IS_LL_OPAMP_INPUT_NONINVERTING(__OPAMPX__, __INPUT_NONINVERTING__) \ 66 | ( ((__INPUT_NONINVERTING__) == LL_OPAMP_INPUT_NONINVERT_IO0) \ 67 | || ((__INPUT_NONINVERTING__) == LL_OPAMP_INPUT_NONINVERT_DAC) \ 68 | ) 69 | 70 | /* Note: Comparator non-inverting inputs parameters are the same on all */ 71 | /* OPAMP instances. */ 72 | /* However, comparator instance kept as macro parameter for */ 73 | /* compatibility with other STM32 families. */ 74 | #define IS_LL_OPAMP_INPUT_INVERTING(__OPAMPX__, __INPUT_INVERTING__) \ 75 | ( ((__INPUT_INVERTING__) == LL_OPAMP_INPUT_INVERT_IO0) \ 76 | || ((__INPUT_INVERTING__) == LL_OPAMP_INPUT_INVERT_IO1) \ 77 | || ((__INPUT_INVERTING__) == LL_OPAMP_INPUT_INVERT_CONNECT_NO) \ 78 | ) 79 | 80 | /** 81 | * @} 82 | */ 83 | 84 | 85 | /* Private function prototypes -----------------------------------------------*/ 86 | 87 | /* Exported functions --------------------------------------------------------*/ 88 | /** @addtogroup OPAMP_LL_Exported_Functions 89 | * @{ 90 | */ 91 | 92 | /** @addtogroup OPAMP_LL_EF_Init 93 | * @{ 94 | */ 95 | 96 | /** 97 | * @brief De-initialize registers of the selected OPAMP instance 98 | * to their default reset values. 99 | * @param OPAMPx OPAMP instance 100 | * @retval An ErrorStatus enumeration value: 101 | * - SUCCESS: OPAMP registers are de-initialized 102 | * - ERROR: OPAMP registers are not de-initialized 103 | */ 104 | ErrorStatus LL_OPAMP_DeInit(OPAMP_TypeDef *OPAMPx) 105 | { 106 | ErrorStatus status = SUCCESS; 107 | 108 | /* Check the parameters */ 109 | assert_param(IS_OPAMP_ALL_INSTANCE(OPAMPx)); 110 | 111 | LL_OPAMP_WriteReg(OPAMPx, CSR, 0x00000000U); 112 | 113 | return status; 114 | } 115 | 116 | /** 117 | * @brief Initialize some features of OPAMP instance. 118 | * @note This function reset bit of calibration mode to ensure 119 | * to be in functional mode, in order to have OPAMP parameters 120 | * (inputs selection, ...) set with the corresponding OPAMP mode 121 | * to be effective. 122 | * @note This function configures features of the selected OPAMP instance. 123 | * Some features are also available at scope OPAMP common instance 124 | * (common to several OPAMP instances). 125 | * @param OPAMPx OPAMP instance 126 | * @param OPAMP_InitStruct Pointer to a @ref LL_OPAMP_InitTypeDef structure 127 | * @retval An ErrorStatus enumeration value: 128 | * - SUCCESS: OPAMP registers are initialized 129 | * - ERROR: OPAMP registers are not initialized 130 | */ 131 | ErrorStatus LL_OPAMP_Init(OPAMP_TypeDef *OPAMPx, const LL_OPAMP_InitTypeDef *OPAMP_InitStruct) 132 | { 133 | /* Check the parameters */ 134 | assert_param(IS_OPAMP_ALL_INSTANCE(OPAMPx)); 135 | assert_param(IS_LL_OPAMP_POWER_MODE(OPAMP_InitStruct->PowerMode)); 136 | assert_param(IS_LL_OPAMP_FUNCTIONAL_MODE(OPAMP_InitStruct->FunctionalMode)); 137 | assert_param(IS_LL_OPAMP_INPUT_NONINVERTING(OPAMPx, OPAMP_InitStruct->InputNonInverting)); 138 | 139 | /* Note: OPAMP inverting input can be used with OPAMP in mode standalone */ 140 | /* or PGA with external capacitors for filtering circuit. */ 141 | /* Otherwise (OPAMP in mode follower), OPAMP inverting input is */ 142 | /* not used (not connected to GPIO pin). */ 143 | if (OPAMP_InitStruct->FunctionalMode != LL_OPAMP_MODE_FOLLOWER) 144 | { 145 | assert_param(IS_LL_OPAMP_INPUT_INVERTING(OPAMPx, OPAMP_InitStruct->InputInverting)); 146 | } 147 | 148 | /* Configuration of OPAMP instance : */ 149 | /* - PowerMode */ 150 | /* - Functional mode */ 151 | /* - Input non-inverting */ 152 | /* - Input inverting */ 153 | /* Note: Bit OPAMP_CSR_CALON reset to ensure to be in functional mode. */ 154 | if (OPAMP_InitStruct->FunctionalMode != LL_OPAMP_MODE_FOLLOWER) 155 | { 156 | MODIFY_REG(OPAMPx->CSR, 157 | OPAMP_CSR_OPALPM 158 | | OPAMP_CSR_OPAMODE 159 | | OPAMP_CSR_CALON 160 | | OPAMP_CSR_VM_SEL 161 | | OPAMP_CSR_VP_SEL 162 | | OPAMP_CSR_HSM 163 | , 164 | OPAMP_InitStruct->PowerMode 165 | | OPAMP_InitStruct->FunctionalMode 166 | | OPAMP_InitStruct->InputNonInverting 167 | | OPAMP_InitStruct->InputInverting 168 | ); 169 | } 170 | else 171 | { 172 | MODIFY_REG(OPAMPx->CSR, 173 | OPAMP_CSR_OPALPM 174 | | OPAMP_CSR_OPAMODE 175 | | OPAMP_CSR_CALON 176 | | OPAMP_CSR_VM_SEL 177 | | OPAMP_CSR_VP_SEL 178 | | OPAMP_CSR_HSM 179 | , 180 | OPAMP_InitStruct->PowerMode 181 | | LL_OPAMP_MODE_FOLLOWER 182 | | OPAMP_InitStruct->InputNonInverting 183 | | LL_OPAMP_INPUT_INVERT_CONNECT_NO 184 | ); 185 | } 186 | 187 | /* Set the power supply range to high for performance purpose */ 188 | /* The OPAMP_CSR_OPARANGE is common configuration for all OPAMPs */ 189 | /* bit OPAMP_CSR_OPARANGE applies for both OPAMPs */ 190 | MODIFY_REG(OPAMP1->CSR, OPAMP_CSR_OPARANGE, OPAMP_CSR_OPARANGE); 191 | 192 | return SUCCESS; 193 | } 194 | 195 | /** 196 | * @brief Set each @ref LL_OPAMP_InitTypeDef field to default value. 197 | * @param OPAMP_InitStruct pointer to a @ref LL_OPAMP_InitTypeDef structure 198 | * whose fields will be set to default values. 199 | * @retval None 200 | */ 201 | void LL_OPAMP_StructInit(LL_OPAMP_InitTypeDef *OPAMP_InitStruct) 202 | { 203 | /* Set OPAMP_InitStruct fields to default values */ 204 | OPAMP_InitStruct->PowerMode = LL_OPAMP_POWERMODE_NORMALPOWER_NORMALSPEED; 205 | OPAMP_InitStruct->FunctionalMode = LL_OPAMP_MODE_FOLLOWER; 206 | OPAMP_InitStruct->InputNonInverting = LL_OPAMP_INPUT_NONINVERT_IO0; 207 | /* Note: Parameter discarded if OPAMP in functional mode follower, */ 208 | /* set anyway to its default value. */ 209 | OPAMP_InitStruct->InputInverting = LL_OPAMP_INPUT_INVERT_CONNECT_NO; 210 | } 211 | 212 | /** 213 | * @} 214 | */ 215 | 216 | /** 217 | * @} 218 | */ 219 | 220 | /** 221 | * @} 222 | */ 223 | 224 | #endif /* OPAMP1 || OPAMP2 */ 225 | 226 | /** 227 | * @} 228 | */ 229 | 230 | #endif /* USE_FULL_LL_DRIVER */ 231 | 232 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_pka.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_pka.c 4 | * @author MCD Application Team 5 | * @brief PKA LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_pka.h" 22 | #include "stm32u5xx_ll_bus.h" 23 | 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif /* USE_FULL_ASSERT */ 29 | 30 | /** @addtogroup STM32U5xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined(PKA) 35 | 36 | /** @addtogroup PKA_LL 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /** @defgroup PKA_LL_Private_Macros PKA Private Constants 45 | * @{ 46 | */ 47 | #define IS_LL_PKA_MODE(__VALUE__) (((__VALUE__)== LL_PKA_MODE_MODULAR_EXP) ||\ 48 | ((__VALUE__) == LL_PKA_MODE_MONTGOMERY_PARAM) ||\ 49 | ((__VALUE__) == LL_PKA_MODE_MODULAR_EXP_FAST) ||\ 50 | ((__VALUE__) == LL_PKA_MODE_MODULAR_EXP_PROTECT) ||\ 51 | ((__VALUE__) == LL_PKA_MODE_ECC_MUL) ||\ 52 | ((__VALUE__) == LL_PKA_MODE_ECC_COMPLETE_ADD) ||\ 53 | ((__VALUE__) == LL_PKA_MODE_ECDSA_SIGNATURE) ||\ 54 | ((__VALUE__) == LL_PKA_MODE_ECDSA_VERIFICATION) ||\ 55 | ((__VALUE__) == LL_PKA_MODE_POINT_CHECK) ||\ 56 | ((__VALUE__) == LL_PKA_MODE_RSA_CRT_EXP) ||\ 57 | ((__VALUE__) == LL_PKA_MODE_MODULAR_INV) ||\ 58 | ((__VALUE__) == LL_PKA_MODE_ARITHMETIC_ADD) ||\ 59 | ((__VALUE__) == LL_PKA_MODE_ARITHMETIC_SUB) ||\ 60 | ((__VALUE__) == LL_PKA_MODE_ARITHMETIC_MUL) ||\ 61 | ((__VALUE__) == LL_PKA_MODE_COMPARISON) ||\ 62 | ((__VALUE__) == LL_PKA_MODE_MODULAR_REDUC) ||\ 63 | ((__VALUE__) == LL_PKA_MODE_MODULAR_ADD) ||\ 64 | ((__VALUE__) == LL_PKA_MODE_MODULAR_SUB) ||\ 65 | ((__VALUE__) == LL_PKA_MODE_MONTGOMERY_MUL) ||\ 66 | ((__VALUE__) == LL_PKA_MODE_DOUBLE_BASE_LADDER) ||\ 67 | ((__VALUE__) == LL_PKA_MODE_ECC_PROJECTIVE_AFF)) 68 | /** 69 | * @} 70 | */ 71 | 72 | /* Private function prototypes -----------------------------------------------*/ 73 | 74 | /* Exported functions --------------------------------------------------------*/ 75 | /** @addtogroup PKA_LL_Exported_Functions 76 | * @{ 77 | */ 78 | 79 | /** @addtogroup PKA_LL_EF_Init 80 | * @{ 81 | */ 82 | 83 | /** 84 | * @brief De-initialize PKA registers (Registers restored to their default values). 85 | * @param PKAx PKA Instance. 86 | * @retval ErrorStatus 87 | * - SUCCESS: PKA registers are de-initialized 88 | * - ERROR: PKA registers are not de-initialized 89 | */ 90 | ErrorStatus LL_PKA_DeInit(const PKA_TypeDef *PKAx) 91 | { 92 | ErrorStatus status = SUCCESS; 93 | 94 | /* Check the parameters */ 95 | assert_param(IS_PKA_ALL_INSTANCE(PKAx)); 96 | 97 | if (PKAx == PKA) 98 | { 99 | /* Force PKA reset */ 100 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_PKA); 101 | 102 | /* Release PKA reset */ 103 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_PKA); 104 | } 105 | else 106 | { 107 | status = ERROR; 108 | } 109 | 110 | return (status); 111 | } 112 | 113 | /** 114 | * @brief Initialize PKA registers according to the specified parameters in PKA_InitStruct. 115 | * @param PKAx PKA Instance. 116 | * @param PKA_InitStruct pointer to a @ref LL_PKA_InitTypeDef structure 117 | * that contains the configuration information for the specified PKA peripheral. 118 | * @retval ErrorStatus 119 | * - SUCCESS: PKA registers are initialized according to PKA_InitStruct content 120 | * - ERROR: Not applicable 121 | */ 122 | ErrorStatus LL_PKA_Init(PKA_TypeDef *PKAx, LL_PKA_InitTypeDef *PKA_InitStruct) 123 | { 124 | assert_param(IS_PKA_ALL_INSTANCE(PKAx)); 125 | assert_param(IS_LL_PKA_MODE(PKA_InitStruct->Mode)); 126 | 127 | LL_PKA_Config(PKAx, PKA_InitStruct->Mode); 128 | 129 | return (SUCCESS); 130 | } 131 | 132 | /** 133 | * @brief Set each @ref LL_PKA_InitTypeDef field to default value. 134 | * @param PKA_InitStruct pointer to a @ref LL_PKA_InitTypeDef structure 135 | * whose fields will be set to default values. 136 | * @retval None 137 | */ 138 | 139 | void LL_PKA_StructInit(LL_PKA_InitTypeDef *PKA_InitStruct) 140 | { 141 | /* Reset PKA init structure parameters values */ 142 | PKA_InitStruct->Mode = LL_PKA_MODE_MODULAR_EXP; 143 | } 144 | 145 | /** 146 | * @} 147 | */ 148 | 149 | /** 150 | * @} 151 | */ 152 | 153 | /** 154 | * @} 155 | */ 156 | 157 | #endif /* defined (PKA) */ 158 | 159 | /** 160 | * @} 161 | */ 162 | 163 | #endif /* USE_FULL_LL_DRIVER */ 164 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_pwr.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_pwr.c 4 | * @author MCD Application Team 5 | * @brief PWR LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | #if defined (USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32u5xx_ll_pwr.h" 23 | 24 | /** @addtogroup STM32U5xx_LL_Driver 25 | * @{ 26 | */ 27 | 28 | #if defined (PWR) 29 | 30 | /** @defgroup PWR_LL PWR 31 | * @{ 32 | */ 33 | 34 | /* Private types -------------------------------------------------------------*/ 35 | /* Private variables ---------------------------------------------------------*/ 36 | /* Private constants ---------------------------------------------------------*/ 37 | /* Private macros ------------------------------------------------------------*/ 38 | /* Private function prototypes -----------------------------------------------*/ 39 | /* Exported functions --------------------------------------------------------*/ 40 | 41 | /** @addtogroup PWR_LL_Exported_Functions 42 | * @{ 43 | */ 44 | 45 | /** @addtogroup PWR_LL_EF_Init 46 | * @{ 47 | */ 48 | 49 | /** 50 | * @brief De-initialize the PWR registers to their default reset values. 51 | * @retval An ErrorStatus enumeration value: 52 | * - SUCCESS : PWR registers are de-initialized. 53 | * - ERROR : not applicable. 54 | */ 55 | ErrorStatus LL_PWR_DeInit(void) 56 | { 57 | /* Clear PWR low power flags */ 58 | LL_PWR_ClearFlag_STOP(); 59 | 60 | /* Clear PWR wake up flags */ 61 | LL_PWR_ClearFlag_WU(); 62 | 63 | /* Reset privilege attribute for nsecure attribute */ 64 | LL_PWR_DisableNSecurePrivilege(); 65 | 66 | #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 67 | /* Reset privilege attribute for nsecure attribute */ 68 | LL_PWR_DisableSecurePrivilege(); 69 | 70 | /* Reset secure attribute */ 71 | LL_PWR_ConfigSecure(0); 72 | #endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ 73 | 74 | return SUCCESS; 75 | } 76 | 77 | /** 78 | * @} 79 | */ 80 | 81 | /** 82 | * @} 83 | */ 84 | 85 | /** 86 | * @} 87 | */ 88 | #endif /* defined(PWR) */ 89 | /** 90 | * @} 91 | */ 92 | 93 | #endif /* defined (USE_FULL_LL_DRIVER) */ 94 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_rng.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_rng.c 4 | * @author MCD Application Team 5 | * @brief RNG LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_rng.h" 22 | #include "stm32u5xx_ll_bus.h" 23 | 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif /* USE_FULL_ASSERT */ 29 | 30 | /** @addtogroup STM32U5xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (RNG) 35 | 36 | /** @addtogroup RNG_LL 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /** @defgroup RNG_LL_Private_Macros RNG Private Macros 45 | * @{ 46 | */ 47 | #define IS_LL_RNG_CED(__MODE__) (((__MODE__) == LL_RNG_CED_ENABLE) || \ 48 | ((__MODE__) == LL_RNG_CED_DISABLE)) 49 | 50 | #define IS_LL_RNG_CLOCK_DIVIDER(__CLOCK_DIV__) ((__CLOCK_DIV__) <=0x0Fu) 51 | 52 | 53 | #define IS_LL_RNG_NIST_COMPLIANCE(__NIST_COMPLIANCE__) (((__NIST_COMPLIANCE__) == LL_RNG_NIST_COMPLIANT) || \ 54 | ((__NIST_COMPLIANCE__) == LL_RNG_NOTNIST_COMPLIANT)) 55 | 56 | #define IS_LL_RNG_CONFIG1 (__CONFIG1__) ((__CONFIG1__) <= 0x3FUL) 57 | 58 | #define IS_LL_RNG_CONFIG2 (__CONFIG2__) ((__CONFIG2__) <= 0x07UL) 59 | 60 | #define IS_LL_RNG_CONFIG3 (__CONFIG3__) ((__CONFIG3__) <= 0xFUL) 61 | /** 62 | * @} 63 | */ 64 | /* Private function prototypes -----------------------------------------------*/ 65 | 66 | /* Exported functions --------------------------------------------------------*/ 67 | /** @addtogroup RNG_LL_Exported_Functions 68 | * @{ 69 | */ 70 | 71 | /** @addtogroup RNG_LL_EF_Init 72 | * @{ 73 | */ 74 | 75 | /** 76 | * @brief De-initialize RNG registers (Registers restored to their default values). 77 | * @param RNGx RNG Instance 78 | * @retval An ErrorStatus enumeration value: 79 | * - SUCCESS: RNG registers are de-initialized 80 | * - ERROR: not applicable 81 | */ 82 | ErrorStatus LL_RNG_DeInit(const RNG_TypeDef *RNGx) 83 | { 84 | ErrorStatus status = SUCCESS; 85 | 86 | /* Check the parameters */ 87 | assert_param(IS_RNG_ALL_INSTANCE(RNGx)); 88 | if (RNGx == RNG) 89 | { 90 | /* Enable RNG reset state */ 91 | LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_RNG); 92 | 93 | /* Release RNG from reset state */ 94 | LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_RNG); 95 | } 96 | else 97 | { 98 | status = ERROR; 99 | } 100 | 101 | return status; 102 | } 103 | 104 | /** 105 | * @brief Initialize RNG registers according to the specified parameters in RNG_InitStruct. 106 | * @param RNGx RNG Instance 107 | * @param RNG_InitStruct pointer to a LL_RNG_InitTypeDef structure 108 | * that contains the configuration information for the specified RNG peripheral. 109 | * @retval An ErrorStatus enumeration value: 110 | * - SUCCESS: RNG registers are initialized according to RNG_InitStruct content 111 | * - ERROR: not applicable 112 | */ 113 | ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, const LL_RNG_InitTypeDef *RNG_InitStruct) 114 | { 115 | /* Check the parameters */ 116 | assert_param(IS_RNG_ALL_INSTANCE(RNGx)); 117 | assert_param(IS_LL_RNG_CED(RNG_InitStruct->ClockErrorDetection)); 118 | 119 | /* Clock Error Detection Configuration when CONDRT bit is set to 1 */ 120 | MODIFY_REG(RNGx->CR, RNG_CR_CED | RNG_CR_CONDRST, RNG_InitStruct->ClockErrorDetection | RNG_CR_CONDRST); 121 | /* Writing bits CONDRST=0*/ 122 | CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST); 123 | 124 | return (SUCCESS); 125 | } 126 | 127 | /** 128 | * @brief Set each @ref LL_RNG_InitTypeDef field to default value. 129 | * @param RNG_InitStruct pointer to a @ref LL_RNG_InitTypeDef structure 130 | * whose fields will be set to default values. 131 | * @retval None 132 | */ 133 | void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct) 134 | { 135 | /* Set RNG_InitStruct fields to default values */ 136 | RNG_InitStruct->ClockErrorDetection = LL_RNG_CED_ENABLE; 137 | 138 | } 139 | /** 140 | * @} 141 | */ 142 | 143 | /** 144 | * @} 145 | */ 146 | 147 | /** 148 | * @} 149 | */ 150 | 151 | #endif /* RNG */ 152 | 153 | /** 154 | * @} 155 | */ 156 | 157 | #endif /* USE_FULL_LL_DRIVER */ 158 | 159 | -------------------------------------------------------------------------------- /Src/stm32u5xx_ll_ucpd.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32u5xx_ll_ucpd.c 4 | * @author MCD Application Team 5 | * @brief UCPD LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | #if defined(USE_FULL_LL_DRIVER) 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "stm32u5xx_ll_ucpd.h" 22 | #include "stm32u5xx_ll_bus.h" 23 | #include "stm32u5xx_ll_rcc.h" 24 | 25 | #ifdef USE_FULL_ASSERT 26 | #include "stm32_assert.h" 27 | #else 28 | #define assert_param(expr) ((void)0U) 29 | #endif /* USE_FULL_ASSERT */ 30 | 31 | /** @addtogroup STM32U5xx_LL_Driver 32 | * @{ 33 | */ 34 | #if defined (UCPD1) 35 | /** @addtogroup UCPD_LL 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | 42 | /* Private constants ---------------------------------------------------------*/ 43 | /** @defgroup UCPD_LL_Private_Constants UCPD Private Constants 44 | * @{ 45 | */ 46 | 47 | /** 48 | * @} 49 | */ 50 | 51 | /* Private macros ------------------------------------------------------------*/ 52 | /** @defgroup UCPD_LL_Private_Macros UCPD Private Macros 53 | * @{ 54 | */ 55 | 56 | 57 | /** 58 | * @} 59 | */ 60 | 61 | /* Private function prototypes -----------------------------------------------*/ 62 | 63 | /* Exported functions --------------------------------------------------------*/ 64 | /** @addtogroup UCPD_LL_Exported_Functions 65 | * @{ 66 | */ 67 | 68 | /** @addtogroup UCPD_LL_EF_Init 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @brief De-initialize the UCPD registers to their default reset values. 74 | * @param UCPDx ucpd Instance 75 | * @retval An ErrorStatus enumeration value: 76 | * - SUCCESS: ucpd registers are de-initialized 77 | * - ERROR: ucpd registers are not de-initialized 78 | */ 79 | ErrorStatus LL_UCPD_DeInit(UCPD_TypeDef *UCPDx) 80 | { 81 | ErrorStatus status = ERROR; 82 | 83 | /* Check the parameters */ 84 | assert_param(IS_UCPD_ALL_INSTANCE(UCPDx)); 85 | 86 | LL_UCPD_Disable(UCPDx); 87 | 88 | if (UCPD1 == UCPDx) 89 | { 90 | /* Force reset of ucpd clock */ 91 | LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_UCPD1); 92 | 93 | /* Release reset of ucpd clock */ 94 | LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_UCPD1); 95 | 96 | /* Disable ucpd clock */ 97 | LL_APB1_GRP2_DisableClock(LL_APB1_GRP2_PERIPH_UCPD1); 98 | 99 | status = SUCCESS; 100 | } 101 | 102 | return status; 103 | } 104 | 105 | /** 106 | * @brief Initialize the ucpd registers according to the specified parameters in UCPD_InitStruct. 107 | * @note As some bits in ucpd configuration registers can only be written when the ucpd is disabled 108 | * (ucpd_CR1_SPE bit =0), UCPD peripheral should be in disabled state prior calling this function. 109 | * Otherwise, ERROR result will be returned. 110 | * @param UCPDx UCPD Instance 111 | * @param UCPD_InitStruct pointer to a @ref LL_UCPD_InitTypeDef structure that contains 112 | * the configuration information for the UCPD peripheral. 113 | * @retval An ErrorStatus enumeration value. (Return always SUCCESS) 114 | */ 115 | ErrorStatus LL_UCPD_Init(UCPD_TypeDef *UCPDx, const LL_UCPD_InitTypeDef *UCPD_InitStruct) 116 | { 117 | /* Check the ucpd Instance UCPDx*/ 118 | assert_param(IS_UCPD_ALL_INSTANCE(UCPDx)); 119 | 120 | if (UCPD1 == UCPDx) 121 | { 122 | LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_UCPD1); 123 | } 124 | 125 | 126 | LL_UCPD_Disable(UCPDx); 127 | 128 | /*---------------------------- UCPDx CFG1 Configuration ------------------------*/ 129 | MODIFY_REG(UCPDx->CFG1, 130 | UCPD_CFG1_PSC_UCPDCLK | UCPD_CFG1_TRANSWIN | UCPD_CFG1_IFRGAP | UCPD_CFG1_HBITCLKDIV, 131 | UCPD_InitStruct->psc_ucpdclk | (UCPD_InitStruct->transwin << UCPD_CFG1_TRANSWIN_Pos) | 132 | (UCPD_InitStruct->IfrGap << UCPD_CFG1_IFRGAP_Pos) | UCPD_InitStruct->HbitClockDiv); 133 | 134 | return SUCCESS; 135 | } 136 | 137 | /** 138 | * @brief Set each @ref LL_UCPD_InitTypeDef field to default value. 139 | * @param UCPD_InitStruct pointer to a @ref LL_UCPD_InitTypeDef structure 140 | * whose fields will be set to default values. 141 | * @retval None 142 | */ 143 | void LL_UCPD_StructInit(LL_UCPD_InitTypeDef *UCPD_InitStruct) 144 | { 145 | /* Set UCPD_InitStruct fields to default values */ 146 | UCPD_InitStruct->psc_ucpdclk = LL_UCPD_PSC_DIV2; 147 | UCPD_InitStruct->transwin = 0x7; /* Divide by 8 */ 148 | UCPD_InitStruct->IfrGap = 0x10; /* Divide by 17 */ 149 | UCPD_InitStruct->HbitClockDiv = 0x0D; /* Divide by 14 to produce HBITCLK */ 150 | } 151 | 152 | /** 153 | * @} 154 | */ 155 | 156 | /** 157 | * @} 158 | */ 159 | 160 | /** 161 | * @} 162 | */ 163 | #endif /* defined (UCPD1) */ 164 | /** 165 | * @} 166 | */ 167 | 168 | #endif /* USE_FULL_LL_DRIVER */ 169 | 170 | -------------------------------------------------------------------------------- /_htmresc/favicon.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/stm32u5xx-hal-driver/b6fc08c2d780e2daf321f2a1d3b51a15c41ec373/_htmresc/favicon.png -------------------------------------------------------------------------------- /_htmresc/st_logo_2020.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/STMicroelectronics/stm32u5xx-hal-driver/b6fc08c2d780e2daf321f2a1d3b51a15c41ec373/_htmresc/st_logo_2020.png --------------------------------------------------------------------------------