├── .gitignore ├── BuildPictures ├── HANDWIRED │ ├── AllWired │ │ ├── LeftHandWired.jpeg │ │ ├── LeftHandWiredUnderside.jpeg │ │ ├── LeftSide.jpeg │ │ ├── LeftThumbWired.jpeg │ │ ├── RightHandWiredUnderside.jpeg │ │ ├── RightSide.jpeg │ │ ├── RightSide2.jpeg │ │ └── RightThumbWired.jpeg │ └── Assembly │ │ ├── left_hand_unwired.jpeg │ │ ├── right_hand_wire_planning.jpeg │ │ ├── routing_usb_cable.jpeg │ │ ├── thumb_wired.jpeg │ │ └── wiring_the_thumb.jpeg └── PCB │ ├── diodes.jpg │ ├── pcbs.jpeg │ ├── pcbs2.jpeg │ └── wired_spread.jpg ├── FinishedPictures ├── btrfld_folded.jpeg ├── btrfld_folded_thickness.jpeg ├── btrfld_front_angle.jpeg ├── btrfld_left_front.jpeg ├── btrfld_right_front.jpeg ├── btrfld_top.jpeg ├── btrfld_with_btrfly │ ├── btrfld_btrfly_front.jpeg │ ├── btrfld_btrfly_front_left.jpeg │ ├── btrfld_btrfly_front_right.jpeg │ ├── btrfld_btrfly_front_top.jpeg │ ├── btrfld_btrfly_top.jpeg │ ├── pcb_handwired_btrfly_front.jpg │ └── pcb_handwired_btrfly_front_top.jpg ├── pcb_handwired_folded_top.jpg ├── pcb_handwired_hand_underside.jpg ├── pcb_handwired_thumb_underside.jpg ├── pcb_handwired_top.jpg ├── ulp_head_on.jpeg ├── ulp_side1.jpeg ├── ulp_side2.jpeg ├── ulp_thickness_comparison.jpeg ├── ulp_top.jpeg ├── ulp_top_folded.jpeg └── ulp_with_choc.jpeg ├── Firmware ├── STABLE_ZMK │ └── zmk.uf2 ├── bluemicro840_v1 │ └── zmk.uf2 └── nice_nano_v2 │ └── zmk.uf2 ├── HANDWIRE_STLS ├── test_fit-Baseplate.stl ├── test_fit-Body.stl ├── test_fit-BodyBaseplateSupportLeft.stl ├── test_fit-BodyBaseplateSupportRight.stl ├── test_fit-BodyRight.stl ├── test_fit-BodyThumRodCap.stl ├── test_fit-ThumbExtensionLeft.stl ├── test_fit-ThumbExtensionRight.stl ├── test_fit-ThumbLeft.stl └── test_fit-ThumbRight.stl ├── LICENSE ├── README.md ├── STLs ├── btrfld_pcb │ ├── test_fit-Baseplate.stl │ ├── test_fit-Body.stl │ ├── test_fit-BodyBaseplateSupportLeft.stl │ ├── test_fit-BodyBaseplateSupportRight.stl │ ├── test_fit-BodyRight.stl │ ├── test_fit-BodyThumRodCap.stl │ ├── test_fit-ThumbExtensionLeft.stl │ ├── test_fit-ThumbExtensionRight.stl │ ├── test_fit-ThumbLeft.stl │ ├── test_fit-ThumbRight.stl │ └── test_fit-UnderbodyWireGuides.stl └── btrfld_ulp │ ├── btrfld_ulp-Baseplate.stl │ ├── btrfld_ulp-BodyBaseSupportLeft.stl │ ├── btrfld_ulp-BodyBaseSupportRight.stl │ ├── btrfld_ulp-BodyLeft.stl │ ├── btrfld_ulp-BodyRight.stl │ ├── btrfld_ulp-ThumbExtensionLeft.stl │ ├── btrfld_ulp-ThumbExtensionRight.stl │ ├── btrfld_ulp-ThumbLeft.stl │ └── btrfld_ulp-ThumbRight.stl ├── WiringGuide.png ├── WiringGuide.xcf ├── btrfld_cad ├── test_fit.FCStd └── test_fit.FCStd1 ├── btrfld_cad_ulp ├── btrfld_baseplate_guide-BASEPLATE_GUIDE.stl ├── btrfld_baseplate_guide-BASEPLATE_GUIDE_LEFT.stl ├── btrfld_baseplate_guide-BASEPLATE_GUIDE_RIGHT.stl ├── btrfld_baseplate_guide.FCStd ├── btrfld_baseplate_guide.FCStd1 ├── btrfld_ulp.FCStd └── btrfld_ulp.FCStd1 ├── btrfld_pcb ├── SW_KEYBOARD.pretty │ ├── ProMicro.kicad_mod │ ├── SW_PG1350_reversible.kicad_mod │ ├── flipped_smd_diode.kicad_mod │ ├── inline_diode.kicad_mod │ └── wire_loom.kicad_mod ├── battery_switch.kicad_pcb ├── btrfld_pcb-backups │ ├── btrfld_pcb-2023-01-24_224313.zip │ ├── btrfld_pcb-2023-01-24_225427.zip │ ├── btrfld_pcb-2023-01-24_230427.zip │ ├── btrfld_pcb-2023-01-24_232451.zip │ ├── btrfld_pcb-2023-01-24_233451.zip │ ├── btrfld_pcb-2023-01-25_162743.zip │ ├── btrfld_pcb-2023-01-25_232529.zip │ ├── btrfld_pcb-2023-01-25_233529.zip │ ├── btrfld_pcb-2023-01-25_234529.zip │ ├── btrfld_pcb-2023-01-25_235124.zip │ ├── btrfld_pcb-2023-01-26_115229.zip │ ├── btrfld_pcb-2023-01-26_120047.zip │ ├── btrfld_pcb-2023-01-26_121917.zip │ ├── btrfld_pcb-2023-01-26_123101.zip │ ├── btrfld_pcb-2023-01-26_123655.zip │ ├── btrfld_pcb-2023-02-02_094522.zip │ ├── btrfld_pcb-2023-02-07_112517.zip │ ├── btrfld_pcb-2023-02-07_113213.zip │ ├── btrfld_pcb-2023-02-07_114710.zip │ ├── btrfld_pcb-2023-02-07_115235.zip │ └── btrfld_pcb-2024-07-30_111413.zip ├── btrfld_pcb-bkp-2023-1-24-19.21.47.kicad_pcb-bak ├── btrfld_pcb-bkp-2023-1-24-19.47.39.kicad_pcb-bak ├── btrfld_pcb-bkp-2023-1-24-19.50.9.kicad_pcb-bak ├── btrfld_pcb-bkp-2023-1-24-20.35.44.kicad_pcb-bak ├── btrfld_pcb.kicad_pcb ├── btrfld_pcb.kicad_prl ├── btrfld_pcb.kicad_pro ├── btrfld_pcb.kicad_sch ├── btrfld_pcb_center-bkp-2023-1-26-15.26.25.kicad_pcb-bak ├── btrfld_pcb_center.kicad_pcb ├── btrfld_pcb_center.kicad_prl ├── btrfld_pcb_center.kicad_pro ├── btrfld_pcb_thumb-bkp-2023-1-27-10.50.40.kicad_pcb-bak ├── btrfld_pcb_thumb-bkp-2023-1-27-11.8.29.kicad_pcb-bak ├── btrfld_pcb_thumb.kicad_pcb ├── btrfld_pcb_thumb.kicad_prl ├── btrfld_pcb_thumb.kicad_pro ├── fp-info-cache └── fp-lib-table ├── btrfld_pcb_ulp ├── Cherry_ULP.pretty │ ├── Cherry_MX_ULP.step │ ├── Cherry_ULP_SMD.kicad_mod │ ├── Cherry_ULP_SMD_Double_Sided.kicad_mod │ ├── Cherry_ULP_SMD_SK6812_1511.kicad_mod │ ├── Cherry_ULP_TH.kicad_mod │ ├── Cherry_ULP_TH_Double_Sided.kicad_mod │ └── Cherry_ULP_TH_TEST.kicad_mod ├── SW_KEYBOARD.pretty │ ├── ProMicro.kicad_mod │ ├── SW_PG1350_reversible.kicad_mod │ ├── flipped_smd_diode.kicad_mod │ ├── inline_diode.kicad_mod │ └── wire_loom.kicad_mod ├── battery_switch.kicad_pcb ├── battery_switch.kicad_prl ├── battery_switch.kicad_pro ├── btrfld_pcb-backups │ ├── btrfld_pcb-2023-02-07_115235.zip │ ├── btrfld_pcb-2024-08-07_150711.zip │ ├── btrfld_pcb-2024-08-07_164012.zip │ ├── btrfld_pcb-2024-08-07_165040.zip │ ├── btrfld_pcb-2024-08-07_170658.zip │ ├── btrfld_pcb-2024-08-07_212137.zip │ ├── btrfld_pcb-2024-08-13_192537.zip │ ├── btrfld_pcb-2024-08-13_195331.zip │ ├── btrfld_pcb-2024-08-13_200406.zip │ ├── btrfld_pcb-2024-08-13_201520.zip │ ├── btrfld_pcb-2024-08-13_204820.zip │ ├── btrfld_pcb-2024-08-14_115343.zip │ ├── btrfld_pcb-2024-08-14_120931.zip │ ├── btrfld_pcb-2024-08-14_144421.zip │ ├── btrfld_pcb-2024-08-14_155611.zip │ └── btrfld_pcb-2024-08-16_153937.zip ├── btrfld_pcb-bkp-2023-1-24-19.21.47.kicad_pcb-bak ├── btrfld_pcb-bkp-2023-1-24-19.47.39.kicad_pcb-bak ├── btrfld_pcb-bkp-2023-1-24-19.50.9.kicad_pcb-bak ├── btrfld_pcb-bkp-2023-1-24-20.35.44.kicad_pcb-bak ├── btrfld_pcb.kicad_pcb ├── btrfld_pcb.kicad_prl ├── btrfld_pcb.kicad_pro ├── btrfld_pcb.kicad_sch ├── btrfld_pcb.step ├── btrfld_pcb_center-bkp-2023-1-26-15.26.25.kicad_pcb-bak ├── btrfld_pcb_center.kicad_pcb ├── btrfld_pcb_center.kicad_prl ├── btrfld_pcb_center.kicad_pro ├── btrfld_pcb_thumb-bkp-2023-1-27-10.50.40.kicad_pcb-bak ├── btrfld_pcb_thumb-bkp-2023-1-27-11.8.29.kicad_pcb-bak ├── btrfld_pcb_thumb.kicad_pcb ├── btrfld_pcb_thumb.kicad_prl ├── btrfld_pcb_thumb.kicad_pro ├── btrfld_pcb_thumb.step ├── fp-info-cache ├── fp-lib-table └── prawn_logo.pretty │ ├── prawn_logo.kicad_mod │ ├── prawn_logo_10mm.kicad_mod │ ├── prawn_logo_inverted.kicad_mod │ └── prawn_logo_inverted_10mm.kicad_mod ├── demos ├── final_draft.gif ├── first_draft_demo_no_supports.gif └── pcb_folding.gif ├── ulp_keycap └── ulp_keycap.stl └── ulp_keycap_homenub ├── ulp_keycap_homenub-Body.stl ├── ulp_keycap_homenub.FCStd └── ulp_keycap_homenub.FCStd1 /.gitignore: -------------------------------------------------------------------------------- 1 | btrfld_pcb_ulp/btrfld_pcb-backups/ -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/AllWired/LeftHandWired.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/AllWired/LeftHandWired.jpeg -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/AllWired/LeftHandWiredUnderside.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/AllWired/LeftHandWiredUnderside.jpeg -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/AllWired/LeftSide.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/AllWired/LeftSide.jpeg -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/AllWired/LeftThumbWired.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/AllWired/LeftThumbWired.jpeg -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/AllWired/RightHandWiredUnderside.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/AllWired/RightHandWiredUnderside.jpeg -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/AllWired/RightSide.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/AllWired/RightSide.jpeg -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/AllWired/RightSide2.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/AllWired/RightSide2.jpeg -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/AllWired/RightThumbWired.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/AllWired/RightThumbWired.jpeg -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/Assembly/left_hand_unwired.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/Assembly/left_hand_unwired.jpeg -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/Assembly/right_hand_wire_planning.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/Assembly/right_hand_wire_planning.jpeg -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/Assembly/routing_usb_cable.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/Assembly/routing_usb_cable.jpeg -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/Assembly/thumb_wired.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/Assembly/thumb_wired.jpeg -------------------------------------------------------------------------------- /BuildPictures/HANDWIRED/Assembly/wiring_the_thumb.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/HANDWIRED/Assembly/wiring_the_thumb.jpeg -------------------------------------------------------------------------------- /BuildPictures/PCB/diodes.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/PCB/diodes.jpg -------------------------------------------------------------------------------- /BuildPictures/PCB/pcbs.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/PCB/pcbs.jpeg -------------------------------------------------------------------------------- /BuildPictures/PCB/pcbs2.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/PCB/pcbs2.jpeg -------------------------------------------------------------------------------- /BuildPictures/PCB/wired_spread.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/BuildPictures/PCB/wired_spread.jpg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_folded.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_folded.jpeg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_folded_thickness.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_folded_thickness.jpeg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_front_angle.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_front_angle.jpeg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_left_front.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_left_front.jpeg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_right_front.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_right_front.jpeg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_top.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_top.jpeg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_with_btrfly/btrfld_btrfly_front.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_with_btrfly/btrfld_btrfly_front.jpeg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_with_btrfly/btrfld_btrfly_front_left.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_with_btrfly/btrfld_btrfly_front_left.jpeg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_with_btrfly/btrfld_btrfly_front_right.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_with_btrfly/btrfld_btrfly_front_right.jpeg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_with_btrfly/btrfld_btrfly_front_top.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_with_btrfly/btrfld_btrfly_front_top.jpeg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_with_btrfly/btrfld_btrfly_top.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_with_btrfly/btrfld_btrfly_top.jpeg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_with_btrfly/pcb_handwired_btrfly_front.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_with_btrfly/pcb_handwired_btrfly_front.jpg -------------------------------------------------------------------------------- /FinishedPictures/btrfld_with_btrfly/pcb_handwired_btrfly_front_top.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/btrfld_with_btrfly/pcb_handwired_btrfly_front_top.jpg -------------------------------------------------------------------------------- /FinishedPictures/pcb_handwired_folded_top.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/pcb_handwired_folded_top.jpg -------------------------------------------------------------------------------- /FinishedPictures/pcb_handwired_hand_underside.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/pcb_handwired_hand_underside.jpg -------------------------------------------------------------------------------- /FinishedPictures/pcb_handwired_thumb_underside.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/pcb_handwired_thumb_underside.jpg -------------------------------------------------------------------------------- /FinishedPictures/pcb_handwired_top.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/pcb_handwired_top.jpg -------------------------------------------------------------------------------- /FinishedPictures/ulp_head_on.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/ulp_head_on.jpeg -------------------------------------------------------------------------------- /FinishedPictures/ulp_side1.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/ulp_side1.jpeg -------------------------------------------------------------------------------- /FinishedPictures/ulp_side2.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/ulp_side2.jpeg -------------------------------------------------------------------------------- /FinishedPictures/ulp_thickness_comparison.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/ulp_thickness_comparison.jpeg -------------------------------------------------------------------------------- /FinishedPictures/ulp_top.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/ulp_top.jpeg -------------------------------------------------------------------------------- /FinishedPictures/ulp_top_folded.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/ulp_top_folded.jpeg -------------------------------------------------------------------------------- /FinishedPictures/ulp_with_choc.jpeg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/FinishedPictures/ulp_with_choc.jpeg -------------------------------------------------------------------------------- /Firmware/STABLE_ZMK/zmk.uf2: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/Firmware/STABLE_ZMK/zmk.uf2 -------------------------------------------------------------------------------- /Firmware/bluemicro840_v1/zmk.uf2: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/Firmware/bluemicro840_v1/zmk.uf2 -------------------------------------------------------------------------------- /Firmware/nice_nano_v2/zmk.uf2: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/Firmware/nice_nano_v2/zmk.uf2 -------------------------------------------------------------------------------- /HANDWIRE_STLS/test_fit-Baseplate.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/HANDWIRE_STLS/test_fit-Baseplate.stl -------------------------------------------------------------------------------- /HANDWIRE_STLS/test_fit-Body.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/HANDWIRE_STLS/test_fit-Body.stl -------------------------------------------------------------------------------- /HANDWIRE_STLS/test_fit-BodyBaseplateSupportLeft.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/HANDWIRE_STLS/test_fit-BodyBaseplateSupportLeft.stl -------------------------------------------------------------------------------- /HANDWIRE_STLS/test_fit-BodyBaseplateSupportRight.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/HANDWIRE_STLS/test_fit-BodyBaseplateSupportRight.stl -------------------------------------------------------------------------------- /HANDWIRE_STLS/test_fit-BodyRight.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/HANDWIRE_STLS/test_fit-BodyRight.stl -------------------------------------------------------------------------------- /HANDWIRE_STLS/test_fit-BodyThumRodCap.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/HANDWIRE_STLS/test_fit-BodyThumRodCap.stl -------------------------------------------------------------------------------- /HANDWIRE_STLS/test_fit-ThumbExtensionLeft.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/HANDWIRE_STLS/test_fit-ThumbExtensionLeft.stl -------------------------------------------------------------------------------- /HANDWIRE_STLS/test_fit-ThumbExtensionRight.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/HANDWIRE_STLS/test_fit-ThumbExtensionRight.stl -------------------------------------------------------------------------------- /HANDWIRE_STLS/test_fit-ThumbLeft.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/HANDWIRE_STLS/test_fit-ThumbLeft.stl -------------------------------------------------------------------------------- /HANDWIRE_STLS/test_fit-ThumbRight.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/HANDWIRE_STLS/test_fit-ThumbRight.stl -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2022 Evalyn Emmerich 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # btrfld and btrfld_ulp 2 | 3 | Pronounced "butter-fold" 4 | 5 | A foldable, portable sibling of the btrfly keyboard https://github.com/SolidHal/btrfly-keyboard 6 | 7 | and a variant, the btrfld ulp (ultra low profile) 8 | 9 | More images available in "FinishedPictures" folder 10 | ![render_gif](demos/pcb_folding.gif) 11 | the btrfld folding and unfolding 12 | 13 | 14 | ![ulp_above](FinishedPictures/ulp_top.jpeg) 15 | the btrfld ultra low profile (ulp) from above 16 | 17 | ![assembled](FinishedPictures/pcb_handwired_top.jpg) 18 | the handwired and pcb version of the choc btrfld 19 | 20 | ![ulp_folded](FinishedPictures/ulp_top_folded.jpeg) 21 | the btrfld ultra low profile (ulp) from above, folded 22 | 23 | ![folded](FinishedPictures/pcb_handwired_folded_top.jpg) 24 | the handwired and pcb version of the choc btrfld, folded up 25 | 26 | ![thickness_comparison](FinishedPictures/ulp_thickness_comparison.jpeg) 27 | the btrfld ultra low profile (ulp) next to the btrfld pcb aka choc (its 7mm thinner!) 28 | 29 | ![siblings](FinishedPictures/btrfld_with_btrfly/pcb_handwired_btrfly_front.jpg) 30 | the handwired and pcb version of the choc btrfld with its sibling, the btrfly 31 | 32 | 33 | 34 | ## Features 35 | - 5 key dactyl-manuform-mini thumb cluster 36 | - flat, tented qwerty keys 37 | - 6 extra mappable keys 38 | - bluetooth (optional) 39 | - folds flat for portability 40 | 41 | - btrfld 42 | - choc switches 43 | - ~22.5 mm thick 44 | 45 | - btrfld ulp 46 | - cherry mx ulp switches 47 | - ~15.5 mm thick 48 | 49 | - 15.5mm thick (btrfld ulp) 50 | - 22.5mm thick (btrfld) 51 | 52 | ## PCBs 53 | 54 | ![pcbs](BuildPictures/PCB/pcbs.jpeg) 55 | 56 | - located in `btrfld_pcb` 57 | - the hand and thumb pcbs are mirrored so they can be used for either hand 58 | - 2 x btrfld_pcb 59 | - 1 x btrfld_pcb_center 60 | - 2 x btrfld_pcb_thumb 61 | 62 | ## Parts: 63 | 64 | - PCBs 65 | 66 | - USB C breakout basic breakout board 67 | - Used this one https://www.amazon.com/Type-C-Breakout-Serial-Connector-Converter/dp/B09KC1SMGD/ 68 | - wiring the usb: 69 | ``` 70 | For most usages, you can just connect VBUS to your 5V input, GND to ground, and D+ and D- as you expect. You can monitor the CC and SBU pins to determine cable polarity, or send side-band data. Or leave them disconnected 71 | ``` 72 | 73 | - A USB 2.0 USB C cable to cut up 74 | - USB C to Micro usb can be gotten pretty cheap 75 | 76 | - 46 choc v1 keyswitches, keycaps OR 46 Cherry MX ULP switches 77 | - https://github.com/pashutk/Cherry_MX_ULP has information on finding ulp switches 78 | - if you choose to use ULP switches, you will need to order the solder paste stencils as well as the pcbs and get a hotplate so you can solder them 79 | - There aren't amazing sources of ULP key caps at this point. The best option i found was to print some. The stls can be found in `ulp_keycap` and `ulp_keycap_homenub` directories. You need a reasonably high resolution SLA printer to get functional keycaps, FDM won't work. 80 | 81 | - 1N4148W SOD-323F diodes 82 | - Tips for soldering these can be found in the assembly notes section below 83 | 84 | - 3mm diameter steel rod 85 | - 2x 70.5mm 86 | - 2x 64.7mm 87 | - 2x 22.7 mm 88 | - 4x 14.2 89 | 90 | - 1.27mm flat ribbon cable 91 | - 2 x 9 wire cables: 13 cm 92 | - 2 x 6 wire cables: 9.6 cm 93 | 94 | - 1x nicenano OR bluemicro840 95 | - if you don't want bluetooth, you can just use a promicro instead 96 | 97 | - 3d printed pieces, located in the STLs folder 98 | - 1 copy of everything besides test_fit-UnderbodyWireGuides.stl, which we need 4 of 99 | 100 | ## Print Settings: 101 | ``` 102 | Supports on buildplate 103 | Detect Bridging 104 | 100% infill 105 | 0.20mm 106 | PLA/PETG 107 | ``` 108 | 109 | ## Assembly Tips 110 | this process is much less tedious than hand wiring. But its still annoying in places since we are trying to keep things thin. 111 | 112 | - btrfld (non-ulp) 113 | - solder the parallel wires to the hands/thumb clusters *before* placing the boards in the frame and soldering switches 114 | - trim the stabs on the hinge side keys of the left/right hand bodies (switches for Q,A,Z, P, ;, / keys) 115 | 116 | - btrfld ulp 117 | - use your hotplate to solder the switches first, then the diodes, then the parallel wires. you can then install the pcbs into the 3d printed frames 118 | - you might need to use something to support balance some switches while solder, since some are only partially supported by the PCB 119 | - the tolerance between the keycaps and the frames is quite tight. do some testing (and likely sanding) before fully assembling to ensure nothing sticks 120 | 121 | - stripping ribbon cable: 122 | - take an xacto knife ~3mm from the end of the cable and cut a slit until you see wire, then use your fingernail to peel the cut off section away from the rest of the cable 123 | - use cut off diode/resistor legs to connect the controller to the center pcb 124 | - the pcbs are designed to hold the diodes "upside down" to keep things as thin as possible. Soldering these is a little hard since they like to stick to the soldering iron. 125 | - get some fine point electronics tweezers 126 | - put a very very small amount of solder on one of the diode pads 127 | - place the diode, the "legs" should keep the diode from completely falling into the hole 128 | - hold the diode down with the tweezers, and use your iron to reflow the solder. This should hold the diode down enough for you to solder the other diode leg. 129 | - finally, add some more solder to the first pad 130 | - The UnderbodyWireGuides get super glued into the holes of the pcb. See pictures of the hand underside for details. 131 | - Once you have tested the board, use some superglue to reinforce the ribbon cable solder joints 132 | 133 | - Reference the images in the "BuildPictures/PCB" folder 134 | 135 | 136 | ## Flash ZMK Firmware 137 | 138 | Prebuilt firmware available in the `Firmware` directory 139 | Bridge ground + reset twice quickly to put the bluemicro840 into flashing mode 140 | Or press the "bootloader" key on the keyboard if you have already flashed the firmware before 141 | then copy the firmware onto the keyboard 142 | ``` 143 | cp build/zephyr/zmk.uf2 /media//NRF52BOOT/CURRENT.UF2 144 | ``` 145 | 146 | 147 | ## Build ZMK Firmware 148 | 149 | ### Github Actions Build 150 | 151 | _This is broken until https://github.com/zmkfirmware/zmk/pull/1499 merges, do a local build instead_ 152 | fork this repo, modify the files to your hearts content 153 | the github actions workflow will then build it for you 154 | https://github.com/SolidHal/zmk-config-btrfld 155 | 156 | ### Local build 157 | 158 | Grab my fork of the zmk firmware 159 | ``` 160 | git clone https://github.com/SolidHal/zmk.git 161 | ``` 162 | 163 | follow https://zmk.dev/docs/development/setup 164 | then 165 | ``` 166 | cd zmk 167 | cd app 168 | west build -b bluemicro840_v1 -- -DSHIELD=btrfld 169 | ``` 170 | 171 | make pristine 172 | ``` 173 | west build -p -b bluemicro840_v1 -- -DSHIELD=btrfld 174 | ``` 175 | 176 | ## Future development 177 | - Attach trackpoint/ball or touchpad somewhere? 178 | - latch to keep folded? 179 | - latches to retain body/thumb extensions in base? 180 | 181 | 182 | ## Modifying 183 | Edit `test_fit.FCStd` using FreeCad, I used version `0.19-24366` 184 | I am by no means a FreeCad expert, so I'm sure it is built suboptimally. 185 | The pcbs were created in kicad 186 | 187 | ## Hand Wiring Assembly Tips 188 | 189 | ### Don't hand wire this thing unless you have lots and lots of time to waste. Use the PCBs instead. 190 | 191 | - Wiring the underside of the right/left body halves is very tedious 192 | - Make sure everything stays as flat as possible 193 | 194 | - Reference the images in "BuildPictures" and "FinishedPictures" for hints on how to layout the wires 195 | 196 | - Reference WiringGuide.png to see see the row/colomn layout 197 | 198 | - Must trim a very very slight amount off of the center pin on keyswitches over the body/thumbcluster rod 199 | - switch above this must be rotated to give clearance for the rod locker 200 | 201 | - Body/ThumbCluster Pivot Rob 202 | - BodyThumbRod Cap gets glued on body end of rod 203 | - thumb cluster end of rod gets glued in place 204 | 205 | - Area around the body/baseplate hinge needs clearence, so keep all wires to the other side of the keyswitch 206 | 207 | - Reference the images in the "BuildPictures" folder 208 | 209 | ### Hand Wiring Wire lengths: 210 | 211 | #### Body -> Baseplate 212 | 9 wires 213 | 420mm 214 | 215 | #### Thumb -> Baseplate 216 | 6 wires 217 | 240mm 218 | 70mm threaded through on the thumb side 219 | 220 | ## References 221 | 222 | Animation: 223 | BaseBodyAngle goes from 0 -> 32 224 | 225 | firmware: 226 | https://zmk.dev/docs/development/new-shield 227 | https://zmk.dev/docs/development/setup/ 228 | https://zmk.dev/docs/troubleshooting 229 | https://github.com/SolidHal/zmk 230 | 231 | Friction fit redesign notes: 232 | https://markforged.com/resources/blog/joinery-onyx 233 | https://www.hubs.com/knowledge-base/how-design-snap-fit-joints-3d-printing/ 234 | 235 | Cherry MX ULP references: 236 | https://github.com/pashutk/Cherry_MX_ULP 237 | 238 | -------------------------------------------------------------------------------- /STLs/btrfld_pcb/test_fit-Baseplate.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_pcb/test_fit-Baseplate.stl -------------------------------------------------------------------------------- /STLs/btrfld_pcb/test_fit-Body.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_pcb/test_fit-Body.stl -------------------------------------------------------------------------------- /STLs/btrfld_pcb/test_fit-BodyBaseplateSupportLeft.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_pcb/test_fit-BodyBaseplateSupportLeft.stl -------------------------------------------------------------------------------- /STLs/btrfld_pcb/test_fit-BodyBaseplateSupportRight.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_pcb/test_fit-BodyBaseplateSupportRight.stl -------------------------------------------------------------------------------- /STLs/btrfld_pcb/test_fit-BodyRight.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_pcb/test_fit-BodyRight.stl -------------------------------------------------------------------------------- /STLs/btrfld_pcb/test_fit-BodyThumRodCap.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_pcb/test_fit-BodyThumRodCap.stl -------------------------------------------------------------------------------- /STLs/btrfld_pcb/test_fit-ThumbExtensionLeft.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_pcb/test_fit-ThumbExtensionLeft.stl -------------------------------------------------------------------------------- /STLs/btrfld_pcb/test_fit-ThumbExtensionRight.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_pcb/test_fit-ThumbExtensionRight.stl -------------------------------------------------------------------------------- /STLs/btrfld_pcb/test_fit-ThumbLeft.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_pcb/test_fit-ThumbLeft.stl -------------------------------------------------------------------------------- /STLs/btrfld_pcb/test_fit-ThumbRight.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_pcb/test_fit-ThumbRight.stl -------------------------------------------------------------------------------- /STLs/btrfld_pcb/test_fit-UnderbodyWireGuides.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_pcb/test_fit-UnderbodyWireGuides.stl -------------------------------------------------------------------------------- /STLs/btrfld_ulp/btrfld_ulp-Baseplate.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_ulp/btrfld_ulp-Baseplate.stl -------------------------------------------------------------------------------- /STLs/btrfld_ulp/btrfld_ulp-BodyBaseSupportLeft.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_ulp/btrfld_ulp-BodyBaseSupportLeft.stl -------------------------------------------------------------------------------- /STLs/btrfld_ulp/btrfld_ulp-BodyBaseSupportRight.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_ulp/btrfld_ulp-BodyBaseSupportRight.stl -------------------------------------------------------------------------------- /STLs/btrfld_ulp/btrfld_ulp-BodyLeft.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_ulp/btrfld_ulp-BodyLeft.stl -------------------------------------------------------------------------------- /STLs/btrfld_ulp/btrfld_ulp-BodyRight.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_ulp/btrfld_ulp-BodyRight.stl -------------------------------------------------------------------------------- /STLs/btrfld_ulp/btrfld_ulp-ThumbExtensionLeft.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_ulp/btrfld_ulp-ThumbExtensionLeft.stl -------------------------------------------------------------------------------- /STLs/btrfld_ulp/btrfld_ulp-ThumbExtensionRight.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_ulp/btrfld_ulp-ThumbExtensionRight.stl -------------------------------------------------------------------------------- /STLs/btrfld_ulp/btrfld_ulp-ThumbLeft.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_ulp/btrfld_ulp-ThumbLeft.stl -------------------------------------------------------------------------------- /STLs/btrfld_ulp/btrfld_ulp-ThumbRight.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/STLs/btrfld_ulp/btrfld_ulp-ThumbRight.stl -------------------------------------------------------------------------------- /WiringGuide.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/WiringGuide.png -------------------------------------------------------------------------------- /WiringGuide.xcf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/WiringGuide.xcf -------------------------------------------------------------------------------- /btrfld_cad/test_fit.FCStd: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_cad/test_fit.FCStd -------------------------------------------------------------------------------- /btrfld_cad/test_fit.FCStd1: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_cad/test_fit.FCStd1 -------------------------------------------------------------------------------- /btrfld_cad_ulp/btrfld_baseplate_guide-BASEPLATE_GUIDE.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_cad_ulp/btrfld_baseplate_guide-BASEPLATE_GUIDE.stl -------------------------------------------------------------------------------- /btrfld_cad_ulp/btrfld_baseplate_guide-BASEPLATE_GUIDE_LEFT.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_cad_ulp/btrfld_baseplate_guide-BASEPLATE_GUIDE_LEFT.stl -------------------------------------------------------------------------------- /btrfld_cad_ulp/btrfld_baseplate_guide-BASEPLATE_GUIDE_RIGHT.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_cad_ulp/btrfld_baseplate_guide-BASEPLATE_GUIDE_RIGHT.stl -------------------------------------------------------------------------------- /btrfld_cad_ulp/btrfld_baseplate_guide.FCStd: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_cad_ulp/btrfld_baseplate_guide.FCStd -------------------------------------------------------------------------------- /btrfld_cad_ulp/btrfld_baseplate_guide.FCStd1: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_cad_ulp/btrfld_baseplate_guide.FCStd1 -------------------------------------------------------------------------------- /btrfld_cad_ulp/btrfld_ulp.FCStd: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_cad_ulp/btrfld_ulp.FCStd -------------------------------------------------------------------------------- /btrfld_cad_ulp/btrfld_ulp.FCStd1: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_cad_ulp/btrfld_ulp.FCStd1 -------------------------------------------------------------------------------- /btrfld_pcb/SW_KEYBOARD.pretty/ProMicro.kicad_mod: -------------------------------------------------------------------------------- 1 | (module ProMicro (layer F.Cu) (tedit 5A06A962) 2 | (descr "Pro Micro footprint") 3 | (tags "promicro ProMicro") 4 | (fp_text reference REF** (at 0 -10.16) (layer F.SilkS) hide 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value ProMicro (at 0 10.16) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_line (start 15.24 -8.89) (end 15.24 8.89) (layer B.SilkS) (width 0.15)) 11 | (fp_line (start 15.24 8.89) (end -15.24 8.89) (layer B.SilkS) (width 0.15)) 12 | (fp_line (start -15.24 8.89) (end -15.24 3.81) (layer B.SilkS) (width 0.15)) 13 | (fp_line (start -15.24 3.81) (end -17.78 3.81) (layer B.SilkS) (width 0.15)) 14 | (fp_line (start -17.78 3.81) (end -17.78 -3.81) (layer B.SilkS) (width 0.15)) 15 | (fp_line (start -17.78 -3.81) (end -15.24 -3.81) (layer B.SilkS) (width 0.15)) 16 | (fp_line (start -15.24 -3.81) (end -15.24 -8.89) (layer B.SilkS) (width 0.15)) 17 | (fp_line (start -15.24 -8.89) (end 15.24 -8.89) (layer B.SilkS) (width 0.15)) 18 | (fp_line (start -15.24 8.89) (end 15.24 8.89) (layer F.SilkS) (width 0.15)) 19 | (fp_line (start -15.24 8.89) (end -15.24 3.81) (layer F.SilkS) (width 0.15)) 20 | (fp_line (start -15.24 3.81) (end -17.78 3.81) (layer F.SilkS) (width 0.15)) 21 | (fp_line (start -17.78 3.81) (end -17.78 -3.81) (layer F.SilkS) (width 0.15)) 22 | (fp_line (start -17.78 -3.81) (end -15.24 -3.81) (layer F.SilkS) (width 0.15)) 23 | (fp_line (start -15.24 -3.81) (end -15.24 -8.89) (layer F.SilkS) (width 0.15)) 24 | (fp_line (start -15.24 -8.89) (end 15.24 -8.89) (layer F.SilkS) (width 0.15)) 25 | (fp_line (start 15.24 -8.89) (end 15.24 8.89) (layer F.SilkS) (width 0.15)) 26 | (pad 1 thru_hole rect (at -13.97 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 27 | (pad 2 thru_hole circle (at -11.43 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 28 | (pad 3 thru_hole circle (at -8.89 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 29 | (pad 4 thru_hole circle (at -6.35 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 30 | (pad 5 thru_hole circle (at -3.81 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 31 | (pad 6 thru_hole circle (at -1.27 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 32 | (pad 7 thru_hole circle (at 1.27 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 33 | (pad 8 thru_hole circle (at 3.81 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 34 | (pad 9 thru_hole circle (at 6.35 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 35 | (pad 10 thru_hole circle (at 8.89 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 36 | (pad 11 thru_hole circle (at 11.43 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 37 | (pad 12 thru_hole circle (at 13.97 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 38 | (pad 13 thru_hole circle (at 13.97 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 39 | (pad 14 thru_hole circle (at 11.43 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 40 | (pad 15 thru_hole circle (at 8.89 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 41 | (pad 16 thru_hole circle (at 6.35 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 42 | (pad 17 thru_hole circle (at 3.81 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 43 | (pad 18 thru_hole circle (at 1.27 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 44 | (pad 19 thru_hole circle (at -1.27 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 45 | (pad 20 thru_hole circle (at -3.81 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 46 | (pad 21 thru_hole circle (at -6.35 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 47 | (pad 22 thru_hole circle (at -8.89 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 48 | (pad 23 thru_hole circle (at -11.43 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 49 | (pad 24 thru_hole circle (at -13.97 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 50 | ) 51 | -------------------------------------------------------------------------------- /btrfld_pcb/SW_KEYBOARD.pretty/SW_PG1350_reversible.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "SW_PG1350_reversible" (version 20211014) (generator pcbnew) 2 | (layer "F.Cu") 3 | (tedit 5DD501D8) 4 | (descr "Kailh \"Choc\" PG1350 keyswitch, able to be mounted on front or back of PCB") 5 | (tags "kailh,choc") 6 | (attr through_hole) 7 | (fp_text reference "REF**" (at 0 -8.255) (layer "F.SilkS") 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | (tstamp b06ce446-c27e-47df-a4e3-d10b64552c26) 10 | ) 11 | (fp_text value "SW_PG1350_reversible" (at 0 8.255) (layer "F.Fab") 12 | (effects (font (size 1 1) (thickness 0.15))) 13 | (tstamp c9a0dd18-d945-4bfe-8921-ced29a4068d2) 14 | ) 15 | (fp_text user "${REFERENCE}" (at 0 -8.255) (layer "B.SilkS") 16 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 17 | (tstamp 3559e287-424e-4397-b080-77c7ba6f395b) 18 | ) 19 | (fp_text user "${REFERENCE}" (at 0 0) (layer "B.Fab") 20 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 21 | (tstamp 02165243-61a3-4857-84ba-71a77cb9a387) 22 | ) 23 | (fp_text user "${VALUE}" (at 0 8.255) (layer "B.Fab") 24 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 25 | (tstamp e6521bef-4109-48f7-8b88-4121b0468927) 26 | ) 27 | (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") 28 | (effects (font (size 1 1) (thickness 0.15))) 29 | (tstamp 9ff4672a-e1a4-4a1e-887d-1b9a3429d278) 30 | ) 31 | (fp_line (start -7 7) (end -7 6) (layer "B.SilkS") (width 0.15) (tstamp 3451168c-3c76-4628-aee4-7c231bd100c3)) 32 | (fp_line (start -6 7) (end -7 7) (layer "B.SilkS") (width 0.15) (tstamp 563c12e4-8f8c-446c-a11f-94f5aa93b994)) 33 | (fp_line (start 6 -7) (end 7 -7) (layer "B.SilkS") (width 0.15) (tstamp 6ff874d0-4ac5-414c-83a7-573eda4c7703)) 34 | (fp_line (start 7 -7) (end 7 -6) (layer "B.SilkS") (width 0.15) (tstamp 9538e4ed-27e6-4c37-b989-9859dc0d49e8)) 35 | (fp_line (start -7 -7) (end -6 -7) (layer "B.SilkS") (width 0.15) (tstamp a3668681-09b1-48f0-a7b1-f6b24183a469)) 36 | (fp_line (start -7 -6) (end -7 -7) (layer "B.SilkS") (width 0.15) (tstamp be0953c0-632d-4dd2-85e9-4d41239f22d2)) 37 | (fp_line (start 7 6) (end 7 7) (layer "B.SilkS") (width 0.15) (tstamp ca213826-0282-4b3a-840f-ec416dc34acf)) 38 | (fp_line (start 7 7) (end 6 7) (layer "B.SilkS") (width 0.15) (tstamp e63e39d7-6ac0-4ffd-8aa3-1841a4541b55)) 39 | (fp_line (start -6 7) (end -7 7) (layer "F.SilkS") (width 0.15) (tstamp 08e2d62f-f99a-4268-8b33-617dfcc63e75)) 40 | (fp_line (start -7 -7) (end -6 -7) (layer "F.SilkS") (width 0.15) (tstamp 5994a946-119f-4db4-aafe-00ae73b5b800)) 41 | (fp_line (start 7 -7) (end 7 -6) (layer "F.SilkS") (width 0.15) (tstamp 81c041f3-483e-477d-9475-d108280de2a9)) 42 | (fp_line (start 7 7) (end 6 7) (layer "F.SilkS") (width 0.15) (tstamp 92e8f8c3-0985-4c0d-8e38-92cbbf365409)) 43 | (fp_line (start 6 -7) (end 7 -7) (layer "F.SilkS") (width 0.15) (tstamp e149e0b1-47fa-4b20-b36e-2d51ee1e85c3)) 44 | (fp_line (start 7 6) (end 7 7) (layer "F.SilkS") (width 0.15) (tstamp e68c5170-03c3-4a20-abd0-ad610c43d035)) 45 | (fp_line (start -7 7) (end -7 6) (layer "F.SilkS") (width 0.15) (tstamp eaef1172-3351-417c-bfc4-74a598f141cb)) 46 | (fp_line (start -7 -6) (end -7 -7) (layer "F.SilkS") (width 0.15) (tstamp f6ee98b5-4773-4eeb-a825-33c1705abace)) 47 | (fp_line (start -6.9 6.9) (end -6.9 -6.9) (layer "Eco2.User") (width 0.15) (tstamp 16ded395-a862-4198-b3af-ba8c7fb298bb)) 48 | (fp_line (start -2.6 -3.1) (end -2.6 -6.3) (layer "Eco2.User") (width 0.15) (tstamp 681bd495-c396-44ce-92bd-4b397cd48c04)) 49 | (fp_line (start 6.9 -6.9) (end -6.9 -6.9) (layer "Eco2.User") (width 0.15) (tstamp 851ab59d-1fd7-45c7-a775-29797327cafc)) 50 | (fp_line (start 6.9 -6.9) (end 6.9 6.9) (layer "Eco2.User") (width 0.15) (tstamp 975b065a-4fee-4d11-9f2f-b1d40a3629cb)) 51 | (fp_line (start 2.6 -6.3) (end -2.6 -6.3) (layer "Eco2.User") (width 0.15) (tstamp a1c7b1f5-f895-4192-9484-2357882c73e0)) 52 | (fp_line (start -2.6 -3.1) (end 2.6 -3.1) (layer "Eco2.User") (width 0.15) (tstamp b680b4a7-6cb0-40b5-a7ec-a02910a0daa4)) 53 | (fp_line (start 2.6 -3.1) (end 2.6 -6.3) (layer "Eco2.User") (width 0.15) (tstamp c5a1761e-3391-4e74-90c9-947fd66e1fc6)) 54 | (fp_line (start -6.9 6.9) (end 6.9 6.9) (layer "Eco2.User") (width 0.15) (tstamp e1105432-6a2f-45d9-8a08-47401d087cf4)) 55 | (fp_line (start 7.5 7.5) (end -7.5 7.5) (layer "B.Fab") (width 0.15) (tstamp 23e66461-bcf2-4335-93c2-5c91dfd00187)) 56 | (fp_line (start -7.5 -7.5) (end 7.5 -7.5) (layer "B.Fab") (width 0.15) (tstamp 3934cdea-42c8-4ab1-b1be-2c4978ab08ae)) 57 | (fp_line (start 7.5 -7.5) (end 7.5 7.5) (layer "B.Fab") (width 0.15) (tstamp d0dfd7c1-401d-4f64-8463-f4c0813ac28f)) 58 | (fp_line (start -7.5 7.5) (end -7.5 -7.5) (layer "B.Fab") (width 0.15) (tstamp dd2f6b13-9e35-4a67-90ac-cf0d1ea34e5a)) 59 | (fp_line (start -7.5 -7.5) (end 7.5 -7.5) (layer "F.Fab") (width 0.15) (tstamp 646d9e91-59b4-4865-a2fc-29780ed32563)) 60 | (fp_line (start 7.5 -7.5) (end 7.5 7.5) (layer "F.Fab") (width 0.15) (tstamp 87c78429-be2b-40ed-8d3b-56cb9666a56f)) 61 | (fp_line (start 7.5 7.5) (end -7.5 7.5) (layer "F.Fab") (width 0.15) (tstamp 99030c03-63b4-49ba-b5ab-4d56974f7963)) 62 | (fp_line (start -7.5 7.5) (end -7.5 -7.5) (layer "F.Fab") (width 0.15) (tstamp edc9ab4f-487a-48dc-95f2-4d87f0e9cf9e)) 63 | (pad "" np_thru_hole circle (at 0 0) (size 3.429 3.429) (drill 3.429) (layers *.Cu *.Mask) (tstamp 0f3c9e3a-9c59-4881-b27a-d0e982b3ea8e)) 64 | (pad "" np_thru_hole circle (at -5.5 0) (size 1.7018 1.7018) (drill 1.7018) (layers *.Cu *.Mask) (tstamp 68b52f01-fa04-4908-bf88-60c62ace1cfa)) 65 | (pad "" np_thru_hole circle (at -5.22 -4.2) (size 0.9906 0.9906) (drill 0.9906) (layers *.Cu *.Mask) (tstamp 825c70b0-4860-42b7-97dc-86bfa46e06fd)) 66 | (pad "" np_thru_hole circle (at 5.5 0) (size 1.7018 1.7018) (drill 1.7018) (layers *.Cu *.Mask) (tstamp 9d984d1b-8097-407f-92f3-3ef68867dcfa)) 67 | (pad "" np_thru_hole circle (at 5.22 -4.2) (size 0.9906 0.9906) (drill 0.9906) (layers *.Cu *.Mask) (tstamp bb4f0314-c44c-4dda-b85c-537120eaae9a)) 68 | (pad "1" thru_hole circle (at 0 5.9) (size 2.032 2.032) (drill 1.27) (layers *.Cu *.Mask) (tstamp 46cfd089-6873-4d8b-89af-02ff30e49472)) 69 | (pad "2" thru_hole circle (at 5 3.8) (size 2.032 2.032) (drill 1.27) (layers *.Cu *.Mask) (tstamp bbb15673-6d42-42b8-9d51-7515b3ad9ee9)) 70 | (pad "2" thru_hole circle (at -5 3.8) (size 2.032 2.032) (drill 1.27) (layers *.Cu *.Mask) (tstamp e83e0227-ac0f-4180-82bd-68d3a7b56476)) 71 | ) 72 | -------------------------------------------------------------------------------- /btrfld_pcb/SW_KEYBOARD.pretty/flipped_smd_diode.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "flipped_smd_diode" (version 20211014) (generator pcbnew) 2 | (layer "F.Cu") 3 | (tedit 63E28E69) 4 | (attr through_hole) 5 | (fp_text reference "REF**" (at 0 -0.5 unlocked) (layer "F.SilkS") 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | (tstamp e5b6ce0d-0226-4935-8057-ee6b8dba2942) 8 | ) 9 | (fp_text value "flipped_smd_diode" (at 0 1 unlocked) (layer "F.Fab") 10 | (effects (font (size 1 1) (thickness 0.15))) 11 | (tstamp 8f5ae0c1-79dd-4dca-9fbb-11a6878f3f4a) 12 | ) 13 | (fp_line (start -0.72 -1.99) (end -1.33 -1.99) (layer "B.SilkS") (width 0.12) (tstamp e5f340c6-4ca4-460c-aaac-1784cff3811f)) 14 | (fp_line (start 0.71 -1.99) (end 1.3 -1.98) (layer "B.SilkS") (width 0.12) (tstamp f361aea1-9689-4f51-a7be-e0b7c5844da0)) 15 | (fp_line (start 0.69 -1.97) (end 1.3 -1.97) (layer "F.SilkS") (width 0.12) (tstamp 7114afb7-49dc-4403-ae26-9efc0b6fc03d)) 16 | (fp_line (start -0.74 -1.97) (end -1.34 -1.97) (layer "F.SilkS") (width 0.12) (tstamp f486cc0c-a204-45b8-bbc7-7d1c6631c2ce)) 17 | (pad "" np_thru_hole circle (at 0 -3.02) (size 2.45 2.45) (drill 2.45) (layers *.Mask) (tstamp 055a2a74-603f-4b08-9e26-20e5b35b381c)) 18 | (pad "0" thru_hole roundrect (at 0 -1.19) (size 1.45 1.524) (drill 0.4) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp 2df3f6f4-4777-41cc-81bc-c3af95fb5586)) 19 | (pad "1" thru_hole roundrect (at 0 -4.895 180) (size 1.45 1.524) (drill 0.4) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp c8343970-9e0e-4e47-a6a5-cde3b7860979)) 20 | ) 21 | -------------------------------------------------------------------------------- /btrfld_pcb/SW_KEYBOARD.pretty/inline_diode.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "inline_diode" (version 20211014) (generator pcbnew) 2 | (layer "F.Cu") 3 | (tedit 63D0BA62) 4 | (attr through_hole) 5 | (fp_text reference "REF**" (at -0.02 -0.35 unlocked) (layer "F.SilkS") hide 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | (tstamp 940fc91f-3d28-4131-bfa2-e20f2d08b952) 8 | ) 9 | (fp_text value "inline_diode" (at 0 1 unlocked) (layer "F.Fab") 10 | (effects (font (size 1 1) (thickness 0.15))) 11 | (tstamp 6d1ca6f3-4eaf-4074-a6ea-55cb1961d038) 12 | ) 13 | (fp_line (start 1.02 -3.1) (end 1.99 -3.09) (layer "B.SilkS") (width 0.12) (tstamp 6d046c17-6d97-4ae6-b362-93de307737d1)) 14 | (fp_line (start -1.07 -3.14) (end -1.95 -3.14) (layer "B.SilkS") (width 0.12) (tstamp 80134c0f-0a44-4016-be3f-03565eb02d29)) 15 | (fp_line (start -1.1 -3.13) (end -1.89 -3.13) (layer "F.SilkS") (width 0.12) (tstamp 199dc825-7002-4863-bcdd-3a1ad74ccf97)) 16 | (fp_line (start 1.98 -3.09) (end 1.01 -3.09) (layer "F.SilkS") (width 0.12) (tstamp fb30e0ec-81a8-4853-b1c9-9c25ed819bef)) 17 | (fp_rect (start -1.0775 -1.92) (end 1.0175 -9.94) (layer "Edge.Cuts") (width 0.12) (fill none) (tstamp 0b6622a0-07df-4e4a-8370-b3b1b301441f)) 18 | (pad "1" thru_hole roundrect (at -0.06 -10.17) (size 1.524 2.6) (drill 0.762 (offset 0 -0.5)) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp 4781db20-8791-444b-9b76-04b2524f6b79)) 19 | (pad "2" thru_hole roundrect (at -0.02 -1.71 180) (size 1.524 2.6) (drill 0.762 (offset 0 -0.5)) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp 5868c2ab-58c0-441a-a59f-d2c3790026e9)) 20 | ) 21 | -------------------------------------------------------------------------------- /btrfld_pcb/SW_KEYBOARD.pretty/wire_loom.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "wire_loom" (version 20211014) (generator pcbnew) 2 | (layer "F.Cu") 3 | (tedit 63D2C35E) 4 | (attr through_hole) 5 | (fp_text reference "REF**" (at 0.06 1.51 unlocked) (layer "F.SilkS") 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | (tstamp 0a558a77-28be-4b74-9acb-e0e16b814478) 8 | ) 9 | (fp_text value "wire_loom" (at -0.07 2.94 unlocked) (layer "F.Fab") 10 | (effects (font (size 1 1) (thickness 0.15))) 11 | (tstamp 2843f869-906c-4146-ba36-7da2bed40d01) 12 | ) 13 | (pad "" np_thru_hole circle (at 0 0) (size 2.9 2.9) (drill 2.9) (layers F&B.Cu *.Mask) (tstamp 9d95ac85-89cf-4ebc-a331-57f59cd2c191)) 14 | (pad "" np_thru_hole circle (at 0 -15.1) (size 2.9 2.9) (drill 2.9) (layers F&B.Cu *.Mask) (tstamp f9b9b148-cad7-496b-977a-3fcea476ca38)) 15 | ) 16 | -------------------------------------------------------------------------------- /btrfld_pcb/battery_switch.kicad_pcb: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 4) (host pcbnew 4.0.7) 2 | 3 | (general 4 | (links 3) 5 | (no_connects 0) 6 | (area 100.835 107.99 117.705 127.075001) 7 | (thickness 1.6) 8 | (drawings 4) 9 | (tracks 11) 10 | (zones 0) 11 | (modules 3) 12 | (nets 4) 13 | ) 14 | 15 | (page A4) 16 | (layers 17 | (0 F.Cu signal) 18 | (31 B.Cu signal) 19 | (32 B.Adhes user) 20 | (33 F.Adhes user) 21 | (34 B.Paste user) 22 | (35 F.Paste user) 23 | (36 B.SilkS user) 24 | (37 F.SilkS user) 25 | (38 B.Mask user) 26 | (39 F.Mask user) 27 | (40 Dwgs.User user) 28 | (41 Cmts.User user) 29 | (42 Eco1.User user) 30 | (43 Eco2.User user) 31 | (44 Edge.Cuts user) 32 | (45 Margin user) 33 | (46 B.CrtYd user) 34 | (47 F.CrtYd user) 35 | (48 B.Fab user) 36 | (49 F.Fab user) 37 | ) 38 | 39 | (setup 40 | (last_trace_width 1) 41 | (user_trace_width 1) 42 | (trace_clearance 0.2) 43 | (zone_clearance 0.508) 44 | (zone_45_only no) 45 | (trace_min 0.2) 46 | (segment_width 0.2) 47 | (edge_width 0.15) 48 | (via_size 0.6) 49 | (via_drill 0.4) 50 | (via_min_size 0.4) 51 | (via_min_drill 0.3) 52 | (uvia_size 0.3) 53 | (uvia_drill 0.1) 54 | (uvias_allowed no) 55 | (uvia_min_size 0.2) 56 | (uvia_min_drill 0.1) 57 | (pcb_text_width 0.3) 58 | (pcb_text_size 1.5 1.5) 59 | (mod_edge_width 0.15) 60 | (mod_text_size 1 1) 61 | (mod_text_width 0.15) 62 | (pad_size 1.524 1.524) 63 | (pad_drill 0.762) 64 | (pad_to_mask_clearance 0.2) 65 | (aux_axis_origin 0 0) 66 | (visible_elements FFFFFF7F) 67 | (pcbplotparams 68 | (layerselection 0x010f0_80000001) 69 | (usegerberextensions false) 70 | (excludeedgelayer true) 71 | (linewidth 0.100000) 72 | (plotframeref false) 73 | (viasonmask false) 74 | (mode 1) 75 | (useauxorigin false) 76 | (hpglpennumber 1) 77 | (hpglpenspeed 20) 78 | (hpglpendiameter 15) 79 | (hpglpenoverlay 2) 80 | (psnegative false) 81 | (psa4output false) 82 | (plotreference true) 83 | (plotvalue true) 84 | (plotinvisibletext false) 85 | (padsonsilk false) 86 | (subtractmaskfromsilk false) 87 | (outputformat 1) 88 | (mirror false) 89 | (drillshape 0) 90 | (scaleselection 1) 91 | (outputdirectory gerber/)) 92 | ) 93 | 94 | (net 0 "") 95 | (net 1 "Net-(J1-Pad1)") 96 | (net 2 "Net-(J1-Pad2)") 97 | (net 3 "Net-(J2-Pad1)") 98 | 99 | (net_class Default "This is the default net class." 100 | (clearance 0.2) 101 | (trace_width 0.25) 102 | (via_dia 0.6) 103 | (via_drill 0.4) 104 | (uvia_dia 0.3) 105 | (uvia_drill 0.1) 106 | (add_net "Net-(J1-Pad1)") 107 | (add_net "Net-(J1-Pad2)") 108 | (add_net "Net-(J2-Pad1)") 109 | ) 110 | 111 | (net_class POWER "" 112 | (clearance 0.2) 113 | (trace_width 1) 114 | (via_dia 0.6) 115 | (via_drill 0.4) 116 | (uvia_dia 0.3) 117 | (uvia_drill 0.1) 118 | ) 119 | 120 | (module E73:SPDT_C128955 (layer F.Cu) (tedit 5BA5227F) (tstamp 5BA5202F) 121 | (at 109.22 113.665) 122 | (path /5BA51E87) 123 | (fp_text reference SW1 (at 0.2 3.65) (layer F.SilkS) hide 124 | (effects (font (size 1 1) (thickness 0.15))) 125 | ) 126 | (fp_text value SW_SPDT (at -0.05 -4.7) (layer F.Fab) 127 | (effects (font (size 1 1) (thickness 0.15))) 128 | ) 129 | (fp_line (start 0 -3.85) (end 1.9 -3.85) (layer F.Fab) (width 0.15)) 130 | (fp_line (start 1.9 -3.85) (end 1.95 -1.35) (layer F.Fab) (width 0.15)) 131 | (fp_line (start 1.95 -1.35) (end -1.95 -1.35) (layer F.Fab) (width 0.15)) 132 | (fp_line (start -1.95 -1.35) (end -1.95 -3.85) (layer F.Fab) (width 0.15)) 133 | (fp_line (start -1.95 -3.85) (end 0 -3.85) (layer F.Fab) (width 0.15)) 134 | (fp_line (start 0 -1.35) (end -3.3 -1.35) (layer F.Fab) (width 0.15)) 135 | (fp_line (start -3.3 -1.35) (end -3.3 1.5) (layer F.Fab) (width 0.15)) 136 | (fp_line (start -3.3 1.5) (end 3.3 1.5) (layer F.Fab) (width 0.15)) 137 | (fp_line (start 3.3 1.5) (end 3.3 -1.35) (layer F.Fab) (width 0.15)) 138 | (fp_line (start 0 -1.35) (end 3.3 -1.35) (layer F.Fab) (width 0.15)) 139 | (pad "" np_thru_hole circle (at 1.5 0) (size 1 1) (drill 0.9) (layers *.Cu *.Mask)) 140 | (pad "" np_thru_hole circle (at -1.5 0) (size 1 1) (drill 0.9) (layers *.Cu *.Mask)) 141 | (pad 2 smd rect (at -0.75 2.075) (size 0.9 1.25) (layers F.Cu F.Paste F.Mask) 142 | (net 1 "Net-(J1-Pad1)")) 143 | (pad 3 smd rect (at -2.25 2.075) (size 0.9 1.25) (layers F.Cu F.Paste F.Mask)) 144 | (pad 1 smd rect (at 2.25 2.075) (size 0.9 1.25) (layers F.Cu F.Paste F.Mask) 145 | (net 3 "Net-(J2-Pad1)")) 146 | (pad 0 smd rect (at 3.7 -1.1) (size 0.9 0.9) (layers F.Cu F.Paste F.Mask)) 147 | (pad 0 smd rect (at 3.7 1.1) (size 0.9 0.9) (layers F.Cu F.Paste F.Mask)) 148 | (pad 0 smd rect (at -3.7 1.1) (size 0.9 0.9) (layers F.Cu F.Paste F.Mask)) 149 | (pad 0 smd rect (at -3.7 -1.1) (size 0.9 0.9) (layers F.Cu F.Paste F.Mask)) 150 | ) 151 | 152 | (module Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm (layer F.Cu) (tedit 5BA52353) (tstamp 5BA5234B) 153 | (at 106.68 120.015 270) 154 | (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row") 155 | (tags "Through hole pin header THT 1x02 2.54mm single row") 156 | (path /5BA51F2B) 157 | (fp_text reference J1 (at 0 -2.33 270) (layer F.SilkS) hide 158 | (effects (font (size 1 1) (thickness 0.15))) 159 | ) 160 | (fp_text value Conn_01x02 (at 0 4.87 270) (layer F.Fab) 161 | (effects (font (size 1 1) (thickness 0.15))) 162 | ) 163 | (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) 164 | (fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1)) 165 | (fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1)) 166 | (fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) 167 | (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) 168 | (fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12)) 169 | (fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12)) 170 | (fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12)) 171 | (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) 172 | (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) 173 | (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) 174 | (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05)) 175 | (fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05)) 176 | (fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) 177 | (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) 178 | (fp_text user %R (at 0 1.27 360) (layer F.Fab) 179 | (effects (font (size 1 1) (thickness 0.15))) 180 | ) 181 | (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 182 | (net 1 "Net-(J1-Pad1)")) 183 | (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 184 | (net 2 "Net-(J1-Pad2)")) 185 | (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x02_Pitch2.54mm.wrl 186 | (at (xyz 0 0 0)) 187 | (scale (xyz 1 1 1)) 188 | (rotate (xyz 0 0 0)) 189 | ) 190 | ) 191 | 192 | (module Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm (layer F.Cu) (tedit 5BA52359) (tstamp 5BA52350) 193 | (at 114.3 120.015 270) 194 | (descr "Through hole straight pin header, 1x02, 2.54mm pitch, single row") 195 | (tags "Through hole pin header THT 1x02 2.54mm single row") 196 | (path /5BA51ED4) 197 | (fp_text reference J2 (at 0 -2.33 270) (layer F.SilkS) hide 198 | (effects (font (size 1 1) (thickness 0.15))) 199 | ) 200 | (fp_text value Conn_01x02 (at 0 4.87 270) (layer F.Fab) 201 | (effects (font (size 1 1) (thickness 0.15))) 202 | ) 203 | (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) 204 | (fp_line (start 1.27 -1.27) (end 1.27 3.81) (layer F.Fab) (width 0.1)) 205 | (fp_line (start 1.27 3.81) (end -1.27 3.81) (layer F.Fab) (width 0.1)) 206 | (fp_line (start -1.27 3.81) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) 207 | (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) 208 | (fp_line (start -1.33 3.87) (end 1.33 3.87) (layer F.SilkS) (width 0.12)) 209 | (fp_line (start -1.33 1.27) (end -1.33 3.87) (layer F.SilkS) (width 0.12)) 210 | (fp_line (start 1.33 1.27) (end 1.33 3.87) (layer F.SilkS) (width 0.12)) 211 | (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) 212 | (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) 213 | (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) 214 | (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05)) 215 | (fp_line (start -1.8 4.35) (end 1.8 4.35) (layer F.CrtYd) (width 0.05)) 216 | (fp_line (start 1.8 4.35) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) 217 | (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) 218 | (fp_text user %R (at 0 1.27 360) (layer F.Fab) 219 | (effects (font (size 1 1) (thickness 0.15))) 220 | ) 221 | (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 222 | (net 3 "Net-(J2-Pad1)")) 223 | (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 224 | (net 2 "Net-(J1-Pad2)")) 225 | (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x02_Pitch2.54mm.wrl 226 | (at (xyz 0 0 0)) 227 | (scale (xyz 1 1 1)) 228 | (rotate (xyz 0 0 0)) 229 | ) 230 | ) 231 | 232 | (gr_line (start 101.6 111.76) (end 101.6 127) (layer Edge.Cuts) (width 0.15)) 233 | (gr_line (start 116.84 111.76) (end 101.6 111.76) (layer Edge.Cuts) (width 0.15)) 234 | (gr_line (start 116.84 127) (end 116.84 111.76) (layer Edge.Cuts) (width 0.15)) 235 | (gr_line (start 101.6 127) (end 116.84 127) (layer Edge.Cuts) (width 0.15)) 236 | 237 | (segment (start 108.47 115.74) (end 108.47 118.225) (width 1) (layer F.Cu) (net 1)) 238 | (segment (start 108.47 118.225) (end 106.68 120.015) (width 1) (layer F.Cu) (net 1)) 239 | (segment (start 109.22 122.555) (end 111.76 120.015) (width 1) (layer F.Cu) (net 2)) 240 | (segment (start 105.477919 122.555) (end 109.22 122.555) (width 1) (layer F.Cu) (net 2)) 241 | (segment (start 104.14 120.015) (end 104.14 121.217081) (width 1) (layer F.Cu) (net 2)) 242 | (segment (start 104.14 121.217081) (end 105.477919 122.555) (width 1) (layer F.Cu) (net 2)) 243 | (segment (start 112.395 116.84) (end 113.03 116.84) (width 1) (layer F.Cu) (net 3)) 244 | (segment (start 113.03 116.84) (end 114.3 118.11) (width 1) (layer F.Cu) (net 3)) 245 | (segment (start 111.47 115.74) (end 111.47 115.915) (width 1) (layer F.Cu) (net 3)) 246 | (segment (start 111.47 115.915) (end 112.395 116.84) (width 1) (layer F.Cu) (net 3)) 247 | (segment (start 114.3 118.11) (end 114.3 120.015) (width 1) (layer F.Cu) (net 3)) 248 | 249 | ) 250 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-24_224313.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-24_224313.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-24_225427.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-24_225427.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-24_230427.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-24_230427.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-24_232451.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-24_232451.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-24_233451.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-24_233451.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-25_162743.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-25_162743.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-25_232529.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-25_232529.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-25_233529.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-25_233529.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-25_234529.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-25_234529.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-25_235124.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-25_235124.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-26_115229.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-26_115229.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-26_120047.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-26_120047.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-26_121917.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-26_121917.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-26_123101.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-26_123101.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-26_123655.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-01-26_123655.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-02-02_094522.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-02-02_094522.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-02-07_112517.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-02-07_112517.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-02-07_113213.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-02-07_113213.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-02-07_114710.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-02-07_114710.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-02-07_115235.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2023-02-07_115235.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2024-07-30_111413.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb/btrfld_pcb-backups/btrfld_pcb-2024-07-30_111413.zip -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-bkp-2023-1-24-19.21.47.kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20211014) (generator pcbnew) 2 | 3 | (general 4 | (thickness 1.6) 5 | ) 6 | 7 | (paper "A4") 8 | (layers 9 | (0 "F.Cu" signal) 10 | (31 "B.Cu" signal) 11 | (32 "B.Adhes" user "B.Adhesive") 12 | (33 "F.Adhes" user "F.Adhesive") 13 | (34 "B.Paste" user) 14 | (35 "F.Paste" user) 15 | (36 "B.SilkS" user "B.Silkscreen") 16 | (37 "F.SilkS" user "F.Silkscreen") 17 | (38 "B.Mask" user) 18 | (39 "F.Mask" user) 19 | (40 "Dwgs.User" user "User.Drawings") 20 | (41 "Cmts.User" user "User.Comments") 21 | (42 "Eco1.User" user "User.Eco1") 22 | (43 "Eco2.User" user "User.Eco2") 23 | (44 "Edge.Cuts" user) 24 | (45 "Margin" user) 25 | (46 "B.CrtYd" user "B.Courtyard") 26 | (47 "F.CrtYd" user "F.Courtyard") 27 | (48 "B.Fab" user) 28 | (49 "F.Fab" user) 29 | (50 "User.1" user) 30 | (51 "User.2" user) 31 | (52 "User.3" user) 32 | (53 "User.4" user) 33 | (54 "User.5" user) 34 | (55 "User.6" user) 35 | (56 "User.7" user) 36 | (57 "User.8" user) 37 | (58 "User.9" user) 38 | ) 39 | 40 | (setup 41 | (pad_to_mask_clearance 0) 42 | (pcbplotparams 43 | (layerselection 0x00010fc_ffffffff) 44 | (disableapertmacros false) 45 | (usegerberextensions false) 46 | (usegerberattributes true) 47 | (usegerberadvancedattributes true) 48 | (creategerberjobfile true) 49 | (svguseinch false) 50 | (svgprecision 6) 51 | (excludeedgelayer true) 52 | (plotframeref false) 53 | (viasonmask false) 54 | (mode 1) 55 | (useauxorigin false) 56 | (hpglpennumber 1) 57 | (hpglpenspeed 20) 58 | (hpglpendiameter 15.000000) 59 | (dxfpolygonmode true) 60 | (dxfimperialunits true) 61 | (dxfusepcbnewfont true) 62 | (psnegative false) 63 | (psa4output false) 64 | (plotreference true) 65 | (plotvalue true) 66 | (plotinvisibletext false) 67 | (sketchpadsonfab false) 68 | (subtractmaskfromsilk false) 69 | (outputformat 1) 70 | (mirror false) 71 | (drillshape 1) 72 | (scaleselection 1) 73 | (outputdirectory "") 74 | ) 75 | ) 76 | 77 | (net 0 "") 78 | 79 | (gr_line (start 73.66 111.76) (end 73.66 83.82) (layer "Edge.Cuts") (width 0.1) (tstamp 30317bf0-88bb-49e7-bf8b-9f3883982225)) 80 | (gr_line (start 73.66 83.82) (end 66.04 83.82) (layer "Edge.Cuts") (width 0.1) (tstamp 63c56ea4-91a3-4172-b9de-a4388cc8f894)) 81 | (gr_line (start 66.04 60.96) (end 157.48 60.96) (layer "Edge.Cuts") (width 0.1) (tstamp 6c2e273e-743c-4f1e-a647-4171f8122550)) 82 | (gr_line (start 157.48 60.96) (end 157.48 124.46) (layer "Edge.Cuts") (width 0.1) (tstamp 7b044939-8c4d-444f-b9e0-a15fcdeb5a86)) 83 | (gr_line (start 104.14 111.76) (end 73.66 111.76) (layer "Edge.Cuts") (width 0.1) (tstamp 9186dae5-6dc3-4744-9f90-e697559c6ac8)) 84 | (gr_line (start 104.14 124.46) (end 104.14 111.76) (layer "Edge.Cuts") (width 0.1) (tstamp aa79024d-ca7e-4c24-b127-7df08bbd0c75)) 85 | (gr_line (start 66.04 83.82) (end 66.04 60.96) (layer "Edge.Cuts") (width 0.1) (tstamp b78cb2c1-ae4b-4d9b-acd8-d7fe342342f2)) 86 | (gr_line (start 157.48 124.46) (end 104.14 124.46) (layer "Edge.Cuts") (width 0.1) (tstamp f9403623-c00c-4b71-bc5c-d763ff009386)) 87 | (dimension (type aligned) (layer "Edge.Cuts") (tstamp fed97871-4d75-4194-a3d3-5b61f2a948a5) 88 | (pts (xy 66.04 60.96) (xy 157.48 60.96)) 89 | (height -12.7) 90 | (gr_text "91.4400 mm" (at 111.76 47.11) (layer "Edge.Cuts") (tstamp 4f489d12-440e-4cd0-933d-b6701961a6d6) 91 | (effects (font (size 1 1) (thickness 0.15))) 92 | ) 93 | (format (units 3) (units_format 1) (precision 4)) 94 | (style (thickness 0.1) (arrow_length 1.27) (text_position_mode 0) (extension_height 0.58642) (extension_offset 0.5) keep_text_aligned) 95 | ) 96 | 97 | ) 98 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-bkp-2023-1-24-19.47.39.kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20211014) (generator pcbnew) 2 | 3 | (general 4 | (thickness 1.6) 5 | ) 6 | 7 | (paper "A4") 8 | (layers 9 | (0 "F.Cu" signal) 10 | (31 "B.Cu" signal) 11 | (32 "B.Adhes" user "B.Adhesive") 12 | (33 "F.Adhes" user "F.Adhesive") 13 | (34 "B.Paste" user) 14 | (35 "F.Paste" user) 15 | (36 "B.SilkS" user "B.Silkscreen") 16 | (37 "F.SilkS" user "F.Silkscreen") 17 | (38 "B.Mask" user) 18 | (39 "F.Mask" user) 19 | (40 "Dwgs.User" user "User.Drawings") 20 | (41 "Cmts.User" user "User.Comments") 21 | (42 "Eco1.User" user "User.Eco1") 22 | (43 "Eco2.User" user "User.Eco2") 23 | (44 "Edge.Cuts" user) 24 | (45 "Margin" user) 25 | (46 "B.CrtYd" user "B.Courtyard") 26 | (47 "F.CrtYd" user "F.Courtyard") 27 | (48 "B.Fab" user) 28 | (49 "F.Fab" user) 29 | (50 "User.1" user) 30 | (51 "User.2" user) 31 | (52 "User.3" user) 32 | (53 "User.4" user) 33 | (54 "User.5" user) 34 | (55 "User.6" user) 35 | (56 "User.7" user) 36 | (57 "User.8" user) 37 | (58 "User.9" user) 38 | ) 39 | 40 | (setup 41 | (pad_to_mask_clearance 0) 42 | (pcbplotparams 43 | (layerselection 0x00010fc_ffffffff) 44 | (disableapertmacros false) 45 | (usegerberextensions false) 46 | (usegerberattributes true) 47 | (usegerberadvancedattributes true) 48 | (creategerberjobfile true) 49 | (svguseinch false) 50 | (svgprecision 6) 51 | (excludeedgelayer true) 52 | (plotframeref false) 53 | (viasonmask false) 54 | (mode 1) 55 | (useauxorigin false) 56 | (hpglpennumber 1) 57 | (hpglpenspeed 20) 58 | (hpglpendiameter 15.000000) 59 | (dxfpolygonmode true) 60 | (dxfimperialunits true) 61 | (dxfusepcbnewfont true) 62 | (psnegative false) 63 | (psa4output false) 64 | (plotreference true) 65 | (plotvalue true) 66 | (plotinvisibletext false) 67 | (sketchpadsonfab false) 68 | (subtractmaskfromsilk false) 69 | (outputformat 1) 70 | (mirror false) 71 | (drillshape 1) 72 | (scaleselection 1) 73 | (outputdirectory "") 74 | ) 75 | ) 76 | 77 | (net 0 "") 78 | 79 | (gr_line (start 73.66 111.76) (end 73.66 83.82) (layer "Edge.Cuts") (width 0.1) (tstamp 30317bf0-88bb-49e7-bf8b-9f3883982225)) 80 | (gr_line (start 73.66 83.82) (end 66.04 83.82) (layer "Edge.Cuts") (width 0.1) (tstamp 63c56ea4-91a3-4172-b9de-a4388cc8f894)) 81 | (gr_line (start 66.04 60.96) (end 157.48 60.96) (layer "Edge.Cuts") (width 0.1) (tstamp 6c2e273e-743c-4f1e-a647-4171f8122550)) 82 | (gr_line (start 157.48 60.96) (end 157.48 124.46) (layer "Edge.Cuts") (width 0.1) (tstamp 7b044939-8c4d-444f-b9e0-a15fcdeb5a86)) 83 | (gr_line (start 104.14 111.76) (end 73.66 111.76) (layer "Edge.Cuts") (width 0.1) (tstamp 9186dae5-6dc3-4744-9f90-e697559c6ac8)) 84 | (gr_line (start 104.14 124.46) (end 104.14 111.76) (layer "Edge.Cuts") (width 0.1) (tstamp aa79024d-ca7e-4c24-b127-7df08bbd0c75)) 85 | (gr_line (start 66.04 83.82) (end 66.04 60.96) (layer "Edge.Cuts") (width 0.1) (tstamp b78cb2c1-ae4b-4d9b-acd8-d7fe342342f2)) 86 | (gr_line (start 157.48 124.46) (end 104.14 124.46) (layer "Edge.Cuts") (width 0.1) (tstamp f9403623-c00c-4b71-bc5c-d763ff009386)) 87 | (dimension (type aligned) (layer "Edge.Cuts") (tstamp fed97871-4d75-4194-a3d3-5b61f2a948a5) 88 | (pts (xy 66.04 60.96) (xy 157.48 60.96)) 89 | (height -12.7) 90 | (gr_text "91.4400 mm" (at 111.76 47.11) (layer "Edge.Cuts") (tstamp 4f489d12-440e-4cd0-933d-b6701961a6d6) 91 | (effects (font (size 1 1) (thickness 0.15))) 92 | ) 93 | (format (units 3) (units_format 1) (precision 4)) 94 | (style (thickness 0.1) (arrow_length 1.27) (text_position_mode 0) (extension_height 0.58642) (extension_offset 0.5) keep_text_aligned) 95 | ) 96 | 97 | ) 98 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-bkp-2023-1-24-19.50.9.kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20211014) (generator pcbnew) 2 | 3 | (general 4 | (thickness 1.6) 5 | ) 6 | 7 | (paper "A4") 8 | (layers 9 | (0 "F.Cu" signal) 10 | (31 "B.Cu" signal) 11 | (32 "B.Adhes" user "B.Adhesive") 12 | (33 "F.Adhes" user "F.Adhesive") 13 | (34 "B.Paste" user) 14 | (35 "F.Paste" user) 15 | (36 "B.SilkS" user "B.Silkscreen") 16 | (37 "F.SilkS" user "F.Silkscreen") 17 | (38 "B.Mask" user) 18 | (39 "F.Mask" user) 19 | (40 "Dwgs.User" user "User.Drawings") 20 | (41 "Cmts.User" user "User.Comments") 21 | (42 "Eco1.User" user "User.Eco1") 22 | (43 "Eco2.User" user "User.Eco2") 23 | (44 "Edge.Cuts" user) 24 | (45 "Margin" user) 25 | (46 "B.CrtYd" user "B.Courtyard") 26 | (47 "F.CrtYd" user "F.Courtyard") 27 | (48 "B.Fab" user) 28 | (49 "F.Fab" user) 29 | (50 "User.1" user) 30 | (51 "User.2" user) 31 | (52 "User.3" user) 32 | (53 "User.4" user) 33 | (54 "User.5" user) 34 | (55 "User.6" user) 35 | (56 "User.7" user) 36 | (57 "User.8" user) 37 | (58 "User.9" user) 38 | ) 39 | 40 | (setup 41 | (pad_to_mask_clearance 0) 42 | (pcbplotparams 43 | (layerselection 0x00010fc_ffffffff) 44 | (disableapertmacros false) 45 | (usegerberextensions false) 46 | (usegerberattributes true) 47 | (usegerberadvancedattributes true) 48 | (creategerberjobfile true) 49 | (svguseinch false) 50 | (svgprecision 6) 51 | (excludeedgelayer true) 52 | (plotframeref false) 53 | (viasonmask false) 54 | (mode 1) 55 | (useauxorigin false) 56 | (hpglpennumber 1) 57 | (hpglpenspeed 20) 58 | (hpglpendiameter 15.000000) 59 | (dxfpolygonmode true) 60 | (dxfimperialunits true) 61 | (dxfusepcbnewfont true) 62 | (psnegative false) 63 | (psa4output false) 64 | (plotreference true) 65 | (plotvalue true) 66 | (plotinvisibletext false) 67 | (sketchpadsonfab false) 68 | (subtractmaskfromsilk false) 69 | (outputformat 1) 70 | (mirror false) 71 | (drillshape 1) 72 | (scaleselection 1) 73 | (outputdirectory "") 74 | ) 75 | ) 76 | 77 | (net 0 "") 78 | 79 | (gr_line (start 73.66 111.76) (end 73.66 83.82) (layer "Edge.Cuts") (width 0.1) (tstamp 30317bf0-88bb-49e7-bf8b-9f3883982225)) 80 | (gr_line (start 73.66 83.82) (end 66.04 83.82) (layer "Edge.Cuts") (width 0.1) (tstamp 63c56ea4-91a3-4172-b9de-a4388cc8f894)) 81 | (gr_line (start 66.04 60.96) (end 157.48 60.96) (layer "Edge.Cuts") (width 0.1) (tstamp 6c2e273e-743c-4f1e-a647-4171f8122550)) 82 | (gr_line (start 157.48 60.96) (end 157.48 124.46) (layer "Edge.Cuts") (width 0.1) (tstamp 7b044939-8c4d-444f-b9e0-a15fcdeb5a86)) 83 | (gr_line (start 104.14 111.76) (end 73.66 111.76) (layer "Edge.Cuts") (width 0.1) (tstamp 9186dae5-6dc3-4744-9f90-e697559c6ac8)) 84 | (gr_line (start 104.14 124.46) (end 104.14 111.76) (layer "Edge.Cuts") (width 0.1) (tstamp aa79024d-ca7e-4c24-b127-7df08bbd0c75)) 85 | (gr_line (start 66.04 83.82) (end 66.04 60.96) (layer "Edge.Cuts") (width 0.1) (tstamp b78cb2c1-ae4b-4d9b-acd8-d7fe342342f2)) 86 | (gr_line (start 157.48 124.46) (end 104.14 124.46) (layer "Edge.Cuts") (width 0.1) (tstamp f9403623-c00c-4b71-bc5c-d763ff009386)) 87 | (dimension (type aligned) (layer "Edge.Cuts") (tstamp fed97871-4d75-4194-a3d3-5b61f2a948a5) 88 | (pts (xy 66.04 60.96) (xy 157.48 60.96)) 89 | (height -12.7) 90 | (gr_text "91.4400 mm" (at 111.76 47.11) (layer "Edge.Cuts") (tstamp 4f489d12-440e-4cd0-933d-b6701961a6d6) 91 | (effects (font (size 1 1) (thickness 0.15))) 92 | ) 93 | (format (units 3) (units_format 1) (precision 4)) 94 | (style (thickness 0.1) (arrow_length 1.27) (text_position_mode 0) (extension_height 0.58642) (extension_offset 0.5) keep_text_aligned) 95 | ) 96 | 97 | ) 98 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb-bkp-2023-1-24-20.35.44.kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20211014) (generator pcbnew) 2 | 3 | (general 4 | (thickness 1.6) 5 | ) 6 | 7 | (paper "A4") 8 | (layers 9 | (0 "F.Cu" signal) 10 | (31 "B.Cu" signal) 11 | (32 "B.Adhes" user "B.Adhesive") 12 | (33 "F.Adhes" user "F.Adhesive") 13 | (34 "B.Paste" user) 14 | (35 "F.Paste" user) 15 | (36 "B.SilkS" user "B.Silkscreen") 16 | (37 "F.SilkS" user "F.Silkscreen") 17 | (38 "B.Mask" user) 18 | (39 "F.Mask" user) 19 | (40 "Dwgs.User" user "User.Drawings") 20 | (41 "Cmts.User" user "User.Comments") 21 | (42 "Eco1.User" user "User.Eco1") 22 | (43 "Eco2.User" user "User.Eco2") 23 | (44 "Edge.Cuts" user) 24 | (45 "Margin" user) 25 | (46 "B.CrtYd" user "B.Courtyard") 26 | (47 "F.CrtYd" user "F.Courtyard") 27 | (48 "B.Fab" user) 28 | (49 "F.Fab" user) 29 | (50 "User.1" user) 30 | (51 "User.2" user) 31 | (52 "User.3" user) 32 | (53 "User.4" user) 33 | (54 "User.5" user) 34 | (55 "User.6" user) 35 | (56 "User.7" user) 36 | (57 "User.8" user) 37 | (58 "User.9" user) 38 | ) 39 | 40 | (setup 41 | (pad_to_mask_clearance 0) 42 | (pcbplotparams 43 | (layerselection 0x00010fc_ffffffff) 44 | (disableapertmacros false) 45 | (usegerberextensions false) 46 | (usegerberattributes true) 47 | (usegerberadvancedattributes true) 48 | (creategerberjobfile true) 49 | (svguseinch false) 50 | (svgprecision 6) 51 | (excludeedgelayer true) 52 | (plotframeref false) 53 | (viasonmask false) 54 | (mode 1) 55 | (useauxorigin false) 56 | (hpglpennumber 1) 57 | (hpglpenspeed 20) 58 | (hpglpendiameter 15.000000) 59 | (dxfpolygonmode true) 60 | (dxfimperialunits true) 61 | (dxfusepcbnewfont true) 62 | (psnegative false) 63 | (psa4output false) 64 | (plotreference true) 65 | (plotvalue true) 66 | (plotinvisibletext false) 67 | (sketchpadsonfab false) 68 | (subtractmaskfromsilk false) 69 | (outputformat 1) 70 | (mirror false) 71 | (drillshape 1) 72 | (scaleselection 1) 73 | (outputdirectory "") 74 | ) 75 | ) 76 | 77 | (net 0 "") 78 | 79 | ) 80 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb.kicad_prl: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "active_layer": 0, 4 | "active_layer_preset": "All Layers", 5 | "auto_track_width": true, 6 | "hidden_nets": [], 7 | "high_contrast_mode": 0, 8 | "net_color_mode": 1, 9 | "opacity": { 10 | "pads": 1.0, 11 | "tracks": 1.0, 12 | "vias": 1.0, 13 | "zones": 0.6 14 | }, 15 | "ratsnest_display_mode": 0, 16 | "selection_filter": { 17 | "dimensions": true, 18 | "footprints": true, 19 | "graphics": true, 20 | "keepouts": true, 21 | "lockedItems": true, 22 | "otherItems": true, 23 | "pads": true, 24 | "text": true, 25 | "tracks": true, 26 | "vias": true, 27 | "zones": true 28 | }, 29 | "visible_items": [ 30 | 0, 31 | 1, 32 | 2, 33 | 3, 34 | 4, 35 | 5, 36 | 8, 37 | 9, 38 | 10, 39 | 11, 40 | 12, 41 | 13, 42 | 14, 43 | 15, 44 | 16, 45 | 17, 46 | 18, 47 | 19, 48 | 20, 49 | 21, 50 | 22, 51 | 23, 52 | 24, 53 | 25, 54 | 26, 55 | 27, 56 | 28, 57 | 29, 58 | 30, 59 | 32, 60 | 33, 61 | 34, 62 | 35, 63 | 36 64 | ], 65 | "visible_layers": "fffffff_ffffffff", 66 | "zone_display_mode": 0 67 | }, 68 | "meta": { 69 | "filename": "btrfld_pcb.kicad_prl", 70 | "version": 3 71 | }, 72 | "project": { 73 | "files": [] 74 | } 75 | } 76 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb.kicad_pro: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "design_settings": { 4 | "defaults": { 5 | "board_outline_line_width": 0.09999999999999999, 6 | "copper_line_width": 0.19999999999999998, 7 | "copper_text_italic": false, 8 | "copper_text_size_h": 1.5, 9 | "copper_text_size_v": 1.5, 10 | "copper_text_thickness": 0.3, 11 | "copper_text_upright": false, 12 | "courtyard_line_width": 0.049999999999999996, 13 | "dimension_precision": 4, 14 | "dimension_units": 3, 15 | "dimensions": { 16 | "arrow_length": 1270000, 17 | "extension_offset": 500000, 18 | "keep_text_aligned": true, 19 | "suppress_zeroes": false, 20 | "text_position": 0, 21 | "units_format": 1 22 | }, 23 | "fab_line_width": 0.09999999999999999, 24 | "fab_text_italic": false, 25 | "fab_text_size_h": 1.0, 26 | "fab_text_size_v": 1.0, 27 | "fab_text_thickness": 0.15, 28 | "fab_text_upright": false, 29 | "other_line_width": 0.15, 30 | "other_text_italic": false, 31 | "other_text_size_h": 1.0, 32 | "other_text_size_v": 1.0, 33 | "other_text_thickness": 0.15, 34 | "other_text_upright": false, 35 | "pads": { 36 | "drill": 0.762, 37 | "height": 1.524, 38 | "width": 1.524 39 | }, 40 | "silk_line_width": 0.15, 41 | "silk_text_italic": false, 42 | "silk_text_size_h": 1.0, 43 | "silk_text_size_v": 1.0, 44 | "silk_text_thickness": 0.15, 45 | "silk_text_upright": false, 46 | "zones": { 47 | "45_degree_only": false, 48 | "min_clearance": 0.508 49 | } 50 | }, 51 | "diff_pair_dimensions": [ 52 | { 53 | "gap": 0.0, 54 | "via_gap": 0.0, 55 | "width": 0.0 56 | } 57 | ], 58 | "drc_exclusions": [], 59 | "meta": { 60 | "version": 2 61 | }, 62 | "rule_severities": { 63 | "annular_width": "error", 64 | "clearance": "error", 65 | "copper_edge_clearance": "error", 66 | "courtyards_overlap": "error", 67 | "diff_pair_gap_out_of_range": "error", 68 | "diff_pair_uncoupled_length_too_long": "error", 69 | "drill_out_of_range": "error", 70 | "duplicate_footprints": "warning", 71 | "extra_footprint": "warning", 72 | "footprint_type_mismatch": "error", 73 | "hole_clearance": "error", 74 | "hole_near_hole": "error", 75 | "invalid_outline": "error", 76 | "item_on_disabled_layer": "error", 77 | "items_not_allowed": "error", 78 | "length_out_of_range": "error", 79 | "malformed_courtyard": "error", 80 | "microvia_drill_out_of_range": "error", 81 | "missing_courtyard": "ignore", 82 | "missing_footprint": "warning", 83 | "net_conflict": "warning", 84 | "npth_inside_courtyard": "ignore", 85 | "padstack": "error", 86 | "pth_inside_courtyard": "ignore", 87 | "shorting_items": "error", 88 | "silk_over_copper": "warning", 89 | "silk_overlap": "warning", 90 | "skew_out_of_range": "error", 91 | "through_hole_pad_without_hole": "error", 92 | "too_many_vias": "error", 93 | "track_dangling": "warning", 94 | "track_width": "error", 95 | "tracks_crossing": "error", 96 | "unconnected_items": "error", 97 | "unresolved_variable": "error", 98 | "via_dangling": "warning", 99 | "zone_has_empty_net": "error", 100 | "zones_intersect": "error" 101 | }, 102 | "rules": { 103 | "allow_blind_buried_vias": false, 104 | "allow_microvias": false, 105 | "max_error": 0.005, 106 | "min_clearance": 0.15239999999999998, 107 | "min_copper_edge_clearance": 0.0, 108 | "min_hole_clearance": 0.25, 109 | "min_hole_to_hole": 0.25, 110 | "min_microvia_diameter": 0.19999999999999998, 111 | "min_microvia_drill": 0.09999999999999999, 112 | "min_silk_clearance": 0.0, 113 | "min_through_hole_diameter": 0.3, 114 | "min_track_width": 0.15239999999999998, 115 | "min_via_annular_width": 0.049999999999999996, 116 | "min_via_diameter": 0.39999999999999997, 117 | "solder_mask_clearance": 0.0, 118 | "solder_mask_min_width": 0.0, 119 | "use_height_for_length_calcs": true 120 | }, 121 | "track_widths": [ 122 | 0.0 123 | ], 124 | "via_dimensions": [ 125 | { 126 | "diameter": 0.0, 127 | "drill": 0.0 128 | } 129 | ], 130 | "zones_allow_external_fillets": false, 131 | "zones_use_no_outline": true 132 | }, 133 | "layer_presets": [] 134 | }, 135 | "boards": [], 136 | "cvpcb": { 137 | "equivalence_files": [] 138 | }, 139 | "libraries": { 140 | "pinned_footprint_libs": [], 141 | "pinned_symbol_libs": [] 142 | }, 143 | "meta": { 144 | "filename": "btrfld_pcb.kicad_pro", 145 | "version": 1 146 | }, 147 | "net_settings": { 148 | "classes": [ 149 | { 150 | "bus_width": 12.0, 151 | "clearance": 0.1524, 152 | "diff_pair_gap": 0.25, 153 | "diff_pair_via_gap": 0.25, 154 | "diff_pair_width": 0.2, 155 | "line_style": 0, 156 | "microvia_diameter": 0.3, 157 | "microvia_drill": 0.1, 158 | "name": "Default", 159 | "pcb_color": "rgba(0, 0, 0, 0.000)", 160 | "schematic_color": "rgba(0, 0, 0, 0.000)", 161 | "track_width": 0.1524, 162 | "via_diameter": 0.8, 163 | "via_drill": 0.4, 164 | "wire_width": 6.0 165 | } 166 | ], 167 | "meta": { 168 | "version": 2 169 | }, 170 | "net_colors": null 171 | }, 172 | "pcbnew": { 173 | "last_paths": { 174 | "gencad": "", 175 | "idf": "", 176 | "netlist": "", 177 | "specctra_dsn": "", 178 | "step": "", 179 | "vrml": "" 180 | }, 181 | "page_layout_descr_file": "" 182 | }, 183 | "schematic": { 184 | "legacy_lib_dir": "", 185 | "legacy_lib_list": [] 186 | }, 187 | "sheets": [], 188 | "text_variables": {} 189 | } 190 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb.kicad_sch: -------------------------------------------------------------------------------- 1 | (kicad_sch (version 20211123) (generator eeschema) 2 | (paper "A4") 3 | (lib_symbols) 4 | (symbol_instances) 5 | ) 6 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb_center-bkp-2023-1-26-15.26.25.kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20211014) (generator pcbnew) 2 | 3 | (general 4 | (thickness 1.6) 5 | ) 6 | 7 | (paper "A4") 8 | (layers 9 | (0 "F.Cu" signal) 10 | (31 "B.Cu" signal) 11 | (32 "B.Adhes" user "B.Adhesive") 12 | (33 "F.Adhes" user "F.Adhesive") 13 | (34 "B.Paste" user) 14 | (35 "F.Paste" user) 15 | (36 "B.SilkS" user "B.Silkscreen") 16 | (37 "F.SilkS" user "F.Silkscreen") 17 | (38 "B.Mask" user) 18 | (39 "F.Mask" user) 19 | (40 "Dwgs.User" user "User.Drawings") 20 | (41 "Cmts.User" user "User.Comments") 21 | (42 "Eco1.User" user "User.Eco1") 22 | (43 "Eco2.User" user "User.Eco2") 23 | (44 "Edge.Cuts" user) 24 | (45 "Margin" user) 25 | (46 "B.CrtYd" user "B.Courtyard") 26 | (47 "F.CrtYd" user "F.Courtyard") 27 | (48 "B.Fab" user) 28 | (49 "F.Fab" user) 29 | (50 "User.1" user) 30 | (51 "User.2" user) 31 | (52 "User.3" user) 32 | (53 "User.4" user) 33 | (54 "User.5" user) 34 | (55 "User.6" user) 35 | (56 "User.7" user) 36 | (57 "User.8" user) 37 | (58 "User.9" user) 38 | ) 39 | 40 | (setup 41 | (stackup 42 | (layer "F.SilkS" (type "Top Silk Screen")) 43 | (layer "F.Paste" (type "Top Solder Paste")) 44 | (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01)) 45 | (layer "F.Cu" (type "copper") (thickness 0.035)) 46 | (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) 47 | (layer "B.Cu" (type "copper") (thickness 0.035)) 48 | (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01)) 49 | (layer "B.Paste" (type "Bottom Solder Paste")) 50 | (layer "B.SilkS" (type "Bottom Silk Screen")) 51 | (copper_finish "None") 52 | (dielectric_constraints no) 53 | ) 54 | (pad_to_mask_clearance 0) 55 | (pcbplotparams 56 | (layerselection 0x00010fc_ffffffff) 57 | (disableapertmacros false) 58 | (usegerberextensions false) 59 | (usegerberattributes true) 60 | (usegerberadvancedattributes true) 61 | (creategerberjobfile true) 62 | (svguseinch false) 63 | (svgprecision 6) 64 | (excludeedgelayer true) 65 | (plotframeref false) 66 | (viasonmask false) 67 | (mode 1) 68 | (useauxorigin false) 69 | (hpglpennumber 1) 70 | (hpglpenspeed 20) 71 | (hpglpendiameter 15.000000) 72 | (dxfpolygonmode true) 73 | (dxfimperialunits true) 74 | (dxfusepcbnewfont true) 75 | (psnegative false) 76 | (psa4output false) 77 | (plotreference true) 78 | (plotvalue true) 79 | (plotinvisibletext false) 80 | (sketchpadsonfab false) 81 | (subtractmaskfromsilk false) 82 | (outputformat 1) 83 | (mirror false) 84 | (drillshape 1) 85 | (scaleselection 1) 86 | (outputdirectory "") 87 | ) 88 | ) 89 | 90 | (net 0 "") 91 | 92 | ) 93 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb_center.kicad_prl: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "active_layer": 31, 4 | "active_layer_preset": "All Layers", 5 | "auto_track_width": true, 6 | "hidden_nets": [], 7 | "high_contrast_mode": 0, 8 | "net_color_mode": 1, 9 | "opacity": { 10 | "pads": 1.0, 11 | "tracks": 1.0, 12 | "vias": 1.0, 13 | "zones": 0.6 14 | }, 15 | "ratsnest_display_mode": 0, 16 | "selection_filter": { 17 | "dimensions": true, 18 | "footprints": true, 19 | "graphics": true, 20 | "keepouts": true, 21 | "lockedItems": true, 22 | "otherItems": true, 23 | "pads": true, 24 | "text": true, 25 | "tracks": true, 26 | "vias": true, 27 | "zones": true 28 | }, 29 | "visible_items": [ 30 | 0, 31 | 1, 32 | 2, 33 | 3, 34 | 4, 35 | 5, 36 | 8, 37 | 9, 38 | 10, 39 | 11, 40 | 12, 41 | 13, 42 | 14, 43 | 15, 44 | 16, 45 | 17, 46 | 18, 47 | 19, 48 | 20, 49 | 21, 50 | 22, 51 | 23, 52 | 24, 53 | 25, 54 | 26, 55 | 27, 56 | 28, 57 | 29, 58 | 30, 59 | 32, 60 | 33, 61 | 34, 62 | 35, 63 | 36 64 | ], 65 | "visible_layers": "fffffff_ffffffff", 66 | "zone_display_mode": 0 67 | }, 68 | "meta": { 69 | "filename": "btrfld_pcb_center.kicad_prl", 70 | "version": 3 71 | }, 72 | "project": { 73 | "files": [] 74 | } 75 | } 76 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb_center.kicad_pro: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "design_settings": { 4 | "defaults": { 5 | "board_outline_line_width": 0.049999999999999996, 6 | "copper_line_width": 0.19999999999999998, 7 | "copper_text_italic": false, 8 | "copper_text_size_h": 1.5, 9 | "copper_text_size_v": 1.5, 10 | "copper_text_thickness": 0.3, 11 | "copper_text_upright": false, 12 | "courtyard_line_width": 0.049999999999999996, 13 | "dimension_precision": 4, 14 | "dimension_units": 3, 15 | "dimensions": { 16 | "arrow_length": 1270000, 17 | "extension_offset": 500000, 18 | "keep_text_aligned": true, 19 | "suppress_zeroes": false, 20 | "text_position": 0, 21 | "units_format": 1 22 | }, 23 | "fab_line_width": 0.09999999999999999, 24 | "fab_text_italic": false, 25 | "fab_text_size_h": 1.0, 26 | "fab_text_size_v": 1.0, 27 | "fab_text_thickness": 0.15, 28 | "fab_text_upright": false, 29 | "other_line_width": 0.09999999999999999, 30 | "other_text_italic": false, 31 | "other_text_size_h": 1.0, 32 | "other_text_size_v": 1.0, 33 | "other_text_thickness": 0.15, 34 | "other_text_upright": false, 35 | "pads": { 36 | "drill": 0.762, 37 | "height": 1.524, 38 | "width": 1.524 39 | }, 40 | "silk_line_width": 0.12, 41 | "silk_text_italic": false, 42 | "silk_text_size_h": 1.0, 43 | "silk_text_size_v": 1.0, 44 | "silk_text_thickness": 0.15, 45 | "silk_text_upright": false, 46 | "zones": { 47 | "45_degree_only": false, 48 | "min_clearance": 0.508 49 | } 50 | }, 51 | "diff_pair_dimensions": [], 52 | "drc_exclusions": [], 53 | "meta": { 54 | "version": 2 55 | }, 56 | "rule_severities": { 57 | "annular_width": "error", 58 | "clearance": "error", 59 | "copper_edge_clearance": "error", 60 | "courtyards_overlap": "error", 61 | "diff_pair_gap_out_of_range": "error", 62 | "diff_pair_uncoupled_length_too_long": "error", 63 | "drill_out_of_range": "error", 64 | "duplicate_footprints": "warning", 65 | "extra_footprint": "warning", 66 | "footprint_type_mismatch": "error", 67 | "hole_clearance": "error", 68 | "hole_near_hole": "error", 69 | "invalid_outline": "error", 70 | "item_on_disabled_layer": "error", 71 | "items_not_allowed": "error", 72 | "length_out_of_range": "error", 73 | "malformed_courtyard": "error", 74 | "microvia_drill_out_of_range": "error", 75 | "missing_courtyard": "ignore", 76 | "missing_footprint": "warning", 77 | "net_conflict": "warning", 78 | "npth_inside_courtyard": "ignore", 79 | "padstack": "error", 80 | "pth_inside_courtyard": "ignore", 81 | "shorting_items": "error", 82 | "silk_over_copper": "warning", 83 | "silk_overlap": "warning", 84 | "skew_out_of_range": "error", 85 | "through_hole_pad_without_hole": "error", 86 | "too_many_vias": "error", 87 | "track_dangling": "warning", 88 | "track_width": "error", 89 | "tracks_crossing": "error", 90 | "unconnected_items": "error", 91 | "unresolved_variable": "error", 92 | "via_dangling": "warning", 93 | "zone_has_empty_net": "error", 94 | "zones_intersect": "error" 95 | }, 96 | "rules": { 97 | "allow_blind_buried_vias": false, 98 | "allow_microvias": false, 99 | "max_error": 0.005, 100 | "min_clearance": 0.0, 101 | "min_copper_edge_clearance": 0.01, 102 | "min_hole_clearance": 0.25, 103 | "min_hole_to_hole": 0.25, 104 | "min_microvia_diameter": 0.19999999999999998, 105 | "min_microvia_drill": 0.09999999999999999, 106 | "min_silk_clearance": 0.0, 107 | "min_through_hole_diameter": 0.3, 108 | "min_track_width": 0.19999999999999998, 109 | "min_via_annular_width": 0.049999999999999996, 110 | "min_via_diameter": 0.39999999999999997, 111 | "use_height_for_length_calcs": true 112 | }, 113 | "track_widths": [], 114 | "via_dimensions": [], 115 | "zones_allow_external_fillets": false, 116 | "zones_use_no_outline": true 117 | }, 118 | "layer_presets": [] 119 | }, 120 | "boards": [], 121 | "cvpcb": { 122 | "equivalence_files": [] 123 | }, 124 | "libraries": { 125 | "pinned_footprint_libs": [], 126 | "pinned_symbol_libs": [] 127 | }, 128 | "meta": { 129 | "filename": "btrfld_pcb_center.kicad_pro", 130 | "version": 1 131 | }, 132 | "net_settings": { 133 | "classes": [ 134 | { 135 | "bus_width": 12.0, 136 | "clearance": 0.2, 137 | "diff_pair_gap": 0.25, 138 | "diff_pair_via_gap": 0.25, 139 | "diff_pair_width": 0.2, 140 | "line_style": 0, 141 | "microvia_diameter": 0.3, 142 | "microvia_drill": 0.1, 143 | "name": "Default", 144 | "pcb_color": "rgba(0, 0, 0, 0.000)", 145 | "schematic_color": "rgba(0, 0, 0, 0.000)", 146 | "track_width": 0.25, 147 | "via_diameter": 0.8, 148 | "via_drill": 0.4, 149 | "wire_width": 6.0 150 | } 151 | ], 152 | "meta": { 153 | "version": 2 154 | }, 155 | "net_colors": null 156 | }, 157 | "pcbnew": { 158 | "last_paths": { 159 | "gencad": "", 160 | "idf": "", 161 | "netlist": "", 162 | "specctra_dsn": "", 163 | "step": "", 164 | "vrml": "" 165 | }, 166 | "page_layout_descr_file": "" 167 | }, 168 | "schematic": { 169 | "legacy_lib_dir": "", 170 | "legacy_lib_list": [] 171 | }, 172 | "sheets": [], 173 | "text_variables": {} 174 | } 175 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb_thumb-bkp-2023-1-27-10.50.40.kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20211014) (generator pcbnew) 2 | 3 | (general 4 | (thickness 1.6) 5 | ) 6 | 7 | (paper "A4") 8 | (layers 9 | (0 "F.Cu" signal) 10 | (31 "B.Cu" signal) 11 | (32 "B.Adhes" user "B.Adhesive") 12 | (33 "F.Adhes" user "F.Adhesive") 13 | (34 "B.Paste" user) 14 | (35 "F.Paste" user) 15 | (36 "B.SilkS" user "B.Silkscreen") 16 | (37 "F.SilkS" user "F.Silkscreen") 17 | (38 "B.Mask" user) 18 | (39 "F.Mask" user) 19 | (40 "Dwgs.User" user "User.Drawings") 20 | (41 "Cmts.User" user "User.Comments") 21 | (42 "Eco1.User" user "User.Eco1") 22 | (43 "Eco2.User" user "User.Eco2") 23 | (44 "Edge.Cuts" user) 24 | (45 "Margin" user) 25 | (46 "B.CrtYd" user "B.Courtyard") 26 | (47 "F.CrtYd" user "F.Courtyard") 27 | (48 "B.Fab" user) 28 | (49 "F.Fab" user) 29 | (50 "User.1" user) 30 | (51 "User.2" user) 31 | (52 "User.3" user) 32 | (53 "User.4" user) 33 | (54 "User.5" user) 34 | (55 "User.6" user) 35 | (56 "User.7" user) 36 | (57 "User.8" user) 37 | (58 "User.9" user) 38 | ) 39 | 40 | (setup 41 | (stackup 42 | (layer "F.SilkS" (type "Top Silk Screen")) 43 | (layer "F.Paste" (type "Top Solder Paste")) 44 | (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01)) 45 | (layer "F.Cu" (type "copper") (thickness 0.035)) 46 | (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) 47 | (layer "B.Cu" (type "copper") (thickness 0.035)) 48 | (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01)) 49 | (layer "B.Paste" (type "Bottom Solder Paste")) 50 | (layer "B.SilkS" (type "Bottom Silk Screen")) 51 | (copper_finish "None") 52 | (dielectric_constraints no) 53 | ) 54 | (pad_to_mask_clearance 0) 55 | (pcbplotparams 56 | (layerselection 0x00010fc_ffffffff) 57 | (disableapertmacros false) 58 | (usegerberextensions false) 59 | (usegerberattributes true) 60 | (usegerberadvancedattributes true) 61 | (creategerberjobfile true) 62 | (svguseinch false) 63 | (svgprecision 6) 64 | (excludeedgelayer true) 65 | (plotframeref false) 66 | (viasonmask false) 67 | (mode 1) 68 | (useauxorigin false) 69 | (hpglpennumber 1) 70 | (hpglpenspeed 20) 71 | (hpglpendiameter 15.000000) 72 | (dxfpolygonmode true) 73 | (dxfimperialunits true) 74 | (dxfusepcbnewfont true) 75 | (psnegative false) 76 | (psa4output false) 77 | (plotreference true) 78 | (plotvalue true) 79 | (plotinvisibletext false) 80 | (sketchpadsonfab false) 81 | (subtractmaskfromsilk false) 82 | (outputformat 1) 83 | (mirror false) 84 | (drillshape 1) 85 | (scaleselection 1) 86 | (outputdirectory "") 87 | ) 88 | ) 89 | 90 | (net 0 "") 91 | 92 | ) 93 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb_thumb.kicad_prl: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "active_layer": 0, 4 | "active_layer_preset": "All Layers", 5 | "auto_track_width": true, 6 | "hidden_nets": [], 7 | "high_contrast_mode": 0, 8 | "net_color_mode": 1, 9 | "opacity": { 10 | "pads": 1.0, 11 | "tracks": 1.0, 12 | "vias": 1.0, 13 | "zones": 0.6 14 | }, 15 | "ratsnest_display_mode": 0, 16 | "selection_filter": { 17 | "dimensions": true, 18 | "footprints": true, 19 | "graphics": true, 20 | "keepouts": true, 21 | "lockedItems": true, 22 | "otherItems": true, 23 | "pads": true, 24 | "text": true, 25 | "tracks": true, 26 | "vias": true, 27 | "zones": true 28 | }, 29 | "visible_items": [ 30 | 0, 31 | 1, 32 | 2, 33 | 3, 34 | 4, 35 | 5, 36 | 8, 37 | 9, 38 | 10, 39 | 11, 40 | 12, 41 | 13, 42 | 14, 43 | 15, 44 | 16, 45 | 17, 46 | 18, 47 | 19, 48 | 20, 49 | 21, 50 | 22, 51 | 23, 52 | 24, 53 | 25, 54 | 26, 55 | 27, 56 | 28, 57 | 29, 58 | 30, 59 | 32, 60 | 33, 61 | 34, 62 | 35, 63 | 36 64 | ], 65 | "visible_layers": "fffffff_ffffffff", 66 | "zone_display_mode": 0 67 | }, 68 | "meta": { 69 | "filename": "btrfld_pcb_thumb.kicad_prl", 70 | "version": 3 71 | }, 72 | "project": { 73 | "files": [] 74 | } 75 | } 76 | -------------------------------------------------------------------------------- /btrfld_pcb/btrfld_pcb_thumb.kicad_pro: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "design_settings": { 4 | "defaults": { 5 | "board_outline_line_width": 0.049999999999999996, 6 | "copper_line_width": 0.19999999999999998, 7 | "copper_text_italic": false, 8 | "copper_text_size_h": 1.5, 9 | "copper_text_size_v": 1.5, 10 | "copper_text_thickness": 0.3, 11 | "copper_text_upright": false, 12 | "courtyard_line_width": 0.049999999999999996, 13 | "dimension_precision": 4, 14 | "dimension_units": 3, 15 | "dimensions": { 16 | "arrow_length": 1270000, 17 | "extension_offset": 500000, 18 | "keep_text_aligned": true, 19 | "suppress_zeroes": false, 20 | "text_position": 0, 21 | "units_format": 1 22 | }, 23 | "fab_line_width": 0.09999999999999999, 24 | "fab_text_italic": false, 25 | "fab_text_size_h": 1.0, 26 | "fab_text_size_v": 1.0, 27 | "fab_text_thickness": 0.15, 28 | "fab_text_upright": false, 29 | "other_line_width": 0.09999999999999999, 30 | "other_text_italic": false, 31 | "other_text_size_h": 1.0, 32 | "other_text_size_v": 1.0, 33 | "other_text_thickness": 0.15, 34 | "other_text_upright": false, 35 | "pads": { 36 | "drill": 0.762, 37 | "height": 1.524, 38 | "width": 1.524 39 | }, 40 | "silk_line_width": 0.12, 41 | "silk_text_italic": false, 42 | "silk_text_size_h": 1.0, 43 | "silk_text_size_v": 1.0, 44 | "silk_text_thickness": 0.15, 45 | "silk_text_upright": false, 46 | "zones": { 47 | "45_degree_only": false, 48 | "min_clearance": 0.508 49 | } 50 | }, 51 | "diff_pair_dimensions": [], 52 | "drc_exclusions": [], 53 | "meta": { 54 | "version": 2 55 | }, 56 | "rule_severities": { 57 | "annular_width": "error", 58 | "clearance": "error", 59 | "copper_edge_clearance": "error", 60 | "courtyards_overlap": "error", 61 | "diff_pair_gap_out_of_range": "error", 62 | "diff_pair_uncoupled_length_too_long": "error", 63 | "drill_out_of_range": "error", 64 | "duplicate_footprints": "warning", 65 | "extra_footprint": "warning", 66 | "footprint_type_mismatch": "error", 67 | "hole_clearance": "error", 68 | "hole_near_hole": "error", 69 | "invalid_outline": "error", 70 | "item_on_disabled_layer": "error", 71 | "items_not_allowed": "error", 72 | "length_out_of_range": "error", 73 | "malformed_courtyard": "error", 74 | "microvia_drill_out_of_range": "error", 75 | "missing_courtyard": "ignore", 76 | "missing_footprint": "warning", 77 | "net_conflict": "warning", 78 | "npth_inside_courtyard": "ignore", 79 | "padstack": "error", 80 | "pth_inside_courtyard": "ignore", 81 | "shorting_items": "error", 82 | "silk_over_copper": "warning", 83 | "silk_overlap": "warning", 84 | "skew_out_of_range": "error", 85 | "through_hole_pad_without_hole": "error", 86 | "too_many_vias": "error", 87 | "track_dangling": "warning", 88 | "track_width": "error", 89 | "tracks_crossing": "error", 90 | "unconnected_items": "error", 91 | "unresolved_variable": "error", 92 | "via_dangling": "warning", 93 | "zone_has_empty_net": "error", 94 | "zones_intersect": "error" 95 | }, 96 | "rules": { 97 | "allow_blind_buried_vias": false, 98 | "allow_microvias": false, 99 | "max_error": 0.005, 100 | "min_clearance": 0.0, 101 | "min_copper_edge_clearance": 0.01, 102 | "min_hole_clearance": 0.25, 103 | "min_hole_to_hole": 0.25, 104 | "min_microvia_diameter": 0.19999999999999998, 105 | "min_microvia_drill": 0.09999999999999999, 106 | "min_silk_clearance": 0.0, 107 | "min_through_hole_diameter": 0.3, 108 | "min_track_width": 0.19999999999999998, 109 | "min_via_annular_width": 0.049999999999999996, 110 | "min_via_diameter": 0.39999999999999997, 111 | "use_height_for_length_calcs": true 112 | }, 113 | "track_widths": [], 114 | "via_dimensions": [], 115 | "zones_allow_external_fillets": false, 116 | "zones_use_no_outline": true 117 | }, 118 | "layer_presets": [] 119 | }, 120 | "boards": [], 121 | "cvpcb": { 122 | "equivalence_files": [] 123 | }, 124 | "libraries": { 125 | "pinned_footprint_libs": [], 126 | "pinned_symbol_libs": [] 127 | }, 128 | "meta": { 129 | "filename": "btrfld_pcb_thumb.kicad_pro", 130 | "version": 1 131 | }, 132 | "net_settings": { 133 | "classes": [ 134 | { 135 | "bus_width": 12.0, 136 | "clearance": 0.2, 137 | "diff_pair_gap": 0.25, 138 | "diff_pair_via_gap": 0.25, 139 | "diff_pair_width": 0.2, 140 | "line_style": 0, 141 | "microvia_diameter": 0.3, 142 | "microvia_drill": 0.1, 143 | "name": "Default", 144 | "pcb_color": "rgba(0, 0, 0, 0.000)", 145 | "schematic_color": "rgba(0, 0, 0, 0.000)", 146 | "track_width": 0.25, 147 | "via_diameter": 0.8, 148 | "via_drill": 0.4, 149 | "wire_width": 6.0 150 | } 151 | ], 152 | "meta": { 153 | "version": 2 154 | }, 155 | "net_colors": null 156 | }, 157 | "pcbnew": { 158 | "last_paths": { 159 | "gencad": "", 160 | "idf": "", 161 | "netlist": "", 162 | "specctra_dsn": "", 163 | "step": "", 164 | "vrml": "" 165 | }, 166 | "page_layout_descr_file": "" 167 | }, 168 | "schematic": { 169 | "legacy_lib_dir": "", 170 | "legacy_lib_list": [] 171 | }, 172 | "sheets": [], 173 | "text_variables": {} 174 | } 175 | -------------------------------------------------------------------------------- /btrfld_pcb/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name "SW_KEYBOARD")(type "KiCad")(uri "${KIPRJMOD}/SW_KEYBOARD.pretty")(options "")(descr "")) 3 | ) 4 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/Cherry_ULP.pretty/Cherry_ULP_SMD.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "Cherry_ULP_SMD" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (attr smd) 4 | (fp_text reference "REF**" (at -0.05 -7.5 unlocked) (layer "F.SilkS") 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | (tstamp 139401a6-6402-4928-b115-c1e478484902) 7 | ) 8 | (fp_text value "Cherry_ULP_SMD" (at 0 0 unlocked) (layer "F.Fab") 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | (tstamp 16afaba0-cd93-4b65-bb94-92c3f14e6cbb) 11 | ) 12 | (fp_rect (start -7.1 -6.4) (end 7.1 6.4) 13 | (stroke (width 0.1) (type solid)) (fill none) (layer "F.SilkS") (tstamp 784e3de1-efd8-4453-8fdd-c88aa0b88646)) 14 | (fp_rect (start -3.6 -1.8) (end 3.1 -4.2) 15 | (stroke (width 0.05) (type solid)) (fill none) (layer "Dwgs.User") (tstamp d8a1680a-085b-47fe-af9c-5c222413ba85)) 16 | (fp_rect (start -6.8 -6.1) (end 6.8 6.1) 17 | (stroke (width 0.1) (type solid)) (fill none) (layer "F.CrtYd") (tstamp fbad4ed2-ff86-407e-b1ea-204acdbbbd27)) 18 | (pad "" np_thru_hole circle (at -5.8 1.2) (size 1.05 1.05) (drill 1.05) (layers "F&B.Cu" "*.Mask") (tstamp 17a4b606-baf4-4723-b84a-2637ff128782)) 19 | (pad "" np_thru_hole circle (at 5.8 -3.26) (size 1.2 1.2) (drill 1.2) (layers "F&B.Cu" "*.Mask") (tstamp 9c58b86f-4eea-4649-9265-0492ac0b7ae4)) 20 | (pad "" np_thru_hole circle (at 5.8 3.26) (size 1.2 1.2) (drill 1.2) (layers "F&B.Cu" "*.Mask") (tstamp 35cfdc62-2e93-4452-886a-9ac9df78b6a1)) 21 | (pad "1" smd rect (at -0.65 2.3) (size 0.7 3.4) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 6cf67b9b-27eb-4963-8261-c3ccef2aa742)) 22 | (pad "2" smd rect (at 1.8 2.3) (size 0.7 3.4) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 6d6168ff-1ec3-417e-9157-603116cd4573)) 23 | (pad "3" smd rect (at -6.2 -3.9) (size 1.6 3.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 8ac288d5-c9c6-40c1-9b06-4c8074e60637)) 24 | (pad "3" smd rect (at -6.2 4.5) (size 1.6 3) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 71041669-366b-47dc-98fd-369c0f6b7445)) 25 | (pad "3" smd rect (at 6.2 -5.025) (size 1.6 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 1cd55d35-d9c0-49b0-8004-75fab80d52c3)) 26 | (pad "3" smd rect (at 6.2 0) (size 1.6 2.6) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 2e9b1d0d-d760-4f41-b42f-89e5dbdf4fea)) 27 | (pad "3" smd rect (at 6.2 5.025) (size 1.6 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 54088d02-e7ee-42c6-b650-e622a5a009ed)) 28 | (zone (net 0) (net_name "") (layer "Dwgs.User") (tstamp 29019da4-61c2-46ac-9caa-24cb07ec47b4) (hatch edge 0.508) 29 | (connect_pads (clearance 0)) 30 | (min_thickness 0.254) (filled_areas_thickness no) 31 | (keepout (tracks not_allowed) (vias not_allowed) (pads not_allowed) (copperpour not_allowed) (footprints allowed)) 32 | (fill (thermal_gap 0.508) (thermal_bridge_width 0.508)) 33 | (polygon 34 | (pts 35 | (xy -1.2 4.2) 36 | (xy -5 4.2) 37 | (xy -5 2.2) 38 | (xy -1.2 2.2) 39 | ) 40 | ) 41 | ) 42 | (model "${CHERRY_MX_ULP_DIR}/Cherry_MX_ULP.step" 43 | (offset (xyz -5.5 0 3)) 44 | (scale (xyz 1 1 1)) 45 | (rotate (xyz 0 0 -90)) 46 | ) 47 | ) 48 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/Cherry_ULP.pretty/Cherry_ULP_SMD_Double_Sided.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "Cherry_ULP_SMD_Double_Sided" 2 | (version 20240108) 3 | (generator "pcbnew") 4 | (generator_version "8.0") 5 | (layer "F.Cu") 6 | (property "Reference" "REF**" 7 | (at -0.05 -7.5 0) 8 | (unlocked yes) 9 | (layer "User.9") 10 | (hide yes) 11 | (uuid "139401a6-6402-4928-b115-c1e478484902") 12 | (effects 13 | (font 14 | (size 1 1) 15 | (thickness 0.15) 16 | ) 17 | ) 18 | ) 19 | (property "Value" "Cherry_ULP_SMD_Double_Sided" 20 | (at 0 0 0) 21 | (unlocked yes) 22 | (layer "F.Fab") 23 | (uuid "16afaba0-cd93-4b65-bb94-92c3f14e6cbb") 24 | (effects 25 | (font 26 | (size 1 1) 27 | (thickness 0.15) 28 | ) 29 | ) 30 | ) 31 | (property "Footprint" "" 32 | (at 0 0 0) 33 | (layer "F.Fab") 34 | (hide yes) 35 | (uuid "e7ee8ddc-7135-40eb-acca-362c3101e24a") 36 | (effects 37 | (font 38 | (size 1.27 1.27) 39 | (thickness 0.15) 40 | ) 41 | ) 42 | ) 43 | (property "Datasheet" "" 44 | (at 0 0 0) 45 | (layer "F.Fab") 46 | (hide yes) 47 | (uuid "a0baa07c-3349-463f-9496-3d69456e1c54") 48 | (effects 49 | (font 50 | (size 1.27 1.27) 51 | (thickness 0.15) 52 | ) 53 | ) 54 | ) 55 | (property "Description" "" 56 | (at 0 0 0) 57 | (layer "F.Fab") 58 | (hide yes) 59 | (uuid "06056896-2548-4984-a6f7-d942a52ab1cb") 60 | (effects 61 | (font 62 | (size 1.27 1.27) 63 | (thickness 0.15) 64 | ) 65 | ) 66 | ) 67 | (attr smd) 68 | (fp_rect 69 | (start -7.1 -6.4) 70 | (end 7.1 6.4) 71 | (stroke 72 | (width 0.1) 73 | (type solid) 74 | ) 75 | (fill none) 76 | (layer "B.SilkS") 77 | (uuid "1bb6791c-5d05-4c43-a527-afcf7612a1e4") 78 | ) 79 | (fp_rect 80 | (start -7.1 -6.4) 81 | (end 7.1 6.4) 82 | (stroke 83 | (width 0.1) 84 | (type solid) 85 | ) 86 | (fill none) 87 | (layer "F.SilkS") 88 | (uuid "784e3de1-efd8-4453-8fdd-c88aa0b88646") 89 | ) 90 | (fp_rect 91 | (start -3.1 -1.8) 92 | (end 3.1 -4.2) 93 | (stroke 94 | (width 0.05) 95 | (type solid) 96 | ) 97 | (fill none) 98 | (layer "Dwgs.User") 99 | (uuid "d8a1680a-085b-47fe-af9c-5c222413ba85") 100 | ) 101 | (fp_rect 102 | (start -6.8 -6.1) 103 | (end 6.8 6.1) 104 | (stroke 105 | (width 0.1) 106 | (type solid) 107 | ) 108 | (fill none) 109 | (layer "F.CrtYd") 110 | (uuid "fbad4ed2-ff86-407e-b1ea-204acdbbbd27") 111 | ) 112 | (pad "" np_thru_hole circle 113 | (at -5.8 -3.26) 114 | (size 1.2 1.2) 115 | (drill 1.2) 116 | (layers "F&B.Cu" "*.Mask") 117 | (uuid "53a462a4-e4a3-43a2-bcdb-043f81cdea22") 118 | ) 119 | (pad "" np_thru_hole circle 120 | (at -5.8 1.2) 121 | (size 1.05 1.05) 122 | (drill 1.05) 123 | (layers "F&B.Cu" "*.Mask") 124 | (uuid "17a4b606-baf4-4723-b84a-2637ff128782") 125 | ) 126 | (pad "" np_thru_hole circle 127 | (at -5.8 3.26) 128 | (size 1.2 1.2) 129 | (drill 1.2) 130 | (layers "F&B.Cu" "*.Mask") 131 | (uuid "430e276a-8301-4676-8c70-07eeb35b7643") 132 | ) 133 | (pad "" np_thru_hole circle 134 | (at 5.8 -3.26) 135 | (size 1.2 1.2) 136 | (drill 1.2) 137 | (layers "F&B.Cu" "*.Mask") 138 | (uuid "9c58b86f-4eea-4649-9265-0492ac0b7ae4") 139 | ) 140 | (pad "" np_thru_hole circle 141 | (at 5.8 1.2) 142 | (size 1.05 1.05) 143 | (drill 1.05) 144 | (layers "F&B.Cu" "*.Mask") 145 | (uuid "03761304-0191-4b7d-ad49-6c402feb7fca") 146 | ) 147 | (pad "" np_thru_hole circle 148 | (at 5.8 3.26) 149 | (size 1.2 1.2) 150 | (drill 1.2) 151 | (layers "F&B.Cu" "*.Mask") 152 | (uuid "35cfdc62-2e93-4452-886a-9ac9df78b6a1") 153 | ) 154 | (pad "1" smd rect 155 | (at -0.65 2.3) 156 | (size 0.7 3.4) 157 | (layers "F.Cu" "F.Paste" "F.Mask") 158 | (uuid "6cf67b9b-27eb-4963-8261-c3ccef2aa742") 159 | ) 160 | (pad "1" smd rect 161 | (at 0.65 2.3) 162 | (size 0.7 3.4) 163 | (layers "B.Cu" "B.Paste" "B.Mask") 164 | (uuid "2e06f826-6a41-43cb-aace-8d81458783a2") 165 | ) 166 | (pad "2" smd rect 167 | (at -1.8 2.3) 168 | (size 0.7 3.4) 169 | (layers "B.Cu" "B.Paste" "B.Mask") 170 | (uuid "97ec071d-c188-405d-ac95-424a665ca410") 171 | ) 172 | (pad "2" smd rect 173 | (at 1.8 2.3) 174 | (size 0.7 3.4) 175 | (layers "F.Cu" "F.Paste" "F.Mask") 176 | (uuid "6d6168ff-1ec3-417e-9157-603116cd4573") 177 | ) 178 | (pad "3" smd rect 179 | (at -6.2 -5.025) 180 | (size 1.6 1.8) 181 | (layers "F.Cu" "F.Paste" "F.Mask") 182 | (uuid "dcebbf78-8524-46f7-ad86-8c61c38863de") 183 | ) 184 | (pad "3" smd rect 185 | (at -6.2 -5.025) 186 | (size 1.6 1.8) 187 | (layers "B.Cu" "B.Paste" "B.Mask") 188 | (uuid "1500669d-9fea-4498-a75f-7d07854e3c21") 189 | ) 190 | (pad "3" smd rect 191 | (at -6.2 -1) 192 | (size 1.6 1.9) 193 | (layers "F.Cu" "F.Paste" "F.Mask") 194 | (uuid "6844b821-6027-4e15-ac50-81752df96a1c") 195 | ) 196 | (pad "3" smd rect 197 | (at -6.2 -1) 198 | (size 1.6 1.9) 199 | (layers "B.Cu" "B.Paste" "B.Mask") 200 | (uuid "2cf624ad-c97f-4fef-90a9-fc5ef2338084") 201 | ) 202 | (pad "3" smd rect 203 | (at -6.2 5.025) 204 | (size 1.6 1.8) 205 | (layers "F.Cu" "F.Paste" "F.Mask") 206 | (uuid "063467b6-e58d-47d5-aa95-95444f2e77a7") 207 | ) 208 | (pad "3" smd rect 209 | (at -6.2 5.025) 210 | (size 1.6 1.8) 211 | (layers "B.Cu" "B.Paste" "B.Mask") 212 | (uuid "fccc28ab-b2a3-4be1-9388-6e9d1a34aaa5") 213 | ) 214 | (pad "3" smd rect 215 | (at 6.2 -5.025) 216 | (size 1.6 1.8) 217 | (layers "F.Cu" "F.Paste" "F.Mask") 218 | (uuid "1cd55d35-d9c0-49b0-8004-75fab80d52c3") 219 | ) 220 | (pad "3" smd rect 221 | (at 6.2 -5.025) 222 | (size 1.6 1.8) 223 | (layers "B.Cu" "B.Paste" "B.Mask") 224 | (uuid "4152519e-c8df-4ee1-8b6d-a187cc08857b") 225 | ) 226 | (pad "3" smd rect 227 | (at 6.2 -1) 228 | (size 1.6 1.9) 229 | (layers "F.Cu" "F.Paste" "F.Mask") 230 | (uuid "2e9b1d0d-d760-4f41-b42f-89e5dbdf4fea") 231 | ) 232 | (pad "3" smd rect 233 | (at 6.2 -1) 234 | (size 1.6 1.9) 235 | (layers "B.Cu" "B.Paste" "B.Mask") 236 | (uuid "71cb9c8a-253b-4255-9d20-6fa775c13866") 237 | ) 238 | (pad "3" smd rect 239 | (at 6.2 5.025) 240 | (size 1.6 1.8) 241 | (layers "F.Cu" "F.Paste" "F.Mask") 242 | (uuid "54088d02-e7ee-42c6-b650-e622a5a009ed") 243 | ) 244 | (pad "3" smd rect 245 | (at 6.2 5.025) 246 | (size 1.6 1.8) 247 | (layers "B.Cu" "B.Paste" "B.Mask") 248 | (uuid "6d5c42e9-770b-4c66-845c-1ef46934e00d") 249 | ) 250 | (zone 251 | (net 0) 252 | (net_name "") 253 | (layer "Dwgs.User") 254 | (uuid "29019da4-61c2-46ac-9caa-24cb07ec47b4") 255 | (hatch edge 0.508) 256 | (connect_pads 257 | (clearance 0) 258 | ) 259 | (min_thickness 0.254) 260 | (filled_areas_thickness no) 261 | (keepout 262 | (tracks not_allowed) 263 | (vias not_allowed) 264 | (pads not_allowed) 265 | (copperpour not_allowed) 266 | (footprints allowed) 267 | ) 268 | (fill 269 | (thermal_gap 0.508) 270 | (thermal_bridge_width 0.508) 271 | ) 272 | (polygon 273 | (pts 274 | (xy -1.2 4.2) (xy -5 4.2) (xy -5 2.2) (xy -1.2 2.2) 275 | ) 276 | ) 277 | ) 278 | ) 279 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/Cherry_ULP.pretty/Cherry_ULP_SMD_SK6812_1511.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "Cherry_ULP_SMD_SK6812_1511" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (attr smd) 4 | (fp_text reference "REF**" (at -0.05 -7.5 unlocked) (layer "F.SilkS") 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | (tstamp 139401a6-6402-4928-b115-c1e478484902) 7 | ) 8 | (fp_text value "Cherry_ULP_SMD_SK6812_1511" (at 0 0 unlocked) (layer "F.Fab") 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | (tstamp 16afaba0-cd93-4b65-bb94-92c3f14e6cbb) 11 | ) 12 | (fp_text user "1" (at -0.925 -3.45) (layer "F.SilkS") 13 | (effects (font (size 0.3 0.3) (thickness 0.075))) 14 | (tstamp 6c4d64e0-99d1-4f4f-a62f-ad573a8665c6) 15 | ) 16 | (fp_text user "${REFERENCE}" (at 0.025 -3) (layer "F.Fab") 17 | (effects (font (size 0.3 0.3) (thickness 0.05))) 18 | (tstamp afecb1a8-3d56-402e-8c8e-44da0d78755c) 19 | ) 20 | (fp_line (start 0.85 -3.85) (end 0.2 -3.85) 21 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp f969594d-7035-4264-acc8-3cd86e06a59a)) 22 | (fp_line (start 0.85 -3.2) (end 0.85 -3.85) 23 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 34daf114-49dd-4172-86dc-9fcfbebeeb39)) 24 | (fp_rect (start -7.1 -6.4) (end 7.1 6.4) 25 | (stroke (width 0.1) (type solid)) (fill none) (layer "F.SilkS") (tstamp 784e3de1-efd8-4453-8fdd-c88aa0b88646)) 26 | (fp_rect (start -3.6 -1.8) (end 3.1 -4.2) 27 | (stroke (width 0.05) (type solid)) (fill none) (layer "Dwgs.User") (tstamp d8a1680a-085b-47fe-af9c-5c222413ba85)) 28 | (fp_circle (center -5.8 1.2) (end -5.275 1.2) 29 | (stroke (width 0.05) (type solid)) (fill none) (layer "Edge.Cuts") (tstamp 9441fe56-d8af-4db8-ae29-3ca725be0a45)) 30 | (fp_circle (center 5.8 -3.26) (end 6.4 -3.26) 31 | (stroke (width 0.05) (type solid)) (fill none) (layer "Edge.Cuts") (tstamp 1fea6f98-9d1e-40a4-a8ad-06a037c96834)) 32 | (fp_circle (center 5.8 3.26) (end 6.4 3.26) 33 | (stroke (width 0.05) (type solid)) (fill none) (layer "Edge.Cuts") (tstamp 389fe211-1e7e-47fa-96fe-5fcb0602b7c0)) 34 | (fp_line (start -1 -4) (end 1 -4) 35 | (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 43cd7380-9653-4964-b686-772b787513ef)) 36 | (fp_line (start -1 -2) (end -1 -4) 37 | (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 1737bc6a-aea8-448a-ad49-6bc0eb50c526)) 38 | (fp_line (start 1 -4) (end 1 -2) 39 | (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 3dfdabcc-d67c-402a-a585-aea4a6556ba7)) 40 | (fp_line (start 1 -2) (end -1 -2) 41 | (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 66f2bf1c-fbcf-441f-ba46-2038ae9113a2)) 42 | (fp_rect (start -6.8 -6.1) (end 6.8 6.1) 43 | (stroke (width 0.1) (type solid)) (fill none) (layer "F.CrtYd") (tstamp fbad4ed2-ff86-407e-b1ea-204acdbbbd27)) 44 | (fp_line (start -0.75 -3.75) (end 0.375 -3.75) 45 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp bd6af406-56dc-42f7-9cca-ab33e7b55cb3)) 46 | (fp_line (start -0.75 -2.25) (end -0.75 -3.75) 47 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 554168eb-0684-48c5-a2dc-d7930ec12aab)) 48 | (fp_line (start 0.375 -3.75) (end 0.75 -3.375) 49 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp db7449b9-508b-4d3d-b601-1c67f64f44bb)) 50 | (fp_line (start 0.75 -3.375) (end 0.75 -2.25) 51 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 7070f8df-7bfc-42cb-9364-5625a320599b)) 52 | (fp_line (start 0.75 -2.25) (end -0.75 -2.25) 53 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 8ee7feed-3e43-494b-b305-258731e8d1fa)) 54 | (fp_poly 55 | (pts 56 | (xy 0.15 -2.75) 57 | (xy -0.15 -2.55) 58 | (xy 0.15 -2.35) 59 | ) 60 | 61 | (stroke (width 0.1) (type solid)) (fill solid) (layer "F.Fab") (tstamp 5e4f66a6-d896-434a-8c57-9dfd75f7a597)) 62 | (pad "1" smd rect (at -0.65 2.3) (size 0.7 3.4) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 6cf67b9b-27eb-4963-8261-c3ccef2aa742)) 63 | (pad "2" smd rect (at 1.8 2.3) (size 0.7 3.4) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 6d6168ff-1ec3-417e-9157-603116cd4573)) 64 | (pad "3" smd rect (at 0.45 -2.55) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 14417add-7ddf-4157-8f48-05ef92012c02)) 65 | (pad "4" smd rect (at 0.45 -3.45) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 8fd377e5-6bbc-494b-92b2-176fa64c2ebc)) 66 | (pad "5" smd rect (at -0.45 -3.45) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp b15c5c7c-c04a-4756-8092-0264d2b373bb)) 67 | (pad "6" smd rect (at -0.45 -2.55) (size 0.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp a5c6a3bf-86a0-44aa-9865-f7874ad44024)) 68 | (pad "7" smd rect (at -6.2 -3.9) (size 1.6 3.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 8ac288d5-c9c6-40c1-9b06-4c8074e60637)) 69 | (pad "7" smd rect (at -6.2 4.5) (size 1.6 3) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 71041669-366b-47dc-98fd-369c0f6b7445)) 70 | (pad "7" smd rect (at 6.088375 -5.025) (size 1.6 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 1cd55d35-d9c0-49b0-8004-75fab80d52c3)) 71 | (pad "7" smd rect (at 6.2 0) (size 1.6 2.6) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 2e9b1d0d-d760-4f41-b42f-89e5dbdf4fea)) 72 | (pad "7" smd rect (at 6.213375 5.025) (size 1.6 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 54088d02-e7ee-42c6-b650-e622a5a009ed)) 73 | (zone (net 0) (net_name "") (layer "Dwgs.User") (tstamp 29019da4-61c2-46ac-9caa-24cb07ec47b4) (hatch edge 0.508) 74 | (connect_pads (clearance 0)) 75 | (min_thickness 0.254) (filled_areas_thickness no) 76 | (keepout (tracks not_allowed) (vias not_allowed) (pads not_allowed) (copperpour not_allowed) (footprints allowed)) 77 | (fill (thermal_gap 0.508) (thermal_bridge_width 0.508)) 78 | (polygon 79 | (pts 80 | (xy -1.2 4.2) 81 | (xy -5 4.2) 82 | (xy -5 2.2) 83 | (xy -1.2 2.2) 84 | ) 85 | ) 86 | ) 87 | ) 88 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/SW_KEYBOARD.pretty/ProMicro.kicad_mod: -------------------------------------------------------------------------------- 1 | (module ProMicro (layer F.Cu) (tedit 5A06A962) 2 | (descr "Pro Micro footprint") 3 | (tags "promicro ProMicro") 4 | (fp_text reference REF** (at 0 -10.16) (layer F.SilkS) hide 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value ProMicro (at 0 10.16) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_line (start 15.24 -8.89) (end 15.24 8.89) (layer B.SilkS) (width 0.15)) 11 | (fp_line (start 15.24 8.89) (end -15.24 8.89) (layer B.SilkS) (width 0.15)) 12 | (fp_line (start -15.24 8.89) (end -15.24 3.81) (layer B.SilkS) (width 0.15)) 13 | (fp_line (start -15.24 3.81) (end -17.78 3.81) (layer B.SilkS) (width 0.15)) 14 | (fp_line (start -17.78 3.81) (end -17.78 -3.81) (layer B.SilkS) (width 0.15)) 15 | (fp_line (start -17.78 -3.81) (end -15.24 -3.81) (layer B.SilkS) (width 0.15)) 16 | (fp_line (start -15.24 -3.81) (end -15.24 -8.89) (layer B.SilkS) (width 0.15)) 17 | (fp_line (start -15.24 -8.89) (end 15.24 -8.89) (layer B.SilkS) (width 0.15)) 18 | (fp_line (start -15.24 8.89) (end 15.24 8.89) (layer F.SilkS) (width 0.15)) 19 | (fp_line (start -15.24 8.89) (end -15.24 3.81) (layer F.SilkS) (width 0.15)) 20 | (fp_line (start -15.24 3.81) (end -17.78 3.81) (layer F.SilkS) (width 0.15)) 21 | (fp_line (start -17.78 3.81) (end -17.78 -3.81) (layer F.SilkS) (width 0.15)) 22 | (fp_line (start -17.78 -3.81) (end -15.24 -3.81) (layer F.SilkS) (width 0.15)) 23 | (fp_line (start -15.24 -3.81) (end -15.24 -8.89) (layer F.SilkS) (width 0.15)) 24 | (fp_line (start -15.24 -8.89) (end 15.24 -8.89) (layer F.SilkS) (width 0.15)) 25 | (fp_line (start 15.24 -8.89) (end 15.24 8.89) (layer F.SilkS) (width 0.15)) 26 | (pad 1 thru_hole rect (at -13.97 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 27 | (pad 2 thru_hole circle (at -11.43 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 28 | (pad 3 thru_hole circle (at -8.89 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 29 | (pad 4 thru_hole circle (at -6.35 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 30 | (pad 5 thru_hole circle (at -3.81 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 31 | (pad 6 thru_hole circle (at -1.27 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 32 | (pad 7 thru_hole circle (at 1.27 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 33 | (pad 8 thru_hole circle (at 3.81 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 34 | (pad 9 thru_hole circle (at 6.35 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 35 | (pad 10 thru_hole circle (at 8.89 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 36 | (pad 11 thru_hole circle (at 11.43 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 37 | (pad 12 thru_hole circle (at 13.97 7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 38 | (pad 13 thru_hole circle (at 13.97 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 39 | (pad 14 thru_hole circle (at 11.43 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 40 | (pad 15 thru_hole circle (at 8.89 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 41 | (pad 16 thru_hole circle (at 6.35 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 42 | (pad 17 thru_hole circle (at 3.81 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 43 | (pad 18 thru_hole circle (at 1.27 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 44 | (pad 19 thru_hole circle (at -1.27 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 45 | (pad 20 thru_hole circle (at -3.81 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 46 | (pad 21 thru_hole circle (at -6.35 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 47 | (pad 22 thru_hole circle (at -8.89 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 48 | (pad 23 thru_hole circle (at -11.43 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 49 | (pad 24 thru_hole circle (at -13.97 -7.62) (size 1.6 1.6) (drill 1.1) (layers *.Cu *.Mask F.SilkS)) 50 | ) 51 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/SW_KEYBOARD.pretty/SW_PG1350_reversible.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "SW_PG1350_reversible" (version 20211014) (generator pcbnew) 2 | (layer "F.Cu") 3 | (tedit 5DD501D8) 4 | (descr "Kailh \"Choc\" PG1350 keyswitch, able to be mounted on front or back of PCB") 5 | (tags "kailh,choc") 6 | (attr through_hole) 7 | (fp_text reference "REF**" (at 0 -8.255) (layer "F.SilkS") 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | (tstamp b06ce446-c27e-47df-a4e3-d10b64552c26) 10 | ) 11 | (fp_text value "SW_PG1350_reversible" (at 0 8.255) (layer "F.Fab") 12 | (effects (font (size 1 1) (thickness 0.15))) 13 | (tstamp c9a0dd18-d945-4bfe-8921-ced29a4068d2) 14 | ) 15 | (fp_text user "${REFERENCE}" (at 0 -8.255) (layer "B.SilkS") 16 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 17 | (tstamp 3559e287-424e-4397-b080-77c7ba6f395b) 18 | ) 19 | (fp_text user "${REFERENCE}" (at 0 0) (layer "B.Fab") 20 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 21 | (tstamp 02165243-61a3-4857-84ba-71a77cb9a387) 22 | ) 23 | (fp_text user "${VALUE}" (at 0 8.255) (layer "B.Fab") 24 | (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) 25 | (tstamp e6521bef-4109-48f7-8b88-4121b0468927) 26 | ) 27 | (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") 28 | (effects (font (size 1 1) (thickness 0.15))) 29 | (tstamp 9ff4672a-e1a4-4a1e-887d-1b9a3429d278) 30 | ) 31 | (fp_line (start -7 7) (end -7 6) (layer "B.SilkS") (width 0.15) (tstamp 3451168c-3c76-4628-aee4-7c231bd100c3)) 32 | (fp_line (start -6 7) (end -7 7) (layer "B.SilkS") (width 0.15) (tstamp 563c12e4-8f8c-446c-a11f-94f5aa93b994)) 33 | (fp_line (start 6 -7) (end 7 -7) (layer "B.SilkS") (width 0.15) (tstamp 6ff874d0-4ac5-414c-83a7-573eda4c7703)) 34 | (fp_line (start 7 -7) (end 7 -6) (layer "B.SilkS") (width 0.15) (tstamp 9538e4ed-27e6-4c37-b989-9859dc0d49e8)) 35 | (fp_line (start -7 -7) (end -6 -7) (layer "B.SilkS") (width 0.15) (tstamp a3668681-09b1-48f0-a7b1-f6b24183a469)) 36 | (fp_line (start -7 -6) (end -7 -7) (layer "B.SilkS") (width 0.15) (tstamp be0953c0-632d-4dd2-85e9-4d41239f22d2)) 37 | (fp_line (start 7 6) (end 7 7) (layer "B.SilkS") (width 0.15) (tstamp ca213826-0282-4b3a-840f-ec416dc34acf)) 38 | (fp_line (start 7 7) (end 6 7) (layer "B.SilkS") (width 0.15) (tstamp e63e39d7-6ac0-4ffd-8aa3-1841a4541b55)) 39 | (fp_line (start -6 7) (end -7 7) (layer "F.SilkS") (width 0.15) (tstamp 08e2d62f-f99a-4268-8b33-617dfcc63e75)) 40 | (fp_line (start -7 -7) (end -6 -7) (layer "F.SilkS") (width 0.15) (tstamp 5994a946-119f-4db4-aafe-00ae73b5b800)) 41 | (fp_line (start 7 -7) (end 7 -6) (layer "F.SilkS") (width 0.15) (tstamp 81c041f3-483e-477d-9475-d108280de2a9)) 42 | (fp_line (start 7 7) (end 6 7) (layer "F.SilkS") (width 0.15) (tstamp 92e8f8c3-0985-4c0d-8e38-92cbbf365409)) 43 | (fp_line (start 6 -7) (end 7 -7) (layer "F.SilkS") (width 0.15) (tstamp e149e0b1-47fa-4b20-b36e-2d51ee1e85c3)) 44 | (fp_line (start 7 6) (end 7 7) (layer "F.SilkS") (width 0.15) (tstamp e68c5170-03c3-4a20-abd0-ad610c43d035)) 45 | (fp_line (start -7 7) (end -7 6) (layer "F.SilkS") (width 0.15) (tstamp eaef1172-3351-417c-bfc4-74a598f141cb)) 46 | (fp_line (start -7 -6) (end -7 -7) (layer "F.SilkS") (width 0.15) (tstamp f6ee98b5-4773-4eeb-a825-33c1705abace)) 47 | (fp_line (start -6.9 6.9) (end -6.9 -6.9) (layer "Eco2.User") (width 0.15) (tstamp 16ded395-a862-4198-b3af-ba8c7fb298bb)) 48 | (fp_line (start -2.6 -3.1) (end -2.6 -6.3) (layer "Eco2.User") (width 0.15) (tstamp 681bd495-c396-44ce-92bd-4b397cd48c04)) 49 | (fp_line (start 6.9 -6.9) (end -6.9 -6.9) (layer "Eco2.User") (width 0.15) (tstamp 851ab59d-1fd7-45c7-a775-29797327cafc)) 50 | (fp_line (start 6.9 -6.9) (end 6.9 6.9) (layer "Eco2.User") (width 0.15) (tstamp 975b065a-4fee-4d11-9f2f-b1d40a3629cb)) 51 | (fp_line (start 2.6 -6.3) (end -2.6 -6.3) (layer "Eco2.User") (width 0.15) (tstamp a1c7b1f5-f895-4192-9484-2357882c73e0)) 52 | (fp_line (start -2.6 -3.1) (end 2.6 -3.1) (layer "Eco2.User") (width 0.15) (tstamp b680b4a7-6cb0-40b5-a7ec-a02910a0daa4)) 53 | (fp_line (start 2.6 -3.1) (end 2.6 -6.3) (layer "Eco2.User") (width 0.15) (tstamp c5a1761e-3391-4e74-90c9-947fd66e1fc6)) 54 | (fp_line (start -6.9 6.9) (end 6.9 6.9) (layer "Eco2.User") (width 0.15) (tstamp e1105432-6a2f-45d9-8a08-47401d087cf4)) 55 | (fp_line (start 7.5 7.5) (end -7.5 7.5) (layer "B.Fab") (width 0.15) (tstamp 23e66461-bcf2-4335-93c2-5c91dfd00187)) 56 | (fp_line (start -7.5 -7.5) (end 7.5 -7.5) (layer "B.Fab") (width 0.15) (tstamp 3934cdea-42c8-4ab1-b1be-2c4978ab08ae)) 57 | (fp_line (start 7.5 -7.5) (end 7.5 7.5) (layer "B.Fab") (width 0.15) (tstamp d0dfd7c1-401d-4f64-8463-f4c0813ac28f)) 58 | (fp_line (start -7.5 7.5) (end -7.5 -7.5) (layer "B.Fab") (width 0.15) (tstamp dd2f6b13-9e35-4a67-90ac-cf0d1ea34e5a)) 59 | (fp_line (start -7.5 -7.5) (end 7.5 -7.5) (layer "F.Fab") (width 0.15) (tstamp 646d9e91-59b4-4865-a2fc-29780ed32563)) 60 | (fp_line (start 7.5 -7.5) (end 7.5 7.5) (layer "F.Fab") (width 0.15) (tstamp 87c78429-be2b-40ed-8d3b-56cb9666a56f)) 61 | (fp_line (start 7.5 7.5) (end -7.5 7.5) (layer "F.Fab") (width 0.15) (tstamp 99030c03-63b4-49ba-b5ab-4d56974f7963)) 62 | (fp_line (start -7.5 7.5) (end -7.5 -7.5) (layer "F.Fab") (width 0.15) (tstamp edc9ab4f-487a-48dc-95f2-4d87f0e9cf9e)) 63 | (pad "" np_thru_hole circle (at 0 0) (size 3.429 3.429) (drill 3.429) (layers *.Cu *.Mask) (tstamp 0f3c9e3a-9c59-4881-b27a-d0e982b3ea8e)) 64 | (pad "" np_thru_hole circle (at -5.5 0) (size 1.7018 1.7018) (drill 1.7018) (layers *.Cu *.Mask) (tstamp 68b52f01-fa04-4908-bf88-60c62ace1cfa)) 65 | (pad "" np_thru_hole circle (at -5.22 -4.2) (size 0.9906 0.9906) (drill 0.9906) (layers *.Cu *.Mask) (tstamp 825c70b0-4860-42b7-97dc-86bfa46e06fd)) 66 | (pad "" np_thru_hole circle (at 5.5 0) (size 1.7018 1.7018) (drill 1.7018) (layers *.Cu *.Mask) (tstamp 9d984d1b-8097-407f-92f3-3ef68867dcfa)) 67 | (pad "" np_thru_hole circle (at 5.22 -4.2) (size 0.9906 0.9906) (drill 0.9906) (layers *.Cu *.Mask) (tstamp bb4f0314-c44c-4dda-b85c-537120eaae9a)) 68 | (pad "1" thru_hole circle (at 0 5.9) (size 2.032 2.032) (drill 1.27) (layers *.Cu *.Mask) (tstamp 46cfd089-6873-4d8b-89af-02ff30e49472)) 69 | (pad "2" thru_hole circle (at 5 3.8) (size 2.032 2.032) (drill 1.27) (layers *.Cu *.Mask) (tstamp bbb15673-6d42-42b8-9d51-7515b3ad9ee9)) 70 | (pad "2" thru_hole circle (at -5 3.8) (size 2.032 2.032) (drill 1.27) (layers *.Cu *.Mask) (tstamp e83e0227-ac0f-4180-82bd-68d3a7b56476)) 71 | ) 72 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/SW_KEYBOARD.pretty/flipped_smd_diode.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "flipped_smd_diode" (version 20211014) (generator pcbnew) 2 | (layer "F.Cu") 3 | (tedit 63E28E69) 4 | (attr through_hole) 5 | (fp_text reference "REF**" (at 0 -0.5 unlocked) (layer "F.SilkS") 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | (tstamp e5b6ce0d-0226-4935-8057-ee6b8dba2942) 8 | ) 9 | (fp_text value "flipped_smd_diode" (at 0 1 unlocked) (layer "F.Fab") 10 | (effects (font (size 1 1) (thickness 0.15))) 11 | (tstamp 8f5ae0c1-79dd-4dca-9fbb-11a6878f3f4a) 12 | ) 13 | (fp_line (start -0.72 -1.99) (end -1.33 -1.99) (layer "B.SilkS") (width 0.12) (tstamp e5f340c6-4ca4-460c-aaac-1784cff3811f)) 14 | (fp_line (start 0.71 -1.99) (end 1.3 -1.98) (layer "B.SilkS") (width 0.12) (tstamp f361aea1-9689-4f51-a7be-e0b7c5844da0)) 15 | (fp_line (start 0.69 -1.97) (end 1.3 -1.97) (layer "F.SilkS") (width 0.12) (tstamp 7114afb7-49dc-4403-ae26-9efc0b6fc03d)) 16 | (fp_line (start -0.74 -1.97) (end -1.34 -1.97) (layer "F.SilkS") (width 0.12) (tstamp f486cc0c-a204-45b8-bbc7-7d1c6631c2ce)) 17 | (pad "" np_thru_hole circle (at 0 -3.02) (size 2.45 2.45) (drill 2.45) (layers *.Mask) (tstamp 055a2a74-603f-4b08-9e26-20e5b35b381c)) 18 | (pad "0" thru_hole roundrect (at 0 -1.19) (size 1.45 1.524) (drill 0.4) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp 2df3f6f4-4777-41cc-81bc-c3af95fb5586)) 19 | (pad "1" thru_hole roundrect (at 0 -4.895 180) (size 1.45 1.524) (drill 0.4) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp c8343970-9e0e-4e47-a6a5-cde3b7860979)) 20 | ) 21 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/SW_KEYBOARD.pretty/inline_diode.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "inline_diode" (version 20211014) (generator pcbnew) 2 | (layer "F.Cu") 3 | (tedit 63D0BA62) 4 | (attr through_hole) 5 | (fp_text reference "REF**" (at -0.02 -0.35 unlocked) (layer "F.SilkS") hide 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | (tstamp 940fc91f-3d28-4131-bfa2-e20f2d08b952) 8 | ) 9 | (fp_text value "inline_diode" (at 0 1 unlocked) (layer "F.Fab") 10 | (effects (font (size 1 1) (thickness 0.15))) 11 | (tstamp 6d1ca6f3-4eaf-4074-a6ea-55cb1961d038) 12 | ) 13 | (fp_line (start 1.02 -3.1) (end 1.99 -3.09) (layer "B.SilkS") (width 0.12) (tstamp 6d046c17-6d97-4ae6-b362-93de307737d1)) 14 | (fp_line (start -1.07 -3.14) (end -1.95 -3.14) (layer "B.SilkS") (width 0.12) (tstamp 80134c0f-0a44-4016-be3f-03565eb02d29)) 15 | (fp_line (start -1.1 -3.13) (end -1.89 -3.13) (layer "F.SilkS") (width 0.12) (tstamp 199dc825-7002-4863-bcdd-3a1ad74ccf97)) 16 | (fp_line (start 1.98 -3.09) (end 1.01 -3.09) (layer "F.SilkS") (width 0.12) (tstamp fb30e0ec-81a8-4853-b1c9-9c25ed819bef)) 17 | (fp_rect (start -1.0775 -1.92) (end 1.0175 -9.94) (layer "Edge.Cuts") (width 0.12) (fill none) (tstamp 0b6622a0-07df-4e4a-8370-b3b1b301441f)) 18 | (pad "1" thru_hole roundrect (at -0.06 -10.17) (size 1.524 2.6) (drill 0.762 (offset 0 -0.5)) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp 4781db20-8791-444b-9b76-04b2524f6b79)) 19 | (pad "2" thru_hole roundrect (at -0.02 -1.71 180) (size 1.524 2.6) (drill 0.762 (offset 0 -0.5)) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (tstamp 5868c2ab-58c0-441a-a59f-d2c3790026e9)) 20 | ) 21 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/SW_KEYBOARD.pretty/wire_loom.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "wire_loom" (version 20211014) (generator pcbnew) 2 | (layer "F.Cu") 3 | (tedit 63D2C35E) 4 | (attr through_hole) 5 | (fp_text reference "REF**" (at 0.06 1.51 unlocked) (layer "F.SilkS") 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | (tstamp 0a558a77-28be-4b74-9acb-e0e16b814478) 8 | ) 9 | (fp_text value "wire_loom" (at -0.07 2.94 unlocked) (layer "F.Fab") 10 | (effects (font (size 1 1) (thickness 0.15))) 11 | (tstamp 2843f869-906c-4146-ba36-7da2bed40d01) 12 | ) 13 | (pad "" np_thru_hole circle (at 0 0) (size 2.9 2.9) (drill 2.9) (layers F&B.Cu *.Mask) (tstamp 9d95ac85-89cf-4ebc-a331-57f59cd2c191)) 14 | (pad "" np_thru_hole circle (at 0 -15.1) (size 2.9 2.9) (drill 2.9) (layers F&B.Cu *.Mask) (tstamp f9b9b148-cad7-496b-977a-3fcea476ca38)) 15 | ) 16 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/battery_switch.kicad_prl: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "active_layer": 0, 4 | "active_layer_preset": "All Layers", 5 | "auto_track_width": true, 6 | "hidden_netclasses": [], 7 | "hidden_nets": [], 8 | "high_contrast_mode": 0, 9 | "net_color_mode": 1, 10 | "opacity": { 11 | "images": 0.6, 12 | "pads": 1.0, 13 | "tracks": 1.0, 14 | "vias": 1.0, 15 | "zones": 0.6 16 | }, 17 | "selection_filter": { 18 | "dimensions": true, 19 | "footprints": true, 20 | "graphics": true, 21 | "keepouts": true, 22 | "lockedItems": false, 23 | "otherItems": true, 24 | "pads": true, 25 | "text": true, 26 | "tracks": true, 27 | "vias": true, 28 | "zones": true 29 | }, 30 | "visible_items": [ 31 | 0, 32 | 1, 33 | 2, 34 | 3, 35 | 4, 36 | 5, 37 | 8, 38 | 9, 39 | 10, 40 | 11, 41 | 12, 42 | 13, 43 | 15, 44 | 16, 45 | 17, 46 | 18, 47 | 19, 48 | 20, 49 | 21, 50 | 22, 51 | 23, 52 | 24, 53 | 25, 54 | 26, 55 | 27, 56 | 28, 57 | 29, 58 | 30, 59 | 32, 60 | 33, 61 | 34, 62 | 35, 63 | 36, 64 | 39, 65 | 40 66 | ], 67 | "visible_layers": "fffffff_ffffffff", 68 | "zone_display_mode": 0 69 | }, 70 | "git": { 71 | "repo_password": "", 72 | "repo_type": "", 73 | "repo_username": "", 74 | "ssh_key": "" 75 | }, 76 | "meta": { 77 | "filename": "battery_switch.kicad_prl", 78 | "version": 3 79 | }, 80 | "project": { 81 | "files": [] 82 | } 83 | } 84 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/battery_switch.kicad_pro: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "3dviewports": [], 4 | "design_settings": { 5 | "defaults": { 6 | "apply_defaults_to_fp_fields": false, 7 | "apply_defaults_to_fp_shapes": false, 8 | "apply_defaults_to_fp_text": false, 9 | "board_outline_line_width": 0.15, 10 | "copper_line_width": 0.2, 11 | "copper_text_italic": false, 12 | "copper_text_size_h": 1.5, 13 | "copper_text_size_v": 1.5, 14 | "copper_text_thickness": 0.3, 15 | "copper_text_upright": false, 16 | "courtyard_line_width": 0.05, 17 | "dimension_precision": 4, 18 | "dimension_units": 3, 19 | "dimensions": { 20 | "arrow_length": 1270000, 21 | "extension_offset": 500000, 22 | "keep_text_aligned": true, 23 | "suppress_zeroes": false, 24 | "text_position": 0, 25 | "units_format": 1 26 | }, 27 | "fab_line_width": 0.1, 28 | "fab_text_italic": false, 29 | "fab_text_size_h": 1.0, 30 | "fab_text_size_v": 1.0, 31 | "fab_text_thickness": 0.15, 32 | "fab_text_upright": false, 33 | "other_line_width": 0.1, 34 | "other_text_italic": false, 35 | "other_text_size_h": 1.0, 36 | "other_text_size_v": 1.0, 37 | "other_text_thickness": 0.15, 38 | "other_text_upright": false, 39 | "pads": { 40 | "drill": 0.762, 41 | "height": 1.524, 42 | "width": 1.524 43 | }, 44 | "silk_line_width": 0.15, 45 | "silk_text_italic": false, 46 | "silk_text_size_h": 1.0, 47 | "silk_text_size_v": 1.0, 48 | "silk_text_thickness": 0.15, 49 | "silk_text_upright": false, 50 | "zones": { 51 | "min_clearance": 0.508 52 | } 53 | }, 54 | "diff_pair_dimensions": [], 55 | "drc_exclusions": [], 56 | "meta": { 57 | "filename": "board_design_settings.json", 58 | "version": 2 59 | }, 60 | "rule_severities": { 61 | "annular_width": "error", 62 | "clearance": "error", 63 | "connection_width": "warning", 64 | "copper_edge_clearance": "error", 65 | "copper_sliver": "warning", 66 | "courtyards_overlap": "error", 67 | "diff_pair_gap_out_of_range": "error", 68 | "diff_pair_uncoupled_length_too_long": "error", 69 | "drill_out_of_range": "error", 70 | "duplicate_footprints": "warning", 71 | "extra_footprint": "warning", 72 | "footprint": "error", 73 | "footprint_symbol_mismatch": "warning", 74 | "footprint_type_mismatch": "ignore", 75 | "hole_clearance": "error", 76 | "hole_near_hole": "error", 77 | "holes_co_located": "warning", 78 | "invalid_outline": "error", 79 | "isolated_copper": "warning", 80 | "item_on_disabled_layer": "error", 81 | "items_not_allowed": "error", 82 | "length_out_of_range": "error", 83 | "lib_footprint_issues": "warning", 84 | "lib_footprint_mismatch": "warning", 85 | "malformed_courtyard": "error", 86 | "microvia_drill_out_of_range": "error", 87 | "missing_courtyard": "ignore", 88 | "missing_footprint": "warning", 89 | "net_conflict": "warning", 90 | "npth_inside_courtyard": "ignore", 91 | "padstack": "warning", 92 | "pth_inside_courtyard": "ignore", 93 | "shorting_items": "error", 94 | "silk_edge_clearance": "warning", 95 | "silk_over_copper": "warning", 96 | "silk_overlap": "warning", 97 | "skew_out_of_range": "error", 98 | "solder_mask_bridge": "error", 99 | "starved_thermal": "error", 100 | "text_height": "warning", 101 | "text_thickness": "warning", 102 | "through_hole_pad_without_hole": "error", 103 | "too_many_vias": "error", 104 | "track_dangling": "warning", 105 | "track_width": "error", 106 | "tracks_crossing": "error", 107 | "unconnected_items": "error", 108 | "unresolved_variable": "error", 109 | "via_dangling": "warning", 110 | "zones_intersect": "error" 111 | }, 112 | "rules": { 113 | "max_error": 0.005, 114 | "min_clearance": 0.0, 115 | "min_connection": 0.0, 116 | "min_copper_edge_clearance": 0.075, 117 | "min_hole_clearance": 0.25, 118 | "min_hole_to_hole": 0.25, 119 | "min_microvia_diameter": 0.2, 120 | "min_microvia_drill": 0.1, 121 | "min_resolved_spokes": 2, 122 | "min_silk_clearance": 0.0, 123 | "min_text_height": 0.8, 124 | "min_text_thickness": 0.08, 125 | "min_through_hole_diameter": 0.3, 126 | "min_track_width": 0.2, 127 | "min_via_annular_width": 0.1, 128 | "min_via_diameter": 0.4, 129 | "solder_mask_to_copper_clearance": 0.0, 130 | "use_height_for_length_calcs": true 131 | }, 132 | "teardrop_options": [ 133 | { 134 | "td_onpadsmd": true, 135 | "td_onroundshapesonly": false, 136 | "td_ontrackend": false, 137 | "td_onviapad": true 138 | } 139 | ], 140 | "teardrop_parameters": [ 141 | { 142 | "td_allow_use_two_tracks": true, 143 | "td_curve_segcount": 0, 144 | "td_height_ratio": 1.0, 145 | "td_length_ratio": 0.5, 146 | "td_maxheight": 2.0, 147 | "td_maxlen": 1.0, 148 | "td_on_pad_in_zone": false, 149 | "td_target_name": "td_round_shape", 150 | "td_width_to_size_filter_ratio": 0.9 151 | }, 152 | { 153 | "td_allow_use_two_tracks": true, 154 | "td_curve_segcount": 0, 155 | "td_height_ratio": 1.0, 156 | "td_length_ratio": 0.5, 157 | "td_maxheight": 2.0, 158 | "td_maxlen": 1.0, 159 | "td_on_pad_in_zone": false, 160 | "td_target_name": "td_rect_shape", 161 | "td_width_to_size_filter_ratio": 0.9 162 | }, 163 | { 164 | "td_allow_use_two_tracks": true, 165 | "td_curve_segcount": 0, 166 | "td_height_ratio": 1.0, 167 | "td_length_ratio": 0.5, 168 | "td_maxheight": 2.0, 169 | "td_maxlen": 1.0, 170 | "td_on_pad_in_zone": false, 171 | "td_target_name": "td_track_end", 172 | "td_width_to_size_filter_ratio": 0.9 173 | } 174 | ], 175 | "track_widths": [ 176 | 0.0, 177 | 1.0 178 | ], 179 | "tuning_pattern_settings": { 180 | "diff_pair_defaults": { 181 | "corner_radius_percentage": 80, 182 | "corner_style": 1, 183 | "max_amplitude": 1.0, 184 | "min_amplitude": 0.2, 185 | "single_sided": false, 186 | "spacing": 1.0 187 | }, 188 | "diff_pair_skew_defaults": { 189 | "corner_radius_percentage": 80, 190 | "corner_style": 1, 191 | "max_amplitude": 1.0, 192 | "min_amplitude": 0.2, 193 | "single_sided": false, 194 | "spacing": 0.6 195 | }, 196 | "single_track_defaults": { 197 | "corner_radius_percentage": 80, 198 | "corner_style": 1, 199 | "max_amplitude": 1.0, 200 | "min_amplitude": 0.2, 201 | "single_sided": false, 202 | "spacing": 0.6 203 | } 204 | }, 205 | "via_dimensions": [], 206 | "zones_allow_external_fillets": false 207 | }, 208 | "ipc2581": { 209 | "dist": "", 210 | "distpn": "", 211 | "internal_id": "", 212 | "mfg": "", 213 | "mpn": "" 214 | }, 215 | "layer_presets": [], 216 | "viewports": [] 217 | }, 218 | "boards": [], 219 | "cvpcb": { 220 | "equivalence_files": [] 221 | }, 222 | "libraries": { 223 | "pinned_footprint_libs": [], 224 | "pinned_symbol_libs": [] 225 | }, 226 | "meta": { 227 | "filename": "battery_switch.kicad_pro", 228 | "version": 1 229 | }, 230 | "net_settings": { 231 | "classes": [ 232 | { 233 | "bus_width": 12, 234 | "clearance": 0.2, 235 | "diff_pair_gap": 0.25, 236 | "diff_pair_via_gap": 0.25, 237 | "diff_pair_width": 0.2, 238 | "line_style": 0, 239 | "microvia_diameter": 0.3, 240 | "microvia_drill": 0.1, 241 | "name": "Default", 242 | "pcb_color": "rgba(0, 0, 0, 0.000)", 243 | "schematic_color": "rgba(0, 0, 0, 0.000)", 244 | "track_width": 0.25, 245 | "via_diameter": 0.6, 246 | "via_drill": 0.4, 247 | "wire_width": 6 248 | }, 249 | { 250 | "bus_width": 12, 251 | "clearance": 0.2, 252 | "diff_pair_gap": 0.25, 253 | "diff_pair_via_gap": 0.25, 254 | "diff_pair_width": 0.2, 255 | "line_style": 0, 256 | "microvia_diameter": 0.3, 257 | "microvia_drill": 0.1, 258 | "name": "POWER", 259 | "pcb_color": "rgba(0, 0, 0, 0.000)", 260 | "schematic_color": "rgba(0, 0, 0, 0.000)", 261 | "track_width": 1.0, 262 | "via_diameter": 0.6, 263 | "via_drill": 0.4, 264 | "wire_width": 6 265 | } 266 | ], 267 | "meta": { 268 | "version": 3 269 | }, 270 | "net_colors": null, 271 | "netclass_assignments": null, 272 | "netclass_patterns": [ 273 | { 274 | "netclass": "Default", 275 | "pattern": "Net-(J1-Pad1)" 276 | }, 277 | { 278 | "netclass": "Default", 279 | "pattern": "Net-(J1-Pad2)" 280 | }, 281 | { 282 | "netclass": "Default", 283 | "pattern": "Net-(J2-Pad1)" 284 | } 285 | ] 286 | }, 287 | "pcbnew": { 288 | "last_paths": { 289 | "gencad": "", 290 | "idf": "", 291 | "netlist": "", 292 | "plot": "", 293 | "pos_files": "", 294 | "specctra_dsn": "", 295 | "step": "", 296 | "svg": "", 297 | "vrml": "" 298 | }, 299 | "page_layout_descr_file": "" 300 | }, 301 | "schematic": { 302 | "legacy_lib_dir": "", 303 | "legacy_lib_list": [] 304 | }, 305 | "sheets": [], 306 | "text_variables": {} 307 | } 308 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2023-02-07_115235.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2023-02-07_115235.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-07_150711.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-07_150711.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-07_164012.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-07_164012.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-07_165040.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-07_165040.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-07_170658.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-07_170658.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-07_212137.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-07_212137.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-13_192537.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-13_192537.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-13_195331.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-13_195331.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-13_200406.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-13_200406.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-13_201520.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-13_201520.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-13_204820.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-13_204820.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-14_115343.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-14_115343.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-14_120931.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-14_120931.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-14_144421.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-14_144421.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-14_155611.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-14_155611.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-16_153937.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/btrfld_pcb_ulp/btrfld_pcb-backups/btrfld_pcb-2024-08-16_153937.zip -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-bkp-2023-1-24-19.21.47.kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20211014) (generator pcbnew) 2 | 3 | (general 4 | (thickness 1.6) 5 | ) 6 | 7 | (paper "A4") 8 | (layers 9 | (0 "F.Cu" signal) 10 | (31 "B.Cu" signal) 11 | (32 "B.Adhes" user "B.Adhesive") 12 | (33 "F.Adhes" user "F.Adhesive") 13 | (34 "B.Paste" user) 14 | (35 "F.Paste" user) 15 | (36 "B.SilkS" user "B.Silkscreen") 16 | (37 "F.SilkS" user "F.Silkscreen") 17 | (38 "B.Mask" user) 18 | (39 "F.Mask" user) 19 | (40 "Dwgs.User" user "User.Drawings") 20 | (41 "Cmts.User" user "User.Comments") 21 | (42 "Eco1.User" user "User.Eco1") 22 | (43 "Eco2.User" user "User.Eco2") 23 | (44 "Edge.Cuts" user) 24 | (45 "Margin" user) 25 | (46 "B.CrtYd" user "B.Courtyard") 26 | (47 "F.CrtYd" user "F.Courtyard") 27 | (48 "B.Fab" user) 28 | (49 "F.Fab" user) 29 | (50 "User.1" user) 30 | (51 "User.2" user) 31 | (52 "User.3" user) 32 | (53 "User.4" user) 33 | (54 "User.5" user) 34 | (55 "User.6" user) 35 | (56 "User.7" user) 36 | (57 "User.8" user) 37 | (58 "User.9" user) 38 | ) 39 | 40 | (setup 41 | (pad_to_mask_clearance 0) 42 | (pcbplotparams 43 | (layerselection 0x00010fc_ffffffff) 44 | (disableapertmacros false) 45 | (usegerberextensions false) 46 | (usegerberattributes true) 47 | (usegerberadvancedattributes true) 48 | (creategerberjobfile true) 49 | (svguseinch false) 50 | (svgprecision 6) 51 | (excludeedgelayer true) 52 | (plotframeref false) 53 | (viasonmask false) 54 | (mode 1) 55 | (useauxorigin false) 56 | (hpglpennumber 1) 57 | (hpglpenspeed 20) 58 | (hpglpendiameter 15.000000) 59 | (dxfpolygonmode true) 60 | (dxfimperialunits true) 61 | (dxfusepcbnewfont true) 62 | (psnegative false) 63 | (psa4output false) 64 | (plotreference true) 65 | (plotvalue true) 66 | (plotinvisibletext false) 67 | (sketchpadsonfab false) 68 | (subtractmaskfromsilk false) 69 | (outputformat 1) 70 | (mirror false) 71 | (drillshape 1) 72 | (scaleselection 1) 73 | (outputdirectory "") 74 | ) 75 | ) 76 | 77 | (net 0 "") 78 | 79 | (gr_line (start 73.66 111.76) (end 73.66 83.82) (layer "Edge.Cuts") (width 0.1) (tstamp 30317bf0-88bb-49e7-bf8b-9f3883982225)) 80 | (gr_line (start 73.66 83.82) (end 66.04 83.82) (layer "Edge.Cuts") (width 0.1) (tstamp 63c56ea4-91a3-4172-b9de-a4388cc8f894)) 81 | (gr_line (start 66.04 60.96) (end 157.48 60.96) (layer "Edge.Cuts") (width 0.1) (tstamp 6c2e273e-743c-4f1e-a647-4171f8122550)) 82 | (gr_line (start 157.48 60.96) (end 157.48 124.46) (layer "Edge.Cuts") (width 0.1) (tstamp 7b044939-8c4d-444f-b9e0-a15fcdeb5a86)) 83 | (gr_line (start 104.14 111.76) (end 73.66 111.76) (layer "Edge.Cuts") (width 0.1) (tstamp 9186dae5-6dc3-4744-9f90-e697559c6ac8)) 84 | (gr_line (start 104.14 124.46) (end 104.14 111.76) (layer "Edge.Cuts") (width 0.1) (tstamp aa79024d-ca7e-4c24-b127-7df08bbd0c75)) 85 | (gr_line (start 66.04 83.82) (end 66.04 60.96) (layer "Edge.Cuts") (width 0.1) (tstamp b78cb2c1-ae4b-4d9b-acd8-d7fe342342f2)) 86 | (gr_line (start 157.48 124.46) (end 104.14 124.46) (layer "Edge.Cuts") (width 0.1) (tstamp f9403623-c00c-4b71-bc5c-d763ff009386)) 87 | (dimension (type aligned) (layer "Edge.Cuts") (tstamp fed97871-4d75-4194-a3d3-5b61f2a948a5) 88 | (pts (xy 66.04 60.96) (xy 157.48 60.96)) 89 | (height -12.7) 90 | (gr_text "91.4400 mm" (at 111.76 47.11) (layer "Edge.Cuts") (tstamp 4f489d12-440e-4cd0-933d-b6701961a6d6) 91 | (effects (font (size 1 1) (thickness 0.15))) 92 | ) 93 | (format (units 3) (units_format 1) (precision 4)) 94 | (style (thickness 0.1) (arrow_length 1.27) (text_position_mode 0) (extension_height 0.58642) (extension_offset 0.5) keep_text_aligned) 95 | ) 96 | 97 | ) 98 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-bkp-2023-1-24-19.47.39.kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20211014) (generator pcbnew) 2 | 3 | (general 4 | (thickness 1.6) 5 | ) 6 | 7 | (paper "A4") 8 | (layers 9 | (0 "F.Cu" signal) 10 | (31 "B.Cu" signal) 11 | (32 "B.Adhes" user "B.Adhesive") 12 | (33 "F.Adhes" user "F.Adhesive") 13 | (34 "B.Paste" user) 14 | (35 "F.Paste" user) 15 | (36 "B.SilkS" user "B.Silkscreen") 16 | (37 "F.SilkS" user "F.Silkscreen") 17 | (38 "B.Mask" user) 18 | (39 "F.Mask" user) 19 | (40 "Dwgs.User" user "User.Drawings") 20 | (41 "Cmts.User" user "User.Comments") 21 | (42 "Eco1.User" user "User.Eco1") 22 | (43 "Eco2.User" user "User.Eco2") 23 | (44 "Edge.Cuts" user) 24 | (45 "Margin" user) 25 | (46 "B.CrtYd" user "B.Courtyard") 26 | (47 "F.CrtYd" user "F.Courtyard") 27 | (48 "B.Fab" user) 28 | (49 "F.Fab" user) 29 | (50 "User.1" user) 30 | (51 "User.2" user) 31 | (52 "User.3" user) 32 | (53 "User.4" user) 33 | (54 "User.5" user) 34 | (55 "User.6" user) 35 | (56 "User.7" user) 36 | (57 "User.8" user) 37 | (58 "User.9" user) 38 | ) 39 | 40 | (setup 41 | (pad_to_mask_clearance 0) 42 | (pcbplotparams 43 | (layerselection 0x00010fc_ffffffff) 44 | (disableapertmacros false) 45 | (usegerberextensions false) 46 | (usegerberattributes true) 47 | (usegerberadvancedattributes true) 48 | (creategerberjobfile true) 49 | (svguseinch false) 50 | (svgprecision 6) 51 | (excludeedgelayer true) 52 | (plotframeref false) 53 | (viasonmask false) 54 | (mode 1) 55 | (useauxorigin false) 56 | (hpglpennumber 1) 57 | (hpglpenspeed 20) 58 | (hpglpendiameter 15.000000) 59 | (dxfpolygonmode true) 60 | (dxfimperialunits true) 61 | (dxfusepcbnewfont true) 62 | (psnegative false) 63 | (psa4output false) 64 | (plotreference true) 65 | (plotvalue true) 66 | (plotinvisibletext false) 67 | (sketchpadsonfab false) 68 | (subtractmaskfromsilk false) 69 | (outputformat 1) 70 | (mirror false) 71 | (drillshape 1) 72 | (scaleselection 1) 73 | (outputdirectory "") 74 | ) 75 | ) 76 | 77 | (net 0 "") 78 | 79 | (gr_line (start 73.66 111.76) (end 73.66 83.82) (layer "Edge.Cuts") (width 0.1) (tstamp 30317bf0-88bb-49e7-bf8b-9f3883982225)) 80 | (gr_line (start 73.66 83.82) (end 66.04 83.82) (layer "Edge.Cuts") (width 0.1) (tstamp 63c56ea4-91a3-4172-b9de-a4388cc8f894)) 81 | (gr_line (start 66.04 60.96) (end 157.48 60.96) (layer "Edge.Cuts") (width 0.1) (tstamp 6c2e273e-743c-4f1e-a647-4171f8122550)) 82 | (gr_line (start 157.48 60.96) (end 157.48 124.46) (layer "Edge.Cuts") (width 0.1) (tstamp 7b044939-8c4d-444f-b9e0-a15fcdeb5a86)) 83 | (gr_line (start 104.14 111.76) (end 73.66 111.76) (layer "Edge.Cuts") (width 0.1) (tstamp 9186dae5-6dc3-4744-9f90-e697559c6ac8)) 84 | (gr_line (start 104.14 124.46) (end 104.14 111.76) (layer "Edge.Cuts") (width 0.1) (tstamp aa79024d-ca7e-4c24-b127-7df08bbd0c75)) 85 | (gr_line (start 66.04 83.82) (end 66.04 60.96) (layer "Edge.Cuts") (width 0.1) (tstamp b78cb2c1-ae4b-4d9b-acd8-d7fe342342f2)) 86 | (gr_line (start 157.48 124.46) (end 104.14 124.46) (layer "Edge.Cuts") (width 0.1) (tstamp f9403623-c00c-4b71-bc5c-d763ff009386)) 87 | (dimension (type aligned) (layer "Edge.Cuts") (tstamp fed97871-4d75-4194-a3d3-5b61f2a948a5) 88 | (pts (xy 66.04 60.96) (xy 157.48 60.96)) 89 | (height -12.7) 90 | (gr_text "91.4400 mm" (at 111.76 47.11) (layer "Edge.Cuts") (tstamp 4f489d12-440e-4cd0-933d-b6701961a6d6) 91 | (effects (font (size 1 1) (thickness 0.15))) 92 | ) 93 | (format (units 3) (units_format 1) (precision 4)) 94 | (style (thickness 0.1) (arrow_length 1.27) (text_position_mode 0) (extension_height 0.58642) (extension_offset 0.5) keep_text_aligned) 95 | ) 96 | 97 | ) 98 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-bkp-2023-1-24-19.50.9.kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20211014) (generator pcbnew) 2 | 3 | (general 4 | (thickness 1.6) 5 | ) 6 | 7 | (paper "A4") 8 | (layers 9 | (0 "F.Cu" signal) 10 | (31 "B.Cu" signal) 11 | (32 "B.Adhes" user "B.Adhesive") 12 | (33 "F.Adhes" user "F.Adhesive") 13 | (34 "B.Paste" user) 14 | (35 "F.Paste" user) 15 | (36 "B.SilkS" user "B.Silkscreen") 16 | (37 "F.SilkS" user "F.Silkscreen") 17 | (38 "B.Mask" user) 18 | (39 "F.Mask" user) 19 | (40 "Dwgs.User" user "User.Drawings") 20 | (41 "Cmts.User" user "User.Comments") 21 | (42 "Eco1.User" user "User.Eco1") 22 | (43 "Eco2.User" user "User.Eco2") 23 | (44 "Edge.Cuts" user) 24 | (45 "Margin" user) 25 | (46 "B.CrtYd" user "B.Courtyard") 26 | (47 "F.CrtYd" user "F.Courtyard") 27 | (48 "B.Fab" user) 28 | (49 "F.Fab" user) 29 | (50 "User.1" user) 30 | (51 "User.2" user) 31 | (52 "User.3" user) 32 | (53 "User.4" user) 33 | (54 "User.5" user) 34 | (55 "User.6" user) 35 | (56 "User.7" user) 36 | (57 "User.8" user) 37 | (58 "User.9" user) 38 | ) 39 | 40 | (setup 41 | (pad_to_mask_clearance 0) 42 | (pcbplotparams 43 | (layerselection 0x00010fc_ffffffff) 44 | (disableapertmacros false) 45 | (usegerberextensions false) 46 | (usegerberattributes true) 47 | (usegerberadvancedattributes true) 48 | (creategerberjobfile true) 49 | (svguseinch false) 50 | (svgprecision 6) 51 | (excludeedgelayer true) 52 | (plotframeref false) 53 | (viasonmask false) 54 | (mode 1) 55 | (useauxorigin false) 56 | (hpglpennumber 1) 57 | (hpglpenspeed 20) 58 | (hpglpendiameter 15.000000) 59 | (dxfpolygonmode true) 60 | (dxfimperialunits true) 61 | (dxfusepcbnewfont true) 62 | (psnegative false) 63 | (psa4output false) 64 | (plotreference true) 65 | (plotvalue true) 66 | (plotinvisibletext false) 67 | (sketchpadsonfab false) 68 | (subtractmaskfromsilk false) 69 | (outputformat 1) 70 | (mirror false) 71 | (drillshape 1) 72 | (scaleselection 1) 73 | (outputdirectory "") 74 | ) 75 | ) 76 | 77 | (net 0 "") 78 | 79 | (gr_line (start 73.66 111.76) (end 73.66 83.82) (layer "Edge.Cuts") (width 0.1) (tstamp 30317bf0-88bb-49e7-bf8b-9f3883982225)) 80 | (gr_line (start 73.66 83.82) (end 66.04 83.82) (layer "Edge.Cuts") (width 0.1) (tstamp 63c56ea4-91a3-4172-b9de-a4388cc8f894)) 81 | (gr_line (start 66.04 60.96) (end 157.48 60.96) (layer "Edge.Cuts") (width 0.1) (tstamp 6c2e273e-743c-4f1e-a647-4171f8122550)) 82 | (gr_line (start 157.48 60.96) (end 157.48 124.46) (layer "Edge.Cuts") (width 0.1) (tstamp 7b044939-8c4d-444f-b9e0-a15fcdeb5a86)) 83 | (gr_line (start 104.14 111.76) (end 73.66 111.76) (layer "Edge.Cuts") (width 0.1) (tstamp 9186dae5-6dc3-4744-9f90-e697559c6ac8)) 84 | (gr_line (start 104.14 124.46) (end 104.14 111.76) (layer "Edge.Cuts") (width 0.1) (tstamp aa79024d-ca7e-4c24-b127-7df08bbd0c75)) 85 | (gr_line (start 66.04 83.82) (end 66.04 60.96) (layer "Edge.Cuts") (width 0.1) (tstamp b78cb2c1-ae4b-4d9b-acd8-d7fe342342f2)) 86 | (gr_line (start 157.48 124.46) (end 104.14 124.46) (layer "Edge.Cuts") (width 0.1) (tstamp f9403623-c00c-4b71-bc5c-d763ff009386)) 87 | (dimension (type aligned) (layer "Edge.Cuts") (tstamp fed97871-4d75-4194-a3d3-5b61f2a948a5) 88 | (pts (xy 66.04 60.96) (xy 157.48 60.96)) 89 | (height -12.7) 90 | (gr_text "91.4400 mm" (at 111.76 47.11) (layer "Edge.Cuts") (tstamp 4f489d12-440e-4cd0-933d-b6701961a6d6) 91 | (effects (font (size 1 1) (thickness 0.15))) 92 | ) 93 | (format (units 3) (units_format 1) (precision 4)) 94 | (style (thickness 0.1) (arrow_length 1.27) (text_position_mode 0) (extension_height 0.58642) (extension_offset 0.5) keep_text_aligned) 95 | ) 96 | 97 | ) 98 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb-bkp-2023-1-24-20.35.44.kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20211014) (generator pcbnew) 2 | 3 | (general 4 | (thickness 1.6) 5 | ) 6 | 7 | (paper "A4") 8 | (layers 9 | (0 "F.Cu" signal) 10 | (31 "B.Cu" signal) 11 | (32 "B.Adhes" user "B.Adhesive") 12 | (33 "F.Adhes" user "F.Adhesive") 13 | (34 "B.Paste" user) 14 | (35 "F.Paste" user) 15 | (36 "B.SilkS" user "B.Silkscreen") 16 | (37 "F.SilkS" user "F.Silkscreen") 17 | (38 "B.Mask" user) 18 | (39 "F.Mask" user) 19 | (40 "Dwgs.User" user "User.Drawings") 20 | (41 "Cmts.User" user "User.Comments") 21 | (42 "Eco1.User" user "User.Eco1") 22 | (43 "Eco2.User" user "User.Eco2") 23 | (44 "Edge.Cuts" user) 24 | (45 "Margin" user) 25 | (46 "B.CrtYd" user "B.Courtyard") 26 | (47 "F.CrtYd" user "F.Courtyard") 27 | (48 "B.Fab" user) 28 | (49 "F.Fab" user) 29 | (50 "User.1" user) 30 | (51 "User.2" user) 31 | (52 "User.3" user) 32 | (53 "User.4" user) 33 | (54 "User.5" user) 34 | (55 "User.6" user) 35 | (56 "User.7" user) 36 | (57 "User.8" user) 37 | (58 "User.9" user) 38 | ) 39 | 40 | (setup 41 | (pad_to_mask_clearance 0) 42 | (pcbplotparams 43 | (layerselection 0x00010fc_ffffffff) 44 | (disableapertmacros false) 45 | (usegerberextensions false) 46 | (usegerberattributes true) 47 | (usegerberadvancedattributes true) 48 | (creategerberjobfile true) 49 | (svguseinch false) 50 | (svgprecision 6) 51 | (excludeedgelayer true) 52 | (plotframeref false) 53 | (viasonmask false) 54 | (mode 1) 55 | (useauxorigin false) 56 | (hpglpennumber 1) 57 | (hpglpenspeed 20) 58 | (hpglpendiameter 15.000000) 59 | (dxfpolygonmode true) 60 | (dxfimperialunits true) 61 | (dxfusepcbnewfont true) 62 | (psnegative false) 63 | (psa4output false) 64 | (plotreference true) 65 | (plotvalue true) 66 | (plotinvisibletext false) 67 | (sketchpadsonfab false) 68 | (subtractmaskfromsilk false) 69 | (outputformat 1) 70 | (mirror false) 71 | (drillshape 1) 72 | (scaleselection 1) 73 | (outputdirectory "") 74 | ) 75 | ) 76 | 77 | (net 0 "") 78 | 79 | ) 80 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb.kicad_prl: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "active_layer": 0, 4 | "active_layer_preset": "", 5 | "auto_track_width": true, 6 | "hidden_netclasses": [], 7 | "hidden_nets": [], 8 | "high_contrast_mode": 0, 9 | "net_color_mode": 1, 10 | "opacity": { 11 | "images": 0.6, 12 | "pads": 1.0, 13 | "tracks": 1.0, 14 | "vias": 1.0, 15 | "zones": 0.6 16 | }, 17 | "ratsnest_display_mode": 0, 18 | "selection_filter": { 19 | "dimensions": true, 20 | "footprints": true, 21 | "graphics": true, 22 | "keepouts": true, 23 | "lockedItems": true, 24 | "otherItems": true, 25 | "pads": true, 26 | "text": true, 27 | "tracks": true, 28 | "vias": true, 29 | "zones": true 30 | }, 31 | "visible_items": [ 32 | 0, 33 | 1, 34 | 2, 35 | 3, 36 | 4, 37 | 5, 38 | 8, 39 | 9, 40 | 10, 41 | 11, 42 | 12, 43 | 13, 44 | 14, 45 | 15, 46 | 16, 47 | 17, 48 | 18, 49 | 19, 50 | 20, 51 | 21, 52 | 22, 53 | 23, 54 | 24, 55 | 25, 56 | 26, 57 | 27, 58 | 28, 59 | 29, 60 | 30, 61 | 32, 62 | 33, 63 | 34, 64 | 35, 65 | 36 66 | ], 67 | "visible_layers": "0001000_ffffffff", 68 | "zone_display_mode": 0 69 | }, 70 | "git": { 71 | "repo_password": "", 72 | "repo_type": "", 73 | "repo_username": "", 74 | "ssh_key": "" 75 | }, 76 | "meta": { 77 | "filename": "btrfld_pcb.kicad_prl", 78 | "version": 3 79 | }, 80 | "project": { 81 | "files": [] 82 | } 83 | } 84 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb.kicad_pro: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "3dviewports": [], 4 | "design_settings": { 5 | "defaults": { 6 | "apply_defaults_to_fp_fields": false, 7 | "apply_defaults_to_fp_shapes": false, 8 | "apply_defaults_to_fp_text": false, 9 | "board_outline_line_width": 0.1, 10 | "copper_line_width": 0.2, 11 | "copper_text_italic": false, 12 | "copper_text_size_h": 1.5, 13 | "copper_text_size_v": 1.5, 14 | "copper_text_thickness": 0.3, 15 | "copper_text_upright": false, 16 | "courtyard_line_width": 0.05, 17 | "dimension_precision": 4, 18 | "dimension_units": 3, 19 | "dimensions": { 20 | "arrow_length": 1270000, 21 | "extension_offset": 500000, 22 | "keep_text_aligned": true, 23 | "suppress_zeroes": false, 24 | "text_position": 0, 25 | "units_format": 1 26 | }, 27 | "fab_line_width": 0.1, 28 | "fab_text_italic": false, 29 | "fab_text_size_h": 1.0, 30 | "fab_text_size_v": 1.0, 31 | "fab_text_thickness": 0.15, 32 | "fab_text_upright": false, 33 | "other_line_width": 0.15, 34 | "other_text_italic": false, 35 | "other_text_size_h": 1.0, 36 | "other_text_size_v": 1.0, 37 | "other_text_thickness": 0.15, 38 | "other_text_upright": false, 39 | "pads": { 40 | "drill": 1.9, 41 | "height": 1.9, 42 | "width": 1.9 43 | }, 44 | "silk_line_width": 0.15, 45 | "silk_text_italic": false, 46 | "silk_text_size_h": 1.0, 47 | "silk_text_size_v": 1.0, 48 | "silk_text_thickness": 0.15, 49 | "silk_text_upright": false, 50 | "zones": { 51 | "45_degree_only": false, 52 | "min_clearance": 0.508 53 | } 54 | }, 55 | "diff_pair_dimensions": [ 56 | { 57 | "gap": 0.0, 58 | "via_gap": 0.0, 59 | "width": 0.0 60 | } 61 | ], 62 | "drc_exclusions": [], 63 | "meta": { 64 | "version": 2 65 | }, 66 | "rule_severities": { 67 | "annular_width": "error", 68 | "clearance": "error", 69 | "connection_width": "warning", 70 | "copper_edge_clearance": "error", 71 | "copper_sliver": "warning", 72 | "courtyards_overlap": "error", 73 | "diff_pair_gap_out_of_range": "error", 74 | "diff_pair_uncoupled_length_too_long": "error", 75 | "drill_out_of_range": "error", 76 | "duplicate_footprints": "warning", 77 | "extra_footprint": "warning", 78 | "footprint": "error", 79 | "footprint_symbol_mismatch": "warning", 80 | "footprint_type_mismatch": "error", 81 | "hole_clearance": "error", 82 | "hole_near_hole": "error", 83 | "holes_co_located": "warning", 84 | "invalid_outline": "error", 85 | "isolated_copper": "warning", 86 | "item_on_disabled_layer": "error", 87 | "items_not_allowed": "error", 88 | "length_out_of_range": "error", 89 | "lib_footprint_issues": "warning", 90 | "lib_footprint_mismatch": "warning", 91 | "malformed_courtyard": "error", 92 | "microvia_drill_out_of_range": "error", 93 | "missing_courtyard": "ignore", 94 | "missing_footprint": "warning", 95 | "net_conflict": "warning", 96 | "npth_inside_courtyard": "ignore", 97 | "padstack": "error", 98 | "pth_inside_courtyard": "ignore", 99 | "shorting_items": "error", 100 | "silk_edge_clearance": "warning", 101 | "silk_over_copper": "warning", 102 | "silk_overlap": "warning", 103 | "skew_out_of_range": "error", 104 | "solder_mask_bridge": "error", 105 | "starved_thermal": "error", 106 | "text_height": "warning", 107 | "text_thickness": "warning", 108 | "through_hole_pad_without_hole": "error", 109 | "too_many_vias": "error", 110 | "track_dangling": "warning", 111 | "track_width": "error", 112 | "tracks_crossing": "error", 113 | "unconnected_items": "error", 114 | "unresolved_variable": "error", 115 | "via_dangling": "warning", 116 | "zone_has_empty_net": "error", 117 | "zones_intersect": "error" 118 | }, 119 | "rules": { 120 | "allow_blind_buried_vias": false, 121 | "allow_microvias": false, 122 | "max_error": 0.005, 123 | "min_clearance": 0.1524, 124 | "min_connection": 0.0, 125 | "min_copper_edge_clearance": 0.0, 126 | "min_hole_clearance": 0.25, 127 | "min_hole_to_hole": 0.25, 128 | "min_microvia_diameter": 0.2, 129 | "min_microvia_drill": 0.1, 130 | "min_resolved_spokes": 2, 131 | "min_silk_clearance": 0.0, 132 | "min_text_height": 0.8, 133 | "min_text_thickness": 0.08, 134 | "min_through_hole_diameter": 0.3, 135 | "min_track_width": 0.1524, 136 | "min_via_annular_width": 0.05, 137 | "min_via_diameter": 0.4, 138 | "solder_mask_clearance": 0.0, 139 | "solder_mask_min_width": 0.0, 140 | "solder_mask_to_copper_clearance": 0.0, 141 | "use_height_for_length_calcs": true 142 | }, 143 | "teardrop_options": [ 144 | { 145 | "td_onpadsmd": true, 146 | "td_onroundshapesonly": false, 147 | "td_ontrackend": false, 148 | "td_onviapad": true 149 | } 150 | ], 151 | "teardrop_parameters": [ 152 | { 153 | "td_allow_use_two_tracks": true, 154 | "td_curve_segcount": 0, 155 | "td_height_ratio": 1.0, 156 | "td_length_ratio": 0.5, 157 | "td_maxheight": 2.0, 158 | "td_maxlen": 1.0, 159 | "td_on_pad_in_zone": false, 160 | "td_target_name": "td_round_shape", 161 | "td_width_to_size_filter_ratio": 0.9 162 | }, 163 | { 164 | "td_allow_use_two_tracks": true, 165 | "td_curve_segcount": 0, 166 | "td_height_ratio": 1.0, 167 | "td_length_ratio": 0.5, 168 | "td_maxheight": 2.0, 169 | "td_maxlen": 1.0, 170 | "td_on_pad_in_zone": false, 171 | "td_target_name": "td_rect_shape", 172 | "td_width_to_size_filter_ratio": 0.9 173 | }, 174 | { 175 | "td_allow_use_two_tracks": true, 176 | "td_curve_segcount": 0, 177 | "td_height_ratio": 1.0, 178 | "td_length_ratio": 0.5, 179 | "td_maxheight": 2.0, 180 | "td_maxlen": 1.0, 181 | "td_on_pad_in_zone": false, 182 | "td_target_name": "td_track_end", 183 | "td_width_to_size_filter_ratio": 0.9 184 | } 185 | ], 186 | "track_widths": [ 187 | 0.0 188 | ], 189 | "tuning_pattern_settings": { 190 | "diff_pair_defaults": { 191 | "corner_radius_percentage": 80, 192 | "corner_style": 1, 193 | "max_amplitude": 1.0, 194 | "min_amplitude": 0.2, 195 | "single_sided": false, 196 | "spacing": 1.0 197 | }, 198 | "diff_pair_skew_defaults": { 199 | "corner_radius_percentage": 80, 200 | "corner_style": 1, 201 | "max_amplitude": 1.0, 202 | "min_amplitude": 0.2, 203 | "single_sided": false, 204 | "spacing": 0.6 205 | }, 206 | "single_track_defaults": { 207 | "corner_radius_percentage": 80, 208 | "corner_style": 1, 209 | "max_amplitude": 1.0, 210 | "min_amplitude": 0.2, 211 | "single_sided": false, 212 | "spacing": 0.6 213 | } 214 | }, 215 | "via_dimensions": [ 216 | { 217 | "diameter": 0.0, 218 | "drill": 0.0 219 | } 220 | ], 221 | "zones_allow_external_fillets": false, 222 | "zones_use_no_outline": true 223 | }, 224 | "ipc2581": { 225 | "dist": "", 226 | "distpn": "", 227 | "internal_id": "", 228 | "mfg": "", 229 | "mpn": "" 230 | }, 231 | "layer_presets": [], 232 | "viewports": [] 233 | }, 234 | "boards": [], 235 | "cvpcb": { 236 | "equivalence_files": [] 237 | }, 238 | "libraries": { 239 | "pinned_footprint_libs": [], 240 | "pinned_symbol_libs": [] 241 | }, 242 | "meta": { 243 | "filename": "btrfld_pcb.kicad_pro", 244 | "version": 1 245 | }, 246 | "net_settings": { 247 | "classes": [ 248 | { 249 | "bus_width": 12, 250 | "clearance": 0.1524, 251 | "diff_pair_gap": 0.25, 252 | "diff_pair_via_gap": 0.25, 253 | "diff_pair_width": 0.2, 254 | "line_style": 0, 255 | "microvia_diameter": 0.3, 256 | "microvia_drill": 0.1, 257 | "name": "Default", 258 | "pcb_color": "rgba(0, 0, 0, 0.000)", 259 | "schematic_color": "rgba(0, 0, 0, 0.000)", 260 | "track_width": 0.1524, 261 | "via_diameter": 0.8, 262 | "via_drill": 0.4, 263 | "wire_width": 6 264 | } 265 | ], 266 | "meta": { 267 | "version": 3 268 | }, 269 | "net_colors": null, 270 | "netclass_assignments": null, 271 | "netclass_patterns": [] 272 | }, 273 | "pcbnew": { 274 | "last_paths": { 275 | "gencad": "", 276 | "idf": "", 277 | "netlist": "", 278 | "plot": "", 279 | "pos_files": "", 280 | "specctra_dsn": "", 281 | "step": "btrfld_pcb.step", 282 | "svg": "", 283 | "vrml": "" 284 | }, 285 | "page_layout_descr_file": "" 286 | }, 287 | "schematic": { 288 | "legacy_lib_dir": "", 289 | "legacy_lib_list": [] 290 | }, 291 | "sheets": [], 292 | "text_variables": {} 293 | } 294 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb.kicad_sch: -------------------------------------------------------------------------------- 1 | (kicad_sch (version 20211123) (generator eeschema) 2 | (paper "A4") 3 | (lib_symbols) 4 | (symbol_instances) 5 | ) 6 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb_center-bkp-2023-1-26-15.26.25.kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20211014) (generator pcbnew) 2 | 3 | (general 4 | (thickness 1.6) 5 | ) 6 | 7 | (paper "A4") 8 | (layers 9 | (0 "F.Cu" signal) 10 | (31 "B.Cu" signal) 11 | (32 "B.Adhes" user "B.Adhesive") 12 | (33 "F.Adhes" user "F.Adhesive") 13 | (34 "B.Paste" user) 14 | (35 "F.Paste" user) 15 | (36 "B.SilkS" user "B.Silkscreen") 16 | (37 "F.SilkS" user "F.Silkscreen") 17 | (38 "B.Mask" user) 18 | (39 "F.Mask" user) 19 | (40 "Dwgs.User" user "User.Drawings") 20 | (41 "Cmts.User" user "User.Comments") 21 | (42 "Eco1.User" user "User.Eco1") 22 | (43 "Eco2.User" user "User.Eco2") 23 | (44 "Edge.Cuts" user) 24 | (45 "Margin" user) 25 | (46 "B.CrtYd" user "B.Courtyard") 26 | (47 "F.CrtYd" user "F.Courtyard") 27 | (48 "B.Fab" user) 28 | (49 "F.Fab" user) 29 | (50 "User.1" user) 30 | (51 "User.2" user) 31 | (52 "User.3" user) 32 | (53 "User.4" user) 33 | (54 "User.5" user) 34 | (55 "User.6" user) 35 | (56 "User.7" user) 36 | (57 "User.8" user) 37 | (58 "User.9" user) 38 | ) 39 | 40 | (setup 41 | (stackup 42 | (layer "F.SilkS" (type "Top Silk Screen")) 43 | (layer "F.Paste" (type "Top Solder Paste")) 44 | (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01)) 45 | (layer "F.Cu" (type "copper") (thickness 0.035)) 46 | (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) 47 | (layer "B.Cu" (type "copper") (thickness 0.035)) 48 | (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01)) 49 | (layer "B.Paste" (type "Bottom Solder Paste")) 50 | (layer "B.SilkS" (type "Bottom Silk Screen")) 51 | (copper_finish "None") 52 | (dielectric_constraints no) 53 | ) 54 | (pad_to_mask_clearance 0) 55 | (pcbplotparams 56 | (layerselection 0x00010fc_ffffffff) 57 | (disableapertmacros false) 58 | (usegerberextensions false) 59 | (usegerberattributes true) 60 | (usegerberadvancedattributes true) 61 | (creategerberjobfile true) 62 | (svguseinch false) 63 | (svgprecision 6) 64 | (excludeedgelayer true) 65 | (plotframeref false) 66 | (viasonmask false) 67 | (mode 1) 68 | (useauxorigin false) 69 | (hpglpennumber 1) 70 | (hpglpenspeed 20) 71 | (hpglpendiameter 15.000000) 72 | (dxfpolygonmode true) 73 | (dxfimperialunits true) 74 | (dxfusepcbnewfont true) 75 | (psnegative false) 76 | (psa4output false) 77 | (plotreference true) 78 | (plotvalue true) 79 | (plotinvisibletext false) 80 | (sketchpadsonfab false) 81 | (subtractmaskfromsilk false) 82 | (outputformat 1) 83 | (mirror false) 84 | (drillshape 1) 85 | (scaleselection 1) 86 | (outputdirectory "") 87 | ) 88 | ) 89 | 90 | (net 0 "") 91 | 92 | ) 93 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb_center.kicad_prl: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "active_layer": 31, 4 | "active_layer_preset": "All Layers", 5 | "auto_track_width": true, 6 | "hidden_netclasses": [], 7 | "hidden_nets": [], 8 | "high_contrast_mode": 0, 9 | "net_color_mode": 1, 10 | "opacity": { 11 | "images": 0.6, 12 | "pads": 1.0, 13 | "tracks": 1.0, 14 | "vias": 1.0, 15 | "zones": 0.6 16 | }, 17 | "ratsnest_display_mode": 0, 18 | "selection_filter": { 19 | "dimensions": true, 20 | "footprints": true, 21 | "graphics": true, 22 | "keepouts": true, 23 | "lockedItems": true, 24 | "otherItems": true, 25 | "pads": true, 26 | "text": true, 27 | "tracks": true, 28 | "vias": true, 29 | "zones": true 30 | }, 31 | "visible_items": [ 32 | 0, 33 | 1, 34 | 2, 35 | 3, 36 | 4, 37 | 5, 38 | 8, 39 | 9, 40 | 10, 41 | 11, 42 | 12, 43 | 13, 44 | 14, 45 | 15, 46 | 16, 47 | 17, 48 | 18, 49 | 19, 50 | 20, 51 | 21, 52 | 22, 53 | 23, 54 | 24, 55 | 25, 56 | 26, 57 | 27, 58 | 28, 59 | 29, 60 | 30, 61 | 32, 62 | 33, 63 | 34, 64 | 35, 65 | 36 66 | ], 67 | "visible_layers": "fffffff_ffffffff", 68 | "zone_display_mode": 0 69 | }, 70 | "git": { 71 | "repo_password": "", 72 | "repo_type": "", 73 | "repo_username": "", 74 | "ssh_key": "" 75 | }, 76 | "meta": { 77 | "filename": "btrfld_pcb_center.kicad_prl", 78 | "version": 3 79 | }, 80 | "project": { 81 | "files": [] 82 | } 83 | } 84 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb_center.kicad_pro: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "3dviewports": [], 4 | "design_settings": { 5 | "defaults": { 6 | "apply_defaults_to_fp_fields": false, 7 | "apply_defaults_to_fp_shapes": false, 8 | "apply_defaults_to_fp_text": false, 9 | "board_outline_line_width": 0.05, 10 | "copper_line_width": 0.2, 11 | "copper_text_italic": false, 12 | "copper_text_size_h": 1.5, 13 | "copper_text_size_v": 1.5, 14 | "copper_text_thickness": 0.3, 15 | "copper_text_upright": false, 16 | "courtyard_line_width": 0.05, 17 | "dimension_precision": 4, 18 | "dimension_units": 3, 19 | "dimensions": { 20 | "arrow_length": 1270000, 21 | "extension_offset": 500000, 22 | "keep_text_aligned": true, 23 | "suppress_zeroes": false, 24 | "text_position": 0, 25 | "units_format": 1 26 | }, 27 | "fab_line_width": 0.1, 28 | "fab_text_italic": false, 29 | "fab_text_size_h": 1.0, 30 | "fab_text_size_v": 1.0, 31 | "fab_text_thickness": 0.15, 32 | "fab_text_upright": false, 33 | "other_line_width": 0.1, 34 | "other_text_italic": false, 35 | "other_text_size_h": 1.0, 36 | "other_text_size_v": 1.0, 37 | "other_text_thickness": 0.15, 38 | "other_text_upright": false, 39 | "pads": { 40 | "drill": 0.762, 41 | "height": 1.524, 42 | "width": 1.524 43 | }, 44 | "silk_line_width": 0.12, 45 | "silk_text_italic": false, 46 | "silk_text_size_h": 1.0, 47 | "silk_text_size_v": 1.0, 48 | "silk_text_thickness": 0.15, 49 | "silk_text_upright": false, 50 | "zones": { 51 | "45_degree_only": false, 52 | "min_clearance": 0.508 53 | } 54 | }, 55 | "diff_pair_dimensions": [], 56 | "drc_exclusions": [], 57 | "meta": { 58 | "version": 2 59 | }, 60 | "rule_severities": { 61 | "annular_width": "error", 62 | "clearance": "error", 63 | "connection_width": "warning", 64 | "copper_edge_clearance": "error", 65 | "copper_sliver": "warning", 66 | "courtyards_overlap": "error", 67 | "diff_pair_gap_out_of_range": "error", 68 | "diff_pair_uncoupled_length_too_long": "error", 69 | "drill_out_of_range": "error", 70 | "duplicate_footprints": "warning", 71 | "extra_footprint": "warning", 72 | "footprint": "error", 73 | "footprint_symbol_mismatch": "warning", 74 | "footprint_type_mismatch": "error", 75 | "hole_clearance": "error", 76 | "hole_near_hole": "error", 77 | "holes_co_located": "warning", 78 | "invalid_outline": "error", 79 | "isolated_copper": "warning", 80 | "item_on_disabled_layer": "error", 81 | "items_not_allowed": "error", 82 | "length_out_of_range": "error", 83 | "lib_footprint_issues": "warning", 84 | "lib_footprint_mismatch": "warning", 85 | "malformed_courtyard": "error", 86 | "microvia_drill_out_of_range": "error", 87 | "missing_courtyard": "ignore", 88 | "missing_footprint": "warning", 89 | "net_conflict": "warning", 90 | "npth_inside_courtyard": "ignore", 91 | "padstack": "error", 92 | "pth_inside_courtyard": "ignore", 93 | "shorting_items": "error", 94 | "silk_edge_clearance": "warning", 95 | "silk_over_copper": "warning", 96 | "silk_overlap": "warning", 97 | "skew_out_of_range": "error", 98 | "solder_mask_bridge": "error", 99 | "starved_thermal": "error", 100 | "text_height": "warning", 101 | "text_thickness": "warning", 102 | "through_hole_pad_without_hole": "error", 103 | "too_many_vias": "error", 104 | "track_dangling": "warning", 105 | "track_width": "error", 106 | "tracks_crossing": "error", 107 | "unconnected_items": "error", 108 | "unresolved_variable": "error", 109 | "via_dangling": "warning", 110 | "zone_has_empty_net": "error", 111 | "zones_intersect": "error" 112 | }, 113 | "rules": { 114 | "allow_blind_buried_vias": false, 115 | "allow_microvias": false, 116 | "max_error": 0.005, 117 | "min_clearance": 0.0, 118 | "min_connection": 0.0, 119 | "min_copper_edge_clearance": 0.01, 120 | "min_hole_clearance": 0.25, 121 | "min_hole_to_hole": 0.25, 122 | "min_microvia_diameter": 0.2, 123 | "min_microvia_drill": 0.1, 124 | "min_resolved_spokes": 2, 125 | "min_silk_clearance": 0.0, 126 | "min_text_height": 0.8, 127 | "min_text_thickness": 0.08, 128 | "min_through_hole_diameter": 0.3, 129 | "min_track_width": 0.2, 130 | "min_via_annular_width": 0.05, 131 | "min_via_diameter": 0.4, 132 | "solder_mask_to_copper_clearance": 0.0, 133 | "use_height_for_length_calcs": true 134 | }, 135 | "teardrop_options": [ 136 | { 137 | "td_onpadsmd": true, 138 | "td_onroundshapesonly": false, 139 | "td_ontrackend": false, 140 | "td_onviapad": true 141 | } 142 | ], 143 | "teardrop_parameters": [ 144 | { 145 | "td_allow_use_two_tracks": true, 146 | "td_curve_segcount": 0, 147 | "td_height_ratio": 1.0, 148 | "td_length_ratio": 0.5, 149 | "td_maxheight": 2.0, 150 | "td_maxlen": 1.0, 151 | "td_on_pad_in_zone": false, 152 | "td_target_name": "td_round_shape", 153 | "td_width_to_size_filter_ratio": 0.9 154 | }, 155 | { 156 | "td_allow_use_two_tracks": true, 157 | "td_curve_segcount": 0, 158 | "td_height_ratio": 1.0, 159 | "td_length_ratio": 0.5, 160 | "td_maxheight": 2.0, 161 | "td_maxlen": 1.0, 162 | "td_on_pad_in_zone": false, 163 | "td_target_name": "td_rect_shape", 164 | "td_width_to_size_filter_ratio": 0.9 165 | }, 166 | { 167 | "td_allow_use_two_tracks": true, 168 | "td_curve_segcount": 0, 169 | "td_height_ratio": 1.0, 170 | "td_length_ratio": 0.5, 171 | "td_maxheight": 2.0, 172 | "td_maxlen": 1.0, 173 | "td_on_pad_in_zone": false, 174 | "td_target_name": "td_track_end", 175 | "td_width_to_size_filter_ratio": 0.9 176 | } 177 | ], 178 | "track_widths": [], 179 | "tuning_pattern_settings": { 180 | "diff_pair_defaults": { 181 | "corner_radius_percentage": 80, 182 | "corner_style": 1, 183 | "max_amplitude": 1.0, 184 | "min_amplitude": 0.2, 185 | "single_sided": false, 186 | "spacing": 1.0 187 | }, 188 | "diff_pair_skew_defaults": { 189 | "corner_radius_percentage": 80, 190 | "corner_style": 1, 191 | "max_amplitude": 1.0, 192 | "min_amplitude": 0.2, 193 | "single_sided": false, 194 | "spacing": 0.6 195 | }, 196 | "single_track_defaults": { 197 | "corner_radius_percentage": 80, 198 | "corner_style": 1, 199 | "max_amplitude": 1.0, 200 | "min_amplitude": 0.2, 201 | "single_sided": false, 202 | "spacing": 0.6 203 | } 204 | }, 205 | "via_dimensions": [], 206 | "zones_allow_external_fillets": false, 207 | "zones_use_no_outline": true 208 | }, 209 | "ipc2581": { 210 | "dist": "", 211 | "distpn": "", 212 | "internal_id": "", 213 | "mfg": "", 214 | "mpn": "" 215 | }, 216 | "layer_presets": [], 217 | "viewports": [] 218 | }, 219 | "boards": [], 220 | "cvpcb": { 221 | "equivalence_files": [] 222 | }, 223 | "libraries": { 224 | "pinned_footprint_libs": [], 225 | "pinned_symbol_libs": [] 226 | }, 227 | "meta": { 228 | "filename": "btrfld_pcb_center.kicad_pro", 229 | "version": 1 230 | }, 231 | "net_settings": { 232 | "classes": [ 233 | { 234 | "bus_width": 12, 235 | "clearance": 0.2, 236 | "diff_pair_gap": 0.25, 237 | "diff_pair_via_gap": 0.25, 238 | "diff_pair_width": 0.2, 239 | "line_style": 0, 240 | "microvia_diameter": 0.3, 241 | "microvia_drill": 0.1, 242 | "name": "Default", 243 | "pcb_color": "rgba(0, 0, 0, 0.000)", 244 | "schematic_color": "rgba(0, 0, 0, 0.000)", 245 | "track_width": 0.25, 246 | "via_diameter": 0.8, 247 | "via_drill": 0.4, 248 | "wire_width": 6 249 | } 250 | ], 251 | "meta": { 252 | "version": 3 253 | }, 254 | "net_colors": null, 255 | "netclass_assignments": null, 256 | "netclass_patterns": [] 257 | }, 258 | "pcbnew": { 259 | "last_paths": { 260 | "gencad": "", 261 | "idf": "", 262 | "netlist": "", 263 | "plot": "", 264 | "pos_files": "", 265 | "specctra_dsn": "", 266 | "step": "", 267 | "svg": "", 268 | "vrml": "" 269 | }, 270 | "page_layout_descr_file": "" 271 | }, 272 | "schematic": { 273 | "legacy_lib_dir": "", 274 | "legacy_lib_list": [] 275 | }, 276 | "sheets": [], 277 | "text_variables": {} 278 | } 279 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb_thumb-bkp-2023-1-27-10.50.40.kicad_pcb-bak: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 20211014) (generator pcbnew) 2 | 3 | (general 4 | (thickness 1.6) 5 | ) 6 | 7 | (paper "A4") 8 | (layers 9 | (0 "F.Cu" signal) 10 | (31 "B.Cu" signal) 11 | (32 "B.Adhes" user "B.Adhesive") 12 | (33 "F.Adhes" user "F.Adhesive") 13 | (34 "B.Paste" user) 14 | (35 "F.Paste" user) 15 | (36 "B.SilkS" user "B.Silkscreen") 16 | (37 "F.SilkS" user "F.Silkscreen") 17 | (38 "B.Mask" user) 18 | (39 "F.Mask" user) 19 | (40 "Dwgs.User" user "User.Drawings") 20 | (41 "Cmts.User" user "User.Comments") 21 | (42 "Eco1.User" user "User.Eco1") 22 | (43 "Eco2.User" user "User.Eco2") 23 | (44 "Edge.Cuts" user) 24 | (45 "Margin" user) 25 | (46 "B.CrtYd" user "B.Courtyard") 26 | (47 "F.CrtYd" user "F.Courtyard") 27 | (48 "B.Fab" user) 28 | (49 "F.Fab" user) 29 | (50 "User.1" user) 30 | (51 "User.2" user) 31 | (52 "User.3" user) 32 | (53 "User.4" user) 33 | (54 "User.5" user) 34 | (55 "User.6" user) 35 | (56 "User.7" user) 36 | (57 "User.8" user) 37 | (58 "User.9" user) 38 | ) 39 | 40 | (setup 41 | (stackup 42 | (layer "F.SilkS" (type "Top Silk Screen")) 43 | (layer "F.Paste" (type "Top Solder Paste")) 44 | (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01)) 45 | (layer "F.Cu" (type "copper") (thickness 0.035)) 46 | (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) 47 | (layer "B.Cu" (type "copper") (thickness 0.035)) 48 | (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01)) 49 | (layer "B.Paste" (type "Bottom Solder Paste")) 50 | (layer "B.SilkS" (type "Bottom Silk Screen")) 51 | (copper_finish "None") 52 | (dielectric_constraints no) 53 | ) 54 | (pad_to_mask_clearance 0) 55 | (pcbplotparams 56 | (layerselection 0x00010fc_ffffffff) 57 | (disableapertmacros false) 58 | (usegerberextensions false) 59 | (usegerberattributes true) 60 | (usegerberadvancedattributes true) 61 | (creategerberjobfile true) 62 | (svguseinch false) 63 | (svgprecision 6) 64 | (excludeedgelayer true) 65 | (plotframeref false) 66 | (viasonmask false) 67 | (mode 1) 68 | (useauxorigin false) 69 | (hpglpennumber 1) 70 | (hpglpenspeed 20) 71 | (hpglpendiameter 15.000000) 72 | (dxfpolygonmode true) 73 | (dxfimperialunits true) 74 | (dxfusepcbnewfont true) 75 | (psnegative false) 76 | (psa4output false) 77 | (plotreference true) 78 | (plotvalue true) 79 | (plotinvisibletext false) 80 | (sketchpadsonfab false) 81 | (subtractmaskfromsilk false) 82 | (outputformat 1) 83 | (mirror false) 84 | (drillshape 1) 85 | (scaleselection 1) 86 | (outputdirectory "") 87 | ) 88 | ) 89 | 90 | (net 0 "") 91 | 92 | ) 93 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb_thumb.kicad_prl: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "active_layer": 31, 4 | "active_layer_preset": "", 5 | "auto_track_width": true, 6 | "hidden_netclasses": [], 7 | "hidden_nets": [], 8 | "high_contrast_mode": 0, 9 | "net_color_mode": 1, 10 | "opacity": { 11 | "images": 0.6, 12 | "pads": 1.0, 13 | "tracks": 1.0, 14 | "vias": 1.0, 15 | "zones": 0.6 16 | }, 17 | "ratsnest_display_mode": 0, 18 | "selection_filter": { 19 | "dimensions": true, 20 | "footprints": true, 21 | "graphics": true, 22 | "keepouts": true, 23 | "lockedItems": true, 24 | "otherItems": true, 25 | "pads": true, 26 | "text": true, 27 | "tracks": true, 28 | "vias": true, 29 | "zones": true 30 | }, 31 | "visible_items": [ 32 | 0, 33 | 1, 34 | 2, 35 | 3, 36 | 4, 37 | 5, 38 | 8, 39 | 9, 40 | 10, 41 | 11, 42 | 12, 43 | 13, 44 | 14, 45 | 15, 46 | 16, 47 | 17, 48 | 18, 49 | 19, 50 | 20, 51 | 21, 52 | 22, 53 | 23, 54 | 24, 55 | 25, 56 | 26, 57 | 27, 58 | 28, 59 | 29, 60 | 30, 61 | 32, 62 | 33, 63 | 34, 64 | 35, 65 | 36 66 | ], 67 | "visible_layers": "0001000_ffffffff", 68 | "zone_display_mode": 0 69 | }, 70 | "git": { 71 | "repo_password": "", 72 | "repo_type": "", 73 | "repo_username": "", 74 | "ssh_key": "" 75 | }, 76 | "meta": { 77 | "filename": "btrfld_pcb_thumb.kicad_prl", 78 | "version": 3 79 | }, 80 | "project": { 81 | "files": [] 82 | } 83 | } 84 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/btrfld_pcb_thumb.kicad_pro: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "3dviewports": [], 4 | "design_settings": { 5 | "defaults": { 6 | "apply_defaults_to_fp_fields": false, 7 | "apply_defaults_to_fp_shapes": false, 8 | "apply_defaults_to_fp_text": false, 9 | "board_outline_line_width": 0.05, 10 | "copper_line_width": 0.2, 11 | "copper_text_italic": false, 12 | "copper_text_size_h": 1.5, 13 | "copper_text_size_v": 1.5, 14 | "copper_text_thickness": 0.3, 15 | "copper_text_upright": false, 16 | "courtyard_line_width": 0.05, 17 | "dimension_precision": 4, 18 | "dimension_units": 3, 19 | "dimensions": { 20 | "arrow_length": 1270000, 21 | "extension_offset": 500000, 22 | "keep_text_aligned": true, 23 | "suppress_zeroes": false, 24 | "text_position": 0, 25 | "units_format": 1 26 | }, 27 | "fab_line_width": 0.1, 28 | "fab_text_italic": false, 29 | "fab_text_size_h": 1.0, 30 | "fab_text_size_v": 1.0, 31 | "fab_text_thickness": 0.15, 32 | "fab_text_upright": false, 33 | "other_line_width": 0.1, 34 | "other_text_italic": false, 35 | "other_text_size_h": 1.0, 36 | "other_text_size_v": 1.0, 37 | "other_text_thickness": 0.15, 38 | "other_text_upright": false, 39 | "pads": { 40 | "drill": 1.9, 41 | "height": 1.9, 42 | "width": 1.9 43 | }, 44 | "silk_line_width": 0.12, 45 | "silk_text_italic": false, 46 | "silk_text_size_h": 1.0, 47 | "silk_text_size_v": 1.0, 48 | "silk_text_thickness": 0.15, 49 | "silk_text_upright": false, 50 | "zones": { 51 | "45_degree_only": false, 52 | "min_clearance": 0.508 53 | } 54 | }, 55 | "diff_pair_dimensions": [], 56 | "drc_exclusions": [], 57 | "meta": { 58 | "version": 2 59 | }, 60 | "rule_severities": { 61 | "annular_width": "error", 62 | "clearance": "error", 63 | "connection_width": "warning", 64 | "copper_edge_clearance": "error", 65 | "copper_sliver": "warning", 66 | "courtyards_overlap": "error", 67 | "diff_pair_gap_out_of_range": "error", 68 | "diff_pair_uncoupled_length_too_long": "error", 69 | "drill_out_of_range": "error", 70 | "duplicate_footprints": "warning", 71 | "extra_footprint": "warning", 72 | "footprint": "error", 73 | "footprint_symbol_mismatch": "warning", 74 | "footprint_type_mismatch": "error", 75 | "hole_clearance": "error", 76 | "hole_near_hole": "error", 77 | "holes_co_located": "warning", 78 | "invalid_outline": "error", 79 | "isolated_copper": "warning", 80 | "item_on_disabled_layer": "error", 81 | "items_not_allowed": "error", 82 | "length_out_of_range": "error", 83 | "lib_footprint_issues": "warning", 84 | "lib_footprint_mismatch": "warning", 85 | "malformed_courtyard": "error", 86 | "microvia_drill_out_of_range": "error", 87 | "missing_courtyard": "ignore", 88 | "missing_footprint": "warning", 89 | "net_conflict": "warning", 90 | "npth_inside_courtyard": "ignore", 91 | "padstack": "error", 92 | "pth_inside_courtyard": "ignore", 93 | "shorting_items": "error", 94 | "silk_edge_clearance": "warning", 95 | "silk_over_copper": "warning", 96 | "silk_overlap": "warning", 97 | "skew_out_of_range": "error", 98 | "solder_mask_bridge": "error", 99 | "starved_thermal": "error", 100 | "text_height": "warning", 101 | "text_thickness": "warning", 102 | "through_hole_pad_without_hole": "error", 103 | "too_many_vias": "error", 104 | "track_dangling": "warning", 105 | "track_width": "error", 106 | "tracks_crossing": "error", 107 | "unconnected_items": "error", 108 | "unresolved_variable": "error", 109 | "via_dangling": "warning", 110 | "zone_has_empty_net": "error", 111 | "zones_intersect": "error" 112 | }, 113 | "rules": { 114 | "allow_blind_buried_vias": false, 115 | "allow_microvias": false, 116 | "max_error": 0.005, 117 | "min_clearance": 0.0, 118 | "min_connection": 0.0, 119 | "min_copper_edge_clearance": 0.01, 120 | "min_hole_clearance": 0.25, 121 | "min_hole_to_hole": 0.25, 122 | "min_microvia_diameter": 0.2, 123 | "min_microvia_drill": 0.1, 124 | "min_resolved_spokes": 2, 125 | "min_silk_clearance": 0.0, 126 | "min_text_height": 0.8, 127 | "min_text_thickness": 0.08, 128 | "min_through_hole_diameter": 0.3, 129 | "min_track_width": 0.2, 130 | "min_via_annular_width": 0.05, 131 | "min_via_diameter": 0.4, 132 | "solder_mask_to_copper_clearance": 0.0, 133 | "use_height_for_length_calcs": true 134 | }, 135 | "teardrop_options": [ 136 | { 137 | "td_onpadsmd": true, 138 | "td_onroundshapesonly": false, 139 | "td_ontrackend": false, 140 | "td_onviapad": true 141 | } 142 | ], 143 | "teardrop_parameters": [ 144 | { 145 | "td_allow_use_two_tracks": true, 146 | "td_curve_segcount": 0, 147 | "td_height_ratio": 1.0, 148 | "td_length_ratio": 0.5, 149 | "td_maxheight": 2.0, 150 | "td_maxlen": 1.0, 151 | "td_on_pad_in_zone": false, 152 | "td_target_name": "td_round_shape", 153 | "td_width_to_size_filter_ratio": 0.9 154 | }, 155 | { 156 | "td_allow_use_two_tracks": true, 157 | "td_curve_segcount": 0, 158 | "td_height_ratio": 1.0, 159 | "td_length_ratio": 0.5, 160 | "td_maxheight": 2.0, 161 | "td_maxlen": 1.0, 162 | "td_on_pad_in_zone": false, 163 | "td_target_name": "td_rect_shape", 164 | "td_width_to_size_filter_ratio": 0.9 165 | }, 166 | { 167 | "td_allow_use_two_tracks": true, 168 | "td_curve_segcount": 0, 169 | "td_height_ratio": 1.0, 170 | "td_length_ratio": 0.5, 171 | "td_maxheight": 2.0, 172 | "td_maxlen": 1.0, 173 | "td_on_pad_in_zone": false, 174 | "td_target_name": "td_track_end", 175 | "td_width_to_size_filter_ratio": 0.9 176 | } 177 | ], 178 | "track_widths": [], 179 | "tuning_pattern_settings": { 180 | "diff_pair_defaults": { 181 | "corner_radius_percentage": 80, 182 | "corner_style": 1, 183 | "max_amplitude": 1.0, 184 | "min_amplitude": 0.2, 185 | "single_sided": false, 186 | "spacing": 1.0 187 | }, 188 | "diff_pair_skew_defaults": { 189 | "corner_radius_percentage": 80, 190 | "corner_style": 1, 191 | "max_amplitude": 1.0, 192 | "min_amplitude": 0.2, 193 | "single_sided": false, 194 | "spacing": 0.6 195 | }, 196 | "single_track_defaults": { 197 | "corner_radius_percentage": 80, 198 | "corner_style": 1, 199 | "max_amplitude": 1.0, 200 | "min_amplitude": 0.2, 201 | "single_sided": false, 202 | "spacing": 0.6 203 | } 204 | }, 205 | "via_dimensions": [], 206 | "zones_allow_external_fillets": false, 207 | "zones_use_no_outline": true 208 | }, 209 | "ipc2581": { 210 | "dist": "", 211 | "distpn": "", 212 | "internal_id": "", 213 | "mfg": "", 214 | "mpn": "" 215 | }, 216 | "layer_presets": [], 217 | "viewports": [] 218 | }, 219 | "boards": [], 220 | "cvpcb": { 221 | "equivalence_files": [] 222 | }, 223 | "libraries": { 224 | "pinned_footprint_libs": [], 225 | "pinned_symbol_libs": [] 226 | }, 227 | "meta": { 228 | "filename": "btrfld_pcb_thumb.kicad_pro", 229 | "version": 1 230 | }, 231 | "net_settings": { 232 | "classes": [ 233 | { 234 | "bus_width": 12, 235 | "clearance": 0.2, 236 | "diff_pair_gap": 0.25, 237 | "diff_pair_via_gap": 0.25, 238 | "diff_pair_width": 0.2, 239 | "line_style": 0, 240 | "microvia_diameter": 0.3, 241 | "microvia_drill": 0.1, 242 | "name": "Default", 243 | "pcb_color": "rgba(0, 0, 0, 0.000)", 244 | "schematic_color": "rgba(0, 0, 0, 0.000)", 245 | "track_width": 0.25, 246 | "via_diameter": 0.8, 247 | "via_drill": 0.4, 248 | "wire_width": 6 249 | } 250 | ], 251 | "meta": { 252 | "version": 3 253 | }, 254 | "net_colors": null, 255 | "netclass_assignments": null, 256 | "netclass_patterns": [] 257 | }, 258 | "pcbnew": { 259 | "last_paths": { 260 | "gencad": "", 261 | "idf": "", 262 | "netlist": "", 263 | "plot": "./", 264 | "pos_files": "", 265 | "specctra_dsn": "", 266 | "step": "btrfld_pcb_thumb.step", 267 | "svg": "", 268 | "vrml": "" 269 | }, 270 | "page_layout_descr_file": "" 271 | }, 272 | "schematic": { 273 | "legacy_lib_dir": "", 274 | "legacy_lib_list": [] 275 | }, 276 | "sheets": [], 277 | "text_variables": {} 278 | } 279 | -------------------------------------------------------------------------------- /btrfld_pcb_ulp/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (version 7) 3 | (lib (name "SW_KEYBOARD")(type "KiCad")(uri "${KIPRJMOD}/SW_KEYBOARD.pretty")(options "")(descr "")) 4 | (lib (name "Cherry_ULP")(type "KiCad")(uri "${KIPRJMOD}/Cherry_ULP.pretty")(options "")(descr "")) 5 | (lib (name "prawn")(type "KiCad")(uri "${KIPRJMOD}/prawn_logo.pretty")(options "")(descr "")) 6 | ) 7 | -------------------------------------------------------------------------------- /demos/final_draft.gif: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/demos/final_draft.gif -------------------------------------------------------------------------------- /demos/first_draft_demo_no_supports.gif: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/demos/first_draft_demo_no_supports.gif -------------------------------------------------------------------------------- /demos/pcb_folding.gif: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/demos/pcb_folding.gif -------------------------------------------------------------------------------- /ulp_keycap_homenub/ulp_keycap_homenub-Body.stl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/ulp_keycap_homenub/ulp_keycap_homenub-Body.stl -------------------------------------------------------------------------------- /ulp_keycap_homenub/ulp_keycap_homenub.FCStd: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/ulp_keycap_homenub/ulp_keycap_homenub.FCStd -------------------------------------------------------------------------------- /ulp_keycap_homenub/ulp_keycap_homenub.FCStd1: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SolidHal/btrfld/fe794c1529cd2573def9f48679f187b06069f5c6/ulp_keycap_homenub/ulp_keycap_homenub.FCStd1 --------------------------------------------------------------------------------