├── LICENSE ├── PDDKB_202105_Src1.02 └── MYPDDKB │ ├── .mxproject │ ├── .vscode │ └── settings.json │ ├── Core │ ├── Inc │ │ ├── i2c.h │ │ ├── led.h │ │ ├── main.h │ │ ├── stm32f1xx_hal_conf.h │ │ ├── stm32f1xx_it.h │ │ └── uart.h │ └── Src │ │ ├── i2c.c │ │ ├── led.c │ │ ├── main.c │ │ ├── stm32f1xx_hal_msp.c │ │ ├── stm32f1xx_it.c │ │ ├── system_stm32f1xx.c │ │ └── uart.c │ ├── Drivers │ ├── CMSIS │ │ ├── Core │ │ │ ├── Include │ │ │ │ ├── cmsis_armcc.h │ │ │ │ ├── cmsis_armclang.h │ │ │ │ ├── cmsis_compiler.h │ │ │ │ ├── cmsis_gcc.h │ │ │ │ ├── cmsis_iccarm.h │ │ │ │ ├── cmsis_version.h │ │ │ │ ├── core_armv8mbl.h │ │ │ │ ├── core_armv8mml.h │ │ │ │ ├── core_cm0.h │ │ │ │ ├── core_cm0plus.h │ │ │ │ ├── core_cm1.h │ │ │ │ ├── core_cm23.h │ │ │ │ ├── core_cm3.h │ │ │ │ ├── core_cm33.h │ │ │ │ ├── core_cm4.h │ │ │ │ ├── core_cm7.h │ │ │ │ ├── core_sc000.h │ │ │ │ ├── core_sc300.h │ │ │ │ ├── mpu_armv7.h │ │ │ │ ├── mpu_armv8.h │ │ │ │ └── tz_context.h │ │ │ └── Template │ │ │ │ └── ARMv8-M │ │ │ │ ├── main_s.c │ │ │ │ └── tz_context.c │ │ ├── Core_A │ │ │ ├── Include │ │ │ │ ├── cmsis_armcc.h │ │ │ │ ├── cmsis_armclang.h │ │ │ │ ├── cmsis_compiler.h │ │ │ │ ├── cmsis_cp15.h │ │ │ │ ├── cmsis_gcc.h │ │ │ │ ├── cmsis_iccarm.h │ │ │ │ ├── core_ca.h │ │ │ │ └── irq_ctrl.h │ │ │ └── Source │ │ │ │ └── irq_ctrl_gic.c │ │ ├── Device │ │ │ └── ST │ │ │ │ └── STM32F1xx │ │ │ │ ├── Include │ │ │ │ ├── stm32f100xb.h │ │ │ │ ├── stm32f100xe.h │ │ │ │ ├── stm32f101x6.h │ │ │ │ ├── stm32f101xb.h │ │ │ │ ├── stm32f101xe.h │ │ │ │ ├── stm32f101xg.h │ │ │ │ ├── stm32f102x6.h │ │ │ │ ├── stm32f102xb.h │ │ │ │ ├── stm32f103x6.h │ │ │ │ ├── stm32f103xb.h │ │ │ │ ├── stm32f103xe.h │ │ │ │ ├── stm32f103xg.h │ │ │ │ ├── stm32f105xc.h │ │ │ │ ├── stm32f107xc.h │ │ │ │ ├── stm32f1xx.h │ │ │ │ └── system_stm32f1xx.h │ │ │ │ └── Source │ │ │ │ └── Templates │ │ │ │ ├── arm │ │ │ │ ├── startup_stm32f100xb.s │ │ │ │ ├── startup_stm32f100xe.s │ │ │ │ ├── startup_stm32f101x6.s │ │ │ │ ├── startup_stm32f101xb.s │ │ │ │ ├── startup_stm32f101xe.s │ │ │ │ ├── startup_stm32f101xg.s │ │ │ │ ├── startup_stm32f102x6.s │ │ │ │ ├── startup_stm32f102xb.s │ │ │ │ ├── startup_stm32f103x6.s │ │ │ │ ├── startup_stm32f103xb.s │ │ │ │ ├── startup_stm32f103xe.s │ │ │ │ ├── startup_stm32f103xg.s │ │ │ │ ├── startup_stm32f105xc.s │ │ │ │ └── startup_stm32f107xc.s │ │ │ │ ├── gcc │ │ │ │ ├── startup_stm32f100xb.s │ │ │ │ ├── startup_stm32f100xe.s │ │ │ │ ├── startup_stm32f101x6.s │ │ │ │ ├── startup_stm32f101xb.s │ │ │ │ ├── startup_stm32f101xe.s │ │ │ │ ├── startup_stm32f101xg.s │ │ │ │ ├── startup_stm32f102x6.s │ │ │ │ ├── startup_stm32f102xb.s │ │ │ │ ├── startup_stm32f103x6.s │ │ │ │ ├── startup_stm32f103xb.s │ │ │ │ ├── startup_stm32f103xe.s │ │ │ │ ├── startup_stm32f103xg.s │ │ │ │ ├── startup_stm32f105xc.s │ │ │ │ └── startup_stm32f107xc.s │ │ │ │ ├── iar │ │ │ │ ├── linker │ │ │ │ │ ├── stm32f100xb_flash.icf │ │ │ │ │ ├── stm32f100xb_sram.icf │ │ │ │ │ ├── stm32f100xe_flash.icf │ │ │ │ │ ├── stm32f100xe_sram.icf │ │ │ │ │ ├── stm32f101x6_flash.icf │ │ │ │ │ ├── stm32f101x6_sram.icf │ │ │ │ │ ├── stm32f101xb_flash.icf │ │ │ │ │ ├── stm32f101xb_sram.icf │ │ │ │ │ ├── stm32f101xe_flash.icf │ │ │ │ │ ├── stm32f101xe_sram.icf │ │ │ │ │ ├── stm32f101xg_flash.icf │ │ │ │ │ ├── stm32f101xg_sram.icf │ │ │ │ │ ├── stm32f102x6_flash.icf │ │ │ │ │ ├── stm32f102x6_sram.icf │ │ │ │ │ ├── stm32f102xb_flash.icf │ │ │ │ │ ├── stm32f102xb_sram.icf │ │ │ │ │ ├── stm32f103x6_flash.icf │ │ │ │ │ ├── stm32f103x6_sram.icf │ │ │ │ │ ├── stm32f103xb_flash.icf │ │ │ │ │ ├── stm32f103xb_sram.icf │ │ │ │ │ ├── stm32f103xe_flash.icf │ │ │ │ │ ├── stm32f103xe_sram.icf │ │ │ │ │ ├── stm32f103xg_flash.icf │ │ │ │ │ ├── stm32f103xg_sram.icf │ │ │ │ │ ├── stm32f105xc_flash.icf │ │ │ │ │ ├── stm32f105xc_sram.icf │ │ │ │ │ ├── stm32f107xc_flash.icf │ │ │ │ │ └── stm32f107xc_sram.icf │ │ │ │ ├── startup_stm32f100xb.s │ │ │ │ ├── startup_stm32f100xe.s │ │ │ │ ├── startup_stm32f101x6.s │ │ │ │ ├── startup_stm32f101xb.s │ │ │ │ ├── startup_stm32f101xe.s │ │ │ │ ├── startup_stm32f101xg.s │ │ │ │ ├── startup_stm32f102x6.s │ │ │ │ ├── startup_stm32f102xb.s │ │ │ │ ├── startup_stm32f103x6.s │ │ │ │ ├── startup_stm32f103xb.s │ │ │ │ ├── startup_stm32f103xe.s │ │ │ │ ├── startup_stm32f103xg.s │ │ │ │ ├── startup_stm32f105xc.s │ │ │ │ └── startup_stm32f107xc.s │ │ │ │ └── system_stm32f1xx.c │ │ ├── Include │ │ │ ├── cmsis_armcc.h │ │ │ ├── cmsis_armclang.h │ │ │ ├── cmsis_compiler.h │ │ │ ├── cmsis_gcc.h │ │ │ ├── cmsis_iccarm.h │ │ │ ├── cmsis_version.h │ │ │ ├── core_armv8mbl.h │ │ │ ├── core_armv8mml.h │ │ │ ├── core_cm0.h │ │ │ ├── core_cm0plus.h │ │ │ ├── core_cm1.h │ │ │ ├── core_cm23.h │ │ │ ├── core_cm3.h │ │ │ ├── core_cm33.h │ │ │ ├── core_cm4.h │ │ │ ├── core_cm7.h │ │ │ ├── core_sc000.h │ │ │ ├── core_sc300.h │ │ │ ├── mpu_armv7.h │ │ │ ├── mpu_armv8.h │ │ │ └── tz_context.h │ │ └── LICENSE.txt │ ├── PD │ │ ├── BSI2C │ │ │ ├── bsi2c.c │ │ │ └── bsi2c.h │ │ ├── FUSB302B │ │ │ ├── FUSB302B.c │ │ │ └── FUSB302B.h │ │ ├── pd_ufp.c │ │ └── pd_ufp.h │ └── STM32F1xx_HAL_Driver │ │ ├── Inc │ │ ├── Legacy │ │ │ ├── stm32_hal_legacy.h │ │ │ ├── stm32f1xx_hal_can_ex_legacy.h │ │ │ └── stm32f1xx_hal_can_legacy.h │ │ ├── stm32_assert_template.h │ │ ├── stm32f1xx_hal.h │ │ ├── stm32f1xx_hal_adc.h │ │ ├── stm32f1xx_hal_adc_ex.h │ │ ├── stm32f1xx_hal_can.h │ │ ├── stm32f1xx_hal_cec.h │ │ ├── stm32f1xx_hal_conf_template.h │ │ ├── stm32f1xx_hal_cortex.h │ │ ├── stm32f1xx_hal_crc.h │ │ ├── stm32f1xx_hal_dac.h │ │ ├── stm32f1xx_hal_dac_ex.h │ │ ├── stm32f1xx_hal_def.h │ │ ├── stm32f1xx_hal_dma.h │ │ ├── stm32f1xx_hal_dma_ex.h │ │ ├── stm32f1xx_hal_eth.h │ │ ├── stm32f1xx_hal_exti.h │ │ ├── stm32f1xx_hal_flash.h │ │ ├── stm32f1xx_hal_flash_ex.h │ │ ├── stm32f1xx_hal_gpio.h │ │ ├── stm32f1xx_hal_gpio_ex.h │ │ ├── stm32f1xx_hal_hcd.h │ │ ├── stm32f1xx_hal_i2c.h │ │ ├── stm32f1xx_hal_i2s.h │ │ ├── stm32f1xx_hal_irda.h │ │ ├── stm32f1xx_hal_iwdg.h │ │ ├── stm32f1xx_hal_mmc.h │ │ ├── stm32f1xx_hal_nand.h │ │ ├── stm32f1xx_hal_nor.h │ │ ├── stm32f1xx_hal_pccard.h │ │ ├── stm32f1xx_hal_pcd.h │ │ ├── stm32f1xx_hal_pcd_ex.h │ │ ├── stm32f1xx_hal_pwr.h │ │ ├── stm32f1xx_hal_rcc.h │ │ ├── stm32f1xx_hal_rcc_ex.h │ │ ├── stm32f1xx_hal_rtc.h │ │ ├── stm32f1xx_hal_rtc_ex.h │ │ ├── stm32f1xx_hal_sd.h │ │ ├── stm32f1xx_hal_smartcard.h │ │ ├── stm32f1xx_hal_spi.h │ │ ├── stm32f1xx_hal_sram.h │ │ ├── stm32f1xx_hal_tim.h │ │ ├── stm32f1xx_hal_tim_ex.h │ │ ├── stm32f1xx_hal_uart.h │ │ ├── stm32f1xx_hal_usart.h │ │ ├── stm32f1xx_hal_wwdg.h │ │ ├── stm32f1xx_ll_adc.h │ │ ├── stm32f1xx_ll_bus.h │ │ ├── stm32f1xx_ll_cortex.h │ │ ├── stm32f1xx_ll_crc.h │ │ ├── stm32f1xx_ll_dac.h │ │ ├── stm32f1xx_ll_dma.h │ │ ├── stm32f1xx_ll_exti.h │ │ ├── stm32f1xx_ll_fsmc.h │ │ ├── stm32f1xx_ll_gpio.h │ │ ├── stm32f1xx_ll_i2c.h │ │ ├── stm32f1xx_ll_iwdg.h │ │ ├── stm32f1xx_ll_pwr.h │ │ ├── stm32f1xx_ll_rcc.h │ │ ├── stm32f1xx_ll_rtc.h │ │ ├── stm32f1xx_ll_sdmmc.h │ │ ├── stm32f1xx_ll_spi.h │ │ ├── stm32f1xx_ll_system.h │ │ ├── stm32f1xx_ll_tim.h │ │ ├── stm32f1xx_ll_usart.h │ │ ├── stm32f1xx_ll_usb.h │ │ ├── stm32f1xx_ll_utils.h │ │ └── stm32f1xx_ll_wwdg.h │ │ └── Src │ │ ├── stm32f1xx_hal.c │ │ ├── stm32f1xx_hal_adc.c │ │ ├── stm32f1xx_hal_adc_ex.c │ │ ├── stm32f1xx_hal_can.c │ │ ├── stm32f1xx_hal_cec.c │ │ ├── stm32f1xx_hal_cortex.c │ │ ├── stm32f1xx_hal_crc.c │ │ ├── stm32f1xx_hal_dac.c │ │ ├── stm32f1xx_hal_dac_ex.c │ │ ├── stm32f1xx_hal_dma.c │ │ ├── stm32f1xx_hal_eth.c │ │ ├── stm32f1xx_hal_exti.c │ │ ├── stm32f1xx_hal_flash.c │ │ ├── stm32f1xx_hal_flash_ex.c │ │ ├── stm32f1xx_hal_gpio.c │ │ ├── stm32f1xx_hal_gpio_ex.c │ │ ├── stm32f1xx_hal_hcd.c │ │ ├── stm32f1xx_hal_i2c.c │ │ ├── stm32f1xx_hal_i2s.c │ │ ├── stm32f1xx_hal_irda.c │ │ ├── stm32f1xx_hal_iwdg.c │ │ ├── stm32f1xx_hal_mmc.c │ │ ├── stm32f1xx_hal_msp_template.c │ │ ├── stm32f1xx_hal_nand.c │ │ ├── stm32f1xx_hal_nor.c │ │ ├── stm32f1xx_hal_pccard.c │ │ ├── stm32f1xx_hal_pcd.c │ │ ├── stm32f1xx_hal_pcd_ex.c │ │ ├── stm32f1xx_hal_pwr.c │ │ ├── stm32f1xx_hal_rcc.c │ │ ├── stm32f1xx_hal_rcc_ex.c │ │ ├── stm32f1xx_hal_rtc.c │ │ ├── stm32f1xx_hal_rtc_ex.c │ │ ├── stm32f1xx_hal_sd.c │ │ ├── stm32f1xx_hal_smartcard.c │ │ ├── stm32f1xx_hal_spi.c │ │ ├── stm32f1xx_hal_sram.c │ │ ├── stm32f1xx_hal_tim.c │ │ ├── stm32f1xx_hal_tim_ex.c │ │ ├── stm32f1xx_hal_timebase_rtc_alarm_template.c │ │ ├── stm32f1xx_hal_timebase_tim_template.c │ │ ├── stm32f1xx_hal_uart.c │ │ ├── stm32f1xx_hal_usart.c │ │ ├── stm32f1xx_hal_wwdg.c │ │ ├── stm32f1xx_ll_adc.c │ │ ├── stm32f1xx_ll_crc.c │ │ ├── stm32f1xx_ll_dac.c │ │ ├── stm32f1xx_ll_dma.c │ │ ├── stm32f1xx_ll_exti.c │ │ ├── stm32f1xx_ll_fsmc.c │ │ ├── stm32f1xx_ll_gpio.c │ │ ├── stm32f1xx_ll_i2c.c │ │ ├── stm32f1xx_ll_pwr.c │ │ ├── stm32f1xx_ll_rcc.c │ │ ├── stm32f1xx_ll_rtc.c │ │ ├── stm32f1xx_ll_sdmmc.c │ │ ├── stm32f1xx_ll_spi.c │ │ ├── stm32f1xx_ll_tim.c │ │ ├── stm32f1xx_ll_usart.c │ │ ├── stm32f1xx_ll_usb.c │ │ └── stm32f1xx_ll_utils.c │ ├── Makefile │ ├── PDDKB.ioc │ ├── STM32F103T8Ux_FLASH.ld │ ├── download.sh │ ├── startup_stm32f103xb.s │ └── stm32flash ├── PDDKB_Hardware_v1.1.zip ├── Readme.md ├── img └── brd.jpg └── reference ├── AN-6102CN.pdf ├── AN-6105CN.pdf ├── FUSB302B-D.PDF ├── FUSB302BCN-D.PDF └── USB_PD_R3_0 V2.0 20190829.pdf /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2022 spray0 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/.mxproject: -------------------------------------------------------------------------------- 1 | [PreviousGenFiles] 2 | AdvancedFolderStructure=true 3 | HeaderFileListSize=3 4 | HeaderFiles#0=C:/Users/Spray0/Desktop/PDDKB/PDDKB/Core/Inc/stm32f1xx_it.h 5 | HeaderFiles#1=C:/Users/Spray0/Desktop/PDDKB/PDDKB/Core/Inc/stm32f1xx_hal_conf.h 6 | HeaderFiles#2=C:/Users/Spray0/Desktop/PDDKB/PDDKB/Core/Inc/main.h 7 | HeaderFolderListSize=1 8 | HeaderPath#0=C:/Users/Spray0/Desktop/PDDKB/PDDKB/Core/Inc 9 | HeaderFiles=; 10 | SourceFileListSize=3 11 | SourceFiles#0=C:/Users/Spray0/Desktop/PDDKB/PDDKB/Core/Src/stm32f1xx_it.c 12 | SourceFiles#1=C:/Users/Spray0/Desktop/PDDKB/PDDKB/Core/Src/stm32f1xx_hal_msp.c 13 | SourceFiles#2=C:/Users/Spray0/Desktop/PDDKB/PDDKB/Core/Src/main.c 14 | SourceFolderListSize=1 15 | SourcePath#0=C:/Users/Spray0/Desktop/PDDKB/PDDKB/Core/Src 16 | SourceFiles=; 17 | 18 | [PreviousLibFiles] 19 | LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; 20 | 21 | [PreviousUsedMakefileFiles] 22 | SourceFiles=Core\Src\main.c;Core\Src\stm32f1xx_it.c;Core\Src\stm32f1xx_hal_msp.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Core\Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Core\Src/system_stm32f1xx.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;; 23 | HeaderPath=Drivers\STM32F1xx_HAL_Driver\Inc;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32F1xx\Include;Drivers\CMSIS\Include;Core\Inc; 24 | CDefines=USE_HAL_DRIVER;STM32F103xB;USE_HAL_DRIVER;USE_HAL_DRIVER; 25 | 26 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/.vscode/settings.json: -------------------------------------------------------------------------------- 1 | { 2 | "files.associations": { 3 | "led.h": "c", 4 | "uart.h": "c", 5 | "stdio.h": "c", 6 | "main.h": "c", 7 | "cstdint": "cpp", 8 | "i2c.h": "c", 9 | "fusb302b.h": "c", 10 | "bsi2c.h": "c" 11 | } 12 | } -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Core/Inc/i2c.h: -------------------------------------------------------------------------------- 1 | #ifndef __I2C_H 2 | #define __I2C_H 3 | #include "stm32f1xx_hal.h" 4 | 5 | extern I2C_HandleTypeDef hi2c1; 6 | void I2C1_Init(void); 7 | 8 | #endif -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Core/Inc/led.h: -------------------------------------------------------------------------------- 1 | #ifndef __LED_H 2 | #define __LED_H 3 | #include "stm32f1xx_hal.h" 4 | 5 | enum color { 6 | white = 0b111, 7 | yellow = 0b110, 8 | purple = 0b101, 9 | red = 0b100, 10 | cyan = 0b011, 11 | green = 0b010, 12 | blue = 0b001, 13 | off = 0b000 14 | }; 15 | 16 | 17 | void RGBLED_Init(void); 18 | void RGBLED_Disp(enum color Color); 19 | 20 | 21 | #define LED_RED_OFF HAL_GPIO_WritePin(GPIOB,GPIO_PIN_3,GPIO_PIN_SET) 22 | #define LED_RED_ON HAL_GPIO_WritePin(GPIOB,GPIO_PIN_3,GPIO_PIN_RESET) 23 | #define LED_GREEN_OFF HAL_GPIO_WritePin(GPIOA,GPIO_PIN_15,GPIO_PIN_SET) 24 | #define LED_GREEN_ON HAL_GPIO_WritePin(GPIOA,GPIO_PIN_15,GPIO_PIN_RESET) 25 | #define LED_BLUE_OFF HAL_GPIO_WritePin(GPIOA,GPIO_PIN_14,GPIO_PIN_SET) 26 | #define LED_BLUE_ON HAL_GPIO_WritePin(GPIOA,GPIO_PIN_14,GPIO_PIN_RESET) 27 | 28 | #endif -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Core/Inc/main.h: -------------------------------------------------------------------------------- 1 | /* 2 | USB Power Delivery Sink driver code 3 | Debug device: FUSB302B 4 | Refernece: 5 | USB_PD_R3_0 V2.0 20190829.pdf 6 | FUSB302B-D.pdf 7 | Spray0 8 | Copyright © 2021 Spray0,All Rights Reserved. 9 | 10 | 2021-5 Ver1.0.2 Changzhou.China 11 | */ 12 | /** 13 | ****************************************************************************** 14 | * @file : main.h 15 | * @brief : Header for main.c file. 16 | * This file contains the common defines of the application. 17 | ****************************************************************************** 18 | * @attention 19 | * 20 | *

© Copyright (c) 2021 STMicroelectronics. 21 | * All rights reserved.

22 | * 23 | * This software component is licensed by ST under BSD 3-Clause license, 24 | * the "License"; You may not use this file except in compliance with the 25 | * License. You may obtain a copy of the License at: 26 | * opensource.org/licenses/BSD-3-Clause 27 | * 28 | ****************************************************************************** 29 | */ 30 | /* USER CODE END Header */ 31 | 32 | /* Define to prevent recursive inclusion -------------------------------------*/ 33 | #ifndef __MAIN_H 34 | #define __MAIN_H 35 | 36 | #ifdef __cplusplus 37 | extern "C" { 38 | #endif 39 | 40 | /* Includes ------------------------------------------------------------------*/ 41 | #include "stm32f1xx_hal.h" 42 | #include "led.h" 43 | #include "uart.h" 44 | #include "i2c.h" 45 | #include "bsi2c.h" 46 | #include "FUSB302B.h" 47 | #include "pd_ufp.h" 48 | 49 | void Error_Handler(void); 50 | extern DMA_HandleTypeDef hdma_usart1_tx; 51 | extern UART_HandleTypeDef UART1_Handler; 52 | extern unsigned char UART1TX_DMA_Busy; 53 | 54 | 55 | #ifdef __cplusplus 56 | } 57 | #endif 58 | 59 | #endif /* __MAIN_H */ 60 | 61 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 62 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Core/Inc/stm32f1xx_it.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32f1xx_it.h 5 | * @brief This file contains the headers of the interrupt handlers. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef __STM32F1xx_IT_H 23 | #define __STM32F1xx_IT_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Private includes ----------------------------------------------------------*/ 30 | /* USER CODE BEGIN Includes */ 31 | 32 | /* USER CODE END Includes */ 33 | 34 | /* Exported types ------------------------------------------------------------*/ 35 | /* USER CODE BEGIN ET */ 36 | 37 | /* USER CODE END ET */ 38 | 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* USER CODE BEGIN EC */ 41 | 42 | /* USER CODE END EC */ 43 | 44 | /* Exported macro ------------------------------------------------------------*/ 45 | /* USER CODE BEGIN EM */ 46 | 47 | /* USER CODE END EM */ 48 | 49 | /* Exported functions prototypes ---------------------------------------------*/ 50 | void NMI_Handler(void); 51 | void HardFault_Handler(void); 52 | void MemManage_Handler(void); 53 | void BusFault_Handler(void); 54 | void UsageFault_Handler(void); 55 | void SVC_Handler(void); 56 | void DebugMon_Handler(void); 57 | void PendSV_Handler(void); 58 | void SysTick_Handler(void); 59 | /* USER CODE BEGIN EFP */ 60 | 61 | /* USER CODE END EFP */ 62 | 63 | #ifdef __cplusplus 64 | } 65 | #endif 66 | 67 | #endif /* __STM32F1xx_IT_H */ 68 | 69 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 70 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Core/Inc/uart.h: -------------------------------------------------------------------------------- 1 | #ifndef __UART_H 2 | #define __UART_H 3 | #include 4 | #include 5 | #include 6 | #include 7 | #include "stm32f1xx_hal.h" 8 | 9 | extern unsigned char UART1_aRxBuffer[1]; 10 | 11 | void UART1_Init(void); 12 | int UART1_Printf(const char * fmt,...); 13 | void UART_DMA_TX_CheckInLoop(); 14 | 15 | #endif -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Core/Src/i2c.c: -------------------------------------------------------------------------------- 1 | #include "main.h" 2 | 3 | I2C_HandleTypeDef hi2c1; 4 | 5 | /* 6 | I2C 初始化 400Khz 7 | */ 8 | void I2C1_Init(void) 9 | { 10 | hi2c1.Instance = I2C1; 11 | hi2c1.Init.ClockSpeed = 400000; 12 | hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2; 13 | hi2c1.Init.OwnAddress1 = 68; 14 | hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 15 | hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 16 | hi2c1.Init.OwnAddress2 = 0; 17 | hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 18 | hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 19 | if (HAL_I2C_Init(&hi2c1) != HAL_OK) 20 | { 21 | Error_Handler(); 22 | } 23 | } -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Core/Src/led.c: -------------------------------------------------------------------------------- 1 | #include "led.h" 2 | 3 | 4 | /* RGB_LED 初始化IO */ 5 | void RGBLED_Init(){ 6 | 7 | __HAL_RCC_GPIOA_CLK_ENABLE(); 8 | __HAL_RCC_GPIOB_CLK_ENABLE(); 9 | 10 | GPIO_InitTypeDef GPIO_Initure; 11 | 12 | GPIO_Initure.Mode=GPIO_MODE_OUTPUT_PP; 13 | GPIO_Initure.Pull=GPIO_PULLUP; 14 | GPIO_Initure.Speed=GPIO_SPEED_FREQ_HIGH; 15 | 16 | GPIO_Initure.Pin=GPIO_PIN_14; 17 | HAL_GPIO_Init(GPIOA,&GPIO_Initure); 18 | GPIO_Initure.Pin=GPIO_PIN_15; 19 | HAL_GPIO_Init(GPIOA,&GPIO_Initure); 20 | GPIO_Initure.Pin=GPIO_PIN_3; 21 | HAL_GPIO_Init(GPIOB,&GPIO_Initure); 22 | 23 | GPIO_Initure.Pin=GPIO_PIN_1; 24 | GPIO_Initure.Pull=GPIO_PULLDOWN; 25 | HAL_GPIO_Init(GPIOA,&GPIO_Initure); 26 | HAL_GPIO_WritePin(GPIOA,GPIO_PIN_1,GPIO_PIN_RESET); 27 | 28 | LED_RED_OFF; 29 | LED_GREEN_OFF; 30 | LED_BLUE_OFF; 31 | } 32 | 33 | /* RGB_LED 控制 */ 34 | void RGBLED_Disp(enum color Color){ 35 | (Color&0b100)?LED_RED_ON:LED_RED_OFF; 36 | (Color&0b010)?LED_GREEN_ON:LED_GREEN_OFF; 37 | (Color&0b001)?LED_BLUE_ON:LED_BLUE_OFF; 38 | } 39 | 40 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Core/Src/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | USB Power Delivery Sink driver code 3 | Debug device: FUSB302B 4 | Refernece: 5 | USB_PD_R3_0 V2.0 20190829.pdf 6 | FUSB302B-D.pdf 7 | Spray0 8 | Copyright © 2021 Spray0,All Rights Reserved. 9 | 10 | 2021-5 Ver1.0.2 Changzhou.China 11 | */ 12 | 13 | #include "main.h" 14 | 15 | #define MCU_Device "STM32F103T8U6" 16 | const char PDD__SoftWareVersion[]={1,0,2}; // 软件版本号 17 | void SystemClock_Config(void); 18 | void PrintMenu(void); 19 | void LED_Ctr(void); 20 | void BUTTON_Init(void); 21 | void BUTTON_Ctr(void); 22 | 23 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) 24 | { 25 | if(huart->Instance==USART1)//如果是串口1 26 | { 27 | /* 28 | //aRxBuffer[0] 29 | if(UART1_aRxBuffer[0]=='\r'){ 30 | while((USART1->SR&0X40)==0);//循环发送,直到发送完毕 31 | USART1->DR = '\n' ; 32 | } 33 | while((USART1->SR&0X40)==0);//循环发送,直到发送完毕 34 | USART1->DR = UART1_aRxBuffer[0] ; 35 | */ 36 | } 37 | } 38 | 39 | #define USBCPWR_5VOUT_ON HAL_GPIO_WritePin(GPIOA,GPIO_PIN_1,GPIO_PIN_RESET) 40 | #define USBCPWR_5VOUT_OFF HAL_GPIO_WritePin(GPIOA,GPIO_PIN_1,GPIO_PIN_SET) 41 | /** 42 | * @brief Main Func 43 | */ 44 | int main(void) 45 | { 46 | SystemClock_Config(); 47 | HAL_Init(); 48 | RGBLED_Init(); 49 | BUTTON_Init(); 50 | UART1_Init(); 51 | BSI2C_Init(); 52 | BSINT_Init(); 53 | 54 | if(FUSB302B_READ_ID()){ 55 | RGBLED_Disp(red); 56 | Error_Handler(); 57 | } 58 | 59 | PD_UFP_Init(); 60 | 61 | USBCPWR_5VOUT_OFF; 62 | 63 | PrintMenu(); 64 | 65 | while (1) 66 | { 67 | UART_DMA_TX_CheckInLoop(); 68 | PD_UFP_InLoop(); 69 | LED_Ctr(); 70 | BUTTON_Ctr(); 71 | } 72 | } 73 | 74 | 75 | /** 76 | * @brief Led control 77 | */ 78 | void LED_Ctr(){ 79 | switch (USBC.State) 80 | { 81 | case usb_null: 82 | USBCPWR_5VOUT_ON; 83 | RGBLED_Disp(off); 84 | break; 85 | case usb_default: 86 | USBCPWR_5VOUT_OFF; 87 | break; 88 | case usb_pd: 89 | RGBLED_Disp(green); 90 | break; 91 | case usb_pd_ready: 92 | RGBLED_Disp(cyan); 93 | break; 94 | case usb_retry_wait: 95 | RGBLED_Disp(red); 96 | break; 97 | default: 98 | break; 99 | } 100 | } 101 | 102 | unsigned char Button_down=1; 103 | /** 104 | * @brief Button ctr 105 | */ 106 | void BUTTON_Ctr(){ 107 | //if(USBC.Source_Capabilities_NUM>1){ 108 | if(1){ 109 | unsigned char now=(HAL_GPIO_ReadPin(GPIOA,GPIO_PIN_6)==GPIO_PIN_RESET)?0:1; 110 | if((Button_down)&&(now==0)){ 111 | //UART1_Printf("Button_down!\r\n"); 112 | unsigned char index=USBC.Source_NowIndex; 113 | index++; 114 | if(index>USBC.Source_Capabilities_NUM)index=1; 115 | PD_RequestPower(USBC.Source_Capabilities[index-1].Voltage); 116 | } 117 | Button_down=now; 118 | } 119 | } 120 | 121 | /** 122 | * @brief print menu 123 | */ 124 | void PrintMenu(){ 125 | UART1_Printf("===================================\r\n"); 126 | UART1_Printf(" USB Power Delivery Sink Demo\r\n"); 127 | UART1_Printf(" MCU ");UART1_Printf(MCU_Device);UART1_Printf(" @ "); 128 | UART1_Printf("%dKHz\r\n",(unsigned int)HAL_RCC_GetSysClockFreq()/1000); 129 | UART1_Printf(" PDC %s\r\n",FUSB302B_ID_Str); 130 | UART1_Printf(" VER v%d.%d%d Spray0\r\n",PDD__SoftWareVersion[0],PDD__SoftWareVersion[1],PDD__SoftWareVersion[2]); 131 | UART1_Printf("===================================\r\n"); 132 | } 133 | 134 | /** 135 | * @brief Button_init 136 | */ 137 | void BUTTON_Init(){ 138 | GPIO_InitTypeDef GPIO_InitStruct = {0}; 139 | __HAL_RCC_GPIOA_CLK_ENABLE(); 140 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 141 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 142 | GPIO_InitStruct.Pin = GPIO_PIN_6; 143 | GPIO_InitStruct.Pull = GPIO_PULLUP; 144 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 145 | } 146 | /** 147 | * @brief System Clock Configuration 148 | * @retval None 149 | */ 150 | void SystemClock_Config(void) 151 | { 152 | RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 153 | RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 154 | 155 | /** Initializes the RCC Oscillators according to the specified parameters 156 | * in the RCC_OscInitTypeDef structure. 157 | */ 158 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 159 | RCC_OscInitStruct.HSIState = RCC_HSI_ON; 160 | RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 161 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 162 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; 163 | RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; 164 | if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 165 | { 166 | Error_Handler(); 167 | } 168 | /** Initializes the CPU, AHB and APB buses clocks 169 | */ 170 | RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 171 | |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 172 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 173 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 174 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 175 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 176 | 177 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 178 | { 179 | Error_Handler(); 180 | } 181 | } 182 | 183 | /** 184 | * @brief This function is executed in case of error occurrence. 185 | * @retval None 186 | */ 187 | void Error_Handler(void) 188 | { 189 | /* USER CODE BEGIN Error_Handler_Debug */ 190 | /* User can add his own implementation to report the HAL error return state */ 191 | __disable_irq(); 192 | while (1) 193 | { 194 | } 195 | /* USER CODE END Error_Handler_Debug */ 196 | } 197 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Core/Src/stm32f1xx_hal_msp.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32f1xx_hal_msp.c 5 | * @brief This file provides code for the MSP Initialization 6 | * and de-Initialization codes. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | *

© Copyright (c) 2021 STMicroelectronics. 11 | * All rights reserved.

12 | * 13 | * This software component is licensed by ST under BSD 3-Clause license, 14 | * the "License"; You may not use this file except in compliance with the 15 | * License. You may obtain a copy of the License at: 16 | * opensource.org/licenses/BSD-3-Clause 17 | * 18 | ****************************************************************************** 19 | */ 20 | /* USER CODE END Header */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "main.h" 24 | /* USER CODE BEGIN Includes */ 25 | 26 | /* USER CODE END Includes */ 27 | 28 | /* Private typedef -----------------------------------------------------------*/ 29 | /* USER CODE BEGIN TD */ 30 | 31 | /* USER CODE END TD */ 32 | 33 | /* Private define ------------------------------------------------------------*/ 34 | /* USER CODE BEGIN Define */ 35 | 36 | /* USER CODE END Define */ 37 | 38 | /* Private macro -------------------------------------------------------------*/ 39 | /* USER CODE BEGIN Macro */ 40 | 41 | /* USER CODE END Macro */ 42 | 43 | /* Private variables ---------------------------------------------------------*/ 44 | /* USER CODE BEGIN PV */ 45 | 46 | /* USER CODE END PV */ 47 | 48 | /* Private function prototypes -----------------------------------------------*/ 49 | /* USER CODE BEGIN PFP */ 50 | 51 | /* USER CODE END PFP */ 52 | 53 | /* External functions --------------------------------------------------------*/ 54 | /* USER CODE BEGIN ExternalFunctions */ 55 | 56 | /* USER CODE END ExternalFunctions */ 57 | 58 | /* USER CODE BEGIN 0 */ 59 | 60 | /* USER CODE END 0 */ 61 | /** 62 | * Initializes the Global MSP. 63 | */ 64 | void HAL_MspInit(void) 65 | { 66 | /* USER CODE BEGIN MspInit 0 */ 67 | 68 | /* USER CODE END MspInit 0 */ 69 | 70 | __HAL_RCC_AFIO_CLK_ENABLE(); 71 | __HAL_RCC_PWR_CLK_ENABLE(); 72 | 73 | /* System interrupt init*/ 74 | 75 | /** DISABLE: JTAG-DP Disabled and SW-DP Disabled 76 | */ 77 | __HAL_AFIO_REMAP_SWJ_DISABLE(); 78 | 79 | /* USER CODE BEGIN MspInit 1 */ 80 | 81 | /* USER CODE END MspInit 1 */ 82 | } 83 | /** 84 | * @brief I2C MSP Initialization 85 | * This function configures the hardware resources used in this example 86 | * @param hi2c: I2C handle pointer 87 | * @retval None 88 | */ 89 | void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) 90 | { 91 | GPIO_InitTypeDef GPIO_InitStruct = {0}; 92 | if(hi2c->Instance==I2C1) 93 | { 94 | /* USER CODE BEGIN I2C1_MspInit 0 */ 95 | 96 | /* USER CODE END I2C1_MspInit 0 */ 97 | 98 | __HAL_RCC_GPIOB_CLK_ENABLE(); 99 | /**I2C1 GPIO Configuration 100 | PB6 ------> I2C1_SCL 101 | PB7 ------> I2C1_SDA 102 | */ 103 | GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 104 | GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 105 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 106 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 107 | 108 | /* Peripheral clock enable */ 109 | __HAL_RCC_I2C1_CLK_ENABLE(); 110 | /* USER CODE BEGIN I2C1_MspInit 1 */ 111 | 112 | /* USER CODE END I2C1_MspInit 1 */ 113 | } 114 | 115 | } 116 | 117 | /** 118 | * @brief I2C MSP De-Initialization 119 | * This function freeze the hardware resources used in this example 120 | * @param hi2c: I2C handle pointer 121 | * @retval None 122 | */ 123 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) 124 | { 125 | if(hi2c->Instance==I2C1) 126 | { 127 | /* USER CODE BEGIN I2C1_MspDeInit 0 */ 128 | 129 | /* USER CODE END I2C1_MspDeInit 0 */ 130 | /* Peripheral clock disable */ 131 | __HAL_RCC_I2C1_CLK_DISABLE(); 132 | 133 | /**I2C1 GPIO Configuration 134 | PB6 ------> I2C1_SCL 135 | PB7 ------> I2C1_SDA 136 | */ 137 | HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6); 138 | 139 | HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7); 140 | 141 | /* USER CODE BEGIN I2C1_MspDeInit 1 */ 142 | 143 | /* USER CODE END I2C1_MspDeInit 1 */ 144 | } 145 | 146 | } 147 | 148 | void HAL_UART_MspInit(UART_HandleTypeDef *huart) 149 | { 150 | GPIO_InitTypeDef GPIO_Initure; 151 | 152 | if(huart->Instance==USART1) 153 | { 154 | /* DMA controller clock enable */ 155 | __HAL_RCC_DMA1_CLK_ENABLE(); 156 | __HAL_RCC_GPIOA_CLK_ENABLE(); 157 | __HAL_RCC_USART1_CLK_ENABLE(); 158 | __HAL_RCC_AFIO_CLK_ENABLE(); 159 | 160 | GPIO_Initure.Pin=GPIO_PIN_9; 161 | GPIO_Initure.Mode=GPIO_MODE_AF_PP; 162 | GPIO_Initure.Pull=GPIO_PULLUP; 163 | GPIO_Initure.Speed=GPIO_SPEED_FREQ_HIGH; 164 | HAL_GPIO_Init(GPIOA,&GPIO_Initure); 165 | 166 | GPIO_Initure.Pin=GPIO_PIN_10; 167 | GPIO_Initure.Mode=GPIO_MODE_AF_INPUT; 168 | HAL_GPIO_Init(GPIOA,&GPIO_Initure); 169 | 170 | /* USART1 DMA Init */ 171 | /* USART1_TX Init */ 172 | hdma_usart1_tx.Instance = DMA1_Channel4; 173 | hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 174 | hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 175 | hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 176 | hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 177 | hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 178 | hdma_usart1_tx.Init.Mode = DMA_NORMAL; 179 | hdma_usart1_tx.Init.Priority = DMA_PRIORITY_HIGH; 180 | if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 181 | { 182 | Error_Handler(); 183 | } 184 | 185 | 186 | 187 | HAL_NVIC_SetPriority(USART1_IRQn,0,0); 188 | HAL_NVIC_EnableIRQ(USART1_IRQn); 189 | 190 | 191 | /* DMA interrupt init */ 192 | /* DMA1_Channel4_IRQn interrupt configuration */ 193 | HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 194 | HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 195 | 196 | __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 197 | } 198 | } 199 | /* USER CODE BEGIN 1 */ 200 | 201 | /* USER CODE END 1 */ 202 | 203 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 204 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Core/Src/stm32f1xx_it.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32f1xx_it.c 5 | * @brief Interrupt Service Routines. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2021 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "main.h" 23 | #include "stm32f1xx_it.h" 24 | /* Private includes ----------------------------------------------------------*/ 25 | /* USER CODE BEGIN Includes */ 26 | /* USER CODE END Includes */ 27 | 28 | /* Private typedef -----------------------------------------------------------*/ 29 | /* USER CODE BEGIN TD */ 30 | 31 | /* USER CODE END TD */ 32 | 33 | /* Private define ------------------------------------------------------------*/ 34 | /* USER CODE BEGIN PD */ 35 | 36 | /* USER CODE END PD */ 37 | 38 | /* Private macro -------------------------------------------------------------*/ 39 | /* USER CODE BEGIN PM */ 40 | 41 | /* USER CODE END PM */ 42 | 43 | /* Private variables ---------------------------------------------------------*/ 44 | /* USER CODE BEGIN PV */ 45 | 46 | /* USER CODE END PV */ 47 | 48 | /* Private function prototypes -----------------------------------------------*/ 49 | /* USER CODE BEGIN PFP */ 50 | 51 | /* USER CODE END PFP */ 52 | 53 | /* Private user code ---------------------------------------------------------*/ 54 | /* USER CODE BEGIN 0 */ 55 | 56 | /* USER CODE END 0 */ 57 | 58 | /* External variables --------------------------------------------------------*/ 59 | 60 | /* USER CODE BEGIN EV */ 61 | 62 | /* USER CODE END EV */ 63 | 64 | /******************************************************************************/ 65 | /* Cortex-M3 Processor Interruption and Exception Handlers */ 66 | /******************************************************************************/ 67 | /** 68 | * @brief This function handles Non maskable interrupt. 69 | */ 70 | void NMI_Handler(void) 71 | { 72 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 73 | 74 | /* USER CODE END NonMaskableInt_IRQn 0 */ 75 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 76 | while (1) 77 | { 78 | } 79 | /* USER CODE END NonMaskableInt_IRQn 1 */ 80 | } 81 | 82 | /** 83 | * @brief This function handles Hard fault interrupt. 84 | */ 85 | void HardFault_Handler(void) 86 | { 87 | /* USER CODE BEGIN HardFault_IRQn 0 */ 88 | 89 | /* USER CODE END HardFault_IRQn 0 */ 90 | while (1) 91 | { 92 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */ 93 | /* USER CODE END W1_HardFault_IRQn 0 */ 94 | } 95 | } 96 | 97 | /** 98 | * @brief This function handles Memory management fault. 99 | */ 100 | void MemManage_Handler(void) 101 | { 102 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */ 103 | 104 | /* USER CODE END MemoryManagement_IRQn 0 */ 105 | while (1) 106 | { 107 | /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ 108 | /* USER CODE END W1_MemoryManagement_IRQn 0 */ 109 | } 110 | } 111 | 112 | /** 113 | * @brief This function handles Prefetch fault, memory access fault. 114 | */ 115 | void BusFault_Handler(void) 116 | { 117 | /* USER CODE BEGIN BusFault_IRQn 0 */ 118 | 119 | /* USER CODE END BusFault_IRQn 0 */ 120 | while (1) 121 | { 122 | /* USER CODE BEGIN W1_BusFault_IRQn 0 */ 123 | /* USER CODE END W1_BusFault_IRQn 0 */ 124 | } 125 | } 126 | 127 | /** 128 | * @brief This function handles Undefined instruction or illegal state. 129 | */ 130 | void UsageFault_Handler(void) 131 | { 132 | /* USER CODE BEGIN UsageFault_IRQn 0 */ 133 | 134 | /* USER CODE END UsageFault_IRQn 0 */ 135 | while (1) 136 | { 137 | /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ 138 | /* USER CODE END W1_UsageFault_IRQn 0 */ 139 | } 140 | } 141 | 142 | /** 143 | * @brief This function handles System service call via SWI instruction. 144 | */ 145 | void SVC_Handler(void) 146 | { 147 | /* USER CODE BEGIN SVCall_IRQn 0 */ 148 | 149 | /* USER CODE END SVCall_IRQn 0 */ 150 | /* USER CODE BEGIN SVCall_IRQn 1 */ 151 | 152 | /* USER CODE END SVCall_IRQn 1 */ 153 | } 154 | 155 | /** 156 | * @brief This function handles Debug monitor. 157 | */ 158 | void DebugMon_Handler(void) 159 | { 160 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */ 161 | 162 | /* USER CODE END DebugMonitor_IRQn 0 */ 163 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */ 164 | 165 | /* USER CODE END DebugMonitor_IRQn 1 */ 166 | } 167 | 168 | /** 169 | * @brief This function handles Pendable request for system service. 170 | */ 171 | void PendSV_Handler(void) 172 | { 173 | /* USER CODE BEGIN PendSV_IRQn 0 */ 174 | 175 | /* USER CODE END PendSV_IRQn 0 */ 176 | /* USER CODE BEGIN PendSV_IRQn 1 */ 177 | 178 | /* USER CODE END PendSV_IRQn 1 */ 179 | } 180 | 181 | /** 182 | * @brief This function handles System tick timer. 183 | */ 184 | void SysTick_Handler(void) 185 | { 186 | /* USER CODE BEGIN SysTick_IRQn 0 */ 187 | 188 | /* USER CODE END SysTick_IRQn 0 */ 189 | HAL_IncTick(); 190 | /* USER CODE BEGIN SysTick_IRQn 1 */ 191 | 192 | /* USER CODE END SysTick_IRQn 1 */ 193 | } 194 | 195 | void DMA1_Channel4_IRQHandler(void) 196 | { 197 | /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ 198 | 199 | /* USER CODE END DMA1_Channel4_IRQn 0 */ 200 | 201 | // DMA1通道4传输完成 202 | if(__HAL_DMA_GET_FLAG(&hdma_usart1_tx,DMA_FLAG_TC4)) 203 | { 204 | __HAL_DMA_CLEAR_FLAG(&hdma_usart1_tx,DMA_FLAG_TC4); //清除DMA1通道4传输完成标志 205 | HAL_DMA_Abort(&hdma_usart1_tx); 206 | UART1_Handler.gState = HAL_UART_STATE_READY; 207 | UART1TX_DMA_Busy=0; 208 | } 209 | if(__HAL_DMA_GET_FLAG(&hdma_usart1_tx,DMA_FLAG_GL4)){ 210 | __HAL_DMA_CLEAR_FLAG(&hdma_usart1_tx,DMA_FLAG_GL4); 211 | } 212 | if(__HAL_DMA_GET_FLAG(&hdma_usart1_tx,DMA_FLAG_HT4)){ 213 | __HAL_DMA_CLEAR_FLAG(&hdma_usart1_tx,DMA_FLAG_HT4); 214 | } 215 | if(__HAL_DMA_GET_FLAG(&hdma_usart1_tx,DMA_FLAG_TE4)){ 216 | __HAL_DMA_CLEAR_FLAG(&hdma_usart1_tx,DMA_FLAG_TE4); 217 | } 218 | //HAL_DMA_IRQHandler(&hdma_usart1_tx); 219 | 220 | /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */ 221 | 222 | /* USER CODE END DMA1_Channel4_IRQn 1 */ 223 | } 224 | 225 | /******************************************************************************/ 226 | /* STM32F1xx Peripheral Interrupt Handlers */ 227 | /* Add here the Interrupt Handlers for the used peripherals. */ 228 | /* For the available peripheral interrupt handler names, */ 229 | /* please refer to the startup file (startup_stm32f1xx.s). */ 230 | /******************************************************************************/ 231 | 232 | /* USER CODE BEGIN 1 */ 233 | 234 | /* USER CODE END 1 */ 235 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 236 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Core/Src/uart.c: -------------------------------------------------------------------------------- 1 | #include "uart.h" 2 | 3 | unsigned char UART1_aRxBuffer[1]; 4 | UART_HandleTypeDef UART1_Handler; 5 | DMA_HandleTypeDef hdma_usart1_tx; 6 | 7 | /** 8 | * @brief UART1 初始化 N.8.1 115200 9 | */ 10 | void UART1_Init(void) 11 | { 12 | UART1_Handler.Instance=USART1; 13 | UART1_Handler.Init.BaudRate=115200; 14 | UART1_Handler.Init.WordLength=UART_WORDLENGTH_8B; 15 | UART1_Handler.Init.StopBits=UART_STOPBITS_1; 16 | UART1_Handler.Init.Parity=UART_PARITY_NONE; 17 | UART1_Handler.Init.HwFlowCtl=UART_HWCONTROL_NONE; 18 | UART1_Handler.Init.Mode=UART_MODE_TX_RX; 19 | HAL_UART_Init(&UART1_Handler); 20 | 21 | HAL_UART_Receive_IT(&UART1_Handler, (unsigned char *)UART1_aRxBuffer, 1); 22 | } 23 | 24 | /** 25 | * @brief 串口1中断服务程序 26 | */ 27 | void USART1_IRQHandler(void) 28 | { 29 | unsigned int timeout=0; 30 | 31 | HAL_UART_IRQHandler(&UART1_Handler); 32 | 33 | while (HAL_UART_GetState(&UART1_Handler) != HAL_UART_STATE_READY) 34 | { 35 | timeout++; 36 | if(timeout>HAL_MAX_DELAY) break; 37 | } 38 | 39 | timeout=0; 40 | while(HAL_UART_Receive_IT(&UART1_Handler, (unsigned char *)UART1_aRxBuffer, 1) != HAL_OK) 41 | { 42 | timeout++; 43 | if(timeout>HAL_MAX_DELAY) break; 44 | } 45 | } 46 | 47 | /* 48 | ******************************************************************************************************************************* 49 | */ 50 | 51 | #define DMATX_BUF_MAXLEN 1024 //DMA发送缓冲数据长度 52 | /** 53 | * @brief DMA发送缓冲结构体 54 | */ 55 | struct DMATX_BUF 56 | { 57 | unsigned char BUF[DMATX_BUF_MAXLEN]; 58 | unsigned short cnt; 59 | }DMATX_BUFA,DMATX_BUFB; 60 | enum DMATX_BUF_NAME{ 61 | BUFA, 62 | BUFB 63 | }; 64 | unsigned char UART1TX_DMA_Busy=0; //DMA发送忙标记 65 | enum DMATX_BUF_NAME UART1TX_DMABUF_Name=BUFB; //DMA当前发送的队列名 66 | /** 67 | * @brief DMA发送控制 68 | */ 69 | void UART_DMA_TX_CheckInLoop(){ 70 | // 如果DMA发送空闲、上次队列发送完毕 71 | if(UART1TX_DMA_Busy==0){ 72 | if(UART1TX_DMABUF_Name==BUFB){ 73 | if(DMATX_BUFA.cnt>0){ 74 | HAL_UART_Transmit_DMA(&UART1_Handler,DMATX_BUFA.BUF,DMATX_BUFA.cnt); 75 | UART1TX_DMA_Busy=1; 76 | UART1TX_DMABUF_Name=BUFA; 77 | DMATX_BUFB.cnt=0; 78 | } 79 | } 80 | if(UART1TX_DMABUF_Name==BUFA){ 81 | if(DMATX_BUFB.cnt>0){ 82 | HAL_UART_Transmit_DMA(&UART1_Handler,DMATX_BUFB.BUF,DMATX_BUFB.cnt); 83 | UART1TX_DMA_Busy=1; 84 | UART1TX_DMABUF_Name=BUFB; 85 | DMATX_BUFA.cnt=0; 86 | } 87 | } 88 | } 89 | } 90 | /** 91 | * @brief str数据写入发送缓冲 92 | */ 93 | int send_string_to_buf(char * str) 94 | { 95 | //往BUFA写入 96 | while(*str!='\0'){ 97 | if(UART1TX_DMABUF_Name==BUFB){ 98 | DMATX_BUFA.BUF[DMATX_BUFA.cnt]=*str; 99 | DMATX_BUFA.cnt++; 100 | } 101 | if(UART1TX_DMABUF_Name==BUFA){ 102 | DMATX_BUFB.BUF[DMATX_BUFB.cnt]=*str; 103 | DMATX_BUFB.cnt++; 104 | } 105 | if(DMATX_BUFA.cnt==DMATX_BUF_MAXLEN){ 106 | //写满 107 | while (UART1TX_DMA_Busy); 108 | HAL_UART_Transmit_DMA(&UART1_Handler,DMATX_BUFA.BUF,DMATX_BUFA.cnt); 109 | UART1TX_DMA_Busy=1; 110 | UART1TX_DMABUF_Name=BUFA; 111 | DMATX_BUFB.cnt=0; 112 | return 0; 113 | } 114 | if(DMATX_BUFB.cnt==DMATX_BUF_MAXLEN){ 115 | //写满 116 | while (UART1TX_DMA_Busy); 117 | HAL_UART_Transmit_DMA(&UART1_Handler,DMATX_BUFB.BUF,DMATX_BUFB.cnt); 118 | UART1TX_DMA_Busy=1; 119 | UART1TX_DMABUF_Name=BUFB; 120 | DMATX_BUFA.cnt=0; 121 | return 0; 122 | } 123 | str++; 124 | } 125 | return 0; 126 | } 127 | 128 | /** 129 | * @brief UART1_Printf 130 | */ 131 | int UART1_Printf(const char * fmt,...) 132 | { 133 | __va_list arg_ptr; 134 | char buf[128]; 135 | 136 | memset(buf,'\0',sizeof(buf)); 137 | 138 | va_start(arg_ptr,fmt); 139 | vsprintf(buf,fmt,arg_ptr); 140 | va_end(arg_ptr); 141 | 142 | send_string_to_buf(buf); 143 | 144 | return 0; 145 | } 146 | 147 | /* 148 | ******************************************************************************************************************************* 149 | */ 150 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Core/Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.2 5 | * @date 19. April 2017 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2017 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Core/Include/tz_context.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file tz_context.h 3 | * @brief Context Management for Armv8-M TrustZone 4 | * @version V1.0.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef TZ_CONTEXT_H 32 | #define TZ_CONTEXT_H 33 | 34 | #include 35 | 36 | #ifndef TZ_MODULEID_T 37 | #define TZ_MODULEID_T 38 | /// \details Data type that identifies secure software modules called by a process. 39 | typedef uint32_t TZ_ModuleId_t; 40 | #endif 41 | 42 | /// \details TZ Memory ID identifies an allocated memory slot. 43 | typedef uint32_t TZ_MemoryId_t; 44 | 45 | /// Initialize secure context memory system 46 | /// \return execution status (1: success, 0: error) 47 | uint32_t TZ_InitContextSystem_S (void); 48 | 49 | /// Allocate context memory for calling secure software modules in TrustZone 50 | /// \param[in] module identifies software modules called from non-secure mode 51 | /// \return value != 0 id TrustZone memory slot identifier 52 | /// \return value 0 no memory available or internal error 53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); 54 | 55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S 56 | /// \param[in] id TrustZone memory slot identifier 57 | /// \return execution status (1: success, 0: error) 58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); 59 | 60 | /// Load secure context (called on RTOS thread context switch) 61 | /// \param[in] id TrustZone memory slot identifier 62 | /// \return execution status (1: success, 0: error) 63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); 64 | 65 | /// Store secure context (called on RTOS thread context switch) 66 | /// \param[in] id TrustZone memory slot identifier 67 | /// \return execution status (1: success, 0: error) 68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); 69 | 70 | #endif // TZ_CONTEXT_H 71 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Core/Template/ARMv8-M/main_s.c: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file main_s.c 3 | * @brief Code template for secure main function 4 | * @version V1.1.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2013-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | /* Use CMSE intrinsics */ 26 | #include 27 | 28 | #include "RTE_Components.h" 29 | #include CMSIS_device_header 30 | 31 | /* TZ_START_NS: Start address of non-secure application */ 32 | #ifndef TZ_START_NS 33 | #define TZ_START_NS (0x200000U) 34 | #endif 35 | 36 | /* typedef for non-secure callback functions */ 37 | typedef void (*funcptr_void) (void) __attribute__((cmse_nonsecure_call)); 38 | 39 | /* Secure main() */ 40 | int main(void) { 41 | funcptr_void NonSecure_ResetHandler; 42 | 43 | /* Add user setup code for secure part here*/ 44 | 45 | /* Set non-secure main stack (MSP_NS) */ 46 | __TZ_set_MSP_NS(*((uint32_t *)(TZ_START_NS))); 47 | 48 | /* Get non-secure reset handler */ 49 | NonSecure_ResetHandler = (funcptr_void)(*((uint32_t *)((TZ_START_NS) + 4U))); 50 | 51 | /* Start non-secure state software application */ 52 | NonSecure_ResetHandler(); 53 | 54 | /* Non-secure software does not return, this code is not executed */ 55 | while (1) { 56 | __NOP(); 57 | } 58 | } 59 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Core/Template/ARMv8-M/tz_context.c: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file tz_context.c 3 | * @brief Context Management for Armv8-M TrustZone - Sample implementation 4 | * @version V1.1.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2016-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #include "RTE_Components.h" 26 | #include CMSIS_device_header 27 | #include "tz_context.h" 28 | 29 | /// Number of process slots (threads may call secure library code) 30 | #ifndef TZ_PROCESS_STACK_SLOTS 31 | #define TZ_PROCESS_STACK_SLOTS 8U 32 | #endif 33 | 34 | /// Stack size of the secure library code 35 | #ifndef TZ_PROCESS_STACK_SIZE 36 | #define TZ_PROCESS_STACK_SIZE 256U 37 | #endif 38 | 39 | typedef struct { 40 | uint32_t sp_top; // stack space top 41 | uint32_t sp_limit; // stack space limit 42 | uint32_t sp; // current stack pointer 43 | } stack_info_t; 44 | 45 | static stack_info_t ProcessStackInfo [TZ_PROCESS_STACK_SLOTS]; 46 | static uint64_t ProcessStackMemory[TZ_PROCESS_STACK_SLOTS][TZ_PROCESS_STACK_SIZE/8U]; 47 | static uint32_t ProcessStackFreeSlot = 0xFFFFFFFFU; 48 | 49 | 50 | /// Initialize secure context memory system 51 | /// \return execution status (1: success, 0: error) 52 | __attribute__((cmse_nonsecure_entry)) 53 | uint32_t TZ_InitContextSystem_S (void) { 54 | uint32_t n; 55 | 56 | if (__get_IPSR() == 0U) { 57 | return 0U; // Thread Mode 58 | } 59 | 60 | for (n = 0U; n < TZ_PROCESS_STACK_SLOTS; n++) { 61 | ProcessStackInfo[n].sp = 0U; 62 | ProcessStackInfo[n].sp_limit = (uint32_t)&ProcessStackMemory[n]; 63 | ProcessStackInfo[n].sp_top = (uint32_t)&ProcessStackMemory[n] + TZ_PROCESS_STACK_SIZE; 64 | *((uint32_t *)ProcessStackMemory[n]) = n + 1U; 65 | } 66 | *((uint32_t *)ProcessStackMemory[--n]) = 0xFFFFFFFFU; 67 | 68 | ProcessStackFreeSlot = 0U; 69 | 70 | // Default process stack pointer and stack limit 71 | __set_PSPLIM((uint32_t)ProcessStackMemory); 72 | __set_PSP ((uint32_t)ProcessStackMemory); 73 | 74 | // Privileged Thread Mode using PSP 75 | __set_CONTROL(0x02U); 76 | 77 | return 1U; // Success 78 | } 79 | 80 | 81 | /// Allocate context memory for calling secure software modules in TrustZone 82 | /// \param[in] module identifies software modules called from non-secure mode 83 | /// \return value != 0 id TrustZone memory slot identifier 84 | /// \return value 0 no memory available or internal error 85 | __attribute__((cmse_nonsecure_entry)) 86 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module) { 87 | uint32_t slot; 88 | 89 | (void)module; // Ignore (fixed Stack size) 90 | 91 | if (__get_IPSR() == 0U) { 92 | return 0U; // Thread Mode 93 | } 94 | 95 | if (ProcessStackFreeSlot == 0xFFFFFFFFU) { 96 | return 0U; // No slot available 97 | } 98 | 99 | slot = ProcessStackFreeSlot; 100 | ProcessStackFreeSlot = *((uint32_t *)ProcessStackMemory[slot]); 101 | 102 | ProcessStackInfo[slot].sp = ProcessStackInfo[slot].sp_top; 103 | 104 | return (slot + 1U); 105 | } 106 | 107 | 108 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S 109 | /// \param[in] id TrustZone memory slot identifier 110 | /// \return execution status (1: success, 0: error) 111 | __attribute__((cmse_nonsecure_entry)) 112 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id) { 113 | uint32_t slot; 114 | 115 | if (__get_IPSR() == 0U) { 116 | return 0U; // Thread Mode 117 | } 118 | 119 | if ((id == 0U) || (id > TZ_PROCESS_STACK_SLOTS)) { 120 | return 0U; // Invalid ID 121 | } 122 | 123 | slot = id - 1U; 124 | 125 | if (ProcessStackInfo[slot].sp == 0U) { 126 | return 0U; // Inactive slot 127 | } 128 | ProcessStackInfo[slot].sp = 0U; 129 | 130 | *((uint32_t *)ProcessStackMemory[slot]) = ProcessStackFreeSlot; 131 | ProcessStackFreeSlot = slot; 132 | 133 | return 1U; // Success 134 | } 135 | 136 | 137 | /// Load secure context (called on RTOS thread context switch) 138 | /// \param[in] id TrustZone memory slot identifier 139 | /// \return execution status (1: success, 0: error) 140 | __attribute__((cmse_nonsecure_entry)) 141 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id) { 142 | uint32_t slot; 143 | 144 | if ((__get_IPSR() == 0U) || ((__get_CONTROL() & 2U) == 0U)) { 145 | return 0U; // Thread Mode or using Main Stack for threads 146 | } 147 | 148 | if ((id == 0U) || (id > TZ_PROCESS_STACK_SLOTS)) { 149 | return 0U; // Invalid ID 150 | } 151 | 152 | slot = id - 1U; 153 | 154 | if (ProcessStackInfo[slot].sp == 0U) { 155 | return 0U; // Inactive slot 156 | } 157 | 158 | // Setup process stack pointer and stack limit 159 | __set_PSPLIM(ProcessStackInfo[slot].sp_limit); 160 | __set_PSP (ProcessStackInfo[slot].sp); 161 | 162 | return 1U; // Success 163 | } 164 | 165 | 166 | /// Store secure context (called on RTOS thread context switch) 167 | /// \param[in] id TrustZone memory slot identifier 168 | /// \return execution status (1: success, 0: error) 169 | __attribute__((cmse_nonsecure_entry)) 170 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id) { 171 | uint32_t slot; 172 | uint32_t sp; 173 | 174 | if ((__get_IPSR() == 0U) || ((__get_CONTROL() & 2U) == 0U)) { 175 | return 0U; // Thread Mode or using Main Stack for threads 176 | } 177 | 178 | if ((id == 0U) || (id > TZ_PROCESS_STACK_SLOTS)) { 179 | return 0U; // Invalid ID 180 | } 181 | 182 | slot = id - 1U; 183 | 184 | if (ProcessStackInfo[slot].sp == 0U) { 185 | return 0U; // Inactive slot 186 | } 187 | 188 | sp = __get_PSP(); 189 | if ((sp < ProcessStackInfo[slot].sp_limit) || 190 | (sp > ProcessStackInfo[slot].sp_top)) { 191 | return 0U; // SP out of range 192 | } 193 | ProcessStackInfo[slot].sp = sp; 194 | 195 | // Default process stack pointer and stack limit 196 | __set_PSPLIM((uint32_t)ProcessStackMemory); 197 | __set_PSP ((uint32_t)ProcessStackMemory); 198 | 199 | return 1U; // Success 200 | } 201 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Core_A/Include/cmsis_compiler.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_compiler.h 3 | * @brief CMSIS compiler specific macros, functions, instructions 4 | * @version V1.0.2 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #ifndef __CMSIS_COMPILER_H 26 | #define __CMSIS_COMPILER_H 27 | 28 | #include 29 | 30 | /* 31 | * Arm Compiler 4/5 32 | */ 33 | #if defined ( __CC_ARM ) 34 | #include "cmsis_armcc.h" 35 | 36 | 37 | /* 38 | * Arm Compiler 6 (armclang) 39 | */ 40 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 41 | #include "cmsis_armclang.h" 42 | 43 | 44 | /* 45 | * GNU Compiler 46 | */ 47 | #elif defined ( __GNUC__ ) 48 | #include "cmsis_gcc.h" 49 | 50 | 51 | /* 52 | * IAR Compiler 53 | */ 54 | #elif defined ( __ICCARM__ ) 55 | #include "cmsis_iccarm.h" 56 | 57 | 58 | /* 59 | * TI Arm Compiler 60 | */ 61 | #elif defined ( __TI_ARM__ ) 62 | #include 63 | 64 | #ifndef __ASM 65 | #define __ASM __asm 66 | #endif 67 | #ifndef __INLINE 68 | #define __INLINE inline 69 | #endif 70 | #ifndef __STATIC_INLINE 71 | #define __STATIC_INLINE static inline 72 | #endif 73 | #ifndef __STATIC_INLINE 74 | #define __STATIC_INLINE static inline 75 | #endif 76 | #ifndef __STATIC_FORCEINLINE 77 | #define __STATIC_FORCEINLINE __STATIC_INLINE 78 | #endif 79 | #ifndef __NO_RETURN 80 | #define __NO_RETURN __attribute__((noreturn)) 81 | #endif 82 | #ifndef CMSIS_DEPRECATED 83 | #define CMSIS_DEPRECATED __attribute__((deprecated)) 84 | #endif 85 | #ifndef __USED 86 | #define __USED __attribute__((used)) 87 | #endif 88 | #ifndef __WEAK 89 | #define __WEAK __attribute__((weak)) 90 | #endif 91 | #ifndef __UNALIGNED_UINT32 92 | struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 93 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 94 | #endif 95 | #ifndef __ALIGNED 96 | #define __ALIGNED(x) __attribute__((aligned(x))) 97 | #endif 98 | #ifndef __PACKED 99 | #define __PACKED __attribute__((packed)) 100 | #endif 101 | 102 | 103 | /* 104 | * TASKING Compiler 105 | */ 106 | #elif defined ( __TASKING__ ) 107 | /* 108 | * The CMSIS functions have been implemented as intrinsics in the compiler. 109 | * Please use "carm -?i" to get an up to date list of all intrinsics, 110 | * Including the CMSIS ones. 111 | */ 112 | 113 | #ifndef __ASM 114 | #define __ASM __asm 115 | #endif 116 | #ifndef __INLINE 117 | #define __INLINE inline 118 | #endif 119 | #ifndef __STATIC_INLINE 120 | #define __STATIC_INLINE static inline 121 | #endif 122 | #ifndef __STATIC_FORCEINLINE 123 | #define __STATIC_FORCEINLINE __STATIC_INLINE 124 | #endif 125 | #ifndef __NO_RETURN 126 | #define __NO_RETURN __attribute__((noreturn)) 127 | #endif 128 | #ifndef CMSIS_DEPRECATED 129 | #define CMSIS_DEPRECATED __attribute__((deprecated)) 130 | #endif 131 | #ifndef __USED 132 | #define __USED __attribute__((used)) 133 | #endif 134 | #ifndef __WEAK 135 | #define __WEAK __attribute__((weak)) 136 | #endif 137 | #ifndef __UNALIGNED_UINT32 138 | struct __packed__ T_UINT32 { uint32_t v; }; 139 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 140 | #endif 141 | #ifndef __ALIGNED 142 | #define __ALIGNED(x) __align(x) 143 | #endif 144 | #ifndef __PACKED 145 | #define __PACKED __packed__ 146 | #endif 147 | 148 | 149 | /* 150 | * COSMIC Compiler 151 | */ 152 | #elif defined ( __CSMC__ ) 153 | #include 154 | 155 | #ifndef __ASM 156 | #define __ASM _asm 157 | #endif 158 | #ifndef __INLINE 159 | #define __INLINE inline 160 | #endif 161 | #ifndef __STATIC_INLINE 162 | #define __STATIC_INLINE static inline 163 | #endif 164 | #ifndef __STATIC_FORCEINLINE 165 | #define __STATIC_FORCEINLINE __STATIC_INLINE 166 | #endif 167 | #ifndef __NO_RETURN 168 | // NO RETURN is automatically detected hence no warning here 169 | #define __NO_RETURN 170 | #endif 171 | #ifndef __USED 172 | #warning No compiler specific solution for __USED. __USED is ignored. 173 | #define __USED 174 | #endif 175 | #ifndef CMSIS_DEPRECATED 176 | #warning No compiler specific solution for CMSIS_DEPRECATED. CMSIS_DEPRECATED is ignored. 177 | #define CMSIS_DEPRECATED 178 | #endif 179 | #ifndef __WEAK 180 | #define __WEAK __weak 181 | #endif 182 | #ifndef __UNALIGNED_UINT32 183 | @packed struct T_UINT32 { uint32_t v; }; 184 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 185 | #endif 186 | #ifndef __ALIGNED 187 | #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. 188 | #define __ALIGNED(x) 189 | #endif 190 | #ifndef __PACKED 191 | #define __PACKED @packed 192 | #endif 193 | 194 | 195 | #else 196 | #error Unknown compiler. 197 | #endif 198 | 199 | 200 | #endif /* __CMSIS_COMPILER_H */ 201 | 202 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h: -------------------------------------------------------------------------------- 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https://raw.githubusercontent.com/Spray0/SP_DEVKIT_PDDKB/864a2d0f2f962db88303d614097924f61d78c241/PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f10x.h 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /** @addtogroup CMSIS 21 | * @{ 22 | */ 23 | 24 | /** @addtogroup stm32f10x_system 25 | * @{ 26 | */ 27 | 28 | /** 29 | * @brief Define to prevent recursive inclusion 30 | */ 31 | #ifndef __SYSTEM_STM32F10X_H 32 | #define __SYSTEM_STM32F10X_H 33 | 34 | #ifdef __cplusplus 35 | extern "C" { 36 | #endif 37 | 38 | /** @addtogroup STM32F10x_System_Includes 39 | * @{ 40 | */ 41 | 42 | /** 43 | * @} 44 | */ 45 | 46 | 47 | /** @addtogroup STM32F10x_System_Exported_types 48 | * @{ 49 | */ 50 | 51 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 52 | extern const uint8_t AHBPrescTable[16U]; /*!< AHB prescalers table values */ 53 | extern const uint8_t APBPrescTable[8U]; /*!< APB prescalers table values */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /** @addtogroup STM32F10x_System_Exported_Constants 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @addtogroup STM32F10x_System_Exported_Macros 68 | * @{ 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** @addtogroup STM32F10x_System_Exported_Functions 76 | * @{ 77 | */ 78 | 79 | extern void SystemInit(void); 80 | extern void SystemCoreClockUpdate(void); 81 | /** 82 | * @} 83 | */ 84 | 85 | #ifdef __cplusplus 86 | } 87 | #endif 88 | 89 | #endif /*__SYSTEM_STM32F10X_H */ 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 99 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.2 5 | * @date 19. April 2017 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2017 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/CMSIS/Include/tz_context.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file tz_context.h 3 | * @brief Context Management for Armv8-M TrustZone 4 | * @version V1.0.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef TZ_CONTEXT_H 32 | #define TZ_CONTEXT_H 33 | 34 | #include 35 | 36 | #ifndef TZ_MODULEID_T 37 | #define TZ_MODULEID_T 38 | /// \details Data type that identifies secure software modules called by a process. 39 | typedef uint32_t TZ_ModuleId_t; 40 | #endif 41 | 42 | /// \details TZ Memory ID identifies an allocated memory slot. 43 | typedef uint32_t TZ_MemoryId_t; 44 | 45 | /// Initialize secure context memory system 46 | /// \return execution status (1: success, 0: error) 47 | uint32_t TZ_InitContextSystem_S (void); 48 | 49 | /// Allocate context memory for calling secure software modules in TrustZone 50 | /// \param[in] module identifies software modules called from non-secure mode 51 | /// \return value != 0 id TrustZone memory slot identifier 52 | /// \return value 0 no memory available or internal error 53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); 54 | 55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S 56 | /// \param[in] id TrustZone memory slot identifier 57 | /// \return execution status (1: success, 0: error) 58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); 59 | 60 | /// Load secure context (called on RTOS thread context switch) 61 | /// \param[in] id TrustZone memory slot identifier 62 | /// \return execution status (1: success, 0: error) 63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); 64 | 65 | /// Store secure context (called on RTOS thread context switch) 66 | /// \param[in] id TrustZone memory slot identifier 67 | /// \return execution status (1: success, 0: error) 68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); 69 | 70 | #endif // TZ_CONTEXT_H 71 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/PD/BSI2C/bsi2c.c: -------------------------------------------------------------------------------- 1 | /* 2 | USB Power Delivery Sink driver code 3 | Debug device: FUSB302B 4 | Refernece: 5 | USB_PD_R3_0 V2.0 20190829.pdf 6 | FUSB302B-D.pdf 7 | Spray0 8 | Copyright © 2021 Spray0,All Rights Reserved. 9 | 10 | 2021-5 Ver1.0.2 Changzhou.China 11 | */ 12 | 13 | #include "bsi2c.h" 14 | 15 | 16 | /** 17 | * @brief 板级支持 INT 初始化 18 | */ 19 | unsigned char BSINT_Init(void){ 20 | GPIO_InitTypeDef GPIO_InitStruct = {0}; 21 | __HAL_RCC_GPIOB_CLK_ENABLE(); 22 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 23 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 24 | GPIO_InitStruct.Pin = GPIO_PIN_5; 25 | GPIO_InitStruct.Pull = GPIO_PULLUP; 26 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 27 | return 0; 28 | } 29 | 30 | /** 31 | * @brief 板级支持 INT 检查 32 | */ 33 | unsigned char BSINT_CUR(void){ 34 | return (HAL_GPIO_ReadPin(GPIOB,GPIO_PIN_5)==GPIO_PIN_RESET)?1:0; 35 | } 36 | 37 | /** 38 | * @brief 板级支持 I2C 初始化 39 | */ 40 | unsigned char BSI2C_Init(void){ 41 | I2C1_Init(); 42 | return 0; 43 | } 44 | 45 | /** 46 | * @brief 板级支持 I2C 从设备寄存器读取数据 47 | */ 48 | unsigned char BSI2C_Read(unsigned char DevAddr,unsigned short RegAddr,unsigned char *pData,unsigned char len){ 49 | if(HAL_I2C_Mem_Read(&hi2c1,(DevAddr<<1)+1,RegAddr,I2C_MEMADD_SIZE_8BIT,pData,len,1000)==HAL_OK) 50 | return 0; 51 | else 52 | return 1; 53 | } 54 | 55 | /** 56 | * @brief 板级支持 I2C 向设备寄存器写入数据 57 | */ 58 | unsigned char BSI2C_Write(unsigned char DevAddr,unsigned short RegAddr,unsigned char *pData,unsigned char len){ 59 | if(HAL_I2C_Mem_Write(&hi2c1,(DevAddr<<1),RegAddr,I2C_MEMADD_SIZE_8BIT,pData,len,1000)==HAL_OK) 60 | return 0; 61 | else 62 | return 1; 63 | } -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/PD/BSI2C/bsi2c.h: -------------------------------------------------------------------------------- 1 | /* 2 | USB Power Delivery Sink driver code 3 | Debug device: FUSB302B 4 | Refernece: 5 | USB_PD_R3_0 V2.0 20190829.pdf 6 | FUSB302B-D.pdf 7 | Spray0 8 | Copyright © 2021 Spray0,All Rights Reserved. 9 | 10 | 2021-5 Ver1.0.2 Changzhou.China 11 | */ 12 | 13 | #ifndef __BSI2C_H 14 | #define __BSI2C_H 15 | 16 | #include "main.h" 17 | 18 | #define LOG UART1_Printf 19 | #define BSTimeStamp HAL_GetTick() 20 | 21 | unsigned char BSI2C_Init(void); 22 | unsigned char BSINT_Init(void); 23 | unsigned char BSINT_CUR(void); 24 | unsigned char BSI2C_Read(unsigned char DevAddr,unsigned short RegAddr,unsigned char *pData,unsigned char len); 25 | unsigned char BSI2C_Write(unsigned char DevAddr,unsigned short RegAddr,unsigned char *pData,unsigned char len); 26 | 27 | #endif -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/PD/FUSB302B/FUSB302B.h: -------------------------------------------------------------------------------- 1 | /* 2 | USB Power Delivery Sink driver code 3 | Debug device: FUSB302B 4 | Refernece: 5 | USB_PD_R3_0 V2.0 20190829.pdf 6 | FUSB302B-D.pdf 7 | Spray0 8 | Copyright © 2021 Spray0,All Rights Reserved. 9 | 10 | 2021-5 Ver1.0.2 Changzhou.China 11 | */ 12 | 13 | #ifndef __FUSB302B_H 14 | #define __FUSB302B_H 15 | 16 | #include "bsi2c.h" 17 | 18 | 19 | #define FUSB302B_I2CADDR 0x22 // FUSB302B I2C 地址 20 | extern unsigned char is_timeout_active; 21 | /* FUSB302B 寄存器 */ 22 | enum FUSB302B_RegAddr{ 23 | REG_DeviceID=0x01, 24 | REG_Switches0, 25 | REG_Switches1, 26 | REG_Measure, 27 | REG_Slice, 28 | REG_Control0, 29 | REG_Control1, 30 | REG_Control2, 31 | REG_Control3, 32 | REG_Mask, 33 | REG_Power, 34 | REG_Reset, 35 | REG_OCPreg, 36 | REG_Maska, 37 | REG_Maskb, 38 | REG_Control4, 39 | REG_Status0a=0x3C, 40 | REG_Status1a=0x3D, 41 | REG_Interrupta=0x3E, 42 | REG_Interruptb=0X3F, 43 | REG_Status0=0x40, 44 | REG_Status1=0x41, 45 | REG_Interrupt=0x42, 46 | REG_FIFOs=0x43 47 | }; 48 | 49 | enum CC_X{ 50 | CCNULL=0, 51 | CC1, 52 | CC2 53 | }; 54 | 55 | /// Tokens used in FUSB302B FIFO 56 | enum token{ 57 | txon = 0xa1, 58 | sop1 = 0x12, 59 | sop2 = 0x13, 60 | sop3 = 0x1b, 61 | reset1 = 0x15, 62 | reset2 = 0x16, 63 | packsym = 0x80, 64 | jam_crc = 0xff, 65 | eop = 0x14, 66 | txoff = 0xfe 67 | }; 68 | 69 | extern enum CC_X __FUSB302B_NOW_MEASCC; 70 | 71 | unsigned char FUSB302B_ResetAll(void); 72 | unsigned char FUSB302B_Init(void); 73 | unsigned char FUSB302B_Set_CC_MeasurementCH(enum CC_X CCnum); 74 | unsigned char FUSB302B_Get_CC_MeasurementLv(void); 75 | unsigned char FUSB302B_Set_CC12_MeasurementExchange(); 76 | void FUSB302B_Check_CC_Meas(void); 77 | unsigned char FUSB302B_Is_CC_OK(void); 78 | void FUSB302B_Retry_Wait(void); 79 | unsigned char FUSB302B_Set_CC_COMP_mVotage(unsigned short mv); 80 | unsigned char FUSB302B_PD_ConfigInterrupt(void); 81 | unsigned char FUSB302B_PD_CheckInterrupt(void); 82 | unsigned char FUSB302B_Check_VBUSOK(void); 83 | void FUSB302B_Set_VBUS_Check(void); 84 | 85 | void FUSB302B_Send_PDMessage(unsigned short *Header,unsigned int *Do,unsigned char DoNum); 86 | 87 | extern char * FUSB302B_ID_Str[48]; 88 | unsigned char FUSB302B_READ_ID(void); 89 | 90 | 91 | unsigned char FUSB302B_StartSink(void); 92 | 93 | void start_timeout(unsigned int ms); 94 | unsigned char has_timeout_expired(void); 95 | 96 | #endif -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/PD/pd_ufp.h: -------------------------------------------------------------------------------- 1 | /* 2 | USB Power Delivery Sink driver code 3 | Debug device: FUSB302B 4 | Refernece: 5 | USB_PD_R3_0 V2.0 20190829.pdf 6 | FUSB302B-D.pdf 7 | Spray0 8 | Copyright © 2021 Spray0,All Rights Reserved. 9 | 10 | 2021-5 Ver1.0.2 Changzhou.China 11 | */ 12 | 13 | #ifndef __PD_UFP_H 14 | #define __PD_UFP_H 15 | #include "main.h" 16 | 17 | #define USE_LOG 1 18 | 19 | #define INIT_PD_SAFE5V 0 // 初始化PD电源安全5V 20 | #define INIT_PD_MAXPWR 1 // 初始化PD电源最高档 21 | #define INIT_PD_PWR INIT_PD_SAFE5V // 初始化PD电源选择 22 | 23 | /* USB 接口状态 */ 24 | enum USBC_STATE{ 25 | usb_null, //状态：无线缆插入,等待线缆插入 26 | usb_default, //状态：线缆插入，等待事件触发 27 | usb_pd, //状态：线缆插入，PD事件已触发，等待电源配置 28 | usb_pd_ready, //状态：线缆插入，电源配置完毕 29 | usb_retry_wait 30 | }; 31 | /* USB 接口插入正反方向 */ 32 | enum USBC_CABLE_SIDE{ 33 | NULL_SIDE, 34 | FRONT_SIDE, 35 | REVERSE_SIDE 36 | }; 37 | 38 | unsigned char PD_UFP_Init(void); 39 | unsigned char PD_UFP_InLoop(void); 40 | 41 | 42 | /* 43 | PD信息头 信息类型 44 | */ 45 | enum PD_Header_MessageType{ 46 | __MsgReserved, 47 | __CMsg_GoodCRC, 48 | __CMsg_GotoMin, 49 | __CMsg_Accept, 50 | __CMsg_Reject, 51 | __CMsg_Ping, 52 | __CMsg_PS_RDY, 53 | __CMsg_Get_Source_Cap, 54 | __CMsg_Get_Sink_Cap, 55 | __CMsg_DR_Swap, 56 | __CMsg_PR_Swap, 57 | __CMsg_VCONN_Swap, 58 | __CMsg_Wait, 59 | __CMsg_Soft_Reset, 60 | __CMsg_Data_Reset, 61 | __CMsg_Data_Reset_Complete, 62 | __CMsg_Not_Supported, 63 | __CMsg_Get_Source_Cap_Extended, 64 | __CMsg_Get_Status, 65 | __CMsg_FR_Swap, 66 | __CMsg_Get_PPS_Status, 67 | __CMsg_Get_Country_Codes, 68 | __CMsg_Get_Sink_Cap_Extended, 69 | __DMsg_Source_Capabilities=1, 70 | __DMsg_Request, 71 | __DMsg_BIST, 72 | __DMsg_Sink_Capabilities, 73 | __DMsg_Battery_Status, 74 | __DMsg_Alert 75 | }; 76 | /* 77 | PD规格版本 78 | */ 79 | enum PD_Header_SpecificationRevision{ 80 | __Revision_1_0, 81 | __Revision_2_0, 82 | __Revision_3_0, 83 | __Revision_Reserved 84 | }; 85 | /* 86 | 端口电源角色 87 | */ 88 | enum PD_Header_PortPowerRole{ 89 | __PPR_Sink, 90 | __PPR_Source 91 | }; 92 | /* 93 | 端口数据角色 94 | */ 95 | enum PD_Header_PortDataRole{ 96 | __PDR_UFP, 97 | __PDR_DFP 98 | }; 99 | /* 100 | 其他类型标记 101 | */ 102 | enum PD_Header_Extended{ 103 | __CMSG_DMSG, // Control Message or Data Message 104 | __EMSG // Extended Message 105 | }; 106 | /* 107 | PD 信息头结构 108 | */ 109 | struct PD_Message_Header{ 110 | /* 原始数据 */ 111 | unsigned short rawdata; 112 | /* 是否是其他类型数据包 */ 113 | enum PD_Header_Extended Extended; 114 | /* 数据对象数量 0 ：Control Message 1-7：Data Message */ 115 | unsigned char NumberOfDataObjects; 116 | /* 信息ID Stamp 0-7 复位值0，自增 */ 117 | unsigned char MessageID; 118 | /* 端口电源角色 */ 119 | enum PD_Header_PortPowerRole PortPowerRole; 120 | /* PD规格版本 */ 121 | enum PD_Header_SpecificationRevision SpecificationRevision; 122 | /* 端口数据角色 */ 123 | enum PD_Header_PortDataRole PortDataRole; 124 | /* 信息类型 */ 125 | enum PD_Header_MessageType MessageType; 126 | }; 127 | 128 | /** 129 | * @brief 接收电源数据对象 固定供电 130 | */ 131 | struct PD_PDO_FixedSupply{ 132 | /* 原始数据 */ 133 | unsigned int rawdata; 134 | /* 双口电源 */ 135 | unsigned char DualRole_Power; 136 | /* USB 挂起支持 */ 137 | unsigned char USB_Suspend_Supported; 138 | /* 无约束电源 */ 139 | unsigned char Unconstrained_Power; 140 | /* USB通信能力 */ 141 | unsigned char USB_Communications_Capable; 142 | /* 双口数据 */ 143 | unsigned char DualRole_Data; 144 | /* 扩展信息支持 */ 145 | unsigned char Unchunked_Extended_Messages_Supported; 146 | /* 峰值电流 */ 147 | unsigned char Peak_Current; 148 | /* 电压mv */ 149 | unsigned short Voltage; 150 | /* 电流ma */ 151 | unsigned short Current; 152 | }; 153 | 154 | /** 155 | * @brief 发送电源数据对象 固定供电 156 | */ 157 | struct PD_RDO_FixedSupply{ 158 | /* 原始数据 */ 159 | unsigned int rawdata; 160 | /* PDO对象索引 */ 161 | unsigned char ObjectPosition; 162 | /* 回馈标记 */ 163 | unsigned char GiveBack_Flag; 164 | /* 错误配置能力 */ 165 | unsigned char Capability_Mismatch; 166 | /* USB通信能力 */ 167 | unsigned char USB_Communications_Capable; 168 | /* 无USB挂起 */ 169 | unsigned char No_USBSuspend; 170 | /* 扩展信息支持 */ 171 | unsigned char Unchunked_Extended_Messages_Supported; 172 | /* 工作电流 */ 173 | unsigned short OperatingCurrent; 174 | /* 最大工作电流 */ 175 | unsigned short Max_OperatingCurrent; 176 | }; 177 | 178 | /* USB 接口*/ 179 | struct __USBC 180 | { 181 | enum USBC_STATE State; 182 | unsigned char StateChanged_Flag; 183 | unsigned char NeedToProcessMsg_Flag; 184 | enum USBC_CABLE_SIDE Side; 185 | struct PD_PDO_FixedSupply Source_Capabilities[7]; 186 | struct PD_Message_Header TempHeader; 187 | unsigned char Source_Capabilities_NUM; 188 | unsigned char Source_NowIndex; 189 | unsigned char Source_RequestIndex; 190 | unsigned int DO_Raw[8]; 191 | unsigned short Header_Raw; 192 | unsigned char Rx_Buf_Raw[64]; 193 | unsigned char MessageID; 194 | }; 195 | extern struct __USBC USBC; 196 | 197 | 198 | 199 | 200 | void PD_MessageHeader_Process(unsigned short *header_raw,struct PD_Message_Header *Header); 201 | void __LOG_PD_MessageInfo(struct PD_Message_Header header); 202 | void PD_FixedSupply_PDO_Process(unsigned int *pdo_raw,struct PD_PDO_FixedSupply *pdo); 203 | void __LOG_PD_FSPDO_Info(struct PD_PDO_FixedSupply pdo); 204 | void __LOG_PD_Print_All_FSPDOInfo(void); 205 | void PD_RequestPower(unsigned short voltage); 206 | #endif -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32f1xx_hal_can_ex_legacy.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_can_ex_legacy.h 4 | * @author MCD Application Team 5 | * @brief Header file of CAN HAL Extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32F1xx_HAL_CAN_EX_LEGACY_H 22 | #define __STM32F1xx_HAL_CAN_EX_LEGACY_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | #if defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || \ 29 | defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC) 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f1xx_hal_def.h" 33 | 34 | /** @addtogroup STM32F1xx_HAL_Driver 35 | * @{ 36 | */ 37 | 38 | /** @defgroup CANEx CANEx 39 | * @{ 40 | */ 41 | 42 | /* Exported types ------------------------------------------------------------*/ 43 | 44 | /** 45 | * @brief CAN filter configuration structure definition 46 | */ 47 | /* CAN filter banks differences over STM32F1 devices: */ 48 | /* - STM32F1 Connectivity line: 28 filter banks shared between CAN1 and CAN2 */ 49 | /* - Other STM32F10x devices: 14 filter banks */ 50 | 51 | typedef struct 52 | { 53 | uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit 54 | configuration, first one for a 16-bit configuration). 55 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 56 | 57 | uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit 58 | configuration, second one for a 16-bit configuration). 59 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 60 | 61 | uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, 62 | according to the mode (MSBs for a 32-bit configuration, 63 | first one for a 16-bit configuration). 64 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 65 | 66 | uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, 67 | according to the mode (LSBs for a 32-bit configuration, 68 | second one for a 16-bit configuration). 69 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 70 | 71 | uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter. 72 | This parameter can be a value of @ref CAN_filter_FIFO */ 73 | #if defined(STM32F105xC) || defined(STM32F107xC) 74 | uint32_t FilterNumber; /*!< Specifies the filter which will be initialized. 75 | This parameter must be a number between Min_Data = 0 and Max_Data = 27. */ 76 | #else 77 | uint32_t FilterNumber; /*!< Specifies the filter which will be initialized. 78 | This parameter must be a number between Min_Data = 0 and Max_Data = 13. */ 79 | #endif /* STM32F105xC || STM32F107xC */ 80 | uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. 81 | This parameter can be a value of @ref CAN_filter_mode */ 82 | 83 | uint32_t FilterScale; /*!< Specifies the filter scale. 84 | This parameter can be a value of @ref CAN_filter_scale */ 85 | 86 | uint32_t FilterActivation; /*!< Enable or disable the filter. 87 | This parameter can be set to ENABLE or DISABLE. */ 88 | 89 | uint32_t BankNumber; /*!< Select the start slave bank filter 90 | This parameter must be a number between Min_Data = 0 and Max_Data = 28. */ 91 | 92 | }CAN_FilterConfTypeDef; 93 | 94 | /* Exported constants --------------------------------------------------------*/ 95 | /* Exported macro ------------------------------------------------------------*/ 96 | /* Private macro -------------------------------------------------------------*/ 97 | 98 | /** @defgroup CANEx_Private_Macros CAN Extended Private Macros 99 | * @{ 100 | */ 101 | #if defined(STM32F105xC) || defined(STM32F107xC) 102 | #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27U) 103 | #else 104 | #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 13U) 105 | #endif /* STM32F105xC || STM32F107xC */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /** 117 | * @} 118 | */ 119 | 120 | #endif /* STM32F103x6) || STM32F103xB || STM32F103xE || STM32F103xG) || STM32F105xC || STM32F107xC */ 121 | 122 | #ifdef __cplusplus 123 | } 124 | #endif 125 | 126 | #endif /* __STM32F1xx_HAL_CAN_EX_LEGACY_H */ 127 | 128 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 129 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Inc/stm32_assert_template.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32_assert.h 4 | * @author MCD Application Team 5 | * @brief STM32 assert template file. 6 | * This file should be copied to the application folder and renamed 7 | * to stm32_assert.h. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© Copyright (c) 2016 STMicroelectronics. 12 | * All rights reserved.

13 | * 14 | * This software component is licensed by ST under BSD 3-Clause license, 15 | * the "License"; You may not use this file except in compliance with the 16 | * License. You may obtain a copy of the License at: 17 | * opensource.org/licenses/BSD-3-Clause 18 | * 19 | ****************************************************************************** 20 | */ 21 | 22 | /* Define to prevent recursive inclusion -------------------------------------*/ 23 | #ifndef __STM32_ASSERT_H 24 | #define __STM32_ASSERT_H 25 | 26 | #ifdef __cplusplus 27 | extern "C" { 28 | #endif 29 | 30 | /* Exported types ------------------------------------------------------------*/ 31 | /* Exported constants --------------------------------------------------------*/ 32 | /* Includes ------------------------------------------------------------------*/ 33 | /* Exported macro ------------------------------------------------------------*/ 34 | #ifdef USE_FULL_ASSERT 35 | /** 36 | * @brief The assert_param macro is used for function's parameters check. 37 | * @param expr If expr is false, it calls assert_failed function 38 | * which reports the name of the source file and the source 39 | * line number of the call that failed. 40 | * If expr is true, it returns no value. 41 | * @retval None 42 | */ 43 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) 44 | /* Exported functions ------------------------------------------------------- */ 45 | void assert_failed(uint8_t* file, uint32_t line); 46 | #else 47 | #define assert_param(expr) ((void)0U) 48 | #endif /* USE_FULL_ASSERT */ 49 | 50 | #ifdef __cplusplus 51 | } 52 | #endif 53 | 54 | #endif /* __STM32_ASSERT_H */ 55 | 56 | 57 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 58 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_crc.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32F1xx_HAL_CRC_H 22 | #define STM32F1xx_HAL_CRC_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f1xx_hal_def.h" 30 | 31 | /** @addtogroup STM32F1xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup CRC 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /** @defgroup CRC_Exported_Types CRC Exported Types 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @brief CRC HAL State Structure definition 46 | */ 47 | typedef enum 48 | { 49 | HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */ 50 | HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */ 51 | HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */ 52 | HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */ 53 | HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */ 54 | } HAL_CRC_StateTypeDef; 55 | 56 | 57 | /** 58 | * @brief CRC Handle Structure definition 59 | */ 60 | typedef struct 61 | { 62 | CRC_TypeDef *Instance; /*!< Register base address */ 63 | 64 | HAL_LockTypeDef Lock; /*!< CRC Locking object */ 65 | 66 | __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */ 67 | 68 | } CRC_HandleTypeDef; 69 | /** 70 | * @} 71 | */ 72 | 73 | /* Exported constants --------------------------------------------------------*/ 74 | /** @defgroup CRC_Exported_Constants CRC Exported Constants 75 | * @{ 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | /* Exported macros -----------------------------------------------------------*/ 83 | /** @defgroup CRC_Exported_Macros CRC Exported Macros 84 | * @{ 85 | */ 86 | 87 | /** @brief Reset CRC handle state. 88 | * @param __HANDLE__ CRC handle. 89 | * @retval None 90 | */ 91 | #define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET) 92 | 93 | /** 94 | * @brief Reset CRC Data Register. 95 | * @param __HANDLE__ CRC handle 96 | * @retval None 97 | */ 98 | #define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET) 99 | 100 | /** 101 | * @brief Store data in the Independent Data (ID) register. 102 | * @param __HANDLE__ CRC handle 103 | * @param __VALUE__ Value to be stored in the ID register 104 | * @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits 105 | * @retval None 106 | */ 107 | #define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__))) 108 | 109 | /** 110 | * @brief Return the data stored in the Independent Data (ID) register. 111 | * @param __HANDLE__ CRC handle 112 | * @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits 113 | * @retval Value of the ID register 114 | */ 115 | #define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR) 116 | /** 117 | * @} 118 | */ 119 | 120 | 121 | /* Private macros --------------------------------------------------------*/ 122 | /** @defgroup CRC_Private_Macros CRC Private Macros 123 | * @{ 124 | */ 125 | 126 | /** 127 | * @} 128 | */ 129 | 130 | /* Exported functions --------------------------------------------------------*/ 131 | /** @defgroup CRC_Exported_Functions CRC Exported Functions 132 | * @{ 133 | */ 134 | 135 | /* Initialization and de-initialization functions ****************************/ 136 | /** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions 137 | * @{ 138 | */ 139 | HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc); 140 | HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc); 141 | void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc); 142 | void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc); 143 | /** 144 | * @} 145 | */ 146 | 147 | /* Peripheral Control functions ***********************************************/ 148 | /** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions 149 | * @{ 150 | */ 151 | uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); 152 | uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); 153 | /** 154 | * @} 155 | */ 156 | 157 | /* Peripheral State and Error functions ***************************************/ 158 | /** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions 159 | * @{ 160 | */ 161 | HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc); 162 | /** 163 | * @} 164 | */ 165 | 166 | /** 167 | * @} 168 | */ 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | #ifdef __cplusplus 179 | } 180 | #endif 181 | 182 | #endif /* STM32F1xx_HAL_CRC_H */ 183 | 184 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 185 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_def.h 4 | * @author MCD Application Team 5 | * @brief This file contains HAL common defines, enumeration, macros and 6 | * structures definitions. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | *

© Copyright (c) 2017 STMicroelectronics. 11 | * All rights reserved.

12 | * 13 | * This software component is licensed by ST under BSD 3-Clause license, 14 | * the "License"; You may not use this file except in compliance with the 15 | * License. You may obtain a copy of the License at: 16 | * opensource.org/licenses/BSD-3-Clause 17 | * 18 | ****************************************************************************** 19 | */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef __STM32F1xx_HAL_DEF 23 | #define __STM32F1xx_HAL_DEF 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32f1xx.h" 31 | #include "Legacy/stm32_hal_legacy.h" 32 | #include 33 | 34 | /* Exported types ------------------------------------------------------------*/ 35 | 36 | /** 37 | * @brief HAL Status structures definition 38 | */ 39 | typedef enum 40 | { 41 | HAL_OK = 0x00U, 42 | HAL_ERROR = 0x01U, 43 | HAL_BUSY = 0x02U, 44 | HAL_TIMEOUT = 0x03U 45 | } HAL_StatusTypeDef; 46 | 47 | /** 48 | * @brief HAL Lock structures definition 49 | */ 50 | typedef enum 51 | { 52 | HAL_UNLOCKED = 0x00U, 53 | HAL_LOCKED = 0x01U 54 | } HAL_LockTypeDef; 55 | 56 | /* Exported macro ------------------------------------------------------------*/ 57 | #define HAL_MAX_DELAY 0xFFFFFFFFU 58 | 59 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != 0U) 60 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) 61 | 62 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ 63 | do{ \ 64 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ 65 | (__DMA_HANDLE__).Parent = (__HANDLE__); \ 66 | } while(0U) 67 | 68 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ 69 | 70 | /** @brief Reset the Handle's State field. 71 | * @param __HANDLE__ specifies the Peripheral Handle. 72 | * @note This macro can be used for the following purpose: 73 | * - When the Handle is declared as local variable; before passing it as parameter 74 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 75 | * to set to 0 the Handle's "State" field. 76 | * Otherwise, "State" field may have any random value and the first time the function 77 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 78 | * (i.e. HAL_PPP_MspInit() will not be executed). 79 | * - When there is a need to reconfigure the low level hardware: instead of calling 80 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 81 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function 82 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 83 | * @retval None 84 | */ 85 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U) 86 | 87 | #if (USE_RTOS == 1U) 88 | /* Reserved for future use */ 89 | #error "USE_RTOS should be 0 in the current HAL release" 90 | #else 91 | #define __HAL_LOCK(__HANDLE__) \ 92 | do{ \ 93 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 94 | { \ 95 | return HAL_BUSY; \ 96 | } \ 97 | else \ 98 | { \ 99 | (__HANDLE__)->Lock = HAL_LOCKED; \ 100 | } \ 101 | }while (0U) 102 | 103 | #define __HAL_UNLOCK(__HANDLE__) \ 104 | do{ \ 105 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 106 | }while (0U) 107 | #endif /* USE_RTOS */ 108 | 109 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */ 110 | #ifndef __weak 111 | #define __weak __attribute__((weak)) 112 | #endif 113 | #ifndef __packed 114 | #define __packed __attribute__((packed)) 115 | #endif 116 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 117 | #ifndef __weak 118 | #define __weak __attribute__((weak)) 119 | #endif /* __weak */ 120 | #ifndef __packed 121 | #define __packed __attribute__((__packed__)) 122 | #endif /* __packed */ 123 | #endif /* __GNUC__ */ 124 | 125 | 126 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 127 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */ 128 | #ifndef __ALIGN_BEGIN 129 | #define __ALIGN_BEGIN 130 | #endif 131 | #ifndef __ALIGN_END 132 | #define __ALIGN_END __attribute__ ((aligned (4))) 133 | #endif 134 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 135 | #ifndef __ALIGN_END 136 | #define __ALIGN_END __attribute__ ((aligned (4))) 137 | #endif /* __ALIGN_END */ 138 | #ifndef __ALIGN_BEGIN 139 | #define __ALIGN_BEGIN 140 | #endif /* __ALIGN_BEGIN */ 141 | #else 142 | #ifndef __ALIGN_END 143 | #define __ALIGN_END 144 | #endif /* __ALIGN_END */ 145 | #ifndef __ALIGN_BEGIN 146 | #if defined (__CC_ARM) /* ARM Compiler V5*/ 147 | #define __ALIGN_BEGIN __align(4) 148 | #elif defined (__ICCARM__) /* IAR Compiler */ 149 | #define __ALIGN_BEGIN 150 | #endif /* __CC_ARM */ 151 | #endif /* __ALIGN_BEGIN */ 152 | #endif /* __GNUC__ */ 153 | 154 | 155 | /** 156 | * @brief __RAM_FUNC definition 157 | */ 158 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) 159 | /* ARM Compiler V4/V5 and V6 160 | -------------------------- 161 | RAM functions are defined using the toolchain options. 162 | Functions that are executed in RAM should reside in a separate source module. 163 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 164 | area of a module to a memory space in physical RAM. 165 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 166 | dialog. 167 | */ 168 | #define __RAM_FUNC 169 | 170 | #elif defined ( __ICCARM__ ) 171 | /* ICCARM Compiler 172 | --------------- 173 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 174 | */ 175 | #define __RAM_FUNC __ramfunc 176 | 177 | #elif defined ( __GNUC__ ) 178 | /* GNU Compiler 179 | ------------ 180 | RAM functions are defined using a specific toolchain attribute 181 | "__attribute__((section(".RamFunc")))". 182 | */ 183 | #define __RAM_FUNC __attribute__((section(".RamFunc"))) 184 | 185 | #endif 186 | 187 | /** 188 | * @brief __NOINLINE definition 189 | */ 190 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ ) 191 | /* ARM V4/V5 and V6 & GNU Compiler 192 | ------------------------------- 193 | */ 194 | #define __NOINLINE __attribute__ ( (noinline) ) 195 | 196 | #elif defined ( __ICCARM__ ) 197 | /* ICCARM Compiler 198 | --------------- 199 | */ 200 | #define __NOINLINE _Pragma("optimize = no_inline") 201 | 202 | #endif 203 | 204 | #ifdef __cplusplus 205 | } 206 | #endif 207 | 208 | #endif /* ___STM32F1xx_HAL_DEF */ 209 | 210 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 211 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_iwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of IWDG HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32F1xx_HAL_IWDG_H 22 | #define STM32F1xx_HAL_IWDG_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f1xx_hal_def.h" 30 | 31 | /** @addtogroup STM32F1xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @defgroup IWDG IWDG 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /** @defgroup IWDG_Exported_Types IWDG Exported Types 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @brief IWDG Init structure definition 46 | */ 47 | typedef struct 48 | { 49 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. 50 | This parameter can be a value of @ref IWDG_Prescaler */ 51 | 52 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. 53 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 54 | 55 | } IWDG_InitTypeDef; 56 | 57 | /** 58 | * @brief IWDG Handle Structure definition 59 | */ 60 | typedef struct 61 | { 62 | IWDG_TypeDef *Instance; /*!< Register base address */ 63 | 64 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ 65 | } IWDG_HandleTypeDef; 66 | 67 | 68 | /** 69 | * @} 70 | */ 71 | 72 | /* Exported constants --------------------------------------------------------*/ 73 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants 74 | * @{ 75 | */ 76 | 77 | /** @defgroup IWDG_Prescaler IWDG Prescaler 78 | * @{ 79 | */ 80 | #define IWDG_PRESCALER_4 0x00000000U /*!< IWDG prescaler set to 4 */ 81 | #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ 82 | #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ 83 | #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ 84 | #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ 85 | #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ 86 | #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ 87 | 88 | /** 89 | * @} 90 | */ 91 | 92 | 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | /* Exported macros -----------------------------------------------------------*/ 99 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros 100 | * @{ 101 | */ 102 | 103 | /** 104 | * @brief Enable the IWDG peripheral. 105 | * @param __HANDLE__ IWDG handle 106 | * @retval None 107 | */ 108 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) 109 | 110 | /** 111 | * @brief Reload IWDG counter with value defined in the reload register 112 | * (write access to IWDG_PR and IWDG_RLR registers disabled). 113 | * @param __HANDLE__ IWDG handle 114 | * @retval None 115 | */ 116 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) 117 | 118 | /** 119 | * @} 120 | */ 121 | 122 | /* Exported functions --------------------------------------------------------*/ 123 | /** @defgroup IWDG_Exported_Functions IWDG Exported Functions 124 | * @{ 125 | */ 126 | 127 | /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions 128 | * @{ 129 | */ 130 | /* Initialization/Start functions ********************************************/ 131 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); 132 | /** 133 | * @} 134 | */ 135 | 136 | /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions 137 | * @{ 138 | */ 139 | /* I/O operation functions ****************************************************/ 140 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); 141 | /** 142 | * @} 143 | */ 144 | 145 | /** 146 | * @} 147 | */ 148 | 149 | /* Private constants ---------------------------------------------------------*/ 150 | /** @defgroup IWDG_Private_Constants IWDG Private Constants 151 | * @{ 152 | */ 153 | 154 | /** 155 | * @brief IWDG Key Register BitMask 156 | */ 157 | #define IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ 158 | #define IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ 159 | #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ 160 | #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ 161 | 162 | /** 163 | * @} 164 | */ 165 | 166 | /* Private macros ------------------------------------------------------------*/ 167 | /** @defgroup IWDG_Private_Macros IWDG Private Macros 168 | * @{ 169 | */ 170 | 171 | /** 172 | * @brief Enable write access to IWDG_PR and IWDG_RLR registers. 173 | * @param __HANDLE__ IWDG handle 174 | * @retval None 175 | */ 176 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) 177 | 178 | /** 179 | * @brief Disable write access to IWDG_PR and IWDG_RLR registers. 180 | * @param __HANDLE__ IWDG handle 181 | * @retval None 182 | */ 183 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) 184 | 185 | /** 186 | * @brief Check IWDG prescaler value. 187 | * @param __PRESCALER__ IWDG prescaler value 188 | * @retval None 189 | */ 190 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ 191 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ 192 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ 193 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ 194 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ 195 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ 196 | ((__PRESCALER__) == IWDG_PRESCALER_256)) 197 | 198 | /** 199 | * @brief Check IWDG reload value. 200 | * @param __RELOAD__ IWDG reload value 201 | * @retval None 202 | */ 203 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) 204 | 205 | 206 | 207 | /** 208 | * @} 209 | */ 210 | 211 | /** 212 | * @} 213 | */ 214 | 215 | /** 216 | * @} 217 | */ 218 | 219 | 220 | #ifdef __cplusplus 221 | } 222 | #endif 223 | 224 | #endif /* STM32F1xx_HAL_IWDG_H */ 225 | 226 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 227 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_pcd_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of PCD HAL Extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32F1xx_HAL_PCD_EX_H 22 | #define STM32F1xx_HAL_PCD_EX_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f1xx_hal_def.h" 30 | 31 | #if defined (USB) || defined (USB_OTG_FS) 32 | /** @addtogroup STM32F1xx_HAL_Driver 33 | * @{ 34 | */ 35 | 36 | /** @addtogroup PCDEx 37 | * @{ 38 | */ 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macros -----------------------------------------------------------*/ 42 | /* Exported functions --------------------------------------------------------*/ 43 | /** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions 44 | * @{ 45 | */ 46 | /** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 47 | * @{ 48 | */ 49 | 50 | #if defined (USB_OTG_FS) 51 | HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size); 52 | HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size); 53 | #endif /* defined (USB_OTG_FS) */ 54 | 55 | #if defined (USB) 56 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, 57 | uint16_t ep_kind, uint32_t pmaadress); 58 | 59 | void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state); 60 | #endif /* defined (USB) */ 61 | void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); 62 | void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /** 69 | * @} 70 | */ 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** 77 | * @} 78 | */ 79 | #endif /* defined (USB) || defined (USB_OTG_FS) */ 80 | 81 | #ifdef __cplusplus 82 | } 83 | #endif 84 | 85 | 86 | #endif /* STM32F1xx_HAL_PCD_EX_H */ 87 | 88 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 89 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_crc.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC LL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32F1xx_LL_CRC_H 22 | #define STM32F1xx_LL_CRC_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f1xx.h" 30 | 31 | /** @addtogroup STM32F1xx_LL_Driver 32 | * @{ 33 | */ 34 | 35 | #if defined(CRC) 36 | 37 | /** @defgroup CRC_LL CRC 38 | * @{ 39 | */ 40 | 41 | /* Private types -------------------------------------------------------------*/ 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* Private constants ---------------------------------------------------------*/ 44 | /* Private macros ------------------------------------------------------------*/ 45 | 46 | /* Exported types ------------------------------------------------------------*/ 47 | /* Exported constants --------------------------------------------------------*/ 48 | /** @defgroup CRC_LL_Exported_Constants CRC Exported Constants 49 | * @{ 50 | */ 51 | 52 | /** 53 | * @} 54 | */ 55 | 56 | /* Exported macro ------------------------------------------------------------*/ 57 | /** @defgroup CRC_LL_Exported_Macros CRC Exported Macros 58 | * @{ 59 | */ 60 | 61 | /** @defgroup CRC_LL_EM_WRITE_READ Common Write and read registers Macros 62 | * @{ 63 | */ 64 | 65 | /** 66 | * @brief Write a value in CRC register 67 | * @param __INSTANCE__ CRC Instance 68 | * @param __REG__ Register to be written 69 | * @param __VALUE__ Value to be written in the register 70 | * @retval None 71 | */ 72 | #define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, __VALUE__) 73 | 74 | /** 75 | * @brief Read a value in CRC register 76 | * @param __INSTANCE__ CRC Instance 77 | * @param __REG__ Register to be read 78 | * @retval Register value 79 | */ 80 | #define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 81 | /** 82 | * @} 83 | */ 84 | 85 | /** 86 | * @} 87 | */ 88 | 89 | 90 | /* Exported functions --------------------------------------------------------*/ 91 | /** @defgroup CRC_LL_Exported_Functions CRC Exported Functions 92 | * @{ 93 | */ 94 | 95 | /** @defgroup CRC_LL_EF_Configuration CRC Configuration functions 96 | * @{ 97 | */ 98 | 99 | /** 100 | * @brief Reset the CRC calculation unit. 101 | * @note If Programmable Initial CRC value feature 102 | * is available, also set the Data Register to the value stored in the 103 | * CRC_INIT register, otherwise, reset Data Register to its default value. 104 | * @rmtoll CR RESET LL_CRC_ResetCRCCalculationUnit 105 | * @param CRCx CRC Instance 106 | * @retval None 107 | */ 108 | __STATIC_INLINE void LL_CRC_ResetCRCCalculationUnit(CRC_TypeDef *CRCx) 109 | { 110 | SET_BIT(CRCx->CR, CRC_CR_RESET); 111 | } 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | /** @defgroup CRC_LL_EF_Data_Management Data_Management 118 | * @{ 119 | */ 120 | 121 | /** 122 | * @brief Write given 32-bit data to the CRC calculator 123 | * @rmtoll DR DR LL_CRC_FeedData32 124 | * @param CRCx CRC Instance 125 | * @param InData value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFFFFFF 126 | * @retval None 127 | */ 128 | __STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData) 129 | { 130 | WRITE_REG(CRCx->DR, InData); 131 | } 132 | 133 | /** 134 | * @brief Return current CRC calculation result. 32 bits value is returned. 135 | * @rmtoll DR DR LL_CRC_ReadData32 136 | * @param CRCx CRC Instance 137 | * @retval Current CRC calculation result as stored in CRC_DR register (32 bits). 138 | */ 139 | __STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx) 140 | { 141 | return (uint32_t)(READ_REG(CRCx->DR)); 142 | } 143 | 144 | /** 145 | * @brief Return data stored in the Independent Data(IDR) register. 146 | * @note This register can be used as a temporary storage location for one byte. 147 | * @rmtoll IDR IDR LL_CRC_Read_IDR 148 | * @param CRCx CRC Instance 149 | * @retval Value stored in CRC_IDR register (General-purpose 8-bit data register). 150 | */ 151 | __STATIC_INLINE uint32_t LL_CRC_Read_IDR(CRC_TypeDef *CRCx) 152 | { 153 | return (uint32_t)(READ_REG(CRCx->IDR)); 154 | } 155 | 156 | /** 157 | * @brief Store data in the Independent Data(IDR) register. 158 | * @note This register can be used as a temporary storage location for one byte. 159 | * @rmtoll IDR IDR LL_CRC_Write_IDR 160 | * @param CRCx CRC Instance 161 | * @param InData value to be stored in CRC_IDR register (8-bit) between Min_Data=0 and Max_Data=0xFF 162 | * @retval None 163 | */ 164 | __STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData) 165 | { 166 | *((uint8_t __IO *)(&CRCx->IDR)) = (uint8_t) InData; 167 | } 168 | /** 169 | * @} 170 | */ 171 | 172 | #if defined(USE_FULL_LL_DRIVER) 173 | /** @defgroup CRC_LL_EF_Init Initialization and de-initialization functions 174 | * @{ 175 | */ 176 | 177 | ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx); 178 | 179 | /** 180 | * @} 181 | */ 182 | #endif /* USE_FULL_LL_DRIVER */ 183 | 184 | /** 185 | * @} 186 | */ 187 | 188 | /** 189 | * @} 190 | */ 191 | 192 | #endif /* defined(CRC) */ 193 | 194 | /** 195 | * @} 196 | */ 197 | 198 | #ifdef __cplusplus 199 | } 200 | #endif 201 | 202 | #endif /* STM32F1xx_LL_CRC_H */ 203 | 204 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 205 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_gpio_ex.c 4 | * @author MCD Application Team 5 | * @brief GPIO Extension HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the General Purpose Input/Output (GPIO) extension peripheral. 8 | * + Extended features functions 9 | * 10 | @verbatim 11 | ============================================================================== 12 | ##### GPIO Peripheral extension features ##### 13 | ============================================================================== 14 | [..] GPIO module on STM32F1 family, manage also the AFIO register: 15 | (+) Possibility to use the EVENTOUT Cortex feature 16 | 17 | ##### How to use this driver ##### 18 | ============================================================================== 19 | [..] This driver provides functions to use EVENTOUT Cortex feature 20 | (#) Configure EVENTOUT Cortex feature using the function HAL_GPIOEx_ConfigEventout() 21 | (#) Activate EVENTOUT Cortex feature using the HAL_GPIOEx_EnableEventout() 22 | (#) Deactivate EVENTOUT Cortex feature using the HAL_GPIOEx_DisableEventout() 23 | 24 | @endverbatim 25 | ****************************************************************************** 26 | * @attention 27 | * 28 | *

© Copyright (c) 2016 STMicroelectronics. 29 | * All rights reserved.

30 | * 31 | * This software component is licensed by ST under BSD 3-Clause license, 32 | * the "License"; You may not use this file except in compliance with the 33 | * License. You may obtain a copy of the License at: 34 | * opensource.org/licenses/BSD-3-Clause 35 | * 36 | ****************************************************************************** 37 | */ 38 | 39 | /* Includes ------------------------------------------------------------------*/ 40 | #include "stm32f1xx_hal.h" 41 | 42 | /** @addtogroup STM32F1xx_HAL_Driver 43 | * @{ 44 | */ 45 | 46 | /** @defgroup GPIOEx GPIOEx 47 | * @brief GPIO HAL module driver 48 | * @{ 49 | */ 50 | 51 | #ifdef HAL_GPIO_MODULE_ENABLED 52 | 53 | /** @defgroup GPIOEx_Exported_Functions GPIOEx Exported Functions 54 | * @{ 55 | */ 56 | 57 | /** @defgroup GPIOEx_Exported_Functions_Group1 Extended features functions 58 | * @brief Extended features functions 59 | * 60 | @verbatim 61 | ============================================================================== 62 | ##### Extended features functions ##### 63 | ============================================================================== 64 | [..] This section provides functions allowing to: 65 | (+) Configure EVENTOUT Cortex feature using the function HAL_GPIOEx_ConfigEventout() 66 | (+) Activate EVENTOUT Cortex feature using the HAL_GPIOEx_EnableEventout() 67 | (+) Deactivate EVENTOUT Cortex feature using the HAL_GPIOEx_DisableEventout() 68 | 69 | @endverbatim 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief Configures the port and pin on which the EVENTOUT Cortex signal will be connected. 75 | * @param GPIO_PortSource Select the port used to output the Cortex EVENTOUT signal. 76 | * This parameter can be a value of @ref GPIOEx_EVENTOUT_PORT. 77 | * @param GPIO_PinSource Select the pin used to output the Cortex EVENTOUT signal. 78 | * This parameter can be a value of @ref GPIOEx_EVENTOUT_PIN. 79 | * @retval None 80 | */ 81 | void HAL_GPIOEx_ConfigEventout(uint32_t GPIO_PortSource, uint32_t GPIO_PinSource) 82 | { 83 | /* Verify the parameters */ 84 | assert_param(IS_AFIO_EVENTOUT_PORT(GPIO_PortSource)); 85 | assert_param(IS_AFIO_EVENTOUT_PIN(GPIO_PinSource)); 86 | 87 | /* Apply the new configuration */ 88 | MODIFY_REG(AFIO->EVCR, (AFIO_EVCR_PORT) | (AFIO_EVCR_PIN), (GPIO_PortSource) | (GPIO_PinSource)); 89 | } 90 | 91 | /** 92 | * @brief Enables the Event Output. 93 | * @retval None 94 | */ 95 | void HAL_GPIOEx_EnableEventout(void) 96 | { 97 | SET_BIT(AFIO->EVCR, AFIO_EVCR_EVOE); 98 | } 99 | 100 | /** 101 | * @brief Disables the Event Output. 102 | * @retval None 103 | */ 104 | void HAL_GPIOEx_DisableEventout(void) 105 | { 106 | CLEAR_BIT(AFIO->EVCR, AFIO_EVCR_EVOE); 107 | } 108 | 109 | /** 110 | * @} 111 | */ 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | #endif /* HAL_GPIO_MODULE_ENABLED */ 118 | 119 | /** 120 | * @} 121 | */ 122 | 123 | /** 124 | * @} 125 | */ 126 | 127 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 128 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_msp_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_msp_template.c 4 | * @author MCD Application Team 5 | * @brief HAL BSP module. 6 | * This file template is located in the HAL folder and should be copied 7 | * to the user folder. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© Copyright (c) 2016 STMicroelectronics. 12 | * All rights reserved.

13 | * 14 | * This software component is licensed by ST under BSD 3-Clause license, 15 | * the "License"; You may not use this file except in compliance with the 16 | * License. You may obtain a copy of the License at: 17 | * opensource.org/licenses/BSD-3-Clause 18 | * 19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f1xx_hal.h" 24 | 25 | /** @addtogroup STM32F1xx_HAL_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup HAL_MSP HAL_MSP 30 | * @brief HAL MSP module. 31 | * @{ 32 | */ 33 | 34 | /* Private typedef -----------------------------------------------------------*/ 35 | /* Private define ------------------------------------------------------------*/ 36 | /* Private macro -------------------------------------------------------------*/ 37 | /* Private variables ---------------------------------------------------------*/ 38 | /* Private function prototypes -----------------------------------------------*/ 39 | /* Private functions ---------------------------------------------------------*/ 40 | 41 | /** @defgroup HAL_MSP_Exported_Functions HAL MSP Exported Functions 42 | * @{ 43 | */ 44 | 45 | /** 46 | * @brief Initializes the Global MSP. 47 | * @retval None 48 | */ 49 | void HAL_MspInit(void) 50 | { 51 | 52 | } 53 | 54 | /** 55 | * @brief DeInitializes the Global MSP. 56 | * @retval None 57 | */ 58 | void HAL_MspDeInit(void) 59 | { 60 | 61 | } 62 | 63 | /** 64 | * @brief Initializes the PPP MSP. 65 | * @retval None 66 | */ 67 | void HAL_PPP_MspInit(void) 68 | { 69 | 70 | } 71 | 72 | /** 73 | * @brief DeInitializes the PPP MSP. 74 | * @retval None 75 | */ 76 | void HAL_PPP_MspDeInit(void) 77 | { 78 | 79 | } 80 | 81 | /** 82 | * @} 83 | */ 84 | 85 | /** 86 | * @} 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 94 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Spray0/SP_DEVKIT_PDDKB/864a2d0f2f962db88303d614097924f61d78c241/PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_tim_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_timebase_tim_template.c 4 | * @author MCD Application Team 5 | * @brief HAL time base based on the hardware TIM Template. 6 | * 7 | * This file overrides the native HAL time base functions (defined as weak) 8 | * the TIM time base: 9 | * + Intializes the TIM peripheral generate a Period elapsed Event each 1ms 10 | * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms 11 | * 12 | ****************************************************************************** 13 | * @attention 14 | * 15 | *

© Copyright (c) 2017 STMicroelectronics. 16 | * All rights reserved.

17 | * 18 | * This software component is licensed by ST under BSD 3-Clause license, 19 | * the "License"; You may not use this file except in compliance with the 20 | * License. You may obtain a copy of the License at: 21 | * opensource.org/licenses/BSD-3-Clause 22 | * 23 | ****************************************************************************** 24 | */ 25 | 26 | /* Includes ------------------------------------------------------------------*/ 27 | #include "stm32f1xx_hal.h" 28 | 29 | /** @addtogroup STM32F1xx_HAL_Driver 30 | * @{ 31 | */ 32 | 33 | /** @addtogroup HAL_TimeBase_TIM 34 | * @{ 35 | */ 36 | 37 | /* Private typedef -----------------------------------------------------------*/ 38 | /* Private define ------------------------------------------------------------*/ 39 | /* Private macro -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | TIM_HandleTypeDef TimHandle; 42 | /* Private function prototypes -----------------------------------------------*/ 43 | void TIM2_IRQHandler(void); 44 | /* Private functions ---------------------------------------------------------*/ 45 | 46 | /** 47 | * @brief This function configures the TIM2 as a time base source. 48 | * The time source is configured to have 1ms time base with a dedicated 49 | * Tick interrupt priority. 50 | * @note This function is called automatically at the beginning of program after 51 | * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). 52 | * @param TickPriority Tick interrupt priority. 53 | * @retval HAL status 54 | */ 55 | HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) 56 | { 57 | RCC_ClkInitTypeDef clkconfig; 58 | uint32_t uwTimclock, uwAPB1Prescaler = 0U; 59 | uint32_t uwPrescalerValue = 0U; 60 | uint32_t pFLatency; 61 | HAL_StatusTypeDef status = HAL_OK; 62 | 63 | 64 | /* Enable TIM2 clock */ 65 | __HAL_RCC_TIM2_CLK_ENABLE(); 66 | 67 | /* Get clock configuration */ 68 | HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); 69 | 70 | /* Get APB1 prescaler */ 71 | uwAPB1Prescaler = clkconfig.APB1CLKDivider; 72 | 73 | /* Compute TIM2 clock */ 74 | if (uwAPB1Prescaler == RCC_HCLK_DIV1) 75 | { 76 | uwTimclock = HAL_RCC_GetPCLK1Freq(); 77 | } 78 | else 79 | { 80 | uwTimclock = 2 * HAL_RCC_GetPCLK1Freq(); 81 | } 82 | 83 | /* Compute the prescaler value to have TIM2 counter clock equal to 1MHz */ 84 | uwPrescalerValue = (uint32_t)((uwTimclock / 1000000U) - 1U); 85 | 86 | /* Initialize TIM2 */ 87 | TimHandle.Instance = TIM2; 88 | 89 | /* Initialize TIMx peripheral as follow: 90 | + Period = [(TIM2CLK/1000) - 1]. to have a (1/1000) s time base. 91 | + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. 92 | + ClockDivision = 0 93 | + Counter direction = Up 94 | */ 95 | TimHandle.Init.Period = (1000000U / 1000U) - 1U; 96 | TimHandle.Init.Prescaler = uwPrescalerValue; 97 | TimHandle.Init.ClockDivision = 0U; 98 | TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP; 99 | TimHandle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 100 | status = HAL_TIM_Base_Init(&TimHandle); 101 | if (status == HAL_OK) 102 | { 103 | /* Start the TIM time Base generation in interrupt mode */ 104 | status = HAL_TIM_Base_Start_IT(&TimHandle); 105 | if (status == HAL_OK) 106 | { 107 | /* Enable the TIM2 global Interrupt */ 108 | HAL_NVIC_EnableIRQ(TIM2_IRQn); 109 | 110 | if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 111 | { 112 | /*Configure the TIM2 IRQ priority */ 113 | HAL_NVIC_SetPriority(TIM2_IRQn, TickPriority ,0); 114 | uwTickPrio = TickPriority; 115 | } 116 | else 117 | { 118 | status = HAL_ERROR; 119 | } 120 | } 121 | } 122 | 123 | /* Return function status */ 124 | return status; 125 | } 126 | 127 | /** 128 | * @brief Suspend Tick increment. 129 | * @note Disable the tick increment by disabling TIM2 update interrupt. 130 | * @retval None 131 | */ 132 | void HAL_SuspendTick(void) 133 | { 134 | /* Disable TIM2 update Interrupt */ 135 | __HAL_TIM_DISABLE_IT(&TimHandle, TIM_IT_UPDATE); 136 | } 137 | 138 | /** 139 | * @brief Resume Tick increment. 140 | * @note Enable the tick increment by Enabling TIM2 update interrupt. 141 | * @retval None 142 | */ 143 | void HAL_ResumeTick(void) 144 | { 145 | /* Enable TIM2 Update interrupt */ 146 | __HAL_TIM_ENABLE_IT(&TimHandle, TIM_IT_UPDATE); 147 | } 148 | 149 | /** 150 | * @brief Period elapsed callback in non blocking mode 151 | * @note This function is called when TIM2 interrupt took place, inside 152 | * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment 153 | * a global variable "uwTick" used as application time base. 154 | * @param htim TIM handle 155 | * @retval None 156 | */ 157 | void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) 158 | { 159 | HAL_IncTick(); 160 | } 161 | 162 | /** 163 | * @brief This function handles TIM interrupt request. 164 | * @retval None 165 | */ 166 | void TIM2_IRQHandler(void) 167 | { 168 | HAL_TIM_IRQHandler(&TimHandle); 169 | } 170 | 171 | /** 172 | * @} 173 | */ 174 | 175 | /** 176 | * @} 177 | */ 178 | 179 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 180 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_wwdg.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Spray0/SP_DEVKIT_PDDKB/864a2d0f2f962db88303d614097924f61d78c241/PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_wwdg.c -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_crc.c 4 | * @author MCD Application Team 5 | * @brief CRC LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f1xx_ll_crc.h" 23 | #include "stm32f1xx_ll_bus.h" 24 | 25 | #ifdef USE_FULL_ASSERT 26 | #include "stm32_assert.h" 27 | #else 28 | #define assert_param(expr) ((void)0U) 29 | #endif 30 | 31 | /** @addtogroup STM32F1xx_LL_Driver 32 | * @{ 33 | */ 34 | 35 | #if defined (CRC) 36 | 37 | /** @addtogroup CRC_LL 38 | * @{ 39 | */ 40 | 41 | /* Private types -------------------------------------------------------------*/ 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* Private constants ---------------------------------------------------------*/ 44 | /* Private macros ------------------------------------------------------------*/ 45 | /* Private function prototypes -----------------------------------------------*/ 46 | 47 | /* Exported functions --------------------------------------------------------*/ 48 | /** @addtogroup CRC_LL_Exported_Functions 49 | * @{ 50 | */ 51 | 52 | /** @addtogroup CRC_LL_EF_Init 53 | * @{ 54 | */ 55 | 56 | /** 57 | * @brief De-initialize CRC registers (Registers restored to their default values). 58 | * @param CRCx CRC Instance 59 | * @retval An ErrorStatus enumeration value: 60 | * - SUCCESS: CRC registers are de-initialized 61 | * - ERROR: CRC registers are not de-initialized 62 | */ 63 | ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx) 64 | { 65 | ErrorStatus status = SUCCESS; 66 | 67 | /* Check the parameters */ 68 | assert_param(IS_CRC_ALL_INSTANCE(CRCx)); 69 | 70 | if (CRCx == CRC) 71 | { 72 | 73 | /* Reset the CRC calculation unit */ 74 | LL_CRC_ResetCRCCalculationUnit(CRCx); 75 | 76 | /* Reset IDR register */ 77 | LL_CRC_Write_IDR(CRCx, 0x00U); 78 | } 79 | else 80 | { 81 | status = ERROR; 82 | } 83 | 84 | return (status); 85 | } 86 | 87 | /** 88 | * @} 89 | */ 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | #endif /* defined (CRC) */ 100 | 101 | /** 102 | * @} 103 | */ 104 | 105 | #endif /* USE_FULL_LL_DRIVER */ 106 | 107 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 108 | 109 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_exti.c 4 | * @author MCD Application Team 5 | * @brief EXTI LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | #if defined(USE_FULL_LL_DRIVER) 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f1xx_ll_exti.h" 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif 29 | 30 | /** @addtogroup STM32F1xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (EXTI) 35 | 36 | /** @defgroup EXTI_LL EXTI 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /** @addtogroup EXTI_LL_Private_Macros 45 | * @{ 46 | */ 47 | 48 | #define IS_LL_EXTI_LINE_0_31(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U) 49 | 50 | #define IS_LL_EXTI_MODE(__VALUE__) (((__VALUE__) == LL_EXTI_MODE_IT) \ 51 | || ((__VALUE__) == LL_EXTI_MODE_EVENT) \ 52 | || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT)) 53 | 54 | 55 | #define IS_LL_EXTI_TRIGGER(__VALUE__) (((__VALUE__) == LL_EXTI_TRIGGER_NONE) \ 56 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING) \ 57 | || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING) \ 58 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING)) 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | /* Private function prototypes -----------------------------------------------*/ 65 | 66 | /* Exported functions --------------------------------------------------------*/ 67 | /** @addtogroup EXTI_LL_Exported_Functions 68 | * @{ 69 | */ 70 | 71 | /** @addtogroup EXTI_LL_EF_Init 72 | * @{ 73 | */ 74 | 75 | /** 76 | * @brief De-initialize the EXTI registers to their default reset values. 77 | * @retval An ErrorStatus enumeration value: 78 | * - SUCCESS: EXTI registers are de-initialized 79 | * - ERROR: not applicable 80 | */ 81 | uint32_t LL_EXTI_DeInit(void) 82 | { 83 | /* Interrupt mask register set to default reset values */ 84 | LL_EXTI_WriteReg(IMR, 0x00000000U); 85 | /* Event mask register set to default reset values */ 86 | LL_EXTI_WriteReg(EMR, 0x00000000U); 87 | /* Rising Trigger selection register set to default reset values */ 88 | LL_EXTI_WriteReg(RTSR, 0x00000000U); 89 | /* Falling Trigger selection register set to default reset values */ 90 | LL_EXTI_WriteReg(FTSR, 0x00000000U); 91 | /* Software interrupt event register set to default reset values */ 92 | LL_EXTI_WriteReg(SWIER, 0x00000000U); 93 | /* Pending register clear */ 94 | LL_EXTI_WriteReg(PR, 0x000FFFFFU); 95 | 96 | return SUCCESS; 97 | } 98 | 99 | /** 100 | * @brief Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct. 101 | * @param EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure. 102 | * @retval An ErrorStatus enumeration value: 103 | * - SUCCESS: EXTI registers are initialized 104 | * - ERROR: not applicable 105 | */ 106 | uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct) 107 | { 108 | ErrorStatus status = SUCCESS; 109 | /* Check the parameters */ 110 | assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31)); 111 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand)); 112 | assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode)); 113 | 114 | /* ENABLE LineCommand */ 115 | if (EXTI_InitStruct->LineCommand != DISABLE) 116 | { 117 | assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger)); 118 | 119 | /* Configure EXTI Lines in range from 0 to 31 */ 120 | if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE) 121 | { 122 | switch (EXTI_InitStruct->Mode) 123 | { 124 | case LL_EXTI_MODE_IT: 125 | /* First Disable Event on provided Lines */ 126 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 127 | /* Then Enable IT on provided Lines */ 128 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 129 | break; 130 | case LL_EXTI_MODE_EVENT: 131 | /* First Disable IT on provided Lines */ 132 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 133 | /* Then Enable Event on provided Lines */ 134 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 135 | break; 136 | case LL_EXTI_MODE_IT_EVENT: 137 | /* Directly Enable IT & Event on provided Lines */ 138 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 139 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 140 | break; 141 | default: 142 | status = ERROR; 143 | break; 144 | } 145 | if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE) 146 | { 147 | switch (EXTI_InitStruct->Trigger) 148 | { 149 | case LL_EXTI_TRIGGER_RISING: 150 | /* First Disable Falling Trigger on provided Lines */ 151 | LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 152 | /* Then Enable Rising Trigger on provided Lines */ 153 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 154 | break; 155 | case LL_EXTI_TRIGGER_FALLING: 156 | /* First Disable Rising Trigger on provided Lines */ 157 | LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 158 | /* Then Enable Falling Trigger on provided Lines */ 159 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 160 | break; 161 | case LL_EXTI_TRIGGER_RISING_FALLING: 162 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 163 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 164 | break; 165 | default: 166 | status = ERROR; 167 | break; 168 | } 169 | } 170 | } 171 | } 172 | /* DISABLE LineCommand */ 173 | else 174 | { 175 | /* De-configure EXTI Lines in range from 0 to 31 */ 176 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 177 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 178 | } 179 | return status; 180 | } 181 | 182 | /** 183 | * @brief Set each @ref LL_EXTI_InitTypeDef field to default value. 184 | * @param EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure. 185 | * @retval None 186 | */ 187 | void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct) 188 | { 189 | EXTI_InitStruct->Line_0_31 = LL_EXTI_LINE_NONE; 190 | EXTI_InitStruct->LineCommand = DISABLE; 191 | EXTI_InitStruct->Mode = LL_EXTI_MODE_IT; 192 | EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING; 193 | } 194 | 195 | /** 196 | * @} 197 | */ 198 | 199 | /** 200 | * @} 201 | */ 202 | 203 | /** 204 | * @} 205 | */ 206 | 207 | #endif /* defined (EXTI) */ 208 | 209 | /** 210 | * @} 211 | */ 212 | 213 | #endif /* USE_FULL_LL_DRIVER */ 214 | 215 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 216 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_i2c.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_i2c.c 4 | * @author MCD Application Team 5 | * @brief I2C LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f1xx_ll_i2c.h" 23 | #include "stm32f1xx_ll_bus.h" 24 | #include "stm32f1xx_ll_rcc.h" 25 | #ifdef USE_FULL_ASSERT 26 | #include "stm32_assert.h" 27 | #else 28 | #define assert_param(expr) ((void)0U) 29 | #endif 30 | 31 | /** @addtogroup STM32F1xx_LL_Driver 32 | * @{ 33 | */ 34 | 35 | #if defined (I2C1) || defined (I2C2) 36 | 37 | /** @defgroup I2C_LL I2C 38 | * @{ 39 | */ 40 | 41 | /* Private types -------------------------------------------------------------*/ 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* Private constants ---------------------------------------------------------*/ 44 | /* Private macros ------------------------------------------------------------*/ 45 | /** @addtogroup I2C_LL_Private_Macros 46 | * @{ 47 | */ 48 | 49 | #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \ 50 | ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \ 51 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \ 52 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP)) 53 | 54 | #define IS_LL_I2C_CLOCK_SPEED(__VALUE__) (((__VALUE__) > 0U) && ((__VALUE__) <= LL_I2C_MAX_SPEED_FAST)) 55 | 56 | #define IS_LL_I2C_DUTY_CYCLE(__VALUE__) (((__VALUE__) == LL_I2C_DUTYCYCLE_2) || \ 57 | ((__VALUE__) == LL_I2C_DUTYCYCLE_16_9)) 58 | 59 | #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU) 60 | 61 | #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \ 62 | ((__VALUE__) == LL_I2C_NACK)) 63 | 64 | #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \ 65 | ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT)) 66 | /** 67 | * @} 68 | */ 69 | 70 | /* Private function prototypes -----------------------------------------------*/ 71 | 72 | /* Exported functions --------------------------------------------------------*/ 73 | /** @addtogroup I2C_LL_Exported_Functions 74 | * @{ 75 | */ 76 | 77 | /** @addtogroup I2C_LL_EF_Init 78 | * @{ 79 | */ 80 | 81 | /** 82 | * @brief De-initialize the I2C registers to their default reset values. 83 | * @param I2Cx I2C Instance. 84 | * @retval An ErrorStatus enumeration value: 85 | * - SUCCESS I2C registers are de-initialized 86 | * - ERROR I2C registers are not de-initialized 87 | */ 88 | uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx) 89 | { 90 | ErrorStatus status = SUCCESS; 91 | 92 | /* Check the I2C Instance I2Cx */ 93 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 94 | 95 | if (I2Cx == I2C1) 96 | { 97 | /* Force reset of I2C clock */ 98 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1); 99 | 100 | /* Release reset of I2C clock */ 101 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1); 102 | } 103 | #if defined(I2C2) 104 | else if (I2Cx == I2C2) 105 | { 106 | /* Force reset of I2C clock */ 107 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2); 108 | 109 | /* Release reset of I2C clock */ 110 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2); 111 | 112 | } 113 | #endif /* I2C2 */ 114 | else 115 | { 116 | status = ERROR; 117 | } 118 | 119 | return status; 120 | } 121 | 122 | /** 123 | * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct. 124 | * @param I2Cx I2C Instance. 125 | * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure. 126 | * @retval An ErrorStatus enumeration value: 127 | * - SUCCESS I2C registers are initialized 128 | * - ERROR Not applicable 129 | */ 130 | uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct) 131 | { 132 | LL_RCC_ClocksTypeDef rcc_clocks; 133 | 134 | /* Check the I2C Instance I2Cx */ 135 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 136 | 137 | /* Check the I2C parameters from I2C_InitStruct */ 138 | assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode)); 139 | assert_param(IS_LL_I2C_CLOCK_SPEED(I2C_InitStruct->ClockSpeed)); 140 | assert_param(IS_LL_I2C_DUTY_CYCLE(I2C_InitStruct->DutyCycle)); 141 | assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1)); 142 | assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge)); 143 | assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize)); 144 | 145 | /* Disable the selected I2Cx Peripheral */ 146 | LL_I2C_Disable(I2Cx); 147 | 148 | /* Retrieve Clock frequencies */ 149 | LL_RCC_GetSystemClocksFreq(&rcc_clocks); 150 | 151 | /*---------------------------- I2Cx SCL Clock Speed Configuration ------------ 152 | * Configure the SCL speed : 153 | * - ClockSpeed: I2C_CR2_FREQ[5:0], I2C_TRISE_TRISE[5:0], I2C_CCR_FS, 154 | * and I2C_CCR_CCR[11:0] bits 155 | * - DutyCycle: I2C_CCR_DUTY[7:0] bits 156 | */ 157 | LL_I2C_ConfigSpeed(I2Cx, rcc_clocks.PCLK1_Frequency, I2C_InitStruct->ClockSpeed, I2C_InitStruct->DutyCycle); 158 | 159 | /*---------------------------- I2Cx OAR1 Configuration ----------------------- 160 | * Disable, Configure and Enable I2Cx device own address 1 with parameters : 161 | * - OwnAddress1: I2C_OAR1_ADD[9:8], I2C_OAR1_ADD[7:1] and I2C_OAR1_ADD0 bits 162 | * - OwnAddrSize: I2C_OAR1_ADDMODE bit 163 | */ 164 | LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize); 165 | 166 | /*---------------------------- I2Cx MODE Configuration ----------------------- 167 | * Configure I2Cx peripheral mode with parameter : 168 | * - PeripheralMode: I2C_CR1_SMBUS, I2C_CR1_SMBTYPE and I2C_CR1_ENARP bits 169 | */ 170 | LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode); 171 | 172 | /* Enable the selected I2Cx Peripheral */ 173 | LL_I2C_Enable(I2Cx); 174 | 175 | /*---------------------------- I2Cx CR2 Configuration ------------------------ 176 | * Configure the ACKnowledge or Non ACKnowledge condition 177 | * after the address receive match code or next received byte with parameter : 178 | * - TypeAcknowledge: I2C_CR2_NACK bit 179 | */ 180 | LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge); 181 | 182 | return SUCCESS; 183 | } 184 | 185 | /** 186 | * @brief Set each @ref LL_I2C_InitTypeDef field to default value. 187 | * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure. 188 | * @retval None 189 | */ 190 | void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct) 191 | { 192 | /* Set I2C_InitStruct fields to default values */ 193 | I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C; 194 | I2C_InitStruct->ClockSpeed = 5000U; 195 | I2C_InitStruct->DutyCycle = LL_I2C_DUTYCYCLE_2; 196 | I2C_InitStruct->OwnAddress1 = 0U; 197 | I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK; 198 | I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; 199 | } 200 | 201 | /** 202 | * @} 203 | */ 204 | 205 | /** 206 | * @} 207 | */ 208 | 209 | /** 210 | * @} 211 | */ 212 | 213 | #endif /* I2C1 || I2C2 */ 214 | 215 | /** 216 | * @} 217 | */ 218 | 219 | #endif /* USE_FULL_LL_DRIVER */ 220 | 221 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 222 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_pwr.c 4 | * @author MCD Application Team 5 | * @brief PWR LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | #if defined(USE_FULL_LL_DRIVER) 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f1xx_ll_pwr.h" 24 | #include "stm32f1xx_ll_bus.h" 25 | 26 | /** @addtogroup STM32F1xx_LL_Driver 27 | * @{ 28 | */ 29 | 30 | #if defined(PWR) 31 | 32 | /** @defgroup PWR_LL PWR 33 | * @{ 34 | */ 35 | 36 | /* Private types -------------------------------------------------------------*/ 37 | /* Private variables ---------------------------------------------------------*/ 38 | /* Private constants ---------------------------------------------------------*/ 39 | /* Private macros ------------------------------------------------------------*/ 40 | /* Private function prototypes -----------------------------------------------*/ 41 | 42 | /* Exported functions --------------------------------------------------------*/ 43 | /** @addtogroup PWR_LL_Exported_Functions 44 | * @{ 45 | */ 46 | 47 | /** @addtogroup PWR_LL_EF_Init 48 | * @{ 49 | */ 50 | 51 | /** 52 | * @brief De-initialize the PWR registers to their default reset values. 53 | * @retval An ErrorStatus enumeration value: 54 | * - SUCCESS: PWR registers are de-initialized 55 | * - ERROR: not applicable 56 | */ 57 | ErrorStatus LL_PWR_DeInit(void) 58 | { 59 | /* Force reset of PWR clock */ 60 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR); 61 | 62 | /* Release reset of PWR clock */ 63 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR); 64 | 65 | return SUCCESS; 66 | } 67 | 68 | /** 69 | * @} 70 | */ 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** 77 | * @} 78 | */ 79 | #endif /* defined(PWR) */ 80 | /** 81 | * @} 82 | */ 83 | 84 | #endif /* USE_FULL_LL_DRIVER */ 85 | 86 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 87 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/Makefile: -------------------------------------------------------------------------------- 1 | ########################################################################################################################## 2 | # File automatically-generated by tool: [projectgenerator] version: [3.11.0-B13] date: [Wed Apr 21 19:29:03 CST 2021] 3 | ########################################################################################################################## 4 | 5 | # ------------------------------------------------ 6 | # Generic Makefile (based on gcc) 7 | # 8 | # ChangeLog : 9 | # 2017-02-10 - Several enhancements + project update mode 10 | # 2015-07-22 - first version 11 | # ------------------------------------------------ 12 | 13 | ###################################### 14 | # target 15 | ###################################### 16 | TARGET = PDDKB 17 | 18 | 19 | ###################################### 20 | # building variables 21 | ###################################### 22 | # debug build? 23 | DEBUG = 1 24 | # optimization 25 | OPT = -Og 26 | 27 | 28 | ####################################### 29 | # paths 30 | ####################################### 31 | # Build path 32 | BUILD_DIR = build 33 | 34 | ###################################### 35 | # source 36 | ###################################### 37 | # C sources 38 | C_SOURCES = \ 39 | Core/Src/main.c \ 40 | Core/Src/led.c \ 41 | Core/Src/uart.c \ 42 | Core/Src/i2c.c \ 43 | Core/Src/stm32f1xx_it.c \ 44 | Core/Src/stm32f1xx_hal_msp.c \ 45 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c \ 46 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c \ 47 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c \ 48 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c \ 49 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c \ 50 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c \ 51 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c \ 52 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c \ 53 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c \ 54 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c \ 55 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c \ 56 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c \ 57 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c \ 58 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c \ 59 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_usart.c \ 60 | Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c \ 61 | Drivers/PD/BSI2C/bsi2c.c \ 62 | Drivers/PD/FUSB302B/FUSB302B.c \ 63 | Drivers/PD/pd_ufp.c \ 64 | Core/Src/system_stm32f1xx.c 65 | 66 | # ASM sources 67 | ASM_SOURCES = \ 68 | startup_stm32f103xb.s 69 | 70 | 71 | ####################################### 72 | # binaries 73 | ####################################### 74 | PREFIX = arm-none-eabi- 75 | # The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx) 76 | # either it can be added to the PATH environment variable. 77 | ifdef GCC_PATH 78 | CC = $(GCC_PATH)/$(PREFIX)gcc 79 | AS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cpp 80 | CP = $(GCC_PATH)/$(PREFIX)objcopy 81 | SZ = $(GCC_PATH)/$(PREFIX)size 82 | else 83 | CC = $(PREFIX)gcc 84 | AS = $(PREFIX)gcc -x assembler-with-cpp 85 | CP = $(PREFIX)objcopy 86 | SZ = $(PREFIX)size 87 | endif 88 | HEX = $(CP) -O ihex 89 | BIN = $(CP) -O binary -S 90 | 91 | ####################################### 92 | # CFLAGS 93 | ####################################### 94 | # cpu 95 | CPU = -mcpu=cortex-m3 96 | 97 | # fpu 98 | # NONE for Cortex-M0/M0+/M3 99 | 100 | # float-abi 101 | 102 | 103 | # mcu 104 | MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI) 105 | 106 | # macros for gcc 107 | # AS defines 108 | AS_DEFS = 109 | 110 | # C defines 111 | C_DEFS = \ 112 | -DUSE_HAL_DRIVER \ 113 | -DSTM32F103xB 114 | 115 | 116 | # AS includes 117 | AS_INCLUDES = 118 | 119 | # C includes 120 | C_INCLUDES = \ 121 | -ICore/Inc \ 122 | -IDrivers/PD/BSI2C \ 123 | -IDrivers/PD/FUSB302B \ 124 | -IDrivers/PD \ 125 | -IDrivers/STM32F1xx_HAL_Driver/Inc \ 126 | -IDrivers/STM32F1xx_HAL_Driver/Inc/Legacy \ 127 | -IDrivers/CMSIS/Device/ST/STM32F1xx/Include \ 128 | -IDrivers/CMSIS/Include \ 129 | -IDrivers/CMSIS/Include 130 | 131 | 132 | # compile gcc flags 133 | ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections 134 | 135 | CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections 136 | 137 | ifeq ($(DEBUG), 1) 138 | CFLAGS += -g -gdwarf-2 139 | endif 140 | 141 | 142 | # Generate dependency information 143 | CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" 144 | 145 | 146 | ####################################### 147 | # LDFLAGS 148 | ####################################### 149 | # link script 150 | LDSCRIPT = STM32F103T8Ux_FLASH.ld 151 | 152 | # libraries 153 | LIBS = -lc -lm -lnosys 154 | LIBDIR = 155 | LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections 156 | 157 | # default action: build all 158 | all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin 159 | 160 | 161 | ####################################### 162 | # build the application 163 | ####################################### 164 | # list of objects 165 | OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o))) 166 | vpath %.c $(sort $(dir $(C_SOURCES))) 167 | # list of ASM program objects 168 | OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o))) 169 | vpath %.s $(sort $(dir $(ASM_SOURCES))) 170 | 171 | $(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR) 172 | $(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@ 173 | 174 | $(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR) 175 | $(AS) -c $(CFLAGS) $< -o $@ 176 | 177 | $(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile 178 | $(CC) $(OBJECTS) $(LDFLAGS) -o $@ 179 | $(SZ) $@ 180 | 181 | $(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR) 182 | $(HEX) $< $@ 183 | 184 | $(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR) 185 | $(BIN) $< $@ 186 | 187 | $(BUILD_DIR): 188 | mkdir $@ 189 | 190 | ####################################### 191 | # clean up 192 | ####################################### 193 | clean: 194 | -rm -fR $(BUILD_DIR) 195 | 196 | ####################################### 197 | # dependencies 198 | ####################################### 199 | -include $(wildcard $(BUILD_DIR)/*.d) 200 | 201 | # *** EOF *** -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/PDDKB.ioc: -------------------------------------------------------------------------------- 1 | #MicroXplorer Configuration settings - do not modify 2 | File.Version=6 3 | GPIO.groupedBy= 4 | KeepUserPlacement=false 5 | Mcu.Family=STM32F1 6 | Mcu.IP0=NVIC 7 | Mcu.IP1=RCC 8 | Mcu.IP2=SYS 9 | Mcu.IPNb=3 10 | Mcu.Name=STM32F103T(8-B)Ux 11 | Mcu.Package=VFQFPN36 12 | Mcu.Pin0=VP_SYS_VS_ND 13 | Mcu.Pin1=VP_SYS_VS_Systick 14 | Mcu.PinsNb=2 15 | Mcu.ThirdPartyNb=0 16 | Mcu.UserConstants= 17 | Mcu.UserName=STM32F103T8Ux 18 | MxCube.Version=6.1.0 19 | MxDb.Version=DB.6.0.10 20 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false 21 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false 22 | NVIC.ForceEnableDMAVector=true 23 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false 24 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false 25 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false 26 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false 27 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 28 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false 29 | NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true 30 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false 31 | PinOutPanel.RotationAngle=0 32 | ProjectManager.AskForMigrate=true 33 | ProjectManager.BackupPrevious=false 34 | ProjectManager.CompilerOptimize=6 35 | ProjectManager.ComputerToolchain=false 36 | ProjectManager.CoupleFile=false 37 | ProjectManager.CustomerFirmwarePackage= 38 | ProjectManager.DefaultFWLocation=true 39 | ProjectManager.DeletePrevious=true 40 | ProjectManager.DeviceId=STM32F103T8Ux 41 | ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.8.3 42 | ProjectManager.FreePins=false 43 | ProjectManager.HalAssertFull=false 44 | ProjectManager.HeapSize=0x200 45 | ProjectManager.KeepUserCode=true 46 | ProjectManager.LastFirmware=true 47 | ProjectManager.LibraryCopy=0 48 | ProjectManager.MainLocation=Core/Src 49 | ProjectManager.NoMain=false 50 | ProjectManager.PreviousToolchain= 51 | ProjectManager.ProjectBuild=false 52 | ProjectManager.ProjectFileName=PDDKB.ioc 53 | ProjectManager.ProjectName=PDDKB 54 | ProjectManager.RegisterCallBack= 55 | ProjectManager.StackSize=0x400 56 | ProjectManager.TargetToolchain=Makefile 57 | ProjectManager.ToolChainLocation= 58 | ProjectManager.UnderRoot=false 59 | ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false 60 | RCC.ADCFreqValue=32000000 61 | RCC.AHBFreq_Value=64000000 62 | RCC.APB1CLKDivider=RCC_HCLK_DIV2 63 | RCC.APB1Freq_Value=32000000 64 | RCC.APB1TimFreq_Value=64000000 65 | RCC.APB2Freq_Value=64000000 66 | RCC.APB2TimFreq_Value=64000000 67 | RCC.FCLKCortexFreq_Value=64000000 68 | RCC.FamilyName=M 69 | RCC.HCLKFreq_Value=64000000 70 | RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value 71 | RCC.MCOFreq_Value=64000000 72 | RCC.PLLCLKFreq_Value=64000000 73 | RCC.PLLMCOFreq_Value=32000000 74 | RCC.PLLMUL=RCC_PLL_MUL16 75 | RCC.SYSCLKFreq_VALUE=64000000 76 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK 77 | RCC.TimSysFreq_Value=64000000 78 | RCC.USBFreq_Value=64000000 79 | VP_SYS_VS_ND.Mode=No_Debug 80 | VP_SYS_VS_ND.Signal=SYS_VS_ND 81 | VP_SYS_VS_Systick.Mode=SysTick 82 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick 83 | board=custom 84 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/STM32F103T8Ux_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ****************************************************************************** 3 | ** 4 | 5 | ** File : LinkerScript.ld 6 | ** 7 | ** Author : Auto-generated by System Workbench for STM32 8 | ** 9 | ** Abstract : Linker script for STM32F103T8Ux series 10 | ** 64Kbytes FLASH and 20Kbytes RAM 11 | ** 12 | ** Set heap size, stack size and stack location according 13 | ** to application requirements. 14 | ** 15 | ** Set memory bank area and size if external memory is used. 16 | ** 17 | ** Target : STMicroelectronics STM32 18 | ** 19 | ** Distribution: The file is distributed “as is,” without any warranty 20 | ** of any kind. 21 | ** 22 | ***************************************************************************** 23 | ** @attention 24 | ** 25 | **

© COPYRIGHT(c) 2019 STMicroelectronics

26 | ** 27 | ** Redistribution and use in source and binary forms, with or without modification, 28 | ** are permitted provided that the following conditions are met: 29 | ** 1. Redistributions of source code must retain the above copyright notice, 30 | ** this list of conditions and the following disclaimer. 31 | ** 2. Redistributions in binary form must reproduce the above copyright notice, 32 | ** this list of conditions and the following disclaimer in the documentation 33 | ** and/or other materials provided with the distribution. 34 | ** 3. Neither the name of STMicroelectronics nor the names of its contributors 35 | ** may be used to endorse or promote products derived from this software 36 | ** without specific prior written permission. 37 | ** 38 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 39 | ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 40 | ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 41 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 42 | ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 43 | ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 44 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 45 | ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 46 | ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 47 | ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 | ** 49 | ***************************************************************************** 50 | */ 51 | 52 | /* Entry Point */ 53 | ENTRY(Reset_Handler) 54 | 55 | /* Highest address of the user mode stack */ 56 | _estack = 0x20005000; /* end of RAM */ 57 | /* Generate a link error if heap and stack don't fit into RAM */ 58 | _Min_Heap_Size = 0x200; /* required amount of heap */ 59 | _Min_Stack_Size = 0x400; /* required amount of stack */ 60 | 61 | /* Specify the memory areas */ 62 | MEMORY 63 | { 64 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K 65 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 64K 66 | } 67 | 68 | /* Define output sections */ 69 | SECTIONS 70 | { 71 | /* The startup code goes first into FLASH */ 72 | .isr_vector : 73 | { 74 | . = ALIGN(4); 75 | KEEP(*(.isr_vector)) /* Startup code */ 76 | . = ALIGN(4); 77 | } >FLASH 78 | 79 | /* The program code and other data goes into FLASH */ 80 | .text : 81 | { 82 | . = ALIGN(4); 83 | *(.text) /* .text sections (code) */ 84 | *(.text*) /* .text* sections (code) */ 85 | *(.glue_7) /* glue arm to thumb code */ 86 | *(.glue_7t) /* glue thumb to arm code */ 87 | *(.eh_frame) 88 | 89 | KEEP (*(.init)) 90 | KEEP (*(.fini)) 91 | 92 | . = ALIGN(4); 93 | _etext = .; /* define a global symbols at end of code */ 94 | } >FLASH 95 | 96 | /* Constant data goes into FLASH */ 97 | .rodata : 98 | { 99 | . = ALIGN(4); 100 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 101 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 102 | . = ALIGN(4); 103 | } >FLASH 104 | 105 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 106 | .ARM : { 107 | __exidx_start = .; 108 | *(.ARM.exidx*) 109 | __exidx_end = .; 110 | } >FLASH 111 | 112 | .preinit_array : 113 | { 114 | PROVIDE_HIDDEN (__preinit_array_start = .); 115 | KEEP (*(.preinit_array*)) 116 | PROVIDE_HIDDEN (__preinit_array_end = .); 117 | } >FLASH 118 | .init_array : 119 | { 120 | PROVIDE_HIDDEN (__init_array_start = .); 121 | KEEP (*(SORT(.init_array.*))) 122 | KEEP (*(.init_array*)) 123 | PROVIDE_HIDDEN (__init_array_end = .); 124 | } >FLASH 125 | .fini_array : 126 | { 127 | PROVIDE_HIDDEN (__fini_array_start = .); 128 | KEEP (*(SORT(.fini_array.*))) 129 | KEEP (*(.fini_array*)) 130 | PROVIDE_HIDDEN (__fini_array_end = .); 131 | } >FLASH 132 | 133 | /* used by the startup to initialize data */ 134 | _sidata = LOADADDR(.data); 135 | 136 | /* Initialized data sections goes into RAM, load LMA copy after code */ 137 | .data : 138 | { 139 | . = ALIGN(4); 140 | _sdata = .; /* create a global symbol at data start */ 141 | *(.data) /* .data sections */ 142 | *(.data*) /* .data* sections */ 143 | 144 | . = ALIGN(4); 145 | _edata = .; /* define a global symbol at data end */ 146 | } >RAM AT> FLASH 147 | 148 | 149 | /* Uninitialized data section */ 150 | . = ALIGN(4); 151 | .bss : 152 | { 153 | /* This is used by the startup in order to initialize the .bss secion */ 154 | _sbss = .; /* define a global symbol at bss start */ 155 | __bss_start__ = _sbss; 156 | *(.bss) 157 | *(.bss*) 158 | *(COMMON) 159 | 160 | . = ALIGN(4); 161 | _ebss = .; /* define a global symbol at bss end */ 162 | __bss_end__ = _ebss; 163 | } >RAM 164 | 165 | /* User_heap_stack section, used to check that there is enough RAM left */ 166 | ._user_heap_stack : 167 | { 168 | . = ALIGN(8); 169 | PROVIDE ( end = . ); 170 | PROVIDE ( _end = . ); 171 | . = . + _Min_Heap_Size; 172 | . = . + _Min_Stack_Size; 173 | . = ALIGN(8); 174 | } >RAM 175 | 176 | 177 | 178 | /* Remove information from the standard libraries */ 179 | /DISCARD/ : 180 | { 181 | libc.a ( * ) 182 | libm.a ( * ) 183 | libgcc.a ( * ) 184 | } 185 | 186 | .ARM.attributes 0 : { *(.ARM.attributes) } 187 | } 188 | 189 | 190 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/download.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | ./stm32flash -w ./build/PDDKB.hex -v -g 0x0 /dev/ttyUSB0 3 | -------------------------------------------------------------------------------- /PDDKB_202105_Src1.02/MYPDDKB/stm32flash: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Spray0/SP_DEVKIT_PDDKB/864a2d0f2f962db88303d614097924f61d78c241/PDDKB_202105_Src1.02/MYPDDKB/stm32flash -------------------------------------------------------------------------------- /PDDKB_Hardware_v1.1.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Spray0/SP_DEVKIT_PDDKB/864a2d0f2f962db88303d614097924f61d78c241/PDDKB_Hardware_v1.1.zip -------------------------------------------------------------------------------- /Readme.md: -------------------------------------------------------------------------------- 1 | # PDDKB Readme 2 | 3 | 4 | 5 | brd 6 | 7 | ## 简介 8 | 9 | **PDDKB** 一个USB Typec Power Delivery (PD) Sink端开发工具板。使用安森美半导体(ON Semiconductor)公司的**FUSB302B**作为USBC控制器，与主控**STM32F103T8U6**之间通过iic连接。用于PD供电应用的Sink角色应用开发。 10 | 11 | 提供了CP2102 UART to USB bridge芯片，用于MCU程序下载（ISP）、Log输出调试。 12 | 13 | 提供了按钮B0，用于进入MCU串口ISP。 14 | 15 | 提供了按钮RST，用于复位。 16 | 17 | 提供了按钮SW，用于按键输入触发，默认用于切换PD电压档（处于PD_READY下）。 18 | 19 | 提供了RGB LED灯，用于指示程序状态。 20 | 21 | 提供了一路USBA连接器输出，用于输出PD电压。可接USB负载仪便于观察输出电压。 22 | 23 | ## 开发参考文档 24 | 25 | *FUSB302BCN-D.pdf* 26 | 27 | > FUSB302B手册 28 | 29 | *USB_PD_R3_0 V2.0 20190829.pdf* 30 | 31 | > PD3.0规范文档 32 | 33 | ## 开发环境 34 | 35 | 平台：Ubuntu 18.04.2 LTS （AMD64） 36 | 37 | 编译器：arm-none-eabi-gcc version 5.4.1 38 | 39 | 下载工具：stm32flash 0.5 40 | 41 | PCB：KICAD 42 | 43 | ## 编译方法 44 | 45 | 编译(16线程编译) 46 | 47 | ``` 48 | make -j16 49 | ``` 50 | 51 | > ... 52 | > 53 | > build/stm32f1xx_hal_usart.o build/stm32f1xx_hal_i2c.o build/bsi2c.o build/FUSB302B.o build/pd_ufp.o build/system_stm32f1xx.o build/startup_stm32f103xb.o -mcpu=cortex-m3 -mthumb -specs=nano.specs -TSTM32F103T8Ux_FLASH.ld -lc -lm -lnosys -Wl,-Map=build/PDDKB.map,--cref -Wl,--gc-sections -o build/PDDKB.elf 54 | > arm-none-eabi-size build/PDDKB.elf 55 | > text data bss dec hex filename 56 | > 15880 124 4300 20304 4f50 build/PDDKB.elf 57 | > arm-none-eabi-objcopy -O ihex build/PDDKB.elf build/PDDKB.hex 58 | > arm-none-eabi-objcopy -O binary -S build/PDDKB.elf build/PDDKB.bin 59 | 60 | 清除工程文件 61 | 62 | ``` 63 | make clean 64 | ``` 65 | 66 | ## 备注 67 | 68 | 为了正常使用VBUS检测，需要焊接R14,将R15NC处理。 69 | -------------------------------------------------------------------------------- /img/brd.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Spray0/SP_DEVKIT_PDDKB/864a2d0f2f962db88303d614097924f61d78c241/img/brd.jpg -------------------------------------------------------------------------------- /reference/AN-6102CN.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Spray0/SP_DEVKIT_PDDKB/864a2d0f2f962db88303d614097924f61d78c241/reference/AN-6102CN.pdf -------------------------------------------------------------------------------- /reference/AN-6105CN.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Spray0/SP_DEVKIT_PDDKB/864a2d0f2f962db88303d614097924f61d78c241/reference/AN-6105CN.pdf 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