├── .github └── FUNDING.yml ├── .gitignore ├── CHANGES.md ├── LICENSE.pdf ├── LICENSE_HOWTO.pdf ├── OpenAmiga500FastRamExpansion-cache.lib ├── OpenAmiga500FastRamExpansion.kicad_pcb ├── OpenAmiga500FastRamExpansion.net ├── OpenAmiga500FastRamExpansion.pretty ├── DIP-64_W22.86mm_Socket_LongPads_IC.kicad_mod ├── DIP-64_W22.86mm_Socket_LongPads_Socket.kicad_mod ├── LED_0805_HandSoldering_ModSilkS.kicad_mod ├── PLCC-44_THT-Socket.kicad_mod ├── SOJ-42-LongPads.kicad_mod ├── SOJ-42-Socket-LongPads.kicad_mod └── SOJ-42.kicad_mod ├── OpenAmiga500FastRamExpansion.pro ├── OpenAmiga500FastRamExpansion.sch ├── PRODUCT.md ├── README.md ├── doc ├── doc.png ├── no.png ├── render-bottom.png ├── render-top.png ├── schematic.pdf └── yes.png ├── firmware ├── README.md ├── V1 │ ├── 4mb │ │ ├── 4mb.svf │ │ ├── atf1502as10jc44.jed │ │ └── epm7032slc44-10.pof │ ├── 8mb │ │ ├── 8mb.svf │ │ ├── atf1502as10jc44.jed │ │ └── epm7032slc44-10.pof │ ├── 8mb_no_autoconfig │ │ ├── README.txt │ │ ├── atf1502as10jc44.jed │ │ └── epm7032slc44-10.pof │ ├── bsdl │ │ ├── 1502ASV_A44.bsd │ │ ├── 1502ASV_J44.bsd │ │ ├── 1502AS_A44.bsd │ │ ├── 1502AS_J44.bsd │ │ └── readme.txt │ ├── img │ │ ├── crappy_usbblaster.jpg │ │ └── good_usbblaster.jpg │ └── source │ │ ├── FIRMWARE.txt │ │ └── a600_8mb.v ├── V2 │ ├── BSDL │ │ └── 1504AS_J44.bsd │ ├── Binaries │ │ ├── ATF1504AS_Erase.svf │ │ ├── SukkoGottaGoFast_ATF1504.jed │ │ ├── SukkoGottaGoFast_ATF1504.svf │ │ └── SukkoGottaGoFast_EPM7064S.pof │ ├── README.md │ └── Source │ │ ├── SukkoGottaGoFast.qsf │ │ └── SukkoGottaGoFast.v ├── atf1502as_erase.svf └── windows │ └── UrJTAG.zip ├── fp-info-cache ├── fp-lib-table ├── lib ├── 68000_DIP_SOCKET.dcm ├── 68000_DIP_SOCKET.lib ├── ATF1502AS-10JU44.dcm ├── ATF1502AS-10JU44.lib ├── ATF1502AS-10JU44.png ├── HYB5118160BSJ.lib └── HYB5118160BSJ.png └── sym-lib-table /.github/FUNDING.yml: -------------------------------------------------------------------------------- 1 | # These are supported funding model platforms 2 | 3 | github: # Replace with up to 4 GitHub Sponsors-enabled usernames e.g., [user1, user2] 4 | patreon: # Replace with a single Patreon username 5 | open_collective: # Replace with a single Open Collective username 6 | ko_fi: openretroworks 7 | tidelift: # Replace with a single Tidelift platform-name/package-name e.g., npm/babel 8 | community_bridge: # Replace with a single Community Bridge project-name e.g., cloud-foundry 9 | liberapay: # Replace with a single Liberapay username 10 | issuehunt: # Replace with a single IssueHunt username 11 | otechie: # Replace with a single Otechie username 12 | custom: # Replace with up to 4 custom sponsorship URLs e.g., ['link1', 'link2'] 13 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | *.bak 2 | *.kicad_pcb-bak 3 | *.bck 4 | gerbers/ 5 | -------------------------------------------------------------------------------- /CHANGES.md: -------------------------------------------------------------------------------- 1 | ## CHANGES 2 | 3 | Any modifications to the OpenAmiga500FastRamExpansion design and documentation made by any Licensee MUST be noted in this file, as per *section 3.4.b* of the [license](LICENSE.pdf). 4 | 5 | ### (Date) - (Author) 6 | (Description) 7 | -------------------------------------------------------------------------------- /LICENSE.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/LICENSE.pdf -------------------------------------------------------------------------------- /LICENSE_HOWTO.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/LICENSE_HOWTO.pdf -------------------------------------------------------------------------------- /OpenAmiga500FastRamExpansion-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # 68000_DIP_SOCKET_68000_SOCKET 5 | # 6 | DEF 68000_DIP_SOCKET_68000_SOCKET U 0 30 Y Y 1 F N 7 | F0 "U" 0 100 50 H V C CNN 8 | F1 "68000_DIP_SOCKET_68000_SOCKET" 0 -150 50 H V C CNN 9 | F2 "" 0 0 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | ALIAS 68010D 12 | DRAW 13 | S -700 2250 700 -2250 0 1 10 f 14 | X D4 1 1000 -600 300 L 50 50 1 1 B 15 | X DTACK 10 -1000 -800 300 R 50 50 1 1 O I 16 | X BG 11 -1000 1400 300 R 50 50 1 1 I I 17 | X BGACK 12 -1000 1500 300 R 50 50 1 1 O I 18 | X BR 13 -1000 1300 300 R 50 50 1 1 O I 19 | X VCC 14 0 2400 150 D 50 50 1 1 w 20 | X CLK 15 -1000 2200 300 R 50 50 1 1 O C 21 | X GND 16 100 -2400 150 U 50 50 1 1 w 22 | X HALT 17 -1000 -1200 300 R 50 50 1 1 B I 23 | X RESET 18 -1000 -1300 300 R 50 50 1 1 B I 24 | X VMA 19 -1000 500 300 R 50 50 1 1 I I 25 | X D3 2 1000 -500 300 L 50 50 1 1 B 26 | X E 20 -1000 400 300 R 50 50 1 1 I 27 | X VPA 21 -1000 300 300 R 50 50 1 1 O I 28 | X BERR 22 -1000 -600 300 R 50 50 1 1 O I 29 | X IPL2 23 -1000 1700 300 R 50 50 1 1 O I 30 | X IPL1 24 -1000 1800 300 R 50 50 1 1 O I 31 | X IPL0 25 -1000 1900 300 R 50 50 1 1 O I 32 | X FC2 26 -1000 800 300 R 50 50 1 1 I 33 | X FC1 27 -1000 900 300 R 50 50 1 1 I 34 | X FC0 28 -1000 1000 300 R 50 50 1 1 I 35 | X A1 29 1000 2200 300 L 50 50 1 1 I 36 | X D2 3 1000 -400 300 L 50 50 1 1 B 37 | X A2 30 1000 2100 300 L 50 50 1 1 I 38 | X A3 31 1000 2000 300 L 50 50 1 1 I 39 | X A4 32 1000 1900 300 L 50 50 1 1 I 40 | X A5 33 1000 1800 300 L 50 50 1 1 I 41 | X A6 34 1000 1700 300 L 50 50 1 1 I 42 | X A7 35 1000 1600 300 L 50 50 1 1 I 43 | X A8 36 1000 1500 300 L 50 50 1 1 I 44 | X A9 37 1000 1400 300 L 50 50 1 1 I 45 | X A10 38 1000 1300 300 L 50 50 1 1 I 46 | X A11 39 1000 1200 300 L 50 50 1 1 I 47 | X D1 4 1000 -300 300 L 50 50 1 1 B 48 | X A12 40 1000 1100 300 L 50 50 1 1 I 49 | X A13 41 1000 1000 300 L 50 50 1 1 I 50 | X A14 42 1000 900 300 L 50 50 1 1 I 51 | X A15 43 1000 800 300 L 50 50 1 1 I 52 | X A16 44 1000 700 300 L 50 50 1 1 I 53 | X A17 45 1000 600 300 L 50 50 1 1 I 54 | X A18 46 1000 500 300 L 50 50 1 1 I 55 | X A19 47 1000 400 300 L 50 50 1 1 I 56 | X A20 48 1000 300 300 L 50 50 1 1 I 57 | X VCC 49 100 2400 150 D 50 50 1 1 w 58 | X D0 5 1000 -200 300 L 50 50 1 1 B 59 | X A21 50 1000 200 300 L 50 50 1 1 I 60 | X A22 51 1000 100 300 L 50 50 1 1 I 61 | X A23 52 1000 0 300 L 50 50 1 1 I 62 | X GND 53 0 -2400 150 U 50 50 1 1 w 63 | X D15 54 1000 -1700 300 L 50 50 1 1 B 64 | X D14 55 1000 -1600 300 L 50 50 1 1 B 65 | X D13 56 1000 -1500 300 L 50 50 1 1 B 66 | X D12 57 1000 -1400 300 L 50 50 1 1 B 67 | X D11 58 1000 -1300 300 L 50 50 1 1 B 68 | X D10 59 1000 -1200 300 L 50 50 1 1 B 69 | X AS 6 1000 -1900 300 L 50 50 1 1 I I 70 | X D9 60 1000 -1100 300 L 50 50 1 1 B 71 | X D8 61 1000 -1000 300 L 50 50 1 1 B 72 | X D7 62 1000 -900 300 L 50 50 1 1 B 73 | X D6 63 1000 -800 300 L 50 50 1 1 B 74 | X D5 64 1000 -700 300 L 50 50 1 1 B 75 | X UDS 7 1000 -2000 300 L 50 50 1 1 I I 76 | X LDS 8 1000 -2100 300 L 50 50 1 1 I I 77 | X R/W 9 1000 -2200 300 L 50 50 1 1 I 78 | ENDDRAW 79 | ENDDEF 80 | # 81 | # 74xx_74LS157 82 | # 83 | DEF 74xx_74LS157 U 0 40 Y Y 1 L N 84 | F0 "U" -300 750 50 H V C CNN 85 | F1 "74xx_74LS157" -300 -850 50 H V C CNN 86 | F2 "" 0 0 50 H I C CNN 87 | F3 "" 0 0 50 H I C CNN 88 | $FPLIST 89 | DIP?16* 90 | $ENDFPLIST 91 | DRAW 92 | S -300 700 300 -800 1 1 10 f 93 | X S 1 -500 -600 200 R 50 50 1 0 I 94 | X I1c 10 -500 -100 200 R 50 50 1 0 I 95 | X I0c 11 -500 0 200 R 50 50 1 0 I 96 | X Zd 12 500 -300 200 L 50 50 1 0 O 97 | X I1d 13 -500 -400 200 R 50 50 1 0 I 98 | X I0d 14 -500 -300 200 R 50 50 1 0 I 99 | X E 15 -500 -700 200 R 50 50 1 0 I I 100 | X VCC 16 0 900 200 D 50 50 1 0 W 101 | X I0a 2 -500 600 200 R 50 50 1 0 I 102 | X I1a 3 -500 500 200 R 50 50 1 0 I 103 | X Za 4 500 600 200 L 50 50 1 0 O 104 | X I0b 5 -500 300 200 R 50 50 1 0 I 105 | X I1b 6 -500 200 200 R 50 50 1 0 I 106 | X Zb 7 500 300 200 L 50 50 1 0 O 107 | X GND 8 0 -1000 200 U 50 50 1 0 W 108 | X Zc 9 500 0 200 L 50 50 1 0 O 109 | ENDDRAW 110 | ENDDEF 111 | # 112 | # ATF1502AS-10JU44_ATF1502AS-10JU44 113 | # 114 | DEF ATF1502AS-10JU44_ATF1502AS-10JU44 U 0 40 Y Y 1 F N 115 | F0 "U" 0 -100 50 H V C CNN 116 | F1 "ATF1502AS-10JU44_ATF1502AS-10JU44" 0 100 50 H V C CNN 117 | F2 "MODULE" 0 0 50 H I C CNN 118 | F3 "DOCUMENTATION" 0 0 50 H I C CNN 119 | DRAW 120 | S -1000 -700 1000 700 1 0 0 N 121 | X I1/GCLR 1 -1300 0 300 R 50 50 1 1 I 122 | X GND 10 -200 -1000 300 U 50 50 1 1 W 123 | X IO7_PD1 11 -100 -1000 300 U 50 50 1 1 B 124 | X IO8 12 0 -1000 300 U 50 50 1 1 B 125 | X IO9_TMS 13 100 -1000 300 U 50 50 1 1 B 126 | X IO10 14 200 -1000 300 U 50 50 1 1 B 127 | X VCC 15 300 -1000 300 U 50 50 1 1 W 128 | X IO11 16 400 -1000 300 U 50 50 1 1 B 129 | X IO12 17 500 -1000 300 U 50 50 1 1 B 130 | X IO13 18 1300 -500 300 L 50 50 1 1 B 131 | X IO14 19 1300 -400 300 L 50 50 1 1 B 132 | X I2/OE2/GCLK2 2 -1300 -100 300 R 50 50 1 1 I 133 | X IO15 20 1300 -300 300 L 50 50 1 1 B 134 | X IO16 21 1300 -200 300 L 50 50 1 1 B 135 | X GND 22 1300 -100 300 L 50 50 1 1 W 136 | X VCC 23 1300 0 300 L 50 50 1 1 W 137 | X IO17 24 1300 100 300 L 50 50 1 1 B 138 | X IO18_PD2 25 1300 200 300 L 50 50 1 1 B 139 | X IO19 26 1300 300 300 L 50 50 1 1 B 140 | X IO20 27 1300 400 300 L 50 50 1 1 B 141 | X IO21 28 1300 500 300 L 50 50 1 1 B 142 | X IO22 29 500 1000 300 D 50 50 1 1 I 143 | X VCC 3 -1300 -200 300 R 50 50 1 1 W 144 | X GND 30 400 1000 300 D 50 50 1 1 W 145 | X IO23 31 300 1000 300 D 50 50 1 1 B 146 | X IO24_TCK 32 200 1000 300 D 50 50 1 1 B 147 | X IO25 33 100 1000 300 D 50 50 1 1 B 148 | X IO26 34 0 1000 300 D 50 50 1 1 B 149 | X VCC 35 -100 1000 300 D 50 50 1 1 W 150 | X IO27 36 -200 1000 300 D 50 50 1 1 B 151 | X IO28 37 -300 1000 300 D 50 50 1 1 B 152 | X IO29/TDO 38 -400 1000 300 D 50 50 1 1 B 153 | X IO30 39 -500 1000 300 D 50 50 1 1 B 154 | X IO1 4 -1300 -300 300 R 50 50 1 1 B 155 | X IO31 40 -1300 500 300 R 50 50 1 1 B 156 | X IO32/GCLK3 41 -1300 400 300 R 50 50 1 1 B 157 | X GND 42 -1300 300 300 R 50 50 1 1 W 158 | X I3/GCLK1 43 -1300 200 300 R 50 50 1 1 I 159 | X I4/OE1 44 -1300 100 300 R 50 50 1 1 I 160 | X IO2 5 -1300 -400 300 R 50 50 1 1 B 161 | X IO3 6 -1300 -500 300 R 50 50 1 1 B 162 | X IO4_TDI 7 -500 -1000 300 U 50 50 1 1 B 163 | X IO5 8 -400 -1000 300 U 50 50 1 1 B 164 | X IO6 9 -300 -1000 300 U 50 50 1 1 B 165 | ENDDRAW 166 | ENDDEF 167 | # 168 | # CPU_NXP_68000_68000D 169 | # 170 | DEF CPU_NXP_68000_68000D U 0 30 Y Y 1 F N 171 | F0 "U" 0 100 50 H V C CNN 172 | F1 "CPU_NXP_68000_68000D" 0 -150 50 H V C CNN 173 | F2 "" 0 0 50 H I C CNN 174 | F3 "" 0 0 50 H I C CNN 175 | DRAW 176 | S -700 2250 700 -2250 0 1 10 f 177 | X D4 1 1000 -600 300 L 50 50 1 1 B 178 | X DTACK 10 -1000 -800 300 R 50 50 1 1 I I 179 | X BG 11 -1000 1400 300 R 50 50 1 1 O I 180 | X BGACK 12 -1000 1500 300 R 50 50 1 1 I I 181 | X BR 13 -1000 1300 300 R 50 50 1 1 I I 182 | X VCC 14 0 2400 150 D 50 50 1 1 W 183 | X CLK 15 -1000 2200 300 R 50 50 1 1 I C 184 | X GND 16 100 -2400 150 U 50 50 1 1 W 185 | X HALT 17 -1000 -1200 300 R 50 50 1 1 B I 186 | X RESET 18 -1000 -1300 300 R 50 50 1 1 B I 187 | X VMA 19 -1000 500 300 R 50 50 1 1 O I 188 | X D3 2 1000 -500 300 L 50 50 1 1 B 189 | X E 20 -1000 400 300 R 50 50 1 1 O 190 | X VPA 21 -1000 300 300 R 50 50 1 1 I I 191 | X BERR 22 -1000 -600 300 R 50 50 1 1 I I 192 | X IPL2 23 -1000 1700 300 R 50 50 1 1 I I 193 | X IPL1 24 -1000 1800 300 R 50 50 1 1 I I 194 | X IPL0 25 -1000 1900 300 R 50 50 1 1 I I 195 | X FC2 26 -1000 800 300 R 50 50 1 1 O 196 | X FC1 27 -1000 900 300 R 50 50 1 1 O 197 | X FC0 28 -1000 1000 300 R 50 50 1 1 O 198 | X A1 29 1000 2200 300 L 50 50 1 1 O 199 | X D2 3 1000 -400 300 L 50 50 1 1 B 200 | X A2 30 1000 2100 300 L 50 50 1 1 O 201 | X A3 31 1000 2000 300 L 50 50 1 1 O 202 | X A4 32 1000 1900 300 L 50 50 1 1 O 203 | X A5 33 1000 1800 300 L 50 50 1 1 O 204 | X A6 34 1000 1700 300 L 50 50 1 1 O 205 | X A7 35 1000 1600 300 L 50 50 1 1 O 206 | X A8 36 1000 1500 300 L 50 50 1 1 O 207 | X A9 37 1000 1400 300 L 50 50 1 1 O 208 | X A10 38 1000 1300 300 L 50 50 1 1 O 209 | X A11 39 1000 1200 300 L 50 50 1 1 O 210 | X D1 4 1000 -300 300 L 50 50 1 1 B 211 | X A12 40 1000 1100 300 L 50 50 1 1 O 212 | X A13 41 1000 1000 300 L 50 50 1 1 O 213 | X A14 42 1000 900 300 L 50 50 1 1 O 214 | X A15 43 1000 800 300 L 50 50 1 1 O 215 | X A16 44 1000 700 300 L 50 50 1 1 O 216 | X A17 45 1000 600 300 L 50 50 1 1 O 217 | X A18 46 1000 500 300 L 50 50 1 1 O 218 | X A19 47 1000 400 300 L 50 50 1 1 O 219 | X A20 48 1000 300 300 L 50 50 1 1 O 220 | X VCC 49 100 2400 150 D 50 50 1 1 W 221 | X D0 5 1000 -200 300 L 50 50 1 1 B 222 | X A21 50 1000 200 300 L 50 50 1 1 O 223 | X A22 51 1000 100 300 L 50 50 1 1 O 224 | X A23 52 1000 0 300 L 50 50 1 1 O 225 | X GND 53 0 -2400 150 U 50 50 1 1 W 226 | X D15 54 1000 -1700 300 L 50 50 1 1 B 227 | X D14 55 1000 -1600 300 L 50 50 1 1 B 228 | X D13 56 1000 -1500 300 L 50 50 1 1 B 229 | X D12 57 1000 -1400 300 L 50 50 1 1 B 230 | X D11 58 1000 -1300 300 L 50 50 1 1 B 231 | X D10 59 1000 -1200 300 L 50 50 1 1 B 232 | X AS 6 1000 -1900 300 L 50 50 1 1 O I 233 | X D9 60 1000 -1100 300 L 50 50 1 1 B 234 | X D8 61 1000 -1000 300 L 50 50 1 1 B 235 | X D7 62 1000 -900 300 L 50 50 1 1 B 236 | X D6 63 1000 -800 300 L 50 50 1 1 B 237 | X D5 64 1000 -700 300 L 50 50 1 1 B 238 | X UDS 7 1000 -2000 300 L 50 50 1 1 O I 239 | X LDS 8 1000 -2100 300 L 50 50 1 1 O I 240 | X R/W 9 1000 -2200 300 L 50 50 1 1 O 241 | ENDDRAW 242 | ENDDEF 243 | # 244 | # Device_C 245 | # 246 | DEF Device_C C 0 10 N Y 1 F N 247 | F0 "C" 25 100 50 H V L CNN 248 | F1 "Device_C" 25 -100 50 H V L CNN 249 | F2 "" 38 -150 50 H I C CNN 250 | F3 "" 0 0 50 H I C CNN 251 | $FPLIST 252 | C_* 253 | $ENDFPLIST 254 | DRAW 255 | P 2 0 1 20 -80 -30 80 -30 N 256 | P 2 0 1 20 -80 30 80 30 N 257 | X ~ 1 0 150 110 D 50 50 1 1 P 258 | X ~ 2 0 -150 110 U 50 50 1 1 P 259 | ENDDRAW 260 | ENDDEF 261 | # 262 | # Device_LED 263 | # 264 | DEF Device_LED D 0 40 N N 1 F N 265 | F0 "D" 0 100 50 H V C CNN 266 | F1 "Device_LED" 0 -100 50 H V C CNN 267 | F2 "" 0 0 50 H I C CNN 268 | F3 "" 0 0 50 H I C CNN 269 | $FPLIST 270 | LED* 271 | LED_SMD:* 272 | LED_THT:* 273 | $ENDFPLIST 274 | DRAW 275 | P 2 0 1 8 -50 -50 -50 50 N 276 | P 2 0 1 0 -50 0 50 0 N 277 | P 4 0 1 8 50 -50 50 50 -50 0 50 -50 N 278 | P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N 279 | P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N 280 | X K 1 -150 0 100 R 50 50 1 1 P 281 | X A 2 150 0 100 L 50 50 1 1 P 282 | ENDDRAW 283 | ENDDEF 284 | # 285 | # Device_R 286 | # 287 | DEF Device_R R 0 0 N Y 1 F N 288 | F0 "R" 80 0 50 V V C CNN 289 | F1 "Device_R" 0 0 50 V V C CNN 290 | F2 "" -70 0 50 V I C CNN 291 | F3 "" 0 0 50 H I C CNN 292 | $FPLIST 293 | R_* 294 | $ENDFPLIST 295 | DRAW 296 | S -40 -100 40 100 0 1 10 N 297 | X ~ 1 0 150 50 D 50 50 1 1 P 298 | X ~ 2 0 -150 50 U 50 50 1 1 P 299 | ENDDRAW 300 | ENDDEF 301 | # 302 | # HYB5118160BSJ_HYB5118160BSJ 303 | # 304 | DEF HYB5118160BSJ_HYB5118160BSJ U 0 40 Y Y 1 F N 305 | F0 "U" 0 -100 50 H V C CNN 306 | F1 "HYB5118160BSJ_HYB5118160BSJ" 0 100 50 H V C CNN 307 | F2 "MODULE" 0 0 50 H I C CNN 308 | F3 "DOCUMENTATION" 0 0 50 H I C CNN 309 | DRAW 310 | S -450 -1200 450 1200 1 0 0 N 311 | X VCC 1 -750 1000 300 R 50 50 1 1 W 312 | X D8 10 -750 100 300 R 50 50 1 1 B 313 | X NC 11 -750 0 300 R 50 50 1 1 U 314 | X NC 12 -750 -100 300 R 50 50 1 1 U 315 | X WE 13 -750 -200 300 R 50 50 1 1 I I 316 | X RAS 14 -750 -300 300 R 50 50 1 1 I I 317 | X NC 15 -750 -400 300 R 50 50 1 1 U 318 | X NC 16 -750 -500 300 R 50 50 1 1 U 319 | X A0 17 -750 -600 300 R 50 50 1 1 I 320 | X A1 18 -750 -700 300 R 50 50 1 1 I 321 | X A2 19 -750 -800 300 R 50 50 1 1 I 322 | X D1 2 -750 900 300 R 50 50 1 1 B 323 | X A3 20 -750 -900 300 R 50 50 1 1 I 324 | X VCC 21 -750 -1000 300 R 50 50 1 1 W 325 | X GND 22 750 -1000 300 L 50 50 1 1 W 326 | X A4 23 750 -900 300 L 50 50 1 1 I 327 | X A5 24 750 -800 300 L 50 50 1 1 I 328 | X A6 25 750 -700 300 L 50 50 1 1 I 329 | X A7 26 750 -600 300 L 50 50 1 1 I 330 | X A8 27 750 -500 300 L 50 50 1 1 I 331 | X A9 28 750 -400 300 L 50 50 1 1 I 332 | X OE 29 750 -300 300 L 50 50 1 1 I I 333 | X D2 3 -750 800 300 R 50 50 1 1 B 334 | X UCAS 30 750 -200 300 L 50 50 1 1 I I 335 | X LCAS 31 750 -100 300 L 50 50 1 1 I I 336 | X NC 32 750 0 300 L 50 50 1 1 U 337 | X D9 33 750 100 300 L 50 50 1 1 B 338 | X D10 34 750 200 300 L 50 50 1 1 B 339 | X D11 35 750 300 300 L 50 50 1 1 B 340 | X D12 36 750 400 300 L 50 50 1 1 B 341 | X GND 37 750 500 300 L 50 50 1 1 W 342 | X D13 38 750 600 300 L 50 50 1 1 B 343 | X D14 39 750 700 300 L 50 50 1 1 B 344 | X D3 4 -750 700 300 R 50 50 1 1 B 345 | X D15 40 750 800 300 L 50 50 1 1 B 346 | X D16 41 750 900 300 L 50 50 1 1 B 347 | X GND 42 750 1000 300 L 50 50 1 1 W 348 | X D4 5 -750 600 300 R 50 50 1 1 B 349 | X VCC 6 -750 500 300 R 50 50 1 1 W 350 | X D5 7 -750 400 300 R 50 50 1 1 B 351 | X D6 8 -750 300 300 R 50 50 1 1 B 352 | X D7 9 -750 200 300 R 50 50 1 1 B 353 | ENDDRAW 354 | ENDDEF 355 | # 356 | # conn_CONN_1 357 | # 358 | DEF conn_CONN_1 P 0 30 N N 1 F N 359 | F0 "P" 80 0 40 H V C CNN 360 | F1 "conn_CONN_1" -50 40 30 H I C CNN 361 | F2 "" 0 0 50 H I C CNN 362 | F3 "" 0 0 50 H I C CNN 363 | DRAW 364 | C 0 0 31 0 1 0 N 365 | P 2 0 1 0 -30 0 -50 0 N 366 | X 1 1 -150 0 100 R 60 60 1 1 P 367 | ENDDRAW 368 | ENDDEF 369 | # 370 | # conn_CONN_5X2 371 | # 372 | DEF conn_CONN_5X2 P 0 40 Y Y 1 F N 373 | F0 "P" 0 300 60 H V C CNN 374 | F1 "conn_CONN_5X2" 0 0 50 V V C CNN 375 | F2 "" 0 0 50 H I C CNN 376 | F3 "" 0 0 50 H I C CNN 377 | DRAW 378 | S -100 250 100 -250 0 1 0 N 379 | X ~ 1 -400 200 300 R 60 60 1 1 P I 380 | X ~ 10 400 -200 300 L 60 60 1 1 P I 381 | X ~ 2 400 200 300 L 60 60 1 1 P I 382 | X ~ 3 -400 100 300 R 60 60 1 1 P I 383 | X ~ 4 400 100 300 L 60 60 1 1 P I 384 | X ~ 5 -400 0 300 R 60 60 1 1 P I 385 | X ~ 6 400 0 300 L 60 60 1 1 P I 386 | X ~ 7 -400 -100 300 R 60 60 1 1 P I 387 | X ~ 8 400 -100 300 L 60 60 1 1 P I 388 | X ~ 9 -400 -200 300 R 60 60 1 1 P I 389 | ENDDRAW 390 | ENDDEF 391 | # 392 | # power_GND 393 | # 394 | DEF power_GND #PWR 0 0 Y Y 1 F P 395 | F0 "#PWR" 0 -250 50 H I C CNN 396 | F1 "power_GND" 0 -150 50 H V C CNN 397 | F2 "" 0 0 50 H I C CNN 398 | F3 "" 0 0 50 H I C CNN 399 | DRAW 400 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 401 | X GND 1 0 0 0 D 50 50 1 1 W N 402 | ENDDRAW 403 | ENDDEF 404 | # 405 | # power_VCC 406 | # 407 | DEF power_VCC #PWR 0 0 Y Y 1 F P 408 | F0 "#PWR" 0 -150 50 H I C CNN 409 | F1 "power_VCC" 0 150 50 H V C CNN 410 | F2 "" 0 0 50 H I C CNN 411 | F3 "" 0 0 50 H I C CNN 412 | DRAW 413 | C 0 75 25 0 1 0 N 414 | P 2 0 1 0 0 0 0 50 N 415 | X VCC 1 0 0 0 U 50 50 1 1 W N 416 | ENDDRAW 417 | ENDDEF 418 | # 419 | #End Library 420 | -------------------------------------------------------------------------------- /OpenAmiga500FastRamExpansion.pretty/DIP-64_W22.86mm_Socket_LongPads_IC.kicad_mod: -------------------------------------------------------------------------------- 1 | (module DIP-64_W22.86mm_Socket_LongPads_IC (layer F.Cu) (tedit 5C786568) 2 | (descr "64-lead dip package, row spacing 22.86 mm (900 mils), Socket, LongPads") 3 | (tags "DIL DIP PDIP 2.54mm 22.86mm 900mil Socket LongPads") 4 | (fp_text reference U1 (at 11.43 36.703) (layer F.Fab) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value 68000D (at 11.43 81.13) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_arc (start 11.43 -1.39) (end 10.43 -1.39) (angle -180) (layer F.SilkS) (width 0.12)) 11 | (fp_line (start 1.255 -1.27) (end 22.605 -1.27) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 22.605 -1.27) (end 22.605 80.01) (layer F.Fab) (width 0.1)) 13 | (fp_line (start 22.605 80.01) (end 0.255 80.01) (layer F.Fab) (width 0.1)) 14 | (fp_line (start 0.255 80.01) (end 0.255 -0.27) (layer F.Fab) (width 0.1)) 15 | (fp_line (start 0.255 -0.27) (end 1.255 -1.27) (layer F.Fab) (width 0.1)) 16 | (fp_line (start -1.27 -1.27) (end -1.27 80.01) (layer F.Fab) (width 0.1)) 17 | (fp_line (start -1.27 80.01) (end 24.13 80.01) (layer F.Fab) (width 0.1)) 18 | (fp_line (start 24.13 80.01) (end 24.13 -1.27) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 24.13 -1.27) (end -1.27 -1.27) (layer F.Fab) (width 0.1)) 20 | (fp_line (start 10.43 -1.39) (end -1.39 -1.39) (layer F.SilkS) (width 0.12)) 21 | (fp_line (start 1.44 -1.39) (end 1.44 80.13) (layer F.SilkS) (width 0.12)) 22 | (fp_line (start 1.44 80.13) (end 21.42 80.13) (layer F.SilkS) (width 0.12)) 23 | (fp_line (start 21.42 80.13) (end 21.42 -1.39) (layer F.SilkS) (width 0.12)) 24 | (fp_line (start 24.25 -1.39) (end 12.43 -1.39) (layer F.SilkS) (width 0.12)) 25 | (fp_line (start -1.39 -1.39) (end -1.39 80.13) (layer F.SilkS) (width 0.12)) 26 | (fp_line (start -1.39 80.13) (end 24.25 80.13) (layer F.SilkS) (width 0.12)) 27 | (fp_line (start 24.25 80.13) (end 24.25 -1.39) (layer F.SilkS) (width 0.12)) 28 | (fp_line (start -1.7 -1.7) (end -1.7 80.4) (layer F.CrtYd) (width 0.05)) 29 | (fp_line (start -1.7 80.4) (end 24.5 80.4) (layer F.CrtYd) (width 0.05)) 30 | (fp_line (start 24.5 80.4) (end 24.5 -1.7) (layer F.CrtYd) (width 0.05)) 31 | (fp_line (start 24.5 -1.7) (end -1.7 -1.7) (layer F.CrtYd) (width 0.05)) 32 | (pad 1 thru_hole rect (at 0 0) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 33 | (pad 33 thru_hole oval (at 22.86 78.74) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 34 | (pad 2 thru_hole oval (at 0 2.54) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 35 | (pad 34 thru_hole oval (at 22.86 76.2) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 36 | (pad 3 thru_hole oval (at 0 5.08) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 37 | (pad 35 thru_hole oval (at 22.86 73.66) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 38 | (pad 4 thru_hole oval (at 0 7.62) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 39 | (pad 36 thru_hole oval (at 22.86 71.12) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 40 | (pad 5 thru_hole oval (at 0 10.16) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 41 | (pad 37 thru_hole oval (at 22.86 68.58) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 42 | (pad 6 thru_hole oval (at 0 12.7) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 43 | (pad 38 thru_hole oval (at 22.86 66.04) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 44 | (pad 7 thru_hole oval (at 0 15.24) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 45 | (pad 39 thru_hole oval (at 22.86 63.5) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 46 | (pad 8 thru_hole oval (at 0 17.78) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 47 | (pad 40 thru_hole oval (at 22.86 60.96) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 48 | (pad 9 thru_hole oval (at 0 20.32) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 49 | (pad 41 thru_hole oval (at 22.86 58.42) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 50 | (pad 10 thru_hole oval (at 0 22.86) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 51 | (pad 42 thru_hole oval (at 22.86 55.88) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 52 | (pad 11 thru_hole oval (at 0 25.4) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 53 | (pad 43 thru_hole oval (at 22.86 53.34) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 54 | (pad 12 thru_hole oval (at 0 27.94) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 55 | (pad 44 thru_hole oval (at 22.86 50.8) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 56 | (pad 13 thru_hole oval (at 0 30.48) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 57 | (pad 45 thru_hole oval (at 22.86 48.26) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 58 | (pad 14 thru_hole oval (at 0 33.02) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 59 | (pad 46 thru_hole oval (at 22.86 45.72) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 60 | (pad 15 thru_hole oval (at 0 35.56) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 61 | (pad 47 thru_hole oval (at 22.86 43.18) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 62 | (pad 16 thru_hole oval (at 0 38.1) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 63 | (pad 48 thru_hole oval (at 22.86 40.64) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 64 | (pad 17 thru_hole oval (at 0 40.64) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 65 | (pad 49 thru_hole oval (at 22.86 38.1) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 66 | (pad 18 thru_hole oval (at 0 43.18) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 67 | (pad 50 thru_hole oval (at 22.86 35.56) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 68 | (pad 19 thru_hole oval (at 0 45.72) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 69 | (pad 51 thru_hole oval (at 22.86 33.02) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 70 | (pad 20 thru_hole oval (at 0 48.26) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 71 | (pad 52 thru_hole oval (at 22.86 30.48) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 72 | (pad 21 thru_hole oval (at 0 50.8) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 73 | (pad 53 thru_hole oval (at 22.86 27.94) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 74 | (pad 22 thru_hole oval (at 0 53.34) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 75 | (pad 54 thru_hole oval (at 22.86 25.4) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 76 | (pad 23 thru_hole oval (at 0 55.88) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 77 | (pad 55 thru_hole oval (at 22.86 22.86) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 78 | (pad 24 thru_hole oval (at 0 58.42) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 79 | (pad 56 thru_hole oval (at 22.86 20.32) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 80 | (pad 25 thru_hole oval (at 0 60.96) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 81 | (pad 57 thru_hole oval (at 22.86 17.78) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 82 | (pad 26 thru_hole oval (at 0 63.5) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 83 | (pad 58 thru_hole oval (at 22.86 15.24) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 84 | (pad 27 thru_hole oval (at 0 66.04) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 85 | (pad 59 thru_hole oval (at 22.86 12.7) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 86 | (pad 28 thru_hole oval (at 0 68.58) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 87 | (pad 60 thru_hole oval (at 22.86 10.16) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 88 | (pad 29 thru_hole oval (at 0 71.12) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 89 | (pad 61 thru_hole oval (at 22.86 7.62) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 90 | (pad 30 thru_hole oval (at 0 73.66) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 91 | (pad 62 thru_hole oval (at 22.86 5.08) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 92 | (pad 31 thru_hole oval (at 0 76.2) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 93 | (pad 63 thru_hole oval (at 22.86 2.54) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 94 | (pad 32 thru_hole oval (at 0 78.74) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 95 | (pad 64 thru_hole oval (at 22.86 0) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 96 | (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-64_W15.24mm.step 97 | (offset (xyz 0 0 5.5)) 98 | (scale (xyz 1.5 1 1.3)) 99 | (rotate (xyz 0 0 0)) 100 | ) 101 | (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-64_W15.24mm_Socket.step 102 | (at (xyz 0 0 0)) 103 | (scale (xyz 1.5 1 1.3)) 104 | (rotate (xyz 0 0 0)) 105 | ) 106 | ) 107 | -------------------------------------------------------------------------------- /OpenAmiga500FastRamExpansion.pretty/DIP-64_W22.86mm_Socket_LongPads_Socket.kicad_mod: -------------------------------------------------------------------------------- 1 | (module DIP-64_W22.86mm_Socket_LongPads_Socket (layer F.Cu) (tedit 5C7865AA) 2 | (descr "64-lead dip package, row spacing 22.86 mm (900 mils), Socket, LongPads") 3 | (tags "DIL DIP PDIP 2.54mm 22.86mm 900mil Socket LongPads") 4 | (fp_text reference J1 (at 11.43 39.37) (layer F.Fab) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value 68000_SOCKET (at 11.43 81.13) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_line (start 1.255 -1.27) (end 22.605 -1.27) (layer F.Fab) (width 0.1)) 11 | (fp_line (start 22.605 -1.27) (end 22.605 80.01) (layer F.Fab) (width 0.1)) 12 | (fp_line (start 22.605 80.01) (end 0.255 80.01) (layer F.Fab) (width 0.1)) 13 | (fp_line (start 0.255 80.01) (end 0.255 -0.27) (layer F.Fab) (width 0.1)) 14 | (fp_line (start 0.255 -0.27) (end 1.255 -1.27) (layer F.Fab) (width 0.1)) 15 | (fp_line (start -1.27 -1.27) (end -1.27 80.01) (layer F.Fab) (width 0.1)) 16 | (fp_line (start -1.27 80.01) (end 24.13 80.01) (layer F.Fab) (width 0.1)) 17 | (fp_line (start 24.13 80.01) (end 24.13 -1.27) (layer F.Fab) (width 0.1)) 18 | (fp_line (start 24.13 -1.27) (end -1.27 -1.27) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 1.524 -1.397) (end 1.524 80.137) (layer B.SilkS) (width 0.12)) 20 | (fp_line (start 21.336 80.137) (end 21.336 -1.397) (layer B.SilkS) (width 0.12)) 21 | (fp_line (start 24.384 -1.397) (end 21.336 -1.397) (layer B.SilkS) (width 0.12)) 22 | (fp_line (start -1.524 -1.397) (end -1.524 80.137) (layer B.SilkS) (width 0.12)) 23 | (fp_line (start -1.524 80.137) (end 1.524 80.137) (layer B.SilkS) (width 0.12)) 24 | (fp_line (start 24.384 80.137) (end 24.384 -1.397) (layer B.SilkS) (width 0.12)) 25 | (fp_line (start 1.524 -1.397) (end -1.524 -1.397) (layer B.SilkS) (width 0.12)) 26 | (fp_line (start -1.7 -1.7) (end -1.7 80.4) (layer F.CrtYd) (width 0.05)) 27 | (fp_line (start -1.7 80.4) (end 24.5 80.4) (layer F.CrtYd) (width 0.05)) 28 | (fp_line (start 24.5 80.4) (end 24.5 -1.7) (layer F.CrtYd) (width 0.05)) 29 | (fp_line (start 24.5 -1.7) (end -1.7 -1.7) (layer F.CrtYd) (width 0.05)) 30 | (fp_line (start 24.384 80.137) (end 21.336 80.137) (layer B.SilkS) (width 0.12)) 31 | (pad 1 thru_hole rect (at 0 0) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 32 | (pad 33 thru_hole oval (at 22.86 78.74) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 33 | (pad 2 thru_hole oval (at 0 2.54) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 34 | (pad 34 thru_hole oval (at 22.86 76.2) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 35 | (pad 3 thru_hole oval (at 0 5.08) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 36 | (pad 35 thru_hole oval (at 22.86 73.66) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 37 | (pad 4 thru_hole oval (at 0 7.62) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 38 | (pad 36 thru_hole oval (at 22.86 71.12) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 39 | (pad 5 thru_hole oval (at 0 10.16) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 40 | (pad 37 thru_hole oval (at 22.86 68.58) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 41 | (pad 6 thru_hole oval (at 0 12.7) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 42 | (pad 38 thru_hole oval (at 22.86 66.04) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 43 | (pad 7 thru_hole oval (at 0 15.24) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 44 | (pad 39 thru_hole oval (at 22.86 63.5) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 45 | (pad 8 thru_hole oval (at 0 17.78) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 46 | (pad 40 thru_hole oval (at 22.86 60.96) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 47 | (pad 9 thru_hole oval (at 0 20.32) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 48 | (pad 41 thru_hole oval (at 22.86 58.42) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 49 | (pad 10 thru_hole oval (at 0 22.86) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 50 | (pad 42 thru_hole oval (at 22.86 55.88) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 51 | (pad 11 thru_hole oval (at 0 25.4) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 52 | (pad 43 thru_hole oval (at 22.86 53.34) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 53 | (pad 12 thru_hole oval (at 0 27.94) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 54 | (pad 44 thru_hole oval (at 22.86 50.8) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 55 | (pad 13 thru_hole oval (at 0 30.48) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 56 | (pad 45 thru_hole oval (at 22.86 48.26) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 57 | (pad 14 thru_hole oval (at 0 33.02) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 58 | (pad 46 thru_hole oval (at 22.86 45.72) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 59 | (pad 15 thru_hole oval (at 0 35.56) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 60 | (pad 47 thru_hole oval (at 22.86 43.18) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 61 | (pad 16 thru_hole oval (at 0 38.1) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 62 | (pad 48 thru_hole oval (at 22.86 40.64) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 63 | (pad 17 thru_hole oval (at 0 40.64) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 64 | (pad 49 thru_hole oval (at 22.86 38.1) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 65 | (pad 18 thru_hole oval (at 0 43.18) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 66 | (pad 50 thru_hole oval (at 22.86 35.56) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 67 | (pad 19 thru_hole oval (at 0 45.72) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 68 | (pad 51 thru_hole oval (at 22.86 33.02) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 69 | (pad 20 thru_hole oval (at 0 48.26) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 70 | (pad 52 thru_hole oval (at 22.86 30.48) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 71 | (pad 21 thru_hole oval (at 0 50.8) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 72 | (pad 53 thru_hole oval (at 22.86 27.94) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 73 | (pad 22 thru_hole oval (at 0 53.34) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 74 | (pad 54 thru_hole oval (at 22.86 25.4) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 75 | (pad 23 thru_hole oval (at 0 55.88) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 76 | (pad 55 thru_hole oval (at 22.86 22.86) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 77 | (pad 24 thru_hole oval (at 0 58.42) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 78 | (pad 56 thru_hole oval (at 22.86 20.32) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 79 | (pad 25 thru_hole oval (at 0 60.96) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 80 | (pad 57 thru_hole oval (at 22.86 17.78) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 81 | (pad 26 thru_hole oval (at 0 63.5) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 82 | (pad 58 thru_hole oval (at 22.86 15.24) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 83 | (pad 27 thru_hole oval (at 0 66.04) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 84 | (pad 59 thru_hole oval (at 22.86 12.7) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 85 | (pad 28 thru_hole oval (at 0 68.58) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 86 | (pad 60 thru_hole oval (at 22.86 10.16) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 87 | (pad 29 thru_hole oval (at 0 71.12) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 88 | (pad 61 thru_hole oval (at 22.86 7.62) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 89 | (pad 30 thru_hole oval (at 0 73.66) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 90 | (pad 62 thru_hole oval (at 22.86 5.08) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 91 | (pad 31 thru_hole oval (at 0 76.2) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 92 | (pad 63 thru_hole oval (at 22.86 2.54) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 93 | (pad 32 thru_hole oval (at 0 78.74) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 94 | (pad 64 thru_hole oval (at 22.86 0) (size 2.4 1.6) (drill 0.8) (layers *.Cu *.Mask)) 95 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x32_P2.54mm_Vertical.wrl 96 | (offset (xyz 0 0 -2)) 97 | (scale (xyz 1 1 1)) 98 | (rotate (xyz 0 180 0)) 99 | ) 100 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x32_P2.54mm_Vertical.wrl 101 | (offset (xyz 22.9 0 -2)) 102 | (scale (xyz 1 1 1)) 103 | (rotate (xyz 0 180 0)) 104 | ) 105 | ) 106 | -------------------------------------------------------------------------------- /OpenAmiga500FastRamExpansion.pretty/LED_0805_HandSoldering_ModSilkS.kicad_mod: -------------------------------------------------------------------------------- 1 | (module LED_0805_HandSoldering_ModSilkS (layer F.Cu) (tedit 5B353261) 2 | (descr "Resistor SMD 0805, hand soldering") 3 | (tags "resistor 0805") 4 | (attr smd) 5 | (fp_text reference D2 (at 3.429 0) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value LED (at 0 1.75) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start -0.2857 -0.4) (end -0.2857 0.4) (layer F.SilkS) (width 0.1)) 12 | (fp_line (start -0.2857 0) (end 0.3143 -0.4) (layer F.SilkS) (width 0.1)) 13 | (fp_line (start 0.3143 0.4) (end -0.2857 0) (layer F.SilkS) (width 0.1)) 14 | (fp_line (start 0.3143 -0.4) (end 0.3143 0.4) (layer F.SilkS) (width 0.1)) 15 | (fp_line (start 0.6096 0.762) (end -0.6096 0.762) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start -0.6096 -0.762) (end 0.6096 -0.762) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start -2.35 -0.9) (end 2.35 -0.9) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -2.35 -0.9) (end -2.35 0.9) (layer F.CrtYd) (width 0.05)) 19 | (fp_line (start 2.35 0.9) (end 2.35 -0.9) (layer F.CrtYd) (width 0.05)) 20 | (fp_line (start 2.35 0.9) (end -2.35 0.9) (layer F.CrtYd) (width 0.05)) 21 | (pad 1 smd rect (at -1.35 0) (size 1.5 1.3) (layers F.Cu F.Mask)) 22 | (pad 2 smd rect (at 1.35 0) (size 1.5 1.3) (layers F.Cu F.Mask)) 23 | (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl 24 | (at (xyz 0 0 0)) 25 | (scale (xyz 1 1 1)) 26 | (rotate (xyz 0 0 0)) 27 | ) 28 | ) 29 | -------------------------------------------------------------------------------- /OpenAmiga500FastRamExpansion.pretty/PLCC-44_THT-Socket.kicad_mod: -------------------------------------------------------------------------------- 1 | (module PLCC-44_THT-Socket (layer F.Cu) (tedit 5C79C7B2) 2 | (descr "PLCC, 44 pins, through hole") 3 | (tags "plcc leaded") 4 | (fp_text reference U4 (at -1.27 19.558) (layer F.SilkS) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value ATF1502AS-10JU44 (at -1.27 19.1) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_text user %R (at -1.27 6.35) (layer F.Fab) 11 | (effects (font (size 1 1) (thickness 0.15))) 12 | ) 13 | (fp_line (start 10.58 -5.5) (end -12.12 -5.5) (layer F.SilkS) (width 0.12)) 14 | (fp_line (start 10.58 18.2) (end 10.58 -5.5) (layer F.SilkS) (width 0.12)) 15 | (fp_line (start -13.12 18.2) (end 10.58 18.2) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start -13.12 -4.5) (end -13.12 18.2) (layer F.SilkS) (width 0.12)) 17 | (fp_line (start -12.12 -5.5) (end -13.12 -4.5) (layer F.SilkS) (width 0.12)) 18 | (fp_line (start -1.27 -4.4) (end -0.77 -5.4) (layer F.Fab) (width 0.1)) 19 | (fp_line (start -1.77 -5.4) (end -1.27 -4.4) (layer F.Fab) (width 0.1)) 20 | (fp_line (start 7.94 -2.86) (end -10.48 -2.86) (layer F.Fab) (width 0.1)) 21 | (fp_line (start 7.94 15.56) (end 7.94 -2.86) (layer F.Fab) (width 0.1)) 22 | (fp_line (start -10.48 15.56) (end 7.94 15.56) (layer F.Fab) (width 0.1)) 23 | (fp_line (start -10.48 -2.86) (end -10.48 15.56) (layer F.Fab) (width 0.1)) 24 | (fp_line (start 10.98 -5.9) (end -13.52 -5.9) (layer F.CrtYd) (width 0.05)) 25 | (fp_line (start 10.98 18.6) (end 10.98 -5.9) (layer F.CrtYd) (width 0.05)) 26 | (fp_line (start -13.52 18.6) (end 10.98 18.6) (layer F.CrtYd) (width 0.05)) 27 | (fp_line (start -13.52 -5.9) (end -13.52 18.6) (layer F.CrtYd) (width 0.05)) 28 | (fp_line (start 10.48 -5.4) (end -12.02 -5.4) (layer F.Fab) (width 0.1)) 29 | (fp_line (start 10.48 18.1) (end 10.48 -5.4) (layer F.Fab) (width 0.1)) 30 | (fp_line (start -13.02 18.1) (end 10.48 18.1) (layer F.Fab) (width 0.1)) 31 | (fp_line (start -13.02 -4.4) (end -13.02 18.1) (layer F.Fab) (width 0.1)) 32 | (fp_line (start -12.02 -5.4) (end -13.02 -4.4) (layer F.Fab) (width 0.1)) 33 | (pad 39 thru_hole circle (at 7.62 0) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 34 | (pad 37 thru_hole circle (at 7.62 2.54) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 35 | (pad 35 thru_hole circle (at 7.62 5.08) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 36 | (pad 33 thru_hole circle (at 7.62 7.62) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 37 | (pad 31 thru_hole circle (at 7.62 10.16) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 38 | (pad 40 thru_hole circle (at 5.08 -2.54) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 39 | (pad 38 thru_hole circle (at 5.08 2.54) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 40 | (pad 36 thru_hole circle (at 5.08 5.08) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 41 | (pad 34 thru_hole circle (at 5.08 7.62) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 42 | (pad 32 thru_hole circle (at 5.08 10.16) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 43 | (pad 30 thru_hole circle (at 5.08 12.7) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 44 | (pad 28 thru_hole circle (at 5.08 15.24) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 45 | (pad 26 thru_hole circle (at 2.54 15.24) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 46 | (pad 24 thru_hole circle (at 0 15.24) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 47 | (pad 22 thru_hole circle (at -2.54 15.24) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 48 | (pad 20 thru_hole circle (at -5.08 15.24) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 49 | (pad 18 thru_hole circle (at -7.62 15.24) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 50 | (pad 29 thru_hole circle (at 7.62 12.7) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 51 | (pad 27 thru_hole circle (at 2.54 12.7) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 52 | (pad 25 thru_hole circle (at 0 12.7) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 53 | (pad 23 thru_hole circle (at -2.54 12.7) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 54 | (pad 21 thru_hole circle (at -5.08 12.7) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 55 | (pad 19 thru_hole circle (at -7.62 12.7) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 56 | (pad 17 thru_hole circle (at -10.16 12.7) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 57 | (pad 15 thru_hole circle (at -10.16 10.16) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 58 | (pad 13 thru_hole circle (at -10.16 7.62) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 59 | (pad 11 thru_hole circle (at -10.16 5.08) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 60 | (pad 9 thru_hole circle (at -10.16 2.54) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 61 | (pad 7 thru_hole circle (at -10.16 0) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 62 | (pad 16 thru_hole circle (at -7.62 10.16) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 63 | (pad 14 thru_hole circle (at -7.62 7.62) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 64 | (pad 12 thru_hole circle (at -7.62 5.08) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 65 | (pad 10 thru_hole circle (at -7.62 2.54) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 66 | (pad 8 thru_hole circle (at -7.62 0) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 67 | (pad 42 thru_hole circle (at 2.54 -2.54) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 68 | (pad 44 thru_hole circle (at 0 -2.54) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 69 | (pad 6 thru_hole circle (at -7.62 -2.54) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 70 | (pad 4 thru_hole circle (at -5.08 -2.54) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 71 | (pad 2 thru_hole circle (at -2.54 -2.54) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 72 | (pad 41 thru_hole circle (at 5.08 0) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 73 | (pad 43 thru_hole circle (at 2.54 0) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 74 | (pad 5 thru_hole circle (at -5.08 0) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 75 | (pad 3 thru_hole circle (at -2.54 0) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 76 | (pad 1 thru_hole rect (at 0 0) (size 1.4224 1.4224) (drill 0.8) (layers *.Cu *.Mask)) 77 | (model ${P3D_WALTER}/pth_plcc/plcc44_pth-skt.wrl 78 | (offset (xyz -1.27 -6.5 0)) 79 | (scale (xyz 1 1 1)) 80 | (rotate (xyz 0 0 180)) 81 | ) 82 | ) 83 | -------------------------------------------------------------------------------- /OpenAmiga500FastRamExpansion.pretty/SOJ-42-LongPads.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SOJ-42-LongPads (layer F.Cu) (tedit 5C6B2285) 2 | (descr "Support CMS SOJ 40 pins") 3 | (tags "CMS SOJ") 4 | (attr smd) 5 | (fp_text reference U4 (at 0 0 180) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value HYB5118160BSJ (at 0 2.5 180) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start -13.462 -3.81) (end 12.192 -3.81) (layer F.SilkS) (width 0.15)) 12 | (fp_line (start 12.192 4.064) (end -13.462 4.064) (layer F.SilkS) (width 0.15)) 13 | (fp_line (start -12.7 2.54) (end -12.192 3.048) (layer F.SilkS) (width 0.15)) 14 | (fp_line (start -12.192 3.048) (end -12.7 3.556) (layer F.SilkS) (width 0.15)) 15 | (fp_line (start -12.7 3.556) (end -13.208 3.048) (layer F.SilkS) (width 0.15)) 16 | (fp_line (start -13.208 3.048) (end -12.7 2.54) (layer F.SilkS) (width 0.15)) 17 | (fp_line (start 13.97 4.064) (end 13.97 -3.81) (layer F.SilkS) (width 0.15)) 18 | (fp_line (start 12.192 4.064) (end 12.192 4.064) (layer F.SilkS) (width 0.15)) 19 | (fp_line (start 12.192 4.064) (end 13.97 4.064) (layer F.SilkS) (width 0.15)) 20 | (fp_line (start 12.192 -3.81) (end 13.97 -3.81) (layer F.SilkS) (width 0.15)) 21 | (fp_line (start -13.843 4.064) (end -13.843 -3.81) (layer F.SilkS) (width 0.15)) 22 | (fp_line (start -13.462 -3.81) (end -13.843 -3.81) (layer F.SilkS) (width 0.15)) 23 | (fp_line (start -13.462 4.064) (end -13.843 4.064) (layer F.SilkS) (width 0.15)) 24 | (pad 1 smd rect (at -12.7 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 25 | (pad 2 smd rect (at -11.43 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 26 | (pad 3 smd rect (at -10.16 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 27 | (pad 4 smd rect (at -8.89 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 28 | (pad 5 smd rect (at -7.62 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 29 | (pad 6 smd rect (at -6.35 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 30 | (pad 7 smd rect (at -5.08 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 31 | (pad 8 smd rect (at -3.81 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 32 | (pad 9 smd rect (at -2.54 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 33 | (pad 10 smd rect (at -1.27 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 34 | (pad 11 smd rect (at 0 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 35 | (pad 12 smd rect (at 1.27 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 36 | (pad 13 smd rect (at 2.54 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 37 | (pad 14 smd rect (at 3.81 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 38 | (pad 15 smd rect (at 5.08 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 39 | (pad 16 smd rect (at 6.35 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 40 | (pad 17 smd rect (at 7.62 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 41 | (pad 18 smd rect (at 8.89 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 42 | (pad 19 smd rect (at 10.16 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 43 | (pad 20 smd rect (at 11.43 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 44 | (pad 21 smd rect (at 12.7 5.588) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 45 | (pad 22 smd rect (at 12.7 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 46 | (pad 23 smd rect (at 11.43 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 47 | (pad 24 smd rect (at 10.16 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 48 | (pad 25 smd rect (at 8.89 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 49 | (pad 26 smd rect (at 7.62 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 50 | (pad 27 smd rect (at 6.35 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 51 | (pad 28 smd rect (at 5.08 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 52 | (pad 29 smd rect (at 3.81 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 53 | (pad 30 smd rect (at 2.54 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 54 | (pad 31 smd rect (at 1.27 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 55 | (pad 32 smd rect (at 0 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 56 | (pad 33 smd rect (at -1.27 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 57 | (pad 34 smd rect (at -2.54 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 58 | (pad 35 smd rect (at -3.81 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 59 | (pad 36 smd rect (at -5.08 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 60 | (pad 37 smd rect (at -6.35 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 61 | (pad 38 smd rect (at -7.62 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 62 | (pad 39 smd rect (at -8.89 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 63 | (pad 40 smd rect (at -10.16 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 64 | (pad 41 smd rect (at -11.43 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 65 | (pad 42 smd rect (at -12.7 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 66 | ) 67 | -------------------------------------------------------------------------------- /OpenAmiga500FastRamExpansion.pretty/SOJ-42-Socket-LongPads.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SOJ-42-Socket-LongPads (layer F.Cu) (tedit 5C69FB9E) 2 | (descr "Support CMS SOJ 40 pins") 3 | (tags "CMS SOJ") 4 | (attr smd) 5 | (fp_text reference U2 (at 0 0 180) (layer F.SilkS) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text value NEC_424260 (at 0 2.5 180) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (fp_line (start -13.462 -3.81) (end 12.192 -3.81) (layer F.SilkS) (width 0.15)) 12 | (fp_line (start 12.192 4.064) (end -13.462 4.064) (layer F.SilkS) (width 0.15)) 13 | (fp_line (start -12.7 2.54) (end -12.192 3.048) (layer F.SilkS) (width 0.15)) 14 | (fp_line (start -12.192 3.048) (end -12.7 3.556) (layer F.SilkS) (width 0.15)) 15 | (fp_line (start -12.7 3.556) (end -13.208 3.048) (layer F.SilkS) (width 0.15)) 16 | (fp_line (start -13.208 3.048) (end -12.7 2.54) (layer F.SilkS) (width 0.15)) 17 | (fp_line (start 17.526 -8.255) (end 17.526 8.382) (layer F.SilkS) (width 0.15)) 18 | (fp_line (start 17.526 -8.255) (end -17.399 -8.255) (layer F.SilkS) (width 0.15)) 19 | (fp_line (start -15.367 8.382) (end -17.399 6.35) (layer F.SilkS) (width 0.15)) 20 | (fp_line (start -17.399 6.35) (end -17.399 -8.255) (layer F.SilkS) (width 0.15)) 21 | (fp_line (start 13.97 8.382) (end 13.97 -8.255) (layer F.SilkS) (width 0.15)) 22 | (fp_line (start 12.192 4.064) (end 12.192 4.064) (layer F.SilkS) (width 0.15)) 23 | (fp_line (start 12.192 4.064) (end 13.97 4.064) (layer F.SilkS) (width 0.15)) 24 | (fp_line (start 12.192 -3.81) (end 13.97 -3.81) (layer F.SilkS) (width 0.15)) 25 | (fp_line (start -13.843 8.382) (end -13.843 -8.255) (layer F.SilkS) (width 0.15)) 26 | (fp_line (start -13.462 -3.81) (end -13.843 -3.81) (layer F.SilkS) (width 0.15)) 27 | (fp_line (start -13.462 4.064) (end -13.843 4.064) (layer F.SilkS) (width 0.15)) 28 | (fp_line (start 17.526 8.382) (end -15.367 8.382) (layer F.SilkS) (width 0.15)) 29 | (pad 1 smd rect (at -12.7 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 30 | (pad 2 smd rect (at -11.43 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 31 | (pad 3 smd rect (at -10.16 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 32 | (pad 4 smd rect (at -8.89 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 33 | (pad 5 smd rect (at -7.62 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 34 | (pad 6 smd rect (at -6.35 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 35 | (pad 7 smd rect (at -5.08 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 36 | (pad 8 smd rect (at -3.81 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 37 | (pad 9 smd rect (at -2.54 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 38 | (pad 10 smd rect (at -1.27 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 39 | (pad 11 smd rect (at 0 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 40 | (pad 12 smd rect (at 1.27 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 41 | (pad 13 smd rect (at 2.54 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 42 | (pad 14 smd rect (at 3.81 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 43 | (pad 15 smd rect (at 5.08 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 44 | (pad 16 smd rect (at 6.35 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 45 | (pad 17 smd rect (at 7.62 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 46 | (pad 18 smd rect (at 8.89 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 47 | (pad 19 smd rect (at 10.16 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 48 | (pad 20 smd rect (at 11.43 5.58) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 49 | (pad 21 smd rect (at 12.7 5.588) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 50 | (pad 22 smd rect (at 12.7 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 51 | (pad 23 smd rect (at 11.43 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 52 | (pad 24 smd rect (at 10.16 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 53 | (pad 25 smd rect (at 8.89 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 54 | (pad 26 smd rect (at 7.62 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 55 | (pad 27 smd rect (at 6.35 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 56 | (pad 28 smd rect (at 5.08 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 57 | (pad 29 smd rect (at 3.81 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 58 | (pad 30 smd rect (at 2.54 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 59 | (pad 31 smd rect (at 1.27 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 60 | (pad 32 smd rect (at 0 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 61 | (pad 33 smd rect (at -1.27 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 62 | (pad 34 smd rect (at -2.54 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 63 | (pad 35 smd rect (at -3.81 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 64 | (pad 36 smd rect (at -5.08 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 65 | (pad 37 smd rect (at -6.35 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 66 | (pad 38 smd rect (at -7.62 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 67 | (pad 39 smd rect (at -8.89 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 68 | (pad 40 smd rect (at -10.16 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 69 | (pad 41 smd rect (at -11.43 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 70 | (pad 42 smd rect (at -12.7 -5.199) (size 0.508 2.778) (layers F.Cu F.Paste F.Mask)) 71 | ) 72 | -------------------------------------------------------------------------------- /OpenAmiga500FastRamExpansion.pretty/SOJ-42.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SOJ-42 (layer F.Cu) 2 | (at 0 0) 3 | (descr "Module CMS SOJ 42 pins") 4 | (tags "CMS SOJ") 5 | (attr smd) 6 | (fp_text reference REF** (at 0 -1.905) (layer F.SilkS) 7 | (effects (font (size 1 1) (thickness 0.15))) 8 | ) 9 | (fp_text value SOJ-42 (at 0 1.905) (layer F.Fab) 10 | (effects (font (size 1 1) (thickness 0.15))) 11 | ) 12 | (fp_circle (center -12.192 2.032) (end -12.192 0.762) (layer F.SilkS) (width 0.15)) 13 | (fp_line (start 13.716 3.81) (end 13.716 -3.81) (layer F.SilkS) (width 0.15)) 14 | (fp_line (start -13.716 3.81) (end -13.716 -3.81) (layer F.SilkS) (width 0.15)) 15 | (fp_line (start 13.716 3.81) (end -13.716 3.81) (layer F.SilkS) (width 0.15)) 16 | (fp_line (start -13.716 -3.81) (end 13.716 -3.81) (layer F.SilkS) (width 0.15)) 17 | (pad 32 smd rect (at 0 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 18 | (pad 11 smd rect (at 0 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 19 | (pad 33 smd rect (at -1.27 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 20 | (pad 34 smd rect (at -2.54 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 21 | (pad 35 smd rect (at -3.81 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 22 | (pad 36 smd rect (at -5.08 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 23 | (pad 37 smd rect (at -6.35 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 24 | (pad 38 smd rect (at -7.62 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 25 | (pad 39 smd rect (at -8.89 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 26 | (pad 40 smd rect (at -10.16 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 27 | (pad 41 smd rect (at -11.43 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 28 | (pad 42 smd rect (at -12.7 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 29 | (pad 10 smd rect (at -1.27 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 30 | (pad 9 smd rect (at -2.54 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 31 | (pad 8 smd rect (at -3.81 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 32 | (pad 7 smd rect (at -5.08 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 33 | (pad 6 smd rect (at -6.35 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 34 | (pad 5 smd rect (at -7.62 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 35 | (pad 4 smd rect (at -8.89 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 36 | (pad 3 smd rect (at -10.16 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 37 | (pad 2 smd rect (at -11.43 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 38 | (pad 1 smd rect (at -12.7 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 39 | (pad 31 smd rect (at 1.27 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 40 | (pad 30 smd rect (at 2.54 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 41 | (pad 29 smd rect (at 3.81 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 42 | (pad 28 smd rect (at 5.08 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 43 | (pad 27 smd rect (at 6.35 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 44 | (pad 26 smd rect (at 7.62 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 45 | (pad 25 smd rect (at 8.89 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 46 | (pad 24 smd rect (at 10.16 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 47 | (pad 23 smd rect (at 11.43 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 48 | (pad 22 smd rect (at 12.7 -5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 49 | (pad 12 smd rect (at 1.27 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 50 | (pad 13 smd rect (at 2.54 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 51 | (pad 14 smd rect (at 3.81 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 52 | (pad 15 smd rect (at 5.08 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 53 | (pad 16 smd rect (at 6.35 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 54 | (pad 17 smd rect (at 7.62 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 55 | (pad 18 smd rect (at 8.89 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 56 | (pad 19 smd rect (at 10.16 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 57 | (pad 20 smd rect (at 11.43 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 58 | (pad 21 smd rect (at 12.7 5.08) (size 0.508 2.032) (layers F.Cu F.Paste F.Mask)) 59 | (model SMD_Packages.3dshapes/SOJ-42.wrl 60 | (at (xyz 0 0 0)) 61 | (scale (xyz 0.5 0.6 0.5)) 62 | (rotate (xyz 0 0 0)) 63 | ) 64 | ) 65 | -------------------------------------------------------------------------------- /OpenAmiga500FastRamExpansion.pro: -------------------------------------------------------------------------------- 1 | update=dom 19 mag 2019 15:36:08 CEST 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [cvpcb] 9 | version=1 10 | NetIExt=net 11 | [eeschema] 12 | version=1 13 | LibDir= 14 | [eeschema/libraries] 15 | [schematic_editor] 16 | version=1 17 | PageLayoutDescrFile= 18 | PlotDirectoryName= 19 | SubpartIdSeparator=0 20 | SubpartFirstId=65 21 | NetFmtName= 22 | SpiceAjustPassiveValues=0 23 | LabSize=50 24 | ERC_TestSimilarLabels=1 25 | [pcbnew] 26 | version=1 27 | PageLayoutDescrFile= 28 | LastNetListRead=OpenAmiga500FastRamExpansion.net 29 | CopperLayerCount=2 30 | BoardThickness=1.6 31 | AllowMicroVias=0 32 | AllowBlindVias=0 33 | RequireCourtyardDefinitions=0 34 | ProhibitOverlappingCourtyards=1 35 | MinTrackWidth=0.2 36 | MinViaDiameter=0.4 37 | MinViaDrill=0.3 38 | MinMicroViaDiameter=0.2 39 | MinMicroViaDrill=0.09999999999999999 40 | MinHoleToHole=0.25 41 | TrackWidth1=0.2 42 | ViaDiameter1=0.6 43 | ViaDrill1=0.4 44 | dPairWidth1=0.2 45 | dPairGap1=0.25 46 | dPairViaGap1=0.25 47 | SilkLineWidth=0.15 48 | SilkTextSizeV=1 49 | SilkTextSizeH=1 50 | SilkTextSizeThickness=0.15 51 | SilkTextItalic=0 52 | SilkTextUpright=1 53 | CopperLineWidth=0.2 54 | CopperTextSizeV=1.5 55 | CopperTextSizeH=1.5 56 | CopperTextThickness=0.3 57 | CopperTextItalic=0 58 | CopperTextUpright=1 59 | EdgeCutLineWidth=0.15 60 | CourtyardLineWidth=0.05 61 | OthersLineWidth=0.15 62 | OthersTextSizeV=1 63 | OthersTextSizeH=1 64 | OthersTextSizeThickness=0.15 65 | OthersTextItalic=0 66 | OthersTextUpright=1 67 | SolderMaskClearance=0 68 | SolderMaskMinWidth=0.25 69 | SolderPasteClearance=0 70 | SolderPasteRatio=-0 71 | [pcbnew/Layer.F.Cu] 72 | Name=F.Cu 73 | Type=0 74 | Enabled=1 75 | [pcbnew/Layer.In1.Cu] 76 | Name=In1.Cu 77 | Type=0 78 | Enabled=0 79 | [pcbnew/Layer.In2.Cu] 80 | Name=In2.Cu 81 | Type=0 82 | Enabled=0 83 | [pcbnew/Layer.In3.Cu] 84 | Name=In3.Cu 85 | Type=0 86 | Enabled=0 87 | [pcbnew/Layer.In4.Cu] 88 | Name=In4.Cu 89 | Type=0 90 | Enabled=0 91 | [pcbnew/Layer.In5.Cu] 92 | Name=In5.Cu 93 | Type=0 94 | Enabled=0 95 | [pcbnew/Layer.In6.Cu] 96 | Name=In6.Cu 97 | Type=0 98 | Enabled=0 99 | [pcbnew/Layer.In7.Cu] 100 | Name=In7.Cu 101 | Type=0 102 | Enabled=0 103 | [pcbnew/Layer.In8.Cu] 104 | Name=In8.Cu 105 | Type=0 106 | Enabled=0 107 | [pcbnew/Layer.In9.Cu] 108 | Name=In9.Cu 109 | Type=0 110 | Enabled=0 111 | [pcbnew/Layer.In10.Cu] 112 | Name=In10.Cu 113 | Type=0 114 | Enabled=0 115 | [pcbnew/Layer.In11.Cu] 116 | Name=In11.Cu 117 | Type=0 118 | Enabled=0 119 | [pcbnew/Layer.In12.Cu] 120 | Name=In12.Cu 121 | Type=0 122 | Enabled=0 123 | [pcbnew/Layer.In13.Cu] 124 | Name=In13.Cu 125 | Type=0 126 | Enabled=0 127 | [pcbnew/Layer.In14.Cu] 128 | Name=In14.Cu 129 | Type=0 130 | Enabled=0 131 | [pcbnew/Layer.In15.Cu] 132 | Name=In15.Cu 133 | Type=0 134 | Enabled=0 135 | [pcbnew/Layer.In16.Cu] 136 | Name=In16.Cu 137 | Type=0 138 | Enabled=0 139 | [pcbnew/Layer.In17.Cu] 140 | Name=In17.Cu 141 | Type=0 142 | Enabled=0 143 | [pcbnew/Layer.In18.Cu] 144 | Name=In18.Cu 145 | Type=0 146 | Enabled=0 147 | [pcbnew/Layer.In19.Cu] 148 | Name=In19.Cu 149 | Type=0 150 | Enabled=0 151 | [pcbnew/Layer.In20.Cu] 152 | Name=In20.Cu 153 | Type=0 154 | Enabled=0 155 | [pcbnew/Layer.In21.Cu] 156 | Name=In21.Cu 157 | Type=0 158 | Enabled=0 159 | [pcbnew/Layer.In22.Cu] 160 | Name=In22.Cu 161 | Type=0 162 | Enabled=0 163 | [pcbnew/Layer.In23.Cu] 164 | Name=In23.Cu 165 | Type=0 166 | Enabled=0 167 | [pcbnew/Layer.In24.Cu] 168 | Name=In24.Cu 169 | Type=0 170 | Enabled=0 171 | [pcbnew/Layer.In25.Cu] 172 | Name=In25.Cu 173 | Type=0 174 | Enabled=0 175 | [pcbnew/Layer.In26.Cu] 176 | Name=In26.Cu 177 | Type=0 178 | Enabled=0 179 | [pcbnew/Layer.In27.Cu] 180 | Name=In27.Cu 181 | Type=0 182 | Enabled=0 183 | [pcbnew/Layer.In28.Cu] 184 | Name=In28.Cu 185 | Type=0 186 | Enabled=0 187 | [pcbnew/Layer.In29.Cu] 188 | Name=In29.Cu 189 | Type=0 190 | Enabled=0 191 | [pcbnew/Layer.In30.Cu] 192 | Name=In30.Cu 193 | Type=0 194 | Enabled=0 195 | [pcbnew/Layer.B.Cu] 196 | Name=B.Cu 197 | Type=0 198 | Enabled=1 199 | [pcbnew/Layer.B.Adhes] 200 | Enabled=0 201 | [pcbnew/Layer.F.Adhes] 202 | Enabled=0 203 | [pcbnew/Layer.B.Paste] 204 | Enabled=0 205 | [pcbnew/Layer.F.Paste] 206 | Enabled=0 207 | [pcbnew/Layer.B.SilkS] 208 | Enabled=1 209 | [pcbnew/Layer.F.SilkS] 210 | Enabled=1 211 | [pcbnew/Layer.B.Mask] 212 | Enabled=1 213 | [pcbnew/Layer.F.Mask] 214 | Enabled=1 215 | [pcbnew/Layer.Dwgs.User] 216 | Enabled=0 217 | [pcbnew/Layer.Cmts.User] 218 | Enabled=0 219 | [pcbnew/Layer.Eco1.User] 220 | Enabled=0 221 | [pcbnew/Layer.Eco2.User] 222 | Enabled=0 223 | [pcbnew/Layer.Edge.Cuts] 224 | Enabled=1 225 | [pcbnew/Layer.Margin] 226 | Enabled=1 227 | [pcbnew/Layer.B.CrtYd] 228 | Enabled=1 229 | [pcbnew/Layer.F.CrtYd] 230 | Enabled=1 231 | [pcbnew/Layer.B.Fab] 232 | Enabled=0 233 | [pcbnew/Layer.F.Fab] 234 | Enabled=1 235 | [pcbnew/Layer.Rescue] 236 | Enabled=0 237 | [pcbnew/Netclasses] 238 | [pcbnew/Netclasses/Default] 239 | Name=Default 240 | Clearance=0.2 241 | TrackWidth=0.2 242 | ViaDiameter=0.6 243 | ViaDrill=0.4 244 | uViaDiameter=0.3 245 | uViaDrill=0.1 246 | dPairWidth=0.2 247 | dPairGap=0.25 248 | dPairViaGap=0.25 249 | [pcbnew/Netclasses/1] 250 | Name=Power 251 | Clearance=0.2 252 | TrackWidth=0.5 253 | ViaDiameter=0.8 254 | ViaDrill=0.6 255 | uViaDiameter=0.3 256 | uViaDrill=0.1 257 | dPairWidth=0.2 258 | dPairGap=0.25 259 | dPairViaGap=0.25 260 | -------------------------------------------------------------------------------- /PRODUCT.md: -------------------------------------------------------------------------------- 1 | ## Manufacture and distribution of Products 2 | 3 | OpenAmiga500FastRamExpansion is Open Hardware licensed under the CERN OHL v. 1.2. 4 | 5 | Following is an excerpt from Section 4 of the [license](LICENSE.pdf) - **Manufacture and distribution of Products** - where *product* means *either an entire, or any part of a, device built using the Documentation or the modified Documentation*: 6 | 7 | > 4.1. The Licensee may manufacture or distribute *Products* always provided that, where such manufacture or distribution requires a licence under this Licence the Licensee provides to each recipient of such Products an easy means of accessing a copy of the Documentation or modified Documentation, as applicable, as set out in section 3. 8 | 9 | > 4.2. The Licensee is invited to inform any Licensor who has indicated his wish to receive this information about the type, quantity and dates of production of Products the Licensee has (had) manufactured 10 | 11 | This file contains a list of the contact point wishing to receive information about manufactured Products. 12 | 13 | ### (Name) (E-Mail or other contact details) 14 | - SukkoPera 15 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # OpenAmiga500FastRamExpansion 2 | OpenAmiga500FastRamExpansion is an Open Hardware 4/8 MB Fast RAM Expansion for the Commodore Amiga 500 Computer. 3 | 4 | ![Board](https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/master/doc/render-top.png) 5 | 6 | ### Summary 7 | Most low-end Amiga models only came with *Chip RAM*. "Big Box" models allowed for a different type of memory to be installed, known as *Fast RAM*, where *fast* means that it's dedicated to the main processor, so that it doesn't have to compete with the other chips in order to gain access to it (as is the case with Chip RAM). While both Chip and Fast RAM are limited in size, you can have at least a few MB of the latter on all Amigas (usually up to 8), while the former can never exceed 2 MB. 8 | 9 | OpenAmiga500FastRamExpansion will allow you to add 4 or 8 MB of Fast RAM to your Amiga 500. This way you will be able to run more applications at once and more quickly. If you combine it with [a chip RAM expansion](http://eab.abime.net/showthread.php?t=85395), you will also be able to run almost all games supported by WHDLoad, pushing your Amiga to its limits. 10 | 11 | OpenAmiga500FastRamExpansion is basically a clone of [a RAM expansion produced by Kipper2K a few years ago](http://eab.abime.net/showthread.php?t=64218), based on [an earlier design by lvd/NedoPC](http://lvd.nedopc.com/Projects/a600_8mb/index.html). He has since stopped producing and selling these cards and I thought it was a pity that he didn't open his designs and actually took all of them down, as this card is quite cheap to build and really useful. So I set about recreating it from scratch. 12 | 13 | ### Memory Compatibility 14 | The required RAM Type is 16 Mbit (1M×16) DRAM in the SOJ-42 package with up to 70-80 ns access time. It is 5v-only DRAM (not SD(!)RAM) often found in old 72-pin SIMMs, EDO chips might work or not. All chips having *8160* in their part number should be OK. 15 | 16 | |Model |Maker |Tested |Working |Data Sheet |Notes | 17 | |---------------|------------------|:-----------------:|:-----------------:|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------:|-------------------------------------------------------------------------------------| 18 | |AS4C1M116E5 |Alliance |![Yes](doc/yes.png)|![Yes](doc/yes.png)| |Tested by @Homer799 | 19 | |GM71C18160 |Hynix/LGS |![Yes](doc/yes.png)|![Yes](doc/yes.png)|[![PDF](doc/doc.png)](https://github.com/lvd2/A600_8mb_2008/blob/master/DRAM_datasheets/GM71C18160.pdf) |Tested by lvd in his original project | 20 | |HY5118164B |Hynix |![Yes](doc/yes.png)|![Yes](doc/yes.png)| |Tested by @Sgw32 | 21 | |KM416C1200AJ |SEC |![Yes](doc/yes.png)|![Yes](doc/yes.png)| |Reported working by Ronald Baer | 22 | |KM416C1204AJ/BJ|SEC |![Yes](doc/yes.png)|![Yes](doc/yes.png)|[![PDF](doc/doc.png)](http://pdf.datasheetcatalog.com/datasheet_pdf/samsung-electronic/KM416C1004BJ-45_to_KM416V1204BT-L7.pdf) |Reported working by screwbreaker | 23 | |MSM5118160 |OKI |![Yes](doc/yes.png)|![Yes](doc/yes.png)|[![PDF](doc/doc.png)](https://github.com/lvd2/A600_8mb_2008/blob/master/DRAM_datasheets/msm5118160.pdf) |Tested by lvd in his original project | 24 | |TMS41860DZ |Texas Instruments |![Yes](doc/yes.png)|![Yes](doc/yes.png)| |Reported working by Ronald Baer | 25 | |TMS41869DZ |Texas Instruments |![No](doc/no.png) | | | | 26 | |4218160 |NEC |![Yes](doc/yes.png)|![Yes](doc/yes.png)| |Reported working by Ronald Baer | 27 | |4218165 |NEC |![Yes](doc/yes.png)|![Yes](doc/yes.png)|[![PDF](doc/doc.png)](https://www.datasheetarchive.com/pdf/download.php?id=5f10686e336fc0bb44481c8b0f0340b8d05d8a&type=O&term=NEC%252B4218165-60) |Tested by SukkoPera | 28 | |VG2618165BJ |Vanguard |![Yes](doc/yes.png)|![Yes](doc/yes.png)| |Tested by @Csordi | 29 | |NN5118160AJ-60 |NPN |![Yes](doc/yes.png)|![Yes](doc/yes.png)| |Tested by @RipZ | 30 | 31 | RAM chips can either be soldered directly to the board or installed in sockets. While soldering the chips might not be trivial for the unexperienced, sockets for the SOJ-42 package are hard to find and not really easier to solder either, so the choice is up to you. 32 | 33 | ### Assembly and Installation 34 | Normally it is not necessary to mount all the decoupling capacitors. I usually skip C4, C5, C9, C12, C15 and C18. Maybe C1 can be left out as well if you have a good power supply, your choice. R4 must be chosen according to the particular led you will be using for LD1. Actually you are free to skip LD1 and R4 altogether, if you hate power LEDs. 35 | 36 | After everything has been soldered, you will need to program the CPLD. Whenever you do so, **make sure to carefully remove the board from your Amiga, or you might risk damaging it**. You can find the firmware [here](firmware/V2), along with instructions on how to flash it. You can provide power through the pads of C1 if you need to do so. 37 | 38 | Make sure to use the [correct firmware version](#Firmware), according to how many chips you soldered on the board! For the 4 MB version, solder U7 and U8 only and use the dedicated firmware. 39 | 40 | When assembly is complete, open your A500 and remove the top shield. Carefully remove the CPU (largest chip at bottom left of the board), using a chip extractor or a small flat screwdriver, taking care not to break/bend any pins. Plug it on the board, matching the orientation, and plug the whole board in the CPU socket. 41 | 42 | Before reassembling your case, I recommend to run [SysTest/Amiga Test Kit](https://github.com/keirf/Amiga-Stuff). Use the Memory option (F1), it must show 4/8 MB of Fast RAM. Then start the Memory Test (F1 again) and let it run for 50-100 rounds: if it doesn't find any errors, you are probably good to go. If you get any errors, check your solder joints, starting from actual the RAM chips, as the SOJ package is not very hand-soldering-friendly. 43 | 44 | ### Firmware 45 | If you are using Kickstart 2.x or higher you should use the latest V2 firmware [here](firmware/V2) noting that it requires an ATF1504AS rather than the older version's ATF1502 46 | 47 | If you are using Kickstart 1.3 you will need to use the [V1 Firmware here](firmware/V1) 48 | 49 | #### V2 Firmware new features 50 | Thanks to two new features this board is compatible with other autoconfig devices and should no longer cause any conflicts 51 | * Autoconfig snooping - This board will configure itself after every other Autoconfig device 52 | * Autosizing - The firmware will shrink the configured size automatically to make it fit within the remaining free memory pool (8M/4M/2M/1M). 53 | 54 | #### V1 Firmware Limitations 55 | The V1 Firmware for OpenAmiga500FastRamExpansion only has a partial implementation of the AutoConfig protocol. This has the following consequences: 56 | - On the A500 it will only work if nothing is connected to the side expansion port (or if whatever is connected does NOT use AutoConfig). 57 | - On the A2000 it will only work if nothing is installed in the Zorro expansion slots (again: or if whatever you installed there does not use AutoConfig). 58 | - On the CDTV it just won't work (since the DMAC uses AutoConfig and is built-in.) 59 | 60 | Because of these limitations it is recommended to use the new Firmware where possible, this will allow your board to coexist with other Autoconfig devices. 61 | If you cannot use the V2 firmware for some reason (i.e you use Kickstart 1.3) then the only way to get around these limitations is flashing an alternative firmware on the board which does not use AutoConfig, but then you will have to add the RAM manually in Workbench, using the `addmem` utility. More on this soon. 62 | 63 | ### License 64 | The OpenAmiga500FastRamExpansion documentation, including the design itself, is copyright © SukkoPera 2019. 65 | 66 | OpenAmiga500FastRamExpansion is Open Hardware licensed under the [CERN OHL v. 1.2](http://ohwr.org/cernohl). 67 | 68 | You may redistribute and modify this documentation under the terms of the CERN OHL v.1.2. This documentation is distributed *as is* and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES whatsoever with respect to its functionality, operability or use, including, without limitation, any implied warranties OF MERCHANTABILITY, SATISFACTORY QUALITY, FITNESS FOR A PARTICULAR PURPOSE or infringement. We expressly disclaim any liability whatsoever for any direct, indirect, consequential, incidental or special damages, including, without limitation, lost revenues, lost profits, losses resulting from business interruption or loss of data, regardless of the form of action or legal theory under which the liability may be asserted, even if advised of the possibility or likelihood of such damages. 69 | 70 | A copy of the full license is included in file [LICENSE.pdf](LICENSE.pdf), please refer to it for applicable conditions. In order to properly deal with its terms, please see file [LICENSE_HOWTO.pdf](LICENSE_HOWTO.pdf). 71 | 72 | The contact points for information about manufactured Products (see section 4.2) are listed in file [PRODUCT.md](PRODUCT.md). 73 | 74 | Any modifications made by Licensees (see section 3.4.b) shall be recorded in file [CHANGES.md](CHANGES.md). 75 | 76 | The Documentation Location of the original project is https://github.com/SukkoPera/OpenAmiga500FastRamExpansion/. 77 | 78 | ### Support the Project 79 | Since the project is open you are free to get the PCBs made by your preferred manufacturer, however in case you want to support the development, you can order them from PCBWay through this link: 80 | 81 | [![PCB from PCBWay](https://www.pcbway.com/project/img/images/frompcbway.png)](https://www.pcbway.com/project/shareproject/OpenAmiga500FastRamExpansion_V1.html) 82 | 83 | You get my gratitude and cheap, professionally-made and good quality PCBs, I get some credit that will help with this and [other projects](https://www.pcbway.com/project/member/shareproject/?bmbid=41100). You won't even have to worry about the various PCB options, it's all pre-configured for you! 84 | 85 | Also, if you still have to register to that site, [you can use this link](https://www.pcbway.com/setinvite.aspx?inviteid=41100) to get some bonus initial credit (and yield me some more). 86 | 87 | Again, if you want to use another manufacturer, feel free to, don't feel obligated :). But then you can buy me a coffee if you want: 88 | 89 | Buy Me a Coffee at ko-fi.com 90 | 91 | ### Get Help 92 | If you need help or have questions, you can join [the official Telegram group](https://t.me/joinchat/HUHdWBC9J9JnYIrvTYfZmg). 93 | 94 | ### Thanks 95 | - lvd for the initial design and the support he gave me during development 96 | - Kipper2K for making his boards 97 | - majinga for helping with the testing 98 | -------------------------------------------------------------------------------- /doc/doc.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/doc/doc.png -------------------------------------------------------------------------------- /doc/no.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/doc/no.png -------------------------------------------------------------------------------- /doc/render-bottom.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/doc/render-bottom.png -------------------------------------------------------------------------------- /doc/render-top.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/doc/render-top.png -------------------------------------------------------------------------------- /doc/schematic.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/doc/schematic.pdf -------------------------------------------------------------------------------- /doc/yes.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/doc/yes.png -------------------------------------------------------------------------------- /firmware/README.md: -------------------------------------------------------------------------------- 1 | # Firmware 2 | Before installing the board into your Amiga, you will need to program the CPLD chip. 3 | 4 | The firmware is the same as the original project by lvd. It has been copied here for convenience, but it is unmodified. 5 | 6 | The firmware was originally developed for Altera `EPM7032SLC44` CPLDs. 7 | 8 | Atmel/Microchip makes compatible devices under the `ATF1502` series, so the `ATF1502AS-10JC44` can be used as an alternative, which is easier to find nowadays (-10J*U*44 is fine as well). 9 | 10 | ## Flashing the firmware 11 | 12 | ### Altera EPM7032SLC44/EPM7064SLC44 13 | You will need to load the `.POF` file in `quartus_pgm` and flash it using one of the cheap USB Blaster programmer clones you can find everywhere. 14 | 15 | *NOTE: One user recommends NOT to use the auto-detect button as it will add two ICs to the window. Just select the USB Blaster hardware and load the .POF file (make sure to check only Program/Configure + Verify!). Then hit the Start button to flash.* 16 | 17 | ### Atmel/Microchip ATF1502AS-10JC44/ATF1504AS-10JC44 (Official way) 18 | You can program the .JED file using the [ATDH1150USB](https://www.microchip.com/DevelopmentTools/ProductDetails/ATDH1150USB) programmer. 19 | 20 | ### Atmel/Microchip ATF1502AS-10JC44/ATF1504AS-10JC44 (Cheaper and hackish way) 21 | These days you will only find the ATF1502AS-10JC44 (or -10JU44) on the market, but, if you read the above, you will know that you will need to buy a >50€ programmer to program it, which doesn't sound reasonable, as this will most likely only need to be done once. Besides, all the tools mentioned above are Windows-only so if you are a Linux user like me, you're pretty screwed. Luckily, there is a solution that allows flashing the Atmel chip with the cheap USB Blaster clones. I have developed and tested it under Linux, but it should also work on Windows and OS X. 22 | 23 | First of all you need to power the board. JTAG programmers are not supposed to provide power, hence you need to do so separately. The board does not have a dedicated power connector, but you can use the pads of C1 (which I don't recommend installing, unless you have stability issues) or pins 2 (GND) and 4 (VCC) of the IDC connector. The board needs 5V, I usually take those from an Arduino board but feel free to use whatever suits you. 24 | 25 | On the software side, you will need [UrJTAG](http://urjtag.sourceforge.net). I have only tested version 2018.09, others might work or not. I am not sure this version is readily available in binary format, so you might have to compile it from sources. 26 | 27 | You will also need to get the [BSDL (Boundary Scan Description Language) files for the 1502 CPLDs](http://ww1.microchip.com/downloads/en/DeviceDoc/1502bsdl.zip). Download the zip file, uncompress it anywhere you like and take note of the path, you will need it later. 28 | 29 | Finally, you will need the firmware in SVF format, available in this folder. Use either `4mb.svf` or `8mb.svf` according to how you assembled your board. 30 | 31 | Now you are ready for the actual flashing, so connect your USB Blaster to the IDC connector on the board and plug it into an USB port on your PC. Then run urjtag as follows: 32 | 33 | ``` 34 | sukko@shockwave firmware $ sudo jtag 35 | 36 | UrJTAG 2018.09 # 37 | Copyright (C) 2002, 2003 ETC s.r.o. 38 | Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors 39 | 40 | UrJTAG is free software, covered by the GNU General Public License, and you are 41 | welcome to change it and/or distribute copies of it under certain conditions. 42 | There is absolutely no warranty for UrJTAG. 43 | 44 | warning: UrJTAG may damage your hardware! 45 | Type "quit" to exit, "help" for help. 46 | 47 | jtag> cable UsbBlaster 48 | Connected to libftdi driver. 49 | ``` 50 | 51 | This means that your USB Blaster was detected correctly. Let's load the BSDL files, this is where you will need to use the path you took note of at the beginning: 52 | ``` 53 | jtag> bsdl path 54 | jtag> 55 | ``` 56 | 57 | Now we can scan the JTAG chain: 58 | ``` 59 | jtag> detect 60 | IR length: 10 61 | Chain length: 1 62 | Device Id: 00000001010100000010000000111111 (0x0150203F) 63 | Filename: bsdl/1502AS_A44.bsd 64 | ``` 65 | 66 | This means that the CPLD was found and it is ready to be programmed. If you get no output at this step, try disconnecting and reconnecting the USB Blaster or power to the board. If the chip gets detected but it is reported as unsupported, check that you downloaded the correct BSDL files. Then start the flashing: 67 | ``` 68 | jtag> svf 8mb.svf progress stop 69 | warning: unimplemented mode 'ABSENT' for TRST 70 | detail: Parsing 3660/3668 ( 99%)detail: 71 | detail: Scanned device output matched expected TDO values. 72 | ``` 73 | 74 | If you get the above output, the flashing was successful and you can start using your board. If instead you get something like: 75 | ``` 76 | jtag> svf 8mb.svf 77 | warning: unimplemented mode 'ABSENT' for TRST 78 | Error svf: mismatch at position 64 for TDO 79 | in input file between line 2196 col 1 and line 2198 col 32 80 | ``` 81 | 82 | Then there was an error during the flashing, check your wiring, power and try again. 83 | 84 | #### USB Blaster Clones 85 | You are recommended to get **a full-size Altera USB Blaster clone**, i.e. one of these: 86 | 87 | ![Full-Size](img/good_usbblaster.jpg) 88 | 89 | Note the *Rev.C*: I'm not sure if it is crucial, but the one I have says so and is working very well. 90 | 91 | Do **NOT** buy this: 92 | 93 | ![Smaller](img/crappy_usbblaster.jpg) 94 | 95 | It does not work correctly, as it always hangs between 47% and 49% of the flashing process. 96 | 97 | ### Atmel/Microchip ATF1502AS-10JC44 (Through the Parallel port) 98 | 99 | As an alternative, if you have an old computer with LPT1 and some version of Windows, you can build [the cable mentioned here](https://github.com/MattisLind/82S100replacement) and use it with [Microchip's ATMISP tool](https://www.microchip.com/design-centers/programmable-logic/spld-cpld/tools/software/atmisp). 100 | 101 | ## Windows considerations 102 | I have managed to build a Windows binary of UrJTAG with only the minimum options needed to program these CPLDs through a USB Blaster. It was tested by a couple of users and seemed to be working fine. A user even automated the procedure, so now you can just download [the UrJTAG.zip file from the windows folder](windows/UrJTAG.zip), unzip it and double click on the `runme.bat` script (with the programmer and board already connected to your PC): this should guide you through the whole flashing process. 103 | 104 | I hope this works for you, but please note that **it is unsupported**, as I have no computers running Windows. 105 | 106 | ## Tinkering with the firmware 107 | The firmware was developed with Quartus 7.2, somewhat totally old and outdated, but I never got any problems with it. I DO NOT recommend using Quartus 6.x as I caught it generating wrong designs (in a way, nothing is working and when you swap to Quartus 7.2 not touching you project, everything is working back). 108 | 109 | If you want to move to something newer, it seems that Quartus 10.x and 11.x are still supporting EPM7000S chips. Starting from Quartus 12.x there's no more support for that devices. 110 | 111 | ### POF => JED 112 | Quartus will produce a .POF file. This can be converted to a .JED file for Atmel devices through [Microchip's POF2JED utility](https://www.microchip.com/design-centers/programmable-logic/spld-cpld/tools/software/pof2jed), which is Windows-only unfortunately. 113 | 114 | ### JED => SVF 115 | An SVF file can be produced using [ATMISP](https://www.microchip.com/design-centers/programmable-logic/spld-cpld/tools/software/atmisp), which is also Windows-only. 116 | 117 | ### Used chips from China 118 | The chips can be pre-used if you bought your ATF1502AS from China. Sometimes JTAG interface is disabled on them, preventing normal JTAG operations. 119 | 120 | To enable JTAG, connect +12V power through a 2.2kOhm resistor to pin 7 on the 68000 CPU connector. Afterwards flash the `atf1502as_erase.svf` file to the CLPD. Then you can follow the normal programming procedures. 121 | 122 | ## Thanks 123 | - *lvd* for providing most of the above information and helping me come up with the Linux flashing procedure. 124 | - *majinga* and *go0se* for testing and helping improve this procedure. 125 | - EAB forum user *katarakt* for the note on Quartus. 126 | - Szymon Roslowski and Graham P. for testing and improving the Windows package. 127 | 128 | -------------------------------------------------------------------------------- /firmware/V1/4mb/atf1502as10jc44.jed: -------------------------------------------------------------------------------- 1 |  Version 4.45 2 | JEDEC file for: ATF1502 PLCC44 3 | Created on: Fri Jan 25 16:46:47 2008 4 | 5 | * 6 | QF16808* QP44 * F0* 7 | NOTE 8 | 0 0 0 0 0 * 9 | L192 10 | 1111111111111111 11 | 1111111111111111111111111111111111011111 12 | 1111111111111111111111110111111111111111* NOTE PT 3 of MC 1(LAB A) * 13 | L288 14 | 1111111111111111 15 | 1111111111111111111111111111111111101111 16 | 1111111111111111011111111111111111111111* NOTE PT 2 of MC 1(LAB A) * 17 | L576 18 | 1111111111111111 19 | 1111111111111111111111111111111111101111 20 | 1111111111111111111111111110111111111111* NOTE PT 2 of MC 2(LAB A) * 21 | L672 22 | 1111111111111111 23 | 1111111111111111111111111111111111011111 24 | 1111111111111111111111101111111111111111* NOTE PT 3 of MC 2(LAB A) * 25 | L960 26 | 1111111111111111 27 | 1111111111111111111111111111111111111111 28 | 1110111111111111111111111111111111111111* NOTE PT 5 of MC 3(LAB A) * 29 | L1056 30 | 1111111111111111 31 | 1111111111111111111111111111111111111111 32 | 1111011101111111111111111111111111111111* NOTE PT 4 of MC 3(LAB A) * 33 | L1152 34 | 1111111111111111 35 | 1111111111111111111111111111111111111111 36 | 1111011111111111111111110111111111111111* NOTE PT 3 of MC 3(LAB A) * 37 | L1248 38 | 1111111111111111 39 | 1111111111111111111111111111111111111111 40 | 1111101110111111111111101011111111111111* NOTE PT 2 of MC 3(LAB A) * 41 | L1344 42 | 1111111111111111 43 | 1111111111111111111111111111111111111111 44 | 1111111111110111111111111111111111111111* NOTE PT 1 of MC 3(LAB A) * 45 | L1536 46 | 1111111111111111 47 | 1101111111111111111111111111111111111111 48 | 1111111111111111111111111111111111110111* NOTE PT 2 of MC 4(LAB A) * 49 | L2208 50 | 1111111111111111 51 | 1111111111111111111111111111111111111111 52 | 1101011110111011111111111011111111111111* NOTE PT 2 of MC 5(LAB A) * 53 | L2496 54 | 1111111111111111 55 | 1111111111111111111111111111111111111111 56 | 1101011110111011111111111011111111111111* NOTE PT 2 of MC 6(LAB A) * 57 | L2592 58 | 1111111111111111 59 | 1111111111111111111111111111111111111111 60 | 1101101110110111111111011011111111111111* NOTE PT 3 of MC 6(LAB A) * 61 | L2976 62 | 1111111111111111 63 | 1111111111111111111111111111111111111111 64 | 1101011110111011111111111011111111111111* NOTE PT 4 of MC 7(LAB A) * 65 | L3072 66 | 1111111111111111 67 | 1111111111111111111111111111111111111111 68 | 1101111110111011111111101011111111111111* NOTE PT 3 of MC 7(LAB A) * 69 | L3168 70 | 1111111111111111 71 | 1111111111111111111111111111111111111111 72 | 1101101110110111111111011011111111111111* NOTE PT 2 of MC 7(LAB A) * 73 | L3456 74 | 1111111111111111 75 | 1111111111111111111111111111111111111111 76 | 1111111111111111111111111111111111110111* NOTE PT 2 of MC 8(LAB A) * 77 | L4032 78 | 1111111111111111 79 | 1111111111111111111111111111111111111111 80 | 1111111111111111111111111111111111110111* NOTE PT 3 of MC 9(LAB A) * 81 | L4128 82 | 1111111111111111 83 | 1111111111111111111111111111111111111111 84 | 1111111111111111111111111111111111111111* NOTE PT 2 of MC 9(LAB A) * 85 | L4416 86 | 1111111111111111 87 | 1111111111111111111111101111111111111111 88 | 1111111111111111111111111111111111111111* NOTE PT 2 of MC 10(LAB A) * 89 | L4512 90 | 1111111111111111 91 | 1111111111111111111111111111111111111111 92 | 1111111111111111111111111111111111110111* NOTE PT 3 of MC 10(LAB A) * 93 | L5088 94 | 1111111111111111 95 | 1101111111111111111111111111111111111111 96 | 1111111111111111111101111111111111110111* NOTE PT 2 of MC 11(LAB A) * 97 | L5376 98 | 1111111111111111 99 | 1111111111111111111111111111111111111111 100 | 1111111111111111111111111111111111111111* NOTE PT 2 of MC 12(LAB A) * 101 | L5472 102 | 1111111111111111 103 | 1111111111111111111111111111111111111111 104 | 1111111111111111111111111111111111110111* NOTE PT 3 of MC 12(LAB A) * 105 | L5568 106 | 1111111111111111 107 | 1111111111110111111101111111111111111111 108 | 0111111111111111111111111111111111111011* NOTE PT 4 of MC 12(LAB A) * 109 | L6048 110 | 1111111111111111 111 | 1101111111111111111111111111111111111111 112 | 1111111111111111111111111111111111110111* NOTE PT 2 of MC 13(LAB A) * 113 | L6336 114 | 1111111111111111 115 | 1111011111011110111111111111111111111111 116 | 1111110111011101011111111101111011101111* NOTE PT 2 of MC 14(LAB A) * 117 | L6816 118 | 1111111111111111 119 | 1111111111111111111111111111111111110111 120 | 1111111111111111111111111111111111111111* NOTE PT 4 of MC 15(LAB A) * 121 | L7008 122 | 1111111111111111 123 | 1111011111011111111111111111111111111111 124 | 1101010110010101011111111101111011101111* NOTE PT 2 of MC 15(LAB A) * 125 | L7296 126 | 1111111111111111 127 | 1111111111111001111111111111111111111111 128 | 0111111111111111111111111111111111111011* NOTE PT 2 of MC 16(LAB A) * 129 | L7392 130 | 1111111111111111 131 | 1111111111111111111111111111111111111111 132 | 1111111111111111111111111111111111110111* NOTE PT 3 of MC 16(LAB A) * 133 | L7488 134 | 1111111111111111 135 | 1111111111111101111110111111111111111111 136 | 0111111111111111111111111111111111111011* NOTE PT 4 of MC 16(LAB A) * 137 | L7776 138 | 1111111111111111 139 | 1110111111111111111111111111111111111111 140 | 1111111111111111111111111111111111111111* NOTE PT 4 of MC 17(LAB B) * 141 | L7872 142 | 1111111111111111 143 | 1111101111111111111110111111011111111111 144 | 1111111111111111111111111111111011011111* NOTE PT 3 of MC 17(LAB B) * 145 | L7968 146 | 1111111111111111 147 | 1111101111111111111110111111011111111111 148 | 1111111111111111111111111111110111101111* NOTE PT 2 of MC 17(LAB B) * 149 | L8256 150 | 1111111111111111 151 | 1111101111111111111111101111111111111111 152 | 1111111111111111111111111111111011011111* NOTE PT 2 of MC 18(LAB B) * 153 | L8352 154 | 1111111111111111 155 | 0110111111111111111111111111111011111111 156 | 1111111111111111111101111111111111111111* NOTE PT 3 of MC 18(LAB B) * 157 | L8736 158 | 1111111111111111 159 | 1110111111111111111111111111111111111111 160 | 1111111111111111111111111111111111111111* NOTE PT 4 of MC 19(LAB B) * 161 | L8832 162 | 1111111111111111 163 | 1111101111111011111111111111011111111111 164 | 1111111111111111111111111111111011011111* NOTE PT 3 of MC 19(LAB B) * 165 | L8928 166 | 1111111111111111 167 | 1111101111111011111111111111011111111111 168 | 1111111111111111111111111111110111101111* NOTE PT 2 of MC 19(LAB B) * 169 | L9792 170 | 1111111111111111 171 | 0110111111111111111111111111111011111111 172 | 1111111111111111111110111111111111111111* NOTE PT 3 of MC 21(LAB B) * 173 | L9888 174 | 1111111111111111 175 | 1111101111111111111111101111111111111111 176 | 1111111111111111111111111111110111101111* NOTE PT 2 of MC 21(LAB B) * 177 | L10176 178 | 1111111111111111 179 | 0110111111111111111111111111110111111111 180 | 1111111111111111111101111111111111111111* NOTE PT 2 of MC 22(LAB B) * 181 | L10848 182 | 1111111111111111 183 | 0110111111111111111111111111110111111111 184 | 1111111111111111111110111111111111111111* NOTE PT 2 of MC 23(LAB B) * 185 | L12096 186 | 1111111111111111 187 | 1111111111111111111111111111111111111111 188 | 1111111111111111111111111111111111111111* NOTE PT 2 of MC 26(LAB B) * 189 | L12192 190 | 1111111111111111 191 | 1111111111111111111111011111111111111111 192 | 1111111111111111111111111111111111111111* NOTE PT 3 of MC 26(LAB B) * 193 | 194 | NOTE macrocell configurations 195 | 0 0 0 0 * 196 | L15360 1111111111111111* 197 | L15376 10111101110110011000011110000110* NOTE S16,S12 of block A * 198 | L15408 00000000011001000000000000000000* NOTE S14,S11 of block A * 199 | L15440 1111111111111111* 200 | L15456 10011001100110011001100110001001* NOTE S9 ,S6 of block A * 201 | L15488 00000010000000000000010000000110* NOTE S13,S10 of block A * 202 | L15520 1111111111111111* 203 | L15536 00000100000000000010011000100110* NOTE S20,S18 of block A * 204 | L15568 00000000000000000000000000000000* NOTE S8 ,S21 of block A * 205 | L15600 1111111111111111* 206 | L15616 11001100110011111111111100111111* NOTE S7 ,S19 of block A * 207 | L15648 11111100111111000000000000100100* NOTE S22,S5 of block A * 208 | L15680 1111111111111111* 209 | L15696 11111111111111111111111111111111* NOTE S23,S4 of block A * 210 | L15728 11111110111111100110011001110010* NOTE S3 ,S15 of block A * 211 | L15760 1111111111111111* 212 | L15776 00000000000000000011111100111111* NOTE S0 ,S1 of block A * 213 | L15808 11111001100110011001100110011001* NOTE S17 ,S2 of block A * 214 | L15840 1111111111111111* 215 | L15856 11111111111110111111111011000100* NOTE S16,S12 of block B * 216 | L15888 01100100011001000000000000000000* NOTE S14,S11 of block B * 217 | L15920 1111111111111111* 218 | L15936 10011001100110011001100110011001* NOTE S9 ,S6 of block B * 219 | L15968 00000001000000011000100110011001* NOTE S13,S10 of block B * 220 | L16000 1111111111111111* 221 | L16016 00000000000000000010011000100110* NOTE S20,S18 of block B * 222 | L16048 00000011000000111100111111111111* NOTE S8 ,S21 of block B * 223 | L16080 1111111111111111* 224 | L16096 11111111111100111111111111111111* NOTE S7 ,S19 of block B * 225 | L16128 11111110111111100101011001100110* NOTE S22,S5 of block B * 226 | L16160 1111111111111111* 227 | L16176 11111111111111111111111111111111* NOTE S23,S4 of block B * 228 | L16208 11111110111111100110011001100110* NOTE S3 ,S15 of block B * 229 | L16240 1111111111111111* 230 | L16256 00000000000011000011111100111111* NOTE S0 ,S1 of block B * 231 | L16288 11111101111111011011100110011001* NOTE S17 ,S2 of block B * 232 | 233 | NOTE UIM for block A and B* 234 | NOTE 0 0 0* 235 | L16320 10111* NOTE Mux-39 of block A* 236 | L16325 10111* NOTE Mux-39 of block B* 237 | L16330 11110* NOTE Mux-38 of block A* 238 | L16335 11111* NOTE Mux-38 of block B* 239 | L16340 01111* NOTE Mux-37 of block A* 240 | L16345 01111* NOTE Mux-37 of block B* 241 | L16350 11111* NOTE Mux-36 of block A* 242 | L16355 11111* NOTE Mux-36 of block B* 243 | L16360 01111* NOTE Mux-35 of block A* 244 | L16365 01111* NOTE Mux-35 of block B* 245 | L16370 11111* NOTE Mux-34 of block A* 246 | L16375 11111* NOTE Mux-34 of block B* 247 | L16380 01111* NOTE Mux-33 of block A* 248 | L16385 11111* NOTE Mux-33 of block B* 249 | L16390 11101* NOTE Mux-32 of block A* 250 | L16395 11111* NOTE Mux-32 of block B* 251 | L16400 11011* NOTE Mux-31 of block A* 252 | L16405 11111* NOTE Mux-31 of block B* 253 | L16410 10111* NOTE Mux-30 of block A* 254 | L16415 10111* NOTE Mux-30 of block B* 255 | L16420 10111* NOTE Mux-29 of block A* 256 | L16425 10111* NOTE Mux-29 of block B* 257 | L16430 01111* NOTE Mux-28 of block A* 258 | L16435 11111* NOTE Mux-28 of block B* 259 | L16440 01111* NOTE Mux-27 of block A* 260 | L16445 11111* NOTE Mux-27 of block B* 261 | L16450 11011* NOTE Mux-26 of block A* 262 | L16455 11111* NOTE Mux-26 of block B* 263 | L16460 01111* NOTE Mux-25 of block A* 264 | L16465 11111* NOTE Mux-25 of block B* 265 | L16470 11011* NOTE Mux-24 of block A* 266 | L16475 11111* NOTE Mux-24 of block B* 267 | L16480 01111* NOTE Mux-23 of block A* 268 | L16485 11111* NOTE Mux-23 of block B* 269 | L16490 11101* NOTE Mux-22 of block A* 270 | L16495 11111* NOTE Mux-22 of block B* 271 | L16500 11011* NOTE Mux-21 of block A* 272 | L16505 11111* NOTE Mux-21 of block B* 273 | L16510 10111* NOTE Mux-20 of block A* 274 | L16515 11111* NOTE Mux-20 of block B* 275 | L16520 10111* NOTE Mux-19 of block A* 276 | L16525 10111* NOTE Mux-19 of block B* 277 | L16530 11011* NOTE Mux-18 of block A* 278 | L16535 11111* NOTE Mux-18 of block B* 279 | L16540 10111* NOTE Mux-17 of block A* 280 | L16545 11111* NOTE Mux-17 of block B* 281 | L16550 11111* NOTE Mux-16 of block A* 282 | L16555 11111* NOTE Mux-16 of block B* 283 | L16560 11111* NOTE Mux-15 of block A* 284 | L16565 11011* NOTE Mux-15 of block B* 285 | L16570 11111* NOTE Mux-14 of block A* 286 | L16575 11101* NOTE Mux-14 of block B* 287 | L16580 11111* NOTE Mux-13 of block A* 288 | L16585 11111* NOTE Mux-13 of block B* 289 | L16590 11111* NOTE Mux-12 of block A* 290 | L16595 11111* NOTE Mux-12 of block B* 291 | L16600 11110* NOTE Mux-11 of block A* 292 | L16605 11110* NOTE Mux-11 of block B* 293 | L16610 11110* NOTE Mux-10 of block A* 294 | L16615 11110* NOTE Mux-10 of block B* 295 | L16620 10111* NOTE Mux-9 of block A* 296 | L16625 10111* NOTE Mux-9 of block B* 297 | L16630 11111* NOTE Mux-8 of block A* 298 | L16635 11111* NOTE Mux-8 of block B* 299 | L16640 11011* NOTE Mux-7 of block A* 300 | L16645 11111* NOTE Mux-7 of block B* 301 | L16650 01111* NOTE Mux-6 of block A* 302 | L16655 01111* NOTE Mux-6 of block B* 303 | L16660 11011* NOTE Mux-5 of block A* 304 | L16665 11111* NOTE Mux-5 of block B* 305 | L16670 11111* NOTE Mux-4 of block A* 306 | L16675 11111* NOTE Mux-4 of block B* 307 | L16680 11111* NOTE Mux-3 of block A* 308 | L16685 11111* NOTE Mux-3 of block B* 309 | L16690 11011* NOTE Mux-2 of block A* 310 | L16695 11011* NOTE Mux-2 of block B* 311 | L16700 11110* NOTE Mux-1 of block A* 312 | L16705 11110* NOTE Mux-1 of block B* 313 | L16710 11111* NOTE Mux-0 of block A* 314 | L16715 11110* NOTE Mux-0 of block B* 315 | 316 | NOTE 6 global OE 317 | 0 0 0* 318 | L16720 11101* NOTE GOE5* 319 | L16725 11101* NOTE GOE4* 320 | L16730 11110* NOTE GOE3* 321 | L16735 11110* NOTE GOE2* 322 | L16740 11101* NOTE GOE1* 323 | L16745 11110* NOTE GOE0* 324 | * 325 | 326 | NOTE device configuration bits* 327 | NOTE 0 0 0 0* 328 | L16750 01110000010011111011000111111111* 329 | 330 | NOTE Special Purpose Bits (JTAG) * 331 | L16782 1111* 332 | 333 | NOTE UES bits* 334 | L16786 1111111111111111* 335 | 336 | NOTE Reserved bits * 337 | L16802 000000* 338 | 339 | C9221* 340 | 0000 341 | -------------------------------------------------------------------------------- /firmware/V1/4mb/epm7032slc44-10.pof: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/firmware/V1/4mb/epm7032slc44-10.pof -------------------------------------------------------------------------------- /firmware/V1/8mb/atf1502as10jc44.jed: -------------------------------------------------------------------------------- 1 |  Version 4.45 2 | JEDEC file for: ATF1502 PLCC44 3 | Created on: Sat Jan 05 22:53:52 2008 4 | 5 | * 6 | QF16808* QP44 * F0* 7 | NOTE 8 | 0 0 0 0 0 * 9 | L192 10 | 1111111111111111 11 | 1111111111111111111111111111111111011111 12 | 1111111111111111111111110111111111111111* NOTE PT 3 of MC 1(LAB A) * 13 | L288 14 | 1111111111111111 15 | 1111111111111111111111111111111111101111 16 | 1111111111111111011111111111111111111111* NOTE PT 2 of MC 1(LAB A) * 17 | L576 18 | 1111111111111111 19 | 1111111111111111111111111111111111101111 20 | 1111111111111111111111111110111111111111* NOTE PT 2 of MC 2(LAB A) * 21 | L672 22 | 1111111111111111 23 | 1111111111111111111111111111111111011111 24 | 1111111111111111111111101111111111111111* NOTE PT 3 of MC 2(LAB A) * 25 | L960 26 | 1111111111111111 27 | 1111111111111111111111111111111111111111 28 | 1110111111111111111111111111111111111111* NOTE PT 5 of MC 3(LAB A) * 29 | L1056 30 | 1111111111111111 31 | 1111111111111111111111111111111111111111 32 | 1111111111110111111111111111111111111111* NOTE PT 4 of MC 3(LAB A) * 33 | L1152 34 | 1111111111111111 35 | 1111111111111111111111111111111111111111 36 | 1111011101111111111111111111111111111111* NOTE PT 3 of MC 3(LAB A) * 37 | L1248 38 | 1111111111111111 39 | 1111111111111111111111111111111111111111 40 | 1111011111111111111111110111111111111111* NOTE PT 2 of MC 3(LAB A) * 41 | L1536 42 | 1111111111111111 43 | 1101111111111111111111111111111111111111 44 | 1111111111111111111111111111111111110111* NOTE PT 2 of MC 4(LAB A) * 45 | L2112 46 | 1111111111111111 47 | 1111111111111111111111111111111111111111 48 | 1101011110111011111111111011111111111111* NOTE PT 3 of MC 5(LAB A) * 49 | L2208 50 | 1111111111111111 51 | 1111111111111111111111111111111111111111 52 | 1101111110111011111111101011111111111111* NOTE PT 2 of MC 5(LAB A) * 53 | L2496 54 | 1111111111111111 55 | 1111111111111111111111111111111111111111 56 | 1101111110111011111111101011111111111111* NOTE PT 2 of MC 6(LAB A) * 57 | L2592 58 | 1111111111111111 59 | 1111111111111111111111111111111111111111 60 | 1101011110111011111111111011111111111111* NOTE PT 3 of MC 6(LAB A) * 61 | L2688 62 | 1111111111111111 63 | 1111111111111111111111111111111111111111 64 | 1101101110110111111111011011111111111111* NOTE PT 4 of MC 6(LAB A) * 65 | L2976 66 | 1111111111111111 67 | 1111111111111111111111111111111111111111 68 | 1101101110110111111111011011111111111111* NOTE PT 4 of MC 7(LAB A) * 69 | L3072 70 | 1111111111111111 71 | 1111111111111111111111111111111111111111 72 | 1101011110111011111111111011111111111111* NOTE PT 3 of MC 7(LAB A) * 73 | L3168 74 | 1111111111111111 75 | 1111111111111111111111111111111111111111 76 | 1101111110111011111111101011111111111111* NOTE PT 2 of MC 7(LAB A) * 77 | L3456 78 | 1111111111111111 79 | 1111111111111111111111111111111111111111 80 | 1111111111111111111111111111111111110111* NOTE PT 2 of MC 8(LAB A) * 81 | L4032 82 | 1111111111111111 83 | 1111111111111111111111111111111111111111 84 | 1111111111111111111111111111111111110111* NOTE PT 3 of MC 9(LAB A) * 85 | L4128 86 | 1111111111111111 87 | 1111111111111111111111111111111111111111 88 | 1111111111111111111111111111111111111111* NOTE PT 2 of MC 9(LAB A) * 89 | L4416 90 | 1111111111111111 91 | 1111111111111111111111101111111111111111 92 | 1111111111111111111111111111111111111111* NOTE PT 2 of MC 10(LAB A) * 93 | L4512 94 | 1111111111111111 95 | 1111111111111111111111111111111111111111 96 | 1111111111111111111111111111111111110111* NOTE PT 3 of MC 10(LAB A) * 97 | L5088 98 | 1111111111111111 99 | 1101111111111111111111111111111111111111 100 | 1111111111111111111101111111111111110111* NOTE PT 2 of MC 11(LAB A) * 101 | L5376 102 | 1111111111111111 103 | 1111111111111111111111111111111111111111 104 | 1111111111111111111111111111111111111111* NOTE PT 2 of MC 12(LAB A) * 105 | L5472 106 | 1111111111111111 107 | 1111111111111111111111111111111111111111 108 | 1111111111111111111111111111111111110111* NOTE PT 3 of MC 12(LAB A) * 109 | L5568 110 | 1111111111111111 111 | 1111111111110111111101111111111111111111 112 | 0111111111111111111111111111111111111011* NOTE PT 4 of MC 12(LAB A) * 113 | L6048 114 | 1111111111111111 115 | 1101111111111111111111111111111111111111 116 | 1111111111111111111111111111111111110111* NOTE PT 2 of MC 13(LAB A) * 117 | L6336 118 | 1111111111111111 119 | 1111011111011110111111111111111111111111 120 | 1111110111011101011111111101111011101111* NOTE PT 2 of MC 14(LAB A) * 121 | L6816 122 | 1111111111111111 123 | 1111111111111111111111111111111111110111 124 | 1111111111111111111111111111111111111111* NOTE PT 4 of MC 15(LAB A) * 125 | L7008 126 | 1111111111111111 127 | 1111011111011111111111111111111111111111 128 | 1101010110010101011111111101111011101111* NOTE PT 2 of MC 15(LAB A) * 129 | L7296 130 | 1111111111111111 131 | 1111111111111001111111111111111111111111 132 | 0111111111111111111111111111111111111011* NOTE PT 2 of MC 16(LAB A) * 133 | L7392 134 | 1111111111111111 135 | 1111111111111111111111111111111111111111 136 | 1111111111111111111111111111111111110111* NOTE PT 3 of MC 16(LAB A) * 137 | L7488 138 | 1111111111111111 139 | 1111111111111101111110111111111111111111 140 | 0111111111111111111111111111111111111011* NOTE PT 4 of MC 16(LAB A) * 141 | L7680 142 | 1111111111111111 143 | 1110111111111111111111111111111111111111 144 | 1111111111111111111111111111111111111111* NOTE PT 5 of MC 17(LAB B) * 145 | L7776 146 | 1111111111111111 147 | 1111101111111111111110111111011111111111 148 | 1111111111111111111111111111111111101111* NOTE PT 4 of MC 17(LAB B) * 149 | L7872 150 | 1111111111111111 151 | 1111101111111111111110111111011111111111 152 | 1111111111111111111111111111111011111111* NOTE PT 3 of MC 17(LAB B) * 153 | L7968 154 | 1111111111111111 155 | 1111011111111111111110111111011111111111 156 | 1111111111111111111111111111110111011111* NOTE PT 2 of MC 17(LAB B) * 157 | L8256 158 | 1111111111111111 159 | 1111011111111111111111101111111111111111 160 | 1111111111111111111111111111110111011111* NOTE PT 2 of MC 18(LAB B) * 161 | L8352 162 | 1111111111111111 163 | 0110111111111111111111111111111011111111 164 | 1111111111111111111101111111111111111111* NOTE PT 3 of MC 18(LAB B) * 165 | L8640 166 | 1111111111111111 167 | 1110111111111111111111111111111111111111 168 | 1111111111111111111111111111111111111111* NOTE PT 5 of MC 19(LAB B) * 169 | L8736 170 | 1111111111111111 171 | 1111101111111011111111111111011111111111 172 | 1111111111111111111111111111111111101111* NOTE PT 4 of MC 19(LAB B) * 173 | L8832 174 | 1111111111111111 175 | 1111101111111011111111111111011111111111 176 | 1111111111111111111111111111111011111111* NOTE PT 3 of MC 19(LAB B) * 177 | L8928 178 | 1111111111111111 179 | 1111011111111011111111111111011111111111 180 | 1111111111111111111111111111110111011111* NOTE PT 2 of MC 19(LAB B) * 181 | L9792 182 | 1111111111111111 183 | 0110111111111111111111111111111011111111 184 | 1111111111111111111110111111111111111111* NOTE PT 3 of MC 21(LAB B) * 185 | L9888 186 | 1111111111111111 187 | 1111101111111111111111101111111111111111 188 | 1111111111111111111111111111111011101111* NOTE PT 2 of MC 21(LAB B) * 189 | L10176 190 | 1111111111111111 191 | 1111101111111111111111101111111111111111 192 | 1111111111111111111111111111111011011111* NOTE PT 2 of MC 22(LAB B) * 193 | L10272 194 | 1111111111111111 195 | 0110111111111111111111111111110111111111 196 | 1111111111111111111101111111111111111111* NOTE PT 3 of MC 22(LAB B) * 197 | L10752 198 | 1111111111111111 199 | 0110111111111111111111111111110111111111 200 | 1111111111111111111110111111111111111111* NOTE PT 3 of MC 23(LAB B) * 201 | L10848 202 | 1111111111111111 203 | 1111101111111111111111101111111111111111 204 | 1111111111111111111111111111110111101111* NOTE PT 2 of MC 23(LAB B) * 205 | L12096 206 | 1111111111111111 207 | 1111111111111111111111111111111111111111 208 | 1111111111111111111111111111111111111111* NOTE PT 2 of MC 26(LAB B) * 209 | L12192 210 | 1111111111111111 211 | 1111111111111111111111011111111111111111 212 | 1111111111111111111111111111111111111111* NOTE PT 3 of MC 26(LAB B) * 213 | 214 | NOTE macrocell configurations 215 | 0 0 0 0 * 216 | L15360 1111111111111111* 217 | L15376 10111101110110011000001010000110* NOTE S16,S12 of block A * 218 | L15408 00000000011001000000000000000000* NOTE S14,S11 of block A * 219 | L15440 1111111111111111* 220 | L15456 10011001100110011001100110011001* NOTE S9 ,S6 of block A * 221 | L15488 00000010000000000000010000000110* NOTE S13,S10 of block A * 222 | L15520 1111111111111111* 223 | L15536 00000100000000000010011000100110* NOTE S20,S18 of block A * 224 | L15568 00000000000000000000000000000000* NOTE S8 ,S21 of block A * 225 | L15600 1111111111111111* 226 | L15616 11001100110011111111111100111111* NOTE S7 ,S19 of block A * 227 | L15648 11111100111111000000000000100100* NOTE S22,S5 of block A * 228 | L15680 1111111111111111* 229 | L15696 11111111111111111111111111111111* NOTE S23,S4 of block A * 230 | L15728 11111110111111100110011001110010* NOTE S3 ,S15 of block A * 231 | L15760 1111111111111111* 232 | L15776 00000000000000000011111100111111* NOTE S0 ,S1 of block A * 233 | L15808 11111001100110011001100110011001* NOTE S17 ,S2 of block A * 234 | L15840 1111111111111111* 235 | L15856 11111111111110111110011011000100* NOTE S16,S12 of block B * 236 | L15888 01100100011001000000000000000000* NOTE S14,S11 of block B * 237 | L15920 1111111111111111* 238 | L15936 10011001100110011001100110011001* NOTE S9 ,S6 of block B * 239 | L15968 00000001000000011000100110011001* NOTE S13,S10 of block B * 240 | L16000 1111111111111111* 241 | L16016 00000000000000000010011000100110* NOTE S20,S18 of block B * 242 | L16048 00000011000000111100111111111111* NOTE S8 ,S21 of block B * 243 | L16080 1111111111111111* 244 | L16096 11111111111100111111111111111111* NOTE S7 ,S19 of block B * 245 | L16128 11111110111111100101011001100110* NOTE S22,S5 of block B * 246 | L16160 1111111111111111* 247 | L16176 11111111111111111111111111111111* NOTE S23,S4 of block B * 248 | L16208 11111110111111100110011001100110* NOTE S3 ,S15 of block B * 249 | L16240 1111111111111111* 250 | L16256 00000000000011000011111100111111* NOTE S0 ,S1 of block B * 251 | L16288 11111101111111011011100110011001* NOTE S17 ,S2 of block B * 252 | 253 | NOTE UIM for block A and B* 254 | NOTE 0 0 0* 255 | L16320 10111* NOTE Mux-39 of block A* 256 | L16325 10111* NOTE Mux-39 of block B* 257 | L16330 11110* NOTE Mux-38 of block A* 258 | L16335 11111* NOTE Mux-38 of block B* 259 | L16340 01111* NOTE Mux-37 of block A* 260 | L16345 01111* NOTE Mux-37 of block B* 261 | L16350 11111* NOTE Mux-36 of block A* 262 | L16355 11111* NOTE Mux-36 of block B* 263 | L16360 01111* NOTE Mux-35 of block A* 264 | L16365 01111* NOTE Mux-35 of block B* 265 | L16370 11111* NOTE Mux-34 of block A* 266 | L16375 11111* NOTE Mux-34 of block B* 267 | L16380 01111* NOTE Mux-33 of block A* 268 | L16385 11111* NOTE Mux-33 of block B* 269 | L16390 11101* NOTE Mux-32 of block A* 270 | L16395 11111* NOTE Mux-32 of block B* 271 | L16400 11011* NOTE Mux-31 of block A* 272 | L16405 11111* NOTE Mux-31 of block B* 273 | L16410 10111* NOTE Mux-30 of block A* 274 | L16415 10111* NOTE Mux-30 of block B* 275 | L16420 10111* NOTE Mux-29 of block A* 276 | L16425 10111* NOTE Mux-29 of block B* 277 | L16430 01111* NOTE Mux-28 of block A* 278 | L16435 11111* NOTE Mux-28 of block B* 279 | L16440 01111* NOTE Mux-27 of block A* 280 | L16445 11111* NOTE Mux-27 of block B* 281 | L16450 11011* NOTE Mux-26 of block A* 282 | L16455 11111* NOTE Mux-26 of block B* 283 | L16460 01111* NOTE Mux-25 of block A* 284 | L16465 11111* NOTE Mux-25 of block B* 285 | L16470 11011* NOTE Mux-24 of block A* 286 | L16475 11111* NOTE Mux-24 of block B* 287 | L16480 01111* NOTE Mux-23 of block A* 288 | L16485 11111* NOTE Mux-23 of block B* 289 | L16490 11101* NOTE Mux-22 of block A* 290 | L16495 11111* NOTE Mux-22 of block B* 291 | L16500 11011* NOTE Mux-21 of block A* 292 | L16505 11111* NOTE Mux-21 of block B* 293 | L16510 10111* NOTE Mux-20 of block A* 294 | L16515 11111* NOTE Mux-20 of block B* 295 | L16520 10111* NOTE Mux-19 of block A* 296 | L16525 10111* NOTE Mux-19 of block B* 297 | L16530 11011* NOTE Mux-18 of block A* 298 | L16535 11111* NOTE Mux-18 of block B* 299 | L16540 10111* NOTE Mux-17 of block A* 300 | L16545 11111* NOTE Mux-17 of block B* 301 | L16550 11111* NOTE Mux-16 of block A* 302 | L16555 11111* NOTE Mux-16 of block B* 303 | L16560 11111* NOTE Mux-15 of block A* 304 | L16565 11011* NOTE Mux-15 of block B* 305 | L16570 11111* NOTE Mux-14 of block A* 306 | L16575 11101* NOTE Mux-14 of block B* 307 | L16580 11111* NOTE Mux-13 of block A* 308 | L16585 11111* NOTE Mux-13 of block B* 309 | L16590 11111* NOTE Mux-12 of block A* 310 | L16595 11111* NOTE Mux-12 of block B* 311 | L16600 11110* NOTE Mux-11 of block A* 312 | L16605 11110* NOTE Mux-11 of block B* 313 | L16610 11110* NOTE Mux-10 of block A* 314 | L16615 11110* NOTE Mux-10 of block B* 315 | L16620 10111* NOTE Mux-9 of block A* 316 | L16625 10111* NOTE Mux-9 of block B* 317 | L16630 11111* NOTE Mux-8 of block A* 318 | L16635 11111* NOTE Mux-8 of block B* 319 | L16640 11011* NOTE Mux-7 of block A* 320 | L16645 11111* NOTE Mux-7 of block B* 321 | L16650 01111* NOTE Mux-6 of block A* 322 | L16655 01111* NOTE Mux-6 of block B* 323 | L16660 11011* NOTE Mux-5 of block A* 324 | L16665 11111* NOTE Mux-5 of block B* 325 | L16670 11111* NOTE Mux-4 of block A* 326 | L16675 11111* NOTE Mux-4 of block B* 327 | L16680 11111* NOTE Mux-3 of block A* 328 | L16685 11111* NOTE Mux-3 of block B* 329 | L16690 11011* NOTE Mux-2 of block A* 330 | L16695 11011* NOTE Mux-2 of block B* 331 | L16700 11110* NOTE Mux-1 of block A* 332 | L16705 11110* NOTE Mux-1 of block B* 333 | L16710 11111* NOTE Mux-0 of block A* 334 | L16715 11110* NOTE Mux-0 of block B* 335 | 336 | NOTE 6 global OE 337 | 0 0 0* 338 | L16720 11101* NOTE GOE5* 339 | L16725 11101* NOTE GOE4* 340 | L16730 11110* NOTE GOE3* 341 | L16735 11110* NOTE GOE2* 342 | L16740 11101* NOTE GOE1* 343 | L16745 11110* NOTE GOE0* 344 | * 345 | 346 | NOTE device configuration bits* 347 | NOTE 0 0 0 0* 348 | L16750 01110000010011111011000111111111* 349 | 350 | NOTE Special Purpose Bits (JTAG) * 351 | L16782 1111* 352 | 353 | NOTE UES bits* 354 | L16786 1111111111111111* 355 | 356 | NOTE Reserved bits * 357 | L16802 000000* 358 | 359 | CCA0D* 360 | 0000 361 | -------------------------------------------------------------------------------- /firmware/V1/8mb/epm7032slc44-10.pof: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/firmware/V1/8mb/epm7032slc44-10.pof -------------------------------------------------------------------------------- /firmware/V1/8mb_no_autoconfig/README.txt: -------------------------------------------------------------------------------- 1 | 8mb NON-autoconfiguring version. 2 | 3 | It is practically useless except for testing memory chips. If normal versions 4 | fail to start, try this, then run in debugger simple code sequence like this: 5 | 6 | lea $200000,a0 7 | 8 | moveq #0,d0 9 | moveq #1,d1 10 | move.l a0,a1 11 | 12 | label1: 13 | move.l d1,(a1)+ 14 | rol.l #1,d1 15 | subq.b #1,d0 16 | bne.s label1 17 | 18 | 19 | move.l a0,a1 20 | label2: 21 | move.l (a1)+,d1 22 | 23 | subq.b #1,d0 24 | bne.s label2 25 | 26 | 27 | rts 28 | 29 | Manually examine read value in label2 loop. If it not 30 | 1-2-4-...-$80000000-1-2-... etc. sequence or machine fails during reading 31 | (this was my case once), you have bad memory chip (provided you checked all 32 | signals going to board with oscilloscope or logic probe). Try a0 with $200000, 33 | $400000,$600000 and $800000 values thus checking all the chips. 34 | 35 | The addressing of memory chips in 8Mb mode is from left to right: most left 36 | chip occupies $200000-#3fffff, next $400000-$5fffff and so on. In 4Mb mode, 37 | most right chip is at $400000-$5fffff, adjacent is at $200000-$3fffff. 38 | 39 | 40 | NOTE: if the memory chip doesn't drive data bus at all or is absent, you will 41 | see in d1 the opcode of next command. This is because 68000 does PREfetching 42 | before starting to execute command just fetched (and this is not fully 43 | documented). After a prefetch, 68000 starts reading of $20xxxx address, where 44 | databus is not driven by anything, and therefore holds previous value for 45 | some time. Try movem.l (a0),d0-d7/a1-a6 to see how databus decays. 46 | 47 | 48 | -------------------------------------------------------------------------------- /firmware/V1/8mb_no_autoconfig/atf1502as10jc44.jed: -------------------------------------------------------------------------------- 1 |  Version 4.45 2 | JEDEC file for: ATF1502 PLCC44 3 | Created on: Fri Jan 25 19:03:56 2008 4 | 5 | * 6 | QF16808* QP44 * F0* 7 | NOTE 8 | 0 0 0 0 0 * 9 | L192 10 | 1111111111111111 11 | 1111111111111111111111111101111111111111 12 | 1111111111111111111111110111111111111111* NOTE PT 3 of MC 1(LAB A) * 13 | L288 14 | 1111111111111111 15 | 1111111111111111111111111110111111111111 16 | 1111111111110111111111111111111111111111* NOTE PT 2 of MC 1(LAB A) * 17 | L576 18 | 1111111111111111 19 | 1111111111111111111111111110111111111111 20 | 1111111111111111111111111111111111110111* NOTE PT 2 of MC 2(LAB A) * 21 | L672 22 | 1111111111111111 23 | 1111111111111111111111111101111111111111 24 | 1111111111111111111111101111111111111111* NOTE PT 3 of MC 2(LAB A) * 25 | L7680 26 | 1111111111111111 27 | 1111111111111111111111111111111011111111 28 | 1111111111111111111111111111111111111111* NOTE PT 5 of MC 17(LAB B) * 29 | L7776 30 | 1111111111111111 31 | 1110101111111111111110111111111111111111 32 | 1111111111111111111101111111111111111111* NOTE PT 4 of MC 17(LAB B) * 33 | L7872 34 | 1111111111111111 35 | 1110101111111111111110111111111111111111 36 | 1111111111111111111111111111111011111111* NOTE PT 3 of MC 17(LAB B) * 37 | L7968 38 | 1111111111111111 39 | 1110011111111111111110111111111111111111 40 | 1111111111111111111110111111110111111111* NOTE PT 2 of MC 17(LAB B) * 41 | L8256 42 | 1111111111111111 43 | 1111011111111111111111101111111111111111 44 | 1111111111111111111110111111110111111111* NOTE PT 2 of MC 18(LAB B) * 45 | L8352 46 | 1111111111111111 47 | 0111111111111111111111111111111011111111 48 | 1110111111111111111111101111111111111111* NOTE PT 3 of MC 18(LAB B) * 49 | L8640 50 | 1111111111111111 51 | 1111111111111111111111111111111011111111 52 | 1111111111111111111111111111111111111111* NOTE PT 5 of MC 19(LAB B) * 53 | L8736 54 | 1111111111111111 55 | 1110101111111011111111111111111111111111 56 | 1111111111111111111101111111111111111111* NOTE PT 4 of MC 19(LAB B) * 57 | L8832 58 | 1111111111111111 59 | 1110101111111011111111111111111111111111 60 | 1111111111111111111111111111111011111111* NOTE PT 3 of MC 19(LAB B) * 61 | L8928 62 | 1111111111111111 63 | 1110011111111011111111111111111111111111 64 | 1111111111111111111110111111110111111111* NOTE PT 2 of MC 19(LAB B) * 65 | L9216 66 | 1111111111111111 67 | 1111111111111111111111111111110111111111 68 | 1111111111111111111111111111111111110111* NOTE PT 2 of MC 20(LAB B) * 69 | L9792 70 | 1111111111111111 71 | 0111111111111111111111111111111011111111 72 | 1110111111111111111111011111111111111111* NOTE PT 3 of MC 21(LAB B) * 73 | L9888 74 | 1111111111111111 75 | 1111101111111111111111101111111111111111 76 | 1111111111111111111101111111111011111111* NOTE PT 2 of MC 21(LAB B) * 77 | L10176 78 | 1111111111111111 79 | 1111101111111111111111101111111111111111 80 | 1111111111111111111110111111111011111111* NOTE PT 2 of MC 22(LAB B) * 81 | L10272 82 | 1111111111111111 83 | 0111111111111111111111111111111011111111 84 | 1101111111111111111111101111111111111111* NOTE PT 3 of MC 22(LAB B) * 85 | L10752 86 | 1111111111111111 87 | 0111111111111111111111111111111011111111 88 | 1101111111111111111111011111111111111111* NOTE PT 3 of MC 23(LAB B) * 89 | L10848 90 | 1111111111111111 91 | 1111101111111111111111101111111111111111 92 | 1111111111111111111101111111110111111111* NOTE PT 2 of MC 23(LAB B) * 93 | L11136 94 | 1111111111111111 95 | 1111111111111111111111111111110111111111 96 | 1111111111111111111111101111111111110111* NOTE PT 2 of MC 24(LAB B) * 97 | L11808 98 | 1111111111111111 99 | 1111111111111111111111111111110111111111 100 | 1111111111111111111111111111111111110111* NOTE PT 2 of MC 25(LAB B) * 101 | L12096 102 | 1111111111111111 103 | 1111111111111111111111111111111111111111 104 | 1111111111111111111111111111111111111111* NOTE PT 2 of MC 26(LAB B) * 105 | L12192 106 | 1111111111111111 107 | 1111111111111111111111011111111111111111 108 | 1111111111111111111111111111111111111111* NOTE PT 3 of MC 26(LAB B) * 109 | L12672 110 | 1111111111111111 111 | 1111111111111111111111111111111111111111 112 | 1111111111111111111111111111111111110111* NOTE PT 3 of MC 27(LAB B) * 113 | L12768 114 | 1111111111111111 115 | 1111111111111111111111111111111111111111 116 | 1111111111111111111111111111111111111111* NOTE PT 2 of MC 27(LAB B) * 117 | L14592 118 | 1111111111111111 119 | 1111111111111111111111111111111111111111 120 | 1111111111111111111111111111111111110111* NOTE PT 3 of MC 31(LAB B) * 121 | L14688 122 | 1111111111111111 123 | 1111111111111111111111101111111111111111 124 | 1111111111111111111111111111111111111111* NOTE PT 2 of MC 31(LAB B) * 125 | 126 | NOTE macrocell configurations 127 | 0 0 0 0 * 128 | L15360 1111111111111111* 129 | L15376 11111111111111111111111111110110* NOTE S16,S12 of block A * 130 | L15408 00000100011001000000000000000000* NOTE S14,S11 of block A * 131 | L15440 1111111111111111* 132 | L15456 10011001100110011001100110011001* NOTE S9 ,S6 of block A * 133 | L15488 00000001000000011001100110011001* NOTE S13,S10 of block A * 134 | L15520 1111111111111111* 135 | L15536 00000000000000000011111100110110* NOTE S20,S18 of block A * 136 | L15568 00000011000000111111111111111111* NOTE S8 ,S21 of block A * 137 | L15600 1111111111111111* 138 | L15616 11111111111111111111111111111111* NOTE S7 ,S19 of block A * 139 | L15648 11111110111111100110011001100110* NOTE S22,S5 of block A * 140 | L15680 1111111111111111* 141 | L15696 11111111111111111111111111111111* NOTE S23,S4 of block A * 142 | L15728 11111110111111100110011001100110* NOTE S3 ,S15 of block A * 143 | L15760 1111111111111111* 144 | L15776 00000000000000000011111100111111* NOTE S0 ,S1 of block A * 145 | L15808 11111101111111011001100110011001* NOTE S17 ,S2 of block A * 146 | L15840 1111111111111111* 147 | L15856 11011111110110011010011010000100* NOTE S16,S12 of block B * 148 | L15888 01100100011001000000000000000000* NOTE S14,S11 of block B * 149 | L15920 1111111111111111* 150 | L15936 10011001100110011001100110011001* NOTE S9 ,S6 of block B * 151 | L15968 00000010000000100000000110010001* NOTE S13,S10 of block B * 152 | L16000 1111111111111111* 153 | L16016 00000000000000000010011000100110* NOTE S20,S18 of block B * 154 | L16048 00000000000000000000001111110011* NOTE S8 ,S21 of block B * 155 | L16080 1111111111111111* 156 | L16096 11111111111100000011111100111111* NOTE S7 ,S19 of block B * 157 | L16128 11111100111111000001001001100010* NOTE S22,S5 of block B * 158 | L16160 1111111111111111* 159 | L16176 11111111111111111111111111111111* NOTE S23,S4 of block B * 160 | L16208 11111110111111100110011001100110* NOTE S3 ,S15 of block B * 161 | L16240 1111111111111111* 162 | L16256 00000000000011000011111111111111* NOTE S0 ,S1 of block B * 163 | L16288 11111111111111011011100110011001* NOTE S17 ,S2 of block B * 164 | 165 | NOTE UIM for block A and B* 166 | NOTE 0 0 0* 167 | L16320 10111* NOTE Mux-39 of block A* 168 | L16325 10111* NOTE Mux-39 of block B* 169 | L16330 10111* NOTE Mux-38 of block A* 170 | L16335 11110* NOTE Mux-38 of block B* 171 | L16340 11111* NOTE Mux-37 of block A* 172 | L16345 11111* NOTE Mux-37 of block B* 173 | L16350 11111* NOTE Mux-36 of block A* 174 | L16355 11111* NOTE Mux-36 of block B* 175 | L16360 11111* NOTE Mux-35 of block A* 176 | L16365 01111* NOTE Mux-35 of block B* 177 | L16370 11111* NOTE Mux-34 of block A* 178 | L16375 11111* NOTE Mux-34 of block B* 179 | L16380 11111* NOTE Mux-33 of block A* 180 | L16385 11111* NOTE Mux-33 of block B* 181 | L16390 11101* NOTE Mux-32 of block A* 182 | L16395 11111* NOTE Mux-32 of block B* 183 | L16400 11011* NOTE Mux-31 of block A* 184 | L16405 11110* NOTE Mux-31 of block B* 185 | L16410 11111* NOTE Mux-30 of block A* 186 | L16415 01111* NOTE Mux-30 of block B* 187 | L16420 10111* NOTE Mux-29 of block A* 188 | L16425 10111* NOTE Mux-29 of block B* 189 | L16430 11111* NOTE Mux-28 of block A* 190 | L16435 11111* NOTE Mux-28 of block B* 191 | L16440 11111* NOTE Mux-27 of block A* 192 | L16445 11111* NOTE Mux-27 of block B* 193 | L16450 01111* NOTE Mux-26 of block A* 194 | L16455 11111* NOTE Mux-26 of block B* 195 | L16460 11111* NOTE Mux-25 of block A* 196 | L16465 11111* NOTE Mux-25 of block B* 197 | L16470 11111* NOTE Mux-24 of block A* 198 | L16475 11111* NOTE Mux-24 of block B* 199 | L16480 11111* NOTE Mux-23 of block A* 200 | L16485 11111* NOTE Mux-23 of block B* 201 | L16490 11111* NOTE Mux-22 of block A* 202 | L16495 11111* NOTE Mux-22 of block B* 203 | L16500 11111* NOTE Mux-21 of block A* 204 | L16505 11110* NOTE Mux-21 of block B* 205 | L16510 11111* NOTE Mux-20 of block A* 206 | L16515 11111* NOTE Mux-20 of block B* 207 | L16520 10111* NOTE Mux-19 of block A* 208 | L16525 10111* NOTE Mux-19 of block B* 209 | L16530 11111* NOTE Mux-18 of block A* 210 | L16535 11111* NOTE Mux-18 of block B* 211 | L16540 11111* NOTE Mux-17 of block A* 212 | L16545 11111* NOTE Mux-17 of block B* 213 | L16550 11111* NOTE Mux-16 of block A* 214 | L16555 11111* NOTE Mux-16 of block B* 215 | L16560 11111* NOTE Mux-15 of block A* 216 | L16565 10111* NOTE Mux-15 of block B* 217 | L16570 11111* NOTE Mux-14 of block A* 218 | L16575 11111* NOTE Mux-14 of block B* 219 | L16580 10111* NOTE Mux-13 of block A* 220 | L16585 11111* NOTE Mux-13 of block B* 221 | L16590 11111* NOTE Mux-12 of block A* 222 | L16595 11111* NOTE Mux-12 of block B* 223 | L16600 11111* NOTE Mux-11 of block A* 224 | L16605 01111* NOTE Mux-11 of block B* 225 | L16610 11111* NOTE Mux-10 of block A* 226 | L16615 11110* NOTE Mux-10 of block B* 227 | L16620 10111* NOTE Mux-9 of block A* 228 | L16625 10111* NOTE Mux-9 of block B* 229 | L16630 11111* NOTE Mux-8 of block A* 230 | L16635 11111* NOTE Mux-8 of block B* 231 | L16640 11111* NOTE Mux-7 of block A* 232 | L16645 11111* NOTE Mux-7 of block B* 233 | L16650 11111* NOTE Mux-6 of block A* 234 | L16655 01111* NOTE Mux-6 of block B* 235 | L16660 11111* NOTE Mux-5 of block A* 236 | L16665 11111* NOTE Mux-5 of block B* 237 | L16670 11111* NOTE Mux-4 of block A* 238 | L16675 11111* NOTE Mux-4 of block B* 239 | L16680 11111* NOTE Mux-3 of block A* 240 | L16685 11111* NOTE Mux-3 of block B* 241 | L16690 11111* NOTE Mux-2 of block A* 242 | L16695 11011* NOTE Mux-2 of block B* 243 | L16700 11111* NOTE Mux-1 of block A* 244 | L16705 01111* NOTE Mux-1 of block B* 245 | L16710 11111* NOTE Mux-0 of block A* 246 | L16715 11110* NOTE Mux-0 of block B* 247 | 248 | NOTE 6 global OE 249 | 0 0 0* 250 | L16720 11110* NOTE GOE5* 251 | L16725 11101* NOTE GOE4* 252 | L16730 11110* NOTE GOE3* 253 | L16735 11110* NOTE GOE2* 254 | L16740 11101* NOTE GOE1* 255 | L16745 11110* NOTE GOE0* 256 | * 257 | 258 | NOTE device configuration bits* 259 | NOTE 0 0 0 0* 260 | L16750 01110000000011111011000111111111* 261 | 262 | NOTE Special Purpose Bits (JTAG) * 263 | L16782 1111* 264 | 265 | NOTE UES bits* 266 | L16786 1111111111111111* 267 | 268 | NOTE Reserved bits * 269 | L16802 000000* 270 | 271 | CCDEB* 272 | 0000 273 | -------------------------------------------------------------------------------- /firmware/V1/8mb_no_autoconfig/epm7032slc44-10.pof: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/firmware/V1/8mb_no_autoconfig/epm7032slc44-10.pof -------------------------------------------------------------------------------- /firmware/V1/bsdl/1502ASV_A44.bsd: -------------------------------------------------------------------------------- 1 | -- File Name : 1502ASV_A44.BSD 2 | -- Created By : Atmel Corporation 3 | -- Documentation : ATF15xx Family BSDL 4 | -- BSDL Revision : 1.0 5 | -- 6 | -- Note : Some lines in this BSDL file might be 7 | -- longer than 80 characters. Adjust to 8 | -- word wrap width on your text editor 9 | -- accordingly to prevent possible 10 | -- compile errors. 11 | -- 12 | -- Status : Preliminary 13 | -- Date Created : 07/02/02 14 | -- Device : ATF1502ASV 15 | -- Package : 44-Lead Thin Quad Flat Pack (TQFP) 16 | -- 17 | -- ********************************************************************* 18 | -- * IMPORTANT NOTICE * 19 | -- * * 20 | -- * Copyright 2001,2002 Atmel Corporation. All Rights Reserved. * 21 | -- * * 22 | -- * Atmel assumes no responsibility or liability arising out of * 23 | -- * this application or use of any information described herein * 24 | -- * except as expressly agreed to in writing by Atmel Corporation. * 25 | -- * * 26 | -- ********************************************************************* 27 | -- 28 | -- Revision History : 29 | -- 30 | -- Rev 1.0 (07/02/02) - Initial version. 31 | -- 32 | entity F1502ASV_A44 is 33 | generic (PHYSICAL_PIN_MAP : string := "TQFP44"); 34 | 35 | port ( 36 | --I/O Pins 37 | IO42 , IO43 , IO44 , IO2 , IO3 , IO5 , IO6 , 38 | IO8 , IO10 , IO11 , IO12 , IO13 , IO14 , IO15 , 39 | IO18 , IO19 , IO20 , IO21 , IO22 , IO23 , IO25 , 40 | IO27 , IO28 , IO30 , IO31 , IO33 , IO34 , IO35 41 | : inout bit; 42 | --JTAG Port Pins 43 | TCK :in bit; 44 | TDI :in bit; 45 | TDO :out bit; 46 | TMS :in bit; 47 | --Dedicated Input Pins 48 | IN37 , IN38 , IN39 , IN40 : in bit; 49 | --Power Pins 50 | VCC :linkage bit_vector(1 to 4); 51 | --Ground Pins 52 | GND :linkage bit_vector(1 to 4) 53 | ); 54 | 55 | use STD_1149_1_1994.all; 56 | attribute COMPONENT_CONFORMANCE of F1502ASV_A44 : 57 | entity is "STD_1149_1_1993"; 58 | 59 | attribute PIN_MAP of F1502ASV_A44 : entity is PHYSICAL_PIN_MAP; 60 | constant TQFP44 : PIN_MAP_STRING := 61 | --I/O pins 62 | "IO42 : 42 , IO43 : 43 , IO44 : 44 , IO2 : 2 , "& 63 | "IO3 : 3 , IO5 : 5 , IO6 : 6 , IO8 : 8 , "& 64 | "IO10 : 10 , IO11 : 11 , IO12 : 12 , IO13 : 13 , "& 65 | "IO14 : 14 , IO15 : 15 , IO18 : 18 , IO19 : 19 , "& 66 | "IO20 : 20 , IO21 : 21 , IO22 : 22 , IO23 : 23 , "& 67 | "IO25 : 25 , IO27 : 27 , IO28 : 28 , IO30 : 30 , "& 68 | "IO31 : 31 , IO33 : 33 , IO34 : 34 , IO35 : 35 , "& 69 | --Dedicated Input Pins 70 | "IN37 : 37 , IN38 : 38 , IN39 : 39 , IN40 : 40 , "& 71 | --JTAG ports 72 | "TCK : 26 , TMS : 7 , TDI : 1 , TDO : 32 , "& 73 | --Power Pins 74 | "VCC : (9 , 17 , 29 , 41 ), "& 75 | --Ground Pins 76 | "GND : (4 , 16 , 24 , 36 )"; 77 | 78 | attribute TAP_SCAN_IN of TDI :signal is true; 79 | attribute TAP_SCAN_MODE of TMS :signal is true; 80 | attribute TAP_SCAN_OUT of TDO :signal is true; 81 | attribute TAP_SCAN_CLOCK of TCK :signal is (10.00e6,BOTH); 82 | 83 | --Instruction Definitions 84 | attribute INSTRUCTION_LENGTH of F1502ASV_A44 :entity is 10; 85 | attribute INSTRUCTION_OPCODE of F1502ASV_A44 :entity is 86 | "EXTEST (0000000000),"& 87 | "BYPASS (1111111111),"& 88 | "SAMPLE (0001010101),"& 89 | "IDCODE (0001011001)"; 90 | 91 | attribute INSTRUCTION_CAPTURE of F1502ASV_A44 :entity is "0001011001"; 92 | 93 | attribute IDCODE_REGISTER of F1502ASV_A44 :entity is 94 | "0000000101010001001X000000111111"; -- 0151203F or 0151303F 95 | 96 | attribute BOUNDARY_LENGTH of F1502ASV_A44 :entity is 96; 97 | attribute BOUNDARY_REGISTER of F1502ASV_A44 :entity is 98 | --Input, GOE1 99 | "0 (BC_4,IN38,input,X),"& 100 | 101 | --Input, GCLK1 102 | "1 (BC_4,IN37,input,X),"& 103 | 104 | --Input, MC17 105 | "2 (BC_4,IO35,input,X),"& 106 | 107 | --Input, MC18 108 | "3 (BC_4,IO34,input,X),"& 109 | 110 | --Input, MC19 111 | "4 (BC_4,IO33,input,X),"& 112 | 113 | --Input, MC21 114 | "5 (BC_4,IO31,input,X),"& 115 | 116 | --Input, MC22 117 | "6 (BC_4,IO30,input,X),"& 118 | 119 | --Input, MC23 120 | "7 (BC_4,IO28,input,X),"& 121 | 122 | --Input, MC24 123 | "8 (BC_4,IO27,input,X),"& 124 | 125 | --Input, MC26 126 | "9 (BC_4,IO25,input,X),"& 127 | 128 | --Input, MC27 129 | "10 (BC_4,IO23,input,X),"& 130 | 131 | --Input, MC28 132 | "11 (BC_4,IO22,input,X),"& 133 | 134 | --Input, MC29 135 | "12 (BC_4,IO21,input,X),"& 136 | 137 | --Input, MC30 138 | "13 (BC_4,IO20,input,X),"& 139 | 140 | --Input, MC31 141 | "14 (BC_4,IO19,input,X),"& 142 | 143 | --Input, MC32 144 | "15 (BC_4,IO18,input,X),"& 145 | 146 | --Input, MC16 147 | "16 (BC_4,IO15,input,X),"& 148 | 149 | --Input, MC15 150 | "17 (BC_4,IO14,input,X),"& 151 | 152 | --Input, MC14 153 | "18 (BC_4,IO13,input,X),"& 154 | 155 | --Input, MC13 156 | "19 (BC_4,IO12,input,X),"& 157 | 158 | --Input, MC12 159 | "20 (BC_4,IO11,input,X),"& 160 | 161 | --Input, MC11 162 | "21 (BC_4,IO10,input,X),"& 163 | 164 | --Input, MC10 165 | "22 (BC_4,IO8,input,X),"& 166 | 167 | --Input, MC8 168 | "23 (BC_4,IO6,input,X),"& 169 | 170 | --Input, MC7 171 | "24 (BC_4,IO5,input,X),"& 172 | 173 | --Input, MC6 174 | "25 (BC_4,IO3,input,X),"& 175 | 176 | --Input, MC5 177 | "26 (BC_4,IO2,input,X),"& 178 | 179 | --Input, MC3 180 | "27 (BC_4,IO44,input,X),"& 181 | 182 | --Input, MC2 183 | "28 (BC_4,IO43,input,X),"& 184 | 185 | --Input, MC1 186 | "29 (BC_4,IO42,input,X),"& 187 | 188 | --Input, GCLK2 189 | "30 (BC_4,IN40,input,X),"& 190 | 191 | --Input, GCLR 192 | "31 (BC_4,IN39,input,X),"& 193 | 194 | --I/O, MC17 195 | "32 (BC_1, * ,control, 0),"& 196 | "33 (BC_1, IO35,output3,1,32,0,Z),"& 197 | 198 | --I/O, MC18 199 | "34 (BC_1, * ,control, 0),"& 200 | "35 (BC_1, IO34,output3,1,34,0,Z),"& 201 | 202 | --I/O, MC19 203 | "36 (BC_1, * ,control, 0),"& 204 | "37 (BC_1, IO33,output3,1,36,0,Z),"& 205 | 206 | --Internal, MC20 207 | "38 (BC_1, * ,internal, 0),"& 208 | "39 (BC_1, * ,internal, X),"& 209 | 210 | --I/O, MC21 211 | "40 (BC_1, * ,control, 0),"& 212 | "41 (BC_1, IO31,output3,1,40,0,Z),"& 213 | 214 | --I/O, MC22 215 | "42 (BC_1, * ,control, 0),"& 216 | "43 (BC_1, IO30,output3,1,42,0,Z),"& 217 | 218 | --I/O, MC23 219 | "44 (BC_1, * ,control, 0),"& 220 | "45 (BC_1, IO28,output3,1,44,0,Z),"& 221 | 222 | --I/O, MC24 223 | "46 (BC_1, * ,control, 0),"& 224 | "47 (BC_1, IO27,output3,1,46,0,Z),"& 225 | 226 | --Internal, MC25 227 | "48 (BC_1, * ,internal, 0),"& 228 | "49 (BC_1, * ,internal, X),"& 229 | 230 | --I/O, MC26 231 | "50 (BC_1, * ,control, 0),"& 232 | "51 (BC_1, IO25,output3,1,50,0,Z),"& 233 | 234 | --I/O, MC27 235 | "52 (BC_1, * ,control, 0),"& 236 | "53 (BC_1, IO23,output3,1,52,0,Z),"& 237 | 238 | --I/O, MC28 239 | "54 (BC_1, * ,control, 0),"& 240 | "55 (BC_1, IO22,output3,1,54,0,Z),"& 241 | 242 | --I/O, MC29 243 | "56 (BC_1, * ,control, 0),"& 244 | "57 (BC_1, IO21,output3,1,56,0,Z),"& 245 | 246 | --I/O, MC30 247 | "58 (BC_1, * ,control, 0),"& 248 | "59 (BC_1, IO20,output3,1,58,0,Z),"& 249 | 250 | --I/O, MC31 251 | "60 (BC_1, * ,control, 0),"& 252 | "61 (BC_1, IO19,output3,1,60,0,Z),"& 253 | 254 | --I/O, MC32 255 | "62 (BC_1, * ,control, 0),"& 256 | "63 (BC_1, IO18,output3,1,62,0,Z),"& 257 | 258 | --I/O, MC16 259 | "64 (BC_1, * ,control, 0),"& 260 | "65 (BC_1, IO15,output3,1,64,0,Z),"& 261 | 262 | --I/O, MC15 263 | "66 (BC_1, * ,control, 0),"& 264 | "67 (BC_1, IO14,output3,1,66,0,Z),"& 265 | 266 | --I/O, MC14 267 | "68 (BC_1, * ,control, 0),"& 268 | "69 (BC_1, IO13,output3,1,68,0,Z),"& 269 | 270 | --I/O, MC13 271 | "70 (BC_1, * ,control, 0),"& 272 | "71 (BC_1, IO12,output3,1,70,0,Z),"& 273 | 274 | --I/O, MC12 275 | "72 (BC_1, * ,control, 0),"& 276 | "73 (BC_1, IO11,output3,1,72,0,Z),"& 277 | 278 | --I/O, MC11 279 | "74 (BC_1, * ,control, 0),"& 280 | "75 (BC_1, IO10,output3,1,74,0,Z),"& 281 | 282 | --I/O, MC10 283 | "76 (BC_1, * ,control, 0),"& 284 | "77 (BC_1, IO8,output3,1,76,0,Z),"& 285 | 286 | --Internal, MC9 287 | "78 (BC_1, * ,internal, 0),"& 288 | "79 (BC_1, * ,internal, X),"& 289 | 290 | --I/O, MC8 291 | "80 (BC_1, * ,control, 0),"& 292 | "81 (BC_1, IO6,output3,1,80,0,Z),"& 293 | 294 | --I/O, MC7 295 | "82 (BC_1, * ,control, 0),"& 296 | "83 (BC_1, IO5,output3,1,82,0,Z),"& 297 | 298 | --I/O, MC6 299 | "84 (BC_1, * ,control, 0),"& 300 | "85 (BC_1, IO3,output3,1,84,0,Z),"& 301 | 302 | --I/O, MC5 303 | "86 (BC_1, * ,control, 0),"& 304 | "87 (BC_1, IO2,output3,1,86,0,Z),"& 305 | 306 | --Internal, MC4 307 | "88 (BC_1, * ,internal, 0),"& 308 | "89 (BC_1, * ,internal, X),"& 309 | 310 | --I/O, MC3 311 | "90 (BC_1, * ,control, 0),"& 312 | "91 (BC_1, IO44,output3,1,90,0,Z),"& 313 | 314 | --I/O, MC2 315 | "92 (BC_1, * ,control, 0),"& 316 | "93 (BC_1, IO43,output3,1,92,0,Z),"& 317 | 318 | --I/O, MC1 319 | "94 (BC_1, * ,control, 0),"& 320 | "95 (BC_1, IO42,output3,1,94,0,Z)"; 321 | 322 | end F1502ASV_A44; 323 | -------------------------------------------------------------------------------- /firmware/V1/bsdl/1502ASV_J44.bsd: -------------------------------------------------------------------------------- 1 | -- File Name : 1502ASV_J44.BSD 2 | -- Created by : Atmel Corporation 3 | -- Documentation : ATF15xx Family BSDL 4 | -- BSDL Revision : 1.0 5 | -- 6 | -- Note : Some lines in this BSDL file might be 7 | -- longer than 80 characters. Adjust to 8 | -- word wrap width on your text editor 9 | -- accordingly to prevent possible 10 | -- compile errors. 11 | -- 12 | -- BSDL Status : Preliminary 13 | -- Date created : 07/02/02 14 | -- Device : ATF1502ASV 15 | -- Package : 44-Lead Plastic J-Leaded Chip Carrier (PLCC) 16 | -- 17 | -- ********************************************************************* 18 | -- * IMPORTANT NOTICE * 19 | -- * * 20 | -- * Copyright 2001,2002 Atmel Corporation. All Rights Reserved. * 21 | -- * * 22 | -- * Atmel assumes no responsibility or liability arising out of * 23 | -- * this application or use of any information described herein * 24 | -- * except as expressly agreed to in writing by Atmel Corporation. * 25 | -- * * 26 | -- ********************************************************************* 27 | -- 28 | -- Revision History : 29 | -- 30 | -- Rev 1.0 (07/02/02) - Initial version. 31 | -- 32 | entity F1502ASV_J44 is 33 | generic (PHYSICAL_PIN_MAP : string := "PLCC44"); 34 | 35 | port ( 36 | --I/O Pins 37 | IO4 , IO5 , IO6 , IO8 , IO9 , IO11 , IO12 , 38 | IO14 , IO16 , IO17 , IO18 , IO19 , IO20 , IO21 , 39 | IO24 , IO25 , IO26 , IO27 , IO28 , IO29 , IO31 , 40 | IO33 , IO34 , IO36 , IO37 , IO39 , IO40 , IO41 41 | : inout bit; 42 | --JTAG Port Pins 43 | TCK :in bit; 44 | TDI :in bit; 45 | TDO :out bit; 46 | TMS :in bit; 47 | --Dedicated Input Pins 48 | IN1 , IN2 , IN43 , IN44 : in bit; 49 | --Power Pins 50 | VCC :linkage bit_vector(1 to 4); 51 | --Ground Pins 52 | GND :linkage bit_vector(1 to 4) 53 | ); 54 | 55 | use STD_1149_1_1994.all; 56 | attribute COMPONENT_CONFORMANCE of F1502ASV_J44 : 57 | entity is "STD_1149_1_1993"; 58 | 59 | attribute PIN_MAP of F1502ASV_J44 : entity is PHYSICAL_PIN_MAP; 60 | constant PLCC44 : PIN_MAP_STRING := 61 | --I/O pins 62 | "IO4 : 4 , IO5 : 5 , IO6 : 6 , IO8 : 8 , "& 63 | "IO9 : 9 , IO11 : 11 , IO12 : 12 , IO14 : 14 , "& 64 | "IO16 : 16 , IO17 : 17 , IO18 : 18 , IO19 : 19 , "& 65 | "IO20 : 20 , IO21 : 21 , IO24 : 24 , IO25 : 25 , "& 66 | "IO26 : 26 , IO27 : 27 , IO28 : 28 , IO29 : 29 , "& 67 | "IO31 : 31 , IO33 : 33 , IO34 : 34 , IO36 : 36 , "& 68 | "IO37 : 37 , IO39 : 39 , IO40 : 40 , IO41 : 41 , "& 69 | --Dedicated Input Pins 70 | "IN1 : 1 , IN2 : 2 , IN43 : 43 , IN44 : 44 , "& 71 | --JTAG Port Pins 72 | "TCK : 32 , TMS : 13 , TDI : 7 , TDO : 38 , "& 73 | --Power Pins 74 | "VCC :(3,15,23,35),"& 75 | --Ground Pins 76 | "GND :(10,22,30,42)"; 77 | 78 | attribute TAP_SCAN_IN of TDI :signal is true; 79 | attribute TAP_SCAN_MODE of TMS :signal is true; 80 | attribute TAP_SCAN_OUT of TDO :signal is true; 81 | attribute TAP_SCAN_CLOCK of TCK :signal is (10.00e6,BOTH); 82 | 83 | --Instruction Definitions 84 | attribute INSTRUCTION_LENGTH of F1502ASV_J44 :entity is 10; 85 | attribute INSTRUCTION_OPCODE of F1502ASV_J44 :entity is 86 | "EXTEST (0000000000),"& 87 | "BYPASS (1111111111),"& 88 | "SAMPLE (0001010101),"& 89 | "IDCODE (0001011001)"; 90 | 91 | attribute INSTRUCTION_CAPTURE of F1502ASV_J44 :entity is "0001011001"; 92 | 93 | attribute IDCODE_REGISTER of F1502ASV_J44 :entity is 94 | "0000000101010001001X000000111111"; -- 0151203F or 0151303F 95 | 96 | attribute BOUNDARY_LENGTH of F1502ASV_J44 :entity is 96; 97 | attribute BOUNDARY_REGISTER of F1502ASV_J44 :entity is 98 | --Input, GOE1 99 | "0 (BC_4,IN44,input,X),"& 100 | 101 | --Input, GCLK1 102 | "1 (BC_4,IN43,input,X),"& 103 | 104 | --Input, MC17 105 | "2 (BC_4,IO41,input,X),"& 106 | 107 | --Input, MC18 108 | "3 (BC_4,IO40,input,X),"& 109 | 110 | --Input, MC19 111 | "4 (BC_4,IO39,input,X),"& 112 | 113 | --Input, MC21 114 | "5 (BC_4,IO37,input,X),"& 115 | 116 | --Input, MC22 117 | "6 (BC_4,IO36,input,X),"& 118 | 119 | --Input, MC23 120 | "7 (BC_4,IO34,input,X),"& 121 | 122 | --Input, MC24 123 | "8 (BC_4,IO33,input,X),"& 124 | 125 | --Input, MC26 126 | "9 (BC_4,IO31,input,X),"& 127 | 128 | --Input, MC27 129 | "10 (BC_4,IO29,input,X),"& 130 | 131 | --Input, MC28 132 | "11 (BC_4,IO28,input,X),"& 133 | 134 | --Input, MC29 135 | "12 (BC_4,IO27,input,X),"& 136 | 137 | --Input, MC30 138 | "13 (BC_4,IO26,input,X),"& 139 | 140 | --Input, MC31 141 | "14 (BC_4,IO25,input,X),"& 142 | 143 | --Input, MC32 144 | "15 (BC_4,IO24,input,X),"& 145 | 146 | --Input, MC16 147 | "16 (BC_4,IO21,input,X),"& 148 | 149 | --Input, MC15 150 | "17 (BC_4,IO20,input,X),"& 151 | 152 | --Input, MC14 153 | "18 (BC_4,IO19,input,X),"& 154 | 155 | --Input, MC13 156 | "19 (BC_4,IO18,input,X),"& 157 | 158 | --Input, MC12 159 | "20 (BC_4,IO17,input,X),"& 160 | 161 | --Input, MC11 162 | "21 (BC_4,IO16,input,X),"& 163 | 164 | --Input, MC10 165 | "22 (BC_4,IO14,input,X),"& 166 | 167 | --Input, MC8 168 | "23 (BC_4,IO12,input,X),"& 169 | 170 | --Input, MC7 171 | "24 (BC_4,IO11,input,X),"& 172 | 173 | --Input, MC6 174 | "25 (BC_4,IO9,input,X),"& 175 | 176 | --Input, MC5 177 | "26 (BC_4,IO8,input,X),"& 178 | 179 | --Input, MC3 180 | "27 (BC_4,IO6,input,X),"& 181 | 182 | --Input, MC2 183 | "28 (BC_4,IO5,input,X),"& 184 | 185 | --Input, MC1 186 | "29 (BC_4,IO4,input,X),"& 187 | 188 | --Input, GCLK2 189 | "30 (BC_4,IN2,input,X),"& 190 | 191 | --Input, GCLR 192 | "31 (BC_4,IN1,input,X),"& 193 | 194 | --I/O, MC17 195 | "32 (BC_1, * ,control, 0),"& 196 | "33 (BC_1, IO41,output3,1,32,0,Z),"& 197 | 198 | --I/O, MC18 199 | "34 (BC_1, * ,control, 0),"& 200 | "35 (BC_1, IO40,output3,1,34,0,Z),"& 201 | 202 | --I/O, MC19 203 | "36 (BC_1, * ,control, 0),"& 204 | "37 (BC_1, IO39,output3,1,36,0,Z),"& 205 | 206 | --Internal, MC20 207 | "38 (BC_1, * ,internal, 0),"& 208 | "39 (BC_1, * ,internal, X),"& 209 | 210 | --I/O, MC21 211 | "40 (BC_1, * ,control, 0),"& 212 | "41 (BC_1, IO37,output3,1,40,0,Z),"& 213 | 214 | --I/O, MC22 215 | "42 (BC_1, * ,control, 0),"& 216 | "43 (BC_1, IO36,output3,1,42,0,Z),"& 217 | 218 | --I/O, MC23 219 | "44 (BC_1, * ,control, 0),"& 220 | "45 (BC_1, IO34,output3,1,44,0,Z),"& 221 | 222 | --I/O, MC24 223 | "46 (BC_1, * ,control, 0),"& 224 | "47 (BC_1, IO33,output3,1,46,0,Z),"& 225 | 226 | --Internal, MC25 227 | "48 (BC_1, * ,internal, 0),"& 228 | "49 (BC_1, * ,internal, X),"& 229 | 230 | --I/O, MC26 231 | "50 (BC_1, * ,control, 0),"& 232 | "51 (BC_1, IO31,output3,1,50,0,Z),"& 233 | 234 | --I/O, MC27 235 | "52 (BC_1, * ,control, 0),"& 236 | "53 (BC_1, IO29,output3,1,52,0,Z),"& 237 | 238 | --I/O, MC28 239 | "54 (BC_1, * ,control, 0),"& 240 | "55 (BC_1, IO28,output3,1,54,0,Z),"& 241 | 242 | --I/O, MC29 243 | "56 (BC_1, * ,control, 0),"& 244 | "57 (BC_1, IO27,output3,1,56,0,Z),"& 245 | 246 | --I/O, MC30 247 | "58 (BC_1, * ,control, 0),"& 248 | "59 (BC_1, IO26,output3,1,58,0,Z),"& 249 | 250 | --I/O, MC31 251 | "60 (BC_1, * ,control, 0),"& 252 | "61 (BC_1, IO25,output3,1,60,0,Z),"& 253 | 254 | --I/O, MC32 255 | "62 (BC_1, * ,control, 0),"& 256 | "63 (BC_1, IO24,output3,1,62,0,Z),"& 257 | 258 | --I/O, MC16 259 | "64 (BC_1, * ,control, 0),"& 260 | "65 (BC_1, IO21,output3,1,64,0,Z),"& 261 | 262 | --I/O, MC15 263 | "66 (BC_1, * ,control, 0),"& 264 | "67 (BC_1, IO20,output3,1,66,0,Z),"& 265 | 266 | --I/O, MC14 267 | "68 (BC_1, * ,control, 0),"& 268 | "69 (BC_1, IO19,output3,1,68,0,Z),"& 269 | 270 | --I/O, MC13 271 | "70 (BC_1, * ,control, 0),"& 272 | "71 (BC_1, IO18,output3,1,70,0,Z),"& 273 | 274 | --I/O, MC12 275 | "72 (BC_1, * ,control, 0),"& 276 | "73 (BC_1, IO17,output3,1,72,0,Z),"& 277 | 278 | --I/O, MC11 279 | "74 (BC_1, * ,control, 0),"& 280 | "75 (BC_1, IO16,output3,1,74,0,Z),"& 281 | 282 | --I/O, MC10 283 | "76 (BC_1, * ,control, 0),"& 284 | "77 (BC_1, IO14,output3,1,76,0,Z),"& 285 | 286 | --Internal, MC9 287 | "78 (BC_1, * ,internal, 0),"& 288 | "79 (BC_1, * ,internal, X),"& 289 | 290 | --I/O, MC8 291 | "80 (BC_1, * ,control, 0),"& 292 | "81 (BC_1, IO12,output3,1,80,0,Z),"& 293 | 294 | --I/O, MC7 295 | "82 (BC_1, * ,control, 0),"& 296 | "83 (BC_1, IO11,output3,1,82,0,Z),"& 297 | 298 | --I/O, MC6 299 | "84 (BC_1, * ,control, 0),"& 300 | "85 (BC_1, IO9,output3,1,84,0,Z),"& 301 | 302 | --I/O, MC5 303 | "86 (BC_1, * ,control, 0),"& 304 | "87 (BC_1, IO8,output3,1,86,0,Z),"& 305 | 306 | --Internal, MC4 307 | "88 (BC_1, * ,internal, 0),"& 308 | "89 (BC_1, * ,internal, X),"& 309 | 310 | --I/O, MC3 311 | "90 (BC_1, * ,control, 0),"& 312 | "91 (BC_1, IO6,output3,1,90,0,Z),"& 313 | 314 | --I/O, MC2 315 | "92 (BC_1, * ,control, 0),"& 316 | "93 (BC_1, IO5,output3,1,92,0,Z),"& 317 | 318 | --I/O, MC1 319 | "94 (BC_1, * ,control, 0),"& 320 | "95 (BC_1, IO4,output3,1,94,0,Z)"; 321 | 322 | end F1502ASV_J44; 323 | -------------------------------------------------------------------------------- /firmware/V1/bsdl/1502AS_A44.bsd: -------------------------------------------------------------------------------- 1 | -- File Name : 1502AS_A44.BSD 2 | -- Created By : Atmel Corporation 3 | -- Documentation : ATF15xx Family BSDL 4 | -- BSDL Revision : 2.1 5 | -- 6 | -- Note : Some lines in this BSDL file might be 7 | -- longer than 80 characters. Adjust to 8 | -- word wrap width on your text editor 9 | -- accordingly to prevent possible 10 | -- compile errors. 11 | -- 12 | -- Status : Preliminary 13 | -- Date Created : 08/01/01 14 | -- Device : ATF1502AS/ASL 15 | -- Package : 44-Lead Thin Quad Flat Pack (TQFP) 16 | -- 17 | -- ********************************************************************* 18 | -- * IMPORTANT NOTICE * 19 | -- * * 20 | -- * Copyright 2001,2002 Atmel Corporation. All Rights Reserved. * 21 | -- * * 22 | -- * Atmel assumes no responsibility or liability arising out of * 23 | -- * this application or use of any information described herein * 24 | -- * except as expressly agreed to in writing by Atmel Corporation. * 25 | -- * * 26 | -- ********************************************************************* 27 | -- 28 | -- Revision History : 29 | -- 30 | -- Rev 2.0 (07/19/01) - Initial version. 31 | -- Rev 2.1 (07/02/02) - Changed the 13th bit of the IDCODE to "X". 32 | -- This allows the acceptance of both Device IDs. 33 | -- 34 | entity F1502AS_A44 is 35 | generic (PHYSICAL_PIN_MAP : string := "TQFP44"); 36 | 37 | port ( 38 | --I/O Pins 39 | IO42 , IO43 , IO44 , IO2 , IO3 , IO5 , IO6 , 40 | IO8 , IO10 , IO11 , IO12 , IO13 , IO14 , IO15 , 41 | IO18 , IO19 , IO20 , IO21 , IO22 , IO23 , IO25 , 42 | IO27 , IO28 , IO30 , IO31 , IO33 , IO34 , IO35 43 | : inout bit; 44 | --JTAG Port Pins 45 | TCK :in bit; 46 | TDI :in bit; 47 | TDO :out bit; 48 | TMS :in bit; 49 | --Dedicated Input Pins 50 | IN37 , IN38 , IN39 , IN40 : in bit; 51 | --Power Pins 52 | VCC :linkage bit_vector(1 to 4); 53 | --Ground Pins 54 | GND :linkage bit_vector(1 to 4) 55 | ); 56 | 57 | use STD_1149_1_1994.all; 58 | attribute COMPONENT_CONFORMANCE of F1502AS_A44 : 59 | entity is "STD_1149_1_1993"; 60 | 61 | attribute PIN_MAP of F1502AS_A44 : entity is PHYSICAL_PIN_MAP; 62 | constant TQFP44 : PIN_MAP_STRING := 63 | --I/O pins 64 | "IO42 : 42 , IO43 : 43 , IO44 : 44 , IO2 : 2 , "& 65 | "IO3 : 3 , IO5 : 5 , IO6 : 6 , IO8 : 8 , "& 66 | "IO10 : 10 , IO11 : 11 , IO12 : 12 , IO13 : 13 , "& 67 | "IO14 : 14 , IO15 : 15 , IO18 : 18 , IO19 : 19 , "& 68 | "IO20 : 20 , IO21 : 21 , IO22 : 22 , IO23 : 23 , "& 69 | "IO25 : 25 , IO27 : 27 , IO28 : 28 , IO30 : 30 , "& 70 | "IO31 : 31 , IO33 : 33 , IO34 : 34 , IO35 : 35 , "& 71 | --Dedicated Input Pins 72 | "IN37 : 37 , IN38 : 38 , IN39 : 39 , IN40 : 40 , "& 73 | --JTAG ports 74 | "TCK : 26 , TMS : 7 , TDI : 1 , TDO : 32 , "& 75 | --Power Pins 76 | "VCC : (9 , 17 , 29 , 41 ), "& 77 | --Ground Pins 78 | "GND : (4 , 16 , 24 , 36 )"; 79 | 80 | attribute TAP_SCAN_IN of TDI :signal is true; 81 | attribute TAP_SCAN_MODE of TMS :signal is true; 82 | attribute TAP_SCAN_OUT of TDO :signal is true; 83 | attribute TAP_SCAN_CLOCK of TCK :signal is (10.00e6,BOTH); 84 | 85 | --Instruction Definitions 86 | attribute INSTRUCTION_LENGTH of F1502AS_A44 :entity is 10; 87 | attribute INSTRUCTION_OPCODE of F1502AS_A44 :entity is 88 | "EXTEST (0000000000),"& 89 | "BYPASS (1111111111),"& 90 | "SAMPLE (0001010101),"& 91 | "IDCODE (0001011001)"; 92 | 93 | attribute INSTRUCTION_CAPTURE of F1502AS_A44 :entity is "0001011001"; 94 | 95 | attribute IDCODE_REGISTER of F1502AS_A44 :entity is 96 | "0000000101010000001X000000111111"; -- 0150203F or 0150303F 97 | 98 | attribute BOUNDARY_LENGTH of F1502AS_A44 :entity is 96; 99 | attribute BOUNDARY_REGISTER of F1502AS_A44 :entity is 100 | --Input, GOE1 101 | "0 (BC_4,IN38,input,X),"& 102 | 103 | --Input, GCLK1 104 | "1 (BC_4,IN37,input,X),"& 105 | 106 | --Input, MC17 107 | "2 (BC_4,IO35,input,X),"& 108 | 109 | --Input, MC18 110 | "3 (BC_4,IO34,input,X),"& 111 | 112 | --Input, MC19 113 | "4 (BC_4,IO33,input,X),"& 114 | 115 | --Input, MC21 116 | "5 (BC_4,IO31,input,X),"& 117 | 118 | --Input, MC22 119 | "6 (BC_4,IO30,input,X),"& 120 | 121 | --Input, MC23 122 | "7 (BC_4,IO28,input,X),"& 123 | 124 | --Input, MC24 125 | "8 (BC_4,IO27,input,X),"& 126 | 127 | --Input, MC26 128 | "9 (BC_4,IO25,input,X),"& 129 | 130 | --Input, MC27 131 | "10 (BC_4,IO23,input,X),"& 132 | 133 | --Input, MC28 134 | "11 (BC_4,IO22,input,X),"& 135 | 136 | --Input, MC29 137 | "12 (BC_4,IO21,input,X),"& 138 | 139 | --Input, MC30 140 | "13 (BC_4,IO20,input,X),"& 141 | 142 | --Input, MC31 143 | "14 (BC_4,IO19,input,X),"& 144 | 145 | --Input, MC32 146 | "15 (BC_4,IO18,input,X),"& 147 | 148 | --Input, MC16 149 | "16 (BC_4,IO15,input,X),"& 150 | 151 | --Input, MC15 152 | "17 (BC_4,IO14,input,X),"& 153 | 154 | --Input, MC14 155 | "18 (BC_4,IO13,input,X),"& 156 | 157 | --Input, MC13 158 | "19 (BC_4,IO12,input,X),"& 159 | 160 | --Input, MC12 161 | "20 (BC_4,IO11,input,X),"& 162 | 163 | --Input, MC11 164 | "21 (BC_4,IO10,input,X),"& 165 | 166 | --Input, MC10 167 | "22 (BC_4,IO8,input,X),"& 168 | 169 | --Input, MC8 170 | "23 (BC_4,IO6,input,X),"& 171 | 172 | --Input, MC7 173 | "24 (BC_4,IO5,input,X),"& 174 | 175 | --Input, MC6 176 | "25 (BC_4,IO3,input,X),"& 177 | 178 | --Input, MC5 179 | "26 (BC_4,IO2,input,X),"& 180 | 181 | --Input, MC3 182 | "27 (BC_4,IO44,input,X),"& 183 | 184 | --Input, MC2 185 | "28 (BC_4,IO43,input,X),"& 186 | 187 | --Input, MC1 188 | "29 (BC_4,IO42,input,X),"& 189 | 190 | --Input, GCLK2 191 | "30 (BC_4,IN40,input,X),"& 192 | 193 | --Input, GCLR 194 | "31 (BC_4,IN39,input,X),"& 195 | 196 | --I/O, MC17 197 | "32 (BC_1, * ,control, 0),"& 198 | "33 (BC_1, IO35,output3,1,32,0,Z),"& 199 | 200 | --I/O, MC18 201 | "34 (BC_1, * ,control, 0),"& 202 | "35 (BC_1, IO34,output3,1,34,0,Z),"& 203 | 204 | --I/O, MC19 205 | "36 (BC_1, * ,control, 0),"& 206 | "37 (BC_1, IO33,output3,1,36,0,Z),"& 207 | 208 | --Internal, MC20 209 | "38 (BC_1, * ,internal, 0),"& 210 | "39 (BC_1, * ,internal, X),"& 211 | 212 | --I/O, MC21 213 | "40 (BC_1, * ,control, 0),"& 214 | "41 (BC_1, IO31,output3,1,40,0,Z),"& 215 | 216 | --I/O, MC22 217 | "42 (BC_1, * ,control, 0),"& 218 | "43 (BC_1, IO30,output3,1,42,0,Z),"& 219 | 220 | --I/O, MC23 221 | "44 (BC_1, * ,control, 0),"& 222 | "45 (BC_1, IO28,output3,1,44,0,Z),"& 223 | 224 | --I/O, MC24 225 | "46 (BC_1, * ,control, 0),"& 226 | "47 (BC_1, IO27,output3,1,46,0,Z),"& 227 | 228 | --Internal, MC25 229 | "48 (BC_1, * ,internal, 0),"& 230 | "49 (BC_1, * ,internal, X),"& 231 | 232 | --I/O, MC26 233 | "50 (BC_1, * ,control, 0),"& 234 | "51 (BC_1, IO25,output3,1,50,0,Z),"& 235 | 236 | --I/O, MC27 237 | "52 (BC_1, * ,control, 0),"& 238 | "53 (BC_1, IO23,output3,1,52,0,Z),"& 239 | 240 | --I/O, MC28 241 | "54 (BC_1, * ,control, 0),"& 242 | "55 (BC_1, IO22,output3,1,54,0,Z),"& 243 | 244 | --I/O, MC29 245 | "56 (BC_1, * ,control, 0),"& 246 | "57 (BC_1, IO21,output3,1,56,0,Z),"& 247 | 248 | --I/O, MC30 249 | "58 (BC_1, * ,control, 0),"& 250 | "59 (BC_1, IO20,output3,1,58,0,Z),"& 251 | 252 | --I/O, MC31 253 | "60 (BC_1, * ,control, 0),"& 254 | "61 (BC_1, IO19,output3,1,60,0,Z),"& 255 | 256 | --I/O, MC32 257 | "62 (BC_1, * ,control, 0),"& 258 | "63 (BC_1, IO18,output3,1,62,0,Z),"& 259 | 260 | --I/O, MC16 261 | "64 (BC_1, * ,control, 0),"& 262 | "65 (BC_1, IO15,output3,1,64,0,Z),"& 263 | 264 | --I/O, MC15 265 | "66 (BC_1, * ,control, 0),"& 266 | "67 (BC_1, IO14,output3,1,66,0,Z),"& 267 | 268 | --I/O, MC14 269 | "68 (BC_1, * ,control, 0),"& 270 | "69 (BC_1, IO13,output3,1,68,0,Z),"& 271 | 272 | --I/O, MC13 273 | "70 (BC_1, * ,control, 0),"& 274 | "71 (BC_1, IO12,output3,1,70,0,Z),"& 275 | 276 | --I/O, MC12 277 | "72 (BC_1, * ,control, 0),"& 278 | "73 (BC_1, IO11,output3,1,72,0,Z),"& 279 | 280 | --I/O, MC11 281 | "74 (BC_1, * ,control, 0),"& 282 | "75 (BC_1, IO10,output3,1,74,0,Z),"& 283 | 284 | --I/O, MC10 285 | "76 (BC_1, * ,control, 0),"& 286 | "77 (BC_1, IO8,output3,1,76,0,Z),"& 287 | 288 | --Internal, MC9 289 | "78 (BC_1, * ,internal, 0),"& 290 | "79 (BC_1, * ,internal, X),"& 291 | 292 | --I/O, MC8 293 | "80 (BC_1, * ,control, 0),"& 294 | "81 (BC_1, IO6,output3,1,80,0,Z),"& 295 | 296 | --I/O, MC7 297 | "82 (BC_1, * ,control, 0),"& 298 | "83 (BC_1, IO5,output3,1,82,0,Z),"& 299 | 300 | --I/O, MC6 301 | "84 (BC_1, * ,control, 0),"& 302 | "85 (BC_1, IO3,output3,1,84,0,Z),"& 303 | 304 | --I/O, MC5 305 | "86 (BC_1, * ,control, 0),"& 306 | "87 (BC_1, IO2,output3,1,86,0,Z),"& 307 | 308 | --Internal, MC4 309 | "88 (BC_1, * ,internal, 0),"& 310 | "89 (BC_1, * ,internal, X),"& 311 | 312 | --I/O, MC3 313 | "90 (BC_1, * ,control, 0),"& 314 | "91 (BC_1, IO44,output3,1,90,0,Z),"& 315 | 316 | --I/O, MC2 317 | "92 (BC_1, * ,control, 0),"& 318 | "93 (BC_1, IO43,output3,1,92,0,Z),"& 319 | 320 | --I/O, MC1 321 | "94 (BC_1, * ,control, 0),"& 322 | "95 (BC_1, IO42,output3,1,94,0,Z)"; 323 | 324 | end F1502AS_A44; 325 | -------------------------------------------------------------------------------- /firmware/V1/bsdl/1502AS_J44.bsd: -------------------------------------------------------------------------------- 1 | -- File Name : 1502AS_J44.BSD 2 | -- Created by : Atmel Corporation 3 | -- Documentation : ATF15xx Family BSDL 4 | -- BSDL Revision : 2.1 5 | -- 6 | -- Note : Some lines in this BSDL file might be 7 | -- longer than 80 characters. Adjust to 8 | -- word wrap width on your text editor 9 | -- accordingly to prevent possible 10 | -- compile errors. 11 | -- 12 | -- BSDL Status : Preliminary 13 | -- Date created : 08/01/01 14 | -- Device : ATF1502AS/ASL 15 | -- Package : 44-Lead Plastic J-Leaded Chip Carrier (PLCC) 16 | -- 17 | -- ********************************************************************* 18 | -- * IMPORTANT NOTICE * 19 | -- * * 20 | -- * Copyright 2001,2002 Atmel Corporation. All Rights Reserved. * 21 | -- * * 22 | -- * Atmel assumes no responsibility or liability arising out of * 23 | -- * this application or use of any information described herein * 24 | -- * except as expressly agreed to in writing by Atmel Corporation. * 25 | -- * * 26 | -- ********************************************************************* 27 | -- 28 | -- Revision History : 29 | -- 30 | -- Rev 2.0 (07/19/01) - Initial version. 31 | -- Rev 2.1 (07/02/02) - Changed the 13th bit of the IDCODE to "X". 32 | -- This allows the acceptance of both Device IDs. 33 | -- 34 | entity F1502AS_J44 is 35 | generic (PHYSICAL_PIN_MAP : string := "PLCC44"); 36 | 37 | port ( 38 | --I/O Pins 39 | IO4 , IO5 , IO6 , IO8 , IO9 , IO11 , IO12 , 40 | IO14 , IO16 , IO17 , IO18 , IO19 , IO20 , IO21 , 41 | IO24 , IO25 , IO26 , IO27 , IO28 , IO29 , IO31 , 42 | IO33 , IO34 , IO36 , IO37 , IO39 , IO40 , IO41 43 | : inout bit; 44 | --JTAG Port Pins 45 | TCK :in bit; 46 | TDI :in bit; 47 | TDO :out bit; 48 | TMS :in bit; 49 | --Dedicated Input Pins 50 | IN1 , IN2 , IN43 , IN44 : in bit; 51 | --Power Pins 52 | VCC :linkage bit_vector(1 to 4); 53 | --Ground Pins 54 | GND :linkage bit_vector(1 to 4) 55 | ); 56 | 57 | use STD_1149_1_1994.all; 58 | attribute COMPONENT_CONFORMANCE of F1502AS_J44 : 59 | entity is "STD_1149_1_1993"; 60 | 61 | attribute PIN_MAP of F1502AS_J44 : entity is PHYSICAL_PIN_MAP; 62 | constant PLCC44 : PIN_MAP_STRING := 63 | --I/O pins 64 | "IO4 : 4 , IO5 : 5 , IO6 : 6 , IO8 : 8 , "& 65 | "IO9 : 9 , IO11 : 11 , IO12 : 12 , IO14 : 14 , "& 66 | "IO16 : 16 , IO17 : 17 , IO18 : 18 , IO19 : 19 , "& 67 | "IO20 : 20 , IO21 : 21 , IO24 : 24 , IO25 : 25 , "& 68 | "IO26 : 26 , IO27 : 27 , IO28 : 28 , IO29 : 29 , "& 69 | "IO31 : 31 , IO33 : 33 , IO34 : 34 , IO36 : 36 , "& 70 | "IO37 : 37 , IO39 : 39 , IO40 : 40 , IO41 : 41 , "& 71 | --Dedicated Input Pins 72 | "IN1 : 1 , IN2 : 2 , IN43 : 43 , IN44 : 44 , "& 73 | --JTAG Port Pins 74 | "TCK : 32 , TMS : 13 , TDI : 7 , TDO : 38 , "& 75 | --Power Pins 76 | "VCC :(3,15,23,35),"& 77 | --Ground Pins 78 | "GND :(10,22,30,42)"; 79 | 80 | attribute TAP_SCAN_IN of TDI :signal is true; 81 | attribute TAP_SCAN_MODE of TMS :signal is true; 82 | attribute TAP_SCAN_OUT of TDO :signal is true; 83 | attribute TAP_SCAN_CLOCK of TCK :signal is (10.00e6,BOTH); 84 | 85 | --Instruction Definitions 86 | attribute INSTRUCTION_LENGTH of F1502AS_J44 :entity is 10; 87 | attribute INSTRUCTION_OPCODE of F1502AS_J44 :entity is 88 | "EXTEST (0000000000),"& 89 | "BYPASS (1111111111),"& 90 | "SAMPLE (0001010101),"& 91 | "IDCODE (0001011001)"; 92 | 93 | attribute INSTRUCTION_CAPTURE of F1502AS_J44 :entity is "0001011001"; 94 | 95 | attribute IDCODE_REGISTER of F1502AS_J44 :entity is 96 | "0000000101010000001X000000111111"; -- 0150203F or 0150303F 97 | 98 | attribute BOUNDARY_LENGTH of F1502AS_J44 :entity is 96; 99 | attribute BOUNDARY_REGISTER of F1502AS_J44 :entity is 100 | --Input, GOE1 101 | "0 (BC_4,IN44,input,X),"& 102 | 103 | --Input, GCLK1 104 | "1 (BC_4,IN43,input,X),"& 105 | 106 | --Input, MC17 107 | "2 (BC_4,IO41,input,X),"& 108 | 109 | --Input, MC18 110 | "3 (BC_4,IO40,input,X),"& 111 | 112 | --Input, MC19 113 | "4 (BC_4,IO39,input,X),"& 114 | 115 | --Input, MC21 116 | "5 (BC_4,IO37,input,X),"& 117 | 118 | --Input, MC22 119 | "6 (BC_4,IO36,input,X),"& 120 | 121 | --Input, MC23 122 | "7 (BC_4,IO34,input,X),"& 123 | 124 | --Input, MC24 125 | "8 (BC_4,IO33,input,X),"& 126 | 127 | --Input, MC26 128 | "9 (BC_4,IO31,input,X),"& 129 | 130 | --Input, MC27 131 | "10 (BC_4,IO29,input,X),"& 132 | 133 | --Input, MC28 134 | "11 (BC_4,IO28,input,X),"& 135 | 136 | --Input, MC29 137 | "12 (BC_4,IO27,input,X),"& 138 | 139 | --Input, MC30 140 | "13 (BC_4,IO26,input,X),"& 141 | 142 | --Input, MC31 143 | "14 (BC_4,IO25,input,X),"& 144 | 145 | --Input, MC32 146 | "15 (BC_4,IO24,input,X),"& 147 | 148 | --Input, MC16 149 | "16 (BC_4,IO21,input,X),"& 150 | 151 | --Input, MC15 152 | "17 (BC_4,IO20,input,X),"& 153 | 154 | --Input, MC14 155 | "18 (BC_4,IO19,input,X),"& 156 | 157 | --Input, MC13 158 | "19 (BC_4,IO18,input,X),"& 159 | 160 | --Input, MC12 161 | "20 (BC_4,IO17,input,X),"& 162 | 163 | --Input, MC11 164 | "21 (BC_4,IO16,input,X),"& 165 | 166 | --Input, MC10 167 | "22 (BC_4,IO14,input,X),"& 168 | 169 | --Input, MC8 170 | "23 (BC_4,IO12,input,X),"& 171 | 172 | --Input, MC7 173 | "24 (BC_4,IO11,input,X),"& 174 | 175 | --Input, MC6 176 | "25 (BC_4,IO9,input,X),"& 177 | 178 | --Input, MC5 179 | "26 (BC_4,IO8,input,X),"& 180 | 181 | --Input, MC3 182 | "27 (BC_4,IO6,input,X),"& 183 | 184 | --Input, MC2 185 | "28 (BC_4,IO5,input,X),"& 186 | 187 | --Input, MC1 188 | "29 (BC_4,IO4,input,X),"& 189 | 190 | --Input, GCLK2 191 | "30 (BC_4,IN2,input,X),"& 192 | 193 | --Input, GCLR 194 | "31 (BC_4,IN1,input,X),"& 195 | 196 | --I/O, MC17 197 | "32 (BC_1, * ,control, 0),"& 198 | "33 (BC_1, IO41,output3,1,32,0,Z),"& 199 | 200 | --I/O, MC18 201 | "34 (BC_1, * ,control, 0),"& 202 | "35 (BC_1, IO40,output3,1,34,0,Z),"& 203 | 204 | --I/O, MC19 205 | "36 (BC_1, * ,control, 0),"& 206 | "37 (BC_1, IO39,output3,1,36,0,Z),"& 207 | 208 | --Internal, MC20 209 | "38 (BC_1, * ,internal, 0),"& 210 | "39 (BC_1, * ,internal, X),"& 211 | 212 | --I/O, MC21 213 | "40 (BC_1, * ,control, 0),"& 214 | "41 (BC_1, IO37,output3,1,40,0,Z),"& 215 | 216 | --I/O, MC22 217 | "42 (BC_1, * ,control, 0),"& 218 | "43 (BC_1, IO36,output3,1,42,0,Z),"& 219 | 220 | --I/O, MC23 221 | "44 (BC_1, * ,control, 0),"& 222 | "45 (BC_1, IO34,output3,1,44,0,Z),"& 223 | 224 | --I/O, MC24 225 | "46 (BC_1, * ,control, 0),"& 226 | "47 (BC_1, IO33,output3,1,46,0,Z),"& 227 | 228 | --Internal, MC25 229 | "48 (BC_1, * ,internal, 0),"& 230 | "49 (BC_1, * ,internal, X),"& 231 | 232 | --I/O, MC26 233 | "50 (BC_1, * ,control, 0),"& 234 | "51 (BC_1, IO31,output3,1,50,0,Z),"& 235 | 236 | --I/O, MC27 237 | "52 (BC_1, * ,control, 0),"& 238 | "53 (BC_1, IO29,output3,1,52,0,Z),"& 239 | 240 | --I/O, MC28 241 | "54 (BC_1, * ,control, 0),"& 242 | "55 (BC_1, IO28,output3,1,54,0,Z),"& 243 | 244 | --I/O, MC29 245 | "56 (BC_1, * ,control, 0),"& 246 | "57 (BC_1, IO27,output3,1,56,0,Z),"& 247 | 248 | --I/O, MC30 249 | "58 (BC_1, * ,control, 0),"& 250 | "59 (BC_1, IO26,output3,1,58,0,Z),"& 251 | 252 | --I/O, MC31 253 | "60 (BC_1, * ,control, 0),"& 254 | "61 (BC_1, IO25,output3,1,60,0,Z),"& 255 | 256 | --I/O, MC32 257 | "62 (BC_1, * ,control, 0),"& 258 | "63 (BC_1, IO24,output3,1,62,0,Z),"& 259 | 260 | --I/O, MC16 261 | "64 (BC_1, * ,control, 0),"& 262 | "65 (BC_1, IO21,output3,1,64,0,Z),"& 263 | 264 | --I/O, MC15 265 | "66 (BC_1, * ,control, 0),"& 266 | "67 (BC_1, IO20,output3,1,66,0,Z),"& 267 | 268 | --I/O, MC14 269 | "68 (BC_1, * ,control, 0),"& 270 | "69 (BC_1, IO19,output3,1,68,0,Z),"& 271 | 272 | --I/O, MC13 273 | "70 (BC_1, * ,control, 0),"& 274 | "71 (BC_1, IO18,output3,1,70,0,Z),"& 275 | 276 | --I/O, MC12 277 | "72 (BC_1, * ,control, 0),"& 278 | "73 (BC_1, IO17,output3,1,72,0,Z),"& 279 | 280 | --I/O, MC11 281 | "74 (BC_1, * ,control, 0),"& 282 | "75 (BC_1, IO16,output3,1,74,0,Z),"& 283 | 284 | --I/O, MC10 285 | "76 (BC_1, * ,control, 0),"& 286 | "77 (BC_1, IO14,output3,1,76,0,Z),"& 287 | 288 | --Internal, MC9 289 | "78 (BC_1, * ,internal, 0),"& 290 | "79 (BC_1, * ,internal, X),"& 291 | 292 | --I/O, MC8 293 | "80 (BC_1, * ,control, 0),"& 294 | "81 (BC_1, IO12,output3,1,80,0,Z),"& 295 | 296 | --I/O, MC7 297 | "82 (BC_1, * ,control, 0),"& 298 | "83 (BC_1, IO11,output3,1,82,0,Z),"& 299 | 300 | --I/O, MC6 301 | "84 (BC_1, * ,control, 0),"& 302 | "85 (BC_1, IO9,output3,1,84,0,Z),"& 303 | 304 | --I/O, MC5 305 | "86 (BC_1, * ,control, 0),"& 306 | "87 (BC_1, IO8,output3,1,86,0,Z),"& 307 | 308 | --Internal, MC4 309 | "88 (BC_1, * ,internal, 0),"& 310 | "89 (BC_1, * ,internal, X),"& 311 | 312 | --I/O, MC3 313 | "90 (BC_1, * ,control, 0),"& 314 | "91 (BC_1, IO6,output3,1,90,0,Z),"& 315 | 316 | --I/O, MC2 317 | "92 (BC_1, * ,control, 0),"& 318 | "93 (BC_1, IO5,output3,1,92,0,Z),"& 319 | 320 | --I/O, MC1 321 | "94 (BC_1, * ,control, 0),"& 322 | "95 (BC_1, IO4,output3,1,94,0,Z)"; 323 | 324 | end F1502AS_J44; 325 | -------------------------------------------------------------------------------- /firmware/V1/bsdl/readme.txt: -------------------------------------------------------------------------------- 1 | ****************************************************************************** 2 | * BSDL files for ATF1502AS/ASL/ASV in all package types * 3 | ****************************************************************************** 4 | 5 | 1502AS_A44.bsd - BSDL file for ATF1502AS/ASL in 44-pin TQFP package type. 6 | 7 | 1502AS_J44.bsd - BSDL file for ATF1502AS/ASL in 44-pin PLCC package type. 8 | 9 | 1502ASV_A44.bsd - BSDL file for ATF1502ASV in 44-pin TQFP package type. 10 | 11 | 1502ASV_J44.bsd - BSDL file for ATF1502ASV in 44-pin PLCC package type. 12 | 13 | -------------------------------------------------------------------------------- /firmware/V1/img/crappy_usbblaster.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/firmware/V1/img/crappy_usbblaster.jpg -------------------------------------------------------------------------------- /firmware/V1/img/good_usbblaster.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/firmware/V1/img/good_usbblaster.jpg -------------------------------------------------------------------------------- /firmware/V1/source/FIRMWARE.txt: -------------------------------------------------------------------------------- 1 | 2 | I. Programming firmware into CPLD 3 | 4 | As BUILD.txt states, you can easily use either Altera EPM7032SLC44-10 or 5 | Atmel ATF1502AS10JC44 CPLD, both in PLCC-44 package. They are functionally 6 | equivalent and totally pin-compatible, so they are interchangeable. Easy 7 | way to program either of them is to use ByteBlasterMV hardware connected to 8 | LPT port of PC. Its schematics can be found on www.altera.com or just by 9 | googling its name. 10 | 11 | For programming Altera device, use Quartus web edition software available 12 | for free at www.altera.com. Use file "epm7032slc44-10.pof" file in 13 | "firmware" drawer as programming file. 14 | 15 | Atmel device should be programmed with "atf1502as10jc44.jed" file using 16 | AtmelISP software found on www.atmel.com. The same ByteBlasterMV hardware 17 | is still used. 18 | 19 | 20 | II. Using other CPLDs 21 | 22 | If you are experienced enough with CPLD designing, you can surely use other 23 | CPLDs, for example EPM7064S or ATF1504 devices in same package. In either 24 | case you have to recompile from scratch verilog source file provided in 25 | "source" drawer. When creating firmware for ATF devices, compile the design 26 | using Quartus package for equivalent EPM70xxS device as usual, then use 27 | POF2JED utility found on www.atmel.com to get #?.jed file. 28 | 29 | 30 | III. Rebuilding and modifying firmware 31 | 32 | You need doing this to use some other CPLD or to modify firmware, for 33 | example to have 4Mb with PCMCIA instead of 8Mb without, or whatever you 34 | want. 35 | 36 | Of course, you must be experienced enough in designing with CPLDs or FPGAs. 37 | Though it is rather simple to start designing CPLDs, I believe this is not 38 | what you should start with when gathering initial experience with CPLDs. 39 | There is possibility to damage physically your Amiga with the incorrectly 40 | programmed CPLD. 41 | 42 | To build firmware file from scratch, use Quartus Web Edition software from 43 | www.altera.com. Besides obvious things like setting up project and 44 | selecting chip, you must: 45 | 46 | 1. define all pins according to schematics diagram, 47 | 2. in assignment editor, set all output pins as "slow slew rate". 48 | Otherwise you can end up with instabilities in working board. 49 | 50 | There are some comments in source verilog file so that you can easily 51 | modify it to support and autoconfigure 4 Mb of memory instead of 8. 52 | -------------------------------------------------------------------------------- /firmware/V1/source/a600_8mb.v: -------------------------------------------------------------------------------- 1 | module a600_8mb( cpu_a21,cpu_a22,cpu_a23, 2 | cpu_a1, cpu_a2, cpu_a3, cpu_a4, cpu_a5, cpu_a6, 3 | cpu_a16,cpu_a17,cpu_a18,cpu_a19,cpu_a20, 4 | cpu_d12,cpu_d13,cpu_d14,cpu_d15, 5 | cpu_nas,cpu_nlds,cpu_nuds,cpu_clk, 6 | cpu_nreset, 7 | dram_nras0,dram_nras1,dram_nras2,dram_nras3, dram_nlcas,dram_nucas, 8 | dram_ma0,dram_ma1, 9 | mux_switch 10 | ); 11 | 12 | input cpu_a21,cpu_a22,cpu_a23; // cpu high addresses 13 | 14 | input cpu_a1, cpu_a2, cpu_a3, cpu_a4, cpu_a5, cpu_a6; // cpu low addresses for autoconfig 15 | input cpu_a16,cpu_a17,cpu_a18,cpu_a19,cpu_a20; // cpu high addresses for autoconfig 16 | 17 | inout cpu_d12,cpu_d13,cpu_d14,cpu_d15; // autoconfig data in-out 18 | reg cpu_d12,cpu_d13,cpu_d14,cpu_d15; 19 | 20 | input cpu_nas,cpu_nlds,cpu_nuds; // cpu bus control signals 21 | input cpu_clk; // cpu clock 22 | 23 | input cpu_nreset; // cpu system reset 24 | 25 | output dram_nras0,dram_nras1,dram_nras2,dram_nras3; 26 | reg dram_nras0,dram_nras1,dram_nras2,dram_nras3; // /RAS dram signals 27 | 28 | output dram_nlcas,dram_nucas; 29 | reg dram_nlcas,dram_nucas; // /CAS dram signals 30 | 31 | output dram_ma0,dram_ma1; 32 | reg dram_ma0,dram_ma1; // DRAM MAx addresses 33 | 34 | output mux_switch; 35 | reg mux_switch; // external MUX switching 36 | 37 | 38 | reg [3:0] datout; // data out 39 | 40 | wire [7:0] high_addr; 41 | wire [5:0] low_addr; 42 | 43 | reg which_ras[0:3]; // which /RAS signal to activate (based on a21-a23) 44 | reg mem_selected; 45 | 46 | reg rfsh_ras,rfsh_cas; // refresh /RAS, /CAS generators 47 | 48 | reg access_ras,access_cas; // normal access /RAS, /CAS generators 49 | 50 | reg read_cycle; // if current cycle is read cycle 51 | reg write_cycle; 52 | reg autoconf_on; 53 | reg cpu_nas_z; // cpu /AS with 1 clock latency 54 | 55 | reg [1:0] rfsh_select; // for cycling refresh over every of four chips 56 | 57 | 58 | assign high_addr = {cpu_a23,cpu_a22,cpu_a21,cpu_a20,cpu_a19,cpu_a18,cpu_a17,cpu_a16}; 59 | assign low_addr = {cpu_a6,cpu_a5,cpu_a4,cpu_a3,cpu_a2,cpu_a1}; 60 | 61 | // chip selector decoder 62 | always @* 63 | begin 64 | casex( high_addr ) 65 | 8'b001xxxxx: // $200000-$3fffff 66 | begin 67 | {which_ras[0],which_ras[1],which_ras[2],which_ras[3]} <= 4'b1000; // /RAS0 68 | mem_selected <= 1'b1; 69 | end 70 | 71 | 8'b010xxxxx: // $400000-$5fffff 72 | begin 73 | {which_ras[0],which_ras[1],which_ras[2],which_ras[3]} <= 4'b0100; // /RAS1 74 | mem_selected <= 1'b1; 75 | end 76 | 77 | // remove this two CASE sections below for 4Mb only decoding (do not remove "default:"!) 78 | 8'b011xxxxx: // $600000-$7fffff 79 | begin 80 | {which_ras[0],which_ras[1],which_ras[2],which_ras[3]} <= 4'b0010; // /RAS2 81 | mem_selected <= 1'b1; 82 | end 83 | 84 | 8'b100xxxxx: // $800000-$9fffff 85 | begin 86 | {which_ras[0],which_ras[1],which_ras[2],which_ras[3]} <= 4'b0001; // /RAS3 87 | mem_selected <= 1'b1; 88 | end 89 | 90 | default: 91 | begin 92 | {which_ras[0],which_ras[1],which_ras[2],which_ras[3]} <= 4'b0000; // nothing 93 | mem_selected <= 1'b0; 94 | end 95 | 96 | endcase 97 | end 98 | 99 | 100 | // normal cycle generator 101 | always @(posedge cpu_clk,posedge cpu_nas) 102 | begin 103 | if( cpu_nas==1 ) 104 | begin // /AS=1 105 | access_ras <= 0; 106 | access_cas <= 0; 107 | end 108 | else 109 | begin // /AS=0, positive clock 110 | access_ras <= 1; 111 | access_cas <= access_ras; // one clock later 112 | end 113 | end 114 | 115 | // MUX switcher generator 116 | always @(negedge cpu_clk,negedge access_ras) 117 | begin 118 | if( access_ras==0 ) 119 | begin // reset on no access_ras 120 | mux_switch <= 0; 121 | end 122 | else 123 | begin // set to 1 on negedge after beginning of access_ras 124 | mux_switch <= 1; 125 | end 126 | end 127 | 128 | 129 | 130 | 131 | // refresh cycle generator 132 | always @(negedge cpu_clk) 133 | begin 134 | if( cpu_nas==1 ) // /AS negated 135 | begin 136 | rfsh_cas <= ~rfsh_cas; 137 | end 138 | else // /AS asserted 139 | begin 140 | rfsh_cas <= 0; 141 | end 142 | 143 | if( (rfsh_cas == 1'b0) && (cpu_nas==1) ) 144 | begin 145 | rfsh_select <= rfsh_select + 2'b01; 146 | end 147 | end 148 | 149 | always @* 150 | begin 151 | rfsh_ras <= rfsh_cas & cpu_clk; 152 | end 153 | 154 | 155 | 156 | // output signals generator 157 | always @* 158 | begin 159 | dram_nras0 <= ~( ( which_ras[0] & access_ras ) | ((rfsh_select==2'b00)?rfsh_ras:1'b0) ); 160 | dram_nras1 <= ~( ( which_ras[1] & access_ras ) | ((rfsh_select==2'b01)?rfsh_ras:1'b0) ); 161 | dram_nras2 <= ~( ( which_ras[2] & access_ras ) | ((rfsh_select==2'b10)?rfsh_ras:1'b0) ); 162 | dram_nras3 <= ~( ( which_ras[3] & access_ras ) | ((rfsh_select==2'b11)?rfsh_ras:1'b0) ); 163 | 164 | dram_nlcas <= ~( ( ~cpu_nlds & access_cas & mem_selected ) | rfsh_cas ); 165 | dram_nucas <= ~( ( ~cpu_nuds & access_cas & mem_selected ) | rfsh_cas ); 166 | end 167 | 168 | 169 | 170 | 171 | 172 | // DRAM MAx multiplexor 173 | always @* 174 | begin 175 | if( mux_switch==0 ) 176 | { dram_ma0,dram_ma1 } <= { cpu_a1,cpu_a2 }; 177 | else // mux_switch==1 178 | { dram_ma0,dram_ma1 } <= { cpu_a20,cpu_a19 }; 179 | end 180 | 181 | 182 | // make clocked cpu_nas_z 183 | always @(posedge cpu_clk) 184 | begin 185 | cpu_nas_z <= cpu_nas; 186 | end 187 | 188 | // detect if current cycle is read or write cycle 189 | always @(posedge cpu_clk, posedge cpu_nas) 190 | begin 191 | if( cpu_nas==1 ) // async reset on end of /AS strobe 192 | begin 193 | read_cycle <= 0; // end of cycles 194 | write_cycle <= 0; 195 | end 196 | else // sync beginning of cycle 197 | begin 198 | if( cpu_nas==0 && cpu_nas_z==1 ) // beginning of /AS strobe 199 | begin 200 | if( (cpu_nlds&cpu_nuds)==0 ) 201 | read_cycle <= 1; 202 | else 203 | write_cycle <= 1; 204 | end 205 | end 206 | end 207 | 208 | // autoconfig data forming 209 | always @* 210 | begin 211 | case( low_addr ) 212 | 6'b000000: // $00 213 | datout <= 4'b1110; 214 | 6'b000001: // $02 215 | datout <= 4'b0000; // 0111 for 4mb, 0000 for 8mb 216 | 217 | 6'b000010: // $04 218 | datout <= 4'hE; 219 | 6'b000011: // $06 220 | datout <= 4'hE; 221 | 222 | 6'b000100: // $08 223 | datout <= 4'h3; 224 | 6'b000101: // $0a 225 | datout <= 4'hF; 226 | 227 | 6'b001000: // $10 228 | datout <= 4'hE; 229 | 6'b001001: // $12 230 | datout <= 4'hE; 231 | 232 | 6'b001010: // $14 233 | datout <= 4'hE; 234 | 6'b001011: // $16 235 | datout <= 4'hE; 236 | 237 | 6'b100000: // $40 238 | datout <= 4'b0000; 239 | 6'b100001: // $42 240 | datout <= 4'b0000; 241 | 242 | default: 243 | datout <= 4'b1111; 244 | endcase 245 | end 246 | 247 | // out autoconfig data 248 | always @* 249 | begin 250 | if( read_cycle==1 && high_addr==8'hE8 && autoconf_on==1 ) 251 | {cpu_d15,cpu_d14,cpu_d13,cpu_d12} <= datout; 252 | else 253 | {cpu_d15,cpu_d14,cpu_d13,cpu_d12} <= 4'bZZZZ; 254 | end 255 | 256 | // autoconfig cycle on/off 257 | always @(posedge write_cycle,negedge cpu_nreset) 258 | begin 259 | if( cpu_nreset==0 ) // reset - begin autoconf 260 | autoconf_on <= 1; 261 | else 262 | begin 263 | if( high_addr==8'hE8 && low_addr[5:2]==4'b1001 ) // $E80048..$E8004E 264 | autoconf_on <= 0; 265 | end 266 | end 267 | 268 | 269 | 270 | endmodule 271 | -------------------------------------------------------------------------------- /firmware/V2/Binaries/SukkoGottaGoFast_EPM7064S.pof: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/firmware/V2/Binaries/SukkoGottaGoFast_EPM7064S.pof -------------------------------------------------------------------------------- /firmware/V2/README.md: -------------------------------------------------------------------------------- 1 | # GottaGoFast firmware for SukkoPera's OpenAmiga500FastRam expansion 2 | 3 | This is a port of the GottaGoFastRAM firmware for the OpenAmiga500FastRam Expansion. 4 | It adds better Autoconfig support, making the board play nicely with other Autoconfig devices. 5 | 6 | ## Requirements 7 | 8 | * Requires Kickstart 2 or higher. 9 | * This firmware is only compatible with either the ATF1504AS or EPM7064S CPLDs, the ATF1502 specced for this board originally does not have enough resources for this firmware. 10 | 11 | ## Usage 12 | 13 | Follow the programming steps [here](../README.md) -------------------------------------------------------------------------------- /firmware/V2/Source/SukkoGottaGoFast.qsf: -------------------------------------------------------------------------------- 1 | # -------------------------------------------------------------------------- # 2 | # 3 | # Copyright (C) 1991-2013 Altera Corporation 4 | # Your use of Altera Corporation's design tools, logic functions 5 | # and other software and tools, and its AMPP partner logic 6 | # functions, and any output files from any of the foregoing 7 | # (including device programming or simulation files), and any 8 | # associated documentation or information are expressly subject 9 | # to the terms and conditions of the Altera Program License 10 | # Subscription Agreement, Altera MegaCore Function License 11 | # Agreement, or other applicable license agreement, including, 12 | # without limitation, that your use is for the sole purpose of 13 | # programming logic devices manufactured by Altera and sold by 14 | # Altera or its authorized distributors. Please refer to the 15 | # applicable agreement for further details. 16 | # 17 | # -------------------------------------------------------------------------- # 18 | # 19 | # Quartus II 64-Bit 20 | # Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition 21 | # Date created = 09:31:48 January 28, 2021 22 | # 23 | # -------------------------------------------------------------------------- # 24 | # 25 | # Notes: 26 | # 27 | # 1) The default values for assignments are stored in the file: 28 | # SukkoGottaGoFast_assignment_defaults.qdf 29 | # If this file doesn't exist, see file: 30 | # assignment_defaults.qdf 31 | # 32 | # 2) Altera recommends that you do not modify this file. This 33 | # file is updated automatically by the Quartus II software 34 | # and any changes you make may be lost or overwritten. 35 | # 36 | # -------------------------------------------------------------------------- # 37 | 38 | 39 | set_global_assignment -name FAMILY MAX7000S 40 | set_global_assignment -name DEVICE "EPM7064SLC44-10" 41 | set_global_assignment -name TOP_LEVEL_ENTITY SukkoGottaGoFast 42 | set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1" 43 | set_global_assignment -name PROJECT_CREATION_TIME_DATE "09:31:48 JANUARY 28, 2021" 44 | set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" 45 | set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files 46 | set_global_assignment -name DEVICE_FILTER_PACKAGE PLCC 47 | set_global_assignment -name DEVICE_FILTER_PIN_COUNT 44 48 | set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 10 49 | set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1" 50 | set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)" 51 | set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation 52 | set_global_assignment -name MAX7000_DEVICE_IO_STANDARD TTL 53 | set_location_assignment PIN_1 -to RESETn 54 | set_location_assignment PIN_6 -to DBUS[12] 55 | set_location_assignment PIN_8 -to DBUS[13] 56 | set_location_assignment PIN_9 -to DBUS[14] 57 | set_location_assignment PIN_11 -to DBUS[15] 58 | set_location_assignment PIN_12 -to ADDR_HI[23] 59 | set_location_assignment PIN_14 -to ADDR_HI[22] 60 | set_location_assignment PIN_16 -to ADDR_HI[21] 61 | set_location_assignment PIN_17 -to ADDR_HI[20] 62 | set_location_assignment PIN_18 -to ADDR_HI[19] 63 | set_location_assignment PIN_19 -to ADDR_HI[18] 64 | set_location_assignment PIN_20 -to ADDR_HI[17] 65 | set_location_assignment PIN_21 -to ADDR_HI[16] 66 | set_location_assignment PIN_24 -to ADDR_LO[6] 67 | set_location_assignment PIN_25 -to ADDR_LO[5] 68 | set_location_assignment PIN_26 -to ADDR_LO[4] 69 | set_location_assignment PIN_27 -to ADDR_LO[3] 70 | set_location_assignment PIN_28 -to ADDR_LO[2] 71 | set_location_assignment PIN_29 -to ADDR_LO[1] 72 | set_location_assignment PIN_43 -to CLK 73 | set_location_assignment PIN_39 -to LCASn 74 | set_location_assignment PIN_34 -to RAS0n 75 | set_location_assignment PIN_36 -to RAS1n 76 | set_location_assignment PIN_37 -to RAS2n 77 | set_location_assignment PIN_40 -to RAS3n 78 | set_location_assignment PIN_31 -to mux_switch 79 | set_location_assignment PIN_41 -to UCASn 80 | set_global_assignment -name VERILOG_TEST_BENCH_FILE simulation/modelsim/SukkoGottaGoFast.vt 81 | set_global_assignment -name VERILOG_FILE SukkoGottaGoFast.v 82 | set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation 83 | set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS TEST_BENCH_MODE -section_id eda_simulation 84 | set_global_assignment -name EDA_NATIVELINK_SIMULATION_TEST_BENCH SukkoGottaGoFast_vlg_tst -section_id eda_simulation 85 | set_global_assignment -name EDA_TEST_BENCH_NAME SukkoGottaGoFast_vlg_tst -section_id eda_simulation 86 | set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id SukkoGottaGoFast_vlg_tst 87 | set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME SukkoGottaGoFast_vlg_tst -section_id SukkoGottaGoFast_vlg_tst 88 | set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF 89 | set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING OFF 90 | set_global_assignment -name FITTER_EFFORT "STANDARD FIT" 91 | set_global_assignment -name EDA_TEST_BENCH_FILE simulation/modelsim/SukkoGottaGoFast.vt -section_id SukkoGottaGoFast_vlg_tst 92 | set_location_assignment PIN_32 -to TCK 93 | set_location_assignment PIN_7 -to TDI 94 | set_location_assignment PIN_38 -to TDO 95 | set_location_assignment PIN_13 -to TMS 96 | set_location_assignment PIN_2 -to ASn 97 | set_location_assignment PIN_44 -to UDSn 98 | set_location_assignment PIN_33 -to LDSn 99 | set_location_assignment PIN_5 -to MA1 100 | set_location_assignment PIN_4 -to MA0 -------------------------------------------------------------------------------- /firmware/V2/Source/SukkoGottaGoFast.v: -------------------------------------------------------------------------------- 1 | /* 2 | GottaGoFast FW for SukkoPera's OpenAmiga500FastRamExpansion 3 | Copyright 2021 Matthew Harlum 4 | 5 | This program is free software: you can redistribute it and/or modify 6 | it under the terms of the GNU General Public License as published by 7 | the Free Software Foundation, either version 3 of the License, or 8 | (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | You should have received a copy of the GNU General Public License 16 | along with this program. If not, see . 17 | 18 | */ 19 | 20 | // Config defines 21 | `define autoconfig // If disabled RAM is always mapped to $200000-9FFFFF 22 | //`define cdtv // Uncomment to build CDTV compatible version 23 | //`define Size_4MB // 4MB Maximum, Only uses memory chips U7 & U8 24 | 25 | module SukkoGottaGoFast( 26 | input CLK, 27 | input RESETn, 28 | input UDSn, 29 | input LDSn, 30 | input ASn, 31 | inout [15:12] DBUS, 32 | input [23:16] ADDR_HI, 33 | input [6:1] ADDR_LO, 34 | output reg mux_switch, 35 | output RAS0n, 36 | output RAS1n, 37 | output RAS2n, 38 | output RAS3n, 39 | output UCASn, 40 | output LCASn, 41 | output reg MA0, 42 | output reg MA1 43 | ); 44 | 45 | // Memory controller 46 | 47 | reg ram_cycle; 48 | reg access_ras; 49 | reg access_ucas; 50 | reg access_lcas; 51 | reg refresh_ras; 52 | reg refresh_cas; 53 | reg [7:0] addr_match; 54 | reg AS_last; 55 | reg RWn; 56 | 57 | `ifdef autoconfig 58 | // Autoconfig 59 | localparam [15:0] mfg_id = 16'h07DB; 60 | localparam [7:0] prod_id = 8'd03; 61 | localparam [15:0] serial = 16'd420; 62 | 63 | localparam Offer_Block1 = 3'b000, 64 | Offer_Block2 = 3'b001, 65 | Offer_Block3 = 3'b010, 66 | Offer_Block4 = 3'b011, 67 | SHUTUP = 3'b100; 68 | 69 | wire autoconfig_cycle; 70 | reg shutup = 0; 71 | reg configured; 72 | reg [3:0] data_out; 73 | 74 | // Autoconfig bus snooping 75 | // 76 | // For some reason Kickstart 2 and up scan the chain multiple times 77 | // Thanks to this we can snoop on autoconfig cycles and then speak up once 78 | // every other board is done being configured. 79 | // No CFGIN connection needed! 80 | reg [3:0] mfg_bad; 81 | reg snoop_cfg; 82 | reg snoop_cfg_next; 83 | reg [3:0] board_reg00; 84 | reg [3:0] board_reg01; 85 | reg [3:0] snooped_autoconfig_state; 86 | reg autoconfig_setup; 87 | reg [3:0] dbus_latched; 88 | reg CFGOUTn; 89 | 90 | always @(posedge CLK) 91 | begin 92 | dbus_latched <= DBUS[15:12]; 93 | end 94 | 95 | always @(posedge UDSn or negedge RESETn) 96 | begin 97 | if (!RESETn) begin 98 | snoop_cfg_next <= 1'b0; 99 | snoop_cfg <= 1'b0; 100 | mfg_bad <= 'b0; 101 | snooped_autoconfig_state <= Offer_Block1; 102 | end else if (ADDR_HI[23:16] == 8'hE8 & RWn) begin 103 | case (ADDR_LO[6:1]) 104 | // Chain snooping 105 | // 106 | // If Reserved byte is not $F or manufacturer id is $FFFF then no board is answering 107 | // Once this happens we can set ourselves up to talk to the next autoconfig query 108 | 109 | 110 | // Sniff board configuration sizes so we can shrink our offering appropriately 111 | 'h00>>1: 112 | board_reg00 <= dbus_latched; 113 | 'h02>>1: 114 | board_reg01 <= dbus_latched; 115 | 116 | 'h0C>>1: 117 | if (!(dbus_latched == 4'hF)) begin // Reserved byte - Should be $FF 118 | snoop_cfg_next <= 1; 119 | end 120 | 'h10>>1: 121 | if (dbus_latched == 4'hF) begin // Manufacturer ID - Should not be $FFFF 122 | mfg_bad[3] <= 1; 123 | end 124 | 'h12>>1: 125 | if (dbus_latched == 4'hF) begin // Manufacturer ID - Should not be $FFFF 126 | mfg_bad[2] <= 1; 127 | end 128 | 'h14>>1: 129 | if (dbus_latched == 4'hF) begin // Manufacturer ID - Should not be $FFFF 130 | mfg_bad[1] <= 1; 131 | end 132 | 'h16>>1: 133 | if (dbus_latched == 4'hF) begin // Manufacturer ID - Should not be $FFFF 134 | mfg_bad[0] <= 1; 135 | end 136 | 'h3C>>1: 137 | if (snoop_cfg_next == 1) begin 138 | snoop_cfg <= 1; 139 | end else if (mfg_bad[3:0] == 4'b1111) begin 140 | snoop_cfg <= 1; 141 | end 142 | endcase 143 | end else if (ADDR_HI[23:16] == 8'hE8 & !RWn & !snoop_cfg) begin 144 | // The other board is now being given it's address 145 | // Adjust our offering appropriately 146 | if (ADDR_LO[6:1] == 'h48>>1) begin 147 | if (board_reg00[3:2] == 2'b11) begin 148 | case (board_reg01[2:0]) 149 | 3'b000: // 8MB 150 | snooped_autoconfig_state <= SHUTUP; 151 | 3'b100, 3'b101, 3'b110: // 512k/1/2MB 152 | if (snooped_autoconfig_state < SHUTUP) begin 153 | snooped_autoconfig_state <= snooped_autoconfig_state + 1; 154 | end 155 | 3'b111: // 4MB 156 | if (snooped_autoconfig_state < Offer_Block3) begin 157 | snooped_autoconfig_state <= snooped_autoconfig_state + 2; 158 | end else begin 159 | snooped_autoconfig_state <= SHUTUP; 160 | end 161 | endcase 162 | end 163 | end 164 | end 165 | end 166 | 167 | reg [2:0] autoconfig_state; 168 | 169 | assign DBUS[15:12] = (autoconfig_cycle & RWn & !ASn & !UDSn) ? data_out[3:0] : 4'bZ; 170 | 171 | assign autoconfig_cycle = (ADDR_HI[23:16] == 8'hE8) & snoop_cfg & CFGOUTn; 172 | 173 | // Register Config in/out at end of bus cycle 174 | always @(posedge ASn or negedge RESETn) 175 | begin 176 | if (!RESETn) begin 177 | CFGOUTn <= 1'b1; 178 | end else begin 179 | CFGOUTn <= !shutup; 180 | end 181 | end 182 | 183 | // Offer up to 8MB in 2MB Blocks 184 | always @(posedge CLK or negedge RESETn) 185 | begin 186 | if (!RESETn) begin 187 | data_out <= 'bZ; 188 | end else if (autoconfig_cycle & RWn) begin 189 | case (ADDR_LO[6:1]) 190 | 'h00: data_out <= 4'b1110; 191 | 'h01: data_out <= 4'b0110; 192 | 'h02: data_out <= ~prod_id[7:4]; // Product number 193 | 'h03: data_out <= ~prod_id[3:0]; // Product number 194 | 'h04: data_out <= ~4'b1000; 195 | 'h05: data_out <= ~4'b0000; 196 | 'h08: data_out <= ~mfg_id[15:12]; // Manufacturer ID 197 | 'h09: data_out <= ~mfg_id[11:8]; // Manufacturer ID 198 | 'h0A: data_out <= ~mfg_id[7:4]; // Manufacturer ID 199 | 'h0B: data_out <= ~mfg_id[3:0]; // Manufacturer ID 200 | 'h10: data_out <= ~serial[15:12]; // Serial number 201 | 'h11: data_out <= ~serial[11:8]; // Serial number 202 | 'h12: data_out <= ~serial[7:4]; // Serial number 203 | 'h13: data_out <= ~serial[3:0]; // Serial number 204 | 'h20: data_out <= 4'b0; 205 | 'h21: data_out <= 4'b0; 206 | default: data_out <= 4'hF; 207 | endcase 208 | end 209 | end 210 | 211 | always @(negedge UDSn or negedge RESETn) 212 | begin 213 | if (!RESETn) begin 214 | configured <= 1'b0; 215 | shutup <= 1'b0; 216 | addr_match <= 8'b00000000; 217 | autoconfig_state <= Offer_Block1; 218 | autoconfig_setup <= 1'b0; 219 | end else if (autoconfig_setup == 0 & snoop_cfg == 1) begin 220 | autoconfig_state <= snooped_autoconfig_state; 221 | autoconfig_setup <= 1; 222 | if (snooped_autoconfig_state == SHUTUP) begin 223 | shutup <= 1; 224 | end 225 | end else if (autoconfig_cycle & !ASn & !RWn) begin 226 | if (ADDR_LO[6:1] == 'h26) begin 227 | // Shutup register 228 | shutup <= 1; 229 | end 230 | else if (ADDR_LO[6:1] == 'h24) begin 231 | // Configure Address Register 232 | begin 233 | case(DBUS) 234 | 4'h2: addr_match <= (addr_match|8'b00000011); 235 | 4'h4: addr_match <= (addr_match|8'b00001100); 236 | 4'h6: addr_match <= (addr_match|8'b00110000); 237 | 4'h8: addr_match <= (addr_match|8'b11000000); 238 | endcase 239 | if (autoconfig_state < Offer_Block4) begin 240 | autoconfig_state <= autoconfig_state + 1; 241 | end else begin 242 | shutup <= 1; 243 | end 244 | end 245 | configured <= 1'b1; 246 | end 247 | end 248 | end 249 | `endif 250 | 251 | 252 | // Memory controller 253 | `ifndef Size_4MB 254 | assign RAS0n = !((ADDR_HI[22:21] == 2'b01 & access_ras) | (refresh_ras & refresh_cas)); // $200000-3FFFFF 255 | assign RAS1n = !((ADDR_HI[22:21] == 2'b10 & access_ras) | (refresh_ras & refresh_cas)); // $400000-5FFFFF 256 | assign RAS2n = !((ADDR_HI[22:21] == 2'b11 & access_ras) | (refresh_ras & refresh_cas)); // $600000-7FFFFF 257 | assign RAS3n = !((ADDR_HI[22:21] == 2'b00 & access_ras) | (refresh_ras & refresh_cas)); // $800000-9FFFFF 258 | `else 259 | assign RAS0n = 1'b1; 260 | assign RAS1n = 1'b1; 261 | assign RAS2n = !((ADDR_HI[21] == 1'b0 & access_ras) | (refresh_ras & refresh_cas)); 262 | assign RAS3n = !((ADDR_HI[21] == 1'b1 & access_ras) | (refresh_ras & refresh_cas)); 263 | `endif 264 | 265 | assign UCASn = !((access_ucas) | refresh_cas); 266 | assign LCASn = !((access_lcas) | refresh_cas); 267 | 268 | // CAS before RAS refresh 269 | // CAS Asserted in S1 & S2 270 | // RAS Asserted in S2 271 | always @(negedge CLK or negedge RESETn) 272 | begin 273 | if (!RESETn) begin 274 | refresh_cas <= 1'b0; 275 | end else begin 276 | refresh_cas <= (!refresh_cas & ASn & !access_ras); 277 | end 278 | end 279 | 280 | always @(posedge CLK or negedge RESETn) 281 | begin 282 | if (!RESETn) begin 283 | refresh_ras <= 1'b0; 284 | end else begin 285 | refresh_ras <= refresh_cas; 286 | end 287 | end 288 | 289 | // Memory access 290 | always @(negedge CLK or negedge RESETn) 291 | begin 292 | if (!RESETn) begin 293 | ram_cycle = 1'b0; 294 | end else begin 295 | `ifdef autoconfig 296 | ram_cycle = ( 297 | ((ADDR_HI[23:20] == 4'h2) & addr_match[0]) | 298 | ((ADDR_HI[23:20] == 4'h3) & addr_match[1]) | 299 | ((ADDR_HI[23:20] == 4'h4) & addr_match[2]) | 300 | ((ADDR_HI[23:20] == 4'h5) & addr_match[3]) | 301 | ((ADDR_HI[23:20] == 4'h6) & addr_match[4]) | 302 | ((ADDR_HI[23:20] == 4'h7) & addr_match[5]) | 303 | ((ADDR_HI[23:20] == 4'h8) & addr_match[6]) | 304 | ((ADDR_HI[23:20] == 4'h9) & addr_match[7]) 305 | ) & !ASn & configured; 306 | `else 307 | ram_cycle = ((ADDR_HI[23:20] >= 4'h2) & (ADDR_HI[23:20] <= 4'h9) & !ASn); 308 | `endif 309 | end 310 | end 311 | 312 | always @(posedge CLK or posedge ASn) 313 | begin 314 | if (ASn) begin 315 | access_ras <= 1'b0; 316 | access_ucas <= 1'b0; 317 | access_lcas <= 1'b0; 318 | end else begin 319 | access_ras <= (ram_cycle & !access_ucas & !access_lcas); // Assert @ S4, Deassert @ S7 320 | access_ucas <= (access_ras & !UDSn); // Assert @ S6, Deassert @ S7 321 | access_lcas <= (access_ras & !LDSn); // Assert @ S6, Deassert @ S7 322 | end 323 | end 324 | 325 | // Row/Col mux 326 | // Switch to ROW address at falling edge of S0 327 | // Switch to column address at falling edge of S4 328 | always @(negedge CLK) 329 | begin 330 | mux_switch <= access_ras; 331 | if (access_ras) begin 332 | MA0 <= ADDR_HI[19]; 333 | MA1 <= ADDR_HI[20]; 334 | end else begin 335 | MA0 <= ADDR_LO[1]; 336 | MA1 <= ADDR_LO[2]; 337 | end 338 | end 339 | 340 | 341 | // R/W Hack because no CPLD pin for R/W 342 | always @(posedge CLK or posedge ASn) 343 | begin 344 | if (ASn) begin 345 | RWn <= 1'b1; 346 | end else begin 347 | if (!ASn & AS_last) begin 348 | if (UDSn & LDSn) begin 349 | RWn <= 1'b0; 350 | end else begin 351 | RWn <= 1'b1; 352 | end 353 | end 354 | end 355 | end 356 | 357 | always @(posedge CLK) begin 358 | AS_last <= ASn; 359 | end 360 | endmodule 361 | -------------------------------------------------------------------------------- /firmware/windows/UrJTAG.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/firmware/windows/UrJTAG.zip -------------------------------------------------------------------------------- /fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name OpenAmiga500FastRamExpansion)(type KiCad)(uri ${KIPRJMOD}/OpenAmiga500FastRamExpansion.pretty)(options "")(descr "")) 3 | ) 4 | -------------------------------------------------------------------------------- /lib/68000_DIP_SOCKET.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | $CMP 68000_SOCKET 4 | D 16/32-bit Microprocessor 5 | K 68000 Microprocessor CPU 6 | F https://www.nxp.com/docs/en/reference-manual/MC68000UM.pdf 7 | $ENDCMP 8 | # 9 | $CMP 68008D 10 | D 16/32-bit Microprocessor, 8-bit databus 11 | K 68000 Microprocessor CPU 12 | F https://www.nxp.com/docs/en/reference-manual/MC68000UM.pdf 13 | $ENDCMP 14 | # 15 | $CMP 68010D 16 | D 16/32-bit Microprocessor 17 | K 68000 Microprocessor CPU 18 | F https://www.nxp.com/docs/en/reference-manual/MC68000UM.pdf 19 | $ENDCMP 20 | # 21 | $CMP MC68000FN 22 | D Microprocessor, 16-bit bus 23 | K MPRO 24 | F http://www.nxp.com/files/32bit/doc/ref_manual/MC68000UM.pdf 25 | $ENDCMP 26 | # 27 | $CMP MC68332 28 | D MCU 32 bit, PQFP-132 29 | K MCU 32 bit 30 | F http://pdf.datasheetcatalog.com/datasheet/motorola/SPAKMC332AVFC20.pdf 31 | $ENDCMP 32 | # 33 | #End Doc Library 34 | -------------------------------------------------------------------------------- /lib/68000_DIP_SOCKET.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # 68000_SOCKET 5 | # 6 | DEF 68000_SOCKET U 0 30 Y Y 1 F N 7 | F0 "U" 0 100 50 H V C CNN 8 | F1 "68000_SOCKET" 0 -150 50 H V C CNN 9 | F2 "" 0 0 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | ALIAS 68010D 12 | DRAW 13 | S -700 2250 700 -2250 0 1 10 f 14 | X D4 1 1000 -600 300 L 50 50 1 1 B 15 | X DTACK 10 -1000 -800 300 R 50 50 1 1 O I 16 | X BG 11 -1000 1400 300 R 50 50 1 1 I I 17 | X BGACK 12 -1000 1500 300 R 50 50 1 1 O I 18 | X BR 13 -1000 1300 300 R 50 50 1 1 O I 19 | X VCC 14 0 2400 150 D 50 50 1 1 w 20 | X CLK 15 -1000 2200 300 R 50 50 1 1 O C 21 | X GND 16 100 -2400 150 U 50 50 1 1 w 22 | X HALT 17 -1000 -1200 300 R 50 50 1 1 B I 23 | X RESET 18 -1000 -1300 300 R 50 50 1 1 B I 24 | X VMA 19 -1000 500 300 R 50 50 1 1 I I 25 | X D3 2 1000 -500 300 L 50 50 1 1 B 26 | X E 20 -1000 400 300 R 50 50 1 1 I 27 | X VPA 21 -1000 300 300 R 50 50 1 1 O I 28 | X BERR 22 -1000 -600 300 R 50 50 1 1 O I 29 | X IPL2 23 -1000 1700 300 R 50 50 1 1 O I 30 | X IPL1 24 -1000 1800 300 R 50 50 1 1 O I 31 | X IPL0 25 -1000 1900 300 R 50 50 1 1 O I 32 | X FC2 26 -1000 800 300 R 50 50 1 1 I 33 | X FC1 27 -1000 900 300 R 50 50 1 1 I 34 | X FC0 28 -1000 1000 300 R 50 50 1 1 I 35 | X A1 29 1000 2200 300 L 50 50 1 1 I 36 | X D2 3 1000 -400 300 L 50 50 1 1 B 37 | X A2 30 1000 2100 300 L 50 50 1 1 I 38 | X A3 31 1000 2000 300 L 50 50 1 1 I 39 | X A4 32 1000 1900 300 L 50 50 1 1 I 40 | X A5 33 1000 1800 300 L 50 50 1 1 I 41 | X A6 34 1000 1700 300 L 50 50 1 1 I 42 | X A7 35 1000 1600 300 L 50 50 1 1 I 43 | X A8 36 1000 1500 300 L 50 50 1 1 I 44 | X A9 37 1000 1400 300 L 50 50 1 1 I 45 | X A10 38 1000 1300 300 L 50 50 1 1 I 46 | X A11 39 1000 1200 300 L 50 50 1 1 I 47 | X D1 4 1000 -300 300 L 50 50 1 1 B 48 | X A12 40 1000 1100 300 L 50 50 1 1 I 49 | X A13 41 1000 1000 300 L 50 50 1 1 I 50 | X A14 42 1000 900 300 L 50 50 1 1 I 51 | X A15 43 1000 800 300 L 50 50 1 1 I 52 | X A16 44 1000 700 300 L 50 50 1 1 I 53 | X A17 45 1000 600 300 L 50 50 1 1 I 54 | X A18 46 1000 500 300 L 50 50 1 1 I 55 | X A19 47 1000 400 300 L 50 50 1 1 I 56 | X A20 48 1000 300 300 L 50 50 1 1 I 57 | X VCC 49 100 2400 150 D 50 50 1 1 w 58 | X D0 5 1000 -200 300 L 50 50 1 1 B 59 | X A21 50 1000 200 300 L 50 50 1 1 I 60 | X A22 51 1000 100 300 L 50 50 1 1 I 61 | X A23 52 1000 0 300 L 50 50 1 1 I 62 | X GND 53 0 -2400 150 U 50 50 1 1 w 63 | X D15 54 1000 -1700 300 L 50 50 1 1 B 64 | X D14 55 1000 -1600 300 L 50 50 1 1 B 65 | X D13 56 1000 -1500 300 L 50 50 1 1 B 66 | X D12 57 1000 -1400 300 L 50 50 1 1 B 67 | X D11 58 1000 -1300 300 L 50 50 1 1 B 68 | X D10 59 1000 -1200 300 L 50 50 1 1 B 69 | X AS 6 1000 -1900 300 L 50 50 1 1 I I 70 | X D9 60 1000 -1100 300 L 50 50 1 1 B 71 | X D8 61 1000 -1000 300 L 50 50 1 1 B 72 | X D7 62 1000 -900 300 L 50 50 1 1 B 73 | X D6 63 1000 -800 300 L 50 50 1 1 B 74 | X D5 64 1000 -700 300 L 50 50 1 1 B 75 | X UDS 7 1000 -2000 300 L 50 50 1 1 I I 76 | X LDS 8 1000 -2100 300 L 50 50 1 1 I I 77 | X R/W 9 1000 -2200 300 L 50 50 1 1 I 78 | ENDDRAW 79 | ENDDEF 80 | # 81 | # 68008D 82 | # 83 | DEF 68008D U 0 40 Y Y 1 F N 84 | F0 "U" 0 100 50 H V C CNN 85 | F1 "68008D" 0 -100 50 H V C CNN 86 | F2 "" 0 0 50 H I C CNN 87 | F3 "" 0 0 50 H I C CNN 88 | DRAW 89 | S -600 -1650 600 1600 0 1 10 f 90 | X A3 1 900 1200 300 L 50 50 1 1 T 91 | X A12 10 900 300 300 L 50 50 1 1 T 92 | X A13 11 900 200 300 L 50 50 1 1 T 93 | X A14 12 900 100 300 L 50 50 1 1 T 94 | X VCC 13 0 1800 150 D 50 50 1 1 W 95 | X A15 14 900 0 300 L 50 50 1 1 T 96 | X GND 15 100 -1800 150 U 50 50 1 1 W 97 | X A16 16 900 -100 300 L 50 50 1 1 T 98 | X A17 17 900 -200 300 L 50 50 1 1 T 99 | X A18 18 900 -300 300 L 50 50 1 1 T 100 | X A19 19 900 -400 300 L 50 50 1 1 T 101 | X A4 2 900 1100 300 L 50 50 1 1 T 102 | X D7 20 900 -1500 300 L 50 50 1 1 T 103 | X D6 21 900 -1400 300 L 50 50 1 1 T 104 | X D5 22 900 -1300 300 L 50 50 1 1 T 105 | X D4 23 900 -1200 300 L 50 50 1 1 T 106 | X D3 24 900 -1100 300 L 50 50 1 1 T 107 | X D2 25 900 -1000 300 L 50 50 1 1 T 108 | X D1 26 900 -900 300 L 50 50 1 1 T 109 | X D0 27 900 -800 300 L 50 50 1 1 T 110 | X AS 28 -900 -1300 300 R 50 50 1 1 T I 111 | X DS 29 -900 -1400 300 R 50 50 1 1 T I 112 | X A5 3 900 1000 300 L 50 50 1 1 T 113 | X R/W 30 -900 -1500 300 R 50 50 1 1 T 114 | X DTACK 31 -900 600 300 R 50 50 1 1 I I 115 | X BG 32 -900 -100 300 R 50 50 1 1 O I 116 | X BR 33 -900 700 300 R 50 50 1 1 I I 117 | X CLK 34 -900 1500 300 R 50 50 1 1 I C 118 | X GND 35 0 -1800 150 U 50 50 1 1 W 119 | X HALT 36 -900 -1100 300 R 50 50 1 1 B I 120 | X RESET 37 -900 -1200 300 R 50 50 1 1 B I 121 | X E 38 -900 -300 300 R 50 50 1 1 O 122 | X VPA 39 -900 1400 300 R 50 50 1 1 I I 123 | X A6 4 900 900 300 L 50 50 1 1 T 124 | X BERR 40 -900 500 300 R 50 50 1 1 I I 125 | X IPL1 41 -900 1100 300 R 50 50 1 1 I I 126 | X IPL0/2 42 -900 1200 300 R 50 50 1 1 I I 127 | X FC2 43 -900 100 300 R 50 50 1 1 O 128 | X FC1 44 -900 200 300 R 50 50 1 1 O 129 | X FC0 45 -900 300 300 R 50 50 1 1 O 130 | X A0 46 900 1500 300 L 50 50 1 1 T 131 | X A1 47 900 1400 300 L 50 50 1 1 T 132 | X A2 48 900 1300 300 L 50 50 1 1 T 133 | X A7 5 900 800 300 L 50 50 1 1 T 134 | X A8 6 900 700 300 L 50 50 1 1 T 135 | X A9 7 900 600 300 L 50 50 1 1 T 136 | X A10 8 900 500 300 L 50 50 1 1 T 137 | X A11 9 900 400 300 L 50 50 1 1 T 138 | ENDDRAW 139 | ENDDEF 140 | # 141 | # MC68000FN 142 | # 143 | DEF MC68000FN U 0 30 Y Y 1 F N 144 | F0 "U" -650 2350 50 H V C CNN 145 | F1 "MC68000FN" 500 -2350 50 H V C CNN 146 | F2 "Package_LCC:PLCC-68" -750 2250 50 H I C CNN 147 | F3 "" 0 0 50 H I C CNN 148 | $FPLIST 149 | PLCC* 150 | $ENDFPLIST 151 | DRAW 152 | S -700 2300 700 -2300 0 1 10 f 153 | X D4 1 1000 -600 300 L 50 50 1 1 B 154 | X DTACK 10 -1000 -700 300 R 50 50 1 1 I I 155 | X BG 11 -1000 1400 300 R 50 50 1 1 O I 156 | X BGACK 12 -1000 1500 300 R 50 50 1 1 I I 157 | X BR 13 -1000 1300 300 R 50 50 1 1 I I 158 | X VCC 14 -100 2600 300 D 50 50 1 1 W 159 | X CLK 15 -1000 2200 300 R 50 50 1 1 I C 160 | X GND 16 100 -2600 300 U 50 50 1 1 W 161 | X GND 17 200 -2600 300 U 50 50 1 1 W 162 | X NC 18 -700 -1800 0 R 50 50 1 1 N N 163 | X HALT 19 -1000 -1200 300 R 50 50 1 1 B I 164 | X D3 2 1000 -500 300 L 50 50 1 1 B 165 | X RESET 20 -1000 -1400 300 R 50 50 1 1 I I 166 | X VMA 21 -1000 500 300 R 50 50 1 1 O I 167 | X E 22 -1000 400 300 R 50 50 1 1 O 168 | X VPA 23 -1000 300 300 R 50 50 1 1 I I 169 | X BERR 24 -1000 -500 300 R 50 50 1 1 I I 170 | X IPL2 25 -1000 1700 300 R 50 50 1 1 I I 171 | X IPL1 26 -1000 1800 300 R 50 50 1 1 I I 172 | X IPL0 27 -1000 1900 300 R 50 50 1 1 I I 173 | X FC2 28 -1000 800 300 R 50 50 1 1 O 174 | X FC1 29 -1000 900 300 R 50 50 1 1 O 175 | X D2 3 1000 -400 300 L 50 50 1 1 B 176 | X FC0 30 -1000 1000 300 R 50 50 1 1 O 177 | X NC 31 -700 -1900 0 R 50 50 1 1 N N 178 | X A1 32 1000 2200 300 L 50 50 1 1 O 179 | X A2 33 1000 2100 300 L 50 50 1 1 O 180 | X A3 34 1000 2000 300 L 50 50 1 1 O 181 | X A4 35 1000 1900 300 L 50 50 1 1 O 182 | X A5 36 1000 1800 300 L 50 50 1 1 O 183 | X A6 37 1000 1700 300 L 50 50 1 1 O 184 | X A7 38 1000 1600 300 L 50 50 1 1 O 185 | X A8 39 1000 1500 300 L 50 50 1 1 O 186 | X D1 4 1000 -300 300 L 50 50 1 1 B 187 | X A9 40 1000 1400 300 L 50 50 1 1 O 188 | X A10 41 1000 1300 300 L 50 50 1 1 O 189 | X A11 42 1000 1200 300 L 50 50 1 1 O 190 | X A12 43 1000 1100 300 L 50 50 1 1 O 191 | X A13 44 1000 1000 300 L 50 50 1 1 O 192 | X A14 45 1000 900 300 L 50 50 1 1 O 193 | X A15 46 1000 800 300 L 50 50 1 1 O 194 | X A16 47 1000 700 300 L 50 50 1 1 O 195 | X A17 48 1000 600 300 L 50 50 1 1 O 196 | X A18 49 1000 500 300 L 50 50 1 1 O 197 | X D0 5 1000 -200 300 L 50 50 1 1 B 198 | X A19 50 1000 400 300 L 50 50 1 1 O 199 | X A20 51 1000 300 300 L 50 50 1 1 O 200 | X VCC 52 100 2600 300 D 50 50 1 1 W 201 | X A21 53 1000 200 300 L 50 50 1 1 O 202 | X A22 54 1000 100 300 L 50 50 1 1 O 203 | X A23 55 1000 0 300 L 50 50 1 1 O 204 | X GND 56 -100 -2600 300 U 50 50 1 1 W 205 | X GND 57 -200 -2600 300 U 50 50 1 1 W 206 | X D15 58 1000 -1700 300 L 50 50 1 1 B 207 | X D14 59 1000 -1600 300 L 50 50 1 1 B 208 | X AS 6 1000 -1900 300 L 50 50 1 1 O I 209 | X D13 60 1000 -1500 300 L 50 50 1 1 B 210 | X D12 61 1000 -1400 300 L 50 50 1 1 B 211 | X D11 62 1000 -1300 300 L 50 50 1 1 B 212 | X D10 63 1000 -1200 300 L 50 50 1 1 B 213 | X D9 64 1000 -1100 300 L 50 50 1 1 B 214 | X D8 65 1000 -1000 300 L 50 50 1 1 B 215 | X D7 66 1000 -900 300 L 50 50 1 1 B 216 | X D6 67 1000 -800 300 L 50 50 1 1 B 217 | X D5 68 1000 -700 300 L 50 50 1 1 B 218 | X UDS 7 1000 -2000 300 L 50 50 1 1 O I 219 | X LDS 8 1000 -2100 300 L 50 50 1 1 O I 220 | X R/W 9 1000 -2200 300 L 50 50 1 1 O 221 | ENDDRAW 222 | ENDDEF 223 | # 224 | # MC68332 225 | # 226 | DEF MC68332 U 0 40 Y Y 1 F N 227 | F0 "U" -950 3350 50 H V C CNN 228 | F1 "MC68332" 840 3350 50 H V C CNN 229 | F2 "Package_QFP:PQFP-132_24x24mm_P0.635mm" 0 -3900 50 H I C CNN 230 | F3 "" 2100 2300 50 H I C CNN 231 | $FPLIST 232 | PQFP*24x24mm*P0.635mm* 233 | $ENDFPLIST 234 | DRAW 235 | S -1000 -3300 1000 3300 0 1 10 f 236 | X VSS 2 -700 -3500 200 U 50 50 1 0 W 237 | X VDD 1 -600 3500 200 D 50 50 1 1 W 238 | X TP6 10 -1300 2300 300 R 50 50 1 1 I 239 | X D8 100 1300 -1300 300 L 50 50 1 1 I 240 | X VSS 101 400 -3500 200 U 50 50 1 1 W 241 | X D7 102 1300 -1200 300 L 50 50 1 1 I 242 | X D6 103 1300 -1100 300 L 50 50 1 1 I 243 | X D5 104 1300 -1000 300 L 50 50 1 1 I 244 | X D4 105 1300 -900 300 L 50 50 1 1 I 245 | X VSS 106 500 -3500 200 U 50 50 1 1 W 246 | X VDD 107 400 3500 200 D 50 50 1 1 W 247 | X D3 108 1300 -800 300 L 50 50 1 1 I 248 | X D2 109 1300 -700 300 L 50 50 1 1 I 249 | X TP5 11 -1300 2400 300 R 50 50 1 1 I 250 | X D1 110 1300 -600 300 L 50 50 1 1 I 251 | X D0 111 1300 -500 300 L 50 50 1 1 I 252 | X CSBOOT 112 1300 1700 300 L 50 50 1 1 O 253 | X BR/CS0 113 1300 1900 300 L 50 50 1 1 I 254 | X BG/CS1 114 1300 2000 300 L 50 50 1 1 O 255 | X BGACK/CS2 115 1300 2100 300 L 50 50 1 1 I 256 | X VDD 116 500 3500 200 D 50 50 1 1 W 257 | X VSS 117 600 -3500 200 U 50 50 1 1 W 258 | X FC0/CS3 118 1300 2200 300 L 50 50 1 1 O 259 | X FC1/CS4 119 1300 2300 300 L 50 50 1 1 O 260 | X TP4 12 -1300 2500 300 R 50 50 1 1 I 261 | X FC2/CS5 120 1300 2400 300 L 50 50 1 1 O 262 | X A19/CS6 121 1300 2500 300 L 50 50 1 1 O 263 | X A20/CS7 122 1300 2600 300 L 50 50 1 1 O 264 | X A21/CS8 123 1300 2700 300 L 50 50 1 1 O 265 | X A22/CS9 124 1300 2800 300 L 50 50 1 1 O 266 | X A23/CS10 125 1300 2900 300 L 50 50 1 1 O 267 | X VDD 126 600 3500 200 D 50 50 1 1 W 268 | X VSS 127 700 -3500 200 U 50 50 1 1 W 269 | X T2CLK 128 -1300 1300 300 R 50 50 1 1 I 270 | X TP15 129 -1300 1400 300 R 50 50 1 1 I 271 | X TP3 13 -1300 2600 300 R 50 50 1 1 I 272 | X TP14 130 -1300 1500 300 R 50 50 1 1 I 273 | X TP13 131 -1300 1600 300 R 50 50 1 1 I 274 | X TP12 132 -1300 1700 300 R 50 50 1 1 I 275 | X TP2 14 -1300 2700 300 R 50 50 1 1 I 276 | X TP1 15 -1300 2800 300 R 50 50 1 1 I 277 | X TP0 16 -1300 2900 300 R 50 50 1 1 I 278 | X VSS 17 -500 -3500 200 U 50 50 1 1 W 279 | X VDD 18 -400 3500 200 D 50 50 1 1 W 280 | X VSTBY 19 -1300 1100 300 R 50 50 1 1 I 281 | X A1 20 1300 -200 300 L 50 50 1 1 O 282 | X A2 21 1300 -100 300 L 50 50 1 1 O 283 | X A3 22 1300 0 300 L 50 50 1 1 O 284 | X A4 23 1300 100 300 L 50 50 1 1 O 285 | X A5 24 1300 200 300 L 50 50 1 1 O 286 | X A6 25 1300 300 300 L 50 50 1 1 O 287 | X A7 26 1300 400 300 L 50 50 1 1 O 288 | X A8 27 1300 500 300 L 50 50 1 1 O 289 | X VDD 28 -300 3500 200 D 50 50 1 1 W 290 | X VSS 29 -400 -3500 200 U 50 50 1 1 W 291 | X TP11 3 -1300 1800 300 R 50 50 1 1 I 292 | X A9 30 1300 600 300 L 50 50 1 1 O 293 | X A10 31 1300 700 300 L 50 50 1 1 O 294 | X A11 32 1300 800 300 L 50 50 1 1 O 295 | X A12 33 1300 900 300 L 50 50 1 1 O 296 | X VSS 34 -300 -3500 200 U 50 50 1 1 W 297 | X A13 35 1300 1000 300 L 50 50 1 1 O 298 | X A14 36 1300 1100 300 L 50 50 1 1 O 299 | X A15 37 1300 1200 300 L 50 50 1 1 O 300 | X A16 38 1300 1300 300 L 50 50 1 1 O 301 | X VDD 39 -200 3500 200 D 50 50 1 1 W 302 | X TP10 4 -1300 1900 300 R 50 50 1 1 I 303 | X VSS 40 -200 -3500 200 U 50 50 1 1 W 304 | X A17 41 1300 1400 300 L 50 50 1 1 O 305 | X A18 42 1300 1500 300 L 50 50 1 1 O 306 | X MISO 43 -1300 -2500 300 R 50 50 1 1 I 307 | X MOSI 44 -1300 -2400 300 R 50 50 1 1 I 308 | X SCK 45 -1300 -2300 300 R 50 50 1 1 I 309 | X PSCO/SS 46 -1300 -2200 300 R 50 50 1 1 I 310 | X PCS1 47 -1300 -2100 300 R 50 50 1 1 I 311 | X PCS2 48 -1300 -2000 300 R 50 50 1 1 I 312 | X PCS3 49 -1300 -1900 300 R 50 50 1 1 I 313 | X TP9 5 -1300 2000 300 R 50 50 1 1 I 314 | X VDD 50 -100 3500 200 D 50 50 1 1 W 315 | X VSS 51 -100 -3500 200 U 50 50 1 1 W 316 | X TXD 52 -1300 -1800 300 R 50 50 1 1 I 317 | X RXD 53 -1300 -1700 300 R 50 50 1 1 I 318 | X IPIPE/DSO 54 -1300 -1500 300 R 50 50 1 1 O 319 | X IFETCH/DSI 55 -1300 -1400 300 R 50 50 1 1 I 320 | X BKPT/DSCLK 56 -1300 -1300 300 R 50 50 1 1 I 321 | X TSTME/TSC 57 -1300 -1200 300 R 50 50 1 1 I 322 | X FREEZE/QUOT 58 -1300 -1100 300 R 50 50 1 1 O 323 | X VSS 59 0 -3500 200 U 50 50 1 1 W 324 | X TP8 6 -1300 2100 300 R 50 50 1 1 I 325 | X XTAL 60 -1300 -900 300 R 50 50 1 1 O 326 | X VDDSYN 61 -1300 -600 300 R 50 50 1 1 I 327 | X EXTAL 62 -1300 -800 300 R 50 50 1 1 I 328 | X VDD 63 0 3500 200 D 50 50 1 1 W 329 | X XFC 64 -1300 -500 300 R 50 50 1 1 I 330 | X VDD 65 100 3500 200 D 50 50 1 1 W 331 | X CLKOUT 66 -1300 -400 300 R 50 50 1 1 O 332 | X VSS 67 100 -3500 200 U 50 50 1 1 W 333 | X RESET 68 -1300 -300 300 R 50 50 1 1 I 334 | X HALT 69 -1300 -200 300 R 50 50 1 1 I 335 | X VDD 7 -500 3500 200 D 50 50 1 1 W 336 | X BERR 70 -1300 -100 300 R 50 50 1 1 I 337 | X IRQ7 71 -1300 100 300 R 50 50 1 1 I 338 | X IRQ6 72 -1300 200 300 R 50 50 1 1 I 339 | X IRQ5 73 -1300 300 300 R 50 50 1 1 I 340 | X IRQ4 74 -1300 400 300 R 50 50 1 1 I 341 | X IRQ3 75 -1300 500 300 R 50 50 1 1 I 342 | X IRQ2 76 -1300 600 300 R 50 50 1 1 I 343 | X IRQ1 77 -1300 700 300 R 50 50 1 1 I 344 | X MODCK 78 -1300 800 300 R 50 50 1 1 I 345 | X R/W 79 -1300 900 300 R 50 50 1 1 I 346 | X VSS 8 -600 -3500 200 U 50 50 1 1 W 347 | X SIZ1 80 1300 -2900 300 L 50 50 1 1 I 348 | X SIZ0 81 1300 -2800 300 L 50 50 1 1 I 349 | X AS 82 1300 -2700 300 L 50 50 1 1 I 350 | X VSS 83 200 -3500 200 U 50 50 1 1 W 351 | X VDD 84 200 3500 200 D 50 50 1 1 W 352 | X DS 85 1300 -2600 300 L 50 50 1 1 I 353 | X RMC 86 1300 -2500 300 L 50 50 1 1 I 354 | X AVEC 87 1300 -2400 300 L 50 50 1 1 I 355 | X DSACK1 88 1300 -2300 300 L 50 50 1 1 I 356 | X DSACK0 89 1300 -2200 300 L 50 50 1 1 I 357 | X TP7 9 -1300 2200 300 R 50 50 1 1 I 358 | X A0 90 1300 -300 300 L 50 50 1 1 O 359 | X D15 91 1300 -2000 300 L 50 50 1 1 I 360 | X D14 92 1300 -1900 300 L 50 50 1 1 I 361 | X D13 93 1300 -1800 300 L 50 50 1 1 I 362 | X D12 94 1300 -1700 300 L 50 50 1 1 I 363 | X VSS 95 300 -3500 200 U 50 50 1 1 W 364 | X VDD 96 300 3500 200 D 50 50 1 1 W 365 | X D11 97 1300 -1600 300 L 50 50 1 1 I 366 | X D10 98 1300 -1500 300 L 50 50 1 1 I 367 | X D9 99 1300 -1400 300 L 50 50 1 1 I 368 | ENDDRAW 369 | ENDDEF 370 | # 371 | #End Library 372 | -------------------------------------------------------------------------------- /lib/ATF1502AS-10JU44.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | #End Doc Library 4 | -------------------------------------------------------------------------------- /lib/ATF1502AS-10JU44.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # ATF1502AS-10JU44 5 | # 6 | DEF ATF1502AS-10JU44 U 0 40 Y Y 1 F N 7 | F0 "U" 0 -100 50 H V C CNN 8 | F1 "ATF1502AS-10JU44" 0 100 50 H V C CNN 9 | F2 "MODULE" 0 0 50 H I C CNN 10 | F3 "DOCUMENTATION" 0 0 50 H I C CNN 11 | DRAW 12 | S -1000 -700 1000 700 1 0 0 N 13 | X I1/GCLR 1 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300 D 50 50 1 1 W 37 | X IO23 31 300 1000 300 D 50 50 1 1 B 38 | X IO24_TCK 32 200 1000 300 D 50 50 1 1 B 39 | X IO25 33 100 1000 300 D 50 50 1 1 B 40 | X IO26 34 0 1000 300 D 50 50 1 1 B 41 | X VCC 35 -100 1000 300 D 50 50 1 1 W 42 | X IO27 36 -200 1000 300 D 50 50 1 1 B 43 | X IO28 37 -300 1000 300 D 50 50 1 1 B 44 | X IO29/TDO 38 -400 1000 300 D 50 50 1 1 B 45 | X IO30 39 -500 1000 300 D 50 50 1 1 B 46 | X IO1 4 -1300 -300 300 R 50 50 1 1 B 47 | X IO31 40 -1300 500 300 R 50 50 1 1 B 48 | X IO32/GCLK3 41 -1300 400 300 R 50 50 1 1 B 49 | X GND 42 -1300 300 300 R 50 50 1 1 W 50 | X I3/GCLK1 43 -1300 200 300 R 50 50 1 1 I 51 | X I4/OE1 44 -1300 100 300 R 50 50 1 1 I 52 | X IO2 5 -1300 -400 300 R 50 50 1 1 B 53 | X IO3 6 -1300 -500 300 R 50 50 1 1 B 54 | X IO4_TDI 7 -500 -1000 300 U 50 50 1 1 B 55 | X IO5 8 -400 -1000 300 U 50 50 1 1 B 56 | X IO6 9 -300 -1000 300 U 50 50 1 1 B 57 | ENDDRAW 58 | ENDDEF 59 | # 60 | #End Library 61 | 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I 41 | X UCAS 30 750 -200 300 L 50 50 1 1 I I 42 | X LCAS 31 750 -100 300 L 50 50 1 1 I I 43 | X NC 32 750 0 300 L 50 50 1 1 U 44 | X D9 33 750 100 300 L 50 50 1 1 B 45 | X D10 34 750 200 300 L 50 50 1 1 B 46 | X D11 35 750 300 300 L 50 50 1 1 B 47 | X D12 36 750 400 300 L 50 50 1 1 B 48 | X GND 37 750 500 300 L 50 50 1 1 W 49 | X D13 38 750 600 300 L 50 50 1 1 B 50 | X D14 39 750 700 300 L 50 50 1 1 B 51 | X D15 40 750 800 300 L 50 50 1 1 B 52 | X D16 41 750 900 300 L 50 50 1 1 B 53 | X GND 42 750 1000 300 L 50 50 1 1 W 54 | ENDDRAW 55 | ENDDEF 56 | # 57 | #End Library 58 | -------------------------------------------------------------------------------- /lib/HYB5118160BSJ.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SukkoPera/OpenAmiga500FastRamExpansion/ef0caab18c600f7cb6027b795c18e46f7ec6bce0/lib/HYB5118160BSJ.png -------------------------------------------------------------------------------- /sym-lib-table: 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