├── .gitignore ├── PinConfig.jpg ├── .vscode ├── settings.json └── c_cpp_properties.json ├── Drivers ├── CMSIS │ ├── Device │ │ └── ST │ │ │ └── STM32F0xx │ │ │ └── Include │ │ │ ├── stm32f0xx.h │ │ │ ├── stm32f030x6.h │ │ │ ├── stm32f030x8.h │ │ │ ├── stm32f030xc.h │ │ │ ├── stm32f031x6.h │ │ │ ├── stm32f038xx.h │ │ │ ├── stm32f042x6.h │ │ │ ├── stm32f048xx.h │ │ │ ├── stm32f051x8.h │ │ │ ├── stm32f058xx.h │ │ │ ├── stm32f070x6.h │ │ │ ├── stm32f070xb.h │ │ │ ├── stm32f071xb.h │ │ │ ├── stm32f072xb.h │ │ │ ├── stm32f078xx.h │ │ │ ├── stm32f091xc.h │ │ │ ├── stm32f098xx.h │ │ │ └── system_stm32f0xx.h │ ├── Include │ │ ├── cmsis_version.h │ │ ├── tz_context.h │ │ └── cmsis_compiler.h │ └── README.md └── STM32F0xx_HAL_Driver │ ├── Src │ ├── stm32f0xx_ll_pwr.c │ ├── stm32f0xx_ll_exti.c │ ├── stm32f0xx_ll_i2c.c │ ├── stm32f0xx_hal_pwr_ex.c │ ├── stm32f0xx_ll_gpio.c │ └── stm32f0xx_hal_pcd_ex.c │ └── Inc │ ├── stm32f0xx_hal_pcd_ex.h │ ├── stm32f0xx_hal_cortex.h │ ├── stm32f0xx_hal_pwr.h │ ├── stm32f0xx_hal_def.h │ ├── stm32f0xx_ll_usb.h │ ├── stm32f0xx_ll_utils.h │ └── stm32f0xx_ll_cortex.h ├── Src ├── pcan_timestamp.h ├── pcan_protocol.h ├── usbd_conf.h ├── pcan_led.h ├── pcan_usb.h ├── pcan_timestamp.c ├── pcan_can.h ├── pcan_varian.h ├── io_macro.h ├── punker.h ├── pcan_packet.h ├── pcan_led.c ├── main.c ├── usbd_desc.c ├── usbd_helper.h ├── pcan_can.c └── usbd_conf.c ├── .github ├── workflows │ ├── release-drafter.yml │ └── firmware_build.yml └── release-drafter.yml ├── LICENSE ├── README.md ├── Middlewares └── ST │ └── STM32_USB_Device_Library │ └── Core │ ├── Inc │ ├── usbd_ctlreq.h │ ├── usbd_ioreq.h │ └── usbd_core.h │ └── Src │ └── usbd_ioreq.c ├── .clang-format ├── Makefile └── STM32F042C6Tx_FLASH.ld /.gitignore: -------------------------------------------------------------------------------- 1 | /build* 2 | *.log 3 | -------------------------------------------------------------------------------- /PinConfig.jpg: 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/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f091xc.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SummerFalls/pcan_cantact/HEAD/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f091xc.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f098xx.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/SummerFalls/pcan_cantact/HEAD/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f098xx.h -------------------------------------------------------------------------------- /Src/pcan_timestamp.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | #include 3 | 4 | #define PCAN_TICKS_FROM_US(_us) (((uint32_t)_us * 1000u) / 42666u) 5 | 6 | void pcan_timestamp_init(void); 7 | uint16_t pcan_timestamp_ticks(void); 8 | uint16_t pcan_timestamp_millis(void); 9 | -------------------------------------------------------------------------------- /Src/pcan_protocol.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | #include 3 | 4 | void pcan_protocol_init(void); 5 | void pcan_protocol_poll(void); 6 | void pcan_protocol_process_command(uint8_t *ptr, uint16_t size); 7 | void pcan_protocol_process_data(uint8_t *ptr, uint16_t size); 8 | -------------------------------------------------------------------------------- /Src/usbd_conf.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "stm32f0xx.h" 4 | #include "stm32f0xx_hal.h" 5 | #include 6 | #include 7 | #include 8 | 9 | 10 | #define USBD_SUPPORT_USER_STRING_DESC (1) 11 | #define USBD_DEBUG_LEVEL 0 12 | #define DEVICE_FS 0 13 | 14 | extern PCD_HandleTypeDef hpcd_USB_FS; 15 | -------------------------------------------------------------------------------- /.github/workflows/release-drafter.yml: -------------------------------------------------------------------------------- 1 | name: Release Drafter 2 | 3 | on: 4 | push: 5 | branches: 6 | - master 7 | pull_request: 8 | types: 9 | - opened 10 | - reopened 11 | - synchronize 12 | 13 | jobs: 14 | update_release_draft: 15 | runs-on: ubuntu-latest 16 | steps: 17 | - uses: release-drafter/release-drafter@v5 18 | env: 19 | GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} -------------------------------------------------------------------------------- /Src/pcan_led.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | #include 3 | 4 | enum e_pcan_led 5 | { 6 | LED_CH0_TX, 7 | LED_CH0_RX, 8 | LED_STAT, 9 | 10 | LED_TOTAL, 11 | }; 12 | 13 | enum e_pcan_led_mode 14 | { 15 | LED_MODE_NONE, 16 | LED_MODE_ON, 17 | LED_MODE_OFF, 18 | LED_MODE_BLINK_FAST, 19 | LED_MODE_BLINK_SLOW, 20 | }; 21 | 22 | void pcan_led_init(void); 23 | void pcan_led_set_mode(int led, int mode, uint16_t arg); 24 | void pcan_led_poll(void); 25 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | DO WHAT THE FUCK YOU WANT TO PUBLIC LICENSE 2 | Version 2, December 2004 3 | 4 | Copyright (C) 2004 Sam Hocevar 5 | 6 | Everyone is permitted to copy and distribute verbatim or modified 7 | copies of this license document, and changing it is allowed as long 8 | as the name is changed. 9 | 10 | DO WHAT THE FUCK YOU WANT TO PUBLIC LICENSE 11 | TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION 12 | 13 | 0. You just DO WHAT THE FUCK YOU WANT TO. -------------------------------------------------------------------------------- /.github/release-drafter.yml: -------------------------------------------------------------------------------- 1 | name-template: 'pcan_cantact v$RESOLVED_VERSION' 2 | tag-template: 'v$RESOLVED_VERSION' 3 | categories: 4 | - title: '🚀 Features' 5 | labels: 6 | - 'feature' 7 | - 'enhancement' 8 | - 'add' 9 | - title: '🐛 Bug Fixes' 10 | labels: 11 | - 'fix' 12 | - 'bugfix' 13 | - 'bug' 14 | - title: "📖 Documentation" 15 | labels: 16 | - 'documentation' 17 | change-template: '- $TITLE @$AUTHOR (#$NUMBER)' 18 | change-title-escapes: '\<*_&' # You can add # and @ to disable mentions, and add ` to disable code blocks. 19 | version-resolver: 20 | major: 21 | labels: 22 | - 'major' 23 | minor: 24 | labels: 25 | - 'minor' 26 | patch: 27 | labels: 28 | - 'patch' 29 | default: patch 30 | template: | 31 | ## Changes 32 | 33 | $CHANGES -------------------------------------------------------------------------------- /Src/pcan_usb.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | #include 3 | 4 | /* PCAN-USB Endpoints */ 5 | #define PCAN_USB_EP_CMDOUT 0x01 6 | #define PCAN_USB_EP_CMDIN 0x81 7 | #define PCAN_USB_EP_MSGOUT 0x02 8 | #define PCAN_USB_EP_MSGIN 0x82 9 | 10 | struct t_class_data 11 | { 12 | uint16_t ep_tx_data_pending[15]; 13 | uint8_t ep_tx_in_use[15]; 14 | uint8_t buffer_cmd[16]; 15 | uint8_t buffer_data[64]; 16 | }; 17 | 18 | struct t_m2h_fsm 19 | { 20 | uint8_t state; 21 | uint8_t ep_addr; 22 | uint8_t *pdbuf; 23 | int dbsize; 24 | uint32_t total_tx; 25 | }; 26 | 27 | int pcan_flush_ep(uint8_t ep); 28 | int pcan_flush_data(struct t_m2h_fsm *pfsm, void *src, int size); 29 | 30 | uint16_t pcan_usb_send_command_buffer(const void *p, uint16_t size); 31 | uint16_t pcan_usb_send_data_buffer(const void *p, uint16_t size); 32 | void pcan_usb_init(void); 33 | void pcan_usb_poll(void); 34 | -------------------------------------------------------------------------------- /Src/pcan_timestamp.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | 4 | #define TIM_BUS_FREQ (48000000) 5 | 6 | void pcan_timestamp_init(void) 7 | { 8 | switch (TIM_BUS_FREQ) 9 | { 10 | case 48000000: 11 | /* TIM3 on APB1 bus */ 12 | __HAL_RCC_TIM3_CLK_ENABLE(); 13 | 14 | TIM3->PSC = (2048 - 1); /* => tick = 42.666uS */ 15 | /* set clock division to zero: */ 16 | TIM3->CR1 &= (uint16_t)(~TIM_CR1_CKD); 17 | TIM3->CR1 |= TIM_CLOCKDIVISION_DIV1; 18 | /* enable timer */ 19 | TIM3->CR1 |= TIM_CR1_CEN; 20 | break; 21 | default: 22 | assert(0); 23 | break; 24 | } 25 | } 26 | 27 | uint16_t pcan_timestamp_millis(void) 28 | { 29 | return (HAL_GetTick() & 0xFFFF); 30 | } 31 | 32 | uint16_t pcan_timestamp_ticks(void) 33 | { 34 | /* 1 pcan tick => 42.666 us */ 35 | return TIM3->CNT; 36 | } 37 | -------------------------------------------------------------------------------- /Src/pcan_can.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | #include 3 | 4 | #define CAN_FLAG_ECHO (0x20) 5 | #define CAN_FLAG_RTR (0x40) 6 | #define CAN_FLAG_EXTID (0x80) 7 | 8 | #define CAN_ERROR_FLAG_BUSOFF (1 << 0) 9 | #define CAN_ERROR_FLAG_RX_OVF (1 << 1) 10 | #define CAN_ERROR_FLAG_TX_ERR (1 << 2) 11 | 12 | typedef struct 13 | { 14 | uint32_t id; 15 | uint8_t data[8]; 16 | uint8_t dlc; 17 | uint8_t flags; 18 | /* for self receive */ 19 | uint8_t dummy; 20 | /* in pcan ticks */ 21 | uint16_t timestamp; 22 | } can_message_t; 23 | 24 | void pcan_can_init(void); 25 | void pcan_can_poll(void); 26 | void pcan_can_set_bitrate(uint16_t brp, uint8_t tseg1, uint8_t tseg2, uint8_t sjw); 27 | int pcan_can_send_message(const can_message_t *msg); 28 | void pcan_can_install_rx_callback(void (*cb)(can_message_t *)); 29 | void pcan_can_install_error_callback(void (*cb)(uint8_t, uint8_t, uint8_t)); 30 | void pcan_can_set_bus_active(uint16_t mode); 31 | void pcan_can_set_silent(uint8_t silent_mode); 32 | void pcan_can_set_loopback(uint8_t loopback); 33 | -------------------------------------------------------------------------------- /.github/workflows/firmware_build.yml: -------------------------------------------------------------------------------- 1 | name: Build PCAN firmware 2 | 3 | on: 4 | # push: 5 | # branches: [ master ] 6 | # tags: 7 | # - "v*.*.*" 8 | release: 9 | types: [published] 10 | workflow_dispatch: 11 | 12 | jobs: 13 | build: 14 | runs-on: ubuntu-latest 15 | 16 | steps: 17 | - name: Checkout 18 | uses: actions/checkout@v2 19 | 20 | - name: Install gcc arm toolchain... 21 | run: sudo apt install -y gcc-arm-none-eabi 22 | 23 | - name: Build firmware... 24 | run: make 25 | 26 | - name: Upload Artifacts 27 | uses: actions/upload-artifact@v3 28 | with: 29 | name: pcan_firmware 30 | path: | 31 | build-*/*.hex 32 | build-*/*.bin 33 | 34 | - name: Download Artifacts 35 | uses: actions/download-artifact@v3 36 | 37 | - name: Display structure of downloaded files 38 | run: ls -R pcan_firmware/ 39 | 40 | - name: Attach to release 41 | uses: softprops/action-gh-release@v1 42 | with: 43 | files: | 44 | pcan_firmware/*/*.hex 45 | pcan_firmware/*/*.bin 46 | -------------------------------------------------------------------------------- /Src/pcan_varian.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "io_macro.h" 4 | 5 | #if (defined CANABLE) || (defined ENTREE) || (defined CANTACT_8) || (defined CANTACT_16) 6 | #define IOPIN_TX A, 1, MODE_OUTPUT_PP, NOPULL, SPEED_FREQ_MEDIUM, NOAF 7 | #define IOPIN_RX A, 0, MODE_OUTPUT_PP, NOPULL, SPEED_FREQ_MEDIUM, NOAF 8 | #define LED_ON PIN_HI 9 | #define LED_OFF PIN_LOW 10 | 11 | #define CAN_RX B, 8, MODE_AF_PP, NOPULL, SPEED_FREQ_HIGH, AF4_CAN 12 | #define CAN_TX B, 9, MODE_AF_PP, NOPULL, SPEED_FREQ_HIGH, AF4_CAN 13 | 14 | #define pcan_variant_io_init() 15 | #elif (defined OLLIE) 16 | #define CAN_RX B, 8, MODE_AF_PP, NOPULL, SPEED_FREQ_HIGH, AF4_CAN 17 | #define CAN_TX B, 9, MODE_AF_PP, NOPULL, SPEED_FREQ_HIGH, AF4_CAN 18 | 19 | #define pcan_variant_io_init() 20 | #elif (defined SH_C30A) 21 | #define IOPIN_TX B, 0, MODE_OUTPUT_PP, NOPULL, SPEED_FREQ_MEDIUM, NOAF 22 | #define IOPIN_RX B, 1, MODE_OUTPUT_PP, NOPULL, SPEED_FREQ_MEDIUM, NOAF 23 | #define LED_ON PIN_HI 24 | #define LED_OFF PIN_LOW 25 | 26 | #define CAN_RX B, 8, MODE_AF_PP, NOPULL, SPEED_FREQ_HIGH, AF4_CAN 27 | #define CAN_TX B, 9, MODE_AF_PP, NOPULL, SPEED_FREQ_HIGH, AF4_CAN 28 | 29 | #define pcan_variant_io_init() 30 | #else 31 | #error Unknown board variant 32 | #endif 33 | -------------------------------------------------------------------------------- /Src/io_macro.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | #include 3 | 4 | #define GPIO_NOAF (0u) 5 | #define _PIN_INIT(_PORT, _PIN, _MODE, _PULL, _SPEED, _AF) \ 6 | HAL_GPIO_Init(GPIO##_PORT, (GPIO_InitTypeDef[]) \ 7 | {{ \ 8 | .Pin = GPIO_PIN_##_PIN, \ 9 | .Mode = GPIO_##_MODE, \ 10 | .Pull = GPIO_##_PULL, \ 11 | .Speed = GPIO_##_SPEED, \ 12 | .Alternate = GPIO_##_AF \ 13 | }}) 14 | 15 | #define _PIN_HI(_PORT, _PIN, ...) GPIO##_PORT->BSRR = (1u << _PIN) 16 | #define _PIN_LOW(_PORT, _PIN, ...) GPIO##_PORT->BSRR = (0x10000u << _PIN) 17 | #define _PIN_TOGGLE(_PORT, _PIN, ...) \ 18 | do { \ 19 | uint32_t odr = GPIO##_PORT->ODR; \ 20 | GPIO##_PORT->BSRR = ((odr & (1u << _PIN)) << 16u) | (~odr & (1u << _PIN)); \ 21 | } while (0) 22 | 23 | #define _PIN_ENABLE_CLOCK(_PORT, ...) __HAL_RCC_GPIO##_PORT##_CLK_ENABLE() 24 | 25 | #define PIN_HI(CONFIG) _PIN_HI(CONFIG) 26 | #define PIN_LOW(CONFIG) _PIN_LOW(CONFIG) 27 | #define PIN_TOGGLE(CONFIG) _PIN_TOGGLE(CONFIG) 28 | #define PIN_INIT(CONFIG) _PIN_INIT(CONFIG) 29 | #define PIN_ENABLE_CLOCK(CONFIG) _PIN_ENABLE_CLOCK(CONFIG) -------------------------------------------------------------------------------- /Src/punker.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | 4 | #define unpack_u8(ptr) (((uint8_t *)(ptr))[0]) 5 | #define unpack_u16(ptr) ((((uint8_t *)(ptr))[1] << 8) | (((uint8_t *)(ptr))[0])) 6 | #define unpack_u32(ptr) ((((uint8_t *)ptr)[3] << 24) | (((uint8_t *)ptr)[2] << 16) | (((uint8_t *)ptr)[1] << 8) | (((uint8_t *)ptr)[0])) 7 | 8 | #define unpack_float(ptr) \ 9 | *(float *)(uint32_t[]) \ 10 | { \ 11 | unpack_u32(ptr) \ 12 | } 13 | 14 | #define pack_u8(ptr, data) (((uint8_t *)(ptr))[0] = (data)) 15 | #define pack_u16(ptr, data) \ 16 | do { \ 17 | ((uint8_t *)(ptr))[0] = (data)&0xFF; \ 18 | ((uint8_t *)(ptr))[1] = ((data) >> 8) & 0xFF; \ 19 | } while (0) 20 | 21 | #define pack_u24(ptr, data) \ 22 | do { \ 23 | (uint8_t *)(ptr)[0] = (data)&0xFF; \ 24 | (uint8_t *)(ptr)[1] = ((data) >> 8) & 0xFF; \ 25 | (uint8_t *)(ptr)[2] = ((data) >> 16) & 0xFF; \ 26 | } while (0) 27 | 28 | #define pack_u32(_xptr, _xdata) \ 29 | do { \ 30 | ((uint8_t *)(_xptr))[0] = (_xdata)&0xFF; \ 31 | ((uint8_t *)(_xptr))[1] = ((_xdata) >> 8) & 0xFF; \ 32 | ((uint8_t *)(_xptr))[2] = ((_xdata) >> 16) & 0xFF; \ 33 | ((uint8_t *)(_xptr))[3] = ((_xdata) >> 24) & 0xFF; \ 34 | } while (0) 35 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.2 5 | * @date 19. April 2017 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2017 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # PEAK PCAN firmware for STM32F042C6T6(STM32F072C8T6) based boards 2 | 3 | > 本仓库已加入 Github Actions 自动构建工作流，可 Fork 本仓库后自行根据硬件更改引脚配置后进行自动化地构建。 4 | 5 | [![Build PCAN firmware](https://github.com/SummerFalls/pcan_cantact/actions/workflows/firmware_build.yml/badge.svg)](https://github.com/SummerFalls/pcan_cantact/actions/workflows/firmware_build.yml) 6 | 7 | ## :dart: 目标硬件 / Target Hardware 8 | 9 | - [CANtact](https://github.com/linklayer/cantact-hw) - opensource USB-CAN adapter project `make cantact_16` 10 | - [CANable](https://canable.io/) - opensource USB-CAN adapter based on CANtact project `make canable` 11 | - [Entreé](https://github.com/tuna-f1sh/entree) - opensource USB-C CAN adapter based on CANable project `make entree` 12 | - [Ollie](https://github.com/slimelec/ollie-hw) - opensource USB-CAN adapter with isolated USB `make ollie` 13 | - [SH-C30A](https://www.deshide.com/product-details.html?pid=384242&_t=1671089557) - opensource USB-CAN adapter project `make sh_c30a` 14 | - Any other STM32F042C6T6(STM32F072C8T6) based boards with external or internal OSC. 15 | 16 |
17 | 18 | 19 | 24 | 36 | 37 |
20 | 21 | ![PinConfig](PinConfig.jpg) 22 | 23 | 25 | 26 | | PINs | FUNCTIONs | 27 | |-----:|------------| 28 | | PA0 | CAN_RX_LED | 29 | | PA1 | CAN_TX_LED | 30 | | PB8 | CAN_RX | 31 | | PB9 | CAN_TX | 32 | | PA11 | USB_DM | 33 | | PA12 | USB_DP | 34 | 35 |
38 |
39 | 40 | ## :wrench: 工具链 / Toolchain 41 | 42 | - GNU Arm Embedded Toolchain 43 | 44 | ## :beers: 鸣谢 / Credits & Special Thanks 45 | 46 | > 支持原作者 Support original author [@Moonglow][Moonglow] 47 | 48 | - Become a Patron! 49 | - **Bitcoin (P2WPKH):** bc1qstnsjqu2kw9v2axens54ycegn3stwvluq7ze5j 50 | 51 | ## :star: License 52 | 53 | WTFPL 54 | 55 | [Moonglow]: https://github.com/moonglow 56 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_pwr.c 4 | * @author MCD Application Team 5 | * @brief PWR LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | #if defined(USE_FULL_LL_DRIVER) 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f0xx_ll_pwr.h" 24 | #include "stm32f0xx_ll_bus.h" 25 | 26 | /** @addtogroup STM32F0xx_LL_Driver 27 | * @{ 28 | */ 29 | 30 | #if defined(PWR) 31 | 32 | /** @defgroup PWR_LL PWR 33 | * @{ 34 | */ 35 | 36 | /* Private types -------------------------------------------------------------*/ 37 | /* Private variables ---------------------------------------------------------*/ 38 | /* Private constants ---------------------------------------------------------*/ 39 | /* Private macros ------------------------------------------------------------*/ 40 | /* Private function prototypes -----------------------------------------------*/ 41 | 42 | /* Exported functions --------------------------------------------------------*/ 43 | /** @addtogroup PWR_LL_Exported_Functions 44 | * @{ 45 | */ 46 | 47 | /** @addtogroup PWR_LL_EF_Init 48 | * @{ 49 | */ 50 | 51 | /** 52 | * @brief De-initialize the PWR registers to their default reset values. 53 | * @retval An ErrorStatus enumeration value: 54 | * - SUCCESS: PWR registers are de-initialized 55 | * - ERROR: not applicable 56 | */ 57 | ErrorStatus LL_PWR_DeInit(void) 58 | { 59 | /* Force reset of PWR clock */ 60 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR); 61 | 62 | /* Release reset of PWR clock */ 63 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR); 64 | 65 | return SUCCESS; 66 | } 67 | 68 | /** 69 | * @} 70 | */ 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** 77 | * @} 78 | */ 79 | #endif /* defined(PWR) */ 80 | /** 81 | * @} 82 | */ 83 | 84 | #endif /* USE_FULL_LL_DRIVER */ 85 | 86 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 87 | -------------------------------------------------------------------------------- /Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_req.h 4 | * @author MCD Application Team 5 | * @brief Header file for the usbd_req.c file 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2015 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under Ultimate Liberty license 13 | * SLA0044, the "License"; You may not use this file except in compliance with 14 | * the License. You may obtain a copy of the License at: 15 | * www.st.com/SLA0044 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __USB_REQUEST_H 22 | #define __USB_REQUEST_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "usbd_def.h" 30 | 31 | 32 | /** @addtogroup STM32_USB_DEVICE_LIBRARY 33 | * @{ 34 | */ 35 | 36 | /** @defgroup USBD_REQ 37 | * @brief header file for the usbd_req.c file 38 | * @{ 39 | */ 40 | 41 | /** @defgroup USBD_REQ_Exported_Defines 42 | * @{ 43 | */ 44 | /** 45 | * @} 46 | */ 47 | 48 | 49 | /** @defgroup USBD_REQ_Exported_Types 50 | * @{ 51 | */ 52 | /** 53 | * @} 54 | */ 55 | 56 | 57 | 58 | /** @defgroup USBD_REQ_Exported_Macros 59 | * @{ 60 | */ 61 | /** 62 | * @} 63 | */ 64 | 65 | /** @defgroup USBD_REQ_Exported_Variables 66 | * @{ 67 | */ 68 | /** 69 | * @} 70 | */ 71 | 72 | /** @defgroup USBD_REQ_Exported_FunctionsPrototype 73 | * @{ 74 | */ 75 | 76 | USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); 77 | USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); 78 | USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); 79 | 80 | 81 | void USBD_CtlError(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); 82 | 83 | void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata); 84 | 85 | void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len); 86 | /** 87 | * @} 88 | */ 89 | 90 | #ifdef __cplusplus 91 | } 92 | #endif 93 | 94 | #endif /* __USB_REQUEST_H */ 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | 105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 106 | -------------------------------------------------------------------------------- /Src/pcan_packet.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include 4 | 5 | /* pcan-usb parameter get an set function */ 6 | #pragma pack(push, 1) 7 | typedef struct 8 | { 9 | uint8_t function; 10 | uint8_t number; 11 | uint8_t param[14]; 12 | } PCAN_USB_PARAM; 13 | #pragma pack(pop) 14 | 15 | /* USB control cmds get/set */ 16 | #define PCAN_USB_EX0 0x00 17 | #define PCAN_USB_GET 0x01 18 | #define PCAN_USB_SET 0x02 19 | #define PCAN_USB_EX3 0x03 20 | 21 | /* PCAN-USB commands */ 22 | #define PCAN_USB_CMD_BITRATE 1 23 | #define PCAN_USB_CMD_CLOCK 2 24 | #define PCAN_USB_CMD_BUS 3 25 | #define PCAN_USB_CMD_DEVID 4 26 | #define PCAN_USB_CMD_CFG 5 27 | #define PCAN_USB_CMD_SN 6 28 | #define PCAN_USB_CMD_REGISTER 9 29 | #define PCAN_USB_CMD_EXT_VCC 10 30 | #define PCAN_USB_CMD_ERR_FR 11 31 | #define PCAN_USB_CMD_LED 12 32 | #define PCAN_USB_CMD_DEVDATA 30 33 | /* USB Mass Storage Mode command (FW >= 8.3.0) */ 34 | #define PCAN_USB_SETCAN2FLASH 0xC8 35 | 36 | /* PCAN_USB_CMD_BUS PCAN_USB_SET extension: */ 37 | #define PCAN_USB_SET_SILENT_MODE 3 38 | 39 | /* PCAN-USB rx/tx buffers size */ 40 | #define PCAN_USB_RX_BUFFER_SIZE 64 41 | #define PCAN_USB_TX_BUFFER_SIZE 64 42 | 43 | #define PCAN_USB_MSG_HEADER_LEN 2 44 | 45 | /* PCAN-USB adapter internal clock (MHz) */ 46 | #define PCAN_USB_CRYSTAL_HZ 16000000 47 | 48 | /* PCAN-USB USB message record status/len field */ 49 | #define PCAN_USB_STATUSLEN_TIMESTAMP (1 << 7) 50 | #define PCAN_USB_STATUSLEN_INTERNAL (1 << 6) 51 | #define PCAN_USB_STATUSLEN_EXT_ID (1 << 5) 52 | #define PCAN_USB_STATUSLEN_RTR (1 << 4) 53 | #define PCAN_USB_STATUSLEN_DLC (0xf) 54 | 55 | /* PCAN-USB error flags */ 56 | #define PCAN_USB_ERROR_TXFULL 0x01 57 | #define PCAN_USB_ERROR_RXQOVR 0x02 58 | #define PCAN_USB_ERROR_BUS_LIGHT 0x04 59 | #define PCAN_USB_ERROR_BUS_HEAVY 0x08 60 | #define PCAN_USB_ERROR_BUS_OFF 0x10 61 | #define PCAN_USB_ERROR_RXQEMPTY 0x20 62 | #define PCAN_USB_ERROR_QOVR 0x40 63 | #define PCAN_USB_ERROR_TXQFULL 0x80 64 | 65 | /* SJA1000 registers */ 66 | #define SJA1000_MOD 0 /* mode register */ 67 | #define SJA1000_CMR 1 68 | #define SJA1000_SR 2 69 | #define SJA1000_IR 3 70 | #define SJA1000_IER 4 /* acceptance code */ 71 | #define SJA1000_BTR0 6 /* bus timing 0 */ 72 | #define SJA1000_BTR1 7 /* bus timing 1 */ 73 | #define SJA1000_OCR 8 /* output control */ 74 | #define SJA1000_TR 9 75 | #define SJA1000_CDR 31 76 | 77 | /* SJA1000 modes */ 78 | #define SJA1000_MODE_NORMAL 0x00 79 | #define SJA1000_MODE_INIT 0x01 80 | 81 | /* 82 | * tick duration = 42.666 us => 83 | * (tick_number * 44739243) >> 20 ~ (tick_number * 42666) / 1000 84 | * accuracy = 10^-7 85 | */ 86 | #define PCAN_USB_TS_DIV_SHIFTER 20 87 | #define PCAN_USB_TS_US_PER_TICK 44739243 88 | 89 | /* PCAN-USB messages record types */ 90 | #define PCAN_USB_REC_ERROR 1 91 | #define PCAN_USB_REC_ANALOG 2 92 | #define PCAN_USB_REC_BUSLOAD 3 93 | #define PCAN_USB_REC_TS 4 94 | #define PCAN_USB_REC_BUSEVT 5 95 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f0xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /** @addtogroup CMSIS 21 | * @{ 22 | */ 23 | 24 | /** @addtogroup stm32f0xx_system 25 | * @{ 26 | */ 27 | 28 | /** 29 | * @brief Define to prevent recursive inclusion 30 | */ 31 | #ifndef __SYSTEM_STM32F0XX_H 32 | #define __SYSTEM_STM32F0XX_H 33 | 34 | #ifdef __cplusplus 35 | extern "C" { 36 | #endif 37 | 38 | /** @addtogroup STM32F0xx_System_Includes 39 | * @{ 40 | */ 41 | 42 | /** 43 | * @} 44 | */ 45 | 46 | 47 | /** @addtogroup STM32F0xx_System_Exported_types 48 | * @{ 49 | */ 50 | /* This variable is updated in three ways: 51 | 1) by calling CMSIS function SystemCoreClockUpdate() 52 | 3) by calling HAL API function HAL_RCC_GetHCLKFreq() 53 | 3) by calling HAL API function HAL_RCC_ClockConfig() 54 | Note: If you use this function to configure the system clock; then there 55 | is no need to call the 2 first functions listed above, since SystemCoreClock 56 | variable is updated automatically. 57 | */ 58 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 59 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ 60 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @addtogroup STM32F0xx_System_Exported_Constants 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @addtogroup STM32F0xx_System_Exported_Macros 75 | * @{ 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | /** @addtogroup STM32F0xx_System_Exported_Functions 83 | * @{ 84 | */ 85 | 86 | extern void SystemInit(void); 87 | extern void SystemCoreClockUpdate(void); 88 | /** 89 | * @} 90 | */ 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /*__SYSTEM_STM32F0XX_H */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /** 103 | * @} 104 | */ 105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 106 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/tz_context.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file tz_context.h 3 | * @brief Context Management for Armv8-M TrustZone 4 | * @version V1.0.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef TZ_CONTEXT_H 32 | #define TZ_CONTEXT_H 33 | 34 | #include 35 | 36 | #ifndef TZ_MODULEID_T 37 | #define TZ_MODULEID_T 38 | /// \details Data type that identifies secure software modules called by a process. 39 | typedef uint32_t TZ_ModuleId_t; 40 | #endif 41 | 42 | /// \details TZ Memory ID identifies an allocated memory slot. 43 | typedef uint32_t TZ_MemoryId_t; 44 | 45 | /// Initialize secure context memory system 46 | /// \return execution status (1: success, 0: error) 47 | uint32_t TZ_InitContextSystem_S (void); 48 | 49 | /// Allocate context memory for calling secure software modules in TrustZone 50 | /// \param[in] module identifies software modules called from non-secure mode 51 | /// \return value != 0 id TrustZone memory slot identifier 52 | /// \return value 0 no memory available or internal error 53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); 54 | 55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S 56 | /// \param[in] id TrustZone memory slot identifier 57 | /// \return execution status (1: success, 0: error) 58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); 59 | 60 | /// Load secure context (called on RTOS thread context switch) 61 | /// \param[in] id TrustZone memory slot identifier 62 | /// \return execution status (1: success, 0: error) 63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); 64 | 65 | /// Store secure context (called on RTOS thread context switch) 66 | /// \param[in] id TrustZone memory slot identifier 67 | /// \return execution status (1: success, 0: error) 68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); 69 | 70 | #endif // TZ_CONTEXT_H 71 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_pcd_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of PCD HAL Extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32F0xx_HAL_PCD_EX_H 22 | #define STM32F0xx_HAL_PCD_EX_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f0xx_hal_def.h" 30 | 31 | #if defined (USB) 32 | /** @addtogroup STM32F0xx_HAL_Driver 33 | * @{ 34 | */ 35 | 36 | /** @addtogroup PCDEx 37 | * @{ 38 | */ 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macros -----------------------------------------------------------*/ 42 | /* Exported functions --------------------------------------------------------*/ 43 | /** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions 44 | * @{ 45 | */ 46 | /** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 47 | * @{ 48 | */ 49 | 50 | 51 | 52 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, 53 | uint16_t ep_addr, 54 | uint16_t ep_kind, 55 | uint32_t pmaadress); 56 | 57 | 58 | HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); 59 | HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); 60 | 61 | 62 | HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd); 63 | HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd); 64 | void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd); 65 | 66 | void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); 67 | void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | 81 | /** 82 | * @} 83 | */ 84 | #endif /* defined (USB) */ 85 | 86 | #ifdef __cplusplus 87 | } 88 | #endif 89 | 90 | 91 | #endif /* STM32F0xx_HAL_PCD_EX_H */ 92 | 93 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 94 | -------------------------------------------------------------------------------- /Src/pcan_led.c: -------------------------------------------------------------------------------- 1 | #include "pcan_led.h" 2 | #include "pcan_timestamp.h" 3 | #include "pcan_varian.h" 4 | #include "stm32f0xx_hal.h" 5 | #include 6 | 7 | static struct 8 | { 9 | uint16_t mode; 10 | uint16_t arg; 11 | uint16_t delay; 12 | uint16_t timestamp; 13 | uint8_t state; 14 | } led_mode_array[LED_TOTAL] = { 0 }; 15 | 16 | void pcan_led_init(void) 17 | { 18 | #ifdef IOPIN_TX 19 | PIN_ENABLE_CLOCK(IOPIN_TX); 20 | PIN_INIT(IOPIN_TX); 21 | #endif 22 | #ifdef IOPIN_RX 23 | PIN_ENABLE_CLOCK(IOPIN_RX); 24 | PIN_INIT(IOPIN_RX); 25 | #endif 26 | } 27 | 28 | void pcan_led_set_mode(int led, int mode, uint16_t arg) 29 | { 30 | assert(led < LED_TOTAL); 31 | uint16_t ts = pcan_timestamp_millis(); 32 | 33 | led_mode_array[led].mode = mode; 34 | if (!led_mode_array[led].timestamp) 35 | { 36 | led_mode_array[led].timestamp = ts | 1; 37 | } 38 | led_mode_array[led].delay = 0; 39 | 40 | /* set guard time */ 41 | if (mode == LED_MODE_BLINK_FAST || mode == LED_MODE_BLINK_SLOW) 42 | { 43 | led_mode_array[led].delay = (mode == LED_MODE_BLINK_FAST) ? 50 : 200; 44 | arg = arg ? (ts + arg) | 1 : 0; 45 | } 46 | 47 | led_mode_array[led].arg = arg; 48 | } 49 | 50 | static void pcan_led_update_state(int led, uint8_t state) 51 | { 52 | switch (led) 53 | { 54 | #ifdef IOPIN_TX 55 | case LED_CH0_TX: 56 | state ? (LED_ON(IOPIN_TX)) : (LED_OFF(IOPIN_TX)); 57 | break; 58 | #endif 59 | #ifdef IOPIN_RX 60 | case LED_CH0_RX: 61 | state ? (LED_ON(IOPIN_RX)) : (LED_OFF(IOPIN_RX)); 62 | break; 63 | #endif 64 | default: 65 | (void)state; 66 | return; 67 | } 68 | } 69 | 70 | void pcan_led_poll(void) 71 | { 72 | uint16_t ts_ms = pcan_timestamp_millis(); 73 | 74 | for (int i = 0; i < LED_TOTAL; i++) 75 | { 76 | if (!led_mode_array[i].timestamp) 77 | continue; 78 | if ((uint16_t)(ts_ms - led_mode_array[i].timestamp) < led_mode_array[i].delay) 79 | continue; 80 | 81 | switch (led_mode_array[i].mode) 82 | { 83 | default: 84 | case LED_MODE_NONE: 85 | led_mode_array[i].timestamp = 0; 86 | break; 87 | case LED_MODE_OFF: 88 | case LED_MODE_ON: 89 | led_mode_array[i].state = (led_mode_array[i].mode == LED_MODE_ON); 90 | led_mode_array[i].timestamp = 0; 91 | break; 92 | case LED_MODE_BLINK_FAST: 93 | case LED_MODE_BLINK_SLOW: 94 | led_mode_array[i].state ^= 1; 95 | led_mode_array[i].timestamp += led_mode_array[i].delay; 96 | led_mode_array[i].timestamp |= 1; 97 | if (led_mode_array[i].arg && (led_mode_array[i].arg <= ts_ms)) 98 | { 99 | pcan_led_set_mode(i, LED_MODE_OFF, 0); 100 | } 101 | break; 102 | } 103 | 104 | pcan_led_update_state(i, led_mode_array[i].state); 105 | } 106 | } 107 | -------------------------------------------------------------------------------- /Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_ioreq.h 4 | * @author MCD Application Team 5 | * @brief Header file for the usbd_ioreq.c file 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2015 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under Ultimate Liberty license 13 | * SLA0044, the "License"; You may not use this file except in compliance with 14 | * the License. You may obtain a copy of the License at: 15 | * www.st.com/SLA0044 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __USBD_IOREQ_H 22 | #define __USBD_IOREQ_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "usbd_def.h" 30 | #include "usbd_core.h" 31 | 32 | /** @addtogroup STM32_USB_DEVICE_LIBRARY 33 | * @{ 34 | */ 35 | 36 | /** @defgroup USBD_IOREQ 37 | * @brief header file for the usbd_ioreq.c file 38 | * @{ 39 | */ 40 | 41 | /** @defgroup USBD_IOREQ_Exported_Defines 42 | * @{ 43 | */ 44 | /** 45 | * @} 46 | */ 47 | 48 | 49 | /** @defgroup USBD_IOREQ_Exported_Types 50 | * @{ 51 | */ 52 | 53 | 54 | /** 55 | * @} 56 | */ 57 | 58 | 59 | 60 | /** @defgroup USBD_IOREQ_Exported_Macros 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup USBD_IOREQ_Exported_Variables 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** @defgroup USBD_IOREQ_Exported_FunctionsPrototype 77 | * @{ 78 | */ 79 | 80 | USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev, 81 | uint8_t *pbuf, 82 | uint16_t len); 83 | 84 | USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev, 85 | uint8_t *pbuf, 86 | uint16_t len); 87 | 88 | USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev, 89 | uint8_t *pbuf, 90 | uint16_t len); 91 | 92 | USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev, 93 | uint8_t *pbuf, 94 | uint16_t len); 95 | 96 | USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev); 97 | 98 | USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev); 99 | 100 | uint32_t USBD_GetRxCount(USBD_HandleTypeDef *pdev, uint8_t ep_addr); 101 | 102 | /** 103 | * @} 104 | */ 105 | 106 | #ifdef __cplusplus 107 | } 108 | #endif 109 | 110 | #endif /* __USBD_IOREQ_H */ 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /** 117 | * @} 118 | */ 119 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 120 | -------------------------------------------------------------------------------- /.vscode/c_cpp_properties.json: -------------------------------------------------------------------------------- 1 | { 2 | "configurations": [ 3 | { 4 | "name": "CANABLE", 5 | "includePath": [ 6 | "${workspaceFolder}/**" 7 | ], 8 | "defines": [ 9 | "CANABLE", 10 | "HSE_VALUE=0", 11 | "USE_HAL_DRIVER", 12 | "STM32F042x6", 13 | "NDEBUG" 14 | ], 15 | "intelliSenseMode": "gcc-arm", 16 | "compilerPath": "C:/Program Files (x86)/GNU Arm Embedded Toolchain/10 2021.10/bin/arm-none-eabi-gcc.exe" 17 | }, 18 | { 19 | "name": "ENTREE", 20 | "includePath": [ 21 | "${workspaceFolder}/**" 22 | ], 23 | "defines": [ 24 | "ENTREE", 25 | "HSE_VALUE=0", 26 | "USE_HAL_DRIVER", 27 | "STM32F042x6", 28 | "NDEBUG" 29 | ], 30 | "intelliSenseMode": "gcc-arm", 31 | "compilerPath": "C:/Program Files (x86)/GNU Arm Embedded Toolchain/10 2021.10/bin/arm-none-eabi-gcc.exe" 32 | }, 33 | { 34 | "name": "CANTACT_8", 35 | "includePath": [ 36 | "${workspaceFolder}/**" 37 | ], 38 | "defines": [ 39 | "CANTACT_8", 40 | "HSE_VALUE=8000000", 41 | "USE_HAL_DRIVER", 42 | "STM32F042x6", 43 | "NDEBUG" 44 | ], 45 | "intelliSenseMode": "gcc-arm", 46 | "compilerPath": "C:/Program Files (x86)/GNU Arm Embedded Toolchain/10 2021.10/bin/arm-none-eabi-gcc.exe" 47 | }, 48 | { 49 | "name": "CANTACT_16", 50 | "includePath": [ 51 | "${workspaceFolder}/**" 52 | ], 53 | "defines": [ 54 | "CANTACT_16", 55 | "HSE_VALUE=16000000", 56 | "USE_HAL_DRIVER", 57 | "STM32F042x6", 58 | "NDEBUG" 59 | ], 60 | "intelliSenseMode": "gcc-arm", 61 | "compilerPath": "C:/Program Files (x86)/GNU Arm Embedded Toolchain/10 2021.10/bin/arm-none-eabi-gcc.exe" 62 | }, 63 | { 64 | "name": "OLLIE", 65 | "includePath": [ 66 | "${workspaceFolder}/**" 67 | ], 68 | "defines": [ 69 | "OLLIE", 70 | "HSE_VALUE=0", 71 | "USE_HAL_DRIVER", 72 | "STM32F042x6", 73 | "NDEBUG" 74 | ], 75 | "intelliSenseMode": "gcc-arm", 76 | "compilerPath": "C:/Program Files (x86)/GNU Arm Embedded Toolchain/10 2021.10/bin/arm-none-eabi-gcc.exe" 77 | }, 78 | { 79 | "name": "SH_C30A", 80 | "includePath": [ 81 | "${workspaceFolder}/**" 82 | ], 83 | "defines": [ 84 | "SH_C30A", 85 | "HSE_VALUE=24000000", 86 | "USE_HAL_DRIVER", 87 | "STM32F042x6", 88 | "NDEBUG" 89 | ], 90 | "intelliSenseMode": "gcc-arm", 91 | "compilerPath": "C:/Program Files (x86)/GNU Arm Embedded Toolchain/10 2021.10/bin/arm-none-eabi-gcc.exe" 92 | } 93 | ], 94 | "version": 4 95 | } -------------------------------------------------------------------------------- /Src/main.c: -------------------------------------------------------------------------------- 1 | #include "pcan_led.h" 2 | #include "pcan_protocol.h" 3 | #include "pcan_timestamp.h" 4 | #include "pcan_usb.h" 5 | #include "pcan_varian.h" 6 | #include "stm32f0xx_hal.h" 7 | 8 | void HAL_MspInit(void) 9 | { 10 | __HAL_RCC_SYSCFG_CLK_ENABLE(); 11 | __HAL_RCC_PWR_CLK_ENABLE(); 12 | 13 | __HAL_RCC_GPIOF_CLK_ENABLE(); 14 | __HAL_RCC_GPIOA_CLK_ENABLE(); 15 | __HAL_RCC_GPIOB_CLK_ENABLE(); 16 | } 17 | 18 | #if (HSE_VALUE != 0) 19 | void SystemClock_Config(void) 20 | { 21 | RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; 22 | 23 | /* enable HSE */ 24 | __HAL_RCC_HSE_CONFIG(RCC_HSE_ON); 25 | while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 26 | ; 27 | 28 | /* enable PLL */ 29 | __HAL_RCC_PLL_DISABLE(); 30 | while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 31 | ; 32 | #if (HSE_VALUE == 16000000) 33 | __HAL_RCC_PLL_CONFIG(RCC_PLLSOURCE_HSE, RCC_PREDIV_DIV1, RCC_PLL_MUL3); 34 | #elif (HSE_VALUE == 8000000) 35 | __HAL_RCC_PLL_CONFIG(RCC_PLLSOURCE_HSE, RCC_PREDIV_DIV1, RCC_PLL_MUL6); 36 | #endif 37 | __HAL_RCC_PLL_ENABLE(); 38 | while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 39 | ; 40 | 41 | RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1; 42 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 43 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 44 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 45 | 46 | HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1); 47 | 48 | __HAL_RCC_USB_CONFIG(RCC_USBCLKSOURCE_PLL); 49 | } 50 | #else 51 | void SystemClock_Config(void) 52 | { 53 | RCC_ClkInitTypeDef RCC_ClkInitStruct; 54 | RCC_CRSInitTypeDef RCC_CRSInitStruct = { 0 }; 55 | 56 | __HAL_RCC_HSI48_ENABLE(); 57 | while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) 58 | ; 59 | 60 | RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1; 61 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI48; 62 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 63 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 64 | HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1); 65 | 66 | __HAL_RCC_USB_CONFIG(RCC_USBCLKSOURCE_HSI48); 67 | 68 | /* CRS */ 69 | __HAL_RCC_CRS_CLK_ENABLE(); 70 | 71 | RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1; 72 | RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB; 73 | RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING; 74 | RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000); 75 | RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT; 76 | RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT; 77 | 78 | HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct); 79 | } 80 | #endif 81 | 82 | void SysTick_Handler(void) 83 | { 84 | HAL_IncTick(); 85 | } 86 | 87 | int main(void) 88 | { 89 | HAL_Init(); 90 | HAL_IncTick(); 91 | 92 | SystemClock_Config(); 93 | 94 | pcan_variant_io_init(); 95 | 96 | pcan_usb_init(); 97 | pcan_led_init(); 98 | pcan_timestamp_init(); 99 | pcan_protocol_init(); 100 | 101 | pcan_led_set_mode(LED_CH0_RX, LED_MODE_BLINK_SLOW, 0); 102 | pcan_led_set_mode(LED_CH0_TX, LED_MODE_BLINK_SLOW, 0); 103 | 104 | for (;;) 105 | { 106 | pcan_usb_poll(); 107 | pcan_led_poll(); 108 | pcan_protocol_poll(); 109 | } 110 | } 111 | -------------------------------------------------------------------------------- /Src/usbd_desc.c: -------------------------------------------------------------------------------- 1 | #include "usbd_conf.h" 2 | #include "usbd_core.h" 3 | 4 | #define USBD_VID 0x0C72 5 | #define USBD_PID_FS 0x000C 6 | #define USBD_LANGID_STRING 1033 7 | #define USBD_MAX_STR_DESC_SIZ 0x100U 8 | 9 | uint8_t *USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); 10 | uint8_t *USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); 11 | uint8_t *USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); 12 | uint8_t *USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); 13 | uint8_t *USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); 14 | uint8_t *USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); 15 | uint8_t *USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); 16 | 17 | __ALIGN_BEGIN uint8_t USBD_FS_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END = { 18 | 0x12, /*bLength */ 19 | USB_DESC_TYPE_DEVICE, /*bDescriptorType*/ 20 | 0x00, /*bcdUSB */ 21 | 0x01, 22 | 0x00, /*bDeviceClass*/ 23 | 0x00, /*bDeviceSubClass*/ 24 | 0x00, /*bDeviceProtocol*/ 25 | USB_MAX_EP0_SIZE, /*bMaxPacketSize*/ 26 | LOBYTE(USBD_VID), /*idVendor*/ 27 | HIBYTE(USBD_VID), /*idVendor*/ 28 | LOBYTE(USBD_PID_FS), /*idProduct*/ 29 | HIBYTE(USBD_PID_FS), /*idProduct*/ 30 | 0xff, /*bcdDevice*/ 31 | 0x54, 32 | 10, /*Index of manufacturer string*/ 33 | 4, /*Index of product string*/ 34 | 0, /*Index of serial number string*/ 35 | USBD_MAX_NUM_CONFIGURATION /*bNumConfigurations*/ 36 | }; 37 | 38 | __ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END = { USB_LEN_LANGID_STR_DESC, 39 | USB_DESC_TYPE_STRING, 40 | LOBYTE(USBD_LANGID_STRING), 41 | HIBYTE(USBD_LANGID_STRING) }; 42 | 43 | uint8_t *USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) 44 | { 45 | UNUSED(speed); 46 | *length = sizeof(USBD_FS_DeviceDesc); 47 | return USBD_FS_DeviceDesc; 48 | } 49 | 50 | uint8_t *USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) 51 | { 52 | UNUSED(speed); 53 | *length = sizeof(USBD_LangIDDesc); 54 | return USBD_LangIDDesc; 55 | } 56 | 57 | /* must be here: 1, 2 */ 58 | uint8_t *USBD_FS_HugeStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) 59 | { 60 | UNUSED(speed); 61 | /* little hack to save some flash memory */ 62 | __ALIGN_BEGIN static const uint16_t huge_descriptor[1 /*+126*/] __ALIGN_END = { 0x03FE }; 63 | *length = sizeof(huge_descriptor); 64 | return (uint8_t *)huge_descriptor; 65 | } 66 | 67 | uint8_t *USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) 68 | { 69 | UNUSED(speed); 70 | 71 | __ALIGN_BEGIN static const uint16_t cfg_descriptor[1 + 8] __ALIGN_END = { 0x0312, 'P', 'C', 'A', 'N', '-', 'U', 'S', 'B' }; 72 | *length = sizeof(cfg_descriptor); 73 | return (uint8_t *)cfg_descriptor; 74 | } 75 | 76 | USBD_DescriptorsTypeDef FS_Desc = { 77 | .GetDeviceDescriptor = USBD_FS_DeviceDescriptor, 78 | .GetLangIDStrDescriptor = USBD_FS_LangIDStrDescriptor, 79 | .GetManufacturerStrDescriptor = USBD_FS_HugeStrDescriptor, 80 | .GetProductStrDescriptor = USBD_FS_HugeStrDescriptor, 81 | .GetSerialStrDescriptor = 0, 82 | .GetConfigurationStrDescriptor = USBD_FS_ConfigStrDescriptor, 83 | .GetInterfaceStrDescriptor = 0, 84 | }; 85 | -------------------------------------------------------------------------------- /Src/usbd_helper.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | #include 3 | 4 | /* from reactOS project */ 5 | 6 | /* USB_COMMON_DESCRIPTOR.bDescriptorType constants */ 7 | #define USB_DEVICE_DESCRIPTOR_TYPE 0x01 8 | #define USB_CONFIGURATION_DESCRIPTOR_TYPE 0x02 9 | #define USB_STRING_DESCRIPTOR_TYPE 0x03 10 | #define USB_INTERFACE_DESCRIPTOR_TYPE 0x04 11 | #define USB_ENDPOINT_DESCRIPTOR_TYPE 0x05 12 | #define USB_QUALIFIER_DESCRIPTOR_TYPE 0x06 13 | #define USB_CONFIG_POWER_DESCRIPTOR_TYPE 0x07 14 | #define USB_INTERFACE_POWER_DESCRIPTOR_TYPE 0x08 15 | 16 | /* USB_ENDPOINT_DESCRIPTOR.bmAttributes constants */ 17 | #define USB_ENDPOINT_TYPE_MASK 0x03 18 | #define USB_ENDPOINT_TYPE_CONTROL 0x00 19 | #define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01 20 | #define USB_ENDPOINT_TYPE_BULK 0x02 21 | #define USB_ENDPOINT_TYPE_INTERRUPT 0x03 22 | 23 | /* USB_CONFIGURATION_DESCRIPTOR.bmAttributes constants */ 24 | #define USB_CONFIG_POWERED_MASK 0xc0 25 | #define USB_CONFIG_BUS_POWERED 0x80 26 | #ifndef USB_CONFIG_SELF_POWERED 27 | #define USB_CONFIG_SELF_POWERED 0x40 28 | #endif 29 | #ifndef USB_CONFIG_REMOTE_WAKEUP 30 | #define USB_CONFIG_REMOTE_WAKEUP 0x20 31 | #endif 32 | 33 | #define USB_DEVICE_CLASS_RESERVED 0x00 34 | #define USB_DEVICE_CLASS_AUDIO 0x01 35 | #define USB_DEVICE_CLASS_COMMUNICATIONS 0x02 36 | #define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03 37 | #define USB_DEVICE_CLASS_MONITOR 0x04 38 | #define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05 39 | #define USB_DEVICE_CLASS_POWER 0x06 40 | #define USB_DEVICE_CLASS_PRINTER 0x07 41 | #define USB_DEVICE_CLASS_STORAGE 0x08 42 | #define USB_DEVICE_CLASS_HUB 0x09 43 | #define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF 44 | 45 | #pragma pack(push, 1) 46 | typedef struct _USB_COMMON_DESCRIPTOR 47 | { 48 | uint8_t bLength; 49 | uint8_t bDescriptorType; 50 | } USB_COMMON_DESCRIPTOR, *PUSB_COMMON_DESCRIPTOR; 51 | 52 | typedef struct _USB_CONFIGURATION_DESCRIPTOR 53 | { 54 | uint8_t bLength; 55 | uint8_t bDescriptorType; 56 | uint16_t wTotalLength; 57 | uint8_t bNumInterfaces; 58 | uint8_t bConfigurationValue; 59 | uint8_t iConfiguration; 60 | uint8_t bmAttributes; 61 | uint8_t MaxPower; 62 | } USB_CONFIGURATION_DESCRIPTOR, *PUSB_CONFIGURATION_DESCRIPTOR; 63 | 64 | typedef struct _USB_DEVICE_DESCRIPTOR 65 | { 66 | uint8_t bLength; 67 | uint8_t bDescriptorType; 68 | uint16_t bcdUSB; 69 | uint8_t bDeviceClass; 70 | uint8_t bDeviceSubClass; 71 | uint8_t bDeviceProtocol; 72 | uint8_t bMaxPacketSize0; 73 | uint16_t idVendor; 74 | uint16_t idProduct; 75 | uint16_t bcdDevice; 76 | uint8_t iManufacturer; 77 | uint8_t iProduct; 78 | uint8_t iSerialNumber; 79 | uint8_t bNumConfigurations; 80 | } USB_DEVICE_DESCRIPTOR, *PUSB_DEVICE_DESCRIPTOR; 81 | 82 | typedef struct _USB_DEVICE_QUALIFIER_DESCRIPTOR 83 | { 84 | uint8_t bLength; 85 | uint8_t bDescriptorType; 86 | uint16_t bcdUSB; 87 | uint8_t bDeviceClass; 88 | uint8_t bDeviceSubClass; 89 | uint8_t bDeviceProtocol; 90 | uint8_t bMaxPacketSize0; 91 | uint8_t bNumConfigurations; 92 | uint8_t bReserved; 93 | } USB_DEVICE_QUALIFIER_DESCRIPTOR, *PUSB_DEVICE_QUALIFIER_DESCRIPTOR; 94 | 95 | typedef enum _USB_DEVICE_SPEED 96 | { 97 | UsbLowSpeed, 98 | UsbFullSpeed, 99 | UsbHighSpeed, 100 | UsbSuperSpeed 101 | } USB_DEVICE_SPEED; 102 | 103 | typedef struct _USB_ENDPOINT_DESCRIPTOR 104 | { 105 | uint8_t bLength; 106 | uint8_t bDescriptorType; 107 | uint8_t bEndpointAddress; 108 | uint8_t bmAttributes; 109 | uint16_t wMaxPacketSize; 110 | uint8_t bInterval; 111 | } USB_ENDPOINT_DESCRIPTOR, *PUSB_ENDPOINT_DESCRIPTOR; 112 | 113 | typedef struct _USB_INTERFACE_DESCRIPTOR 114 | { 115 | uint8_t bLength; 116 | uint8_t bDescriptorType; 117 | uint8_t bInterfaceNumber; 118 | uint8_t bAlternateSetting; 119 | uint8_t bNumEndpoints; 120 | uint8_t bInterfaceClass; 121 | uint8_t bInterfaceSubClass; 122 | uint8_t bInterfaceProtocol; 123 | uint8_t iInterface; 124 | } USB_INTERFACE_DESCRIPTOR, *PUSB_INTERFACE_DESCRIPTOR; 125 | 126 | typedef struct _USB_STRING_DESCRIPTOR 127 | { 128 | uint8_t bLength; 129 | uint8_t bDescriptorType; 130 | uint16_t bString[1]; 131 | } USB_STRING_DESCRIPTOR, *PUSB_STRING_DESCRIPTOR; 132 | 133 | #pragma pack(pop) 134 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_cortex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CORTEX HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32F0xx_HAL_CORTEX_H 22 | #define __STM32F0xx_HAL_CORTEX_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f0xx_hal_def.h" 30 | 31 | /** @addtogroup STM32F0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup CORTEX CORTEX 36 | * @{ 37 | */ 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | 41 | /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants 42 | * @{ 43 | */ 44 | 45 | /** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source 46 | * @{ 47 | */ 48 | #define SYSTICK_CLKSOURCE_HCLK_DIV8 (0x00000000U) 49 | #define SYSTICK_CLKSOURCE_HCLK (0x00000004U) 50 | 51 | /** 52 | * @} 53 | */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /* Exported Macros -----------------------------------------------------------*/ 60 | 61 | /* Exported functions --------------------------------------------------------*/ 62 | /** @addtogroup CORTEX_Exported_Functions CORTEX Exported Functions 63 | * @{ 64 | */ 65 | /** @addtogroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions 66 | * @brief Initialization and Configuration functions 67 | * @{ 68 | */ 69 | /* Initialization and de-initialization functions *******************************/ 70 | void HAL_NVIC_SetPriority(IRQn_Type IRQn,uint32_t PreemptPriority, uint32_t SubPriority); 71 | void HAL_NVIC_EnableIRQ(IRQn_Type IRQn); 72 | void HAL_NVIC_DisableIRQ(IRQn_Type IRQn); 73 | void HAL_NVIC_SystemReset(void); 74 | uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb); 75 | /** 76 | * @} 77 | */ 78 | 79 | /** @addtogroup CORTEX_Exported_Functions_Group2 Peripheral Control functions 80 | * @brief Cortex control functions 81 | * @{ 82 | */ 83 | 84 | /* Peripheral Control functions *************************************************/ 85 | uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn); 86 | uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn); 87 | void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn); 88 | void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn); 89 | void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource); 90 | void HAL_SYSTICK_IRQHandler(void); 91 | void HAL_SYSTICK_Callback(void); 92 | /** 93 | * @} 94 | */ 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | /* Private types -------------------------------------------------------------*/ 101 | /* Private variables ---------------------------------------------------------*/ 102 | /* Private constants ---------------------------------------------------------*/ 103 | /* Private macros ------------------------------------------------------------*/ 104 | /** @defgroup CORTEX_Private_Macros CORTEX Private Macros 105 | * @{ 106 | */ 107 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x4) 108 | 109 | #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00) 110 | 111 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \ 112 | ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8)) 113 | /** 114 | * @} 115 | */ 116 | 117 | /** 118 | * @} 119 | */ 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | #ifdef __cplusplus 126 | } 127 | #endif 128 | 129 | #endif /* __STM32F0xx_HAL_CORTEX_H */ 130 | 131 | 132 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 133 | 134 | -------------------------------------------------------------------------------- /.clang-format: -------------------------------------------------------------------------------- 1 | --- 2 | Language: Cpp 3 | DisableFormat: false 4 | # BasedOnStyle: WebKit 5 | Standard: Latest 6 | ColumnLimit: 180 7 | UseTab: Never 8 | TabWidth: 4 9 | IndentWidth: 4 10 | ConstructorInitializerIndentWidth: 4 11 | ContinuationIndentWidth: 4 12 | # The extra indent or outdent of access modifiers, e.g. public:. 13 | AccessModifierOffset: -4 14 | # DeriveLineEnding: true 15 | UseCRLF: true 16 | # DerivePointerAlignment: false 17 | PointerAlignment: Right 18 | 19 | # clang-format 14 20 | ReferenceAlignment: Right 21 | 22 | # clang-format 14 23 | # PackConstructorInitializers: CurrentLine 24 | 25 | # clang-format 14 26 | # SeparateDefinitionBlocks: Always 27 | 28 | AlignAfterOpenBracket: Align 29 | AlignArrayOfStructures: Left 30 | AlignConsecutiveAssignments: AcrossEmptyLinesAndComments 31 | AlignConsecutiveBitFields: AcrossEmptyLinesAndComments 32 | AlignConsecutiveDeclarations: AcrossComments 33 | AlignConsecutiveMacros: AcrossComments 34 | AlignEscapedNewlines: Left 35 | AlignOperands: AlignAfterOperator 36 | AlignTrailingComments: true 37 | AllowAllArgumentsOnNextLine: true 38 | AllowAllParametersOfDeclarationOnNextLine: false 39 | AllowShortBlocksOnASingleLine: Always 40 | AllowShortCaseLabelsOnASingleLine: false 41 | AllowShortEnumsOnASingleLine: false 42 | AllowShortFunctionsOnASingleLine: None 43 | # AllowShortIfStatementsOnASingleLine: AllIfsAndElse 44 | AllowShortLambdasOnASingleLine: Inline 45 | AllowShortLoopsOnASingleLine: true 46 | AlwaysBreakAfterReturnType: None 47 | AlwaysBreakBeforeMultilineStrings: false 48 | AlwaysBreakTemplateDeclarations: Yes 49 | BinPackArguments: false 50 | BinPackParameters: false 51 | # trailing comma insertion cannot be used with bin packing 52 | InsertTrailingCommas: Wrapped 53 | BitFieldColonSpacing: Both 54 | 55 | # Allman Custom 56 | BreakBeforeBraces: Custom 57 | 58 | # If BreakBeforeBraces is set to Custom, 59 | # use this to specify how each individual brace case should be handled. Otherwise, this is ignored. 60 | BraceWrapping: 61 | AfterCaseLabel: true 62 | AfterClass: true 63 | AfterControlStatement: Always 64 | AfterEnum: true 65 | AfterFunction: true 66 | AfterNamespace: true 67 | AfterStruct: true 68 | AfterUnion: true 69 | AfterExternBlock: false 70 | BeforeCatch: true 71 | BeforeElse: true 72 | BeforeLambdaBody: true 73 | BeforeWhile: false 74 | IndentBraces: false 75 | SplitEmptyFunction: true 76 | SplitEmptyRecord: true 77 | SplitEmptyNamespace: true 78 | 79 | BreakBeforeBinaryOperators: NonAssignment 80 | BreakBeforeConceptDeclarations: true 81 | BreakBeforeTernaryOperators: true 82 | BreakConstructorInitializers: BeforeComma 83 | BreakInheritanceList: BeforeComma 84 | BreakStringLiterals: false 85 | CompactNamespaces: false 86 | Cpp11BracedListStyle: false 87 | EmptyLineBeforeAccessModifier: LogicalBlock 88 | FixNamespaceComments: true 89 | ForEachMacros: 90 | - foreach 91 | - Q_FOREACH 92 | - BOOST_FOREACH 93 | IncludeBlocks: Merge 94 | IndentAccessModifiers: false 95 | IndentCaseBlocks: true 96 | IndentCaseLabels: true 97 | IndentExternBlock: AfterExternBlock 98 | IndentGotoLabels: false 99 | IndentPPDirectives: None 100 | IndentRequires: false 101 | IndentWrappedFunctionNames: false 102 | KeepEmptyLinesAtTheStartOfBlocks: false 103 | MaxEmptyLinesToKeep: 2 104 | NamespaceIndentation: None 105 | 106 | PenaltyBreakAssignment: 20 107 | # The penalty for breaking a function call after call( 108 | PenaltyBreakBeforeFirstCallParameter: 20 109 | PenaltyBreakComment: 300 110 | # The penalty for breaking before the first << 111 | PenaltyBreakFirstLessLess: 120 112 | PenaltyBreakString: 1000 113 | PenaltyBreakTemplateDeclaration: 10 114 | PenaltyExcessCharacter: 1000000 115 | PenaltyIndentedWhitespace: 0 116 | PenaltyReturnTypeOnItsOwnLine: 60 117 | 118 | ReflowComments: true 119 | SortIncludes: CaseSensitive 120 | SortUsingDeclarations: true 121 | SpaceAfterCStyleCast: false 122 | SpaceAfterLogicalNot: false 123 | SpaceAfterTemplateKeyword: true 124 | SpaceAroundPointerQualifiers: Default 125 | SpaceBeforeAssignmentOperators: true 126 | SpaceBeforeCaseColon: false 127 | SpaceBeforeCpp11BracedList: true 128 | SpaceBeforeCtorInitializerColon: true 129 | SpaceBeforeInheritanceColon: true 130 | SpaceBeforeParens: ControlStatementsExceptControlMacros 131 | SpaceBeforeRangeBasedForLoopColon: true 132 | SpaceBeforeSquareBrackets: false 133 | SpaceInEmptyBlock: false 134 | SpaceInEmptyParentheses: false 135 | SpacesBeforeTrailingComments: 1 136 | SpacesInCStyleCastParentheses: false 137 | SpacesInConditionalStatement: false 138 | SpacesInContainerLiterals: true 139 | SpacesInParentheses: false 140 | SpacesInSquareBrackets: false 141 | StatementAttributeLikeMacros: 142 | - Q_EMIT 143 | StatementMacros: 144 | - Q_UNUSED 145 | - QT_REQUIRE_VERSION 146 | WhitespaceSensitiveMacros: 147 | - STRINGIZE 148 | - PP_STRINGIZE 149 | - BOOST_PP_STRINGIZE 150 | - NS_SWIFT_NAME 151 | - CF_SWIFT_NAME 152 | ... 153 | -------------------------------------------------------------------------------- /Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_ioreq.c 4 | * @author MCD Application Team 5 | * @brief This file provides the IO requests APIs for control endpoints. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2015 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under Ultimate Liberty license 13 | * SLA0044, the "License"; You may not use this file except in compliance with 14 | * the License. You may obtain a copy of the License at: 15 | * www.st.com/SLA0044 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "usbd_ioreq.h" 22 | 23 | /** @addtogroup STM32_USB_DEVICE_LIBRARY 24 | * @{ 25 | */ 26 | 27 | 28 | /** @defgroup USBD_IOREQ 29 | * @brief control I/O requests module 30 | * @{ 31 | */ 32 | 33 | /** @defgroup USBD_IOREQ_Private_TypesDefinitions 34 | * @{ 35 | */ 36 | /** 37 | * @} 38 | */ 39 | 40 | 41 | /** @defgroup USBD_IOREQ_Private_Defines 42 | * @{ 43 | */ 44 | 45 | /** 46 | * @} 47 | */ 48 | 49 | 50 | /** @defgroup USBD_IOREQ_Private_Macros 51 | * @{ 52 | */ 53 | /** 54 | * @} 55 | */ 56 | 57 | 58 | /** @defgroup USBD_IOREQ_Private_Variables 59 | * @{ 60 | */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | 67 | /** @defgroup USBD_IOREQ_Private_FunctionPrototypes 68 | * @{ 69 | */ 70 | /** 71 | * @} 72 | */ 73 | 74 | 75 | /** @defgroup USBD_IOREQ_Private_Functions 76 | * @{ 77 | */ 78 | 79 | /** 80 | * @brief USBD_CtlSendData 81 | * send data on the ctl pipe 82 | * @param pdev: device instance 83 | * @param buff: pointer to data buffer 84 | * @param len: length of data to be sent 85 | * @retval status 86 | */ 87 | USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev, 88 | uint8_t *pbuf, uint16_t len) 89 | { 90 | /* Set EP0 State */ 91 | pdev->ep0_state = USBD_EP0_DATA_IN; 92 | pdev->ep_in[0].total_length = len; 93 | pdev->ep_in[0].rem_length = len; 94 | 95 | /* Start the transfer */ 96 | USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 97 | 98 | return USBD_OK; 99 | } 100 | 101 | /** 102 | * @brief USBD_CtlContinueSendData 103 | * continue sending data on the ctl pipe 104 | * @param pdev: device instance 105 | * @param buff: pointer to data buffer 106 | * @param len: length of data to be sent 107 | * @retval status 108 | */ 109 | USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev, 110 | uint8_t *pbuf, uint16_t len) 111 | { 112 | /* Start the next transfer */ 113 | USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 114 | 115 | return USBD_OK; 116 | } 117 | 118 | /** 119 | * @brief USBD_CtlPrepareRx 120 | * receive data on the ctl pipe 121 | * @param pdev: device instance 122 | * @param buff: pointer to data buffer 123 | * @param len: length of data to be received 124 | * @retval status 125 | */ 126 | USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev, 127 | uint8_t *pbuf, uint16_t len) 128 | { 129 | /* Set EP0 State */ 130 | pdev->ep0_state = USBD_EP0_DATA_OUT; 131 | pdev->ep_out[0].total_length = len; 132 | pdev->ep_out[0].rem_length = len; 133 | 134 | /* Start the transfer */ 135 | USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 136 | 137 | return USBD_OK; 138 | } 139 | 140 | /** 141 | * @brief USBD_CtlContinueRx 142 | * continue receive data on the ctl pipe 143 | * @param pdev: device instance 144 | * @param buff: pointer to data buffer 145 | * @param len: length of data to be received 146 | * @retval status 147 | */ 148 | USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev, 149 | uint8_t *pbuf, uint16_t len) 150 | { 151 | USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 152 | 153 | return USBD_OK; 154 | } 155 | 156 | /** 157 | * @brief USBD_CtlSendStatus 158 | * send zero lzngth packet on the ctl pipe 159 | * @param pdev: device instance 160 | * @retval status 161 | */ 162 | USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev) 163 | { 164 | /* Set EP0 State */ 165 | pdev->ep0_state = USBD_EP0_STATUS_IN; 166 | 167 | /* Start the transfer */ 168 | USBD_LL_Transmit(pdev, 0x00U, NULL, 0U); 169 | 170 | return USBD_OK; 171 | } 172 | 173 | /** 174 | * @brief USBD_CtlReceiveStatus 175 | * receive zero lzngth packet on the ctl pipe 176 | * @param pdev: device instance 177 | * @retval status 178 | */ 179 | USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev) 180 | { 181 | /* Set EP0 State */ 182 | pdev->ep0_state = USBD_EP0_STATUS_OUT; 183 | 184 | /* Start the transfer */ 185 | USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 186 | 187 | return USBD_OK; 188 | } 189 | 190 | /** 191 | * @brief USBD_GetRxCount 192 | * returns the received data length 193 | * @param pdev: device instance 194 | * @param ep_addr: endpoint address 195 | * @retval Rx Data blength 196 | */ 197 | uint32_t USBD_GetRxCount(USBD_HandleTypeDef *pdev, uint8_t ep_addr) 198 | { 199 | return USBD_LL_GetRxDataSize(pdev, ep_addr); 200 | } 201 | 202 | /** 203 | * @} 204 | */ 205 | 206 | 207 | /** 208 | * @} 209 | */ 210 | 211 | 212 | /** 213 | * @} 214 | */ 215 | 216 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 217 | -------------------------------------------------------------------------------- /Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_core.h 4 | * @author MCD Application Team 5 | * @brief Header file for usbd_core.c file 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2015 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under Ultimate Liberty license 13 | * SLA0044, the "License"; You may not use this file except in compliance with 14 | * the License. You may obtain a copy of the License at: 15 | * www.st.com/SLA0044 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __USBD_CORE_H 22 | #define __USBD_CORE_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "usbd_conf.h" 30 | #include "usbd_def.h" 31 | #include "usbd_ioreq.h" 32 | #include "usbd_ctlreq.h" 33 | 34 | /** @addtogroup STM32_USB_DEVICE_LIBRARY 35 | * @{ 36 | */ 37 | 38 | /** @defgroup USBD_CORE 39 | * @brief This file is the Header file for usbd_core.c file 40 | * @{ 41 | */ 42 | 43 | 44 | /** @defgroup USBD_CORE_Exported_Defines 45 | * @{ 46 | */ 47 | #ifndef USBD_DEBUG_LEVEL 48 | #define USBD_DEBUG_LEVEL 0U 49 | #endif /* USBD_DEBUG_LEVEL */ 50 | /** 51 | * @} 52 | */ 53 | 54 | 55 | /** @defgroup USBD_CORE_Exported_TypesDefinitions 56 | * @{ 57 | */ 58 | 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | 65 | 66 | /** @defgroup USBD_CORE_Exported_Macros 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @defgroup USBD_CORE_Exported_Variables 75 | * @{ 76 | */ 77 | #define USBD_SOF USBD_LL_SOF 78 | /** 79 | * @} 80 | */ 81 | 82 | /** @defgroup USBD_CORE_Exported_FunctionsPrototype 83 | * @{ 84 | */ 85 | USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id); 86 | USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev); 87 | USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev); 88 | USBD_StatusTypeDef USBD_Stop(USBD_HandleTypeDef *pdev); 89 | USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass); 90 | 91 | USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev); 92 | USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx); 93 | USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx); 94 | 95 | USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup); 96 | USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata); 97 | USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata); 98 | 99 | USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev); 100 | USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed); 101 | USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev); 102 | USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev); 103 | 104 | USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev); 105 | USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum); 106 | USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum); 107 | 108 | USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev); 109 | USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev); 110 | 111 | /* USBD Low Level Driver */ 112 | USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev); 113 | USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev); 114 | USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev); 115 | USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev); 116 | USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, 117 | uint8_t ep_addr, 118 | uint8_t ep_type, 119 | uint16_t ep_mps); 120 | 121 | USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr); 122 | USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr); 123 | USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr); 124 | USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr); 125 | uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr); 126 | USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr); 127 | USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, 128 | uint8_t ep_addr, 129 | uint8_t *pbuf, 130 | uint16_t size); 131 | 132 | USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, 133 | uint8_t ep_addr, 134 | uint8_t *pbuf, 135 | uint16_t size); 136 | 137 | uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr); 138 | void USBD_LL_Delay(uint32_t Delay); 139 | 140 | /** 141 | * @} 142 | */ 143 | 144 | #ifdef __cplusplus 145 | } 146 | #endif 147 | 148 | #endif /* __USBD_CORE_H */ 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /** 155 | * @} 156 | */ 157 | 158 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 159 | 160 | 161 | 162 | -------------------------------------------------------------------------------- /Drivers/CMSIS/README.md: -------------------------------------------------------------------------------- 1 | # CMSIS Version 5 2 | 3 | The branch *master* of this GitHub repository contains the CMSIS Version 5.4.0. The [documentation](http://arm-software.github.io/CMSIS_5/General/html/index.html) is available under http://arm-software.github.io/CMSIS_5/General/html/index.html 4 | 5 | Use [Issues](https://github.com/ARM-software/CMSIS_5#issues-and-labels) to provide feedback and report problems for CMSIS Version 5. 6 | 7 | **Note:** The branch *develop* of this GitHub repository reflects our current state of development and is constantly updated. It gives our users and partners contiguous access to the CMSIS development. It allows you to review the work and provide feedback or create pull requests for contributions. 8 | 9 | A [pre-built documentation](http://www.keil.com/pack/doc/CMSIS_Dev/index.html) is updated from time to time, but may be also generated using the instructions under [Generate CMSIS Pack for Release](https://github.com/ARM-software/CMSIS_5#generate-cmsis-pack-for-release). 10 | 11 | ## Implemented Enhancements 12 | - CMSIS-Core-A, RTX5: implementation for Cortex-A5/A7/A9 13 | - Support for Armv8-M Architecture (Mainline and Baseline) as well as devices Cortex-M23 and Cortex-M33 14 | - CMSIS-RTOS2: RTX 5 is now available for IAR, GCC, Arm Compiler 5, Arm Compiler 6 15 | - CMSIS-RTOS2: FreeRTOS adoption (release) is available https://github.com/ARM-software/CMSIS-FreeRTOS 16 | - CMSIS-NN: Bare metal Neural Network function library. 17 | - CMSIS-DAP v2: with WinUSB for faster communication and separate pipe for SWO support 18 | - Config Wizard extension: access enum’s for configuration information 19 | 20 | ## Further Planned Enhancements 21 | - CMSIS-Zone: management of complex system 22 | - CMSIS-Pack: 23 | - System Description SDF Format: describe more complex debug topologies than with a Debug Description in a tool agnostic way 24 | - Github based workflow: allows to develop software packs using github infra-structure 25 | - Flash algorithm via debugger: Some TurstZone enable devices cannot execute RAM. Commands that allow flash programming will be added to Debug Description. 26 | - CPDSC project file format: allows project templates that are agnostic of an IDE 27 | - Minimize need for IDE specific settings: CMSIS-Pack supports IDE specific parameters. Analyze and minimize 28 | 29 | For further details see also the [Slides of the Embedded World CMSIS Partner Meeting](https://github.com/ARM-software/CMSIS_5/blob/develop/CMSIS_EW2018.pdf). 30 | 31 | ## Directory Structure 32 | 33 | | Directory | Content | 34 | | --------------- | ---------------------------------------------- | 35 | | CMSIS/Core | CMSIS-Core related files (for release) | 36 | | CMSIS/DAP | CMSIS-DAP related files and examples | 37 | | CMSIS/Driver | CMSIS-Driver API headers and template files | 38 | | CMSIS/DSP | CMSIS-DSP related files | 39 | | CMSIS/NN | CMSIS-NN related files | 40 | | CMSIS/RTOS | RTOS v1 related files (for Cortex-M) | 41 | | CMSIS/RTOS2 | RTOS v2 related files (for Cortex-M & Armv8-M) | 42 | | CMSIS/Pack | CMSIS-Pack examples and tutorials | 43 | | CMSIS/DoxyGen | Source of the documentation | 44 | | CMSIS/Utilities | Utility programs | 45 | 46 | ## Generate CMSIS Pack for Release 47 | 48 | This GitHub development repository contains already pre-built libraries of various software components (DSP, RTOS, RTOS2). 49 | These libraries are validated for release. 50 | 51 | To build a complete CMSIS pack for installation the following additional tools are required: 52 | - **doxygen.exe** Version: 1.8.6 (Documentation Generator) 53 | - **mscgen.exe** Version: 0.20 (Message Sequence Chart Converter) 54 | - **7z.exe (7-Zip)** Version: 16.02 (File Archiver) 55 | 56 | Using these tools, you can generate on a Windows PC: 57 | - **CMSIS Software Pack** using the batch file **gen_pack.bat** (located in ./CMSIS/Utilities). This batch file also generates the documentation. 58 | 59 | - **CMSIS Documentation** using the batch file **genDoc.bat** (located in ./CMSIS/Doxygen). 60 | 61 | The file ./CMSIS/DoxyGen/How2Doc.txt describes the rules for creating API documentation. 62 | 63 | ## License 64 | 65 | Arm CMSIS is licensed under Apache-2.0. 66 | 67 | ## Contributions and Pull Requests 68 | 69 | Contributions are accepted under Apache-2.0. Only submit contributions where you have authored all of the code. 70 | 71 | ### Issues and Labels 72 | 73 | Please feel free to raise an [issue on GitHub](https://github.com/ARM-software/CMSIS_5/issues) 74 | to report misbehavior (i.e. bugs) or start discussions about enhancements. This 75 | is your best way to interact directly with the maintenance team and the community. 76 | We encourage you to append implementation suggestions as this helps to decrease the 77 | workload of the very limited maintenance team. 78 | 79 | We will be monitoring and responding to issues as best we can. 80 | Please attempt to avoid filing duplicates of open or closed items when possible. 81 | In the spirit of openness we will be tagging issues with the following: 82 | 83 | - **bug** – We consider this issue to be a bug that will be investigated. 84 | 85 | - **wontfix** - We appreciate this issue but decided not to change the current behavior. 86 | 87 | - **enhancement** – Denotes something that will be implemented soon. 88 | 89 | - **future** - Denotes something not yet schedule for implementation. 90 | 91 | - **out-of-scope** - We consider this issue loosely related to CMSIS. It might by implemented outside of CMSIS. Let us know about your work. 92 | 93 | - **question** – We have further questions to this issue. Please review and provide feedback. 94 | 95 | - **documentation** - This issue is a documentation flaw that will be improved in future. 96 | 97 | - **review** - This issue is under review. Please be patient. 98 | 99 | - **DONE** - We consider this issue as resolved - please review and close it. In case of no further activity this issues will be closed after a week. 100 | 101 | - **duplicate** - This issue is already addressed elsewhere, see comment with provided references. 102 | 103 | - **Important Information** - We provide essential informations regarding planned or resolved major enhancements. 104 | 105 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | # ------------------------------------------------ 2 | # Generic Makefile (based on gcc) 3 | # 4 | # ChangeLog : 5 | # 2017-02-10 - Several enhancements + project update mode 6 | # 2015-07-22 - first version 7 | # ------------------------------------------------ 8 | 9 | ###################################### 10 | # target 11 | ###################################### 12 | TARGET = pcan_$(BOARD)_hw 13 | TARGET_VARIANT = $(shell echo $(BOARD) | tr '[:lower:]' '[:upper:]') 14 | 15 | ####################################### 16 | # paths 17 | ####################################### 18 | # Build path 19 | BUILD_DIR = build-$(BOARD) 20 | 21 | ###################################### 22 | # source 23 | ###################################### 24 | # C sources 25 | C_SOURCES = \ 26 | Src/main.c \ 27 | Src/usbd_conf.c \ 28 | Src/usbd_desc.c \ 29 | Src/pcan_usb.c \ 30 | Src/pcan_can.c \ 31 | Src/pcan_led.c \ 32 | Src/pcan_protocol.c \ 33 | Src/pcan_timestamp.c \ 34 | Src/system_stm32f0xx.c \ 35 | Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c \ 36 | Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c \ 37 | Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c \ 38 | Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c \ 39 | Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c \ 40 | Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c \ 41 | Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c \ 42 | Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c \ 43 | Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_can.c \ 44 | Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c \ 45 | Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c \ 46 | Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c \ 47 | 48 | # ASM sources 49 | ASM_SOURCES = \ 50 | startup_stm32f042x6.s 51 | 52 | 53 | ####################################### 54 | # binaries 55 | ####################################### 56 | PREFIX = arm-none-eabi- 57 | # The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx) 58 | # either it can be added to the PATH environment variable. 59 | ifdef GCC_PATH 60 | CC = $(GCC_PATH)/$(PREFIX)gcc 61 | AS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cpp 62 | CP = $(GCC_PATH)/$(PREFIX)objcopy 63 | SZ = $(GCC_PATH)/$(PREFIX)size 64 | else 65 | CC = $(PREFIX)gcc 66 | AS = $(PREFIX)gcc -x assembler-with-cpp 67 | CP = $(PREFIX)objcopy 68 | SZ = $(PREFIX)size 69 | endif 70 | HEX = $(CP) -O ihex 71 | BIN = $(CP) -O binary -S 72 | 73 | ####################################### 74 | # CFLAGS 75 | ####################################### 76 | # cpu 77 | CPU = -mcpu=cortex-m0 78 | 79 | # fpu 80 | # NONE for Cortex-M0/M0+/M3 81 | 82 | # float-abi 83 | 84 | 85 | # mcu 86 | MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI) 87 | 88 | # macros for gcc 89 | # AS defines 90 | AS_DEFS = 91 | 92 | # C defines 93 | C_DEFS = \ 94 | -DUSE_HAL_DRIVER \ 95 | -DSTM32F042x6 \ 96 | -DNDEBUG \ 97 | $(BOARD_DEFS) 98 | 99 | 100 | # AS includes 101 | AS_INCLUDES = 102 | 103 | # C includes 104 | C_INCLUDES = \ 105 | -ISrc \ 106 | -IDrivers/STM32F0xx_HAL_Driver/Inc \ 107 | -IMiddlewares/ST/STM32_USB_Device_Library/Core/Inc \ 108 | -IDrivers/CMSIS/Device/ST/STM32F0xx/Include \ 109 | -IDrivers/CMSIS/Include 110 | 111 | 112 | # compile gcc flags 113 | ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fno-common -fdata-sections -ffunction-sections 114 | 115 | CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -Wpedantic -Wextra -fno-common -fdata-sections -ffunction-sections -std=c99 \ 116 | $(BOARD_FLAGS) \ 117 | -D$(TARGET_VARIANT) 118 | 119 | ifeq ($(DEBUG), 1) 120 | CFLAGS += -g -gdwarf-2 121 | endif 122 | 123 | 124 | # Generate dependency information 125 | CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" 126 | 127 | 128 | ####################################### 129 | # LDFLAGS 130 | ####################################### 131 | # link script 132 | LDSCRIPT = STM32F042C6Tx_FLASH.ld 133 | 134 | # libraries 135 | LIBS = -lc -lm -lnosys 136 | LIBDIR = 137 | LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections 138 | 139 | .PHONY : all 140 | 141 | # default action: build all 142 | all: cantact_16 cantact_8 entree canable ollie sh_c30a 143 | 144 | cantact_16: 145 | $(MAKE) BOARD=cantact_16 DEBUG=0 OPT=-Os BOARD_FLAGS='-DHSE_VALUE=16000000' elf hex bin 146 | 147 | cantact_8: 148 | $(MAKE) BOARD=cantact_8 DEBUG=0 OPT=-Os BOARD_FLAGS='-DHSE_VALUE=8000000' elf hex bin 149 | 150 | entree: 151 | $(MAKE) BOARD=entree DEBUG=0 OPT=-Os BOARD_FLAGS='-DHSE_VALUE=0' elf hex bin 152 | 153 | canable: 154 | $(MAKE) BOARD=canable DEBUG=0 OPT=-Os BOARD_FLAGS='-DHSE_VALUE=0' elf hex bin 155 | 156 | ollie: 157 | $(MAKE) BOARD=ollie DEBUG=0 OPT=-Os BOARD_FLAGS='-DHSE_VALUE=0' elf hex bin 158 | 159 | sh_c30a: 160 | $(MAKE) BOARD=sh_c30a DEBUG=0 OPT=-Os BOARD_FLAGS='-DHSE_VALUE=24000000' elf hex bin 161 | 162 | ####################################### 163 | # build the application 164 | ####################################### 165 | # list of objects 166 | OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o))) 167 | vpath %.c $(sort $(dir $(C_SOURCES))) 168 | # list of ASM program objects 169 | OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o))) 170 | vpath %.s $(sort $(dir $(ASM_SOURCES))) 171 | 172 | ELF_TARGET = $(BUILD_DIR)/$(TARGET).elf 173 | BIN_TARGET = $(BUILD_DIR)/$(TARGET).bin 174 | HEX_TARGET = $(BUILD_DIR)/$(TARGET).hex 175 | 176 | $(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR) 177 | $(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@ 178 | 179 | $(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR) 180 | $(AS) -c $(CFLAGS) $< -o $@ 181 | 182 | $(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile 183 | $(CC) $(OBJECTS) $(LDFLAGS) -o $@ 184 | $(SZ) $@ 185 | 186 | $(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR) 187 | $(HEX) $< $@ 188 | 189 | $(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR) 190 | $(BIN) $< $@ 191 | 192 | $(BUILD_DIR): 193 | mkdir $@ 194 | 195 | bin: $(BIN_TARGET) 196 | 197 | elf: $(ELF_TARGET) 198 | 199 | hex: $(HEX_TARGET) 200 | 201 | ####################################### 202 | # clean up 203 | ####################################### 204 | clean: 205 | -rm -fR $(BUILD_DIR)* 206 | 207 | clean_obj: 208 | -rm -f $(BUILD_DIR)*/*.o $(BUILD_DIR)*/*.d $(BUILD_DIR)*/*.lst 209 | 210 | ####################################### 211 | # dependencies 212 | ####################################### 213 | -include $(wildcard $(BUILD_DIR)/*.d) 214 | 215 | # *** EOF *** 216 | -------------------------------------------------------------------------------- /STM32F042C6Tx_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ****************************************************************************** 3 | ** 4 | 5 | ** File : LinkerScript.ld 6 | ** 7 | ** Author : Auto-generated by System Workbench for STM32 8 | ** 9 | ** Abstract : Linker script for STM32F042C6Tx series 10 | ** 32Kbytes FLASH and 6Kbytes RAM 11 | ** 12 | ** Set heap size, stack size and stack location according 13 | ** to application requirements. 14 | ** 15 | ** Set memory bank area and size if external memory is used. 16 | ** 17 | ** Target : STMicroelectronics STM32 18 | ** 19 | ** Distribution: The file is distributed “as is,” without any warranty 20 | ** of any kind. 21 | ** 22 | ***************************************************************************** 23 | ** @attention 24 | ** 25 | **

© COPYRIGHT(c) 2019 STMicroelectronics

26 | ** 27 | ** Redistribution and use in source and binary forms, with or without modification, 28 | ** are permitted provided that the following conditions are met: 29 | ** 1. Redistributions of source code must retain the above copyright notice, 30 | ** this list of conditions and the following disclaimer. 31 | ** 2. Redistributions in binary form must reproduce the above copyright notice, 32 | ** this list of conditions and the following disclaimer in the documentation 33 | ** and/or other materials provided with the distribution. 34 | ** 3. Neither the name of STMicroelectronics nor the names of its contributors 35 | ** may be used to endorse or promote products derived from this software 36 | ** without specific prior written permission. 37 | ** 38 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 39 | ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 40 | ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 41 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 42 | ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 43 | ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 44 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 45 | ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 46 | ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 47 | ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 | ** 49 | ***************************************************************************** 50 | */ 51 | 52 | /* Entry Point */ 53 | ENTRY(Reset_Handler) 54 | 55 | /* Highest address of the user mode stack */ 56 | _estack = 0x20001800; /* end of RAM */ 57 | /* Generate a link error if heap and stack don't fit into RAM */ 58 | _Min_Heap_Size = 0x000; /* required amount of heap */ 59 | _Min_Stack_Size = 0x200; /* required amount of stack */ 60 | 61 | /* Specify the memory areas */ 62 | MEMORY 63 | { 64 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 6K 65 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 16K 66 | } 67 | 68 | /* Define output sections */ 69 | SECTIONS 70 | { 71 | /* The startup code goes first into FLASH */ 72 | .isr_vector : 73 | { 74 | . = ALIGN(4); 75 | KEEP(*(.isr_vector)) /* Startup code */ 76 | . = ALIGN(4); 77 | } >FLASH 78 | 79 | /* The program code and other data goes into FLASH */ 80 | .text : 81 | { 82 | . = ALIGN(4); 83 | *(.text) /* .text sections (code) */ 84 | *(.text*) /* .text* sections (code) */ 85 | *(.glue_7) /* glue arm to thumb code */ 86 | *(.glue_7t) /* glue thumb to arm code */ 87 | *(.eh_frame) 88 | 89 | KEEP (*(.init)) 90 | KEEP (*(.fini)) 91 | 92 | . = ALIGN(4); 93 | _etext = .; /* define a global symbols at end of code */ 94 | } >FLASH 95 | 96 | /* Constant data goes into FLASH */ 97 | .rodata : 98 | { 99 | . = ALIGN(4); 100 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 101 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 102 | . = ALIGN(4); 103 | } >FLASH 104 | 105 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 106 | .ARM : { 107 | __exidx_start = .; 108 | *(.ARM.exidx*) 109 | __exidx_end = .; 110 | } >FLASH 111 | 112 | .preinit_array : 113 | { 114 | PROVIDE_HIDDEN (__preinit_array_start = .); 115 | KEEP (*(.preinit_array*)) 116 | PROVIDE_HIDDEN (__preinit_array_end = .); 117 | } >FLASH 118 | .init_array : 119 | { 120 | PROVIDE_HIDDEN (__init_array_start = .); 121 | KEEP (*(SORT(.init_array.*))) 122 | KEEP (*(.init_array*)) 123 | PROVIDE_HIDDEN (__init_array_end = .); 124 | } >FLASH 125 | .fini_array : 126 | { 127 | PROVIDE_HIDDEN (__fini_array_start = .); 128 | KEEP (*(SORT(.fini_array.*))) 129 | KEEP (*(.fini_array*)) 130 | PROVIDE_HIDDEN (__fini_array_end = .); 131 | } >FLASH 132 | 133 | /* used by the startup to initialize data */ 134 | _sidata = LOADADDR(.data); 135 | 136 | /* Initialized data sections goes into RAM, load LMA copy after code */ 137 | .data : 138 | { 139 | . = ALIGN(4); 140 | _sdata = .; /* create a global symbol at data start */ 141 | *(.data) /* .data sections */ 142 | *(.data*) /* .data* sections */ 143 | 144 | . = ALIGN(4); 145 | _edata = .; /* define a global symbol at data end */ 146 | } >RAM AT> FLASH 147 | 148 | 149 | /* Uninitialized data section */ 150 | . = ALIGN(4); 151 | .bss : 152 | { 153 | /* This is used by the startup in order to initialize the .bss secion */ 154 | _sbss = .; /* define a global symbol at bss start */ 155 | __bss_start__ = _sbss; 156 | *(.bss) 157 | *(.bss*) 158 | *(COMMON) 159 | 160 | . = ALIGN(4); 161 | _ebss = .; /* define a global symbol at bss end */ 162 | __bss_end__ = _ebss; 163 | } >RAM 164 | 165 | /* User_heap_stack section, used to check that there is enough RAM left */ 166 | ._user_heap_stack : 167 | { 168 | . = ALIGN(8); 169 | PROVIDE ( end = . ); 170 | PROVIDE ( _end = . ); 171 | . = . + _Min_Heap_Size; 172 | . = . + _Min_Stack_Size; 173 | . = ALIGN(8); 174 | } >RAM 175 | 176 | 177 | 178 | /* Remove information from the standard libraries */ 179 | /DISCARD/ : 180 | { 181 | libc.a ( * ) 182 | libm.a ( * ) 183 | libgcc.a ( * ) 184 | } 185 | 186 | .ARM.attributes 0 : { *(.ARM.attributes) } 187 | } 188 | 189 | 190 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_pwr.h 4 | * @author MCD Application Team 5 | * @brief Header file of PWR HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32F0xx_HAL_PWR_H 22 | #define __STM32F0xx_HAL_PWR_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f0xx_hal_def.h" 30 | 31 | /** @addtogroup STM32F0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup PWR PWR 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | 42 | /** @defgroup PWR_Exported_Constants PWR Exported Constants 43 | * @{ 44 | */ 45 | 46 | /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in STOP mode 47 | * @{ 48 | */ 49 | #define PWR_MAINREGULATOR_ON (0x00000000U) 50 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS 51 | 52 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 53 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 54 | /** 55 | * @} 56 | */ 57 | 58 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 59 | * @{ 60 | */ 61 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U) 62 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U) 63 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 69 | * @{ 70 | */ 71 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01U) 72 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02U) 73 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 74 | /** 75 | * @} 76 | */ 77 | 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | /* Exported macro ------------------------------------------------------------*/ 84 | /** @defgroup PWR_Exported_Macro PWR Exported Macro 85 | * @{ 86 | */ 87 | 88 | /** @brief Check PWR flag is set or not. 89 | * @param __FLAG__ specifies the flag to check. 90 | * This parameter can be one of the following values: 91 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 92 | * was received from the WKUP pin or from the RTC alarm (Alarm A), 93 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup. 94 | * An additional wakeup event is detected if the WKUP pin is enabled 95 | * (by setting the EWUP bit) when the WKUP pin level is already high. 96 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 97 | * resumed from StandBy mode. 98 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 99 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 100 | * For this reason, this bit is equal to 0 after Standby or reset 101 | * until the PVDE bit is set. 102 | * Warning: this Flag is not available on STM32F030x8 products 103 | * @arg PWR_FLAG_VREFINTRDY: This flag indicates that the internal reference 104 | * voltage VREFINT is ready. 105 | * Warning: this Flag is not available on STM32F030x8 products 106 | * @retval The new state of __FLAG__ (TRUE or FALSE). 107 | */ 108 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) 109 | 110 | /** @brief Clear the PWR's pending flags. 111 | * @param __FLAG__ specifies the flag to clear. 112 | * This parameter can be one of the following values: 113 | * @arg PWR_FLAG_WU: Wake Up flag 114 | * @arg PWR_FLAG_SB: StandBy flag 115 | */ 116 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U) 117 | 118 | 119 | /** 120 | * @} 121 | */ 122 | 123 | /* Include PWR HAL Extension module */ 124 | #include "stm32f0xx_hal_pwr_ex.h" 125 | 126 | /* Exported functions --------------------------------------------------------*/ 127 | 128 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions 129 | * @{ 130 | */ 131 | 132 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 133 | * @{ 134 | */ 135 | 136 | /* Initialization and de-initialization functions *****************************/ 137 | void HAL_PWR_DeInit(void); 138 | 139 | /** 140 | * @} 141 | */ 142 | 143 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 144 | * @{ 145 | */ 146 | 147 | /* Peripheral Control functions **********************************************/ 148 | void HAL_PWR_EnableBkUpAccess(void); 149 | void HAL_PWR_DisableBkUpAccess(void); 150 | 151 | /* WakeUp pins configuration functions ****************************************/ 152 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); 153 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 154 | 155 | /* Low Power modes configuration functions ************************************/ 156 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 157 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 158 | void HAL_PWR_EnterSTANDBYMode(void); 159 | 160 | void HAL_PWR_EnableSleepOnExit(void); 161 | void HAL_PWR_DisableSleepOnExit(void); 162 | void HAL_PWR_EnableSEVOnPend(void); 163 | void HAL_PWR_DisableSEVOnPend(void); 164 | 165 | /** 166 | * @} 167 | */ 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | /** 174 | * @} 175 | */ 176 | 177 | /** 178 | * @} 179 | */ 180 | 181 | #ifdef __cplusplus 182 | } 183 | #endif 184 | 185 | 186 | #endif /* __STM32F0xx_HAL_PWR_H */ 187 | 188 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 189 | 190 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_def.h 4 | * @author MCD Application Team 5 | * @brief This file contains HAL common defines, enumeration, macros and 6 | * structures definitions. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | *

© Copyright (c) 2016 STMicroelectronics. 11 | * All rights reserved.

12 | * 13 | * This software component is licensed by ST under BSD 3-Clause license, 14 | * the "License"; You may not use this file except in compliance with the 15 | * License. You may obtain a copy of the License at: 16 | * opensource.org/licenses/BSD-3-Clause 17 | * 18 | ****************************************************************************** 19 | */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef __STM32F0xx_HAL_DEF 23 | #define __STM32F0xx_HAL_DEF 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32f0xx.h" 31 | #if defined(USE_HAL_LEGACY) 32 | #include "Legacy/stm32_hal_legacy.h" 33 | #endif 34 | #include 35 | 36 | /* Exported types ------------------------------------------------------------*/ 37 | 38 | /** 39 | * @brief HAL Status structures definition 40 | */ 41 | typedef enum 42 | { 43 | HAL_OK = 0x00U, 44 | HAL_ERROR = 0x01U, 45 | HAL_BUSY = 0x02U, 46 | HAL_TIMEOUT = 0x03U 47 | } HAL_StatusTypeDef; 48 | 49 | /** 50 | * @brief HAL Lock structures definition 51 | */ 52 | typedef enum 53 | { 54 | HAL_UNLOCKED = 0x00U, 55 | HAL_LOCKED = 0x01U 56 | } HAL_LockTypeDef; 57 | 58 | /* Exported macro ------------------------------------------------------------*/ 59 | 60 | #define HAL_MAX_DELAY 0xFFFFFFFFU 61 | 62 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) 63 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) 64 | 65 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD_, __DMA_HANDLE_) \ 66 | do{ \ 67 | (__HANDLE__)->__PPP_DMA_FIELD_ = &(__DMA_HANDLE_); \ 68 | (__DMA_HANDLE_).Parent = (__HANDLE__); \ 69 | } while(0) 70 | 71 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ 72 | 73 | /** @brief Reset the Handle's State field. 74 | * @param __HANDLE__ specifies the Peripheral Handle. 75 | * @note This macro can be used for the following purpose: 76 | * - When the Handle is declared as local variable; before passing it as parameter 77 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 78 | * to set to 0 the Handle's "State" field. 79 | * Otherwise, "State" field may have any random value and the first time the function 80 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 81 | * (i.e. HAL_PPP_MspInit() will not be executed). 82 | * - When there is a need to reconfigure the low level hardware: instead of calling 83 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 84 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function 85 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 86 | * @retval None 87 | */ 88 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0) 89 | 90 | #if (USE_RTOS == 1) 91 | #error " USE_RTOS should be 0 in the current HAL release " 92 | #else 93 | #define __HAL_LOCK(__HANDLE__) \ 94 | do{ \ 95 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 96 | { \ 97 | return HAL_BUSY; \ 98 | } \ 99 | else \ 100 | { \ 101 | (__HANDLE__)->Lock = HAL_LOCKED; \ 102 | } \ 103 | }while (0) 104 | 105 | #define __HAL_UNLOCK(__HANDLE__) \ 106 | do{ \ 107 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 108 | }while (0) 109 | #endif /* USE_RTOS */ 110 | 111 | #if defined ( __GNUC__ ) 112 | #ifndef __weak 113 | #define __weak __attribute__((weak)) 114 | #endif /* __weak */ 115 | #ifndef __packed 116 | #define __packed __attribute__((__packed__)) 117 | #endif /* __packed */ 118 | #endif /* __GNUC__ */ 119 | 120 | 121 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 122 | #if defined (__GNUC__) /* GNU Compiler */ 123 | #ifndef __ALIGN_END 124 | #define __ALIGN_END __attribute__ ((aligned (4))) 125 | #endif /* __ALIGN_END */ 126 | #ifndef __ALIGN_BEGIN 127 | #define __ALIGN_BEGIN 128 | #endif /* __ALIGN_BEGIN */ 129 | #else 130 | #ifndef __ALIGN_END 131 | #define __ALIGN_END 132 | #endif /* __ALIGN_END */ 133 | #ifndef __ALIGN_BEGIN 134 | #if defined (__CC_ARM) /* ARM Compiler */ 135 | #define __ALIGN_BEGIN __align(4) 136 | #elif defined (__ICCARM__) /* IAR Compiler */ 137 | #define __ALIGN_BEGIN 138 | #endif /* __CC_ARM */ 139 | #endif /* __ALIGN_BEGIN */ 140 | #endif /* __GNUC__ */ 141 | 142 | /** 143 | * @brief __NOINLINE definition 144 | */ 145 | #if defined ( __CC_ARM ) || defined ( __GNUC__ ) 146 | /* ARM & GNUCompiler 147 | ---------------- 148 | */ 149 | #define __NOINLINE __attribute__ ( (noinline) ) 150 | 151 | #elif defined ( __ICCARM__ ) 152 | /* ICCARM Compiler 153 | --------------- 154 | */ 155 | #define __NOINLINE _Pragma("optimize = no_inline") 156 | 157 | #endif 158 | 159 | #ifdef __cplusplus 160 | } 161 | #endif 162 | 163 | #endif /* ___STM32F0xx_HAL_DEF */ 164 | 165 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 166 | 167 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_exti.c 4 | * @author MCD Application Team 5 | * @brief EXTI LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | #if defined(USE_FULL_LL_DRIVER) 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f0xx_ll_exti.h" 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif 29 | 30 | /** @addtogroup STM32F0xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (EXTI) 35 | 36 | /** @defgroup EXTI_LL EXTI 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /** @addtogroup EXTI_LL_Private_Macros 45 | * @{ 46 | */ 47 | 48 | #define IS_LL_EXTI_LINE_0_31(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U) 49 | 50 | #define IS_LL_EXTI_MODE(__VALUE__) (((__VALUE__) == LL_EXTI_MODE_IT) \ 51 | || ((__VALUE__) == LL_EXTI_MODE_EVENT) \ 52 | || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT)) 53 | 54 | 55 | #define IS_LL_EXTI_TRIGGER(__VALUE__) (((__VALUE__) == LL_EXTI_TRIGGER_NONE) \ 56 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING) \ 57 | || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING) \ 58 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING)) 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | /* Private function prototypes -----------------------------------------------*/ 65 | 66 | /* Exported functions --------------------------------------------------------*/ 67 | /** @addtogroup EXTI_LL_Exported_Functions 68 | * @{ 69 | */ 70 | 71 | /** @addtogroup EXTI_LL_EF_Init 72 | * @{ 73 | */ 74 | 75 | /** 76 | * @brief De-initialize the EXTI registers to their default reset values. 77 | * @retval An ErrorStatus enumeration value: 78 | * - SUCCESS: EXTI registers are de-initialized 79 | * - ERROR: not applicable 80 | */ 81 | uint32_t LL_EXTI_DeInit(void) 82 | { 83 | /* Interrupt mask register set to default reset values */ 84 | #if defined(STM32F030x6) || defined(STM32F031x6) ||defined(STM32F038xx) 85 | LL_EXTI_WriteReg(IMR, 0x0FF40000U); 86 | #elif defined(STM32F070x6) || defined(STM32F042x6) || defined(STM32F048xx) 87 | LL_EXTI_WriteReg(IMR, 0x7FF40000U); 88 | #elif defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx) 89 | LL_EXTI_WriteReg(IMR, 0x0F940000U); 90 | #else 91 | LL_EXTI_WriteReg(IMR, 0x7F840000U); 92 | #endif 93 | /* Event mask register set to default reset values */ 94 | LL_EXTI_WriteReg(EMR, 0x00000000U); 95 | /* Rising Trigger selection register set to default reset values */ 96 | LL_EXTI_WriteReg(RTSR, 0x00000000U); 97 | /* Falling Trigger selection register set to default reset values */ 98 | LL_EXTI_WriteReg(FTSR, 0x00000000U); 99 | /* Software interrupt event register set to default reset values */ 100 | LL_EXTI_WriteReg(SWIER, 0x00000000U); 101 | /* Pending register clear */ 102 | LL_EXTI_WriteReg(PR, 0x007BFFFFU); 103 | 104 | return SUCCESS; 105 | } 106 | 107 | /** 108 | * @brief Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct. 109 | * @param EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure. 110 | * @retval An ErrorStatus enumeration value: 111 | * - SUCCESS: EXTI registers are initialized 112 | * - ERROR: not applicable 113 | */ 114 | uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct) 115 | { 116 | ErrorStatus status = SUCCESS; 117 | /* Check the parameters */ 118 | assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31)); 119 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand)); 120 | assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode)); 121 | 122 | /* ENABLE LineCommand */ 123 | if (EXTI_InitStruct->LineCommand != DISABLE) 124 | { 125 | assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger)); 126 | 127 | /* Configure EXTI Lines in range from 0 to 31 */ 128 | if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE) 129 | { 130 | switch (EXTI_InitStruct->Mode) 131 | { 132 | case LL_EXTI_MODE_IT: 133 | /* First Disable Event on provided Lines */ 134 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 135 | /* Then Enable IT on provided Lines */ 136 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 137 | break; 138 | case LL_EXTI_MODE_EVENT: 139 | /* First Disable IT on provided Lines */ 140 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 141 | /* Then Enable Event on provided Lines */ 142 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 143 | break; 144 | case LL_EXTI_MODE_IT_EVENT: 145 | /* Directly Enable IT & Event on provided Lines */ 146 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 147 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 148 | break; 149 | default: 150 | status = ERROR; 151 | break; 152 | } 153 | if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE) 154 | { 155 | switch (EXTI_InitStruct->Trigger) 156 | { 157 | case LL_EXTI_TRIGGER_RISING: 158 | /* First Disable Falling Trigger on provided Lines */ 159 | LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 160 | /* Then Enable Rising Trigger on provided Lines */ 161 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 162 | break; 163 | case LL_EXTI_TRIGGER_FALLING: 164 | /* First Disable Rising Trigger on provided Lines */ 165 | LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 166 | /* Then Enable Falling Trigger on provided Lines */ 167 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 168 | break; 169 | case LL_EXTI_TRIGGER_RISING_FALLING: 170 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 171 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 172 | break; 173 | default: 174 | status = ERROR; 175 | break; 176 | } 177 | } 178 | } 179 | } 180 | /* DISABLE LineCommand */ 181 | else 182 | { 183 | /* De-configure EXTI Lines in range from 0 to 31 */ 184 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 185 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 186 | } 187 | return status; 188 | } 189 | 190 | /** 191 | * @brief Set each @ref LL_EXTI_InitTypeDef field to default value. 192 | * @param EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure. 193 | * @retval None 194 | */ 195 | void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct) 196 | { 197 | EXTI_InitStruct->Line_0_31 = LL_EXTI_LINE_NONE; 198 | EXTI_InitStruct->LineCommand = DISABLE; 199 | EXTI_InitStruct->Mode = LL_EXTI_MODE_IT; 200 | EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING; 201 | } 202 | 203 | /** 204 | * @} 205 | */ 206 | 207 | /** 208 | * @} 209 | */ 210 | 211 | /** 212 | * @} 213 | */ 214 | 215 | #endif /* defined (EXTI) */ 216 | 217 | /** 218 | * @} 219 | */ 220 | 221 | #endif /* USE_FULL_LL_DRIVER */ 222 | 223 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 224 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_i2c.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_i2c.c 4 | * @author MCD Application Team 5 | * @brief I2C LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32f0xx_ll_i2c.h" 23 | #include "stm32f0xx_ll_bus.h" 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif 29 | 30 | /** @addtogroup STM32F0xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (I2C1) || defined (I2C2) 35 | 36 | /** @defgroup I2C_LL I2C 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /** @addtogroup I2C_LL_Private_Macros 45 | * @{ 46 | */ 47 | 48 | #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \ 49 | ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \ 50 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \ 51 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP)) 52 | 53 | #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \ 54 | ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE)) 55 | 56 | #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU) 57 | 58 | #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU) 59 | 60 | #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \ 61 | ((__VALUE__) == LL_I2C_NACK)) 62 | 63 | #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \ 64 | ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT)) 65 | /** 66 | * @} 67 | */ 68 | 69 | /* Private function prototypes -----------------------------------------------*/ 70 | 71 | /* Exported functions --------------------------------------------------------*/ 72 | /** @addtogroup I2C_LL_Exported_Functions 73 | * @{ 74 | */ 75 | 76 | /** @addtogroup I2C_LL_EF_Init 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief De-initialize the I2C registers to their default reset values. 82 | * @param I2Cx I2C Instance. 83 | * @retval An ErrorStatus enumeration value: 84 | * - SUCCESS: I2C registers are de-initialized 85 | * - ERROR: I2C registers are not de-initialized 86 | */ 87 | ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx) 88 | { 89 | ErrorStatus status = SUCCESS; 90 | 91 | /* Check the I2C Instance I2Cx */ 92 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 93 | 94 | if (I2Cx == I2C1) 95 | { 96 | /* Force reset of I2C clock */ 97 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1); 98 | 99 | /* Release reset of I2C clock */ 100 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1); 101 | } 102 | #if defined(I2C2) 103 | else if (I2Cx == I2C2) 104 | { 105 | /* Force reset of I2C clock */ 106 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2); 107 | 108 | /* Release reset of I2C clock */ 109 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2); 110 | 111 | } 112 | #endif 113 | else 114 | { 115 | status = ERROR; 116 | } 117 | 118 | return status; 119 | } 120 | 121 | /** 122 | * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct. 123 | * @param I2Cx I2C Instance. 124 | * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure. 125 | * @retval An ErrorStatus enumeration value: 126 | * - SUCCESS: I2C registers are initialized 127 | * - ERROR: Not applicable 128 | */ 129 | ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct) 130 | { 131 | /* Check the I2C Instance I2Cx */ 132 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 133 | 134 | /* Check the I2C parameters from I2C_InitStruct */ 135 | assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode)); 136 | assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter)); 137 | assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter)); 138 | assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1)); 139 | assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge)); 140 | assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize)); 141 | 142 | /* Disable the selected I2Cx Peripheral */ 143 | LL_I2C_Disable(I2Cx); 144 | 145 | /*---------------------------- I2Cx CR1 Configuration ------------------------ 146 | * Configure the analog and digital noise filters with parameters : 147 | * - AnalogFilter: I2C_CR1_ANFOFF bit 148 | * - DigitalFilter: I2C_CR1_DNF[3:0] bits 149 | */ 150 | LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter); 151 | 152 | /*---------------------------- I2Cx TIMINGR Configuration -------------------- 153 | * Configure the SDA setup, hold time and the SCL high, low period with parameter : 154 | * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0], 155 | * I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits 156 | */ 157 | LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing); 158 | 159 | /* Enable the selected I2Cx Peripheral */ 160 | LL_I2C_Enable(I2Cx); 161 | 162 | /*---------------------------- I2Cx OAR1 Configuration ----------------------- 163 | * Disable, Configure and Enable I2Cx device own address 1 with parameters : 164 | * - OwnAddress1: I2C_OAR1_OA1[9:0] bits 165 | * - OwnAddrSize: I2C_OAR1_OA1MODE bit 166 | */ 167 | LL_I2C_DisableOwnAddress1(I2Cx); 168 | LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize); 169 | 170 | /* OwnAdress1 == 0 is reserved for General Call address */ 171 | if (I2C_InitStruct->OwnAddress1 != 0U) 172 | { 173 | LL_I2C_EnableOwnAddress1(I2Cx); 174 | } 175 | 176 | /*---------------------------- I2Cx MODE Configuration ----------------------- 177 | * Configure I2Cx peripheral mode with parameter : 178 | * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits 179 | */ 180 | LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode); 181 | 182 | /*---------------------------- I2Cx CR2 Configuration ------------------------ 183 | * Configure the ACKnowledge or Non ACKnowledge condition 184 | * after the address receive match code or next received byte with parameter : 185 | * - TypeAcknowledge: I2C_CR2_NACK bit 186 | */ 187 | LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge); 188 | 189 | return SUCCESS; 190 | } 191 | 192 | /** 193 | * @brief Set each @ref LL_I2C_InitTypeDef field to default value. 194 | * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure. 195 | * @retval None 196 | */ 197 | void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct) 198 | { 199 | /* Set I2C_InitStruct fields to default values */ 200 | I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C; 201 | I2C_InitStruct->Timing = 0U; 202 | I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE; 203 | I2C_InitStruct->DigitalFilter = 0U; 204 | I2C_InitStruct->OwnAddress1 = 0U; 205 | I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK; 206 | I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; 207 | } 208 | 209 | /** 210 | * @} 211 | */ 212 | 213 | /** 214 | * @} 215 | */ 216 | 217 | /** 218 | * @} 219 | */ 220 | 221 | #endif /* I2C1 || I2C2 */ 222 | 223 | /** 224 | * @} 225 | */ 226 | 227 | #endif /* USE_FULL_LL_DRIVER */ 228 | 229 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 230 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_usb.h 4 | * @author MCD Application Team 5 | * @brief Header file of USB Low Layer HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32F0xx_LL_USB_H 22 | #define STM32F0xx_LL_USB_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f0xx_hal_def.h" 30 | 31 | #if defined (USB) 32 | /** @addtogroup STM32F0xx_HAL_Driver 33 | * @{ 34 | */ 35 | 36 | /** @addtogroup USB_LL 37 | * @{ 38 | */ 39 | 40 | /* Exported types ------------------------------------------------------------*/ 41 | 42 | /** 43 | * @brief USB Mode definition 44 | */ 45 | 46 | 47 | 48 | typedef enum 49 | { 50 | USB_DEVICE_MODE = 0 51 | } USB_ModeTypeDef; 52 | 53 | /** 54 | * @brief USB Initialization Structure definition 55 | */ 56 | typedef struct 57 | { 58 | uint32_t dev_endpoints; /*!< Device Endpoints number. 59 | This parameter depends on the used USB core. 60 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 61 | 62 | uint32_t speed; /*!< USB Core speed. 63 | This parameter can be any value of @ref USB_Core_Speed */ 64 | 65 | uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */ 66 | 67 | uint32_t phy_itface; /*!< Select the used PHY interface. 68 | This parameter can be any value of @ref USB_Core_PHY */ 69 | 70 | uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ 71 | 72 | uint32_t low_power_enable; /*!< Enable or disable Low Power mode */ 73 | 74 | uint32_t lpm_enable; /*!< Enable or disable Battery charging. */ 75 | 76 | uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */ 77 | } USB_CfgTypeDef; 78 | 79 | typedef struct 80 | { 81 | uint8_t num; /*!< Endpoint number 82 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ 83 | 84 | uint8_t is_in; /*!< Endpoint direction 85 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 86 | 87 | uint8_t is_stall; /*!< Endpoint stall condition 88 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 89 | 90 | uint8_t type; /*!< Endpoint type 91 | This parameter can be any value of @ref USB_EP_Type */ 92 | 93 | uint8_t data_pid_start; /*!< Initial data PID 94 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ 95 | 96 | uint16_t pmaadress; /*!< PMA Address 97 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ 98 | 99 | uint16_t pmaaddr0; /*!< PMA Address0 100 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ 101 | 102 | uint16_t pmaaddr1; /*!< PMA Address1 103 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ 104 | 105 | uint8_t doublebuffer; /*!< Double buffer enable 106 | This parameter can be 0 or 1 */ 107 | 108 | uint16_t tx_fifo_num; /*!< This parameter is not required by USB Device FS peripheral, it is used 109 | only by USB OTG FS peripheral 110 | This parameter is added to ensure compatibility across USB peripherals */ 111 | 112 | uint32_t maxpacket; /*!< Endpoint Max packet size 113 | This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ 114 | 115 | uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ 116 | 117 | uint32_t xfer_len; /*!< Current transfer length */ 118 | 119 | uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ 120 | 121 | } USB_EPTypeDef; 122 | 123 | 124 | /* Exported constants --------------------------------------------------------*/ 125 | 126 | /** @defgroup PCD_Exported_Constants PCD Exported Constants 127 | * @{ 128 | */ 129 | 130 | 131 | /** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS 132 | * @{ 133 | */ 134 | #define DEP0CTL_MPS_64 0U 135 | #define DEP0CTL_MPS_32 1U 136 | #define DEP0CTL_MPS_16 2U 137 | #define DEP0CTL_MPS_8 3U 138 | /** 139 | * @} 140 | */ 141 | 142 | /** @defgroup USB_LL_EP_Type USB Low Layer EP Type 143 | * @{ 144 | */ 145 | #define EP_TYPE_CTRL 0U 146 | #define EP_TYPE_ISOC 1U 147 | #define EP_TYPE_BULK 2U 148 | #define EP_TYPE_INTR 3U 149 | #define EP_TYPE_MSK 3U 150 | /** 151 | * @} 152 | */ 153 | 154 | /** @defgroup USB_LL Device Speed 155 | * @{ 156 | */ 157 | #define USBD_FS_SPEED 2U 158 | /** 159 | * @} 160 | */ 161 | 162 | #define BTABLE_ADDRESS 0x000U 163 | #define PMA_ACCESS 1U 164 | 165 | #define EP_ADDR_MSK 0x7U 166 | /** 167 | * @} 168 | */ 169 | 170 | /* Exported macro ------------------------------------------------------------*/ 171 | /** 172 | * @} 173 | */ 174 | 175 | /* Exported functions --------------------------------------------------------*/ 176 | /** @addtogroup USB_LL_Exported_Functions USB Low Layer Exported Functions 177 | * @{ 178 | */ 179 | 180 | 181 | HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg); 182 | HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg); 183 | HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx); 184 | HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx); 185 | HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode); 186 | HAL_StatusTypeDef USB_SetDevSpeed(USB_TypeDef *USBx, uint8_t speed); 187 | HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx); 188 | HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef *USBx, uint32_t num); 189 | HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); 190 | HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); 191 | HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep); 192 | HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len); 193 | void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len); 194 | HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep); 195 | HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep); 196 | HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address); 197 | HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx); 198 | HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx); 199 | HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx); 200 | HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup); 201 | uint32_t USB_ReadInterrupts(USB_TypeDef *USBx); 202 | uint32_t USB_ReadDevAllOutEpInterrupt(USB_TypeDef *USBx); 203 | uint32_t USB_ReadDevOutEPInterrupt(USB_TypeDef *USBx, uint8_t epnum); 204 | uint32_t USB_ReadDevAllInEpInterrupt(USB_TypeDef *USBx); 205 | uint32_t USB_ReadDevInEPInterrupt(USB_TypeDef *USBx, uint8_t epnum); 206 | void USB_ClearInterrupts(USB_TypeDef *USBx, uint32_t interrupt); 207 | 208 | HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx); 209 | HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx); 210 | void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); 211 | void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); 212 | 213 | /** 214 | * @} 215 | */ 216 | 217 | /** 218 | * @} 219 | */ 220 | 221 | /** 222 | * @} 223 | */ 224 | 225 | /** 226 | * @} 227 | */ 228 | #endif /* defined (USB) */ 229 | 230 | #ifdef __cplusplus 231 | } 232 | #endif 233 | 234 | 235 | #endif /* STM32F0xx_LL_USB_H */ 236 | 237 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 238 | -------------------------------------------------------------------------------- /Src/pcan_can.c: -------------------------------------------------------------------------------- 1 | #include "pcan_can.h" 2 | #include "pcan_timestamp.h" 3 | #include "pcan_varian.h" 4 | #include 5 | #include 6 | #include 7 | 8 | #define CAN_TX_FIFO_SIZE (100) 9 | static CAN_HandleTypeDef g_hcan = { .Instance = CAN }; 10 | #define INTERNAL_CAN_IT_FLAGS \ 11 | (CAN_IT_TX_MAILBOX_EMPTY | CAN_IT_RX_FIFO0_MSG_PENDING | CAN_IT_RX_FIFO1_MSG_PENDING | CAN_IT_BUSOFF | CAN_IT_ERROR_WARNING | CAN_IT_ERROR_PASSIVE | CAN_IT_BUSOFF \ 12 | | CAN_IT_LAST_ERROR_CODE | CAN_IT_ERROR) 13 | 14 | static struct 15 | { 16 | uint32_t tx_msgs; 17 | uint32_t tx_errs; 18 | uint32_t tx_ovfs; 19 | 20 | uint32_t rx_msgs; 21 | uint32_t rx_errs; 22 | uint32_t rx_ovfs; 23 | 24 | can_message_t tx_fifo[CAN_TX_FIFO_SIZE]; 25 | uint32_t tx_head; 26 | uint32_t tx_tail; 27 | void (*rx_cb)(can_message_t *); 28 | void (*can_err_cb)(uint8_t err, uint8_t rx_err, uint8_t tx_err); 29 | } can_dev = { 0 }; 30 | 31 | void pcan_can_init(void) 32 | { 33 | CAN_FilterTypeDef filter = { 0 }; 34 | 35 | __HAL_RCC_CAN1_CLK_ENABLE(); 36 | 37 | PIN_ENABLE_CLOCK(CAN_RX); 38 | PIN_ENABLE_CLOCK(CAN_TX); 39 | 40 | PIN_INIT(CAN_RX); 41 | PIN_INIT(CAN_TX); 42 | 43 | HAL_CAN_DeInit(&g_hcan); 44 | 45 | g_hcan.Instance = CAN; 46 | g_hcan.Init.Prescaler = 16; 47 | g_hcan.Init.Mode = CAN_MODE_NORMAL; 48 | g_hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; 49 | g_hcan.Init.TimeSeg1 = CAN_BS1_1TQ; 50 | g_hcan.Init.TimeSeg2 = CAN_BS2_1TQ; 51 | g_hcan.Init.TimeTriggeredMode = DISABLE; 52 | g_hcan.Init.AutoBusOff = ENABLE; 53 | g_hcan.Init.AutoWakeUp = DISABLE; 54 | g_hcan.Init.AutoRetransmission = ENABLE; 55 | g_hcan.Init.ReceiveFifoLocked = DISABLE; 56 | g_hcan.Init.TransmitFifoPriority = ENABLE; 57 | 58 | if (HAL_CAN_Init(&g_hcan) != HAL_OK) 59 | { 60 | assert(0); 61 | } 62 | 63 | filter.FilterMode = CAN_FILTERMODE_IDMASK; 64 | filter.FilterScale = CAN_FILTERSCALE_32BIT; 65 | filter.FilterFIFOAssignment = CAN_FILTER_FIFO0; 66 | filter.FilterActivation = ENABLE; 67 | filter.FilterBank = 0; 68 | filter.SlaveStartFilterBank = 0; 69 | 70 | if (HAL_CAN_ConfigFilter(&g_hcan, &filter) != HAL_OK) 71 | { 72 | assert(0); 73 | } 74 | 75 | if (HAL_CAN_ActivateNotification(&g_hcan, INTERNAL_CAN_IT_FLAGS) != HAL_OK) 76 | { 77 | assert(0); 78 | } 79 | } 80 | 81 | void pcan_can_set_bitrate(uint16_t brp, uint8_t tseg1, uint8_t tseg2, uint8_t sjw) 82 | { 83 | static const uint32_t sjw_table[] = { CAN_SJW_1TQ, CAN_SJW_2TQ, CAN_SJW_3TQ, CAN_SJW_4TQ }; 84 | static const uint32_t tseg1_table[] = { CAN_BS1_1TQ, CAN_BS1_2TQ, CAN_BS1_3TQ, CAN_BS1_4TQ, CAN_BS1_5TQ, CAN_BS1_6TQ, CAN_BS1_7TQ, CAN_BS1_8TQ, 85 | CAN_BS1_9TQ, CAN_BS1_10TQ, CAN_BS1_11TQ, CAN_BS1_12TQ, CAN_BS1_13TQ, CAN_BS1_14TQ, CAN_BS1_15TQ, CAN_BS1_16TQ }; 86 | static const uint32_t tseg2_table[] = { CAN_BS2_1TQ, CAN_BS2_2TQ, CAN_BS2_3TQ, CAN_BS2_4TQ, CAN_BS2_5TQ, CAN_BS2_6TQ, CAN_BS2_7TQ, CAN_BS2_8TQ }; 87 | 88 | if (sjw > 4) 89 | sjw = 4; 90 | if (tseg1 > 16) 91 | tseg1 = 16; 92 | if (tseg2 > 8) 93 | tseg2 = 8; 94 | 95 | /* CAN bus freq is 48 */ 96 | g_hcan.Init.Prescaler = brp * 6; 97 | 98 | g_hcan.Init.SyncJumpWidth = sjw_table[sjw - 1]; 99 | g_hcan.Init.TimeSeg1 = tseg1_table[tseg1 - 1]; 100 | g_hcan.Init.TimeSeg2 = tseg2_table[tseg2 - 1]; 101 | 102 | if (HAL_CAN_Init(&g_hcan) != HAL_OK) 103 | { 104 | assert(0); 105 | } 106 | } 107 | 108 | void pcan_can_install_rx_callback(void (*cb)(can_message_t *)) 109 | { 110 | can_dev.rx_cb = cb; 111 | } 112 | 113 | void pcan_can_install_error_callback(void (*cb)(uint8_t, uint8_t, uint8_t)) 114 | { 115 | can_dev.can_err_cb = cb; 116 | } 117 | 118 | static int pcan_try_send_message(const can_message_t *p_msg) 119 | { 120 | CAN_TxHeaderTypeDef msg = { .TransmitGlobalTime = DISABLE }; 121 | uint32_t txMailbox = 0; 122 | 123 | if (p_msg->flags & CAN_FLAG_EXTID) 124 | { 125 | msg.ExtId = p_msg->id & 0x1FFFFFFF; 126 | msg.IDE = CAN_ID_EXT; 127 | } 128 | else 129 | { 130 | msg.StdId = p_msg->id & 0x7FF; 131 | msg.IDE = CAN_ID_STD; 132 | } 133 | 134 | msg.DLC = p_msg->dlc; 135 | msg.RTR = (p_msg->flags & CAN_FLAG_RTR) ? CAN_RTR_REMOTE : CAN_RTR_DATA; 136 | 137 | if (HAL_CAN_AddTxMessage(&g_hcan, &msg, (void *)p_msg->data, &txMailbox) != HAL_OK) 138 | return -1; 139 | 140 | return txMailbox; 141 | } 142 | 143 | static void pcan_can_flush_tx(void) 144 | { 145 | can_message_t *p_msg; 146 | 147 | /* empty fifo */ 148 | if (can_dev.tx_head == can_dev.tx_tail) 149 | return; 150 | 151 | p_msg = &can_dev.tx_fifo[can_dev.tx_tail]; 152 | if (pcan_try_send_message(p_msg) < 0) 153 | return; 154 | /* update fifo index */ 155 | uint32_t tail = can_dev.tx_tail + 1; 156 | if (tail == CAN_TX_FIFO_SIZE) 157 | tail = 0; 158 | can_dev.tx_tail = tail; 159 | } 160 | 161 | int pcan_can_send_message(const can_message_t *p_msg) 162 | { 163 | if (!p_msg) 164 | return 0; 165 | 166 | uint32_t head = can_dev.tx_head + 1; 167 | if (head == CAN_TX_FIFO_SIZE) 168 | head = 0; 169 | /* overflow ? just skip it */ 170 | if (head == can_dev.tx_tail) 171 | { 172 | ++can_dev.tx_ovfs; 173 | return -1; 174 | } 175 | 176 | can_dev.tx_fifo[can_dev.tx_head] = *p_msg; 177 | can_dev.tx_head = head; 178 | 179 | return 0; 180 | } 181 | 182 | void pcan_can_set_silent(uint8_t silent_mode) 183 | { 184 | g_hcan.Init.Mode = silent_mode ? CAN_MODE_SILENT : CAN_MODE_NORMAL; 185 | if (HAL_CAN_Init(&g_hcan) != HAL_OK) 186 | { 187 | assert(0); 188 | } 189 | } 190 | 191 | void pcan_can_set_loopback(uint8_t loopback) 192 | { 193 | g_hcan.Init.Mode = loopback ? CAN_MODE_LOOPBACK : CAN_MODE_NORMAL; 194 | if (HAL_CAN_Init(&g_hcan) != HAL_OK) 195 | { 196 | assert(0); 197 | } 198 | } 199 | 200 | void pcan_can_set_bus_active(uint16_t mode) 201 | { 202 | if (mode) 203 | { 204 | HAL_CAN_Start(&g_hcan); 205 | HAL_CAN_AbortTxRequest(&g_hcan, CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | CAN_TX_MAILBOX2); 206 | } 207 | else 208 | { 209 | HAL_CAN_AbortTxRequest(&g_hcan, CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | CAN_TX_MAILBOX2); 210 | HAL_CAN_Stop(&g_hcan); 211 | } 212 | } 213 | 214 | static void pcan_can_rx_frame(CAN_HandleTypeDef *hcan, uint32_t fifo) 215 | { 216 | CAN_RxHeaderTypeDef hdr = { 0 }; 217 | can_message_t msg = { 0 }; 218 | 219 | if (HAL_CAN_GetRxMessage(hcan, fifo, &hdr, msg.data) != HAL_OK) 220 | return; 221 | 222 | if (hdr.IDE == CAN_ID_STD) 223 | { 224 | msg.id = hdr.StdId; 225 | } 226 | else 227 | { 228 | msg.id = hdr.ExtId; 229 | msg.flags |= CAN_FLAG_EXTID; 230 | } 231 | 232 | if (hdr.RTR == CAN_RTR_REMOTE) 233 | { 234 | msg.flags |= CAN_FLAG_RTR; 235 | } 236 | 237 | msg.dlc = hdr.DLC; 238 | msg.timestamp = pcan_timestamp_ticks(); 239 | 240 | if (can_dev.rx_cb) 241 | { 242 | can_dev.rx_cb(&msg); 243 | } 244 | 245 | ++can_dev.rx_msgs; 246 | } 247 | 248 | void pcan_can_poll(void) 249 | { 250 | HAL_CAN_IRQHandler(&g_hcan); 251 | pcan_can_flush_tx(); 252 | } 253 | 254 | void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) 255 | { 256 | pcan_can_rx_frame(hcan, CAN_RX_FIFO0); 257 | } 258 | 259 | void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan) 260 | { 261 | pcan_can_rx_frame(hcan, CAN_RX_FIFO1); 262 | } 263 | 264 | void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) 265 | { 266 | UNUSED(hcan); 267 | ++can_dev.tx_msgs; 268 | } 269 | 270 | void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) 271 | { 272 | UNUSED(hcan); 273 | ++can_dev.tx_msgs; 274 | } 275 | 276 | void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) 277 | { 278 | UNUSED(hcan); 279 | ++can_dev.tx_msgs; 280 | } 281 | 282 | void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) 283 | { 284 | UNUSED(hcan); 285 | ++can_dev.rx_ovfs; 286 | } 287 | 288 | void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) 289 | { 290 | UNUSED(hcan); 291 | ++can_dev.rx_ovfs; 292 | } 293 | 294 | void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) 295 | { 296 | UNUSED(hcan); 297 | } 298 | void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) 299 | { 300 | UNUSED(hcan); 301 | } 302 | 303 | void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) 304 | { 305 | /* handle errors */ 306 | uint32_t err = HAL_CAN_GetError(hcan); 307 | uint8_t can_err = 0; 308 | 309 | if (err & (HAL_CAN_ERROR_TX_TERR0 | HAL_CAN_ERROR_TX_TERR1 | HAL_CAN_ERROR_TX_TERR2)) 310 | { 311 | ++can_dev.tx_errs; 312 | can_err |= CAN_ERROR_FLAG_TX_ERR; 313 | } 314 | 315 | if (err & HAL_CAN_ERROR_BOF) 316 | { 317 | can_err |= CAN_ERROR_FLAG_BUSOFF; 318 | } 319 | 320 | if (err & (HAL_CAN_ERROR_RX_FOV0 | HAL_CAN_ERROR_RX_FOV1)) 321 | { 322 | can_err |= CAN_ERROR_FLAG_RX_OVF; 323 | } 324 | 325 | if (can_dev.can_err_cb && can_err) 326 | { 327 | can_dev.can_err_cb(can_err, can_dev.tx_errs & 0xFF, can_dev.rx_errs); 328 | } 329 | 330 | HAL_CAN_ResetError(hcan); 331 | } 332 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_pwr_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended PWR HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the Power Controller (PWR) peripheral: 8 | * + Extended Initialization and de-initialization functions 9 | * + Extended Peripheral Control functions 10 | * 11 | ****************************************************************************** 12 | * @attention 13 | * 14 | *

© Copyright (c) 2016 STMicroelectronics. 15 | * All rights reserved.

16 | * 17 | * This software component is licensed by ST under BSD 3-Clause license, 18 | * the "License"; You may not use this file except in compliance with the 19 | * License. You may obtain a copy of the License at: 20 | * opensource.org/licenses/BSD-3-Clause 21 | * 22 | ****************************************************************************** 23 | */ 24 | 25 | /* Includes ------------------------------------------------------------------*/ 26 | #include "stm32f0xx_hal.h" 27 | 28 | /** @addtogroup STM32F0xx_HAL_Driver 29 | * @{ 30 | */ 31 | 32 | /** @defgroup PWREx PWREx 33 | * @brief PWREx HAL module driver 34 | * @{ 35 | */ 36 | 37 | #ifdef HAL_PWR_MODULE_ENABLED 38 | 39 | /* Private typedef -----------------------------------------------------------*/ 40 | /* Private define ------------------------------------------------------------*/ 41 | /** @defgroup PWREx_Private_Constants PWREx Private Constants 42 | * @{ 43 | */ 44 | #define PVD_MODE_IT (0x00010000U) 45 | #define PVD_MODE_EVT (0x00020000U) 46 | #define PVD_RISING_EDGE (0x00000001U) 47 | #define PVD_FALLING_EDGE (0x00000002U) 48 | /** 49 | * @} 50 | */ 51 | 52 | /* Private macro -------------------------------------------------------------*/ 53 | /* Private variables ---------------------------------------------------------*/ 54 | /* Private function prototypes -----------------------------------------------*/ 55 | /* Exported functions ---------------------------------------------------------*/ 56 | 57 | /** @defgroup PWREx_Exported_Functions PWREx Exported Functions 58 | * @{ 59 | */ 60 | 61 | /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions 62 | * @brief Extended Peripheral Control functions 63 | * 64 | @verbatim 65 | 66 | =============================================================================== 67 | ##### Peripheral extended control functions ##### 68 | =============================================================================== 69 | 70 | *** PVD configuration *** 71 | ========================= 72 | [..] 73 | (+) The PVD is used to monitor the VDD power supply by comparing it to a 74 | threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). 75 | (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower 76 | than the PVD threshold. This event is internally connected to the EXTI 77 | line16 and can generate an interrupt if enabled. This is done through 78 | HAL_PWR_ConfigPVD(), HAL_PWR_EnablePVD() functions. 79 | (+) The PVD is stopped in Standby mode. 80 | -@- PVD is not available on STM32F030x4/x6/x8 81 | 82 | *** VDDIO2 Monitor Configuration *** 83 | ==================================== 84 | [..] 85 | (+) VDDIO2 monitor is used to monitor the VDDIO2 power supply by comparing it 86 | to VREFInt Voltage 87 | (+) This monitor is internally connected to the EXTI line31 88 | and can generate an interrupt if enabled. This is done through 89 | HAL_PWREx_EnableVddio2Monitor() function. 90 | -@- VDDIO2 is available on STM32F07x/09x/04x 91 | 92 | @endverbatim 93 | * @{ 94 | */ 95 | 96 | #if defined (STM32F031x6) || defined (STM32F051x8) || \ 97 | defined (STM32F071xB) || defined (STM32F091xC) || \ 98 | defined (STM32F042x6) || defined (STM32F072xB) 99 | /** 100 | * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). 101 | * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration 102 | * information for the PVD. 103 | * @note Refer to the electrical characteristics of your device datasheet for 104 | * more details about the voltage threshold corresponding to each 105 | * detection level. 106 | * @retval None 107 | */ 108 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) 109 | { 110 | /* Check the parameters */ 111 | assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); 112 | assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); 113 | 114 | /* Set PLS[7:5] bits according to PVDLevel value */ 115 | MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); 116 | 117 | /* Clear any previous config. Keep it clear if no event or IT mode is selected */ 118 | __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); 119 | __HAL_PWR_PVD_EXTI_DISABLE_IT(); 120 | __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); 121 | 122 | /* Configure interrupt mode */ 123 | if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) 124 | { 125 | __HAL_PWR_PVD_EXTI_ENABLE_IT(); 126 | } 127 | 128 | /* Configure event mode */ 129 | if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) 130 | { 131 | __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); 132 | } 133 | 134 | /* Configure the edge */ 135 | if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) 136 | { 137 | __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); 138 | } 139 | 140 | if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) 141 | { 142 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); 143 | } 144 | } 145 | 146 | /** 147 | * @brief Enables the Power Voltage Detector(PVD). 148 | * @retval None 149 | */ 150 | void HAL_PWR_EnablePVD(void) 151 | { 152 | PWR->CR |= (uint32_t)PWR_CR_PVDE; 153 | } 154 | 155 | /** 156 | * @brief Disables the Power Voltage Detector(PVD). 157 | * @retval None 158 | */ 159 | void HAL_PWR_DisablePVD(void) 160 | { 161 | PWR->CR &= ~((uint32_t)PWR_CR_PVDE); 162 | } 163 | 164 | /** 165 | * @brief This function handles the PWR PVD interrupt request. 166 | * @note This API should be called under the PVD_IRQHandler() or PVD_VDDIO2_IRQHandler(). 167 | * @retval None 168 | */ 169 | void HAL_PWR_PVD_IRQHandler(void) 170 | { 171 | /* Check PWR exti flag */ 172 | if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) 173 | { 174 | /* PWR PVD interrupt user callback */ 175 | HAL_PWR_PVDCallback(); 176 | 177 | /* Clear PWR Exti pending bit */ 178 | __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); 179 | } 180 | } 181 | 182 | /** 183 | * @brief PWR PVD interrupt callback 184 | * @retval None 185 | */ 186 | __weak void HAL_PWR_PVDCallback(void) 187 | { 188 | /* NOTE : This function Should not be modified, when the callback is needed, 189 | the HAL_PWR_PVDCallback could be implemented in the user file 190 | */ 191 | } 192 | 193 | #endif /* defined (STM32F031x6) || defined (STM32F051x8) || */ 194 | /* defined (STM32F071xB) || defined (STM32F091xC) || */ 195 | /* defined (STM32F042x6) || defined (STM32F072xB) */ 196 | 197 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ 198 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ 199 | defined (STM32F091xC) || defined (STM32F098xx) 200 | /** 201 | * @brief Enable VDDIO2 monitor: enable Exti 31 and falling edge detection. 202 | * @note If Exti 31 is enable correlty and VDDIO2 voltage goes below Vrefint, 203 | an interrupt is generated Irq line 1. 204 | NVIS has to be enable by user. 205 | * @retval None 206 | */ 207 | void HAL_PWREx_EnableVddio2Monitor(void) 208 | { 209 | __HAL_PWR_VDDIO2_EXTI_ENABLE_IT(); 210 | __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE(); 211 | } 212 | 213 | /** 214 | * @brief Disable the Vddio2 Monitor. 215 | * @retval None 216 | */ 217 | void HAL_PWREx_DisableVddio2Monitor(void) 218 | { 219 | __HAL_PWR_VDDIO2_EXTI_DISABLE_IT(); 220 | __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE(); 221 | 222 | } 223 | 224 | /** 225 | * @brief This function handles the PWR Vddio2 monitor interrupt request. 226 | * @note This API should be called under the VDDIO2_IRQHandler() PVD_VDDIO2_IRQHandler(). 227 | * @retval None 228 | */ 229 | void HAL_PWREx_Vddio2Monitor_IRQHandler(void) 230 | { 231 | /* Check PWR exti flag */ 232 | if(__HAL_PWR_VDDIO2_EXTI_GET_FLAG() != RESET) 233 | { 234 | /* PWR Vddio2 monitor interrupt user callback */ 235 | HAL_PWREx_Vddio2MonitorCallback(); 236 | 237 | /* Clear PWR Exti pending bit */ 238 | __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG(); 239 | } 240 | } 241 | 242 | /** 243 | * @brief PWR Vddio2 Monitor interrupt callback 244 | * @retval None 245 | */ 246 | __weak void HAL_PWREx_Vddio2MonitorCallback(void) 247 | { 248 | /* NOTE : This function Should not be modified, when the callback is needed, 249 | the HAL_PWREx_Vddio2MonitorCallback could be implemented in the user file 250 | */ 251 | } 252 | 253 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ 254 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ 255 | defined (STM32F091xC) || defined (STM32F098xx) */ 256 | 257 | /** 258 | * @} 259 | */ 260 | 261 | /** 262 | * @} 263 | */ 264 | 265 | #endif /* HAL_PWR_MODULE_ENABLED */ 266 | /** 267 | * @} 268 | */ 269 | 270 | /** 271 | * @} 272 | */ 273 | 274 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 275 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_utils.h 4 | * @author MCD Application Team 5 | * @brief Header file of UTILS LL module. 6 | @verbatim 7 | ============================================================================== 8 | ##### How to use this driver ##### 9 | ============================================================================== 10 | [..] 11 | The LL UTILS driver contains a set of generic APIs that can be 12 | used by user: 13 | (+) Device electronic signature 14 | (+) Timing functions 15 | (+) PLL configuration functions 16 | 17 | @endverbatim 18 | ****************************************************************************** 19 | * @attention 20 | * 21 | *

© Copyright (c) 2016 STMicroelectronics. 22 | * All rights reserved.

23 | * 24 | * This software component is licensed by ST under BSD 3-Clause license, 25 | * the "License"; You may not use this file except in compliance with the 26 | * License. You may obtain a copy of the License at: 27 | * opensource.org/licenses/BSD-3-Clause 28 | * 29 | ****************************************************************************** 30 | */ 31 | 32 | /* Define to prevent recursive inclusion -------------------------------------*/ 33 | #ifndef __STM32F0xx_LL_UTILS_H 34 | #define __STM32F0xx_LL_UTILS_H 35 | 36 | #ifdef __cplusplus 37 | extern "C" { 38 | #endif 39 | 40 | /* Includes ------------------------------------------------------------------*/ 41 | #include "stm32f0xx.h" 42 | 43 | /** @addtogroup STM32F0xx_LL_Driver 44 | * @{ 45 | */ 46 | 47 | /** @defgroup UTILS_LL UTILS 48 | * @{ 49 | */ 50 | 51 | /* Private types -------------------------------------------------------------*/ 52 | /* Private variables ---------------------------------------------------------*/ 53 | 54 | /* Private constants ---------------------------------------------------------*/ 55 | /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants 56 | * @{ 57 | */ 58 | 59 | /* Max delay can be used in LL_mDelay */ 60 | #define LL_MAX_DELAY 0xFFFFFFFFU 61 | 62 | /** 63 | * @brief Unique device ID register base address 64 | */ 65 | #define UID_BASE_ADDRESS UID_BASE 66 | 67 | /** 68 | * @brief Flash size data register base address 69 | */ 70 | #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /* Private macros ------------------------------------------------------------*/ 77 | /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros 78 | * @{ 79 | */ 80 | /** 81 | * @} 82 | */ 83 | /* Exported types ------------------------------------------------------------*/ 84 | /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures 85 | * @{ 86 | */ 87 | /** 88 | * @brief UTILS PLL structure definition 89 | */ 90 | typedef struct 91 | { 92 | uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock. 93 | This parameter can be a value of @ref RCC_LL_EC_PLL_MUL 94 | 95 | This feature can be modified afterwards using unitary function 96 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ 97 | 98 | #if defined(RCC_PLLSRC_PREDIV1_SUPPORT) 99 | uint32_t PLLDiv; /*!< Division factor for PLL VCO output clock. 100 | This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV 101 | 102 | This feature can be modified afterwards using unitary function 103 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ 104 | #else 105 | uint32_t Prediv; /*!< Division factor for HSE used as PLL clock source. 106 | This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV 107 | 108 | This feature can be modified afterwards using unitary function 109 | @ref LL_RCC_PLL_ConfigDomain_SYS(). */ 110 | #endif /* RCC_PLLSRC_PREDIV1_SUPPORT */ 111 | } LL_UTILS_PLLInitTypeDef; 112 | 113 | /** 114 | * @brief UTILS System, AHB and APB buses clock configuration structure definition 115 | */ 116 | typedef struct 117 | { 118 | uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK). 119 | This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV 120 | 121 | This feature can be modified afterwards using unitary function 122 | @ref LL_RCC_SetAHBPrescaler(). */ 123 | 124 | uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK). 125 | This parameter can be a value of @ref RCC_LL_EC_APB1_DIV 126 | 127 | This feature can be modified afterwards using unitary function 128 | @ref LL_RCC_SetAPB1Prescaler(). */ 129 | } LL_UTILS_ClkInitTypeDef; 130 | 131 | /** 132 | * @} 133 | */ 134 | 135 | /* Exported constants --------------------------------------------------------*/ 136 | /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants 137 | * @{ 138 | */ 139 | 140 | /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation 141 | * @{ 142 | */ 143 | #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */ 144 | #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */ 145 | /** 146 | * @} 147 | */ 148 | 149 | /** 150 | * @} 151 | */ 152 | 153 | /* Exported macro ------------------------------------------------------------*/ 154 | 155 | /* Exported functions --------------------------------------------------------*/ 156 | /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions 157 | * @{ 158 | */ 159 | 160 | /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE 161 | * @{ 162 | */ 163 | 164 | /** 165 | * @brief Get Word0 of the unique device identifier (UID based on 96 bits) 166 | * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format 167 | */ 168 | __STATIC_INLINE uint32_t LL_GetUID_Word0(void) 169 | { 170 | return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS))); 171 | } 172 | 173 | /** 174 | * @brief Get Word1 of the unique device identifier (UID based on 96 bits) 175 | * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40]) 176 | */ 177 | __STATIC_INLINE uint32_t LL_GetUID_Word1(void) 178 | { 179 | return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U)))); 180 | } 181 | 182 | /** 183 | * @brief Get Word2 of the unique device identifier (UID based on 96 bits) 184 | * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24] 185 | */ 186 | __STATIC_INLINE uint32_t LL_GetUID_Word2(void) 187 | { 188 | return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U)))); 189 | } 190 | 191 | /** 192 | * @brief Get Flash memory size 193 | * @note This bitfield indicates the size of the device Flash memory expressed in 194 | * Kbytes. As an example, 0x040 corresponds to 64 Kbytes. 195 | * @retval FLASH_SIZE[15:0]: Flash memory size 196 | */ 197 | __STATIC_INLINE uint32_t LL_GetFlashSize(void) 198 | { 199 | return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS))); 200 | } 201 | 202 | 203 | /** 204 | * @} 205 | */ 206 | 207 | /** @defgroup UTILS_LL_EF_DELAY DELAY 208 | * @{ 209 | */ 210 | 211 | /** 212 | * @brief This function configures the Cortex-M SysTick source of the time base. 213 | * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) 214 | * @note When a RTOS is used, it is recommended to avoid changing the SysTick 215 | * configuration by calling this function, for a delay use rather osDelay RTOS service. 216 | * @param Ticks Number of ticks 217 | * @retval None 218 | */ 219 | __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) 220 | { 221 | /* Configure the SysTick to have interrupt in 1ms time base */ 222 | SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */ 223 | SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 224 | SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 225 | SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */ 226 | } 227 | 228 | void LL_Init1msTick(uint32_t HCLKFrequency); 229 | void LL_mDelay(uint32_t Delay); 230 | 231 | /** 232 | * @} 233 | */ 234 | 235 | /** @defgroup UTILS_EF_SYSTEM SYSTEM 236 | * @{ 237 | */ 238 | 239 | void LL_SetSystemCoreClock(uint32_t HCLKFrequency); 240 | ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, 241 | LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); 242 | #if defined(RCC_CFGR_SW_HSI48) 243 | ErrorStatus LL_PLL_ConfigSystemClock_HSI48(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, 244 | LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); 245 | #endif /*RCC_CFGR_SW_HSI48*/ 246 | ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass, 247 | LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); 248 | 249 | /** 250 | * @} 251 | */ 252 | 253 | /** 254 | * @} 255 | */ 256 | 257 | /** 258 | * @} 259 | */ 260 | 261 | /** 262 | * @} 263 | */ 264 | 265 | #ifdef __cplusplus 266 | } 267 | #endif 268 | 269 | #endif /* __STM32F0xx_LL_UTILS_H */ 270 | 271 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 272 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/cmsis_compiler.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_compiler.h 3 | * @brief CMSIS compiler generic header file 4 | * @version V5.0.4 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #ifndef __CMSIS_COMPILER_H 26 | #define __CMSIS_COMPILER_H 27 | 28 | #include 29 | 30 | /* 31 | * Arm Compiler 4/5 32 | */ 33 | #if defined ( __CC_ARM ) 34 | #include "cmsis_armcc.h" 35 | 36 | 37 | /* 38 | * Arm Compiler 6 (armclang) 39 | */ 40 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 41 | #include "cmsis_armclang.h" 42 | 43 | 44 | /* 45 | * GNU Compiler 46 | */ 47 | #elif defined ( __GNUC__ ) 48 | #include "cmsis_gcc.h" 49 | 50 | 51 | /* 52 | * IAR Compiler 53 | */ 54 | #elif defined ( __ICCARM__ ) 55 | #include 56 | 57 | 58 | /* 59 | * TI Arm Compiler 60 | */ 61 | #elif defined ( __TI_ARM__ ) 62 | #include 63 | 64 | #ifndef __ASM 65 | #define __ASM __asm 66 | #endif 67 | #ifndef __INLINE 68 | #define __INLINE inline 69 | #endif 70 | #ifndef __STATIC_INLINE 71 | #define __STATIC_INLINE static inline 72 | #endif 73 | #ifndef __STATIC_FORCEINLINE 74 | #define __STATIC_FORCEINLINE __STATIC_INLINE 75 | #endif 76 | #ifndef __NO_RETURN 77 | #define __NO_RETURN __attribute__((noreturn)) 78 | #endif 79 | #ifndef __USED 80 | #define __USED __attribute__((used)) 81 | #endif 82 | #ifndef __WEAK 83 | #define __WEAK __attribute__((weak)) 84 | #endif 85 | #ifndef __PACKED 86 | #define __PACKED __attribute__((packed)) 87 | #endif 88 | #ifndef __PACKED_STRUCT 89 | #define __PACKED_STRUCT struct __attribute__((packed)) 90 | #endif 91 | #ifndef __PACKED_UNION 92 | #define __PACKED_UNION union __attribute__((packed)) 93 | #endif 94 | #ifndef __UNALIGNED_UINT32 /* deprecated */ 95 | struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 96 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 97 | #endif 98 | #ifndef __UNALIGNED_UINT16_WRITE 99 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 100 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val)) 101 | #endif 102 | #ifndef __UNALIGNED_UINT16_READ 103 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 104 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) 105 | #endif 106 | #ifndef __UNALIGNED_UINT32_WRITE 107 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 108 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) 109 | #endif 110 | #ifndef __UNALIGNED_UINT32_READ 111 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 112 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) 113 | #endif 114 | #ifndef __ALIGNED 115 | #define __ALIGNED(x) __attribute__((aligned(x))) 116 | #endif 117 | #ifndef __RESTRICT 118 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. 119 | #define __RESTRICT 120 | #endif 121 | 122 | 123 | /* 124 | * TASKING Compiler 125 | */ 126 | #elif defined ( __TASKING__ ) 127 | /* 128 | * The CMSIS functions have been implemented as intrinsics in the compiler. 129 | * Please use "carm -?i" to get an up to date list of all intrinsics, 130 | * Including the CMSIS ones. 131 | */ 132 | 133 | #ifndef __ASM 134 | #define __ASM __asm 135 | #endif 136 | #ifndef __INLINE 137 | #define __INLINE inline 138 | #endif 139 | #ifndef __STATIC_INLINE 140 | #define __STATIC_INLINE static inline 141 | #endif 142 | #ifndef __STATIC_FORCEINLINE 143 | #define __STATIC_FORCEINLINE __STATIC_INLINE 144 | #endif 145 | #ifndef __NO_RETURN 146 | #define __NO_RETURN __attribute__((noreturn)) 147 | #endif 148 | #ifndef __USED 149 | #define __USED __attribute__((used)) 150 | #endif 151 | #ifndef __WEAK 152 | #define __WEAK __attribute__((weak)) 153 | #endif 154 | #ifndef __PACKED 155 | #define __PACKED __packed__ 156 | #endif 157 | #ifndef __PACKED_STRUCT 158 | #define __PACKED_STRUCT struct __packed__ 159 | #endif 160 | #ifndef __PACKED_UNION 161 | #define __PACKED_UNION union __packed__ 162 | #endif 163 | #ifndef __UNALIGNED_UINT32 /* deprecated */ 164 | struct __packed__ T_UINT32 { uint32_t v; }; 165 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 166 | #endif 167 | #ifndef __UNALIGNED_UINT16_WRITE 168 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 169 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) 170 | #endif 171 | #ifndef __UNALIGNED_UINT16_READ 172 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 173 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) 174 | #endif 175 | #ifndef __UNALIGNED_UINT32_WRITE 176 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 177 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) 178 | #endif 179 | #ifndef __UNALIGNED_UINT32_READ 180 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 181 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) 182 | #endif 183 | #ifndef __ALIGNED 184 | #define __ALIGNED(x) __align(x) 185 | #endif 186 | #ifndef __RESTRICT 187 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. 188 | #define __RESTRICT 189 | #endif 190 | 191 | 192 | /* 193 | * COSMIC Compiler 194 | */ 195 | #elif defined ( __CSMC__ ) 196 | #include 197 | 198 | #ifndef __ASM 199 | #define __ASM _asm 200 | #endif 201 | #ifndef __INLINE 202 | #define __INLINE inline 203 | #endif 204 | #ifndef __STATIC_INLINE 205 | #define __STATIC_INLINE static inline 206 | #endif 207 | #ifndef __STATIC_FORCEINLINE 208 | #define __STATIC_FORCEINLINE __STATIC_INLINE 209 | #endif 210 | #ifndef __NO_RETURN 211 | // NO RETURN is automatically detected hence no warning here 212 | #define __NO_RETURN 213 | #endif 214 | #ifndef __USED 215 | #warning No compiler specific solution for __USED. __USED is ignored. 216 | #define __USED 217 | #endif 218 | #ifndef __WEAK 219 | #define __WEAK __weak 220 | #endif 221 | #ifndef __PACKED 222 | #define __PACKED @packed 223 | #endif 224 | #ifndef __PACKED_STRUCT 225 | #define __PACKED_STRUCT @packed struct 226 | #endif 227 | #ifndef __PACKED_UNION 228 | #define __PACKED_UNION @packed union 229 | #endif 230 | #ifndef __UNALIGNED_UINT32 /* deprecated */ 231 | @packed struct T_UINT32 { uint32_t v; }; 232 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 233 | #endif 234 | #ifndef __UNALIGNED_UINT16_WRITE 235 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 236 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) 237 | #endif 238 | #ifndef __UNALIGNED_UINT16_READ 239 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 240 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) 241 | #endif 242 | #ifndef __UNALIGNED_UINT32_WRITE 243 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 244 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) 245 | #endif 246 | #ifndef __UNALIGNED_UINT32_READ 247 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 248 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) 249 | #endif 250 | #ifndef __ALIGNED 251 | #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. 252 | #define __ALIGNED(x) 253 | #endif 254 | #ifndef __RESTRICT 255 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. 256 | #define __RESTRICT 257 | #endif 258 | 259 | 260 | #else 261 | #error Unknown compiler. 262 | #endif 263 | 264 | 265 | #endif /* __CMSIS_COMPILER_H */ 266 | 267 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_gpio.c 4 | * @author MCD Application Team 5 | * @brief GPIO LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | #if defined(USE_FULL_LL_DRIVER) 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f0xx_ll_gpio.h" 24 | #include "stm32f0xx_ll_bus.h" 25 | #ifdef USE_FULL_ASSERT 26 | #include "stm32_assert.h" 27 | #else 28 | #define assert_param(expr) ((void)0U) 29 | #endif 30 | 31 | /** @addtogroup STM32F0xx_LL_Driver 32 | * @{ 33 | */ 34 | 35 | #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) 36 | 37 | /** @addtogroup GPIO_LL 38 | * @{ 39 | */ 40 | /** MISRA C:2012 deviation rule has been granted for following rules: 41 | * Rule-12.2 - Medium: RHS argument is in interval [0,INF] which is out of 42 | * range of the shift operator in following API : 43 | * LL_GPIO_Init 44 | * LL_GPIO_DeInit 45 | * LL_GPIO_SetPinMode 46 | * LL_GPIO_GetPinMode 47 | * LL_GPIO_SetPinSpeed 48 | * LL_GPIO_GetPinSpeed 49 | * LL_GPIO_SetPinPull 50 | * LL_GPIO_GetPinPull 51 | * LL_GPIO_GetAFPin_0_7 52 | * LL_GPIO_SetAFPin_0_7 53 | * LL_GPIO_SetAFPin_8_15 54 | * LL_GPIO_GetAFPin_8_15 55 | */ 56 | 57 | /* Private types -------------------------------------------------------------*/ 58 | /* Private variables ---------------------------------------------------------*/ 59 | /* Private constants ---------------------------------------------------------*/ 60 | /* Private macros ------------------------------------------------------------*/ 61 | /** @addtogroup GPIO_LL_Private_Macros 62 | * @{ 63 | */ 64 | #define IS_LL_GPIO_PIN(__VALUE__) (((0x00u) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL))) 65 | 66 | #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) ||\ 67 | ((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\ 68 | ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\ 69 | ((__VALUE__) == LL_GPIO_MODE_ANALOG)) 70 | 71 | #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\ 72 | ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN)) 73 | 74 | #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\ 75 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\ 76 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH)) 77 | 78 | #define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_NO) ||\ 79 | ((__VALUE__) == LL_GPIO_PULL_UP) ||\ 80 | ((__VALUE__) == LL_GPIO_PULL_DOWN)) 81 | 82 | #define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\ 83 | ((__VALUE__) == LL_GPIO_AF_1 ) ||\ 84 | ((__VALUE__) == LL_GPIO_AF_2 ) ||\ 85 | ((__VALUE__) == LL_GPIO_AF_3 ) ||\ 86 | ((__VALUE__) == LL_GPIO_AF_4 ) ||\ 87 | ((__VALUE__) == LL_GPIO_AF_5 ) ||\ 88 | ((__VALUE__) == LL_GPIO_AF_6 ) ||\ 89 | ((__VALUE__) == LL_GPIO_AF_7 )) 90 | /** 91 | * @} 92 | */ 93 | 94 | /* Private function prototypes -----------------------------------------------*/ 95 | 96 | /* Exported functions --------------------------------------------------------*/ 97 | /** @addtogroup GPIO_LL_Exported_Functions 98 | * @{ 99 | */ 100 | 101 | /** @addtogroup GPIO_LL_EF_Init 102 | * @{ 103 | */ 104 | 105 | /** 106 | * @brief De-initialize GPIO registers (Registers restored to their default values). 107 | * @param GPIOx GPIO Port 108 | * @retval An ErrorStatus enumeration value: 109 | * - SUCCESS: GPIO registers are de-initialized 110 | * - ERROR: Wrong GPIO Port 111 | */ 112 | ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx) 113 | { 114 | ErrorStatus status = SUCCESS; 115 | 116 | /* Check the parameters */ 117 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 118 | 119 | /* Force and Release reset on clock of GPIOx Port */ 120 | if (GPIOx == GPIOA) 121 | { 122 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOA); 123 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOA); 124 | } 125 | else if (GPIOx == GPIOB) 126 | { 127 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOB); 128 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOB); 129 | } 130 | else if (GPIOx == GPIOC) 131 | { 132 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOC); 133 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOC); 134 | } 135 | #if defined(GPIOD) 136 | else if (GPIOx == GPIOD) 137 | { 138 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOD); 139 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOD); 140 | } 141 | #endif /* GPIOD */ 142 | #if defined(GPIOE) 143 | else if (GPIOx == GPIOE) 144 | { 145 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOE); 146 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOE); 147 | } 148 | #endif /* GPIOE */ 149 | #if defined(GPIOF) 150 | else if (GPIOx == GPIOF) 151 | { 152 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOF); 153 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOF); 154 | } 155 | #endif /* GPIOF */ 156 | else 157 | { 158 | status = ERROR; 159 | } 160 | 161 | return (status); 162 | } 163 | 164 | /** 165 | * @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct. 166 | * @param GPIOx GPIO Port 167 | * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure 168 | * that contains the configuration information for the specified GPIO peripheral. 169 | * @retval An ErrorStatus enumeration value: 170 | * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content 171 | * - ERROR: Not applicable 172 | */ 173 | ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct) 174 | { 175 | uint32_t pinpos; 176 | uint32_t currentpin; 177 | 178 | /* Check the parameters */ 179 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 180 | assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin)); 181 | assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode)); 182 | assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull)); 183 | 184 | /* ------------------------- Configure the port pins ---------------- */ 185 | /* Initialize pinpos on first pin set */ 186 | pinpos = 0; 187 | 188 | /* Configure the port pins */ 189 | while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00u) 190 | { 191 | /* Get current io position */ 192 | currentpin = (GPIO_InitStruct->Pin) & (0x00000001uL << pinpos); 193 | 194 | if (currentpin != 0x00u) 195 | { 196 | /* Pin Mode configuration */ 197 | LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode); 198 | 199 | if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) 200 | { 201 | /* Check Speed mode parameters */ 202 | assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed)); 203 | 204 | /* Speed mode configuration */ 205 | LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed); 206 | } 207 | 208 | /* Pull-up Pull down resistor configuration*/ 209 | LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull); 210 | 211 | if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE) 212 | { 213 | /* Check Alternate parameter */ 214 | assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate)); 215 | 216 | /* Speed mode configuration */ 217 | if (currentpin < LL_GPIO_PIN_8) 218 | { 219 | LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate); 220 | } 221 | else 222 | { 223 | LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate); 224 | } 225 | } 226 | } 227 | pinpos++; 228 | } 229 | 230 | if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) 231 | { 232 | /* Check Output mode parameters */ 233 | assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType)); 234 | 235 | /* Output mode configuration*/ 236 | LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType); 237 | 238 | } 239 | return (SUCCESS); 240 | } 241 | 242 | /** 243 | * @brief Set each @ref LL_GPIO_InitTypeDef field to default value. 244 | * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure 245 | * whose fields will be set to default values. 246 | * @retval None 247 | */ 248 | 249 | void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct) 250 | { 251 | /* Reset GPIO init structure parameters values */ 252 | GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL; 253 | GPIO_InitStruct->Mode = LL_GPIO_MODE_ANALOG; 254 | GPIO_InitStruct->Speed = LL_GPIO_SPEED_FREQ_LOW; 255 | GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL; 256 | GPIO_InitStruct->Pull = LL_GPIO_PULL_NO; 257 | GPIO_InitStruct->Alternate = LL_GPIO_AF_0; 258 | } 259 | 260 | /** 261 | * @} 262 | */ 263 | 264 | /** 265 | * @} 266 | */ 267 | 268 | /** 269 | * @} 270 | */ 271 | 272 | #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) */ 273 | 274 | /** 275 | * @} 276 | */ 277 | 278 | #endif /* USE_FULL_LL_DRIVER */ 279 | 280 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 281 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_ll_cortex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CORTEX LL module. 6 | @verbatim 7 | ============================================================================== 8 | ##### How to use this driver ##### 9 | ============================================================================== 10 | [..] 11 | The LL CORTEX driver contains a set of generic APIs that can be 12 | used by user: 13 | (+) SYSTICK configuration used by @ref LL_mDelay and @ref LL_Init1msTick 14 | functions 15 | (+) Low power mode configuration (SCB register of Cortex-MCU) 16 | (+) API to access to MCU info (CPUID register) 17 | 18 | @endverbatim 19 | ****************************************************************************** 20 | * @attention 21 | * 22 | *

© Copyright (c) 2016 STMicroelectronics. 23 | * All rights reserved.

24 | * 25 | * This software component is licensed by ST under BSD 3-Clause license, 26 | * the "License"; You may not use this file except in compliance with the 27 | * License. You may obtain a copy of the License at: 28 | * opensource.org/licenses/BSD-3-Clause 29 | * 30 | ****************************************************************************** 31 | */ 32 | 33 | /* Define to prevent recursive inclusion -------------------------------------*/ 34 | #ifndef __STM32F0xx_LL_CORTEX_H 35 | #define __STM32F0xx_LL_CORTEX_H 36 | 37 | #ifdef __cplusplus 38 | extern "C" { 39 | #endif 40 | 41 | /* Includes ------------------------------------------------------------------*/ 42 | #include "stm32f0xx.h" 43 | 44 | /** @addtogroup STM32F0xx_LL_Driver 45 | * @{ 46 | */ 47 | 48 | /** @defgroup CORTEX_LL CORTEX 49 | * @{ 50 | */ 51 | 52 | /* Private types -------------------------------------------------------------*/ 53 | /* Private variables ---------------------------------------------------------*/ 54 | 55 | /* Private constants ---------------------------------------------------------*/ 56 | 57 | /* Private macros ------------------------------------------------------------*/ 58 | 59 | /* Exported types ------------------------------------------------------------*/ 60 | /* Exported constants --------------------------------------------------------*/ 61 | /** @defgroup CORTEX_LL_Exported_Constants CORTEX Exported Constants 62 | * @{ 63 | */ 64 | 65 | /** @defgroup CORTEX_LL_EC_CLKSOURCE_HCLK SYSTICK Clock Source 66 | * @{ 67 | */ 68 | #define LL_SYSTICK_CLKSOURCE_HCLK_DIV8 0x00000000U /*!< AHB clock divided by 8 selected as SysTick clock source.*/ 69 | #define LL_SYSTICK_CLKSOURCE_HCLK SysTick_CTRL_CLKSOURCE_Msk /*!< AHB clock selected as SysTick clock source. */ 70 | /** 71 | * @} 72 | */ 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | /* Exported macro ------------------------------------------------------------*/ 79 | 80 | /* Exported functions --------------------------------------------------------*/ 81 | /** @defgroup CORTEX_LL_Exported_Functions CORTEX Exported Functions 82 | * @{ 83 | */ 84 | 85 | /** @defgroup CORTEX_LL_EF_SYSTICK SYSTICK 86 | * @{ 87 | */ 88 | 89 | /** 90 | * @brief This function checks if the Systick counter flag is active or not. 91 | * @note It can be used in timeout function on application side. 92 | * @rmtoll STK_CTRL COUNTFLAG LL_SYSTICK_IsActiveCounterFlag 93 | * @retval State of bit (1 or 0). 94 | */ 95 | __STATIC_INLINE uint32_t LL_SYSTICK_IsActiveCounterFlag(void) 96 | { 97 | return ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == (SysTick_CTRL_COUNTFLAG_Msk)); 98 | } 99 | 100 | /** 101 | * @brief Configures the SysTick clock source 102 | * @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_SetClkSource 103 | * @param Source This parameter can be one of the following values: 104 | * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8 105 | * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK 106 | * @retval None 107 | */ 108 | __STATIC_INLINE void LL_SYSTICK_SetClkSource(uint32_t Source) 109 | { 110 | if (Source == LL_SYSTICK_CLKSOURCE_HCLK) 111 | { 112 | SET_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); 113 | } 114 | else 115 | { 116 | CLEAR_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); 117 | } 118 | } 119 | 120 | /** 121 | * @brief Get the SysTick clock source 122 | * @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_GetClkSource 123 | * @retval Returned value can be one of the following values: 124 | * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8 125 | * @arg @ref LL_SYSTICK_CLKSOURCE_HCLK 126 | */ 127 | __STATIC_INLINE uint32_t LL_SYSTICK_GetClkSource(void) 128 | { 129 | return READ_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK); 130 | } 131 | 132 | /** 133 | * @brief Enable SysTick exception request 134 | * @rmtoll STK_CTRL TICKINT LL_SYSTICK_EnableIT 135 | * @retval None 136 | */ 137 | __STATIC_INLINE void LL_SYSTICK_EnableIT(void) 138 | { 139 | SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); 140 | } 141 | 142 | /** 143 | * @brief Disable SysTick exception request 144 | * @rmtoll STK_CTRL TICKINT LL_SYSTICK_DisableIT 145 | * @retval None 146 | */ 147 | __STATIC_INLINE void LL_SYSTICK_DisableIT(void) 148 | { 149 | CLEAR_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk); 150 | } 151 | 152 | /** 153 | * @brief Checks if the SYSTICK interrupt is enabled or disabled. 154 | * @rmtoll STK_CTRL TICKINT LL_SYSTICK_IsEnabledIT 155 | * @retval State of bit (1 or 0). 156 | */ 157 | __STATIC_INLINE uint32_t LL_SYSTICK_IsEnabledIT(void) 158 | { 159 | return (READ_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk) == (SysTick_CTRL_TICKINT_Msk)); 160 | } 161 | 162 | /** 163 | * @} 164 | */ 165 | 166 | /** @defgroup CORTEX_LL_EF_LOW_POWER_MODE LOW POWER MODE 167 | * @{ 168 | */ 169 | 170 | /** 171 | * @brief Processor uses sleep as its low power mode 172 | * @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep 173 | * @retval None 174 | */ 175 | __STATIC_INLINE void LL_LPM_EnableSleep(void) 176 | { 177 | /* Clear SLEEPDEEP bit of Cortex System Control Register */ 178 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 179 | } 180 | 181 | /** 182 | * @brief Processor uses deep sleep as its low power mode 183 | * @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableDeepSleep 184 | * @retval None 185 | */ 186 | __STATIC_INLINE void LL_LPM_EnableDeepSleep(void) 187 | { 188 | /* Set SLEEPDEEP bit of Cortex System Control Register */ 189 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 190 | } 191 | 192 | /** 193 | * @brief Configures sleep-on-exit when returning from Handler mode to Thread mode. 194 | * @note Setting this bit to 1 enables an interrupt-driven application to avoid returning to an 195 | * empty main application. 196 | * @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_EnableSleepOnExit 197 | * @retval None 198 | */ 199 | __STATIC_INLINE void LL_LPM_EnableSleepOnExit(void) 200 | { 201 | /* Set SLEEPONEXIT bit of Cortex System Control Register */ 202 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); 203 | } 204 | 205 | /** 206 | * @brief Do not sleep when returning to Thread mode. 207 | * @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_DisableSleepOnExit 208 | * @retval None 209 | */ 210 | __STATIC_INLINE void LL_LPM_DisableSleepOnExit(void) 211 | { 212 | /* Clear SLEEPONEXIT bit of Cortex System Control Register */ 213 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); 214 | } 215 | 216 | /** 217 | * @brief Enabled events and all interrupts, including disabled interrupts, can wakeup the 218 | * processor. 219 | * @rmtoll SCB_SCR SEVEONPEND LL_LPM_EnableEventOnPend 220 | * @retval None 221 | */ 222 | __STATIC_INLINE void LL_LPM_EnableEventOnPend(void) 223 | { 224 | /* Set SEVEONPEND bit of Cortex System Control Register */ 225 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); 226 | } 227 | 228 | /** 229 | * @brief Only enabled interrupts or events can wakeup the processor, disabled interrupts are 230 | * excluded 231 | * @rmtoll SCB_SCR SEVEONPEND LL_LPM_DisableEventOnPend 232 | * @retval None 233 | */ 234 | __STATIC_INLINE void LL_LPM_DisableEventOnPend(void) 235 | { 236 | /* Clear SEVEONPEND bit of Cortex System Control Register */ 237 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); 238 | } 239 | 240 | /** 241 | * @} 242 | */ 243 | 244 | /** @defgroup CORTEX_LL_EF_MCU_INFO MCU INFO 245 | * @{ 246 | */ 247 | 248 | /** 249 | * @brief Get Implementer code 250 | * @rmtoll SCB_CPUID IMPLEMENTER LL_CPUID_GetImplementer 251 | * @retval Value should be equal to 0x41 for ARM 252 | */ 253 | __STATIC_INLINE uint32_t LL_CPUID_GetImplementer(void) 254 | { 255 | return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos); 256 | } 257 | 258 | /** 259 | * @brief Get Variant number (The r value in the rnpn product revision identifier) 260 | * @rmtoll SCB_CPUID VARIANT LL_CPUID_GetVariant 261 | * @retval Value between 0 and 255 (0x0: revision 0) 262 | */ 263 | __STATIC_INLINE uint32_t LL_CPUID_GetVariant(void) 264 | { 265 | return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos); 266 | } 267 | 268 | /** 269 | * @brief Get Architecture number 270 | * @rmtoll SCB_CPUID ARCHITECTURE LL_CPUID_GetArchitecture 271 | * @retval Value should be equal to 0xC for Cortex-M0 devices 272 | */ 273 | __STATIC_INLINE uint32_t LL_CPUID_GetArchitecture(void) 274 | { 275 | return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos); 276 | } 277 | 278 | /** 279 | * @brief Get Part number 280 | * @rmtoll SCB_CPUID PARTNO LL_CPUID_GetParNo 281 | * @retval Value should be equal to 0xC20 for Cortex-M0 282 | */ 283 | __STATIC_INLINE uint32_t LL_CPUID_GetParNo(void) 284 | { 285 | return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos); 286 | } 287 | 288 | /** 289 | * @brief Get Revision number (The p value in the rnpn product revision identifier, indicates patch release) 290 | * @rmtoll SCB_CPUID REVISION LL_CPUID_GetRevision 291 | * @retval Value between 0 and 255 (0x1: patch 1) 292 | */ 293 | __STATIC_INLINE uint32_t LL_CPUID_GetRevision(void) 294 | { 295 | return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos); 296 | } 297 | 298 | /** 299 | * @} 300 | */ 301 | 302 | /** 303 | * @} 304 | */ 305 | 306 | /** 307 | * @} 308 | */ 309 | 310 | /** 311 | * @} 312 | */ 313 | 314 | #ifdef __cplusplus 315 | } 316 | #endif 317 | 318 | #endif /* __STM32F0xx_LL_CORTEX_H */ 319 | 320 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 321 | -------------------------------------------------------------------------------- /Src/usbd_conf.c: -------------------------------------------------------------------------------- 1 | #include "usbd_conf.h" 2 | #include "stm32f0xx.h" 3 | #include "stm32f0xx_hal.h" 4 | #include "usbd_core.h" 5 | #include "usbd_def.h" 6 | #include 7 | 8 | PCD_HandleTypeDef hpcd_USB_FS; 9 | 10 | void Error_Handler(void); 11 | 12 | static USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status); 13 | static void SystemClockConfig_Resume(void); 14 | extern void SystemClock_Config(void); 15 | 16 | void HAL_PCD_MspInit(PCD_HandleTypeDef *pcdHandle) 17 | { 18 | if (pcdHandle->Instance == USB) 19 | { 20 | __HAL_RCC_USB_CLK_ENABLE(); 21 | } 22 | } 23 | 24 | void HAL_PCD_MspDeInit(PCD_HandleTypeDef *pcdHandle) 25 | { 26 | if (pcdHandle->Instance == USB) 27 | { 28 | __HAL_RCC_USB_CLK_DISABLE(); 29 | HAL_NVIC_DisableIRQ(USB_IRQn); 30 | } 31 | } 32 | 33 | void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) 34 | { 35 | USBD_LL_SetupStage((USBD_HandleTypeDef *)hpcd->pData, (uint8_t *)hpcd->Setup); 36 | } 37 | 38 | void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) 39 | { 40 | USBD_LL_DataOutStage((USBD_HandleTypeDef *)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); 41 | } 42 | 43 | void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) 44 | { 45 | USBD_LL_DataInStage((USBD_HandleTypeDef *)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); 46 | } 47 | 48 | void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) 49 | { 50 | USBD_LL_SOF((USBD_HandleTypeDef *)hpcd->pData); 51 | } 52 | 53 | void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) 54 | { 55 | USBD_SpeedTypeDef speed = USBD_SPEED_FULL; 56 | 57 | if (hpcd->Init.speed != PCD_SPEED_FULL) 58 | { 59 | assert(0); 60 | } 61 | 62 | USBD_LL_SetSpeed((USBD_HandleTypeDef *)hpcd->pData, speed); 63 | USBD_LL_Reset((USBD_HandleTypeDef *)hpcd->pData); 64 | } 65 | 66 | void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) 67 | { 68 | USBD_LL_Suspend((USBD_HandleTypeDef *)hpcd->pData); 69 | if (hpcd->Init.low_power_enable) 70 | { 71 | /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ 72 | SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 73 | } 74 | } 75 | 76 | void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) 77 | { 78 | if (hpcd->Init.low_power_enable) 79 | { 80 | /* Reset SLEEPDEEP bit of Cortex System Control Register. */ 81 | SCB->SCR &= (uint32_t) ~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 82 | SystemClockConfig_Resume(); 83 | } 84 | USBD_LL_Resume((USBD_HandleTypeDef *)hpcd->pData); 85 | } 86 | 87 | void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) 88 | { 89 | USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef *)hpcd->pData, epnum); 90 | } 91 | 92 | void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) 93 | { 94 | USBD_LL_IsoINIncomplete((USBD_HandleTypeDef *)hpcd->pData, epnum); 95 | } 96 | 97 | void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) 98 | { 99 | USBD_LL_DevConnected((USBD_HandleTypeDef *)hpcd->pData); 100 | } 101 | 102 | void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) 103 | { 104 | USBD_LL_DevDisconnected((USBD_HandleTypeDef *)hpcd->pData); 105 | } 106 | 107 | USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) 108 | { 109 | hpcd_USB_FS.pData = pdev; 110 | pdev->pData = &hpcd_USB_FS; 111 | 112 | hpcd_USB_FS.Instance = USB; 113 | hpcd_USB_FS.Init.dev_endpoints = 6; 114 | hpcd_USB_FS.Init.speed = PCD_SPEED_FULL; 115 | hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED; 116 | hpcd_USB_FS.Init.low_power_enable = DISABLE; 117 | hpcd_USB_FS.Init.lpm_enable = DISABLE; 118 | hpcd_USB_FS.Init.battery_charging_enable = DISABLE; 119 | 120 | if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK) 121 | { 122 | assert(0); 123 | } 124 | 125 | HAL_PCDEx_PMAConfig((PCD_HandleTypeDef *)pdev->pData, 0x00, PCD_SNG_BUF, 0x18 + (0 * USB_FS_MAX_PACKET_SIZE)); 126 | HAL_PCDEx_PMAConfig((PCD_HandleTypeDef *)pdev->pData, 0x80, PCD_SNG_BUF, 0x18 + (1 * USB_FS_MAX_PACKET_SIZE)); 127 | HAL_PCDEx_PMAConfig((PCD_HandleTypeDef *)pdev->pData, 0x01, PCD_SNG_BUF, 0x18 + (2 * USB_FS_MAX_PACKET_SIZE)); 128 | HAL_PCDEx_PMAConfig((PCD_HandleTypeDef *)pdev->pData, 0x81, PCD_SNG_BUF, 0x18 + (3 * USB_FS_MAX_PACKET_SIZE)); 129 | HAL_PCDEx_PMAConfig((PCD_HandleTypeDef *)pdev->pData, 0x02, PCD_SNG_BUF, 0x18 + (4 * USB_FS_MAX_PACKET_SIZE)); 130 | HAL_PCDEx_PMAConfig((PCD_HandleTypeDef *)pdev->pData, 0x82, PCD_SNG_BUF, 0x18 + (5 * USB_FS_MAX_PACKET_SIZE)); 131 | 132 | return USBD_OK; 133 | } 134 | 135 | USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev) 136 | { 137 | HAL_StatusTypeDef hal_status = HAL_OK; 138 | USBD_StatusTypeDef usb_status = USBD_OK; 139 | 140 | hal_status = HAL_PCD_DeInit(pdev->pData); 141 | 142 | usb_status = USBD_Get_USB_Status(hal_status); 143 | 144 | return usb_status; 145 | } 146 | 147 | USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) 148 | { 149 | HAL_StatusTypeDef hal_status = HAL_OK; 150 | USBD_StatusTypeDef usb_status = USBD_OK; 151 | 152 | hal_status = HAL_PCD_Start(pdev->pData); 153 | 154 | usb_status = USBD_Get_USB_Status(hal_status); 155 | 156 | return usb_status; 157 | } 158 | 159 | USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev) 160 | { 161 | HAL_StatusTypeDef hal_status = HAL_OK; 162 | USBD_StatusTypeDef usb_status = USBD_OK; 163 | 164 | hal_status = HAL_PCD_Stop(pdev->pData); 165 | 166 | usb_status = USBD_Get_USB_Status(hal_status); 167 | 168 | return usb_status; 169 | } 170 | 171 | USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) 172 | { 173 | HAL_StatusTypeDef hal_status = HAL_OK; 174 | USBD_StatusTypeDef usb_status = USBD_OK; 175 | 176 | hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); 177 | 178 | usb_status = USBD_Get_USB_Status(hal_status); 179 | 180 | return usb_status; 181 | } 182 | 183 | USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) 184 | { 185 | HAL_StatusTypeDef hal_status = HAL_OK; 186 | USBD_StatusTypeDef usb_status = USBD_OK; 187 | 188 | hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr); 189 | 190 | usb_status = USBD_Get_USB_Status(hal_status); 191 | 192 | return usb_status; 193 | } 194 | 195 | USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) 196 | { 197 | HAL_StatusTypeDef hal_status = HAL_OK; 198 | USBD_StatusTypeDef usb_status = USBD_OK; 199 | 200 | hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr); 201 | 202 | usb_status = USBD_Get_USB_Status(hal_status); 203 | 204 | return usb_status; 205 | } 206 | 207 | USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) 208 | { 209 | HAL_StatusTypeDef hal_status = HAL_OK; 210 | USBD_StatusTypeDef usb_status = USBD_OK; 211 | 212 | hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); 213 | 214 | usb_status = USBD_Get_USB_Status(hal_status); 215 | 216 | return usb_status; 217 | } 218 | 219 | USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) 220 | { 221 | HAL_StatusTypeDef hal_status = HAL_OK; 222 | USBD_StatusTypeDef usb_status = USBD_OK; 223 | 224 | hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); 225 | 226 | usb_status = USBD_Get_USB_Status(hal_status); 227 | 228 | return usb_status; 229 | } 230 | 231 | uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) 232 | { 233 | PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef *)pdev->pData; 234 | 235 | if ((ep_addr & 0x80) == 0x80) 236 | { 237 | return hpcd->IN_ep[ep_addr & 0x7F].is_stall; 238 | } 239 | else 240 | { 241 | return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; 242 | } 243 | } 244 | 245 | USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) 246 | { 247 | HAL_StatusTypeDef hal_status = HAL_OK; 248 | USBD_StatusTypeDef usb_status = USBD_OK; 249 | 250 | hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); 251 | 252 | usb_status = USBD_Get_USB_Status(hal_status); 253 | 254 | return usb_status; 255 | } 256 | 257 | USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) 258 | { 259 | HAL_StatusTypeDef hal_status = HAL_OK; 260 | USBD_StatusTypeDef usb_status = USBD_OK; 261 | 262 | hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); 263 | 264 | usb_status = USBD_Get_USB_Status(hal_status); 265 | 266 | return usb_status; 267 | } 268 | 269 | USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) 270 | { 271 | HAL_StatusTypeDef hal_status = HAL_OK; 272 | USBD_StatusTypeDef usb_status = USBD_OK; 273 | 274 | hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); 275 | 276 | usb_status = USBD_Get_USB_Status(hal_status); 277 | 278 | return usb_status; 279 | } 280 | 281 | uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) 282 | { 283 | return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef *)pdev->pData, ep_addr); 284 | } 285 | 286 | void USBD_LL_Delay(uint32_t Delay) 287 | { 288 | HAL_Delay(Delay); 289 | } 290 | 291 | void *USBD_static_malloc(uint32_t size) 292 | { 293 | (void)size; 294 | return 0; 295 | } 296 | 297 | 298 | void USBD_static_free(void *p) 299 | { 300 | (void)p; 301 | } 302 | 303 | static void SystemClockConfig_Resume(void) 304 | { 305 | SystemClock_Config(); 306 | } 307 | 308 | USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status) 309 | { 310 | USBD_StatusTypeDef usb_status = USBD_OK; 311 | 312 | switch (hal_status) 313 | { 314 | case HAL_OK: 315 | usb_status = USBD_OK; 316 | break; 317 | case HAL_ERROR: 318 | usb_status = USBD_FAIL; 319 | break; 320 | case HAL_BUSY: 321 | usb_status = USBD_BUSY; 322 | break; 323 | case HAL_TIMEOUT: 324 | usb_status = USBD_FAIL; 325 | break; 326 | default: 327 | usb_status = USBD_FAIL; 328 | break; 329 | } 330 | return usb_status; 331 | } 332 | -------------------------------------------------------------------------------- /Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_hal_pcd_ex.c 4 | * @author MCD Application Team 5 | * @brief PCD Extended HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the USB Peripheral Controller: 8 | * + Extended features functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | *

© Copyright (c) 2016 STMicroelectronics. 14 | * All rights reserved.

15 | * 16 | * This software component is licensed by ST under BSD 3-Clause license, 17 | * the "License"; You may not use this file except in compliance with the 18 | * License. You may obtain a copy of the License at: 19 | * opensource.org/licenses/BSD-3-Clause 20 | * 21 | ****************************************************************************** 22 | */ 23 | 24 | /* Includes ------------------------------------------------------------------*/ 25 | #include "stm32f0xx_hal.h" 26 | 27 | /** @addtogroup STM32F0xx_HAL_Driver 28 | * @{ 29 | */ 30 | 31 | /** @defgroup PCDEx PCDEx 32 | * @brief PCD Extended HAL module driver 33 | * @{ 34 | */ 35 | 36 | #ifdef HAL_PCD_MODULE_ENABLED 37 | 38 | #if defined (USB) 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | /* Private functions ---------------------------------------------------------*/ 44 | /* Exported functions --------------------------------------------------------*/ 45 | 46 | /** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions 47 | * @{ 48 | */ 49 | 50 | /** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 51 | * @brief PCDEx control functions 52 | * 53 | @verbatim 54 | =============================================================================== 55 | ##### Extended features functions ##### 56 | =============================================================================== 57 | [..] This section provides functions allowing to: 58 | (+) Update FIFO configuration 59 | 60 | @endverbatim 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @brief Configure PMA for EP 66 | * @param hpcd Device instance 67 | * @param ep_addr endpoint address 68 | * @param ep_kind endpoint Kind 69 | * USB_SNG_BUF: Single Buffer used 70 | * USB_DBL_BUF: Double Buffer used 71 | * @param pmaadress: EP address in The PMA: In case of single buffer endpoint 72 | * this parameter is 16-bit value providing the address 73 | * in PMA allocated to endpoint. 74 | * In case of double buffer endpoint this parameter 75 | * is a 32-bit value providing the endpoint buffer 0 address 76 | * in the LSB part of 32-bit value and endpoint buffer 1 address 77 | * in the MSB part of 32-bit value. 78 | * @retval HAL status 79 | */ 80 | 81 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, 82 | uint16_t ep_addr, 83 | uint16_t ep_kind, 84 | uint32_t pmaadress) 85 | { 86 | PCD_EPTypeDef *ep; 87 | 88 | /* initialize ep structure*/ 89 | if ((0x80U & ep_addr) == 0x80U) 90 | { 91 | ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 92 | } 93 | else 94 | { 95 | ep = &hpcd->OUT_ep[ep_addr]; 96 | } 97 | 98 | /* Here we check if the endpoint is single or double Buffer*/ 99 | if (ep_kind == PCD_SNG_BUF) 100 | { 101 | /* Single Buffer */ 102 | ep->doublebuffer = 0U; 103 | /* Configure the PMA */ 104 | ep->pmaadress = (uint16_t)pmaadress; 105 | } 106 | else /* USB_DBL_BUF */ 107 | { 108 | /* Double Buffer Endpoint */ 109 | ep->doublebuffer = 1U; 110 | /* Configure the PMA */ 111 | ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); 112 | ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); 113 | } 114 | 115 | return HAL_OK; 116 | } 117 | 118 | /** 119 | * @brief Activate BatteryCharging feature. 120 | * @param hpcd PCD handle 121 | * @retval HAL status 122 | */ 123 | HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) 124 | { 125 | USB_TypeDef *USBx = hpcd->Instance; 126 | hpcd->battery_charging_active = 1U; 127 | 128 | /* Enable BCD feature */ 129 | USBx->BCDR |= USB_BCDR_BCDEN; 130 | 131 | /* Enable DCD : Data Contact Detect */ 132 | USBx->BCDR &= ~(USB_BCDR_PDEN); 133 | USBx->BCDR &= ~(USB_BCDR_SDEN); 134 | USBx->BCDR |= USB_BCDR_DCDEN; 135 | 136 | return HAL_OK; 137 | } 138 | 139 | /** 140 | * @brief Deactivate BatteryCharging feature. 141 | * @param hpcd PCD handle 142 | * @retval HAL status 143 | */ 144 | HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) 145 | { 146 | USB_TypeDef *USBx = hpcd->Instance; 147 | hpcd->battery_charging_active = 0U; 148 | 149 | /* Disable BCD feature */ 150 | USBx->BCDR &= ~(USB_BCDR_BCDEN); 151 | 152 | return HAL_OK; 153 | } 154 | 155 | /** 156 | * @brief Handle BatteryCharging Process. 157 | * @param hpcd PCD handle 158 | * @retval HAL status 159 | */ 160 | void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) 161 | { 162 | USB_TypeDef *USBx = hpcd->Instance; 163 | uint32_t tickstart = HAL_GetTick(); 164 | 165 | /* Wait Detect flag or a timeout is happen*/ 166 | while ((USBx->BCDR & USB_BCDR_DCDET) == 0U) 167 | { 168 | /* Check for the Timeout */ 169 | if ((HAL_GetTick() - tickstart) > 1000U) 170 | { 171 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 172 | hpcd->BCDCallback(hpcd, PCD_BCD_ERROR); 173 | #else 174 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); 175 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 176 | 177 | return; 178 | } 179 | } 180 | 181 | HAL_Delay(200U); 182 | 183 | /* Data Pin Contact ? Check Detect flag */ 184 | if ((USBx->BCDR & USB_BCDR_DCDET) == USB_BCDR_DCDET) 185 | { 186 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 187 | hpcd->BCDCallback(hpcd, PCD_BCD_CONTACT_DETECTION); 188 | #else 189 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); 190 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 191 | } 192 | /* Primary detection: checks if connected to Standard Downstream Port 193 | (without charging capability) */ 194 | USBx->BCDR &= ~(USB_BCDR_DCDEN); 195 | HAL_Delay(50U); 196 | USBx->BCDR |= (USB_BCDR_PDEN); 197 | HAL_Delay(50U); 198 | 199 | /* If Charger detect ? */ 200 | if ((USBx->BCDR & USB_BCDR_PDET) == USB_BCDR_PDET) 201 | { 202 | /* Start secondary detection to check connection to Charging Downstream 203 | Port or Dedicated Charging Port */ 204 | USBx->BCDR &= ~(USB_BCDR_PDEN); 205 | HAL_Delay(50U); 206 | USBx->BCDR |= (USB_BCDR_SDEN); 207 | HAL_Delay(50U); 208 | 209 | /* If CDP ? */ 210 | if ((USBx->BCDR & USB_BCDR_SDET) == USB_BCDR_SDET) 211 | { 212 | /* Dedicated Downstream Port DCP */ 213 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 214 | hpcd->BCDCallback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); 215 | #else 216 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); 217 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 218 | } 219 | else 220 | { 221 | /* Charging Downstream Port CDP */ 222 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 223 | hpcd->BCDCallback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); 224 | #else 225 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); 226 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 227 | } 228 | } 229 | else /* NO */ 230 | { 231 | /* Standard Downstream Port */ 232 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 233 | hpcd->BCDCallback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); 234 | #else 235 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); 236 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 237 | } 238 | 239 | /* Battery Charging capability discovery finished Start Enumeration */ 240 | (void)HAL_PCDEx_DeActivateBCD(hpcd); 241 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 242 | hpcd->BCDCallback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); 243 | #else 244 | HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); 245 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 246 | } 247 | 248 | 249 | /** 250 | * @brief Activate LPM feature. 251 | * @param hpcd PCD handle 252 | * @retval HAL status 253 | */ 254 | HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) 255 | { 256 | 257 | USB_TypeDef *USBx = hpcd->Instance; 258 | hpcd->lpm_active = 1U; 259 | hpcd->LPM_State = LPM_L0; 260 | 261 | USBx->LPMCSR |= USB_LPMCSR_LMPEN; 262 | USBx->LPMCSR |= USB_LPMCSR_LPMACK; 263 | 264 | return HAL_OK; 265 | } 266 | 267 | /** 268 | * @brief Deactivate LPM feature. 269 | * @param hpcd PCD handle 270 | * @retval HAL status 271 | */ 272 | HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) 273 | { 274 | USB_TypeDef *USBx = hpcd->Instance; 275 | 276 | hpcd->lpm_active = 0U; 277 | 278 | USBx->LPMCSR &= ~(USB_LPMCSR_LMPEN); 279 | USBx->LPMCSR &= ~(USB_LPMCSR_LPMACK); 280 | 281 | return HAL_OK; 282 | } 283 | 284 | 285 | 286 | /** 287 | * @brief Send LPM message to user layer callback. 288 | * @param hpcd PCD handle 289 | * @param msg LPM message 290 | * @retval HAL status 291 | */ 292 | __weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) 293 | { 294 | /* Prevent unused argument(s) compilation warning */ 295 | UNUSED(hpcd); 296 | UNUSED(msg); 297 | 298 | /* NOTE : This function should not be modified, when the callback is needed, 299 | the HAL_PCDEx_LPM_Callback could be implemented in the user file 300 | */ 301 | } 302 | 303 | /** 304 | * @brief Send BatteryCharging message to user layer callback. 305 | * @param hpcd PCD handle 306 | * @param msg LPM message 307 | * @retval HAL status 308 | */ 309 | __weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) 310 | { 311 | /* Prevent unused argument(s) compilation warning */ 312 | UNUSED(hpcd); 313 | UNUSED(msg); 314 | 315 | /* NOTE : This function should not be modified, when the callback is needed, 316 | the HAL_PCDEx_BCD_Callback could be implemented in the user file 317 | */ 318 | } 319 | 320 | /** 321 | * @} 322 | */ 323 | 324 | /** 325 | * @} 326 | */ 327 | #endif /* defined (USB) */ 328 | #endif /* HAL_PCD_MODULE_ENABLED */ 329 | 330 | /** 331 | * @} 332 | */ 333 | 334 | /** 335 | * @} 336 | */ 337 | 338 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 339 | --------------------------------------------------------------------------------