├── circuits ├── tiny45-rc.png ├── tiny45-rc.sch ├── with-vreg.png ├── with-vreg.sch ├── with-zener.png ├── with-zener.sch ├── arduino_vusb_dev.png ├── with-series-diodes.png ├── with-series-diodes.sch ├── arduino_vusb_dev_schematic.png └── Readme.txt ├── library.properties ├── .gitignore ├── src ├── vusb │ ├── usbdrvasm.asm │ ├── oddebug.c │ ├── oddebug.h │ ├── usbportability.h │ ├── USB-ID-FAQ.txt │ ├── USB-IDs-for-free.txt │ ├── CommercialLicense.txt │ ├── asmcommon.inc │ ├── Readme.txt │ ├── usbdrvasm.S │ ├── usbdrvasm16.inc │ ├── Changelog.txt │ ├── usbdrvasm20.inc │ ├── usbdrvasm12.inc │ ├── usbdrvasm165.inc │ └── usbdrvasm15.inc ├── TFUsbMidi.h ├── TFUsbMidi.cpp └── usbconfig.h ├── examples ├── MidiTest │ └── MidiTest.ino └── TestPotmeter │ └── TestPotmeter.ino └── README.md /circuits/tiny45-rc.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TechFactoryHU/vusb-arduino/HEAD/circuits/tiny45-rc.png -------------------------------------------------------------------------------- /circuits/tiny45-rc.sch: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TechFactoryHU/vusb-arduino/HEAD/circuits/tiny45-rc.sch -------------------------------------------------------------------------------- /circuits/with-vreg.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TechFactoryHU/vusb-arduino/HEAD/circuits/with-vreg.png -------------------------------------------------------------------------------- /circuits/with-vreg.sch: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TechFactoryHU/vusb-arduino/HEAD/circuits/with-vreg.sch -------------------------------------------------------------------------------- /circuits/with-zener.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TechFactoryHU/vusb-arduino/HEAD/circuits/with-zener.png -------------------------------------------------------------------------------- /circuits/with-zener.sch: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TechFactoryHU/vusb-arduino/HEAD/circuits/with-zener.sch -------------------------------------------------------------------------------- /circuits/arduino_vusb_dev.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TechFactoryHU/vusb-arduino/HEAD/circuits/arduino_vusb_dev.png -------------------------------------------------------------------------------- /circuits/with-series-diodes.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TechFactoryHU/vusb-arduino/HEAD/circuits/with-series-diodes.png -------------------------------------------------------------------------------- /circuits/with-series-diodes.sch: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TechFactoryHU/vusb-arduino/HEAD/circuits/with-series-diodes.sch -------------------------------------------------------------------------------- /circuits/arduino_vusb_dev_schematic.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TechFactoryHU/vusb-arduino/HEAD/circuits/arduino_vusb_dev_schematic.png -------------------------------------------------------------------------------- /library.properties: -------------------------------------------------------------------------------- 1 | name=V-USB Arduino port 2 | version=1.0.0 3 | author=TechFactory.hu 4 | maintainer=TechFactory.hu 5 | sentence=Obdev's V-USB arduino compatible version (vusb-20121206) 6 | paragraph=Allows an arduino device to act as midi device through firmware-only usb port 7 | category=Communication 8 | url=https://github.com/TechFactoryHU/vusb-arduino 9 | architectures=* 10 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Compiled Object files 2 | *.slo 3 | *.lo 4 | *.o 5 | *.obj 6 | 7 | # Precompiled Headers 8 | *.gch 9 | *.pch 10 | 11 | # Compiled Dynamic libraries 12 | *.so 13 | *.dylib 14 | *.dll 15 | 16 | # Fortran module files 17 | *.mod 18 | 19 | # Compiled Static libraries 20 | *.lai 21 | *.la 22 | *.a 23 | *.lib 24 | 25 | # Executables 26 | *.exe 27 | *.out 28 | *.app 29 | 30 | # Eclipse 31 | .*project 32 | 33 | # VScode 34 | .vscode 35 | 36 | -------------------------------------------------------------------------------- /src/vusb/usbdrvasm.asm: -------------------------------------------------------------------------------- 1 | /* Name: usbdrvasm.asm 2 | * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers 3 | * Author: Christian Starkjohann 4 | * Creation Date: 2006-03-01 5 | * Tabsize: 4 6 | * Copyright: (c) 2006 by OBJECTIVE DEVELOPMENT Software GmbH 7 | * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) 8 | */ 9 | 10 | /* 11 | General Description: 12 | The IAR compiler/assembler system prefers assembler files with file extension 13 | ".asm". We simply provide this file as an alias for usbdrvasm.S. 14 | 15 | Thanks to Oleg Semyonov for his help with the IAR tools port! 16 | */ 17 | 18 | #include "usbdrvasm.S" 19 | 20 | end 21 | -------------------------------------------------------------------------------- /src/vusb/oddebug.c: -------------------------------------------------------------------------------- 1 | /* Name: oddebug.c 2 | * Project: AVR library 3 | * Author: Christian Starkjohann 4 | * Creation Date: 2005-01-16 5 | * Tabsize: 4 6 | * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH 7 | * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) 8 | */ 9 | 10 | #include "oddebug.h" 11 | 12 | #if DEBUG_LEVEL > 0 13 | 14 | #warning "Never compile production devices with debugging enabled" 15 | 16 | static void uartPutc(char c) 17 | { 18 | while(!(ODDBG_USR & (1 << ODDBG_UDRE))); /* wait for data register empty */ 19 | ODDBG_UDR = c; 20 | } 21 | 22 | static uchar hexAscii(uchar h) 23 | { 24 | h &= 0xf; 25 | if(h >= 10) 26 | h += 'a' - (uchar)10 - '0'; 27 | h += '0'; 28 | return h; 29 | } 30 | 31 | static void printHex(uchar c) 32 | { 33 | uartPutc(hexAscii(c >> 4)); 34 | uartPutc(hexAscii(c)); 35 | } 36 | 37 | void odDebug(uchar prefix, uchar *data, uchar len) 38 | { 39 | printHex(prefix); 40 | uartPutc(':'); 41 | while(len--){ 42 | uartPutc(' '); 43 | printHex(*data++); 44 | } 45 | uartPutc('\r'); 46 | uartPutc('\n'); 47 | } 48 | 49 | #endif 50 | -------------------------------------------------------------------------------- /examples/MidiTest/MidiTest.ino: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | void setup() { 4 | Serial.begin(115200); 5 | Serial.println("Setup"); 6 | 7 | Serial.println("VUSB setup onmsg callback"); 8 | VUsbMidi.OnMsg(OnMidiMessage); 9 | 10 | Serial.println("VUSB begin"); 11 | VUsbMidi.begin(false); 12 | 13 | } 14 | 15 | unsigned long ms; 16 | 17 | void loop() { 18 | //watch for midi packets 19 | VUsbMidi.refresh(); 20 | 21 | //send some midi messages on every 5sec 22 | if (ms < millis()) { 23 | //send note on: channel, note, velocity 24 | VUsbMidi.NoteOn(1, 60, 100); 25 | delay(200); 26 | //send note off: channel, note 27 | VUsbMidi.NoteOff(1, 60); 28 | //send control change message: channel, ctrlid, value 29 | VUsbMidi.ControlChange(2, 10, 54); 30 | 31 | //Send raw message v1: 32 | TFMidiMessage midimsg; 33 | midimsg.type = TFMidiType::NoteOn; 34 | midimsg.channel = 1; 35 | midimsg.data1 = 60; //note 36 | midimsg.data2 = 50; //velocity 37 | VUsbMidi.write(midimsg); 38 | 39 | //send raw message v2 40 | byte buffer[4]; 41 | buffer[0] = 0x09; 42 | buffer[1] = 0x90 | 1; // message type | channel 43 | buffer[2] = 0x7f & 30; //note 44 | buffer[3] = 0x7f & 50; //velocity 45 | VUsbMidi.write(buffer,4); 46 | 47 | ms = millis() + 5000; 48 | } 49 | } 50 | 51 | 52 | void OnMidiMessage(TFMidiMessage msg) { 53 | Serial.print(msg.type); 54 | Serial.print("\t"); 55 | Serial.print(msg.channel); 56 | Serial.print("\t"); 57 | Serial.print(msg.data1); 58 | Serial.print("\t"); 59 | Serial.println(msg.data2); 60 | } 61 | 62 | -------------------------------------------------------------------------------- /examples/TestPotmeter/TestPotmeter.ino: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | void setup() { 4 | Serial.begin(115200); 5 | Serial.println("Setup"); 6 | 7 | Serial.println("VUSB setup onmsg callback"); 8 | VUsbMidi.OnMsg(OnMidiMessage); 9 | 10 | Serial.println("VUSB begin"); 11 | VUsbMidi.begin(false); 12 | } 13 | 14 | unsigned long ms; 15 | int potmeters[3] = {A0,A1,A2}; 16 | int potmeter_last_value[3] = {0,0,0}; 17 | 18 | void loop() { 19 | //watch for midi packets 20 | VUsbMidi.refresh(); 21 | 22 | int tmp; 23 | for (int i=0; i<3; i++) { 24 | tmp = analogRead(potmeters[i]); 25 | if (tmp != potmeter_last_value[i]) { 26 | OnPotmeterValueChanged(potmeters[i], tmp); 27 | potmeter_last_value[i] = tmp; 28 | Serial.println("Potmeter ("+String(potmeters[i])+") value changed to "+String(tmp)); 29 | } 30 | } 31 | } 32 | 33 | void OnPotmeterValueChanged(int analog, int value) { 34 | //map ADC 0-1024 value to 0-127 35 | int velocity = map(value, 0, 1024, 0, 127); 36 | 37 | if (analog == A0) { 38 | //channel, note, velocity 39 | VUsbMidi.NoteOn(1, 60, velocity); 40 | } 41 | if (analog == A1) { 42 | //channel, note, velocity 43 | VUsbMidi.NoteOn(1, 61, velocity); 44 | } 45 | if (analog == A2) { 46 | //channel, note, velocity 47 | VUsbMidi.NoteOn(1, 62, velocity); 48 | } 49 | } 50 | 51 | void OnMidiMessage(TFMidiMessage msg) { 52 | Serial.print(msg.type); 53 | Serial.print("\t"); 54 | Serial.print(msg.channel); 55 | Serial.print("\t"); 56 | Serial.print(msg.data1); 57 | Serial.print("\t"); 58 | Serial.println(msg.data2); 59 | } 60 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # V-USB Arduino port (20121206) 2 | 3 | Allows an Arduino to act as midi device through 2nd (firmware-only) usb port. 4 | 5 | # V-USB 6 | 7 | [V-USB](http://www.obdev.at/products/vusb/index.html) by Objective Development Software GmbH 8 | 9 | http://www.obdev.at/products/vusb/index.html 10 | 11 | # Circuit 12 | ![Arduino & V-USB](https://github.com/TechFactoryHU/vusb-arduino/blob/master/circuits/arduino_vusb_dev.png) 13 | ![Arduino & V-USB](https://github.com/TechFactoryHU/vusb-arduino/blob/master/circuits/arduino_vusb_dev_schematic.png) 14 | 15 | Default config: 16 | - D- = Pin 7 17 | - D+ = Pin 2 18 | 19 | You can change default values in src/usbconfig.h file. For more information please visit V-USB website. 20 | 21 | 22 | 23 | # Midi sample 24 | ```C++ 25 | #include 26 | unsigned long ms = 0; 27 | 28 | void setup() { 29 | Serial.begin(115200); 30 | //setup midi msg callback 31 | VUsbMidi.OnMsg(OnMidiMessage); 32 | VUsbMidi.begin(false); 33 | } 34 | 35 | void loop() { 36 | //watch for new midi messages 37 | VUsbMidi.refresh(); 38 | 39 | //send some midi messages at every 5sec 40 | if (ms < millis()) { 41 | Serial.println("SendNoteOn"); 42 | //NoteOn message: channel, note, velocity 43 | VUsbMidi.NoteOn(1, 60, 100); 44 | delay(200); 45 | //NoteOff message: channel, note 46 | VUsbMidi.NoteOff(1, 60); 47 | 48 | //ControlChange message: channel, ctrlid, value 49 | VUsbMidi.ControlChange(2, 10, 54); 50 | 51 | //Send raw message v1: 52 | TFMidiMessage midimsg; 53 | midimsg.type = TFMidiType.NoteOn; 54 | midimsg.channel = 1; 55 | midimsg.data1 = 60; //note 56 | midimsg.data2 = 50; //velocity 57 | VUsbMidi.write(midimsg); 58 | 59 | //send raw message v2 60 | byte buffer[4]; 61 | buffer[0] = 0x09; 62 | buffer[1] = 0x90 | 1; // message type | channel 63 | buffer[2] = 0x7f & 60; //note 64 | buffer[3] = 0x7f & 50; //velocity 65 | VUsbMidi.write(buffer,4); 66 | 67 | ms = millis() + 5000; 68 | } 69 | } 70 | 71 | //this function will be called on every midi message 72 | void OnMidiMessage(TFMidiMessage msg) { 73 | Serial.print(msg.type); 74 | Serial.print("\t"); 75 | Serial.print(msg.channel); 76 | Serial.print("\t"); 77 | Serial.print(msg.data1); 78 | Serial.print("\t"); 79 | Serial.println(msg.data2); 80 | } 81 | ``` 82 | 83 | 84 | # TFMidiUsb wrapper 85 | 86 | Wrapper class based on: 87 | 88 | - V-USB-MIDI 89 | http://cryptomys.de/horo/V-USB-MIDI/ 90 | 91 | - vusb-for-arduino 92 | https://code.google.com/p/vusb-for-arduino/downloads/list 93 | 94 | - Arduino MIDI Library 95 | https://github.com/FortySevenEffects/arduino_midi_library 96 | 97 | - mimuz-avr-core 98 | https://github.com/mimuz/mimuz-avr-core/blob/master/arduino/libraries/VUSBMidiATtiny 99 | 100 | 101 | -------------------------------------------------------------------------------- /src/TFUsbMidi.h: -------------------------------------------------------------------------------- 1 | #ifndef __tfusbmidi_h_ 2 | #define __tfusbmidi_h_ 3 | 4 | #include 5 | #include 6 | #include 7 | #include 8 | 9 | 10 | 11 | #include "vusb/usbdrv.h" 12 | #include /* for _delay_ms() */ 13 | 14 | 15 | 16 | /* 17 | * Buffer implementation from 18 | * https://github.com/mimuz/mimuz-avr-core/blob/master/arduino/libraries/VUSBMidiATtiny/queue.c 19 | */ 20 | 21 | #define VUSBMIDI_RINGBUFFER_SIZE 8 22 | #define VUSBMIDI_RINGBUFFER_ESIZE 4 23 | 24 | /* 25 | * Midi types from 26 | * https://github.com/FortySevenEffects/arduino_midi_library 27 | */ 28 | 29 | enum TFMidiType { 30 | InvalidType = 0x00, ///< For notifying errors 31 | NoteOff = 0x80, ///< Note Off 32 | NoteOn = 0x90, ///< Note On 33 | AfterTouchPoly = 0xA0, ///< Polyphonic AfterTouch 34 | ControlChange = 0xB0, ///< Control Change / Channel Mode 35 | ProgramChange = 0xC0, ///< Program Change 36 | AfterTouchChannel = 0xD0, ///< Channel (monophonic) AfterTouch 37 | PitchBend = 0xE0, ///< Pitch Bend 38 | SystemExclusive = 0xF0, ///< System Exclusive 39 | TimeCodeQuarterFrame = 0xF1, ///< System Common - MIDI Time Code Quarter Frame 40 | SongPosition = 0xF2, ///< System Common - Song Position Pointer 41 | SongSelect = 0xF3, ///< System Common - Song Select 42 | TuneRequest = 0xF6, ///< System Common - Tune Request 43 | Clock = 0xF8, ///< System Real Time - Timing Clock 44 | Start = 0xFA, ///< System Real Time - Start 45 | Continue = 0xFB, ///< System Real Time - Continue 46 | Stop = 0xFC, ///< System Real Time - Stop 47 | ActiveSensing = 0xFE, ///< System Real Time - Active Sensing 48 | SystemReset = 0xFF, ///< System Real Time - System Reset 49 | }; 50 | 51 | struct TFMidiMessage { 52 | TFMidiType type; 53 | byte channel; 54 | byte data1; 55 | byte data2; 56 | }; 57 | 58 | class TFUsbMidi { 59 | private: 60 | uint8_t buffer[VUSBMIDI_RINGBUFFER_SIZE*VUSBMIDI_RINGBUFFER_ESIZE]; 61 | uint8_t _bufftop; 62 | uint8_t _bufflast; 63 | uint8_t _buffsize; 64 | bool _calibrate_osc = false; 65 | bool _optimalize_osc = false; 66 | 67 | uint8_t buffNext(uint8_t value); 68 | uint8_t buffPush(uint8_t *a); 69 | uint8_t* buffPop(void); 70 | 71 | void (*_onMsgCallback)(TFMidiMessage); 72 | 73 | void processMessage(void); 74 | TFMidiType getMessageType(byte *p); 75 | 76 | public: 77 | TFUsbMidi (void); 78 | void OnMsg(void (*onMsgCallback)(TFMidiMessage)); 79 | void OnUSBReset(void); 80 | void calibrateOSC(void); 81 | 82 | void begin(bool calibrate_osc = false); 83 | void refresh(); 84 | void read(uchar *data, uchar len); 85 | 86 | void NoteOn(byte ch, byte note, byte velocity); 87 | void NoteOff(byte ch, byte note); 88 | void ControlChange(byte ch, byte num, byte value); 89 | 90 | void write(TFMidiMessage msg); 91 | void write(byte *buffer, byte size); 92 | }; 93 | 94 | extern TFUsbMidi VUsbMidi; 95 | 96 | #endif // __tfusbmidi_h_ 97 | -------------------------------------------------------------------------------- /src/vusb/oddebug.h: -------------------------------------------------------------------------------- 1 | /* Name: oddebug.h 2 | * Project: AVR library 3 | * Author: Christian Starkjohann 4 | * Creation Date: 2005-01-16 5 | * Tabsize: 4 6 | * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH 7 | * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) 8 | */ 9 | 10 | #ifndef __oddebug_h_included__ 11 | #define __oddebug_h_included__ 12 | 13 | /* 14 | General Description: 15 | This module implements a function for debug logs on the serial line of the 16 | AVR microcontroller. Debugging can be configured with the define 17 | 'DEBUG_LEVEL'. If this macro is not defined or defined to 0, all debugging 18 | calls are no-ops. If it is 1, DBG1 logs will appear, but not DBG2. If it is 19 | 2, DBG1 and DBG2 logs will be printed. 20 | 21 | A debug log consists of a label ('prefix') to indicate which debug log created 22 | the output and a memory block to dump in hex ('data' and 'len'). 23 | */ 24 | 25 | 26 | #ifndef F_CPU 27 | # define F_CPU 12000000 /* 12 MHz */ 28 | #endif 29 | 30 | /* make sure we have the UART defines: */ 31 | #include "usbportability.h" 32 | 33 | #ifndef uchar 34 | # define uchar unsigned char 35 | #endif 36 | 37 | #if DEBUG_LEVEL > 0 && !(defined TXEN || defined TXEN0) /* no UART in device */ 38 | # warning "Debugging disabled because device has no UART" 39 | # undef DEBUG_LEVEL 40 | #endif 41 | 42 | #ifndef DEBUG_LEVEL 43 | # define DEBUG_LEVEL 0 44 | #endif 45 | 46 | /* ------------------------------------------------------------------------- */ 47 | 48 | #if DEBUG_LEVEL > 0 49 | # define DBG1(prefix, data, len) odDebug(prefix, data, len) 50 | #else 51 | # define DBG1(prefix, data, len) 52 | #endif 53 | 54 | #if DEBUG_LEVEL > 1 55 | # define DBG2(prefix, data, len) odDebug(prefix, data, len) 56 | #else 57 | # define DBG2(prefix, data, len) 58 | #endif 59 | 60 | /* ------------------------------------------------------------------------- */ 61 | 62 | #if DEBUG_LEVEL > 0 63 | extern void odDebug(uchar prefix, uchar *data, uchar len); 64 | 65 | /* Try to find our control registers; ATMEL likes to rename these */ 66 | 67 | #if defined UBRR 68 | # define ODDBG_UBRR UBRR 69 | #elif defined UBRRL 70 | # define ODDBG_UBRR UBRRL 71 | #elif defined UBRR0 72 | # define ODDBG_UBRR UBRR0 73 | #elif defined UBRR0L 74 | # define ODDBG_UBRR UBRR0L 75 | #endif 76 | 77 | #if defined UCR 78 | # define ODDBG_UCR UCR 79 | #elif defined UCSRB 80 | # define ODDBG_UCR UCSRB 81 | #elif defined UCSR0B 82 | # define ODDBG_UCR UCSR0B 83 | #endif 84 | 85 | #if defined TXEN 86 | # define ODDBG_TXEN TXEN 87 | #else 88 | # define ODDBG_TXEN TXEN0 89 | #endif 90 | 91 | #if defined USR 92 | # define ODDBG_USR USR 93 | #elif defined UCSRA 94 | # define ODDBG_USR UCSRA 95 | #elif defined UCSR0A 96 | # define ODDBG_USR UCSR0A 97 | #endif 98 | 99 | #if defined UDRE 100 | # define ODDBG_UDRE UDRE 101 | #else 102 | # define ODDBG_UDRE UDRE0 103 | #endif 104 | 105 | #if defined UDR 106 | # define ODDBG_UDR UDR 107 | #elif defined UDR0 108 | # define ODDBG_UDR UDR0 109 | #endif 110 | 111 | static inline void odDebugInit(void) 112 | { 113 | ODDBG_UCR |= (1< 38 | #ifndef __IAR_SYSTEMS_ASM__ 39 | # include 40 | #endif 41 | 42 | #define __attribute__(arg) /* not supported on IAR */ 43 | 44 | #ifdef __IAR_SYSTEMS_ASM__ 45 | # define __ASSEMBLER__ /* IAR does not define standard macro for asm */ 46 | #endif 47 | 48 | #ifdef __HAS_ELPM__ 49 | # define PROGMEM __farflash 50 | #else 51 | # define PROGMEM __flash 52 | #endif 53 | 54 | #define USB_READ_FLASH(addr) (*(PROGMEM char *)(addr)) 55 | 56 | /* The following definitions are not needed by the driver, but may be of some 57 | * help if you port a gcc based project to IAR. 58 | */ 59 | #define cli() __disable_interrupt() 60 | #define sei() __enable_interrupt() 61 | #define wdt_reset() __watchdog_reset() 62 | #define _BV(x) (1 << (x)) 63 | 64 | /* assembler compatibility macros */ 65 | #define nop2 rjmp $+2 /* jump to next instruction */ 66 | #define XL r26 67 | #define XH r27 68 | #define YL r28 69 | #define YH r29 70 | #define ZL r30 71 | #define ZH r31 72 | #define lo8(x) LOW(x) 73 | #define hi8(x) (((x)>>8) & 0xff) /* not HIGH to allow XLINK to make a proper range check */ 74 | 75 | /* Depending on the device you use, you may get problems with the way usbdrv.h 76 | * handles the differences between devices. Since IAR does not use #defines 77 | * for MCU registers, we can't check for the existence of a particular 78 | * register with an #ifdef. If the autodetection mechanism fails, include 79 | * definitions for the required USB_INTR_* macros in your usbconfig.h. See 80 | * usbconfig-prototype.h and usbdrv.h for details. 81 | */ 82 | 83 | /* ------------------------------------------------------------------------- */ 84 | #elif __CODEVISIONAVR__ /* check for CodeVision AVR */ 85 | /* ------------------------------------------------------------------------- */ 86 | /* This port is not working (yet) */ 87 | 88 | /* #define F_CPU _MCU_CLOCK_FREQUENCY_ seems to be defined automatically */ 89 | 90 | #include 91 | #include 92 | 93 | #define __attribute__(arg) /* not supported on IAR */ 94 | 95 | #define PROGMEM __flash 96 | #define USB_READ_FLASH(addr) (*(PROGMEM char *)(addr)) 97 | 98 | #ifndef __ASSEMBLER__ 99 | static inline void cli(void) 100 | { 101 | #asm("cli"); 102 | } 103 | static inline void sei(void) 104 | { 105 | #asm("sei"); 106 | } 107 | #endif 108 | #define _delay_ms(t) delay_ms(t) 109 | #define _BV(x) (1 << (x)) 110 | #define USB_CFG_USE_SWITCH_STATEMENT 1 /* macro for if() cascase fails for unknown reason */ 111 | 112 | #define macro .macro 113 | #define endm .endmacro 114 | #define nop2 rjmp .+0 /* jump to next instruction */ 115 | 116 | /* ------------------------------------------------------------------------- */ 117 | #else /* default development environment is avr-gcc/avr-libc */ 118 | /* ------------------------------------------------------------------------- */ 119 | 120 | #include 121 | #ifdef __ASSEMBLER__ 122 | # define _VECTOR(N) __vector_ ## N /* io.h does not define this for asm */ 123 | #else 124 | # include 125 | #endif 126 | 127 | #if USB_CFG_DRIVER_FLASH_PAGE 128 | # define USB_READ_FLASH(addr) pgm_read_byte_far(((long)USB_CFG_DRIVER_FLASH_PAGE << 16) | (long)(addr)) 129 | #else 130 | # define USB_READ_FLASH(addr) pgm_read_byte(addr) 131 | #endif 132 | 133 | #define macro .macro 134 | #define endm .endm 135 | #define nop2 rjmp .+0 /* jump to next instruction */ 136 | 137 | #endif /* development environment */ 138 | 139 | /* for conveniecne, ensure that PRG_RDB exists */ 140 | #ifndef PRG_RDB 141 | # define PRG_RDB(addr) USB_READ_FLASH(addr) 142 | #endif 143 | #endif /* __usbportability_h_INCLUDED__ */ 144 | -------------------------------------------------------------------------------- /src/vusb/USB-ID-FAQ.txt: -------------------------------------------------------------------------------- 1 | Version 2012-07-09 2 | 3 | ========================== 4 | WHY DO WE NEED THESE IDs? 5 | ========================== 6 | 7 | USB is more than a low level protocol for data transport. It also defines a 8 | common set of requests which must be understood by all devices. And as part 9 | of these common requests, the specification defines data structures, the 10 | USB Descriptors, which are used to describe the properties of the device. 11 | 12 | From the perspective of an operating system, it is therefore possible to find 13 | out basic properties of a device (such as e.g. the manufacturer and the name 14 | of the device) without a device-specific driver. This is essential because 15 | the operating system can choose a driver to load based on this information 16 | (Plug-And-Play). 17 | 18 | Among the most important properties in the Device Descriptor are the USB 19 | Vendor- and Product-ID. Both are 16 bit integers. The most simple form of 20 | driver matching is based on these IDs. The driver announces the Vendor- and 21 | Product-IDs of the devices it can handle and the operating system loads the 22 | appropriate driver when the device is connected. 23 | 24 | It is obvious that this technique only works if the pair Vendor- plus 25 | Product-ID is unique: Only devices which require the same driver can have the 26 | same pair of IDs. 27 | 28 | 29 | ===================================================== 30 | HOW DOES THE USB STANDARD ENSURE THAT IDs ARE UNIQUE? 31 | ===================================================== 32 | 33 | Since it is so important that USB IDs are unique, the USB Implementers Forum, 34 | Inc. (usb.org) needs a way to enforce this legally. It is not forbidden by 35 | law to build a device and assign it any random numbers as IDs. Usb.org 36 | therefore needs an agreement to regulate the use of USB IDs. The agreement 37 | binds only parties who agreed to it, of course. Everybody else is free to use 38 | any numbers for their IDs. 39 | 40 | So how can usb.org ensure that every manufacturer of USB devices enters into 41 | an agreement with them? They do it via trademark licensing. Usb.org has 42 | registered the trademark "USB", all associated logos and related terms. If 43 | you want to put an USB logo on your product or claim that it is USB 44 | compliant, you must license these trademarks from usb.org. And this is where 45 | you enter into an agreement. See the "USB-IF Trademark License Agreement and 46 | Usage Guidelines for the USB-IF Logo" at 47 | http://www.usb.org/developers/logo_license/. 48 | 49 | Licensing the USB trademarks requires that you buy a USB Vendor-ID from 50 | usb.org (one-time fee of ca. 2,000 USD), that you become a member of usb.org 51 | (yearly fee of ca. 4,000 USD) and that you meet all the technical 52 | specifications from the USB spec. 53 | 54 | This means that most hobbyists and small companies will never be able to 55 | become USB compliant, just because membership is so expensive. And you can't 56 | be compliant with a driver based on V-USB anyway, because the AVR's port pins 57 | don't meet the electrical specifications for USB. So, in principle, all 58 | hobbyists and small companies are free to choose any random numbers for their 59 | IDs. They have nothing to lose... 60 | 61 | There is one exception worth noting, though: If you use a sub-component which 62 | implements USB, the vendor of the sub-components may guarantee USB 63 | compliance. This might apply to some or all of FTDI's solutions. 64 | 65 | 66 | ======================================================================= 67 | WHY SHOULD YOU OBTAIN USB IDs EVEN IF YOU DON'T LICENSE USB TRADEMARKS? 68 | ======================================================================= 69 | 70 | You have learned in the previous section that you are free to choose any 71 | numbers for your IDs anyway. So why not do exactly this? There is still the 72 | technical issue. If you choose IDs which are already in use by somebody else, 73 | operating systems will load the wrong drivers and your device won't work. 74 | Even if you choose IDs which are not currently in use, they may be in use in 75 | the next version of the operating system or even after an automatic update. 76 | 77 | So what you need is a pair of Vendor- and Product-IDs for which you have the 78 | guarantee that no USB compliant product uses them. This implies that no 79 | operating system will ever ship with drivers responsible for these IDs. 80 | 81 | 82 | ============================================== 83 | HOW DOES OBJECTIVE DEVELOPMENT HANDLE USB IDs? 84 | ============================================== 85 | 86 | Objective Development gives away pairs of USB-IDs with their V-USB licenses. 87 | In order to ensure that these IDs are unique, Objective Development has an 88 | agreement with the company/person who has bought the USB Vendor-ID from 89 | usb.org. This agreement ensures that a range of USB Product-IDs is reserved 90 | for assignment by Objective Development and that the owner of the Vendor-ID 91 | won't give it to anybody else. 92 | 93 | This means that you have to trust three parties to ensure uniqueness of 94 | your IDs: 95 | 96 | - Objective Development, that they don't give the same PID to more than 97 | one person. 98 | - The owner of the Vendor-ID that they don't assign PIDs from the range 99 | assigned to Objective Development to anybody else. 100 | - Usb.org that they don't assign the same Vendor-ID a second time. 101 | 102 | 103 | ================================== 104 | WHO IS THE OWNER OF THE VENDOR-ID? 105 | ================================== 106 | 107 | Objective Development has obtained ranges of USB Product-IDs under two 108 | Vendor-IDs: Under Vendor-ID 5824 from Wouter van Ooijen (Van Ooijen 109 | Technische Informatica, www.voti.nl) and under Vendor-ID 8352 from Jason 110 | Kotzin (now flirc.tv, Inc.). Both VID owners have received their Vendor-ID 111 | directly from usb.org. 112 | 113 | 114 | ========================================================================= 115 | CAN I USE USB-IDs FROM OBJECTIVE DEVELOPMENT WITH OTHER DRIVERS/HARDWARE? 116 | ========================================================================= 117 | 118 | The short answer is: Yes. All you get is a guarantee that the IDs are never 119 | assigned to anybody else. What more do you need? 120 | 121 | 122 | ============================ 123 | WHAT ABOUT SHARED ID PAIRS? 124 | ============================ 125 | 126 | Objective Development has reserved some PID/VID pairs for shared use. You 127 | have no guarantee of uniqueness for them, except that no USB compliant device 128 | uses them. In order to avoid technical problems, we must ensure that all 129 | devices with the same pair of IDs use the same driver on kernel level. For 130 | details, see the file USB-IDs-for-free.txt. 131 | 132 | 133 | ====================================================== 134 | I HAVE HEARD THAT SUB-LICENSING OF USB-IDs IS ILLEGAL? 135 | ====================================================== 136 | 137 | A 16 bit integer number cannot be protected by copyright laws. It is not 138 | sufficiently complex. And since none of the parties involved entered into the 139 | USB-IF Trademark License Agreement, we are not bound by this agreement. So 140 | there is no reason why it should be illegal to sub-license USB-IDs. 141 | 142 | 143 | ============================================= 144 | WHO IS LIABLE IF THERE ARE INCOMPATIBILITIES? 145 | ============================================= 146 | 147 | Objective Development disclaims all liabilities which might arise from the 148 | assignment of IDs. If you guarantee product features to your customers 149 | without proper disclaimer, YOU are liable for that. 150 | -------------------------------------------------------------------------------- /src/vusb/USB-IDs-for-free.txt: -------------------------------------------------------------------------------- 1 | Version 2009-08-22 2 | 3 | =========================== 4 | FREE USB-IDs FOR SHARED USE 5 | =========================== 6 | 7 | Objective Development has reserved a set of USB Product-IDs for use according 8 | to the guidelines outlined below. For more information about the concept of 9 | USB IDs please see the file USB-ID-FAQ.txt. Objective Development guarantees 10 | that the IDs listed below are not used by any USB compliant devices. 11 | 12 | 13 | ==================== 14 | MECHANISM OF SHARING 15 | ==================== 16 | 17 | From a technical point of view, two different devices can share the same USB 18 | Vendor- and Product-ID if they require the same driver on operating system 19 | level. We make use of this fact by assigning separate IDs for various device 20 | classes. On application layer, devices must be distinguished by their textual 21 | name or serial number. We offer separate sets of IDs for discrimination by 22 | textual name and for serial number. 23 | 24 | Examples for shared use of USB IDs are included with V-USB in the "examples" 25 | subdirectory. 26 | 27 | 28 | ====================================== 29 | IDs FOR DISCRIMINATION BY TEXTUAL NAME 30 | ====================================== 31 | 32 | If you use one of the IDs listed below, your device and host-side software 33 | must conform to these rules: 34 | 35 | (1) The USB device MUST provide a textual representation of the manufacturer 36 | and product identification. The manufacturer identification MUST be available 37 | at least in USB language 0x0409 (English/US). 38 | 39 | (2) The textual manufacturer identification MUST contain either an Internet 40 | domain name (e.g. "mycompany.com") registered and owned by you, or an e-mail 41 | address under your control (e.g. "myname@gmx.net"). You can embed the domain 42 | name or e-mail address in any string you like, e.g. "Objective Development 43 | http://www.obdev.at/vusb/". 44 | 45 | (3) You are responsible for retaining ownership of the domain or e-mail 46 | address for as long as any of your products are in use. 47 | 48 | (4) You may choose any string for the textual product identification, as long 49 | as this string is unique within the scope of your textual manufacturer 50 | identification. 51 | 52 | (5) Application side device look-up MUST be based on the textual manufacturer 53 | and product identification in addition to VID/PID matching. The driver 54 | matching MUST be a comparison of the entire strings, NOT a sub-string match. 55 | 56 | (6) For devices which implement a particular USB device class (e.g. HID), the 57 | operating system's default class driver MUST be used. If an operating system 58 | driver for Vendor Class devices is needed, this driver must be libusb or 59 | libusb-win32 (see http://libusb.org/ and 60 | http://libusb-win32.sourceforge.net/). 61 | 62 | Table if IDs for discrimination by textual name: 63 | 64 | PID dec (hex) | VID dec (hex) | Description of use 65 | ==============+===============+============================================ 66 | 1500 (0x05dc) | 5824 (0x16c0) | For Vendor Class devices with libusb 67 | --------------+---------------+-------------------------------------------- 68 | 1503 (0x05df) | 5824 (0x16c0) | For generic HID class devices (which are 69 | | | NOT mice, keyboards or joysticks) 70 | --------------+---------------+-------------------------------------------- 71 | 1505 (0x05e1) | 5824 (0x16c0) | For CDC-ACM class devices (modems) 72 | --------------+---------------+-------------------------------------------- 73 | 1508 (0x05e4) | 5824 (0x16c0) | For MIDI class devices 74 | --------------+---------------+-------------------------------------------- 75 | 76 | Note that Windows caches the textual product- and vendor-description for 77 | mice, keyboards and joysticks. Name-bsed discrimination is therefore not 78 | recommended for these device classes. 79 | 80 | 81 | ======================================= 82 | IDs FOR DISCRIMINATION BY SERIAL NUMBER 83 | ======================================= 84 | 85 | If you use one of the IDs listed below, your device and host-side software 86 | must conform to these rules: 87 | 88 | (1) The USB device MUST provide a textual representation of the serial 89 | number, unless ONLY the operating system's default class driver is used. 90 | The serial number string MUST be available at least in USB language 0x0409 91 | (English/US). 92 | 93 | (2) The serial number MUST start with either an Internet domain name (e.g. 94 | "mycompany.com") registered and owned by you, or an e-mail address under your 95 | control (e.g. "myname@gmx.net"), both terminated with a colon (":") character. 96 | You MAY append any string you like for further discrimination of your devices. 97 | 98 | (3) You are responsible for retaining ownership of the domain or e-mail 99 | address for as long as any of your products are in use. 100 | 101 | (5) Application side device look-up MUST be based on the serial number string 102 | in addition to VID/PID matching. The matching must start at the first 103 | character of the serial number string and include the colon character 104 | terminating your domain or e-mail address. It MAY stop anywhere after that. 105 | 106 | (6) For devices which implement a particular USB device class (e.g. HID), the 107 | operating system's default class driver MUST be used. If an operating system 108 | driver for Vendor Class devices is needed, this driver must be libusb or 109 | libusb-win32 (see http://libusb.org/ and 110 | http://libusb-win32.sourceforge.net/). 111 | 112 | (7) If ONLY the operating system's default class driver is used, e.g. for 113 | mice, keyboards, joysticks, CDC or MIDI devices and no discrimination by an 114 | application is needed, the serial number may be omitted. 115 | 116 | 117 | Table if IDs for discrimination by serial number string: 118 | 119 | PID dec (hex) | VID dec (hex) | Description of use 120 | ===============+===============+=========================================== 121 | 10200 (0x27d8) | 5824 (0x16c0) | For Vendor Class devices with libusb 122 | ---------------+---------------+------------------------------------------- 123 | 10201 (0x27d9) | 5824 (0x16c0) | For generic HID class devices (which are 124 | | | NOT mice, keyboards or joysticks) 125 | ---------------+---------------+------------------------------------------- 126 | 10202 (0x27da) | 5824 (0x16c0) | For USB Mice 127 | ---------------+---------------+------------------------------------------- 128 | 10203 (0x27db) | 5824 (0x16c0) | For USB Keyboards 129 | ---------------+---------------+------------------------------------------- 130 | 10204 (0x27dc) | 5824 (0x16c0) | For USB Joysticks 131 | ---------------+---------------+------------------------------------------- 132 | 10205 (0x27dd) | 5824 (0x16c0) | For CDC-ACM class devices (modems) 133 | ---------------+---------------+------------------------------------------- 134 | 10206 (0x27de) | 5824 (0x16c0) | For MIDI class devices 135 | ---------------+---------------+------------------------------------------- 136 | 137 | 138 | ================= 139 | ORIGIN OF USB-IDs 140 | ================= 141 | 142 | OBJECTIVE DEVELOPMENT Software GmbH has obtained all VID/PID pairs listed 143 | here from Wouter van Ooijen (see www.voti.nl) for exclusive disposition. 144 | Wouter van Ooijen has obtained the VID from the USB Implementers Forum, Inc. 145 | (see www.usb.org). The VID is registered for the company name "Van Ooijen 146 | Technische Informatica". 147 | 148 | 149 | ========== 150 | DISCLAIMER 151 | ========== 152 | 153 | OBJECTIVE DEVELOPMENT Software GmbH disclaims all liability for any 154 | problems which are caused by the shared use of these VID/PID pairs. 155 | -------------------------------------------------------------------------------- /src/vusb/CommercialLicense.txt: -------------------------------------------------------------------------------- 1 | V-USB Driver Software License Agreement 2 | Version 2012-07-09 3 | 4 | THIS LICENSE AGREEMENT GRANTS YOU CERTAIN RIGHTS IN A SOFTWARE. YOU CAN 5 | ENTER INTO THIS AGREEMENT AND ACQUIRE THE RIGHTS OUTLINED BELOW BY PAYING 6 | THE AMOUNT ACCORDING TO SECTION 4 ("PAYMENT") TO OBJECTIVE DEVELOPMENT. 7 | 8 | 9 | 1 DEFINITIONS 10 | 11 | 1.1 "OBJECTIVE DEVELOPMENT" shall mean OBJECTIVE DEVELOPMENT Software GmbH, 12 | Grosse Schiffgasse 1A/7, 1020 Wien, AUSTRIA. 13 | 14 | 1.2 "You" shall mean the Licensee. 15 | 16 | 1.3 "V-USB" shall mean all files included in the package distributed under 17 | the name "vusb" by OBJECTIVE DEVELOPMENT (http://www.obdev.at/vusb/) 18 | unless otherwise noted. This includes the firmware-only USB device 19 | implementation for Atmel AVR microcontrollers, some simple device examples 20 | and host side software examples and libraries. 21 | 22 | 23 | 2 LICENSE GRANTS 24 | 25 | 2.1 Source Code. OBJECTIVE DEVELOPMENT shall furnish you with the source 26 | code of V-USB. 27 | 28 | 2.2 Distribution and Use. OBJECTIVE DEVELOPMENT grants you the 29 | non-exclusive right to use, copy and distribute V-USB with your hardware 30 | product(s), restricted by the limitations in section 3 below. 31 | 32 | 2.3 Modifications. OBJECTIVE DEVELOPMENT grants you the right to modify 33 | the source code and your copy of V-USB according to your needs. 34 | 35 | 2.4 USB IDs. OBJECTIVE DEVELOPMENT furnishes you with one or two USB 36 | Product ID(s), sent to you in e-mail. These Product IDs are reserved 37 | exclusively for you. OBJECTIVE DEVELOPMENT has obtained USB Product ID 38 | ranges under the Vendor ID 5824 from Wouter van Ooijen (Van Ooijen 39 | Technische Informatica, www.voti.nl) and under the Vendor ID 8352 from 40 | Jason Kotzin (now flirc.tv, Inc.). Both owners of the Vendor IDs have 41 | obtained these IDs from the USB Implementers Forum, Inc. (www.usb.org). 42 | OBJECTIVE DEVELOPMENT disclaims all liability which might arise from the 43 | assignment of USB IDs. 44 | 45 | 2.5 USB Certification. Although not part of this agreement, we want to make 46 | it clear that you cannot become USB certified when you use V-USB or a USB 47 | Product ID assigned by OBJECTIVE DEVELOPMENT. AVR microcontrollers don't 48 | meet the electrical specifications required by the USB specification and 49 | the USB Implementers Forum certifies only members who bought a Vendor ID of 50 | their own. 51 | 52 | 53 | 3 LICENSE RESTRICTIONS 54 | 55 | 3.1 Number of Units. Only one of the following three definitions is 56 | applicable. Which one is determined by the amount you pay to OBJECTIVE 57 | DEVELOPMENT, see section 4 ("Payment") below. 58 | 59 | Hobby License: You may use V-USB according to section 2 above in no more 60 | than 5 hardware units. These units must not be sold for profit. 61 | 62 | Entry Level License: You may use V-USB according to section 2 above in no 63 | more than 150 hardware units. 64 | 65 | Professional License: You may use V-USB according to section 2 above in 66 | any number of hardware units, except for large scale production ("unlimited 67 | fair use"). Quantities below 10,000 units are not considered large scale 68 | production. If your reach quantities which are obviously large scale 69 | production, you must pay a license fee of 0.10 EUR per unit for all units 70 | above 10,000. 71 | 72 | 3.2 Rental. You may not rent, lease, or lend V-USB or otherwise encumber 73 | any copy of V-USB, or any of the rights granted herein. 74 | 75 | 3.3 Transfer. You may not transfer your rights under this Agreement to 76 | another party without OBJECTIVE DEVELOPMENT's prior written consent. If 77 | such consent is obtained, you may permanently transfer this License to 78 | another party. The recipient of such transfer must agree to all terms and 79 | conditions of this Agreement. 80 | 81 | 3.4 Reservation of Rights. OBJECTIVE DEVELOPMENT retains all rights not 82 | expressly granted. 83 | 84 | 3.5 Non-Exclusive Rights. Your license rights under this Agreement are 85 | non-exclusive. 86 | 87 | 3.6 Third Party Rights. This Agreement cannot grant you rights controlled 88 | by third parties. In particular, you are not allowed to use the USB logo or 89 | other trademarks owned by the USB Implementers Forum, Inc. without their 90 | consent. Since such consent depends on USB certification, it should be 91 | noted that V-USB will not pass certification because it does not 92 | implement checksum verification and the microcontroller ports do not meet 93 | the electrical specifications. 94 | 95 | 96 | 4 PAYMENT 97 | 98 | The payment amount depends on the variation of this agreement (according to 99 | section 3.1) into which you want to enter. Concrete prices are listed on 100 | OBJECTIVE DEVELOPMENT's web site, usually at 101 | http://www.obdev.at/vusb/license.html. You agree to pay the amount listed 102 | there to OBJECTIVE DEVELOPMENT or OBJECTIVE DEVELOPMENT's payment processor 103 | or reseller. 104 | 105 | 106 | 5 COPYRIGHT AND OWNERSHIP 107 | 108 | V-USB is protected by copyright laws and international copyright 109 | treaties, as well as other intellectual property laws and treaties. V-USB 110 | is licensed, not sold. 111 | 112 | 113 | 6 TERM AND TERMINATION 114 | 115 | 6.1 Term. This Agreement shall continue indefinitely. However, OBJECTIVE 116 | DEVELOPMENT may terminate this Agreement and revoke the granted license and 117 | USB-IDs if you fail to comply with any of its terms and conditions. 118 | 119 | 6.2 Survival of Terms. All provisions regarding secrecy, confidentiality 120 | and limitation of liability shall survive termination of this agreement. 121 | 122 | 123 | 7 DISCLAIMER OF WARRANTY AND LIABILITY 124 | 125 | LIMITED WARRANTY. V-USB IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY 126 | KIND. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, OBJECTIVE 127 | DEVELOPMENT AND ITS SUPPLIERS HEREBY DISCLAIM ALL WARRANTIES, EITHER 128 | EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 129 | OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND 130 | NON-INFRINGEMENT, WITH REGARD TO V-USB, AND THE PROVISION OF OR FAILURE 131 | TO PROVIDE SUPPORT SERVICES. THIS LIMITED WARRANTY GIVES YOU SPECIFIC LEGAL 132 | RIGHTS. YOU MAY HAVE OTHERS, WHICH VARY FROM STATE/JURISDICTION TO 133 | STATE/JURISDICTION. 134 | 135 | LIMITATION OF LIABILITY. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, 136 | IN NO EVENT SHALL OBJECTIVE DEVELOPMENT OR ITS SUPPLIERS BE LIABLE FOR ANY 137 | SPECIAL, INCIDENTAL, INDIRECT, OR CONSEQUENTIAL DAMAGES WHATSOEVER 138 | (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 139 | BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR ANY OTHER PECUNIARY 140 | LOSS) ARISING OUT OF THE USE OF OR INABILITY TO USE V-USB OR THE 141 | PROVISION OF OR FAILURE TO PROVIDE SUPPORT SERVICES, EVEN IF OBJECTIVE 142 | DEVELOPMENT HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN ANY 143 | CASE, OBJECTIVE DEVELOPMENT'S ENTIRE LIABILITY UNDER ANY PROVISION OF THIS 144 | AGREEMENT SHALL BE LIMITED TO THE AMOUNT ACTUALLY PAID BY YOU FOR V-USB. 145 | 146 | 147 | 8 MISCELLANEOUS TERMS 148 | 149 | 8.1 Marketing. OBJECTIVE DEVELOPMENT has the right to mention for marketing 150 | purposes that you entered into this agreement. 151 | 152 | 8.2 Entire Agreement. This document represents the entire agreement between 153 | OBJECTIVE DEVELOPMENT and you. It may only be modified in writing signed by 154 | an authorized representative of both, OBJECTIVE DEVELOPMENT and you. 155 | 156 | 8.3 Severability. In case a provision of these terms and conditions should 157 | be or become partly or entirely invalid, ineffective, or not executable, 158 | the validity of all other provisions shall not be affected. 159 | 160 | 8.4 Applicable Law. This agreement is governed by the laws of the Republic 161 | of Austria. 162 | 163 | 8.5 Responsible Courts. The responsible courts in Vienna/Austria will have 164 | exclusive jurisdiction regarding all disputes in connection with this 165 | agreement. 166 | 167 | -------------------------------------------------------------------------------- /src/vusb/asmcommon.inc: -------------------------------------------------------------------------------- 1 | /* Name: asmcommon.inc 2 | * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers 3 | * Author: Christian Starkjohann 4 | * Creation Date: 2007-11-05 5 | * Tabsize: 4 6 | * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH 7 | * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) 8 | */ 9 | 10 | /* Do not link this file! Link usbdrvasm.S instead, which includes the 11 | * appropriate implementation! 12 | */ 13 | 14 | /* 15 | General Description: 16 | This file contains assembler code which is shared among the USB driver 17 | implementations for different CPU cocks. Since the code must be inserted 18 | in the middle of the module, it's split out into this file and #included. 19 | 20 | Jump destinations called from outside: 21 | sofError: Called when no start sequence was found. 22 | se0: Called when a package has been successfully received. 23 | overflow: Called when receive buffer overflows. 24 | doReturn: Called after sending data. 25 | 26 | Outside jump destinations used by this module: 27 | waitForJ: Called to receive an already arriving packet. 28 | sendAckAndReti: 29 | sendNakAndReti: 30 | sendCntAndReti: 31 | usbSendAndReti: 32 | 33 | The following macros must be defined before this file is included: 34 | .macro POP_STANDARD 35 | .endm 36 | .macro POP_RETI 37 | .endm 38 | */ 39 | 40 | #define token x1 41 | 42 | overflow: 43 | ldi x2, 1< 10.6666666 cycles per bit, 85.333333333 cycles per byte 29 | ; Numbers in brackets are clocks counted from center of last sync bit 30 | ; when instruction starts 31 | 32 | USB_INTR_VECTOR: 33 | ;order of registers pushed: YL, SREG YH, [sofError], bitcnt, shift, x1, x2, x3, x4, cnt 34 | push YL ;[-25] push only what is necessary to sync with edge ASAP 35 | in YL, SREG ;[-23] 36 | push YL ;[-22] 37 | push YH ;[-20] 38 | ;---------------------------------------------------------------------------- 39 | ; Synchronize with sync pattern: 40 | ;---------------------------------------------------------------------------- 41 | ;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K] 42 | ;sync up with J to K edge during sync pattern -- use fastest possible loops 43 | ;The first part waits at most 1 bit long since we must be in sync pattern. 44 | ;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to 45 | ;waitForJ, ensure that this prerequisite is met. 46 | waitForJ: 47 | inc YL 48 | sbis USBIN, USBMINUS 49 | brne waitForJ ; just make sure we have ANY timeout 50 | waitForK: 51 | ;The following code results in a sampling window of < 1/4 bit which meets the spec. 52 | sbis USBIN, USBMINUS ;[-15] 53 | rjmp foundK ;[-14] 54 | sbis USBIN, USBMINUS 55 | rjmp foundK 56 | sbis USBIN, USBMINUS 57 | rjmp foundK 58 | sbis USBIN, USBMINUS 59 | rjmp foundK 60 | sbis USBIN, USBMINUS 61 | rjmp foundK 62 | sbis USBIN, USBMINUS 63 | rjmp foundK 64 | #if USB_COUNT_SOF 65 | lds YL, usbSofCount 66 | inc YL 67 | sts usbSofCount, YL 68 | #endif /* USB_COUNT_SOF */ 69 | #ifdef USB_SOF_HOOK 70 | USB_SOF_HOOK 71 | #endif 72 | rjmp sofError 73 | foundK: ;[-12] 74 | ;{3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for center sampling] 75 | ;we have 1 bit time for setup purposes, then sample again. Numbers in brackets 76 | ;are cycles from center of first sync (double K) bit after the instruction 77 | push bitcnt ;[-12] 78 | ; [---] ;[-11] 79 | lds YL, usbInputBufOffset;[-10] 80 | ; [---] ;[-9] 81 | clr YH ;[-8] 82 | subi YL, lo8(-(usbRxBuf));[-7] [rx loop init] 83 | sbci YH, hi8(-(usbRxBuf));[-6] [rx loop init] 84 | push shift ;[-5] 85 | ; [---] ;[-4] 86 | ldi bitcnt, 0x55 ;[-3] [rx loop init] 87 | sbis USBIN, USBMINUS ;[-2] we want two bits K (sample 2 cycles too early) 88 | rjmp haveTwoBitsK ;[-1] 89 | pop shift ;[0] undo the push from before 90 | pop bitcnt ;[2] undo the push from before 91 | rjmp waitForK ;[4] this was not the end of sync, retry 92 | ; The entire loop from waitForK until rjmp waitForK above must not exceed two 93 | ; bit times (= 21 cycles). 94 | 95 | ;---------------------------------------------------------------------------- 96 | ; push more registers and initialize values while we sample the first bits: 97 | ;---------------------------------------------------------------------------- 98 | haveTwoBitsK: 99 | push x1 ;[1] 100 | push x2 ;[3] 101 | push x3 ;[5] 102 | ldi shift, 0 ;[7] 103 | ldi x3, 1<<4 ;[8] [rx loop init] first sample is inverse bit, compensate that 104 | push x4 ;[9] == leap 105 | 106 | in x1, USBIN ;[11] <-- sample bit 0 107 | andi x1, USBMASK ;[12] 108 | bst x1, USBMINUS ;[13] 109 | bld shift, 7 ;[14] 110 | push cnt ;[15] 111 | ldi leap, 0 ;[17] [rx loop init] 112 | ldi cnt, USB_BUFSIZE;[18] [rx loop init] 113 | rjmp rxbit1 ;[19] arrives at [21] 114 | 115 | ;---------------------------------------------------------------------------- 116 | ; Receiver loop (numbers in brackets are cycles within byte after instr) 117 | ;---------------------------------------------------------------------------- 118 | 119 | ; duration of unstuffing code should be 10.66666667 cycles. We adjust "leap" 120 | ; accordingly to approximate this value in the long run. 121 | 122 | unstuff6: 123 | andi x2, USBMASK ;[03] 124 | ori x3, 1<<6 ;[04] will not be shifted any more 125 | andi shift, ~0x80;[05] 126 | mov x1, x2 ;[06] sampled bit 7 is actually re-sampled bit 6 127 | subi leap, -1 ;[07] total duration = 11 bits -> subtract 1/3 128 | rjmp didUnstuff6 ;[08] 129 | 130 | unstuff7: 131 | ori x3, 1<<7 ;[09] will not be shifted any more 132 | in x2, USBIN ;[00] [10] re-sample bit 7 133 | andi x2, USBMASK ;[01] 134 | andi shift, ~0x80;[02] 135 | subi leap, 2 ;[03] total duration = 10 bits -> add 1/3 136 | rjmp didUnstuff7 ;[04] 137 | 138 | unstuffEven: 139 | ori x3, 1<<6 ;[09] will be shifted right 6 times for bit 0 140 | in x1, USBIN ;[00] [10] 141 | andi shift, ~0x80;[01] 142 | andi x1, USBMASK ;[02] 143 | breq se0 ;[03] 144 | subi leap, -1 ;[04] total duration = 11 bits -> subtract 1/3 145 | nop2 ;[05] 146 | rjmp didUnstuffE ;[06] 147 | 148 | unstuffOdd: 149 | ori x3, 1<<5 ;[09] will be shifted right 4 times for bit 1 150 | in x2, USBIN ;[00] [10] 151 | andi shift, ~0x80;[01] 152 | andi x2, USBMASK ;[02] 153 | breq se0 ;[03] 154 | subi leap, -1 ;[04] total duration = 11 bits -> subtract 1/3 155 | nop2 ;[05] 156 | rjmp didUnstuffO ;[06] 157 | 158 | rxByteLoop: 159 | andi x1, USBMASK ;[03] 160 | eor x2, x1 ;[04] 161 | subi leap, 1 ;[05] 162 | brpl skipLeap ;[06] 163 | subi leap, -3 ;1 one leap cycle every 3rd byte -> 85 + 1/3 cycles per byte 164 | nop ;1 165 | skipLeap: 166 | subi x2, 1 ;[08] 167 | ror shift ;[09] 168 | didUnstuff6: 169 | cpi shift, 0xfc ;[10] 170 | in x2, USBIN ;[00] [11] <-- sample bit 7 171 | brcc unstuff6 ;[01] 172 | andi x2, USBMASK ;[02] 173 | eor x1, x2 ;[03] 174 | subi x1, 1 ;[04] 175 | ror shift ;[05] 176 | didUnstuff7: 177 | cpi shift, 0xfc ;[06] 178 | brcc unstuff7 ;[07] 179 | eor x3, shift ;[08] reconstruct: x3 is 1 at bit locations we changed, 0 at others 180 | st y+, x3 ;[09] store data 181 | rxBitLoop: 182 | in x1, USBIN ;[00] [11] <-- sample bit 0/2/4 183 | andi x1, USBMASK ;[01] 184 | eor x2, x1 ;[02] 185 | andi x3, 0x3f ;[03] topmost two bits reserved for 6 and 7 186 | subi x2, 1 ;[04] 187 | ror shift ;[05] 188 | cpi shift, 0xfc ;[06] 189 | brcc unstuffEven ;[07] 190 | didUnstuffE: 191 | lsr x3 ;[08] 192 | lsr x3 ;[09] 193 | rxbit1: 194 | in x2, USBIN ;[00] [10] <-- sample bit 1/3/5 195 | andi x2, USBMASK ;[01] 196 | breq se0 ;[02] 197 | eor x1, x2 ;[03] 198 | subi x1, 1 ;[04] 199 | ror shift ;[05] 200 | cpi shift, 0xfc ;[06] 201 | brcc unstuffOdd ;[07] 202 | didUnstuffO: 203 | subi bitcnt, 0xab;[08] == addi 0x55, 0x55 = 0x100/3 204 | brcs rxBitLoop ;[09] 205 | 206 | subi cnt, 1 ;[10] 207 | in x1, USBIN ;[00] [11] <-- sample bit 6 208 | brcc rxByteLoop ;[01] 209 | rjmp overflow 210 | 211 | macro POP_STANDARD ; 14 cycles 212 | pop cnt 213 | pop x4 214 | pop x3 215 | pop x2 216 | pop x1 217 | pop shift 218 | pop bitcnt 219 | endm 220 | macro POP_RETI ; 7 cycles 221 | pop YH 222 | pop YL 223 | out SREG, YL 224 | pop YL 225 | endm 226 | 227 | #include "asmcommon.inc" 228 | 229 | ; USB spec says: 230 | ; idle = J 231 | ; J = (D+ = 0), (D- = 1) 232 | ; K = (D+ = 1), (D- = 0) 233 | ; Spec allows 7.5 bit times from EOP to SOP for replies 234 | 235 | bitstuffN: 236 | eor x1, x4 ;[5] 237 | ldi x2, 0 ;[6] 238 | nop2 ;[7] 239 | nop ;[9] 240 | out USBOUT, x1 ;[10] <-- out 241 | rjmp didStuffN ;[0] 242 | 243 | bitstuff6: 244 | eor x1, x4 ;[5] 245 | ldi x2, 0 ;[6] Carry is zero due to brcc 246 | rol shift ;[7] compensate for ror shift at branch destination 247 | rjmp didStuff6 ;[8] 248 | 249 | bitstuff7: 250 | ldi x2, 0 ;[2] Carry is zero due to brcc 251 | rjmp didStuff7 ;[3] 252 | 253 | 254 | sendNakAndReti: 255 | ldi x3, USBPID_NAK ;[-18] 256 | rjmp sendX3AndReti ;[-17] 257 | sendAckAndReti: 258 | ldi cnt, USBPID_ACK ;[-17] 259 | sendCntAndReti: 260 | mov x3, cnt ;[-16] 261 | sendX3AndReti: 262 | ldi YL, 20 ;[-15] x3==r20 address is 20 263 | ldi YH, 0 ;[-14] 264 | ldi cnt, 2 ;[-13] 265 | ; rjmp usbSendAndReti fallthrough 266 | 267 | ;usbSend: 268 | ;pointer to data in 'Y' 269 | ;number of bytes in 'cnt' -- including sync byte [range 2 ... 12] 270 | ;uses: x1...x4, btcnt, shift, cnt, Y 271 | ;Numbers in brackets are time since first bit of sync pattern is sent 272 | ;We don't match the transfer rate exactly (don't insert leap cycles every third 273 | ;byte) because the spec demands only 1.5% precision anyway. 274 | usbSendAndReti: ; 12 cycles until SOP 275 | in x2, USBDDR ;[-12] 276 | ori x2, USBMASK ;[-11] 277 | sbi USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups) 278 | in x1, USBOUT ;[-8] port mirror for tx loop 279 | out USBDDR, x2 ;[-7] <- acquire bus 280 | ; need not init x2 (bitstuff history) because sync starts with 0 281 | ldi x4, USBMASK ;[-6] exor mask 282 | ldi shift, 0x80 ;[-5] sync byte is first byte sent 283 | txByteLoop: 284 | ldi bitcnt, 0x35 ;[-4] [6] binary 0011 0101 285 | txBitLoop: 286 | sbrs shift, 0 ;[-3] [7] 287 | eor x1, x4 ;[-2] [8] 288 | out USBOUT, x1 ;[-1] [9] <-- out N 289 | ror shift ;[0] [10] 290 | ror x2 ;[1] 291 | didStuffN: 292 | cpi x2, 0xfc ;[2] 293 | brcc bitstuffN ;[3] 294 | lsr bitcnt ;[4] 295 | brcc txBitLoop ;[5] 296 | brne txBitLoop ;[6] 297 | 298 | sbrs shift, 0 ;[7] 299 | eor x1, x4 ;[8] 300 | didStuff6: 301 | out USBOUT, x1 ;[-1] [9] <-- out 6 302 | ror shift ;[0] [10] 303 | ror x2 ;[1] 304 | cpi x2, 0xfc ;[2] 305 | brcc bitstuff6 ;[3] 306 | ror shift ;[4] 307 | didStuff7: 308 | ror x2 ;[5] 309 | sbrs x2, 7 ;[6] 310 | eor x1, x4 ;[7] 311 | nop ;[8] 312 | cpi x2, 0xfc ;[9] 313 | out USBOUT, x1 ;[-1][10] <-- out 7 314 | brcc bitstuff7 ;[0] [11] 315 | ld shift, y+ ;[1] 316 | dec cnt ;[3] 317 | brne txByteLoop ;[4] 318 | ;make SE0: 319 | cbr x1, USBMASK ;[5] prepare SE0 [spec says EOP may be 21 to 25 cycles] 320 | lds x2, usbNewDeviceAddr;[6] 321 | lsl x2 ;[8] we compare with left shifted address 322 | subi YL, 20 + 2 ;[9] Only assign address on data packets, not ACK/NAK in x3 323 | sbci YH, 0 ;[10] 324 | out USBOUT, x1 ;[11] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle 325 | ;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm: 326 | ;set address only after data packet was sent, not after handshake 327 | breq skipAddrAssign ;[0] 328 | sts usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer 329 | skipAddrAssign: 330 | ;end of usbDeviceAddress transfer 331 | ldi x2, 1< when compiling with IAR. 107 | - Introduced USB_CFG_DESCR_PROPS_* in usbconfig.h to configure how each 108 | USB descriptor should be handled. It is now possible to provide descriptor 109 | data in Flash, RAM or dynamically at runtime. 110 | - STALL is now a status in usbTxLen* instead of a message. We can now conform 111 | to the spec and leave the stall status pending until it is cleared. 112 | - Made usbTxPacketCnt1 and usbTxPacketCnt3 public. This allows the 113 | application code to reset data toggling on interrupt pipes. 114 | 115 | * Release 2006-07-18 116 | 117 | - Added an #if !defined __ASSEMBLER__ to the warning in usbdrv.h. This fixes 118 | an assembler error. 119 | - usbDeviceDisconnect() takes pull-up resistor to high impedance now. 120 | 121 | * Release 2007-02-01 122 | 123 | - Merged in some code size improvements from usbtiny (thanks to Dick 124 | Streefland for these optimizations!) 125 | - Special alignment requirement for usbRxBuf not required any more. Thanks 126 | again to Dick Streefland for this hint! 127 | - Reverted to "#warning" instead of unused static variables -- new versions 128 | of IAR CC should handle this directive. 129 | - Changed Open Source license to GNU GPL v2 in order to make linking against 130 | other free libraries easier. We no longer require publication of the 131 | circuit diagrams, but we STRONGLY encourage it. If you improve the driver 132 | itself, PLEASE grant us a royalty free license to your changes for our 133 | commercial license. 134 | 135 | * Release 2007-03-29 136 | 137 | - New configuration option "USB_PUBLIC" in usbconfig.h. 138 | - Set USB version number to 1.10 instead of 1.01. 139 | - Code used USB_CFG_DESCR_PROPS_STRING_DEVICE and 140 | USB_CFG_DESCR_PROPS_STRING_PRODUCT inconsistently. Changed all occurrences 141 | to USB_CFG_DESCR_PROPS_STRING_PRODUCT. 142 | - New assembler module for 16.5 MHz RC oscillator clock with PLL in receiver 143 | code. 144 | - New assembler module for 16 MHz crystal. 145 | - usbdrvasm.S contains common code only, clock-specific parts have been moved 146 | to usbdrvasm12.S, usbdrvasm16.S and usbdrvasm165.S respectively. 147 | 148 | * Release 2007-06-25 149 | 150 | - 16 MHz module: Do SE0 check in stuffed bits as well. 151 | 152 | * Release 2007-07-07 153 | 154 | - Define hi8(x) for IAR compiler to limit result to 8 bits. This is necessary 155 | for negative values. 156 | - Added 15 MHz module contributed by V. Bosch. 157 | - Interrupt vector name can now be configured. This is useful if somebody 158 | wants to use a different hardware interrupt than INT0. 159 | 160 | * Release 2007-08-07 161 | 162 | - Moved handleIn3 routine in usbdrvasm16.S so that relative jump range is 163 | not exceeded. 164 | - More config options: USB_RX_USER_HOOK(), USB_INITIAL_DATATOKEN, 165 | USB_COUNT_SOF 166 | - USB_INTR_PENDING can now be a memory address, not just I/O 167 | 168 | * Release 2007-09-19 169 | 170 | - Split out common parts of assembler modules into separate include file 171 | - Made endpoint numbers configurable so that given interface definitions 172 | can be matched. See USB_CFG_EP3_NUMBER in usbconfig-prototype.h. 173 | - Store endpoint number for interrupt/bulk-out so that usbFunctionWriteOut() 174 | can handle any number of endpoints. 175 | - Define usbDeviceConnect() and usbDeviceDisconnect() even if no 176 | USB_CFG_PULLUP_IOPORTNAME is defined. Directly set D+ and D- to 0 in this 177 | case. 178 | 179 | * Release 2007-12-01 180 | 181 | - Optimize usbDeviceConnect() and usbDeviceDisconnect() for less code size 182 | when USB_CFG_PULLUP_IOPORTNAME is not defined. 183 | 184 | * Release 2007-12-13 185 | 186 | - Renamed all include-only assembler modules from *.S to *.inc so that 187 | people don't add them to their project sources. 188 | - Distribute leap bits in tx loop more evenly for 16 MHz module. 189 | - Use "macro" and "endm" instead of ".macro" and ".endm" for IAR 190 | - Avoid compiler warnings for constant expr range by casting some values in 191 | USB descriptors. 192 | 193 | * Release 2008-01-21 194 | 195 | - Fixed bug in 15 and 16 MHz module where the new address set with 196 | SET_ADDRESS was already accepted at the next NAK or ACK we send, not at 197 | the next data packet we send. This caused problems when the host polled 198 | too fast. Thanks to Alexander Neumann for his help and patience debugging 199 | this issue! 200 | 201 | * Release 2008-02-05 202 | 203 | - Fixed bug in 16.5 MHz module where a register was used in the interrupt 204 | handler before it was pushed. This bug was introduced with version 205 | 2007-09-19 when common parts were moved to a separate file. 206 | - Optimized CRC routine (thanks to Reimar Doeffinger). 207 | 208 | * Release 2008-02-16 209 | 210 | - Removed outdated IAR compatibility stuff (code sections). 211 | - Added hook macros for USB_RESET_HOOK() and USB_SET_ADDRESS_HOOK(). 212 | - Added optional routine usbMeasureFrameLength() for calibration of the 213 | internal RC oscillator. 214 | 215 | * Release 2008-02-28 216 | 217 | - USB_INITIAL_DATATOKEN defaults to USBPID_DATA1 now, which means that we 218 | start with sending USBPID_DATA0. 219 | - Changed defaults in usbconfig-prototype.h 220 | - Added free USB VID/PID pair for MIDI class devices 221 | - Restructured AVR-USB as separate package, not part of PowerSwitch any more. 222 | 223 | * Release 2008-04-18 224 | 225 | - Restructured usbdrv.c so that it is easier to read and understand. 226 | - Better code optimization with gcc 4. 227 | - If a second interrupt in endpoint is enabled, also add it to config 228 | descriptor. 229 | - Added config option for long transfers (above 254 bytes), see 230 | USB_CFG_LONG_TRANSFERS in usbconfig.h. 231 | - Added 20 MHz module contributed by Jeroen Benschop. 232 | 233 | * Release 2008-05-13 234 | 235 | - Fixed bug in libs-host/hiddata.c function usbhidGetReport(): length 236 | was not incremented, pointer to length was incremented instead. 237 | - Added code to command line tool(s) which claims an interface. This code 238 | is disabled by default, but may be necessary on newer Linux kernels. 239 | - Added usbconfig.h option "USB_CFG_CHECK_DATA_TOGGLING". 240 | - New header "usbportability.h" prepares ports to other development 241 | environments. 242 | - Long transfers (above 254 bytes) did not work when usbFunctionRead() was 243 | used to supply the data. Fixed this bug. [Thanks to Alexander Neumann!] 244 | - In hiddata.c (example code for sending/receiving data over HID), use 245 | USB_RECIP_DEVICE instead of USB_RECIP_INTERFACE for control transfers so 246 | that we need not claim the interface. 247 | - in usbPoll() loop 20 times polling for RESET state instead of 10 times. 248 | This accounts for the higher clock rates we now support. 249 | - Added a module for 12.8 MHz RC oscillator with PLL in receiver loop. 250 | - Added hook to SOF code so that oscillator can be tuned to USB frame clock. 251 | - Added timeout to waitForJ loop. Helps preventing unexpected hangs. 252 | - Added example code for oscillator tuning to libs-device (thanks to 253 | Henrik Haftmann for the idea to this routine). 254 | - Implemented option USB_CFG_SUPPRESS_INTR_CODE. 255 | 256 | * Release 2008-10-22 257 | 258 | - Fixed libs-device/osctune.h: OSCCAL is memory address on ATMega88 and 259 | similar, not offset of 0x20 needs to be added. 260 | - Allow distribution under GPLv3 for those who have to link against other 261 | code distributed under GPLv3. 262 | 263 | * Release 2008-11-26 264 | 265 | - Removed libusb-win32 dependency for hid-data example in Makefile.windows. 266 | It was never required and confused many people. 267 | - Added extern uchar usbRxToken to usbdrv.h. 268 | - Integrated a module with CRC checks at 18 MHz by Lukas Schrittwieser. 269 | 270 | * Release 2009-03-23 271 | 272 | - Hid-mouse example used settings from hid-data example, fixed that. 273 | - Renamed project to V-USB due to a trademark issue with Atmel(r). 274 | - Changed CommercialLicense.txt and USBID-License.txt to make the 275 | background of USB ID registration clearer. 276 | 277 | * Release 2009-04-15 278 | 279 | - Changed CommercialLicense.txt to reflect the new range of PIDs from 280 | Jason Kotzin. 281 | - Removed USBID-License.txt in favor of USB-IDs-for-free.txt and 282 | USB-ID-FAQ.txt 283 | - Fixed a bug in the 12.8 MHz module: End Of Packet decection was made in 284 | the center between bit 0 and 1 of each byte. This is where the data lines 285 | are expected to change and the sampled data may therefore be nonsense. 286 | We therefore check EOP ONLY if bits 0 AND 1 have both been read as 0 on D-. 287 | - Fixed a bitstuffing problem in the 16 MHz module: If bit 6 was stuffed, 288 | the unstuffing code in the receiver routine was 1 cycle too long. If 289 | multiple bytes had the unstuffing in bit 6, the error summed up until the 290 | receiver was out of sync. 291 | - Included option for faster CRC routine. 292 | Thanks to Slawomir Fras (BoskiDialer) for this code! 293 | - Updated bits in Configuration Descriptor's bmAttributes according to 294 | USB 1.1 (in particular bit 7, it is a must-be-set bit now). 295 | 296 | * Release 2009-08-22 297 | 298 | - Moved first DBG1() after odDebugInit() in all examples. 299 | - Use vector INT0_vect instead of SIG_INTERRUPT0 if defined. This makes 300 | V-USB compatible with the new "p" suffix devices (e.g. ATMega328p). 301 | - USB_CFG_CLOCK_KHZ setting is now required in usbconfig.h (no default any 302 | more). 303 | - New option USB_CFG_DRIVER_FLASH_PAGE allows boot loaders on devices with 304 | more than 64 kB flash. 305 | - Built-in configuration descriptor allows custom definition for second 306 | endpoint now. 307 | 308 | * Release 2010-07-15 309 | 310 | - Fixed bug in usbDriverSetup() which prevented descriptor sizes above 255 311 | bytes. 312 | - Avoid a compiler warning for unused parameter in usbHandleResetHook() when 313 | compiler option -Wextra is enabled. 314 | - Fixed wrong hex value for some IDs in USB-IDs-for-free.txt. 315 | - Keep a define for USBATTR_BUSPOWER, although the flag does not exist 316 | in USB 1.1 any more. Set it to 0. This is for backward compatibility. 317 | 318 | * Release 2012-01-09 319 | 320 | - Define a separate (defined) type for usbMsgPtr so that projects using a 321 | tiny memory model can define it to an 8 bit type in usbconfig.h. This 322 | change also saves a couple of bytes when using a scalar 16 bit type. 323 | - Inserted "const" keyword for all PROGMEM declarations because new GCC 324 | requires it. 325 | - Fixed problem with dependence of usbportability.h on usbconfig.h. This 326 | problem occurred with IAR CC only. 327 | - Prepared repository for github.com. 328 | 329 | * Release 2012-12-06 -------------------------------------------------------------------------------- /src/vusb/usbdrvasm20.inc: -------------------------------------------------------------------------------- 1 | /* Name: usbdrvasm20.inc 2 | * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers 3 | * Author: Jeroen Benschop 4 | * Based on usbdrvasm16.inc from Christian Starkjohann 5 | * Creation Date: 2008-03-05 6 | * Tabsize: 4 7 | * Copyright: (c) 2008 by Jeroen Benschop and OBJECTIVE DEVELOPMENT Software GmbH 8 | * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) 9 | */ 10 | 11 | /* Do not link this file! Link usbdrvasm.S instead, which includes the 12 | * appropriate implementation! 13 | */ 14 | 15 | /* 16 | General Description: 17 | This file is the 20 MHz version of the asssembler part of the USB driver. It 18 | requires a 20 MHz crystal (not a ceramic resonator and not a calibrated RC 19 | oscillator). 20 | 21 | See usbdrv.h for a description of the entire driver. 22 | 23 | Since almost all of this code is timing critical, don't change unless you 24 | really know what you are doing! Many parts require not only a maximum number 25 | of CPU cycles, but even an exact number of cycles! 26 | */ 27 | 28 | #define leap2 x3 29 | #ifdef __IAR_SYSTEMS_ASM__ 30 | #define nextInst $+2 31 | #else 32 | #define nextInst .+0 33 | #endif 34 | 35 | ;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes 36 | ;nominal frequency: 20 MHz -> 13.333333 cycles per bit, 106.666667 cycles per byte 37 | ; Numbers in brackets are clocks counted from center of last sync bit 38 | ; when instruction starts 39 | ;register use in receive loop: 40 | ; shift assembles the byte currently being received 41 | ; x1 holds the D+ and D- line state 42 | ; x2 holds the previous line state 43 | ; x4 (leap) is used to add a leap cycle once every three bytes received 44 | ; X3 (leap2) is used to add a leap cycle once every three stuff bits received 45 | ; bitcnt is used to determine when a stuff bit is due 46 | ; cnt holds the number of bytes left in the receive buffer 47 | 48 | USB_INTR_VECTOR: 49 | ;order of registers pushed: YL, SREG YH, [sofError], bitcnt, shift, x1, x2, x3, x4, cnt 50 | push YL ;[-28] push only what is necessary to sync with edge ASAP 51 | in YL, SREG ;[-26] 52 | push YL ;[-25] 53 | push YH ;[-23] 54 | ;---------------------------------------------------------------------------- 55 | ; Synchronize with sync pattern: 56 | ;---------------------------------------------------------------------------- 57 | ;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K] 58 | ;sync up with J to K edge during sync pattern -- use fastest possible loops 59 | ;The first part waits at most 1 bit long since we must be in sync pattern. 60 | ;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to 61 | ;waitForJ, ensure that this prerequisite is met. 62 | waitForJ: 63 | inc YL 64 | sbis USBIN, USBMINUS 65 | brne waitForJ ; just make sure we have ANY timeout 66 | waitForK: 67 | ;The following code results in a sampling window of < 1/4 bit which meets the spec. 68 | sbis USBIN, USBMINUS ;[-19] 69 | rjmp foundK ;[-18] 70 | sbis USBIN, USBMINUS 71 | rjmp foundK 72 | sbis USBIN, USBMINUS 73 | rjmp foundK 74 | sbis USBIN, USBMINUS 75 | rjmp foundK 76 | sbis USBIN, USBMINUS 77 | rjmp foundK 78 | sbis USBIN, USBMINUS 79 | rjmp foundK 80 | sbis USBIN, USBMINUS 81 | rjmp foundK 82 | sbis USBIN, USBMINUS 83 | rjmp foundK 84 | sbis USBIN, USBMINUS 85 | rjmp foundK 86 | #if USB_COUNT_SOF 87 | lds YL, usbSofCount 88 | inc YL 89 | sts usbSofCount, YL 90 | #endif /* USB_COUNT_SOF */ 91 | #ifdef USB_SOF_HOOK 92 | USB_SOF_HOOK 93 | #endif 94 | rjmp sofError 95 | foundK: ;[-16] 96 | ;{3, 5} after falling D- edge, average delay: 4 cycles 97 | ;bit0 should be at 34 for center sampling. Currently at 4 so 30 cylces till bit 0 sample 98 | ;use 1 bit time for setup purposes, then sample again. Numbers in brackets 99 | ;are cycles from center of first sync (double K) bit after the instruction 100 | push bitcnt ;[-16] 101 | ; [---] ;[-15] 102 | lds YL, usbInputBufOffset;[-14] 103 | ; [---] ;[-13] 104 | clr YH ;[-12] 105 | subi YL, lo8(-(usbRxBuf));[-11] [rx loop init] 106 | sbci YH, hi8(-(usbRxBuf));[-10] [rx loop init] 107 | push shift ;[-9] 108 | ; [---] ;[-8] 109 | ldi shift,0x40 ;[-7] set msb to "1" so processing bit7 can be detected 110 | nop2 ;[-6] 111 | ; [---] ;[-5] 112 | ldi bitcnt, 5 ;[-4] [rx loop init] 113 | sbis USBIN, USBMINUS ;[-3] we want two bits K (sample 3 cycles too early) 114 | rjmp haveTwoBitsK ;[-2] 115 | pop shift ;[-1] undo the push from before 116 | pop bitcnt ;[1] 117 | rjmp waitForK ;[3] this was not the end of sync, retry 118 | ; The entire loop from waitForK until rjmp waitForK above must not exceed two 119 | ; bit times (= 27 cycles). 120 | 121 | ;---------------------------------------------------------------------------- 122 | ; push more registers and initialize values while we sample the first bits: 123 | ;---------------------------------------------------------------------------- 124 | haveTwoBitsK: 125 | push x1 ;[0] 126 | push x2 ;[2] 127 | push x3 ;[4] (leap2) 128 | ldi leap2, 0x55 ;[6] add leap cycle on 2nd,5th,8th,... stuff bit 129 | push x4 ;[7] == leap 130 | ldi leap, 0x55 ;[9] skip leap cycle on 2nd,5th,8th,... byte received 131 | push cnt ;[10] 132 | ldi cnt, USB_BUFSIZE ;[12] [rx loop init] 133 | ldi x2, 1< 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include 7 | #include 8 | 9 | #include "vusb/usbdrv.h" 10 | #include "TFUsbMidi.h" 11 | 12 | 13 | /* ------------------------------------------------------------------------- */ 14 | /* ----------------------------- USB interface ----------------------------- */ 15 | /* ------------------------------------------------------------------------- */ 16 | static uchar currentAddress; 17 | static uchar bytesRemaining; 18 | #ifdef __cplusplus 19 | extern "C"{ 20 | #endif 21 | 22 | static const PROGMEM char deviceDescrMIDI[] = { /* USB device descriptor */ 23 | 18, /* sizeof(usbDescriptorDevice): length of descriptor in bytes */ 24 | USBDESCR_DEVICE, /* descriptor type */ 25 | 0x10, 0x01, /* USB version supported */ 26 | 0, /* device class: defined at interface level */ 27 | 0, /* subclass */ 28 | 0, /* protocol */ 29 | 8, /* max packet size */ 30 | USB_CFG_VENDOR_ID, /* 2 bytes */ 31 | USB_CFG_DEVICE_ID, /* 2 bytes */ 32 | USB_CFG_DEVICE_VERSION, /* 2 bytes */ 33 | 1, /* manufacturer string index */ 34 | 2, /* product string index */ 35 | 0, /* serial number string index */ 36 | 1, /* number of configurations */ 37 | }; 38 | 39 | // B.2 Configuration Descriptor 40 | static const PROGMEM char configDescrMIDI[] = { /* USB configuration descriptor */ 41 | 9, /* sizeof(usbDescrConfig): length of descriptor in bytes */ 42 | USBDESCR_CONFIG, /* descriptor type */ 43 | 101, 0, /* total length of data returned (including inlined descriptors) */ 44 | 2, /* number of interfaces in this configuration */ 45 | 1, /* index of this configuration */ 46 | 0, /* configuration name string index */ 47 | 0, 48 | //USBATTR_BUSPOWER, 49 | USB_CFG_MAX_BUS_POWER / 2, /* max USB current in 2mA units */ 50 | 51 | // B.3 AudioControl Interface Descriptors 52 | // The AudioControl interface describes the device structure (audio function topology) 53 | // and is used to manipulate the Audio Controls. This device has no audio function 54 | // incorporated. However, the AudioControl interface is mandatory and therefore both 55 | // the standard AC interface descriptor and the classspecific AC interface descriptor 56 | // must be present. The class-specific AC interface descriptor only contains the header 57 | // descriptor. 58 | 59 | // B.3.1 Standard AC Interface Descriptor 60 | // The AudioControl interface has no dedicated endpoints associated with it. It uses the 61 | // default pipe (endpoint 0) for all communication purposes. Class-specific AudioControl 62 | // Requests are sent using the default pipe. There is no Status Interrupt endpoint provided. 63 | /* AC interface descriptor follows inline: */ 64 | 9, /* sizeof(usbDescrInterface): length of descriptor in bytes */ 65 | USBDESCR_INTERFACE, /* descriptor type */ 66 | 0, /* index of this interface */ 67 | 0, /* alternate setting for this interface */ 68 | 0, /* endpoints excl 0: number of endpoint descriptors to follow */ 69 | 1, /* */ 70 | 1, /* */ 71 | 0, /* */ 72 | 0, /* string index for interface */ 73 | 74 | // B.3.2 Class-specific AC Interface Descriptor 75 | // The Class-specific AC interface descriptor is always headed by a Header descriptor 76 | // that contains general information about the AudioControl interface. It contains all 77 | // the pointers needed to describe the Audio Interface Collection, associated with the 78 | // described audio function. Only the Header descriptor is present in this device 79 | // because it does not contain any audio functionality as such. 80 | /* AC Class-Specific descriptor */ 81 | 9, /* sizeof(usbDescrCDC_HeaderFn): length of descriptor in bytes */ 82 | 36, /* descriptor type */ 83 | 1, /* header functional descriptor */ 84 | 0x0, 0x01, /* bcdADC */ 85 | 9, 0, /* wTotalLength */ 86 | 1, /* */ 87 | 1, /* */ 88 | 89 | // B.4 MIDIStreaming Interface Descriptors 90 | 91 | // B.4.1 Standard MS Interface Descriptor 92 | /* interface descriptor follows inline: */ 93 | 9, /* length of descriptor in bytes */ 94 | USBDESCR_INTERFACE, /* descriptor type */ 95 | 1, /* index of this interface */ 96 | 0, /* alternate setting for this interface */ 97 | 2, /* endpoints excl 0: number of endpoint descriptors to follow */ 98 | 1, /* AUDIO */ 99 | 3, /* MS */ 100 | 0, /* unused */ 101 | 0, /* string index for interface */ 102 | 103 | // B.4.2 Class-specific MS Interface Descriptor 104 | /* MS Class-Specific descriptor */ 105 | 7, /* length of descriptor in bytes */ 106 | 36, /* descriptor type */ 107 | 1, /* header functional descriptor */ 108 | 0x0, 0x01, /* bcdADC */ 109 | 65, 0, /* wTotalLength */ 110 | 111 | // B.4.3 MIDI IN Jack Descriptor 112 | 6, /* bLength */ 113 | 36, /* descriptor type */ 114 | 2, /* MIDI_IN_JACK desc subtype */ 115 | 1, /* EMBEDDED bJackType */ 116 | 1, /* bJackID */ 117 | 0, /* iJack */ 118 | 119 | 6, /* bLength */ 120 | 36, /* descriptor type */ 121 | 2, /* MIDI_IN_JACK desc subtype */ 122 | 2, /* EXTERNAL bJackType */ 123 | 2, /* bJackID */ 124 | 0, /* iJack */ 125 | 126 | //B.4.4 MIDI OUT Jack Descriptor 127 | 9, /* length of descriptor in bytes */ 128 | 36, /* descriptor type */ 129 | 3, /* MIDI_OUT_JACK descriptor */ 130 | 1, /* EMBEDDED bJackType */ 131 | 3, /* bJackID */ 132 | 1, /* No of input pins */ 133 | 2, /* BaSourceID */ 134 | 1, /* BaSourcePin */ 135 | 0, /* iJack */ 136 | 137 | 9, /* bLength of descriptor in bytes */ 138 | 36, /* bDescriptorType */ 139 | 3, /* MIDI_OUT_JACK bDescriptorSubtype */ 140 | 2, /* EXTERNAL bJackType */ 141 | 4, /* bJackID */ 142 | 1, /* bNrInputPins */ 143 | 1, /* baSourceID (0) */ 144 | 1, /* baSourcePin (0) */ 145 | 0, /* iJack */ 146 | 147 | 148 | // B.5 Bulk OUT Endpoint Descriptors 149 | 150 | //B.5.1 Standard Bulk OUT Endpoint Descriptor 151 | 9, /* bLenght */ 152 | USBDESCR_ENDPOINT, /* bDescriptorType = endpoint */ 153 | 0x1, /* bEndpointAddress OUT endpoint number 1 */ 154 | 3, /* bmAttributes: 2:Bulk, 3:Interrupt endpoint */ 155 | 8, 0, /* wMaxPacketSize */ 156 | 10, /* bIntervall in ms */ 157 | 0, /* bRefresh */ 158 | 0, /* bSyncAddress */ 159 | 160 | // B.5.2 Class-specific MS Bulk OUT Endpoint Descriptor 161 | 5, /* bLength of descriptor in bytes */ 162 | 37, /* bDescriptorType */ 163 | 1, /* bDescriptorSubtype */ 164 | 1, /* bNumEmbMIDIJack */ 165 | 1, /* baAssocJackID (0) */ 166 | 167 | 168 | //B.6 Bulk IN Endpoint Descriptors 169 | 170 | //B.6.1 Standard Bulk IN Endpoint Descriptor 171 | 9, /* bLenght */ 172 | USBDESCR_ENDPOINT, /* bDescriptorType = endpoint */ 173 | 0x81, /* bEndpointAddress IN endpoint number 1 */ 174 | 3, /* bmAttributes: 2: Bulk, 3: Interrupt endpoint */ 175 | 8, 0, /* wMaxPacketSize */ 176 | 10, /* bIntervall in ms */ 177 | 0, /* bRefresh */ 178 | 0, /* bSyncAddress */ 179 | 180 | // B.6.2 Class-specific MS Bulk IN Endpoint Descriptor 181 | 5, /* bLength of descriptor in bytes */ 182 | 37, /* bDescriptorType */ 183 | 1, /* bDescriptorSubtype */ 184 | 1, /* bNumEmbMIDIJack (0) */ 185 | 3, /* baAssocJackID (0) */ 186 | }; 187 | 188 | 189 | /* ------------------------------------------------------------------------- */ 190 | 191 | uchar usbFunctionDescriptor(usbRequest_t * rq) 192 | { 193 | if (rq->wValue.bytes[1] == USBDESCR_DEVICE) { 194 | usbMsgPtr = (uchar *) deviceDescrMIDI; 195 | return sizeof(deviceDescrMIDI); 196 | } 197 | else { 198 | /* must be config descriptor */ 199 | usbMsgPtr = (uchar *) configDescrMIDI; 200 | return sizeof(configDescrMIDI); 201 | } 202 | } 203 | 204 | usbMsgLen_t usbFunctionSetup(uchar data[8]) { 205 | usbRequest_t *rq = (usbRequest_t*)((void *)data); 206 | // HID class request 207 | if((rq->bmRequestType & USBRQ_TYPE_MASK) == USBRQ_TYPE_CLASS){ 208 | if(rq->bRequest == USBRQ_HID_GET_REPORT){ 209 | return 1; 210 | }else if(rq->bRequest == USBRQ_HID_SET_REPORT){ 211 | } 212 | }else{ 213 | //ignore vendor type requests, we don't use any 214 | } 215 | return 0xff; 216 | } 217 | 218 | 219 | uchar usbFunctionRead(uchar *data, uchar len) 220 | { 221 | return 7; 222 | } 223 | 224 | uchar usbFunctionWrite(uchar * data, uchar len) 225 | { 226 | return 1; 227 | } 228 | 229 | void usbFunctionWriteOut(uchar *data, uchar len) 230 | { 231 | VUsbMidi.read(data, len); 232 | } 233 | 234 | /* ------------------------------------------------------------------------- */ 235 | /* ------------------------ Oscillator Calibration ------------------------- */ 236 | /* ------------------------------------------------------------------------- */ 237 | 238 | /* Calibrate the RC oscillator to 8.25 MHz. The core clock of 16.5 MHz is 239 | * derived from the 66 MHz peripheral clock by dividing. Our timing reference 240 | * is the Start Of Frame signal (a single SE0 bit) available immediately after 241 | * a USB RESET. We first do a binary search for the OSCCAL value and then 242 | * optimize this value with a neighboorhod search. 243 | * This algorithm may also be used to calibrate the RC oscillator directly to 244 | * 12 MHz (no PLL involved, can therefore be used on almost ALL AVRs), but this 245 | * is wide outside the spec for the OSCCAL value and the required precision for 246 | * the 12 MHz clock! Use the RC oscillator calibrated to 12 MHz for 247 | * experimental purposes only! 248 | */ 249 | 250 | static void calibrateOscillator(void) 251 | { 252 | uchar step = 128; 253 | uchar trialValue = 0, optimumValue; 254 | int x, optimumDev, targetValue = (unsigned)(1499 * (double)F_CPU / 10.5e6 + 0.5); 255 | 256 | /* do a binary search: */ 257 | do { 258 | OSCCAL = trialValue + step; 259 | x = usbMeasureFrameLength(); /* proportional to current real frequency */ 260 | if(x < targetValue) /* frequency still too low */ 261 | trialValue += step; 262 | step >>= 1; 263 | } while (step > 0); 264 | 265 | /* We have a precision of +/- 1 for optimum OSCCAL here */ 266 | /* now do a neighborhood search for optimum value */ 267 | optimumValue = trialValue; 268 | optimumDev = x; /* this is certainly far away from optimum */ 269 | for(OSCCAL = trialValue - 1; OSCCAL <= trialValue + 1; OSCCAL++) { 270 | x = usbMeasureFrameLength() - targetValue; 271 | if(x < 0) x = -x; 272 | if (x < optimumDev) { 273 | optimumDev = x; 274 | optimumValue = OSCCAL; 275 | } 276 | } 277 | OSCCAL = optimumValue; 278 | } 279 | 280 | /* 281 | Note: This calibration algorithm may try OSCCAL values of up to 192 even if 282 | the optimum value is far below 192. It may therefore exceed the allowed clock 283 | frequency of the CPU in low voltage designs! 284 | You may replace this search algorithm with any other algorithm you like if 285 | you have additional constraints such as a maximum CPU clock. 286 | For version 5.x RC oscillators (those with a split range of 2x128 steps, e.g. 287 | ATTiny25, ATTiny45, ATTiny85), it may be useful to search for the optimum in 288 | both regions. 289 | */ 290 | 291 | void hadUsbReset(void) 292 | { 293 | VUsbMidi.OnUSBReset(); 294 | /*cli(); 295 | calibrateOscillator(); 296 | sei();*/ 297 | //eeprom_write_byte(0, OSCCAL); 298 | //store the calibrated value in EEPROM byte 0 299 | } 300 | 301 | 302 | #ifdef __cplusplus 303 | } // extern "C" 304 | #endif 305 | 306 | 307 | 308 | TFUsbMidi::TFUsbMidi() { 309 | _bufftop = 0; 310 | _bufflast = 0; 311 | _buffsize = 0; 312 | _optimalize_osc = false; 313 | _calibrate_osc = false; 314 | }; 315 | 316 | void TFUsbMidi::begin(bool cal_osc) { 317 | uchar i; 318 | _calibrate_osc = cal_osc; 319 | // turn off timer0 320 | //TIMSK0&=!(1< 250 ms */ 328 | wdt_reset(); 329 | _delay_ms(1); 330 | } 331 | 332 | usbDeviceConnect(); 333 | sei(); 334 | }; 335 | 336 | uint8_t TFUsbMidi::buffNext(uint8_t value) { 337 | return (value + VUSBMIDI_RINGBUFFER_ESIZE) % (VUSBMIDI_RINGBUFFER_ESIZE*VUSBMIDI_RINGBUFFER_SIZE); 338 | }; 339 | 340 | uint8_t TFUsbMidi::buffPush(uint8_t *p) { 341 | if(buffNext(_bufflast) == _bufftop){ 342 | return 0; 343 | } 344 | buffer[_bufflast] = *p; 345 | buffer[_bufflast+1] = *(p+1); 346 | buffer[_bufflast+2] = *(p+2); 347 | buffer[_bufflast+3] = *(p+3); 348 | _bufflast = buffNext(_bufflast); 349 | _buffsize ++; 350 | return 1; 351 | }; 352 | 353 | uint8_t* TFUsbMidi::buffPop(void) { 354 | uint8_t *res = (uint8_t *)0; 355 | if(_bufftop != _bufflast){ 356 | res = &(buffer[_bufftop]); 357 | _bufftop = buffNext(_bufftop); 358 | _buffsize --; 359 | } 360 | return res; 361 | }; 362 | 363 | TFMidiType TFUsbMidi::getMessageType(byte *p) { 364 | TFMidiType type = InvalidType; 365 | switch ((*(p + 1) & 0xf0)) { 366 | case TFMidiType::NoteOn: type = TFMidiType::NoteOn; break; 367 | case TFMidiType::NoteOff: type = TFMidiType::NoteOff; break; 368 | case TFMidiType::ControlChange: type = TFMidiType::ControlChange; break; 369 | case TFMidiType::AfterTouchPoly: type = TFMidiType::AfterTouchPoly; break; 370 | case TFMidiType::ProgramChange: type = TFMidiType::ProgramChange; break; 371 | case TFMidiType::AfterTouchChannel: type = TFMidiType::AfterTouchChannel; break; 372 | case TFMidiType::PitchBend: type = TFMidiType::PitchBend; break; 373 | case TFMidiType::SystemExclusive: type = TFMidiType::SystemExclusive; break; 374 | case TFMidiType::TimeCodeQuarterFrame: type = TFMidiType::TimeCodeQuarterFrame; break; 375 | case TFMidiType::SongPosition: type = TFMidiType::SongPosition; break; 376 | case TFMidiType::SongSelect: type = TFMidiType::SongSelect; break; 377 | case TFMidiType::TuneRequest: type = TFMidiType::TuneRequest; break; 378 | case TFMidiType::Clock: type = TFMidiType::Clock; break; 379 | case TFMidiType::Start: type = TFMidiType::Start; break; 380 | case TFMidiType::Continue: type = TFMidiType::Continue; break; 381 | case TFMidiType::Stop: type = TFMidiType::Stop; break; 382 | case TFMidiType::ActiveSensing: type = TFMidiType::ActiveSensing; break; 383 | case TFMidiType::SystemReset: type = TFMidiType::SystemReset; break; 384 | case TFMidiType::InvalidType: type = TFMidiType::InvalidType; break; 385 | } 386 | return type; 387 | }; 388 | 389 | void TFUsbMidi::processMessage() { 390 | uint8_t *pbuf; 391 | TFMidiMessage message = {}; 392 | message.type = InvalidType; 393 | if (_buffsize>0) { 394 | pbuf = buffPop(); 395 | if (pbuf != 0) { 396 | message.type = getMessageType(pbuf); 397 | if (message.type != InvalidType) { 398 | message.channel = *(pbuf+1)&0x0f; 399 | message.data1 = *(pbuf+2)&0x7f; 400 | message.data2 = *(pbuf+3)&0x7f; 401 | 402 | if (_onMsgCallback != NULL) { 403 | _onMsgCallback(message); 404 | } 405 | } 406 | } 407 | } 408 | }; 409 | 410 | void TFUsbMidi::OnUSBReset(void) { 411 | if (_calibrate_osc) { 412 | calibrateOSC(); 413 | if (_optimalize_osc) { _calibrate_osc = true; }else { 414 | _calibrate_osc = false; 415 | }; 416 | } 417 | }; 418 | 419 | void TFUsbMidi::calibrateOSC(void) { 420 | cli(); 421 | calibrateOscillator(); 422 | sei(); 423 | }; 424 | 425 | void TFUsbMidi::OnMsg(void (*onMsgCallback)(TFMidiMessage)) { 426 | _onMsgCallback = onMsgCallback; 427 | }; 428 | 429 | void TFUsbMidi::refresh() { 430 | wdt_reset(); 431 | processMessage(); 432 | usbPoll(); 433 | }; 434 | 435 | void TFUsbMidi::read(uchar *data, uchar len) { 436 | cli(); 437 | buffPush(data); 438 | if (len > 4) { 439 | buffPush(data+4); 440 | } 441 | sei(); 442 | }; 443 | 444 | void TFUsbMidi::NoteOn(byte ch, byte note, byte velocity) { 445 | TFMidiMessage msg; 446 | msg.type = (velocity == 0) ? TFMidiType::NoteOff : TFMidiType::NoteOn; 447 | msg.channel = ch; 448 | msg.data1 = note; 449 | msg.data2 = velocity; 450 | write(msg); 451 | }; 452 | 453 | void TFUsbMidi::NoteOff(byte ch, byte note) { 454 | NoteOn(ch,note,0); 455 | }; 456 | 457 | void TFUsbMidi::ControlChange(byte ch, byte num, byte val) { 458 | TFMidiMessage msg; 459 | msg.type = TFMidiType::ControlChange; 460 | msg.channel = ch; 461 | msg.data1 = num; 462 | msg.data2 = val; 463 | write(msg); 464 | }; 465 | 466 | void TFUsbMidi::write(TFMidiMessage msg) { 467 | byte buffer[4]; 468 | buffer[0] = msg.type >> 4; 469 | buffer[1] = msg.type | msg.channel; 470 | buffer[2] = 0x7f & msg.data1; 471 | buffer[3] = (msg.data2 == 0) ? 0 : 0x7f & msg.data2; 472 | write(buffer,4); 473 | }; 474 | 475 | void TFUsbMidi::write(byte *buffer, byte size) { 476 | while (!usbInterruptIsReady()) { 477 | usbPoll(); 478 | } 479 | usbSetInterrupt(buffer, size); 480 | }; 481 | 482 | 483 | TFUsbMidi VUsbMidi = TFUsbMidi(); 484 | -------------------------------------------------------------------------------- /src/vusb/usbdrvasm12.inc: -------------------------------------------------------------------------------- 1 | /* Name: usbdrvasm12.inc 2 | * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers 3 | * Author: Christian Starkjohann 4 | * Creation Date: 2004-12-29 5 | * Tabsize: 4 6 | * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH 7 | * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) 8 | */ 9 | 10 | /* Do not link this file! Link usbdrvasm.S instead, which includes the 11 | * appropriate implementation! 12 | */ 13 | 14 | /* 15 | General Description: 16 | This file is the 12 MHz version of the asssembler part of the USB driver. It 17 | requires a 12 MHz crystal (not a ceramic resonator and not a calibrated RC 18 | oscillator). 19 | 20 | See usbdrv.h for a description of the entire driver. 21 | 22 | Since almost all of this code is timing critical, don't change unless you 23 | really know what you are doing! Many parts require not only a maximum number 24 | of CPU cycles, but even an exact number of cycles! 25 | 26 | 27 | Timing constraints according to spec (in bit times): 28 | timing subject min max CPUcycles 29 | --------------------------------------------------------------------------- 30 | EOP of OUT/SETUP to sync pattern of DATA0 (both rx) 2 16 16-128 31 | EOP of IN to sync pattern of DATA0 (rx, then tx) 2 7.5 16-60 32 | DATAx (rx) to ACK/NAK/STALL (tx) 2 7.5 16-60 33 | */ 34 | 35 | ;Software-receiver engine. Strict timing! Don't change unless you can preserve timing! 36 | ;interrupt response time: 4 cycles + insn running = 7 max if interrupts always enabled 37 | ;max allowable interrupt latency: 34 cycles -> max 25 cycles interrupt disable 38 | ;max stack usage: [ret(2), YL, SREG, YH, shift, x1, x2, x3, cnt, x4] = 11 bytes 39 | ;Numbers in brackets are maximum cycles since SOF. 40 | USB_INTR_VECTOR: 41 | ;order of registers pushed: YL, SREG [sofError], YH, shift, x1, x2, x3, cnt 42 | push YL ;2 [35] push only what is necessary to sync with edge ASAP 43 | in YL, SREG ;1 [37] 44 | push YL ;2 [39] 45 | ;---------------------------------------------------------------------------- 46 | ; Synchronize with sync pattern: 47 | ;---------------------------------------------------------------------------- 48 | ;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K] 49 | ;sync up with J to K edge during sync pattern -- use fastest possible loops 50 | ;The first part waits at most 1 bit long since we must be in sync pattern. 51 | ;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to 52 | ;waitForJ, ensure that this prerequisite is met. 53 | waitForJ: 54 | inc YL 55 | sbis USBIN, USBMINUS 56 | brne waitForJ ; just make sure we have ANY timeout 57 | waitForK: 58 | ;The following code results in a sampling window of 1/4 bit which meets the spec. 59 | sbis USBIN, USBMINUS 60 | rjmp foundK 61 | sbis USBIN, USBMINUS 62 | rjmp foundK 63 | sbis USBIN, USBMINUS 64 | rjmp foundK 65 | sbis USBIN, USBMINUS 66 | rjmp foundK 67 | sbis USBIN, USBMINUS 68 | rjmp foundK 69 | #if USB_COUNT_SOF 70 | lds YL, usbSofCount 71 | inc YL 72 | sts usbSofCount, YL 73 | #endif /* USB_COUNT_SOF */ 74 | #ifdef USB_SOF_HOOK 75 | USB_SOF_HOOK 76 | #endif 77 | rjmp sofError 78 | foundK: 79 | ;{3, 5} after falling D- edge, average delay: 4 cycles [we want 4 for center sampling] 80 | ;we have 1 bit time for setup purposes, then sample again. Numbers in brackets 81 | ;are cycles from center of first sync (double K) bit after the instruction 82 | push YH ;2 [2] 83 | lds YL, usbInputBufOffset;2 [4] 84 | clr YH ;1 [5] 85 | subi YL, lo8(-(usbRxBuf));1 [6] 86 | sbci YH, hi8(-(usbRxBuf));1 [7] 87 | 88 | sbis USBIN, USBMINUS ;1 [8] we want two bits K [sample 1 cycle too early] 89 | rjmp haveTwoBitsK ;2 [10] 90 | pop YH ;2 [11] undo the push from before 91 | rjmp waitForK ;2 [13] this was not the end of sync, retry 92 | haveTwoBitsK: 93 | ;---------------------------------------------------------------------------- 94 | ; push more registers and initialize values while we sample the first bits: 95 | ;---------------------------------------------------------------------------- 96 | push shift ;2 [16] 97 | push x1 ;2 [12] 98 | push x2 ;2 [14] 99 | 100 | in x1, USBIN ;1 [17] <-- sample bit 0 101 | ldi shift, 0xff ;1 [18] 102 | bst x1, USBMINUS ;1 [19] 103 | bld shift, 0 ;1 [20] 104 | push x3 ;2 [22] 105 | push cnt ;2 [24] 106 | 107 | in x2, USBIN ;1 [25] <-- sample bit 1 108 | ser x3 ;1 [26] [inserted init instruction] 109 | eor x1, x2 ;1 [27] 110 | bst x1, USBMINUS ;1 [28] 111 | bld shift, 1 ;1 [29] 112 | ldi cnt, USB_BUFSIZE;1 [30] [inserted init instruction] 113 | rjmp rxbit2 ;2 [32] 114 | 115 | ;---------------------------------------------------------------------------- 116 | ; Receiver loop (numbers in brackets are cycles within byte after instr) 117 | ;---------------------------------------------------------------------------- 118 | 119 | unstuff0: ;1 (branch taken) 120 | andi x3, ~0x01 ;1 [15] 121 | mov x1, x2 ;1 [16] x2 contains last sampled (stuffed) bit 122 | in x2, USBIN ;1 [17] <-- sample bit 1 again 123 | ori shift, 0x01 ;1 [18] 124 | rjmp didUnstuff0 ;2 [20] 125 | 126 | unstuff1: ;1 (branch taken) 127 | mov x2, x1 ;1 [21] x1 contains last sampled (stuffed) bit 128 | andi x3, ~0x02 ;1 [22] 129 | ori shift, 0x02 ;1 [23] 130 | nop ;1 [24] 131 | in x1, USBIN ;1 [25] <-- sample bit 2 again 132 | rjmp didUnstuff1 ;2 [27] 133 | 134 | unstuff2: ;1 (branch taken) 135 | andi x3, ~0x04 ;1 [29] 136 | ori shift, 0x04 ;1 [30] 137 | mov x1, x2 ;1 [31] x2 contains last sampled (stuffed) bit 138 | nop ;1 [32] 139 | in x2, USBIN ;1 [33] <-- sample bit 3 140 | rjmp didUnstuff2 ;2 [35] 141 | 142 | unstuff3: ;1 (branch taken) 143 | in x2, USBIN ;1 [34] <-- sample stuffed bit 3 [one cycle too late] 144 | andi x3, ~0x08 ;1 [35] 145 | ori shift, 0x08 ;1 [36] 146 | rjmp didUnstuff3 ;2 [38] 147 | 148 | unstuff4: ;1 (branch taken) 149 | andi x3, ~0x10 ;1 [40] 150 | in x1, USBIN ;1 [41] <-- sample stuffed bit 4 151 | ori shift, 0x10 ;1 [42] 152 | rjmp didUnstuff4 ;2 [44] 153 | 154 | unstuff5: ;1 (branch taken) 155 | andi x3, ~0x20 ;1 [48] 156 | in x2, USBIN ;1 [49] <-- sample stuffed bit 5 157 | ori shift, 0x20 ;1 [50] 158 | rjmp didUnstuff5 ;2 [52] 159 | 160 | unstuff6: ;1 (branch taken) 161 | andi x3, ~0x40 ;1 [56] 162 | in x1, USBIN ;1 [57] <-- sample stuffed bit 6 163 | ori shift, 0x40 ;1 [58] 164 | rjmp didUnstuff6 ;2 [60] 165 | 166 | ; extra jobs done during bit interval: 167 | ; bit 0: store, clear [SE0 is unreliable here due to bit dribbling in hubs] 168 | ; bit 1: se0 check 169 | ; bit 2: overflow check 170 | ; bit 3: recovery from delay [bit 0 tasks took too long] 171 | ; bit 4: none 172 | ; bit 5: none 173 | ; bit 6: none 174 | ; bit 7: jump, eor 175 | rxLoop: 176 | eor x3, shift ;1 [0] reconstruct: x3 is 0 at bit locations we changed, 1 at others 177 | in x1, USBIN ;1 [1] <-- sample bit 0 178 | st y+, x3 ;2 [3] store data 179 | ser x3 ;1 [4] 180 | nop ;1 [5] 181 | eor x2, x1 ;1 [6] 182 | bst x2, USBMINUS;1 [7] 183 | bld shift, 0 ;1 [8] 184 | in x2, USBIN ;1 [9] <-- sample bit 1 (or possibly bit 0 stuffed) 185 | andi x2, USBMASK ;1 [10] 186 | breq se0 ;1 [11] SE0 check for bit 1 187 | andi shift, 0xf9 ;1 [12] 188 | didUnstuff0: 189 | breq unstuff0 ;1 [13] 190 | eor x1, x2 ;1 [14] 191 | bst x1, USBMINUS;1 [15] 192 | bld shift, 1 ;1 [16] 193 | rxbit2: 194 | in x1, USBIN ;1 [17] <-- sample bit 2 (or possibly bit 1 stuffed) 195 | andi shift, 0xf3 ;1 [18] 196 | breq unstuff1 ;1 [19] do remaining work for bit 1 197 | didUnstuff1: 198 | subi cnt, 1 ;1 [20] 199 | brcs overflow ;1 [21] loop control 200 | eor x2, x1 ;1 [22] 201 | bst x2, USBMINUS;1 [23] 202 | bld shift, 2 ;1 [24] 203 | in x2, USBIN ;1 [25] <-- sample bit 3 (or possibly bit 2 stuffed) 204 | andi shift, 0xe7 ;1 [26] 205 | breq unstuff2 ;1 [27] 206 | didUnstuff2: 207 | eor x1, x2 ;1 [28] 208 | bst x1, USBMINUS;1 [29] 209 | bld shift, 3 ;1 [30] 210 | didUnstuff3: 211 | andi shift, 0xcf ;1 [31] 212 | breq unstuff3 ;1 [32] 213 | in x1, USBIN ;1 [33] <-- sample bit 4 214 | eor x2, x1 ;1 [34] 215 | bst x2, USBMINUS;1 [35] 216 | bld shift, 4 ;1 [36] 217 | didUnstuff4: 218 | andi shift, 0x9f ;1 [37] 219 | breq unstuff4 ;1 [38] 220 | nop2 ;2 [40] 221 | in x2, USBIN ;1 [41] <-- sample bit 5 222 | eor x1, x2 ;1 [42] 223 | bst x1, USBMINUS;1 [43] 224 | bld shift, 5 ;1 [44] 225 | didUnstuff5: 226 | andi shift, 0x3f ;1 [45] 227 | breq unstuff5 ;1 [46] 228 | nop2 ;2 [48] 229 | in x1, USBIN ;1 [49] <-- sample bit 6 230 | eor x2, x1 ;1 [50] 231 | bst x2, USBMINUS;1 [51] 232 | bld shift, 6 ;1 [52] 233 | didUnstuff6: 234 | cpi shift, 0x02 ;1 [53] 235 | brlo unstuff6 ;1 [54] 236 | nop2 ;2 [56] 237 | in x2, USBIN ;1 [57] <-- sample bit 7 238 | eor x1, x2 ;1 [58] 239 | bst x1, USBMINUS;1 [59] 240 | bld shift, 7 ;1 [60] 241 | didUnstuff7: 242 | cpi shift, 0x04 ;1 [61] 243 | brsh rxLoop ;2 [63] loop control 244 | unstuff7: 245 | andi x3, ~0x80 ;1 [63] 246 | ori shift, 0x80 ;1 [64] 247 | in x2, USBIN ;1 [65] <-- sample stuffed bit 7 248 | nop ;1 [66] 249 | rjmp didUnstuff7 ;2 [68] 250 | 251 | macro POP_STANDARD ; 12 cycles 252 | pop cnt 253 | pop x3 254 | pop x2 255 | pop x1 256 | pop shift 257 | pop YH 258 | endm 259 | macro POP_RETI ; 5 cycles 260 | pop YL 261 | out SREG, YL 262 | pop YL 263 | endm 264 | 265 | #include "asmcommon.inc" 266 | 267 | ;---------------------------------------------------------------------------- 268 | ; Transmitting data 269 | ;---------------------------------------------------------------------------- 270 | 271 | txByteLoop: 272 | txBitloop: 273 | stuffN1Delay: ; [03] 274 | ror shift ;[-5] [11] [59] 275 | brcc doExorN1 ;[-4] [60] 276 | subi x4, 1 ;[-3] 277 | brne commonN1 ;[-2] 278 | lsl shift ;[-1] compensate ror after rjmp stuffDelay 279 | nop ;[00] stuffing consists of just waiting 8 cycles 280 | rjmp stuffN1Delay ;[01] after ror, C bit is reliably clear 281 | 282 | sendNakAndReti: ;0 [-19] 19 cycles until SOP 283 | ldi x3, USBPID_NAK ;1 [-18] 284 | rjmp usbSendX3 ;2 [-16] 285 | sendAckAndReti: ;0 [-19] 19 cycles until SOP 286 | ldi x3, USBPID_ACK ;1 [-18] 287 | rjmp usbSendX3 ;2 [-16] 288 | sendCntAndReti: ;0 [-17] 17 cycles until SOP 289 | mov x3, cnt ;1 [-16] 290 | usbSendX3: ;0 [-16] 291 | ldi YL, 20 ;1 [-15] 'x3' is R20 292 | ldi YH, 0 ;1 [-14] 293 | ldi cnt, 2 ;1 [-13] 294 | ; rjmp usbSendAndReti fallthrough 295 | 296 | ; USB spec says: 297 | ; idle = J 298 | ; J = (D+ = 0), (D- = 1) or USBOUT = 0x01 299 | ; K = (D+ = 1), (D- = 0) or USBOUT = 0x02 300 | ; Spec allows 7.5 bit times from EOP to SOP for replies (= 60 cycles) 301 | 302 | ;usbSend: 303 | ;pointer to data in 'Y' 304 | ;number of bytes in 'cnt' -- including sync byte 305 | ;uses: x1...x2, x4, shift, cnt, Y [x1 = mirror USBOUT, x2 = USBMASK, x4 = bitstuff cnt] 306 | ;Numbers in brackets are time since first bit of sync pattern is sent (start of instruction) 307 | usbSendAndReti: 308 | in x2, USBDDR ;[-12] 12 cycles until SOP 309 | ori x2, USBMASK ;[-11] 310 | sbi USBOUT, USBMINUS ;[-10] prepare idle state; D+ and D- must have been 0 (no pullups) 311 | out USBDDR, x2 ;[-8] <--- acquire bus 312 | in x1, USBOUT ;[-7] port mirror for tx loop 313 | ldi shift, 0x40 ;[-6] sync byte is first byte sent (we enter loop after ror) 314 | ldi x2, USBMASK ;[-5] 315 | push x4 ;[-4] 316 | doExorN1: 317 | eor x1, x2 ;[-2] [06] [62] 318 | ldi x4, 6 ;[-1] [07] [63] 319 | commonN1: 320 | stuffN2Delay: 321 | out USBOUT, x1 ;[00] [08] [64] <--- set bit 322 | ror shift ;[01] 323 | brcc doExorN2 ;[02] 324 | subi x4, 1 ;[03] 325 | brne commonN2 ;[04] 326 | lsl shift ;[05] compensate ror after rjmp stuffDelay 327 | rjmp stuffN2Delay ;[06] after ror, C bit is reliably clear 328 | doExorN2: 329 | eor x1, x2 ;[04] [12] 330 | ldi x4, 6 ;[05] [13] 331 | commonN2: 332 | nop ;[06] [14] 333 | subi cnt, 171 ;[07] [15] trick: (3 * 171) & 0xff = 1 334 | out USBOUT, x1 ;[08] [16] <--- set bit 335 | brcs txBitloop ;[09] [25] [41] 336 | 337 | stuff6Delay: 338 | ror shift ;[42] [50] 339 | brcc doExor6 ;[43] 340 | subi x4, 1 ;[44] 341 | brne common6 ;[45] 342 | lsl shift ;[46] compensate ror after rjmp stuffDelay 343 | nop ;[47] stuffing consists of just waiting 8 cycles 344 | rjmp stuff6Delay ;[48] after ror, C bit is reliably clear 345 | doExor6: 346 | eor x1, x2 ;[45] [53] 347 | ldi x4, 6 ;[46] 348 | common6: 349 | stuff7Delay: 350 | ror shift ;[47] [55] 351 | out USBOUT, x1 ;[48] <--- set bit 352 | brcc doExor7 ;[49] 353 | subi x4, 1 ;[50] 354 | brne common7 ;[51] 355 | lsl shift ;[52] compensate ror after rjmp stuffDelay 356 | rjmp stuff7Delay ;[53] after ror, C bit is reliably clear 357 | doExor7: 358 | eor x1, x2 ;[51] [59] 359 | ldi x4, 6 ;[52] 360 | common7: 361 | ld shift, y+ ;[53] 362 | tst cnt ;[55] 363 | out USBOUT, x1 ;[56] <--- set bit 364 | brne txByteLoop ;[57] 365 | 366 | ;make SE0: 367 | cbr x1, USBMASK ;[58] prepare SE0 [spec says EOP may be 15 to 18 cycles] 368 | lds x2, usbNewDeviceAddr;[59] 369 | lsl x2 ;[61] we compare with left shifted address 370 | subi YL, 2 + 20 ;[62] Only assign address on data packets, not ACK/NAK in x3 371 | sbci YH, 0 ;[63] 372 | out USBOUT, x1 ;[00] <-- out SE0 -- from now 2 bits = 16 cycles until bus idle 373 | ;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm: 374 | ;set address only after data packet was sent, not after handshake 375 | breq skipAddrAssign ;[01] 376 | sts usbDeviceAddr, x2 ; if not skipped: SE0 is one cycle longer 377 | skipAddrAssign: 378 | ;end of usbDeviceAddress transfer 379 | ldi x2, 1< max 52 cycles interrupt disable 31 | ;max stack usage: [ret(2), r0, SREG, YL, YH, shift, x1, x2, x3, x4, cnt] = 12 bytes 32 | ;nominal frequency: 16.5 MHz -> 11 cycles per bit 33 | ; 16.3125 MHz < F_CPU < 16.6875 MHz (+/- 1.1%) 34 | ; Numbers in brackets are clocks counted from center of last sync bit 35 | ; when instruction starts 36 | 37 | 38 | USB_INTR_VECTOR: 39 | ;order of registers pushed: YL, SREG [sofError], r0, YH, shift, x1, x2, x3, x4, cnt 40 | push YL ;[-23] push only what is necessary to sync with edge ASAP 41 | in YL, SREG ;[-21] 42 | push YL ;[-20] 43 | ;---------------------------------------------------------------------------- 44 | ; Synchronize with sync pattern: 45 | ;---------------------------------------------------------------------------- 46 | ;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K] 47 | ;sync up with J to K edge during sync pattern -- use fastest possible loops 48 | ;The first part waits at most 1 bit long since we must be in sync pattern. 49 | ;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to 50 | ;waitForJ, ensure that this prerequisite is met. 51 | waitForJ: 52 | inc YL 53 | sbis USBIN, USBMINUS 54 | brne waitForJ ; just make sure we have ANY timeout 55 | waitForK: 56 | ;The following code results in a sampling window of < 1/4 bit which meets the spec. 57 | sbis USBIN, USBMINUS ;[-15] 58 | rjmp foundK ;[-14] 59 | sbis USBIN, USBMINUS 60 | rjmp foundK 61 | sbis USBIN, USBMINUS 62 | rjmp foundK 63 | sbis USBIN, USBMINUS 64 | rjmp foundK 65 | sbis USBIN, USBMINUS 66 | rjmp foundK 67 | sbis USBIN, USBMINUS 68 | rjmp foundK 69 | #if USB_COUNT_SOF 70 | lds YL, usbSofCount 71 | inc YL 72 | sts usbSofCount, YL 73 | #endif /* USB_COUNT_SOF */ 74 | #ifdef USB_SOF_HOOK 75 | USB_SOF_HOOK 76 | #endif 77 | rjmp sofError 78 | foundK: ;[-12] 79 | ;{3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for center sampling] 80 | ;we have 1 bit time for setup purposes, then sample again. Numbers in brackets 81 | ;are cycles from center of first sync (double K) bit after the instruction 82 | push r0 ;[-12] 83 | ; [---] ;[-11] 84 | push YH ;[-10] 85 | ; [---] ;[-9] 86 | lds YL, usbInputBufOffset;[-8] 87 | ; [---] ;[-7] 88 | clr YH ;[-6] 89 | subi YL, lo8(-(usbRxBuf));[-5] [rx loop init] 90 | sbci YH, hi8(-(usbRxBuf));[-4] [rx loop init] 91 | mov r0, x2 ;[-3] [rx loop init] 92 | sbis USBIN, USBMINUS ;[-2] we want two bits K (sample 2 cycles too early) 93 | rjmp haveTwoBitsK ;[-1] 94 | pop YH ;[0] undo the pushes from before 95 | pop r0 ;[2] 96 | rjmp waitForK ;[4] this was not the end of sync, retry 97 | ; The entire loop from waitForK until rjmp waitForK above must not exceed two 98 | ; bit times (= 22 cycles). 99 | 100 | ;---------------------------------------------------------------------------- 101 | ; push more registers and initialize values while we sample the first bits: 102 | ;---------------------------------------------------------------------------- 103 | haveTwoBitsK: ;[1] 104 | push shift ;[1] 105 | push x1 ;[3] 106 | push x2 ;[5] 107 | push x3 ;[7] 108 | ldi shift, 0xff ;[9] [rx loop init] 109 | ori x3, 0xff ;[10] [rx loop init] == ser x3, clear zero flag 110 | 111 | in x1, USBIN ;[11] <-- sample bit 0 112 | bst x1, USBMINUS ;[12] 113 | bld shift, 0 ;[13] 114 | push x4 ;[14] == phase 115 | ; [---] ;[15] 116 | push cnt ;[16] 117 | ; [---] ;[17] 118 | ldi phase, 0 ;[18] [rx loop init] 119 | ldi cnt, USB_BUFSIZE;[19] [rx loop init] 120 | rjmp rxbit1 ;[20] 121 | ; [---] ;[21] 122 | 123 | ;---------------------------------------------------------------------------- 124 | ; Receiver loop (numbers in brackets are cycles within byte after instr) 125 | ;---------------------------------------------------------------------------- 126 | /* 127 | byte oriented operations done during loop: 128 | bit 0: store data 129 | bit 1: SE0 check 130 | bit 2: overflow check 131 | bit 3: catch up 132 | bit 4: rjmp to achieve conditional jump range 133 | bit 5: PLL 134 | bit 6: catch up 135 | bit 7: jump, fixup bitstuff 136 | ; 87 [+ 2] cycles 137 | ------------------------------------------------------------------ 138 | */ 139 | continueWithBit5: 140 | in x2, USBIN ;[055] <-- bit 5 141 | eor r0, x2 ;[056] 142 | or phase, r0 ;[057] 143 | sbrc phase, USBMINUS ;[058] 144 | lpm ;[059] optional nop3; modifies r0 145 | in phase, USBIN ;[060] <-- phase 146 | eor x1, x2 ;[061] 147 | bst x1, USBMINUS ;[062] 148 | bld shift, 5 ;[063] 149 | andi shift, 0x3f ;[064] 150 | in x1, USBIN ;[065] <-- bit 6 151 | breq unstuff5 ;[066] *** unstuff escape 152 | eor phase, x1 ;[067] 153 | eor x2, x1 ;[068] 154 | bst x2, USBMINUS ;[069] 155 | bld shift, 6 ;[070] 156 | didUnstuff6: ;[ ] 157 | in r0, USBIN ;[071] <-- phase 158 | cpi shift, 0x02 ;[072] 159 | brlo unstuff6 ;[073] *** unstuff escape 160 | didUnstuff5: ;[ ] 161 | nop2 ;[074] 162 | ; [---] ;[075] 163 | in x2, USBIN ;[076] <-- bit 7 164 | eor x1, x2 ;[077] 165 | bst x1, USBMINUS ;[078] 166 | bld shift, 7 ;[079] 167 | didUnstuff7: ;[ ] 168 | eor r0, x2 ;[080] 169 | or phase, r0 ;[081] 170 | in r0, USBIN ;[082] <-- phase 171 | cpi shift, 0x04 ;[083] 172 | brsh rxLoop ;[084] 173 | ; [---] ;[085] 174 | unstuff7: ;[ ] 175 | andi x3, ~0x80 ;[085] 176 | ori shift, 0x80 ;[086] 177 | in x2, USBIN ;[087] <-- sample stuffed bit 7 178 | nop ;[088] 179 | rjmp didUnstuff7 ;[089] 180 | ; [---] ;[090] 181 | ;[080] 182 | 183 | unstuff5: ;[067] 184 | eor phase, x1 ;[068] 185 | andi x3, ~0x20 ;[069] 186 | ori shift, 0x20 ;[070] 187 | in r0, USBIN ;[071] <-- phase 188 | mov x2, x1 ;[072] 189 | nop ;[073] 190 | nop2 ;[074] 191 | ; [---] ;[075] 192 | in x1, USBIN ;[076] <-- bit 6 193 | eor r0, x1 ;[077] 194 | or phase, r0 ;[078] 195 | eor x2, x1 ;[079] 196 | bst x2, USBMINUS ;[080] 197 | bld shift, 6 ;[081] no need to check bitstuffing, we just had one 198 | in r0, USBIN ;[082] <-- phase 199 | rjmp didUnstuff5 ;[083] 200 | ; [---] ;[084] 201 | ;[074] 202 | 203 | unstuff6: ;[074] 204 | andi x3, ~0x40 ;[075] 205 | in x1, USBIN ;[076] <-- bit 6 again 206 | ori shift, 0x40 ;[077] 207 | nop2 ;[078] 208 | ; [---] ;[079] 209 | rjmp didUnstuff6 ;[080] 210 | ; [---] ;[081] 211 | ;[071] 212 | 213 | unstuff0: ;[013] 214 | eor r0, x2 ;[014] 215 | or phase, r0 ;[015] 216 | andi x2, USBMASK ;[016] check for SE0 217 | in r0, USBIN ;[017] <-- phase 218 | breq didUnstuff0 ;[018] direct jump to se0 would be too long 219 | andi x3, ~0x01 ;[019] 220 | ori shift, 0x01 ;[020] 221 | mov x1, x2 ;[021] mov existing sample 222 | in x2, USBIN ;[022] <-- bit 1 again 223 | rjmp didUnstuff0 ;[023] 224 | ; [---] ;[024] 225 | ;[014] 226 | 227 | unstuff1: ;[024] 228 | eor r0, x1 ;[025] 229 | or phase, r0 ;[026] 230 | andi x3, ~0x02 ;[027] 231 | in r0, USBIN ;[028] <-- phase 232 | ori shift, 0x02 ;[029] 233 | mov x2, x1 ;[030] 234 | rjmp didUnstuff1 ;[031] 235 | ; [---] ;[032] 236 | ;[022] 237 | 238 | unstuff2: ;[035] 239 | eor r0, x2 ;[036] 240 | or phase, r0 ;[037] 241 | andi x3, ~0x04 ;[038] 242 | in r0, USBIN ;[039] <-- phase 243 | ori shift, 0x04 ;[040] 244 | mov x1, x2 ;[041] 245 | rjmp didUnstuff2 ;[042] 246 | ; [---] ;[043] 247 | ;[033] 248 | 249 | unstuff3: ;[043] 250 | in x2, USBIN ;[044] <-- bit 3 again 251 | eor r0, x2 ;[045] 252 | or phase, r0 ;[046] 253 | andi x3, ~0x08 ;[047] 254 | ori shift, 0x08 ;[048] 255 | nop ;[049] 256 | in r0, USBIN ;[050] <-- phase 257 | rjmp didUnstuff3 ;[051] 258 | ; [---] ;[052] 259 | ;[042] 260 | 261 | unstuff4: ;[053] 262 | andi x3, ~0x10 ;[054] 263 | in x1, USBIN ;[055] <-- bit 4 again 264 | ori shift, 0x10 ;[056] 265 | rjmp didUnstuff4 ;[057] 266 | ; [---] ;[058] 267 | ;[048] 268 | 269 | rxLoop: ;[085] 270 | eor x3, shift ;[086] reconstruct: x3 is 0 at bit locations we changed, 1 at others 271 | in x1, USBIN ;[000] <-- bit 0 272 | st y+, x3 ;[001] 273 | ; [---] ;[002] 274 | eor r0, x1 ;[003] 275 | or phase, r0 ;[004] 276 | eor x2, x1 ;[005] 277 | in r0, USBIN ;[006] <-- phase 278 | ser x3 ;[007] 279 | bst x2, USBMINUS ;[008] 280 | bld shift, 0 ;[009] 281 | andi shift, 0xf9 ;[010] 282 | rxbit1: ;[ ] 283 | in x2, USBIN ;[011] <-- bit 1 284 | breq unstuff0 ;[012] *** unstuff escape 285 | andi x2, USBMASK ;[013] SE0 check for bit 1 286 | didUnstuff0: ;[ ] Z only set if we detected SE0 in bitstuff 287 | breq se0 ;[014] 288 | eor r0, x2 ;[015] 289 | or phase, r0 ;[016] 290 | in r0, USBIN ;[017] <-- phase 291 | eor x1, x2 ;[018] 292 | bst x1, USBMINUS ;[019] 293 | bld shift, 1 ;[020] 294 | andi shift, 0xf3 ;[021] 295 | didUnstuff1: ;[ ] 296 | in x1, USBIN ;[022] <-- bit 2 297 | breq unstuff1 ;[023] *** unstuff escape 298 | eor r0, x1 ;[024] 299 | or phase, r0 ;[025] 300 | subi cnt, 1 ;[026] overflow check 301 | brcs overflow ;[027] 302 | in r0, USBIN ;[028] <-- phase 303 | eor x2, x1 ;[029] 304 | bst x2, USBMINUS ;[030] 305 | bld shift, 2 ;[031] 306 | andi shift, 0xe7 ;[032] 307 | didUnstuff2: ;[ ] 308 | in x2, USBIN ;[033] <-- bit 3 309 | breq unstuff2 ;[034] *** unstuff escape 310 | eor r0, x2 ;[035] 311 | or phase, r0 ;[036] 312 | eor x1, x2 ;[037] 313 | bst x1, USBMINUS ;[038] 314 | in r0, USBIN ;[039] <-- phase 315 | bld shift, 3 ;[040] 316 | andi shift, 0xcf ;[041] 317 | didUnstuff3: ;[ ] 318 | breq unstuff3 ;[042] *** unstuff escape 319 | nop ;[043] 320 | in x1, USBIN ;[044] <-- bit 4 321 | eor x2, x1 ;[045] 322 | bst x2, USBMINUS ;[046] 323 | bld shift, 4 ;[047] 324 | didUnstuff4: ;[ ] 325 | eor r0, x1 ;[048] 326 | or phase, r0 ;[049] 327 | in r0, USBIN ;[050] <-- phase 328 | andi shift, 0x9f ;[051] 329 | breq unstuff4 ;[052] *** unstuff escape 330 | rjmp continueWithBit5;[053] 331 | ; [---] ;[054] 332 | 333 | macro POP_STANDARD ; 16 cycles 334 | pop cnt 335 | pop x4 336 | pop x3 337 | pop x2 338 | pop x1 339 | pop shift 340 | pop YH 341 | pop r0 342 | endm 343 | macro POP_RETI ; 5 cycles 344 | pop YL 345 | out SREG, YL 346 | pop YL 347 | endm 348 | 349 | #include "asmcommon.inc" 350 | 351 | 352 | ; USB spec says: 353 | ; idle = J 354 | ; J = (D+ = 0), (D- = 1) 355 | ; K = (D+ = 1), (D- = 0) 356 | ; Spec allows 7.5 bit times from EOP to SOP for replies 357 | 358 | bitstuff7: 359 | eor x1, x4 ;[4] 360 | ldi x2, 0 ;[5] 361 | nop2 ;[6] C is zero (brcc) 362 | rjmp didStuff7 ;[8] 363 | 364 | bitstuffN: 365 | eor x1, x4 ;[5] 366 | ldi x2, 0 ;[6] 367 | lpm ;[7] 3 cycle NOP, modifies r0 368 | out USBOUT, x1 ;[10] <-- out 369 | rjmp didStuffN ;[0] 370 | 371 | #define bitStatus x3 372 | 373 | sendNakAndReti: 374 | ldi cnt, USBPID_NAK ;[-19] 375 | rjmp sendCntAndReti ;[-18] 376 | sendAckAndReti: 377 | ldi cnt, USBPID_ACK ;[-17] 378 | sendCntAndReti: 379 | mov r0, cnt ;[-16] 380 | ldi YL, 0 ;[-15] R0 address is 0 381 | ldi YH, 0 ;[-14] 382 | ldi cnt, 2 ;[-13] 383 | ; rjmp usbSendAndReti fallthrough 384 | 385 | ;usbSend: 386 | ;pointer to data in 'Y' 387 | ;number of bytes in 'cnt' -- including sync byte [range 2 ... 12] 388 | ;uses: x1...x4, shift, cnt, Y 389 | ;Numbers in brackets are time since first bit of sync pattern is sent 390 | usbSendAndReti: ; 12 cycles until SOP 391 | in x2, USBDDR ;[-12] 392 | ori x2, USBMASK ;[-11] 393 | sbi USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups) 394 | in x1, USBOUT ;[-8] port mirror for tx loop 395 | out USBDDR, x2 ;[-7] <- acquire bus 396 | ; need not init x2 (bitstuff history) because sync starts with 0 397 | ldi x4, USBMASK ;[-6] exor mask 398 | ldi shift, 0x80 ;[-5] sync byte is first byte sent 399 | ldi bitStatus, 0xff ;[-4] init bit loop counter, works for up to 12 bytes 400 | byteloop: 401 | bitloop: 402 | sbrs shift, 0 ;[8] [-3] 403 | eor x1, x4 ;[9] [-2] 404 | out USBOUT, x1 ;[10] [-1] <-- out 405 | ror shift ;[0] 406 | ror x2 ;[1] 407 | didStuffN: 408 | cpi x2, 0xfc ;[2] 409 | brcc bitstuffN ;[3] 410 | nop ;[4] 411 | subi bitStatus, 37 ;[5] 256 / 7 ~=~ 37 412 | brcc bitloop ;[6] when we leave the loop, bitStatus has almost the initial value 413 | sbrs shift, 0 ;[7] 414 | eor x1, x4 ;[8] 415 | ror shift ;[9] 416 | didStuff7: 417 | out USBOUT, x1 ;[10] <-- out 418 | ror x2 ;[0] 419 | cpi x2, 0xfc ;[1] 420 | brcc bitstuff7 ;[2] 421 | ld shift, y+ ;[3] 422 | dec cnt ;[5] 423 | brne byteloop ;[6] 424 | ;make SE0: 425 | cbr x1, USBMASK ;[7] prepare SE0 [spec says EOP may be 21 to 25 cycles] 426 | lds x2, usbNewDeviceAddr;[8] 427 | lsl x2 ;[10] we compare with left shifted address 428 | out USBOUT, x1 ;[11] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle 429 | ;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm: 430 | ;set address only after data packet was sent, not after handshake 431 | subi YL, 2 ;[0] Only assign address on data packets, not ACK/NAK in r0 432 | sbci YH, 0 ;[1] 433 | breq skipAddrAssign ;[2] 434 | sts usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer 435 | skipAddrAssign: 436 | ;end of usbDeviceAddress transfer 437 | ldi x2, 1< 10.0 cycles per bit, 80.0 cycles per byte 29 | ; Numbers in brackets are clocks counted from center of last sync bit 30 | ; when instruction starts 31 | 32 | ;---------------------------------------------------------------------------- 33 | ; order of registers pushed: 34 | ; YL, SREG [sofError] YH, shift, x1, x2, x3, bitcnt, cnt, x4 35 | ;---------------------------------------------------------------------------- 36 | USB_INTR_VECTOR: 37 | push YL ;2 push only what is necessary to sync with edge ASAP 38 | in YL, SREG ;1 39 | push YL ;2 40 | ;---------------------------------------------------------------------------- 41 | ; Synchronize with sync pattern: 42 | ; 43 | ; sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K] 44 | ; sync up with J to K edge during sync pattern -- use fastest possible loops 45 | ;The first part waits at most 1 bit long since we must be in sync pattern. 46 | ;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to 47 | ;waitForJ, ensure that this prerequisite is met. 48 | waitForJ: 49 | inc YL 50 | sbis USBIN, USBMINUS 51 | brne waitForJ ; just make sure we have ANY timeout 52 | ;------------------------------------------------------------------------------- 53 | ; The following code results in a sampling window of < 1/4 bit 54 | ; which meets the spec. 55 | ;------------------------------------------------------------------------------- 56 | waitForK: ;- 57 | sbis USBIN, USBMINUS ;1 [00] <-- sample 58 | rjmp foundK ;2 [01] 59 | sbis USBIN, USBMINUS ; <-- sample 60 | rjmp foundK 61 | sbis USBIN, USBMINUS ; <-- sample 62 | rjmp foundK 63 | sbis USBIN, USBMINUS ; <-- sample 64 | rjmp foundK 65 | sbis USBIN, USBMINUS ; <-- sample 66 | rjmp foundK 67 | sbis USBIN, USBMINUS ; <-- sample 68 | rjmp foundK 69 | #if USB_COUNT_SOF 70 | lds YL, usbSofCount 71 | inc YL 72 | sts usbSofCount, YL 73 | #endif /* USB_COUNT_SOF */ 74 | #ifdef USB_SOF_HOOK 75 | USB_SOF_HOOK 76 | #endif 77 | rjmp sofError 78 | ;------------------------------------------------------------------------------ 79 | ; {3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for 80 | ; center sampling] 81 | ; we have 1 bit time for setup purposes, then sample again. 82 | ; Numbers in brackets are cycles from center of first sync (double K) 83 | ; bit after the instruction 84 | ;------------------------------------------------------------------------------ 85 | foundK: ;- [02] 86 | lds YL, usbInputBufOffset;2 [03+04] tx loop 87 | push YH ;2 [05+06] 88 | clr YH ;1 [07] 89 | subi YL, lo8(-(usbRxBuf)) ;1 [08] [rx loop init] 90 | sbci YH, hi8(-(usbRxBuf)) ;1 [09] [rx loop init] 91 | push shift ;2 [10+11] 92 | ser shift ;1 [12] 93 | sbis USBIN, USBMINUS ;1 [-1] [13] <--sample:we want two bits K (sample 1 cycle too early) 94 | rjmp haveTwoBitsK ;2 [00] [14] 95 | pop shift ;2 [15+16] undo the push from before 96 | pop YH ;2 [17+18] undo the push from before 97 | rjmp waitForK ;2 [19+20] this was not the end of sync, retry 98 | ; The entire loop from waitForK until rjmp waitForK above must not exceed two 99 | ; bit times (= 20 cycles). 100 | 101 | ;---------------------------------------------------------------------------- 102 | ; push more registers and initialize values while we sample the first bits: 103 | ;---------------------------------------------------------------------------- 104 | haveTwoBitsK: ;- [01] 105 | push x1 ;2 [02+03] 106 | push x2 ;2 [04+05] 107 | push x3 ;2 [06+07] 108 | push bitcnt ;2 [08+09] 109 | in x1, USBIN ;1 [00] [10] <-- sample bit 0 110 | bst x1, USBMINUS ;1 [01] 111 | bld shift, 0 ;1 [02] 112 | push cnt ;2 [03+04] 113 | ldi cnt, USB_BUFSIZE ;1 [05] 114 | push x4 ;2 [06+07] tx loop 115 | rjmp rxLoop ;2 [08] 116 | ;---------------------------------------------------------------------------- 117 | ; Receiver loop (numbers in brackets are cycles within byte after instr) 118 | ;---------------------------------------------------------------------------- 119 | unstuff0: ;- [07] (branch taken) 120 | andi x3, ~0x01 ;1 [08] 121 | mov x1, x2 ;1 [09] x2 contains last sampled (stuffed) bit 122 | in x2, USBIN ;1 [00] [10] <-- sample bit 1 again 123 | andi x2, USBMASK ;1 [01] 124 | breq se0Hop ;1 [02] SE0 check for bit 1 125 | ori shift, 0x01 ;1 [03] 0b00000001 126 | nop ;1 [04] 127 | rjmp didUnstuff0 ;2 [05] 128 | ;----------------------------------------------------- 129 | unstuff1: ;- [05] (branch taken) 130 | mov x2, x1 ;1 [06] x1 contains last sampled (stuffed) bit 131 | andi x3, ~0x02 ;1 [07] 132 | ori shift, 0x02 ;1 [08] 0b00000010 133 | nop ;1 [09] 134 | in x1, USBIN ;1 [00] [10] <-- sample bit 2 again 135 | andi x1, USBMASK ;1 [01] 136 | breq se0Hop ;1 [02] SE0 check for bit 2 137 | rjmp didUnstuff1 ;2 [03] 138 | ;----------------------------------------------------- 139 | unstuff2: ;- [05] (branch taken) 140 | andi x3, ~0x04 ;1 [06] 141 | ori shift, 0x04 ;1 [07] 0b00000100 142 | mov x1, x2 ;1 [08] x2 contains last sampled (stuffed) bit 143 | nop ;1 [09] 144 | in x2, USBIN ;1 [00] [10] <-- sample bit 3 145 | andi x2, USBMASK ;1 [01] 146 | breq se0Hop ;1 [02] SE0 check for bit 3 147 | rjmp didUnstuff2 ;2 [03] 148 | ;----------------------------------------------------- 149 | unstuff3: ;- [00] [10] (branch taken) 150 | in x2, USBIN ;1 [01] [11] <-- sample stuffed bit 3 one cycle too late 151 | andi x2, USBMASK ;1 [02] 152 | breq se0Hop ;1 [03] SE0 check for stuffed bit 3 153 | andi x3, ~0x08 ;1 [04] 154 | ori shift, 0x08 ;1 [05] 0b00001000 155 | rjmp didUnstuff3 ;2 [06] 156 | ;---------------------------------------------------------------------------- 157 | ; extra jobs done during bit interval: 158 | ; 159 | ; bit 0: store, clear [SE0 is unreliable here due to bit dribbling in hubs], 160 | ; overflow check, jump to the head of rxLoop 161 | ; bit 1: SE0 check 162 | ; bit 2: SE0 check, recovery from delay [bit 0 tasks took too long] 163 | ; bit 3: SE0 check, recovery from delay [bit 0 tasks took too long] 164 | ; bit 4: SE0 check, none 165 | ; bit 5: SE0 check, none 166 | ; bit 6: SE0 check, none 167 | ; bit 7: SE0 check, reconstruct: x3 is 0 at bit locations we changed, 1 at others 168 | ;---------------------------------------------------------------------------- 169 | rxLoop: ;- [09] 170 | in x2, USBIN ;1 [00] [10] <-- sample bit 1 (or possibly bit 0 stuffed) 171 | andi x2, USBMASK ;1 [01] 172 | brne SkipSe0Hop ;1 [02] 173 | se0Hop: ;- [02] 174 | rjmp se0 ;2 [03] SE0 check for bit 1 175 | SkipSe0Hop: ;- [03] 176 | ser x3 ;1 [04] 177 | andi shift, 0xf9 ;1 [05] 0b11111001 178 | breq unstuff0 ;1 [06] 179 | didUnstuff0: ;- [06] 180 | eor x1, x2 ;1 [07] 181 | bst x1, USBMINUS ;1 [08] 182 | bld shift, 1 ;1 [09] 183 | in x1, USBIN ;1 [00] [10] <-- sample bit 2 (or possibly bit 1 stuffed) 184 | andi x1, USBMASK ;1 [01] 185 | breq se0Hop ;1 [02] SE0 check for bit 2 186 | andi shift, 0xf3 ;1 [03] 0b11110011 187 | breq unstuff1 ;1 [04] do remaining work for bit 1 188 | didUnstuff1: ;- [04] 189 | eor x2, x1 ;1 [05] 190 | bst x2, USBMINUS ;1 [06] 191 | bld shift, 2 ;1 [07] 192 | nop2 ;2 [08+09] 193 | in x2, USBIN ;1 [00] [10] <-- sample bit 3 (or possibly bit 2 stuffed) 194 | andi x2, USBMASK ;1 [01] 195 | breq se0Hop ;1 [02] SE0 check for bit 3 196 | andi shift, 0xe7 ;1 [03] 0b11100111 197 | breq unstuff2 ;1 [04] 198 | didUnstuff2: ;- [04] 199 | eor x1, x2 ;1 [05] 200 | bst x1, USBMINUS ;1 [06] 201 | bld shift, 3 ;1 [07] 202 | didUnstuff3: ;- [07] 203 | andi shift, 0xcf ;1 [08] 0b11001111 204 | breq unstuff3 ;1 [09] 205 | in x1, USBIN ;1 [00] [10] <-- sample bit 4 206 | andi x1, USBMASK ;1 [01] 207 | breq se0Hop ;1 [02] SE0 check for bit 4 208 | eor x2, x1 ;1 [03] 209 | bst x2, USBMINUS ;1 [04] 210 | bld shift, 4 ;1 [05] 211 | didUnstuff4: ;- [05] 212 | andi shift, 0x9f ;1 [06] 0b10011111 213 | breq unstuff4 ;1 [07] 214 | nop2 ;2 [08+09] 215 | in x2, USBIN ;1 [00] [10] <-- sample bit 5 216 | andi x2, USBMASK ;1 [01] 217 | breq se0 ;1 [02] SE0 check for bit 5 218 | eor x1, x2 ;1 [03] 219 | bst x1, USBMINUS ;1 [04] 220 | bld shift, 5 ;1 [05] 221 | didUnstuff5: ;- [05] 222 | andi shift, 0x3f ;1 [06] 0b00111111 223 | breq unstuff5 ;1 [07] 224 | nop2 ;2 [08+09] 225 | in x1, USBIN ;1 [00] [10] <-- sample bit 6 226 | andi x1, USBMASK ;1 [01] 227 | breq se0 ;1 [02] SE0 check for bit 6 228 | eor x2, x1 ;1 [03] 229 | bst x2, USBMINUS ;1 [04] 230 | bld shift, 6 ;1 [05] 231 | didUnstuff6: ;- [05] 232 | cpi shift, 0x02 ;1 [06] 0b00000010 233 | brlo unstuff6 ;1 [07] 234 | nop2 ;2 [08+09] 235 | in x2, USBIN ;1 [00] [10] <-- sample bit 7 236 | andi x2, USBMASK ;1 [01] 237 | breq se0 ;1 [02] SE0 check for bit 7 238 | eor x1, x2 ;1 [03] 239 | bst x1, USBMINUS ;1 [04] 240 | bld shift, 7 ;1 [05] 241 | didUnstuff7: ;- [05] 242 | cpi shift, 0x04 ;1 [06] 0b00000100 243 | brlo unstuff7 ;1 [07] 244 | eor x3, shift ;1 [08] reconstruct: x3 is 0 at bit locations we changed, 1 at others 245 | nop ;1 [09] 246 | in x1, USBIN ;1 [00] [10] <-- sample bit 0 247 | st y+, x3 ;2 [01+02] store data 248 | eor x2, x1 ;1 [03] 249 | bst x2, USBMINUS ;1 [04] 250 | bld shift, 0 ;1 [05] 251 | subi cnt, 1 ;1 [06] 252 | brcs overflow ;1 [07] 253 | rjmp rxLoop ;2 [08] 254 | ;----------------------------------------------------- 255 | unstuff4: ;- [08] 256 | andi x3, ~0x10 ;1 [09] 257 | in x1, USBIN ;1 [00] [10] <-- sample stuffed bit 4 258 | andi x1, USBMASK ;1 [01] 259 | breq se0 ;1 [02] SE0 check for stuffed bit 4 260 | ori shift, 0x10 ;1 [03] 261 | rjmp didUnstuff4 ;2 [04] 262 | ;----------------------------------------------------- 263 | unstuff5: ;- [08] 264 | ori shift, 0x20 ;1 [09] 265 | in x2, USBIN ;1 [00] [10] <-- sample stuffed bit 5 266 | andi x2, USBMASK ;1 [01] 267 | breq se0 ;1 [02] SE0 check for stuffed bit 5 268 | andi x3, ~0x20 ;1 [03] 269 | rjmp didUnstuff5 ;2 [04] 270 | ;----------------------------------------------------- 271 | unstuff6: ;- [08] 272 | andi x3, ~0x40 ;1 [09] 273 | in x1, USBIN ;1 [00] [10] <-- sample stuffed bit 6 274 | andi x1, USBMASK ;1 [01] 275 | breq se0 ;1 [02] SE0 check for stuffed bit 6 276 | ori shift, 0x40 ;1 [03] 277 | rjmp didUnstuff6 ;2 [04] 278 | ;----------------------------------------------------- 279 | unstuff7: ;- [08] 280 | andi x3, ~0x80 ;1 [09] 281 | in x2, USBIN ;1 [00] [10] <-- sample stuffed bit 7 282 | andi x2, USBMASK ;1 [01] 283 | breq se0 ;1 [02] SE0 check for stuffed bit 7 284 | ori shift, 0x80 ;1 [03] 285 | rjmp didUnstuff7 ;2 [04] 286 | 287 | macro POP_STANDARD ; 16 cycles 288 | pop x4 289 | pop cnt 290 | pop bitcnt 291 | pop x3 292 | pop x2 293 | pop x1 294 | pop shift 295 | pop YH 296 | endm 297 | macro POP_RETI ; 5 cycles 298 | pop YL 299 | out SREG, YL 300 | pop YL 301 | endm 302 | 303 | #include "asmcommon.inc" 304 | 305 | ;--------------------------------------------------------------------------- 306 | ; USB spec says: 307 | ; idle = J 308 | ; J = (D+ = 0), (D- = 1) 309 | ; K = (D+ = 1), (D- = 0) 310 | ; Spec allows 7.5 bit times from EOP to SOP for replies 311 | ;--------------------------------------------------------------------------- 312 | bitstuffN: ;- [04] 313 | eor x1, x4 ;1 [05] 314 | clr x2 ;1 [06] 315 | nop ;1 [07] 316 | rjmp didStuffN ;1 [08] 317 | ;--------------------------------------------------------------------------- 318 | bitstuff6: ;- [04] 319 | eor x1, x4 ;1 [05] 320 | clr x2 ;1 [06] 321 | rjmp didStuff6 ;1 [07] 322 | ;--------------------------------------------------------------------------- 323 | bitstuff7: ;- [02] 324 | eor x1, x4 ;1 [03] 325 | clr x2 ;1 [06] 326 | nop ;1 [05] 327 | rjmp didStuff7 ;1 [06] 328 | ;--------------------------------------------------------------------------- 329 | sendNakAndReti: ;- [-19] 330 | ldi x3, USBPID_NAK ;1 [-18] 331 | rjmp sendX3AndReti ;1 [-17] 332 | ;--------------------------------------------------------------------------- 333 | sendAckAndReti: ;- [-17] 334 | ldi cnt, USBPID_ACK ;1 [-16] 335 | sendCntAndReti: ;- [-16] 336 | mov x3, cnt ;1 [-15] 337 | sendX3AndReti: ;- [-15] 338 | ldi YL, 20 ;1 [-14] x3==r20 address is 20 339 | ldi YH, 0 ;1 [-13] 340 | ldi cnt, 2 ;1 [-12] 341 | ; rjmp usbSendAndReti fallthrough 342 | ;--------------------------------------------------------------------------- 343 | ;usbSend: 344 | ;pointer to data in 'Y' 345 | ;number of bytes in 'cnt' -- including sync byte [range 2 ... 12] 346 | ;uses: x1...x4, btcnt, shift, cnt, Y 347 | ;Numbers in brackets are time since first bit of sync pattern is sent 348 | ;We need not to match the transfer rate exactly because the spec demands 349 | ;only 1.5% precision anyway. 350 | usbSendAndReti: ;- [-13] 13 cycles until SOP 351 | in x2, USBDDR ;1 [-12] 352 | ori x2, USBMASK ;1 [-11] 353 | sbi USBOUT, USBMINUS ;2 [-09-10] prepare idle state; D+ and D- must have been 0 (no pullups) 354 | in x1, USBOUT ;1 [-08] port mirror for tx loop 355 | out USBDDR, x2 ;1 [-07] <- acquire bus 356 | ; need not init x2 (bitstuff history) because sync starts with 0 357 | ldi x4, USBMASK ;1 [-06] exor mask 358 | ldi shift, 0x80 ;1 [-05] sync byte is first byte sent 359 | ldi bitcnt, 6 ;1 [-04] 360 | txBitLoop: ;- [-04] [06] 361 | sbrs shift, 0 ;1 [-03] [07] 362 | eor x1, x4 ;1 [-02] [08] 363 | ror shift ;1 [-01] [09] 364 | didStuffN: ;- [09] 365 | out USBOUT, x1 ;1 [00] [10] <-- out N 366 | ror x2 ;1 [01] 367 | cpi x2, 0xfc ;1 [02] 368 | brcc bitstuffN ;1 [03] 369 | dec bitcnt ;1 [04] 370 | brne txBitLoop ;1 [05] 371 | sbrs shift, 0 ;1 [06] 372 | eor x1, x4 ;1 [07] 373 | ror shift ;1 [08] 374 | didStuff6: ;- [08] 375 | nop ;1 [09] 376 | out USBOUT, x1 ;1 [00] [10] <-- out 6 377 | ror x2 ;1 [01] 378 | cpi x2, 0xfc ;1 [02] 379 | brcc bitstuff6 ;1 [03] 380 | sbrs shift, 0 ;1 [04] 381 | eor x1, x4 ;1 [05] 382 | ror shift ;1 [06] 383 | ror x2 ;1 [07] 384 | didStuff7: ;- [07] 385 | ldi bitcnt, 6 ;1 [08] 386 | cpi x2, 0xfc ;1 [09] 387 | out USBOUT, x1 ;1 [00] [10] <-- out 7 388 | brcc bitstuff7 ;1 [01] 389 | ld shift, y+ ;2 [02+03] 390 | dec cnt ;1 [04] 391 | brne txBitLoop ;1 [05] 392 | makeSE0: 393 | cbr x1, USBMASK ;1 [06] prepare SE0 [spec says EOP may be 19 to 23 cycles] 394 | lds x2, usbNewDeviceAddr;2 [07+08] 395 | lsl x2 ;1 [09] we compare with left shifted address 396 | ;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm: 397 | ;set address only after data packet was sent, not after handshake 398 | out USBOUT, x1 ;1 [00] [10] <-- out SE0-- from now 2 bits==20 cycl. until bus idle 399 | subi YL, 20 + 2 ;1 [01] Only assign address on data packets, not ACK/NAK in x3 400 | sbci YH, 0 ;1 [02] 401 | breq skipAddrAssign ;1 [03] 402 | sts usbDeviceAddr, x2 ;2 [04+05] if not skipped: SE0 is one cycle longer 403 | ;---------------------------------------------------------------------------- 404 | ;end of usbDeviceAddress transfer 405 | skipAddrAssign: ;- [03/04] 406 | ldi x2, 1<