├── .gitignore ├── .gitmodules ├── MIPSfpga-nexys4ddr-project-v2.0 ├── MIPSfpga │ └── rtl_up │ │ ├── RAMB4K_S16.v │ │ ├── RAMB4K_S2.v │ │ ├── RAMB4K_S8.v │ │ ├── assert.vh │ │ ├── cop2.vh │ │ ├── d_wsram_2k2way_xilinx.v │ │ ├── dataram_2k2way_xilinx.v │ │ ├── ejtag_reset.v │ │ ├── ejtag_tb.vh │ │ ├── ejtag_tb_cfg.vh │ │ ├── i_wsram_2k2way_xilinx.v │ │ ├── initfiles │ │ ├── 1_IncrementLEDs │ │ │ └── ram_reset_init.txt │ │ ├── 2_IncrementLEDsDelay │ │ │ └── ram_reset_init.txt │ │ ├── 3_Switches&LEDs │ │ │ └── ram_reset_init.txt │ │ └── 4_CExample │ │ │ ├── ram_program_init.txt │ │ │ └── ram_reset_init.txt │ │ ├── m14k_alu_const.vh │ │ ├── m14k_alu_dsp_stub.v │ │ ├── m14k_alu_shft_32bit.v │ │ ├── m14k_bistctl.v │ │ ├── m14k_biu.v │ │ ├── m14k_cache_cmp.v │ │ ├── m14k_cache_mux.v │ │ ├── m14k_cdmmstub.v │ │ ├── m14k_clock_buf.v │ │ ├── m14k_clock_nogate.v │ │ ├── m14k_clockandlatch.v │ │ ├── m14k_clockxnorgate.v │ │ ├── m14k_config.vh │ │ ├── m14k_const.vh │ │ ├── m14k_cop1_stub.v │ │ ├── m14k_cop2_const.vh │ │ ├── m14k_cop2_stub.v │ │ ├── m14k_core.v │ │ ├── m14k_cp1_stub.v │ │ ├── m14k_cp2_stub.v │ │ ├── m14k_cpu.v │ │ ├── m14k_cpz.v │ │ ├── m14k_cpz_antitamper_stub.v │ │ ├── m14k_cpz_eicoffset_stub.v │ │ ├── m14k_cpz_guest_srs1.v │ │ ├── m14k_cpz_guest_stub.v │ │ ├── m14k_cpz_pc.v │ │ ├── m14k_cpz_pc_top.v │ │ ├── m14k_cpz_prid.v │ │ ├── m14k_cpz_root_stub.v │ │ ├── m14k_cpz_sps_stub.v │ │ ├── m14k_cpz_srs1.v │ │ ├── m14k_cpz_watch_stub.v │ │ ├── m14k_cscramble_scanio_stub.v │ │ ├── m14k_cscramble_stub.v │ │ ├── m14k_cscramble_tpl.v │ │ ├── m14k_dc.v │ │ ├── m14k_dc_bistctl.v │ │ ├── m14k_dcc.v │ │ ├── m14k_dcc_fb.v │ │ ├── m14k_dcc_mb_stub.v │ │ ├── m14k_dcc_parity_stub.v │ │ ├── m14k_dcc_spmb_stub.v │ │ ├── m14k_dcc_spstub.v │ │ ├── m14k_dsp_const.vh │ │ ├── m14k_dspram_ext_stub.v │ │ ├── m14k_edp.v │ │ ├── m14k_edp_add_simple.v │ │ ├── m14k_edp_buf_misc.v │ │ ├── m14k_edp_clz.v │ │ ├── m14k_edp_clz_16b.v │ │ ├── m14k_edp_clz_4b.v │ │ ├── m14k_ejt.v │ │ ├── m14k_ejt_and2.v │ │ ├── m14k_ejt_area.v │ │ ├── m14k_ejt_async_rec.v │ │ ├── m14k_ejt_async_snd.v │ │ ├── m14k_ejt_brk21.v │ │ ├── m14k_ejt_bus32mux2.v │ │ ├── m14k_ejt_dbrk.v │ │ ├── m14k_ejt_gate.v │ │ ├── m14k_ejt_ibrk.v │ │ ├── m14k_ejt_mux2.v │ │ ├── m14k_ejt_pdttcb_stub.v │ │ ├── m14k_ejt_tap.v │ │ ├── m14k_ejt_tap_dasamstub.v │ │ ├── m14k_ejt_tap_fdcstub.v │ │ ├── m14k_ejt_tap_pcsamstub.v │ │ ├── m14k_ejt_tck.v │ │ ├── m14k_fpuclk1_nogate.v │ │ ├── m14k_generic_dataram.v │ │ ├── m14k_generic_tagram.v │ │ ├── m14k_generic_wsram.v │ │ ├── m14k_gf_mux2.v │ │ ├── m14k_glue.v │ │ ├── m14k_ic.v │ │ ├── m14k_ic_bistctl.v │ │ ├── m14k_icc.v │ │ ├── m14k_icc_macro.vh │ │ ├── m14k_icc_mb_stub.v │ │ ├── m14k_icc_parity_stub.v │ │ ├── m14k_icc_spmb_stub.v │ │ ├── m14k_icc_spstub.v │ │ ├── m14k_icc_umips_stub.v │ │ ├── m14k_ispram_ext_stub.v │ │ ├── m14k_mdl.v │ │ ├── m14k_mdl_add_simple.v │ │ ├── m14k_mdl_ctl.v │ │ ├── m14k_mdl_dp.v │ │ ├── m14k_mdu_const.vh │ │ ├── m14k_mdu_func.vh │ │ ├── m14k_mmu.vh │ │ ├── m14k_mmuc.v │ │ ├── m14k_monitor.vh │ │ ├── m14k_mpc.v │ │ ├── m14k_mpc_ctl.v │ │ ├── m14k_mpc_dec.v │ │ ├── m14k_mpc_exc.v │ │ ├── m14k_rf_reg.v │ │ ├── m14k_rf_rngc.v │ │ ├── m14k_rf_stub.v │ │ ├── m14k_siu.v │ │ ├── m14k_siu_int_sync.v │ │ ├── m14k_spram_top.v │ │ ├── m14k_sram_dual_switch.vh │ │ ├── m14k_ssram_sp_bw.v │ │ ├── m14k_tb_const.vh │ │ ├── m14k_tlb.v │ │ ├── m14k_tlb_collector.v │ │ ├── m14k_tlb_cpy.v │ │ ├── m14k_tlb_ctl.v │ │ ├── m14k_tlb_dtlb.v │ │ ├── m14k_tlb_itlb.v │ │ ├── m14k_tlb_jtlb16.v │ │ ├── m14k_tlb_jtlb16entries.v │ │ ├── m14k_tlb_jtlb1entry.v │ │ ├── m14k_tlb_jtlb4entries.v │ │ ├── m14k_tlb_utlb.v │ │ ├── m14k_tlb_utlbentry.v │ │ ├── m14k_top.v │ │ ├── m14k_udi_stub.v │ │ ├── mips_ahb32_to_ocp64.vh │ │ ├── mips_ahb_lite_const.vh │ │ ├── mips_const.vh │ │ ├── mips_cpi_checker.vh │ │ ├── mips_fpu_const.vh │ │ ├── mips_itcb_cfg.vh │ │ ├── mips_pib_cfg.vh │ │ ├── mips_pib_cfg_xilinx.vh │ │ ├── mips_pib_stub.v │ │ ├── mips_tcb_cfg.vh │ │ ├── mipsfpga_ahb.v │ │ ├── mipsfpga_ahb_const.vh │ │ ├── mipsfpga_ahb_gpio.v │ │ ├── mipsfpga_ahb_ram.v │ │ ├── mipsfpga_ahb_ram_reset.v │ │ ├── mipsfpga_de2_115.v │ │ ├── mipsfpga_nexys4_ddr.v │ │ ├── mipsfpga_sys.v │ │ ├── mvp_cregister.v │ │ ├── mvp_cregister_c.v │ │ ├── mvp_cregister_ngc.v │ │ ├── mvp_cregister_s.v │ │ ├── mvp_cregister_wide.v │ │ ├── mvp_cregister_wide_tlb.v │ │ ├── mvp_cregister_wide_utlb.v │ │ ├── mvp_latchn.v │ │ ├── mvp_mux16.v │ │ ├── mvp_mux1hot_10.v │ │ ├── mvp_mux1hot_13.v │ │ ├── mvp_mux1hot_24.v │ │ ├── mvp_mux1hot_3.v │ │ ├── mvp_mux1hot_4.v │ │ ├── mvp_mux1hot_5.v │ │ ├── mvp_mux1hot_6.v │ │ ├── mvp_mux1hot_8.v │ │ ├── mvp_mux1hot_9.v │ │ ├── mvp_mux2.v │ │ ├── mvp_mux4.v │ │ ├── mvp_mux8.v │ │ ├── mvp_register.v │ │ ├── mvp_register_c.v │ │ ├── mvp_register_ngc.v │ │ ├── mvp_register_s.v │ │ ├── mvp_ucregister_wide.v │ │ ├── ram_dual_port.v │ │ ├── ram_program_init.txt │ │ ├── ram_reset_dual_port.v │ │ ├── ram_reset_init.txt │ │ ├── sucreg.v │ │ ├── sys_config.vh │ │ ├── tagram_2k2way_xilinx.v │ │ ├── tb_config.vh │ │ ├── tb_defs.vh │ │ ├── testbench.v │ │ └── testbench_boot.v ├── Vivado │ └── mfp_lab │ │ ├── mfp_lab.cache │ │ └── wt │ │ │ ├── java_command_handlers.wdf │ │ │ ├── project.wpc │ │ │ ├── synthesis.wdf │ │ │ ├── synthesis_details.wdf │ │ │ ├── webtalk_pa.xml │ │ │ └── xsim.wdf │ │ ├── mfp_lab.hw │ │ ├── hw_1 │ │ │ └── hw.xml │ │ └── mfp_lab.lpr │ │ ├── mfp_lab.ip_user_files │ │ ├── README.txt │ │ ├── ip │ │ │ └── clk_wiz_0 │ │ │ │ ├── clk_wiz_0.v │ │ │ │ ├── clk_wiz_0.veo │ │ │ │ ├── clk_wiz_0_clk_wiz.v │ │ │ │ ├── clk_wiz_0_sim_netlist.v │ │ │ │ ├── clk_wiz_0_sim_netlist.vhdl │ │ │ │ ├── clk_wiz_0_stub.v │ │ │ │ └── clk_wiz_0_stub.vhdl │ │ └── sim_scripts │ │ │ └── clk_wiz_0 │ │ │ ├── README.txt │ │ │ ├── ies │ │ │ ├── README.txt │ │ │ ├── clk_wiz_0.sh │ │ │ ├── file_info.txt │ │ │ ├── filelist.f │ │ │ ├── filelist_irun.f │ │ │ ├── glbl.v │ │ │ └── simulate.do │ │ │ ├── modelsim │ │ │ ├── README.txt │ │ │ ├── clk_wiz_0.sh │ │ │ ├── clk_wiz_0.udo │ │ │ ├── compile.do │ │ │ ├── file_info.txt │ │ │ ├── filelist.f │ │ │ ├── glbl.v │ │ │ ├── simulate.do │ │ │ └── wave.do │ │ │ ├── questa │ │ │ ├── README.txt │ │ │ ├── clk_wiz_0.sh │ │ │ ├── clk_wiz_0.udo │ │ │ ├── compile.do │ │ │ ├── elaborate.do │ │ │ ├── file_info.txt │ │ │ ├── filelist.f │ │ │ ├── glbl.v │ │ │ ├── simulate.do │ │ │ └── wave.do │ │ │ ├── vcs │ │ │ ├── README.txt │ │ │ ├── clk_wiz_0.sh │ │ │ ├── file_info.txt │ │ │ ├── filelist.f │ │ │ ├── glbl.v │ │ │ └── simulate.do │ │ │ └── xsim │ │ │ ├── README.txt │ │ │ ├── clk_wiz_0.sh │ │ │ ├── cmd.tcl │ │ │ ├── file_info.txt │ │ │ ├── filelist.f │ │ │ ├── glbl.v │ │ │ └── vlog.prj │ │ ├── mfp_lab.srcs │ │ └── sources_1 │ │ │ └── ip │ │ │ └── clk_wiz_0.xcix │ │ ├── mfp_lab.xpr │ │ └── mfp_testbench_behav.wcfg ├── github │ └── mipsfpga-plus │ │ ├── boards │ │ └── nexys4_ddr │ │ │ ├── nexys4_ddr.v │ │ │ └── nexys4_ddr.xdc │ │ ├── mfp_ahb_gpio_slave.v │ │ ├── mfp_ahb_lite.vh │ │ ├── mfp_ahb_lite_matrix.v │ │ ├── mfp_ahb_lite_matrix_config.vh │ │ ├── mfp_ahb_lite_matrix_with_loader.v │ │ ├── mfp_ahb_ram_slave.v │ │ ├── mfp_clock_dividers.v │ │ ├── mfp_dual_port_ram.v │ │ ├── mfp_pmod_als_spi_receiver.v │ │ ├── mfp_seven_segment_displays.v │ │ ├── mfp_srec_parser.v │ │ ├── mfp_srec_parser_to_ahb_lite_bridge.v │ │ ├── mfp_switch_and_button_debouncers.v │ │ ├── mfp_system.v │ │ ├── mfp_testbench.v │ │ └── mfp_uart_receiver.v ├── nexys4_ddr.bit ├── programs │ └── testprogram │ │ ├── FPGA_Ram.elf │ │ ├── FPGA_Ram.rec │ │ ├── FPGA_Ram_map.txt │ │ ├── compile_and_link.bat │ │ ├── src │ │ ├── main.c │ │ ├── mfp_memory_mapped_registers.h │ │ ├── mips_printf.c │ │ └── mips_printf.h │ │ ├── system_src │ │ ├── FPGA_Ram.ld │ │ ├── boot-uhi32.ld │ │ ├── boot.S │ │ ├── boot.h │ │ ├── fpga.h │ │ ├── init_caches.S │ │ ├── init_cp0.S │ │ ├── init_gpr.S │ │ └── init_tlb.S │ │ └── upload_to_the_board_using_uart.bat └── user_rtl │ ├── ahb_feeder.v │ ├── ahb_master.v │ ├── ahb_spi.v │ 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