├── ChangeLog ├── tcl ├── board │ ├── redbee.cfg │ ├── atmel_sam3x_ek.cfg │ ├── atmel_sam3u_ek.cfg │ ├── ti_blaze.cfg │ ├── ti_pandaboard.cfg │ ├── iar_str912_sk.cfg │ ├── ti_pandaboard_es.cfg │ ├── atmel_sam3s_ek.cfg │ ├── atmel_sam4s_ek.cfg │ ├── pic-p32mx.cfg │ ├── olimex_sam7_ex256.cfg │ ├── diolan_lpc4350-db1.cfg │ ├── keil_mcb1700.cfg │ ├── keil_mcb2140.cfg │ ├── olimex_lpc_h2148.cfg │ ├── atmel_at91sam7s-ek.cfg │ ├── open-bldc.cfg │ ├── atmel_sam3n_ek.cfg │ ├── lisa-l.cfg │ ├── olimex_stm32_h103.cfg │ ├── efikamx.cfg │ ├── ti_am335xevm.cfg │ ├── olimex_stm32_h107.cfg │ ├── olimex_stm32_p107.cfg │ ├── stm32100b_eval.cfg │ ├── arm_evaluator7t.cfg │ ├── stm3210c_eval.cfg │ ├── stm32vldiscovery.cfg │ ├── stm3210b_eval.cfg │ ├── ti_beagleboard.cfg │ ├── linksys_nslu2.cfg │ ├── hitex_lpc1768stick.cfg │ ├── olimex_LPC2378STK.cfg │ ├── phone_se_j100i.cfg │ ├── stm3220g_eval.cfg │ ├── stm3241g_eval.cfg │ ├── stm32f3discovery.cfg │ ├── stm32f4discovery.cfg │ ├── ti_beagleboard_xm.cfg │ ├── microchip_explorer16.cfg │ ├── stm32f0discovery.cfg │ ├── stm32ldiscovery.cfg │ ├── crossbow_tech_imote2.cfg │ ├── ti_beaglebone.cfg │ ├── colibri.cfg │ ├── ek-lm4f232.cfg │ ├── steval_pcc010.cfg │ ├── logicpd_imx27.cfg │ ├── smdk6410.cfg │ ├── ek-lm3s3748.cfg │ ├── ek-lm3s9d92.cfg │ ├── ek-lm4f120xl.cfg │ ├── kwikstik.cfg │ ├── ek-lm3s811-revb.cfg │ ├── twr-k60n512.cfg │ ├── ek-lm3s9b9x.cfg │ ├── iar_lpc1768.cfg │ ├── ek-lm3s6965.cfg │ ├── ek-lm3s8962.cfg │ ├── omap2420_h4.cfg │ ├── da850evm.cfg │ ├── ek-lm3s811.cfg │ ├── voipac.cfg │ ├── netgear-dg834v3.cfg │ ├── hitex_stm32-performancestick.cfg │ ├── stm320518_eval_stlink.cfg │ ├── stm3220g_eval_stlink.cfg │ ├── stm3241g_eval_stlink.cfg │ ├── twr-k60f120m.cfg │ ├── balloon3-cpu.cfg │ ├── verdex.cfg │ ├── ek-lm3s1968.cfg │ ├── lpc1850_spifi_generic.cfg │ ├── lpc4350_spifi_generic.cfg │ ├── am3517evm.cfg │ ├── hilscher_nxsb100.cfg │ ├── voltcraft_dso-3062c.cfg │ └── x300t.cfg ├── chip │ ├── ti │ │ └── lm3s │ │ │ └── lm3s.tcl │ ├── st │ │ └── stm32 │ │ │ └── stm32.tcl │ └── atmel │ │ └── at91 │ │ ├── hardware.cfg │ │ ├── pmc.tcl │ │ ├── at91_wdt.cfg │ │ └── at91sam9_smc.cfg ├── interface │ ├── dummy.cfg │ ├── estick.cfg │ ├── jlink.cfg │ ├── opendous.cfg │ ├── vsllink.cfg │ ├── arm-jtag-ew.cfg │ ├── osbdm.cfg │ ├── at91rm9200.cfg │ ├── chameleon.cfg │ ├── rlink.cfg │ ├── ulink.cfg │ ├── kt-link.cfg │ ├── stlink-v1.cfg │ ├── stlink-v2.cfg │ ├── usb-jtag.cfg │ ├── vpaclink.cfg │ ├── axm0432.cfg │ ├── cortino.cfg │ ├── icebear.cfg │ ├── lisa-l.cfg │ ├── jtagkey-tiny.cfg │ ├── jtagkey.cfg │ ├── jtagkey2.cfg │ ├── jtagkey2p.cfg │ ├── signalyzer.cfg │ ├── hitex_str9-comstick.cfg │ ├── jtag-lock-pick_tiny_2.cfg │ ├── signalyzer-h2.cfg │ ├── signalyzer-h4.cfg │ ├── flyswatter.cfg │ ├── signalyzer-lite.cfg │ ├── flyswatter2.cfg │ ├── neodb.cfg │ ├── ngxtech.cfg │ ├── olimex-arm-usb-ocd.cfg │ ├── stm32-stick.cfg │ ├── calao-usb-a9260.cfg │ ├── olimex-jtag-tiny.cfg │ ├── olimex-arm-usb-ocd-h.cfg │ ├── oocdlink.cfg │ ├── turtelizer2.cfg │ ├── usbprog.cfg │ ├── altera-usb-blaster.cfg │ ├── olimex-arm-usb-tiny-h.cfg │ ├── openocd-usb.cfg │ ├── minimodule.cfg │ ├── xds100v2.cfg │ ├── hilscher_nxhx50_etm.cfg │ ├── hilscher_nxhx10_etm.cfg │ ├── hilscher_nxhx500_etm.cfg │ ├── hilscher_nxhx50_re.cfg │ ├── hilscher_nxhx500_re.cfg │ ├── openrd.cfg │ ├── openocd-usb-hs.cfg │ ├── calao-usb-a9260-c01.cfg │ ├── calao-usb-a9260-c02.cfg │ ├── ftdi │ │ ├── cortino.cfg │ │ ├── hitex_str9-comstick.cfg │ │ ├── jtagkey.cfg │ │ ├── hitex_lpc1768stick.cfg │ │ ├── jtagkey2.cfg │ │ ├── jtagkey2p.cfg │ │ ├── stm32-stick.cfg │ │ ├── kt-link.cfg │ │ ├── openocd-usb.cfg │ │ ├── olimex-arm-usb-ocd.cfg │ │ ├── flyswatter2.cfg │ │ ├── olimex-jtag-tiny.cfg │ │ ├── jtag-lock-pick_tiny_2.cfg │ │ ├── olimex-arm-usb-ocd-h.cfg │ │ ├── openocd-usb-hs.cfg │ │ ├── opendous_ftdi.cfg │ │ ├── axm0432.cfg │ │ ├── icebear.cfg │ │ ├── minimodule.cfg │ │ ├── signalyzer.cfg │ │ ├── signalyzer-lite.cfg │ │ ├── hilscher_nxhx10_etm.cfg │ │ ├── hilscher_nxhx50_etm.cfg │ │ ├── hilscher_nxhx500_etm.cfg │ │ ├── hilscher_nxhx500_re.cfg │ │ ├── hilscher_nxhx50_re.cfg │ │ ├── openrd.cfg │ │ ├── flyswatter.cfg │ │ ├── lisa-l.cfg │ │ ├── turtelizer2-revB.cfg │ │ ├── vpaclink.cfg │ │ ├── sheevaplug.cfg │ │ ├── oocdlink.cfg │ │ ├── neodb.cfg │ │ ├── ngxtech.cfg │ │ ├── turtelizer2-revC.cfg │ │ ├── redbee-usb.cfg │ │ ├── redbee-econotag.cfg │ │ ├── luminary-lm3s811.cfg │ │ ├── olimex-arm-usb-tiny-h.cfg │ │ ├── calao-usb-a9260-c01.cfg │ │ ├── calao-usb-a9260-c02.cfg │ │ ├── dlp-usb1232h.cfg │ │ ├── xds100v2.cfg │ │ ├── dp_busblaster.cfg │ │ ├── luminary-icdi.cfg │ │ ├── flossjtag-noeeprom.cfg │ │ └── flossjtag.cfg │ ├── redbee-usb.cfg │ ├── sheevaplug.cfg │ ├── parport.cfg │ ├── redbee-econotag.cfg │ ├── parport_dlc5.cfg │ ├── opendous_ftdi.cfg │ ├── dlp-usb1232h.cfg │ ├── flashlink.cfg │ ├── ti-icdi.cfg │ ├── busblaster.cfg │ ├── digilent-hs1.cfg │ ├── flossjtag-noeeprom.cfg │ ├── buspirate.cfg │ ├── flossjtag.cfg │ ├── luminary-lm3s811.cfg │ ├── sysfsgpio-raspberrypi.cfg │ └── luminary-icdi.cfg ├── target │ ├── test_syntax_error.cfg │ ├── at91sam4sXX.cfg │ ├── at91sam3uxx.cfg │ ├── stm32xl.cfg │ ├── at91sam3u1c.cfg │ ├── at91sam3u1e.cfg │ ├── at91sam3u2c.cfg │ ├── at91sam3u2e.cfg │ ├── at91sam3ax_xx.cfg │ ├── stm32lx_dual_bank.cfg │ ├── at91sam3ax_4x.cfg │ ├── at91sam3sXX.cfg │ ├── at91sam3u4c.cfg │ ├── at91sam3u4e.cfg │ ├── at91sam3ax_8x.cfg │ ├── at91sam9261.cfg │ ├── at91sam9rl.cfg │ ├── stm32f1x_stlink.cfg │ ├── stm32f2x_stlink.cfg │ ├── stm32f3x_stlink.cfg │ ├── stm32f0x_stlink.cfg │ ├── stm32f4x_stlink.cfg │ ├── test_reset_syntax_error.cfg │ ├── avr32.cfg │ ├── at91sam9g10.cfg │ ├── at91sam9g45.cfg │ ├── samsung_s3c4510.cfg │ ├── sharp_lh79532.cfg │ ├── nuc910.cfg │ ├── lpc1768.cfg │ ├── lpc1769.cfg │ ├── at32ap7000.cfg │ ├── at91sam9260.cfg │ ├── at91sam3nXX.cfg │ ├── lpc1751.cfg │ ├── lpc1752.cfg │ ├── at91sam9263.cfg │ ├── lpc1754.cfg │ ├── lpc1756.cfg │ ├── lpc1758.cfg │ ├── lpc1759.cfg │ ├── lpc1763.cfg │ ├── lpc1764.cfg │ ├── lpc1765.cfg │ ├── lpc1766.cfg │ ├── lpc1767.cfg │ ├── lpc1850.cfg │ ├── smp8634.cfg │ ├── ti-ar7.cfg │ ├── feroceon.cfg │ ├── dragonite.cfg │ ├── faux.cfg │ ├── lpc1788.cfg │ ├── at91sam9g20.cfg │ ├── at91r40008.cfg │ ├── dsp56321.cfg │ ├── imx21.cfg │ ├── hilscher_netx10.cfg │ ├── imx.cfg │ ├── imx28.cfg │ ├── cs351x.cfg │ ├── stellaris_icdi.cfg │ ├── at91sam9.cfg │ ├── k40.cfg │ ├── k60.cfg │ ├── lpc2103.cfg │ ├── lpc2124.cfg │ ├── lpc2129.cfg │ ├── efm32_stlink.cfg │ ├── atmega128.cfg │ ├── swj-dp.tcl │ ├── lpc2460.cfg │ ├── epc9301.cfg │ ├── lpc2294.cfg │ ├── lpc2148.cfg │ └── lpc2378.cfg ├── cpu │ └── arm │ │ ├── arm7tdmi.tcl │ │ ├── arm920.tcl │ │ ├── arm946.tcl │ │ ├── arm966.tcl │ │ └── cortex_m3.tcl ├── cpld │ ├── lattice-lc4032ze.cfg │ └── xilinx-xcr3256.cfg ├── test │ ├── selftest.cfg │ └── syntax1.cfg └── mem_helper.tcl ├── testing ├── examples │ ├── STR710Test │ │ ├── .gitignore │ │ ├── prj │ │ │ ├── str710_program.script │ │ │ ├── eclipse_ram.gdb │ │ │ └── eclipse_rom.gdb │ │ ├── test_ram.elf │ │ └── test_rom.elf │ ├── STM32-103 │ │ ├── main.elf │ │ └── readme.txt │ ├── cortex │ │ ├── lm3s3748.elf │ │ └── test.c │ ├── LPC2148Test │ │ ├── test_ram.elf │ │ ├── test_rom.elf │ │ └── prj │ │ │ ├── eclipse_ram.gdb │ │ │ └── eclipse_rom.gdb │ ├── LPC2294Test │ │ ├── test_ram.elf │ │ ├── test_rom.elf │ │ └── prj │ │ │ ├── eclipse_ram.gdb │ │ │ └── eclipse_rom.gdb │ ├── PIC32 │ │ ├── BlinkingLeds.elf │ │ ├── readme.txt │ │ └── BlinkingLeds.c │ ├── STR710JtagSpeed │ │ ├── test.elf │ │ └── prj │ │ │ └── eclipse_ft2232_ram.gdb │ ├── STR912Test │ │ ├── test_ram.elf │ │ ├── test_rom.elf │ │ └── prj │ │ │ ├── str912_program.script │ │ │ ├── eclipse_ram.gdb │ │ │ └── eclipse_rom.gdb │ ├── SAM7S256Test │ │ ├── test_ram.elf │ │ ├── test_rom.elf │ │ └── prj │ │ │ ├── sam7s256_reset.script │ │ │ ├── eclipse_ram.gdb │ │ │ └── eclipse_rom.gdb │ ├── SAM7X256Test │ │ ├── test_ram.elf │ │ ├── test_rom.elf │ │ └── prj │ │ │ ├── sam7x256_reset.script │ │ │ ├── eclipse_ram.gdb │ │ │ └── eclipse_rom.gdb │ ├── ledtest-imx27ads │ │ ├── test.elf │ │ ├── ldscript │ │ └── gdbinit-imx27ads │ ├── ledtest-imx31pdk │ │ ├── test.elf │ │ ├── ldscript │ │ └── gdbinit-imx31pdk │ └── AT91R40008Test │ │ ├── test_ram.elf │ │ ├── prj │ │ ├── at91r40008_reset.script │ │ └── eclipse_ram.gdb │ │ └── test_ram.hex ├── tcl_server.tcl ├── build.test1 │ ├── mingw32_help │ │ └── include │ │ │ ├── sys │ │ │ └── cdefs.h │ │ │ └── elf.h │ └── README.TXT └── results │ └── template.html ├── tools ├── st7_dtc_as │ └── st7_dtc_as ├── rlink_make_speed_table │ └── rlink_make_speed_table ├── checkpatch.sh ├── uncrustify1.sh └── initial.sh ├── src ├── target │ └── xscale │ │ ├── debug_handler.bin │ │ ├── build.sh │ │ └── debug_handler.cmd ├── flash │ ├── ocl │ │ └── at91sam7x │ │ │ └── at91sam7x_ocl_flash.script │ ├── Makefile.am │ ├── nand │ │ └── Makefile.am │ └── nor │ │ └── Makefile.am ├── svf │ └── Makefile.am ├── xsvf │ └── Makefile.am ├── pld │ └── Makefile.am ├── transport │ └── Makefile.am ├── server │ ├── startup.tcl │ └── Makefile.am └── jtag │ └── hla │ └── Makefile.am ├── .gitmodules ├── common.mk ├── doc ├── manual │ ├── app.txt │ └── flash.txt └── Makefile.am ├── AUTHORS.ChangeLog ├── contrib ├── libdcc │ └── README └── loaders │ └── README ├── AUTHORS ├── NEWS └── config_subdir.m4 /ChangeLog: -------------------------------------------------------------------------------- 1 | Retired in favor of git log. 2 | -------------------------------------------------------------------------------- /tcl/board/redbee.cfg: -------------------------------------------------------------------------------- 1 | source [find target/mc13224v.cfg] 2 | -------------------------------------------------------------------------------- /testing/examples/STR710Test/.gitignore: -------------------------------------------------------------------------------- 1 | .dep 2 | src/main.lst 3 | -------------------------------------------------------------------------------- /tools/st7_dtc_as/st7_dtc_as: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | exec perl "$0.pl" $* 3 | -------------------------------------------------------------------------------- /tcl/chip/ti/lm3s/lm3s.tcl: -------------------------------------------------------------------------------- 1 | source [find chip/ti/lm3s/lm3s_regs.tcl] 2 | -------------------------------------------------------------------------------- /tools/rlink_make_speed_table/rlink_make_speed_table: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | exec perl "$0.pl" $* 3 | -------------------------------------------------------------------------------- /tcl/board/atmel_sam3x_ek.cfg: -------------------------------------------------------------------------------- 1 | source [find target/at91sam3ax_8x.cfg] 2 | 3 | reset_config srst_only 4 | -------------------------------------------------------------------------------- /tcl/board/atmel_sam3u_ek.cfg: -------------------------------------------------------------------------------- 1 | source [find target/at91sam3u4e.cfg] 2 | 3 | reset_config srst_only 4 | 5 | -------------------------------------------------------------------------------- /tcl/interface/dummy.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Dummy interface (for testing purposes) 3 | # 4 | 5 | interface dummy 6 | 7 | -------------------------------------------------------------------------------- /testing/examples/STR710Test/prj/str710_program.script: -------------------------------------------------------------------------------- 1 | flash protect 0 0 7 off 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | -------------------------------------------------------------------------------- /tcl/board/ti_blaze.cfg: -------------------------------------------------------------------------------- 1 | jtag_rclk 6000 2 | 3 | source [find target/omap4430.cfg] 4 | 5 | reset_config trst_and_srst 6 | 7 | -------------------------------------------------------------------------------- /tcl/board/ti_pandaboard.cfg: -------------------------------------------------------------------------------- 1 | jtag_rclk 6000 2 | 3 | source [find target/omap4430.cfg] 4 | 5 | reset_config trst_only 6 | 7 | -------------------------------------------------------------------------------- /tcl/interface/estick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # eStick 3 | # 4 | # http://code.google.com/p/estick-jtag/ 5 | # 6 | 7 | interface opendous 8 | -------------------------------------------------------------------------------- /src/target/xscale/debug_handler.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/src/target/xscale/debug_handler.bin -------------------------------------------------------------------------------- /tcl/board/iar_str912_sk.cfg: -------------------------------------------------------------------------------- 1 | # The IAR str912-sk evaluation kick start board has an str912 2 | 3 | source [find target/str912.cfg] -------------------------------------------------------------------------------- /tcl/board/ti_pandaboard_es.cfg: -------------------------------------------------------------------------------- 1 | jtag_rclk 6000 2 | 3 | source [find target/omap4460.cfg] 4 | 5 | reset_config trst_only 6 | 7 | -------------------------------------------------------------------------------- /tcl/interface/jlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Segger J-Link 3 | # 4 | # http://www.segger.com/jlink.html 5 | # 6 | 7 | interface jlink 8 | 9 | -------------------------------------------------------------------------------- /tcl/target/test_syntax_error.cfg: -------------------------------------------------------------------------------- 1 | # This script tests a syntax error in the startup 2 | # config script 3 | 4 | syntax error here 5 | -------------------------------------------------------------------------------- /testing/examples/STM32-103/main.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/STM32-103/main.elf -------------------------------------------------------------------------------- /testing/examples/cortex/lm3s3748.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/cortex/lm3s3748.elf -------------------------------------------------------------------------------- /tcl/board/atmel_sam3s_ek.cfg: -------------------------------------------------------------------------------- 1 | source [find target/at91sam3sXX.cfg] 2 | 3 | $_TARGETNAME configure -event gdb-attach { reset init } 4 | -------------------------------------------------------------------------------- /tcl/board/atmel_sam4s_ek.cfg: -------------------------------------------------------------------------------- 1 | source [find target/at91sam4sXX.cfg] 2 | 3 | $_TARGETNAME configure -event gdb-attach { reset init } 4 | -------------------------------------------------------------------------------- /tcl/board/pic-p32mx.cfg: -------------------------------------------------------------------------------- 1 | # The Olimex PIC-P32MX has a PIC32MX 2 | 3 | set CPUTAPID 0x40916053 4 | source [find target/pic32mx.cfg] 5 | -------------------------------------------------------------------------------- /tcl/interface/opendous.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # opendous-jtag 3 | # 4 | # http://code.google.com/p/opendous-jtag/ 5 | # 6 | 7 | interface opendous 8 | -------------------------------------------------------------------------------- /tcl/board/olimex_sam7_ex256.cfg: -------------------------------------------------------------------------------- 1 | # Olimex SAM7-EX256 has a single Atmel at91sam7ex256 on it. 2 | 3 | source [find target/sam7x256.cfg] 4 | 5 | -------------------------------------------------------------------------------- /tcl/interface/vsllink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Versaloon Link -- VSLLink 3 | # 4 | # http://www.versaloon.com/ 5 | # 6 | 7 | interface vsllink 8 | 9 | -------------------------------------------------------------------------------- /testing/examples/LPC2148Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/LPC2148Test/test_ram.elf -------------------------------------------------------------------------------- /testing/examples/LPC2148Test/test_rom.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/LPC2148Test/test_rom.elf -------------------------------------------------------------------------------- /testing/examples/LPC2294Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/LPC2294Test/test_ram.elf -------------------------------------------------------------------------------- /testing/examples/LPC2294Test/test_rom.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/LPC2294Test/test_rom.elf -------------------------------------------------------------------------------- /testing/examples/PIC32/BlinkingLeds.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/PIC32/BlinkingLeds.elf -------------------------------------------------------------------------------- /testing/examples/STR710JtagSpeed/test.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/STR710JtagSpeed/test.elf -------------------------------------------------------------------------------- /testing/examples/STR710Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/STR710Test/test_ram.elf -------------------------------------------------------------------------------- /testing/examples/STR710Test/test_rom.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/STR710Test/test_rom.elf -------------------------------------------------------------------------------- /testing/examples/STR912Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/STR912Test/test_ram.elf -------------------------------------------------------------------------------- /testing/examples/STR912Test/test_rom.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/STR912Test/test_rom.elf -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/SAM7S256Test/test_ram.elf -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/test_rom.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/SAM7S256Test/test_rom.elf -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/SAM7X256Test/test_ram.elf -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/test_rom.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/SAM7X256Test/test_rom.elf -------------------------------------------------------------------------------- /testing/examples/ledtest-imx27ads/test.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/ledtest-imx27ads/test.elf -------------------------------------------------------------------------------- /testing/examples/ledtest-imx31pdk/test.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/ledtest-imx31pdk/test.elf -------------------------------------------------------------------------------- /tools/checkpatch.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | # 3 | 4 | since=${1:-HEAD^} 5 | git format-patch -M --stdout $since | tools/scripts/checkpatch.pl - --no-tree 6 | -------------------------------------------------------------------------------- /src/flash/ocl/at91sam7x/at91sam7x_ocl_flash.script: -------------------------------------------------------------------------------- 1 | soft_reset_halt 2 | load_image at91sam7x_ocl.bin 0x200000 3 | resume 0x200000 4 | flash probe 0 5 | -------------------------------------------------------------------------------- /testing/examples/AT91R40008Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/TheShed/OpenOCD-CMSIS-DAP/HEAD/testing/examples/AT91R40008Test/test_ram.elf -------------------------------------------------------------------------------- /tcl/interface/arm-jtag-ew.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-JTAG-EW 3 | # 4 | # http://www.olimex.com/dev/arm-jtag-ew.html 5 | # 6 | 7 | interface arm-jtag-ew 8 | 9 | -------------------------------------------------------------------------------- /tcl/cpu/arm/arm7tdmi.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME arm7tdmi 3 | set CPU_ARCH armv4t 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /tcl/cpu/arm/arm920.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME arm920 3 | set CPU_ARCH armv4t 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /tcl/cpu/arm/arm946.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME arm946 3 | set CPU_ARCH armv5te 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /tcl/cpu/arm/arm966.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME arm966 3 | set CPU_ARCH armv5te 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /tcl/board/diolan_lpc4350-db1.cfg: -------------------------------------------------------------------------------- 1 | 2 | # 3 | # Diolan LPC-4350-DB1 development board 4 | # 5 | 6 | set CHIPNAME lpc4350 7 | 8 | source [find target/lpc4350.cfg] 9 | -------------------------------------------------------------------------------- /tcl/board/keil_mcb1700.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Keil MCB1700 eval board 3 | # 4 | # http://www.keil.com/mcb1700/picture.asp 5 | # 6 | 7 | source [find target/lpc1768.cfg] 8 | 9 | -------------------------------------------------------------------------------- /tcl/board/keil_mcb2140.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Keil MCB2140 eval board 3 | # 4 | # http://www.keil.com/mcb2140/picture.asp 5 | # 6 | 7 | source [find target/lpc2148.cfg] 8 | 9 | -------------------------------------------------------------------------------- /tcl/cpu/arm/cortex_m3.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME cortex_m3 3 | set CPU_ARCH armv7 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /tcl/interface/osbdm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # P&E Micro OSBDM (aka OSJTAG) interface 3 | # 4 | # http://pemicro.com/osbdm/ 5 | # 6 | interface osbdm 7 | reset_config srst_only 8 | -------------------------------------------------------------------------------- /testing/examples/STR912Test/prj/str912_program.script: -------------------------------------------------------------------------------- 1 | str9x flash_config 0 4 2 0 0x80000 2 | flash protect 0 0 7 off 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | -------------------------------------------------------------------------------- /tcl/cpld/lattice-lc4032ze.cfg: -------------------------------------------------------------------------------- 1 | # Lattice ispMACH 4000ZE family, device LC4032ZE 2 | # just configure a tap 3 | jtag newtap LC4032ZE tap -irlen 8 -expected-id 0x01806043 4 | -------------------------------------------------------------------------------- /tcl/board/olimex_lpc_h2148.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex LPC-H2148 eval board 3 | # 4 | # http://www.olimex.com/dev/lpc-h2148.html 5 | # 6 | 7 | source [find target/lpc2148.cfg] 8 | 9 | -------------------------------------------------------------------------------- /tcl/interface/at91rm9200.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Various Atmel AT91RM9200 boards 3 | # 4 | # TODO: URL? 5 | # 6 | 7 | interface at91rm9200 8 | at91rm9200_device rea_ecr 9 | 10 | -------------------------------------------------------------------------------- /tcl/cpld/xilinx-xcr3256.cfg: -------------------------------------------------------------------------------- 1 | #xilinx coolrunner xcr3256 2 | #simple device - just configure a tap 3 | jtag newtap xcr tap -irlen 5 -ircapture 0x01 -irmask 0x1f -expected-id 0x0494c093 4 | -------------------------------------------------------------------------------- /tcl/interface/chameleon.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec Chameleon POD 3 | # 4 | # http://www.amontec.com/chameleon.shtml 5 | # 6 | 7 | interface parport 8 | parport_cable chameleon 9 | 10 | -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "tools/git2cl"] 2 | path = tools/git2cl 3 | url = http://repo.or.cz/r/git2cl.git 4 | [submodule "jimtcl"] 5 | path = jimtcl 6 | url = http://repo.or.cz/r/jimtcl.git 7 | -------------------------------------------------------------------------------- /tcl/interface/rlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Raisonance RLink 3 | # 4 | # http://www.mcu-raisonance.com/~rlink-debugger-programmer__microcontrollers__tool~tool__T018:4cn9ziz4bnx6.html 5 | # 6 | 7 | interface rlink 8 | 9 | -------------------------------------------------------------------------------- /tcl/board/atmel_at91sam7s-ek.cfg: -------------------------------------------------------------------------------- 1 | # Atmel AT91SAM7S-EK 2 | # http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3784 3 | 4 | set CHIPNAME at91sam7s256 5 | 6 | source [find target/at91sam7sx.cfg] 7 | 8 | 9 | -------------------------------------------------------------------------------- /tcl/interface/ulink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Keil ULINK running OpenULINK firmware. 3 | # 4 | # http://www.keil.com/ulink1/ 5 | # http://article.gmane.org/gmane.comp.debugging.openocd.devel/17362 6 | # 7 | 8 | interface ulink 9 | -------------------------------------------------------------------------------- /tcl/interface/kt-link.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Kristech KT-Link 3 | # 4 | # http://www.kristech.eu 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "KT-LINK" 9 | ft2232_layout ktlink 10 | ft2232_vid_pid 0x0403 0xBBE2 11 | -------------------------------------------------------------------------------- /src/svf/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | METASOURCES = AUTO 4 | noinst_LTLIBRARIES = libsvf.la 5 | noinst_HEADERS = svf.h 6 | libsvf_la_SOURCES = svf.c 7 | 8 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 9 | -------------------------------------------------------------------------------- /tcl/interface/stlink-v1.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STMicroelectronics ST-LINK/V1 in-circuit debugger/programmer 3 | # 4 | 5 | interface hla 6 | hla_layout stlink 7 | hla_device_desc "ST-LINK/V1" 8 | hla_vid_pid 0x0483 0x3744 9 | 10 | -------------------------------------------------------------------------------- /tcl/interface/stlink-v2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STMicroelectronics ST-LINK/V2 in-circuit debugger/programmer 3 | # 4 | 5 | interface hla 6 | hla_layout stlink 7 | hla_device_desc "ST-LINK/V2" 8 | hla_vid_pid 0x0483 0x3748 9 | 10 | -------------------------------------------------------------------------------- /testing/examples/STM32-103/readme.txt: -------------------------------------------------------------------------------- 1 | Olimex STM32-p103 board. 2 | 3 | main.elf is a file that can be programmed to flash for 4 | testing purposes(e.g. test GDB load performance). 5 | 6 | http://www.olimex.com/dev/stm32-p103.html -------------------------------------------------------------------------------- /src/xsvf/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | METASOURCES = AUTO 4 | noinst_LTLIBRARIES = libxsvf.la 5 | noinst_HEADERS = xsvf.h 6 | libxsvf_la_SOURCES = xsvf.c 7 | 8 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 9 | -------------------------------------------------------------------------------- /tcl/board/open-bldc.cfg: -------------------------------------------------------------------------------- 1 | # Open Source Brush Less DC Motor Controller 2 | # http://open-bldc.org 3 | 4 | # Work-area size (RAM size) = 20kB for STM32F103RB device 5 | set WORKAREASIZE 0x5000 6 | 7 | source [find target/stm32.cfg] 8 | -------------------------------------------------------------------------------- /tcl/interface/usb-jtag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Kolja Waschk's USB-JTAG 3 | # 4 | # http://www.ixo.de/info/usb_jtag/ 5 | # 6 | 7 | interface usb_blaster 8 | usb_blaster_vid_pid 0x16C0 0x06AD 9 | usb_blaster_device_desc "USB-JTAG-IF" 10 | -------------------------------------------------------------------------------- /tcl/interface/vpaclink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Voipac VPACLink 3 | # 4 | # http://voipac.com/27M-JTG-000 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "VPACLink A" 9 | ft2232_layout oocdlink 10 | ft2232_vid_pid 0x0403 0x6010 11 | -------------------------------------------------------------------------------- /tcl/target/at91sam4sXX.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam4, a CORTEX-M4 chip 2 | # 3 | 4 | 5 | source [find target/at91sam4XXX.cfg] 6 | 7 | set _FLASHNAME $_CHIPNAME.flash 8 | flash bank $_FLASHNAME at91sam4 0x00400000 0 1 1 $_TARGETNAME 9 | -------------------------------------------------------------------------------- /tcl/board/atmel_sam3n_ek.cfg: -------------------------------------------------------------------------------- 1 | 2 | # 3 | # Board configuration for Atmel's SAM3N-EK 4 | # 5 | 6 | reset_config srst_only 7 | 8 | set CHIPNAME at91sam3n4c 9 | 10 | adapter_khz 32 11 | 12 | source [find target/at91sam3nXX.cfg] 13 | -------------------------------------------------------------------------------- /tcl/interface/axm0432.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Axiom axm0432 3 | # 4 | # http://www.axman.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Symphony SoundBite" 9 | ft2232_layout "axm0432_jtag" 10 | ft2232_vid_pid 0x0403 0x6010 11 | 12 | -------------------------------------------------------------------------------- /tcl/board/lisa-l.cfg: -------------------------------------------------------------------------------- 1 | # the Lost Illusions Serendipitous Autopilot 2 | # http://paparazzi.enac.fr/wiki/Lisa 3 | 4 | # Work-area size (RAM size) = 20kB for STM32F103RB device 5 | set WORKAREASIZE 0x5000 6 | 7 | source [find target/stm32f1x.cfg] 8 | -------------------------------------------------------------------------------- /tcl/board/olimex_stm32_h103.cfg: -------------------------------------------------------------------------------- 1 | # Olimex STM32-H103 eval board 2 | # http://olimex.com/dev/stm32-h103.html 3 | 4 | # Work-area size (RAM size) = 20kB for STM32F103RB device 5 | set WORKAREASIZE 0x5000 6 | 7 | source [find target/stm32f1x.cfg] 8 | -------------------------------------------------------------------------------- /tcl/interface/cortino.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex Cortino 3 | # 4 | # http://www.hitex.com/index.php?id=cortino 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Cortino" 9 | ft2232_layout cortino 10 | ft2232_vid_pid 0x0640 0x0032 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/icebear.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Section5 ICEBear 3 | # 4 | # http://section5.ch/icebear 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "ICEbear JTAG adapter" 9 | ft2232_layout icebear 10 | ft2232_vid_pid 0x0403 0xc140 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/lisa-l.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Lisa/L 3 | # 4 | # http://paparazzi.enac.fr/wiki/Lisa 5 | # 6 | 7 | interface ft2232 8 | ft2232_vid_pid 0x0403 0x6010 9 | ft2232_device_desc "Lisa/L" 10 | ft2232_layout "lisa-l" 11 | ft2232_latency 2 12 | -------------------------------------------------------------------------------- /tcl/board/efikamx.cfg: -------------------------------------------------------------------------------- 1 | # Genesi USA EfikaMX 2 | # http://www.genesi-usa.com/products/efika 3 | 4 | # Fall back to 6MHz if RTCK is not supported 5 | jtag_rclk 6000 6 | 7 | source [find target/imx51.cfg] 8 | 9 | reset_config trst_only 10 | -------------------------------------------------------------------------------- /tcl/interface/jtagkey-tiny.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey-tiny 3 | # 4 | # http://www.amontec.com/jtagkey-tiny.shtml 5 | # 6 | 7 | # The JTAGkey-tiny uses exactly the same config as the JTAGkey. 8 | source [find interface/jtagkey.cfg] 9 | 10 | -------------------------------------------------------------------------------- /tcl/interface/jtagkey.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey 3 | # 4 | # http://www.amontec.com/jtagkey.shtml 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Amontec JTAGkey" 9 | ft2232_layout jtagkey 10 | ft2232_vid_pid 0x0403 0xcff8 11 | 12 | -------------------------------------------------------------------------------- /tcl/target/at91sam3uxx.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam3, a CORTEX-M3 chip 2 | # 3 | # at91sam3u4e 4 | # at91sam3u2e 5 | # at91sam3u1e 6 | # at91sam3u4c 7 | # at91sam3u2c 8 | # at91sam3u1c 9 | 10 | source [find target/at91sam3XXX.cfg] 11 | 12 | -------------------------------------------------------------------------------- /tcl/target/stm32xl.cfg: -------------------------------------------------------------------------------- 1 | # script for stm32xl family (dual flash bank) 2 | source [find target/stm32f1x.cfg] 3 | 4 | # flash size will be probed 5 | set _FLASHNAME $_CHIPNAME.flash1 6 | flash bank $_FLASHNAME stm32f1x 0x08080000 0 0 0 $_TARGETNAME 7 | -------------------------------------------------------------------------------- /tcl/board/ti_am335xevm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI AM335x Evaluation Module 3 | # 4 | # For more information please see http://www.ti.com/tool/tmdxevm3358 5 | # 6 | jtag_rclk 6000 7 | 8 | source [find target/am335x.cfg] 9 | 10 | reset_config trst_and_srst 11 | -------------------------------------------------------------------------------- /tcl/interface/jtagkey2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey2 3 | # 4 | # http://www.amontec.com/jtagkey2.shtml 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Amontec JTAGkey-2" 9 | ft2232_layout jtagkey 10 | ft2232_vid_pid 0x0403 0xCFF8 11 | 12 | -------------------------------------------------------------------------------- /tcl/target/at91sam3u1c.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | 8 | 9 | -------------------------------------------------------------------------------- /tcl/target/at91sam3u1e.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | 8 | 9 | -------------------------------------------------------------------------------- /tcl/target/at91sam3u2c.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | 8 | 9 | -------------------------------------------------------------------------------- /tcl/target/at91sam3u2e.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | 8 | 9 | -------------------------------------------------------------------------------- /testing/examples/AT91R40008Test/prj/at91r40008_reset.script: -------------------------------------------------------------------------------- 1 | wait_halt 2 | sleep 10 3 | poll 4 | # Ethernut 3 remapping is required to access external flash memory. 5 | mww 0xffe00000 0x1000213d 6 | mww 0xffe00004 0x20003e3d 7 | mww 0xffe00020 0x00000001 8 | -------------------------------------------------------------------------------- /tcl/chip/st/stm32/stm32.tcl: -------------------------------------------------------------------------------- 1 | source [find bitsbytes.tcl] 2 | source [find cpu/arm/cortex_m3.tcl] 3 | source [find memory.tcl] 4 | source [find mmr_helpers.tcl] 5 | 6 | source [find chip/st/stm32/stm32_regs.tcl] 7 | source [find chip/st/stm32/stm32_rcc.tcl] 8 | -------------------------------------------------------------------------------- /tcl/interface/jtagkey2p.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey2P 3 | # 4 | # http://www.amontec.com/jtagkey2p.shtml 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Amontec JTAGkey-2P" 9 | ft2232_layout jtagkey 10 | ft2232_vid_pid 0x0403 0xCFF8 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/signalyzer.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer Tool (DT-USB-ST) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer" 9 | ft2232_layout signalyzer 10 | ft2232_vid_pid 0x0403 0xbca0 11 | 12 | -------------------------------------------------------------------------------- /tcl/board/olimex_stm32_h107.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex STM32-H107 3 | # 4 | # http://olimex.com/dev/stm32-h107.html 5 | # 6 | 7 | # Work-area size (RAM size) = 64kB for STM32F107VC device 8 | set WORKAREASIZE 0x10000 9 | 10 | source [find target/stm32f1x.cfg] 11 | -------------------------------------------------------------------------------- /tcl/board/olimex_stm32_p107.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex STM32-P107 3 | # 4 | # http://olimex.com/dev/stm32-p107.html 5 | # 6 | 7 | # Work-area size (RAM size) = 64kB for STM32F107VC device 8 | set WORKAREASIZE 0x10000 9 | 10 | source [find target/stm32f1x.cfg] 11 | -------------------------------------------------------------------------------- /tcl/board/stm32100b_eval.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32 eval board with a single STM32F100VBT6 chip. 2 | # http://www.st.com/internet/evalboard/product/247099.jsp 3 | 4 | # The chip has only 8KB sram 5 | set WORKAREASIZE 0x2000 6 | 7 | source [find target/stm32f1x.cfg] 8 | -------------------------------------------------------------------------------- /tcl/interface/hitex_str9-comstick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex STR9-comStick 3 | # 4 | # http://www.hitex.com/index.php?id=383 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "STR9-comStick" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x002c 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/jtag-lock-pick_tiny_2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # DISTORTEC JTAG-lock-pick Tiny 2 3 | # 4 | # http://www.distortec.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "JTAG-lock-pick Tiny 2" 9 | ft2232_layout ktlink 10 | ft2232_vid_pid 0x0403 0x8220 11 | -------------------------------------------------------------------------------- /tcl/interface/signalyzer-h2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer H2 (DT-USB-SH2) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer H2" 9 | ft2232_layout signalyzer-h 10 | ft2232_vid_pid 0x0403 0xbca2 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/signalyzer-h4.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer H4 (DT-USB-SH4) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer H4" 9 | ft2232_layout signalyzer-h 10 | ft2232_vid_pid 0x0403 0xbca4 11 | 12 | -------------------------------------------------------------------------------- /tcl/target/at91sam3ax_xx.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam3, a CORTEX-M3 chip 2 | # 3 | # at91sam3A4C 4 | # at91sam3A8C 5 | # at91sam3X4C 6 | # at91sam3X4E 7 | # at91sam3X8C 8 | # at91sam3X8E 9 | # at91sam3X8H 10 | source [find target/at91sam3XXX.cfg] 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/flyswatter.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TinCanTools Flyswatter 3 | # 4 | # http://www.tincantools.com/product.php?productid=16134 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Flyswatter" 9 | ft2232_layout "flyswatter" 10 | ft2232_vid_pid 0x0403 0x6010 11 | -------------------------------------------------------------------------------- /tcl/interface/signalyzer-lite.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer LITE (DT-USB-SLITE) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer LITE" 9 | ft2232_layout signalyzer 10 | ft2232_vid_pid 0x0403 0xbca1 11 | 12 | -------------------------------------------------------------------------------- /src/pld/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | METASOURCES = AUTO 4 | noinst_LTLIBRARIES = libpld.la 5 | noinst_HEADERS = pld.h xilinx_bit.h virtex2.h 6 | libpld_la_SOURCES = pld.c xilinx_bit.c virtex2.c 7 | 8 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 9 | -------------------------------------------------------------------------------- /tcl/board/arm_evaluator7t.cfg: -------------------------------------------------------------------------------- 1 | # This board is from ARM and has an samsung s3c45101x01 chip 2 | 3 | source [find target/samsung_s3c4510.cfg] 4 | 5 | # 6 | # FIXME: 7 | # Add (A) sdram configuration 8 | # Add (B) flash cfi programing configuration 9 | # 10 | 11 | -------------------------------------------------------------------------------- /tcl/interface/flyswatter2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TinCanTools Flyswatter 2 3 | # 4 | # http://www.tincantools.com/product.php?productid=16153 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Flyswatter2" 9 | ft2232_layout "flyswatter2" 10 | ft2232_vid_pid 0x0403 0x6010 11 | -------------------------------------------------------------------------------- /tcl/interface/neodb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Openmoko USB JTAG/RS232 adapter 3 | # 4 | # http://wiki.openmoko.org/wiki/Debug_Board_v3 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Debug Board for Neo1973" 9 | ft2232_layout jtagkey 10 | ft2232_vid_pid 0x1457 0x5118 11 | -------------------------------------------------------------------------------- /tcl/interface/ngxtech.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # NGX ARM USB JTAG 3 | # 4 | # http://shop.ngxtechnologies.com/product_info.php?cPath=26&products_id=30 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "NGX JTAG A" 9 | ft2232_vid_pid 0x0403 0x6010 10 | ft2232_layout "oocdlink" 11 | -------------------------------------------------------------------------------- /tcl/interface/olimex-arm-usb-ocd.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-OCD 3 | # 4 | # http://www.olimex.com/dev/arm-usb-ocd.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG" 9 | ft2232_layout olimex-jtag 10 | ft2232_vid_pid 0x15ba 0x0003 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/stm32-stick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex STM32-PerformanceStick 3 | # 4 | # http://www.hitex.com/index.php?id=340 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "STM32-PerformanceStick" 9 | ft2232_layout stm32stick 10 | ft2232_vid_pid 0x0640 0x002d 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/calao-usb-a9260.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260 common -C01 -C02 setup 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | # See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg. 7 | # 8 | 9 | adapter_nsrst_delay 200 10 | jtag_ntrst_delay 200 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/olimex-jtag-tiny.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-TINY 3 | # 4 | # http://www.olimex.com/dev/arm-usb-tiny.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG TINY" 9 | ft2232_layout olimex-jtag 10 | ft2232_vid_pid 0x15ba 0x0004 11 | 12 | -------------------------------------------------------------------------------- /src/transport/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | #METASOURCES = AUTO 4 | noinst_LTLIBRARIES = libtransport.la 5 | libtransport_la_SOURCES = \ 6 | transport.c 7 | 8 | noinst_HEADERS = \ 9 | transport.h 10 | 11 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 12 | -------------------------------------------------------------------------------- /tcl/board/stm3210c_eval.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32 eval board with a single STM32F107VCT chip. 2 | # http://www.st.com/internet/evalboard/product/217965.jsp 3 | 4 | # increase working area to 32KB for faster flash programming 5 | set WORKAREASIZE 0x8000 6 | 7 | source [find target/stm32f1x.cfg] 8 | -------------------------------------------------------------------------------- /tcl/board/stm32vldiscovery.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32VL discovery board with a single STM32F100RB chip. 2 | # http://www.st.com/internet/evalboard/product/250863.jsp 3 | 4 | source [find interface/stlink-v1.cfg] 5 | 6 | set WORKAREASIZE 0x2000 7 | source [find target/stm32f1x_stlink.cfg] 8 | 9 | -------------------------------------------------------------------------------- /tcl/interface/olimex-arm-usb-ocd-h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-OCD-H 3 | # 4 | # http://www.olimex.com/dev/arm-usb-ocd.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG ARM-USB-OCD-H" 9 | ft2232_layout olimex-jtag 10 | ft2232_vid_pid 0x15ba 0x002b 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/oocdlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Joern Kaipf's OOCDLink 3 | # 4 | # http://www.joernonline.de/contrexx2/cms/index.php?page=126 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "OOCDLink" 9 | ft2232_layout oocdlink 10 | ft2232_vid_pid 0x0403 0xbaf8 11 | adapter_khz 5 12 | 13 | -------------------------------------------------------------------------------- /tcl/interface/turtelizer2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # egnite Turtelizer 2 3 | # 4 | # http://www.ethernut.de/en/hardware/turtelizer/index.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Turtelizer JTAG/RS232 Adapter" 9 | ft2232_layout turtelizer2 10 | ft2232_vid_pid 0x0403 0xbdc8 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/usbprog.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Embedded Projects USBprog 3 | # 4 | # http://embedded-projects.net/index.php?page_id=135 5 | # 6 | 7 | interface usbprog 8 | # USBprog is broken w/short TMS sequences, this is a workaround 9 | # until the C code can be fixed. 10 | tms_sequence long 11 | -------------------------------------------------------------------------------- /tcl/board/stm3210b_eval.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32 eval board with a single STM32F10x (128KB) chip. 2 | # http://www.st.com/internet/evalboard/product/176090.jsp 3 | 4 | # increase working area to 32KB for faster flash programming 5 | set WORKAREASIZE 0x8000 6 | 7 | source [find target/stm32f1x.cfg] 8 | -------------------------------------------------------------------------------- /tcl/interface/altera-usb-blaster.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Altera USB-Blaster 3 | # 4 | # http://www.altera.com/literature/ug/ug_usb_blstr.pdf 5 | # 6 | 7 | interface usb_blaster 8 | # These are already the defaults. 9 | # usb_blaster_vid_pid 0x09FB 0x6001 10 | # usb_blaster_device_desc "USB-Blaster" 11 | -------------------------------------------------------------------------------- /tcl/interface/olimex-arm-usb-tiny-h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-TINY-H 3 | # 4 | # http://www.olimex.com/dev/arm-usb-tiny-h.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" 9 | ft2232_layout olimex-jtag 10 | ft2232_vid_pid 0x15ba 0x002a 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/openocd-usb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hubert Hoegl's USB to JTAG 3 | # 4 | # http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_vid_pid 0x0403 0x6010 9 | ft2232_device_desc "Dual RS232" 10 | ft2232_layout "oocdlink" 11 | ft2232_latency 2 12 | -------------------------------------------------------------------------------- /tcl/board/ti_beagleboard.cfg: -------------------------------------------------------------------------------- 1 | # OMAP3 BeagleBoard 2 | # http://beagleboard.org 3 | 4 | # Fall back to 6MHz if RTCK is not supported 5 | jtag_rclk 6000 6 | 7 | source [find target/omap3530.cfg] 8 | 9 | # TI-14 JTAG connector 10 | reset_config trst_only 11 | 12 | # Later run: omap3_dbginit 13 | -------------------------------------------------------------------------------- /tcl/interface/minimodule.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FTDI MiniModule 3 | # 4 | # http://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_FT2232H_Mini_Module.pdf 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "FT2232H MiniModule" 9 | ft2232_layout "minimodule" 10 | ft2232_vid_pid 0x0403 0x6010 11 | -------------------------------------------------------------------------------- /tcl/interface/xds100v2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Texas Instruments XDS100v2 3 | # 4 | # http://processors.wiki.ti.com/index.php/XDS100#XDS100v2_Features 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Texas Instruments Inc.XDS100 Ver 2.0" 9 | ft2232_layout xds100v2 10 | ft2232_vid_pid 0x0403 0xa6d0 11 | -------------------------------------------------------------------------------- /testing/examples/LPC2148Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | monitor mww 0xE01FC040 0x0002 8 | monitor mdw 0xE01FC040 9 | load 10 | break main 11 | continue -------------------------------------------------------------------------------- /testing/examples/LPC2294Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | monitor mww 0xE01FC040 0x0002 8 | monitor mdw 0xE01FC040 9 | load 10 | break main 11 | continue -------------------------------------------------------------------------------- /testing/examples/STR710Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | monitor mww 0xA0000050 0x01c2 8 | monitor mdw 0xA0000050 9 | load 10 | break main 11 | continue -------------------------------------------------------------------------------- /tcl/board/linksys_nslu2.cfg: -------------------------------------------------------------------------------- 1 | # This is for the LinkSys (CISCO) NSLU2 board 2 | # It is an Intel XSCALE IXP420 CPU. 3 | 4 | source [find target/ixp42x.cfg] 5 | # The _TARGETNAME is set by the above. 6 | 7 | $_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x10000 -work-area-backup 0 8 | 9 | -------------------------------------------------------------------------------- /testing/examples/LPC2148Test/prj/eclipse_rom.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 force_hw_bkpts enable 7 | monitor mww 0xE01FC040 0x0002 8 | monitor mdw 0xE01FC040 9 | load 10 | break main 11 | continue -------------------------------------------------------------------------------- /testing/examples/LPC2294Test/prj/eclipse_rom.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 force_hw_bkpts enable 7 | monitor mww 0xE01FC040 0x0002 8 | monitor mdw 0xE01FC040 9 | load 10 | break main 11 | continue -------------------------------------------------------------------------------- /testing/examples/STR710Test/prj/eclipse_rom.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 force_hw_bkpts enable 7 | monitor mww 0xA0000050 0x01c2 8 | monitor mdw 0xA0000050 9 | load 10 | break main 11 | continue -------------------------------------------------------------------------------- /tcl/interface/hilscher_nxhx50_etm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 50-ETM 3 | # 4 | # http://de.hilscher.com/files_design/8/NXHX50-ETM_description_Rev01_EN.pdf 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "NXHX 50-ETM" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x0028 11 | adapter_khz 6000 12 | -------------------------------------------------------------------------------- /tcl/board/hitex_lpc1768stick.cfg: -------------------------------------------------------------------------------- 1 | # Hitex LPC1768 Stick 2 | # 3 | # http://www.hitex.com/?id=1602 4 | # 5 | 6 | reset_config trst_and_srst 7 | 8 | source [find interface/ftdi/hitex_lpc1768stick.cfg] 9 | 10 | source [find target/lpc1768.cfg] 11 | 12 | 13 | # startup @ 500kHz 14 | adapter_khz 500 15 | 16 | -------------------------------------------------------------------------------- /tcl/interface/hilscher_nxhx10_etm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 10-ETM 3 | # 4 | # http://de.hilscher.com/products_details_hardware.html?p_id=P_4ce145a5983e6 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "NXHX 10-ETM" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x0028 11 | adapter_khz 6000 12 | -------------------------------------------------------------------------------- /tcl/interface/hilscher_nxhx500_etm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 500-ETM 3 | # 4 | # http://de.hilscher.com/files_design/8/NXHX500-ETM_description_Rev01_EN.pdf 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "NXHX 500-ETM" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x0028 11 | adapter_khz 6000 12 | -------------------------------------------------------------------------------- /tcl/interface/hilscher_nxhx50_re.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 50-RE 3 | # 4 | # http://de.hilscher.com/products_details_hardware.html?p_id=P_483c0f582ad36&bs=20 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "NXHX50-RE" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x0028 11 | adapter_khz 6000 12 | -------------------------------------------------------------------------------- /tcl/interface/hilscher_nxhx500_re.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 500-RE 3 | # 4 | # http://de.hilscher.com/products_details_hardware.html?p_id=P_461ff2053bad1&bs=20 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "NXHX 500-RE" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x0028 11 | adapter_khz 6000 12 | -------------------------------------------------------------------------------- /tcl/interface/openrd.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Marvell OpenRD 3 | # 4 | # http://www.marvell.com/products/embedded_processors/developer/kirkwood/openrd.jsp 5 | # 6 | 7 | interface ft2232 8 | ft2232_layout sheevaplug 9 | ft2232_vid_pid 0x0403 0x9e90 10 | ft2232_device_desc "OpenRD JTAGKey FT2232D B" 11 | adapter_khz 3000 12 | 13 | -------------------------------------------------------------------------------- /tcl/interface/openocd-usb-hs.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # embedded projects openocd usb adapter v3 3 | # 4 | # http://shop.embedded-projects.net/index.php?module=artikel&action=artikel&id=14 5 | # 6 | 7 | interface ft2232 8 | ft2232_vid_pid 0x0403 0x6010 9 | ft2232_device_desc "Dual RS232-HS" 10 | ft2232_layout "oocdlink" 11 | ft2232_latency 2 12 | -------------------------------------------------------------------------------- /tcl/interface/calao-usb-a9260-c01.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260-C01 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | 7 | interface ft2232 8 | ft2232_layout jtagkey 9 | ft2232_device_desc "USB-A9260" 10 | ft2232_vid_pid 0x0403 0x6010 11 | script interface/calao-usb-a9260.cfg 12 | script target/at91sam9260minimal.cfg 13 | 14 | -------------------------------------------------------------------------------- /tcl/interface/calao-usb-a9260-c02.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260-C02 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | 7 | interface ft2232 8 | ft2232_layout jtagkey 9 | ft2232_device_desc "USB-A9260" 10 | ft2232_vid_pid 0x0403 0x6001 11 | script interface/calao-usb-a9260.cfg 12 | script target/at91sam9260minimal.cfg 13 | 14 | -------------------------------------------------------------------------------- /tcl/board/olimex_LPC2378STK.cfg: -------------------------------------------------------------------------------- 1 | ##################################################### 2 | # Olimex LPC2378STK eval board 3 | # 4 | # http://olimex.com/dev/lpc-2378stk.html 5 | # 6 | # Author: Sten, debian@sansys-electronic.com 7 | ##################################################### 8 | # 9 | 10 | source [find target/lpc2378.cfg] 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/cortino.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex Cortino 3 | # 4 | # http://www.hitex.com/index.php?id=cortino 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Cortino" 9 | ftdi_vid_pid 0x0640 0x0032 10 | 11 | ftdi_layout_init 0x0108 0x010b 12 | ftdi_layout_signal nTRST -data 0x0100 13 | ftdi_layout_signal nSRST -data 0x0200 -oe 0x0200 14 | -------------------------------------------------------------------------------- /tcl/board/phone_se_j100i.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Sony Ericsson J100I Phone 3 | # 4 | # more informations can be found on 5 | # http://bb.osmocom.org/trac/wiki/SonyEricssonJ100i 6 | # 7 | source [find target/ti_calypso.cfg] 8 | 9 | # external flash 10 | 11 | set _FLASHNAME $_CHIPNAME.flash 12 | flash bank $_FLASHNAME cfi 0x00000000 0x400000 2 2 $_TARGETNAME 13 | -------------------------------------------------------------------------------- /tcl/interface/redbee-usb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Redwire Redbee-USB 3 | # 4 | # http://www.redwirellc.com 5 | # 6 | # The Redbee-USB has an onboard FT2232H with: 7 | # - FT2232H channel B wired to mc13224v JTAG 8 | # - FT2232H channel A wired to mc13224v UART1 9 | # 10 | 11 | interface ft2232 12 | ft2232_layout redbee-usb 13 | ft2232_vid_pid 0x0403 0x6010 14 | -------------------------------------------------------------------------------- /tcl/interface/sheevaplug.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Marvel SheevaPlug Development Kit 3 | # 4 | # http://www.marvell.com/products/embedded_processors/developer/kirkwood/sheevaplug.jsp 5 | # 6 | 7 | interface ft2232 8 | ft2232_layout sheevaplug 9 | ft2232_vid_pid 0x9e88 0x9e8f 10 | ft2232_device_desc "SheevaPlug JTAGKey FT2232D B" 11 | adapter_khz 2000 12 | 13 | -------------------------------------------------------------------------------- /tcl/board/stm3220g_eval.cfg: -------------------------------------------------------------------------------- 1 | # STM3220G-EVAL: This is an STM32F2 eval board with a single STM32F207IGH6 2 | # (128KB) chip. 3 | # http://www.st.com/internet/evalboard/product/250374.jsp 4 | 5 | # increase working area to 128KB 6 | set WORKAREASIZE 0x20000 7 | 8 | # chip name 9 | set CHIPNAME STM32F207IGH6 10 | 11 | source [find target/stm32f2x.cfg] 12 | -------------------------------------------------------------------------------- /tcl/board/stm3241g_eval.cfg: -------------------------------------------------------------------------------- 1 | # STM3241G-EVAL: This is an STM32F4 eval board with a single STM32F417IGH6 2 | # (1024KB) chip. 3 | # http://www.st.com/internet/evalboard/product/252216.jsp 4 | 5 | # increase working area to 128KB 6 | set WORKAREASIZE 0x20000 7 | 8 | # chip name 9 | set CHIPNAME STM32F417IGH6 10 | 11 | source [find target/stm32f4x.cfg] 12 | -------------------------------------------------------------------------------- /tcl/board/stm32f3discovery.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32F3 discovery board with a single STM32F303VCT6 chip. 2 | # http://www.st.com/internet/evalboard/product/254044.jsp 3 | 4 | source [find interface/stlink-v2.cfg] 5 | 6 | source [find target/stm32f3x_stlink.cfg] 7 | 8 | # use hardware reset, connect under reset 9 | reset_config srst_only srst_nogate 10 | -------------------------------------------------------------------------------- /tcl/board/stm32f4discovery.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32F4 discovery board with a single STM32F407VGT6 chip. 2 | # http://www.st.com/internet/evalboard/product/252419.jsp 3 | 4 | source [find interface/stlink-v2.cfg] 5 | 6 | source [find target/stm32f4x_stlink.cfg] 7 | 8 | # use hardware reset, connect under reset 9 | reset_config srst_only srst_nogate 10 | -------------------------------------------------------------------------------- /tcl/board/ti_beagleboard_xm.cfg: -------------------------------------------------------------------------------- 1 | # BeagleBoard xM (DM37x) 2 | # http://beagleboard.org 3 | 4 | set CHIPTYPE "dm37x" 5 | source [find target/amdm37x.cfg] 6 | 7 | # The TI-14 JTAG connector does not have srst. CPU reset is handled in 8 | # hardware. 9 | reset_config trst_only 10 | 11 | # "amdm37x_dbginit dm37x.cpu" needs to be run after init. 12 | 13 | -------------------------------------------------------------------------------- /tcl/chip/atmel/at91/hardware.cfg: -------------------------------------------------------------------------------- 1 | # External Memory Map 2 | set AT91_CHIPSELECT_0 0x10000000 3 | set AT91_CHIPSELECT_1 0x20000000 4 | set AT91_CHIPSELECT_2 0x30000000 5 | set AT91_CHIPSELECT_3 0x40000000 6 | set AT91_CHIPSELECT_4 0x50000000 7 | set AT91_CHIPSELECT_5 0x60000000 8 | set AT91_CHIPSELECT_6 0x70000000 9 | set AT91_CHIPSELECT_7 0x80000000 10 | -------------------------------------------------------------------------------- /tcl/target/stm32lx_dual_bank.cfg: -------------------------------------------------------------------------------- 1 | # The stm32lx 384kb have a dual bank flash. 2 | # Let's add a definition for the second bank here. 3 | 4 | # script for stm32lx family 5 | source [find target/stm32l1x_stlink.cfg] 6 | 7 | # Add the second flash bank. 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME stm32lx 0x8030000 0 0 0 $_TARGETNAME 10 | -------------------------------------------------------------------------------- /tcl/board/microchip_explorer16.cfg: -------------------------------------------------------------------------------- 1 | # Microchip Explorer 16 with PIC32MX360F512L PIM module. 2 | # http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en024858 3 | 4 | # TAPID for PIC32MX360F512L 5 | set CPUTAPID 0x30938053 6 | 7 | # use 32k working area 8 | set WORKAREASIZE 32768 9 | 10 | source [find target/pic32mx.cfg] 11 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/hitex_str9-comstick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex STR9-comStick 3 | # 4 | # http://www.hitex.com/index.php?id=383 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "STR9-comStick" 9 | ftdi_vid_pid 0x0640 0x002c 10 | 11 | ftdi_layout_init 0x0108 0x010b 12 | ftdi_layout_signal nTRST -data 0x0100 13 | ftdi_layout_signal nSRST -data 0x0200 -oe 0x0200 14 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/jtagkey.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey 3 | # 4 | # http://www.amontec.com/jtagkey.shtml 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Amontec JTAGkey" 9 | ftdi_vid_pid 0x0403 0xcff8 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 13 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 14 | -------------------------------------------------------------------------------- /common.mk: -------------------------------------------------------------------------------- 1 | 2 | # common flags used in openocd build 3 | AM_CPPFLAGS = -I$(top_srcdir)/src \ 4 | -I$(top_builddir)/src \ 5 | -I$(top_srcdir)/src/helper \ 6 | -DPKGDATADIR=\"$(pkgdatadir)\" \ 7 | -DPKGLIBDIR=\"$(pkglibdir)\" 8 | 9 | if INTERNAL_JIMTCL 10 | AM_CPPFLAGS += -I$(top_srcdir)/jimtcl \ 11 | -I$(top_builddir)/jimtcl 12 | endif 13 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/hitex_lpc1768stick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex LPC1768-Stick 3 | # 4 | # http://www.hitex.com/?id=1602 5 | # 6 | 7 | 8 | interface ftdi 9 | ftdi_device_desc "LPC1768-Stick" 10 | ftdi_vid_pid 0x0640 0x0026 11 | 12 | ftdi_layout_init 0x0388 0x038b 13 | ftdi_layout_signal nTRST -data 0x0100 14 | ftdi_layout_signal nSRST -data 0x0080 -noe 0x200 15 | 16 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/jtagkey2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey2 3 | # 4 | # http://www.amontec.com/jtagkey2.shtml 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Amontec JTAGkey-2" 9 | ftdi_vid_pid 0x0403 0xcff8 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 13 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 14 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/jtagkey2p.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey2P 3 | # 4 | # http://www.amontec.com/jtagkey2p.shtml 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Amontec JTAGkey-2P" 9 | ftdi_vid_pid 0x0403 0xcff8 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 13 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 14 | -------------------------------------------------------------------------------- /doc/manual/app.txt: -------------------------------------------------------------------------------- 1 | /** @page appdocs OpenOCD Application APIs 2 | 3 | The top-level APIs in the OpenOCD library allow applications to integrate 4 | all of the low-level functionality using a set of simple function calls. 5 | 6 | These function calls do not exist in a re-usable form, but 7 | contributions to create and document them will be welcome. 8 | 9 | */ 10 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/stm32-stick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex STM32-PerformanceStick 3 | # 4 | # http://www.hitex.com/index.php?id=340 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "STM32-PerformanceStick" 9 | ftdi_vid_pid 0x0640 0x002d 10 | 11 | ftdi_layout_init 0x0388 0x038b 12 | ftdi_layout_signal nTRST -data 0x0100 13 | ftdi_layout_signal nSRST -data 0x0080 -noe 0x200 14 | -------------------------------------------------------------------------------- /tcl/interface/parport.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Parallel port wiggler (many clones available) on port 0x378 3 | # 4 | # Addresses: 0x378/LPT1 or 0x278/LPT2 ... 5 | # 6 | 7 | if { [info exists PARPORTADDR] } { 8 | set _PARPORTADDR $PARPORTADDR 9 | } else { 10 | set _PARPORTADDR 0x378 11 | } 12 | 13 | interface parport 14 | parport_port $_PARPORTADDR 15 | parport_cable wiggler 16 | -------------------------------------------------------------------------------- /tcl/board/stm32f0discovery.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32F0 discovery board with a single STM32F051R8T6 chip. 2 | # http://www.st.com/internet/evalboard/product/253215.jsp 3 | 4 | source [find interface/stlink-v2.cfg] 5 | 6 | set WORKAREASIZE 0x2000 7 | source [find target/stm32f0x_stlink.cfg] 8 | 9 | # use hardware reset, connect under reset 10 | reset_config srst_only srst_nogate 11 | -------------------------------------------------------------------------------- /tcl/board/stm32ldiscovery.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32L discovery board with a single STM32L152RBT6 chip. 2 | # http://www.st.com/internet/evalboard/product/250990.jsp 3 | 4 | source [find interface/stlink-v2.cfg] 5 | 6 | set WORKAREASIZE 0x4000 7 | source [find target/stm32lx_stlink.cfg] 8 | 9 | # use hardware reset, connect under reset 10 | reset_config srst_only srst_nogate 11 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/kt-link.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Kristech KT-Link 3 | # 4 | # http://www.kristech.eu 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "KT-LINK" 9 | ftdi_vid_pid 0x0403 0xbbe2 10 | 11 | ftdi_layout_init 0x8c28 0xff3b 12 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 13 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 14 | ftdi_layout_signal LED -data 0x8000 15 | -------------------------------------------------------------------------------- /tcl/board/crossbow_tech_imote2.cfg: -------------------------------------------------------------------------------- 1 | # Crossbow Technology iMote2 2 | 3 | set CHIPNAME imote2 4 | source [find target/pxa270.cfg] 5 | 6 | # longer-than-normal reset delay 7 | adapter_nsrst_delay 800 8 | 9 | reset_config trst_and_srst separate 10 | 11 | # works for P30 flash 12 | set _FLASHNAME $_CHIPNAME.flash 13 | flash bank $_FLASHNAME cfi 0x00000000 0x2000000 2 2 $_TARGETNAME 14 | -------------------------------------------------------------------------------- /tcl/interface/redbee-econotag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Redwire Redbee-Econotag 3 | # 4 | # http://www.redwirellc.com/store/node/1 5 | # 6 | # The Redbee-Econotag has an onboard FT2232H with: 7 | # - FT2232H channel A wired to mc13224v JTAG 8 | # - FT2232H channel B wired to mc13224v UART1 9 | # 10 | 11 | interface ft2232 12 | ft2232_layout redbee-econotag 13 | ft2232_vid_pid 0x0403 0x6010 14 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/openocd-usb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hubert Hoegl's USB to JTAG 3 | # 4 | # http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Dual RS232" 9 | ftdi_vid_pid 0x0403 0x6010 10 | 11 | ftdi_layout_init 0x0508 0x0f1b 12 | ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 13 | ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 14 | -------------------------------------------------------------------------------- /src/server/startup.tcl: -------------------------------------------------------------------------------- 1 | # Defines basic Tcl procs for OpenOCD server modules 2 | 3 | # Handle GDB 'R' packet. Can be overridden by configuration script, 4 | # but it's not something one would expect target scripts to do 5 | # normally 6 | proc ocd_gdb_restart {target_id} { 7 | # Fix!!! we're resetting all targets here! Really we should reset only 8 | # one target 9 | reset halt 10 | } 11 | -------------------------------------------------------------------------------- /tcl/interface/parport_dlc5.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xilinx Parallel Cable III 'DLC 5' (and various clones) 3 | # 4 | # http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html 5 | # 6 | 7 | if { [info exists PARPORTADDR] } { 8 | set _PARPORTADDR $PARPORTADDR 9 | } else { 10 | set _PARPORTADDR 0 11 | } 12 | 13 | interface parport 14 | parport_port $_PARPORTADDR 15 | parport_cable dlc5 16 | 17 | -------------------------------------------------------------------------------- /tcl/board/ti_beaglebone.cfg: -------------------------------------------------------------------------------- 1 | # AM335x Beaglebone 2 | # http://beagleboard.org/bone 3 | 4 | # The JTAG interface is built directly on the board. 5 | interface ft2232 6 | #ft2232_device_desc "BeagleBone A" 7 | ft2232_layout xds100v2 8 | ft2232_vid_pid 0x0403 0xa6d0 0x0403 0x6010 9 | 10 | adapter_khz 16000 11 | 12 | source [find target/am335x.cfg] 13 | 14 | reset_config trst_and_srst 15 | 16 | 17 | -------------------------------------------------------------------------------- /tcl/interface/opendous_ftdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Opendous 3 | # 4 | # http://code.google.com/p/opendous/wiki/JTAG 5 | # 6 | # According to the website, it is similar to jtagkey, but it uses channel B 7 | # (and it has a different pid number). 8 | # 9 | 10 | interface ft2232 11 | ft2232_device_desc "Dual RS232-HS" 12 | ft2232_layout jtagkey 13 | ft2232_vid_pid 0x0403 0x6010 14 | ft2232_channel 2 15 | 16 | -------------------------------------------------------------------------------- /tcl/target/at91sam3ax_4x.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3ax_xx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash0 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | # This is a 256K chip - it has the 2nd bank 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME at91sam3 0x0000A0000 0 1 1 $_TARGETNAME 10 | -------------------------------------------------------------------------------- /tcl/target/at91sam3sXX.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam3, a CORTEX-M3 chip 2 | # 3 | # at91sam3s4c 4 | # at91sam3s4b 5 | # at91sam3s4a 6 | # at91sam3s2c 7 | # at91sam3s2b 8 | # at91sam3s2a 9 | # at91sam3s1c 10 | # at91sam3s1b 11 | # at91sam3s1a 12 | 13 | source [find target/at91sam3XXX.cfg] 14 | 15 | set _FLASHNAME $_CHIPNAME.flash 16 | flash bank $_FLASHNAME at91sam3 0x00400000 0 1 1 $_TARGETNAME 17 | -------------------------------------------------------------------------------- /tcl/board/colibri.cfg: -------------------------------------------------------------------------------- 1 | # Toradex Colibri PXA270 2 | source [find target/pxa270.cfg] 3 | reset_config trst_and_srst srst_push_pull 4 | adapter_nsrst_assert_width 40 5 | 6 | # CS0 -- one bank of CFI flash, 32 MBytes 7 | # the bank is 32-bits wide, two 16-bit chips in parallel 8 | set _FLASHNAME $_CHIPNAME.flash 9 | flash bank $_FLASHNAME cfi 0x00000000 0x02000000 2 4 $_TARGETNAME 10 | 11 | 12 | 13 | 14 | -------------------------------------------------------------------------------- /tcl/board/ek-lm4f232.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI Stellaris LM4F232 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm4f232 5 | # 6 | 7 | # 8 | # NOTE: using the bundled ICDI interface is optional! 9 | # This interface is not ftdi based as previous boards were 10 | # 11 | source [find interface/ti-icdi.cfg] 12 | 13 | set WORKAREASIZE 0x8000 14 | set CHIPNAME lm4f23x 15 | source [find target/stellaris_icdi.cfg] 16 | -------------------------------------------------------------------------------- /tcl/board/steval_pcc010.cfg: -------------------------------------------------------------------------------- 1 | # Use for the STM207VG plug-in board (1 MiB Flash and 112+16 KiB Ram 2 | # comming with the STEVAL-PCC010 board 3 | # http://www.st.com/internet/evalboard/product/251530.jsp 4 | # or any other board with only a STM32F2x in the JTAG chain 5 | 6 | # increase working area to 32KB for faster flash programming 7 | set WORKAREASIZE 0x8000 8 | 9 | source [find target/stm32f2x.cfg] 10 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/olimex-arm-usb-ocd.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-OCD 3 | # 4 | # http://www.olimex.com/dev/arm-usb-ocd.html 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Olimex OpenOCD JTAG" 9 | ftdi_vid_pid 0x15ba 0x0003 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nSRST -oe 0x0200 13 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 14 | ftdi_layout_signal LED -data 0x0800 15 | -------------------------------------------------------------------------------- /tcl/target/at91sam3u4c.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash0 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | # This is a 256K chip, it has the 2nd bank 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME at91sam3 0x000100000 0 1 1 $_TARGETNAME 10 | 11 | 12 | -------------------------------------------------------------------------------- /tcl/target/at91sam3u4e.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash0 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | # This is a 256K chip - it has the 2nd bank 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME at91sam3 0x000100000 0 1 1 $_TARGETNAME 10 | 11 | 12 | -------------------------------------------------------------------------------- /tcl/board/logicpd_imx27.cfg: -------------------------------------------------------------------------------- 1 | # The LogicPD Eval IMX27 eval board has a single IMX27 chip 2 | source [find target/imx27.cfg] 3 | 4 | # The Logic PD board has a NOR flash on CS0 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME cfi 0xc0000000 0x00200000 2 2 $_TARGETNAME 7 | 8 | # 9 | # FIX ME, Add support to 10 | # 11 | # (A) hard reset the board. 12 | # (B) Initialize the SDRAM on the board 13 | # 14 | -------------------------------------------------------------------------------- /tcl/board/smdk6410.cfg: -------------------------------------------------------------------------------- 1 | # Target configuration for the Samsung s3c6410 system on chip 2 | # Tested on a SMDK6410 3 | # Processor : ARM1176 4 | # Info: JTAG device found: 0x0032409d (Manufacturer: 0x04e, Part: 0x0324, Version: 0x0) 5 | 6 | source [find target/samsung_s3c6410.cfg] 7 | 8 | set _FLASHNAME $_CHIPNAME.flash 9 | flash bank $_FLASHNAME cfi 0x00000000 0x00100000 2 2 $_TARGETNAME jedec_probe 10 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/flyswatter2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TinCanTools Flyswatter2 3 | # 4 | # http://www.tincantools.com/product.php?productid=16134 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Flyswatter2" 9 | ftdi_vid_pid 0x0403 0x6010 10 | 11 | ftdi_layout_init 0x0538 0x057b 12 | ftdi_layout_signal LED -ndata 0x0400 13 | ftdi_layout_signal nTRST -data 0x0010 14 | ftdi_layout_signal nSRST -data 0x0020 -noe 0x0100 15 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/olimex-jtag-tiny.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-TINY 3 | # 4 | # http://www.olimex.com/dev/arm-usb-tiny.html 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Olimex OpenOCD JTAG TINY" 9 | ftdi_vid_pid 0x15ba 0x0004 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nSRST -oe 0x0200 13 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 14 | ftdi_layout_signal LED -data 0x0800 15 | -------------------------------------------------------------------------------- /tcl/target/at91sam3ax_8x.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3ax_xx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash0 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | # This is a 512K chip - it has the 2nd bank 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME at91sam3 0x0000C0000 0 1 1 $_TARGETNAME 10 | 11 | 12 | -------------------------------------------------------------------------------- /testing/examples/AT91R40008Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | monitor mww 0xFFE00000 0x1000213D 8 | monitor mww 0xFFE00004 0x20003E3D 9 | monitor mww 0xFFE00020 0x00000001 10 | monitor mdw 0xFFE00000 1 11 | monitor mdw 0xFFE00004 1 12 | load 13 | break main 14 | continue 15 | -------------------------------------------------------------------------------- /tcl/interface/dlp-usb1232h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # DLP Design DLP-USB1232H USB-to-UART/FIFO interface module 3 | # 4 | # http://www.dlpdesign.com/usb/usb1232h.shtml 5 | # 6 | # Schematics for OpenOCD usage: 7 | # http://randomprojects.org/wiki/DLP-USB1232H_and_OpenOCD_based_JTAG_adapter 8 | # 9 | 10 | interface ft2232 11 | ft2232_device_desc "Dual RS232-HS" 12 | ft2232_layout usbjtag 13 | ft2232_vid_pid 0x0403 0x6010 14 | 15 | -------------------------------------------------------------------------------- /testing/tcl_server.tcl: -------------------------------------------------------------------------------- 1 | # Simple tcl client to connect to openocd 2 | puts "Use empty line to exit" 3 | set fo [socket 127.0.0.1 6666] 4 | puts -nonewline stdout "> " 5 | flush stdout 6 | while {[gets stdin line] >= 0} { 7 | if {$line eq {}} break 8 | puts $fo $line 9 | flush $fo 10 | gets $fo line 11 | puts $line 12 | puts -nonewline stdout "> " 13 | flush stdout 14 | } 15 | close $fo 16 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/jtag-lock-pick_tiny_2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # DISTORTEC JTAG-lock-pick Tiny 2 3 | # 4 | # http://www.distortec.com 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "JTAG-lock-pick Tiny 2" 9 | ftdi_vid_pid 0x0403 0x8220 10 | 11 | ftdi_layout_init 0x8c28 0xff3b 12 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 13 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 14 | ftdi_layout_signal LED -ndata 0x8000 15 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s3748.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris lm3s3748 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s3748 5 | # 6 | 7 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 8 | # so is using it in JTAG mode, as done here. 9 | source [find interface/luminary.cfg] 10 | 11 | # 20k working area 12 | set WORKAREASIZE 0x4000 13 | set CHIPNAME lm3s3748 14 | source [find target/stellaris.cfg] 15 | -------------------------------------------------------------------------------- /tcl/interface/flashlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # ST FlashLINK JTAG parallel cable 3 | # 4 | # http://www.st.com/internet/evalboard/product/94023.jsp 5 | # http://www.st.com/stonline/products/literature/um/7889.pdf 6 | # 7 | 8 | if { [info exists PARPORTADDR] } { 9 | set _PARPORTADDR $PARPORTADDR 10 | } else { 11 | set _PARPORTADDR 0 12 | } 13 | 14 | interface parport 15 | parport_port $_PARPORTADDR 16 | parport_cable flashlink 17 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-OCD-H 3 | # 4 | # http://www.olimex.com/dev/arm-usb-ocd-h.html 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-OCD-H" 9 | ftdi_vid_pid 0x15ba 0x002b 10 | 11 | ftdi_layout_init 0x0c08 0x0f1b 12 | ftdi_layout_signal nSRST -oe 0x0200 13 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 14 | ftdi_layout_signal LED -data 0x0800 15 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/openocd-usb-hs.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # embedded projects openocd usb adapter v3 3 | # 4 | # http://shop.embedded-projects.net/index.php?module=artikel&action=artikel&id=14 5 | # 6 | 7 | interface ftdi 8 | ftdi_device_desc "Dual RS232-HS" 9 | ftdi_vid_pid 0x0403 0x6010 10 | 11 | ftdi_layout_init 0x0508 0x0f1b 12 | ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 13 | ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 14 | -------------------------------------------------------------------------------- /tcl/interface/ti-icdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI Stellaris In-Circuit Debug Interface (ICDI) Board 3 | # 4 | # This is the propriety ICDI interface used on newer boards such as 5 | # LM4F232 Evaluation Kit - http://www.ti.com/tool/ek-lm4f232 6 | # Stellaris Launchpad - http://www.ti.com/stellaris-launchpad 7 | # http://www.ti.com/tool/ek-lm4f232 8 | # 9 | 10 | interface hla 11 | hla_layout ti-icdi 12 | hla_vid_pid 0x1cbe 0x00fd 13 | 14 | -------------------------------------------------------------------------------- /testing/examples/PIC32/readme.txt: -------------------------------------------------------------------------------- 1 | Here you'll find a simple example tested with PIC32 Starter kit (source code and .elf file). It will blink repeatedly the LEDs on the board. 2 | The program was compiled and written on the target using MPLAB IDE v 8.0 that comes with the kit because openocd is missing currently the ability 3 | to program the flash for this specific target. It is possible in the future this limitation to be removed. 4 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s9d92.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S9D92 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s9d92 5 | # 6 | 7 | # NOTE: using the bundled FT2232 JTAG/SWD/SWO interface is optional! 8 | # so is using in JTAG mode, as done here. 9 | source [find interface/luminary-icdi.cfg] 10 | 11 | # 64k working area 12 | set WORKAREASIZE 0x10000 13 | set CHIPNAME lm3s9d92 14 | source [find target/stellaris.cfg] 15 | -------------------------------------------------------------------------------- /tcl/board/ek-lm4f120xl.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI Stellaris Launchpad ek-lm4f120xl Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm4f120xl 5 | # 6 | 7 | # 8 | # NOTE: using the bundled ICDI interface is optional! 9 | # This interface is not ftdi based as previous boards were 10 | # 11 | source [find interface/ti-icdi.cfg] 12 | 13 | set WORKAREASIZE 0x8000 14 | set CHIPNAME lm4f120h5qr 15 | source [find target/stellaris_icdi.cfg] 16 | -------------------------------------------------------------------------------- /tcl/board/kwikstik.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Freescale KwikStik development board 3 | # 4 | 5 | # 6 | # JLINK interface is onboard 7 | # 8 | source [find interface/jlink.cfg] 9 | 10 | jtag_rclk 100 11 | 12 | source [find target/k40.cfg] 13 | 14 | reset_config trst_and_srst 15 | 16 | # 17 | # Bank definition for the 'program flash' (instructions and/or data) 18 | # 19 | flash bank $_CHIPNAME.pflash kinetis 0x00000000 0x40000 0 4 $_TARGETNAME 20 | -------------------------------------------------------------------------------- /testing/examples/STR912Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | 8 | # Set SRAM size to 96 KB 9 | monitor mww 0x5C002034 0x0197 10 | monitor mdw 0x5C002034 11 | 12 | # Set Flash, Bank0 size to 512 KB 13 | monitor mww 0x54000000 0xf 14 | 15 | load 16 | break main 17 | continue 18 | 19 | 20 | 21 | 22 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s811-revb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S811 Evaluation Kits (rev B and earlier) 3 | # 4 | # http://www.ti.com/tool/ek-lm3s811 5 | # 6 | 7 | # NOTE: newer 811-EK boards (rev C and above) shouldn't use this. 8 | # use board/ek-lm3s811.cfg 9 | source [find interface/luminary-lm3s811.cfg] 10 | 11 | # include the target config 12 | set WORKAREASIZE 0x2000 13 | set CHIPNAME lm3s811 14 | source [find target/stellaris.cfg] 15 | -------------------------------------------------------------------------------- /tcl/board/twr-k60n512.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Freescale TWRK60N512 development board 3 | # 4 | 5 | source [find target/k60.cfg] 6 | 7 | $_TARGETNAME configure -event reset-init { 8 | puts "-event reset-init occured" 9 | } 10 | 11 | # 12 | # Bank definition for the 'program flash' (instructions and/or data) 13 | # 14 | flash bank pflash.0 kinetis 0x00000000 0x40000 0 4 $_TARGETNAME 15 | flash bank pflash.1 kinetis 0x00040000 0x40000 0 4 $_TARGETNAME 16 | -------------------------------------------------------------------------------- /tcl/chip/atmel/at91/pmc.tcl: -------------------------------------------------------------------------------- 1 | 2 | if [info exists AT91C_MAINOSC_FREQ] { 3 | # user set this... let it be. 4 | } { 5 | # 18.432mhz is a common thing... 6 | set AT91C_MAINOSC_FREQ 18432000 7 | } 8 | global AT91C_MAINOSC_FREQ 9 | 10 | if [info exists AT91C_SLOWOSC_FREQ] { 11 | # user set this... let it be. 12 | } { 13 | # 32khz is the norm 14 | set AT91C_SLOWOSC_FREQ 32768 15 | } 16 | global AT91C_SLOWOSC_FREQ 17 | 18 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s9b9x.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S9B9x Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s9b90 5 | # http://www.ti.com/tool/ek-lm3s9b92 6 | # 7 | 8 | # NOTE: using the bundled FT2232 JTAG/SWD/SWO interface is optional! 9 | # so is using in JTAG mode, as done here. 10 | source [find interface/luminary-icdi.cfg] 11 | 12 | set WORKAREASIZE 0x4000 13 | set CHIPNAME lm3s9b9x 14 | source [find target/stellaris.cfg] 15 | -------------------------------------------------------------------------------- /testing/examples/STR912Test/prj/eclipse_rom.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 force_hw_bkpts enable 7 | 8 | # Set SRAM size to 96 KB 9 | monitor mww 0x5C002034 0x0197 10 | monitor mdw 0x5C002034 11 | 12 | # Set Flash, Bank0 size to 512 KB 13 | monitor mww 0x54000000 0xf 14 | 15 | load 16 | break main 17 | continue 18 | 19 | 20 | 21 | 22 | -------------------------------------------------------------------------------- /tcl/target/at91sam9261.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9261 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9261 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | # Internal sram1 memory 14 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x28000 -work-area-backup 1 15 | -------------------------------------------------------------------------------- /tcl/target/at91sam9rl.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9RL 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9rl 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | # Internal sram1 memory 14 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x10000 -work-area-backup 1 15 | -------------------------------------------------------------------------------- /tcl/board/iar_lpc1768.cfg: -------------------------------------------------------------------------------- 1 | # Board from IAR KickStart Kit for LPC1768 2 | # See www.iar.com and also 3 | # http://www.olimex.com/dev/lpc-1766stk.html 4 | # 5 | 6 | source [find target/lpc1768.cfg] 7 | 8 | # The chip has just been reset. 9 | # 10 | $_TARGETNAME configure -event reset-init { 11 | # FIXME update the core clock to run at 100 MHz; 12 | # and update JTAG clocking similarly; then 13 | # make CCLK match, 14 | 15 | flash probe 0 16 | } 17 | 18 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s6965.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S6965 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s6965 5 | # 6 | 7 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 8 | # so is using it in JTAG mode, as done here. 9 | source [find interface/luminary.cfg] 10 | 11 | # 20k working area 12 | set WORKAREASIZE 0x5000 13 | set CHIPNAME lm3s6965 14 | # include the target config 15 | source [find target/stellaris.cfg] 16 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s8962.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S8962 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s8962 5 | # 6 | 7 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 8 | # so is using it in JTAG mode, as done here. 9 | source [find interface/luminary.cfg] 10 | 11 | # 64k working area 12 | set WORKAREASIZE 0x10000 13 | set CHIPNAME lm3s8962 14 | # include the target config 15 | source [find target/stellaris.cfg] 16 | -------------------------------------------------------------------------------- /tcl/interface/busblaster.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Dangerous Prototypes - Bus Blaster 3 | # 4 | # The Bus Blaster has a configurable buffer between the FTDI FT2232H and the 5 | # JTAG header which allows it to emulate various debugger types. It comes 6 | # configured as a JTAGkey device. 7 | # 8 | # http://dangerousprototypes.com/docs/Bus_Blaster 9 | # 10 | 11 | interface ft2232 12 | ft2232_device_desc "Dual RS232-HS" 13 | ft2232_layout jtagkey 14 | ft2232_vid_pid 0x0403 0x6010 15 | -------------------------------------------------------------------------------- /src/target/xscale/build.sh: -------------------------------------------------------------------------------- 1 | arm-none-eabi-gcc -c debug_handler.S -o debug_handler.o 2 | arm-none-eabi-ld -EL -n -Tdebug_handler.cmd debug_handler.o -o debug_handler.out 3 | arm-none-eabi-objcopy -O binary debug_handler.out debug_handler.bin 4 | 5 | #arm-none-eabi-gcc -mbig-endian -c debug_handler.S -o debug_handler_be.o 6 | #arm-none-eabi-ld -EB -n -Tdebug_handler.cmd debug_handler_be.o -o debug_handler_be.out 7 | #arm-none-eabi-objcopy -O binary debug_handler_be.out debug_handler_be.bin 8 | -------------------------------------------------------------------------------- /tcl/target/stm32f1x_stlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STM32f1x stlink pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] == 0 } { 6 | set CHIPNAME stm32f1x 7 | } 8 | 9 | if { [info exists CPUTAPID] == 0 } { 10 | set CPUTAPID 0x1ba01477 11 | } 12 | 13 | if { [info exists WORKAREASIZE] == 0 } { 14 | set WORKAREASIZE 0x4000 15 | } 16 | 17 | source [find target/stm32_stlink.cfg] 18 | 19 | set _FLASHNAME $_CHIPNAME.flash 20 | flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME 21 | -------------------------------------------------------------------------------- /tcl/target/stm32f2x_stlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STM32f2x stlink pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] == 0 } { 6 | set CHIPNAME stm32f2x 7 | } 8 | 9 | if { [info exists CPUTAPID] == 0 } { 10 | set CPUTAPID 0x2ba01477 11 | } 12 | 13 | if { [info exists WORKAREASIZE] == 0 } { 14 | set WORKAREASIZE 0x10000 15 | } 16 | 17 | source [find target/stm32_stlink.cfg] 18 | 19 | set _FLASHNAME $_CHIPNAME.flash 20 | flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME 21 | -------------------------------------------------------------------------------- /tcl/target/stm32f3x_stlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STM32f3x stlink pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] == 0 } { 6 | set CHIPNAME stm32f3x 7 | } 8 | 9 | if { [info exists CPUTAPID] == 0 } { 10 | set CPUTAPID 0x2ba01477 11 | } 12 | 13 | if { [info exists WORKAREASIZE] == 0 } { 14 | set WORKAREASIZE 0x4000 15 | } 16 | 17 | source [find target/stm32_stlink.cfg] 18 | 19 | set _FLASHNAME $_CHIPNAME.flash 20 | flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME 21 | -------------------------------------------------------------------------------- /src/jtag/hla/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | noinst_LTLIBRARIES = libocdhla.la 4 | 5 | libocdhla_la_SOURCES = \ 6 | $(HLFILES) 7 | 8 | HLFILES = 9 | 10 | if HLADAPTER 11 | HLFILES += hla_transport.c 12 | HLFILES += hla_tcl.c 13 | HLFILES += hla_interface.c 14 | HLFILES += hla_layout.c 15 | endif 16 | 17 | noinst_HEADERS = \ 18 | hla_interface.h \ 19 | hla_layout.h \ 20 | hla_tcl.h \ 21 | hla_transport.h 22 | 23 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 24 | -------------------------------------------------------------------------------- /tcl/board/omap2420_h4.cfg: -------------------------------------------------------------------------------- 1 | # OMAP2420 SDP board ("H4") 2 | 3 | source [find target/omap2420.cfg] 4 | 5 | # NOTE: this assumes you're *NOT* using a TI-14 connector. 6 | reset_config trst_and_srst separate 7 | 8 | # Board configs can vary a *LOT* ... parts, jumpers, etc. 9 | # This GP board boots from cs0 using NOR (2x32M), and also 10 | # has 64M NAND on cs6. 11 | flash bank h4.u10 cfi 0x04000000 0x02000000 2 2 $_TARGETNAME 12 | flash bank h4.u11 cfi 0x06000000 0x02000000 2 2 $_TARGETNAME 13 | -------------------------------------------------------------------------------- /tcl/board/da850evm.cfg: -------------------------------------------------------------------------------- 1 | #DA850 EVM board 2 | # http://focus.ti.com/dsp/docs/thirdparty/catalog/devtoolsproductfolder.tsp?actionPerformed=productFolder&productId=5939 3 | # http://www.logicpd.com/products/development-kits/zoom-omap-l138-evm-development-kit 4 | 5 | source [find target/omapl138.cfg] 6 | 7 | reset_config trst_and_srst separate 8 | 9 | #currently any pinmux/timing must be setup by UBL before openocd can do debug 10 | #TODO: implement pinmux/timing on reset like in board/dm365evm.cfg 11 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s811.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S811 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s811 5 | # 6 | 7 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 8 | # so is using it in JTAG mode, as done here. 9 | # NOTE: older '811-EK boards (before rev C) shouldn't use this. 10 | source [find interface/luminary.cfg] 11 | 12 | # include the target config 13 | set WORKAREASIZE 0x2000 14 | set CHIPNAME lm3s811 15 | source [find target/stellaris.cfg] 16 | -------------------------------------------------------------------------------- /AUTHORS.ChangeLog: -------------------------------------------------------------------------------- 1 | drath:Dominic Rath 2 | mlu:Magnus Lundin 3 | mifi:Michael Fischer 4 | ntfreak:Spencer Oliver 5 | duane:Duane Ellis 6 | oharboe:Øyvind Harboe 7 | kc8apf:Rick Altherr 8 | zwelch:Zachary T Welch 9 | vpalatin:Vincent Palatin 10 | bodylove:Carsten Schlote 11 | -------------------------------------------------------------------------------- /tcl/board/voipac.cfg: -------------------------------------------------------------------------------- 1 | # Config for Voipac PXA270/PXA270M module. 2 | 3 | set CHIPNAME voipac 4 | source [find target/pxa270.cfg] 5 | 6 | # The board supports separate reset lines 7 | # Override this in the interface config for parallel dongles 8 | reset_config trst_and_srst separate 9 | 10 | # flash bank 11 | flash bank $_CHIPNAME.flash0 cfi 0x00000000 0x2000000 2 2 $_TARGETNAME 12 | flash bank $_CHIPNAME.flash1 cfi 0x02000000 0x2000000 2 2 $_TARGETNAME 13 | -------------------------------------------------------------------------------- /tcl/test/selftest.cfg: -------------------------------------------------------------------------------- 1 | 2 | add_help_text selftest "run selftest using working ram
" 3 | 4 | proc selftest {tmpfile address size} { 5 | 6 | for {set i 0} {$i < $size } {set i [expr $i+4]} { 7 | mww [expr $address+$i] $i 8 | } 9 | 10 | for {set i 0} {$i < 10 } {set i [expr $i+1]} { 11 | echo "Test iteration $i" 12 | dump_image $tmpfile $address $size 13 | verify_image $tmpfile $address bin 14 | load_image $tmpfile $address bin 15 | } 16 | 17 | } 18 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/opendous_ftdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Opendous 3 | # 4 | # http://code.google.com/p/opendous/wiki/JTAG 5 | # 6 | # According to the website, it is similar to jtagkey, but it uses channel B 7 | # (and it has a different pid number). 8 | # 9 | 10 | interface ftdi 11 | ftdi_device_desc "Dual RS232-HS" 12 | ftdi_vid_pid 0x0403 0x6010 13 | ftdi_channel 1 14 | 15 | ftdi_layout_init 0x0c08 0x0f1b 16 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 17 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 18 | -------------------------------------------------------------------------------- /contrib/libdcc/README: -------------------------------------------------------------------------------- 1 | This code is an example of using the openocd debug message system. 2 | 3 | Before the message output is seen in the debug window, the functionality 4 | will need enabling: 5 | 6 | From the gdb prompt: 7 | monitor target_request debugmsgs enable 8 | monitor trace point 1 9 | 10 | From the Telnet prompt: 11 | target_request debugmsgs enable 12 | trace point 1 13 | 14 | To see how many times the trace point was hit: 15 | (monitor) trace point 1 16 | 17 | Spen 18 | spen@spen-soft.co.uk 19 | 20 | -------------------------------------------------------------------------------- /src/flash/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | SUBDIRS = \ 4 | nor \ 5 | nand 6 | 7 | METASOURCES = AUTO 8 | noinst_LTLIBRARIES = libflash.la 9 | libflash_la_SOURCES = \ 10 | common.c \ 11 | mflash.c 12 | 13 | libflash_la_LIBADD = \ 14 | $(top_builddir)/src/flash/nor/libocdflashnor.la \ 15 | $(top_builddir)/src/flash/nand/libocdflashnand.la 16 | 17 | noinst_HEADERS = \ 18 | common.h \ 19 | mflash.h 20 | 21 | EXTRA_DIST = startup.tcl 22 | 23 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 24 | -------------------------------------------------------------------------------- /tcl/board/netgear-dg834v3.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Netgear DG834v3 Router 3 | # Internal 4Kb RAM (@0x80000000) 4 | # Flash is located at 0x90000000 (CS0) and RAM is located at 0x94000000 (CS1) 5 | # 6 | 7 | source [find target/ti-ar7.cfg] 8 | 9 | # External 16MB SDRAM - disabled as we use internal sram 10 | #$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 0x00001000 11 | 12 | # External 4MB NOR Flash 13 | set _FLASHNAME $_CHIPNAME.norflash 14 | flash bank $_FLASHNAME cfi 0x90000000 0x00400000 2 2 $_TARGETNAME 15 | -------------------------------------------------------------------------------- /testing/examples/ledtest-imx31pdk/ldscript: -------------------------------------------------------------------------------- 1 | SECTIONS 2 | { 3 | . = 0x80000100; 4 | .text : { *(.text) } 5 | .data ALIGN(0x10): { *(.data) } 6 | .bss ALIGN(0x10): { 7 | __bss_start__ = ABSOLUTE(.); 8 | *(.bss) 9 | . += 0x100; 10 | } 11 | __bss_end__ = .; 12 | PROVIDE (__stack = .); 13 | _end = .; 14 | .debug_info 0 : { *(.debug_info) } 15 | .debug_abbrev 0 : { *(.debug_abbrev) } 16 | .debug_line 0 : { *(.debug_line) } 17 | .debug_frame 0 : { *(.debug_frame) } 18 | } 19 | -------------------------------------------------------------------------------- /tcl/target/stm32f0x_stlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STM32f0x stlink pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] == 0 } { 6 | set CHIPNAME stm32f0x 7 | } 8 | 9 | if { [info exists CPUTAPID] == 0 } { 10 | set CPUTAPID 0x0bb11477 11 | } 12 | 13 | if { [info exists WORKAREASIZE] == 0 } { 14 | set WORKAREASIZE 0x1000 15 | } 16 | 17 | source [find target/stm32_stlink.cfg] 18 | 19 | # stm32f0x family uses stm32f1x driver 20 | set _FLASHNAME $_CHIPNAME.flash 21 | flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME 22 | -------------------------------------------------------------------------------- /tcl/target/stm32f4x_stlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # STM32f4x stlink pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] == 0 } { 6 | set CHIPNAME stm32f4x 7 | } 8 | 9 | if { [info exists CPUTAPID] == 0 } { 10 | set CPUTAPID 0x2ba01477 11 | } 12 | 13 | if { [info exists WORKAREASIZE] == 0 } { 14 | set WORKAREASIZE 0x10000 15 | } 16 | 17 | source [find target/stm32_stlink.cfg] 18 | 19 | # stm32f4x family uses stm32f2x driver 20 | set _FLASHNAME $_CHIPNAME.flash 21 | flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME 22 | -------------------------------------------------------------------------------- /testing/examples/ledtest-imx27ads/ldscript: -------------------------------------------------------------------------------- 1 | SECTIONS 2 | { 3 | . = 0xA0000000; 4 | .text : { *(.text) } 5 | .data ALIGN(0x10): { *(.data) } 6 | .bss ALIGN(0x10): { 7 | __bss_start__ = ABSOLUTE(.); 8 | *(.bss) 9 | . += 0x100; 10 | } 11 | __bss_end__ = .; 12 | PROVIDE (__stack = .); 13 | _end = .; 14 | .debug_info 0 : { *(.debug_info) } 15 | .debug_abbrev 0 : { *(.debug_abbrev) } 16 | .debug_line 0 : { *(.debug_line) } 17 | .debug_frame 0 : { *(.debug_frame) } 18 | } 19 | -------------------------------------------------------------------------------- /AUTHORS: -------------------------------------------------------------------------------- 1 | Dominic Rath 2 | Magnus Lundin 3 | Michael Fischer 4 | Spencer Oliver 5 | Carsten Schlote 6 | Øyvind Harboe 7 | Duane Ellis 8 | Michael Schwingen 9 | Rick Altherr 10 | David Brownell 11 | Vincint Palatin 12 | Zachary T Welch 13 | -------------------------------------------------------------------------------- /tcl/board/hitex_stm32-performancestick.cfg: -------------------------------------------------------------------------------- 1 | # Hitex stm32 performance stick 2 | 3 | reset_config trst_and_srst 4 | 5 | source [find interface/stm32-stick.cfg] 6 | 7 | set CHIPNAME stm32_hitex 8 | source [find target/stm32f1x.cfg] 9 | 10 | # configure str750 connected to jtag chain 11 | # FIXME -- source [find target/str750.cfg] after cleaning that up 12 | jtag newtap str750 cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id 0x4f1f0041 13 | 14 | # for some reason this board like to startup @ 500kHz 15 | adapter_khz 500 16 | 17 | -------------------------------------------------------------------------------- /tcl/target/test_reset_syntax_error.cfg: -------------------------------------------------------------------------------- 1 | # Test script to check that syntax error in reset 2 | # script is reported properly. 3 | 4 | # at91eb40a target 5 | 6 | #jtag scan chain 7 | set _CHIPNAME syntaxtest 8 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf 9 | 10 | #target configuration 11 | set _TARGETNAME $_CHIPNAME.cpu 12 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 13 | 14 | $_TARGETNAME configure -event reset-init { 15 | 16 | syntax error 17 | } 18 | -------------------------------------------------------------------------------- /tcl/target/avr32.cfg: -------------------------------------------------------------------------------- 1 | set _CHIPNAME avr32 2 | set _ENDIAN big 3 | 4 | set _CPUTAPID 0x21e8203f 5 | 6 | adapter_nsrst_delay 100 7 | jtag_ntrst_delay 100 8 | 9 | reset_config trst_and_srst separate 10 | 11 | # jtag scan chain 12 | # format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) 13 | jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_CPUTAPID 14 | 15 | set _TARGETNAME [format "%s.cpu" $_CHIPNAME] 16 | target create $_TARGETNAME avr32_ap7k -endian $_ENDIAN -chain-position $_TARGETNAME 17 | 18 | -------------------------------------------------------------------------------- /tcl/interface/digilent-hs1.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Digilent HS1 3 | # 4 | # The Digilent HS1 is a high-speed FT2232H-based adapter, compliant with the 5 | # Xilinx JTAG 14-pin pinout. 6 | # It does not support ARM reset signals (SRST and TRST) but can still be used for 7 | # hardware debugging, with some limitations. 8 | # 9 | # http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,395,922&Prod=JTAG-HS1 10 | # 11 | 12 | interface ft2232 13 | ft2232_device_desc "Digilent Adept USB Device" 14 | ft2232_layout digilent-hs1 15 | ft2232_vid_pid 0x0403 0x6010 16 | -------------------------------------------------------------------------------- /tcl/board/stm320518_eval_stlink.cfg: -------------------------------------------------------------------------------- 1 | # STM320518-EVAL: This is an STM32F0 eval board with a single STM32F051R8T6 2 | # (64KB) chip. 3 | # http://www.st.com/internet/evalboard/product/252994.jsp 4 | # 5 | # This is for using the onboard STLINK/V2 6 | 7 | source [find interface/stlink-v2.cfg] 8 | 9 | # increase working area to 8KB 10 | set WORKAREASIZE 0x2000 11 | 12 | # chip name 13 | set CHIPNAME STM32F051R8T6 14 | 15 | source [find target/stm32f0x_stlink.cfg] 16 | 17 | # use hardware reset, connect under reset 18 | reset_config srst_only srst_nogate 19 | -------------------------------------------------------------------------------- /tcl/board/stm3220g_eval_stlink.cfg: -------------------------------------------------------------------------------- 1 | # STM3220G-EVAL: This is an STM32F2 eval board with a single STM32F207IGH6 2 | # (128KB) chip. 3 | # http://www.st.com/internet/evalboard/product/250374.jsp 4 | # 5 | # This is for using the onboard STLINK/V2 6 | 7 | source [find interface/stlink-v2.cfg] 8 | 9 | # increase working area to 128KB 10 | set WORKAREASIZE 0x20000 11 | 12 | # chip name 13 | set CHIPNAME STM32F207IGH6 14 | 15 | source [find target/stm32f2x_stlink.cfg] 16 | 17 | # use hardware reset, connect under reset 18 | reset_config srst_only srst_nogate 19 | -------------------------------------------------------------------------------- /tcl/board/stm3241g_eval_stlink.cfg: -------------------------------------------------------------------------------- 1 | # STM3241G-EVAL: This is an STM32F4 eval board with a single STM32F417IGH6 2 | # (1024KB) chip. 3 | # http://www.st.com/internet/evalboard/product/252216.jsp 4 | # 5 | # This is for using the onboard STLINK/V2 6 | 7 | source [find interface/stlink-v2.cfg] 8 | 9 | # increase working area to 128KB 10 | set WORKAREASIZE 0x20000 11 | 12 | # chip name 13 | set CHIPNAME STM32F417IGH6 14 | 15 | source [find target/stm32f4x_stlink.cfg] 16 | 17 | # use hardware reset, connect under reset 18 | reset_config srst_only srst_nogate 19 | -------------------------------------------------------------------------------- /testing/examples/PIC32/BlinkingLeds.c: -------------------------------------------------------------------------------- 1 | #include 2 | int main(void) 3 | { 4 | int i; 5 | mPORTDClearBits(BIT_0); 6 | mPORTDSetPinsDigitalOut(BIT_0); 7 | mPORTDClearBits(BIT_1); 8 | mPORTDSetPinsDigitalOut(BIT_1); 9 | mPORTDClearBits(BIT_2); 10 | mPORTDSetPinsDigitalOut(BIT_2); 11 | 12 | while (1) 13 | { 14 | for (i = 0; i < 500000; i++) 15 | mPORTDToggleBits(BIT_0); 16 | for (i = 0; i < 500000; i++) 17 | mPORTDToggleBits(BIT_1); 18 | for (i = 0; i < 500000; i++) 19 | mPORTDToggleBits(BIT_2); 20 | } 21 | 22 | return 0; 23 | } 24 | -------------------------------------------------------------------------------- /testing/examples/cortex/test.c: -------------------------------------------------------------------------------- 1 | /* simple app. 2 | 3 | modify test.ld to change address. 4 | 5 | Even if the app is position independent, the symbols 6 | need to match to test basic debugging. 7 | 8 | To load the app to 0x20000000 in GDB, use: 9 | 10 | load a.out 11 | monitor reg sp 0x20004000 12 | monitor reg pc 0x20002000 13 | stepi 14 | 15 | arm-elf-gcc -mthumb -mcpu = cortex-m3 -nostdlib -Ttest.ld test.c 16 | 17 | 18 | */ 19 | int j; 20 | void _start() 21 | { 22 | int i; 23 | for (i = 0; i < 1000; i++) 24 | { 25 | j++; 26 | } 27 | } 28 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/axm0432.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Axiom axm0432 3 | # 4 | # http://www.axman.com 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Symphony SoundBite" 14 | ftdi_vid_pid 0x0403 0x6010 15 | 16 | ftdi_layout_init 0x0c08 0x0c2b 17 | ftdi_layout_signal nTRST -data 0x0800 18 | ftdi_layout_signal nSRST -data 0x0400 19 | -------------------------------------------------------------------------------- /tcl/board/twr-k60f120m.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Freescale TWRK60F120M development board 3 | # 4 | 5 | source [find target/k60.cfg] 6 | 7 | $_TARGETNAME configure -event reset-init { 8 | puts "-event reset-init occured" 9 | } 10 | 11 | # 12 | # Bank definition for the 'program flash' (instructions and/or data) 13 | # 14 | flash bank pflash.0 kinetis 0x00000000 0x40000 0 4 $_TARGETNAME 15 | flash bank pflash.1 kinetis 0x00040000 0x40000 0 4 $_TARGETNAME 16 | flash bank pflash.2 kinetis 0x00080000 0x40000 0 4 $_TARGETNAME 17 | flash bank pflash.3 kinetis 0x000c0000 0x40000 0 4 $_TARGETNAME 18 | -------------------------------------------------------------------------------- /tcl/target/at91sam9g10.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9G10 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9g10 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | # Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The 14 | # AT91SAM9G10 has one SRAM area at 0x00300000 of 16KiB 15 | 16 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1 17 | -------------------------------------------------------------------------------- /doc/Makefile.am: -------------------------------------------------------------------------------- 1 | info_TEXINFOS = openocd.texi 2 | openocd_TEXINFOS = fdl.texi 3 | man_MANS = openocd.1 4 | EXTRA_DIST = openocd.1 \ 5 | INSTALL.txt 6 | 7 | dist-hook: 8 | mkdir $(distdir)/manual 9 | cp -p $(srcdir)/manual/*.txt $(distdir)/manual 10 | for i in $$(cd $(srcdir)/manual/ && ls -d */); do \ 11 | mkdir $(distdir)/manual/$$i; \ 12 | cp -p $(srcdir)/manual/$$i/* $(distdir)/manual/$$i/; \ 13 | done 14 | 15 | MAINTAINERCLEANFILES = \ 16 | $(srcdir)/Makefile.in \ 17 | $(srcdir)/mdate-sh \ 18 | $(srcdir)/stamp-vti \ 19 | $(srcdir)/version.texi \ 20 | $(srcdir)/texinfo.tex 21 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/icebear.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Section5 ICEBear 3 | # 4 | # http://section5.ch/icebear 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "ICEbear JTAG adapter" 14 | ftdi_vid_pid 0x0403 0xc140 15 | 16 | ftdi_layout_init 0x0028 0x002b 17 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 18 | ftdi_layout_signal nSRST -data 0x0020 19 | -------------------------------------------------------------------------------- /tcl/target/at91sam9g45.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9G45 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9g45 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | # Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The 14 | # AT91SAM9G45 has one SRAM area starting at 0x00300000 of 64 KiB. 15 | 16 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x200000 -work-area-backup 1 17 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/minimodule.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FTDI MiniModule 3 | # 4 | # http://www.ftdichip.com/Support/Documents/DataSheets/Modules/DS_FT2232H_Mini_Module.pdf 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "FT2232H MiniModule" 14 | ftdi_vid_pid 0x0403 0x6010 15 | 16 | ftdi_layout_init 0x0018 0x05fb 17 | ftdi_layout_signal nSRST -data 0x0020 18 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/signalyzer.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer Tool (DT-USB-ST) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Signalyzer" 14 | ftdi_vid_pid 0x0403 0xbca0 15 | 16 | ftdi_layout_init 0x0008 0x000b 17 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 18 | ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 19 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/signalyzer-lite.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer LITE (DT-USB-SLITE) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Signalyzer LITE" 14 | ftdi_vid_pid 0x0403 0xbca1 15 | 16 | ftdi_layout_init 0x0008 0x000b 17 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 18 | ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 19 | -------------------------------------------------------------------------------- /tcl/board/balloon3-cpu.cfg: -------------------------------------------------------------------------------- 1 | # Config for balloon3 board, cpu JTAG port. http://balloonboard.org/ 2 | # The board has separate JTAG ports for cpu and CPLD/FPGA devices 3 | # Chaining is done on IO interfaces if desired. 4 | 5 | source [find target/pxa270.cfg] 6 | 7 | # The board supports separate reset lines 8 | # Override this in the interface config for parallel dongles 9 | reset_config trst_and_srst separate 10 | 11 | # flash bank 12 | # 29LV650 64Mbit Flash 13 | set _FLASHNAME $_CHIPNAME.flash 14 | flash bank $_FLASHNAME cfi 0x00000000 0x800000 2 2 $_TARGETNAME 15 | -------------------------------------------------------------------------------- /tcl/interface/flossjtag-noeeprom.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FlossJTAG 3 | # 4 | # http://github.com/esden/floss-jtag 5 | # 6 | # This is the pre v0.3 Floss-JTAG compatible config file. It can also be used 7 | # for newer versions of Floss-JTAG with empty or not populated EEPROM. If you 8 | # have several Floss-JTAG connected you have to use the USB ID to select a 9 | # specific one. 10 | # 11 | # If you have a Floss-JTAG WITH EEPROM that is programmed, use the 12 | # flossjtag.cfg file. 13 | # 14 | 15 | interface ft2232 16 | ft2232_vid_pid 0x0403 0x6010 17 | ft2232_device_desc "Dual RS232-HS" 18 | ft2232_layout "usbjtag" 19 | ft2232_latency 2 20 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/hilscher_nxhx10_etm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 10-ETM 3 | # 4 | # http://de.hilscher.com/products_details_hardware.html?p_id=P_4ce145a5983e6 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "NXHX 10-ETM" 14 | ftdi_vid_pid 0x0640 0x0028 15 | 16 | ftdi_layout_init 0x0308 0x030b 17 | ftdi_layout_signal nTRST -data 0x0100 18 | ftdi_layout_signal nSRST -data 0x0200 19 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/hilscher_nxhx50_etm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 50-ETM 3 | # 4 | # http://de.hilscher.com/files_design/8/NXHX50-ETM_description_Rev01_EN.pdf 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "NXHX 50-ETM" 14 | ftdi_vid_pid 0x0640 0x0028 15 | 16 | ftdi_layout_init 0x0308 0x030b 17 | ftdi_layout_signal nTRST -data 0x0100 18 | ftdi_layout_signal nSRST -data 0x0200 19 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/hilscher_nxhx500_etm.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 500-ETM 3 | # 4 | # http://de.hilscher.com/files_design/8/NXHX500-ETM_description_Rev01_EN.pdf 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "NXHX 500-ETM" 14 | ftdi_vid_pid 0x0640 0x0028 15 | 16 | ftdi_layout_init 0x0308 0x030b 17 | ftdi_layout_signal nTRST -data 0x0100 18 | ftdi_layout_signal nSRST -data 0x0200 19 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/hilscher_nxhx500_re.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 500-RE 3 | # 4 | # http://de.hilscher.com/products_details_hardware.html?p_id=P_461ff2053bad1&bs=20 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "NXHX 500-RE" 14 | ftdi_vid_pid 0x0640 0x0028 15 | 16 | ftdi_layout_init 0x0308 0x030b 17 | ftdi_layout_signal nTRST -data 0x0100 18 | ftdi_layout_signal nSRST -data 0x0200 19 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/hilscher_nxhx50_re.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hilscher NXHX 50-RE 3 | # 4 | # http://de.hilscher.com/products_details_hardware.html?p_id=P_483c0f582ad36&bs=20 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "NXHX50-RE" 14 | ftdi_vid_pid 0x0640 0x0028 15 | 16 | ftdi_layout_init 0x0308 0x030b 17 | ftdi_layout_signal nTRST -data 0x0100 18 | ftdi_layout_signal nSRST -data 0x0200 19 | -------------------------------------------------------------------------------- /tcl/interface/buspirate.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Buspirate with OpenOCD support 3 | # 4 | # http://dangerousprototypes.com/bus-pirate-manual/ 5 | # 6 | 7 | interface buspirate 8 | 9 | # you need to specify port on which BP lives 10 | #buspirate_port /dev/ttyUSB0 11 | 12 | # communication speed setting 13 | buspirate_speed normal ;# or fast 14 | 15 | # voltage regulator Enabled = 1 Disabled = 0 16 | #buspirate_vreg 0 17 | 18 | # pin mode normal or open-drain 19 | #buspirate_mode normal 20 | 21 | # pullup state Enabled = 1 Disabled = 0 22 | #buspirate_pullup 0 23 | 24 | # this depends on the cable, you are safe with this option 25 | reset_config srst_only 26 | 27 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/openrd.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Marvell OpenRD 3 | # 4 | # http://www.marvell.com/products/embedded_processors/developer/kirkwood/openrd.jsp 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "OpenRD JTAGKey FT2232D" 14 | ftdi_vid_pid 0x0403 0x9e90 15 | ftdi_channel 1 16 | 17 | ftdi_layout_init 0x0608 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0200 19 | ftdi_layout_signal nSRST -noe 0x0400 20 | -------------------------------------------------------------------------------- /testing/build.test1/mingw32_help/include/sys/cdefs.h: -------------------------------------------------------------------------------- 1 | /* sys/cdefs.h 2 | 3 | Copyright 1998, 2000, 2001 Red Hat, Inc. 4 | 5 | This file is part of Cygwin. 6 | 7 | This software is a copyrighted work licensed under the terms of the 8 | Cygwin license. Please consult the file "CYGWIN_LICENSE" for 9 | details. */ 10 | 11 | #ifndef _SYS_CDEFS_H 12 | #define _SYS_CDEFS_H 13 | #ifdef __cplusplus 14 | #define __BEGIN_DECLS extern "C" { 15 | #define __END_DECLS } 16 | #else 17 | #define __BEGIN_DECLS 18 | #define __END_DECLS 19 | #endif 20 | #define __P(protos) protos /* full-blown ANSI C */ 21 | #define __CONCAT(__x,__y) __x##__y 22 | #endif 23 | 24 | -------------------------------------------------------------------------------- /tcl/board/verdex.cfg: -------------------------------------------------------------------------------- 1 | # Config for Gumstix Verdex XM4 and XL6P (PXA270) 2 | 3 | set CHIPNAME verdex 4 | source [find target/pxa270.cfg] 5 | 6 | # The board supports separate reset lines 7 | # Override this in the interface config for parallel dongles 8 | reset_config trst_and_srst separate 9 | 10 | # XM4 = 400MHz, XL6P = 600MHz...let's run at 0.1*400MHz=40MHz 11 | adapter_khz 40000 12 | 13 | # flash bank 14 | # XL6P has 32 MB flash 15 | flash bank $_CHIPNAME.flash0 cfi 0x00000000 0x02000000 2 2 $_TARGETNAME 16 | # XM4 has 16 MB flash 17 | #flash bank $_CHIPNAME.flash0 cfi 0x00000000 0x01000000 2 2 $_TARGETNAME 18 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/flyswatter.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TinCanTools Flyswatter 3 | # 4 | # http://www.tincantools.com/product.php?productid=16134 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on schematics and code" 9 | echo "in ft2232.c. Please report your experience with this file to openocd-devel" 10 | echo "mailing list, so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Flyswatter" 14 | ftdi_vid_pid 0x0403 0x6010 15 | 16 | ftdi_layout_init 0x0818 0x0cfb 17 | ftdi_layout_signal nTRST -data 0x0010 18 | ftdi_layout_signal nSRST -oe 0x0020 19 | ftdi_layout_signal LED -data 0x0c00 20 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/lisa-l.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Lisa/L 3 | # 4 | # http://paparazzi.enac.fr/wiki/Lisa 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on schematics and code" 9 | echo "in ft2232.c. Please report your experience with this file to openocd-devel" 10 | echo "mailing list, so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Lisa/L" 14 | ftdi_vid_pid 0x0403 0x6010 15 | ftdi_channel 1 16 | 17 | ftdi_layout_init 0x0008 0x180b 18 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 19 | ftdi_layout_signal nSRST -data 0x0040 -oe 0x0040 20 | ftdi_layout_signal LED -data 0x1800 21 | -------------------------------------------------------------------------------- /tcl/target/samsung_s3c4510.cfg: -------------------------------------------------------------------------------- 1 | if { [info exists CHIPNAME] } { 2 | set _CHIPNAME $CHIPNAME 3 | } else { 4 | set _CHIPNAME s3c4510 5 | } 6 | 7 | if { [info exists ENDIAN] } { 8 | set _ENDIAN $ENDIAN 9 | } else { 10 | set _ENDIAN little 11 | } 12 | 13 | 14 | # This appears to be a "Version 1" arm7tdmi. 15 | if { [info exists CPUTAPID] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | set _CPUTAPID 0x1f0f0f0f 19 | } 20 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 21 | 22 | set _TARGETNAME $_CHIPNAME.cpu 23 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME 24 | 25 | -------------------------------------------------------------------------------- /src/server/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | METASOURCES = AUTO 4 | noinst_LTLIBRARIES = libserver.la 5 | noinst_HEADERS = server.h telnet_server.h gdb_server.h 6 | libserver_la_SOURCES = server.c telnet_server.c gdb_server.c 7 | 8 | libserver_la_SOURCES += server_stubs.c 9 | 10 | libserver_la_CFLAGS = 11 | if IS_MINGW 12 | # FD_* macros are sloppy with their signs on MinGW32 platform 13 | libserver_la_CFLAGS += -Wno-sign-compare 14 | endif 15 | 16 | # tcl server addons 17 | noinst_HEADERS += tcl_server.h 18 | libserver_la_SOURCES += tcl_server.c 19 | 20 | EXTRA_DIST = \ 21 | startup.tcl 22 | 23 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 24 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/turtelizer2-revB.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # egnite Turtelizer 2 rev B (with SRST only) 3 | # 4 | # http://www.ethernut.de/en/hardware/turtelizer/index.html 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on schematics and code" 9 | echo "in ft2232.c. Please report your experience with this file to openocd-devel" 10 | echo "mailing list, so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Turtelizer JTAG/RS232 Adapter" 14 | ftdi_vid_pid 0x0403 0xbdc8 15 | 16 | ftdi_layout_init 0x0008 0x0c5b 17 | ftdi_layout_signal nSRST -oe 0x0040 18 | ftdi_layout_signal LED -data 0x0c00 19 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/vpaclink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Voipac VPACLink 3 | # 4 | # http://voipac.com/27M-JTG-000 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, but is assumed to work as this" 9 | echo "interface uses the same layout as configs that were verified. Please report your" 10 | echo "experience with this file to openocd-devel mailing list, so it could be marked" 11 | echo "as working or fixed." 12 | 13 | interface ftdi 14 | ftdi_device_desc "VPACLink" 15 | ftdi_vid_pid 0x0403 0x6010 16 | 17 | ftdi_layout_init 0x0508 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 19 | ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 20 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s1968.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S1968 Evaluation Kits 3 | # 4 | # http://www.ti.com/tool/ek-lm3s1968 5 | # 6 | 7 | # NOTE: to use J-Link instead of the on-board interface, 8 | # you may also need to reduce adapter_khz to be about 1200. 9 | # source [find interface/jlink.cfg] 10 | 11 | # include the FT2232 interface config for on-board JTAG interface 12 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 13 | # so is using in JTAG mode, as done here. 14 | source [find interface/luminary.cfg] 15 | 16 | # include the target config 17 | set WORKAREASIZE 0x2000 18 | set CHIPNAME lm3s1968 19 | source [find target/stellaris.cfg] 20 | -------------------------------------------------------------------------------- /tcl/interface/flossjtag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FlossJTAG 3 | # 4 | # http://github.com/esden/floss-jtag 5 | # 6 | # This is the v0.3 and v1.0 Floss-JTAG compatible config file. It relies on the 7 | # existence of an EEPROM on Floss-JTAG containing a name. If you have several 8 | # Floss-JTAG adapters connected you can use the serial number to select a 9 | # specific device. 10 | # 11 | # If your Floss-JTAG does not have an EEPROM, or the EEPROM is empty, use the 12 | # flossjtag-noeeprom.cfg file. 13 | # 14 | 15 | interface ft2232 16 | ft2232_vid_pid 0x0403 0x6010 17 | ft2232_device_desc "FLOSS-JTAG" 18 | #ft2232_serial "FJ000001" 19 | ft2232_layout "flossjtag" 20 | ft2232_latency 2 21 | -------------------------------------------------------------------------------- /tcl/interface/luminary-lm3s811.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Luminary Micro Stellaris LM3S811 Evaluation Kit 3 | # 4 | # http://www.luminarymicro.com/products/stellaris_811_evaluation_kits.html 5 | # 6 | # NOTE: this is only for boards *before* Rev C, which adds support 7 | # for SWO tracing with ADBUS_6 DBG_ENn and BDBUS_4 SWO_EN signals. 8 | # The "evb_lm3s811" layout doesn't set up those signals. 9 | # 10 | # Rev C boards work more like the other Stellaris eval boards. They 11 | # need to use the "luminary_icdi" layout to work correctly. 12 | # 13 | 14 | interface ft2232 15 | ft2232_device_desc "LM3S811 Evaluation Board" 16 | ft2232_layout evb_lm3s811 17 | ft2232_vid_pid 0x0403 0xbcd9 18 | 19 | -------------------------------------------------------------------------------- /tcl/interface/sysfsgpio-raspberrypi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Config for using RaspberryPi's expansion header 3 | # 4 | # This is best used with a fast enough buffer but also 5 | # is suitable for direct connection if the target voltage 6 | # matches RPi's 3.3V 7 | # 8 | # Do not forget the GND connection, pin 6 of the expansion header. 9 | # 10 | 11 | interface sysfsgpio 12 | 13 | # Each of the JTAG lines need a gpio number set: tck tms tdi tdo 14 | # Header pin numbers: 23 22 19 21 15 | sysfsgpio_jtag_nums 11 25 10 9 16 | 17 | # At least one of srst or trst needs to be specified 18 | # Header pin numbers: TRST - 26, SRST - 18 19 | sysfsgpio_trst_num 7 20 | # sysfsgpio_srst_num 24 21 | 22 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/sheevaplug.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Marvel SheevaPlug Development Kit 3 | # 4 | # http://www.marvell.com/products/embedded_processors/developer/kirkwood/sheevaplug.jsp 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 9 | echo "Please report your experience with this file to openocd-devel mailing list," 10 | echo "so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "SheevaPlug JTAGKey FT2232D" 14 | ftdi_vid_pid 0x9e88 0x9e8f 15 | ftdi_channel 1 16 | 17 | ftdi_layout_init 0x0608 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0200 19 | ftdi_layout_signal nSRST -noe 0x0400 20 | -------------------------------------------------------------------------------- /tcl/board/lpc1850_spifi_generic.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Generic LPC1850 board w/ SPIFI flash. 3 | # This config file is intended as an example of how to 4 | # use the lpcspifi flash driver, but it should be functional 5 | # for most LPC1850 boards utilizing SPIFI flash. 6 | 7 | set CHIPNAME lpc1850 8 | 9 | source [find target/lpc1850.cfg] 10 | 11 | #A large working area greatly reduces flash write times 12 | set _WORKAREASIZE 0x4000 13 | 14 | $_CHIPNAME.m3 configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE 15 | 16 | #Configure the flash bank; 0x14000000 is the base address for 17 | #lpc43xx/lpc18xx family micros. 18 | flash bank SPIFI_FLASH lpcspifi 0x14000000 0 0 0 $_CHIPNAME.m3 19 | -------------------------------------------------------------------------------- /tcl/board/lpc4350_spifi_generic.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Generic LPC4350 board w/ SPIFI flash. 3 | # This config file is intended as an example of how to 4 | # use the lpcspifi flash driver, but it should be functional 5 | # for most LPC4350 boards utilizing SPIFI flash. 6 | 7 | set CHIPNAME lpc4350 8 | 9 | source [find target/lpc4350.cfg] 10 | 11 | #A large working area greatly reduces flash write times 12 | set _WORKAREASIZE 0x2000 13 | 14 | $_CHIPNAME.m4 configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE 15 | 16 | #Configure the flash bank; 0x14000000 is the base address for 17 | #lpc43xx/lpc18xx family micros. 18 | flash bank SPIFI_FLASH lpcspifi 0x14000000 0 0 0 $_CHIPNAME.m4 19 | -------------------------------------------------------------------------------- /tcl/target/sharp_lh79532.cfg: -------------------------------------------------------------------------------- 1 | reset_config srst_only srst_pulls_trst 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME lh79532 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | # sharp changed the number! 19 | set _CPUTAPID 0x00002061 20 | } 21 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 22 | 23 | set _TARGETNAME $_CHIPNAME.cpu 24 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME 25 | 26 | 27 | -------------------------------------------------------------------------------- /tcl/target/nuc910.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Nuvoton nuc910 (previously W90P910) based soc 3 | # 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME nuc910 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | # set useful default 21 | set _CPUTAPID 0x07926f0f 22 | } 23 | 24 | set _TARGETNAME $_CHIPNAME.cpu 25 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 26 | 27 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME 28 | -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/prj/sam7s256_reset.script: -------------------------------------------------------------------------------- 1 | # 2 | # Init - taken form the script openocd_at91sam7_ecr.script 3 | # 4 | # I take this script from the following page: 5 | # 6 | # http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html 7 | # 8 | mww 0xfffffd44 0x00008000 # disable watchdog 9 | mww 0xfffffd08 0xa5000001 # enable user reset 10 | mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator 11 | sleep 10 12 | mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz 13 | sleep 10 14 | mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz 15 | sleep 10 16 | mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) 17 | sleep 100 18 | -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/prj/sam7x256_reset.script: -------------------------------------------------------------------------------- 1 | # 2 | # Init - taken form the script openocd_at91sam7_ecr.script 3 | # 4 | # I take this script from the following page: 5 | # 6 | # http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html 7 | # 8 | mww 0xfffffd44 0x00008000 # disable watchdog 9 | mww 0xfffffd08 0xa5000001 # enable user reset 10 | mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator 11 | sleep 10 12 | mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz 13 | sleep 10 14 | mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz 15 | sleep 10 16 | mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) 17 | sleep 100 18 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/oocdlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Joern Kaipf's OOCDLink 3 | # 4 | # http://www.joernonline.de/contrexx2/cms/index.php?page=126 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, but is assumed to work as this" 9 | echo "interface uses the same layout as configs that were verified. Please report your" 10 | echo "experience with this file to openocd-devel mailing list, so it could be marked" 11 | echo "as working or fixed." 12 | 13 | interface ftdi 14 | ftdi_device_desc "OOCDLink" 15 | ftdi_vid_pid 0x0403 0xbaf8 16 | 17 | ftdi_layout_init 0x0508 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 19 | ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 20 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/neodb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Openmoko USB JTAG/RS232 adapter 3 | # 4 | # http://wiki.openmoko.org/wiki/Debug_Board_v3 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on schematics and code" 9 | echo "in ft2232.c. Please report your experience with this file to openocd-devel" 10 | echo "mailing list, so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Debug Board for Neo1973" 14 | ftdi_vid_pid 0x1457 0x5118 15 | 16 | ftdi_layout_init 0x0508 0x0f1b 17 | ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 18 | ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 19 | ftdi_layout_signal nNOR_WP -data 0x0010 -oe 0x0010 20 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/ngxtech.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # NGX ARM USB JTAG 3 | # 4 | # http://shop.ngxtechnologies.com/product_info.php?cPath=26&products_id=30 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, but is assumed to work as this" 9 | echo "interface uses the same layout as configs that were verified. Please report your" 10 | echo "experience with this file to openocd-devel mailing list, so it could be marked" 11 | echo "as working or fixed." 12 | 13 | interface ftdi 14 | ftdi_device_desc "NGX JTAG" 15 | ftdi_vid_pid 0x0403 0x6010 16 | 17 | ftdi_layout_init 0x0508 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100 19 | ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400 20 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/turtelizer2-revC.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # egnite Turtelizer 2 revC (with TRST and SRST) 3 | # 4 | # http://www.ethernut.de/en/hardware/turtelizer/index.html 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on schematics and code" 9 | echo "in ft2232.c. Please report your experience with this file to openocd-devel" 10 | echo "mailing list, so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Turtelizer JTAG/RS232 Adapter" 14 | ftdi_vid_pid 0x0403 0xbdc8 15 | 16 | ftdi_layout_init 0x0008 0x0c7b 17 | ftdi_layout_signal nTRST -oe 0x0020 18 | ftdi_layout_signal nSRST -oe 0x0040 19 | ftdi_layout_signal LED -ndata 0x0c00 20 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/redbee-usb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Redwire Redbee-USB 3 | # 4 | # http://www.redwirellc.com 5 | # 6 | # The Redbee-USB has an onboard FT2232H with: 7 | # - FT2232H channel B wired to mc13224v JTAG 8 | # - FT2232H channel A wired to mc13224v UART1 9 | # 10 | 11 | echo "WARNING!" 12 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 13 | echo "Please report your experience with this file to openocd-devel mailing list," 14 | echo "so it could be marked as working or fixed." 15 | 16 | interface ftdi 17 | ftdi_vid_pid 0x0403 0x6010 18 | ftdi_channel 1 19 | 20 | ftdi_layout_init 0x0c08 0x0c2b 21 | ftdi_layout_signal nTRST -data 0x0800 22 | ftdi_layout_signal nSRST -data 0x0400 23 | -------------------------------------------------------------------------------- /tcl/target/lpc1768.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC1768 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, 2 | set CHIPNAME lpc1768 3 | set CPUTAPID 0x4ba00477 4 | set CPURAMSIZE 0x8000 5 | set CPUROMSIZE 0x80000 6 | 7 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 8 | # When board-specific code (reset-init handler or device firmware) 9 | # configures another oscillator and/or PLL0, set CCLK to match; if 10 | # you don't, then flash erase and write operations may misbehave. 11 | # (The ROM code doing those updates cares about core clock speed...) 12 | # 13 | # CCLK is the core clock frequency in KHz 14 | set CCLK 4000 15 | 16 | #Include the main configuration file. 17 | source [find target/lpc17xx.cfg]; 18 | -------------------------------------------------------------------------------- /tcl/target/lpc1769.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC1769 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, 2 | set CHIPNAME lpc1769 3 | set CPUTAPID 0x4ba00477 4 | set CPURAMSIZE 0x8000 5 | set CPUROMSIZE 0x80000 6 | 7 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 8 | # When board-specific code (reset-init handler or device firmware) 9 | # configures another oscillator and/or PLL0, set CCLK to match; if 10 | # you don't, then flash erase and write operations may misbehave. 11 | # (The ROM code doing those updates cares about core clock speed...) 12 | # 13 | # CCLK is the core clock frequency in KHz 14 | set CCLK 4000 15 | 16 | #Include the main configuration file. 17 | source [find target/lpc17xx.cfg]; 18 | -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | 8 | # WDT_MR, disable watchdog 9 | monitor mww 0xFFFFFD44 0x00008000 10 | 11 | # RSTC_MR, enable user reset 12 | monitor mww 0xfffffd08 0xa5000001 13 | 14 | # CKGR_MOR 15 | monitor mww 0xFFFFFC20 0x00000601 16 | monitor sleep 10 17 | 18 | # CKGR_PLLR 19 | monitor mww 0xFFFFFC2C 0x00481c0e 20 | monitor sleep 10 21 | 22 | # PMC_MCKR 23 | monitor mww 0xFFFFFC30 0x00000007 24 | monitor sleep 10 25 | 26 | # PMC_IER 27 | monitor mww 0xFFFFFF60 0x00480100 28 | monitor sleep 100 29 | 30 | load 31 | break main 32 | continue 33 | -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | 8 | # WDT_MR, disable watchdog 9 | monitor mww 0xFFFFFD44 0x00008000 10 | 11 | # RSTC_MR, enable user reset 12 | monitor mww 0xfffffd08 0xa5000001 13 | 14 | # CKGR_MOR 15 | monitor mww 0xFFFFFC20 0x00000601 16 | monitor sleep 10 17 | 18 | # CKGR_PLLR 19 | monitor mww 0xFFFFFC2C 0x00481c0e 20 | monitor sleep 10 21 | 22 | # PMC_MCKR 23 | monitor mww 0xFFFFFC30 0x00000007 24 | monitor sleep 10 25 | 26 | # PMC_IER 27 | monitor mww 0xFFFFFF60 0x00480100 28 | monitor sleep 100 29 | 30 | load 31 | break main 32 | continue 33 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/redbee-econotag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Redwire Redbee-Econotag 3 | # 4 | # http://www.redwirellc.com/store/node/1 5 | # 6 | # The Redbee-Econotag has an onboard FT2232H with: 7 | # - FT2232H channel A wired to mc13224v JTAG 8 | # - FT2232H channel B wired to mc13224v UART1 9 | # 10 | 11 | echo "WARNING!" 12 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 13 | echo "Please report your experience with this file to openocd-devel mailing list," 14 | echo "so it could be marked as working or fixed." 15 | 16 | interface ftdi 17 | ftdi_vid_pid 0x0403 0x6010 18 | 19 | ftdi_layout_init 0x0c08 0x0c2b 20 | ftdi_layout_signal nTRST -data 0x0800 21 | ftdi_layout_signal nSRST -data 0x0400 22 | -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/prj/eclipse_rom.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 force_hw_bkpts enable 7 | 8 | # WDT_MR, disable watchdog 9 | monitor mww 0xFFFFFD44 0x00008000 10 | 11 | # RSTC_MR, enable user reset 12 | monitor mww 0xfffffd08 0xa5000001 13 | 14 | # CKGR_MOR 15 | monitor mww 0xFFFFFC20 0x00000601 16 | monitor sleep 10 17 | 18 | # CKGR_PLLR 19 | monitor mww 0xFFFFFC2C 0x00481c0e 20 | monitor sleep 10 21 | 22 | # PMC_MCKR 23 | monitor mww 0xFFFFFC30 0x00000007 24 | monitor sleep 10 25 | 26 | # PMC_IER 27 | monitor mww 0xFFFFFF60 0x00480100 28 | monitor sleep 100 29 | 30 | load 31 | break main 32 | continue 33 | -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/prj/eclipse_rom.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 force_hw_bkpts enable 7 | 8 | # WDT_MR, disable watchdog 9 | monitor mww 0xFFFFFD44 0x00008000 10 | 11 | # RSTC_MR, enable user reset 12 | monitor mww 0xfffffd08 0xa5000001 13 | 14 | # CKGR_MOR 15 | monitor mww 0xFFFFFC20 0x00000601 16 | monitor sleep 10 17 | 18 | # CKGR_PLLR 19 | monitor mww 0xFFFFFC2C 0x00481c0e 20 | monitor sleep 10 21 | 22 | # PMC_MCKR 23 | monitor mww 0xFFFFFC30 0x00000007 24 | monitor sleep 10 25 | 26 | # PMC_IER 27 | monitor mww 0xFFFFFF60 0x00480100 28 | monitor sleep 100 29 | 30 | load 31 | break main 32 | continue 33 | -------------------------------------------------------------------------------- /tcl/mem_helper.tcl: -------------------------------------------------------------------------------- 1 | # Helper for common memory read/modify/write procedures 2 | 3 | # mrw: "memory read word", returns value of $reg 4 | proc mrw {reg} { 5 | set value "" 6 | mem2array value 32 $reg 1 7 | return $value(0) 8 | } 9 | 10 | add_usage_text mrw "address" 11 | add_help_text mrw "Returns value of word in memory." 12 | 13 | # mmw: "memory modify word", updates value of $reg 14 | # $reg <== ((value & ~$clearbits) | $setbits) 15 | proc mmw {reg setbits clearbits} { 16 | set old [mrw $reg] 17 | set new [expr ($old & ~$clearbits) | $setbits] 18 | mww $reg $new 19 | } 20 | 21 | add_usage_text mmw "address setbits clearbits" 22 | add_help_text mmw "Modify word in memory. new_val = (old_val & ~clearbits) | setbits;" 23 | -------------------------------------------------------------------------------- /tcl/target/at32ap7000.cfg: -------------------------------------------------------------------------------- 1 | # Atmel AT32AP7000 2 | # 3 | # This is the only core in the now-inactive high end AVR32 product line, 4 | # with MMU, Java Acceleration, and "pixel coprocessor". The AP7 line 5 | # is for "Application Processors" (AP) with 7-stage pipelines. 6 | # 7 | # Most current AVR32 parts are in the UC3 flash based microcontroller (UC) 8 | # product line with 3-stage pipelines and without those extras. 9 | # 10 | # All AVR32 parts provide the Nexus Class 3 on-chip debug interfaces 11 | # through their JTAG interfaces. 12 | 13 | jtag newtap ap7 nexus -irlen 5 -expected-id 0x21e8203f 14 | 15 | # REVISIT declare an avr32 target ... needs OpenOCD infrastructure 16 | # for both Nexus (generic) and AVR32 (Atmel-specific). 17 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/luminary-lm3s811.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Luminary Micro Stellaris LM3S811 Evaluation Kit 3 | # 4 | # http://www.luminarymicro.com/products/stellaris_811_evaluation_kits.html 5 | # 6 | # NOTE: this is only for boards *before* Rev C, which adds support 7 | # for SWO tracing with ADBUS_6 DBG_ENn and BDBUS_4 SWO_EN signals. 8 | # The "evb_lm3s811" layout doesn't set up those signals. 9 | # 10 | # Rev C boards work more like the other Stellaris eval boards. They 11 | # need to use the "luminary_icdi" layout to work correctly. 12 | # 13 | 14 | interface ftdi 15 | ftdi_device_desc "LM3S811 Evaluation Board" 16 | ftdi_vid_pid 0x0403 0xbcd9 17 | 18 | ftdi_layout_init 0x0088 0x008b 19 | ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 20 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-TINY-H 3 | # 4 | # http://www.olimex.com/dev/arm-usb-tiny-h.html 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, but is assumed to work as this" 9 | echo "interface uses the same layout as configs that were verified. Please report your" 10 | echo "experience with this file to openocd-devel mailing list, so it could be marked" 11 | echo "as working or fixed." 12 | 13 | interface ftdi 14 | ftdi_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" 15 | ftdi_vid_pid 0x15ba 0x002a 16 | 17 | ftdi_layout_init 0x0c08 0x0f1b 18 | ftdi_layout_signal nSRST -oe 0x0200 19 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 20 | ftdi_layout_signal LED -data 0x0800 21 | -------------------------------------------------------------------------------- /tcl/board/am3517evm.cfg: -------------------------------------------------------------------------------- 1 | # DANGER!!!! early work in progress for this PCB/target. 2 | # 3 | # The most basic operations work well enough that it is 4 | # useful to have this in the repository for cooperation 5 | # alpha testing purposes. 6 | # 7 | # TI AM3517 8 | # 9 | # http://focus.ti.com/docs/prod/folders/print/am3517.html 10 | # http://processors.wiki.ti.com/index.php/Debug_Access_Port_(DAP) 11 | # http://processors.wiki.ti.com/index.php?title=How_to_Find_the_Silicon_Revision_of_your_OMAP35x 12 | 13 | set CHIPTYPE "am35x" 14 | source [find target/amdm37x.cfg] 15 | 16 | # The TI-14 JTAG connector does not have srst. CPU reset is handled in 17 | # hardware. 18 | reset_config trst_only 19 | 20 | # "amdm37x_dbginit am35x.cpu" needs to be run after init. 21 | 22 | -------------------------------------------------------------------------------- /tcl/target/at91sam9260.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9260 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9260 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | 14 | # Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The 15 | # AT91SAM9260 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000. 16 | # Both areas are 4 kB long. 17 | 18 | #$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x1000 -work-area-backup 1 19 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1 20 | -------------------------------------------------------------------------------- /testing/examples/STR710JtagSpeed/prj/eclipse_ft2232_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | 3 | monitor reset 4 | monitor sleep 500 5 | monitor poll 6 | monitor soft_reset_halt 7 | monitor arm7_9 sw_bkpts enable 8 | monitor mww 0xA0000050 0x01c2 9 | monitor mdw 0xA0000050 10 | monitor mww 0x6C000004 0x8005 11 | monitor mdw 0x6C000004 12 | monitor mww 0xE0005000 0xFFFF 13 | monitor mww 0xE0005004 0x00FF 14 | monitor mww 0xE0005008 0xFFFF 15 | monitor mdw 0xE0005000 16 | monitor mdw 0xE0005004 17 | monitor mdw 0xE0005008 18 | monitor mww 0xE000500C 0x0000 19 | 20 | monitor arm7_9 fast_memory_access enable 21 | monitor arm7_9 dcc_downloads enable 22 | monitor verify_ircapture disable 23 | 24 | load 25 | break main 26 | continue 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/calao-usb-a9260-c01.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260-C01 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, but is assumed to work as this" 9 | echo "interface uses the same layout as configs that were verified. Please report your" 10 | echo "experience with this file to openocd-devel mailing list, so it could be marked" 11 | echo "as working or fixed." 12 | 13 | interface ftdi 14 | ftdi_device_desc "USB-A9260" 15 | ftdi_vid_pid 0x0403 0x6010 16 | 17 | ftdi_layout_init 0x0c08 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 19 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 20 | 21 | script interface/calao-usb-a9260.cfg 22 | script target/at91sam9260minimal.cfg 23 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/calao-usb-a9260-c02.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260-C02 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, but is assumed to work as this" 9 | echo "interface uses the same layout as configs that were verified. Please report your" 10 | echo "experience with this file to openocd-devel mailing list, so it could be marked" 11 | echo "as working or fixed." 12 | 13 | interface ftdi 14 | ftdi_device_desc "USB-A9260" 15 | ftdi_vid_pid 0x0403 0x6001 16 | 17 | ftdi_layout_init 0x0c08 0x0f1b 18 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 19 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 20 | 21 | script interface/calao-usb-a9260.cfg 22 | script target/at91sam9260minimal.cfg 23 | -------------------------------------------------------------------------------- /tcl/target/at91sam3nXX.cfg: -------------------------------------------------------------------------------- 1 | 2 | # 3 | # Configuration for Atmel's SAM3N series 4 | # 5 | 6 | if { [info exists CHIPNAME] } { 7 | set _CHIPNAME $CHIPNAME 8 | } else { 9 | set _CHIPNAME at91sam3n 10 | } 11 | 12 | if { [info exists CPUTAPID] } { 13 | set _CPUTAPID $CPUTAPID 14 | } else { 15 | set _CPUTAPID 0x4ba00477 16 | } 17 | 18 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 19 | 20 | set _TARGETNAME $_CHIPNAME.cpu 21 | target create $_TARGETNAME cortex_m3 -endian little -chain-position $_TARGETNAME 22 | 23 | set _FLASHNAME $_CHIPNAME.flash 24 | flash bank flash0 at91sam3 0x00400000 0 0 0 $_TARGETNAME 25 | 26 | # if srst is not fitted use SYSRESETREQ to 27 | # perform a soft reset 28 | cortex_m3 reset_config sysresetreq 29 | 30 | -------------------------------------------------------------------------------- /tcl/target/lpc1751.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1751 Cortex-M3 with 32kB Flash and 8kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1751 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x2000 9 | set CPUROMSIZE 0x8000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /tcl/target/lpc1752.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1752 Cortex-M3 with 64kB Flash and 16kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1752 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x4000 9 | set CPUROMSIZE 0x10000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /tcl/target/at91sam9263.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9263 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9263 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | # Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The 14 | # AT91SAM9263 has two SRAM areas, 15 | # one starting at 0x00300000 of 80KiB 16 | # and the other starting at 0x00500000 of 16KiB. 17 | 18 | # Internal sram1 memory 19 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x14000 -work-area-backup 1 20 | #$_TARGETNAME configure -work-area-phys 0x00500000 -work-area-size 0x4000 -work-area-backup 1 21 | -------------------------------------------------------------------------------- /tcl/target/lpc1754.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1754 Cortex-M3 with 128kB Flash and 16kB+16kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1754 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x4000 9 | set CPUROMSIZE 0x20000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /tcl/target/lpc1756.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1756 Cortex-M3 with 256kB Flash and 16kB+16kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1756 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x40000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /tcl/target/lpc1758.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1758 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1758 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x80000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /tcl/target/lpc1759.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1759 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1759 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x80000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /tcl/target/lpc1763.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1763 Cortex-M3 with 256kB Flash and 32kB+32kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1763 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x40000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /tcl/target/lpc1764.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1764 Cortex-M3 with 256kB Flash and 16kB+16kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1764 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x4000 9 | set CPUROMSIZE 0x20000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /tcl/target/lpc1765.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1765 Cortex-M3 with 256kB Flash and 32kB+1632kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1765 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x40000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /tcl/target/lpc1766.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1766 Cortex-M3 with 256kB Flash and 16kB+16kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1766 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x40000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /tcl/target/lpc1767.cfg: -------------------------------------------------------------------------------- 1 | # !!!!!!!!!!!! 2 | # ! UNTESTED ! 3 | # !!!!!!!!!!!! 4 | 5 | # NXP LPC1767 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, 6 | set CHIPNAME lpc1767 7 | set CPUTAPID 0x4ba00477 8 | set CPURAMSIZE 0x8000 9 | set CPUROMSIZE 0x80000 10 | 11 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 12 | # When board-specific code (reset-init handler or device firmware) 13 | # configures another oscillator and/or PLL0, set CCLK to match; if 14 | # you don't, then flash erase and write operations may misbehave. 15 | # (The ROM code doing those updates cares about core clock speed...) 16 | # 17 | # CCLK is the core clock frequency in KHz 18 | set CCLK 4000 19 | 20 | #Include the main configuration file. 21 | source [find target/lpc17xx.cfg]; 22 | -------------------------------------------------------------------------------- /testing/examples/ledtest-imx27ads/gdbinit-imx27ads: -------------------------------------------------------------------------------- 1 | echo Script to load ledtest on iMX27ADS.\n 2 | 3 | # Note: you need to startup openocd with "-f board/imx27ads.cfg" 4 | # in order to it initialize RAM memory. 5 | 6 | # SETUP GDB : 7 | # 8 | # Common gdb setup for ARM CPUs 9 | set complaints 1 10 | set output-radix 10 11 | set input-radix 10 12 | set prompt (arm-gdb) 13 | set endian little 14 | dir . 15 | 16 | # CONNECT TO TARGET : 17 | target remote 127.0.0.1:3333 18 | 19 | # LOAD IMAGE : 20 | # 21 | 22 | # Load the program executable called "u-boot" 23 | load test.elf 24 | 25 | # Load the symbols for the program. 26 | symbol-file test.elf 27 | 28 | # RUN TO MAIN : 29 | # 30 | # Set a breakpoint at main(). 31 | #b reset 32 | b main 33 | 34 | # Run to the breakpoint. 35 | c 36 | 37 | -------------------------------------------------------------------------------- /testing/examples/ledtest-imx31pdk/gdbinit-imx31pdk: -------------------------------------------------------------------------------- 1 | echo Script to load ledtest on iMX31PDK.\n 2 | 3 | # Note: you need to startup openocd with "-f board/imx31pdk.cfg" 4 | # in order to it initialize RAM memory. 5 | 6 | # SETUP GDB : 7 | # 8 | # Common gdb setup for ARM CPUs 9 | set complaints 1 10 | set output-radix 10 11 | set input-radix 10 12 | set prompt (arm-gdb) 13 | set endian little 14 | dir . 15 | 16 | # CONNECT TO TARGET : 17 | target remote 127.0.0.1:3333 18 | 19 | # LOAD IMAGE : 20 | # 21 | 22 | # Load the program executable called "u-boot" 23 | load test.elf 24 | 25 | # Load the symbols for the program. 26 | symbol-file test.elf 27 | 28 | # RUN TO MAIN : 29 | # 30 | # Set a breakpoint at main(). 31 | #b reset 32 | b main 33 | 34 | # Run to the breakpoint. 35 | c 36 | 37 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/dlp-usb1232h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # DLP Design DLP-USB1232H USB-to-UART/FIFO interface module 3 | # 4 | # http://www.dlpdesign.com/usb/usb1232h.shtml 5 | # 6 | # Schematics for OpenOCD usage: 7 | # http://randomprojects.org/wiki/DLP-USB1232H_and_OpenOCD_based_JTAG_adapter 8 | # 9 | 10 | echo "WARNING!" 11 | echo "This file was not tested with real interface, it is based on schematics and code" 12 | echo "in ft2232.c. Please report your experience with this file to openocd-devel" 13 | echo "mailing list, so it could be marked as working or fixed." 14 | 15 | interface ftdi 16 | ftdi_device_desc "Dual RS232-HS" 17 | ftdi_vid_pid 0x0403 0x6010 18 | 19 | ftdi_layout_init 0x0008 0x000b 20 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 21 | ftdi_layout_signal nSRST -data 0x0040 -oe 0x0040 22 | -------------------------------------------------------------------------------- /tcl/target/lpc1850.cfg: -------------------------------------------------------------------------------- 1 | 2 | adapter_khz 500 3 | 4 | if { [info exists CHIPNAME] } { 5 | set _CHIPNAME $CHIPNAME 6 | } else { 7 | set _CHIPNAME lpc1850 8 | } 9 | 10 | if { [info exists ENDIAN] } { 11 | set _ENDIAN $ENDIAN 12 | } else { 13 | set _ENDIAN little 14 | } 15 | # 16 | # M3 JTAG mode TAP 17 | # 18 | if { [info exists M3_JTAG_TAPID] } { 19 | set _M3_JTAG_TAPID $M3_JTAG_TAPID 20 | } else { 21 | set _M3_JTAG_TAPID 0x4ba00477 22 | } 23 | 24 | jtag newtap $_CHIPNAME m3 -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_JTAG_TAPID 25 | 26 | set _TARGETNAME $_CHIPNAME.m3 27 | target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME 28 | 29 | # if srst is not fitted use SYSRESETREQ to 30 | # perform a soft reset 31 | cortex_m3 reset_config sysresetreq 32 | -------------------------------------------------------------------------------- /tcl/target/smp8634.cfg: -------------------------------------------------------------------------------- 1 | # script for Sigma Designs SMP8634 (eventually even SMP8635) 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME smp8634 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | set _CPUTAPID 0x08630001 19 | } 20 | 21 | adapter_nsrst_delay 100 22 | jtag_ntrst_delay 100 23 | 24 | reset_config trst_and_srst separate 25 | 26 | # jtag scan chain 27 | # format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) 28 | jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1 29 | 30 | set _TARGETNAME $_CHIPNAME.cpu 31 | target create $_TARGETNAME mips_m4k -endian $_ENDIAN -variant 32 | -------------------------------------------------------------------------------- /tcl/target/ti-ar7.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Texas Instruments AR7 SOC - used in many adsl modems. 3 | # http://www.linux-mips.org/wiki/AR7 4 | # 5 | 6 | if { [info exists CHIPNAME] } { 7 | set _CHIPNAME $CHIPNAME 8 | } else { 9 | set _CHIPNAME ti-ar7 10 | } 11 | 12 | if { [info exists ENDIAN] } { 13 | set _ENDIAN $ENDIAN 14 | } else { 15 | set _ENDIAN little 16 | } 17 | 18 | if { [info exists CPUTAPID] } { 19 | set _CPUTAPID $CPUTAPID 20 | } else { 21 | set _CPUTAPID 0x0000100f 22 | } 23 | 24 | jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID 25 | 26 | set _TARGETNAME $_CHIPNAME.cpu 27 | target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_CHIPNAME.cpu 28 | 29 | # use onboard 4k sram as working area 30 | $_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 0x00001000 31 | -------------------------------------------------------------------------------- /tcl/target/feroceon.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Marvell Feroceon CPU core 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME feroceon 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | set _CPUTAPID 0x20a023d3 21 | } 22 | 23 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 24 | 25 | set _TARGETNAME $_CHIPNAME.cpu 26 | target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME 27 | 28 | reset_config trst_and_srst 29 | adapter_nsrst_delay 200 30 | jtag_ntrst_delay 200 31 | 32 | -------------------------------------------------------------------------------- /src/flash/nand/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | noinst_LTLIBRARIES = libocdflashnand.la 4 | 5 | libocdflashnand_la_SOURCES = \ 6 | ecc.c \ 7 | ecc_kw.c \ 8 | core.c \ 9 | fileio.c \ 10 | tcl.c \ 11 | arm_io.c \ 12 | $(NAND_DRIVERS) \ 13 | driver.c 14 | 15 | NAND_DRIVERS = \ 16 | nonce.c \ 17 | davinci.c \ 18 | lpc3180.c \ 19 | lpc32xx.c \ 20 | mxc.c \ 21 | mx3.c \ 22 | orion.c \ 23 | s3c24xx.c \ 24 | s3c2410.c \ 25 | s3c2412.c \ 26 | s3c2440.c \ 27 | s3c2443.c \ 28 | s3c6400.c \ 29 | at91sam9.c \ 30 | nuc910.c 31 | 32 | noinst_HEADERS = \ 33 | arm_io.h \ 34 | core.h \ 35 | driver.h \ 36 | fileio.h \ 37 | imp.h \ 38 | lpc3180.h \ 39 | lpc32xx.h \ 40 | mxc.h \ 41 | mx3.h \ 42 | s3c24xx.h \ 43 | s3c24xx_regs.h \ 44 | nuc910.h 45 | 46 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 47 | -------------------------------------------------------------------------------- /tcl/target/dragonite.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Marvell Dragonite CPU core 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME dragonite 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | set _CPUTAPID 0x121003d3 21 | } 22 | 23 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 24 | 25 | set _TARGETNAME $_CHIPNAME.cpu 26 | target create $_TARGETNAME dragonite -endian $_ENDIAN -chain-position $_TARGETNAME 27 | 28 | reset_config trst_and_srst 29 | adapter_nsrst_delay 200 30 | jtag_ntrst_delay 200 31 | 32 | -------------------------------------------------------------------------------- /tcl/target/faux.cfg: -------------------------------------------------------------------------------- 1 | #Script for faux target - used for testing 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME at91eb40a 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | set _CPUTAPID 0x00000000 19 | } 20 | 21 | 22 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 23 | 24 | #target configuration 25 | set _TARGETNAME $_CHIPNAME.cpu 26 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 27 | 28 | #dummy flash driver 29 | set _FLASHNAME $_CHIPNAME.flash 30 | flash bank $_FLASHNAME faux 0x01000000 0x200000 2 2 $_TARGETNAME 31 | -------------------------------------------------------------------------------- /tcl/target/lpc1788.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC1788 Cortex-M3 with 512kB Flash and 64kB Local On-Chip SRAM, 2 | set CHIPNAME lpc1788 3 | set CPUTAPID 0x4ba00477 4 | set CPURAMSIZE 0x10000 5 | set CPUROMSIZE 0x80000 6 | 7 | # After reset the chip is clocked by the ~12MHz internal RC oscillator. 8 | # When board-specific code (reset-init handler or device firmware) 9 | # configures another oscillator and/or PLL0, set CCLK to match; if 10 | # you don't, then flash erase and write operations may misbehave. 11 | # (The ROM code doing those updates cares about core clock speed...) 12 | # 13 | # CCLK is the core clock frequency in KHz 14 | set CCLK 12000 15 | 16 | #Include the main configuration file. 17 | source [find target/lpc17xx.cfg]; 18 | 19 | # if srst is not fitted, use SYSRESETREQ to perform a soft reset 20 | cortex_m3 reset_config sysresetreq 21 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/xds100v2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Texas Instruments XDS100v2 3 | # 4 | # http://processors.wiki.ti.com/index.php/XDS100#XDS100v2_Features 5 | # 6 | 7 | echo "WARNING!" 8 | echo "This file was not tested with real interface, it is based on schematics and code" 9 | echo "in ft2232.c. Please report your experience with this file to openocd-devel" 10 | echo "mailing list, so it could be marked as working or fixed." 11 | 12 | interface ftdi 13 | ftdi_device_desc "Texas Instruments Inc.XDS100 Ver 2.0" 14 | ftdi_vid_pid 0x0403 0xa6d0 15 | 16 | ftdi_layout_init 0x0838 0x597b 17 | ftdi_layout_signal nTRST -data 0x0010 18 | ftdi_layout_signal nSRST -oe 0x0100 19 | ftdi_layout_signal nEMU_EN -data 0x0020 20 | ftdi_layout_signal nEMU0 -data 0x0040 21 | ftdi_layout_signal nEMU1 -data 0x1000 22 | ftdi_layout_signal PWR_RST -data 0x0800 23 | ftdi_layout_signal LOOPBACK -data 0x4000 24 | -------------------------------------------------------------------------------- /tcl/board/hilscher_nxsb100.cfg: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | # Author: Michael Trensch (MTrensch@googlemail.com) 3 | ################################################################################ 4 | 5 | source [find target/hilscher_netx500.cfg] 6 | 7 | reset_config trst_and_srst 8 | adapter_nsrst_delay 500 9 | jtag_ntrst_delay 500 10 | 11 | $_TARGETNAME configure -work-area-virt 0x1000 -work-area-phys 0x1000 -work-area-size 0x4000 -work-area-backup 1 12 | 13 | $_TARGETNAME configure -event reset-init { 14 | halt 15 | 16 | arm7_9 fast_memory_access enable 17 | arm7_9 dcc_downloads enable 18 | 19 | sdram_fix 20 | 21 | puts "Configuring SDRAM controller for MT48LC2M32 (8MB) " 22 | mww 0x00100140 0 23 | mww 0x00100144 0x03C23251 24 | mww 0x00100140 0x030D0001 25 | 26 | } 27 | 28 | init 29 | reset init 30 | -------------------------------------------------------------------------------- /tools/uncrustify1.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | # Run the beautifier "Uncrustify" on a single file. 3 | # Because the file "uncrustify.cfg" only exists in the top level of the project 4 | # you should run this script from there so this script can find your uncrustify.cfg file. 5 | 6 | 7 | UNCRUSTIFYTMP=/tmp/uncrustify.tmp 8 | 9 | 10 | if [ ! -f uncrustify.cfg ]; then 11 | echo "unable to find uncrustify.cfg, aborting" 12 | exit 1 13 | fi 14 | 15 | UNCRUSTIFYBIN=`which uncrustify` 16 | 17 | if [ "$UNCRUSTIFYBIN" = "" ]; then 18 | echo "you must specify uncrustify in your PATH, I cannot find it" 19 | exit 2 20 | fi 21 | 22 | if [ $# -lt 1 ]; then 23 | echo "Usage $0 " 24 | exit 3 25 | fi 26 | 27 | uncrustify -c uncrustify.cfg <$1 >$UNCRUSTIFYTMP 28 | 29 | # you can comment this out while tuning the uncrustify.cfg file: 30 | mv $UNCRUSTIFYTMP $1 31 | -------------------------------------------------------------------------------- /tcl/target/at91sam9g20.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9G20 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set AT91_CHIPNAME $CHIPNAME 7 | } else { 8 | set AT91_CHIPNAME at91sam9g20 9 | } 10 | 11 | source [find target/at91sam9.cfg] 12 | 13 | # Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock). 14 | 15 | jtag_rclk 5 16 | 17 | # Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The 18 | # AT91SAM9G20 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000. 19 | # Both areas are 16 kB long. 20 | 21 | #$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 1 22 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1 23 | -------------------------------------------------------------------------------- /tcl/target/at91r40008.cfg: -------------------------------------------------------------------------------- 1 | # AT91R40008 target configuration file 2 | 3 | # TRST is tied to SRST on the AT91X40 family. 4 | reset_config srst_only srst_pulls_trst 5 | 6 | 7 | if {[info exists CHIPNAME]} { 8 | set _CHIPNAME $CHIPNAME 9 | } else { 10 | set _CHIPNAME at91r40008 11 | } 12 | 13 | if { [info exists ENDIAN] } { 14 | set _ENDIAN $ENDIAN 15 | } else { 16 | set _ENDIAN little 17 | } 18 | 19 | # Setup the JTAG scan chain. 20 | if { [info exists CPUTAPID] } { 21 | set _CPUTAPID $CPUTAPID 22 | } else { 23 | set _CPUTAPID 0x1f0f0f0f 24 | } 25 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 26 | 27 | set _TARGETNAME $_CHIPNAME.cpu 28 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi 29 | $_TARGETNAME configure -work-area-phys 0x20000 -work-area-size 0x20000 -work-area-backup 0 30 | -------------------------------------------------------------------------------- /testing/build.test1/README.TXT: -------------------------------------------------------------------------------- 1 | -- Duane Ellis'es test case for building numerous openocd configurations... 2 | Dec 26,2008 3 | --------------------------------------------------------------------------- 4 | 5 | 1) Make a directory some where.. 6 | 7 | mkdir ~/test 8 | 9 | 2) Change to that directory 10 | 11 | cd ~/test 12 | 13 | 3) Checkout OpenOCD in that directory. 14 | 15 | cd ~/test 16 | svn co https://svn.berlios.de/svnroot/repos/openocd/trunk openocd 17 | 18 | 4) Copy the "build.test1" directory to the "~/work" directory. 19 | 20 | 21 | cd ~/test 22 | cp ~/openocd/testing/build.test1/. ~/test/. 23 | 24 | 5) If needed, download various components. 25 | 26 | cd ~/work 27 | make all.download 28 | 29 | 30 | 6) For Linux - type: 31 | 32 | cd ~/work 33 | make linux.buildtest 34 | 35 | 7) For Cygwin - type: 36 | 37 | cd ~/work 38 | make cygwin.buildtest 39 | 40 | -------------------------------------------------------------------------------- /tcl/target/dsp56321.cfg: -------------------------------------------------------------------------------- 1 | # Script for freescale DSP56321 2 | # 3 | 4 | if { [info exists CHIPNAME] } { 5 | set _CHIPNAME $CHIPNAME 6 | } else { 7 | set _CHIPNAME dsp56321 8 | } 9 | 10 | if { [info exists ENDIAN] } { 11 | set _ENDIAN $ENDIAN 12 | } else { 13 | # this defaults to a big endian 14 | set _ENDIAN big 15 | } 16 | 17 | if { [info exists CPUTAPID] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | set _CPUTAPID 0x1181501d 21 | } 22 | 23 | #jtag speed 24 | adapter_khz 4500 25 | 26 | #has only srst 27 | reset_config srst_only 28 | 29 | #jtag scan chain 30 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0x1 -expected-id $_CPUTAPID 31 | 32 | #target configuration 33 | set _TARGETNAME $_CHIPNAME.cpu 34 | target create $_TARGETNAME dsp563xx -endian $_ENDIAN -chain-position $_TARGETNAME 35 | 36 | #working area at base of ram 37 | $_TARGETNAME configure -work-area-virt 0 38 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/dp_busblaster.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Dangerous Prototypes - Bus Blaster 3 | # 4 | # The Bus Blaster has a configurable buffer between the FTDI FT2232H and the 5 | # JTAG header which allows it to emulate various debugger types. It comes 6 | # configured as a JTAGkey device. 7 | # 8 | # http://dangerousprototypes.com/docs/Bus_Blaster 9 | # 10 | 11 | echo "WARNING!" 12 | echo "This file was not tested with real interface, but is assumed to work as this" 13 | echo "interface uses the same layout as configs that were verified. Please report your" 14 | echo "experience with this file to openocd-devel mailing list, so it could be marked" 15 | echo "as working or fixed." 16 | 17 | interface ftdi 18 | ftdi_device_desc "Dual RS232-HS" 19 | ftdi_vid_pid 0x0403 0x6010 20 | 21 | ftdi_layout_init 0x0c08 0x0f1b 22 | ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400 23 | ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800 24 | -------------------------------------------------------------------------------- /tcl/board/voltcraft_dso-3062c.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Voltcraft DSO-3062C digital oscilloscope (uses a Samsung S3C2440) 3 | # 4 | # http://www.eevblog.com/forum/general-chat/hantek-tekway-dso-hack-get-200mhz-bw-for-free/ 5 | # http://www.mikrocontroller.net/topic/249628 6 | # http://elinux.org/Das_Oszi 7 | # http://randomprojects.org/wiki/Voltcraft_DSO-3062C 8 | # 9 | 10 | # Enable this if your JTAG adapter supports multiple transports (JTAG or SWD). 11 | # Otherwise comment it out, as it will cause an OpenOCD error. 12 | ### transport select jtag 13 | 14 | source [find target/samsung_s3c2440.cfg] 15 | 16 | adapter_khz 16000 17 | 18 | # Samsung K9F1208U0C NAND flash chip (64MiB, 3.3V, 8-bit) 19 | nand device $_CHIPNAME.nand s3c2440 $_TARGETNAME 20 | 21 | # arm7_9 fast_memory_access enable 22 | # arm7_9 dcc_downloads enable 23 | 24 | init 25 | reset 26 | halt 27 | scan_chain 28 | targets 29 | nand probe 0 30 | nand list 31 | 32 | -------------------------------------------------------------------------------- /NEWS: -------------------------------------------------------------------------------- 1 | This file includes highlights of the changes made in the 2 | OpenOCD source archive release. See the 3 | repository history for details about what changed, including 4 | bugfixes and other issues not mentioned here. 5 | 6 | JTAG Layer: 7 | 8 | Boundary Scan: 9 | 10 | Target Layer: 11 | 12 | Flash Layer: 13 | 14 | Board, Target, and Interface Configuration Scripts: 15 | 16 | Documentation: 17 | 18 | Build and Release: 19 | 20 | For more details about what has changed since the last release, 21 | see the git repository history. With gitweb, you can browse that 22 | in various levels of detail. 23 | 24 | For older NEWS, see the NEWS files associated with each release 25 | (i.e. NEWS-). 26 | 27 | For more information about contributing test reports, bug fixes, or new 28 | features and device support, please read the new Developer Manual (or 29 | the BUGS and PATCHES.txt files in the source archive). 30 | -------------------------------------------------------------------------------- /src/flash/nor/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | noinst_LTLIBRARIES = libocdflashnor.la 4 | libocdflashnor_la_SOURCES = \ 5 | core.c \ 6 | tcl.c \ 7 | $(NOR_DRIVERS) \ 8 | drivers.c 9 | 10 | NOR_DRIVERS = \ 11 | aduc702x.c \ 12 | at91sam4.c \ 13 | at91sam3.c \ 14 | at91sam7.c \ 15 | avrf.c \ 16 | cfi.c \ 17 | efm32.c \ 18 | em357.c \ 19 | faux.c \ 20 | lpc2000.c \ 21 | lpc288x.c \ 22 | lpc2900.c \ 23 | lpcspifi.c \ 24 | non_cfi.c \ 25 | ocl.c \ 26 | pic32mx.c \ 27 | spi.c \ 28 | stmsmi.c \ 29 | stellaris.c \ 30 | stm32f1x.c \ 31 | stm32f2x.c \ 32 | stm32lx.c \ 33 | str7x.c \ 34 | str9x.c \ 35 | str9xpec.c \ 36 | tms470.c \ 37 | virtual.c \ 38 | fm3.c \ 39 | dsp5680xx_flash.c \ 40 | kinetis.c 41 | 42 | noinst_HEADERS = \ 43 | core.h \ 44 | cfi.h \ 45 | driver.h \ 46 | imp.h \ 47 | non_cfi.h \ 48 | ocl.h \ 49 | spi.h 50 | 51 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 52 | -------------------------------------------------------------------------------- /tcl/interface/luminary-icdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Luminary Micro Stellaris LM3S9B9x Evaluation Kits 3 | # In-Circuit Debug Interface (ICDI) Board 4 | # 5 | # Essentially all Luminary debug hardware is the same, (with both 6 | # JTAG and SWD support compatible with ICDI boards. This ICDI adapter 7 | # configuration is JTAG-only, but the same hardware handles SWD too. 8 | # 9 | # This is a discrete FT2232 based debug board which supports ARM's 10 | # JTAG/SWD connectors in both backwards-compatible 20-pin format and 11 | # in the new-style compact 10-pin. There's also an 8-pin connector 12 | # with serial port support. It's included with LM3S9B9x eval boards. 13 | # 14 | # http://www.luminarymicro.com/products/ek-lm3s9b90.html 15 | # http://www.luminarymicro.com/products/ek-lm3s9b92.html 16 | # 17 | 18 | interface ft2232 19 | ft2232_device_desc "Luminary Micro ICDI Board" 20 | ft2232_layout luminary_icdi 21 | ft2232_vid_pid 0x0403 0xbcda 22 | -------------------------------------------------------------------------------- /tcl/target/imx21.cfg: -------------------------------------------------------------------------------- 1 | #use combined on interfaces or targets that can't set TRST/SRST separately 2 | # 3 | # Hmmm.... should srst_pulls_trst be used here like i.MX27??? 4 | reset_config trst_and_srst 5 | 6 | if { [info exists CHIPNAME] } { 7 | set _CHIPNAME $CHIPNAME 8 | } else { 9 | set _CHIPNAME imx21 10 | } 11 | 12 | if { [info exists ENDIAN] } { 13 | set _ENDIAN $ENDIAN 14 | } else { 15 | set _ENDIAN little 16 | } 17 | 18 | 19 | # Note above there is 1 tap 20 | 21 | # The CPU tap 22 | if { [info exists CPUTAPID] } { 23 | set _CPUTAPID $CPUTAPID 24 | } else { 25 | set _CPUTAPID 0x0792611f 26 | } 27 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 28 | 29 | 30 | # Create the GDB Target. 31 | set _TARGETNAME $_CHIPNAME.cpu 32 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs 33 | 34 | arm7_9 dcc_downloads enable 35 | -------------------------------------------------------------------------------- /testing/build.test1/mingw32_help/include/elf.h: -------------------------------------------------------------------------------- 1 | /* elf.h 2 | 3 | Copyright 2005 Red Hat, Inc. 4 | 5 | This file is part of Cygwin. 6 | 7 | This software is a copyrighted work licensed under the terms of the 8 | Cygwin license. Please consult the file "CYGWIN_LICENSE" for 9 | details. */ 10 | 11 | #ifndef _ELF_H_ 12 | #define _ELF_H_ 13 | 14 | #include 15 | 16 | typedef signed char int8_t; 17 | typedef unsigned char u_int8_t; 18 | typedef short int16_t; 19 | typedef unsigned short u_int16_t; 20 | typedef int int32_t; 21 | typedef unsigned int u_int32_t; 22 | typedef long long int64_t; 23 | typedef unsigned long long u_int64_t; 24 | typedef int32_t register_t; 25 | 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | #include 31 | #include 32 | #include 33 | #include 34 | #ifdef __cplusplus 35 | } 36 | #endif 37 | 38 | #endif /*_ELF_H_*/ 39 | -------------------------------------------------------------------------------- /tcl/target/hilscher_netx10.cfg: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | # Author: Michael Trensch (MTrensch@googlemail.com) 3 | ################################################################################ 4 | 5 | #Hilscher netX 10 CPU 6 | 7 | if { [info exists CHIPNAME] } { 8 | set _CHIPNAME $CHIPNAME 9 | } else { 10 | set _CHIPNAME netx10 11 | } 12 | 13 | if { [info exists ENDIAN] } { 14 | set _ENDIAN $ENDIAN 15 | } else { 16 | set _ENDIAN little 17 | } 18 | 19 | if { [info exists CPUTAPID] } { 20 | set _CPUTAPID $CPUTAPID 21 | } else { 22 | set _CPUTAPID 0x25966021 23 | } 24 | 25 | # jtag scan chain 26 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 27 | 28 | # that TAP is associated with a target 29 | set _TARGETNAME $_CHIPNAME.cpu 30 | target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME 31 | 32 | -------------------------------------------------------------------------------- /config_subdir.m4: -------------------------------------------------------------------------------- 1 | dnl 2 | dnl If needed, define the m4_ifblank and m4_ifnblank macros from autoconf 2.64 3 | dnl This allows us to run with earlier Autoconfs as well. 4 | ifdef([m4_ifblank],[],[ 5 | m4_define([m4_ifblank], 6 | [m4_if(m4_translit([[$1]], [ ][ ][ 7 | ]), [], [$2], [$3])])]) 8 | dnl 9 | ifdef([m4_ifnblank],[],[ 10 | m4_define([m4_ifnblank], 11 | [m4_if(m4_translit([[$1]], [ ][ ][ 12 | ]), [], [$3], [$2])])]) 13 | dnl 14 | 15 | dnl AC_CONFIG_SUBDIRS does not allow configure options to be passed 16 | dnl to subdirs, this function allows that by creating a configure.gnu 17 | dnl script that prepends configure options and then calls the real 18 | dnl configure script 19 | AC_DEFUN([AX_CONFIG_SUBDIR_OPTION], 20 | [ 21 | AC_CONFIG_SUBDIRS([$1]) 22 | 23 | m4_ifblank([$2], [rm -f $srcdir/$1/configure.gnu], 24 | [printf "#!/bin/sh 25 | "\$"SHELL "../$srcdir/$1/configure" $2 \""\$"@"\" > "$srcdir/$1/configure.gnu" 26 | ]) 27 | ]) 28 | -------------------------------------------------------------------------------- /tcl/target/imx.cfg: -------------------------------------------------------------------------------- 1 | # utility fn's for Freescale i.MX series 2 | 3 | global TARGETNAME 4 | set TARGETNAME $_TARGETNAME 5 | 6 | # rewrite commands of the form below to arm11 mcr... 7 | # Data.Set c15:0x042f %long 0x40000015 8 | proc setc15 {regs value} { 9 | global TARGETNAME 10 | 11 | echo [format "set p15 0x%04x, 0x%08x" $regs $value] 12 | 13 | arm mcr 15 [expr ($regs>>12)&0x7] [expr ($regs>>0)&0xf] [expr ($regs>>4)&0xf] [expr ($regs>>8)&0x7] $value 14 | } 15 | 16 | 17 | proc imx3x_reset {} { 18 | # this reset script comes from the Freescale PDK 19 | # 20 | # http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=IMX35PDK 21 | 22 | echo "Target Setup: initialize DRAM controller and peripherals" 23 | 24 | # Data.Set c15:0x01 %long 0x00050078 25 | setc15 0x01 0x00050078 26 | 27 | echo "configuring CP15 for enabling the peripheral bus" 28 | # Data.Set c15:0x042f %long 0x40000015 29 | setc15 0x042f 0x40000015 30 | } 31 | -------------------------------------------------------------------------------- /tools/initial.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | TOPDIR=`pwd` 3 | USERNAME=$1 4 | 5 | if [ "x$1" = "x" ] ; then 6 | echo "Usage: $0 " 7 | exit 1 8 | fi 9 | 10 | add_remote() 11 | { 12 | remote_exist=`grep remote .git/config | grep review | wc -l` 13 | if [ "x$remote_exist" = "x0" ] ; then 14 | git remote add review ssh://$USERNAME@openocd.zylin.com:29418/openocd.git 15 | git config remote.review.push HEAD:refs/publish/master 16 | else 17 | echo "Remote review exists" 18 | fi 19 | } 20 | 21 | update_commit_msg() 22 | { 23 | cd "${TOPDIR}/.git/hooks" 24 | save_file=commit-msg-`date +%F-%T` 25 | mv commit-msg $save_file 26 | printf "%-30s" "Updating commit-msg" 27 | status="OK" 28 | wget -o log http://openocd.zylin.com/tools/hooks/commit-msg || status="FAIL" 29 | echo $status 30 | if [ $status = "FAIL" ] ; then 31 | mv $save_file commit-msg 32 | fi 33 | chmod a+x commit-msg 34 | } 35 | 36 | add_remote 37 | update_commit_msg 38 | -------------------------------------------------------------------------------- /tcl/target/imx28.cfg: -------------------------------------------------------------------------------- 1 | # i.MX28 config file. 2 | # based off of the imx21.cfg file. 3 | 4 | reset_config trst_and_srst 5 | 6 | #jtag nTRST and nSRST delay 7 | adapter_nsrst_delay 100 8 | jtag_ntrst_delay 100 9 | 10 | if { [info exists CHIPNAME] } { 11 | set _CHIPNAME $CHIPNAME 12 | } else { 13 | set _CHIPNAME imx28 14 | } 15 | 16 | if { [info exists ENDIAN] } { 17 | set _ENDIAN $ENDIAN 18 | } else { 19 | set _ENDIAN little 20 | } 21 | 22 | 23 | # Note above there is 1 tap 24 | 25 | # The CPU tap 26 | if { [info exists CPUTAPID ] } { 27 | set _CPUTAPID $CPUTAPID 28 | } else { 29 | set _CPUTAPID 0x079264f3 30 | } 31 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 32 | 33 | 34 | # Create the GDB Target. 35 | set _TARGETNAME $_CHIPNAME.cpu 36 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs 37 | 38 | arm7_9 dcc_downloads enable 39 | -------------------------------------------------------------------------------- /doc/manual/flash.txt: -------------------------------------------------------------------------------- 1 | /** @page flashdocs OpenOCD Flash APIs 2 | 3 | OpenOCD provides its Flash APIs for developers to support different 4 | types of flash devices, some of which are built-in to target devices 5 | while others may be connected via standard memory interface (e.g. CFI, 6 | FMI, etc.). 7 | 8 | The Flash module provides the following APIs: 9 | 10 | - @subpage flashcfi 11 | - @subpage flashnand 12 | - @subpage flashtarget 13 | 14 | This section needs to be expanded. 15 | 16 | */ 17 | 18 | 19 | /** @page flashcfi OpenOCD CFI Flash API 20 | 21 | This section needs to be expanded to describe OpenOCD's CFI Flash API. 22 | 23 | */ 24 | 25 | /** @page flashnand OpenOCD NAND Flash API 26 | 27 | This section needs to be expanded to describe OpenOCD's NAND Flash API. 28 | 29 | */ 30 | 31 | /** @page flashtarget OpenOCD Target Flash API 32 | 33 | This section needs to be expanded to describe OpenOCD's Target Flash API. 34 | 35 | */ 36 | -------------------------------------------------------------------------------- /src/target/xscale/debug_handler.cmd: -------------------------------------------------------------------------------- 1 | /* identify the Entry Point */ 2 | ENTRY(reset_handler) 3 | 4 | /* specify the mini-ICache memory areas */ 5 | MEMORY 6 | { 7 | mini_icache_0 (x) : ORIGIN = 0x0, LENGTH = 1024 /* first part of mini icache (sets 0-31) */ 8 | mini_icache_1 (x) : ORIGIN = 0x400, LENGTH = 1024 /* second part of mini icache (sets 0-31) */ 9 | } 10 | 11 | /* now define the output sections */ 12 | SECTIONS 13 | { 14 | .part1 : 15 | { 16 | LONG(0) 17 | LONG(0) 18 | LONG(0) 19 | LONG(0) 20 | LONG(0) 21 | LONG(0) 22 | LONG(0) 23 | LONG(0) 24 | *(.part1) 25 | } >mini_icache_0 26 | 27 | .part2 : 28 | { 29 | LONG(0) 30 | LONG(0) 31 | LONG(0) 32 | LONG(0) 33 | LONG(0) 34 | LONG(0) 35 | LONG(0) 36 | LONG(0) 37 | *(.part2) 38 | FILL(0x0) 39 | } >mini_icache_1 40 | 41 | /DISCARD/ : 42 | { 43 | *(.text) 44 | *(.glue_7) 45 | *(.glue_7t) 46 | *(.data) 47 | *(.bss) 48 | } 49 | } 50 | -------------------------------------------------------------------------------- /tcl/target/cs351x.cfg: -------------------------------------------------------------------------------- 1 | if { [info exists CHIPNAME] } { 2 | set _CHIPNAME $CHIPNAME 3 | } else { 4 | set _CHIPNAME cs351x 5 | } 6 | 7 | if { [info exists ENDIAN] } { 8 | set _ENDIAN $ENDIAN 9 | } else { 10 | set _ENDIAN little 11 | } 12 | 13 | if { [info exists CPUTAPID] } { 14 | set _CPUTAPID $CPUTAPID 15 | } else { 16 | set _CPUTAPID 0x00526fa1 17 | } 18 | 19 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 20 | 21 | # Create the GDB Target. 22 | set _TARGETNAME $_CHIPNAME.cpu 23 | target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME -variant fa526 24 | 25 | # There is 16K of SRAM on this chip 26 | # FIXME: flash programming is not working by using this work area. So comment this out for now. 27 | #$_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1 28 | 29 | # This chip has a DCC ... use it 30 | arm7_9 dcc_downloads enable 31 | 32 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/luminary-icdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Luminary Micro Stellaris LM3S9B9x Evaluation Kits 3 | # In-Circuit Debug Interface (ICDI) Board 4 | # 5 | # Essentially all Luminary debug hardware is the same, (with both 6 | # JTAG and SWD support compatible with ICDI boards. This ICDI adapter 7 | # configuration is JTAG-only, but the same hardware handles SWD too. 8 | # 9 | # This is a discrete ftdi based debug board which supports ARM's 10 | # JTAG/SWD connectors in both backwards-compatible 20-pin format and 11 | # in the new-style compact 10-pin. There's also an 8-pin connector 12 | # with serial port support. It's included with LM3S9B9x eval boards. 13 | # 14 | # http://www.luminarymicro.com/products/ek-lm3s9b90.html 15 | # http://www.luminarymicro.com/products/ek-lm3s9b92.html 16 | # 17 | 18 | interface ftdi 19 | ftdi_device_desc "Luminary Micro ICDI Board" 20 | ftdi_vid_pid 0x0403 0xbcda 21 | 22 | ftdi_layout_init 0x00a8 0x00eb 23 | ftdi_layout_signal nSRST -noe 0x0020 24 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/flossjtag-noeeprom.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FlossJTAG 3 | # 4 | # http://github.com/esden/floss-jtag 5 | # 6 | # This is the pre v0.3 Floss-JTAG compatible config file. It can also be used 7 | # for newer versions of Floss-JTAG with empty or not populated EEPROM. If you 8 | # have several Floss-JTAG connected you have to use the USB ID to select a 9 | # specific one. 10 | # 11 | # If you have a Floss-JTAG WITH EEPROM that is programmed, use the 12 | # flossjtag.cfg file. 13 | # 14 | 15 | echo "WARNING!" 16 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 17 | echo "Please report your experience with this file to openocd-devel mailing list," 18 | echo "so it could be marked as working or fixed." 19 | 20 | interface ftdi 21 | ftdi_device_desc "Dual RS232-HS" 22 | ftdi_vid_pid 0x0403 0x6010 23 | 24 | ftdi_layout_init 0x0008 0x000b 25 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 26 | ftdi_layout_signal nSRST -data 0x0040 -oe 0x0040 27 | -------------------------------------------------------------------------------- /tcl/target/stellaris_icdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # lm3s icdi pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME lm3s 9 | } 10 | 11 | # Work-area is a space in RAM used for flash programming 12 | # By default use 16kB 13 | if { [info exists WORKAREASIZE] } { 14 | set _WORKAREASIZE $WORKAREASIZE 15 | } else { 16 | set _WORKAREASIZE 0x4000 17 | } 18 | 19 | # 20 | # possible value are hla_jtag 21 | # currently swd is not supported 22 | # 23 | transport select hla_jtag 24 | 25 | # do not check id as icdi currently does not support it 26 | hla newtap $_CHIPNAME cpu -expected-id 0 27 | 28 | set _TARGETNAME $_CHIPNAME.cpu 29 | target create $_TARGETNAME hla_target -chain-position $_TARGETNAME 30 | 31 | $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 32 | 33 | # flash configuration ... autodetects sizes, autoprobed 34 | flash bank $_CHIPNAME.flash stellaris 0 0 0 0 $_TARGETNAME 35 | -------------------------------------------------------------------------------- /tcl/test/syntax1.cfg: -------------------------------------------------------------------------------- 1 | adapter_nsrst_delay 200 2 | jtag_ntrst_delay 200 3 | 4 | #use combined on interfaces or targets that can't set TRST/SRST separately 5 | reset_config trst_and_srst srst_pulls_trst 6 | 7 | #LPCs need reset pulled while RTCK is low. 0 to activate JTAG, power-on reset is not enough 8 | jtag_reset 1 1 9 | jtag_reset 0 0 10 | 11 | #jtag scan chain 12 | #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) 13 | jtag newtap lpc2148 one -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4f1f0f0f 14 | 15 | #target configuration 16 | #daemon_startup reset 17 | 18 | set _TARGETNAME [format "%s.cpu" lpc2148] 19 | target create lpc2148.cpu arm7tdmi -endian little -work-area-size 0x4000 -work-area-phys 0x40000000 -work-area-backup 0 20 | 21 | $_TARGETNAME configure -event reset-init { 22 | soft_reset_halt 23 | mvb 0xE01FC040 0x01 24 | } 25 | 26 | 27 | 28 | set _FLASHNAME $_CHIPNAME.flash 29 | flash bank $_FLASHNAME lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 30 | 31 | -------------------------------------------------------------------------------- /tcl/target/at91sam9.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9 3 | ###################################### 4 | 5 | if { [info exists AT91_CHIPNAME] } { 6 | set _CHIPNAME $AT91_CHIPNAME 7 | } else { 8 | error "you must specify a chip name" 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | set _CPUTAPID 0x0792603f 21 | } 22 | 23 | reset_config trst_and_srst separate trst_push_pull srst_open_drain 24 | 25 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 26 | 27 | adapter_nsrst_delay 300 28 | jtag_ntrst_delay 200 29 | 30 | jtag_rclk 3 31 | 32 | ###################### 33 | # Target configuration 34 | ###################### 35 | 36 | set _TARGETNAME $_CHIPNAME.cpu 37 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs 38 | -------------------------------------------------------------------------------- /tcl/chip/atmel/at91/at91_wdt.cfg: -------------------------------------------------------------------------------- 1 | set AT91_WDT_CR [expr ($AT91_WDT + 0x00)] ;# Watchdog Control Register 2 | set AT91_WDT_WDRSTT [expr (1 << 0)] ;# Restart 3 | set AT91_WDT_KEY [expr (0xa5 << 24)] ;# KEY Password 4 | 5 | set AT91_WDT_MR [expr ($AT91_WDT + 0x04)] ;# Watchdog Mode Register 6 | set AT91_WDT_WDV [expr (0xfff << 0)] ;# Counter Value 7 | set AT91_WDT_WDFIEN [expr (1 << 12)] ;# Fault Interrupt Enable 8 | set AT91_WDT_WDRSTEN [expr (1 << 13)] ;# Reset Processor 9 | set AT91_WDT_WDRPROC [expr (1 << 14)] ;# Timer Restart 10 | set AT91_WDT_WDDIS [expr (1 << 15)] ;# Watchdog Disable 11 | set AT91_WDT_WDD [expr (0xfff << 16)] ;# Delta Value 12 | set AT91_WDT_WDDBGHLT [expr (1 << 28)] ;# Debug Halt 13 | set AT91_WDT_WDIDLEHLT [expr (1 << 29)] ;# Idle Halt 14 | 15 | set AT91_WDT_SR [expr ($AT91_WDT + 0x08)] ;# Watchdog Status Register 16 | set AT91_WDT_WDUNF [expr (1 << 0)] ;# Watchdog Underflow 17 | set AT91_WDT_WDERR [expr (1 << 1)] ;# Watchdog Error 18 | -------------------------------------------------------------------------------- /tcl/target/k40.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Freescale Kinetis K40 devices 3 | # 4 | 5 | # 6 | # K40 devices support both JTAG and SWD transports. 7 | # 8 | source [find target/swj-dp.tcl] 9 | 10 | if { [info exists CHIPNAME] } { 11 | set _CHIPNAME $CHIPNAME 12 | } else { 13 | set _CHIPNAME k40 14 | } 15 | 16 | if { [info exists ENDIAN] } { 17 | set _ENDIAN $ENDIAN 18 | } else { 19 | set _ENDIAN little 20 | } 21 | 22 | if { [info exists CPUTAPID] } { 23 | set _CPUTAPID $CPUTAPID 24 | } else { 25 | set _CPUTAPID 0x4ba00477 26 | } 27 | 28 | set _TARGETNAME $_CHIPNAME.cpu 29 | 30 | swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 31 | 32 | target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu 33 | 34 | $_CHIPNAME.cpu configure -event examine-start { puts "START..." ; } 35 | $_CHIPNAME.cpu configure -event examine-end { puts "END..." ; } 36 | 37 | # if srst is not fitted use SYSRESETREQ to 38 | # perform a soft reset 39 | cortex_m3 reset_config sysresetreq 40 | -------------------------------------------------------------------------------- /tcl/target/k60.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Freescale Kinetis K60 devices 3 | # 4 | 5 | # 6 | # K60 devices support both JTAG and SWD transports. 7 | # 8 | source [find target/swj-dp.tcl] 9 | 10 | if { [info exists CHIPNAME] } { 11 | set _CHIPNAME $CHIPNAME 12 | } else { 13 | set _CHIPNAME k60 14 | } 15 | 16 | if { [info exists ENDIAN] } { 17 | set _ENDIAN $ENDIAN 18 | } else { 19 | set _ENDIAN little 20 | } 21 | 22 | if { [info exists CPUTAPID] } { 23 | set _CPUTAPID $CPUTAPID 24 | } else { 25 | set _CPUTAPID 0x4ba00477 26 | } 27 | 28 | set _TARGETNAME $_CHIPNAME.cpu 29 | 30 | swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 31 | 32 | target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu 33 | 34 | $_CHIPNAME.cpu configure -event examine-start { puts "START..." ; } 35 | $_CHIPNAME.cpu configure -event examine-end { puts "END..." ; } 36 | 37 | # if srst is not fitted use SYSRESETREQ to 38 | # perform a soft reset 39 | cortex_m3 reset_config sysresetreq 40 | -------------------------------------------------------------------------------- /tcl/target/lpc2103.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2103 ARM7TDMI-S with 32kB flash and 8kB SRAM, clocked with 12MHz crystal 2 | 3 | source [find target/lpc2xxx.cfg] 4 | 5 | # parameters: 6 | # - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000 7 | # - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000 8 | 9 | proc setup_lpc2103 {core_freq_khz adapter_freq_khz} { 10 | # 32kB flash and 8kB SRAM 11 | # setup_lpc2xxx 12 | setup_lpc2xxx lpc2103 0x4f1f0f0f 0x8000 lpc2000_v2 0x2000 $core_freq_khz $adapter_freq_khz 13 | } 14 | 15 | proc init_targets {} { 16 | # default to core clocked with 12MHz crystal 17 | echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." 18 | 19 | # setup_lpc2103 20 | setup_lpc2103 12000 1500 21 | } 22 | -------------------------------------------------------------------------------- /tcl/target/lpc2124.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2124 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal 2 | 3 | source [find target/lpc2xxx.cfg] 4 | 5 | # parameters: 6 | # - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000 7 | # - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000 8 | 9 | proc setup_lpc2124 {core_freq_khz adapter_freq_khz} { 10 | # 256kB flash and 16kB SRAM 11 | # setup_lpc2xxx 12 | setup_lpc2xxx lpc2124 0x4f1f0f0f 0x40000 lpc2000_v1 0x4000 $core_freq_khz $adapter_freq_khz 13 | } 14 | 15 | proc init_targets {} { 16 | # default to core clocked with 12MHz crystal 17 | echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." 18 | 19 | # setup_lpc2124 20 | setup_lpc2124 12000 1500 21 | } 22 | -------------------------------------------------------------------------------- /tcl/target/lpc2129.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2129 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal 2 | 3 | source [find target/lpc2xxx.cfg] 4 | 5 | # parameters: 6 | # - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000 7 | # - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000 8 | 9 | proc setup_lpc2129 {core_freq_khz adapter_freq_khz} { 10 | # 256kB flash and 16kB SRAM 11 | # setup_lpc2xxx 12 | setup_lpc2xxx lpc2129 0xcf1f0f0f 0x40000 lpc2000_v1 0x4000 $core_freq_khz $adapter_freq_khz 13 | } 14 | 15 | proc init_targets {} { 16 | # default to core clocked with 12MHz crystal 17 | echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." 18 | 19 | # setup_lpc2129 20 | setup_lpc2129 12000 1500 21 | } 22 | -------------------------------------------------------------------------------- /tcl/target/efm32_stlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # efm32 stlink pseudo target 3 | # 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME efm32 9 | } 10 | 11 | # Work-area is a space in RAM used for flash programming 12 | # By default use 16kB 13 | if { [info exists WORKAREASIZE] } { 14 | set _WORKAREASIZE $WORKAREASIZE 15 | } else { 16 | set _WORKAREASIZE 0x4000 17 | } 18 | 19 | if { [info exists CPUTAPID] } { 20 | set _CPUTAPID $CPUTAPID 21 | } else { 22 | set _CPUTAPID 0x2ba01477 23 | } 24 | 25 | # EFM32 MCUs only support SW interface 26 | set _TRANSPORT hla_swd 27 | 28 | transport select $_TRANSPORT 29 | 30 | hla newtap $_CHIPNAME cpu -expected-id $_CPUTAPID 31 | 32 | set _TARGETNAME $_CHIPNAME.cpu 33 | target create $_TARGETNAME hla_target -chain-position $_TARGETNAME 34 | 35 | $_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 36 | 37 | set _FLASHNAME $_CHIPNAME.flash 38 | flash bank $_FLASHNAME efm32 0 0 0 0 $_TARGETNAME 39 | -------------------------------------------------------------------------------- /tcl/board/x300t.cfg: -------------------------------------------------------------------------------- 1 | # This is for the T-Home X300T / X301T IPTV box, 2 | # which are based on IPTV reference designs from Kiss/Cisco KMM-3*** 3 | # 4 | # It has Sigma Designs SMP8634 chip. 5 | source [find target/smp8634.cfg] 6 | 7 | $_TARGETNAME configure -event reset-init { x300t_init } 8 | 9 | # 1MB CFI capable flash 10 | # flash bank 11 | set _FLASHNAME $_CHIPNAME.flash 12 | flash bank $_FLASHNAME cfi 0xac000000 0x100000 2 2 $_TARGETNAME 13 | 14 | proc x300t_init { } { 15 | # Setup SDRAM config and flash mapping 16 | # initialize ram 17 | mww 0xa003fffc 3 18 | mww 0xa003fffc 2 19 | mww 0xa0030000 0xE34111BA 20 | mww 0xa003fffc 0xa4444 21 | mww 0xa003fffc 0 22 | 23 | # remap boot vector in CPU local RAM 24 | mww 0xa006f000 0x60000 25 | 26 | # map flash to CPU address space REG_BASE_cpu_block+CPU_remap4 27 | mww 0x0006f010 0x48000000 28 | 29 | # map flash addr to REG_BASE_cpu_block + LR_XENV_LOCATION (normally done by XOS) 30 | mww 0x00061ff0 0x48000000 31 | } 32 | -------------------------------------------------------------------------------- /tcl/target/atmega128.cfg: -------------------------------------------------------------------------------- 1 | # for avr 2 | 3 | set _CHIPNAME avr 4 | set _ENDIAN little 5 | 6 | # jtag speed 7 | adapter_khz 4500 8 | 9 | reset_config srst_only 10 | adapter_nsrst_delay 100 11 | 12 | #jtag scan chain 13 | if { [info exists CPUTAPID] } { 14 | set _CPUTAPID $CPUTAPID 15 | } else { 16 | set _CPUTAPID 0x8970203F 17 | } 18 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 19 | 20 | set _TARGETNAME $_CHIPNAME.cpu 21 | target create $_TARGETNAME avr -endian $_ENDIAN -chain-position $_TARGETNAME 22 | 23 | #$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0 24 | 25 | set _FLASHNAME $_CHIPNAME.flash 26 | flash bank $_FLASHNAME avr 0 0 0 0 $_TARGETNAME 27 | 28 | #to use it, script will be like: 29 | #init 30 | #adapter_khz 4500 31 | #reset init 32 | #verify_ircapture disable 33 | # 34 | #halt 35 | #wait halt 36 | #poll 37 | #avr mass_erase 0 38 | #flash write_image E:/Versaloon/Software/CAMERAPROTOCOLAGENT.hex 39 | #reset run 40 | #shutdown 41 | -------------------------------------------------------------------------------- /tcl/target/swj-dp.tcl: -------------------------------------------------------------------------------- 1 | # ARM Debug Interface V5 (ADI_V5) utility 2 | # ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since 3 | # SW-DP and JTAG-DP targets don't need to switch based 4 | # on which transport is active. 5 | # 6 | # declare a JTAG or SWD Debug Access Point (DAP) 7 | # based on the transport in use with this session. 8 | # You can't access JTAG ops when SWD is active, etc. 9 | 10 | # params are currently what "jtag newtap" uses 11 | # because OpenOCD internals are still strongly biased 12 | # to JTAG .... but for SWD, "irlen" etc are ignored, 13 | # and the internals work differently 14 | 15 | # for now, ignore non-JTAG and non-SWD transports 16 | # (e.g. initial flash programming via SPI or UART) 17 | 18 | # split out "chip" and "tag" so we can someday handle 19 | # them more uniformly irlen too...) 20 | 21 | proc swj_newdap {chip tag args} { 22 | set tran [transport select] 23 | if [string equal $tran "jtag"] { eval jtag newtap $chip $tag $args} 24 | if [string equal $tran "swd"] { eval swd newdap $chip $tag $args } 25 | } 26 | -------------------------------------------------------------------------------- /tcl/target/lpc2460.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2460 ARM7TDMI-S with 98kB SRAM (16kB for ETH, 16kB for DMA, 2kB for RTC), clocked with 4MHz internal oscillator 2 | 3 | source [find target/lpc2xxx.cfg] 4 | 5 | # parameters: 6 | # - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000 7 | # - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000 8 | 9 | proc setup_lpc2460 {core_freq_khz adapter_freq_khz} { 10 | # 64kB SRAM 11 | # setup_lpc2xxx 12 | setup_lpc2xxx lpc2460 0x4f1f0f0f 0 lpc2000_v2 0x10000 $core_freq_khz $adapter_freq_khz 13 | } 14 | 15 | proc init_targets {} { 16 | # default to core clocked with 4MHz internal oscillator 17 | echo "Warning - assuming default core clock 4MHz! Flashing may fail if actual core clock is different." 18 | 19 | # setup_lpc2460 20 | setup_lpc2460 4000 500 21 | } 22 | -------------------------------------------------------------------------------- /testing/results/template.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | Testcases 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
TestInterfaceTargetResult
CON001 FILL IN! FILL IN!PASS/FAIL
CON002 FILL IN! FILL IN!PASS/FAIL
RES001 FILL IN! FILL IN!PASS/FAIL
RES002 FILL IN! FILL IN!PASS/FAIL
RES003 FILL IN! FILL IN!PASS/FAIL
DBG001 FILL IN! FILL IN!PASS/FAIL
16 | 17 | 18 | -------------------------------------------------------------------------------- /tcl/target/epc9301.cfg: -------------------------------------------------------------------------------- 1 | # Cirrus Logic EP9301 processor on an Olimex CS-E9301 board. 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME ep9301 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | # Force an error until we get a good number. 19 | set _CPUTAPID 0xffffffff 20 | } 21 | 22 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 23 | adapter_nsrst_delay 100 24 | jtag_ntrst_delay 100 25 | 26 | set _TARGETNAME $_CHIPNAME.cpu 27 | target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -work-area-phys 0x80014000 -work-area-size 0x1000 -work-area-backup 1 28 | 29 | #flash configuration 30 | #flash bank [driver_options ...] 31 | set _FLASHNAME $_CHIPNAME.flash 32 | flash bank $_FLASHNAME cfi 0x60000000 0x1000000 2 2 $_TARGETNAME 33 | -------------------------------------------------------------------------------- /tcl/target/lpc2294.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2294 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal 2 | 3 | source [find target/lpc2xxx.cfg] 4 | 5 | # parameters: 6 | # - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000 7 | # - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000 8 | 9 | proc setup_lpc2294 {core_freq_khz adapter_freq_khz} { 10 | # 256kB flash and 16kB SRAM 11 | # setup_lpc2xxx 12 | 13 | # !! TAPID unknown !! 14 | setup_lpc2xxx lpc2294 0xffffffff 0x40000 lpc2000_v1 0x4000 $core_freq_khz $adapter_freq_khz 15 | } 16 | 17 | proc init_targets {} { 18 | # default to core clocked with 12MHz crystal 19 | echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." 20 | 21 | # setup_lpc2294 22 | setup_lpc2294 12000 1500 23 | } 24 | -------------------------------------------------------------------------------- /tcl/chip/atmel/at91/at91sam9_smc.cfg: -------------------------------------------------------------------------------- 1 | set AT91_SMC_READMODE [expr (1 << 0)] ;# Read Mode 2 | set AT91_SMC_WRITEMODE [expr (1 << 1)] ;# Write Mode 3 | set AT91_SMC_EXNWMODE [expr (3 << 4)] ;# NWAIT Mode 4 | set AT91_SMC_EXNWMODE_DISABLE [expr (0 << 4)] 5 | set AT91_SMC_EXNWMODE_FROZEN [expr (2 << 4)] 6 | set AT91_SMC_EXNWMODE_READY [expr (3 << 4)] 7 | set AT91_SMC_BAT [expr (1 << 8)] ;# Byte Access Type 8 | set AT91_SMC_BAT_SELECT [expr (0 << 8)] 9 | set AT91_SMC_BAT_WRITE [expr (1 << 8)] 10 | set AT91_SMC_DBW [expr (3 << 12)] ;# Data Bus Width */ 11 | set AT91_SMC_DBW_8 [expr (0 << 12)] 12 | set AT91_SMC_DBW_16 [expr (1 << 12)] 13 | set AT91_SMC_DBW_32 [expr (2 << 12)] 14 | set AT91_SMC_TDFMODE [expr (1 << 20)] ;# TDF Optimization - Enabled 15 | set AT91_SMC_PMEN [expr (1 << 24)] ;# Page Mode Enabled 16 | set AT91_SMC_PS [expr (3 << 28)] ;# Page Size 17 | set AT91_SMC_PS_4 [expr (0 << 28)] 18 | set AT91_SMC_PS_8 [expr (1 << 28)] 19 | set AT91_SMC_PS_16 [expr (2 << 28)] 20 | set AT91_SMC_PS_32 [expr (3 << 28)] 21 | -------------------------------------------------------------------------------- /testing/examples/AT91R40008Test/test_ram.hex: -------------------------------------------------------------------------------- 1 | :1000000018F09FE518F09FE518F09FE518F09FE5C0 2 | :1000100018F09FE518F09FE518F09FE518F09FE5B0 3 | :1000200040000000B0000000B4000000B800000074 4 | :10003000BC00000000000000C0000000C400000080 5 | :10004000DBF021E37CD09FE5D7F021E378D09FE57A 6 | :10005000D1F021E374D09FE5D2F021E370D09FE589 7 | :10006000D3F021E36CD09FE56C109FE56C209FE5F9 8 | :100070000030A0E3020051E104308114FCFFFF1ABC 9 | :1000800000000FE1C000C0E300F029E10000A0E3A0 10 | :100090000010A0E348209FE50FE0A0E112FF2FE150 11 | :1000A0000000A0E10000A0E10000A0E1FBFFFFEAEA 12 | :1000B000FEFFFFEAFEFFFFEAFEFFFFEAFEFFFFEAA8 13 | :1000C000FEFFFFEAFEFFFFEA000600000005000059 14 | :1000D0000003000000040000000A00004C010000C2 15 | :1000E0004C010000E80000000CD04DE20130A0E31C 16 | :1000F00000308DE50230A0E304308DE50030A0E350 17 | :1001000008308DE538309FE5002093E500309DE50F 18 | :10011000023083E000308DE500309DE5013083E260 19 | :1001200000308DE504309DE5013083E204308DE53B 20 | :1001300000209DE504309DE5033082E008308DE528 21 | :0C014000F4FFFFEA480100000700000087 22 | :0400000300000040B9 23 | :00000001FF 24 | -------------------------------------------------------------------------------- /tcl/target/lpc2148.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2148 ARM7TDMI-S with 512kB flash (12kB used by bootloader) and 40kB SRAM (8kB for USB DMA), clocked with 12MHz crystal 2 | 3 | source [find target/lpc2xxx.cfg] 4 | 5 | # parameters: 6 | # - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000 7 | # - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000 8 | 9 | proc setup_lpc2148 {core_freq_khz adapter_freq_khz} { 10 | # 500kB flash and 32kB SRAM 11 | # setup_lpc2xxx 12 | setup_lpc2xxx lpc2148 "0x3f0f0f0f 0x4f1f0f0f" 0x7d000 lpc2000_v2 0x8000 $core_freq_khz $adapter_freq_khz 13 | } 14 | 15 | proc init_targets {} { 16 | # default to core clocked with 12MHz crystal 17 | echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different." 18 | 19 | # setup_lpc2148 20 | setup_lpc2148 12000 1500 21 | } 22 | -------------------------------------------------------------------------------- /contrib/loaders/README: -------------------------------------------------------------------------------- 1 | Included in these directories are the src to the various ram loaders used 2 | within openocd. 3 | 4 | ** target checksum loaders ** 5 | 6 | checksum/armv4_5_crc.s : 7 | - ARMv4 and ARMv5 checksum loader : see target/arm_crc_code.c:arm_crc_code 8 | 9 | checksum/armv7m_crc.s : 10 | - ARMv7m checksum loader : see target/armv7m.c:cortex_m3_crc_code 11 | 12 | checksum/mips32.s : 13 | - MIPS32 checksum loader : see target/mips32.c:mips_crc_code 14 | 15 | ** target flash loaders ** 16 | 17 | flash/pic32mx.s : 18 | - Microchip PIC32 flash loader : see flash/nor/pic32mx.c:pic32mx_flash_write_code 19 | 20 | flash/stellaris.s : 21 | - TI Stellaris flash loader : see flash/nor/stellaris.c:stellaris_write_code 22 | 23 | flash/stm32x.s : 24 | - ST STM32 flash loader : see flash/nor/stm32x.c:stm32x_flash_write_code 25 | 26 | flash/str7x.s : 27 | - ST STR7 flash loader : see flash/nor/str7x.c:str7x_flash_write_code 28 | 29 | flash/str9x.s : 30 | - ST STR9 flash loader : see flash/nor/str9x.c:str9x_flash_write_code 31 | 32 | Spencer Oliver 33 | spen@spen-soft.co.uk 34 | -------------------------------------------------------------------------------- /tcl/interface/ftdi/flossjtag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FlossJTAG 3 | # 4 | # http://github.com/esden/floss-jtag 5 | # 6 | # This is the v0.3 and v1.0 Floss-JTAG compatible config file. It relies on the 7 | # existence of an EEPROM on Floss-JTAG containing a name. If you have several 8 | # Floss-JTAG adapters connected you can use the serial number to select a 9 | # specific device. 10 | # 11 | # If your Floss-JTAG does not have an EEPROM, or the EEPROM is empty, use the 12 | # flossjtag-noeeprom.cfg file. 13 | # 14 | 15 | echo "WARNING!" 16 | echo "This file was not tested with real interface, it is based on code in ft2232.c." 17 | echo "Please report your experience with this file to openocd-devel mailing list," 18 | echo "so it could be marked as working or fixed." 19 | 20 | interface ftdi 21 | ftdi_vid_pid 0x0403 0x6010 22 | ftdi_device_desc "FLOSS-JTAG" 23 | #ftdi_serial "FJ000001" 24 | 25 | ftdi_layout_init 0x0008 0x180b 26 | ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 27 | ftdi_layout_signal nSRST -data 0x0040 -oe 0x0040 28 | ftdi_layout_signal LED -data 0x0800 29 | ftdi_layout_signal LED2 -data 0x1000 30 | -------------------------------------------------------------------------------- /tcl/target/lpc2378.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2378 ARM7TDMI-S with 512kB flash (8kB used by bootloader) and 56kB SRAM (16kB for ETH, 8kB for DMA), clocked with 4MHz internal oscillator 2 | 3 | source [find target/lpc2xxx.cfg] 4 | 5 | # parameters: 6 | # - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000 7 | # - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000 8 | 9 | proc setup_lpc2378 {core_freq_khz adapter_freq_khz} { 10 | # 504kB flash and 32kB SRAM 11 | # setup_lpc2xxx 12 | setup_lpc2xxx lpc2378 0x4f1f0f0f 0x7e000 lpc2000_v2 0x8000 $core_freq_khz $adapter_freq_khz 13 | } 14 | 15 | proc init_targets {} { 16 | # default to core clocked with 4MHz internal oscillator 17 | echo "Warning - assuming default core clock 4MHz! Flashing may fail if actual core clock is different." 18 | 19 | # setup_lpc2378 20 | setup_lpc2378 4000 500 21 | } 22 | --------------------------------------------------------------------------------