├── openocd.cfg ├── .gitignore ├── .vscode ├── extensions.json ├── tasks.json ├── launch.json └── README.md ├── memory.x ├── Cargo.toml ├── openocd.gdb ├── src └── main.rs ├── .cargo └── config.toml └── README.md /openocd.cfg: -------------------------------------------------------------------------------- 1 | # Sample OpenOCD configuration for the STM32F3DISCOVERY development board 2 | 3 | source [find interface/cmsis-dap.cfg] 4 | 5 | source [find target/stm32h7x.cfg] 6 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | **/*.rs.bk 2 | .#* 3 | .gdb_history 4 | Cargo.lock 5 | target/ 6 | 7 | # editor files 8 | .vscode/* 9 | !.vscode/*.md 10 | !.vscode/*.svd 11 | !.vscode/launch.json 12 | !.vscode/tasks.json 13 | !.vscode/extensions.json -------------------------------------------------------------------------------- /.vscode/extensions.json: -------------------------------------------------------------------------------- 1 | { 2 | // See https://go.microsoft.com/fwlink/?LinkId=827846 to learn about workspace recommendations. 3 | // Extension identifier format: ${publisher}.${name}. Example: vscode.csharp 4 | 5 | // List of extensions which should be recommended for users of this workspace. 6 | "recommendations": [ 7 | "rust-lang.rust-analyzer", 8 | "marus25.cortex-debug", 9 | ], 10 | // List of extensions recommended by VS Code that should not be recommended for users of this workspace. 11 | "unwantedRecommendations": [ 12 | 13 | ] 14 | } 15 | -------------------------------------------------------------------------------- /memory.x: -------------------------------------------------------------------------------- 1 | MEMORY 2 | { 3 | /* FLASH and RAM are mandatory memory regions */ 4 | FLASH : ORIGIN = 0x08000000, LENGTH = 1024K 5 | FLASH1 : ORIGIN = 0x08100000, LENGTH = 1024K 6 | RAM : ORIGIN = 0x20000000, LENGTH = 128K 7 | 8 | /* AXISRAM */ 9 | AXISRAM : ORIGIN = 0x24000000, LENGTH = 512K 10 | 11 | /* SRAM */ 12 | SRAM1 : ORIGIN = 0x30000000, LENGTH = 128K 13 | SRAM2 : ORIGIN = 0x30020000, LENGTH = 128K 14 | SRAM3 : ORIGIN = 0x30040000, LENGTH = 32K 15 | SRAM4 : ORIGIN = 0x38000000, LENGTH = 64K 16 | 17 | /* Backup SRAM */ 18 | BSRAM : ORIGIN = 0x38800000, LENGTH = 4K 19 | 20 | /* Instruction TCM */ 21 | ITCM : ORIGIN = 0x00000000, LENGTH = 64K 22 | } 23 | 24 | /* The location of the stack can be overridden using the 25 | `_stack_start` symbol. Place the stack at the end of RAM */ 26 | _stack_start = ORIGIN(RAM) + LENGTH(RAM); 27 | 28 | /* The location of the .text section can be overridden using the 29 | `_stext` symbol. By default it will place after .vector_table */ 30 | /* _stext = ORIGIN(FLASH) + 0x40c; */ -------------------------------------------------------------------------------- /Cargo.toml: -------------------------------------------------------------------------------- 1 | [package] 2 | authors = ["Xianhe Liu <2453246153@qq.com>"] 3 | edition = "2018" 4 | readme = "README.md" 5 | name = "rust_for_stm32" 6 | version = "0.1.0" 7 | 8 | [dependencies] 9 | cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] } 10 | cortex-m-rt = "0.7" 11 | cortex-m-semihosting = "0.5" 12 | panic-halt = "1.0.0" 13 | stm32h7xx-hal = { version = "0.16.0", features = ["stm32h743v", "rt"] } 14 | 15 | # Uncomment for the panic example. 16 | # panic-itm = "0.4.1" 17 | 18 | # Uncomment for the allocator example. 19 | # embedded-alloc = "0.6.0" 20 | 21 | # Uncomment for the device example. 22 | # Update `memory.x`, set target to `thumbv7em-none-eabihf` in `.cargo/config`, 23 | # and then use `cargo build --example device` to build it. 24 | # [dependencies.stm32f3] 25 | # features = ["stm32f303", "rt"] 26 | # version = "0.7.1" 27 | 28 | # this lets you use `cargo fix`! 29 | [[bin]] 30 | name = "rust_for_stm32" 31 | test = false 32 | bench = false 33 | 34 | [profile.release] 35 | codegen-units = 1 # better optimizations 36 | debug = true # symbols are nice and they don't increase the size on Flash 37 | lto = true # better optimizations 38 | -------------------------------------------------------------------------------- /openocd.gdb: -------------------------------------------------------------------------------- 1 | target extended-remote :3333 2 | 3 | # print demangled symbols 4 | set print asm-demangle on 5 | 6 | # set backtrace limit to not have infinite backtrace loops 7 | set backtrace limit 32 8 | 9 | # detect unhandled exceptions, hard faults and panics 10 | break DefaultHandler 11 | break HardFault 12 | break rust_begin_unwind 13 | # # run the next few lines so the panic message is printed immediately 14 | # # the number needs to be adjusted for your panic handler 15 | # commands $bpnum 16 | # next 4 17 | # end 18 | 19 | # *try* to stop at the user entry point (it might be gone due to inlining) 20 | break main 21 | 22 | monitor arm semihosting enable 23 | 24 | # # send captured ITM to the file itm.fifo 25 | # # (the microcontroller SWO pin must be connected to the programmer SWO pin) 26 | # # 8000000 must match the core clock frequency 27 | # monitor tpiu config internal itm.txt uart off 8000000 28 | 29 | # # OR: make the microcontroller SWO pin output compatible with UART (8N1) 30 | # # 8000000 must match the core clock frequency 31 | # # 2000000 is the frequency of the SWO pin 32 | # monitor tpiu config external uart off 8000000 2000000 33 | 34 | # # enable ITM port 0 35 | # monitor itm port 0 on 36 | 37 | load 38 | 39 | # start the process but immediately halt the processor 40 | stepi 41 | -------------------------------------------------------------------------------- /src/main.rs: -------------------------------------------------------------------------------- 1 | #![no_std] 2 | #![no_main] 3 | 4 | // pick a panicking behavior 5 | use panic_halt as _; // you can put a breakpoint on `rust_begin_unwind` to catch panics 6 | // use panic_abort as _; // requires nightly 7 | // use panic_itm as _; // logs messages over ITM; requires ITM support 8 | // use panic_semihosting as _; // logs messages to the host stderr; requires a debugger 9 | 10 | use cortex_m_rt::entry; 11 | 12 | use stm32h7xx_hal::{pac, prelude::*}; 13 | 14 | #[entry] 15 | fn main() -> ! { 16 | let cp = cortex_m::Peripherals::take().unwrap(); 17 | let dp = pac::Peripherals::take().unwrap(); 18 | 19 | // Constrain and Freeze power 20 | let pwr = dp.PWR.constrain(); 21 | let pwrcfg = pwr.vos0(&dp.SYSCFG).freeze(); 22 | 23 | // Constrain and Freeze clock 24 | let rcc = dp.RCC.constrain(); 25 | let ccdr = rcc 26 | .use_hse(25.MHz()) 27 | .pll1_strategy(stm32h7xx_hal::rcc::PllConfigStrategy::Iterative) 28 | .pll1_p_ck(480.MHz()) 29 | .sys_ck(480.MHz()) 30 | .freeze(pwrcfg, &dp.SYSCFG); 31 | 32 | let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC); 33 | 34 | // Configure PE1 as output. 35 | let mut led = gpioc.pc13.into_push_pull_output(); 36 | 37 | // Get the delay provider. 38 | let mut delay = cp.SYST.delay(ccdr.clocks); 39 | 40 | loop { 41 | led.set_high(); 42 | delay.delay_ms(500_u16); 43 | 44 | led.set_low(); 45 | delay.delay_ms(500_u16); 46 | } 47 | } 48 | -------------------------------------------------------------------------------- /.cargo/config.toml: -------------------------------------------------------------------------------- 1 | [target.thumbv7m-none-eabi] 2 | # uncomment this to make `cargo run` execute programs on QEMU 3 | # runner = "qemu-system-arm -cpu cortex-m3 -machine lm3s6965evb -nographic -semihosting-config enable=on,target=native -kernel" 4 | 5 | [target.'cfg(all(target_arch = "arm", target_os = "none"))'] 6 | # uncomment ONE of these three option to make `cargo run` start a GDB session 7 | # which option to pick depends on your system 8 | # runner = "arm-none-eabi-gdb -q -x openocd.gdb" 9 | # runner = "gdb-multiarch -q -x openocd.gdb" 10 | # runner = "gdb -q -x openocd.gdb" 11 | 12 | rustflags = [ 13 | # Previously, the linker arguments --nmagic and -Tlink.x were set here. 14 | # They are now set by build.rs instead. The linker argument can still 15 | # only be set here, if a custom linker is needed. 16 | 17 | # By default, the LLD linker is used, which is shipped with the Rust 18 | # toolchain. If you run into problems with LLD, you can switch to the 19 | # GNU linker by uncommenting this line: 20 | # "-C", "linker=arm-none-eabi-ld", 21 | 22 | # If you need to link to pre-compiled C libraries provided by a C toolchain 23 | # use GCC as the linker by uncommenting the three lines below: 24 | # "-C", "linker=arm-none-eabi-gcc", 25 | # "-C", "link-arg=-Wl,-Tlink.x", 26 | # "-C", "link-arg=-nostartfiles", 27 | ] 28 | 29 | [build] 30 | # Pick ONE of these default compilation targets 31 | # target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ 32 | # target = "thumbv7m-none-eabi" # Cortex-M3 33 | # target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU) 34 | target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) 35 | # target = "thumbv8m.base-none-eabi" # Cortex-M23 36 | # target = "thumbv8m.main-none-eabi" # Cortex-M33 (no FPU) 37 | # target = "thumbv8m.main-none-eabihf" # Cortex-M33 (with FPU) 38 | -------------------------------------------------------------------------------- /.vscode/tasks.json: -------------------------------------------------------------------------------- 1 | { 2 | // See https://go.microsoft.com/fwlink/?LinkId=733558 3 | // for the documentation about the tasks.json format 4 | "version": "2.0.0", 5 | "tasks": [ 6 | { 7 | /* 8 | * This is the default cargo build task, 9 | * but we need to provide a label for it, 10 | * so we can invoke it from the debug launcher. 11 | */ 12 | "label": "Cargo Build (debug)", 13 | "type": "process", 14 | "command": "cargo", 15 | "args": ["build"], 16 | "problemMatcher": [ 17 | "$rustc" 18 | ], 19 | "group": { 20 | "kind": "build", 21 | "isDefault": true 22 | } 23 | }, 24 | { 25 | "label": "Cargo Build (release)", 26 | "type": "process", 27 | "command": "cargo", 28 | "args": ["build", "--release"], 29 | "problemMatcher": [ 30 | "$rustc" 31 | ], 32 | "group": "build" 33 | }, 34 | { 35 | "label": "Cargo Build Examples (debug)", 36 | "type": "process", 37 | "command": "cargo", 38 | "args": ["build","--examples"], 39 | "problemMatcher": [ 40 | "$rustc" 41 | ], 42 | "group": "build" 43 | }, 44 | { 45 | "label": "Cargo Build Examples (release)", 46 | "type": "process", 47 | "command": "cargo", 48 | "args": ["build","--examples", "--release"], 49 | "problemMatcher": [ 50 | "$rustc" 51 | ], 52 | "group": "build" 53 | }, 54 | { 55 | "label": "Cargo Clean", 56 | "type": "process", 57 | "command": "cargo", 58 | "args": ["clean"], 59 | "problemMatcher": [], 60 | "group": "build" 61 | }, 62 | ] 63 | } 64 | -------------------------------------------------------------------------------- /.vscode/launch.json: -------------------------------------------------------------------------------- 1 | { 2 | /* 3 | * Requires the Rust Language Server (rust-analyzer) and Cortex-Debug extensions 4 | * https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer 5 | * https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug 6 | */ 7 | "version": "0.2.0", 8 | "configurations": [ 9 | { 10 | "type": "cortex-debug", 11 | "request": "launch", 12 | "name": "Debug (QEMU)", 13 | "servertype": "qemu", 14 | "cwd": "${workspaceRoot}", 15 | "preLaunchTask": "Cargo Build (debug)", 16 | "runToEntryPoint": "main", 17 | "executable": "./target/thumbv7m-none-eabi/debug/rust_for_stm32", 18 | /* Run `cargo build --example hello` and uncomment this line to run semi-hosting example */ 19 | //"executable": "./target/thumbv7m-none-eabi/debug/examples/hello", 20 | "cpu": "cortex-m3", 21 | "machine": "lm3s6965evb", 22 | }, 23 | { 24 | /* Configuration for the STM32F303 Discovery board */ 25 | "type": "cortex-debug", 26 | "request": "launch", 27 | "name": "Debug (OpenOCD)", 28 | "servertype": "openocd", 29 | "cwd": "${workspaceRoot}", 30 | "preLaunchTask": "Cargo Build (debug)", 31 | "runToEntryPoint": "main", 32 | "executable": "./target/thumbv7em-none-eabihf/debug/rust_for_stm32", 33 | /* Run `cargo build --example itm` and uncomment this line to run itm example */ 34 | // "executable": "./target/thumbv7em-none-eabihf/debug/examples/itm", 35 | "device": "STM32H743XIH6", 36 | "configFiles": [ 37 | "interface/cmsis-dap.cfg", 38 | // "interface/stlink.cfg", 39 | "target/stm32h7x.cfg" 40 | ], 41 | "svdFile": "${workspaceRoot}/.vscode/STM32H7x3.svd", 42 | "swoConfig": { 43 | "enabled": true, 44 | "cpuFrequency": 8000000, 45 | "swoFrequency": 2000000, 46 | "source": "probe", 47 | "decoders": [ 48 | { "type": "console", "label": "ITM", "port": 0 } 49 | ] 50 | } 51 | } 52 | ] 53 | } -------------------------------------------------------------------------------- /.vscode/README.md: -------------------------------------------------------------------------------- 1 | # VS Code Configuration 2 | 3 | Example configurations for debugging programs in-editor with VS Code. 4 | This directory contains configurations for two platforms: 5 | 6 | - `LM3S6965EVB` on QEMU 7 | - `STM32F303x` via OpenOCD 8 | 9 | ## Required Extensions 10 | 11 | If you have the `code` command in your path, you can run the following commands to install the necessary extensions. 12 | 13 | ```sh 14 | code --install-extension rust-lang.rust-analyzer 15 | code --install-extension marus25.cortex-debug 16 | ``` 17 | 18 | Otherwise, you can use the Extensions view to search for and install them, or go directly to their marketplace pages and click the "Install" button. 19 | 20 | - [Rust Language Server (rust-analyzer)](https://marketplace.visualstudio.com/items?itemName=rust-lang.rust-analyzer) 21 | - [Cortex-Debug](https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug) 22 | 23 | ## Use 24 | 25 | The quickstart comes with two debug configurations. 26 | Both are configured to build the project, using the default settings from `.cargo/config`, prior to starting a debug session. 27 | 28 | 1. QEMU: Starts a debug session using an emulation of the `LM3S6965EVB` mcu. 29 | - This works on a fresh `cargo generate` without modification of any of the settings described above. 30 | - Semihosting output will be written to the Output view `Adapter Output`. 31 | - `ITM` logging does not work with QEMU emulation. 32 | 33 | 2. OpenOCD: Starts a debug session for a `STM32F3DISCOVERY` board (or any `STM32F303x` running at 8MHz). 34 | - Follow the instructions above for configuring the build with `.cargo/config` and the `memory.x` linker script. 35 | - `ITM` output will be written to the Output view `SWO: ITM [port: 0, type: console]` output. 36 | 37 | ### Git 38 | 39 | Files in the `.vscode/` directory are `.gitignore`d by default because many files that may end up in the `.vscode/` directory should not be committed and shared. 40 | If you would like to save this debug configuration to your repository and share it with your team, you'll need to explicitly `git add` the files to your repository. 41 | 42 | ```sh 43 | git add -f .vscode/launch.json 44 | git add -f .vscode/tasks.json 45 | git add -f .vscode/*.svd 46 | ``` 47 | 48 | ## Customizing for other targets 49 | 50 | For full documentation, see the [Cortex-Debug][cortex-debug] repository. 51 | 52 | ### Device 53 | 54 | Some configurations use this to automatically find the SVD file. 55 | Replace this with the part number for your device. 56 | 57 | ```json 58 | "device": "STM32F303VCT6", 59 | ``` 60 | 61 | ### OpenOCD Config Files 62 | 63 | The `configFiles` property specifies a list of files to pass to OpenOCD. 64 | 65 | ```json 66 | "configFiles": [ 67 | "interface/stlink-v2-1.cfg", 68 | "target/stm32f3x.cfg" 69 | ], 70 | ``` 71 | 72 | See the [OpenOCD config docs][openocd-config] for more information and the [OpenOCD repository for available configuration files][openocd-repo]. 73 | 74 | ### SVD 75 | 76 | The SVD file is a standard way of describing all registers and peripherals of an ARM Cortex-M mCU. 77 | Cortex-Debug needs this file to display the current register values for the peripherals on the device. 78 | 79 | You can probably find the SVD for your device on the vendor's website. 80 | 81 | 82 | For example, the STM32F3DISCOVERY board uses an mcu from the `STM32F303x` line of processors. 83 | All the SVD files for the STM32F3 series are available on [ST's Website][stm32f3]. 84 | Download the [stm32f3 SVD pack][stm32f3-svd], and copy the `STM32F303.svd` file into `.vscode/`. 85 | This line of the config tells the Cortex-Debug plug in where to find the file. 86 | 87 | ```json 88 | "svdFile": "${workspaceRoot}/.vscode/STM32F303.svd", 89 | ``` 90 | 91 | For other processors, simply copy the correct `*.svd` file into the project and update the config accordingly. 92 | 93 | ### CPU Frequency 94 | 95 | If your device is running at a frequency other than 8MHz, you'll need to modify this line of `launch.json` for the `ITM` output to work correctly. 96 | 97 | ```json 98 | "cpuFrequency": 8000000, 99 | ``` 100 | 101 | ### Other GDB Servers 102 | 103 | For information on setting up GDB servers other than OpenOCD, see the [Cortex-Debug repository][cortex-debug]. 104 | 105 | [cortex-debug]: https://github.com/Marus/cortex-debug 106 | [stm32f3]: https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-mainstream-mcus/stm32f3-series.html#resource 107 | [stm32f3-svd]: https://www.st.com/resource/en/svd/stm32f3_svd.zip 108 | [openocd-config]: http://openocd.org/doc/html/Config-File-Guidelines.html 109 | [openocd-repo]: https://sourceforge.net/p/openocd/code/ci/master/tree/tcl/ 110 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # `cortex-m-quickstart` 2 | 3 | > A template for building applications for ARM Cortex-M microcontrollers 4 | 5 | This project is developed and maintained by the [Cortex-M team][team]. 6 | 7 | ## Dependencies 8 | 9 | To build embedded programs using this template you'll need: 10 | 11 | - Rust 1.31, 1.30-beta, nightly-2018-09-13 or a newer toolchain. e.g. `rustup 12 | default beta` 13 | 14 | - The `cargo generate` subcommand. [Installation 15 | instructions](https://github.com/ashleygwilliams/cargo-generate#installation). 16 | 17 | - `rust-std` components (pre-compiled `core` crate) for the ARM Cortex-M 18 | targets. Run: 19 | 20 | ``` console 21 | $ rustup target add thumbv6m-none-eabi thumbv7m-none-eabi thumbv7em-none-eabi thumbv7em-none-eabihf 22 | ``` 23 | 24 | ## Using this template 25 | 26 | **NOTE**: This is the very short version that only covers building programs. For 27 | the long version, which additionally covers flashing, running and debugging 28 | programs, check [the embedded Rust book][book]. 29 | 30 | [book]: https://rust-embedded.github.io/book 31 | 32 | 0. Before we begin you need to identify some characteristics of the target 33 | device as these will be used to configure the project: 34 | 35 | - The ARM core. e.g. Cortex-M3. 36 | 37 | - Does the ARM core include an FPU? Cortex-M4**F** and Cortex-M7**F** cores do. 38 | 39 | - How much Flash memory and RAM does the target device has? e.g. 256 KiB of 40 | Flash and 32 KiB of RAM. 41 | 42 | - Where are Flash memory and RAM mapped in the address space? e.g. RAM is 43 | commonly located at address `0x2000_0000`. 44 | 45 | You can find this information in the data sheet or the reference manual of your 46 | device. 47 | 48 | In this example we'll be using the STM32F3DISCOVERY. This board contains an 49 | STM32F303VCT6 microcontroller. This microcontroller has: 50 | 51 | - A Cortex-M4F core that includes a single precision FPU 52 | 53 | - 256 KiB of Flash located at address 0x0800_0000. 54 | 55 | - 40 KiB of RAM located at address 0x2000_0000. (There's another RAM region but 56 | for simplicity we'll ignore it). 57 | 58 | 1. Instantiate the template. 59 | 60 | ``` console 61 | $ cargo generate --git https://github.com/rust-embedded/cortex-m-quickstart 62 | Project Name: app 63 | Creating project called `app`... 64 | Done! New project created /tmp/app 65 | 66 | $ cd app 67 | ``` 68 | 69 | 2. Set a default compilation target. There are four options as mentioned at the 70 | bottom of `.cargo/config`. For the STM32F303VCT6, which has a Cortex-M4F 71 | core, we'll pick the `thumbv7em-none-eabihf` target. 72 | 73 | ``` console 74 | $ tail -n9 .cargo/config.toml 75 | ``` 76 | 77 | ``` toml 78 | [build] 79 | # Pick ONE of these compilation targets 80 | # target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ 81 | # target = "thumbv7m-none-eabi" # Cortex-M3 82 | # target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU) 83 | target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) 84 | # target = "thumbv8m.base-none-eabi" # Cortex-M23 85 | # target = "thumbv8m.main-none-eabi" # Cortex-M33 (no FPU) 86 | # target = "thumbv8m.main-none-eabihf" # Cortex-M33 (with FPU) 87 | ``` 88 | 89 | 3. Enter the memory region information into the `memory.x` file. 90 | 91 | ``` console 92 | $ cat memory.x 93 | /* Linker script for the STM32F303VCT6 */ 94 | MEMORY 95 | { 96 | /* NOTE 1 K = 1 KiBi = 1024 bytes */ 97 | FLASH : ORIGIN = 0x08000000, LENGTH = 256K 98 | RAM : ORIGIN = 0x20000000, LENGTH = 40K 99 | } 100 | ``` 101 | 102 | 4. Build the template application or one of the examples. 103 | 104 | ``` console 105 | $ cargo build 106 | ``` 107 | 108 | ## VS Code 109 | 110 | This template includes launch configurations for debugging CortexM programs with Visual Studio Code located in the `.vscode/` directory. 111 | See [.vscode/README.md](./.vscode/README.md) for more information. 112 | If you're not using VS Code, you can safely delete the directory from the generated project. 113 | 114 | # License 115 | 116 | This template is licensed under either of 117 | 118 | - Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or 119 | http://www.apache.org/licenses/LICENSE-2.0) 120 | 121 | - MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT) 122 | 123 | at your option. 124 | 125 | ## Contribution 126 | 127 | Unless you explicitly state otherwise, any contribution intentionally submitted 128 | for inclusion in the work by you, as defined in the Apache-2.0 license, shall be 129 | dual licensed as above, without any additional terms or conditions. 130 | 131 | ## Code of Conduct 132 | 133 | Contribution to this crate is organized under the terms of the [Rust Code of 134 | Conduct][CoC], the maintainer of this crate, the [Cortex-M team][team], promises 135 | to intervene to uphold that code of conduct. 136 | 137 | [CoC]: https://www.rust-lang.org/policies/code-of-conduct 138 | [team]: https://github.com/rust-embedded/wg#the-cortex-m-team 139 | --------------------------------------------------------------------------------