├── LICENSE ├── README.md ├── RTL └── fixedpoint.v └── SIM ├── tb_add_sub_mul_div.v ├── tb_add_sub_mul_div_run_iverilog.bat ├── tb_convert_fxp_float.v ├── tb_convert_fxp_float_run_iverilog.bat ├── tb_fxp_mul_div_pipe.v ├── tb_fxp_mul_div_pipe_run_iverilog.bat ├── tb_fxp_sqrt.v └── tb_fxp_sqrt_run_iverilog.bat /LICENSE: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-FixedPoint/HEAD/LICENSE -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-FixedPoint/HEAD/README.md -------------------------------------------------------------------------------- /RTL/fixedpoint.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-FixedPoint/HEAD/RTL/fixedpoint.v -------------------------------------------------------------------------------- /SIM/tb_add_sub_mul_div.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-FixedPoint/HEAD/SIM/tb_add_sub_mul_div.v -------------------------------------------------------------------------------- /SIM/tb_add_sub_mul_div_run_iverilog.bat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-FixedPoint/HEAD/SIM/tb_add_sub_mul_div_run_iverilog.bat -------------------------------------------------------------------------------- /SIM/tb_convert_fxp_float.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-FixedPoint/HEAD/SIM/tb_convert_fxp_float.v -------------------------------------------------------------------------------- /SIM/tb_convert_fxp_float_run_iverilog.bat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-FixedPoint/HEAD/SIM/tb_convert_fxp_float_run_iverilog.bat -------------------------------------------------------------------------------- /SIM/tb_fxp_mul_div_pipe.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-FixedPoint/HEAD/SIM/tb_fxp_mul_div_pipe.v -------------------------------------------------------------------------------- /SIM/tb_fxp_mul_div_pipe_run_iverilog.bat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-FixedPoint/HEAD/SIM/tb_fxp_mul_div_pipe_run_iverilog.bat -------------------------------------------------------------------------------- /SIM/tb_fxp_sqrt.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-FixedPoint/HEAD/SIM/tb_fxp_sqrt.v -------------------------------------------------------------------------------- /SIM/tb_fxp_sqrt_run_iverilog.bat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-FixedPoint/HEAD/SIM/tb_fxp_sqrt_run_iverilog.bat --------------------------------------------------------------------------------