├── .gitignore ├── LICENSE ├── README.md ├── RMII.pdf ├── RTL ├── rmii_phy_if.v └── smii_phy_if.v ├── SIM ├── tb_rmii_phy_if.v ├── tb_rmii_phy_if_run_iverilog.bat ├── tb_smii_phy_if.v └── tb_smii_phy_if_run_iverilog.bat └── SMII.pdf /.gitignore: -------------------------------------------------------------------------------- 1 | 2 | tb_vivado 3 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-RMII-SMII/HEAD/LICENSE -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-RMII-SMII/HEAD/README.md -------------------------------------------------------------------------------- /RMII.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-RMII-SMII/HEAD/RMII.pdf -------------------------------------------------------------------------------- /RTL/rmii_phy_if.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-RMII-SMII/HEAD/RTL/rmii_phy_if.v -------------------------------------------------------------------------------- /RTL/smii_phy_if.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-RMII-SMII/HEAD/RTL/smii_phy_if.v -------------------------------------------------------------------------------- /SIM/tb_rmii_phy_if.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-RMII-SMII/HEAD/SIM/tb_rmii_phy_if.v -------------------------------------------------------------------------------- /SIM/tb_rmii_phy_if_run_iverilog.bat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-RMII-SMII/HEAD/SIM/tb_rmii_phy_if_run_iverilog.bat -------------------------------------------------------------------------------- /SIM/tb_smii_phy_if.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-RMII-SMII/HEAD/SIM/tb_smii_phy_if.v -------------------------------------------------------------------------------- /SIM/tb_smii_phy_if_run_iverilog.bat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-RMII-SMII/HEAD/SIM/tb_smii_phy_if_run_iverilog.bat -------------------------------------------------------------------------------- /SMII.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/WangXuan95/FPGA-RMII-SMII/HEAD/SMII.pdf --------------------------------------------------------------------------------