├── .gitignore ├── .gitmodules ├── LICENSE.md ├── README.md ├── bluepill.md ├── expo_thermal_compensation ├── README.md └── find_values.py ├── firmware-midi ├── Makefile ├── hardware.h ├── main.c ├── setup.c ├── setup.h ├── usart.c ├── usbmidi.c └── usbmidi.h ├── firmware-rust ├── .cargo │ └── config ├── .gitignore ├── Cargo.lock ├── Cargo.toml ├── Makefile ├── build.rs ├── memory.x ├── openocd.cfg ├── openocd.gdb ├── schem │ ├── schem-cache.lib │ ├── schem.kicad_pcb │ ├── schem.pro │ ├── schem.sch │ └── sym-lib-table └── src │ ├── bu2505fv.rs │ ├── coop_threadsafe_container.rs │ ├── envelope.rs │ ├── main.rs │ ├── midi.rs │ ├── reverse_bits.rs │ └── vco.rs ├── hardware ├── control_board_prototype │ ├── README.md │ ├── bom.ods │ ├── control_board_prototype-cache.lib │ ├── control_board_prototype.kicad_pcb │ ├── control_board_prototype.pro │ ├── control_board_prototype.sch │ ├── fab │ │ ├── control_board_prototype-B_Cu.gbr │ │ ├── control_board_prototype-B_Mask.gbr │ │ ├── control_board_prototype-B_Paste.gbr │ │ ├── control_board_prototype-B_SilkS.gbr │ │ ├── control_board_prototype-Edge_Cuts.gbr │ │ ├── control_board_prototype-F_Cu.gbr │ │ ├── control_board_prototype-F_Mask.gbr │ │ ├── control_board_prototype-F_Paste.gbr │ │ ├── control_board_prototype-F_SilkS.gbr │ │ ├── control_board_prototype-NPTH.drl │ │ └── control_board_prototype-PTH.drl │ ├── fp-lib-table │ └── sym-lib-table ├── img │ ├── mainboard.jpg │ ├── vco_blue.jpg │ ├── vco_red.jpg │ └── voiceboard.jpg ├── lib │ ├── footprints.pretty │ │ ├── BLUEPILL.kicad_mod │ │ ├── C_rect_smd_combo.kicad_mod │ │ ├── SSOP20_and_breakout.kicad_mod │ │ ├── SolderDipJumper.kicad_mod │ │ ├── SolderDipJumper2alt.kicad_mod │ │ ├── SolderDipJumper3.kicad_mod │ │ ├── SolderDipJumper3alt.kicad_mod │ │ ├── SolderDipJumper4alt.kicad_mod │ │ ├── TO-92_Inline_alt.kicad_mod │ │ ├── perfboard 3x9.kicad_mod │ │ └── spitfire_logo_small.kicad_mod │ ├── schematic-symbols.bck │ ├── schematic-symbols.dcm │ ├── schematic-symbols.lib │ └── windfisch.pretty │ │ ├── SolderBridge.kicad_mod │ │ ├── windfisch.kicad_mod │ │ ├── windfisch_huge.kicad_mod │ │ ├── windfisch_paint.kicad_mod │ │ ├── windfisch_small.kicad_mod │ │ └── windfisch_smaller.kicad_mod ├── libtest │ ├── fp-info-cache │ ├── fp-lib-table │ ├── libtest-cache.lib │ ├── libtest.kicad_pcb │ ├── libtest.pro │ └── libtest.sch ├── vca │ ├── vca-cache.lib │ ├── vca.kicad_pcb │ ├── vca.pro │ └── vca.sch ├── vco_mk1 │ ├── README.md │ ├── vco_mk1_spitfire │ │ ├── README.md │ │ ├── fp-lib-table │ │ ├── gerber-rev01 │ │ │ ├── vco_mk1-B_Cu.gbr │ │ │ ├── vco_mk1-B_Mask.gbr │ │ │ ├── vco_mk1-B_SilkS.gbr │ │ │ ├── vco_mk1-Edge_Cuts.gbr │ │ │ ├── vco_mk1-F_Cu.gbr │ │ │ ├── vco_mk1-F_Mask.gbr │ │ │ ├── vco_mk1-F_SilkS.gbr │ │ │ └── vco_mk1.drl │ │ ├── schem1 │ │ │ └── vco_mk1.pdf │ │ ├── vco_mk1-cache.lib │ │ ├── vco_mk1.kicad_pcb │ │ ├── vco_mk1.net │ │ ├── vco_mk1.pro │ │ ├── vco_mk1.sch │ │ └── vco_mk1_old.kicad_pcb │ └── vco_mk1_windfisch │ │ ├── bom.ods │ │ ├── fab-rev01 │ │ ├── vco_mk1-B_Cu.gbr │ │ ├── vco_mk1-B_Mask.gbr │ │ ├── vco_mk1-B_SilkS.gbr │ │ ├── vco_mk1-Edge_Cuts.gbr │ │ ├── vco_mk1-F_Cu.gbr │ │ ├── vco_mk1-F_Mask.gbr │ │ ├── vco_mk1-F_SilkS.gbr │ │ ├── vco_mk1-NPTH.drl │ │ └── vco_mk1-PTH.drl │ │ ├── fp-lib-table │ │ ├── schem1 │ │ └── vco_mk1.pdf │ │ ├── vco_mk1-cache.lib │ │ ├── vco_mk1.kicad_pcb │ │ ├── vco_mk1.pro │ │ └── vco_mk1.sch ├── voice_and_control_board_fab.pdf └── voice_board │ ├── README.md │ ├── bom.ods │ ├── fab │ ├── voice_board-B_Cu.gbr │ ├── voice_board-B_Mask.gbr │ ├── voice_board-B_Paste.gbr │ ├── voice_board-B_SilkS.gbr │ ├── voice_board-Edge_Cuts.gbr │ ├── voice_board-F_Cu.gbr │ ├── voice_board-F_Mask.gbr │ ├── voice_board-F_Paste.gbr │ ├── voice_board-F_SilkS.gbr │ ├── voice_board-NPTH-drl_map.ps │ ├── voice_board-NPTH.drl │ ├── voice_board-PTH-drl_map.ps │ └── voice_board-PTH.drl │ ├── fp-lib-table │ ├── sym-lib-table │ ├── voice_board-cache.lib │ ├── voice_board.kicad_pcb │ ├── voice_board.pro │ └── voice_board.sch ├── measure_vco ├── README.md ├── experiments │ ├── 20190922 │ │ ├── README │ │ ├── blue_2.5.png │ │ ├── blue_2.5.txt │ │ ├── blue_5.0.png │ │ ├── blue_5.0.txt │ │ ├── blue_8.0.png │ │ ├── blue_8.0.txt │ │ ├── breadboard1.txt │ │ ├── breadboard1_2.5.png │ │ ├── breadboard1_2.5.txt │ │ ├── breadboard1_5.0.png │ │ ├── breadboard1_5.0.txt │ │ ├── breadboard1_5.0_000.png │ │ ├── breadboard1_8.0.png │ │ ├── breadboard1_8.0.txt │ │ ├── breadboard2_2.5.png │ │ ├── breadboard2_2.5.txt │ │ ├── breadboard2_5.0.png │ │ ├── breadboard2_5.0.txt │ │ ├── breadboard2_8.0.png │ │ ├── breadboard2_8.0.txt │ │ ├── breadboard3_2.5.png │ │ ├── breadboard3_2.5.txt │ │ ├── breadboard3_5.0.png │ │ ├── breadboard3_5.0.txt │ │ ├── breadboard3_5.0b.txt │ │ ├── breadboard3_8.0.png │ │ ├── breadboard3_8.0.txt │ │ ├── breadboard4_2.5.png │ │ ├── breadboard4_2.5.txt │ │ ├── breadboard4_5.0.png │ │ ├── breadboard4_5.0.txt │ │ ├── breadboard4_8.0.png │ │ ├── breadboard4_8.0.txt │ │ ├── red_2.5.png │ │ ├── red_2.5.txt │ │ ├── red_5.0.png │ │ ├── red_5.0.txt │ │ ├── red_8.0.png │ │ └── red_8.0.txt │ ├── 20190625_1v_per_oct_response │ │ ├── 2019-05-25_bcm847-heated.txt │ │ ├── 2019-05-25_bcm847.txt │ │ ├── 2019-05-25_pair1.txt │ │ ├── 2019-05-25_pair2.txt │ │ ├── 2019-05-25_pair3.txt │ │ ├── 2019-05-25_pair4.txt │ │ ├── 2019-05-25_pair5.txt │ │ ├── 2019-05-25_pair5_voltagereg.txt │ │ ├── 2019-05-25_pair5_voltagereg_derpy.txt │ │ ├── 2019-05-25_pair5_with_human.txt │ │ ├── README.md │ │ ├── out.txt │ │ ├── out1.txt │ │ ├── out2.txt │ │ ├── out3.txt │ │ ├── out4.txt │ │ ├── voltage_regulation_plot.gnuplot │ │ └── voltage_regulation_plot.png │ └── 20190705_error_attribution │ │ ├── README.md │ │ ├── plot.gnuplot │ │ ├── plot.png │ │ ├── run1.txt │ │ ├── run2.txt │ │ ├── run3.txt │ │ └── run4.txt ├── firmware │ ├── .gdbinit │ ├── Makefile │ ├── hardware.h │ ├── main.c │ ├── setup.c │ └── setup.h ├── schem │ ├── measure_vco-cache.lib │ ├── measure_vco.pro │ ├── measure_vco.sch │ ├── vco-cache.lib │ └── vco.bak └── software │ ├── README.md │ ├── analyze_stability.py │ ├── compare.py │ ├── read_data.py │ ├── thermal_stability.py │ └── time_stability.py ├── rules.mk └── simulation ├── expo ├── expo-cache.lib ├── expo.bak ├── expo.kicad_pcb ├── expo.pro └── expo.sch ├── filter_feedback ├── filter_feedback-cache.lib ├── filter_feedback.bak ├── filter_feedback.kicad_pcb ├── filter_feedback.pro └── filter_feedback.sch ├── lib ├── 2N7000.nxp.lib ├── 2N7000.onsemi.lib ├── BC546.lib ├── BC547_557.lib ├── LM324.ti.lib ├── TL074.ti.lib └── diodes.lib ├── passive_filter ├── passive_filter-cache.lib ├── passive_filter.bak ├── passive_filter.kicad_pcb ├── passive_filter.pro └── passive_filter.sch ├── software ├── README.md ├── analyze.py ├── generate_joblist.sh └── median.py ├── uce ├── uce-cache.lib ├── uce.bak ├── uce.kicad_pcb ├── uce.pro └── uce.sch ├── vca.py ├── vca ├── vca-cache.lib ├── vca.pro └── vca.sch ├── vca2 ├── vca-cache.lib ├── vca.kicad_pcb ├── vca.pro ├── vca.sch ├── vca2-cache.lib ├── vca2.sch ├── vca3-cache.lib └── vca3.sch ├── vcf ├── .gitignore ├── plot.py ├── plot_all.sh ├── thd.py ├── vcf_buffered-cache.lib ├── vcf_buffered_bjt-cache.lib ├── vcf_buffered_bjt.pro ├── vcf_buffered_bjt.sch ├── vcf_buffered_bjt_100k.cir ├── vcf_buffered_bjt_10k.cir ├── vcf_buffered_bjt_1k.cir ├── vcf_buffered_opamp-cache.lib ├── vcf_buffered_opamp.cir ├── vcf_buffered_opamp.pro ├── vcf_buffered_opamp.sch ├── vcf_buffered_opamp_2stage-cache.lib ├── vcf_buffered_opamp_2stage.cir ├── vcf_buffered_opamp_2stage.pro ├── vcf_buffered_opamp_2stage.sch ├── vcf_buffered_opamp_2stage_resonance-cache.lib ├── vcf_buffered_opamp_2stage_resonance.cir ├── vcf_buffered_opamp_2stage_resonance.sch ├── vcf_buffered_opamp_instramp-cache.lib ├── vcf_buffered_opamp_instramp.cir ├── vcf_buffered_opamp_instramp.sch ├── vcf_buffered_opamp_instramp2.cir ├── vcf_unbuffered-cache.lib ├── vcf_unbuffered.cir ├── vcf_unbuffered.pro ├── vcf_unbuffered.sch ├── vcf_unbuffered_capacitors1-cache.lib ├── vcf_unbuffered_capacitors1.cir ├── vcf_unbuffered_capacitors1.pro ├── vcf_unbuffered_capacitors1.sch ├── vcf_unbuffered_capacitors2-cache.lib ├── vcf_unbuffered_capacitors2.cir └── vcf_unbuffered_capacitors2.sch └── vco ├── BC546.lib ├── LM324.ti.lib ├── vco-cache.lib ├── vco.bak ├── vco.kicad_pcb ├── vco.pro └── vco.sch /.gitignore: -------------------------------------------------------------------------------- 1 | bin/ 2 | *.elf 3 | *.bin 4 | generated.*.ld 5 | *.pyc 6 | __pycache__ 7 | *.bak 8 | *-bak 9 | fp-info-cache 10 | -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "libopencm3"] 2 | path = libopencm3 3 | url = https://github.com/libopencm3/libopencm3 4 | [submodule "firmware-rust/lib/usbd-midi"] 5 | path = firmware-rust/lib/usbd-midi 6 | url = https://github.com/Windfisch/usbd-midi 7 | [submodule "firmware-rust/lib/stm32f1xx-hal"] 8 | path = firmware-rust/lib/stm32f1xx-hal 9 | url = https://github.com/Windfisch/stm32f1xx-hal 10 | -------------------------------------------------------------------------------- /bluepill.md: -------------------------------------------------------------------------------- 1 | Buying the right blue pill board 2 | ================================ 3 | 4 | It appears that blue pill boards are available from at least two different 5 | manufacturers. 6 | 7 | - The "white switch" variant has a rectangular, high-profile white reset 8 | switch located close to the USB port. Also, the USB port has two mounting 9 | pads (one at each side). The silk screen is layouted carefully. 10 | ![bad board](https://web.archive.org/web/20200103224615im_/https://wiki.relativty.net/images/thumb/f/f7/Bluepillrect.png/682px-Bluepillrect.png) 11 | - The "round switch" variant has a flat and round reset switch at the same 12 | location. The USB port has four mounting pads. The silk screen at the pin 13 | headers ("B12 B13...") is uneven, the letters don't share a common baseline. 14 | ![good board](https://web.archive.org/web/20200103224615im_/https://wiki.relativty.net/images/thumb/6/68/Bluepillround.png/669px-Bluepillround.png) 15 | 16 | While both variants are affected by the 17 | [wrong USB resistor issue](https://amitesh-singh.github.io/stm32/2017/05/27/Overcoming-wrong-pullup-in-blue-pill.html) 18 | [(or on archive.org)](https://web.archive.org/web/20190401142745/https://amitesh-singh.github.io/stm32/2017/05/27/Overcoming-wrong-pullup-in-blue-pill.html) 19 | (tl;dr: The USB D+ pull up resistor R10 should be 1.5k, but it's populated with 20 | 10k. Some hosts don't like this, others don't care), I never had a problem with 21 | this. 22 | 23 | However, the "round switch" variant appears to be of worse build quality: All two 24 | boards I bought failed to provide reliable USB connectivity, one even failed to 25 | provide a reliable +5V power to the STM32. 26 | 27 | I had no problems with my four samples of the "white switch" variant, so I 28 | recommend using these. 29 | 30 | [See also](https://wiki.relativty.net/index.php/STM32#Purchasing_your_STM32_board) 31 | [(or on archive.org)](https://web.archive.org/web/20200103224615/https://wiki.relativty.net/index.php/STM32) 32 | -------------------------------------------------------------------------------- /expo_thermal_compensation/README.md: -------------------------------------------------------------------------------- 1 | # Designing a thermal compensation for the exponential converter 2 | 3 | The exponential converter used in the VCO has a temperature dependency that 4 | affects its volt-per-octave setting. To be precise, the expo converter 5 | is described by the following formula: 6 | 7 | ``` 8 | I_out = const * exp(V_in / V_T) 9 | ``` 10 | 11 | where `V_T` denotes the _thermal voltage_ of the transistor, which is 12 | calculated as 13 | 14 | ``` 15 | V_T = k * T / q 16 | ``` 17 | 18 | with `k` being the [Boltzmann Constant](https://en.wikipedia.org/wiki/Boltzmann_constant), 19 | `T` denoting the temperature in [Kelvin](https://en.wikipedia.org/wiki/Kelvin) and 20 | `q` being the [elementary charge](https://en.wikipedia.org/wiki/Elementary_charge). 21 | 22 | This means that since room temperature is roughly at 300K = 27C, a change in temperature 23 | by 3 degrees changes the argument of exp(...) by ±1%. So at 24C, our 1V/oct VCO may 24 | actually require only 0.99V/oct, and at 30C, it may need 1.01V/oct. 25 | 26 | Over a range of plus minus three octaves, the highest and lowest note would be 27 | `1200 * 3 * 0.01` = 36 cents off! 28 | 29 | ## Compensating using a NTC 30 | 31 | In order to compensate for this, we can employ a resistor network containing 32 | an NTC resistor, that changes its resistance in dependence of the temperature. 33 | 34 | Instead of feeding the actual control voltage into the expo converter, we run it 35 | through a voltage divider which counteracts the transistor behaviour. 36 | 37 | The network looks as follows, with R3 being the NTC. The control voltage is fed 38 | into `(in)`, while `(out)` goes into the expo converter. 39 | 40 | ``` 41 | +----[R2]----+ 42 | (in) ----[R1]----+ +------+----- [R4] ---- GND 43 | +----[R3]----+ | 44 | (out) 45 | ``` 46 | 47 | ## Finding the right values 48 | 49 | A commonly available NTC is the 50 | [Vishay NTCLE100E3 series](https://www.vishay.com/docs/29049/ntcle100.pdf). 51 | 52 | Their datasheet describes their resistance using the following formula: 53 | 54 | ``` 55 | R_T = R_ref * exp(A + B/T + C/T² + D/T³) 56 | ``` 57 | 58 | where A,B,C and D are listed in the table on page four. The values differ 59 | for different `R_ref` values as described in the datasheet. 60 | 61 | `find_values.py` performs a brute-force search over possible values for 62 | R1 to R4 and outputs a list of possible combinations and their maximum 63 | deviation. 64 | 65 | Using this approach, up to 0.3 cent per octave deviation can be achieved 66 | over a temperature range from 18 to 30 degrees celsius. 67 | 68 | -------------------------------------------------------------------------------- /firmware-midi/Makefile: -------------------------------------------------------------------------------- 1 | PROJECT = dac_test 2 | BUILD_DIR = bin 3 | 4 | LDFLAGS+=-u _printf_float 5 | 6 | #SHARED_DIR = ../my-common-code 7 | CFILES = main.c setup.c usbmidi.c usart.c 8 | #AFILES = stuff.S 9 | LDLIBS = -lm 10 | 11 | DEVICE=stm32f103c8t 12 | #DEVICE=stm32f411re 13 | #OOCD_FILE = board/stm32f4discovery.cfg 14 | 15 | # You shouldn't have to edit anything below here. 16 | VPATH += $(SHARED_DIR) 17 | INCLUDES += $(patsubst %,-I%, . $(SHARED_DIR)) 18 | OPENCM3_DIR=../libopencm3 19 | 20 | include $(OPENCM3_DIR)/mk/genlink-config.mk 21 | include ../rules.mk 22 | include $(OPENCM3_DIR)/mk/genlink-rules.mk 23 | -------------------------------------------------------------------------------- /firmware-midi/hardware.h: -------------------------------------------------------------------------------- 1 | #ifdef STM32F103C8T 2 | 3 | // blue pill aka STM32F103C8T 4 | 5 | #define MCU_CLOCK 72000000 // 72 MHz 6 | 7 | #define USART_DEBUG USART1 8 | #define RCC_USART_DEBUG RCC_USART1 9 | 10 | #define TIM_MEAS TIM2 11 | #define RCC_TIM_MEAS RCC_TIM2 12 | #define RST_TIM_MEAS RST_TIM2 13 | 14 | // USB: PA11 and PA12 15 | 16 | #define EXTI_MEAS EXTI15 17 | #define EXTI_MEAS_PIN GPIO15 18 | #define EXTI_MEAS_GPIO GPIOA 19 | #define exti_meas_isr exti15_10_isr 20 | #define NVIC_EXTI_MEAS_IRQ NVIC_EXTI15_10_IRQ 21 | 22 | 23 | #define LED_GPIO GPIOC 24 | #define LED_PIN GPIO13 25 | 26 | // The SPI bus with the DAC 27 | #define DAC_SS_PORT GPIOB 28 | #define DAC_SS_PIN GPIO12 29 | 30 | #define BUF_LD_PORT GPIOB 31 | #define BUF_LD_PIN GPIO14 32 | 33 | #define SPI_DAC SPI2 // using PB13==clock and PB15==mosi 34 | #define RCC_SPI_DAC RCC_SPI2 35 | 36 | #elif defined(STM32F411RE) 37 | 38 | // STM32F411 discovery 39 | 40 | #define MCU_CLOCK 84000000 // 72 MHz 41 | 42 | #define USART_DEBUG USART2 43 | #define RCC_USART_DEBUG RCC_USART2 44 | 45 | #define TIM_MEAS TIM2 46 | #define RCC_TIM_MEAS RCC_TIM2 47 | #define RST_TIM_MEAS RST_TIM2 48 | 49 | #define EXTI_MEAS EXTI7 50 | #define EXTI_MEAS_PIN GPIO7 51 | #define EXTI_MEAS_GPIO GPIOE 52 | #define exti_meas_isr exti9_5_isr 53 | #define NVIC_EXTI_MEAS_IRQ NVIC_EXTI9_5_IRQ 54 | 55 | 56 | #define LED_GPIO GPIOD 57 | #define LED_PIN GPIO12 58 | 59 | // The SPI bus with the DAC 60 | #define DAC_SS_PORT GPIOE 61 | #define DAC_SS_PIN GPIO13 62 | 63 | #define SPI_DAC SPI4 // using PE12 and PE14 as SCK/MOSI 64 | #define RCC_SPI_DAC RCC_SPI4 65 | 66 | #endif 67 | -------------------------------------------------------------------------------- /firmware-midi/setup.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | void setup(void); 3 | -------------------------------------------------------------------------------- /firmware-midi/usart.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | 6 | // allow printf() to use the USART 7 | int _write(int file, char *ptr, int len) 8 | { 9 | int i; 10 | 11 | if (file == STDOUT_FILENO || file == STDERR_FILENO) { 12 | for (i = 0; i < len; i++) { 13 | if (ptr[i] == '\n') { 14 | usart_send_blocking(USART_DEBUG, '\r'); 15 | } 16 | usart_send_blocking(USART_DEBUG, ptr[i]); 17 | } 18 | return i; 19 | } 20 | errno = EIO; 21 | return -1; 22 | } 23 | 24 | -------------------------------------------------------------------------------- /firmware-midi/usbmidi.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void myusb_init(void); 4 | void myusb_poll(void); 5 | -------------------------------------------------------------------------------- /firmware-rust/.cargo/config: -------------------------------------------------------------------------------- 1 | [target.thumbv7m-none-eabi] 2 | runner = "arm-none-eabi-gdb -q -x openocd.gdb" 3 | rustflags = [ 4 | "-C", "linker=rust-lld", 5 | "-C", "link-arg=-Tlink.x", 6 | ] 7 | 8 | [build] 9 | target = "thumbv7m-none-eabi" 10 | -------------------------------------------------------------------------------- /firmware-rust/.gitignore: -------------------------------------------------------------------------------- 1 | target/ 2 | -------------------------------------------------------------------------------- /firmware-rust/Cargo.toml: -------------------------------------------------------------------------------- 1 | [package] 2 | name = "analog-synth-firmware" 3 | version = "0.1.0" 4 | authors = ["Florian Jung "] 5 | edition = "2018" 6 | 7 | [dependencies] 8 | cortex-m = ">=0.6" 9 | cortex-m-rt = ">=0.6" 10 | cortex-m-rtfm = "=0.5.0-beta.1" 11 | stm32f1xx-hal = { version = ">=0.3", features = ["rt"] } 12 | #stm32f1xx-hal = { git="https://github.com/stm32-rs/stm32f1xx-hal", features = ["rt", "stm32f103"] } 13 | panic-semihosting = ">=0.5" 14 | usb-device = ">=0.2.1" 15 | usbd-serial = ">=0.1" 16 | stm32-usbd = { version = ">=0.4.0", features = ["stm32f103xx"] } 17 | usbd-midi = { path = "./lib/usbd-midi" } 18 | embedded-hal = ">=0.2.3" 19 | shared-bus = ">=0.1.4" 20 | noop-bus-mutex = { git="https://github.com/Windfisch/noop-bus-mutex" } 21 | mcp49xx = ">=0.1.0" 22 | libm = ">=0.1.4" 23 | num-traits = { version = "0.2", default-features = false } 24 | 25 | [build-dependencies] 26 | vergen = "3" 27 | 28 | 29 | [patch.crates-io] 30 | stm32f1xx-hal = { path = './lib/stm32f1xx-hal', features = ["rt","stm32f103"] } 31 | 32 | [dev-dependencies] 33 | cortex-m-rtfm = ">=0.4.0" 34 | 35 | #[profile.dev.overrides."*"] # + 36 | #opt-level = "z" # + 37 | 38 | [profile.dev] 39 | opt-level = "z" # + 40 | #codegen-units = 1 # better optimizations 41 | debug = true # symbols are nice and they don't increase the size on Flash 42 | lto = true # better optimizations 43 | [profile.release] 44 | codegen-units = 1 # better optimizations 45 | debug = true # symbols are nice and they don't increase the size on Flash 46 | lto = true # better optimizations 47 | -------------------------------------------------------------------------------- /firmware-rust/Makefile: -------------------------------------------------------------------------------- 1 | all: debug.bin release.bin 2 | 3 | %.bin: target/thumbv7m-none-eabi/%/analog-synth-firmware 4 | arm-none-eabi-objcopy -O binary $< $@ 5 | 6 | flash.%: %.bin 7 | stm32flash /dev/ttyUSB0 -b115200 -w $< 8 | 9 | .PHONY: target/thumbv7m-none-eabi/debug/analog-synth-firmware 10 | .PHONY: target/thumbv7m-none-eabi/release/analog-synth-firmware 11 | target/thumbv7m-none-eabi/debug/analog-synth-firmware: 12 | cargo build --target=thumbv7m-none-eabi 13 | target/thumbv7m-none-eabi/release/analog-synth-firmware: 14 | cargo build --release --target=thumbv7m-none-eabi 15 | -------------------------------------------------------------------------------- /firmware-rust/build.rs: -------------------------------------------------------------------------------- 1 | use std::env; 2 | use std::fs; 3 | use std::io::Write; 4 | use std::path::PathBuf; 5 | 6 | use vergen::{ConstantsFlags, generate_cargo_keys}; 7 | 8 | fn main() { 9 | // Put the linker script somewhere the linker can find it 10 | let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap()); 11 | fs::File::create(out_dir.join("memory.x")) 12 | .unwrap() 13 | .write_all(include_bytes!("memory.x")) 14 | .unwrap(); 15 | println!("cargo:rustc-link-search={}", out_dir.display()); 16 | println!("cargo:rerun-if-changed=memory.x"); 17 | 18 | let mut flags = ConstantsFlags::BUILD_TIMESTAMP | ConstantsFlags::SHA; 19 | generate_cargo_keys(flags).expect("Unable to generate the cargo keys!"); 20 | } 21 | -------------------------------------------------------------------------------- /firmware-rust/memory.x: -------------------------------------------------------------------------------- 1 | /* STM32F103C8T6 */ 2 | MEMORY 3 | { 4 | FLASH : ORIGIN = 0x08000000, LENGTH = 64K 5 | RAM : ORIGIN = 0x20000000, LENGTH = 20K 6 | } 7 | -------------------------------------------------------------------------------- /firmware-rust/openocd.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink-v2-1.cfg] 2 | source [find target/stm32f1x.cfg] 3 | targets 4 | # reset halt 5 | # halt 6 | -------------------------------------------------------------------------------- /firmware-rust/openocd.gdb: -------------------------------------------------------------------------------- 1 | set history save on 2 | set confirm off 3 | target extended-remote :3333 4 | set print asm-demangle on 5 | monitor arm semihosting enable 6 | monitor reset halt 7 | load 8 | # monitor verify 9 | # monitor reset 10 | # quit 11 | continue 12 | -------------------------------------------------------------------------------- /firmware-rust/schem/schem.kicad_pcb: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 4) (host kicad "dummy file") ) 2 | -------------------------------------------------------------------------------- /firmware-rust/schem/schem.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /firmware-rust/schem/sym-lib-table: -------------------------------------------------------------------------------- 1 | (sym_lib_table 2 | (lib (name schematic-symbols)(type Legacy)(uri /home/flo/analog-synth/hardware/lib/schematic-symbols.lib)(options "")(descr "")) 3 | (lib (name schem-rescue)(type Legacy)(uri ${KIPRJMOD}/schem-rescue.lib)(options "")(descr "")) 4 | ) 5 | -------------------------------------------------------------------------------- /firmware-rust/src/bu2505fv.rs: -------------------------------------------------------------------------------- 1 | use embedded_hal as hal; 2 | use hal::digital::v2::OutputPin; 3 | use core::marker::PhantomData; 4 | use crate::reverse_bits::reverse_bits; 5 | use cortex_m::asm::delay; 6 | 7 | pub struct Reversed; 8 | pub struct NotReversed; 9 | 10 | pub trait ReverseTrait { 11 | fn maybe_reverse(val : u16) -> u16; 12 | } 13 | 14 | // "Reversed" means the the reversed pin of the chip is pulled high. Since the 15 | // chip's bit order is reversed in general, in the "Reversed" case we would not 16 | // need to reverse the data bits. 17 | impl ReverseTrait for NotReversed { 18 | fn maybe_reverse(val : u16) -> u16 { 19 | reverse_bits(val, 10) 20 | } 21 | } 22 | impl ReverseTrait for Reversed { 23 | fn maybe_reverse(val : u16) -> u16 { 24 | val 25 | } 26 | } 27 | 28 | pub struct Bu2505fv, Pin : OutputPin, IsReversed : ReverseTrait> { 29 | pin : Pin, 30 | _spi : PhantomData, 31 | _rev : PhantomData 32 | } 33 | 34 | pub fn create_reversed, Pin : OutputPin>(pin : Pin, _spi : &SPI) -> Bu2505fv { 35 | Bu2505fv{ pin, _spi: PhantomData{}, _rev: PhantomData{} } 36 | } 37 | 38 | pub fn create_not_reversed, Pin : OutputPin>(pin : Pin, _spi : &SPI) -> Bu2505fv { 39 | Bu2505fv{ pin, _spi: PhantomData{}, _rev: PhantomData{} } 40 | } 41 | 42 | 43 | impl Bu2505fv 44 | where 45 | SPI : hal::blocking::spi::Write, 46 | Pin : OutputPin, 47 | IsReversed : ReverseTrait 48 | { 49 | fn check_value(&self, value : u16) -> Result<(),Error> { 50 | if value >= 1024 { 51 | Err(Error::InvalidValue) 52 | } 53 | else { 54 | Ok(()) 55 | } 56 | } 57 | 58 | fn check_channel(&self, channel: u8) -> Result<(),Error> { 59 | if channel >= 10 { 60 | Err(Error::InvalidChannel) 61 | } 62 | else { 63 | Ok(()) 64 | } 65 | } 66 | 67 | pub fn set(&mut self, channel : u8, value : u16, spi : &mut SPI, sysclk_hz : u32) -> Result<(),Error> { 68 | self.check_channel(channel)?; 69 | self.check_value(value)?; 70 | 71 | let channel_rev = reverse_bits(channel, 4); 72 | let value_rev = IsReversed::maybe_reverse(value); 73 | 74 | let payload: [u8; 2] = [ 75 | (channel_rev << 2 ) | (value_rev >> 8) as u8, 76 | (value_rev & 0xFF) as u8 77 | ]; 78 | spi.write(&payload).map_err(Error::Spi)?; 79 | 80 | delay(sysclk_hz / 20_000_000); // 50ns delay 81 | self.pin.set_high().map_err(Error::Gpio)?; 82 | 83 | delay(sysclk_hz / 20_000_000); // 50ns delay 84 | self.pin.set_low().map_err(Error::Gpio)?; 85 | 86 | delay(sysclk_hz / 20_000_000); // 50ns delay 87 | 88 | Ok(()) 89 | } 90 | } 91 | 92 | #[derive(Debug)] 93 | pub enum Error { 94 | InvalidChannel, 95 | InvalidValue, 96 | Spi(SpiErr), 97 | Gpio(GpioErr) 98 | } 99 | -------------------------------------------------------------------------------- /firmware-rust/src/coop_threadsafe_container.rs: -------------------------------------------------------------------------------- 1 | use core::sync::atomic::{AtomicU32, Ordering}; 2 | use core::ops::{Deref,DerefMut}; 3 | 4 | 5 | pub trait ThreadToken { const ID : u32; } 6 | 7 | pub struct Token { phantom : core::marker::PhantomData } 8 | impl Token { 9 | pub unsafe fn new() -> Token { return Token { phantom: core::marker::PhantomData }; } 10 | } 11 | 12 | impl ThreadToken for Token
{ const ID : u32 = 1; } 13 | impl ThreadToken for Token { const ID : u32 = 2; } 14 | 15 | #[allow(dead_code)] 16 | pub struct Main; 17 | #[allow(dead_code)] 18 | pub struct ISR; 19 | 20 | use core::cell::UnsafeCell; 21 | 22 | 23 | pub struct CoopContainer { 24 | current_owner : AtomicU32, 25 | content : UnsafeCell 26 | } 27 | 28 | pub struct Guard<'a,T,Owner : ThreadToken> { 29 | coop_container : &'a CoopContainer, 30 | _owner : core::marker::PhantomData 31 | } 32 | 33 | impl CoopContainer { 34 | //pub const fn new(init : T) -> CoopContainer 35 | pub const fn new(init : T, owner : u32) -> CoopContainer 36 | { 37 | CoopContainer { 38 | current_owner : AtomicU32::new(owner), 39 | //current_owner : AtomicU32::new(S::ID), 40 | content : UnsafeCell::new(init) 41 | } 42 | } 43 | 44 | pub fn try_get(&self, _proof : &S) -> Result, ()> 45 | { 46 | if self.current_owner.load(Ordering::Acquire) == S::ID 47 | { 48 | self.current_owner.store(0, Ordering::Relaxed); // other threads won't care 49 | Result::Ok(Guard { coop_container : self, _owner:core::marker::PhantomData }) 50 | } 51 | else 52 | { 53 | Result::Err(()) 54 | } 55 | } 56 | } 57 | 58 | impl Guard<'_,T,O> { 59 | pub fn give_away(self) -> () 60 | { 61 | self.coop_container.current_owner.store(S::ID, Ordering::Release); 62 | core::mem::forget(self); 63 | } 64 | } 65 | 66 | impl Drop for Guard<'_,T,O> { 67 | fn drop(&mut self) 68 | { 69 | self.coop_container.current_owner.store(O::ID, Ordering::Release); 70 | } 71 | } 72 | 73 | unsafe impl Sync for CoopContainer {} 74 | 75 | 76 | impl Deref for Guard<'_,T,O> { 77 | type Target = T; 78 | 79 | fn deref(&self) -> &T { 80 | unsafe { &*self.coop_container.content.get() } 81 | } 82 | } 83 | 84 | impl DerefMut for Guard<'_,T,O> { 85 | fn deref_mut(&mut self) -> &mut T { 86 | unsafe { &mut *self.coop_container.content.get() } 87 | } 88 | } 89 | -------------------------------------------------------------------------------- /firmware-rust/src/envelope.rs: -------------------------------------------------------------------------------- 1 | #[derive(PartialEq,Copy,Clone)] 2 | enum Phase { 3 | ATTACK, 4 | DECAY, 5 | SUSTAIN, 6 | RELEASE, 7 | IDLE 8 | } 9 | use Phase::*; 10 | 11 | #[derive(Copy,Clone)] 12 | pub struct Envelope 13 | { 14 | pub attack : u16, // milliseconds 15 | pub decay : u16, // milliseconds 16 | pub sustain: u16, // 0..65535 17 | pub release: u16, // milliseconds 18 | pub retriggerable : bool, 19 | pub hold : bool, // enables the sustain phase 20 | pub early_release : bool, 21 | pub repeat: bool, // repeats the envelope after it has finished, turning it into sort of an LFO 22 | release_pending : bool, 23 | value : u32, 24 | phase : Phase 25 | } 26 | 27 | impl Envelope { 28 | pub const fn new() -> Envelope { 29 | return Envelope { 30 | attack : 1, 31 | decay : 300, 32 | sustain : 5*(1<<13), 33 | release : 3000, 34 | retriggerable : true, 35 | hold : true, 36 | early_release : false, 37 | repeat: false, 38 | release_pending : false, 39 | value : 0, 40 | phase : IDLE 41 | } 42 | } 43 | 44 | pub fn trigger(&mut self) { 45 | if !self.retriggerable { 46 | self.value = 0; 47 | } 48 | self.phase = ATTACK; 49 | } 50 | pub fn release(&mut self) { 51 | if self.early_release || self.phase == SUSTAIN { 52 | self.phase = RELEASE; 53 | } 54 | else if self.phase == ATTACK || self.phase == DECAY { 55 | self.release_pending = true; 56 | } 57 | } 58 | 59 | pub fn value10bit(&self) -> u16 { 60 | return (self.value >> 22) as u16; 61 | } 62 | 63 | pub fn tick(&mut self) { 64 | match self.phase { 65 | ATTACK => { 66 | self.value = self.value.saturating_add(u32::max_value() / self.attack as u32); 67 | if self.value == u32::max_value() { 68 | self.phase = DECAY; 69 | } 70 | } 71 | DECAY => { 72 | self.value = self.value.saturating_sub(u32::max_value() / self.decay as u32); 73 | if (self.value >> 16) as u16 <= self.sustain { 74 | self.value = (self.sustain as u32) << 16; 75 | if self.hold { 76 | self.phase = SUSTAIN; 77 | } 78 | else { 79 | self.phase = RELEASE; 80 | self.release_pending = false; 81 | } 82 | } 83 | } 84 | SUSTAIN => { 85 | if !self.hold || self.release_pending { 86 | self.phase = RELEASE; 87 | self.release_pending = false; 88 | } 89 | } 90 | RELEASE => { 91 | self.value = self.value.saturating_sub(u32::max_value() / self.release as u32); 92 | if self.value == 0 { 93 | if self.repeat { 94 | self.phase = ATTACK; 95 | } 96 | else { 97 | self.phase = IDLE; 98 | } 99 | } 100 | } 101 | IDLE => {} 102 | } 103 | } 104 | } 105 | -------------------------------------------------------------------------------- /firmware-rust/src/midi.rs: -------------------------------------------------------------------------------- 1 | #[derive(Debug)] 2 | pub enum MidiMessage { 3 | Global(MidiGlobalMessage), 4 | Channel(u8, MidiChannelMessage) 5 | } 6 | #[derive(Debug)] 7 | pub enum MidiGlobalMessage { 8 | Reserved0, 9 | Reserved1, 10 | SystemCommon { data : [u8;3], len : u8 }, 11 | SysEx { data: [u8;3], len : u8, end : bool }, 12 | SingleByte { byte : u8 } 13 | } 14 | #[derive(Debug)] 15 | pub enum MidiChannelMessage { 16 | NoteOn { note: u8, velocity: u8 }, 17 | NoteOff { note: u8, velocity: u8 }, 18 | PolyAftertouch, // TODO 19 | ControlChange { ctrl: u8, value: u8 }, 20 | ProgramChange { program: u8}, 21 | ChannelAftertouch { value: u8 }, 22 | Pitchbend { value: u16 } 23 | } 24 | 25 | pub fn parse_midi (data : &[u8; 4]) -> (u8, MidiMessage) { 26 | use MidiMessage::*; 27 | use MidiGlobalMessage::*; 28 | use MidiChannelMessage::*; 29 | 30 | let cable = (data[0] & 0xF0) >> 4; 31 | let code_index_number = data[0] & 0x0F; 32 | 33 | let d3 = [data[1], data[2], data[3]]; 34 | 35 | let midi_message = match code_index_number { 36 | 0x0 => Global(Reserved0), 37 | 0x1 => Global(Reserved1), 38 | 0x2 => Global(SystemCommon { data : d3, len : 2 }), 39 | 0x3 => Global(SystemCommon { data : d3, len : 3 }), 40 | 0x4 => Global(SysEx {data : d3, len : 3, end : false }), 41 | 0x5 => Global(SysEx {data : d3, len : 1, end : true }), 42 | 0x6 => Global(SysEx {data : d3, len : 2, end : true }), 43 | 0x7 => Global(SysEx {data : d3, len : 3, end : true }), 44 | 0xF => Global(SingleByte { byte : data[1] }), 45 | _ => { 46 | //let hi = (data[1] & 0xF0) >> 4; 47 | let channel = data[1] & 0x0F; 48 | 49 | Channel(channel, 50 | match code_index_number { 51 | 0x8 => NoteOff { note : data[2], velocity : data[3] }, 52 | 0x9 => if data[3] > 0 { NoteOn { note : data[2], velocity : data[3] } } 53 | else { NoteOff { note : data[2], velocity : 64 } } 54 | 0xA => PolyAftertouch, // TODO 55 | 0xB => ControlChange { ctrl : data[2], value : data[3] }, 56 | 0xC => ProgramChange { program : data[2] }, 57 | 0xD => ChannelAftertouch { value : data[2] }, 58 | 0xE => Pitchbend { value : ((data[2]&0x7F) as u16) + 128*((data[3]&0x7F) as u16) }, 59 | _ => panic!() 60 | } 61 | ) 62 | } 63 | }; 64 | 65 | (cable, midi_message) 66 | } 67 | 68 | -------------------------------------------------------------------------------- /firmware-rust/src/reverse_bits.rs: -------------------------------------------------------------------------------- 1 | use num_traits::PrimInt; 2 | 3 | pub fn reverse_bits(val : Int, n_bits: u8) -> Int 4 | { 5 | let mut result : Int = Int::zero(); 6 | for i in 0..n_bits { 7 | if val & (Int::one() << i as usize) != Int::zero() { 8 | result = result | (Int::one() << (n_bits-i-1) as usize); 9 | } 10 | } 11 | return result; 12 | } 13 | -------------------------------------------------------------------------------- /hardware/control_board_prototype/README.md: -------------------------------------------------------------------------------- 1 | Control Board mk I 2 | ================== 3 | 4 | The main board of the synth: It accepts a STM32F103 Blue Pill board and offers 5 | two 10-channel DACs. Additionally, it contains a voltage converter, a virtual 6 | ground circuit and pin headers for power distribution. 7 | 8 | ![render of the board](../img/mainboard.jpg) 9 | 10 | Setup 11 | ----- 12 | 13 | Adjust to R2 to 540 Ohms to get a supply voltage of 10V. 14 | 15 | U3 is optional. If U3 is equipped, do not close JP1. (C1, C2, R4 and R5 can 16 | be left out in this case.) Otherwise, do close JP1. 17 | 18 | JP2 controls whether the digital ground is connected to the analog ground, or 19 | whether DGND is a separate buffered voltage source. 20 | 21 | Similarly, JP3 allows to switch between the analog supply voltage and the 22 | blue pill board's 5V supply voltage. 23 | 24 | Recommended configuration 25 | ------------------------- 26 | 27 | **Use Vdd = Vcc (JP3).** Taking Vdd from the blue pill board creates weird 28 | "digital singing" on the audio signal. 29 | 30 | **Use a separate dgnd (JP2).** Joining agnd and dgnd together causes strong 31 | humming (approx. 100Hz; I measured 116Hz?!) and buzzing (from the SPI 32 | bus; completely goes away as long the BU2505FV DAC isn't used (i.e., 33 | during startup/init), reduced when the MCP4822 isn't connected to the 34 | SPI bus, very present when it is). Using a separate GND completely 35 | cancels the humming, and reduces the buzzing to ~-70-80dB when the 36 | VCA is closed, but still audible if the VCA is open). 37 | 38 | A **TLE2426** ground splitter (U3) seems to be **unneccessary**. 39 | 40 | Revisions 41 | --------- 42 | 43 | - rev01: Has no marking and no wind fish on the back side. 44 | - rev02: Small overlapping silk screen fixes. Has a wind fish and "rev02" on the back side. Was never fabricated. 45 | 46 | Tested configuration 47 | -------------------- 48 | 49 | rev01 has been used successfully with the following configuration: 50 | 51 | - U2 was changed to TL072. 52 | - JP1 closed, U3 not equipped. 53 | - JP2 (dgnd select) in *sep* configuration. 54 | - JP3 (Vdd select) in *blue pill* configuration. 55 | - right half of the DAC section (i.e. J8, J10 and associated resistors 56 | and capacitors) not populated. 57 | 58 | Fabrication 59 | ----------- 60 | 61 | The gerber outputs used for fabrication of rev01 with [JLCPCB](https://jlcpcb.com) are 62 | located under `fab/`. 63 | 64 | The fabrication layers indicating which component values to put where 65 | are [here](../voice_and_control_board_fab.pdf). 66 | -------------------------------------------------------------------------------- /hardware/control_board_prototype/bom.ods: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Windfisch/analog-synth/c305a21f717dfa2cc809e3488e7512d5c711304a/hardware/control_board_prototype/bom.ods -------------------------------------------------------------------------------- /hardware/control_board_prototype/fab/control_board_prototype-B_Paste.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4* 2 | G04 #@! TF.CreationDate,2019-11-25T00:39:36+01:00* 3 | G04 #@! TF.ProjectId,control_board_prototype,636f6e74-726f-46c5-9f62-6f6172645f70,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Paste,Bot* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW 5.1.4) date 2019-11-25 00:39:36* 10 | %MOMM*% 11 | %LPD*% 12 | G04 APERTURE LIST* 13 | G04 APERTURE END LIST* 14 | M02* 15 | -------------------------------------------------------------------------------- /hardware/control_board_prototype/fab/control_board_prototype-Edge_Cuts.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4* 2 | G04 #@! TF.CreationDate,2019-11-25T00:39:36+01:00* 3 | G04 #@! TF.ProjectId,control_board_prototype,636f6e74-726f-46c5-9f62-6f6172645f70,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Profile,NP* 6 | %FSLAX46Y46*% 7 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 8 | G04 Created by KiCad (PCBNEW 5.1.4) date 2019-11-25 00:39:36* 9 | %MOMM*% 10 | %LPD*% 11 | G04 APERTURE LIST* 12 | %ADD10C,0.050000*% 13 | G04 APERTURE END LIST* 14 | D10* 15 | X261112000Y-30226000D02* 16 | X247396000Y-30226000D01* 17 | X261112000Y-30734000D02* 18 | X261112000Y-30226000D01* 19 | X261112000Y-84645500D02* 20 | X261112000Y-30734000D01* 21 | X163068000Y-84645500D02* 22 | X261112000Y-84645500D01* 23 | X163068000Y-83566000D02* 24 | X163068000Y-84645500D01* 25 | X163068000Y-30226000D02* 26 | X163068000Y-83566000D01* 27 | X247396000Y-30226000D02* 28 | X163068000Y-30226000D01* 29 | M02* 30 | -------------------------------------------------------------------------------- /hardware/control_board_prototype/fab/control_board_prototype-NPTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ; DRILL file {KiCad 5.1.4} date Mon 25 Nov 2019 12:39:38 AM CET 3 | ; FORMAT={-:-/ absolute / metric / decimal} 4 | ; #@! TF.CreationDate,2019-11-25T00:39:38+01:00 5 | ; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.4 6 | ; #@! TF.FileFunction,NonPlated,1,2,NPTH 7 | FMAT,2 8 | METRIC 9 | % 10 | G90 11 | G05 12 | T0 13 | M30 14 | -------------------------------------------------------------------------------- /hardware/control_board_prototype/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name windfisch)(type KiCad)(uri ${KIPRJMOD}/../lib/windfisch.pretty)(options "")(descr "")) 3 | (lib (name footprints)(type KiCad)(uri ${KIPRJMOD}/../lib/footprints.pretty)(options "")(descr "")) 4 | ) 5 | -------------------------------------------------------------------------------- /hardware/control_board_prototype/sym-lib-table: -------------------------------------------------------------------------------- 1 | (sym_lib_table 2 | (lib (name schematic-symbols)(type Legacy)(uri ${KIPRJMOD}/../lib/schematic-symbols.lib)(options "")(descr "")) 3 | ) 4 | -------------------------------------------------------------------------------- /hardware/img/mainboard.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Windfisch/analog-synth/c305a21f717dfa2cc809e3488e7512d5c711304a/hardware/img/mainboard.jpg -------------------------------------------------------------------------------- /hardware/img/vco_blue.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Windfisch/analog-synth/c305a21f717dfa2cc809e3488e7512d5c711304a/hardware/img/vco_blue.jpg -------------------------------------------------------------------------------- /hardware/img/vco_red.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Windfisch/analog-synth/c305a21f717dfa2cc809e3488e7512d5c711304a/hardware/img/vco_red.jpg -------------------------------------------------------------------------------- /hardware/img/voiceboard.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Windfisch/analog-synth/c305a21f717dfa2cc809e3488e7512d5c711304a/hardware/img/voiceboard.jpg -------------------------------------------------------------------------------- /hardware/lib/footprints.pretty/C_rect_smd_combo.kicad_mod: -------------------------------------------------------------------------------- 1 | (module C_rect_smd_combo (layer F.Cu) (tedit 5DD7230A) 2 | (fp_text reference REF** (at 2.54 3.175) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value C_rect_smd_combo (at 3.81 1.27) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start 1.5019 0.6) (end 3.5019 0.6) (layer B.Fab) (width 0.1)) 9 | (fp_line (start 2.240648 -0.71) (end 2.763152 -0.71) (layer B.SilkS) (width 0.12)) 10 | (fp_line (start 2.240648 0.71) (end 2.763152 0.71) (layer B.SilkS) (width 0.12)) 11 | (fp_line (start 1.5019 -0.6) (end 1.5019 0.6) (layer B.Fab) (width 0.1)) 12 | (fp_line (start 3.5019 -0.6) (end 1.5019 -0.6) (layer B.Fab) (width 0.1)) 13 | (fp_line (start 3.5019 0.6) (end 3.5019 -0.6) (layer B.Fab) (width 0.1)) 14 | (fp_line (start -1.22 1.87) (end 6.22 1.87) (layer F.SilkS) (width 0.12)) 15 | (fp_line (start -1.22 -1.87) (end 6.22 -1.87) (layer F.SilkS) (width 0.12)) 16 | (fp_line (start 6.35 2) (end 6.35 -2) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start 6.1 -1.75) (end -1.1 -1.75) (layer F.Fab) (width 0.1)) 18 | (fp_line (start 6.1 1.75) (end 6.1 -1.75) (layer F.Fab) (width 0.1)) 19 | (fp_line (start -1.1 1.75) (end 6.1 1.75) (layer F.Fab) (width 0.1)) 20 | (fp_line (start -1.35 2) (end 6.35 2) (layer F.CrtYd) (width 0.05)) 21 | (fp_line (start -1.22 -1.87) (end -1.22 1.87) (layer F.SilkS) (width 0.12)) 22 | (fp_line (start 6.22 -1.87) (end 6.22 1.87) (layer F.SilkS) (width 0.12)) 23 | (fp_line (start -1.1 -1.75) (end -1.1 1.75) (layer F.Fab) (width 0.1)) 24 | (fp_line (start -1.35 -2) (end -1.35 2) (layer F.CrtYd) (width 0.05)) 25 | (fp_line (start 6.35 -2) (end -1.35 -2) (layer F.CrtYd) (width 0.05)) 26 | (fp_line (start 0.635 0.762) (end 4.318 0.762) (layer B.CrtYd) (width 0.12)) 27 | (fp_line (start 4.318 0.762) (end 4.318 -0.762) (layer B.CrtYd) (width 0.12)) 28 | (fp_line (start 4.318 -0.762) (end 0.635 -0.762) (layer B.CrtYd) (width 0.12)) 29 | (fp_line (start 0.635 -0.762) (end 0.635 0.762) (layer B.CrtYd) (width 0.12)) 30 | (pad 2 smd roundrect (at 3.6269 0) (size 1.35 1.4) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217)) 31 | (pad 1 smd roundrect (at 1.3769 0) (size 1.35 1.4) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217)) 32 | (pad 2 thru_hole circle (at 5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)) 33 | (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)) 34 | ) 35 | -------------------------------------------------------------------------------- /hardware/lib/footprints.pretty/SolderDipJumper.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SolderDipJumper (layer F.Cu) (tedit 5D40CE2E) 2 | (fp_text reference REF** (at 0 3.175) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value SolderDipJumper (at 0 5.08) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start 3.03 -1.8) (end -3.07 -1.8) (layer B.CrtYd) (width 0.05)) 9 | (fp_line (start -3.07 -1.8) (end -3.07 1.75) (layer B.CrtYd) (width 0.05)) 10 | (fp_line (start -2.54 -1.27) (end -2.54 0.635) (layer B.Fab) (width 0.1)) 11 | (fp_line (start 2.54 -1.27) (end -2.54 -1.27) (layer B.Fab) (width 0.1)) 12 | (fp_line (start 3.03 1.75) (end 3.03 -1.8) (layer B.CrtYd) (width 0.05)) 13 | (fp_line (start -3.07 1.75) (end 3.03 1.75) (layer B.CrtYd) (width 0.05)) 14 | (fp_line (start -1.905 1.27) (end 2.54 1.27) (layer B.Fab) (width 0.1)) 15 | (fp_line (start 2.54 1.27) (end 2.54 -1.27) (layer B.Fab) (width 0.1)) 16 | (fp_line (start -2.54 0.635) (end -1.905 1.27) (layer B.Fab) (width 0.1)) 17 | (pad 1 thru_hole custom (at -1.27 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 18 | (zone_connect 0) 19 | (options (clearance outline) (anchor rect)) 20 | (primitives 21 | (gr_poly (pts 22 | (xy 1.4 -0.85) (xy 0.9 0) (xy 1.4 0.85) (xy -0.1 0.85) (xy -0.1 -0.85) 23 | ) (width 0)) 24 | )) 25 | (pad 2 thru_hole custom (at 1.27 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 26 | (zone_connect 0) 27 | (options (clearance outline) (anchor circle)) 28 | (primitives 29 | (gr_poly (pts 30 | (xy -0.85 0.85) (xy -1.35 0) (xy -0.85 -0.85) (xy 0 -0.85) (xy 0 0.85) 31 | ) (width 0)) 32 | )) 33 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl 34 | (offset (xyz 1.27 0 0)) 35 | (scale (xyz 1 1 1)) 36 | (rotate (xyz 0 0 90)) 37 | ) 38 | ) 39 | -------------------------------------------------------------------------------- /hardware/lib/footprints.pretty/SolderDipJumper2alt.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SolderDipJumper2alt (layer F.Cu) (tedit 5DDEE02D) 2 | (fp_text reference REF** (at 0 3.175) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value SolderDipJumper2alt (at 0 5.08) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start 3.07 -1.8) (end -3.07 -1.8) (layer B.CrtYd) (width 0.05)) 9 | (fp_line (start -3.07 -1.8) (end -3.07 1.75) (layer B.CrtYd) (width 0.05)) 10 | (fp_line (start -2.54 -1.27) (end -2.54 0.635) (layer B.Fab) (width 0.1)) 11 | (fp_line (start 2.54 -1.27) (end -2.54 -1.27) (layer B.Fab) (width 0.1)) 12 | (fp_line (start 3.07 1.75) (end 3.07 -1.8) (layer B.CrtYd) (width 0.05)) 13 | (fp_line (start -3.07 1.75) (end 3.07 1.75) (layer B.CrtYd) (width 0.05)) 14 | (fp_line (start -1.905 1.27) (end 2.54 1.27) (layer B.Fab) (width 0.1)) 15 | (fp_line (start 2.54 1.27) (end 2.54 -1.27) (layer B.Fab) (width 0.1)) 16 | (fp_line (start -2.54 0.635) (end -1.905 1.27) (layer B.Fab) (width 0.1)) 17 | (pad 1 thru_hole custom (at -1.27 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 18 | (zone_connect 0) 19 | (options (clearance outline) (anchor rect)) 20 | (primitives 21 | (gr_poly (pts 22 | (xy 1.45 -0.85) (xy 0.85 0) (xy 1.45 0.85) (xy -0.05 0.85) (xy -0.05 -0.85) 23 | ) (width 0)) 24 | )) 25 | (pad 2 thru_hole custom (at 1.27 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 26 | (zone_connect 0) 27 | (options (clearance outline) (anchor circle)) 28 | (primitives 29 | (gr_poly (pts 30 | (xy -0.7 0.85) (xy -1.3 0) (xy -0.7 -0.85) (xy 0 -0.85) (xy 0 0.85) 31 | ) (width 0)) 32 | )) 33 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x02_P2.54mm_Vertical.wrl 34 | (offset (xyz 1.27 0 0)) 35 | (scale (xyz 1 1 1)) 36 | (rotate (xyz 0 0 90)) 37 | ) 38 | ) 39 | -------------------------------------------------------------------------------- /hardware/lib/footprints.pretty/SolderDipJumper3.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SolderDipJumper3 (layer F.Cu) (tedit 5D40CF4D) 2 | (fp_text reference REF** (at 0 3.175) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value SolderDipJumper3 (at 0 5.08) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start 4.318 -1.8) (end -4.34 -1.8) (layer B.CrtYd) (width 0.05)) 9 | (fp_line (start -4.34 -1.8) (end -4.34 1.75) (layer B.CrtYd) (width 0.05)) 10 | (fp_line (start -3.81 -1.27) (end -3.81 0.635) (layer B.Fab) (width 0.1)) 11 | (fp_line (start 3.81 -1.27) (end -3.81 -1.27) (layer B.Fab) (width 0.1)) 12 | (fp_line (start 4.318 1.75) (end 4.318 -1.8) (layer B.CrtYd) (width 0.05)) 13 | (fp_line (start -4.34 1.75) (end 4.318 1.75) (layer B.CrtYd) (width 0.05)) 14 | (fp_line (start -3.175 1.27) (end 3.81 1.27) (layer B.Fab) (width 0.1)) 15 | (fp_line (start 3.81 1.27) (end 3.81 -1.27) (layer B.Fab) (width 0.1)) 16 | (fp_line (start -3.81 0.635) (end -3.175 1.27) (layer B.Fab) (width 0.1)) 17 | (pad 1 thru_hole custom (at -2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 18 | (zone_connect 0) 19 | (options (clearance outline) (anchor rect)) 20 | (primitives 21 | (gr_poly (pts 22 | (xy 1.4 -0.85) (xy 0.9 0) (xy 1.4 0.85) (xy -0.1 0.85) (xy -0.1 -0.85) 23 | ) (width 0)) 24 | )) 25 | (pad 2 thru_hole custom (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 26 | (zone_connect 0) 27 | (options (clearance outline) (anchor circle)) 28 | (primitives 29 | (gr_poly (pts 30 | (xy -0.85 0.85) (xy -1.35 0) (xy -0.85 -0.85) (xy 1.4 -0.85) (xy 0.9 0) 31 | (xy 1.4 0.85)) (width 0)) 32 | )) 33 | (pad 3 thru_hole custom (at 2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 34 | (zone_connect 0) 35 | (options (clearance outline) (anchor circle)) 36 | (primitives 37 | (gr_poly (pts 38 | (xy -0.85 0.85) (xy -1.35 0) (xy -0.85 -0.85) (xy 0 -0.85) (xy 0 0.85) 39 | ) (width 0)) 40 | )) 41 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x03_P2.54mm_Vertical.wrl 42 | (offset (xyz 2.54 0 0)) 43 | (scale (xyz 1 1 1)) 44 | (rotate (xyz 0 0 90)) 45 | ) 46 | ) 47 | -------------------------------------------------------------------------------- /hardware/lib/footprints.pretty/SolderDipJumper3alt.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SolderDipJumper3alt (layer F.Cu) (tedit 5D40D1B5) 2 | (fp_text reference REF** (at 0 3.175) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value SolderDipJumper3alt (at 0 5.08) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start 4.318 -1.8) (end -4.34 -1.8) (layer B.CrtYd) (width 0.05)) 9 | (fp_line (start -4.34 -1.8) (end -4.34 1.75) (layer B.CrtYd) (width 0.05)) 10 | (fp_line (start -3.81 -1.27) (end -3.81 0.635) (layer B.Fab) (width 0.1)) 11 | (fp_line (start 3.81 -1.27) (end -3.81 -1.27) (layer B.Fab) (width 0.1)) 12 | (fp_line (start 4.318 1.75) (end 4.318 -1.8) (layer B.CrtYd) (width 0.05)) 13 | (fp_line (start -4.34 1.75) (end 4.318 1.75) (layer B.CrtYd) (width 0.05)) 14 | (fp_line (start -3.175 1.27) (end 3.81 1.27) (layer B.Fab) (width 0.1)) 15 | (fp_line (start 3.81 1.27) (end 3.81 -1.27) (layer B.Fab) (width 0.1)) 16 | (fp_line (start -3.81 0.635) (end -3.175 1.27) (layer B.Fab) (width 0.1)) 17 | (pad 1 thru_hole custom (at -2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 18 | (zone_connect 0) 19 | (options (clearance outline) (anchor rect)) 20 | (primitives 21 | (gr_poly (pts 22 | (xy 1.45 -0.85) (xy 0.85 0) (xy 1.45 0.85) (xy -0.05 0.85) (xy -0.05 -0.85) 23 | ) (width 0)) 24 | )) 25 | (pad 2 thru_hole custom (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 26 | (zone_connect 0) 27 | (options (clearance outline) (anchor circle)) 28 | (primitives 29 | (gr_poly (pts 30 | (xy -0.7 0.85) (xy -1.3 0) (xy -0.7 -0.85) (xy 1.45 -0.85) (xy 0.85 0) 31 | (xy 1.45 0.85)) (width 0)) 32 | )) 33 | (pad 3 thru_hole custom (at 2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 34 | (zone_connect 0) 35 | (options (clearance outline) (anchor circle)) 36 | (primitives 37 | (gr_poly (pts 38 | (xy -0.7 0.85) (xy -1.3 0) (xy -0.7 -0.85) (xy 0 -0.85) (xy 0 0.85) 39 | ) (width 0)) 40 | )) 41 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x03_P2.54mm_Vertical.wrl 42 | (offset (xyz 2.54 0 0)) 43 | (scale (xyz 1 1 1)) 44 | (rotate (xyz 0 0 90)) 45 | ) 46 | ) 47 | -------------------------------------------------------------------------------- /hardware/lib/footprints.pretty/SolderDipJumper4alt.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SolderDipJumper4alt (layer F.Cu) (tedit 5DDEE2CB) 2 | (fp_text reference REF** (at 0 3.175) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value SolderDipJumper4alt (at 0 5.08) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_line (start 5.61 -1.8) (end -5.61 -1.8) (layer B.CrtYd) (width 0.05)) 9 | (fp_line (start -5.61 -1.8) (end -5.61 1.75) (layer B.CrtYd) (width 0.05)) 10 | (fp_line (start -5.08 -1.27) (end -5.08 0.635) (layer B.Fab) (width 0.1)) 11 | (fp_line (start 5.08 -1.27) (end -5.08 -1.27) (layer B.Fab) (width 0.1)) 12 | (fp_line (start 5.61 1.75) (end 5.61 -1.8) (layer B.CrtYd) (width 0.05)) 13 | (fp_line (start -5.61 1.75) (end 5.61 1.75) (layer B.CrtYd) (width 0.05)) 14 | (fp_line (start -4.445 1.27) (end 5.08 1.27) (layer B.Fab) (width 0.1)) 15 | (fp_line (start 5.08 1.27) (end 5.08 -1.27) (layer B.Fab) (width 0.1)) 16 | (fp_line (start -5.08 0.635) (end -4.445 1.27) (layer B.Fab) (width 0.1)) 17 | (pad 1 thru_hole custom (at -3.81 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 18 | (zone_connect 0) 19 | (options (clearance outline) (anchor rect)) 20 | (primitives 21 | (gr_poly (pts 22 | (xy 1.45 -0.85) (xy 0.85 0) (xy 1.45 0.85) (xy -0.05 0.85) (xy -0.05 -0.85) 23 | ) (width 0)) 24 | )) 25 | (pad 2 thru_hole custom (at -1.27 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 26 | (zone_connect 0) 27 | (options (clearance outline) (anchor circle)) 28 | (primitives 29 | (gr_poly (pts 30 | (xy -0.7 0.85) (xy -1.3 0) (xy -0.7 -0.85) (xy 1.45 -0.85) (xy 0.85 0) 31 | (xy 1.45 0.85)) (width 0)) 32 | )) 33 | (pad 4 thru_hole custom (at 3.81 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 34 | (zone_connect 0) 35 | (options (clearance outline) (anchor circle)) 36 | (primitives 37 | (gr_poly (pts 38 | (xy -0.7 0.85) (xy -1.3 0) (xy -0.7 -0.85) (xy 0 -0.85) (xy 0 0.85) 39 | ) (width 0)) 40 | )) 41 | (pad 3 thru_hole custom (at 1.27 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) 42 | (zone_connect 0) 43 | (options (clearance outline) (anchor circle)) 44 | (primitives 45 | (gr_poly (pts 46 | (xy -0.7 0.85) (xy -1.3 0) (xy -0.7 -0.85) (xy 1.45 -0.85) (xy 0.85 0) 47 | (xy 1.45 0.85)) (width 0)) 48 | )) 49 | (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x04_P2.54mm_Vertical.wrl 50 | (offset (xyz 3.81 0 0)) 51 | (scale (xyz 1 1 1)) 52 | (rotate (xyz 0 0 90)) 53 | ) 54 | ) 55 | -------------------------------------------------------------------------------- /hardware/lib/footprints.pretty/TO-92_Inline_alt.kicad_mod: -------------------------------------------------------------------------------- 1 | (module TO-92_Inline_alt (layer F.Cu) (tedit 5D50925B) 2 | (descr "TO-92 leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf)") 3 | (tags "to-92 sc-43 sc-43a sot54 PA33 transistor") 4 | (fp_text reference Q3 (at -4.826 -0.381 270) (layer F.SilkS) 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | ) 7 | (fp_text value BC547 (at 1.27 2.79 180) (layer F.Fab) 8 | (effects (font (size 1 1) (thickness 0.15))) 9 | ) 10 | (fp_arc (start 1.268237 -0.077963) (end 3.757437 -0.789163) (angle 60.9453959) (layer F.SilkS) (width 0.12)) 11 | (fp_arc (start 1.27 0) (end 1.27 -2.48) (angle -135) (layer F.Fab) (width 0.1)) 12 | (fp_arc (start 1.27 -0.077963) (end -1.2192 -0.789163) (angle -60.9453959) (layer F.SilkS) (width 0.12)) 13 | (fp_arc (start 1.27 0) (end 1.27 -2.48) (angle 135) (layer F.Fab) (width 0.1)) 14 | (fp_line (start 4 2.01) (end -1.46 2.01) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start 4 2.01) (end 4 -2.73) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start -1.46 -2.73) (end -1.46 2.01) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -1.46 -2.73) (end 4 -2.73) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -0.5 1.75) (end 3 1.75) (layer F.Fab) (width 0.1)) 19 | (fp_line (start -0.53 1.778) (end 3.07 1.778) (layer F.SilkS) (width 0.12)) 20 | (fp_text user %R (at 1.27 -3.56 180) (layer F.Fab) 21 | (effects (font (size 1 1) (thickness 0.15))) 22 | ) 23 | (pad 1 thru_hole rect (at 0 0) (size 1.05 1.5) (drill 0.75) (layers *.Cu *.Mask)) 24 | (pad 3 thru_hole oval (at 2.54 0) (size 1.05 1.5) (drill 0.75) (layers *.Cu *.Mask)) 25 | (pad 2 thru_hole oval (at 1.27 0) (size 1.05 1.5) (drill 0.75) (layers *.Cu *.Mask)) 26 | (model ${KISYS3DMOD}/Package_TO_SOT_THT.3dshapes/TO-92_Inline.wrl 27 | (at (xyz 0 0 0)) 28 | (scale (xyz 1 1 1)) 29 | (rotate (xyz 0 0 0)) 30 | ) 31 | ) 32 | -------------------------------------------------------------------------------- /hardware/lib/footprints.pretty/perfboard 3x9.kicad_mod: -------------------------------------------------------------------------------- 1 | (module "perfboard 3x9" (layer F.Cu) (tedit 5DD734A8) 2 | (fp_text reference REF** (at 0 0.5) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value "perfboard 3x9" (at 0 -0.5) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (fp_text user %R (at -8.509 0.889 -90) (layer F.Fab) 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | ) 11 | (pad 9 thru_hole oval (at -7.239 0.889) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 12 | (pad 7 thru_hole oval (at -7.239 -1.651) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 13 | (pad 11 thru_hole oval (at -7.239 3.429) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 14 | (pad 6 thru_hole oval (at -9.779 -4.191) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 15 | (pad 10 thru_hole oval (at -9.779 0.889) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 16 | (pad 8 thru_hole oval (at -9.779 -1.651) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 17 | (pad 18 thru_hole oval (at -9.779 11.049) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 18 | (pad 17 thru_hole oval (at -7.239 11.049) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 19 | (pad 16 thru_hole oval (at -9.779 8.509) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 20 | (pad 15 thru_hole oval (at -7.239 8.509) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 21 | (pad 14 thru_hole oval (at -9.779 5.969) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 22 | (pad 13 thru_hole oval (at -7.239 5.969) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 23 | (pad 12 thru_hole oval (at -9.779 3.429) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 24 | (pad 2 thru_hole oval (at -9.779 -9.271) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 25 | (pad 3 thru_hole oval (at -7.239 -6.731) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 26 | (pad 4 thru_hole oval (at -9.779 -6.731) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 27 | (pad 5 thru_hole oval (at -7.239 -4.191) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 28 | (pad 1 thru_hole oval (at -7.239 -9.271) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 29 | (pad 4 thru_hole oval (at -12.319 -6.731) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 30 | (pad 14 thru_hole oval (at -12.319 5.969) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 31 | (pad 12 thru_hole oval (at -12.319 3.429) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 32 | (pad 8 thru_hole oval (at -12.319 -1.651) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 33 | (pad 2 thru_hole oval (at -12.319 -9.271) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 34 | (pad 10 thru_hole oval (at -12.319 0.889) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 35 | (pad 18 thru_hole oval (at -12.319 11.049) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 36 | (pad 16 thru_hole oval (at -12.319 8.509) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 37 | (pad 6 thru_hole oval (at -12.319 -4.191) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) 38 | ) 39 | -------------------------------------------------------------------------------- /hardware/lib/footprints.pretty/spitfire_logo_small.kicad_mod: -------------------------------------------------------------------------------- 1 | (module spitfire_logo_small (layer F.Cu) (tedit 5D50DABD) 2 | (fp_text reference G*** (at 6.731 -2.159) (layer F.SilkS) hide 3 | (effects (font (size 1.524 1.524) (thickness 0.3))) 4 | ) 5 | (fp_text value LOGO (at 6.858 0.254) (layer F.SilkS) hide 6 | (effects (font (size 1.524 1.524) (thickness 0.3))) 7 | ) 8 | (fp_poly (pts (xy 1.524 1.524) (xy -1.524 1.524) (xy -1.524 -1.20904) (xy -0.9652 -1.20904) 9 | (xy -0.9652 -0.72136) (xy -0.675507 -0.72136) (xy -0.495253 -0.360681) (xy -0.314998 -0.000001) 10 | (xy -0.495253 0.360679) (xy -0.675507 0.72136) (xy -0.9652 0.72136) (xy -0.9652 1.20904) 11 | (xy -0.4318 1.208746) (xy -0.21844 0.787461) (xy -0.175037 0.701966) (xy -0.13438 0.622279) 12 | (xy -0.097394 0.550184) (xy -0.065004 0.487465) (xy -0.038134 0.435906) (xy -0.01771 0.39729) 13 | (xy -0.004657 0.373403) (xy 0.000045 0.365968) (xy 0.005528 0.374702) (xy 0.019224 0.399805) 14 | (xy 0.04021 0.439493) (xy 0.067561 0.491985) (xy 0.100354 0.555501) (xy 0.137663 0.628257) 15 | (xy 0.178566 0.708472) (xy 0.218485 0.787148) (xy 0.4318 1.208536) (xy 0.703763 1.208788) 16 | (xy 0.975727 1.20904) (xy 0.973003 0.96774) (xy 0.97028 0.72644) (xy 0.680402 0.7208) 17 | (xy 0.500287 0.3604) (xy 0.320173 -0.000001) (xy 0.500287 -0.360401) (xy 0.680402 -0.720801) 18 | (xy 0.825341 -0.723621) (xy 0.97028 -0.72644) (xy 0.973003 -0.96774) (xy 0.975727 -1.20904) 19 | (xy 0.703763 -1.208792) (xy 0.4318 -1.208543) (xy 0.21844 -0.787175) (xy 0.175044 -0.701685) 20 | (xy 0.134396 -0.622018) (xy 0.097418 -0.549956) (xy 0.065036 -0.48728) (xy 0.038174 -0.435772) 21 | (xy 0.017755 -0.397213) (xy 0.004703 -0.373386) (xy 0 -0.366006) (xy -0.005477 -0.374824) 22 | (xy -0.019171 -0.400005) (xy -0.040159 -0.439766) (xy -0.067516 -0.492321) (xy -0.100317 -0.555889) 23 | (xy -0.137639 -0.628684) (xy -0.178557 -0.708922) (xy -0.21844 -0.787503) (xy -0.4318 -1.2088) 24 | (xy -0.9652 -1.20904) (xy -1.524 -1.20904) (xy -1.524 -1.524) (xy 1.524 -1.524) 25 | (xy 1.524 1.524)) (layer F.SilkS) (width 0.01)) 26 | ) 27 | -------------------------------------------------------------------------------- /hardware/lib/schematic-symbols.bck: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | $CMP BU2505FV 4 | F http://rohmfs.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bu2506fv-e.pdf 5 | $ENDCMP 6 | # 7 | #End Doc Library 8 | -------------------------------------------------------------------------------- /hardware/lib/schematic-symbols.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | $CMP BU2505FV 4 | F http://rohmfs.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bu2506fv-e.pdf 5 | $ENDCMP 6 | # 7 | #End Doc Library 8 | -------------------------------------------------------------------------------- /hardware/lib/schematic-symbols.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # BU2505FV 5 | # 6 | DEF BU2505FV U 0 40 Y Y 1 F N 7 | F0 "U" 0 550 50 H V C CNN 8 | F1 "BU2505FV" 0 -550 50 H V C CNN 9 | F2 "Package_SO:SSOP-20_4.4x6.5mm_P0.65mm" -50 0 50 H I C CNN 10 | F3 "" -50 0 50 H I C CNN 11 | DRAW 12 | S -300 -500 300 500 0 1 0 f 13 | X VSS 1 -500 450 200 R 50 50 1 1 I 14 | X VDD 10 -500 -450 200 R 50 50 1 1 I 15 | X VCC 11 500 -450 200 L 50 50 1 1 W 16 | X AO9 12 500 -350 200 L 50 50 1 1 O 17 | X AO10 13 500 -250 200 L 50 50 1 1 O 18 | X DO 14 500 -150 200 L 50 50 1 1 O 19 | X LD 15 500 -50 200 L 50 50 1 1 I 20 | X CLK 16 500 50 200 L 50 50 1 1 I 21 | X DI 17 500 150 200 L 50 50 1 1 I 22 | X AO1 18 500 250 200 L 50 50 1 1 O 23 | X AO2 19 500 350 200 L 50 50 1 1 O 24 | X AO3 2 -500 350 200 R 50 50 1 1 O 25 | X GND 20 500 450 200 L 50 50 1 1 W 26 | X AO4 3 -500 250 200 R 50 50 1 1 O 27 | X AO5 4 -500 150 200 R 50 50 1 1 O 28 | X ~REVERSE 5 -500 50 200 R 50 50 1 1 I 29 | X ~RESET 6 -500 -50 200 R 50 50 1 1 I 30 | X AO6 7 -500 -150 200 R 50 50 1 1 O 31 | X AO7 8 -500 -250 200 R 50 50 1 1 O 32 | X AO8 9 -500 -350 200 R 50 50 1 1 O 33 | ENDDRAW 34 | ENDDEF 35 | # 36 | # BluePill 37 | # 38 | DEF BluePill A 0 40 N Y 1 F N 39 | F0 "A" -500 900 60 H V C CNN 40 | F1 "BluePill" 400 -950 60 H V C CNN 41 | F2 "" -100 750 60 H I C CNN 42 | F3 "" -100 750 60 H I C CNN 43 | DRAW 44 | S -550 850 550 -850 0 1 0 f 45 | X 3.3V 3V3 0 1050 200 D 50 50 1 1 w 46 | X 5V 5V 150 1050 200 D 50 50 1 1 w 47 | X GND G 150 -1050 200 U 50 50 1 1 w 48 | X RESET NRST -750 -800 200 R 50 50 1 1 I 49 | X PA0 PA0 -750 500 200 R 50 50 1 1 B 50 | X PA1 PA1 -750 400 200 R 50 50 1 1 B 51 | X PA10 PA10 750 -200 200 L 50 50 1 1 B 52 | X PA11 PA11 750 -100 200 L 50 50 1 1 B 53 | X PA12 PA12 750 0 200 L 50 50 1 1 B 54 | X PA15 PA15 750 100 200 L 50 50 1 1 B 55 | X PA2 PA2 -750 300 200 R 50 50 1 1 B 56 | X PA3 PA3 -750 200 200 R 50 50 1 1 B 57 | X PA4 PA4 -750 100 200 R 50 50 1 1 B 58 | X PA5 PA5 -750 0 200 R 50 50 1 1 B 59 | X PA6 PA6 -750 -100 200 R 50 50 1 1 B 60 | X PA7 PA7 -750 -200 200 R 50 50 1 1 B 61 | X PA8 PA8 750 -400 200 L 50 50 1 1 B 62 | X PA9 PA9 750 -300 200 L 50 50 1 1 B 63 | X PB0 PB0 -750 -300 200 R 50 50 1 1 B 64 | X PB1 PB1 -750 -400 200 R 50 50 1 1 B 65 | X PB10 PB10 -750 -500 200 R 50 50 1 1 B 66 | X PB11 PB11 -750 -600 200 R 50 50 1 1 B 67 | X PB12 PB12 750 -800 200 L 50 50 1 1 B 68 | X PB13 PB13 750 -700 200 L 50 50 1 1 B 69 | X PB14 PB14 750 -600 200 L 50 50 1 1 B 70 | X PB15 PB15 750 -500 200 L 50 50 1 1 B 71 | X PB3 PB3 750 200 200 L 50 50 1 1 B 72 | X PB4 PB4 750 300 200 L 50 50 1 1 B 73 | X PB5 PB5 750 400 200 L 50 50 1 1 B 74 | X PB6 PB6 750 500 200 L 50 50 1 1 B 75 | X PB7 PB7 750 600 200 L 50 50 1 1 B 76 | X PB8 PB8 750 700 200 L 50 50 1 1 B 77 | X PB9 PB9 750 800 200 L 50 50 1 1 B 78 | X PC13 PC13 -750 800 200 R 50 50 1 1 B 79 | X PC14 PC14 -750 700 200 R 50 50 1 1 B 80 | X PC15 PC15 -750 600 200 R 50 50 1 1 B 81 | X Vbat VBAT -150 1050 200 D 50 50 1 1 W 82 | ENDDRAW 83 | ENDDEF 84 | # 85 | #End Library 86 | -------------------------------------------------------------------------------- /hardware/lib/windfisch.pretty/SolderBridge.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SolderBridge (layer F.Cu) (tedit 57C770C8) 2 | (fp_text reference REF** (at 0 0.5) (layer F.SilkS) 3 | (effects (font (size 1 1) (thickness 0.15))) 4 | ) 5 | (fp_text value SolderBridge (at 0 -0.5) (layer F.Fab) 6 | (effects (font (size 1 1) (thickness 0.15))) 7 | ) 8 | (pad 1 smd rect (at -0.1 5.9) (size 1 0.5) (layers F.Cu F.Paste F.Mask)) 9 | (pad 2 smd trapezoid (at 0.187 4.7 315) (size 0.6 0.6) (rect_delta 0 0.599 ) (layers F.Cu F.Paste F.Mask)) 10 | (pad 2 smd trapezoid (at -0.387 4.7 45) (size 0.6 0.6) (rect_delta 0 0.599 ) (layers F.Cu F.Paste F.Mask)) 11 | (pad 1 smd trapezoid (at -0.1 5.4) (size 0.5 0.5) (rect_delta 0 0.499 ) (layers F.Cu F.Paste F.Mask)) 12 | (pad 2 smd rect (at -0.1 4.6) (size 1 0.5) (layers F.Cu F.Paste F.Mask)) 13 | ) 14 | -------------------------------------------------------------------------------- /hardware/libtest/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name mine)(type KiCad)(uri /home/flo/analog-synth/hardware/lib/footprints.pretty)(options "")(descr "")) 3 | ) 4 | -------------------------------------------------------------------------------- /hardware/libtest/libtest-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_R 5 | # 6 | DEF Device_R R 0 0 N Y 1 F N 7 | F0 "R" 80 0 50 V V C CNN 8 | F1 "Device_R" 0 0 50 V V C CNN 9 | F2 "" -70 0 50 V I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | R_* 13 | $ENDFPLIST 14 | DRAW 15 | S -40 -100 40 100 0 1 10 N 16 | X ~ 1 0 150 50 D 50 50 1 1 P 17 | X ~ 2 0 -150 50 U 50 50 1 1 P 18 | ENDDRAW 19 | ENDDEF 20 | # 21 | # Jumper_Jumper_2_Bridged 22 | # 23 | DEF Jumper_Jumper_2_Bridged JP 0 0 Y N 1 F N 24 | F0 "JP" 0 75 50 H V C CNN 25 | F1 "Jumper_Jumper_2_Bridged" 0 -100 50 H V C CNN 26 | F2 "" 0 0 50 H I C CNN 27 | F3 "" 0 0 50 H I C CNN 28 | $FPLIST 29 | SolderJumper*Bridged* 30 | $ENDFPLIST 31 | DRAW 32 | A 0 -70 100 1269 531 0 1 0 N -60 10 60 10 33 | C -80 0 20 0 0 0 N 34 | C 80 0 20 0 0 0 N 35 | X A 1 -200 0 100 R 50 50 1 1 P 36 | X B 2 200 0 100 L 50 50 1 1 P 37 | ENDDRAW 38 | ENDDEF 39 | # 40 | #End Library 41 | -------------------------------------------------------------------------------- /hardware/libtest/libtest.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /hardware/libtest/libtest.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 29 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 1 1 7 | Title "" 8 | Date "" 9 | Rev "" 10 | Comp "" 11 | Comment1 "" 12 | Comment2 "" 13 | Comment3 "" 14 | Comment4 "" 15 | $EndDescr 16 | $Comp 17 | L Jumper:Jumper_2_Bridged JP1 18 | U 1 1 5E4162F1 19 | P 2975 3025 20 | F 0 "JP1" H 2975 3220 50 0000 C CNN 21 | F 1 "Jumper_2_Bridged" H 2975 3129 50 0000 C CNN 22 | F 2 "mine:SolderDipJumper" H 2975 3025 50 0001 C CNN 23 | F 3 "~" H 2975 3025 50 0001 C CNN 24 | 1 2975 3025 25 | 1 0 0 -1 26 | $EndComp 27 | $Comp 28 | L Device:R R1 29 | U 1 1 5E4165E9 30 | P 3000 3325 31 | F 0 "R1" V 2793 3325 50 0000 C CNN 32 | F 1 "R" V 2884 3325 50 0000 C CNN 33 | F 2 "Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder" V 2930 3325 50 0001 C CNN 34 | F 3 "~" H 3000 3325 50 0001 C CNN 35 | 1 3000 3325 36 | 0 1 1 0 37 | $EndComp 38 | Wire Wire Line 39 | 3175 3025 3175 3325 40 | Wire Wire Line 41 | 3175 3325 3150 3325 42 | Wire Wire Line 43 | 2850 3325 2775 3325 44 | Wire Wire Line 45 | 2775 3325 2775 3025 46 | $EndSCHEMATC 47 | -------------------------------------------------------------------------------- /hardware/vca/vca.kicad_pcb: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 4) (host kicad "dummy file") ) 2 | -------------------------------------------------------------------------------- /hardware/vca/vca.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /hardware/vco_mk1/vco_mk1_spitfire/README.md: -------------------------------------------------------------------------------- 1 | Alternative PCB layout by [SpitfireX](https://github.com/spitfirex). 2 | 3 | This design is a 2 layer PCB with all components on the front. As a result, it features a continuous ground plane on the back. -------------------------------------------------------------------------------- /hardware/vco_mk1/vco_mk1_spitfire/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name footprints)(type KiCad)(uri ${KIPRJMOD}/../../lib/footprints.pretty)(options "")(descr "")) 3 | (lib (name windfisch)(type KiCad)(uri ${KIPRJMOD}/../../lib/windfisch.pretty)(options "")(descr "")) 4 | ) 5 | -------------------------------------------------------------------------------- /hardware/vco_mk1/vco_mk1_spitfire/gerber-rev01/vco_mk1-Edge_Cuts.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.2)-2* 2 | G04 #@! TF.CreationDate,2019-08-12T05:37:21+02:00* 3 | G04 #@! TF.ProjectId,vco_mk1,76636f5f-6d6b-4312-9e6b-696361645f70,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Profile,NP* 6 | %FSLAX46Y46*% 7 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 8 | G04 Created by KiCad (PCBNEW (5.1.2)-2) date 2019-08-12 05:37:21* 9 | %MOMM*% 10 | %LPD*% 11 | G04 APERTURE LIST* 12 | %ADD10C,0.050000*% 13 | G04 APERTURE END LIST* 14 | D10* 15 | X210000000Y-60000000D02* 16 | X160000000Y-60000000D01* 17 | X210000000Y-140000000D02* 18 | X210000000Y-60000000D01* 19 | X160000000Y-140000000D02* 20 | X210000000Y-140000000D01* 21 | X160000000Y-60000000D02* 22 | X160000000Y-140000000D01* 23 | M02* 24 | -------------------------------------------------------------------------------- /hardware/vco_mk1/vco_mk1_spitfire/gerber-rev01/vco_mk1.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ; DRILL file {KiCad (5.1.2)-2} date 12/08/2019 05:43:13 3 | ; FORMAT={-:-/ absolute / inch / decimal} 4 | ; #@! TF.CreationDate,2019-08-12T05:43:13+02:00 5 | ; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.2)-2 6 | FMAT,2 7 | INCH 8 | T1C0.0236 9 | T2C0.0276 10 | T3C0.0295 11 | T4C0.0315 12 | T5C0.0394 13 | % 14 | G90 15 | G05 16 | T1 17 | X6.385Y-4.54 18 | X6.475Y-2.69 19 | X6.51Y-2.84 20 | X6.565Y-2.925 21 | X6.72Y-3.17 22 | X6.83Y-4.22 23 | X6.93Y-3.24 24 | X7.01Y-4.595 25 | X7.01Y-4.745 26 | X7.115Y-3.28 27 | X7.13Y-3.395 28 | X7.13Y-4.89 29 | X7.21Y-2.76 30 | X7.2252Y-2.8352 31 | X7.23Y-4.19 32 | X7.31Y-3.065 33 | X7.365Y-2.91 34 | X7.375Y-3.805 35 | X7.405Y-4.5 36 | X7.415Y-4.99 37 | X7.4499Y-5.31 38 | X7.48Y-3.9 39 | X7.5046Y-5.2772 40 | X7.505Y-3.295 41 | X7.6214Y-4.9478 42 | X7.635Y-2.575 43 | X7.635Y-4.425 44 | X7.6675Y-4.3675 45 | X7.685Y-4.21 46 | X7.715Y-3.755 47 | X7.77Y-4.02 48 | X7.9Y-3.045 49 | X7.91Y-4.11 50 | X7.92Y-5.12 51 | X8.03Y-4.155 52 | X8.07Y-4.01 53 | T2 54 | X6.495Y-3.47 55 | X6.495Y-3.57 56 | T3 57 | X6.5667Y-2.8523 58 | X6.6167Y-2.8523 59 | X6.6667Y-2.8523 60 | X7.71Y-4.64 61 | X7.71Y-4.69 62 | X7.71Y-4.74 63 | X6.625Y-4.735 64 | X6.675Y-4.735 65 | X6.725Y-4.735 66 | X7.885Y-3.91 67 | X7.885Y-3.96 68 | X7.885Y-4.01 69 | X6.5667Y-2.9973 70 | X6.6167Y-2.9973 71 | X6.6667Y-2.9973 72 | T4 73 | X6.4617Y-2.7748 74 | X6.4617Y-3.0748 75 | X6.5617Y-2.7748 76 | X6.5617Y-3.0748 77 | X6.6617Y-2.7748 78 | X6.6617Y-3.0748 79 | X7.3056Y-3.5574 80 | X7.3056Y-3.6574 81 | X7.3056Y-3.7574 82 | X7.3056Y-3.8574 83 | X7.3056Y-3.9574 84 | X7.3056Y-4.0574 85 | X7.3056Y-4.1574 86 | X7.6056Y-3.5574 87 | X7.6056Y-3.6574 88 | X7.6056Y-3.7574 89 | X7.6056Y-3.8574 90 | X7.6056Y-3.9574 91 | X7.6056Y-4.0574 92 | X7.6056Y-4.1574 93 | X6.81Y-2.525 94 | X6.91Y-2.525 95 | X7.01Y-2.525 96 | X6.575Y-4.5 97 | X6.675Y-4.5 98 | X6.775Y-4.5 99 | X6.862Y-2.6886 100 | X6.862Y-2.9886 101 | X6.962Y-2.6886 102 | X6.962Y-2.9886 103 | X7.062Y-2.6886 104 | X7.062Y-2.9886 105 | X7.162Y-2.6886 106 | X7.162Y-2.9886 107 | X7.262Y-2.6886 108 | X7.262Y-2.9886 109 | X7.362Y-2.6886 110 | X7.362Y-2.9886 111 | X7.462Y-2.6886 112 | X7.462Y-2.9886 113 | X6.65Y-3.63 114 | X6.75Y-3.63 115 | X6.85Y-3.63 116 | X6.6Y-3.85 117 | X6.9Y-3.85 118 | X7.255Y-4.4701 119 | X7.255Y-4.5701 120 | X7.255Y-4.6701 121 | X7.255Y-4.7701 122 | X7.255Y-4.8701 123 | X7.255Y-4.9701 124 | X7.255Y-5.0701 125 | X7.555Y-4.4701 126 | X7.555Y-4.5701 127 | X7.555Y-4.6701 128 | X7.555Y-4.7701 129 | X7.555Y-4.8701 130 | X7.555Y-4.9701 131 | X7.555Y-5.0701 132 | T5 133 | X7.305Y-5.41 134 | X7.405Y-5.41 135 | X6.755Y-4.03 136 | X6.855Y-4.03 137 | X6.955Y-4.03 138 | X7.05Y-5.41 139 | X7.65Y-2.85 140 | X7.7484Y-3.0469 141 | X7.8469Y-2.85 142 | X6.8531Y-5.165 143 | X6.9516Y-4.9681 144 | X7.05Y-5.165 145 | X6.42Y-4.6651 146 | X6.42Y-4.7651 147 | X6.42Y-4.8651 148 | X6.705Y-3.325 149 | X6.805Y-3.325 150 | X6.45Y-4.03 151 | X6.45Y-4.13 152 | X6.45Y-4.23 153 | X6.55Y-4.03 154 | X6.55Y-4.13 155 | X6.55Y-4.23 156 | X8.03Y-4.785 157 | X8.03Y-4.885 158 | X8.03Y-4.985 159 | X8.03Y-5.085 160 | X8.03Y-5.185 161 | X8.03Y-5.285 162 | X8.03Y-5.385 163 | X8.13Y-4.785 164 | X8.13Y-4.885 165 | X8.13Y-4.985 166 | X8.13Y-5.085 167 | X8.13Y-5.185 168 | X8.13Y-5.285 169 | X8.13Y-5.385 170 | X6.4231Y-5.1651 171 | X6.5216Y-4.9682 172 | X6.62Y-5.1651 173 | X8.16Y-3.91 174 | X8.16Y-4.01 175 | X8.16Y-4.11 176 | X8.16Y-4.21 177 | X6.5Y-3.325 178 | X6.6Y-3.325 179 | X7.29Y-3.325 180 | X7.39Y-3.325 181 | X8.03Y-2.495 182 | X8.03Y-2.595 183 | X8.03Y-2.695 184 | X8.03Y-2.795 185 | X8.03Y-2.895 186 | X8.03Y-2.995 187 | X8.03Y-3.095 188 | X8.13Y-2.495 189 | X8.13Y-2.595 190 | X8.13Y-2.695 191 | X8.13Y-2.795 192 | X8.13Y-2.895 193 | X8.13Y-2.995 194 | X8.13Y-3.095 195 | X7.6931Y-3.365 196 | X7.7916Y-3.1681 197 | X7.89Y-3.365 198 | T0 199 | M30 200 | -------------------------------------------------------------------------------- /hardware/vco_mk1/vco_mk1_spitfire/schem1/vco_mk1.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Windfisch/analog-synth/c305a21f717dfa2cc809e3488e7512d5c711304a/hardware/vco_mk1/vco_mk1_spitfire/schem1/vco_mk1.pdf -------------------------------------------------------------------------------- /hardware/vco_mk1/vco_mk1_windfisch/bom.ods: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Windfisch/analog-synth/c305a21f717dfa2cc809e3488e7512d5c711304a/hardware/vco_mk1/vco_mk1_windfisch/bom.ods -------------------------------------------------------------------------------- /hardware/vco_mk1/vco_mk1_windfisch/fab-rev01/vco_mk1-Edge_Cuts.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.2* 2 | G04 #@! TF.CreationDate,2019-08-12T01:59:45+02:00* 3 | G04 #@! TF.ProjectId,vco_mk1,76636f5f-6d6b-4312-9e6b-696361645f70,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Profile,NP* 6 | %FSLAX46Y46*% 7 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 8 | G04 Created by KiCad (PCBNEW 5.1.2) date 2019-08-12 01:59:45* 9 | %MOMM*% 10 | %LPD*% 11 | G04 APERTURE LIST* 12 | %ADD10C,0.050000*% 13 | G04 APERTURE END LIST* 14 | D10* 15 | X138176000Y-165608000D02* 16 | X138176000Y-120904000D01* 17 | X209804000Y-165608000D02* 18 | X138176000Y-165608000D01* 19 | X209804000Y-120904000D02* 20 | X209804000Y-165608000D01* 21 | X138176000Y-120904000D02* 22 | X209804000Y-120904000D01* 23 | M02* 24 | -------------------------------------------------------------------------------- /hardware/vco_mk1/vco_mk1_windfisch/fab-rev01/vco_mk1-NPTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ; DRILL file {KiCad 5.1.2} date Mon 12 Aug 2019 01:59:48 AM CEST 3 | ; FORMAT={-:-/ absolute / metric / decimal} 4 | ; #@! TF.CreationDate,2019-08-12T01:59:48+02:00 5 | ; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.2 6 | ; #@! TF.FileFunction,NonPlated,1,2,NPTH 7 | FMAT,2 8 | METRIC 9 | % 10 | G90 11 | G05 12 | T0 13 | M30 14 | -------------------------------------------------------------------------------- /hardware/vco_mk1/vco_mk1_windfisch/fab-rev01/vco_mk1-PTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ; DRILL file {KiCad 5.1.2} date Mon 12 Aug 2019 01:59:48 AM CEST 3 | ; FORMAT={-:-/ absolute / metric / decimal} 4 | ; #@! TF.CreationDate,2019-08-12T01:59:48+02:00 5 | ; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.2 6 | ; #@! TF.FileFunction,Plated,1,2,PTH 7 | FMAT,2 8 | METRIC 9 | T1C0.600 10 | T2C0.700 11 | T3C0.750 12 | T4C0.800 13 | T5C1.000 14 | % 15 | G90 16 | G05 17 | T1 18 | X149.987Y-138.049 19 | X158.496Y-132.207 20 | X158.877Y-159.512 21 | X159.004Y-138.303 22 | X163.391Y-138.303 23 | X164.465Y-129.54 24 | X167.259Y-134.493 25 | X169.037Y-148.209 26 | X172.466Y-149.225 27 | X175.574Y-149.038 28 | X175.602Y-137.326 29 | X176.276Y-159.004 30 | X178.435Y-134.747 31 | X181.61Y-152.654 32 | X181.864Y-135.128 33 | X182.753Y-160.274 34 | X187.579Y-147.574 35 | X190.373Y-147.574 36 | X191.262Y-143.002 37 | X196.85Y-138.176 38 | X207.137Y-144.145 39 | T2 40 | X154.813Y-140.97 41 | X154.813Y-143.51 42 | T3 43 | X198.374Y-139.446 44 | X199.644Y-139.446 45 | X200.914Y-139.446 46 | X196.405Y-149.923 47 | X196.405Y-151.194 48 | X196.405Y-152.463 49 | X182.499Y-138.176 50 | X183.769Y-138.176 51 | X185.039Y-138.176 52 | X159.512Y-140.335 53 | X159.512Y-141.605 54 | X159.512Y-142.875 55 | X163.068Y-140.335 56 | X163.068Y-141.605 57 | X163.068Y-142.875 58 | T4 59 | X177.292Y-139.827 60 | X177.292Y-142.367 61 | X177.292Y-144.907 62 | X165.151Y-157.226 63 | X167.691Y-157.226 64 | X170.231Y-157.226 65 | X150.495Y-146.24 66 | X150.495Y-153.861 67 | X146.456Y-147.726 68 | X146.456Y-150.266 69 | X146.456Y-152.806 70 | X188.214Y-128.524 71 | X188.214Y-136.144 72 | X190.754Y-128.524 73 | X190.754Y-136.144 74 | X193.294Y-128.524 75 | X193.294Y-136.144 76 | X195.834Y-128.524 77 | X195.834Y-136.144 78 | X198.374Y-128.524 79 | X198.374Y-136.144 80 | X200.914Y-128.524 81 | X200.914Y-136.144 82 | X203.454Y-128.524 83 | X203.454Y-136.144 84 | X157.48Y-145.669 85 | X157.48Y-153.289 86 | X160.02Y-145.669 87 | X160.02Y-153.289 88 | X162.56Y-145.669 89 | X162.56Y-153.289 90 | X165.1Y-145.669 91 | X165.1Y-153.289 92 | X167.64Y-145.669 93 | X167.64Y-153.289 94 | X170.18Y-145.669 95 | X170.18Y-153.289 96 | X172.72Y-145.669 97 | X172.72Y-153.289 98 | X185.496Y-142.646 99 | X185.496Y-145.186 100 | X185.496Y-147.726 101 | X185.496Y-150.266 102 | X185.496Y-152.806 103 | X185.496Y-155.346 104 | X185.496Y-157.886 105 | X193.116Y-142.646 106 | X193.116Y-145.186 107 | X193.116Y-147.726 108 | X193.116Y-150.266 109 | X193.116Y-152.806 110 | X193.116Y-155.346 111 | X193.116Y-157.886 112 | X157.48Y-137.795 113 | X157.48Y-140.335 114 | X157.48Y-142.875 115 | X165.1Y-137.795 116 | X165.1Y-140.335 117 | X165.1Y-142.875 118 | T5 119 | X201.168Y-144.907 120 | X203.708Y-144.907 121 | X186.182Y-161.544 122 | X188.468Y-139.192 123 | X191.008Y-139.192 124 | X193.548Y-139.192 125 | X146.71Y-157.378 126 | X149.21Y-162.378 127 | X151.71Y-157.378 128 | X196.215Y-123.444 129 | X198.755Y-123.444 130 | X201.295Y-123.444 131 | X154.051Y-150.368 132 | X154.051Y-152.908 133 | X177.524Y-160.437 134 | X182.524Y-157.937 135 | X182.524Y-162.937 136 | X207.01Y-129.286 137 | X207.01Y-131.826 138 | X207.01Y-134.366 139 | X207.01Y-136.906 140 | X168.529Y-125.095 141 | X168.529Y-127.635 142 | X171.069Y-125.095 143 | X171.069Y-127.635 144 | X173.609Y-125.095 145 | X173.609Y-127.635 146 | X176.149Y-125.095 147 | X176.149Y-127.635 148 | X178.689Y-125.095 149 | X178.689Y-127.635 150 | X181.229Y-125.095 151 | X181.229Y-127.635 152 | X183.769Y-125.095 153 | X183.769Y-127.635 154 | X177.524Y-153.122 155 | X182.524Y-150.622 156 | X182.524Y-155.622 157 | X154.686Y-124.015 158 | X154.686Y-126.555 159 | X157.226Y-124.015 160 | X157.226Y-126.555 161 | X159.766Y-124.015 162 | X159.766Y-126.555 163 | X160.528Y-132.651 164 | X163.068Y-132.651 165 | X168.228Y-142.875 166 | X170.728Y-137.875 167 | X173.228Y-142.875 168 | X148.59Y-140.716 169 | X148.59Y-143.256 170 | X142.307Y-125.691 171 | X142.307Y-128.231 172 | X142.307Y-130.771 173 | X142.307Y-133.311 174 | X142.307Y-135.851 175 | X142.307Y-138.391 176 | X142.307Y-140.931 177 | X144.847Y-125.691 178 | X144.847Y-128.231 179 | X144.847Y-130.771 180 | X144.847Y-133.311 181 | X144.847Y-135.851 182 | X144.847Y-138.391 183 | X144.847Y-140.931 184 | T0 185 | M30 186 | -------------------------------------------------------------------------------- /hardware/vco_mk1/vco_mk1_windfisch/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name footprints)(type KiCad)(uri ${KIPRJMOD}/../../lib/footprints.pretty)(options "")(descr "")) 3 | (lib (name windfisch)(type KiCad)(uri ${KIPRJMOD}/../../lib/windfisch.pretty)(options "")(descr "")) 4 | ) 5 | -------------------------------------------------------------------------------- /hardware/vco_mk1/vco_mk1_windfisch/schem1/vco_mk1.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Windfisch/analog-synth/c305a21f717dfa2cc809e3488e7512d5c711304a/hardware/vco_mk1/vco_mk1_windfisch/schem1/vco_mk1.pdf -------------------------------------------------------------------------------- /hardware/voice_and_control_board_fab.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Windfisch/analog-synth/c305a21f717dfa2cc809e3488e7512d5c711304a/hardware/voice_and_control_board_fab.pdf -------------------------------------------------------------------------------- /hardware/voice_board/README.md: -------------------------------------------------------------------------------- 1 | Voice Board mk I 2 | ================ 3 | 4 | This board offers various utility features for a two-VCO-voice. It is designed 5 | to be used together with two [../vco_mk1/](VCO mk I boards) and offers the 6 | following features: 7 | 8 | - voltage controlled filter 9 | - voltage controlled amplifier 10 | - simple mixer 11 | - 2x square_ctl signal processing (buffering, sync pulse generation, clamping, 12 | which are missing from the VCO mk I board) 13 | - an expo converter (to be used as VCF input) 14 | - a 2-channel MCP4822 DAC for VCO control voltage generation 15 | - three general-purpose RC low pass filters 16 | 17 | ![render of the board](../img/voiceboard.jpg) 18 | 19 | The gerber outputs used for fabrication with [JLCPCB](https://jlcpcb.com) are 20 | located under `fab/`. 21 | 22 | The fabrication layers indicating which component values to put where 23 | are [here](../voice_and_control_board_fab.pdf). 24 | 25 | Revisions 26 | --------- 27 | 28 | **rev01** has no marking at the wind fish logo. It has been fabricated 29 | using the gerber outputs in `fab-rev01/`. Please refer to the errata 30 | below. 31 | 32 | **rev02** can be identified by a *"rev02"* text close to the wind fish 33 | logo. It has never been fabricated as it only contains silkscreen and 34 | component value fixes. 35 | 36 | Errata (rev01) 37 | -------------- 38 | 39 | Some resistors in the sync pulse circuitry are wrong. R48 and R49 must 40 | be changed from 10k to 1k. R50 and R51 must be changed from 1k to 10k. 41 | This has been fixed in rev02. 42 | 43 | R53 and R54's values are too weak, leading to very bad DAC performance 44 | (e.g., non-monotonic DAC behaviour every 4 code points). Maybe a 100k 45 | poti would work better; I fixed it by de-soldering the potis and wiring 46 | U2's DAC output pins 6 and 8 to the connector J4 directly. 47 | 48 | Errata (rev01) 49 | -------------- 50 | 51 | R53 and R54's values are too weak, leading to very bad DAC performance 52 | (e.g., non-monotonic DAC behaviour every 4 code points). Maybe a 100k 53 | poti would work better; I fixed it by de-soldering the potis and wiring 54 | U2's DAC output pins 6 and 8 to the connector J4 directly. 55 | 56 | -------------------------------------------------------------------------------- /hardware/voice_board/bom.ods: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Windfisch/analog-synth/c305a21f717dfa2cc809e3488e7512d5c711304a/hardware/voice_board/bom.ods -------------------------------------------------------------------------------- /hardware/voice_board/fab/voice_board-B_Paste.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4* 2 | G04 #@! TF.CreationDate,2019-11-25T00:39:27+01:00* 3 | G04 #@! TF.ProjectId,voice_board,766f6963-655f-4626-9f61-72642e6b6963,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Paste,Bot* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW 5.1.4) date 2019-11-25 00:39:27* 10 | %MOMM*% 11 | %LPD*% 12 | G04 APERTURE LIST* 13 | G04 APERTURE END LIST* 14 | M02* 15 | -------------------------------------------------------------------------------- /hardware/voice_board/fab/voice_board-Edge_Cuts.gbr: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4* 2 | G04 #@! TF.CreationDate,2019-11-25T00:39:27+01:00* 3 | G04 #@! TF.ProjectId,voice_board,766f6963-655f-4626-9f61-72642e6b6963,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Profile,NP* 6 | %FSLAX46Y46*% 7 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 8 | G04 Created by KiCad (PCBNEW 5.1.4) date 2019-11-25 00:39:27* 9 | %MOMM*% 10 | %LPD*% 11 | G04 APERTURE LIST* 12 | %ADD10C,0.050000*% 13 | G04 APERTURE END LIST* 14 | D10* 15 | X247142000Y-100330000D02* 16 | X247142000Y-27940000D01* 17 | X235712000Y-100330000D02* 18 | X247142000Y-100330000D01* 19 | X163322000Y-100330000D02* 20 | X235712000Y-100330000D01* 21 | X163322000Y-99060000D02* 22 | X163322000Y-100330000D01* 23 | X163322000Y-27940000D02* 24 | X163322000Y-99060000D01* 25 | X247142000Y-27940000D02* 26 | X163322000Y-27940000D01* 27 | M02* 28 | -------------------------------------------------------------------------------- /hardware/voice_board/fab/voice_board-NPTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ; DRILL file {KiCad 5.1.4} date Mon 25 Nov 2019 12:39:29 AM CET 3 | ; FORMAT={-:-/ absolute / metric / decimal} 4 | ; #@! TF.CreationDate,2019-11-25T00:39:29+01:00 5 | ; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.4 6 | ; #@! TF.FileFunction,NonPlated,1,2,NPTH 7 | FMAT,2 8 | METRIC 9 | % 10 | G90 11 | G05 12 | T0 13 | M30 14 | -------------------------------------------------------------------------------- /hardware/voice_board/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name footprints)(type KiCad)(uri ${KIPRJMOD}/../lib/footprints.pretty)(options "")(descr "")) 3 | (lib (name windfisch)(type KiCad)(uri ${KIPRJMOD}/../lib/windfisch.pretty)(options "")(descr "")) 4 | ) 5 | -------------------------------------------------------------------------------- /hardware/voice_board/sym-lib-table: -------------------------------------------------------------------------------- 1 | (sym_lib_table 2 | (lib (name schematic-symbols)(type Legacy)(uri ${KIPRJMOD}/../lib/schematic-symbols.lib)(options "")(descr "")) 3 | ) 4 | -------------------------------------------------------------------------------- /measure_vco/README.md: -------------------------------------------------------------------------------- 1 | # measuring the VCO's response 2 | 3 | This test tool will enumerate all 4096 DAC code points to generate voltages 4 | between 0V and 2.048V which are fed into the VCO. The microcontroller will 5 | test around 50 code points per second, listen to the signal for 5 periods, 6 | and write out a list of the following format to its USART on pin A2: 7 | 8 | ``` 9 | codept divider hiTicks1 loTicks1 hiTicks2 loTicks2 hiTicks3 loTicks3 hiTicks4 loTicks4 hiTicks5 loTicks5 10 | 718 3 28751 28328 28745 28333 28742 28326 28756 28322 28752 28326 11 | 1694 9 36019 36032 36061 35997 35998 36019 36046 36013 36028 36000 12 | 3742 1 24342 23752 24350 23754 24342 23756 24340 23756 24354 23762 13 | 414 45 39457 44456 39468 41359 39476 41358 39477 41360 39463 41366 14 | 2462 4 29918 29569 29912 29572 29900 29571 29889 29575 29896 29571 15 | ... 16 | ``` 17 | 18 | `divider` specifies the `TIM2` timer's division (in fact, it's the prescaler 19 | plus 1). `TIM2` is clocked at 78MHz and will increment every `divider` clocks. 20 | 21 | The hi/loTicksN can be converted into seconds by the following formula: 22 | `time[sec] = ticks * divider / 78'000'000`, the frequency can be calculated e.g. 23 | by `1 / (hiTicks5+loTicks5)` or -- even more precise -- `5 / (sum of all hi+loTicks)`. 24 | 25 | 26 | older versions, which tested only 4 code points per seconds, were using the 27 | following format. 28 | The time is given in 10'000ths of a second. Thus, the frequency is calculated 29 | as "(periods / (time/10000))": 30 | 31 | ``` 32 | DAC code periods time 33 | point 34 | 2048 98 2000 35 | 1024 68 1977 36 | ... 37 | ``` 38 | 39 | 40 | 41 | In both cases, the output voltage calculates as "code point * 0.5mV". 42 | 43 | At the very beginning, two test tones close to the lowest and two close to the 44 | highest control voltage output are played. Use the tune pot R10 to set an 45 | offset at or close to a position where both test pairs can be heard at distinct 46 | pitches to avoid clamping. 47 | 48 | ## experiments 49 | 50 | [Exponential frequency response accuracy](experiments/20190625_1v_per_oct_response/README.md) 51 | 52 | [Attribution of error artifacts to DAC or analog circuitry](experiments/20190705_error_attribution/README.md) 53 | -------------------------------------------------------------------------------- /measure_vco/experiments/20190625_1v_per_oct_response/2019-05-25_pair5_voltagereg_derpy.txt: -------------------------------------------------------------------------------- 1 | 489 45 1961 2 | 3537 93 1994 3 | 977 38 1980 4 | 3025 78 1994 5 | 2001 54 489 25 1963 6 | 2537 52 1988 7 | 1513 36 1969 8 | 3561 74 1982 9 | 1001 30 1965 10 | 3049 62 1983 11 | 2025 43 1965 12 | 4073 89 1999 13 | 25 21 1942 14 | 2073 44 1977 15 | 1049 31 1996 16 | 3097 63 1982 17 | 537 25 1930 18 | 2585 53 1992 19 | 1561 37 1990 20 | 3609 76 1984 21 | 281 24 1989 22 | 2329 49 1973 23 | 1305 34 1944 24 | 3353 72 1997 25 | 793 29 1938 26 | 2841 62 1973 27 | 1817 45 1991 28 | 3865 94 1997 29 | 153 26 1970 30 | 2201 55 1987 31 | 1177 39 1978 32 | 3225 81 1987 33 | 665 34 2000 34 | 2713 70 1975 35 | 1689 50 1973 36 | 3737 104 1995 37 | 409 31 1945 38 | 2457 62 1978 39 | 1433 42 1972 40 | 3481 83 1979 41 | 921 33 1994 42 | 2969 64 1971 43 | 1945 43 1980 44 | 3993 84 1979 45 | 89 20 1912 46 | 2137 41 1954 47 | 1113 28 1946 48 | 3161 58 1969 49 | 601 23 1918 50 | 2649 49 1987 51 | 1625 34 1974 52 | 3673 70 1990 53 | 345 22 1991 54 | 2393 47 1983 55 | 1369 33 1945 56 | 3417 70 1990 57 | 857 28 1936 58 | 2905 59 1990 59 | 1881 41 1976 60 | 3929 84 1989 61 | 217 23 1994 62 | 2265 47 1982 63 | 1241 33 1991 64 | 3289 67 1980 65 | 729 27 1953 66 | 2777 56 1976 67 | 1753 39 1967 68 | 3801 80 1979 69 | 473 25 1981 70 | 2521 51 1967 71 | 1497 36 1987 72 | 3545 73 1973 73 | 985 30 1981 74 | 3033 61 1969 75 | 2009 43 1983 76 | 4057 88 1994 77 | 57 21 1925 78 | -------------------------------------------------------------------------------- /measure_vco/experiments/20190625_1v_per_oct_response/README.md: -------------------------------------------------------------------------------- 1 | made with ef54a038da6c0d5c126d3517ab873899670ab93a. 2 | 3 | All following measurements were made using a 9V block battery to power the 4 | circuit. 5 | 6 | ``` 7 | out*.txt: various measurements with the hand-matched 547 pair. 8 | might or might have not touched the transistors during 9 | measurement 10 | 2019-05-25_bcm847.txt: measurements using the bcm847 matched transistor chip. 11 | shortly but with decent time after placing the 12 | transistors on the board 13 | 2019-05-25_pair*.txt: 1-3: same, but using hand-matched BC547b transistors 14 | instead: these runs were started shortly after placing 15 | them in the board. the runs were done subsequently with 16 | almost no delay. i sat next to the setup, so they might 17 | be affected by my body heat. 18 | 2019-05-25_pair.txt4: same, longer delay, and while aerating the room 19 | ``` 20 | 21 | 22 | The following measurements were made using a regulated power supply instead: 23 | 24 | ``` 25 | 2019-05-25_pair5_voltagereg.txt: same as before, but with regulated voltage 26 | ``` 27 | 28 | The following image shows the effect of the voltage regulation on the data: 29 | 30 | ![alt text](voltage_regulation_plot.png) 31 | 32 | For the bottom graph without voltage regulation, the spread is much higher. 33 | Furthermore, there is a quite linear-ish color gradient from purple (bottom) 34 | to yellow (top), indicating that earlier data points are at a lower frequency 35 | than late data points. 36 | 37 | For the top graph with a regulated supply voltage, the spread / noise is 38 | smaller, and the distribution seems more gaussian than uniform. Most 39 | importantly, the color==time gradient is the opposite direction. 40 | 41 | Possible explanation: The circuit's frequency depends on the supply voltage, 42 | because the supply voltage controls the schmitt trigger thresholds. A lower 43 | supply voltage leads to higher frequencies. The bottom graph could exhibit 44 | the effects of a diminishing supply voltage, e.g. because the battery is 45 | drained more and more. 46 | 47 | The gradient for the top graph is yet to be explained. Measurement shows that 48 | the control voltage applied to the expo converter's transistor's base is 49 | always negative in this setup, ranging between -30mV and 0mV. During data 50 | acquisition, the room temperature dropped a bit. (Let's say, from 303K to 51 | 300K). This changes the thermal voltage of the transistors by 1%, turning the 52 | calibrated 1V-per-oct behaviour into 0.99V-per-oct. This, together with 53 | the effective control voltage being negative, could explain a pitch drop 54 | caused by a temperature drop. (For positive base-voltages, the pitch would 55 | rise instead, and for exactly 0 V base-voltage, the pitch should not change). 56 | 57 | -------------------------------------------------------------------------------- /measure_vco/experiments/20190625_1v_per_oct_response/voltage_regulation_plot.gnuplot: -------------------------------------------------------------------------------- 1 | set xlabel "control voltage" 2 | set ylabel "deviation in cents" 3 | set cblabel "data point index" 4 | set xrange [0:2] 5 | set yrange [-30:30] 6 | 7 | plot\ 8 | "<(head -n 2000 2019-05-25_pair5_voltagereg.txt)" u ($1/2000):( (log($2/$3*10000)/log(2) - ($1/2000))*1200 + 420 -8510) : 0 with points palette pt 4 title "top: regulated voltage",\ 9 | "<(head -n 2000 2019-05-25_pair5.txt)" u ($1/2000):( (log($2/$3*10000)/log(2) - ($1/2000))*1200 -8510) : 0 with points palette pt 1 title "bottom: unregulated voltage" 10 | pause -1 11 | -------------------------------------------------------------------------------- /measure_vco/experiments/20190625_1v_per_oct_response/voltage_regulation_plot.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Windfisch/analog-synth/c305a21f717dfa2cc809e3488e7512d5c711304a/measure_vco/experiments/20190625_1v_per_oct_response/voltage_regulation_plot.png -------------------------------------------------------------------------------- /measure_vco/experiments/20190705_error_attribution/README.md: -------------------------------------------------------------------------------- 1 | Attributing errors to the DAC and to the remaining circuitry 2 | ============================================================ 3 | 4 | The frequency deviation plots show some systematic error in frequency: 5 | 6 | First, there is a wiggle every 64 code points or so. Second, the curve 7 | is bowl-shaped, i.e. the volt-per-octave behaviour is not constant over 8 | the whole DAC range. Instead, it approaches a maximum, and at the left and 9 | right of that maximum, the frequency drops flat. 10 | 11 | It shall evaluated which of these artifacts can be attributed to the DAC 12 | and which are to be attributed to the remaining circuitry behind the dac. 13 | 14 | Experimental setup 15 | ------------------ 16 | 17 | Schematic and firmware from `6a28ec80e1b361b0f84615ae8e1e478800edd393` 18 | are used. The tune pot R10 is initially adjusted so that the full range 19 | up to the VCO's highest frequency is covered by the DAC's range. The 20 | frequency curve was recorded into `run1.txt`. 21 | 22 | Then, the tune pot was tuned down (`run2.txt`), even more down (`run3.txt`), 23 | and way up (so that the high frequencies are clipped, `run4.txt`). 24 | 25 | The resulting deviation curves are then moved along the graph (it's valid to 26 | move a curve right by X if you move it down by the same amount X) so that 27 | they match each other as good as possible. The shift amounts are equal to the 28 | tuning caused by the tune pot, and are roughly consistent with the interval 29 | I could hear while tuning. 30 | 31 | Expectation 32 | ----------- 33 | 34 | Any error caused by the DAC should not align across the four curves after 35 | having them aligned as described above. Instead, it should align when 36 | the curves are not moved in X direction. _(Reason: This error would depend 37 | on which code point was sent to the DAC, and not on which voltage went 38 | through U8)_ 39 | 40 | Any error caused by the circuitry behind the DAC (i.e. expo converter and VCO) 41 | should align across the four curves. _(Reason: It does not depend on the code 42 | point, but solely on the voltage at U8)_ 43 | 44 | Results 45 | ------- 46 | 47 | ![plot](plot.png) 48 | 49 | The wiggle does not align. Instead, one can easily verify (not shown) 50 | that the wiggle would align perfectly, if the X axis would show the code point, 51 | not something proportional to the voltage through U8. 52 | 53 | **The wiggle is a DAC linearity error and must be compensated for in firmware.** 54 | The MCP4822 data sheet confirms this with figure 2-6 which describes "the 64 code 55 | effect". 56 | 57 | The overall frequency deviation perfectly aligns across the four curves. 58 | **While it can be compensated for in firmware, it should be adressed in the 59 | analog circuitry. Otherwise, no precise 1v/oct operation with external 60 | (uncompensated) control voltages is possible.** 61 | -------------------------------------------------------------------------------- /measure_vco/experiments/20190705_error_attribution/plot.gnuplot: -------------------------------------------------------------------------------- 1 | set terminal png enhanced size 1200,700 2 | set output 'plot.png' 3 | 4 | set pointsize 0.3 5 | set xrange [ -2174.04 : 9370.76 ] noreverse writeback 6 | set yrange [ -481 : 304 ] noreverse writeback 7 | set xlabel 'pitch(dac output + tune) in cents [distance from arbitrary reference point]' 8 | set ylabel 'deviation in cents' 9 | plot\ 10 | 1/0 with points ls 1 pt 7 ps 2 title 'arbitrary reference tuning',\ 11 | 1/0 with points ls 2 pt 7 ps 2 title 'tuned by approx. -480c',\ 12 | 1/0 with points ls 3 pt 7 ps 2 title 'tuned by approx. -1860c',\ 13 | 1/0 with points ls 4 pt 7 ps 2 title 'tuned by approx. +800c',\ 14 | "run1.txt" u ($1*2.2 ):(log(78000000/$2 / (($3+$4+$5+$6+$7+$8+$9+$10+$11+$12)/5))/log(2)*1200 - (2.2*$1 ) - 4900) w points ls 1 pt 7 notitle,\ 15 | "run2.txt" u ($1*2.2 -480):(log(78000000/$2 / (($3+$4+$5+$6+$7+$8+$9+$10+$11+$12)/5))/log(2)*1200 - (2.2*$1 -480) - 4900) w points ls 2 pt 7 notitle,\ 16 | "run3.txt" u ($1*2.2 -1860):(log(78000000/$2 / (($3+$4+$5+$6+$7+$8+$9+$10+$11+$12)/5))/log(2)*1200 - (2.2*$1 -1860) - 4900) w points ls 3 pt 7 notitle,\ 17 | "run4.txt" u ($1*2.2 +800):(log(78000000/$2 / (($3+$4+$5+$6+$7+$8+$9+$10+$11+$12)/5))/log(2)*1200 - (2.2*$1 +800) - 4900) w points ls 4 pt 7 notitle 18 | pause -1 19 | -------------------------------------------------------------------------------- /measure_vco/experiments/20190705_error_attribution/plot.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Windfisch/analog-synth/c305a21f717dfa2cc809e3488e7512d5c711304a/measure_vco/experiments/20190705_error_attribution/plot.png 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edit anything below here. 16 | VPATH += $(SHARED_DIR) 17 | INCLUDES += $(patsubst %,-I%, . $(SHARED_DIR)) 18 | OPENCM3_DIR=../../libopencm3 19 | 20 | include $(OPENCM3_DIR)/mk/genlink-config.mk 21 | include ../../rules.mk 22 | include $(OPENCM3_DIR)/mk/genlink-rules.mk 23 | -------------------------------------------------------------------------------- /measure_vco/firmware/hardware.h: -------------------------------------------------------------------------------- 1 | #ifdef STM32F103C8T 2 | 3 | // blue pill aka STM32F103C8T 4 | 5 | #define MCU_CLOCK 72000000 // 72 MHz 6 | 7 | #define USART_DEBUG USART1 8 | #define RCC_USART_DEBUG RCC_USART1 9 | 10 | #define TIM_MEAS TIM2 11 | #define RCC_TIM_MEAS RCC_TIM2 12 | #define RST_TIM_MEAS RST_TIM2 13 | 14 | #define EXTI_MEAS EXTI11 15 | #define EXTI_MEAS_PIN GPIO11 16 | #define EXTI_MEAS_GPIO GPIOA 17 | #define exti_meas_isr exti15_10_isr 18 | #define NVIC_EXTI_MEAS_IRQ NVIC_EXTI15_10_IRQ 19 | 20 | 21 | #define LED_GPIO GPIOC 22 | #define LED_PIN GPIO13 23 | 24 | // The SPI bus with the DAC 25 | #define DAC_SS_PORT GPIOB 26 | #define DAC_SS_PIN GPIO12 27 | 28 | #define SPI_DAC SPI2 // using PB13==clock and PB15==mosi 29 | #define RCC_SPI_DAC RCC_SPI2 30 | 31 | #elif defined(STM32F411RE) 32 | 33 | // STM32F411 discovery 34 | 35 | #define MCU_CLOCK 84000000 // 72 MHz 36 | 37 | #define USART_DEBUG USART2 38 | #define RCC_USART_DEBUG RCC_USART2 39 | 40 | #define TIM_MEAS TIM2 41 | #define RCC_TIM_MEAS RCC_TIM2 42 | #define RST_TIM_MEAS RST_TIM2 43 | 44 | #define EXTI_MEAS EXTI7 45 | #define EXTI_MEAS_PIN GPIO7 46 | #define EXTI_MEAS_GPIO GPIOE 47 | #define exti_meas_isr exti9_5_isr 48 | #define NVIC_EXTI_MEAS_IRQ NVIC_EXTI9_5_IRQ 49 | 50 | 51 | #define LED_GPIO GPIOD 52 | #define LED_PIN GPIO12 53 | 54 | // The SPI bus with the DAC 55 | #define DAC_SS_PORT GPIOE 56 | #define DAC_SS_PIN GPIO13 57 | 58 | #define SPI_DAC SPI4 // using PE12 and PE14 as SCK/MOSI 59 | #define RCC_SPI_DAC RCC_SPI4 60 | 61 | #endif 62 | -------------------------------------------------------------------------------- /measure_vco/firmware/setup.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include 7 | #include 8 | 9 | #include 10 | 11 | #include "hardware.h" 12 | #include "setup.h" 13 | 14 | void setup(void) { 15 | #ifdef STM32F1 16 | rcc_clock_setup_in_hse_8mhz_out_72mhz(); 17 | #else 18 | rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_84MHZ]); 19 | #endif 20 | 21 | #ifdef STM32F1 22 | rcc_periph_clock_enable(RCC_GPIOA); // USART 23 | rcc_periph_clock_enable(RCC_GPIOB); // EXTI, SPI2 24 | rcc_periph_clock_enable(RCC_GPIOC); // LED 25 | #else 26 | rcc_periph_clock_enable(RCC_GPIOA); 27 | rcc_periph_clock_enable(RCC_GPIOB); 28 | rcc_periph_clock_enable(RCC_GPIOC); 29 | rcc_periph_clock_enable(RCC_GPIOD); 30 | rcc_periph_clock_enable(RCC_GPIOE); 31 | rcc_periph_clock_enable(RCC_SYSCFG); // for interrupts 32 | #endif 33 | 34 | // interrupt pin 35 | nvic_enable_irq(NVIC_EXTI_MEAS_IRQ); 36 | 37 | #ifdef STM32F1 38 | gpio_set_mode(EXTI_MEAS_GPIO, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, EXTI_MEAS_PIN); 39 | #else 40 | gpio_mode_setup(EXTI_MEAS_GPIO, GPIO_MODE_INPUT, GPIO_PUPD_NONE, EXTI_MEAS_PIN); 41 | #endif 42 | exti_select_source(EXTI_MEAS, EXTI_MEAS_GPIO); 43 | exti_set_trigger(EXTI_MEAS, EXTI_TRIGGER_RISING); 44 | exti_enable_request(EXTI_MEAS); 45 | 46 | // timer 47 | rcc_periph_clock_enable(RCC_TIM_MEAS); 48 | rcc_periph_reset_pulse(RST_TIM_MEAS); 49 | timer_set_mode(TIM_MEAS, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); 50 | timer_set_prescaler(TIM_MEAS, 1-1); 51 | timer_disable_preload(TIM_MEAS); 52 | timer_continuous_mode(TIM_MEAS); 53 | timer_set_period(TIM_MEAS, 65535); 54 | timer_enable_counter(TIM_MEAS); 55 | 56 | // LED 57 | #ifdef STM32F1 58 | gpio_set_mode(LED_GPIO, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, LED_PIN); 59 | #else 60 | gpio_mode_setup(LED_GPIO, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, LED_PIN); 61 | #endif 62 | 63 | // blink the LED 64 | gpio_clear(LED_GPIO, LED_PIN); 65 | for (volatile int i = 0; i<1000000; i++); 66 | gpio_set(LED_GPIO, LED_PIN); 67 | 68 | // USART 69 | #ifdef STM32F1 70 | gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO9); // TX pin 71 | #else 72 | gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2); // TX Pin 73 | gpio_set_af(GPIOA, GPIO_AF7, GPIO2); 74 | #endif 75 | rcc_periph_clock_enable(RCC_USART_DEBUG); 76 | usart_set_baudrate(USART_DEBUG, 115200); 77 | usart_set_databits(USART_DEBUG, 8); 78 | usart_set_stopbits(USART_DEBUG, USART_STOPBITS_1); 79 | usart_set_mode(USART_DEBUG, USART_MODE_TX); 80 | usart_set_parity(USART_DEBUG, USART_PARITY_NONE); 81 | usart_set_flow_control(USART_DEBUG, USART_FLOWCONTROL_NONE); 82 | usart_enable(USART_DEBUG); 83 | printf("usart initialized\n"); 84 | 85 | // SPI 86 | #ifdef STM32F1 87 | gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO13); // PB13 = SPI2 SCK 88 | gpio_set_mode(DAC_SS_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, DAC_SS_PIN); // PB12 := manual slave select for the DAC 89 | gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO15); //PB15 = SPI2 MOSI 90 | #else 91 | gpio_mode_setup(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO12); 92 | gpio_mode_setup(DAC_SS_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, DAC_SS_PIN); // slave select 93 | gpio_mode_setup(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO14); 94 | gpio_set_af(GPIOE, GPIO_AF5, GPIO12); 95 | gpio_set_af(GPIOE, GPIO_AF5, GPIO14); 96 | #endif 97 | rcc_periph_clock_enable(RCC_SPI_DAC); 98 | spi_reset(SPI_DAC); 99 | spi_init_master(SPI_DAC, SPI_CR1_BAUDRATE_FPCLK_DIV_32, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_16BIT, SPI_CR1_MSBFIRST); 100 | 101 | // Set NSS management to software. (Even if we are controlling the GPIO 102 | // ourselves. Otherwise the spi peripheral will not send any data out. 103 | spi_enable_software_slave_management(SPI_DAC); 104 | spi_set_nss_high(SPI_DAC); 105 | 106 | spi_enable(SPI_DAC); 107 | } 108 | -------------------------------------------------------------------------------- /measure_vco/firmware/setup.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | void setup(void); 3 | -------------------------------------------------------------------------------- /measure_vco/schem/measure_vco.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /measure_vco/software/README.md: -------------------------------------------------------------------------------- 1 | Helper Tools and Software 2 | ========================= 3 | 4 | These tools are intended to support the development process on the PC 5 | side. 6 | 7 | analyze\_stability.py 8 | -------------------- 9 | 10 | This tool will analyze the frequency range, frequency gain and pulse width 11 | behaviour of the VCO. It also supports (currently hardcoded) compensation of 12 | the DAC "wiggle" described [here](../experiments/20190705_error_attribution). 13 | 14 | Upon execution it will draw a plot showing the frequency deviation and the 15 | pulse width. Also, it will output the following: 16 | 17 | ``` 18 | [2.25283296e+00 4.93029015e+03] 19 | 532.66 code points = 0.2601 Volt per octave 20 | starting at 17.25 Hz = -5607c distance from a4@440Hz 21 | ending at 3561.44 Hz = +3620c distance from a4@440Hz 22 | ``` 23 | 24 | The numbers in the brackets define the *cent per one codepoint* and *cent offset*, 25 | the rest should be self-explanatory. 26 | 27 | **Usage:** `analyze_stability.py usart-dump.txt` 28 | 29 | 30 | -------------------------------------------------------------------------------- /measure_vco/software/read_data.py: -------------------------------------------------------------------------------- 1 | import sys 2 | 3 | # read a data file, try to autodetect the file format and skip broken lines 4 | # MCU_CLOCK: the clock of the stm32 mcu. this is required in order to 5 | # correctly map the input to actual seconds / frequencies 6 | def read_data(fileobj, MCU_CLOCK=78000000, *, have_timestamps = False): 7 | n_entries = 0 8 | n_good_lines = 0 9 | 10 | data = [] 11 | 12 | for line in fileobj: 13 | entries = line.split() 14 | 15 | if len(entries) != n_entries: 16 | if n_good_lines > 10: 17 | # we're already locked. just ignore this line 18 | print("ignoring line '%s'" % line.rstrip(), file=sys.stderr) 19 | continue 20 | else: 21 | # we aren't locked yet. reset the counters 22 | n_good_lines = 0 23 | n_entries = len(entries) 24 | print("resetting due to line '%s'" % line.rstrip(), file=sys.stderr) 25 | else: 26 | n_good_lines += 1 27 | 28 | 29 | extra_ts_entries = 1 if have_timestamps else 0 30 | if len(entries) >= 4+extra_ts_entries and len(entries) % 2 == extra_ts_entries: 31 | try: 32 | if have_timestamps: 33 | timestamp = float(entries[0]) 34 | entries = [int(e) for e in entries[1:]] 35 | else: 36 | entries = [int(e) for e in entries] 37 | 38 | codepoint = entries[0] 39 | divider = entries[1] 40 | 41 | # if we've got enough periods, ignore the first period because it may be noisy 42 | if len(entries) >= 8: 43 | offset = 4 44 | else: 45 | offset = 2 46 | 47 | n_meas = len(entries[offset:])/2 48 | hi = sum(entries[offset::2]) 49 | lo = sum(entries[offset+1::2]) 50 | 51 | freq = MCU_CLOCK / divider / (hi+lo) * n_meas 52 | ratio = hi / (hi+lo) 53 | 54 | if have_timestamps: 55 | data += [(timestamp, codepoint, freq, ratio)] 56 | else: 57 | data += [(codepoint, freq, ratio)] 58 | except ValueError: 59 | print("failed to parse line '%s' as new format" % line.rstrip(), file=sys.stderr) 60 | else: 61 | print("line '%s' has unknown format" % line.rstrip(), file=sys.stderr) 62 | 63 | return data 64 | 65 | -------------------------------------------------------------------------------- /measure_vco/software/thermal_stability.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | from read_data import read_data 3 | from collections import defaultdict 4 | 5 | import matplotlib 6 | import matplotlib.cm 7 | import matplotlib.pyplot as plt 8 | 9 | from math import * 10 | import sys 11 | 12 | #colormap = matplotlib.cm.get_cmap("Spectral") 13 | colormap = matplotlib.cm.get_cmap("RdYlBu") 14 | 15 | #millivolts_low = -40 16 | #millivolts_high = 90 17 | millivolts_low = -46.7 # this is the lowest voltage at the expo converter, corresponding to the highest pitch 18 | millivolts_high = +89.4 # this is the highest voltage at the expo converter, corresponding to the lowest pitch 19 | 20 | #plt.xkcd(randomness=10,length=400) 21 | 22 | # read the input file 23 | data = read_data(open(sys.argv[1],'r'), have_timestamps=True) 24 | data=sorted(data) 25 | 26 | target = "freq" 27 | if len(sys.argv) >= 3 and sys.argv[2] == "--ratio": 28 | target = "ratio" 29 | 30 | def group_by_codepoint(data): 31 | result = defaultdict(lambda : []) 32 | 33 | for timestamp, codepoint, freq, ratio in data: 34 | result[codepoint] += [(timestamp, freq, ratio)] 35 | 36 | return result 37 | 38 | 39 | grouped = group_by_codepoint(data) 40 | codepoints = sorted(grouped.keys()) 41 | #codepoints = [c for c in codepoints if c < 4065] 42 | codepoints = codepoints[::16] 43 | 44 | bound = max(abs(millivolts_low), abs(millivolts_high)) 45 | colormapper = matplotlib.cm.ScalarMappable(norm=matplotlib.colors.Normalize(-bound,bound), cmap=colormap) 46 | 47 | for num,codepoint in enumerate(codepoints): 48 | if target == "freq": 49 | row = [(t,f) for t,f,r in grouped[codepoint]] 50 | else: 51 | row = [(t,r) for t,f,r in grouped[codepoint]] 52 | 53 | if len(row) <= 0: 54 | continue 55 | 56 | millivolts = (codepoint / 4096) * millivolts_low + (1 - codepoint / 4096) * millivolts_high 57 | #color = colormap(0.5 + 0.5 * millivolts / max(abs(millivolts_low), abs(millivolts_high)) ) 58 | #print(colormapper.norm(millivolts) *2 - 1, millivolts / bound) 59 | color = colormapper.cmap(colormapper.norm(millivolts)) 60 | #print(color) 61 | 62 | f0 = row[100][1] 63 | #f0 = sum(f for t,f in row) / len(row) 64 | 65 | 66 | label = "%d (%5.2f mV)" % (codepoint, millivolts) if (num % int(len(codepoints)/8) == 0) else None 67 | 68 | if target == "freq": 69 | plotdata = [log(f/f0,2)*1200 for t,f in row] 70 | else: 71 | plotdata = [f for t,f in row] 72 | plt.plot( [t for t,f in row], plotdata, color=color, label=label) 73 | 74 | 75 | plt.colorbar(colormapper) 76 | plt.legend() 77 | plt.show() 78 | -------------------------------------------------------------------------------- /measure_vco/software/time_stability.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | 3 | # needs cleaned up input files 4 | 5 | import numpy as np 6 | import sys 7 | 8 | MCU_CLOCK=78000000 9 | 10 | import sys 11 | from math import * 12 | import matplotlib.pyplot as plt 13 | import matplotlib 14 | import random 15 | 16 | for line in open(sys.argv[1],'r').readlines(): 17 | components = line.split() 18 | codepoint = int(components[0]) 19 | divider = int(components[1]) 20 | 21 | print("codepoint %d, divider %d" % (codepoint,divider)) 22 | data = [int(x)/MCU_CLOCK*divider for x in components[2:]] 23 | pairs = list(zip(data[0::2], data[1::2])) 24 | 25 | freqs = [1/(a+b) for a,b in pairs] 26 | cents = [ log(f/freqs[0], 2) * 1200 for f in freqs ] 27 | ratios = [a/(a+b) for a,b in pairs] 28 | times = [sum([a+b for a,b in pairs[0:i]]) for i in range(len(pairs))] 29 | 30 | plt.subplot(211) 31 | color = 'tab:red' 32 | plt.xlabel('time (s)') 33 | plt.ylabel('frequency deviation', color=color) 34 | plt.plot(times, cents, color=color) 35 | 36 | plt.subplot(212) 37 | color = 'tab:blue' 38 | plt.xlabel('time (s)') 39 | plt.ylabel('pulse ratio', color=color) 40 | plt.plot(times, ratios, color=color) 41 | 42 | plt.show() 43 | -------------------------------------------------------------------------------- /simulation/expo/expo-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_R 5 | # 6 | DEF Device_R R 0 0 N Y 1 F N 7 | F0 "R" 80 0 50 V V C CNN 8 | F1 "Device_R" 0 0 50 V V C CNN 9 | F2 "" -70 0 50 V I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | R_* 13 | $ENDFPLIST 14 | DRAW 15 | S -40 -100 40 100 0 1 10 N 16 | X ~ 1 0 150 50 D 50 50 1 1 P 17 | X ~ 2 0 -150 50 U 50 50 1 1 P 18 | ENDDRAW 19 | ENDDEF 20 | # 21 | # power_GND 22 | # 23 | DEF power_GND #PWR 0 0 Y Y 1 F P 24 | F0 "#PWR" 0 -250 50 H I C CNN 25 | F1 "power_GND" 0 -150 50 H V C CNN 26 | F2 "" 0 0 50 H I C CNN 27 | F3 "" 0 0 50 H I C CNN 28 | DRAW 29 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 30 | X GND 1 0 0 0 D 50 50 1 1 W N 31 | ENDDRAW 32 | ENDDEF 33 | # 34 | # power_VCC 35 | # 36 | DEF power_VCC #PWR 0 0 Y Y 1 F P 37 | F0 "#PWR" 0 -150 50 H I C CNN 38 | F1 "power_VCC" 0 150 50 H V C CNN 39 | F2 "" 0 0 50 H I C CNN 40 | F3 "" 0 0 50 H I C CNN 41 | DRAW 42 | C 0 75 25 0 1 0 N 43 | P 2 0 1 0 0 0 0 50 N 44 | X VCC 1 0 0 0 U 50 50 1 1 W N 45 | ENDDRAW 46 | ENDDEF 47 | # 48 | # power_VEE 49 | # 50 | DEF power_VEE #PWR 0 0 Y Y 1 F P 51 | F0 "#PWR" 0 -150 50 H I C CNN 52 | F1 "power_VEE" 0 150 50 H V C CNN 53 | F2 "" 0 0 50 H I C CNN 54 | F3 "" 0 0 50 H I C CNN 55 | DRAW 56 | C 0 75 25 0 1 0 N 57 | P 2 0 1 0 0 0 0 50 N 58 | X VEE 1 0 0 0 U 50 50 1 1 W N 59 | ENDDRAW 60 | ENDDEF 61 | # 62 | # pspice_0 63 | # 64 | DEF pspice_0 #GND 0 0 Y Y 1 F P 65 | F0 "#GND" 0 -100 50 H I C CNN 66 | F1 "pspice_0" 0 -70 50 H V C CNN 67 | F2 "" 0 0 50 H I C CNN 68 | F3 "" 0 0 50 H I C CNN 69 | DRAW 70 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 71 | X 0 1 0 0 0 R 40 40 1 1 W N 72 | ENDDRAW 73 | ENDDEF 74 | # 75 | # pspice_OPAMP 76 | # 77 | DEF pspice_OPAMP U 0 10 Y Y 1 F N 78 | F0 "U" 150 125 50 H V L CNN 79 | F1 "pspice_OPAMP" 150 -125 50 H V L CNN 80 | F2 "" 0 0 50 H I C CNN 81 | F3 "" 0 0 50 H I C CNN 82 | DRAW 83 | P 4 0 1 10 200 0 -200 200 -200 -200 200 0 f 84 | X + 1 -300 100 100 R 50 50 1 1 I 85 | X - 2 -300 -100 100 R 50 50 1 1 I 86 | X ~ 3 300 0 100 L 50 50 1 1 O 87 | X V+ 4 -100 300 150 D 50 50 1 1 W 88 | X V- 5 -100 -300 150 U 50 50 1 1 W 89 | ENDDRAW 90 | ENDDEF 91 | # 92 | # pspice_QNPN 93 | # 94 | DEF pspice_QNPN Q 0 0 Y Y 1 F N 95 | F0 "Q" -100 300 50 H V C CNN 96 | F1 "pspice_QNPN" -100 200 50 H V C CNN 97 | F2 "" 0 0 50 H I C CNN 98 | F3 "" 0 0 50 H I C CNN 99 | DRAW 100 | P 2 0 0 0 0 0 150 -150 N 101 | P 4 0 0 0 150 -150 150 -50 50 -150 150 -150 F 102 | P 2 0 1 0 0 -150 0 150 N 103 | P 2 0 1 0 0 0 150 150 N 104 | P 4 0 1 0 -100 -150 0 -150 0 -150 0 -150 N 105 | X C 1 150 350 200 D 40 40 1 1 P 106 | X B 2 -300 0 300 R 40 40 1 1 I 107 | X E 3 150 -350 200 U 40 40 1 1 P 108 | X Substrat 4 -100 -350 200 U 50 20 1 1 I 109 | ENDDRAW 110 | ENDDEF 111 | # 112 | # pspice_VSOURCE 113 | # 114 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 115 | F0 "V" -250 300 50 H V C CNN 116 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 117 | F2 "" 0 0 50 H I C CNN 118 | F3 "" 0 0 50 H I C CNN 119 | DRAW 120 | C 0 0 200 0 1 0 N 121 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 122 | P 2 0 1 0 -250 -250 -250 150 F 123 | P 3 0 1 0 -300 150 -250 250 -200 150 F 124 | X E1 1 0 300 100 D 50 50 1 1 I 125 | X E2 2 0 -300 100 U 50 50 1 1 I 126 | ENDDRAW 127 | ENDDEF 128 | # 129 | #End Library 130 | -------------------------------------------------------------------------------- /simulation/expo/expo.kicad_pcb: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 4) (host kicad "dummy file") ) 2 | -------------------------------------------------------------------------------- /simulation/expo/expo.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /simulation/filter_feedback/filter_feedback-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_C 5 | # 6 | DEF Device_C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "Device_C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | C_* 13 | $ENDFPLIST 14 | DRAW 15 | P 2 0 1 20 -80 -30 80 -30 N 16 | P 2 0 1 20 -80 30 80 30 N 17 | X ~ 1 0 150 110 D 50 50 1 1 P 18 | X ~ 2 0 -150 110 U 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Device_R 23 | # 24 | DEF Device_R R 0 0 N Y 1 F N 25 | F0 "R" 80 0 50 V V C CNN 26 | F1 "Device_R" 0 0 50 V V C CNN 27 | F2 "" -70 0 50 V I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | $FPLIST 30 | R_* 31 | $ENDFPLIST 32 | DRAW 33 | S -40 -100 40 100 0 1 10 N 34 | X ~ 1 0 150 50 D 50 50 1 1 P 35 | X ~ 2 0 -150 50 U 50 50 1 1 P 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # power_VCC 40 | # 41 | DEF power_VCC #PWR 0 0 Y Y 1 F P 42 | F0 "#PWR" 0 -150 50 H I C CNN 43 | F1 "power_VCC" 0 150 50 H V C CNN 44 | F2 "" 0 0 50 H I C CNN 45 | F3 "" 0 0 50 H I C CNN 46 | DRAW 47 | C 0 75 25 0 1 0 N 48 | P 2 0 1 0 0 0 0 50 N 49 | X VCC 1 0 0 0 U 50 50 1 1 W N 50 | ENDDRAW 51 | ENDDEF 52 | # 53 | # power_VEE 54 | # 55 | DEF power_VEE #PWR 0 0 Y Y 1 F P 56 | F0 "#PWR" 0 -150 50 H I C CNN 57 | F1 "power_VEE" 0 150 50 H V C CNN 58 | F2 "" 0 0 50 H I C CNN 59 | F3 "" 0 0 50 H I C CNN 60 | DRAW 61 | C 0 75 25 0 1 0 N 62 | P 2 0 1 0 0 0 0 50 N 63 | X VEE 1 0 0 0 U 50 50 1 1 W N 64 | ENDDRAW 65 | ENDDEF 66 | # 67 | # pspice_0 68 | # 69 | DEF pspice_0 #GND 0 0 Y Y 1 F P 70 | F0 "#GND" 0 -100 50 H I C CNN 71 | F1 "pspice_0" 0 -70 50 H V C CNN 72 | F2 "" 0 0 50 H I C CNN 73 | F3 "" 0 0 50 H I C CNN 74 | DRAW 75 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 76 | X 0 1 0 0 0 R 40 40 1 1 W N 77 | ENDDRAW 78 | ENDDEF 79 | # 80 | # pspice_OPAMP 81 | # 82 | DEF pspice_OPAMP U 0 10 Y Y 1 F N 83 | F0 "U" 150 125 50 H V L CNN 84 | F1 "pspice_OPAMP" 150 -125 50 H V L CNN 85 | F2 "" 0 0 50 H I C CNN 86 | F3 "" 0 0 50 H I C CNN 87 | DRAW 88 | P 4 0 1 10 200 0 -200 200 -200 -200 200 0 f 89 | X + 1 -300 100 100 R 50 50 1 1 I 90 | X - 2 -300 -100 100 R 50 50 1 1 I 91 | X ~ 3 300 0 100 L 50 50 1 1 O 92 | X V+ 4 -100 300 150 D 50 50 1 1 W 93 | X V- 5 -100 -300 150 U 50 50 1 1 W 94 | ENDDRAW 95 | ENDDEF 96 | # 97 | # pspice_VSOURCE 98 | # 99 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 100 | F0 "V" -250 300 50 H V C CNN 101 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 102 | F2 "" 0 0 50 H I C CNN 103 | F3 "" 0 0 50 H I C CNN 104 | DRAW 105 | C 0 0 200 0 1 0 N 106 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 107 | P 2 0 1 0 -250 -250 -250 150 F 108 | P 3 0 1 0 -300 150 -250 250 -200 150 F 109 | X E1 1 0 300 100 D 50 50 1 1 I 110 | X E2 2 0 -300 100 U 50 50 1 1 I 111 | ENDDRAW 112 | ENDDEF 113 | # 114 | #End Library 115 | -------------------------------------------------------------------------------- /simulation/filter_feedback/filter_feedback.kicad_pcb: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 4) (host kicad "dummy file") ) 2 | -------------------------------------------------------------------------------- /simulation/filter_feedback/filter_feedback.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /simulation/lib/2N7000.nxp.lib: -------------------------------------------------------------------------------- 1 | * fetched 2015/3/15 from http://www.nxp.com/documents/spice_model/2N7000.LIB 2 | ******************************************************************************* 3 | ***************************************************************** 4 | * NXP 2N7000 5 | * 6 | * Polarity N-Channel 7 | * Ratings 60V/2.80E+00OHMS/5.00E-01A 8 | * 9 | * Date Created Tue May 17 14:42:09 2005 10 | * 11 | ***************************************************************** 12 | * Model Generated by Transim Technology 13 | * Copyright(c) 2004 14 | * All Rights Reserved 15 | * UNPUBLISHED LICENSED SOFTWARE 16 | * www.transim.com 17 | * 18 | * Contains Proprietary Information Which 19 | * is The Property of Transim or it's licensees. 20 | * 21 | * Commercial Use or Resale Restricted by 22 | * Transim License Agreement. 23 | * 24 | ***************************************************************** 25 | 26 | .SUBCKT 2N7000 DRAIN GATE SOURCE 27 | 28 | LD DRAIN 5 7e-10 29 | RLD2 DRAIN 5 1.7592904 30 | RLD1 5 4 0.00035 31 | LG GATE 1 2.8e-09 32 | RLG GATE 1 7.0371616 33 | LS SOURCE 8 8e-10 34 | RLS2 SOURCE 8 2.0106176 35 | RLS1 8 7 0.0069 36 | 37 | RDS 7 4 4800000000 TC=-0.05 38 | 39 | RS 6 7 0.0001 40 | 41 | RD 3 4 1.34320150835079 TC=0.00503307411384966,1.77935827057801e-05 42 | RBD 9 4 0.286924398929818 TC=0.00503307411384966,1.77935827057801e-05 43 | DBD 7 9 DBD 44 | 45 | M1 3 2 6 6 MINT 46 | 47 | RGS 2 6 1500000000 48 | CGS 2 6 1.505e-11 49 | RG 1 2 1.767 50 | 51 | * CGD 52 | C11 11 12 1E-12 53 | V11 11 0 0Vdc 54 | G11 3 2 VALUE { V(13, 0)*I(V11) } 55 | E11 12 0 3 2 1 56 | E12 13 0 TABLE {V(12)} 57 | + -10 22.000 58 | + -5 22.000 59 | + -2 22.000 60 | + -1 22.000 61 | + -0.5 22.000 62 | + -0.2 22.000 63 | + -0.1 22.000 64 | + 0 22.000 65 | + 0.1 22.000 66 | + 0.2 21.000 67 | + 0.3 20.000 68 | + 0.4 29.000 69 | + 0.5 28.000 70 | + 0.6 17.500 71 | + 0.7 17.000 72 | + 0.8 16.000 73 | + 0.9 15.500 74 | + 1 15.000 75 | + 2 13.000 76 | + 5 9.600 77 | + 10 7.700 78 | + 30 5.000 79 | + 60 3.500 80 | 81 | 82 | 83 | .MODEL MINT NMOS(Vto=2.14882067023342 Kp=5.1060e-01 Nfs=0 Eta=0 84 | + Level=3 L=1e-4 W=1e-4 Gamma=0 Phi=0.6 Is=1e-24 85 | + Js=0 Pb=0.8 Cj=0 Cjsw=0 Cgso=0 Cgdo=0 Cgbo=0 86 | + Tox=1e-07 Xj=0 87 | + U0=600 Vmax=1000) 88 | 89 | .MODEL DBD D(Bv=75.00 Ibv=1.00E-05 Rs=1E-6 Is=4.81161504587125e-14 90 | + N=1 M=0.2 VJ=0.5 Fc=0.5 Cjo=1.694e-11 Tt=3e-08) 91 | 92 | .ENDS 93 | 94 | 95 | 96 | ******************************************************************************* -------------------------------------------------------------------------------- /simulation/lib/2N7000.onsemi.lib: -------------------------------------------------------------------------------- 1 | * fetched 2015/3/15 from http://www.onsemi.com/pub_link/Collateral/2N7000.REV0.LIB 2 | .SUBCKT 2N7000 1 2 3 3 | ************************************** 4 | * Model Generated by MODPEX * 5 | *Copyright(c) Symmetry Design Systems* 6 | * All Rights Reserved * 7 | * UNPUBLISHED LICENSED SOFTWARE * 8 | * Contains Proprietary Information * 9 | * Which is The Property of * 10 | * SYMMETRY OR ITS LICENSORS * 11 | *Commercial Use or Resale Restricted * 12 | * by Symmetry License Agreement * 13 | ************************************** 14 | * Model generated on Mar 31, 04 15 | * MODEL FORMAT: PSpice 16 | * Symmetry POWER MOS Model (Version 1.0) 17 | * External Node Designations 18 | * Node 1 -> Drain 19 | * Node 2 -> Gate 20 | * Node 3 -> Source 21 | M1 9 7 8 8 MM L=100u W=100u 22 | * Default values used in MM: 23 | * The voltage-dependent capacitances are 24 | * not included. Other default values are: 25 | * RS=0 RD=0 LD=0 CBD=0 CBS=0 CGBO=0 26 | .MODEL MM NMOS LEVEL=1 IS=1e-32 27 | +VTO=2.236 LAMBDA=0 KP=0.0932174 28 | +CGSO=1.79115e-07 CGDO=1.0724e-11 29 | RS 8 3 1.10523 30 | D1 3 1 MD 31 | .MODEL MD D IS=2.71011e-10 RS=0.0140826 N=1.5 BV=60 32 | +IBV=1e-05 EG=1.16084 XTI=3.00131 TT=0 33 | +CJO=3.41211e-11 VJ=4.67429 M=0.899864 FC=0.1 34 | RDS 3 1 2.4e+11 35 | RD 9 1 0.0001 36 | RG 2 7 2.18034 37 | D2 4 5 MD1 38 | * Default values used in MD1: 39 | * RS=0 EG=1.11 XTI=3.0 TT=0 40 | * BV=infinite IBV=1mA 41 | .MODEL MD1 D IS=1e-32 N=50 42 | +CJO=7.93181e-11 VJ=0.643298 M=0.9 FC=1e-08 43 | D3 0 5 MD2 44 | * Default values used in MD2: 45 | * EG=1.11 XTI=3.0 TT=0 CJO=0 46 | * BV=infinite IBV=1mA 47 | .MODEL MD2 D IS=1e-10 N=0.400165 RS=3.00002e-06 48 | RL 5 10 1 49 | FI2 7 9 VFI2 -1 50 | VFI2 4 0 0 51 | EV16 10 0 9 7 1 52 | CAP 11 10 1.58786e-10 53 | FI1 7 9 VFI1 -1 54 | VFI1 11 6 0 55 | RCAP 6 10 1 56 | D4 0 6 MD3 57 | * Default values used in MD3: 58 | * EG=1.11 XTI=3.0 TT=0 CJO=0 59 | * RS=0 BV=infinite IBV=1mA 60 | .MODEL MD3 D IS=1e-10 N=0.400165 61 | .ENDS 2n7000 -------------------------------------------------------------------------------- /simulation/lib/BC546.lib: -------------------------------------------------------------------------------- 1 | .model BC546B npn ( IS=7.59E-15 VAF=73.4 BF=480 IKF=0.0962 NE=1.2665 ISE=3.278E-15 IKR=0.03 ISC=2.00E-13 NC=1.2 NR=1 BR=5 RC=0.25 CJC=6.33E-12 FC=0.5 MJC=0.33 VJC=0.65 CJE=1.25E-11 MJE=0.55 VJE=0.65 TF=4.26E-10 ITF=0.6 VTF=3 XTF=20 RB=100 IRB=0.0001 RBM=10 RE=0.5 TR=1.50E-07) 2 | -------------------------------------------------------------------------------- /simulation/lib/BC547_557.lib: -------------------------------------------------------------------------------- 1 | .model bc547a NPN BF=400 NE=1.3 ISE=10.3F IKF=50M IS=10F VAF=80 ikr=12m 2 | + BR=9.5 NC=2 VAR=10 RB=280 RE=1 RC=40 VJE=.48 tr=.3u tf=.5n 3 | +cje=12p vje=.48 mje=.5 cjc=6p vjc=.7 mjc:.33 isc=47p kf=2f 4 | .model bc547b NPN BF=500 NE=1.3 ISE=9.72F IKF=80M IS=20F VAF=50 ikr=12m 5 | + BR=10 NC=2 VAR=10 RB=280 RE=1 RC=40 VJE=.48 tr=.3u tf=.5n 6 | +cje=12p vje=.48 mje=.5 cjc=6p vjc=.7 mjc:.33 isc=47p kf=2f 7 | .model bc547c NPN BF=730 NE=1.4 ISE=29.5F IKF=80M IS=60F VAF=25 ikr=12m 8 | + BR=10 NC=2 VAR=10 RB=280 RE=1 RC=40 VJE=.48 tr=.3u tf=.5n 9 | +cje=12p vje=.48 mje=.5 cjc=6p vjc=.7 mjc:.33 isc=47.6p kf=2f 10 | .model BC557a PNP BF=190 NE=1.5 ISE=12F IKF=90M IS=10F VAF=50 ikr=12m 11 | + nc=2 br=4 var=10 rb=280 re=1 rc=40 vje=.48 tf=.5n tr=.3u 12 | +cje=12p vje=.48 mje=.5 cjc=6p vjc=.7 mjc:.33 isc=47.6p kf=2f 13 | .model BC557b PNP BF=335 NE=1.5 ISE=7.35F IKF=82M IS=10F VAF=40 ikr=12m 14 | + nc=2 br=4 var=10 rb=280 re=1 rc=40 vje=.48 tf=.5n tr=.3u 15 | +cje=12p vje=.48 mje=.5 cjc=6p vjc=.7 mjc:.33 isc=47.6p kf=2f 16 | .model BC557c PNP BF=490 NE=1.5 ISE=12.4F IKF=78M IS=60F VAF=36 ikr=12m 17 | + nc=2 br=4 var=10 rb=280 re=1 rc=40 vje=.48 tf=.5n tr=.3u 18 | +cje=12p vje=.48 mje=.5 cjc=6p vjc=.7 mjc:.33 isc=47.6p kf=2f 19 | -------------------------------------------------------------------------------- /simulation/lib/LM324.ti.lib: -------------------------------------------------------------------------------- 1 | * fetched on 2015/3/15 from http://www.ti.com/lit/zip/sloj043 2 | * LM324 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT 3 | * CREATED USING PARTS RELEASE 4.01 ON 09/08/89 AT 10:54 4 | * (REV N/A) SUPPLY VOLTAGE: 5V 5 | * CONNECTIONS: NON-INVERTING INPUT 6 | * | INVERTING INPUT 7 | * | | POSITIVE POWER SUPPLY 8 | * | | | NEGATIVE POWER SUPPLY 9 | * | | | | OUTPUT 10 | * | | | | | 11 | .SUBCKT LM324 1 2 3 4 5 12 | * 13 | C1 11 12 5.544E-12 14 | C2 6 7 20.00E-12 15 | DC 5 53 DX 16 | DE 54 5 DX 17 | DLP 90 91 DX 18 | DLN 92 90 DX 19 | DP 4 3 DX 20 | EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5 21 | FB 7 99 POLY(5) VB VC VE VLP VLN 0 15.91E6 -20E6 20E6 20E6 -20E6 22 | GA 6 0 11 12 125.7E-6 23 | GCM 0 6 10 99 7.067E-9 24 | IEE 3 10 DC 10.04E-6 25 | HLIM 90 0 VLIM 1K 26 | Q1 11 2 13 QX 27 | Q2 12 1 14 QX 28 | R2 6 9 100.0E3 29 | RC1 4 11 7.957E3 30 | RC2 4 12 7.957E3 31 | RE1 13 10 2.773E3 32 | RE2 14 10 2.773E3 33 | REE 10 99 19.92E6 34 | RO1 8 5 50 35 | RO2 7 99 50 36 | RP 3 4 30.31E3 37 | VB 9 0 DC 0 38 | VC 3 53 DC 2.100 39 | VE 54 4 DC .6 40 | VLIM 7 8 DC 0 41 | VLP 91 0 DC 40 42 | VLN 0 92 DC 40 43 | .MODEL DX D(IS=800.0E-18) 44 | .MODEL QX PNP(IS=800.0E-18 BF=250) 45 | .ENDS -------------------------------------------------------------------------------- /simulation/lib/TL074.ti.lib: -------------------------------------------------------------------------------- 1 | * TL074 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT 2 | * CREATED USING PARTS RELEASE 4.01 ON 06/16/89 AT 13:08 3 | * (REV N/A) SUPPLY VOLTAGE: +/-15V 4 | * CONNECTIONS: NON-INVERTING INPUT 5 | * | INVERTING INPUT 6 | * | | POSITIVE POWER SUPPLY 7 | * | | | NEGATIVE POWER SUPPLY 8 | * | | | | OUTPUT 9 | * | | | | | 10 | .SUBCKT TL074 1 2 3 4 5 11 | * 12 | C1 11 12 3.498E-12 13 | C2 6 7 15.00E-12 14 | DC 5 53 DX 15 | DE 54 5 DX 16 | DLP 90 91 DX 17 | DLN 92 90 DX 18 | DP 4 3 DX 19 | EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5 20 | FB 7 99 POLY(5) VB VC VE VLP VLN 0 4.715E6 -5E6 5E6 5E6 -5E6 21 | GA 6 0 11 12 282.8E-6 22 | GCM 0 6 10 99 8.942E-9 23 | ISS 3 10 DC 195.0E-6 24 | HLIM 90 0 VLIM 1K 25 | J1 11 2 10 JX 26 | J2 12 1 10 JX 27 | R2 6 9 100.0E3 28 | RD1 4 11 3.536E3 29 | RD2 4 12 3.536E3 30 | RO1 8 5 150 31 | RO2 7 99 150 32 | RP 3 4 2.143E3 33 | RSS 10 99 1.026E6 34 | VB 9 0 DC 0 35 | VC 3 53 DC 2.200 36 | VE 54 4 DC 2.200 37 | VLIM 7 8 DC 0 38 | VLP 91 0 DC 25 39 | VLN 0 92 DC 25 40 | .MODEL DX D(IS=800.0E-18) 41 | .MODEL JX PJF(IS=15.00E-12 BETA=270.1E-6 VTO=-1) 42 | .ENDS 43 |  -------------------------------------------------------------------------------- /simulation/lib/diodes.lib: -------------------------------------------------------------------------------- 1 | .model 12v D(bv=12v) 2 | .model 3v3 D(bv=3.3v) 3 | .model 1v8 D(bv=1.8v) 4 | -------------------------------------------------------------------------------- /simulation/passive_filter/passive_filter-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_C 5 | # 6 | DEF Device_C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "Device_C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | C_* 13 | $ENDFPLIST 14 | DRAW 15 | P 2 0 1 20 -80 -30 80 -30 N 16 | P 2 0 1 20 -80 30 80 30 N 17 | X ~ 1 0 150 110 D 50 50 1 1 P 18 | X ~ 2 0 -150 110 U 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Device_R 23 | # 24 | DEF Device_R R 0 0 N Y 1 F N 25 | F0 "R" 80 0 50 V V C CNN 26 | F1 "Device_R" 0 0 50 V V C CNN 27 | F2 "" -70 0 50 V I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | $FPLIST 30 | R_* 31 | $ENDFPLIST 32 | DRAW 33 | S -40 -100 40 100 0 1 10 N 34 | X ~ 1 0 150 50 D 50 50 1 1 P 35 | X ~ 2 0 -150 50 U 50 50 1 1 P 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # pspice_0 40 | # 41 | DEF pspice_0 #GND 0 0 Y Y 1 F P 42 | F0 "#GND" 0 -100 50 H I C CNN 43 | F1 "pspice_0" 0 -70 50 H V C CNN 44 | F2 "" 0 0 50 H I C CNN 45 | F3 "" 0 0 50 H I C CNN 46 | DRAW 47 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 48 | X 0 1 0 0 0 R 40 40 1 1 W N 49 | ENDDRAW 50 | ENDDEF 51 | # 52 | # pspice_MNMOS 53 | # 54 | DEF pspice_MNMOS M 0 0 Y Y 1 F N 55 | F0 "M" 300 50 50 H V L CNN 56 | F1 "pspice_MNMOS" 300 -50 50 H V L CNN 57 | F2 "" -25 0 50 H I C CNN 58 | F3 "" -25 0 50 H I C CNN 59 | DRAW 60 | P 2 0 1 0 -50 -100 -50 100 N 61 | P 2 0 1 0 -25 -100 100 -100 N 62 | P 2 0 1 0 100 100 -25 100 N 63 | P 2 0 1 0 200 0 -25 0 N 64 | P 4 0 1 0 -25 0 50 25 50 -25 -25 0 F 65 | P 2 1 1 0 -25 -100 -25 100 N 66 | X D 1 100 200 100 D 50 50 1 1 P 67 | X G 2 -200 0 150 R 50 50 1 1 I 68 | X S 3 100 -200 100 U 50 50 1 1 P 69 | X B 4 200 -200 200 U 50 50 1 1 I 70 | ENDDRAW 71 | ENDDEF 72 | # 73 | # pspice_VSOURCE 74 | # 75 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 76 | F0 "V" -250 300 50 H V C CNN 77 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 78 | F2 "" 0 0 50 H I C CNN 79 | F3 "" 0 0 50 H I C CNN 80 | DRAW 81 | C 0 0 200 0 1 0 N 82 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 83 | P 2 0 1 0 -250 -250 -250 150 F 84 | P 3 0 1 0 -300 150 -250 250 -200 150 F 85 | X E1 1 0 300 100 D 50 50 1 1 I 86 | X E2 2 0 -300 100 U 50 50 1 1 I 87 | ENDDRAW 88 | ENDDEF 89 | # 90 | #End Library 91 | -------------------------------------------------------------------------------- /simulation/passive_filter/passive_filter.kicad_pcb: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 4) (host kicad "dummy file") ) 2 | -------------------------------------------------------------------------------- /simulation/passive_filter/passive_filter.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /simulation/software/README.md: -------------------------------------------------------------------------------- 1 | Simulation analysis tooling 2 | =========================== 3 | 4 | This tooling is intended to do transient simulation for various control 5 | voltages using ngspice and to analyze the resulting time series. 6 | 7 | GNU parallel is recommended for faster execution. 8 | 9 | Usage 10 | ----- 11 | 12 | To generate the netlist: Open `../vco/` in KiCAD, and export a netlist in spice format 13 | (`vco.cir`). 14 | 15 | To generate the joblist: 16 | 17 | `bash generate_joblist.sh ../vco/vco.cir V2 0 5 0.5 sawtooth triangle square_ctl > /tmp/jobs.txt` 18 | 19 | The joblist can be executed with either `parallel < /tmp/jobs.txt` or `bash /tmp/jobs.txt`. 20 | 21 | Results are placed in `/tmp/analog-synth-spice/`. 22 | 23 | tooling for further analysis: run `bash generate_joblist.sh ../vco/vco.cir v2 -2 2.8 0.1 triangle sawtooth square_ctl V_control V_expo GNDREF` 24 | -------------------------------------------------------------------------------- /simulation/software/analyze.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | 3 | import sys 4 | import math 5 | 6 | def quantile(data, p): 7 | s = sorted(data) 8 | i = int(len(s)*p) 9 | i = min(i,len(s)-1) 10 | i = max(0,i) 11 | return s[i] 12 | 13 | data=[] 14 | for line in sys.stdin: 15 | data.append([float(e) for e in line.split()]) 16 | 17 | 18 | threshold = (quantile([ d[5] for d in data], 0.005) + quantile([ d[5] for d in data], 0.995))/2 19 | 20 | bindata = [d[5] > threshold for d in data] 21 | t = [d[0] for d in data] 22 | 23 | state = 'waiting' 24 | 25 | periods = [] 26 | 27 | for i in range(len(bindata)): 28 | val = bindata[i] 29 | if state == 'waiting': 30 | if val: 31 | rise_start = t[i] 32 | state = 'rising' 33 | elif state == 'rising': 34 | if not val: 35 | fall_start = t[i] 36 | state = 'falling' 37 | elif state == 'falling': 38 | if val: 39 | periods.append((fall_start-rise_start, t[i]-fall_start)) 40 | rise_start = t[i] 41 | state = 'rising' 42 | 43 | periods = periods[2:] # throw away the first few 44 | 45 | freq = len(periods) / sum([p[0]+p[1] for p in periods]) 46 | hi = sum([p[0] for p in periods]) 47 | lo = sum([p[1] for p in periods]) 48 | #print("freq: %6.2f, cents: %7.1f, period: %2.2f%%" % (freq, math.log(freq,2)*1200, 100*hi/(hi+lo))) 49 | print("%f %f %f" % (freq, math.log(freq,2)*1200, 100*hi/(hi+lo))) 50 | -------------------------------------------------------------------------------- /simulation/software/generate_joblist.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | # Usage: $0 cirfile.cir running_variable first_value last_value stepsize variable [variable] ... 4 | 5 | CIRPATH="$(realpath "$1")" 6 | CIRDIR="$(dirname "$CIRPATH")" 7 | CIRBASE="$(basename "$CIRPATH")" 8 | VARIABLE="$2" 9 | FIRST="$3" 10 | LAST="$4" 11 | STEP="$5" 12 | 13 | N_STEPS=10 14 | 15 | shift 5 16 | SIGNALS="$@" 17 | 18 | TMPDIR="/tmp/analog-synth-spice" 19 | # IMPORTANT: no trailing slash, otherwise ngspice fails with 20 | # a totally misleading error message ("wrdata: too few arguments") 21 | 22 | mkdir -p "$TMPDIR" 23 | 24 | Q3=`perl -e "print($FIRST/4+3*$LAST/4)"` 25 | Q1=`perl -e "print(3*$FIRST/4+$LAST/4)"` 26 | 27 | function fn { 28 | echo "$TMPDIR/data_${VARIABLE}_${1}.txt" 29 | } 30 | 31 | function job { 32 | VALUE="$1" 33 | DURATION="$2" 34 | N_STEPS="$3" 35 | TIMESTEP=`perl -e "print($DURATION / $N_STEPS)"` 36 | echo "cd '$CIRDIR'; { cat '$CIRPATH' | sed 's/\.tran.*$/.tran ${TIMESTEP}u ${DURATION}u uic/'; echo -e \".control\n alter $VARIABLE $VALUE\n run\n wrdata '$TMPDIR/data_${VARIABLE}_${VALUE}.txt' $SIGNALS\n.endc\"; } | ngspice" 37 | } 38 | 39 | { 40 | job $Q1 100000 1; 41 | job $Q3 100000 1; 42 | } | parallel --bar 43 | 44 | F1=$(python analyze.py < `fn $Q1` | cut -d' ' -f1) 45 | F2=$(python analyze.py < `fn $Q3` | cut -d' ' -f1) 46 | 47 | echo $F1 @ $Q1 48 | echo $F2 @ $Q3 49 | 50 | #for VALUE in `seq $FIRST $STEP $LAST`; do 51 | # echo `perl -e "print( exp( log($F1) + (log($F2)-log($F1))*($VALUE-$Q1)/($Q3-$Q1) ) )"` @ $VALUE 52 | #done 53 | 54 | for VALUE in `seq $FIRST $STEP $LAST`; do 55 | FREQ=$(echo `perl -e "print( exp( log($F1) + (log($F2)-log($F1))*($VALUE-($Q1))/($Q3-($Q1)) ) )"`) 56 | DURATION=`perl -e "print(4*1000000/$FREQ)"` 57 | job $VALUE $DURATION 200 58 | done | parallel --progress --bar --eta 59 | 60 | for VALUE in `seq $FIRST $STEP $LAST`; do 61 | FN="$TMPDIR/data_${VARIABLE}_${VALUE}.txt" 62 | echo $VALUE `python analyze.py < "$FN"` `python median.py 7 < "$FN"` `python median.py 9 < "$FN"` `python median.py 11 < "$FN"` 63 | done 64 | -------------------------------------------------------------------------------- /simulation/software/median.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | 3 | import sys 4 | import math 5 | 6 | i = int(sys.argv[1]) 7 | 8 | def quantile(data, p): 9 | s = sorted(data) 10 | i = int(len(s)*p) 11 | i = min(i,len(s)-1) 12 | i = max(0,i) 13 | return s[i] 14 | 15 | data=[] 16 | for line in sys.stdin: 17 | data.append([float(e) for e in line.split()]) 18 | 19 | print( quantile([d[i] for d in data], 0.5) ) 20 | -------------------------------------------------------------------------------- /simulation/uce/uce-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_R 5 | # 6 | DEF Device_R R 0 0 N Y 1 F N 7 | F0 "R" 80 0 50 V V C CNN 8 | F1 "Device_R" 0 0 50 V V C CNN 9 | F2 "" -70 0 50 V I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | R_* 13 | $ENDFPLIST 14 | DRAW 15 | S -40 -100 40 100 0 1 10 N 16 | X ~ 1 0 150 50 D 50 50 1 1 P 17 | X ~ 2 0 -150 50 U 50 50 1 1 P 18 | ENDDRAW 19 | ENDDEF 20 | # 21 | # pspice_0 22 | # 23 | DEF pspice_0 #GND 0 0 Y Y 1 F P 24 | F0 "#GND" 0 -100 50 H I C CNN 25 | F1 "pspice_0" 0 -70 50 H V C CNN 26 | F2 "" 0 0 50 H I C CNN 27 | F3 "" 0 0 50 H I C CNN 28 | DRAW 29 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 30 | X 0 1 0 0 0 R 40 40 1 1 W N 31 | ENDDRAW 32 | ENDDEF 33 | # 34 | # pspice_QNPN 35 | # 36 | DEF pspice_QNPN Q 0 0 Y Y 1 F N 37 | F0 "Q" -100 300 50 H V C CNN 38 | F1 "pspice_QNPN" -100 200 50 H V C CNN 39 | F2 "" 0 0 50 H I C CNN 40 | F3 "" 0 0 50 H I C CNN 41 | DRAW 42 | P 2 0 0 0 0 0 150 -150 N 43 | P 4 0 0 0 150 -150 150 -50 50 -150 150 -150 F 44 | P 2 0 1 0 0 -150 0 150 N 45 | P 2 0 1 0 0 0 150 150 N 46 | P 4 0 1 0 -100 -150 0 -150 0 -150 0 -150 N 47 | X C 1 150 350 200 D 40 40 1 1 P 48 | X B 2 -300 0 300 R 40 40 1 1 I 49 | X E 3 150 -350 200 U 40 40 1 1 P 50 | X Substrat 4 -100 -350 200 U 50 20 1 1 I 51 | ENDDRAW 52 | ENDDEF 53 | # 54 | # pspice_VSOURCE 55 | # 56 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 57 | F0 "V" -250 300 50 H V C CNN 58 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 59 | F2 "" 0 0 50 H I C CNN 60 | F3 "" 0 0 50 H I C CNN 61 | DRAW 62 | C 0 0 200 0 1 0 N 63 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 64 | P 2 0 1 0 -250 -250 -250 150 F 65 | P 3 0 1 0 -300 150 -250 250 -200 150 F 66 | X E1 1 0 300 100 D 50 50 1 1 I 67 | X E2 2 0 -300 100 U 50 50 1 1 I 68 | ENDDRAW 69 | ENDDEF 70 | # 71 | #End Library 72 | -------------------------------------------------------------------------------- /simulation/uce/uce.bak: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 29 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 1 1 7 | Title "" 8 | Date "" 9 | Rev "" 10 | Comp "" 11 | Comment1 "" 12 | Comment2 "" 13 | Comment3 "" 14 | Comment4 "" 15 | $EndDescr 16 | $Comp 17 | L pspice:QNPN Q1 18 | U 1 1 5CFD14A0 19 | P 3950 3150 20 | F 0 "Q1" H 4177 3196 50 0000 L CNN 21 | F 1 "QNPN" H 4177 3105 50 0000 L CNN 22 | F 2 "" H 3950 3150 50 0001 C CNN 23 | F 3 "~" H 3950 3150 50 0001 C CNN 24 | F 4 "Q" H 3950 3150 50 0001 C CNN "Spice_Primitive" 25 | F 5 "BC546B" H 3950 3150 50 0001 C CNN "Spice_Model" 26 | F 6 "Y" H 3950 3150 50 0001 C CNN "Spice_Netlist_Enabled" 27 | F 7 "/home/flo/kicad/synth/simulation/lib/BC546.lib" H 3950 3150 50 0001 C CNN "Spice_Lib_File" 28 | 1 3950 3150 29 | 1 0 0 -1 30 | $EndComp 31 | Wire Wire Line 32 | 4100 2500 4100 2800 33 | Wire Wire Line 34 | 4100 3500 4100 3700 35 | Wire Wire Line 36 | 4100 3700 4950 3700 37 | Wire Wire Line 38 | 4950 3700 4950 3550 39 | $Comp 40 | L pspice:VSOURCE V1 41 | U 1 1 5CFD46CE 42 | P 3050 3150 43 | F 0 "V1" V 2547 3150 50 0000 C CNN 44 | F 1 "5" V 2638 3150 50 0000 C CNN 45 | F 2 "" H 3050 3150 50 0001 C CNN 46 | F 3 "~" H 3050 3150 50 0001 C CNN 47 | 1 3050 3150 48 | 0 1 1 0 49 | $EndComp 50 | Wire Wire Line 51 | 2750 3150 2750 3700 52 | Wire Wire Line 53 | 2750 3700 4100 3700 54 | Connection ~ 4100 3700 55 | $Comp 56 | L pspice:VSOURCE V2 57 | U 1 1 5CFD5062 58 | P 4950 3250 59 | F 0 "V2" H 5178 3296 50 0000 L CNN 60 | F 1 "5" H 5178 3205 50 0000 L CNN 61 | F 2 "" H 4950 3250 50 0001 C CNN 62 | F 3 "~" H 4950 3250 50 0001 C CNN 63 | 1 4950 3250 64 | 1 0 0 -1 65 | $EndComp 66 | Wire Wire Line 67 | 4100 2500 4400 2500 68 | Wire Wire Line 69 | 4700 2500 4950 2500 70 | Wire Wire Line 71 | 4950 2500 4950 2950 72 | $Comp 73 | L pspice:0 #GND? 74 | U 1 1 5CFD607E 75 | P 4100 3850 76 | F 0 "#GND?" H 4100 3750 50 0001 C CNN 77 | F 1 "0" H 4100 3939 50 0000 C CNN 78 | F 2 "" H 4100 3850 50 0001 C CNN 79 | F 3 "~" H 4100 3850 50 0001 C CNN 80 | 1 4100 3850 81 | 1 0 0 -1 82 | $EndComp 83 | Wire Wire Line 84 | 4100 3850 4100 3700 85 | Text GLabel 4100 2500 1 50 Input ~ 0 86 | Vce 87 | $Comp 88 | L Device:R R2 89 | U 1 1 5CFD5882 90 | P 4550 2500 91 | F 0 "R2" V 4757 2500 50 0000 C CNN 92 | F 1 "100" V 4666 2500 50 0000 C CNN 93 | F 2 "" V 4480 2500 50 0001 C CNN 94 | F 3 "~" H 4550 2500 50 0001 C CNN 95 | 1 4550 2500 96 | 0 1 -1 0 97 | $EndComp 98 | $Comp 99 | L Device:R R1 100 | U 1 1 5CFD3E62 101 | P 3500 3150 102 | F 0 "R1" V 3707 3150 50 0000 C CNN 103 | F 1 "10k" V 3616 3150 50 0000 C CNN 104 | F 2 "" V 3430 3150 50 0001 C CNN 105 | F 3 "~" H 3500 3150 50 0001 C CNN 106 | 1 3500 3150 107 | 0 1 -1 0 108 | $EndComp 109 | $EndSCHEMATC 110 | -------------------------------------------------------------------------------- /simulation/uce/uce.kicad_pcb: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 4) (host kicad "dummy file") ) 2 | -------------------------------------------------------------------------------- /simulation/uce/uce.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /simulation/uce/uce.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | EELAYER 29 0 3 | EELAYER END 4 | $Descr A4 11693 8268 5 | encoding utf-8 6 | Sheet 1 1 7 | Title "" 8 | Date "" 9 | Rev "" 10 | Comp "" 11 | Comment1 "" 12 | Comment2 "" 13 | Comment3 "" 14 | Comment4 "" 15 | $EndDescr 16 | $Comp 17 | L pspice:QNPN Q1 18 | U 1 1 5CFD14A0 19 | P 3950 3150 20 | F 0 "Q1" H 4177 3196 50 0000 L CNN 21 | F 1 "QNPN" H 4177 3105 50 0000 L CNN 22 | F 2 "" H 3950 3150 50 0001 C CNN 23 | F 3 "~" H 3950 3150 50 0001 C CNN 24 | F 4 "Q" H 3950 3150 50 0001 C CNN "Spice_Primitive" 25 | F 5 "BC546B" H 3950 3150 50 0001 C CNN "Spice_Model" 26 | F 6 "Y" H 3950 3150 50 0001 C CNN "Spice_Netlist_Enabled" 27 | F 7 "/home/flo/kicad/synth/simulation/lib/BC546.lib" H 3950 3150 50 0001 C CNN "Spice_Lib_File" 28 | 1 3950 3150 29 | 1 0 0 -1 30 | $EndComp 31 | Wire Wire Line 32 | 4100 2500 4100 2800 33 | Wire Wire Line 34 | 4100 3500 4100 3700 35 | Wire Wire Line 36 | 4100 3700 4950 3700 37 | Wire Wire Line 38 | 4950 3700 4950 3550 39 | $Comp 40 | L pspice:VSOURCE V1 41 | U 1 1 5CFD46CE 42 | P 3050 3150 43 | F 0 "V1" V 2547 3150 50 0000 C CNN 44 | F 1 "5" V 2638 3150 50 0000 C CNN 45 | F 2 "" H 3050 3150 50 0001 C CNN 46 | F 3 "~" H 3050 3150 50 0001 C CNN 47 | 1 3050 3150 48 | 0 1 1 0 49 | $EndComp 50 | Wire Wire Line 51 | 2750 3150 2750 3700 52 | Wire Wire Line 53 | 2750 3700 4100 3700 54 | Connection ~ 4100 3700 55 | $Comp 56 | L pspice:VSOURCE V2 57 | U 1 1 5CFD5062 58 | P 4950 3250 59 | F 0 "V2" H 5178 3296 50 0000 L CNN 60 | F 1 "5" H 5178 3205 50 0000 L CNN 61 | F 2 "" H 4950 3250 50 0001 C CNN 62 | F 3 "~" H 4950 3250 50 0001 C CNN 63 | 1 4950 3250 64 | 1 0 0 -1 65 | $EndComp 66 | Wire Wire Line 67 | 4100 2500 4400 2500 68 | Wire Wire Line 69 | 4700 2500 4950 2500 70 | Wire Wire Line 71 | 4950 2500 4950 2950 72 | $Comp 73 | L pspice:0 #GND? 74 | U 1 1 5CFD607E 75 | P 4100 3850 76 | F 0 "#GND?" H 4100 3750 50 0001 C CNN 77 | F 1 "0" H 4100 3939 50 0000 C CNN 78 | F 2 "" H 4100 3850 50 0001 C CNN 79 | F 3 "~" H 4100 3850 50 0001 C CNN 80 | 1 4100 3850 81 | 1 0 0 -1 82 | $EndComp 83 | Wire Wire Line 84 | 4100 3850 4100 3700 85 | Text GLabel 4100 2500 1 50 Input ~ 0 86 | Vce 87 | $Comp 88 | L Device:R R2 89 | U 1 1 5CFD5882 90 | P 4550 2500 91 | F 0 "R2" V 4757 2500 50 0000 C CNN 92 | F 1 "10k" V 4666 2500 50 0000 C CNN 93 | F 2 "" V 4480 2500 50 0001 C CNN 94 | F 3 "~" H 4550 2500 50 0001 C CNN 95 | 1 4550 2500 96 | 0 1 -1 0 97 | $EndComp 98 | $Comp 99 | L Device:R R1 100 | U 1 1 5CFD3E62 101 | P 3500 3150 102 | F 0 "R1" V 3707 3150 50 0000 C CNN 103 | F 1 "10k" V 3616 3150 50 0000 C CNN 104 | F 2 "" V 3430 3150 50 0001 C CNN 105 | F 3 "~" H 3500 3150 50 0001 C CNN 106 | 1 3500 3150 107 | 0 1 -1 0 108 | $EndComp 109 | $EndSCHEMATC 110 | -------------------------------------------------------------------------------- /simulation/vca.py: -------------------------------------------------------------------------------- 1 | import matplotlib.pyplot as plt 2 | import numpy as np 3 | from scipy.fft import fft 4 | 5 | def thd(data, n_periods): # total harmonic distortion 6 | result = np.abs(fft(data))**2 7 | result = result[1:int(len(result)/2)] 8 | if n_periods is None: 9 | ref = max(result) 10 | else: 11 | ref = result[n_periods-1] 12 | return np.sqrt((sum(result)-ref) / ref) 13 | 14 | def energy(data): 15 | return np.sqrt(sum(np.abs(fft(data))**2)) 16 | 17 | def my_logspace(lo, hi, steps = 50): 18 | return np.logspace(np.log10(lo), np.log10(hi), steps) 19 | 20 | vT = 0.025 21 | 22 | wave = np.sin(np.arange(0, 2*np.pi, 2*np.pi/1024)) 23 | 24 | amplitudes = my_logspace(0.0001, 10, 1000) 25 | thds = [thd(np.tanh(wave*amplitude/2/vT), 1) for amplitude in amplitudes] 26 | energies = [energy(np.tanh(wave*amplitude/2/vT)) for amplitude in amplitudes] 27 | peakpeak = [np.tanh(amplitude/2/vT) for amplitude in amplitudes] 28 | 29 | 30 | fig,ax = plt.subplots() 31 | 32 | ax.set_xlabel("amplitude/mV") 33 | ax.set_ylabel("total harmonic distortion of a sine wave/dB") 34 | ax.set_xscale('log') 35 | ax.plot(amplitudes*1000, np.log10(thds) * 10, label="thd") 36 | 37 | ax2 = ax.twinx() 38 | ax2.plot(amplitudes*1000, np.log10(energies) * 10 - 29, 'red', label="energy") 39 | ax2.plot(amplitudes*1000, np.log10(peakpeak) * 10, 'orange', label="peak to peak") 40 | ax2.set_ylabel("energy/dB") 41 | 42 | ax2.legend(loc='lower right') 43 | ax.legend(loc='upper left') 44 | 45 | plt.show() 46 | 47 | -------------------------------------------------------------------------------- /simulation/vca/vca-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_C 5 | # 6 | DEF Device_C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "Device_C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | C_* 13 | $ENDFPLIST 14 | DRAW 15 | P 2 0 1 20 -80 -30 80 -30 N 16 | P 2 0 1 20 -80 30 80 30 N 17 | X ~ 1 0 150 110 D 50 50 1 1 P 18 | X ~ 2 0 -150 110 U 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Device_R 23 | # 24 | DEF Device_R R 0 0 N Y 1 F N 25 | F0 "R" 80 0 50 V V C CNN 26 | F1 "Device_R" 0 0 50 V V C CNN 27 | F2 "" -70 0 50 V I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | $FPLIST 30 | R_* 31 | $ENDFPLIST 32 | DRAW 33 | S -40 -100 40 100 0 1 10 N 34 | X ~ 1 0 150 50 D 50 50 1 1 P 35 | X ~ 2 0 -150 50 U 50 50 1 1 P 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # power_GND 40 | # 41 | DEF power_GND #PWR 0 0 Y Y 1 F P 42 | F0 "#PWR" 0 -250 50 H I C CNN 43 | F1 "power_GND" 0 -150 50 H V C CNN 44 | F2 "" 0 0 50 H I C CNN 45 | F3 "" 0 0 50 H I C CNN 46 | DRAW 47 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 48 | X GND 1 0 0 0 D 50 50 1 1 W N 49 | ENDDRAW 50 | ENDDEF 51 | # 52 | # power_VCC 53 | # 54 | DEF power_VCC #PWR 0 0 Y Y 1 F P 55 | F0 "#PWR" 0 -150 50 H I C CNN 56 | F1 "power_VCC" 0 150 50 H V C CNN 57 | F2 "" 0 0 50 H I C CNN 58 | F3 "" 0 0 50 H I C CNN 59 | DRAW 60 | P 2 0 1 0 -30 50 0 100 N 61 | P 2 0 1 0 0 0 0 100 N 62 | P 2 0 1 0 0 100 30 50 N 63 | X VCC 1 0 0 0 U 50 50 1 1 W N 64 | ENDDRAW 65 | ENDDEF 66 | # 67 | # power_VEE 68 | # 69 | DEF power_VEE #PWR 0 0 Y Y 1 F P 70 | F0 "#PWR" 0 -150 50 H I C CNN 71 | F1 "power_VEE" 0 150 50 H V C CNN 72 | F2 "" 0 0 50 H I C CNN 73 | F3 "" 0 0 50 H I C CNN 74 | DRAW 75 | P 2 0 1 0 0 0 0 100 N 76 | P 4 0 1 0 30 50 -30 50 0 100 30 50 F 77 | X VEE 1 0 0 0 U 50 50 1 1 W N 78 | ENDDRAW 79 | ENDDEF 80 | # 81 | # pspice_0 82 | # 83 | DEF pspice_0 #GND 0 0 Y Y 1 F P 84 | F0 "#GND" 0 -100 50 H I C CNN 85 | F1 "pspice_0" 0 -70 50 H V C CNN 86 | F2 "" 0 0 50 H I C CNN 87 | F3 "" 0 0 50 H I C CNN 88 | DRAW 89 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 90 | X 0 1 0 0 0 R 40 40 1 1 W N 91 | ENDDRAW 92 | ENDDEF 93 | # 94 | # pspice_OPAMP 95 | # 96 | DEF pspice_OPAMP U 0 10 Y Y 1 F N 97 | F0 "U" 150 125 50 H V L CNN 98 | F1 "pspice_OPAMP" 150 -125 50 H V L CNN 99 | F2 "" 0 0 50 H I C CNN 100 | F3 "" 0 0 50 H I C CNN 101 | DRAW 102 | P 4 0 1 10 200 0 -200 200 -200 -200 200 0 f 103 | X + 1 -300 100 100 R 50 50 1 1 I 104 | X - 2 -300 -100 100 R 50 50 1 1 I 105 | X ~ 3 300 0 100 L 50 50 1 1 O 106 | X V+ 4 -100 300 150 D 50 50 1 1 W 107 | X V- 5 -100 -300 150 U 50 50 1 1 W 108 | ENDDRAW 109 | ENDDEF 110 | # 111 | # pspice_QPNP 112 | # 113 | DEF pspice_QPNP Q 0 0 Y Y 1 F N 114 | F0 "Q" -100 300 50 H V C CNN 115 | F1 "pspice_QPNP" -100 200 50 H V C CNN 116 | F2 "" 0 0 50 H I C CNN 117 | F3 "" 0 0 50 H I C CNN 118 | DRAW 119 | P 2 0 1 0 0 -150 0 150 N 120 | P 2 0 1 0 0 0 150 -150 N 121 | P 2 0 1 0 0 0 150 150 N 122 | P 3 0 1 0 -100 -150 0 -150 0 -150 N 123 | P 4 0 1 0 120 -180 180 -120 85 -85 120 -180 F 124 | X C 1 150 350 200 D 40 40 1 1 C 125 | X B 2 -300 0 300 R 40 40 1 1 I 126 | X E 3 150 -350 200 U 40 40 1 1 E 127 | X Substrat 4 -100 -350 200 U 50 20 1 1 I 128 | ENDDRAW 129 | ENDDEF 130 | # 131 | # pspice_VSOURCE 132 | # 133 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 134 | F0 "V" -250 300 50 H V C CNN 135 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 136 | F2 "" 0 0 50 H I C CNN 137 | F3 "" 0 0 50 H I C CNN 138 | DRAW 139 | C 0 0 200 0 1 0 N 140 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 141 | P 2 0 1 0 -250 -250 -250 150 F 142 | P 3 0 1 0 -300 150 -250 250 -200 150 F 143 | X E1 1 0 300 100 D 50 50 1 1 I 144 | X E2 2 0 -300 100 U 50 50 1 1 I 145 | ENDDRAW 146 | ENDDEF 147 | # 148 | #End Library 149 | -------------------------------------------------------------------------------- /simulation/vca/vca.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /simulation/vca2/vca-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_C 5 | # 6 | DEF Device_C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "Device_C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | C_* 13 | $ENDFPLIST 14 | DRAW 15 | P 2 0 1 20 -80 -30 80 -30 N 16 | P 2 0 1 20 -80 30 80 30 N 17 | X ~ 1 0 150 110 D 50 50 1 1 P 18 | X ~ 2 0 -150 110 U 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Device_R 23 | # 24 | DEF Device_R R 0 0 N Y 1 F N 25 | F0 "R" 80 0 50 V V C CNN 26 | F1 "Device_R" 0 0 50 V V C CNN 27 | F2 "" -70 0 50 V I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | $FPLIST 30 | R_* 31 | $ENDFPLIST 32 | DRAW 33 | S -40 -100 40 100 0 1 10 N 34 | X ~ 1 0 150 50 D 50 50 1 1 P 35 | X ~ 2 0 -150 50 U 50 50 1 1 P 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # power_+2V5 40 | # 41 | DEF power_+2V5 #PWR 0 0 Y Y 1 F P 42 | F0 "#PWR" 0 -150 50 H I C CNN 43 | F1 "power_+2V5" 0 140 50 H V C CNN 44 | F2 "" 0 0 50 H I C CNN 45 | F3 "" 0 0 50 H I C CNN 46 | DRAW 47 | P 2 0 1 0 -30 50 0 100 N 48 | P 2 0 1 0 0 0 0 100 N 49 | P 2 0 1 0 0 100 30 50 N 50 | X +2V5 1 0 0 0 U 50 50 1 1 W N 51 | ENDDRAW 52 | ENDDEF 53 | # 54 | # power_GND 55 | # 56 | DEF power_GND #PWR 0 0 Y Y 1 F P 57 | F0 "#PWR" 0 -250 50 H I C CNN 58 | F1 "power_GND" 0 -150 50 H V C CNN 59 | F2 "" 0 0 50 H I C CNN 60 | F3 "" 0 0 50 H I C CNN 61 | DRAW 62 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 63 | X GND 1 0 0 0 D 50 50 1 1 W N 64 | ENDDRAW 65 | ENDDEF 66 | # 67 | # power_VCC 68 | # 69 | DEF power_VCC #PWR 0 0 Y Y 1 F P 70 | F0 "#PWR" 0 -150 50 H I C CNN 71 | F1 "power_VCC" 0 150 50 H V C CNN 72 | F2 "" 0 0 50 H I C CNN 73 | F3 "" 0 0 50 H I C CNN 74 | DRAW 75 | P 2 0 1 0 -30 50 0 100 N 76 | P 2 0 1 0 0 0 0 100 N 77 | P 2 0 1 0 0 100 30 50 N 78 | X VCC 1 0 0 0 U 50 50 1 1 W N 79 | ENDDRAW 80 | ENDDEF 81 | # 82 | # power_VEE 83 | # 84 | DEF power_VEE #PWR 0 0 Y Y 1 F P 85 | F0 "#PWR" 0 -150 50 H I C CNN 86 | F1 "power_VEE" 0 150 50 H V C CNN 87 | F2 "" 0 0 50 H I C CNN 88 | F3 "" 0 0 50 H I C CNN 89 | DRAW 90 | P 2 0 1 0 0 0 0 100 N 91 | P 4 0 1 0 30 50 -30 50 0 100 30 50 F 92 | X VEE 1 0 0 0 U 50 50 1 1 W N 93 | ENDDRAW 94 | ENDDEF 95 | # 96 | # pspice_0 97 | # 98 | DEF pspice_0 #GND 0 0 Y Y 1 F P 99 | F0 "#GND" 0 -100 50 H I C CNN 100 | F1 "pspice_0" 0 -70 50 H V C CNN 101 | F2 "" 0 0 50 H I C CNN 102 | F3 "" 0 0 50 H I C CNN 103 | DRAW 104 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 105 | X 0 1 0 0 0 R 40 40 1 1 W N 106 | ENDDRAW 107 | ENDDEF 108 | # 109 | # pspice_OPAMP 110 | # 111 | DEF pspice_OPAMP U 0 10 Y Y 1 F N 112 | F0 "U" 150 125 50 H V L CNN 113 | F1 "pspice_OPAMP" 150 -125 50 H V L CNN 114 | F2 "" 0 0 50 H I C CNN 115 | F3 "" 0 0 50 H I C CNN 116 | DRAW 117 | P 4 0 1 10 200 0 -200 200 -200 -200 200 0 f 118 | X + 1 -300 100 100 R 50 50 1 1 I 119 | X - 2 -300 -100 100 R 50 50 1 1 I 120 | X ~ 3 300 0 100 L 50 50 1 1 O 121 | X V+ 4 -100 300 150 D 50 50 1 1 W 122 | X V- 5 -100 -300 150 U 50 50 1 1 W 123 | ENDDRAW 124 | ENDDEF 125 | # 126 | # pspice_QPNP 127 | # 128 | DEF pspice_QPNP Q 0 0 Y Y 1 F N 129 | F0 "Q" -100 300 50 H V C CNN 130 | F1 "pspice_QPNP" -100 200 50 H V C CNN 131 | F2 "" 0 0 50 H I C CNN 132 | F3 "" 0 0 50 H I C CNN 133 | DRAW 134 | P 2 0 1 0 0 -150 0 150 N 135 | P 2 0 1 0 0 0 150 -150 N 136 | P 2 0 1 0 0 0 150 150 N 137 | P 3 0 1 0 -100 -150 0 -150 0 -150 N 138 | P 4 0 1 0 120 -180 180 -120 85 -85 120 -180 F 139 | X C 1 150 350 200 D 40 40 1 1 C 140 | X B 2 -300 0 300 R 40 40 1 1 I 141 | X E 3 150 -350 200 U 40 40 1 1 E 142 | X Substrat 4 -100 -350 200 U 50 20 1 1 I 143 | ENDDRAW 144 | ENDDEF 145 | # 146 | # pspice_VSOURCE 147 | # 148 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 149 | F0 "V" -250 300 50 H V C CNN 150 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 151 | F2 "" 0 0 50 H I C CNN 152 | F3 "" 0 0 50 H I C CNN 153 | DRAW 154 | C 0 0 200 0 1 0 N 155 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 156 | P 2 0 1 0 -250 -250 -250 150 F 157 | P 3 0 1 0 -300 150 -250 250 -200 150 F 158 | X E1 1 0 300 100 D 50 50 1 1 I 159 | X E2 2 0 -300 100 U 50 50 1 1 I 160 | ENDDRAW 161 | ENDDEF 162 | # 163 | #End Library 164 | -------------------------------------------------------------------------------- /simulation/vca2/vca.kicad_pcb: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 4) (host kicad "dummy file") ) 2 | -------------------------------------------------------------------------------- /simulation/vca2/vca.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /simulation/vca2/vca2-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_C 5 | # 6 | DEF Device_C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "Device_C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | C_* 13 | $ENDFPLIST 14 | DRAW 15 | P 2 0 1 20 -80 -30 80 -30 N 16 | P 2 0 1 20 -80 30 80 30 N 17 | X ~ 1 0 150 110 D 50 50 1 1 P 18 | X ~ 2 0 -150 110 U 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Device_Q_PNP_CBE 23 | # 24 | DEF Device_Q_PNP_CBE Q 0 0 Y N 1 F N 25 | F0 "Q" 200 50 50 H V L CNN 26 | F1 "Device_Q_PNP_CBE" 200 -50 50 H V L CNN 27 | F2 "" 200 100 50 H I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | DRAW 30 | C 50 0 111 0 1 10 N 31 | P 2 0 1 0 25 25 100 100 N 32 | P 3 0 1 0 25 -25 100 -100 100 -100 N 33 | P 3 0 1 20 25 75 25 -75 25 -75 N 34 | P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F 35 | X C 1 100 200 100 D 50 50 1 1 P 36 | X B 2 -200 0 225 R 50 50 1 1 I 37 | X E 3 100 -200 100 U 50 50 1 1 P 38 | ENDDRAW 39 | ENDDEF 40 | # 41 | # Device_R 42 | # 43 | DEF Device_R R 0 0 N Y 1 F N 44 | F0 "R" 80 0 50 V V C CNN 45 | F1 "Device_R" 0 0 50 V V C CNN 46 | F2 "" -70 0 50 V I C CNN 47 | F3 "" 0 0 50 H I C CNN 48 | $FPLIST 49 | R_* 50 | $ENDFPLIST 51 | DRAW 52 | S -40 -100 40 100 0 1 10 N 53 | X ~ 1 0 150 50 D 50 50 1 1 P 54 | X ~ 2 0 -150 50 U 50 50 1 1 P 55 | ENDDRAW 56 | ENDDEF 57 | # 58 | # power_GND 59 | # 60 | DEF power_GND #PWR 0 0 Y Y 1 F P 61 | F0 "#PWR" 0 -250 50 H I C CNN 62 | F1 "power_GND" 0 -150 50 H V C CNN 63 | F2 "" 0 0 50 H I C CNN 64 | F3 "" 0 0 50 H I C CNN 65 | DRAW 66 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 67 | X GND 1 0 0 0 D 50 50 1 1 W N 68 | ENDDRAW 69 | ENDDEF 70 | # 71 | # power_VCC 72 | # 73 | DEF power_VCC #PWR 0 0 Y Y 1 F P 74 | F0 "#PWR" 0 -150 50 H I C CNN 75 | F1 "power_VCC" 0 150 50 H V C CNN 76 | F2 "" 0 0 50 H I C CNN 77 | F3 "" 0 0 50 H I C CNN 78 | DRAW 79 | P 2 0 1 0 -30 50 0 100 N 80 | P 2 0 1 0 0 0 0 100 N 81 | P 2 0 1 0 0 100 30 50 N 82 | X VCC 1 0 0 0 U 50 50 1 1 W N 83 | ENDDRAW 84 | ENDDEF 85 | # 86 | # power_VEE 87 | # 88 | DEF power_VEE #PWR 0 0 Y Y 1 F P 89 | F0 "#PWR" 0 -150 50 H I C CNN 90 | F1 "power_VEE" 0 150 50 H V C CNN 91 | F2 "" 0 0 50 H I C CNN 92 | F3 "" 0 0 50 H I C CNN 93 | DRAW 94 | P 2 0 1 0 0 0 0 100 N 95 | P 4 0 1 0 30 50 -30 50 0 100 30 50 F 96 | X VEE 1 0 0 0 U 50 50 1 1 W N 97 | ENDDRAW 98 | ENDDEF 99 | # 100 | # pspice_0 101 | # 102 | DEF pspice_0 #GND 0 0 Y Y 1 F P 103 | F0 "#GND" 0 -100 50 H I C CNN 104 | F1 "pspice_0" 0 -70 50 H V C CNN 105 | F2 "" 0 0 50 H I C CNN 106 | F3 "" 0 0 50 H I C CNN 107 | DRAW 108 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 109 | X 0 1 0 0 0 R 40 40 1 1 W N 110 | ENDDRAW 111 | ENDDEF 112 | # 113 | # pspice_OPAMP 114 | # 115 | DEF pspice_OPAMP U 0 10 Y Y 1 F N 116 | F0 "U" 150 125 50 H V L CNN 117 | F1 "pspice_OPAMP" 150 -125 50 H V L CNN 118 | F2 "" 0 0 50 H I C CNN 119 | F3 "" 0 0 50 H I C CNN 120 | DRAW 121 | P 4 0 1 10 200 0 -200 200 -200 -200 200 0 f 122 | X + 1 -300 100 100 R 50 50 1 1 I 123 | X - 2 -300 -100 100 R 50 50 1 1 I 124 | X ~ 3 300 0 100 L 50 50 1 1 O 125 | X V+ 4 -100 300 150 D 50 50 1 1 W 126 | X V- 5 -100 -300 150 U 50 50 1 1 W 127 | ENDDRAW 128 | ENDDEF 129 | # 130 | # pspice_VSOURCE 131 | # 132 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 133 | F0 "V" -250 300 50 H V C CNN 134 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 135 | F2 "" 0 0 50 H I C CNN 136 | F3 "" 0 0 50 H I C CNN 137 | DRAW 138 | C 0 0 200 0 1 0 N 139 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 140 | P 2 0 1 0 -250 -250 -250 150 F 141 | P 3 0 1 0 -300 150 -250 250 -200 150 F 142 | X E1 1 0 300 100 D 50 50 1 1 I 143 | X E2 2 0 -300 100 U 50 50 1 1 I 144 | ENDDRAW 145 | ENDDEF 146 | # 147 | #End Library 148 | -------------------------------------------------------------------------------- /simulation/vca2/vca3-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_C 5 | # 6 | DEF Device_C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "Device_C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | C_* 13 | $ENDFPLIST 14 | DRAW 15 | P 2 0 1 20 -80 -30 80 -30 N 16 | P 2 0 1 20 -80 30 80 30 N 17 | X ~ 1 0 150 110 D 50 50 1 1 P 18 | X ~ 2 0 -150 110 U 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Device_Q_PNP_CBE 23 | # 24 | DEF Device_Q_PNP_CBE Q 0 0 Y N 1 F N 25 | F0 "Q" 200 50 50 H V L CNN 26 | F1 "Device_Q_PNP_CBE" 200 -50 50 H V L CNN 27 | F2 "" 200 100 50 H I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | DRAW 30 | C 50 0 111 0 1 10 N 31 | P 2 0 1 0 25 25 100 100 N 32 | P 3 0 1 0 25 -25 100 -100 100 -100 N 33 | P 3 0 1 20 25 75 25 -75 25 -75 N 34 | P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F 35 | X C 1 100 200 100 D 50 50 1 1 P 36 | X B 2 -200 0 225 R 50 50 1 1 I 37 | X E 3 100 -200 100 U 50 50 1 1 P 38 | ENDDRAW 39 | ENDDEF 40 | # 41 | # Device_R 42 | # 43 | DEF Device_R R 0 0 N Y 1 F N 44 | F0 "R" 80 0 50 V V C CNN 45 | F1 "Device_R" 0 0 50 V V C CNN 46 | F2 "" -70 0 50 V I C CNN 47 | F3 "" 0 0 50 H I C CNN 48 | $FPLIST 49 | R_* 50 | $ENDFPLIST 51 | DRAW 52 | S -40 -100 40 100 0 1 10 N 53 | X ~ 1 0 150 50 D 50 50 1 1 P 54 | X ~ 2 0 -150 50 U 50 50 1 1 P 55 | ENDDRAW 56 | ENDDEF 57 | # 58 | # power_GND 59 | # 60 | DEF power_GND #PWR 0 0 Y Y 1 F P 61 | F0 "#PWR" 0 -250 50 H I C CNN 62 | F1 "power_GND" 0 -150 50 H V C CNN 63 | F2 "" 0 0 50 H I C CNN 64 | F3 "" 0 0 50 H I C CNN 65 | DRAW 66 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 67 | X GND 1 0 0 0 D 50 50 1 1 W N 68 | ENDDRAW 69 | ENDDEF 70 | # 71 | # power_VCC 72 | # 73 | DEF power_VCC #PWR 0 0 Y Y 1 F P 74 | F0 "#PWR" 0 -150 50 H I C CNN 75 | F1 "power_VCC" 0 150 50 H V C CNN 76 | F2 "" 0 0 50 H I C CNN 77 | F3 "" 0 0 50 H I C CNN 78 | DRAW 79 | P 2 0 1 0 -30 50 0 100 N 80 | P 2 0 1 0 0 0 0 100 N 81 | P 2 0 1 0 0 100 30 50 N 82 | X VCC 1 0 0 0 U 50 50 1 1 W N 83 | ENDDRAW 84 | ENDDEF 85 | # 86 | # power_VEE 87 | # 88 | DEF power_VEE #PWR 0 0 Y Y 1 F P 89 | F0 "#PWR" 0 -150 50 H I C CNN 90 | F1 "power_VEE" 0 150 50 H V C CNN 91 | F2 "" 0 0 50 H I C CNN 92 | F3 "" 0 0 50 H I C CNN 93 | DRAW 94 | P 2 0 1 0 0 0 0 100 N 95 | P 4 0 1 0 30 50 -30 50 0 100 30 50 F 96 | X VEE 1 0 0 0 U 50 50 1 1 W N 97 | ENDDRAW 98 | ENDDEF 99 | # 100 | # pspice_0 101 | # 102 | DEF pspice_0 #GND 0 0 Y Y 1 F P 103 | F0 "#GND" 0 -100 50 H I C CNN 104 | F1 "pspice_0" 0 -70 50 H V C CNN 105 | F2 "" 0 0 50 H I C CNN 106 | F3 "" 0 0 50 H I C CNN 107 | DRAW 108 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 109 | X 0 1 0 0 0 R 40 40 1 1 W N 110 | ENDDRAW 111 | ENDDEF 112 | # 113 | # pspice_OPAMP 114 | # 115 | DEF pspice_OPAMP U 0 10 Y Y 1 F N 116 | F0 "U" 150 125 50 H V L CNN 117 | F1 "pspice_OPAMP" 150 -125 50 H V L CNN 118 | F2 "" 0 0 50 H I C CNN 119 | F3 "" 0 0 50 H I C CNN 120 | DRAW 121 | P 4 0 1 10 200 0 -200 200 -200 -200 200 0 f 122 | X + 1 -300 100 100 R 50 50 1 1 I 123 | X - 2 -300 -100 100 R 50 50 1 1 I 124 | X ~ 3 300 0 100 L 50 50 1 1 O 125 | X V+ 4 -100 300 150 D 50 50 1 1 W 126 | X V- 5 -100 -300 150 U 50 50 1 1 W 127 | ENDDRAW 128 | ENDDEF 129 | # 130 | # pspice_VSOURCE 131 | # 132 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 133 | F0 "V" -250 300 50 H V C CNN 134 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 135 | F2 "" 0 0 50 H I C CNN 136 | F3 "" 0 0 50 H I C CNN 137 | DRAW 138 | C 0 0 200 0 1 0 N 139 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 140 | P 2 0 1 0 -250 -250 -250 150 F 141 | P 3 0 1 0 -300 150 -250 250 -200 150 F 142 | X E1 1 0 300 100 D 50 50 1 1 I 143 | X E2 2 0 -300 100 U 50 50 1 1 I 144 | ENDDRAW 145 | ENDDEF 146 | # 147 | #End Library 148 | -------------------------------------------------------------------------------- /simulation/vcf/.gitignore: -------------------------------------------------------------------------------- 1 | *.pdf 2 | -------------------------------------------------------------------------------- /simulation/vcf/plot_all.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | PARALLEL=parallel 4 | 5 | if [ x`which $PARALLEL` == x ]; then 6 | echo 'Warning: GNU parallel was not found in your PATH. (Required for parallelization).' 7 | echo ' Using `sh` as fallback executor instead. Things will be slow.' 8 | sleep 5 9 | PARALLEL=sh 10 | fi 11 | 12 | if [ x$1 == x-n ] || [ x$1 == --dry-run ]; then 13 | PARALLEL=cat 14 | fi 15 | 16 | for plot in --thd --bode; do 17 | for file in *.cir; do 18 | if echo $file | grep -q 2stage; then 19 | TWOSTAGE=-2 20 | else 21 | TWOSTAGE='' 22 | fi 23 | echo python plot.py $plot $file -p $TWOSTAGE 24 | done 25 | done | $PARALLEL 26 | -------------------------------------------------------------------------------- /simulation/vcf/thd.py: -------------------------------------------------------------------------------- 1 | import numpy as np 2 | from scipy.fft import fft 3 | 4 | def thd(data, n_periods): # total harmonic distortion 5 | result = np.abs(fft(data))**2 6 | result = result[1:int(len(result)/2)] 7 | if n_periods is None: 8 | ref = max(result) 9 | else: 10 | ref = result[n_periods-1] 11 | return np.sqrt((sum(result)-ref) / ref) 12 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_C 5 | # 6 | DEF Device_C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "Device_C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | C_* 13 | $ENDFPLIST 14 | DRAW 15 | P 2 0 1 20 -80 -30 80 -30 N 16 | P 2 0 1 20 -80 30 80 30 N 17 | X ~ 1 0 150 110 D 50 50 1 1 P 18 | X ~ 2 0 -150 110 U 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Device_R 23 | # 24 | DEF Device_R R 0 0 N Y 1 F N 25 | F0 "R" 80 0 50 V V C CNN 26 | F1 "Device_R" 0 0 50 V V C CNN 27 | F2 "" -70 0 50 V I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | $FPLIST 30 | R_* 31 | $ENDFPLIST 32 | DRAW 33 | S -40 -100 40 100 0 1 10 N 34 | X ~ 1 0 150 50 D 50 50 1 1 P 35 | X ~ 2 0 -150 50 U 50 50 1 1 P 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # power_GND 40 | # 41 | DEF power_GND #PWR 0 0 Y Y 1 F P 42 | F0 "#PWR" 0 -250 50 H I C CNN 43 | F1 "power_GND" 0 -150 50 H V C CNN 44 | F2 "" 0 0 50 H I C CNN 45 | F3 "" 0 0 50 H I C CNN 46 | DRAW 47 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 48 | X GND 1 0 0 0 D 50 50 1 1 W N 49 | ENDDRAW 50 | ENDDEF 51 | # 52 | # power_VCC 53 | # 54 | DEF power_VCC #PWR 0 0 Y Y 1 F P 55 | F0 "#PWR" 0 -150 50 H I C CNN 56 | F1 "power_VCC" 0 150 50 H V C CNN 57 | F2 "" 0 0 50 H I C CNN 58 | F3 "" 0 0 50 H I C CNN 59 | DRAW 60 | P 2 0 1 0 -30 50 0 100 N 61 | P 2 0 1 0 0 0 0 100 N 62 | P 2 0 1 0 0 100 30 50 N 63 | X VCC 1 0 0 0 U 50 50 1 1 W N 64 | ENDDRAW 65 | ENDDEF 66 | # 67 | # power_VEE 68 | # 69 | DEF power_VEE #PWR 0 0 Y Y 1 F P 70 | F0 "#PWR" 0 -150 50 H I C CNN 71 | F1 "power_VEE" 0 150 50 H V C CNN 72 | F2 "" 0 0 50 H I C CNN 73 | F3 "" 0 0 50 H I C CNN 74 | DRAW 75 | P 2 0 1 0 0 0 0 100 N 76 | P 4 0 1 0 30 50 -30 50 0 100 30 50 F 77 | X VEE 1 0 0 0 U 50 50 1 1 W N 78 | ENDDRAW 79 | ENDDEF 80 | # 81 | # pspice_0 82 | # 83 | DEF pspice_0 #GND 0 0 Y Y 1 F P 84 | F0 "#GND" 0 -100 50 H I C CNN 85 | F1 "pspice_0" 0 -70 50 H V C CNN 86 | F2 "" 0 0 50 H I C CNN 87 | F3 "" 0 0 50 H I C CNN 88 | DRAW 89 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 90 | X 0 1 0 0 0 R 40 40 1 1 W N 91 | ENDDRAW 92 | ENDDEF 93 | # 94 | # pspice_ISOURCE 95 | # 96 | DEF pspice_ISOURCE I 0 40 Y Y 1 F N 97 | F0 "I" -300 350 50 H V C CNN 98 | F1 "pspice_ISOURCE" 0 0 50 H V C CNN 99 | F2 "" 0 0 50 H I C CNN 100 | F3 "" 0 0 50 H I C CNN 101 | DRAW 102 | C 0 -100 200 0 1 0 N 103 | C 0 100 202 0 1 0 N 104 | T 0 -270 -10 50 0 0 1 I Normal 0 C C 105 | P 2 0 1 0 -300 -200 -300 200 F 106 | P 3 0 1 0 -350 200 -300 300 -250 200 F 107 | X E1 1 0 400 100 D 50 50 1 1 I 108 | X E2 2 0 -400 100 U 50 50 1 1 I 109 | ENDDRAW 110 | ENDDEF 111 | # 112 | # pspice_OPAMP 113 | # 114 | DEF pspice_OPAMP U 0 10 Y Y 1 F N 115 | F0 "U" 150 125 50 H V L CNN 116 | F1 "pspice_OPAMP" 150 -125 50 H V L CNN 117 | F2 "" 0 0 50 H I C CNN 118 | F3 "" 0 0 50 H I C CNN 119 | DRAW 120 | P 4 0 1 10 200 0 -200 200 -200 -200 200 0 f 121 | X + 1 -300 100 100 R 50 50 1 1 I 122 | X - 2 -300 -100 100 R 50 50 1 1 I 123 | X ~ 3 300 0 100 L 50 50 1 1 O 124 | X V+ 4 -100 300 150 D 50 50 1 1 W 125 | X V- 5 -100 -300 150 U 50 50 1 1 W 126 | ENDDRAW 127 | ENDDEF 128 | # 129 | # pspice_QPNP 130 | # 131 | DEF pspice_QPNP Q 0 0 Y Y 1 F N 132 | F0 "Q" -100 300 50 H V C CNN 133 | F1 "pspice_QPNP" -100 200 50 H V C CNN 134 | F2 "" 0 0 50 H I C CNN 135 | F3 "" 0 0 50 H I C CNN 136 | DRAW 137 | P 2 0 1 0 0 -150 0 150 N 138 | P 2 0 1 0 0 0 150 -150 N 139 | P 2 0 1 0 0 0 150 150 N 140 | P 3 0 1 0 -100 -150 0 -150 0 -150 N 141 | P 4 0 1 0 120 -180 180 -120 85 -85 120 -180 F 142 | X C 1 150 350 200 D 40 40 1 1 C 143 | X B 2 -300 0 300 R 40 40 1 1 I 144 | X E 3 150 -350 200 U 40 40 1 1 E 145 | X Substrat 4 -100 -350 200 U 50 20 1 1 I 146 | ENDDRAW 147 | ENDDEF 148 | # 149 | # pspice_VSOURCE 150 | # 151 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 152 | F0 "V" -250 300 50 H V C CNN 153 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 154 | F2 "" 0 0 50 H I C CNN 155 | F3 "" 0 0 50 H I C CNN 156 | DRAW 157 | C 0 0 200 0 1 0 N 158 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 159 | P 2 0 1 0 -250 -250 -250 150 F 160 | P 3 0 1 0 -300 150 -250 250 -200 150 F 161 | X E1 1 0 300 100 D 50 50 1 1 I 162 | X E2 2 0 -300 100 U 50 50 1 1 I 163 | ENDDRAW 164 | ENDDEF 165 | # 166 | #End Library 167 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_bjt-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_C 5 | # 6 | DEF Device_C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "Device_C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | C_* 13 | $ENDFPLIST 14 | DRAW 15 | P 2 0 1 20 -80 -30 80 -30 N 16 | P 2 0 1 20 -80 30 80 30 N 17 | X ~ 1 0 150 110 D 50 50 1 1 P 18 | X ~ 2 0 -150 110 U 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Device_R 23 | # 24 | DEF Device_R R 0 0 N Y 1 F N 25 | F0 "R" 80 0 50 V V C CNN 26 | F1 "Device_R" 0 0 50 V V C CNN 27 | F2 "" -70 0 50 V I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | $FPLIST 30 | R_* 31 | $ENDFPLIST 32 | DRAW 33 | S -40 -100 40 100 0 1 10 N 34 | X ~ 1 0 150 50 D 50 50 1 1 P 35 | X ~ 2 0 -150 50 U 50 50 1 1 P 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # power_GND 40 | # 41 | DEF power_GND #PWR 0 0 Y Y 1 F P 42 | F0 "#PWR" 0 -250 50 H I C CNN 43 | F1 "power_GND" 0 -150 50 H V C CNN 44 | F2 "" 0 0 50 H I C CNN 45 | F3 "" 0 0 50 H I C CNN 46 | DRAW 47 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 48 | X GND 1 0 0 0 D 50 50 1 1 W N 49 | ENDDRAW 50 | ENDDEF 51 | # 52 | # power_VCC 53 | # 54 | DEF power_VCC #PWR 0 0 Y Y 1 F P 55 | F0 "#PWR" 0 -150 50 H I C CNN 56 | F1 "power_VCC" 0 150 50 H V C CNN 57 | F2 "" 0 0 50 H I C CNN 58 | F3 "" 0 0 50 H I C CNN 59 | DRAW 60 | P 2 0 1 0 -30 50 0 100 N 61 | P 2 0 1 0 0 0 0 100 N 62 | P 2 0 1 0 0 100 30 50 N 63 | X VCC 1 0 0 0 U 50 50 1 1 W N 64 | ENDDRAW 65 | ENDDEF 66 | # 67 | # power_VEE 68 | # 69 | DEF power_VEE #PWR 0 0 Y Y 1 F P 70 | F0 "#PWR" 0 -150 50 H I C CNN 71 | F1 "power_VEE" 0 150 50 H V C CNN 72 | F2 "" 0 0 50 H I C CNN 73 | F3 "" 0 0 50 H I C CNN 74 | DRAW 75 | P 2 0 1 0 0 0 0 100 N 76 | P 4 0 1 0 30 50 -30 50 0 100 30 50 F 77 | X VEE 1 0 0 0 U 50 50 1 1 W N 78 | ENDDRAW 79 | ENDDEF 80 | # 81 | # pspice_0 82 | # 83 | DEF pspice_0 #GND 0 0 Y Y 1 F P 84 | F0 "#GND" 0 -100 50 H I C CNN 85 | F1 "pspice_0" 0 -70 50 H V C CNN 86 | F2 "" 0 0 50 H I C CNN 87 | F3 "" 0 0 50 H I C CNN 88 | DRAW 89 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 90 | X 0 1 0 0 0 R 40 40 1 1 W N 91 | ENDDRAW 92 | ENDDEF 93 | # 94 | # pspice_ISOURCE 95 | # 96 | DEF pspice_ISOURCE I 0 40 Y Y 1 F N 97 | F0 "I" -300 350 50 H V C CNN 98 | F1 "pspice_ISOURCE" 0 0 50 H V C CNN 99 | F2 "" 0 0 50 H I C CNN 100 | F3 "" 0 0 50 H I C CNN 101 | DRAW 102 | C 0 -100 200 0 1 0 N 103 | C 0 100 202 0 1 0 N 104 | T 0 -270 -10 50 0 0 1 I Normal 0 C C 105 | P 2 0 1 0 -300 -200 -300 200 F 106 | P 3 0 1 0 -350 200 -300 300 -250 200 F 107 | X E1 1 0 400 100 D 50 50 1 1 I 108 | X E2 2 0 -400 100 U 50 50 1 1 I 109 | ENDDRAW 110 | ENDDEF 111 | # 112 | # pspice_OPAMP 113 | # 114 | DEF pspice_OPAMP U 0 10 Y Y 1 F N 115 | F0 "U" 150 125 50 H V L CNN 116 | F1 "pspice_OPAMP" 150 -125 50 H V L CNN 117 | F2 "" 0 0 50 H I C CNN 118 | F3 "" 0 0 50 H I C CNN 119 | DRAW 120 | P 4 0 1 10 200 0 -200 200 -200 -200 200 0 f 121 | X + 1 -300 100 100 R 50 50 1 1 I 122 | X - 2 -300 -100 100 R 50 50 1 1 I 123 | X ~ 3 300 0 100 L 50 50 1 1 O 124 | X V+ 4 -100 300 150 D 50 50 1 1 W 125 | X V- 5 -100 -300 150 U 50 50 1 1 W 126 | ENDDRAW 127 | ENDDEF 128 | # 129 | # pspice_QPNP 130 | # 131 | DEF pspice_QPNP Q 0 0 Y Y 1 F N 132 | F0 "Q" -100 300 50 H V C CNN 133 | F1 "pspice_QPNP" -100 200 50 H V C CNN 134 | F2 "" 0 0 50 H I C CNN 135 | F3 "" 0 0 50 H I C CNN 136 | DRAW 137 | P 2 0 1 0 0 -150 0 150 N 138 | P 2 0 1 0 0 0 150 -150 N 139 | P 2 0 1 0 0 0 150 150 N 140 | P 3 0 1 0 -100 -150 0 -150 0 -150 N 141 | P 4 0 1 0 120 -180 180 -120 85 -85 120 -180 F 142 | X C 1 150 350 200 D 40 40 1 1 C 143 | X B 2 -300 0 300 R 40 40 1 1 I 144 | X E 3 150 -350 200 U 40 40 1 1 E 145 | X Substrat 4 -100 -350 200 U 50 20 1 1 I 146 | ENDDRAW 147 | ENDDEF 148 | # 149 | # pspice_VSOURCE 150 | # 151 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 152 | F0 "V" -250 300 50 H V C CNN 153 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 154 | F2 "" 0 0 50 H I C CNN 155 | F3 "" 0 0 50 H I C CNN 156 | DRAW 157 | C 0 0 200 0 1 0 N 158 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 159 | P 2 0 1 0 -250 -250 -250 150 F 160 | P 3 0 1 0 -300 150 -250 250 -200 150 F 161 | X E1 1 0 300 100 D 50 50 1 1 I 162 | X E2 2 0 -300 100 U 50 50 1 1 I 163 | ENDDRAW 164 | ENDDEF 165 | # 166 | #End Library 167 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_bjt.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_bjt_100k.cir: -------------------------------------------------------------------------------- 1 | .title KiCad schematic 2 | .include "/home/flo/analog-synth/simulation/lib/BC547_557.lib" 3 | .include "/home/flo/analog-synth/simulation/lib/TL074.ti.lib" 4 | Q4 Net-_C5-Pad1_ Net-_Q2-Pad2_ Net-_C4-Pad1_ NC_01 BC557b 5 | Q2 Net-_C5-Pad2_ Net-_Q2-Pad2_ Net-_C4-Pad2_ NC_02 BC557b 6 | R3 0 signal_preatt 1k 7 | V4 signal_in 0 SIN(0 2 1000) 8 | Q12 VEE foo Net-_C5-Pad1_ NC_03 BC557b 9 | Q8 VEE foo Net-_C5-Pad2_ NC_04 BC557b 10 | Q11 Net-_C4-Pad1_ Net-_Q11-Pad2_ Net-_C3-Pad1_ NC_05 BC557b 11 | Q7 Net-_C4-Pad2_ Net-_Q11-Pad2_ Net-_C3-Pad2_ NC_06 BC557b 12 | Q10 Net-_C3-Pad1_ Net-_Q10-Pad2_ Net-_C2-Pad1_ NC_07 BC557b 13 | Q6 Net-_C3-Pad2_ Net-_Q10-Pad2_ Net-_C2-Pad2_ NC_08 BC557b 14 | R11 Net-_Q10-Pad2_ Net-_Q11-Pad2_ 150 15 | R12 Net-_Q11-Pad2_ Net-_Q2-Pad2_ 150 16 | R13 Net-_Q2-Pad2_ foo 150 17 | R14 foo VEE 220 18 | R6 Net-_R15-Pad1_ Net-_Q10-Pad2_ 150 19 | R4 0 Net-_R15-Pad1_ 180 20 | Q5 Net-_C2-Pad2_ Net-_C6-Pad1_ Net-_I1-Pad2_ NC_09 BC557b 21 | R10 signal_out Net-_R10-Pad2_ 500k 22 | Q9 Net-_C2-Pad1_ Net-_Q9-Pad2_ Net-_I1-Pad2_ NC_10 BC557b 23 | R2 signal_in signal_preatt 100k 24 | R15 Net-_R15-Pad1_ Net-_Q9-Pad2_ 470 25 | R5 Net-_R15-Pad1_ Net-_C6-Pad1_ 470 26 | C5 Net-_C5-Pad1_ Net-_C5-Pad2_ 47n 27 | V1 VCC 0 5 28 | V2 0 VEE 5 29 | C4 Net-_C4-Pad1_ Net-_C4-Pad2_ 47n 30 | C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 47n 31 | C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 47n 32 | I1 0 Net-_I1-Pad2_ 0.01m 33 | C6 Net-_C6-Pad1_ signal_preatt 10u 34 | R9 Net-_R7-Pad1_ 0 500k 35 | XU2 Net-_R7-Pad1_ Net-_R10-Pad2_ VCC VEE signal_out TL074 36 | R7 Net-_R7-Pad1_ diff1 1k 37 | R8 Net-_R10-Pad2_ diff2 1k 38 | Q102 VEE Net-_C5-Pad2_ diff2 NC_11 BC557b 39 | Q101 VEE Net-_C5-Pad1_ diff1 NC_12 BC557b 40 | R102 VCC diff2 100k 41 | R101 VCC diff1 100k 42 | .end 43 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_bjt_10k.cir: -------------------------------------------------------------------------------- 1 | .title KiCad schematic 2 | .include "/home/flo/analog-synth/simulation/lib/BC547_557.lib" 3 | .include "/home/flo/analog-synth/simulation/lib/TL074.ti.lib" 4 | Q4 Net-_C5-Pad1_ Net-_Q2-Pad2_ Net-_C4-Pad1_ NC_01 BC557b 5 | Q2 Net-_C5-Pad2_ Net-_Q2-Pad2_ Net-_C4-Pad2_ NC_02 BC557b 6 | R3 0 signal_preatt 1k 7 | V4 signal_in 0 SIN(0 2 1000) 8 | Q12 VEE foo Net-_C5-Pad1_ NC_03 BC557b 9 | Q8 VEE foo Net-_C5-Pad2_ NC_04 BC557b 10 | Q11 Net-_C4-Pad1_ Net-_Q11-Pad2_ Net-_C3-Pad1_ NC_05 BC557b 11 | Q7 Net-_C4-Pad2_ Net-_Q11-Pad2_ Net-_C3-Pad2_ NC_06 BC557b 12 | Q10 Net-_C3-Pad1_ Net-_Q10-Pad2_ Net-_C2-Pad1_ NC_07 BC557b 13 | Q6 Net-_C3-Pad2_ Net-_Q10-Pad2_ Net-_C2-Pad2_ NC_08 BC557b 14 | R11 Net-_Q10-Pad2_ Net-_Q11-Pad2_ 150 15 | R12 Net-_Q11-Pad2_ Net-_Q2-Pad2_ 150 16 | R13 Net-_Q2-Pad2_ foo 150 17 | R14 foo VEE 220 18 | R6 Net-_R15-Pad1_ Net-_Q10-Pad2_ 150 19 | R4 0 Net-_R15-Pad1_ 180 20 | Q5 Net-_C2-Pad2_ Net-_C6-Pad1_ Net-_I1-Pad2_ NC_09 BC557b 21 | R10 signal_out Net-_R10-Pad2_ 500k 22 | Q9 Net-_C2-Pad1_ Net-_Q9-Pad2_ Net-_I1-Pad2_ NC_10 BC557b 23 | R2 signal_in signal_preatt 100k 24 | R15 Net-_R15-Pad1_ Net-_Q9-Pad2_ 470 25 | R5 Net-_R15-Pad1_ Net-_C6-Pad1_ 470 26 | C5 Net-_C5-Pad1_ Net-_C5-Pad2_ 47n 27 | V1 VCC 0 5 28 | V2 0 VEE 5 29 | C4 Net-_C4-Pad1_ Net-_C4-Pad2_ 47n 30 | C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 47n 31 | C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 47n 32 | I1 0 Net-_I1-Pad2_ 0.01m 33 | C6 Net-_C6-Pad1_ signal_preatt 10u 34 | R9 Net-_R7-Pad1_ 0 500k 35 | XU2 Net-_R7-Pad1_ Net-_R10-Pad2_ VCC VEE signal_out TL074 36 | R7 Net-_R7-Pad1_ diff1 1k 37 | R8 Net-_R10-Pad2_ diff2 1k 38 | Q102 VEE Net-_C5-Pad2_ diff2 NC_11 BC557b 39 | Q101 VEE Net-_C5-Pad1_ diff1 NC_12 BC557b 40 | R102 VCC diff2 10k 41 | R101 VCC diff1 10k 42 | .end 43 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_bjt_1k.cir: -------------------------------------------------------------------------------- 1 | .title KiCad schematic 2 | .include "/home/flo/analog-synth/simulation/lib/BC547_557.lib" 3 | .include "/home/flo/analog-synth/simulation/lib/TL074.ti.lib" 4 | Q4 Net-_C5-Pad1_ Net-_Q2-Pad2_ Net-_C4-Pad1_ NC_01 BC557b 5 | Q2 Net-_C5-Pad2_ Net-_Q2-Pad2_ Net-_C4-Pad2_ NC_02 BC557b 6 | R3 0 signal_preatt 1k 7 | V4 signal_in 0 SIN(0 2 1000) 8 | Q12 VEE foo Net-_C5-Pad1_ NC_03 BC557b 9 | Q8 VEE foo Net-_C5-Pad2_ NC_04 BC557b 10 | Q11 Net-_C4-Pad1_ Net-_Q11-Pad2_ Net-_C3-Pad1_ NC_05 BC557b 11 | Q7 Net-_C4-Pad2_ Net-_Q11-Pad2_ Net-_C3-Pad2_ NC_06 BC557b 12 | Q10 Net-_C3-Pad1_ Net-_Q10-Pad2_ Net-_C2-Pad1_ NC_07 BC557b 13 | Q6 Net-_C3-Pad2_ Net-_Q10-Pad2_ Net-_C2-Pad2_ NC_08 BC557b 14 | R11 Net-_Q10-Pad2_ Net-_Q11-Pad2_ 150 15 | R12 Net-_Q11-Pad2_ Net-_Q2-Pad2_ 150 16 | R13 Net-_Q2-Pad2_ foo 150 17 | R14 foo VEE 220 18 | R6 Net-_R15-Pad1_ Net-_Q10-Pad2_ 150 19 | R4 0 Net-_R15-Pad1_ 180 20 | Q5 Net-_C2-Pad2_ Net-_C6-Pad1_ Net-_I1-Pad2_ NC_09 BC557b 21 | R10 signal_out Net-_R10-Pad2_ 500k 22 | Q9 Net-_C2-Pad1_ Net-_Q9-Pad2_ Net-_I1-Pad2_ NC_10 BC557b 23 | R2 signal_in signal_preatt 100k 24 | R15 Net-_R15-Pad1_ Net-_Q9-Pad2_ 470 25 | R5 Net-_R15-Pad1_ Net-_C6-Pad1_ 470 26 | C5 Net-_C5-Pad1_ Net-_C5-Pad2_ 47n 27 | V1 VCC 0 5 28 | V2 0 VEE 5 29 | C4 Net-_C4-Pad1_ Net-_C4-Pad2_ 47n 30 | C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 47n 31 | C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 47n 32 | I1 0 Net-_I1-Pad2_ 0.01m 33 | C6 Net-_C6-Pad1_ signal_preatt 10u 34 | R9 Net-_R7-Pad1_ 0 500k 35 | XU2 Net-_R7-Pad1_ Net-_R10-Pad2_ VCC VEE signal_out TL074 36 | R7 Net-_R7-Pad1_ diff1 1k 37 | R8 Net-_R10-Pad2_ diff2 1k 38 | Q102 VEE Net-_C5-Pad2_ diff2 NC_11 BC557b 39 | Q101 VEE Net-_C5-Pad1_ diff1 NC_12 BC557b 40 | R102 VCC diff2 1k 41 | R101 VCC diff1 1k 42 | .end 43 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_opamp-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_C 5 | # 6 | DEF Device_C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "Device_C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | C_* 13 | $ENDFPLIST 14 | DRAW 15 | P 2 0 1 20 -80 -30 80 -30 N 16 | P 2 0 1 20 -80 30 80 30 N 17 | X ~ 1 0 150 110 D 50 50 1 1 P 18 | X ~ 2 0 -150 110 U 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Device_R 23 | # 24 | DEF Device_R R 0 0 N Y 1 F N 25 | F0 "R" 80 0 50 V V C CNN 26 | F1 "Device_R" 0 0 50 V V C CNN 27 | F2 "" -70 0 50 V I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | $FPLIST 30 | R_* 31 | $ENDFPLIST 32 | DRAW 33 | S -40 -100 40 100 0 1 10 N 34 | X ~ 1 0 150 50 D 50 50 1 1 P 35 | X ~ 2 0 -150 50 U 50 50 1 1 P 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # power_GND 40 | # 41 | DEF power_GND #PWR 0 0 Y Y 1 F P 42 | F0 "#PWR" 0 -250 50 H I C CNN 43 | F1 "power_GND" 0 -150 50 H V C CNN 44 | F2 "" 0 0 50 H I C CNN 45 | F3 "" 0 0 50 H I C CNN 46 | DRAW 47 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 48 | X GND 1 0 0 0 D 50 50 1 1 W N 49 | ENDDRAW 50 | ENDDEF 51 | # 52 | # power_VCC 53 | # 54 | DEF power_VCC #PWR 0 0 Y Y 1 F P 55 | F0 "#PWR" 0 -150 50 H I C CNN 56 | F1 "power_VCC" 0 150 50 H V C CNN 57 | F2 "" 0 0 50 H I C CNN 58 | F3 "" 0 0 50 H I C CNN 59 | DRAW 60 | P 2 0 1 0 -30 50 0 100 N 61 | P 2 0 1 0 0 0 0 100 N 62 | P 2 0 1 0 0 100 30 50 N 63 | X VCC 1 0 0 0 U 50 50 1 1 W N 64 | ENDDRAW 65 | ENDDEF 66 | # 67 | # power_VEE 68 | # 69 | DEF power_VEE #PWR 0 0 Y Y 1 F P 70 | F0 "#PWR" 0 -150 50 H I C CNN 71 | F1 "power_VEE" 0 150 50 H V C CNN 72 | F2 "" 0 0 50 H I C CNN 73 | F3 "" 0 0 50 H I C CNN 74 | DRAW 75 | P 2 0 1 0 0 0 0 100 N 76 | P 4 0 1 0 30 50 -30 50 0 100 30 50 F 77 | X VEE 1 0 0 0 U 50 50 1 1 W N 78 | ENDDRAW 79 | ENDDEF 80 | # 81 | # pspice_0 82 | # 83 | DEF pspice_0 #GND 0 0 Y Y 1 F P 84 | F0 "#GND" 0 -100 50 H I C CNN 85 | F1 "pspice_0" 0 -70 50 H V C CNN 86 | F2 "" 0 0 50 H I C CNN 87 | F3 "" 0 0 50 H I C CNN 88 | DRAW 89 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 90 | X 0 1 0 0 0 R 40 40 1 1 W N 91 | ENDDRAW 92 | ENDDEF 93 | # 94 | # pspice_ISOURCE 95 | # 96 | DEF pspice_ISOURCE I 0 40 Y Y 1 F N 97 | F0 "I" -300 350 50 H V C CNN 98 | F1 "pspice_ISOURCE" 0 0 50 H V C CNN 99 | F2 "" 0 0 50 H I C CNN 100 | F3 "" 0 0 50 H I C CNN 101 | DRAW 102 | C 0 -100 200 0 1 0 N 103 | C 0 100 202 0 1 0 N 104 | T 0 -270 -10 50 0 0 1 I Normal 0 C C 105 | P 2 0 1 0 -300 -200 -300 200 F 106 | P 3 0 1 0 -350 200 -300 300 -250 200 F 107 | X E1 1 0 400 100 D 50 50 1 1 I 108 | X E2 2 0 -400 100 U 50 50 1 1 I 109 | ENDDRAW 110 | ENDDEF 111 | # 112 | # pspice_OPAMP 113 | # 114 | DEF pspice_OPAMP U 0 10 Y Y 1 F N 115 | F0 "U" 150 125 50 H V L CNN 116 | F1 "pspice_OPAMP" 150 -125 50 H V L CNN 117 | F2 "" 0 0 50 H I C CNN 118 | F3 "" 0 0 50 H I C CNN 119 | DRAW 120 | P 4 0 1 10 200 0 -200 200 -200 -200 200 0 f 121 | X + 1 -300 100 100 R 50 50 1 1 I 122 | X - 2 -300 -100 100 R 50 50 1 1 I 123 | X ~ 3 300 0 100 L 50 50 1 1 O 124 | X V+ 4 -100 300 150 D 50 50 1 1 W 125 | X V- 5 -100 -300 150 U 50 50 1 1 W 126 | ENDDRAW 127 | ENDDEF 128 | # 129 | # pspice_QPNP 130 | # 131 | DEF pspice_QPNP Q 0 0 Y Y 1 F N 132 | F0 "Q" -100 300 50 H V C CNN 133 | F1 "pspice_QPNP" -100 200 50 H V C CNN 134 | F2 "" 0 0 50 H I C CNN 135 | F3 "" 0 0 50 H I C CNN 136 | DRAW 137 | P 2 0 1 0 0 -150 0 150 N 138 | P 2 0 1 0 0 0 150 -150 N 139 | P 2 0 1 0 0 0 150 150 N 140 | P 3 0 1 0 -100 -150 0 -150 0 -150 N 141 | P 4 0 1 0 120 -180 180 -120 85 -85 120 -180 F 142 | X C 1 150 350 200 D 40 40 1 1 C 143 | X B 2 -300 0 300 R 40 40 1 1 I 144 | X E 3 150 -350 200 U 40 40 1 1 E 145 | X Substrat 4 -100 -350 200 U 50 20 1 1 I 146 | ENDDRAW 147 | ENDDEF 148 | # 149 | # pspice_VSOURCE 150 | # 151 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 152 | F0 "V" -250 300 50 H V C CNN 153 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 154 | F2 "" 0 0 50 H I C CNN 155 | F3 "" 0 0 50 H I C CNN 156 | DRAW 157 | C 0 0 200 0 1 0 N 158 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 159 | P 2 0 1 0 -250 -250 -250 150 F 160 | P 3 0 1 0 -300 150 -250 250 -200 150 F 161 | X E1 1 0 300 100 D 50 50 1 1 I 162 | X E2 2 0 -300 100 U 50 50 1 1 I 163 | ENDDRAW 164 | ENDDEF 165 | # 166 | #End Library 167 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_opamp.cir: -------------------------------------------------------------------------------- 1 | .title KiCad schematic 2 | .include "/home/flo/analog-synth/simulation/lib/BC547_557.lib" 3 | .include "/home/flo/analog-synth/simulation/lib/TL074.ti.lib" 4 | Q4 Net-_C5-Pad1_ Net-_Q2-Pad2_ Net-_C4-Pad1_ NC_01 BC557b 5 | Q2 Net-_C5-Pad2_ Net-_Q2-Pad2_ Net-_C4-Pad2_ NC_02 BC557b 6 | R3 0 signal_preatt 1k 7 | V4 signal_in 0 SIN(0 2 1000) 8 | Q12 VEE foo Net-_C5-Pad1_ NC_03 BC557b 9 | Q8 VEE foo Net-_C5-Pad2_ NC_04 BC557b 10 | Q11 Net-_C4-Pad1_ Net-_Q11-Pad2_ Net-_C3-Pad1_ NC_05 BC557b 11 | Q7 Net-_C4-Pad2_ Net-_Q11-Pad2_ Net-_C3-Pad2_ NC_06 BC557b 12 | Q10 Net-_C3-Pad1_ Net-_Q10-Pad2_ Net-_C2-Pad1_ NC_07 BC557b 13 | Q6 Net-_C3-Pad2_ Net-_Q10-Pad2_ Net-_C2-Pad2_ NC_08 BC557b 14 | R11 Net-_Q10-Pad2_ Net-_Q11-Pad2_ 150 15 | R12 Net-_Q11-Pad2_ Net-_Q2-Pad2_ 150 16 | R13 Net-_Q2-Pad2_ foo 150 17 | R14 foo VEE 220 18 | R6 Net-_R15-Pad1_ Net-_Q10-Pad2_ 150 19 | R4 0 Net-_R15-Pad1_ 180 20 | Q5 Net-_C2-Pad2_ Net-_C6-Pad1_ Net-_I1-Pad2_ NC_09 BC557b 21 | R10 signal_out Net-_R10-Pad2_ 500k 22 | Q9 Net-_C2-Pad1_ Net-_Q9-Pad2_ Net-_I1-Pad2_ NC_10 BC557b 23 | R2 signal_in signal_preatt 100k 24 | R15 Net-_R15-Pad1_ Net-_Q9-Pad2_ 470 25 | R5 Net-_R15-Pad1_ Net-_C6-Pad1_ 470 26 | C5 Net-_C5-Pad1_ Net-_C5-Pad2_ 47n 27 | V1 VCC 0 5 28 | V2 0 VEE 5 29 | C4 Net-_C4-Pad1_ Net-_C4-Pad2_ 47n 30 | C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 47n 31 | C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 47n 32 | I1 0 Net-_I1-Pad2_ 0.01m 33 | C6 Net-_C6-Pad1_ signal_preatt 10u 34 | R9 Net-_R7-Pad1_ 0 500k 35 | XU2 Net-_R7-Pad1_ Net-_R10-Pad2_ VCC VEE signal_out TL074 36 | R7 Net-_R7-Pad1_ diff1 1k 37 | R8 Net-_R10-Pad2_ diff2 1k 38 | XU101 Net-_C5-Pad1_ diff1 VCC VEE diff1 TL074 39 | XU102 Net-_C5-Pad2_ diff2 VCC VEE diff2 TL074 40 | .end 41 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_opamp.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_opamp_2stage-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_C 5 | # 6 | DEF Device_C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "Device_C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | C_* 13 | $ENDFPLIST 14 | DRAW 15 | P 2 0 1 20 -80 -30 80 -30 N 16 | P 2 0 1 20 -80 30 80 30 N 17 | X ~ 1 0 150 110 D 50 50 1 1 P 18 | X ~ 2 0 -150 110 U 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Device_R 23 | # 24 | DEF Device_R R 0 0 N Y 1 F N 25 | F0 "R" 80 0 50 V V C CNN 26 | F1 "Device_R" 0 0 50 V V C CNN 27 | F2 "" -70 0 50 V I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | $FPLIST 30 | R_* 31 | $ENDFPLIST 32 | DRAW 33 | S -40 -100 40 100 0 1 10 N 34 | X ~ 1 0 150 50 D 50 50 1 1 P 35 | X ~ 2 0 -150 50 U 50 50 1 1 P 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # power_GND 40 | # 41 | DEF power_GND #PWR 0 0 Y Y 1 F P 42 | F0 "#PWR" 0 -250 50 H I C CNN 43 | F1 "power_GND" 0 -150 50 H V C CNN 44 | F2 "" 0 0 50 H I C CNN 45 | F3 "" 0 0 50 H I C CNN 46 | DRAW 47 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 48 | X GND 1 0 0 0 D 50 50 1 1 W N 49 | ENDDRAW 50 | ENDDEF 51 | # 52 | # power_VCC 53 | # 54 | DEF power_VCC #PWR 0 0 Y Y 1 F P 55 | F0 "#PWR" 0 -150 50 H I C CNN 56 | F1 "power_VCC" 0 150 50 H V C CNN 57 | F2 "" 0 0 50 H I C CNN 58 | F3 "" 0 0 50 H I C CNN 59 | DRAW 60 | P 2 0 1 0 -30 50 0 100 N 61 | P 2 0 1 0 0 0 0 100 N 62 | P 2 0 1 0 0 100 30 50 N 63 | X VCC 1 0 0 0 U 50 50 1 1 W N 64 | ENDDRAW 65 | ENDDEF 66 | # 67 | # power_VEE 68 | # 69 | DEF power_VEE #PWR 0 0 Y Y 1 F P 70 | F0 "#PWR" 0 -150 50 H I C CNN 71 | F1 "power_VEE" 0 150 50 H V C CNN 72 | F2 "" 0 0 50 H I C CNN 73 | F3 "" 0 0 50 H I C CNN 74 | DRAW 75 | P 2 0 1 0 0 0 0 100 N 76 | P 4 0 1 0 30 50 -30 50 0 100 30 50 F 77 | X VEE 1 0 0 0 U 50 50 1 1 W N 78 | ENDDRAW 79 | ENDDEF 80 | # 81 | # pspice_0 82 | # 83 | DEF pspice_0 #GND 0 0 Y Y 1 F P 84 | F0 "#GND" 0 -100 50 H I C CNN 85 | F1 "pspice_0" 0 -70 50 H V C CNN 86 | F2 "" 0 0 50 H I C CNN 87 | F3 "" 0 0 50 H I C CNN 88 | DRAW 89 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 90 | X 0 1 0 0 0 R 40 40 1 1 W N 91 | ENDDRAW 92 | ENDDEF 93 | # 94 | # pspice_ISOURCE 95 | # 96 | DEF pspice_ISOURCE I 0 40 Y Y 1 F N 97 | F0 "I" -300 350 50 H V C CNN 98 | F1 "pspice_ISOURCE" 0 0 50 H V C CNN 99 | F2 "" 0 0 50 H I C CNN 100 | F3 "" 0 0 50 H I C CNN 101 | DRAW 102 | C 0 -100 200 0 1 0 N 103 | C 0 100 202 0 1 0 N 104 | T 0 -270 -10 50 0 0 1 I Normal 0 C C 105 | P 2 0 1 0 -300 -200 -300 200 F 106 | P 3 0 1 0 -350 200 -300 300 -250 200 F 107 | X E1 1 0 400 100 D 50 50 1 1 I 108 | X E2 2 0 -400 100 U 50 50 1 1 I 109 | ENDDRAW 110 | ENDDEF 111 | # 112 | # pspice_OPAMP 113 | # 114 | DEF pspice_OPAMP U 0 10 Y Y 1 F N 115 | F0 "U" 150 125 50 H V L CNN 116 | F1 "pspice_OPAMP" 150 -125 50 H V L CNN 117 | F2 "" 0 0 50 H I C CNN 118 | F3 "" 0 0 50 H I C CNN 119 | DRAW 120 | P 4 0 1 10 200 0 -200 200 -200 -200 200 0 f 121 | X + 1 -300 100 100 R 50 50 1 1 I 122 | X - 2 -300 -100 100 R 50 50 1 1 I 123 | X ~ 3 300 0 100 L 50 50 1 1 O 124 | X V+ 4 -100 300 150 D 50 50 1 1 W 125 | X V- 5 -100 -300 150 U 50 50 1 1 W 126 | ENDDRAW 127 | ENDDEF 128 | # 129 | # pspice_QPNP 130 | # 131 | DEF pspice_QPNP Q 0 0 Y Y 1 F N 132 | F0 "Q" -100 300 50 H V C CNN 133 | F1 "pspice_QPNP" -100 200 50 H V C CNN 134 | F2 "" 0 0 50 H I C CNN 135 | F3 "" 0 0 50 H I C CNN 136 | DRAW 137 | P 2 0 1 0 0 -150 0 150 N 138 | P 2 0 1 0 0 0 150 -150 N 139 | P 2 0 1 0 0 0 150 150 N 140 | P 3 0 1 0 -100 -150 0 -150 0 -150 N 141 | P 4 0 1 0 120 -180 180 -120 85 -85 120 -180 F 142 | X C 1 150 350 200 D 40 40 1 1 C 143 | X B 2 -300 0 300 R 40 40 1 1 I 144 | X E 3 150 -350 200 U 40 40 1 1 E 145 | X Substrat 4 -100 -350 200 U 50 20 1 1 I 146 | ENDDRAW 147 | ENDDEF 148 | # 149 | # pspice_VSOURCE 150 | # 151 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 152 | F0 "V" -250 300 50 H V C CNN 153 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 154 | F2 "" 0 0 50 H I C CNN 155 | F3 "" 0 0 50 H I C CNN 156 | DRAW 157 | C 0 0 200 0 1 0 N 158 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 159 | P 2 0 1 0 -250 -250 -250 150 F 160 | P 3 0 1 0 -300 150 -250 250 -200 150 F 161 | X E1 1 0 300 100 D 50 50 1 1 I 162 | X E2 2 0 -300 100 U 50 50 1 1 I 163 | ENDDRAW 164 | ENDDEF 165 | # 166 | #End Library 167 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_opamp_2stage.cir: -------------------------------------------------------------------------------- 1 | .title KiCad schematic 2 | .include "/home/flo/analog-synth/simulation/lib/BC547_557.lib" 3 | .include "/home/flo/analog-synth/simulation/lib/TL074.ti.lib" 4 | Q4 Net-_C5-Pad1_ Net-_Q2-Pad2_ Net-_C4-Pad1_ NC_01 BC557b 5 | Q2 Net-_C5-Pad2_ Net-_Q2-Pad2_ Net-_C4-Pad2_ NC_02 BC557b 6 | R3 0 signal_preatt 1k 7 | V4 signal_in 0 SIN(0 2 1000) 8 | Q12 VEE foo Net-_C5-Pad1_ NC_03 BC557b 9 | Q8 VEE foo Net-_C5-Pad2_ NC_04 BC557b 10 | Q11 Net-_C4-Pad1_ Net-_Q11-Pad2_ Net-_C3-Pad1_ NC_05 BC557b 11 | Q7 Net-_C4-Pad2_ Net-_Q11-Pad2_ Net-_C3-Pad2_ NC_06 BC557b 12 | Q10 Net-_C3-Pad1_ Net-_Q10-Pad2_ Net-_C2-Pad1_ NC_07 BC557b 13 | Q6 Net-_C3-Pad2_ Net-_Q10-Pad2_ Net-_C2-Pad2_ NC_08 BC557b 14 | R11 Net-_Q10-Pad2_ Net-_Q11-Pad2_ 150 15 | R12 Net-_Q11-Pad2_ Net-_Q2-Pad2_ 150 16 | R13 Net-_Q2-Pad2_ foo 150 17 | R14 foo VEE 220 18 | R6 Net-_R15-Pad1_ Net-_Q10-Pad2_ 150 19 | R4 0 Net-_R15-Pad1_ 180 20 | Q5 Net-_C2-Pad2_ Net-_C6-Pad1_ Net-_I1-Pad2_ NC_09 BC557b 21 | R10 Net-_R10-Pad1_ Net-_R10-Pad2_ 22k 22 | Q9 Net-_C2-Pad1_ Net-_Q9-Pad2_ Net-_I1-Pad2_ NC_10 BC557b 23 | R2 signal_in signal_preatt 100k 24 | R15 Net-_R15-Pad1_ Net-_Q9-Pad2_ 470 25 | R5 Net-_R15-Pad1_ Net-_C6-Pad1_ 470 26 | C5 Net-_C5-Pad1_ Net-_C5-Pad2_ 47n 27 | V1 VCC 0 5 28 | V2 0 VEE 5 29 | C4 Net-_C4-Pad1_ Net-_C4-Pad2_ 47n 30 | C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 47n 31 | C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 47n 32 | I1 0 Net-_I1-Pad2_ 0.01m 33 | C6 Net-_C6-Pad1_ signal_preatt 10u 34 | R9 Net-_R7-Pad1_ 0 22k 35 | XU2 Net-_R7-Pad1_ Net-_R10-Pad2_ VCC VEE Net-_R10-Pad1_ TL074 36 | R7 Net-_R7-Pad1_ diff1 1k 37 | R8 Net-_R10-Pad2_ diff2 1k 38 | XU101 Net-_C5-Pad2_ diff1 VCC VEE diff1 TL074 39 | XU102 Net-_C5-Pad1_ diff2 VCC VEE diff2 TL074 40 | R101 Net-_R101-Pad1_ Net-_R10-Pad1_ 1k 41 | XU103 0 Net-_R101-Pad1_ VCC VEE signal_out TL074 42 | R102 signal_out Net-_R101-Pad1_ 23k 43 | .end 44 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_opamp_2stage.pro: -------------------------------------------------------------------------------- 1 | update=Sun 31 Jan 2021 07:57:03 PM CET 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | [schematic_editor] 35 | version=1 36 | PageLayoutDescrFile= 37 | PlotDirectoryName= 38 | SubpartIdSeparator=0 39 | SubpartFirstId=65 40 | NetFmtName=Pcbnew 41 | SpiceAjustPassiveValues=0 42 | LabSize=50 43 | ERC_TestSimilarLabels=1 44 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_opamp_2stage_resonance.cir: -------------------------------------------------------------------------------- 1 | .title KiCad schematic 2 | .include "/home/flo/analog-synth/simulation/lib/BC547_557.lib" 3 | .include "/home/flo/analog-synth/simulation/lib/TL074.ti.lib" 4 | Q4 Net-_C5-Pad1_ Net-_Q2-Pad2_ Net-_C4-Pad1_ NC_01 BC557b 5 | Q2 Net-_C5-Pad2_ Net-_Q2-Pad2_ Net-_C4-Pad2_ NC_02 BC557b 6 | R3 0 signal_preatt 1k 7 | Q12 VEE foo Net-_C5-Pad1_ NC_03 BC557b 8 | Q8 VEE foo Net-_C5-Pad2_ NC_04 BC557b 9 | Q11 Net-_C4-Pad1_ Net-_Q11-Pad2_ Net-_C3-Pad1_ NC_05 BC557b 10 | Q7 Net-_C4-Pad2_ Net-_Q11-Pad2_ Net-_C3-Pad2_ NC_06 BC557b 11 | Q10 Net-_C3-Pad1_ Net-_Q10-Pad2_ Net-_C2-Pad1_ NC_07 BC557b 12 | Q6 Net-_C3-Pad2_ Net-_Q10-Pad2_ Net-_C2-Pad2_ NC_08 BC557b 13 | R11 Net-_Q10-Pad2_ Net-_Q11-Pad2_ 150 14 | R12 Net-_Q11-Pad2_ Net-_Q2-Pad2_ 150 15 | R13 Net-_Q2-Pad2_ foo 150 16 | R14 foo VEE 220 17 | R6 Net-_R15-Pad1_ Net-_Q10-Pad2_ 150 18 | R4 0 Net-_R15-Pad1_ 180 19 | Q5 Net-_C2-Pad2_ Net-_C6-Pad1_ Net-_I1-Pad2_ NC_09 BC557b 20 | R10 Net-_R10-Pad1_ Net-_R10-Pad2_ 22k 21 | Q9 Net-_C2-Pad1_ Net-_C121-Pad2_ Net-_I1-Pad2_ NC_10 BC557b 22 | R2 signal_in signal_preatt 100k 23 | R15 Net-_R15-Pad1_ Net-_C121-Pad2_ 470 24 | R5 Net-_R15-Pad1_ Net-_C6-Pad1_ 470 25 | C5 Net-_C5-Pad1_ Net-_C5-Pad2_ 47n 26 | V1 VCC 0 5 27 | V2 0 VEE 5 28 | C4 Net-_C4-Pad1_ Net-_C4-Pad2_ 47n 29 | C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 47n 30 | C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 47n 31 | I1 0 Net-_I1-Pad2_ 0.01m 32 | C6 Net-_C6-Pad1_ signal_preatt 10u 33 | R9 Net-_R7-Pad1_ 0 22k 34 | XU2 Net-_R7-Pad1_ Net-_R10-Pad2_ VCC VEE Net-_R10-Pad1_ TL074 35 | R7 Net-_R7-Pad1_ diff1 1k 36 | R8 Net-_R10-Pad2_ diff2 1k 37 | XU101 Net-_C5-Pad1_ diff1 VCC VEE diff1 TL074 38 | XU102 Net-_C5-Pad2_ diff2 VCC VEE diff2 TL074 39 | R101 Net-_R101-Pad1_ Net-_R10-Pad1_ 1k 40 | XU103 0 Net-_R101-Pad1_ VCC VEE signal_out TL074 41 | R102 signal_out Net-_R101-Pad1_ 23k 42 | R121 Net-_R121-Pad1_ signal_out 100k 43 | XU104 0 Net-_R121-Pad1_ VCC VEE Net-_R122-Pad1_ TL074 44 | R122 Net-_R122-Pad1_ Net-_R121-Pad1_ 10k 45 | R123 Net-_C121-Pad1_ Net-_R122-Pad1_ 1k 46 | C121 Net-_C121-Pad1_ Net-_C121-Pad2_ 100u 47 | V4 signal_in 0 SIN(0 2 1000) 48 | .end 49 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_opamp_instramp-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_C 5 | # 6 | DEF Device_C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "Device_C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | C_* 13 | $ENDFPLIST 14 | DRAW 15 | P 2 0 1 20 -80 -30 80 -30 N 16 | P 2 0 1 20 -80 30 80 30 N 17 | X ~ 1 0 150 110 D 50 50 1 1 P 18 | X ~ 2 0 -150 110 U 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Device_R 23 | # 24 | DEF Device_R R 0 0 N Y 1 F N 25 | F0 "R" 80 0 50 V V C CNN 26 | F1 "Device_R" 0 0 50 V V C CNN 27 | F2 "" -70 0 50 V I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | $FPLIST 30 | R_* 31 | $ENDFPLIST 32 | DRAW 33 | S -40 -100 40 100 0 1 10 N 34 | X ~ 1 0 150 50 D 50 50 1 1 P 35 | X ~ 2 0 -150 50 U 50 50 1 1 P 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # power_GND 40 | # 41 | DEF power_GND #PWR 0 0 Y Y 1 F P 42 | F0 "#PWR" 0 -250 50 H I C CNN 43 | F1 "power_GND" 0 -150 50 H V C CNN 44 | F2 "" 0 0 50 H I C CNN 45 | F3 "" 0 0 50 H I C CNN 46 | DRAW 47 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 48 | X GND 1 0 0 0 D 50 50 1 1 W N 49 | ENDDRAW 50 | ENDDEF 51 | # 52 | # power_VCC 53 | # 54 | DEF power_VCC #PWR 0 0 Y Y 1 F P 55 | F0 "#PWR" 0 -150 50 H I C CNN 56 | F1 "power_VCC" 0 150 50 H V C CNN 57 | F2 "" 0 0 50 H I C CNN 58 | F3 "" 0 0 50 H I C CNN 59 | DRAW 60 | P 2 0 1 0 -30 50 0 100 N 61 | P 2 0 1 0 0 0 0 100 N 62 | P 2 0 1 0 0 100 30 50 N 63 | X VCC 1 0 0 0 U 50 50 1 1 W N 64 | ENDDRAW 65 | ENDDEF 66 | # 67 | # power_VEE 68 | # 69 | DEF power_VEE #PWR 0 0 Y Y 1 F P 70 | F0 "#PWR" 0 -150 50 H I C CNN 71 | F1 "power_VEE" 0 150 50 H V C CNN 72 | F2 "" 0 0 50 H I C CNN 73 | F3 "" 0 0 50 H I C CNN 74 | DRAW 75 | P 2 0 1 0 0 0 0 100 N 76 | P 4 0 1 0 30 50 -30 50 0 100 30 50 F 77 | X VEE 1 0 0 0 U 50 50 1 1 W N 78 | ENDDRAW 79 | ENDDEF 80 | # 81 | # pspice_0 82 | # 83 | DEF pspice_0 #GND 0 0 Y Y 1 F P 84 | F0 "#GND" 0 -100 50 H I C CNN 85 | F1 "pspice_0" 0 -70 50 H V C CNN 86 | F2 "" 0 0 50 H I C CNN 87 | F3 "" 0 0 50 H I C CNN 88 | DRAW 89 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 90 | X 0 1 0 0 0 R 40 40 1 1 W N 91 | ENDDRAW 92 | ENDDEF 93 | # 94 | # pspice_ISOURCE 95 | # 96 | DEF pspice_ISOURCE I 0 40 Y Y 1 F N 97 | F0 "I" -300 350 50 H V C CNN 98 | F1 "pspice_ISOURCE" 0 0 50 H V C CNN 99 | F2 "" 0 0 50 H I C CNN 100 | F3 "" 0 0 50 H I C CNN 101 | DRAW 102 | C 0 -100 200 0 1 0 N 103 | C 0 100 202 0 1 0 N 104 | T 0 -270 -10 50 0 0 1 I Normal 0 C C 105 | P 2 0 1 0 -300 -200 -300 200 F 106 | P 3 0 1 0 -350 200 -300 300 -250 200 F 107 | X E1 1 0 400 100 D 50 50 1 1 I 108 | X E2 2 0 -400 100 U 50 50 1 1 I 109 | ENDDRAW 110 | ENDDEF 111 | # 112 | # pspice_OPAMP 113 | # 114 | DEF pspice_OPAMP U 0 10 Y Y 1 F N 115 | F0 "U" 150 125 50 H V L CNN 116 | F1 "pspice_OPAMP" 150 -125 50 H V L CNN 117 | F2 "" 0 0 50 H I C CNN 118 | F3 "" 0 0 50 H I C CNN 119 | DRAW 120 | P 4 0 1 10 200 0 -200 200 -200 -200 200 0 f 121 | X + 1 -300 100 100 R 50 50 1 1 I 122 | X - 2 -300 -100 100 R 50 50 1 1 I 123 | X ~ 3 300 0 100 L 50 50 1 1 O 124 | X V+ 4 -100 300 150 D 50 50 1 1 W 125 | X V- 5 -100 -300 150 U 50 50 1 1 W 126 | ENDDRAW 127 | ENDDEF 128 | # 129 | # pspice_QPNP 130 | # 131 | DEF pspice_QPNP Q 0 0 Y Y 1 F N 132 | F0 "Q" -100 300 50 H V C CNN 133 | F1 "pspice_QPNP" -100 200 50 H V C CNN 134 | F2 "" 0 0 50 H I C CNN 135 | F3 "" 0 0 50 H I C CNN 136 | DRAW 137 | P 2 0 1 0 0 -150 0 150 N 138 | P 2 0 1 0 0 0 150 -150 N 139 | P 2 0 1 0 0 0 150 150 N 140 | P 3 0 1 0 -100 -150 0 -150 0 -150 N 141 | P 4 0 1 0 120 -180 180 -120 85 -85 120 -180 F 142 | X C 1 150 350 200 D 40 40 1 1 C 143 | X B 2 -300 0 300 R 40 40 1 1 I 144 | X E 3 150 -350 200 U 40 40 1 1 E 145 | X Substrat 4 -100 -350 200 U 50 20 1 1 I 146 | ENDDRAW 147 | ENDDEF 148 | # 149 | # pspice_VSOURCE 150 | # 151 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 152 | F0 "V" -250 300 50 H V C CNN 153 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 154 | F2 "" 0 0 50 H I C CNN 155 | F3 "" 0 0 50 H I C CNN 156 | DRAW 157 | C 0 0 200 0 1 0 N 158 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 159 | P 2 0 1 0 -250 -250 -250 150 F 160 | P 3 0 1 0 -300 150 -250 250 -200 150 F 161 | X E1 1 0 300 100 D 50 50 1 1 I 162 | X E2 2 0 -300 100 U 50 50 1 1 I 163 | ENDDRAW 164 | ENDDEF 165 | # 166 | #End Library 167 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_opamp_instramp.cir: -------------------------------------------------------------------------------- 1 | .title KiCad schematic 2 | .include "/home/flo/analog-synth/simulation/lib/BC547_557.lib" 3 | .include "/home/flo/analog-synth/simulation/lib/TL074.ti.lib" 4 | Q4 diff2 Net-_Q2-Pad2_ Net-_C4-Pad1_ NC_01 BC557b 5 | Q2 diff1 Net-_Q2-Pad2_ Net-_C4-Pad2_ NC_02 BC557b 6 | R3 0 signal_preatt 1k 7 | V4 signal_in 0 SIN(0 2 1000) 8 | Q12 VEE foo diff2 NC_03 BC557b 9 | Q8 VEE foo diff1 NC_04 BC557b 10 | Q11 Net-_C4-Pad1_ Net-_Q11-Pad2_ Net-_C3-Pad1_ NC_05 BC557b 11 | Q7 Net-_C4-Pad2_ Net-_Q11-Pad2_ Net-_C3-Pad2_ NC_06 BC557b 12 | Q10 Net-_C3-Pad1_ Net-_Q10-Pad2_ Net-_C2-Pad1_ NC_07 BC557b 13 | Q6 Net-_C3-Pad2_ Net-_Q10-Pad2_ Net-_C2-Pad2_ NC_08 BC557b 14 | R11 Net-_Q10-Pad2_ Net-_Q11-Pad2_ 150 15 | R12 Net-_Q11-Pad2_ Net-_Q2-Pad2_ 150 16 | R13 Net-_Q2-Pad2_ foo 150 17 | R14 foo VEE 220 18 | R6 Net-_R15-Pad1_ Net-_Q10-Pad2_ 150 19 | R4 0 Net-_R15-Pad1_ 180 20 | Q5 Net-_C2-Pad2_ Net-_C6-Pad1_ Net-_I1-Pad2_ NC_09 BC557b 21 | R10 signal_out Net-_R10-Pad2_ 22k 22 | Q9 Net-_C2-Pad1_ Net-_Q9-Pad2_ Net-_I1-Pad2_ NC_10 BC557b 23 | R2 signal_in signal_preatt 100k 24 | R15 Net-_R15-Pad1_ Net-_Q9-Pad2_ 470 25 | R5 Net-_R15-Pad1_ Net-_C6-Pad1_ 470 26 | C5 diff2 diff1 47n 27 | V1 VCC 0 5 28 | V2 0 VEE 5 29 | C4 Net-_C4-Pad1_ Net-_C4-Pad2_ 47n 30 | C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 47n 31 | C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 47n 32 | I1 0 Net-_I1-Pad2_ 0.01m 33 | C6 Net-_C6-Pad1_ signal_preatt 10u 34 | R9 Net-_R7-Pad1_ 0 22k 35 | XU2 Net-_R7-Pad1_ Net-_R10-Pad2_ VCC VEE signal_out TL074 36 | R7 Net-_R7-Pad1_ Net-_R112-Pad1_ 1k 37 | R8 Net-_R10-Pad2_ Net-_R113-Pad1_ 1k 38 | XU101 diff1 Net-_R111-Pad2_ VCC VEE Net-_R112-Pad1_ TL074 39 | XU102 diff2 Net-_R111-Pad1_ VCC VEE Net-_R113-Pad1_ TL074 40 | R112 Net-_R112-Pad1_ Net-_R111-Pad2_ 10k 41 | R113 Net-_R113-Pad1_ Net-_R111-Pad1_ 10k 42 | R111 Net-_R111-Pad1_ Net-_R111-Pad2_ 1k 43 | .end 44 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_buffered_opamp_instramp2.cir: -------------------------------------------------------------------------------- 1 | .title KiCad schematic 2 | .include "/home/flo/analog-synth/simulation/lib/BC547_557.lib" 3 | .include "/home/flo/analog-synth/simulation/lib/TL074.ti.lib" 4 | Q4 diff2 Net-_Q2-Pad2_ Net-_C4-Pad1_ NC_01 BC557b 5 | Q2 diff1 Net-_Q2-Pad2_ Net-_C4-Pad2_ NC_02 BC557b 6 | R3 0 signal_preatt 1k 7 | V4 signal_in 0 SIN(0 2 1000) 8 | Q12 VEE foo diff2 NC_03 BC557b 9 | Q8 VEE foo diff1 NC_04 BC557b 10 | Q11 Net-_C4-Pad1_ Net-_Q11-Pad2_ Net-_C3-Pad1_ NC_05 BC557b 11 | Q7 Net-_C4-Pad2_ Net-_Q11-Pad2_ Net-_C3-Pad2_ NC_06 BC557b 12 | Q10 Net-_C3-Pad1_ Net-_Q10-Pad2_ Net-_C2-Pad1_ NC_07 BC557b 13 | Q6 Net-_C3-Pad2_ Net-_Q10-Pad2_ Net-_C2-Pad2_ NC_08 BC557b 14 | R11 Net-_Q10-Pad2_ Net-_Q11-Pad2_ 150 15 | R12 Net-_Q11-Pad2_ Net-_Q2-Pad2_ 150 16 | R13 Net-_Q2-Pad2_ foo 150 17 | R14 foo VEE 220 18 | R6 Net-_R15-Pad1_ Net-_Q10-Pad2_ 150 19 | R4 0 Net-_R15-Pad1_ 180 20 | Q5 Net-_C2-Pad2_ Net-_C6-Pad1_ Net-_I1-Pad2_ NC_09 BC557b 21 | R10 signal_out Net-_R10-Pad2_ 22k 22 | Q9 Net-_C2-Pad1_ Net-_Q9-Pad2_ Net-_I1-Pad2_ NC_10 BC557b 23 | R2 signal_in signal_preatt 100k 24 | R15 Net-_R15-Pad1_ Net-_Q9-Pad2_ 470 25 | R5 Net-_R15-Pad1_ Net-_C6-Pad1_ 470 26 | C5 diff2 diff1 47n 27 | V1 VCC 0 5 28 | V2 0 VEE 5 29 | C4 Net-_C4-Pad1_ Net-_C4-Pad2_ 47n 30 | C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 47n 31 | C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 47n 32 | I1 0 Net-_I1-Pad2_ 0.01m 33 | C6 Net-_C6-Pad1_ signal_preatt 10u 34 | R9 Net-_R7-Pad1_ 0 22k 35 | XU2 Net-_R7-Pad1_ Net-_R10-Pad2_ VCC VEE signal_out TL074 36 | R7 Net-_R7-Pad1_ Net-_R112-Pad1_ 1k 37 | R8 Net-_R10-Pad2_ Net-_R113-Pad1_ 1k 38 | XU101 diff1 Net-_R111-Pad2_ VCC VEE Net-_R112-Pad1_ TL074 39 | XU102 diff2 Net-_R111-Pad1_ VCC VEE Net-_R113-Pad1_ TL074 40 | R112 Net-_R112-Pad1_ Net-_R111-Pad2_ 100k 41 | R113 Net-_R113-Pad1_ Net-_R111-Pad1_ 100k 42 | R111 Net-_R111-Pad1_ Net-_R111-Pad2_ 10k 43 | .end 44 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_unbuffered-cache.lib: -------------------------------------------------------------------------------- 1 | EESchema-LIBRARY Version 2.4 2 | #encoding utf-8 3 | # 4 | # Device_C 5 | # 6 | DEF Device_C C 0 10 N Y 1 F N 7 | F0 "C" 25 100 50 H V L CNN 8 | F1 "Device_C" 25 -100 50 H V L CNN 9 | F2 "" 38 -150 50 H I C CNN 10 | F3 "" 0 0 50 H I C CNN 11 | $FPLIST 12 | C_* 13 | $ENDFPLIST 14 | DRAW 15 | P 2 0 1 20 -80 -30 80 -30 N 16 | P 2 0 1 20 -80 30 80 30 N 17 | X ~ 1 0 150 110 D 50 50 1 1 P 18 | X ~ 2 0 -150 110 U 50 50 1 1 P 19 | ENDDRAW 20 | ENDDEF 21 | # 22 | # Device_R 23 | # 24 | DEF Device_R R 0 0 N Y 1 F N 25 | F0 "R" 80 0 50 V V C CNN 26 | F1 "Device_R" 0 0 50 V V C CNN 27 | F2 "" -70 0 50 V I C CNN 28 | F3 "" 0 0 50 H I C CNN 29 | $FPLIST 30 | R_* 31 | $ENDFPLIST 32 | DRAW 33 | S -40 -100 40 100 0 1 10 N 34 | X ~ 1 0 150 50 D 50 50 1 1 P 35 | X ~ 2 0 -150 50 U 50 50 1 1 P 36 | ENDDRAW 37 | ENDDEF 38 | # 39 | # power_GND 40 | # 41 | DEF power_GND #PWR 0 0 Y Y 1 F P 42 | F0 "#PWR" 0 -250 50 H I C CNN 43 | F1 "power_GND" 0 -150 50 H V C CNN 44 | F2 "" 0 0 50 H I C CNN 45 | F3 "" 0 0 50 H I C CNN 46 | DRAW 47 | P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N 48 | X GND 1 0 0 0 D 50 50 1 1 W N 49 | ENDDRAW 50 | ENDDEF 51 | # 52 | # power_VCC 53 | # 54 | DEF power_VCC #PWR 0 0 Y Y 1 F P 55 | F0 "#PWR" 0 -150 50 H I C CNN 56 | F1 "power_VCC" 0 150 50 H V C CNN 57 | F2 "" 0 0 50 H I C CNN 58 | F3 "" 0 0 50 H I C CNN 59 | DRAW 60 | P 2 0 1 0 -30 50 0 100 N 61 | P 2 0 1 0 0 0 0 100 N 62 | P 2 0 1 0 0 100 30 50 N 63 | X VCC 1 0 0 0 U 50 50 1 1 W N 64 | ENDDRAW 65 | ENDDEF 66 | # 67 | # power_VEE 68 | # 69 | DEF power_VEE #PWR 0 0 Y Y 1 F P 70 | F0 "#PWR" 0 -150 50 H I C CNN 71 | F1 "power_VEE" 0 150 50 H V C CNN 72 | F2 "" 0 0 50 H I C CNN 73 | F3 "" 0 0 50 H I C CNN 74 | DRAW 75 | P 2 0 1 0 0 0 0 100 N 76 | P 4 0 1 0 30 50 -30 50 0 100 30 50 F 77 | X VEE 1 0 0 0 U 50 50 1 1 W N 78 | ENDDRAW 79 | ENDDEF 80 | # 81 | # pspice_0 82 | # 83 | DEF pspice_0 #GND 0 0 Y Y 1 F P 84 | F0 "#GND" 0 -100 50 H I C CNN 85 | F1 "pspice_0" 0 -70 50 H V C CNN 86 | F2 "" 0 0 50 H I C CNN 87 | F3 "" 0 0 50 H I C CNN 88 | DRAW 89 | P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N 90 | X 0 1 0 0 0 R 40 40 1 1 W N 91 | ENDDRAW 92 | ENDDEF 93 | # 94 | # pspice_ISOURCE 95 | # 96 | DEF pspice_ISOURCE I 0 40 Y Y 1 F N 97 | F0 "I" -300 350 50 H V C CNN 98 | F1 "pspice_ISOURCE" 0 0 50 H V C CNN 99 | F2 "" 0 0 50 H I C CNN 100 | F3 "" 0 0 50 H I C CNN 101 | DRAW 102 | C 0 -100 200 0 1 0 N 103 | C 0 100 202 0 1 0 N 104 | T 0 -270 -10 50 0 0 1 I Normal 0 C C 105 | P 2 0 1 0 -300 -200 -300 200 F 106 | P 3 0 1 0 -350 200 -300 300 -250 200 F 107 | X E1 1 0 400 100 D 50 50 1 1 I 108 | X E2 2 0 -400 100 U 50 50 1 1 I 109 | ENDDRAW 110 | ENDDEF 111 | # 112 | # pspice_OPAMP 113 | # 114 | DEF pspice_OPAMP U 0 10 Y Y 1 F N 115 | F0 "U" 150 125 50 H V L CNN 116 | F1 "pspice_OPAMP" 150 -125 50 H V L CNN 117 | F2 "" 0 0 50 H I C CNN 118 | F3 "" 0 0 50 H I C CNN 119 | DRAW 120 | P 4 0 1 10 200 0 -200 200 -200 -200 200 0 f 121 | X + 1 -300 100 100 R 50 50 1 1 I 122 | X - 2 -300 -100 100 R 50 50 1 1 I 123 | X ~ 3 300 0 100 L 50 50 1 1 O 124 | X V+ 4 -100 300 150 D 50 50 1 1 W 125 | X V- 5 -100 -300 150 U 50 50 1 1 W 126 | ENDDRAW 127 | ENDDEF 128 | # 129 | # pspice_QPNP 130 | # 131 | DEF pspice_QPNP Q 0 0 Y Y 1 F N 132 | F0 "Q" -100 300 50 H V C CNN 133 | F1 "pspice_QPNP" -100 200 50 H V C CNN 134 | F2 "" 0 0 50 H I C CNN 135 | F3 "" 0 0 50 H I C CNN 136 | DRAW 137 | P 2 0 1 0 0 -150 0 150 N 138 | P 2 0 1 0 0 0 150 -150 N 139 | P 2 0 1 0 0 0 150 150 N 140 | P 3 0 1 0 -100 -150 0 -150 0 -150 N 141 | P 4 0 1 0 120 -180 180 -120 85 -85 120 -180 F 142 | X C 1 150 350 200 D 40 40 1 1 C 143 | X B 2 -300 0 300 R 40 40 1 1 I 144 | X E 3 150 -350 200 U 40 40 1 1 E 145 | X Substrat 4 -100 -350 200 U 50 20 1 1 I 146 | ENDDRAW 147 | ENDDEF 148 | # 149 | # pspice_VSOURCE 150 | # 151 | DEF pspice_VSOURCE V 0 40 Y Y 1 F N 152 | F0 "V" -250 300 50 H V C CNN 153 | F1 "pspice_VSOURCE" 0 0 50 H V C CNN 154 | F2 "" 0 0 50 H I C CNN 155 | F3 "" 0 0 50 H I C CNN 156 | DRAW 157 | C 0 0 200 0 1 0 N 158 | T 0 -320 -10 50 0 0 1 V Normal 0 C C 159 | P 2 0 1 0 -250 -250 -250 150 F 160 | P 3 0 1 0 -300 150 -250 250 -200 150 F 161 | X E1 1 0 300 100 D 50 50 1 1 I 162 | X E2 2 0 -300 100 U 50 50 1 1 I 163 | ENDDRAW 164 | ENDDEF 165 | # 166 | #End Library 167 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_unbuffered.cir: -------------------------------------------------------------------------------- 1 | .title KiCad schematic 2 | .include "/home/flo/analog-synth/simulation/lib/BC547_557.lib" 3 | .include "/home/flo/analog-synth/simulation/lib/TL074.ti.lib" 4 | Q4 diff1 Net-_Q2-Pad2_ Net-_C4-Pad1_ NC_01 BC557b 5 | Q2 diff2 Net-_Q2-Pad2_ Net-_C4-Pad2_ NC_02 BC557b 6 | R3 0 signal_preatt 1k 7 | V4 signal_in 0 SIN(0 2 1000) 8 | Q12 VEE foo diff1 NC_03 BC557b 9 | Q8 VEE foo diff2 NC_04 BC557b 10 | Q11 Net-_C4-Pad1_ Net-_Q11-Pad2_ Net-_C3-Pad1_ NC_05 BC557b 11 | Q7 Net-_C4-Pad2_ Net-_Q11-Pad2_ Net-_C3-Pad2_ NC_06 BC557b 12 | Q10 Net-_C3-Pad1_ Net-_Q10-Pad2_ Net-_C2-Pad1_ NC_07 BC557b 13 | Q6 Net-_C3-Pad2_ Net-_Q10-Pad2_ Net-_C2-Pad2_ NC_08 BC557b 14 | R11 Net-_Q10-Pad2_ Net-_Q11-Pad2_ 150 15 | R12 Net-_Q11-Pad2_ Net-_Q2-Pad2_ 150 16 | R13 Net-_Q2-Pad2_ foo 150 17 | R14 foo VEE 220 18 | R6 Net-_R15-Pad1_ Net-_Q10-Pad2_ 150 19 | R4 0 Net-_R15-Pad1_ 180 20 | Q5 Net-_C2-Pad2_ Net-_C6-Pad1_ Net-_I1-Pad2_ NC_09 BC557b 21 | R10 signal_out Net-_R10-Pad2_ 500k 22 | Q9 Net-_C2-Pad1_ Net-_Q9-Pad2_ Net-_I1-Pad2_ NC_10 BC557b 23 | R2 signal_in signal_preatt 100k 24 | R15 Net-_R15-Pad1_ Net-_Q9-Pad2_ 470 25 | R5 Net-_R15-Pad1_ Net-_C6-Pad1_ 470 26 | C5 diff1 diff2 47n 27 | V1 VCC 0 5 28 | V2 0 VEE 5 29 | C4 Net-_C4-Pad1_ Net-_C4-Pad2_ 47n 30 | C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 47n 31 | C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 47n 32 | I1 0 Net-_I1-Pad2_ 0.01m 33 | C6 Net-_C6-Pad1_ signal_preatt 10u 34 | R9 Net-_R7-Pad1_ 0 500k 35 | XU2 Net-_R7-Pad1_ Net-_R10-Pad2_ VCC VEE signal_out TL074 36 | R7 Net-_R7-Pad1_ diff1 1k 37 | R8 Net-_R10-Pad2_ diff2 1k 38 | .end 39 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_unbuffered.pro: -------------------------------------------------------------------------------- 1 | update=22/05/2015 07:44:53 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_unbuffered_capacitors1.cir: -------------------------------------------------------------------------------- 1 | .title KiCad schematic 2 | .include "/home/flo/analog-synth/simulation/lib/BC547_557.lib" 3 | .include "/home/flo/analog-synth/simulation/lib/TL074.ti.lib" 4 | Q4 diff1 Net-_Q2-Pad2_ Net-_C4-Pad1_ NC_01 BC557b 5 | Q2 diff2 Net-_Q2-Pad2_ Net-_C4-Pad2_ NC_02 BC557b 6 | R3 0 signal_preatt 1k 7 | V4 signal_in 0 SIN(0 2 1000) 8 | Q12 VEE foo diff1 NC_03 BC557b 9 | Q8 VEE foo diff2 NC_04 BC557b 10 | Q11 Net-_C4-Pad1_ Net-_Q11-Pad2_ Net-_C3-Pad1_ NC_05 BC557b 11 | Q7 Net-_C4-Pad2_ Net-_Q11-Pad2_ Net-_C3-Pad2_ NC_06 BC557b 12 | Q10 Net-_C3-Pad1_ Net-_Q10-Pad2_ Net-_C2-Pad1_ NC_07 BC557b 13 | Q6 Net-_C3-Pad2_ Net-_Q10-Pad2_ Net-_C2-Pad2_ NC_08 BC557b 14 | R11 Net-_Q10-Pad2_ Net-_Q11-Pad2_ 150 15 | R12 Net-_Q11-Pad2_ Net-_Q2-Pad2_ 150 16 | R13 Net-_Q2-Pad2_ foo 150 17 | R14 foo VEE 220 18 | R6 Net-_R15-Pad1_ Net-_Q10-Pad2_ 150 19 | R4 0 Net-_R15-Pad1_ 180 20 | Q5 Net-_C2-Pad2_ Net-_C6-Pad1_ Net-_I1-Pad2_ NC_09 BC557b 21 | R10 signal_out Net-_C101-Pad2_ 500k 22 | Q9 Net-_C2-Pad1_ Net-_Q9-Pad2_ Net-_I1-Pad2_ NC_10 BC557b 23 | R2 signal_in signal_preatt 100k 24 | R15 Net-_R15-Pad1_ Net-_Q9-Pad2_ 470 25 | R5 Net-_R15-Pad1_ Net-_C6-Pad1_ 470 26 | C5 diff1 diff2 47n 27 | V1 VCC 0 5 28 | V2 0 VEE 5 29 | C4 Net-_C4-Pad1_ Net-_C4-Pad2_ 47n 30 | C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 47n 31 | C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 47n 32 | I1 0 Net-_I1-Pad2_ 0.01m 33 | C6 Net-_C6-Pad1_ signal_preatt 10u 34 | R9 Net-_C101-Pad1_ 0 500k 35 | XU2 Net-_C101-Pad1_ Net-_C101-Pad2_ VCC VEE signal_out TL074 36 | R7 Net-_C101-Pad1_ diff1 1k 37 | R8 Net-_C101-Pad2_ diff2 1k 38 | C101 Net-_C101-Pad1_ Net-_C101-Pad2_ 27p 39 | C102 signal_out Net-_C101-Pad2_ 2.2n 40 | .end 41 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_unbuffered_capacitors1.pro: -------------------------------------------------------------------------------- 1 | update=Sat 30 Jan 2021 11:56:27 PM CET 2 | version=1 3 | last_client=eeschema 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | [schematic_editor] 35 | version=1 36 | PageLayoutDescrFile= 37 | PlotDirectoryName= 38 | SubpartIdSeparator=0 39 | SubpartFirstId=65 40 | NetFmtName=Pcbnew 41 | SpiceAjustPassiveValues=0 42 | LabSize=50 43 | ERC_TestSimilarLabels=1 44 | -------------------------------------------------------------------------------- /simulation/vcf/vcf_unbuffered_capacitors2.cir: -------------------------------------------------------------------------------- 1 | .title KiCad schematic 2 | .include "/home/flo/analog-synth/simulation/lib/BC547_557.lib" 3 | .include "/home/flo/analog-synth/simulation/lib/TL074.ti.lib" 4 | Q4 diff1 Net-_Q2-Pad2_ Net-_C4-Pad1_ NC_01 BC557b 5 | Q2 diff2 Net-_Q2-Pad2_ Net-_C4-Pad2_ NC_02 BC557b 6 | R3 0 signal_preatt 1k 7 | V4 signal_in 0 SIN(0 2 1000) 8 | Q12 VEE foo diff1 NC_03 BC557b 9 | Q8 VEE foo diff2 NC_04 BC557b 10 | Q11 Net-_C4-Pad1_ Net-_Q11-Pad2_ Net-_C3-Pad1_ NC_05 BC557b 11 | Q7 Net-_C4-Pad2_ Net-_Q11-Pad2_ Net-_C3-Pad2_ NC_06 BC557b 12 | Q10 Net-_C3-Pad1_ Net-_Q10-Pad2_ Net-_C2-Pad1_ NC_07 BC557b 13 | Q6 Net-_C3-Pad2_ Net-_Q10-Pad2_ Net-_C2-Pad2_ NC_08 BC557b 14 | R11 Net-_Q10-Pad2_ Net-_Q11-Pad2_ 150 15 | R12 Net-_Q11-Pad2_ Net-_Q2-Pad2_ 150 16 | R13 Net-_Q2-Pad2_ foo 150 17 | R14 foo VEE 220 18 | R6 Net-_R15-Pad1_ Net-_Q10-Pad2_ 150 19 | R4 0 Net-_R15-Pad1_ 180 20 | Q5 Net-_C2-Pad2_ Net-_C111-Pad1_ Net-_C112-Pad2_ NC_09 BC557b 21 | R10 signal_out Net-_C101-Pad2_ 500k 22 | Q9 Net-_C2-Pad1_ Net-_C113-Pad1_ Net-_C112-Pad2_ NC_10 BC557b 23 | R2 signal_in signal_preatt 100k 24 | R15 Net-_R15-Pad1_ Net-_C113-Pad1_ 470 25 | R5 Net-_R15-Pad1_ Net-_C111-Pad1_ 470 26 | C5 diff1 diff2 47n 27 | V1 VCC 0 5 28 | V2 0 VEE 5 29 | C4 Net-_C4-Pad1_ Net-_C4-Pad2_ 47n 30 | C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 47n 31 | C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 47n 32 | I1 0 Net-_C112-Pad2_ 0.01m 33 | C6 Net-_C111-Pad1_ signal_preatt 10u 34 | R9 Net-_C101-Pad1_ 0 500k 35 | XU2 Net-_C101-Pad1_ Net-_C101-Pad2_ VCC VEE signal_out TL074 36 | R7 Net-_C101-Pad1_ diff1 1k 37 | R8 Net-_C101-Pad2_ diff2 1k 38 | C101 Net-_C101-Pad1_ Net-_C101-Pad2_ 27p 39 | C102 signal_out Net-_C101-Pad2_ 2.2n 40 | C111 Net-_C111-Pad1_ 0 2.2n 41 | C113 Net-_C113-Pad1_ 0 4.7n 42 | C112 0 Net-_C112-Pad2_ 4.7n 43 | .end 44 | -------------------------------------------------------------------------------- /simulation/vco/BC546.lib: -------------------------------------------------------------------------------- 1 | .model BC546B npn ( IS=7.59E-15 VAF=73.4 BF=480 IKF=0.0962 NE=1.2665 ISE=3.278E-15 IKR=0.03 ISC=2.00E-13 NC=1.2 NR=1 BR=5 RC=0.25 CJC=6.33E-12 FC=0.5 MJC=0.33 VJC=0.65 CJE=1.25E-11 MJE=0.55 VJE=0.65 TF=4.26E-10 ITF=0.6 VTF=3 XTF=20 RB=100 IRB=0.0001 RBM=10 RE=0.5 TR=1.50E-07) 2 | -------------------------------------------------------------------------------- /simulation/vco/LM324.ti.lib: -------------------------------------------------------------------------------- 1 | * fetched on 2015/3/15 from http://www.ti.com/lit/zip/sloj043 2 | * LM324 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT 3 | * CREATED USING PARTS RELEASE 4.01 ON 09/08/89 AT 10:54 4 | * (REV N/A) SUPPLY VOLTAGE: 5V 5 | * CONNECTIONS: NON-INVERTING INPUT 6 | * | INVERTING INPUT 7 | * | | POSITIVE POWER SUPPLY 8 | * | | | NEGATIVE POWER SUPPLY 9 | * | | | | OUTPUT 10 | * | | | | | 11 | .SUBCKT LM324 1 2 3 4 5 12 | * 13 | C1 11 12 5.544E-12 14 | C2 6 7 20.00E-12 15 | DC 5 53 DX 16 | DE 54 5 DX 17 | DLP 90 91 DX 18 | DLN 92 90 DX 19 | DP 4 3 DX 20 | EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5 21 | FB 7 99 POLY(5) VB VC VE VLP VLN 0 15.91E6 -20E6 20E6 20E6 -20E6 22 | GA 6 0 11 12 125.7E-6 23 | GCM 0 6 10 99 7.067E-9 24 | IEE 3 10 DC 10.04E-6 25 | HLIM 90 0 VLIM 1K 26 | Q1 11 2 13 QX 27 | Q2 12 1 14 QX 28 | R2 6 9 100.0E3 29 | RC1 4 11 7.957E3 30 | RC2 4 12 7.957E3 31 | RE1 13 10 2.773E3 32 | RE2 14 10 2.773E3 33 | REE 10 99 19.92E6 34 | RO1 8 5 50 35 | RO2 7 99 50 36 | RP 3 4 30.31E3 37 | VB 9 0 DC 0 38 | VC 3 53 DC 2.100 39 | VE 54 4 DC .6 40 | VLIM 7 8 DC 0 41 | VLP 91 0 DC 40 42 | VLN 0 92 DC 40 43 | .MODEL DX D(IS=800.0E-18) 44 | .MODEL QX PNP(IS=800.0E-18 BF=250) 45 | .ENDS -------------------------------------------------------------------------------- /simulation/vco/vco.kicad_pcb: -------------------------------------------------------------------------------- 1 | (kicad_pcb (version 4) (host kicad "dummy file") ) 2 | -------------------------------------------------------------------------------- /simulation/vco/vco.pro: -------------------------------------------------------------------------------- 1 | update=Wed 05 Feb 2020 11:10:23 PM CET 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | [schematic_editor] 35 | version=1 36 | PageLayoutDescrFile= 37 | PlotDirectoryName= 38 | SubpartIdSeparator=0 39 | SubpartFirstId=65 40 | NetFmtName=Spice 41 | SpiceAjustPassiveValues=0 42 | LabSize=50 43 | ERC_TestSimilarLabels=1 44 | --------------------------------------------------------------------------------