├── LICENSE ├── README.md ├── darwin_x86_64 └── README.md ├── linux_x86_64 ├── README.md ├── lib │ ├── libc.so.6 │ ├── libftdi1.so.2 │ ├── libhidapi-hidraw.so.0 │ ├── libm.so.6 │ ├── libusb-0.1.so.4 │ └── libusb-1.0.so.0 └── picoprobe ├── linux_x86_64_old ├── README.md └── picoprobe ├── package.json ├── picoprobe.uf2 ├── share └── openocd │ └── scripts │ ├── bitsbytes.tcl │ ├── interface │ ├── cmsis-dap.cfg │ ├── jlink.cfg │ └── picoprobe.cfg │ ├── mem_helper.tcl │ ├── memory.tcl │ ├── mmr_helpers.tcl │ └── target │ ├── rp2040-core0.cfg │ ├── rp2040-core1.cfg │ ├── rp2040-rescue.cfg │ ├── rp2040.cfg │ └── swj-dp.tcl └── windows ├── ftd2xx.dll ├── libusb-1.0.dll ├── libusb0.dll ├── openocd.exe ├── openocd_hla_multicore.exe ├── openocd_rp2040.exe └── picoprobe.exe /LICENSE: -------------------------------------------------------------------------------- 1 | Apache License 2 | Version 2.0, January 2004 3 | http://www.apache.org/licenses/ 4 | 5 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION 6 | 7 | 1. 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We also recommend that a 185 | file or class name and description of purpose be included on the 186 | same "printed page" as the copyright notice for easier 187 | identification within third-party archives. 188 | 189 | Copyright [yyyy] [name of copyright owner] 190 | 191 | Licensed under the Apache License, Version 2.0 (the "License"); 192 | you may not use this file except in compliance with the License. 193 | You may obtain a copy of the License at 194 | 195 | http://www.apache.org/licenses/LICENSE-2.0 196 | 197 | Unless required by applicable law or agreed to in writing, software 198 | distributed under the License is distributed on an "AS IS" BASIS, 199 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 200 | See the License for the specific language governing permissions and 201 | limitations under the License. 202 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # [Raspberry Pi Pico development platform for PlatformIO](https://github.com/Wiz-IO/wizio-pico) 2 | 3 | Raspberry Pi RP2040 OpenOCD 4 | -------------------------------------------------------------------------------- /darwin_x86_64/README.md: -------------------------------------------------------------------------------- 1 | # macOS 2 | ## Raspberry Pi RP2040 OpenOCD 3 | 4 | * Compile [OpenOCD](https://github.com/raspberrypi/openocd) and paste executables here ( see windows folder ) 5 | * Rename openocd to **openocd_rp2040** 6 | -------------------------------------------------------------------------------- /linux_x86_64/README.md: -------------------------------------------------------------------------------- 1 | # Linux 2 | ## Raspberry Pi RP2040 OpenOCD 3 | 4 | * Compile [OpenOCD](https://github.com/raspberrypi/openocd) and paste executables here ( see windows folder ) 5 | * Rename openocd to **openocd_rp2040** 6 | -------------------------------------------------------------------------------- /linux_x86_64/lib/libc.so.6: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/linux_x86_64/lib/libc.so.6 -------------------------------------------------------------------------------- /linux_x86_64/lib/libftdi1.so.2: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/linux_x86_64/lib/libftdi1.so.2 -------------------------------------------------------------------------------- /linux_x86_64/lib/libhidapi-hidraw.so.0: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/linux_x86_64/lib/libhidapi-hidraw.so.0 -------------------------------------------------------------------------------- /linux_x86_64/lib/libm.so.6: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/linux_x86_64/lib/libm.so.6 -------------------------------------------------------------------------------- /linux_x86_64/lib/libusb-0.1.so.4: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/linux_x86_64/lib/libusb-0.1.so.4 -------------------------------------------------------------------------------- /linux_x86_64/lib/libusb-1.0.so.0: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/linux_x86_64/lib/libusb-1.0.so.0 -------------------------------------------------------------------------------- /linux_x86_64/picoprobe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/linux_x86_64/picoprobe -------------------------------------------------------------------------------- /linux_x86_64_old/README.md: -------------------------------------------------------------------------------- 1 | # Linux 2 | ## Raspberry Pi RP2040 OpenOCD 3 | 4 | * Compile [OpenOCD](https://github.com/raspberrypi/openocd) and paste executables here ( see windows folder ) 5 | * Rename openocd to **openocd_rp2040** 6 | -------------------------------------------------------------------------------- /linux_x86_64_old/picoprobe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/linux_x86_64_old/picoprobe -------------------------------------------------------------------------------- /package.json: -------------------------------------------------------------------------------- 1 | { 2 | "description": "OpenOCD", 3 | "name": "tool-pico-openocd", 4 | "system": [ 5 | "windows", 6 | "windows_amd64", 7 | "windows_x86", 8 | "linux_x86_64", 9 | "darwin_x86_64" 10 | ], 11 | "url": "https://github.com/Wiz-IO/tool-pico-openocd", 12 | "version": "0.10.0" 13 | } -------------------------------------------------------------------------------- /picoprobe.uf2: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/picoprobe.uf2 -------------------------------------------------------------------------------- /share/openocd/scripts/bitsbytes.tcl: -------------------------------------------------------------------------------- 1 | #---------------------------------------- 2 | # Purpose - Create some $BIT variables 3 | # Create $K and $M variables 4 | # and some bit field extraction variables. 5 | # Creat helper variables ... 6 | # BIT0.. BIT31 7 | 8 | for { set x 0 } { $x < 32 } { set x [expr $x + 1]} { 9 | set vn [format "BIT%d" $x] 10 | global $vn 11 | set $vn [expr (1 << $x)] 12 | } 13 | 14 | # Create K bytes values 15 | # __1K ... to __2048K 16 | for { set x 1 } { $x < 2048 } { set x [expr $x * 2]} { 17 | set vn [format "__%dK" $x] 18 | global $vn 19 | set $vn [expr (1024 * $x)] 20 | } 21 | 22 | # Create M bytes values 23 | # __1M ... to __2048K 24 | for { set x 1 } { $x < 2048 } { set x [expr $x * 2]} { 25 | set vn [format "__%dM" $x] 26 | global $vn 27 | set $vn [expr (1024 * 1024 * $x)] 28 | } 29 | 30 | proc create_mask { MSB LSB } { 31 | return [expr (((1 << ($MSB - $LSB + 1))-1) << $LSB)] 32 | } 33 | 34 | # Cut Bits $MSB to $LSB out of this value. 35 | # Example: % format "0x%08x" [extract_bitfield 0x12345678 27 16] 36 | # Result: 0x02340000 37 | 38 | proc extract_bitfield { VALUE MSB LSB } { 39 | return [expr [create_mask $MSB $LSB] & $VALUE] 40 | } 41 | 42 | 43 | # Cut bits $MSB to $LSB out of this value 44 | # and shift (normalize) them down to bit 0. 45 | # 46 | # Example: % format "0x%08x" [normalize_bitfield 0x12345678 27 16] 47 | # Result: 0x00000234 48 | # 49 | proc normalize_bitfield { VALUE MSB LSB } { 50 | return [expr [extract_bitfield $VALUE $MSB $LSB ] >> $LSB] 51 | } 52 | 53 | proc show_normalize_bitfield { VALUE MSB LSB } { 54 | set m [create_mask $MSB $LSB] 55 | set mr [expr $VALUE & $m] 56 | set sr [expr $mr >> $LSB] 57 | echo [format "((0x%08x & 0x%08x) -> 0x%08x) >> %2d => (0x%x) %5d " $VALUE $m $mr $LSB $sr $sr] 58 | return $sr 59 | } 60 | -------------------------------------------------------------------------------- /share/openocd/scripts/interface/cmsis-dap.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # ARM CMSIS-DAP compliant adapter 3 | # 4 | # http://www.keil.com/support/man/docs/dapdebug/ 5 | # 6 | 7 | adapter driver cmsis-dap 8 | 9 | # Optionally specify the serial number of CMSIS-DAP usb device. 10 | #cmsis_dap_serial 02200201E6661E601B98E3B9 11 | -------------------------------------------------------------------------------- /share/openocd/scripts/interface/jlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # SEGGER J-Link 3 | # 4 | # http://www.segger.com/jlink.html 5 | # 6 | 7 | adapter driver jlink 8 | 9 | # The serial number can be used to select a specific device in case more than 10 | # one is connected to the host. 11 | # 12 | # Example: Select J-Link with serial number 123456789 13 | # 14 | # jlink serial 123456789 15 | -------------------------------------------------------------------------------- /share/openocd/scripts/interface/picoprobe.cfg: -------------------------------------------------------------------------------- 1 | # Adapter section 2 | adapter driver picoprobe 3 | adapter speed 5000 4 | -------------------------------------------------------------------------------- /share/openocd/scripts/mem_helper.tcl: -------------------------------------------------------------------------------- 1 | # Helper for common memory read/modify/write procedures 2 | 3 | # mrw: "memory read word", returns value of $reg 4 | proc mrw {reg} { 5 | set value "" 6 | mem2array value 32 $reg 1 7 | return $value(0) 8 | } 9 | 10 | add_usage_text mrw "address" 11 | add_help_text mrw "Returns value of word in memory." 12 | 13 | # mrh: "memory read halfword", returns value of $reg 14 | proc mrh {reg} { 15 | set value "" 16 | mem2array value 16 $reg 1 17 | return $value(0) 18 | } 19 | 20 | add_usage_text mrh "address" 21 | add_help_text mrh "Returns value of halfword in memory." 22 | 23 | # mrb: "memory read byte", returns value of $reg 24 | proc mrb {reg} { 25 | set value "" 26 | mem2array value 8 $reg 1 27 | return $value(0) 28 | } 29 | 30 | add_usage_text mrb "address" 31 | add_help_text mrb "Returns value of byte in memory." 32 | 33 | # mmw: "memory modify word", updates value of $reg 34 | # $reg <== ((value & ~$clearbits) | $setbits) 35 | proc mmw {reg setbits clearbits} { 36 | set old [mrw $reg] 37 | set new [expr ($old & ~$clearbits) | $setbits] 38 | mww $reg $new 39 | } 40 | 41 | add_usage_text mmw "address setbits clearbits" 42 | add_help_text mmw "Modify word in memory. new_val = (old_val & ~clearbits) | setbits;" 43 | -------------------------------------------------------------------------------- /share/openocd/scripts/memory.tcl: -------------------------------------------------------------------------------- 1 | # MEMORY 2 | # 3 | # All Memory regions have two components. 4 | # (1) A count of regions, in the form N_NAME 5 | # (2) An array within info about each region. 6 | # 7 | # The ARRAY 8 | # 9 | # ( RegionNumber , ATTRIBUTE ) 10 | # 11 | # Where is one of: 12 | # 13 | # N_FLASH & FLASH (internal memory) 14 | # N_RAM & RAM (internal memory) 15 | # N_MMREGS & MMREGS (for memory mapped registers) 16 | # N_XMEM & XMEM (off chip memory, ie: flash on cs0, sdram on cs2) 17 | # or N_UNKNOWN & UNKNOWN for things that do not exist. 18 | # 19 | # We have 1 unknown region. 20 | set N_UNKNOWN 1 21 | # All MEMORY regions must have these attributes 22 | # CS - chip select (if internal, use -1) 23 | set UNKNOWN(0,CHIPSELECT) -1 24 | # BASE - base address in memory 25 | set UNKNOWN(0,BASE) 0 26 | # LEN - length in bytes 27 | set UNKNOWN(0,LEN) $CPU_MAX_ADDRESS 28 | # HUMAN - human name of the region 29 | set UNKNOWN(0,HUMAN) "unknown" 30 | # TYPE - one of: 31 | # flash, ram, mmr, unknown 32 | # For harvard arch: 33 | # iflash, dflash, iram, dram 34 | set UNKNOWN(0,TYPE) "unknown" 35 | # RWX - access ablity 36 | # unix style chmod bits 37 | # 0 - no access 38 | # 1 - execute 39 | # 2 - write 40 | # 4 - read 41 | # hence: 7 - readwrite execute 42 | set RWX_NO_ACCESS 0 43 | set RWX_X_ONLY $BIT0 44 | set RWX_W_ONLY $BIT1 45 | set RWX_R_ONLY $BIT2 46 | set RWX_RW [expr $RWX_R_ONLY + $RWX_W_ONLY] 47 | set RWX_R_X [expr $RWX_R_ONLY + $RWX_X_ONLY] 48 | set RWX_RWX [expr $RWX_R_ONLY + $RWX_W_ONLY + $RWX_X_ONLY] 49 | set UNKNOWN(0,RWX) $RWX_NO_ACCESS 50 | 51 | # WIDTH - access width 52 | # 8,16,32 [0 means ANY] 53 | set ACCESS_WIDTH_NONE 0 54 | set ACCESS_WIDTH_8 $BIT0 55 | set ACCESS_WIDTH_16 $BIT1 56 | set ACCESS_WIDTH_32 $BIT2 57 | set ACCESS_WIDTH_ANY [expr $ACCESS_WIDTH_8 + $ACCESS_WIDTH_16 + $ACCESS_WIDTH_32] 58 | set UNKNOWN(0,ACCESS_WIDTH) $ACCESS_WIDTH_NONE 59 | 60 | proc iswithin { ADDRESS BASE LEN } { 61 | return [expr ((($ADDRESS - $BASE) >= 0) && (($BASE + $LEN - $ADDRESS) > 0))] 62 | } 63 | 64 | proc address_info { ADDRESS } { 65 | 66 | foreach WHERE { FLASH RAM MMREGS XMEM UNKNOWN } { 67 | if { info exists $WHERE } { 68 | set lmt [set N_[set WHERE]] 69 | for { set region 0 } { $region < $lmt } { incr region } { 70 | if { iswithin $ADDRESS $WHERE($region,BASE) $WHERE($region,LEN) } { 71 | return "$WHERE $region"; 72 | } 73 | } 74 | } 75 | } 76 | 77 | # Return the 'unknown' 78 | return "UNKNOWN 0" 79 | } 80 | 81 | proc memread32 {ADDR} { 82 | set foo(0) 0 83 | if ![ catch { mem2array foo 32 $ADDR 1 } msg ] { 84 | return $foo(0) 85 | } else { 86 | error "memread32: $msg" 87 | } 88 | } 89 | 90 | proc memread16 {ADDR} { 91 | set foo(0) 0 92 | if ![ catch { mem2array foo 16 $ADDR 1 } msg ] { 93 | return $foo(0) 94 | } else { 95 | error "memread16: $msg" 96 | } 97 | } 98 | 99 | proc memread8 {ADDR} { 100 | set foo(0) 0 101 | if ![ catch { mem2array foo 8 $ADDR 1 } msg ] { 102 | return $foo(0) 103 | } else { 104 | error "memread8: $msg" 105 | } 106 | } 107 | 108 | proc memwrite32 {ADDR DATA} { 109 | set foo(0) $DATA 110 | if ![ catch { array2mem foo 32 $ADDR 1 } msg ] { 111 | return $foo(0) 112 | } else { 113 | error "memwrite32: $msg" 114 | } 115 | } 116 | 117 | proc memwrite16 {ADDR DATA} { 118 | set foo(0) $DATA 119 | if ![ catch { array2mem foo 16 $ADDR 1 } msg ] { 120 | return $foo(0) 121 | } else { 122 | error "memwrite16: $msg" 123 | } 124 | } 125 | 126 | proc memwrite8 {ADDR DATA} { 127 | set foo(0) $DATA 128 | if ![ catch { array2mem foo 8 $ADDR 1 } msg ] { 129 | return $foo(0) 130 | } else { 131 | error "memwrite8: $msg" 132 | } 133 | } 134 | 135 | proc memread32_phys {ADDR} { 136 | set foo(0) 0 137 | if ![ catch { mem2array foo 32 $ADDR 1 phys } msg ] { 138 | return $foo(0) 139 | } else { 140 | error "memread32: $msg" 141 | } 142 | } 143 | 144 | proc memread16_phys {ADDR} { 145 | set foo(0) 0 146 | if ![ catch { mem2array foo 16 $ADDR 1 phys } msg ] { 147 | return $foo(0) 148 | } else { 149 | error "memread16: $msg" 150 | } 151 | } 152 | 153 | proc memread8_phys {ADDR} { 154 | set foo(0) 0 155 | if ![ catch { mem2array foo 8 $ADDR 1 phys } msg ] { 156 | return $foo(0) 157 | } else { 158 | error "memread8: $msg" 159 | } 160 | } 161 | 162 | proc memwrite32_phys {ADDR DATA} { 163 | set foo(0) $DATA 164 | if ![ catch { array2mem foo 32 $ADDR 1 phys } msg ] { 165 | return $foo(0) 166 | } else { 167 | error "memwrite32: $msg" 168 | } 169 | } 170 | 171 | proc memwrite16_phys {ADDR DATA} { 172 | set foo(0) $DATA 173 | if ![ catch { array2mem foo 16 $ADDR 1 phys } msg ] { 174 | return $foo(0) 175 | } else { 176 | error "memwrite16: $msg" 177 | } 178 | } 179 | 180 | proc memwrite8_phys {ADDR DATA} { 181 | set foo(0) $DATA 182 | if ![ catch { array2mem foo 8 $ADDR 1 phys } msg ] { 183 | return $foo(0) 184 | } else { 185 | error "memwrite8: $msg" 186 | } 187 | } 188 | -------------------------------------------------------------------------------- /share/openocd/scripts/mmr_helpers.tcl: -------------------------------------------------------------------------------- 1 | 2 | proc proc_exists { NAME } { 3 | set n [info commands $NAME] 4 | set l [string length $n] 5 | return [expr $l != 0] 6 | } 7 | 8 | # Give: REGISTER name - must be a global variable. 9 | proc show_mmr32_reg { NAME } { 10 | 11 | global $NAME 12 | # we want $($NAME) 13 | set a [set [set NAME]] 14 | 15 | if ![catch { set v [memread32 $a] } msg ] { 16 | echo [format "%15s: (0x%08x): 0x%08x" $NAME $a $v] 17 | 18 | # Was a helper defined? 19 | set fn show_${NAME}_helper 20 | if [ proc_exists $fn ] { 21 | # Then call it 22 | $fn $NAME $a $v 23 | } 24 | return $v; 25 | } else { 26 | error [format "%s (%s)" $msg $NAME ] 27 | } 28 | } 29 | 30 | 31 | # Give: NAMES - an array of names accessible 32 | # in the callers symbol-scope. 33 | # VAL - the bits to display. 34 | 35 | proc show_mmr32_bits { NAMES VAL } { 36 | 37 | upvar $NAMES MYNAMES 38 | 39 | set w 5 40 | foreach {IDX N} $MYNAMES { 41 | set l [string length $N] 42 | if { $l > $w } { set w $l } 43 | } 44 | 45 | for { set x 24 } { $x >= 0 } { incr x -8 } { 46 | echo -n " " 47 | for { set y 7 } { $y >= 0 } { incr y -1 } { 48 | set s $MYNAMES([expr $x + $y]) 49 | echo -n [format "%2d: %-*s | " [expr $x + $y] $w $s ] 50 | } 51 | echo "" 52 | 53 | echo -n " " 54 | for { set y 7 } { $y >= 0 } { incr y -1 } { 55 | echo -n [format " %d%*s | " [expr !!($VAL & (1 << ($x + $y)))] [expr $w -1] ""] 56 | } 57 | echo "" 58 | } 59 | } 60 | 61 | 62 | proc show_mmr_bitfield { MSB LSB VAL FIELDNAME FIELDVALUES } { 63 | set width [expr (($MSB - $LSB + 1) + 7) / 4] 64 | set nval [show_normalize_bitfield $VAL $MSB $LSB ] 65 | set name0 [lindex $FIELDVALUES 0 ] 66 | if [ string compare $name0 _NUMBER_ ] { 67 | set sval [lindex $FIELDVALUES $nval] 68 | } else { 69 | set sval "" 70 | } 71 | echo [format "%-15s: %d (0x%0*x) %s" $FIELDNAME $nval $width $nval $sval ] 72 | } 73 | -------------------------------------------------------------------------------- /share/openocd/scripts/target/rp2040-core0.cfg: -------------------------------------------------------------------------------- 1 | source [find target/swj-dp.tcl] 2 | source [find mem_helper.tcl] 3 | 4 | set _CHIPNAME rp2040 5 | set _CPUTAPID 0x01002927 6 | set _ENDIAN little 7 | 8 | swj_newdap $_CHIPNAME.core0 cpu -dp-id $_CPUTAPID -instance-id 0 9 | 10 | # NOTE target smp makes both targets act a single virtual target on one port for gdb 11 | # (without it you should be able to debug separately on two ports) 12 | # NOTE: "-rtos hwthread" creates a thread per core in smp mode (otherwise it is a single thread for the virtual target) 13 | 14 | # Give OpenOCD SRAM1 (64k) to use for e.g. flash programming bounce buffers (should avoid algo stack etc) 15 | # Don't require save/restore, because this isn't something we'd do whilst a user app is running 16 | set _WORKSIZE 0x10000 17 | set _WORKBASE 0x20010000 18 | 19 | #core 0 20 | set _TARGETNAME_0 $_CHIPNAME.core0 21 | dap create $_TARGETNAME_0.dap -chain-position $_CHIPNAME.core0.cpu 22 | target create $_TARGETNAME_0 cortex_m -endian $_ENDIAN -coreid 0 -dap $_TARGETNAME_0.dap -rtos hwthread 23 | $_TARGETNAME_0 configure -work-area-phys $_WORKBASE -work-area-size $_WORKSIZE -work-area-backup 0 24 | cortex_m reset_config sysresetreq 25 | 26 | target smp $_TARGETNAME_0 27 | 28 | set _FLASHNAME $_CHIPNAME.flash 29 | set _FLASHSIZE 0x200000 30 | set _FLASHBASE 0x10000000 31 | # name driver base, size in bytes, chip_width, bus_width, target used to access 32 | flash bank $_FLASHNAME rp2040_flash $_FLASHBASE $_FLASHSIZE 1 32 $_TARGETNAME_0 33 | 34 | # srst is not fitted so use SYSRESETREQ to perform a soft reset 35 | reset_config srst_nogate 36 | 37 | gdb_flash_program enable 38 | gdb_memory_map enable 39 | 40 | -------------------------------------------------------------------------------- /share/openocd/scripts/target/rp2040-core1.cfg: -------------------------------------------------------------------------------- 1 | source [find target/swj-dp.tcl] 2 | source [find mem_helper.tcl] 3 | 4 | set _CHIPNAME rp2040 5 | set _CPUTAPID 0x01002927 6 | set _ENDIAN little 7 | 8 | swj_newdap $_CHIPNAME.core1 cpu -dp-id $_CPUTAPID -instance-id 1 9 | 10 | # NOTE target smp makes both targets act a single virtual target on one port for gdb 11 | # (without it you should be able to debug separately on two ports) 12 | # NOTE: "-rtos hwthread" creates a thread per core in smp mode (otherwise it is a single thread for the virtual target) 13 | 14 | # Give OpenOCD SRAM1 (64k) to use for e.g. flash programming bounce buffers (should avoid algo stack etc) 15 | # Don't require save/restore, because this isn't something we'd do whilst a user app is running 16 | set _WORKSIZE 0x10000 17 | set _WORKBASE 0x20010000 18 | 19 | #core 1 20 | set _TARGETNAME_1 $_CHIPNAME.core1 21 | dap create $_TARGETNAME_1.dap -chain-position $_CHIPNAME.core1.cpu 22 | target create $_TARGETNAME_1 cortex_m -endian $_ENDIAN -coreid 1 -dap $_TARGETNAME_1.dap -rtos hwthread 23 | $_TARGETNAME_1 configure -work-area-phys $_WORKBASE -work-area-size $_WORKSIZE -work-area-backup 0 24 | cortex_m reset_config sysresetreq 25 | 26 | target smp $_TARGETNAME_1 27 | 28 | set _FLASHNAME $_CHIPNAME.flash 29 | set _FLASHSIZE 0x200000 30 | set _FLASHBASE 0x10000000 31 | # name driver base, size in bytes, chip_width, bus_width, target used to access 32 | flash bank $_FLASHNAME rp2040_flash $_FLASHBASE $_FLASHSIZE 1 32 $_TARGETNAME_1 33 | 34 | # srst is not fitted so use SYSRESETREQ to perform a soft reset 35 | reset_config srst_nogate 36 | 37 | gdb_flash_program enable 38 | gdb_memory_map enable 39 | 40 | -------------------------------------------------------------------------------- /share/openocd/scripts/target/rp2040-rescue.cfg: -------------------------------------------------------------------------------- 1 | source [find target/swj-dp.tcl] 2 | source [find mem_helper.tcl] 3 | 4 | set _CHIPNAME rp2040 5 | set _CPUTAPID 0x01002927 6 | set _ENDIAN little 7 | 8 | swj_newdap $_CHIPNAME.rescue_dp cpu -dp-id $_CPUTAPID -instance-id 0xf 9 | set _TARGETNAME_0 $_CHIPNAME.rescue 10 | dap create $_TARGETNAME_0.dap -chain-position $_CHIPNAME.rescue_dp.cpu -ignore-syspwrupack 11 | 12 | # Have to init before we can do dpreg commands 13 | init 14 | 15 | # The rescue debug port uses the AP CTRL/STAT bit DBGPWRUPREQ to reset the 16 | # PSM (power on state machine) of the RP2040 with a flag set in the 17 | # VREG_AND_POR_CHIP_RESET register. Once the reset is released 18 | # (by clearing the DBGPWRUPREQ flag), the bootrom will run, see this flag, 19 | # and halt. Allowing the user to load some fresh code, rather than loading 20 | # the potentially broken code stored in flash 21 | 22 | # Clear DBGPWRUPREQ 23 | $_TARGETNAME_0.dap dpreg 0x4 0x00000000 24 | 25 | # Verifying CTRL/STAT is 0 26 | $_TARGETNAME_0.dap dpreg 0x4 27 | 28 | echo "Now attach a debugger to your RP2040 and load some code" 29 | -------------------------------------------------------------------------------- /share/openocd/scripts/target/rp2040.cfg: -------------------------------------------------------------------------------- 1 | source [find target/swj-dp.tcl] 2 | source [find mem_helper.tcl] 3 | 4 | set _CHIPNAME rp2040 5 | set _CPUTAPID 0x01002927 6 | set _ENDIAN little 7 | 8 | swj_newdap $_CHIPNAME.core0 cpu -dp-id $_CPUTAPID -instance-id 0 9 | swj_newdap $_CHIPNAME.core1 cpu -dp-id $_CPUTAPID -instance-id 1 10 | 11 | # NOTE target smp makes both targets act a single virtual target on one port for gdb 12 | # (without it you should be able to debug separately on two ports) 13 | # NOTE: "-rtos hwthread" creates a thread per core in smp mode (otherwise it is a single thread for the virtual target) 14 | 15 | # Give OpenOCD SRAM1 (64k) to use for e.g. flash programming bounce buffers (should avoid algo stack etc) 16 | # Don't require save/restore, because this isn't something we'd do whilst a user app is running 17 | set _WORKSIZE 0x10000 18 | set _WORKBASE 0x20010000 19 | 20 | #core 0 21 | set _TARGETNAME_0 $_CHIPNAME.core0 22 | dap create $_TARGETNAME_0.dap -chain-position $_CHIPNAME.core0.cpu 23 | target create $_TARGETNAME_0 cortex_m -endian $_ENDIAN -coreid 0 -dap $_TARGETNAME_0.dap -rtos hwthread 24 | $_TARGETNAME_0 configure -work-area-phys $_WORKBASE -work-area-size $_WORKSIZE -work-area-backup 0 25 | cortex_m reset_config sysresetreq 26 | 27 | #core 1 28 | set _TARGETNAME_1 $_CHIPNAME.core1 29 | dap create $_TARGETNAME_1.dap -chain-position $_CHIPNAME.core1.cpu 30 | target create $_TARGETNAME_1 cortex_m -endian $_ENDIAN -coreid 1 -dap $_TARGETNAME_1.dap -rtos hwthread 31 | $_TARGETNAME_1 configure -work-area-phys $_WORKBASE -work-area-size $_WORKSIZE -work-area-backup 0 32 | cortex_m reset_config sysresetreq 33 | 34 | target smp $_TARGETNAME_0 $_TARGETNAME_1 35 | 36 | set _FLASHNAME $_CHIPNAME.flash 37 | set _FLASHSIZE 0x200000 38 | set _FLASHBASE 0x10000000 39 | # name driver base, size in bytes, chip_width, bus_width, target used to access 40 | flash bank $_FLASHNAME rp2040_flash $_FLASHBASE $_FLASHSIZE 1 32 $_TARGETNAME_0 41 | 42 | # Openocd associates a flash bank with a target (in our case a core) and 43 | # running `openocd -c "program foo.elf"` just grabs the last selected core 44 | # from the TCL context. Select `core0` by default so that flash probe 45 | # succeeds. Note gdb understands there are 2 cores -- this is only for TCL. 46 | targets rp2040.core0 47 | 48 | # srst is not fitted so use SYSRESETREQ to perform a soft reset 49 | reset_config srst_nogate 50 | 51 | gdb_flash_program enable 52 | gdb_memory_map enable 53 | 54 | -------------------------------------------------------------------------------- /share/openocd/scripts/target/swj-dp.tcl: -------------------------------------------------------------------------------- 1 | # ARM Debug Interface V5 (ADI_V5) utility 2 | # ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since 3 | # SW-DP and JTAG-DP targets don't need to switch based 4 | # on which transport is active. 5 | # 6 | # declare a JTAG or SWD Debug Access Point (DAP) 7 | # based on the transport in use with this session. 8 | # You can't access JTAG ops when SWD is active, etc. 9 | 10 | # params are currently what "jtag newtap" uses 11 | # because OpenOCD internals are still strongly biased 12 | # to JTAG .... but for SWD, "irlen" etc are ignored, 13 | # and the internals work differently 14 | 15 | # for now, ignore non-JTAG and non-SWD transports 16 | # (e.g. initial flash programming via SPI or UART) 17 | 18 | # split out "chip" and "tag" so we can someday handle 19 | # them more uniformly irlen too...) 20 | 21 | if [catch {transport select}] { 22 | echo "Error: unable to select a session transport. Can't continue." 23 | shutdown 24 | } 25 | 26 | proc swj_newdap {chip tag args} { 27 | if [using_jtag] { 28 | eval jtag newtap $chip $tag $args 29 | } elseif [using_swd] { 30 | eval swd newdap $chip $tag $args 31 | } else { 32 | echo "Error: transport '[ transport select ]' not supported by swj_newdap" 33 | shutdown 34 | } 35 | } 36 | -------------------------------------------------------------------------------- /windows/ftd2xx.dll: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/windows/ftd2xx.dll -------------------------------------------------------------------------------- /windows/libusb-1.0.dll: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/windows/libusb-1.0.dll -------------------------------------------------------------------------------- /windows/libusb0.dll: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/windows/libusb0.dll -------------------------------------------------------------------------------- /windows/openocd.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/windows/openocd.exe -------------------------------------------------------------------------------- /windows/openocd_hla_multicore.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/windows/openocd_hla_multicore.exe -------------------------------------------------------------------------------- /windows/openocd_rp2040.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/windows/openocd_rp2040.exe -------------------------------------------------------------------------------- /windows/picoprobe.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/Wiz-IO/tool-pico-openocd/77062ef54d2cbf869de2d82064e374867a8375fb/windows/picoprobe.exe --------------------------------------------------------------------------------