├── .gitignore ├── Documentation ├── IP.md ├── config.md └── xilinx │ └── UG1224_VCU118_Evaluation_Board_User_Guide.pdf ├── LICENSE ├── Makefile ├── README.md ├── TODO.md ├── alloc ├── Makefile ├── README.md ├── buddy │ ├── Makefile │ ├── README.md │ ├── buddy.cpp │ ├── buddy.h │ ├── core.cpp │ ├── core_tb.cpp │ ├── debug_tb.cpp │ ├── run_hls_arty_a7.tcl │ ├── run_hls_vcu108.tcl │ └── run_hls_vcu118.tcl ├── chunk │ ├── Makefile │ ├── README.md │ ├── chunk_alloc.cpp │ ├── chunk_alloc.h │ ├── core.cpp │ ├── core_tb.cpp │ ├── run_hls_arty_a7.tcl │ ├── run_hls_vcu108.tcl │ └── run_hls_vcu118.tcl ├── chunkfix │ ├── Makefile │ ├── internal.h │ ├── run_hls_vcu118.tcl │ ├── tb.cpp │ └── top.cpp ├── chunkvar │ ├── Makefile │ ├── run_hls_vcu118.tcl │ ├── tb.cpp │ └── top.cpp └── generate_hls.sh ├── app ├── Makefile ├── README.md ├── dummy_net_blackhole │ ├── Makefile │ ├── generate_hls.sh │ └── src │ │ ├── Makefile │ │ ├── run_hls_arty_a7.tcl │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── tb.cpp │ │ └── top.cpp ├── dummy_net_dram │ ├── Makefile │ ├── README.md │ ├── generate_hls.sh │ └── src │ │ ├── Makefile │ │ ├── run_hls_arty_a7.tcl │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── tb.cpp │ │ └── top.cpp ├── dummy_net_loopback │ ├── Makefile │ ├── README.md │ ├── generate_hls.sh │ └── src │ │ ├── Makefile │ │ ├── run_hls_arty_a7.tcl │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── tb.cpp │ │ ├── top.cpp │ │ └── top.hpp ├── dummy_net_pktgen │ ├── Makefile │ ├── generate_hls.sh │ └── src │ │ ├── Makefile │ │ ├── run_hls_arty_a7.tcl │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── tb.cpp │ │ └── top.cpp ├── memcached │ ├── .gitignore │ ├── CONTRIBUTING.md │ ├── LICENSE.md │ ├── Makefile │ ├── README.md │ ├── buildUoeMcdSingleDramPCIe │ │ ├── Makefile │ │ ├── host_side_software │ │ │ ├── PCIe_Driver │ │ │ │ ├── Linux_Driver │ │ │ │ │ ├── Makefile │ │ │ │ │ ├── Module.symvers │ │ │ │ │ ├── README │ │ │ │ │ ├── changelog │ │ │ │ │ ├── install_driver.sh │ │ │ │ │ ├── make_device │ │ │ │ │ ├── modules.order │ │ │ │ │ ├── xpcie.c │ │ │ │ │ └── xpcie.h │ │ │ │ ├── README │ │ │ │ ├── driverTest │ │ │ │ │ ├── Makefile │ │ │ │ │ ├── README │ │ │ │ │ ├── met.cpp │ │ │ │ │ └── test_reg.cpp │ │ │ │ ├── installing_fltk │ │ │ │ ├── memMgmt │ │ │ │ │ ├── CAPI_devFile_uDriver.cpp │ │ │ │ │ ├── Fl_Gauge.H │ │ │ │ │ ├── Fl_Gauge.cxx │ │ │ │ │ ├── Gui.cpp │ │ │ │ │ ├── Gui.h │ │ │ │ │ ├── Makefile │ │ │ │ │ ├── diagram_boxes.cpp │ │ │ │ │ ├── diagram_boxes.h │ │ │ │ │ ├── hostmem_uDriver.cpp │ │ │ │ │ ├── kernel.cl │ │ │ │ │ ├── kernel.h │ │ │ │ │ ├── main.cpp │ │ │ │ │ ├── memManager.cpp │ │ │ │ │ ├── memManager.h │ │ │ │ │ ├── memMgmt.cbp │ │ │ │ │ ├── memMgmt.layout │ │ │ │ │ ├── no_hw_uDriver.cpp │ │ │ │ │ ├── uDriver.cpp │ │ │ │ │ └── uDriver.h │ │ │ │ └── mmioStats │ │ │ │ │ ├── mmio.c │ │ │ │ │ └── test_stats_mmio.cpp │ │ │ ├── UoeMcdSingleDramPCIe.pdf │ │ │ ├── UoeMcdSingleDramPCIePort1.tcc │ │ │ └── udp_mcd_client │ │ │ │ ├── Makefile │ │ │ │ ├── kv_config.csv │ │ │ │ └── udp_mcd_client.c │ │ ├── ip_definitions │ │ │ ├── Makefile │ │ │ ├── ipCore_gen.tcl │ │ │ ├── pcie2axilite_bridge │ │ │ │ ├── axi_read_controller.v │ │ │ │ ├── axi_write_controller.v │ │ │ │ ├── maxi_controller.v │ │ │ │ ├── maxis_controller.v │ │ │ │ ├── pcie_2_axilite.v │ │ │ │ ├── s_axi_config.v │ │ │ │ ├── saxis_controller.v │ │ │ │ └── tag_manager.v │ │ │ ├── pcie_mem_alloc │ │ │ │ ├── pcie_bridge.v │ │ │ │ ├── pcie_mem_alloc.v │ │ │ │ ├── pcie_mem_alloc_top.v │ │ │ │ └── stats_and_management.v │ │ │ └── run_vivado.tcl │ │ ├── run_hls_mcd.tcl │ │ ├── scripts │ │ │ ├── build_hls_2015_1.sh │ │ │ ├── build_system.sh │ │ │ ├── build_tcp_ip_2015_1.sh │ │ │ └── tcl │ │ │ │ ├── create_prj.tcl │ │ │ │ ├── run_hls.arp_server.tcl │ │ │ │ ├── run_hls.dhcp_client.tcl │ │ │ │ ├── run_hls.flashModel.tcl │ │ │ │ ├── run_hls.icmp_server.tcl │ │ │ │ ├── run_hls.ip_handler.tcl │ │ │ │ ├── run_hls.mac_ip_encode.tcl │ │ │ │ ├── run_hls.memcachedPipeline.tcl │ │ │ │ ├── run_hls.readConverter.tcl │ │ │ │ ├── run_hls.udpAppMux.tcl │ │ │ │ ├── run_hls.udpCore.tcl │ │ │ │ ├── run_hls.udpShim.tcl │ │ │ │ ├── run_hls.writeConverter.tcl │ │ │ │ └── x86_ipCore_gen.tcl │ │ └── src │ │ │ ├── dcp │ │ │ ├── SmartCamCtlArp.dcp │ │ │ └── mig_7series_0.dcp │ │ │ ├── hdl │ │ │ ├── SmartCam_ARP_inst.vhd │ │ │ ├── UoeMcdSingleDramPCIe_top.v │ │ │ ├── arpServerWrapper.vhd │ │ │ ├── dram_inf.v │ │ │ ├── eth10g_interface.v │ │ │ ├── mcdSingleDramPCIe.v │ │ │ ├── network_module_2014_2.v │ │ │ ├── pcie_bridge.v │ │ │ ├── pcie_mem_alloc.v │ │ │ ├── rx_isolation.v │ │ │ ├── stats_and_management.v │ │ │ ├── stats_module.vhd │ │ │ ├── tcp_ip_wrapper.v │ │ │ ├── ten_gig_eth_pcs_pma_ip_GT_Common_wrapper.v │ │ │ ├── tx_interface.v │ │ │ └── xgbaser_gt_same_quad_wrapper.v │ │ │ ├── hls │ │ │ ├── arp_server │ │ │ │ ├── arp_server.cpp │ │ │ │ ├── arp_server.hpp │ │ │ │ └── test_arp_server.cpp │ │ │ ├── axiDataMoverReadConverter │ │ │ │ ├── globals.cpp │ │ │ │ ├── globals.h │ │ │ │ └── readConverter.cpp │ │ │ ├── axiDataMoverWriteConverter │ │ │ │ ├── globals.h │ │ │ │ └── writeConverter.cpp │ │ │ ├── dhcp_client │ │ │ │ ├── dhcp_client.cpp │ │ │ │ ├── dhcp_client.hpp │ │ │ │ └── test_dhcp_client.cpp │ │ │ ├── icmp_server │ │ │ │ ├── icmp_server.cpp │ │ │ │ ├── icmp_server.hpp │ │ │ │ └── test_icmp_server.cpp │ │ │ ├── ip_handler │ │ │ │ ├── ip_handler.cpp │ │ │ │ ├── ip_handler.hpp │ │ │ │ └── test_ip_handler.cpp │ │ │ ├── mac_ip_encode │ │ │ │ ├── mac_ip_encode.cpp │ │ │ │ ├── mac_ip_encode.hpp │ │ │ │ └── test_mac_ip_encode.cpp │ │ │ ├── tcp_ip.hpp │ │ │ ├── udp │ │ │ │ ├── udpAppMux │ │ │ │ │ ├── udpAppMux.cpp │ │ │ │ │ ├── udpAppMux.hpp │ │ │ │ │ └── udpAppMux_tb.cpp │ │ │ │ └── udpCore │ │ │ │ │ ├── run_hls.csim.tcl │ │ │ │ │ └── sources │ │ │ │ │ ├── udp.cpp │ │ │ │ │ ├── udp.h │ │ │ │ │ └── udp_tb.cpp │ │ │ └── udpShim │ │ │ │ ├── udpShim.cpp │ │ │ │ ├── udpShim.hpp │ │ │ │ └── udpShim_tb.cpp │ │ │ └── xdc │ │ │ ├── debug.xdc │ │ │ ├── sysclk_156_dram_eth.xdc │ │ │ └── vanilla_Pcie.xdc │ ├── header_handler │ │ ├── Makefile │ │ ├── header_handler.v │ │ ├── input1.txt │ │ ├── input2.txt │ │ ├── packet_gen.sv │ │ ├── run_vivado_vcu108.tcl │ │ ├── sim_tb_top.sv │ │ └── sync_fifo.v │ ├── hls │ │ ├── .gitignore │ │ ├── Makefile │ │ ├── generate_hls.sh │ │ ├── memcachedPipeline_tbHLS_README.txt │ │ ├── pkt.in.txt │ │ ├── rtl │ │ │ ├── memcachedBuddy_top.v │ │ │ └── memcachedPipeline_top.v │ │ ├── run_hls.memcachedBuddy_vcu108.tcl │ │ ├── run_hls.readConverter.tcl │ │ ├── run_hls.writeConverter.tcl │ │ ├── run_hls_dram_vcu108.tcl │ │ ├── run_hls_dummyPCIe_vcu108.tcl │ │ ├── run_hls_flash_vcu108.tcl │ │ ├── run_hls_mcd_vcu108.tcl │ │ ├── run_hls_readConverter_vcu108.tcl │ │ ├── run_hls_writeConverter_vcu108.tcl │ │ ├── run_vivado.tcl │ │ ├── run_vivado_buddy.tcl │ │ ├── run_vivado_mcd.tcl │ │ ├── sources │ │ │ ├── globals.cpp │ │ │ ├── globals.h │ │ │ ├── hashTable │ │ │ │ ├── cc.cpp │ │ │ │ ├── compare.cpp │ │ │ │ ├── hash.cpp │ │ │ │ ├── hashTable.cpp │ │ │ │ ├── hashTableWithBuddy.cpp │ │ │ │ ├── hashTableWithProfiler.cpp │ │ │ │ ├── memRead.cpp │ │ │ │ ├── memWrite.cpp │ │ │ │ ├── memWriteWithBuddy.cpp │ │ │ │ └── memWriteWithProfiler.cpp │ │ │ ├── kvsPipelineHostMem.cpp │ │ │ ├── memcachedBuddy.cpp │ │ │ ├── memcachedBuddy_tb.cpp │ │ │ ├── memcachedPipeline.cpp │ │ │ ├── memcachedPipeline_tb.cpp │ │ │ ├── merger.cpp │ │ │ ├── otherModules │ │ │ │ ├── dramModel │ │ │ │ │ ├── dramModel.cpp │ │ │ │ │ └── dramModel.h │ │ │ │ ├── dummyPCIeAddressAllocation │ │ │ │ │ ├── dummyPCIeJoint.cpp │ │ │ │ │ └── globals.h │ │ │ │ └── flashModel │ │ │ │ │ ├── flashModel.cpp │ │ │ │ │ └── flashModel.h │ │ │ ├── requestParser │ │ │ │ └── requestParser.cpp │ │ │ ├── responseFormatter │ │ │ │ ├── asciiResponse.cpp │ │ │ │ ├── binResponse.cpp │ │ │ │ └── responseFormatter.cpp │ │ │ ├── splitter.cpp │ │ │ ├── statsCollectorIn.cpp │ │ │ └── valueStore │ │ │ │ ├── flashValueStore.cpp │ │ │ │ └── valueStore.cpp │ │ └── tb │ │ │ └── sim_tb_top.sv │ └── regressionSims │ │ ├── config │ │ ├── sim.allseqs.hls │ │ └── sim.allseqs.hlsc │ │ ├── sources │ │ ├── hls_startGen.v │ │ ├── kvs_tbDriverHDLNode.vhdl │ │ ├── kvs_tbMonitorHDLNode.vhdl │ │ ├── kvs_tbStatsMonitorHDLNode.vhdl │ │ ├── prototypeWrapper.vhd │ │ └── vc709_tb_wrapper.vhd │ │ └── sw │ │ ├── README │ │ ├── env.server │ │ ├── env.serverc │ │ ├── memtest_compare.py │ │ ├── memtest_deploy.py │ │ ├── sim.example │ │ └── statsProcessing.py ├── mergesort │ ├── Makefile │ ├── generate_hls.sh │ ├── hls │ │ ├── Makefile │ │ ├── mergesort.cpp │ │ ├── mergesort.h │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ └── tb.cpp │ ├── run_vivado_vcu108.tcl │ ├── run_vivado_vcu118.tcl │ └── tb.v ├── rdm_workload │ ├── Makefile │ ├── OSDI_workload_stat.py │ ├── rdm_test_input │ ├── rdma_setup.c │ ├── rdma_setup.h │ ├── workloadStream.c │ └── workloadStream.h ├── rdma │ ├── Makefile │ ├── README.md │ ├── fpga │ │ ├── Makefile │ │ ├── run_hls_arty_a7.tcl │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── tb.cpp │ │ ├── top.cpp │ │ └── top.hpp │ ├── fpga_test │ │ ├── Makefile │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── tb.cpp │ │ ├── top.cpp │ │ └── top.hpp │ ├── generate_hls.sh │ ├── host │ │ ├── Makefile │ │ ├── README.md │ │ └── core.c │ ├── include │ │ ├── hls.h │ │ ├── host_helper.h │ │ └── rdma.h │ ├── rdm_mapping │ │ ├── Makefile │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── tb.cpp │ │ ├── top.cpp │ │ └── top.hpp │ └── rdm_segment │ │ ├── Makefile │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── tb.cpp │ │ ├── top.cpp │ │ └── top.hpp └── test_sysmm │ └── README.md ├── host ├── README.md ├── dma │ ├── Makefile │ ├── kvs.c │ └── rdm.c ├── kernel-signal │ ├── Makefile │ ├── netlinkTest.c │ ├── netlinkUser.c │ ├── netlinkUser.h │ └── remap.c ├── kernel │ ├── Makefile │ └── remap.c ├── kvspacketgen │ ├── README.md │ ├── packetStream │ │ ├── Makefile │ │ ├── packetStream.c │ │ └── packetStream.h │ ├── ycsb2memcached_packet.py │ ├── ycsb_output_key.patch │ ├── ycsb_patch_script.py │ └── ycsb_workload_packets.txt ├── net │ └── Makefile └── pcie_xdma │ ├── COPYING │ ├── LICENSE │ ├── include │ └── libxdma_api.h │ ├── libxdma │ ├── Makefile │ ├── libxdma.c │ ├── libxdma.h │ └── version.h │ ├── readme.txt │ ├── tests │ ├── data │ │ ├── datafile0_4K.bin │ │ ├── datafile1_4K.bin │ │ ├── datafile2_4K.bin │ │ ├── datafile3_4K.bin │ │ └── datafile_8K.bin │ ├── dma_memory_mapped_test.sh │ ├── dma_streaming_test.sh │ ├── load_driver.sh │ ├── perform_hwcount.sh │ └── run_test.sh │ ├── tools │ ├── Makefile │ ├── dma_from_device.c │ ├── dma_to_device.c │ ├── dma_utils.c │ ├── performance.c │ └── reg_rw.c │ └── xdma │ ├── Makefile │ ├── cdev_bypass.c │ ├── cdev_ctrl.c │ ├── cdev_ctrl.h │ ├── cdev_events.c │ ├── cdev_sgdma.c │ ├── cdev_sgdma.h │ ├── cdev_xvc.c │ ├── cdev_xvc.h │ ├── libxdma.c │ ├── libxdma.h │ ├── version.h │ ├── xdma_cdev.c │ ├── xdma_cdev.h │ ├── xdma_mod.c │ └── xdma_mod.h ├── include ├── fpga │ ├── axis_buddy.h │ ├── axis_mapping.h │ ├── axis_net.h │ ├── axis_sysmmu.h │ ├── channel │ │ ├── alloc_seg.h │ │ ├── axi_rab.h │ │ └── generic.h │ ├── config │ │ ├── alloc_segfix.h │ │ ├── kernel.h │ │ ├── memory.h │ │ └── process.h │ ├── icap.h │ ├── kernel.h │ ├── log2.h │ └── mem_common.h └── uapi │ ├── compiler.h │ ├── net_header.h │ └── pcie.h ├── kernel ├── Makefile ├── README.md ├── channel │ └── README.md ├── config_mb.pdf ├── floorplan │ ├── .gitignore │ ├── Makefile │ ├── prepare.sh │ ├── run_vivado.tcl │ ├── scripts │ │ ├── README.txt │ │ ├── design_utils.tcl │ │ ├── eco_utils.tcl │ │ ├── hd_utils.tcl │ │ ├── impl.tcl │ │ ├── log_utils.tcl │ │ ├── pr_utils.tcl │ │ ├── proj_utils.tcl │ │ ├── run.tcl │ │ ├── synth.tcl │ │ └── zigzag_utils.tcl │ └── src │ │ ├── base_rp_module │ │ └── pr_loopback.v │ │ ├── top │ │ ├── bd │ │ │ └── mb.tcl │ │ └── top.v │ │ └── xdc │ │ └── top_vcu118.xdc ├── icap_hls │ ├── Makefile │ ├── README.md │ ├── generate_hls.sh │ ├── icap_controller │ │ ├── Makefile │ │ ├── cmd_read_bitstreams.cpp │ │ ├── cmd_read_regs.cpp │ │ ├── internal.h │ │ ├── run_hls.tcl │ │ ├── tb.cpp │ │ └── top.cpp │ └── ip │ │ ├── Makefile │ │ ├── bd_icap_controller.tcl │ │ ├── rtl │ │ ├── icape3.v │ │ └── strip.v │ │ ├── run_vivado_vcu108.tcl │ │ ├── run_vivado_vcu118.tcl │ │ └── tb │ │ └── tb.v └── mb │ ├── README.md │ └── sched │ ├── core.c │ ├── floor.c │ └── syscall.c ├── lib ├── Makefile ├── README.md ├── buddy │ └── Makefile ├── chunkfix │ └── Makefile ├── chunkvar │ └── Makefile ├── debug │ └── Makefile ├── delay │ └── Makefile ├── quicksort │ └── Makefile └── timestamp │ ├── Makefile │ ├── generate_hls.sh │ └── src │ ├── Makefile │ ├── run_hls_vcu108.tcl │ ├── run_hls_vcu118.tcl │ ├── tb.cpp │ └── top.cpp ├── mm ├── Makefile ├── README.md ├── axi_rab │ ├── Makefile │ ├── README.md │ ├── rtl │ │ ├── async_fifo.v │ │ ├── axi_addr_ch_rx.v │ │ ├── axi_addr_ch_tx.v │ │ ├── axi_bresp_ch.v │ │ ├── axi_mmu_wrapper.v │ │ ├── axi_rdata_ch.v │ │ ├── axi_wdata_ch.v │ │ ├── synch_fifo.v │ │ └── synchronizer.v │ ├── rtl_single_clock │ │ ├── axi_addr_ch_rxs.v │ │ ├── axi_addr_ch_txs.v │ │ ├── axi_bresp_chs.v │ │ ├── axi_rdata_chs.v │ │ ├── axi_wdata_chs.v │ │ └── top.v │ ├── run_vivado_vcu118.tcl │ ├── tb.v │ ├── tb │ │ ├── sim_tb_top.sv │ │ ├── testbench.sv │ │ └── translator.v │ └── top.xdc ├── generate_hls.sh ├── ip_libmm_paging │ ├── Makefile │ ├── buddy_alloc_mux │ │ ├── Makefile │ │ ├── run_hls.tcl │ │ ├── tb.cpp │ │ ├── top.cpp │ │ └── top.h │ ├── coordinator │ │ ├── Makefile │ │ ├── alloc.cpp │ │ ├── init.cpp │ │ ├── internal.hpp │ │ ├── mem_cmd.h │ │ ├── run_hls.tcl │ │ ├── tb.cpp │ │ └── top.cpp │ ├── generate_hls.sh │ ├── rtl │ │ └── tb.v │ ├── run_vivado_vcu118.tcl │ └── tmp_va_buddy │ │ ├── Makefile │ │ ├── buddy.cpp │ │ ├── buddy.h │ │ ├── core.cpp │ │ ├── core_tb.cpp │ │ └── run_hls.tcl ├── ip_libmm_segfix │ └── Makefile ├── ip_sysmm_segfix │ ├── .gitignore │ ├── Makefile │ ├── README.md │ ├── bd_sysmm.tcl │ ├── run_vivado_vcu108.tcl │ ├── run_vivado_vcu118.tcl │ ├── run_vivado_vcu118_tb.tcl │ ├── tb.v │ ├── tb │ │ ├── ddr3_model.sv │ │ ├── ddr3_model_parameters.vh │ │ ├── ddr4_top.v │ │ ├── sim_tb_top.v │ │ └── wiredly.v │ ├── top.xdc │ └── waveform │ │ └── sysmmu_tb_top_behav.wcfg ├── legacy │ └── hls_segment │ │ ├── Makefile │ │ ├── README.md │ │ ├── core.cpp │ │ ├── core_tb.cpp │ │ ├── run_hls_arty_a7.tcl │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── sysmmu.cpp │ │ └── sysmmu.h ├── paging_hashed │ ├── Makefile │ ├── README.md │ ├── dummy_allocator │ │ ├── Makefile │ │ ├── run_hls_vcu118.tcl │ │ └── top.cpp │ ├── generate_hls.sh │ ├── hls_bram_ht │ │ ├── Makefile │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── tb.cpp │ │ └── top.cpp │ ├── hls_mapping │ │ ├── Makefile │ │ ├── README.md │ │ ├── control_path.cpp │ │ ├── data_path.cpp │ │ ├── dm.cpp │ │ ├── dm.hpp │ │ ├── hash.cpp │ │ ├── hash.hpp │ │ ├── resv_table.cpp │ │ ├── resv_table.hpp │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── tb.cpp │ │ ├── top.cpp │ │ └── top.hpp │ ├── rtl │ │ ├── generate_input.py │ │ ├── input.txt │ │ └── tb_top.v │ ├── run_vivado_vcu108.tcl │ └── run_vivado_vcu118.tcl ├── paging_inverted │ ├── Makefile │ └── README.md ├── paging_multilevel │ ├── Makefile │ └── README.md ├── segfix │ ├── Makefile │ ├── internal.h │ ├── run_hls.tcl │ ├── tb.cpp │ └── top.cpp └── segvar │ ├── Makefile │ ├── internal.h │ ├── run_hls.tcl │ ├── tb.cpp │ └── top.cpp ├── net ├── Makefile ├── README.md ├── libnet │ ├── Makefile │ ├── generate_hls.sh │ ├── hls_rx_256 │ │ ├── Makefile │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── tb_256.cpp │ │ └── top_256.cpp │ ├── hls_rx_512 │ │ ├── Makefile │ │ ├── run_hls_vcu108.tcl │ │ ├── run_hls_vcu118.tcl │ │ ├── tb_512.cpp │ │ └── top_512.cpp │ ├── hls_tx │ │ └── Makefile │ └── ip_libnet │ │ ├── Makefile │ │ ├── rtl │ │ ├── ack_queue.v │ │ └── rx_libnet_512.v │ │ ├── run_vivado_vcu108.tcl │ │ ├── run_vivado_vcu118.tcl │ │ └── tb │ │ ├── ACK_QUEUE_outputs_golden.txt │ │ ├── RX_LIBNET_512_outputs_golden.txt │ │ ├── ack_queue_tb.v │ │ ├── rx_libnet_512_tb.v │ │ └── test_inputs.txt └── sysnet │ ├── Makefile │ ├── README.md │ ├── generate_hls.sh │ ├── hls_rx │ ├── Makefile │ ├── README.md │ ├── run_hls_arty_a7.tcl │ ├── run_hls_vcu108.tcl │ ├── run_hls_vcu118.tcl │ ├── tb_512.cpp │ ├── tb_64.cpp │ ├── top_512.cpp │ ├── top_512.hpp │ ├── top_64.cpp │ └── top_64.hpp │ ├── hls_rx_256 │ ├── Makefile │ ├── README.md │ ├── run_hls_vcu108.tcl │ ├── run_hls_vcu118.tcl │ ├── tb_256.cpp │ ├── top_256.cpp │ └── top_256.hpp │ ├── hls_tx │ ├── Makefile │ ├── run_hls_arty_a7.tcl │ ├── run_hls_vcu108.tcl │ ├── run_hls_vcu118.tcl │ ├── tb_512.cpp │ ├── tb_64.cpp │ ├── top_512.cpp │ ├── top_512.hpp │ ├── top_64.cpp │ └── top_64.hpp │ └── ip_sysnet │ ├── Makefile │ ├── run_vivado_arty_a7.tcl │ ├── run_vivado_vcu108.tcl │ └── run_vivado_vcu118.tcl ├── scripts ├── README.md ├── pr_utils.tcl ├── template_Makefile_hls ├── template_Makefile_vivado ├── template_generate_hls.sh ├── template_run_hls.tcl └── template_vivado_ip.tcl ├── system ├── .gitignore ├── Makefile ├── README.md ├── arty_a7 │ ├── Makefile │ ├── README.md │ ├── ip │ │ ├── .gitignore │ │ ├── board.prj │ │ └── tri_mode_ethernet_mac_0.xci │ ├── rtl │ │ ├── top.v │ │ ├── top_test_net.v │ │ ├── tri_mode_ethernet_mac_0_address_swap.v │ │ ├── tri_mode_ethernet_mac_0_axi_lite_sm.v │ │ ├── tri_mode_ethernet_mac_0_axi_mux.v │ │ ├── tri_mode_ethernet_mac_0_axi_pat_check.v │ │ ├── tri_mode_ethernet_mac_0_axi_pat_gen.v │ │ ├── tri_mode_ethernet_mac_0_axi_pipe.v │ │ ├── tri_mode_ethernet_mac_0_basic_pat_gen.v │ │ ├── tri_mode_ethernet_mac_0_bram_tdp.v │ │ ├── tri_mode_ethernet_mac_0_clk_wiz.v │ │ ├── tri_mode_ethernet_mac_0_example_design.v │ │ ├── tri_mode_ethernet_mac_0_example_design_clocks.v │ │ ├── tri_mode_ethernet_mac_0_example_design_resets.v │ │ ├── tri_mode_ethernet_mac_0_fifo_block.v │ │ ├── tri_mode_ethernet_mac_0_frame_typ.v │ │ ├── tri_mode_ethernet_mac_0_reset_sync.v │ │ ├── tri_mode_ethernet_mac_0_rx_client_fifo.v │ │ ├── tri_mode_ethernet_mac_0_support.v │ │ ├── tri_mode_ethernet_mac_0_sync_block.v │ │ ├── tri_mode_ethernet_mac_0_ten_100_1g_eth_fifo.v │ │ └── tri_mode_ethernet_mac_0_tx_client_fifo.v │ ├── run_vivado.tcl │ ├── tb │ │ └── top_tb.v │ └── top.xdc ├── shared │ └── README.md ├── vcu108 │ ├── Makefile │ ├── README.md │ ├── ip │ │ ├── .gitignore │ │ └── axi_ethernet_0.xci │ ├── rtl │ │ ├── axi_mac │ │ │ ├── axi_ethernet_0_axi_lite_ctrl.v │ │ │ ├── axi_ethernet_0_bit_sync.v │ │ │ ├── axi_ethernet_0_clocks_resets.v │ │ │ ├── axi_ethernet_0_ex_des_loc.xdc │ │ │ ├── axi_ethernet_0_example.v │ │ │ ├── axi_ethernet_0_example_design.xdc │ │ │ ├── axi_ethernet_0_reset_sync.v │ │ │ └── axi_ethernet_0_support.v │ │ ├── cdc_sync.v │ │ ├── qsfp_mac │ │ │ ├── axi4_lite.v │ │ │ └── sm.v │ │ ├── top_axi_mac.v │ │ ├── top_pcie_c2h_kvs.v │ │ ├── top_pcie_c2h_rdm.v │ │ ├── top_pcie_kvs.v │ │ ├── top_pcie_rdm.v │ │ └── top_qsfp_mac.v │ ├── run_vivado.tcl │ ├── run_vivado_pcie.tcl │ ├── scripts │ │ ├── bd_KVS_pcie_all.tcl │ │ ├── bd_KVS_pcie_raw.tcl │ │ ├── bd_RDM_KVS_pcie_raw.tcl │ │ ├── bd_RDM_pcie_all.tcl │ │ ├── bd_RDM_pcie_raw.tcl │ │ ├── bd_RDM_seg_pcie_raw.tcl │ │ ├── bd_sysclk.tcl │ │ ├── bd_sysclk_300.tcl │ │ ├── bd_xdma_c2h_bypass.tcl │ │ ├── bd_xdma_raw.tcl │ │ ├── convert_bit_mcs.tcl │ │ └── program_bpi.tcl │ ├── tb │ │ ├── axi_ethernet_0_frame_typ.v │ │ ├── axis_pktgen │ │ │ ├── axis_pktgen_tb.v │ │ │ ├── test_inputs.txt │ │ │ └── test_outputs_golden.txt │ │ ├── ddr3_model │ │ │ ├── 1024Mb_ddr3_parameters.vh │ │ │ ├── 2048Mb_ddr3_parameters.vh │ │ │ ├── 4096Mb_ddr3_parameters.vh │ │ │ ├── 8192Mb_ddr3_parameters.vh │ │ │ ├── bd_8b4f_lmb_bram_I_0.mem │ │ │ ├── bd_8b4f_second_lmb_bram_I_0.mem │ │ │ ├── ddr3.v │ │ │ ├── ddr3_sdram_model_wrapper.sv │ │ │ ├── ddr3_tb_top.v │ │ │ ├── glbl.v │ │ │ ├── microblaze_mcs_0.sv │ │ │ ├── temp_mem.txt │ │ │ └── temp_second_mem.txt │ │ ├── ddr4_model │ │ │ ├── MemoryArray.sv │ │ │ ├── StateTable.sv │ │ │ ├── StateTableCore.sv │ │ │ ├── arch_defines.v │ │ │ ├── arch_package.sv │ │ │ ├── bd_9054_lmb_bram_I_0.mem │ │ │ ├── bd_9054_second_lmb_bram_I_0.mem │ │ │ ├── ddr4_model.sv │ │ │ ├── ddr4_sdram_model_wrapper.sv │ │ │ ├── ddr4_tb_top.sv │ │ │ ├── glbl.v │ │ │ ├── interface.sv │ │ │ ├── microblaze_mcs_0.sv │ │ │ ├── proj_package.sv │ │ │ ├── temp_mem.txt │ │ │ ├── temp_second_mem.txt │ │ │ └── timing_tasks.sv │ │ ├── kvs │ │ │ ├── README.md │ │ │ ├── bd_kvs_for_mac_tb.v │ │ │ ├── bd_kvs_for_pcie_tb.v │ │ │ ├── input.txt │ │ │ ├── input_pcie.txt │ │ │ ├── output.txt │ │ │ └── output_pcie.txt │ │ ├── pcie_rp │ │ │ ├── README.md │ │ │ ├── board_common.vh │ │ │ ├── pci_exp_expect_tasks.vh │ │ │ ├── pci_exp_usrapp_cfg.v │ │ │ ├── pci_exp_usrapp_com.v │ │ │ ├── pci_exp_usrapp_pl.v │ │ │ ├── pci_exp_usrapp_rx.v │ │ │ ├── pci_exp_usrapp_tx.v │ │ │ ├── pcie3_uscale_rp_core_top.v │ │ │ ├── pcie3_uscale_rp_top.v │ │ │ ├── sample_tests.vh │ │ │ ├── tests.vh │ │ │ └── xilinx_pcie_uscale_rp.v │ │ ├── rdm │ │ │ ├── README.md │ │ │ ├── bd_rdm_for_mac_tb.v │ │ │ ├── bd_rdm_for_pcie_tb.v │ │ │ ├── input.txt │ │ │ ├── input_pcie.txt │ │ │ ├── output.txt │ │ │ └── output_pcie.txt │ │ ├── top_axi_mac_tb.v │ │ ├── top_pcie_kvs_tb.v │ │ ├── top_pcie_rdm_tb.v │ │ └── top_qsfp_mac_tb.v │ └── xdc │ │ ├── top_pcie.xdc │ │ └── top_qsfp_mac.xdc └── vcu118 │ ├── Makefile │ ├── README.md │ ├── rtl │ ├── axi_mac │ │ ├── axi_ethernet_0_axi_lite_ctrl.v │ │ ├── axi_ethernet_0_bit_sync.v │ │ ├── axi_ethernet_0_clocks_resets.v │ │ ├── axi_ethernet_0_ex_des_loc.xdc │ │ ├── axi_ethernet_0_example.v │ │ ├── axi_ethernet_0_example_design.xdc │ │ ├── axi_ethernet_0_reset_sync.v │ │ └── axi_ethernet_0_support.v │ ├── cdc_sync.v │ ├── qsfp_mac │ │ ├── axi4_lite.v │ │ └── sm.v │ ├── top_axi_mac.v │ ├── top_pcie_c2h_kvs.v │ ├── top_pcie_c2h_rdm.v │ ├── top_pcie_kvs.v │ ├── top_pcie_rdm.v │ └── top_qsfp_mac.v │ ├── run_vivado.tcl │ ├── scripts │ ├── bd_KVS_pcie_all.tcl │ ├── bd_KVS_pcie_raw.tcl │ ├── bd_RDM_KVS_pcie_raw.tcl │ ├── bd_RDM_pcie_all.tcl │ ├── bd_RDM_pcie_raw.tcl │ ├── bd_RDM_seg_pcie_raw.tcl │ ├── bd_sysclk.tcl │ ├── bd_sysclk_300.tcl │ ├── bd_xdma_c2h_bypass.tcl │ ├── bd_xdma_raw.tcl │ ├── convert_bit_mcs.tcl │ └── program_bpi.tcl │ ├── tb │ ├── axi_ethernet_0_frame_typ.v │ ├── axis_pktgen │ │ ├── axis_pktgen_tb.v │ │ ├── test_inputs.txt │ │ └── test_outputs_golden.txt │ ├── ddr3_model │ │ ├── 1024Mb_ddr3_parameters.vh │ │ ├── 2048Mb_ddr3_parameters.vh │ │ ├── 4096Mb_ddr3_parameters.vh │ │ ├── 8192Mb_ddr3_parameters.vh │ │ ├── bd_8b4f_lmb_bram_I_0.mem │ │ ├── bd_8b4f_second_lmb_bram_I_0.mem │ │ ├── ddr3.v │ │ ├── ddr3_sdram_model_wrapper.sv │ │ ├── ddr3_tb_top.v │ │ ├── glbl.v │ │ ├── microblaze_mcs_0.sv │ │ ├── temp_mem.txt │ │ └── temp_second_mem.txt │ ├── ddr4_model │ │ ├── MemoryArray.sv │ │ ├── StateTable.sv │ │ ├── StateTableCore.sv │ │ ├── arch_defines.v │ │ ├── arch_package.sv │ │ ├── bd_9054_lmb_bram_I_0.mem │ │ ├── bd_9054_second_lmb_bram_I_0.mem │ │ ├── ddr4_model.sv │ │ ├── ddr4_sdram_model_wrapper.sv │ │ ├── ddr4_tb_top.sv │ │ ├── glbl.v │ │ ├── interface.sv │ │ ├── microblaze_mcs_0.sv │ │ ├── proj_package.sv │ │ ├── temp_mem.txt │ │ ├── temp_second_mem.txt │ │ └── timing_tasks.sv │ ├── kvs │ │ ├── README.md │ │ ├── bd_kvs_for_mac_tb.v │ │ ├── bd_kvs_for_pcie_tb.v │ │ ├── input.txt │ │ ├── input_pcie.txt │ │ ├── output.txt │ │ └── output_pcie.txt │ ├── pcie_rp │ │ ├── README.md │ │ ├── board_common.vh │ │ ├── pci_exp_expect_tasks.vh │ │ ├── pci_exp_usrapp_cfg.v │ │ ├── pci_exp_usrapp_com.v │ │ ├── pci_exp_usrapp_pl.v │ │ ├── pci_exp_usrapp_rx.v │ │ ├── pci_exp_usrapp_tx.v │ │ ├── pcie3_uscale_rp_core_top.v │ │ ├── pcie3_uscale_rp_top.v │ │ ├── sample_tests.vh │ │ ├── tests.vh │ │ └── xilinx_pcie_uscale_rp.v │ ├── rdm │ │ ├── README.md │ │ ├── bd_rdm_for_mac_tb.v │ │ ├── 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