├── README.md
├── docs-jp
├── README.md
├── getting-started-tutorial
│ ├── README.md
│ ├── images
│ │ ├── ajn1527822739300.png
│ │ ├── bti1517375659015.png
│ │ ├── dfd1527614240611.png
│ │ ├── dos1504035106009.png
│ │ ├── eac1504035106964.png
│ │ ├── epe1526670476717.png
│ │ ├── evl1517376007006.png
│ │ ├── fiv1526666379843.png
│ │ ├── fpd1527885363339.png
│ │ ├── gac1517376007038.png
│ │ ├── ggi1517375659006.png
│ │ ├── gop1527872256475.png
│ │ ├── gqw1527616464174.png
│ │ ├── gvu1517375349413.png
│ │ ├── hez1517375659010.png
│ │ ├── hra1517374817424.png
│ │ ├── hsc1517376007065.png
│ │ ├── irk1526669801207.png
│ │ ├── jkq1517376007075.png
│ │ ├── jsi1526588122430.png
│ │ ├── kip1517375349372.png
│ │ ├── kkz1526589743219.png
│ │ ├── kln1517375658985.png
│ │ ├── krz1517374817479.png
│ │ ├── kye1517376007003.png
│ │ ├── kyx1527817305731.png
│ │ ├── lvb1527872988341.png
│ │ ├── mch1526589018767.png
│ │ ├── mge1517375659058.png
│ │ ├── mst1517375349397.png
│ │ ├── ngv1517375349363.png
│ │ ├── njs1517375659074.png
│ │ ├── nol1526589252028.png
│ │ ├── nrv1517376007056.png
│ │ ├── opc1517375349421.png
│ │ ├── oze1513095574595.png
│ │ ├── pdl1526589550986.png
│ │ ├── pvd1517375658992.png
│ │ ├── qff1517375349343.png
│ │ ├── qij1526672315417.png
│ │ ├── rdo1517376006997.png
│ │ ├── rqi1517376007084.png
│ │ ├── rwl1527873638755.png
│ │ ├── sno1517376007043.png
│ │ ├── soh1517375659013.png
│ │ ├── spy1527872720388.png
│ │ ├── srz1517375659047.png
│ │ ├── syl1517376007022.png
│ │ ├── ucg1517375658989.png
│ │ ├── uec1517375349409.png
│ │ ├── uxs1527612185105.png
│ │ ├── uyi1526588566181.png
│ │ ├── vfp1517375349361.png
│ │ ├── vsk1527633076891.png
│ │ ├── vvd1517376007004.png
│ │ ├── vyn1526588378013.png
│ │ ├── wkd1517375349420.png
│ │ ├── wnf1527886268336.png
│ │ ├── wpr1504035138111.png
│ │ ├── wvw1527702280355.png
│ │ ├── xpt1517376007008.png
│ │ ├── yea1517375349402.png
│ │ ├── yqo1517375659050.png
│ │ ├── zjf1517376261638.png
│ │ ├── zls1526670807184.png
│ │ └── znz1517376007025.png
│ ├── lab-1-introduction-to-the-sdsoc-development-environment.md
│ ├── lab-2-performance-estimation.md
│ ├── lab-3-optimize-the-application-code.md
│ ├── lab-4-optimize-the-accelerator-using-directives.md
│ ├── lab-5-task-level-pipelining.md
│ ├── lab-6-debug.md
│ ├── lab-7-hardware-debug.md
│ ├── lab-8-emulation.md
│ └── lab-9-installing-applications-from-github.md
├── opencv-to-xfopencv-migration-tutorial
│ ├── .vscode
│ │ └── ipch
│ │ │ ├── 2c8aee161aa37ec9
│ │ │ └── mmap_address.bin
│ │ │ └── ce896515e5c19650
│ │ │ └── mmap_address.bin
│ ├── README.md
│ ├── images
│ │ ├── 20183_colordetect_hardware_functions_specified.png
│ │ ├── 20183_create_application.png
│ │ ├── 20183_specify_hardware_functions.png
│ │ ├── 20183_system_configuration.png
│ │ ├── 20183_zcu102_platform_selection.png
│ │ ├── Thumbs.db
│ │ ├── accel_out.png
│ │ ├── application_project_dialog.png
│ │ ├── colordetect_hardware_functions_specified.png
│ │ ├── create_colordetect_project.png
│ │ ├── import_sources.png
│ │ ├── misc_build_settings.png
│ │ ├── output.png
│ │ ├── rock_landscape.jpg
│ │ ├── set_libraries_settings.png
│ │ ├── set_release_configuration.png
│ │ ├── specify_hardware_functions.png
│ │ ├── sysroot_usr_include.png
│ │ ├── system_configuration.png
│ │ ├── template_application.png
│ │ ├── toggle_hw_sw.png
│ │ ├── xvOpenCV_include_files.png
│ │ └── zcu102_platform_selection.png
│ ├── solution
│ │ ├── colordetect_accel.cpp
│ │ ├── colordetect_accel.hpp
│ │ └── colordetect_full.cpp
│ ├── source.zip
│ └── source
│ │ ├── Thumbs.db
│ │ ├── colordetect.cpp
│ │ └── rock_landscape.jpg
└── platform-creation-tutorial
│ ├── Lab1-Creating-DSA-for-Zynq-MPSoC-Processor-Design.md
│ ├── Lab2-Creating-Software-Components.md
│ ├── Lab3-Creating-Custom-Platform-Using-the-SDx-IDE.md
│ ├── README.md
│ └── images
│ ├── 1stsvg.svg
│ ├── 2ndimage.svg
│ ├── LinuxConfig.png
│ ├── acp_error.png
│ ├── clk_wiz_7.png
│ ├── export_hardware.png
│ ├── exported_platform.png
│ ├── image10.png
│ ├── image11.png
│ ├── image12.png
│ ├── image13.png
│ ├── image14.png
│ ├── image15.png
│ ├── image16.png
│ ├── image17.png
│ ├── image18.png
│ ├── image19.png
│ ├── image20.png
│ ├── image21.png
│ ├── image22.png
│ ├── image22a.png
│ ├── image23.png
│ ├── image24.png
│ ├── image25.png
│ ├── image26.png
│ ├── image27.png
│ ├── image28.png
│ ├── image29.png
│ ├── image3.png
│ ├── image30.png
│ ├── image30a.png
│ ├── image31.png
│ ├── image31a.png
│ ├── image32.png
│ ├── image33.png
│ ├── image34.png
│ ├── image35.png
│ ├── image36.png
│ ├── image37.png
│ ├── image38.png
│ ├── image39.png
│ ├── image4.png
│ ├── image40.png
│ ├── image41.png
│ ├── image42.png
│ ├── image43.png
│ ├── image44.png
│ ├── image45.png
│ ├── image46.png
│ ├── image47.png
│ ├── image48.png
│ ├── image49.png
│ ├── image5.png
│ ├── image50.png
│ ├── image51.png
│ ├── image52.png
│ ├── image53.png
│ ├── image53a.png
│ ├── image53b.png
│ ├── image54.png
│ ├── image55.png
│ ├── image56.png
│ ├── image57.png
│ ├── image58.png
│ ├── image59.png
│ ├── image6.png
│ ├── image60.png
│ ├── image61.png
│ ├── image62.png
│ ├── image63.png
│ ├── image64.png
│ ├── image65.png
│ ├── image66.png
│ ├── image67.png
│ ├── image68.png
│ ├── image69.png
│ ├── image7.png
│ ├── image70.png
│ ├── image71.png
│ ├── image72.png
│ ├── image73.png
│ ├── image74.png
│ ├── image75.png
│ ├── image76.png
│ ├── image77.png
│ ├── image78.png
│ ├── image79.png
│ ├── image8.png
│ ├── image80.png
│ ├── image81.png
│ ├── image82.png
│ ├── image83.png
│ ├── image84.png
│ ├── image85.png
│ ├── image86.png
│ ├── image87.png
│ ├── image88.png
│ ├── image89.png
│ ├── image9.png
│ ├── image90.png
│ ├── image91.png
│ ├── image92.png
│ ├── image93.png
│ ├── image94.png
│ ├── image95.png
│ ├── image96.png
│ ├── image97.png
│ ├── linux_domain.png
│ ├── petalinux_install.png
│ ├── platform_generation_complete.png
│ └── quick_links_platform.png
├── getting-started-tutorial
├── README.md
├── images
│ ├── ajn1527822739300.png
│ ├── bti1517375659015.png
│ ├── dfd1527614240611.png
│ ├── dos1504035106009.png
│ ├── eac1504035106964.png
│ ├── epe1526670476717.png
│ ├── evl1517376007006.png
│ ├── fiv1526666379843.png
│ ├── fpd1527885363339.png
│ ├── gac1517376007038.png
│ ├── ggi1517375659006.png
│ ├── gop1527872256475.png
│ ├── gqw1527616464174.png
│ ├── gvu1517375349413.png
│ ├── hez1517375659010.png
│ ├── hra1517374817424.png
│ ├── hsc1517376007065.png
│ ├── irk1526669801207.png
│ ├── jkq1517376007075.png
│ ├── jsi1526588122430.png
│ ├── kip1517375349372.png
│ ├── kkz1526589743219.png
│ ├── kln1517375658985.png
│ ├── krz1517374817479.png
│ ├── kye1517376007003.png
│ ├── kyx1527817305731.png
│ ├── lvb1527872988341.png
│ ├── mch1526589018767.png
│ ├── mge1517375659058.png
│ ├── mst1517375349397.png
│ ├── ngv1517375349363.png
│ ├── njs1517375659074.png
│ ├── nol1526589252028.png
│ ├── nrv1517376007056.png
│ ├── opc1517375349421.png
│ ├── oze1513095574595.png
│ ├── pdl1526589550986.png
│ ├── pvd1517375658992.png
│ ├── qff1517375349343.png
│ ├── qij1526672315417.png
│ ├── rdo1517376006997.png
│ ├── rqi1517376007084.png
│ ├── rwl1527873638755.png
│ ├── sno1517376007043.png
│ ├── soh1517375659013.png
│ ├── spy1527872720388.png
│ ├── srz1517375659047.png
│ ├── syl1517376007022.png
│ ├── ucg1517375658989.png
│ ├── uec1517375349409.png
│ ├── uxs1527612185105.png
│ ├── uyi1526588566181.png
│ ├── vfp1517375349361.png
│ ├── vsk1527633076891.png
│ ├── vvd1517376007004.png
│ ├── vyn1526588378013.png
│ ├── wkd1517375349420.png
│ ├── wnf1527886268336.png
│ ├── wpr1504035138111.png
│ ├── wvw1527702280355.png
│ ├── xpt1517376007008.png
│ ├── yea1517375349402.png
│ ├── yqo1517375659050.png
│ ├── zjf1517376261638.png
│ ├── zls1526670807184.png
│ └── znz1517376007025.png
├── lab-1-introduction-to-the-sdsoc-development-environment.md
├── lab-2-performance-estimation.md
├── lab-3-optimize-the-application-code.md
├── lab-4-optimize-the-accelerator-using-directives.md
├── lab-5-task-level-pipelining.md
├── lab-6-debug.md
├── lab-7-hardware-debug.md
├── lab-8-emulation.md
└── lab-9-installing-applications-from-github.md
├── opencv-to-xfopencv-migration-tutorial
├── .vscode
│ └── ipch
│ │ ├── 2c8aee161aa37ec9
│ │ └── mmap_address.bin
│ │ └── ce896515e5c19650
│ │ └── mmap_address.bin
├── README.md
├── images
│ ├── 20183_colordetect_hardware_functions_specified.png
│ ├── 20183_create_application.png
│ ├── 20183_specify_hardware_functions.png
│ ├── 20183_system_configuration.png
│ ├── 20183_zcu102_platform_selection.png
│ ├── Thumbs.db
│ ├── accel_out.png
│ ├── application_project_dialog.png
│ ├── colordetect_hardware_functions_specified.png
│ ├── create_colordetect_project.png
│ ├── import_sources.png
│ ├── misc_build_settings.png
│ ├── output.png
│ ├── rock_landscape.jpg
│ ├── set_libraries_settings.png
│ ├── set_release_configuration.png
│ ├── specify_hardware_functions.png
│ ├── sysroot_usr_include.png
│ ├── system_configuration.png
│ ├── template_application.png
│ ├── toggle_hw_sw.png
│ ├── xvOpenCV_include_files.png
│ └── zcu102_platform_selection.png
├── solution
│ ├── colordetect_accel.cpp
│ ├── colordetect_accel.hpp
│ └── colordetect_full.cpp
├── source.zip
└── source
│ ├── Thumbs.db
│ ├── colordetect.cpp
│ └── rock_landscape.jpg
└── platform-creation-tutorial
├── 1stsvg.svg
├── Lab1-Creating-DSA-for-Zynq-MPSoC-Processor-Design.md
├── Lab2-Creating-Software-Components.md
├── Lab3-Creating-Custom-Platform-Using-the-SDx-IDE.md
├── README.md
├── SDSoC_platform_creation.pdf
├── images
├── 1stsvg.svg
├── 2ndimage.svg
├── LinuxConfig.png
├── acp_error.png
├── clk_wiz_7.png
├── export_hardware.png
├── exported_platform.png
├── image10.png
├── image11.png
├── image12.png
├── image13.png
├── image14.png
├── image15.png
├── image16.png
├── image17.png
├── image18.png
├── image19.png
├── image20.png
├── image21.png
├── image22.png
├── image22a.png
├── image23.png
├── image24.png
├── image25.png
├── image26.png
├── image27.png
├── image28.png
├── image29.png
├── image3.png
├── image30.png
├── image30a.png
├── image31.png
├── image31a.png
├── image32.png
├── image33.png
├── image34.png
├── image35.png
├── image36.png
├── image37.png
├── image38.png
├── image39.png
├── image4.png
├── image40.png
├── image41.png
├── image42.png
├── image43.png
├── image44.png
├── image45.png
├── image46.png
├── image47.png
├── image48.png
├── image49.png
├── image5.png
├── image50.png
├── image51.png
├── image52.png
├── image53.png
├── image53a.png
├── image53b.png
├── image54.png
├── image55.png
├── image56.png
├── image57.png
├── image58.png
├── image59.png
├── image6.png
├── image60.png
├── image61.png
├── image62.png
├── image63.png
├── image64.png
├── image65.png
├── image66.png
├── image67.png
├── image68.png
├── image69.png
├── image7.png
├── image70.png
├── image71.png
├── image72.png
├── image73.png
├── image74.png
├── image75.png
├── image76.png
├── image77.png
├── image78.png
├── image79.png
├── image8.png
├── image80.png
├── image81.png
├── image82.png
├── image83.png
├── image84.png
├── image85.png
├── image86.png
├── image87.png
├── image88.png
├── image89.png
├── image9.png
├── image90.png
├── image91.png
├── image92.png
├── image93.png
├── image94.png
├── image95.png
├── image96.png
├── image97.png
├── linux_domain.png
├── petalinux_install.png
├── platform_generation_complete.png
└── quick_links_platform.png
└── unified.md
/README.md:
--------------------------------------------------------------------------------
1 |
2 | English | 日本語
3 |
4 |
5 |
6 |  2018.3 SDSoC™ Development Environment Tutorials
7 | See other versions
8 | |
9 |
10 |
11 |
12 |
13 |
14 | Tutorial
15 | | Description
16 | |
17 |
18 | Getting Started |
19 | This tutorial shows how to create an SDSoC environment platform that can be used to accelerate software functions using the SDx™ Integrated Development Environment (IDE) tool. |
20 |
21 |
22 | Migrate OpenCV to xfOpenCV |
23 | This tutorial demonstrates how to migrate from using OpenCV to using xfOpenCV, which is hardware-accelerated functions optimized for Xilinx® SoCs and FPGAs. By optimizing your code to use xfOpenCV, code is up to 40x faster than embedded GPUs and 100x faster than CPUs. |
24 |
25 |
26 | Platform Creation |
27 | This tutorial demonstrates how to create an SDSoC platform on which an example SDSoC application is created and run. |
28 |
29 |
30 |
31 | ## Overview
32 |
33 | The SDSoC (Software-Defined System-On-Chip) environment is an Eclipse-based Integrated Development Environment (IDE) for implementing heterogeneous embedded systems using the Zynq-7000 SoC and Zynq UltraScale+ MPSoC platforms. The SDSoC environment provides an embedded C/C++ application development experience with an easy to use Eclipse IDE, and comprehensive design tools for heterogeneous Zynq SoC development to software engineers and system architects. The SDSoC environment includes a full-system optimizing C/C++/OpenCL compiler that provides automated software acceleration in programmable logic combined with automated system connectivity generation. The application programming model within the SDSoC environment should be intuitive to software engineers. An application is written as C/C++/OpenCL code, with the programmer identifying a target platform and a subset of the functions within the application to be compiled into hardware. The SDSoC system compiler then compiles the application into hardware and software to realize the complete embedded system implemented on a Zynq device, including a complete boot image with firmware, operating system, and application executable.
34 |
35 | The SDSoC environment abstracts hardware through increasing layers of software abstraction that includes cross-compilation and linking of C/C++/OpenCL functions into programmable logic fabric as well as the Arm CPUs within a Zynq device. Based on a user specification of program functions to run in programmable hardware, the SDSoC environment performs program analysis, task scheduling and binding onto programmable logic and embedded CPUs, as well as hardware and software code generation that automatically orchestrates communication and cooperation among hardware and software components.
36 |
37 | The SDSoC environment 2018.2 release includes support for the ZC702, ZC706, and Zed development boards featuring the Zynq-7000 SoC, and for the ZCU102 development board featuring the Zynq UltraScale+ MPSoC. Additional platforms are available from partners. For more information, visit the [SDSoC development environment web page](https://www.xilinx.com/products/design-tools/software-zone/sdsoc.md).
38 |
39 |
40 | Copyright© 2019 Xilinx
41 |
--------------------------------------------------------------------------------
/docs-jp/README.md:
--------------------------------------------------------------------------------
1 |
2 | English | 日本語
3 |
4 |
5 |
6 |  2018.3 SDSoC™ 開発環境チュートリアル
7 | ほかのバージョンを参照
8 | |
9 |
10 |
11 |
12 |
13 |
14 | チュートリアル
15 | | 説明
16 | |
17 |
18 | 概要 |
19 | このチュートリアルでは、SDx™ IDE (Integrated Development Environment) ツールを使用してソフトウェア関数をアクセラレーションするために使用可能な SDSoC 環境プラットフォームの作成方法を説明します。 |
20 |
21 |
22 | OpenCV から xfOpenCV への移行 |
23 | このチュートリアルでは、OpenCV を xfOpenCV (ザイリンクス SoC および FPGA 用に最適化されたハードウェア アクセラレーション済みの関数) へ移行する方法について説明します。xfOpenCV を使用するように最適化すると、コードがエンベデッド GPU よりも最大で 40 倍、CPU よりも 100 倍高速に実行できます。 |
24 |
25 |
26 | プラットフォームの作成 |
27 | このチュートリアルでは、SDSoC プラットフォームの作成方法を説明し、そのプラットフォーム上で SDSoC アプリケーション例を作成して実行します。 |
28 |
29 |
30 |
31 | ## 概要
32 |
33 | SDSoC (Software-Defined System-On-Chip) 環境は、Zynq-7000 SoC および Zynq UltraScale+ MPSoC プラットフォームを使用してヘテロジニアス エンベデッド システムをインプリメントするための Eclipse ベースの統合設計環境 (IDE) です。SDSoC 環境では、ソフトウェア エンジニアおよびシステム アーキテクト用に、使いやすい Eclipse ベースの IDE を使用したエンベデッド C/C++ アプリケーション開発環境と、ヘテロジニアス Zynq SoC 開発用の包括的なデザイン ツールが提供されています。SDSoC 環境には、プログラマブル ロジックでの自動ソフトウェア アクセラレーションや、システム接続の自動生成などを実行する、フル システム最適化 C/C++/OpenCL コンパイラが含まれます。SDSoC 環境内のプログラミング モデルは、ソフトウェア エンジニアが簡単に理解できるように設計されています。アプリケーションは C/C++/OpenCL コードで記述され、プログラマがターゲット プラットフォームとハードウェアにコンパイルするアプリケーション内の関数のサブセットを特定します。この後、SDSoC システム コンパイラによりアプリケーションがハードウェアとソフトウェアにコンパイルされ、ファームウェア、オペレーティング システム、アプリケーション実行ファイルを含むブート イメージを含めた完全なエンベデッド システムが Zynq デバイスにインプリメントされます。
34 |
35 | SDSoC 環境では、C/C++/OpenCL 関数の Zynq デバイス内の Arm CPU だけでなくプログラマブル ロジック ファブリックへのクロスコンパイルおよびリンクを含め、ソフトウェア抽象層を増加することによりハードウェアが抽象化されます。プログラマブル ハードウェアで実行するプログラム関数のユーザー仕様に基づいて、プログラム解析、タスク スケジューリング、プログラマブル ロジックおよびエンベデッド CPU へのバインディングが実行されるほか、ハードウェアおよびソフトウェア コード生成により、ハードウェアとソフトウェア コンポーネント間の通信および連携が調整されます。
36 |
37 | SDSoC 環境 2018.2 リリースでは、Zynq-7000 SoC を搭載した ZC702、ZC706、および Zed 開発ボード、Zynq UltraScale+ MPSoC を搭載した ZCU102 開発ボードがサポートされています。その他のプラットフォームは、パートナーから入手できます。詳細は、[SDSoC 環境のウェブ ページ](https://www.xilinx.com/products/design-tools/software-zone/sdsoc.md)を参照してください。
38 |
39 |
40 | Copyright© 2019-2019 Xilinx
41 |
42 | この資料は表記のバージョンの英語版を翻訳したもので、内容に相違が生じる場合には原文を優先します。資料によっては英語版の更新に対応していないものがあります。日本語版は参考用としてご使用の上、最新情報につきましては、必ず最新英語版をご参照ください。
43 |
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1 |
2 | English | 日本語
3 |
4 |
5 |
29 |
30 | ## 概要
31 |
32 | このチュートリアルでは、SDx™ IDE (Integrated Design Environment) ツールを使用してソフトウェア関数をアクセラレーションするために使用可能な SDSoC™ プラットフォームの作成方法を説明します。
33 |
34 | >**:pushpin: 注記:** このチュートリアルには、複数の演習が含まれます。それぞれで大まかな手順が説明された後、細かい手順が説明されていますので、スキル レベルに合った方の手順を参照してください。大まかな手順を終了するのにヘルプが必要な場合は詳細な手順を参照したり、細かい手順を飛ばして次の大まかな手順に進んだりできます。
35 |
36 | ## ハードウェアおよびソフトウェア要件
37 |
38 | このチュートリアルを実行するには、SDx IDE v2018.2 をインストールしておく必要があります。インストール手順は、『SDx 環境リリース ノート、インストール、およびライセンス ガイド』 ([UG1238](https://japan.xilinx.com/cgi-bin/docs/rdoc?v=2018.2;d=ug1238-sdx-rnil.pdf)) を参照してください。SDx ツールをインストールすると、SDx IDE と必要な Vivado Design Suite と SDK (ソフトウェア開発キット) ソフトウェアがインストールされます。
39 |
40 | ## 関連情報
41 | - 演習 1: SDSoC 開発環境の概要
42 | - 演習 2: パフォーマンスの見積もり
43 | - 演習 3: アプリケーション コードの最適化
44 | - 演習 4: 指示子を使用したアクセラレータの最適化
45 | - 演習 5: タスク レベルのパイプライン
46 | - 演習 6: デバッグ
47 | - 演習 7: ハードウェア デバッグ
48 | - 演習 8: エミュレーション
49 | - 演習 9: GitHub からのサンプルのインストール
50 |
51 |
52 |
53 | Copyright© 2019-2019 Xilinx
54 |
55 | この資料は表記のバージョンの英語版を翻訳したもので、内容に相違が生じる場合には原文を優先します。資料によっては英語版の更新に対応していないものがあります。日本語版は参考用としてご使用の上、最新情報につきましては、必ず最新英語版をご参照ください。
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/docs-jp/getting-started-tutorial/lab-4-optimize-the-accelerator-using-directives.md:
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1 |
2 | English | 日本語
3 |
4 |
5 |
28 |
29 | ## 演習 4: 指示子を使用したアクセラレータの最適化
30 |
31 | この演習では、プロジェクト内のソースを変更して、生成したハードウェアのパフォーマンスへの Vivado HLS プラグマの影響について確認します。このトピックの詳細は、『SDSoC 環境プロファイルおよび最適 ガイド』 ([UG1235](https://japan.xilinx.com/cgi-bin/docs/rdoc?v=2018.2;d=ug1235-sdsoc-optimization-guide.pdf)) を参照してください。
32 |
33 | 1. [Matrix Multiplication and Addition] デザイン テンプレートを使用して、[ZC702 Platform] および [Linux] システム コンフィギュレーションで新しい SDx™ 環境プロジェクト (lab4) を作成します。
34 |
35 | 2. [lab4] タブをクリックして [SDx Project Settings] を開きます。タブが表示されていない場合は、[Project Explorer] タブの [lab4] プロジェクトの下の `project.sdx` ファイルをダブルクリックします。
36 |
37 | 3. [HW functions] パネルには、`madd` および `mmult` 関数がハードウェア アクセラレーション用にマークされた関数のリストに表示されます。
38 |
39 | 4. 最高のランタイム パフォーマンスにするには、[Active Build Configuration] オプションをクリックして [Release] を選択して [Release] コンフィギュレーションに切り替えます。または、[Build] アイコンから [Release] を選択するか、プロジェクトを右クリックして [Build Configuration] → [Set Active] → [Release] をクリックします。[Release] ビルド コンフィギュレーションでは、[Debug] ビルド コンフィギュレーションよりも高いコンパイラ最適化設定が使用されます。
40 |
41 | 5. [Project Explorer] タブで `src` フォルダー下の `mmult.cpp` をダブルクリックして、ソース エディター ビューを開きます。
42 |
43 | 6. `HLS pipeline` および `HLS array_partition` プラグマが記述されている行を見つけます。
44 |
45 | 7. これらのプラグマの行をコメントアウトします。
46 |
47 | 
48 |
49 | 8. ファイルを保存します。
50 |
51 | 9. プロジェクトの最上位フォルダーを右クリックして、[Build Project] をクリックします。
52 |
53 | 10. ビルドが終了したら、`lab4/Release/sd_card` の内容を SD カードにコピーします。
54 |
55 | 11. SD カードを ZC702 ボードに挿入し、ボードに電源を投入します。
56 |
57 | 12. SDx IDE の [Terminal] タブのシリアル ターミナルからボードに接続します。**+** アイコンをクリックして設定を開きます。
58 |
59 | 13. ボードが起動したら、Linux プロンプトでアプリケーションを実行します。`/mnt/lab4.elf` と入力します。
60 |
61 | プラグマがコメントアウトされていたときのパフォーマンスと比較すると (lab1 の結果と比較すると)、`array_partition` プラグマにより配列の要素を並列に読み出せるようになったので、内部ループのメモリ帯域幅が増加したことがわかります。pipeline プラグマでは、ループのパイプライン処理が実行され、ループの複数の反復が並列に実行されるようなったことがわかります。
62 |
63 | 
64 |
65 |
66 | Copyright© 2018 Xilinx
67 |
68 | この資料は表記のバージョンの英語版を翻訳したもので、内容に相違が生じる場合には原文を優先します。資料によっては英語版の更新に対応していないものがあります。日本語版は参考用としてご使用の上、最新情報につきましては、必ず最新英語版をご参照ください。
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1 |
2 | English | 日本語
3 |
4 |
5 |
28 |
29 | ## 演習 5: タスク レベルのパイプライン
30 |
31 | この演習では、SDx IDE で生成されたハードウェア/ソフトウェア システムをタスク レベルのパイプライン処理を使用して最適化するためにコードを変更する方法について説明します。パイプライン処理のパフォーマンスに対する影響を確認します。
32 |
33 | >**:pushpin: 注記:** このチュートリアルは、ZC702 ボードがなくても終了できます。SDSoC 環境プロジェクトを作成する際に、ボードを選択してください。このチュートリアルでは、ZC702 のアプリケーション用に作成されたソース ファイルを追加するように記述されています。ボードにより小型の Zynq-7000 デバイスが含まれる場合は、ソース ファイルを追加した後に mmult_accel.cpp ファイルを編集して、リソース使用率を減らしてください。たとえば、アクセラレータ ソース ファイルの場合は、`#pragma_HLS_array_partition` で `block factor=16` と設定されていますが、`block factor=8` と設定します。
34 |
35 |
36 | タスクのパイプライン処理
37 |
38 | アプリケーションにアクセラレータへの呼び出しが複数ある場合、これらの呼び出しをパイプライン処理して、設定およびデータ通信とアクセラレータ計算が並列処理されるように構成できます。行列乗算アプリケーションの場合は、次のイベントが実行されます。
39 |
40 | 1. 行列 A と B がメイン メモリからアクセラレータのローカル メモリに転送されます。
41 | 2. アクセラレータが実行されます。
42 | 3. 結果 C がアクセラレータからメイン メモリに戻されます。
43 |
44 | 次の図の左側に行列乗算デザイン、右側に順次実行される連続した 2 つの呼び出しに対するこれらのイベントのタイムチャートを示します。
45 |
46 | 
47 |
48 | 次の図に、これら 2 つの呼び出しをパイプライン処理して実行した場合を示します。2 番目の呼び出しのデータ転送は、最初の呼び出しのデータ転送が終わるとすぐに開始し、最初の呼び出しの実行と同時に実行されます。ただし、パイプライン処理をイネーブルにするには、アクセラレータが 1 つ目の引数セットを使用して計算を実行している間、2 番目の引数セットを格納しておくローカル メモリが必要です。SDSoC 環境では、ユーザーの指定に基づき、このためにマルチバッファーと呼ばれるメモリが生成されます。
49 |
50 | 
51 |
52 | タスク レベルのパイプライン処理を指定するには、async(id) および wait(id) プラグマを使用して呼び出しコードを記述し直す必要があります。SDSoC 環境には、async プラグマの使用方法を示すサンプルが含まれており、このチュートリアルではこの行列乗算パイプライン処理のサンプルを使用します。
53 |
54 |
55 |
56 |
57 |
58 |
59 | 行列乗算サンプルでのタスクのパイプライン処理
60 |
61 | SDx IDE には、タスク レベルのパイプライン処理をインプリメントする async プラグマの使用方法を示す行列乗算のパイプライン処理のサンプルが含まれています。この演習では、この手法を使用することによるランタイムの向上を確認します。
62 |
63 | 1. [File] → [New] → [SDx Project] をクリックし、新しい SDx プロジェクト (`lab5`) を作成します。[Project name] に `lab5` と入力し、[Platform] に [zc702]、[System Configuration] に [Linux] を選択して [Next] をクリックします。
64 |
65 | 2. 選択したプラットフォーム用のソース コード例をリストする [Templates] ページが表示されます。[Available Templates] から [Empty Application] を選択し、[Finish] をクリックします。
66 |
67 | 3. 使用しているオペレーティング システムのファイル マネージャーを使用し `/SDx/2018.2/samples/mmult_pipelined` を開き、そのディレクトリにあるソース ファイル (`mmult_accel.cpp`、`mmult_accel.h`、`mmult.cpp`) を作成したプロジェクトの `src` フォルダー (例: `./lab5/src`) にコピーします。
68 |
69 | 4. SDx で [lab5] をクリックして、コンテキスト メニューから [Refresh] をクリックします。これで前の段階でコピーしたすべてのソースがプロジェクトに追加されます。
70 |
71 | 5. ビルド コンフィギュレーションを [Release] に変更します。
72 |
73 | 6. `mmult_accel.cpp` ファイルの `mmult_accel` 関数を、[SDx Project Settings] で [Add HW Functions] アイコンをクリックするか、[Project Explorer] タブで右クリックして [Toggle HW/SW] をクリックしてマークします。
74 |
75 | 7. プロジェクトをビルドします。
76 |
77 | 8. `sd_card` フォルダーのファイルを SD カードにコピーし、ターミナルを設定して、ボード上で生成されたアプリケーションを実行します。アプリケーションの引数としてパイプライン段数を指定する必要があります。パイプラン段数を 1、2、および 3 に設定してアプリケーションを実行し、パフォーマンスを記録します。
78 |
79 | 
80 |
81 |
82 |
83 | ### まとめ
84 |
85 | このチュートリアルを終了すると、次ができるようになります。
86 |
87 | * SDx IDE 環境を使用してタスク レベルのパイプライン処理を実行することにより、アプリケーションを実行時間を短縮するよう最適化。
88 | * アクセラレータでの計算と入力および出力通信を同時に実行するアクセラレータへのパイプライン呼び出しのパフォーマンスに対する影響を確認。
89 |
90 |
91 | Copyright© 2019-2019 Xilinx
92 |
93 | この資料は表記のバージョンの英語版を翻訳したもので、内容に相違が生じる場合には原文を優先します。資料によっては英語版の更新に対応していないものがあります。日本語版は参考用としてご使用の上、最新情報につきましては、必ず最新英語版をご参照ください。
94 |
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1 |
2 | English | 日本語
3 |
4 |
5 |
28 |
29 | ## 演習 8: エミュレーション
30 |
31 | このチュートリアルでは、SDx IDE でエミュレーション機能を使用する方法を示します。デバッガーを使用してデータ転送を可視化するには、SDSoC エミュレーターでアプリケーションを実行することをお勧めします。これにより、システム停止などの問題がわかるので、シミュレーション波形ビューで関連するデータ転送を調べて、そのデータ転送に関連するハードウェア ブロックの信号にアクセスできます。
32 |
33 | まず、デザインの OS とプラットフォームを指定し、プログラムでエミュレーションを実行します。このチュートリアルでは、アクセラレーションされたシステムで実行しているアプリケーションをデバッグします。
34 |
35 | **:pushpin: 注記:** このチュートリアルは、ZC702 ボードがなくても終了できます。SDx プロジェクトを作成する際は、推奨されているエミュレーション アプリケーションのテンプレートが見つからない場合でも、ボードと使用可能なテンプレートの 1 つを選択してください。
36 |
37 |
38 | 手順 1: エミュレーションを実行するプロジェクトの作成
39 |
40 | [Emulation Example] デザイン テンプレートを使用して ZC702 プラットフォームおよび Linux OS の新しい SDx プロジェクト (`lab8`) を作成します。SDx IDE でプロジェクトを作成する手順は、次のとおりです。
41 |
42 | 1. SDx IDE が起動します。
43 | 2. [File] → [New] → [SDx Project] をクリックします。
44 | 3. [Project Type] ページでは、デフォルトで [Application Project] がオンになっています。[Next] をクリックします。
45 | 4. [Project name] フィールドにプロジェクト名を指定します (例: `lab8`)。[Next] をクリックします。
46 | 5. [Platform] から [zc702] を選択します。[Next] をクリックします。
47 | 6. [System Configuration] ドロップダウン リストから [Linux] を選択します。[Next] をクリックします。
48 | 7. [Available Templates] から [Emulation Example] を選択し、[Finish] をクリックします。
49 | 8. [lab8] タブをクリックして SDx プロジェクト設定を選択します (タブが表示されていない場合は、[Project Explorer] で `project.sdx` ファイルをダブルクリックします)。[HW functions] パネルで、プロジェクトが作成されたときに mmult_accel 関数がハードウェア関数としてマークされていることを確認します。
50 | 9. ハードウェア関数が削除されていたり、マークされていない場合は、[Add HW Functions] アイコンをクリックして表示されたダイアログ ボックス内でハードウェア関数を指定します。
51 | 10. [SDx Project Settings] の [Active build configuration] プルダウン メニューから [Debug] を、[Target] プルダウン メニューから [Emulation] を選択します。[Emulation] モデルには、[Debug] と [Optimized] の 2 つのオプションがあります。[Debug] オプションを選択して、デバッグ情報のキャプチャを有効にします。デバッグ情報なしにしてエミュレーションを速めるには、[Optimized] プルダウン メニューの方を選択します。この演習では、デフォルト オプションの [Debug] を使用します。
52 | 11. [Target] に [Emulation] を選択すると、[Generate SD card image] は淡色表示になります。
53 |
54 | 
55 |
56 | 12. [Generate emulation model] オプションをオンにしたまま、ビルド シンボルをクリックしてアプリケーションを構築します。
57 |
58 |
59 |
60 |
61 | 手順 2: エミュレーターの開始
62 |
63 | 1. [Xilinx] → [Start/Stop Emulator] をクリックします。
64 | 2. [Emulation] ダイアログ ボックスが開きます。プロジェクトと設定を選択します。
65 |
66 | 
67 |
68 | 3. 波形を表示するかどうかを選択します。波形を表示するようにすると、Vivado ツール セッションが開始されてシミュレーション ウィンドウが表示され、デザイン内のさまざまな信号の波形を確認できます。波形を表示しないようにするとエミュレーションが速く実行されます。[Show the Waveform] オプションをオンにします。
69 | 4. [Start] をクリックします。これは、ボードをオンにしたのと同じことです。
70 | 5. 波形ビューアーで表示する必要のある信号を追加します。これには、Vivado の [Scope] ウィンドウで関数を選択し、右クリックで [Add to Wave Window] をクリックします。その関数内の信号が波形ビューアーに追加されます。
71 |
72 | 
73 |
74 | 6. 信号を選択したら、[Run All] または [Run for] ボタンクリックして、プログラマブル ロジック シミュレーションを開始します。
75 |
76 |
77 |
78 |
79 | 手順 3: アプリケーションの実行
80 |
81 | エミュレーターは、開始されるまで数秒かかります。エミュレーションの開始方法:
82 |
83 | 1. SDx IDE で [lab8] を右クリックして [Debug As] → [Launch on Emulator (SDx Application Debugger)] をクリックします。
84 |
85 | 
86 |
87 | 2. [Confirm Perspective Switch] ダイアログ ボックスが表示されます。[Yes] をクリックしてパースペクティブを切り替えます。
88 | 3. パースペクティブを [Debug] に切り替えると、コードを実際のハードウェアで実行しつつデバッグできます。
89 | 4. ツールバーの [Resume] アイコンクをクリックしてコードを実行します。
90 | 5. Vivado XSim シミュレータの波形ビューアーには、さまざまな信号のステートが表示されます。
91 |
92 |
93 |
94 | ### まとめ
95 | このチュートリアルを終了すると、次ができるようになります。
96 |
97 | * SDx IDE を使用して、エミュレーション モードでアプリケーションをダウンロードして実行。
98 | * オプションで SDx IDE でソース コードをステップ スルーして、さまざまなレジスタおよびメモリを確認。
99 |
100 |
101 | Copyright© 2019-2019 Xilinx
102 |
103 | この資料は表記のバージョンの英語版を翻訳したもので、内容に相違が生じる場合には原文を優先します。資料によっては英語版の更新に対応していないものがあります。日本語版は参考用としてご使用の上、最新情報につきましては、必ず最新英語版をご参照ください。
104 |
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1 |
2 | English | 日本語
3 |
4 |
5 |
28 |
29 | ## 演習 9: GitHub からのサンプルのインストール
30 |
31 | このチュートリアルでは、ザイリンクス GitHub に含まれる SDx 環境の例をインストールする方法について説明します。
32 |
33 | まず、SDx IDE を使用して GitHub の例をインストールします。アプリケーションをインストールしたら、デザインの OS およびプラットフォームを指定し、新しくインストールしたサンプル アプリケーションを選択します。
34 |
35 | >**:pushpin: 注記:** このチュートリアルは、ZC702 ボードがなくても終了できます。SDx プロジェクトを作成する際は、推奨されているエミュレーション アプリケーションのテンプレートが見つからない場合でも、ボードと使用可能なテンプレートの 1 つを選択してください。
36 |
37 |
38 | 手順 1: GitHub からの例のダウンロードおよびインストール
39 |
40 | 1. SDx Example ストアから例をダウンロードしてインストールするには、[Xilinx] → [SDx Example] をクリックします。
41 |
42 | 
43 |
44 | 2. [SDx Example] ダイアログ ボックスが開きます。[Download] ボタンをクリックします。
45 |
46 | 
47 |
48 | 3. 例は、次のようにインストールされます。
49 |
50 | 
51 |
52 | 4. [SDx Example Store] ダイアログ ボックスで [OK] をクリックします。例は、
53 | `/Xilinx/SDx/20xx.x/examples` にインストールされます。
54 |
55 | 5. SDx ライブラリも同じ方法でダウンロードできます。
56 |
57 |
58 |
59 |
60 | 手順 2: 例を実行するプロジェクトの作成
61 |
62 | 1. [File] → [New] → [SDx Project] をクリックします。
63 | 2. [Project Type] ページでは、デフォルトで [Application Project] がオンになっています。[Next] をクリックします。
64 | 3. [Project name] フィールドにプロジェクト名を指定します (例: lab9)。[New] をクリックします。
65 | 4. [Platform] から [zc702] を選択します。[Next] をクリックします。
66 | 5. [System Configuration] ドロップダウン リストから [Linux] を選択します。[Next] をクリックします。
67 | 6. [Available Templates] から [Array Partitioning] を選択し、[Finish] をクリックします。
68 | 7. [lab9] タブをクリックして SDx プロジェクト設定を選択します (タブが表示されていない場合は、[Project Explorer] で `project.sdx` ファイルをダブルクリックします)。[HW functions] パネルで、プロジェクトが作成されたときに matmul_partition_accel 関数がハードウェア関数としてマークされていることを確認します。
69 | 8. ハードウェア関数が削除されていたり、マークされていない場合は、[Add HW Functions] アイコンをクリックして表示されたダイアログ ボックス内でハードウェア関数を指定します。
70 | 9. ツールバーの [Build] アイコンをクリックしてプロジェクトをビルドします。
71 |
72 |
73 |
74 |
75 | 手順 3: アプリケーションの実行
76 |
77 | ビルドが終わったら、前の章で説明したように、その他の例を実行する場合と同じ方法でアプリケーションを実行できるようになります。
78 |
79 |
80 | ### まとめ
81 | このチュートリアルを終了すると、次ができるようになります。
82 |
83 | * SDx IDE を使用して、ザイリンクス GitHub から例をダウンロードしてインストールします。
84 | * ターゲット プラットフォームでデザイン例を実行します。
85 |
86 |
87 | Copyright© 2019-2019 Xilinx
88 |
89 | この資料は表記のバージョンの英語版を翻訳したもので、内容に相違が生じる場合には原文を優先します。資料によっては英語版の更新に対応していないものがあります。日本語版は参考用としてご使用の上、最新情報につきましては、必ず最新英語版をご参照ください。
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/docs-jp/opencv-to-xfopencv-migration-tutorial/solution/colordetect_accel.cpp:
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1 | #include "colordetect_accel.hpp"
2 |
3 | void colordetect_accel( xf::Mat &_src,
4 | xf::Mat &_hsv,
5 | xf::Mat &_range,
6 | xf::Mat &_erode,
7 | xf::Mat &_dilate1,
8 | xf::Mat &_dilate2,
9 | xf::Mat &_dst,
10 | unsigned char nLowThresh[3][3],
11 | unsigned char nHighThresh[3][3],
12 | unsigned char accel_kernel[FILTER_SIZE*FILTER_SIZE]) {
13 |
14 | unsigned char low_thresh[9];
15 | unsigned char high_thresh[9];
16 |
17 | for(int i = 0; i < 3; ++i)
18 | for(int j = 0; j < 3; ++j) {
19 | low_thresh[i*3+j] = nLowThresh[i][j];
20 | high_thresh[i*3+j] = nHighThresh[i][j];
21 | }
22 |
23 | xf::RGB2HSV(_src, _hsv);
24 | xf::colorthresholding(_hsv, _range, low_thresh, high_thresh);
25 |
26 | xf::erode(_range, _erode, accel_kernel);
27 | xf::dilate(_erode, _dilate1, accel_kernel);
28 | xf::dilate(_dilate1, _dilate2, accel_kernel);
29 | xf::erode(_dilate2, _dst, accel_kernel);
30 | }
31 |
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/docs-jp/opencv-to-xfopencv-migration-tutorial/solution/colordetect_accel.hpp:
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1 | #include "hls_stream.h"
2 | #include "ap_int.h"
3 | #include "common/xf_common.h"
4 | #include "common/xf_utility.h"
5 | #include "imgproc/xf_colorthresholding.hpp"
6 | #include "imgproc/xf_rgb2hsv.hpp"
7 | #include "imgproc/xf_erosion.hpp"
8 | #include "imgproc/xf_dilation.hpp"
9 |
10 | #define MAXCOLORS 3
11 | #define WIDTH 1920
12 | #define HEIGHT 1080
13 | #define FILTER_SIZE 3
14 | #define KERNEL_SHAPE XF_SHAPE_RECT
15 | #define ITERATIONS 1
16 |
17 | void colordetect_accel( xf::Mat &_src,
18 | xf::Mat &_hsv,
19 | xf::Mat &_range,
20 | xf::Mat &_erode,
21 | xf::Mat &_dilate1,
22 | xf::Mat &_dilate2,
23 | xf::Mat &_dst,
24 | unsigned char nLowThresh[3][3],
25 | unsigned char nHighThresh[3][3],
26 | unsigned char accel_kernel[FILTER_SIZE*FILTER_SIZE]);
27 |
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/docs-jp/opencv-to-xfopencv-migration-tutorial/solution/colordetect_full.cpp:
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1 | // colordetect.cpp : Defines the entry point for the console application.
2 | //
3 |
4 | #include "colordetect.hpp"
5 | #include
6 | #if __SDSCC__
7 | #undef __ARM_NEON__
8 | #undef __ARM_NEON
9 | #include "opencv2/highgui/highgui.hpp"
10 | #include "opencv2/imgproc/imgproc.hpp"
11 | #include
12 | #include "opencv2/imgcodecs/imgcodecs.hpp"
13 | #define __ARM_NEON__
14 | #define __ARM_NEON
15 | #else
16 | #include "opencv2/highgui/highgui.hpp"
17 | #include "opencv2/imgproc/imgproc.hpp"
18 | #include
19 | #endif
20 |
21 | #include "sds_lib.h"
22 |
23 | unsigned long clock_start, clock_end;
24 | #define TIME_STAMP_INIT clock_start = sds_clock_counter();
25 | #define TIME_STAMP { clock_end = sds_clock_counter(); printf("elapsed time %lu \nelapsed real-time %f ms \n", clock_end-clock_start, (1000.0/sds_clock_frequency())*(double)(clock_end-clock_start)); clock_start = sds_clock_counter(); }
26 |
27 | // colordetect
28 | // Description:
29 | // Will detect the colors from the thresholds provided
30 | // Inputs:
31 | // - in_img
32 | // - nLowThresh
33 | // - nHighThresh
34 | // - _kernel
35 | // Output:
36 | // - out_img
37 |
38 | void colordetect(cv::Mat &_src,
39 | cv::Mat &_dst,
40 | unsigned char nLowThresh[3][3],
41 | unsigned char nHighThresh[3][3],
42 | cv::Mat &_kernel) {
43 |
44 | // Temporary matrices for processing
45 | cv::Mat mask1, mask2, mask3, _imgrange, _imghsv;
46 |
47 | // Convert the input to the HSV colorspace. Using BGR here since it is the default of OpenCV.
48 | // Using RGB yields different results, requiring a change of the threshold ranges
49 | cv::cvtColor(_src, _imghsv, cv::COLOR_BGR2HSV);
50 |
51 | // Get the color of Yellow from the HSV image and store it as a mask
52 | cv::inRange(_imghsv, cv::Scalar(nLowThresh[0][0], nLowThresh[0][1], nLowThresh[0][2]), cv::Scalar(nHighThresh[0][0], nHighThresh[0][1], nHighThresh[0][2]), mask1);
53 |
54 | // Get the color of Green from the HSV image and store it as a mask
55 | cv::inRange(_imghsv, cv::Scalar(nLowThresh[1][0], nLowThresh[1][1], nLowThresh[1][2]), cv::Scalar(nHighThresh[1][0], nHighThresh[1][1], nHighThresh[1][2]), mask2);
56 |
57 | // Get the color of Red from the HSV image and store it as a mask
58 | cv::inRange(_imghsv, cv::Scalar(nLowThresh[2][0], nLowThresh[2][1], nLowThresh[2][2]), cv::Scalar(nHighThresh[2][0], nHighThresh[2][1], nHighThresh[2][2]), mask3);
59 |
60 | // Bitwise OR the masks together (adding them) to the range
61 | _imgrange = mask1 | mask2 | mask3;
62 |
63 | // First erode
64 | cv::erode(_imgrange, _dst, _kernel);
65 | // First dilate
66 | cv::dilate(_dst, _dst, _kernel);
67 | // Second dilate
68 | cv::dilate(_dst, _dst, _kernel);
69 | // Second erode
70 | cv::erode(_dst, _dst, _kernel);
71 | }
72 |
73 | int main(int argc, char **argv)
74 | {
75 | //Create the input/output cv::Mat objects
76 | cv::Mat in_img, out_img;
77 | cv::Mat imghsv, imgrange, imgerode, imgdilate1, imgdilate2;
78 |
79 | // Define the low and high thresholds
80 | // Want to grab 3 colors (Yellow, Green, Red) for the input image
81 | unsigned char nLowThresh[3][3] = { { 22, 150, 60 }, // Lower boundary for Yellow
82 | { 38, 150, 60 }, // Lower boundary for Green
83 | { 160, 150, 60 } }; // Lower boundary for Red
84 | unsigned char nHighThresh[3][3] = { { 38, 255, 255 }, // Upper boundary for Yellow
85 | { 75, 255, 255 }, // Upper boundary for Green
86 | { 179, 255, 255 } }; // Upper boundary for Red
87 |
88 | unsigned char accel_kernel[FILTER_SIZE*FILTER_SIZE] = {0};
89 |
90 | // Read in the commandline for an image
91 | in_img = cv::imread(argv[1], 1);
92 | if (!in_img.data) {
93 | return -1;
94 | }
95 |
96 | xf::Mat xfIn(in_img.rows, in_img.cols);
97 | xfIn.copyTo(in_img.data);
98 | xf::Mat xfOut(in_img.rows, in_img.cols);
99 |
100 | xf::Mat xfHSV(in_img.rows, in_img.cols);
101 | xf::Mat xfRange(in_img.rows, in_img.cols);
102 | xf::Mat xfErode(in_img.rows, in_img.cols);
103 | xf::Mat xfDilate1(in_img.rows, in_img.cols);
104 | xf::Mat xfDilate2(in_img.rows, in_img.cols);
105 |
106 | // Setup the kernel matrix
107 | cv::Mat element = cv::getStructuringElement(cv::MORPH_ELLIPSE, cv::Size(FILTER_SIZE, FILTER_SIZE), cv::Point(-1,-1));
108 |
109 | for(int i = 0; i < (FILTER_SIZE*FILTER_SIZE); i++)
110 | accel_kernel[i] = element.data[i];
111 |
112 | // Create the output image to match the input image (CV_8U)
113 | int height = in_img.rows;
114 | int width = in_img.cols;
115 | out_img.create(height, width, CV_8U);
116 |
117 | // Run the input and thresholds into the colordectect function
118 |
119 | std::cout << "CPU" << std::endl;
120 | TIME_STAMP_INIT
121 | colordetect(in_img, out_img, nLowThresh, nHighThresh, element);
122 | TIME_STAMP
123 |
124 | std::cout << "Accelerator" << std::endl;
125 | TIME_STAMP_INIT
126 | colordetect_accel(xfIn,xfHSV,xfRange,xfErode,xfDilate1,xfDilate2,xfOut,nLowThresh,nHighThresh, accel_kernel);
127 | TIME_STAMP
128 |
129 | cv::Mat accel_out(height, width, CV_8U);
130 | accel_out.data = xfOut.copyFrom();
131 |
132 | // Write out the input image and the output image
133 | cv::imwrite("accel_out.png",accel_out);
134 | cv::imwrite("output.png", out_img);
135 | cv::imwrite("input.png", in_img);
136 | return 0;
137 | }
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/docs-jp/opencv-to-xfopencv-migration-tutorial/source/colordetect.cpp:
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1 | // colordetect.cpp : Defines the entry point for the console application.
2 | //
3 |
4 | #include
5 | #include
6 | #include
7 | #include
8 |
9 | // colordetect
10 | // Description:
11 | // Will detect the colors from the thresholds provided
12 | // Inputs:
13 | // - in_img
14 | // - nLowThresh
15 | // - nHighThresh
16 | // - _kernel
17 | // Output:
18 | // - out_img
19 | void colordetect(cv::Mat &_src,
20 | cv::Mat &_dst,
21 | unsigned char nLowThresh[3][3],
22 | unsigned char nHighThresh[3][3],
23 | cv::Mat &_kernel) {
24 |
25 | // Temporary matrices for processing
26 | cv::Mat mask1, mask2, mask3, _imgrange, _imghsv;
27 |
28 | // Convert the input to the HSV colorspace. Using BGR here since it is the default of OpenCV.
29 | // Using RGB yields different results, requiring a change of the threshold ranges
30 | cv::cvtColor(_src, _imghsv, cv::COLOR_BGR2HSV);
31 |
32 | // Get the color of Yellow from the HSV image and store it as a mask
33 | cv::inRange(_imghsv, cv::Scalar(nLowThresh[0][0], nLowThresh[0][1], nLowThresh[0][2]), cv::Scalar(nHighThresh[0][0], nHighThresh[0][1], nHighThresh[0][2]), mask1);
34 |
35 | // Get the color of Green from the HSV image and store it as a mask
36 | cv::inRange(_imghsv, cv::Scalar(nLowThresh[1][0], nLowThresh[1][1], nLowThresh[1][2]), cv::Scalar(nHighThresh[1][0], nHighThresh[1][1], nHighThresh[1][2]), mask2);
37 |
38 | // Get the color of Red from the HSV image and store it as a mask
39 | cv::inRange(_imghsv, cv::Scalar(nLowThresh[2][0], nLowThresh[2][1], nLowThresh[2][2]), cv::Scalar(nHighThresh[2][0], nHighThresh[2][1], nHighThresh[2][2]), mask3);
40 |
41 | // Bitwise OR the masks together (adding them) to the range
42 | _imgrange = mask1 | mask2 | mask3;
43 |
44 | // First erode
45 | cv::erode(_imgrange, _dst, _kernel);
46 | // First dilate
47 | cv::dilate(_dst, _dst, _kernel);
48 | // Second dilate
49 | cv::dilate(_dst, _dst, _kernel);
50 | // Second erode
51 | cv::erode(_dst, _dst, _kernel);
52 | }
53 |
54 |
55 | int main(int argc, char **argv)
56 | {
57 | //Create the input/output cv::Mat objects
58 | cv::Mat in_img, out_img;
59 | cv::Mat imghsv, imgrange, imgerode, imgdilate1, imgdilate2;
60 |
61 | // Define the low and high thresholds
62 | // Want to grab 3 colors (Blue, Green, Orange) for teh input image
63 | unsigned char nLowThresh[3][3] = { { 110, 150, 20 }, // Lower boundary for Blue
64 | { 38, 0, 20 }, // Lower boundary for Green
65 | { 10, 150, 20 } }; // Lower boundary for Orange
66 | unsigned char nHighThresh[3][3] = { { 130, 255, 255 }, // Upper boundary for Blue
67 | { 75, 125, 255 }, // Upper boundary for Green
68 | { 25, 255, 255 } }; // Upper boundary for Orange
69 |
70 | // Setup the kernel matrix
71 | cv::Mat element = cv::getStructuringElement(cv::MORPH_ELLIPSE, cv::Size(FILTER_SIZE, FILTER_SIZE), cv::Point(-1,-1));
72 |
73 | // Read in the commandline for an image
74 | in_img = cv::imread(argv[1], 1);
75 | if (!in_img.data) {
76 | return -1;
77 | }
78 |
79 | // Create the output image to match the input image (CV_8U)
80 | int height = in_img.rows;
81 | int width = in_img.cols;
82 | out_img.create(height, width, CV_8U);
83 |
84 | // Run the input and thresholds into the colordect function
85 | colordetect(in_img, out_img, nLowThresh, nHighThresh, element);
86 |
87 | // Write out the input image and the output image
88 | cv::imwrite("output.png", out_img);
89 | cv::imwrite("input.png", in_img);
90 |
91 | return 0;
92 | }
93 |
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1 |
2 | English | 日本語
3 |
4 |
5 |
22 |
23 | ## 演習 3: カスタム プラットフォームの使用
24 |
25 | 1. SDx IDE メニュー 、から **[File]** → **[New]** → **[SDx Application Project]** をクリックして新しいアプリケーション プロジェクトの作成を開始します。
26 |
27 | 2. [Create a New SDx Application Project] ダイアログ ボックスでプロジェクトの名前に **sdx\_app1** と入力します。
28 |
29 | 3. **[Next]** をクリックします。
30 |
31 | 
32 |
33 | 4. [Platform] ダイアログ ボックスで **[Add Custom Platform]** (**+** アイコン) をクリックします。
34 |
35 | [Specify Custom Platform Location] ダイアログ ボックスが開くので、プラットフォームのフォルダーを選択します。このチュートリアルの手順に従ってきた場合、プラットフォームは /tmp/sdx_workspace/zcu102_board/export/zcu102_board に含まれます。
36 |
37 | 
38 |
39 | 5. **[zcu102_board]** プラットフォームを [Platform] ダイアログ ボックスで選択したら、**[Next]** をクリックします。
40 |
41 | 6. [System Configuration] ページは、デフォルト設定のままにします。
42 |
43 | - \[System configuration]: **sysconfig1**
44 | - \[Runtime]: **C/C++**
45 | - \[Domain]: **standalone on psu_cortexa53**
46 | - \[CPU]: **psu_cortexa53_0**
47 | - \[OS]: **standalone**
48 |
49 | 
50 | Linux アプリケーションを生成する場合は、[LinuxConfig] システムを選択します。
51 | 7. **[Next]** をクリックします。
52 |
53 | 8. [Templates] ページで **[Array Partitioning]** を選択して **[Finish]** をクリックします。
54 |
55 | 
56 |
57 | **注記:** サンプル アプリケーションを取得またはアップデートするには、**[SDx Examples]** ボタンをクリックします。詳細は、『SDSoC 開発環境ユーザー ガイド』 ([UG1027](https://japan.xilinx.com/support/documentation/sw_manuals_j/xilinx2018_3/ug1027-sdsoc-user-guide.pdf)) を参照してください。
58 |
59 | 新しく作成した SDSoC アプリケーション `sdx_app1` が [Project Explorer] ビューおよび [Assistant] ビューに表示されます。
60 |
61 | >:pushpin: **注記:**
62 | >[Assistant] ビューには、[Array Partitioning] 例の一部である `matmul_partition_accel` という名前のハードウェア アクセラレーション関数が表示されます。
63 |
64 | 1. [Application Project Settings] ウィンドウには `sdx_app1` の設定が表示されます。
65 |
66 | 
67 |
68 | 1. [Assistant] ビューで **[sdx_app1 [SDSoC]]** の下の **[Debug[Hardware]]** を右クリックし、**[Build]** をクリックします。
69 |
70 | 1. [Assistant] ビューには、次のリンクを使用したビルド結果が表示されます。
71 |
72 | - コンパイル ログ
73 |
74 | - アクセラレータのデータ モーション レポート
75 |
76 | - 生成された SD カード イメージの内容
77 |
78 | 
79 |
80 | 1. [Console] ビューをスクロールすると、**sds.log** に含まれるのログのビルド プロセスの記録を確認することもできます。
81 |
82 | 
83 |
84 | 1. [Assistant] ビューで **[SD Card Image]** を右クリックし、**[Open]** → **[Open in File Browser]** をクリックして、ディスクの SD カードの内容を表示します。`sd_card` ディレクトリは `/tmp/sdx_workspace/sdx_app1/Debug/sd_card` の SDx ワークスペース内に含まれます。
85 |
86 | 
87 |
88 | SD カードの内容を FAT32 フォーマットの SD カードにコピーして、この SD カードを使用して ZCU102 プラットフォームを起動して、ターミナル プログラムで sdx\_app1 UART 出力を確認します。
89 |
90 | ### まとめ
91 |
92 | 演習 3 では、スタンドアロン ソフトウェア ランタイム環境を使用して Zynq UltraScale+ MPSoC をターゲットにしたカスタム SDSoC プラットフォームを作成しました。また、カスタム SDSoC プラットフォーム (zcu102_board) 上に SDSoC の配列パーティションの例をビルドしました。
93 |
94 | ### チュートリアル終了
95 |
96 | ## 関連情報
97 | - 演習 1: Zynq UltraScale+ MPSoC プロセッサ デザイン用の DSA の作成
98 | - 演習 2: SDSoC プラットフォームの作成
99 |
100 | Copyright© 2019 Xilinx
101 |
102 | この資料は表記のバージョンの英語版を翻訳したもので、内容に相違が生じる場合には原文を優先します。資料によっては英語版の更新に対応していないものがあります。日本語版は参考用としてご使用の上、最新情報につきましては、必ず最新英語版をご参照ください。
103 |
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1 |
2 | English | 日本語
3 |
4 |
5 |
22 |
23 | ## 概要
24 |
25 | SDSoC™ 開発環境は、Zynq®-7000 SoC または Zynq UltraScale+™ MPSoC デバイスを使用してヘテロジニアス エンベデッド システムをインプリメントするのに必要なツールです。
26 |
27 | このチュートリアルでは、SDSoC プラットフォームの作成方法を説明し、そのプラットフォーム上で SDSoC アプリケーション例を作成して実行します。ハードウェア プラットフォームの作成には Vivado® Design Suite を、SDSoC アプリケーションを含むソフトウェア プラットフォームの作成には SDx™ 統合環境 (IDE) を使用します。
28 |
29 | プラットフォームのコンセプトは SDSoC 環境には不可欠で、SDSoC アプリケーションをビルドするハードウェア、ソフトウェア、メタデータ コンポーネントを定義します。SDSoC プラットフォームでは、ベース ハードウェアおよびソフトウェア アーキテクチャおよびアプリケーション コンテキストが定義されます。これには、プロセッシング システム、外部メモリ インターフェイス、カスタム入力/出力、ソフトウェア ランタイムが含まれます。ソフトウェア ランタイムには、オペレーティング システム (ベアメタルの場合もあり)、ブートローダー、プラットフォーム ペリフェラルやルート ファイル システムのドライバーが含まれます。SDx 環境内で作成したプロジェクトは、すべて特定のハードウェア プラットフォームをターゲットとし、sds++/sdscc システム コンパイラ (sds++ と呼ぶ) などのツールを使用して、そのプラットフォームのアプリケーション特有のハードウェア アクセラレータおよびデータ モーション ネットワークをカスタマイズします。
30 |
31 | 
32 |
33 | このチュートリアルには、スタンドアロンまたはベアメタル ソフトウェア ランタイム環境で動作する Zynq UltraScale+ MPSoC ベースの ZCU102 ボードをターゲットにした 3 つの演習が含まれます。プラットフォームを構成するハードウェアおよびソフトウェア コンポーネントをビルドする方法を手順ごとに説明します。
34 |
35 | 1. プラットフォームのデバイス サポート アーカイブ (DSA) と呼ばれるハードウェア コンポーネントを作成します。
36 |
37 | 1. DSA には、IP インテグレーター ハードウェア デザインとデザインのメタデータ プロパティが含まれます。
38 |
39 | 2. ソフトウェア コンポーネントを定義して、それらをハードウェア DSA とマッチングさせて SDSoC プラットフォームを作成します。
40 |
41 | 1. SDx IDE とその 4 つの段階プロセスを使用してカスタム プラットフォームを作成します。
42 |
43 | 3. SDSoC ハードウェア アクセラレーション アプリケーションを新しいプラットフォームに作成して実行します。
44 |
45 |
46 | Zynq ファミリでサポートされるプラットフォームでは、ハードウェアおよびソフトウェアのシステム デザインをパーティションして最適化可能な製品を開発できるように、Arm ベースのプロセッサ システム (PS) と高パフォーマンスのユーザー プログラマブル ロジック (PL) がまとめられます。次の図は、プラットフォームが作成される Zynq デバイスの機能を示しています。
47 |
48 | 
49 |
50 | Zynq ベースのプラットフォームでは、PS Arm プロセッサ コア、統合 PS I/O (MIO) ペリフェラル ブロック、PS 外部 DDR メモリ コントローラー、多数のコンフィギュレーション可能な PS to PL および PL to PS インターフェイスのほか、PL 用にデザインされたロジック ブロックも使用できます。
51 |
52 | SDSoC 環境の詳細は、『SDSoC 環境ガイド』 ([UG1027](https://japan.xilinx.com/support/documentation/sw_manuals_j/xilinx2018_3/ug1027-sdsoc-user-guide.pdf)) および『SDSoC 環境プラットフォーム開発ガイド』 ([UG1146](https://japan.xilinx.com/support/documentation/sw_manuals_j/xilinx2018_3/ug1146-sdsoc-platform-development.pdf)) を参照してください。
53 |
54 | ## ハードウェアおよびソフトウェア要件
55 |
56 | このチュートリアルを実行するには、2018.3 SDx をインストールしておく必要があります。インストール手順、リリース ノート、インストールおよびライセンスの詳細は、『SDSoC 環境リリース ノート、インストール、およびライセンス ガイド』 ([UG1294](https://japan.xilinx.com/support/documentation/sw_manuals_j/xilinx2018_3/ug1294-sdsoc-rnil.pdf)) を参照してください。すべて SDx 環境に、ターゲット デバイスのプラグラムおよびカスタム ハードウェア プラットフォームの開発のために Vivado Design Suite が含まれます。ターゲット ボードがなくてもビルド手順はすべて終了できますが、ハードウェアでのテストには ZCU102 が必要です。
57 |
58 | このプラットフォーム作成のチュートリアルの手順に従うと、スタンドアロン ターゲット アプリケーション用の ZCU102 SDSoC プラットフォームが生成できます。Linux オペレーティング システム ターゲット環境内で実行できるアプリケーションの作成については、『SDSoC 環境プラットフォーム開発ガイド』 ([UG1146](https://japan.xilinx.com/support/documentation/sw_manuals_j/xilinx2018_2/ug1146-sdsoc-platform-development.pdf)) を参照してください。Linux ターゲット アプリケーションは Linux ホスト マシンでビルドする必要がありますが、スタンドアロン ターゲット アプリケーションは Windows または Linux ホスト マシンのいずれかでビルドできます。
59 |
60 | 次は、このチュートリアルに最低限必要なソフトウェアおよびハードウェア要件です。
61 |
62 | - [SDSoC 2018.3 開発環境] (https://japan.xilinx.com/support/download.html)
63 |
64 | - [UG1294](https://japan.xilinx.com/support/documentation/sw_manuals_j/xilinx2018_3/ug1294-sdsoc-rnil.pdf): リリース ノート、インストール、およびライセンス ガイド
65 |
66 | - [ZCU102 評価ボード](https://japan.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html)
67 |
68 | - FAT32 フォーマットの SD カード
69 |
70 | - ZCU102 USB to UART インターフェイス用 USB Host Type-A to mini-USB ケーブル
71 |
72 | - Silicon Labs CP210x の Host PC USB to UART ドライバー
73 |
74 | - [XTP426](https://japan.xilinx.com/support/documentation/boards_and_kits/install/ug1033-cp210x-usb-uart-install.pdf): Silicon Labs CP210x USB-to-UART インストール ガイド
75 |
76 | ## 関連情報
77 | - 演習 1: Zynq UltraScale+ MPSoC プロセッサ デザイン用の DSA の作成
78 | - 演習 2: SDSoC プラットフォームの作成
79 | - 演習 3: カスタム プラットフォームの使用
80 |
81 |
82 | Copyright© 2019-2019 Xilinx
83 |
84 | この資料は表記のバージョンの英語版を翻訳したもので、内容に相違が生じる場合には原文を優先します。資料によっては英語版の更新に対応していないものがあります。日本語版は参考用としてご使用の上、最新情報につきましては、必ず最新英語版をご参照ください。
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1 |
2 | English | 日本語
3 |
4 |
5 |
29 |
30 | ## Introduction
31 |
32 | This tutorial shows how to create an SDSoC™ platform that can be used to accelerate software functions using the SDx™ Integrated Design Environment (IDE) tool.
33 |
34 | >**:pushpin: NOTE:** This tutorial is separated into labs. Each lab provides general instructions and supplementary detailed steps, allowing you to make choices based on your skill level as you progress through it. If you need help completing a general instruction, go to the detailed steps, or if you are ready, simply skip the step-by-step directions and move on to the next general instruction.
35 |
36 | ## Hardware and Software Requirements
37 |
38 | This tutorial requires that you have the SDx Integrated Design Environment v2018.2 installed. See the SDx Environments Release Notes, Installation, and Licensing Guide ([UG1238](https://www.xilinx.com/cgi-bin/docs/rdoc?v=2018.2;d=ug1238-sdx-rnil.pdf)) for instructions. The SDx tool installs the SDx IDE as well as the required Vivado Design Suite and Software Development Kit (SDK) software.
39 |
40 | ## Related information
41 | - Lab 1: Introduction to the SDSoC Development Environment
42 | - Lab 2: Performance Estimation
43 | - Lab 3: Optimize the Application Code
44 | - Lab 4: Optimize the Accelerator Using Directives
45 | - Lab 5: Task-Level Pipelining
46 | - Lab 6: Debug
47 | - Lab 7: Hardware Debug
48 | - Lab 8: Emulation
49 | - Lab 9: Installing Examples from GitHub
50 |
51 |
52 |
53 | Copyright© 2019 Xilinx
54 |
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/getting-started-tutorial/lab-4-optimize-the-accelerator-using-directives.md:
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1 |
2 | English | 日本語
3 |
4 |
5 |
28 |
29 | ## Lab 4: Optimize the Accelerator Using Directives
30 |
31 | In this exercise, you modify the source file in the project to observe the effects of Vivado HLS pragmas on the performance of generated hardware. See the SDSoC Environment Profiling and Optimization Guide ([UG1235](https://www.xilinx.com/cgi-bin/docs/rdoc?v=2018.2;d=ug1235-sdsoc-optimization-guide.pdf)) for more information on this topic.
32 |
33 | 1. Create a new project in the SDx™ environment (lab4) for the ZC702 Platform and Linux System Configuration using the design template for Matrix Multiplication and Addition.
34 |
35 | 2. Click on the tab labeled **lab4** to view the SDx Project Settings. If the tab is not visible, in the Project Explorer double click on the `project.sdx` file under the lab4 project.
36 |
37 | 3. In the HW Functions panel, observe that the `madd` and `mmult` functions already appear in the list of functions marked for hardware acceleration.
38 |
39 | 4. To get the best runtime performance, switch to use the Release configuration by clicking on the Active Build Configuration option and then selecting **Release**. You could also select Release from the Build icon, or by right-clicking the project and selecting **Build Configuration > Set Active > Release**. The Release build configuration uses a higher compiler optimization setting than the Debug build configurations.
40 |
41 | 5. Double click the `mmult.cp`p under the `src` folder in the Project Explorer view to bring up the source editor view.
42 |
43 | 6. Find the lines where the pragmas `HLS pipeline` and `HLS array_partition` are located.
44 |
45 | 7. Remove these pragmas by commenting out the lines.
46 |
47 | 
48 |
49 | 8. Save the file.
50 |
51 | 9. Right click the top-level folder for the project and click Build Project in the menu.
52 |
53 | 10. After the build completes, copy the contents of `lab4/Release/sd_card` to an SD card.
54 |
55 | 11. Insert the SD card into the ZC702 board and power on the board.
56 |
57 | 12. Connect to the board from a serial terminal in the SDx Terminal tab of the SDx IDE. Click the **+** icon to open the settings.
58 |
59 | 13. After the board boots up, you can execute the application at the Linux prompt. Type `/mnt/lab4.elf`.
60 |
61 | Observe the performance and compare it with the performance achieved with the commented out pragmas present (compare it with the results of lab1). Note that the `array_partition` pragmas increase the memory bandwidth for the inner loop by allowing array elements to be read in parallel. The pipeline pragma on the other hand performs pipelining of the loop and allows multiple iterations of a loop to run in parallel.
62 |
63 | 
64 |
65 |
66 | Copyright© 2018 Xilinx
67 |
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/getting-started-tutorial/lab-5-task-level-pipelining.md:
--------------------------------------------------------------------------------
1 |
2 | English | 日本語
3 |
4 |
5 |
28 |
29 | ## Lab 5: Task-Level Pipelining
30 |
31 | This lab demonstrates how to modify your code to optimize the hardware-software system generated by the SDx IDE using task-level pipelining. You can observe the impact of pipelining on performance.
32 |
33 | >**:pushpin: NOTE** You can complete this tutorial even if you do not have a ZC702 board. When creating the SDSoC environment project, select your board. The tutorial instructions ask you to add source files created for an application created for the ZC702. If your board contains a smaller Zynq-7000 device, after adding source files you need to edit the file `mmult_accel.cpp` to reduce resource usage (in the accelerator source file you will see `#pragma_HLS_array_partition` which sets `block factor=16`; instead, set `block factor=8`).
34 |
35 |
36 | Task Pipelining
37 |
38 | If there are multiple calls to an accelerator in your application, then you can structure your application such that you can pipeline these calls and overlap the setup and data transfer with the accelerator computation. In the case of the matrix multiply application, the following events take place:
39 |
40 | 1. Matrices A and B are transferred from the main memory to accelerator local memories.
41 | 2. The accelerator executes.
42 | 3. The result, C, is transferred back from the accelerator to the main memory.
43 |
44 | The following figure illustrates the matrix multiply design on the left side and on the right side a time-chart of these events for two successive calls that are executing sequentially.
45 |
46 | 
47 |
48 | The following figure shows the two calls executing in a pipelined fashion. The data transfer for the second call starts as soon as the data transfer for the first call is finished and overlaps with the execution of the first call. To enable the pipelining, however, we need to provide extra local memory to store the second set of arguments while the accelerator is computing with the first set of arguments. The SDSoC environment generates these memories, called multi-buffers, under the guidance of the user.
49 |
50 | 
51 |
52 | Specifying task level pipelining requires rewriting the calling code using the pragmas async(id) and wait(id). The SDSoC environment includes an example that demonstrates the use of async pragmas and this Matrix Multiply Pipelined example is used in this tutorial.
53 |
54 |
55 |
56 |
57 |
58 |
59 | Task Pipelining in the Matrix Multiply Example
60 |
61 | The SDx IDE includes a matrix multiply pipelined example that demonstrates the use of async pragmas to implement task-level pipelining. This exercise allows you to see the runtime improvement that comes from using this technique.
62 |
63 | 1. Create a new SDx project (`lab5`) by selecting **File > New > SDx Project**. Enter the project name `lab5`, select the ZC702 Platform and Linux System Configuration, and click **Next**.
64 |
65 | 2. The Templates page appears, containing source code examples for the selected platform. From the list of application templates, select **Empty Application** and click **Finish**.
66 |
67 | 3. Using your operating system file manager, navigate to `/SDx/2018.2/samples/mmult_pipelined` and copy the source files in that directory (`mmult_accel.cpp`, `mmult_accel.h`, and `mmult.cpp`) into the `src` folder of the newly created project (for example `./lab5/src`).
68 |
69 | 4. Click on **lab5** in SDx and from the context menu select **Refresh**. This adds all the copied sources in the previous step to the project.
70 |
71 | 5. Change the build configuration to Release.
72 |
73 | 6. Mark the function `mmult_accel` in the file `mmult_accel.cpp` for hardware using the **Add HW Functions** icon in the SDx Project Settings or Toggle HW/SW in the Project Explorer.
74 |
75 | 7. Build the project.
76 |
77 | 8. Copy the files obtained in the `sd_card` folder to an SD card, set up a terminal and run the generated application on the board. You need to specify the pipeline depth as an argument to the application. Run the application with pipeline depth of 1, 2, and 3 and note the performance obtained.
78 |
79 | 
80 |
81 |
82 |
83 | ### Summary
84 |
85 | After completing this tutorial, you should be able to do the following:
86 |
87 | * Use the SDx IDE to optimize your application to reduce runtime by performing task-level pipelining.
88 | * Observe the impact on performance of pipeline calls to an accelerator when overlapping accelerator computation with input and output communication.
89 |
90 |
91 | Copyright© 2019 Xilinx
92 |
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/getting-started-tutorial/lab-9-installing-applications-from-github.md:
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1 |
2 | English | 日本語
3 |
4 |
5 |
28 |
29 | ## Lab 9: Installing Examples from Github
30 |
31 | This tutorial demonstrates how to install examples that are available on Xilinx Github for the SDx environment.
32 |
33 | First, you install the provided example on Github using the SDx IDE. After the application is installed, you target your design to the desired OS and platform and select the newly installed example application for your design.
34 |
35 | >**:pushpin: NOTE** You can complete this tutorial even if you do not have a ZC702 board. When creating the SDx project, select your board and one of the available applications, even if the suggested template Emulation application is not found.
36 |
37 |
38 | Step 1: Downloading and Installing an Example from the Github
39 |
40 | 1. To download and install an example from the SDx Example store, click **Xilinx > SDx Examples**.
41 |
42 | 
43 |
44 | 2. The SDx Examples dialog box opens up. Click the **Download** button as shown below.
45 |
46 | 
47 |
48 | 3. The examples are installed as shown below.
49 |
50 | 
51 |
52 | 4. Click **OK** in the SDx Example Store Dialog box. The example is installed under
53 | `/Xilinx/SDx/20xx.x/examples`.
54 |
55 | 5. SDx Libraries can also be downloaded in the same fashion.
56 |
57 |
58 |
59 |
60 | Step 2: Creating a Project to Run the Example
61 |
62 | 1. Select **File > New > SDx Project**.
63 | 2. In the Project Type page, **Application Project** is selected by default. Click **Next**.
64 | 3. Specify the name of the project (for example, lab9) in the Project name field. Click New.
65 | 4. From the Platform list select zc702. Click **Next**.
66 | 5. From the System Configuration drop-down list, select Linux. Click **Next**.
67 | 6. From the list of application templates, select Array Partitioning and click **Finish**.
68 | 7. Click on the tab labeled lab9 to select the SDx Project Settings (if the tab is not visible, double click the `project.sdx` file in the Project Explorer). In the HW functions panel observe that the matmul_partition_accel function is marked as a hardware function when the project was created.
69 | 8. If the hardware functions were removed or not marked, click on the **Add HW Functions** icon to invoke the dialog box to specify hardware functions.
70 | 9. Click the **Build** icon on the toolbar to build the project.
71 |
72 |
73 |
74 |
75 | Step 3: Running the Application
76 |
77 | After the build finishes, you can run your application just as you would run any other example as described in the previous chapters.
78 |
79 |
80 | ### Summary
81 | After completing this tutorial, you should be able to do the following:
82 |
83 | * Use the SDx IDE to download an example from the Xilinx Github and install it.
84 | * Run the example design on your target platform.
85 |
86 |
87 | Copyright© 2019 Xilinx
88 |
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/opencv-to-xfopencv-migration-tutorial/solution/colordetect_accel.cpp:
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1 | #include "colordetect_accel.hpp"
2 |
3 | void colordetect_accel( xf::Mat &_src,
4 | xf::Mat &_hsv,
5 | xf::Mat &_range,
6 | xf::Mat &_erode,
7 | xf::Mat &_dilate1,
8 | xf::Mat &_dilate2,
9 | xf::Mat &_dst,
10 | unsigned char nLowThresh[3][3],
11 | unsigned char nHighThresh[3][3],
12 | unsigned char accel_kernel[FILTER_SIZE*FILTER_SIZE]) {
13 |
14 | unsigned char low_thresh[9];
15 | unsigned char high_thresh[9];
16 |
17 | for(int i = 0; i < 3; ++i)
18 | for(int j = 0; j < 3; ++j) {
19 | low_thresh[i*3+j] = nLowThresh[i][j];
20 | high_thresh[i*3+j] = nHighThresh[i][j];
21 | }
22 |
23 | xf::RGB2HSV(_src, _hsv);
24 | xf::colorthresholding(_hsv, _range, low_thresh, high_thresh);
25 |
26 | xf::erode(_range, _erode, accel_kernel);
27 | xf::dilate(_erode, _dilate1, accel_kernel);
28 | xf::dilate(_dilate1, _dilate2, accel_kernel);
29 | xf::erode(_dilate2, _dst, accel_kernel);
30 | }
31 |
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/opencv-to-xfopencv-migration-tutorial/solution/colordetect_accel.hpp:
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1 | #include "hls_stream.h"
2 | #include "ap_int.h"
3 | #include "common/xf_common.h"
4 | #include "common/xf_utility.h"
5 | #include "imgproc/xf_colorthresholding.hpp"
6 | #include "imgproc/xf_rgb2hsv.hpp"
7 | #include "imgproc/xf_erosion.hpp"
8 | #include "imgproc/xf_dilation.hpp"
9 |
10 | #define MAXCOLORS 3
11 | #define WIDTH 1920
12 | #define HEIGHT 1080
13 | #define FILTER_SIZE 3
14 | #define KERNEL_SHAPE XF_SHAPE_RECT
15 | #define ITERATIONS 1
16 |
17 | void colordetect_accel( xf::Mat &_src,
18 | xf::Mat &_hsv,
19 | xf::Mat &_range,
20 | xf::Mat &_erode,
21 | xf::Mat &_dilate1,
22 | xf::Mat &_dilate2,
23 | xf::Mat &_dst,
24 | unsigned char nLowThresh[3][3],
25 | unsigned char nHighThresh[3][3],
26 | unsigned char accel_kernel[FILTER_SIZE*FILTER_SIZE]);
27 |
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/opencv-to-xfopencv-migration-tutorial/solution/colordetect_full.cpp:
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1 | // colordetect.cpp : Defines the entry point for the console application.
2 | //
3 |
4 | #include "colordetect.hpp"
5 | #include
6 | #if __SDSCC__
7 | #undef __ARM_NEON__
8 | #undef __ARM_NEON
9 | #include "opencv2/highgui/highgui.hpp"
10 | #include "opencv2/imgproc/imgproc.hpp"
11 | #include
12 | #include "opencv2/imgcodecs/imgcodecs.hpp"
13 | #define __ARM_NEON__
14 | #define __ARM_NEON
15 | #else
16 | #include "opencv2/highgui/highgui.hpp"
17 | #include "opencv2/imgproc/imgproc.hpp"
18 | #include
19 | #endif
20 |
21 | #include "sds_lib.h"
22 |
23 | unsigned long clock_start, clock_end;
24 | #define TIME_STAMP_INIT clock_start = sds_clock_counter();
25 | #define TIME_STAMP { clock_end = sds_clock_counter(); printf("elapsed time %lu \nelapsed real-time %f ms \n", clock_end-clock_start, (1000.0/sds_clock_frequency())*(double)(clock_end-clock_start)); clock_start = sds_clock_counter(); }
26 |
27 | // colordetect
28 | // Description:
29 | // Will detect the colors from the thresholds provided
30 | // Inputs:
31 | // - in_img
32 | // - nLowThresh
33 | // - nHighThresh
34 | // - _kernel
35 | // Output:
36 | // - out_img
37 |
38 | void colordetect(cv::Mat &_src,
39 | cv::Mat &_dst,
40 | unsigned char nLowThresh[3][3],
41 | unsigned char nHighThresh[3][3],
42 | cv::Mat &_kernel) {
43 |
44 | // Temporary matrices for processing
45 | cv::Mat mask1, mask2, mask3, _imgrange, _imghsv;
46 |
47 | // Convert the input to the HSV colorspace. Using BGR here since it is the default of OpenCV.
48 | // Using RGB yields different results, requiring a change of the threshold ranges
49 | cv::cvtColor(_src, _imghsv, cv::COLOR_BGR2HSV);
50 |
51 | // Get the color of Yellow from the HSV image and store it as a mask
52 | cv::inRange(_imghsv, cv::Scalar(nLowThresh[0][0], nLowThresh[0][1], nLowThresh[0][2]), cv::Scalar(nHighThresh[0][0], nHighThresh[0][1], nHighThresh[0][2]), mask1);
53 |
54 | // Get the color of Green from the HSV image and store it as a mask
55 | cv::inRange(_imghsv, cv::Scalar(nLowThresh[1][0], nLowThresh[1][1], nLowThresh[1][2]), cv::Scalar(nHighThresh[1][0], nHighThresh[1][1], nHighThresh[1][2]), mask2);
56 |
57 | // Get the color of Red from the HSV image and store it as a mask
58 | cv::inRange(_imghsv, cv::Scalar(nLowThresh[2][0], nLowThresh[2][1], nLowThresh[2][2]), cv::Scalar(nHighThresh[2][0], nHighThresh[2][1], nHighThresh[2][2]), mask3);
59 |
60 | // Bitwise OR the masks together (adding them) to the range
61 | _imgrange = mask1 | mask2 | mask3;
62 |
63 | // First erode
64 | cv::erode(_imgrange, _dst, _kernel);
65 | // First dilate
66 | cv::dilate(_dst, _dst, _kernel);
67 | // Second dilate
68 | cv::dilate(_dst, _dst, _kernel);
69 | // Second erode
70 | cv::erode(_dst, _dst, _kernel);
71 | }
72 |
73 | int main(int argc, char **argv)
74 | {
75 | //Create the input/output cv::Mat objects
76 | cv::Mat in_img, out_img;
77 | cv::Mat imghsv, imgrange, imgerode, imgdilate1, imgdilate2;
78 |
79 | // Define the low and high thresholds
80 | // Want to grab 3 colors (Yellow, Green, Red) for the input image
81 | unsigned char nLowThresh[3][3] = { { 22, 150, 60 }, // Lower boundary for Yellow
82 | { 38, 150, 60 }, // Lower boundary for Green
83 | { 160, 150, 60 } }; // Lower boundary for Red
84 | unsigned char nHighThresh[3][3] = { { 38, 255, 255 }, // Upper boundary for Yellow
85 | { 75, 255, 255 }, // Upper boundary for Green
86 | { 179, 255, 255 } }; // Upper boundary for Red
87 |
88 | unsigned char accel_kernel[FILTER_SIZE*FILTER_SIZE] = {0};
89 |
90 | // Read in the commandline for an image
91 | in_img = cv::imread(argv[1], 1);
92 | if (!in_img.data) {
93 | return -1;
94 | }
95 |
96 | xf::Mat xfIn(in_img.rows, in_img.cols);
97 | xfIn.copyTo(in_img.data);
98 | xf::Mat xfOut(in_img.rows, in_img.cols);
99 |
100 | xf::Mat xfHSV(in_img.rows, in_img.cols);
101 | xf::Mat xfRange(in_img.rows, in_img.cols);
102 | xf::Mat xfErode(in_img.rows, in_img.cols);
103 | xf::Mat xfDilate1(in_img.rows, in_img.cols);
104 | xf::Mat xfDilate2(in_img.rows, in_img.cols);
105 |
106 | // Setup the kernel matrix
107 | cv::Mat element = cv::getStructuringElement(cv::MORPH_ELLIPSE, cv::Size(FILTER_SIZE, FILTER_SIZE), cv::Point(-1,-1));
108 |
109 | for(int i = 0; i < (FILTER_SIZE*FILTER_SIZE); i++)
110 | accel_kernel[i] = element.data[i];
111 |
112 | // Create the output image to match the input image (CV_8U)
113 | int height = in_img.rows;
114 | int width = in_img.cols;
115 | out_img.create(height, width, CV_8U);
116 |
117 | // Run the input and thresholds into the colordectect function
118 |
119 | std::cout << "CPU" << std::endl;
120 | TIME_STAMP_INIT
121 | colordetect(in_img, out_img, nLowThresh, nHighThresh, element);
122 | TIME_STAMP
123 |
124 | std::cout << "Accelerator" << std::endl;
125 | TIME_STAMP_INIT
126 | colordetect_accel(xfIn,xfHSV,xfRange,xfErode,xfDilate1,xfDilate2,xfOut,nLowThresh,nHighThresh, accel_kernel);
127 | TIME_STAMP
128 |
129 | cv::Mat accel_out(height, width, CV_8U);
130 | accel_out.data = xfOut.copyFrom();
131 |
132 | // Write out the input image and the output image
133 | cv::imwrite("accel_out.png",accel_out);
134 | cv::imwrite("output.png", out_img);
135 | cv::imwrite("input.png", in_img);
136 | return 0;
137 | }
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1 | // colordetect.cpp : Defines the entry point for the console application.
2 | //
3 |
4 | #include
5 | #include
6 | #include
7 | #include
8 |
9 | // colordetect
10 | // Description:
11 | // Will detect the colors from the thresholds provided
12 | // Inputs:
13 | // - in_img
14 | // - nLowThresh
15 | // - nHighThresh
16 | // - _kernel
17 | // Output:
18 | // - out_img
19 | void colordetect(cv::Mat &_src,
20 | cv::Mat &_dst,
21 | unsigned char nLowThresh[3][3],
22 | unsigned char nHighThresh[3][3],
23 | cv::Mat &_kernel) {
24 |
25 | // Temporary matrices for processing
26 | cv::Mat mask1, mask2, mask3, _imgrange, _imghsv;
27 |
28 | // Convert the input to the HSV colorspace. Using BGR here since it is the default of OpenCV.
29 | // Using RGB yields different results, requiring a change of the threshold ranges
30 | cv::cvtColor(_src, _imghsv, cv::COLOR_BGR2HSV);
31 |
32 | // Get the color of Yellow from the HSV image and store it as a mask
33 | cv::inRange(_imghsv, cv::Scalar(nLowThresh[0][0], nLowThresh[0][1], nLowThresh[0][2]), cv::Scalar(nHighThresh[0][0], nHighThresh[0][1], nHighThresh[0][2]), mask1);
34 |
35 | // Get the color of Green from the HSV image and store it as a mask
36 | cv::inRange(_imghsv, cv::Scalar(nLowThresh[1][0], nLowThresh[1][1], nLowThresh[1][2]), cv::Scalar(nHighThresh[1][0], nHighThresh[1][1], nHighThresh[1][2]), mask2);
37 |
38 | // Get the color of Red from the HSV image and store it as a mask
39 | cv::inRange(_imghsv, cv::Scalar(nLowThresh[2][0], nLowThresh[2][1], nLowThresh[2][2]), cv::Scalar(nHighThresh[2][0], nHighThresh[2][1], nHighThresh[2][2]), mask3);
40 |
41 | // Bitwise OR the masks together (adding them) to the range
42 | _imgrange = mask1 | mask2 | mask3;
43 |
44 | // First erode
45 | cv::erode(_imgrange, _dst, _kernel);
46 | // First dilate
47 | cv::dilate(_dst, _dst, _kernel);
48 | // Second dilate
49 | cv::dilate(_dst, _dst, _kernel);
50 | // Second erode
51 | cv::erode(_dst, _dst, _kernel);
52 | }
53 |
54 |
55 | int main(int argc, char **argv)
56 | {
57 | //Create the input/output cv::Mat objects
58 | cv::Mat in_img, out_img;
59 | cv::Mat imghsv, imgrange, imgerode, imgdilate1, imgdilate2;
60 |
61 | // Define the low and high thresholds
62 | // Want to grab 3 colors (Blue, Green, Orange) for teh input image
63 | unsigned char nLowThresh[3][3] = { { 110, 150, 20 }, // Lower boundary for Blue
64 | { 38, 0, 20 }, // Lower boundary for Green
65 | { 10, 150, 20 } }; // Lower boundary for Orange
66 | unsigned char nHighThresh[3][3] = { { 130, 255, 255 }, // Upper boundary for Blue
67 | { 75, 125, 255 }, // Upper boundary for Green
68 | { 25, 255, 255 } }; // Upper boundary for Orange
69 |
70 | // Setup the kernel matrix
71 | cv::Mat element = cv::getStructuringElement(cv::MORPH_ELLIPSE, cv::Size(FILTER_SIZE, FILTER_SIZE), cv::Point(-1,-1));
72 |
73 | // Read in the commandline for an image
74 | in_img = cv::imread(argv[1], 1);
75 | if (!in_img.data) {
76 | return -1;
77 | }
78 |
79 | // Create the output image to match the input image (CV_8U)
80 | int height = in_img.rows;
81 | int width = in_img.cols;
82 | out_img.create(height, width, CV_8U);
83 |
84 | // Run the input and thresholds into the colordect function
85 | colordetect(in_img, out_img, nLowThresh, nHighThresh, element);
86 |
87 | // Write out the input image and the output image
88 | cv::imwrite("output.png", out_img);
89 | cv::imwrite("input.png", in_img);
90 |
91 | return 0;
92 | }
93 |
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/platform-creation-tutorial/Lab3-Creating-Custom-Platform-Using-the-SDx-IDE.md:
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1 |
2 | English | 日本語
3 |
4 |
5 |
22 |
23 | ## Lab 3: Using Your Custom Platform
24 |
25 | 1. On the SDx IDE menu, select **File \> New \> SDx Application Project** to begin creating a new Application project.
26 |
27 | 2. In the Create a New SDx Application Project dialog, type **sdx\_app1** as the Project name.
28 |
29 | 3. Click **Next**.
30 |
31 | 
32 |
33 | 4. In the Platform dialog, select **Add Custom Platform** command (the '+' icon).
34 |
35 | This opens the Specify Custom Platform Location dialog box, letting you navigate to the platform folder. If you were following the instructions in this tutorial, you will find the platform at /tmp/sdx_workspace/zcu102_board/export/zcu102_board.
36 |
37 | 
38 |
39 | 5. After adding the **zcu102_board** platform, select it in the Platform dialog box, and click **Next**.
40 |
41 | 6. Accept the default settings in the System Configuration dialog box:
42 |
43 | - System configuration: **sysconfig1**
44 | - Runtime: **C/C++**
45 | - Domain: **standalone on psu_cortexa53**
46 | - CPU: psu_cortexa53_0
47 | - OS: standalone
48 |
49 | 
50 | To generate a Linux application, the LinuxConfig system can be selected.
51 | 7. Click **Next**.
52 |
53 | 8. On the Templates dialog, select **Array Partitioning** and click **Finish**.
54 |
55 | 
56 |
57 | **Note:** To get or update the example applications, you can click click the **SDx Examples** button. Refer to the *SDSoC Develpment Environment User Guide* ([UG1027](https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_3/ug1027-sdsoc-user-guide.pdf)) for more information.
58 |
59 | The newly created SDSoC application `sdx_app1` is shown in the Project Explorer view and the Assistant view.
60 |
61 | >:pushpin: **NOTE:**
62 | >The Assistant view shows a hardware accelerated function named `matmul_partition_accel` which is part of the Array Partitioning example.
63 |
64 | 1. The Editor view shows settings for `sdx_app1` in the Application Project Settings window.
65 |
66 | 
67 |
68 | 1. In the Assistant view, expand **sdx_app1 [SDSoC]**, and right-click **Debug [Hardware]** and select **Build**.
69 |
70 | 1. The Assistant view provides build results through links to the following:
71 |
72 | - Compilation log
73 |
74 | - Data motion report for accelerator
75 |
76 | - Generated SD card image contents
77 |
78 | 
79 |
80 | 1. You can also scroll through the Console window to view the transcript of the build process which is captured in the **sds.log**.
81 |
82 | 
83 |
84 | 1. In the Assistant view, right-click **SD Card Image** and select **Open > Open in File Browser** to open a view to the SD Card contents on the disk. The `sd_card` directory is located in the SDx workspace at `/tmp/sdx_workspace/sdx_app1/Debug/sd_card`.
85 |
86 | 
87 |
88 | You can copy the SD card directory contents to the root directory of a FAT32 formatted SD card and boot a ZCU102 platform using this SD card to run and view the sdx\_app1 UART output on a terminal program.
89 |
90 | ### Conclusion
91 |
92 | In completing Lab 3, you have successfully created a custom SDSoC platform that targets the Zynq UltraScale+ MPSoC with a standalone software runtime environment. You have also built the SDSoC array partitioning example on top of the custom SDSoC platform (zcu102_board).
93 |
94 | ### End Tutorial
95 |
96 | ## Related information
97 | - Lab 1: Creating the DSA for a Zynq UltraScale+ MPSoC Processor Design
98 | - Lab 2: Creating the SDSoC Platform
99 |
100 | Copyright© 2019 Xilinx
101 |
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