├── 0001-eqdma-support-buffer-size-of-9618-to-match-pktgen-dp.patch ├── 0002-qdma-search-for-requested-wrthresh-2-so-that-request.patch ├── 0003-qdma-adapt-qdma-c2h-completion-structure-to-match-op.patch ├── 0004-qdma-drop-vectorized-functions-for-rx-tx-rather-than.patch ├── 0005-qdma-adapt-qdma-h2c-descriptor-structure-to-match-op.patch ├── COPYING ├── LICENSE ├── README.md ├── bsd_license.txt ├── dpdk-devbind.diff └── license.txt /0001-eqdma-support-buffer-size-of-9618-to-match-pktgen-dp.patch: -------------------------------------------------------------------------------- 1 | # BSD License 2 | # 3 | # OpenNIC patch for Xilinx DMA IP software 4 | # 5 | # Copyright (c) 2016-2022 Xilinx, Inc. All rights reserved. 6 | # 7 | # Redistribution and use in source and binary forms, with or without modification, 8 | # are permitted provided that the following conditions are met: 9 | # 10 | # * Redistributions of source code must retain the above copyright notice, this 11 | # list of conditions and the following disclaimer. 12 | # 13 | # * Redistributions in binary form must reproduce the above copyright notice, 14 | # this list of conditions and the following disclaimer in the documentation 15 | # and/or other materials provided with the distribution. 16 | # 17 | # * Neither the name Xilinx nor the names of its contributors may be used to 18 | # endorse or promote products derived from this software without specific 19 | # prior written permission. 20 | # 21 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 22 | # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 | # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 | # DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 25 | # ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 | # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 | # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 28 | # ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 | # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 | #---------------------------------------------------------------------------------- 32 | 33 | # Modified the buffer size to match pkt-gen-dpdk jumbo frame defaults. 34 | 35 | diff --git a/QDMA/DPDK/drivers/net/qdma/qdma_access/eqdma_soft_access/eqdma_soft_access.c b/QDMA/DPDK/drivers/net/qdma/qdma_access/eqdma_soft_access/eqdma_soft_access.c 36 | index 8214538..87fbd22 100644 37 | --- a/QDMA/DPDK/drivers/net/qdma/qdma_access/eqdma_soft_access/eqdma_soft_access.c 38 | +++ b/QDMA/DPDK/drivers/net/qdma/qdma_access/eqdma_soft_access/eqdma_soft_access.c 39 | @@ -1878,7 +1878,7 @@ int eqdma_set_default_global_csr(void *dev_hndl) 40 | 80, 96, 112, 128, 144, 160, 176, 192}; 41 | uint32_t buf_sz[QDMA_NUM_C2H_BUFFER_SIZES] = {4096, 256, 512, 1024, 42 | 2048, 3968, 4096, 4096, 4096, 4096, 4096, 4096, 4096, 8192, 43 | - 9018, 16384}; 44 | + 9618, 16384}; 45 | struct qdma_dev_attributes dev_cap; 46 | 47 | if (!dev_hndl) { 48 | -------------------------------------------------------------------------------- /0002-qdma-search-for-requested-wrthresh-2-so-that-request.patch: -------------------------------------------------------------------------------- 1 | # BSD License 2 | # 3 | # OpenNIC patch for Xilinx DMA IP software 4 | # 5 | # Copyright (c) 2016-2022 Xilinx, Inc. All rights reserved. 6 | # 7 | # Redistribution and use in source and binary forms, with or without modification, 8 | # are permitted provided that the following conditions are met: 9 | # 10 | # * Redistributions of source code must retain the above copyright notice, this 11 | # list of conditions and the following disclaimer. 12 | # 13 | # * Redistributions in binary form must reproduce the above copyright notice, 14 | # this list of conditions and the following disclaimer in the documentation 15 | # and/or other materials provided with the distribution. 16 | # 17 | # * Neither the name Xilinx nor the names of its contributors may be used to 18 | # endorse or promote products derived from this software without specific 19 | # prior written permission. 20 | # 21 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 22 | # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 | # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 | # DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 25 | # ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 | # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 | # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 28 | # ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 | # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 | #---------------------------------------------------------------------------------- 32 | 33 | # Modified the RX threshold. 34 | 35 | diff --git a/QDMA/DPDK/drivers/net/qdma/qdma_devops.c b/QDMA/DPDK/drivers/net/qdma/qdma_devops.c 36 | index ed8f6c9..12b1953 100644 37 | --- a/QDMA/DPDK/drivers/net/qdma/qdma_devops.c 38 | +++ b/QDMA/DPDK/drivers/net/qdma/qdma_devops.c 39 | @@ -486,7 +486,7 @@ int qdma_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 40 | /* Find Threshold index */ 41 | rxq->threshidx = index_of_array(qdma_dev->g_c2h_cnt_th, 42 | QDMA_NUM_C2H_COUNTERS, 43 | - rx_conf->rx_thresh.wthresh); 44 | + rx_conf->rx_thresh.wthresh + 2); 45 | if (rxq->threshidx < 0) { 46 | PMD_DRV_LOG(WARNING, "Expected Threshold %d not found," 47 | " using the value %d at index 7\n", 48 | -------------------------------------------------------------------------------- /0003-qdma-adapt-qdma-c2h-completion-structure-to-match-op.patch: -------------------------------------------------------------------------------- 1 | # BSD License 2 | # 3 | # OpenNIC patch for Xilinx DMA IP software 4 | # 5 | # Copyright (c) 2016-2022 Xilinx, Inc. All rights reserved. 6 | # 7 | # Redistribution and use in source and binary forms, with or without modification, 8 | # are permitted provided that the following conditions are met: 9 | # 10 | # * Redistributions of source code must retain the above copyright notice, this 11 | # list of conditions and the following disclaimer. 12 | # 13 | # * Redistributions in binary form must reproduce the above copyright notice, 14 | # this list of conditions and the following disclaimer in the documentation 15 | # and/or other materials provided with the distribution. 16 | # 17 | # * Neither the name Xilinx nor the names of its contributors may be used to 18 | # endorse or promote products derived from this software without specific 19 | # prior written permission. 20 | # 21 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 22 | # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 | # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 | # DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 25 | # ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 | # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 | # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 28 | # ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 | # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 | #---------------------------------------------------------------------------------- 32 | 33 | # Modified C2H completion structure to match OpenNIC shell. 34 | 35 | diff --git a/QDMA/DPDK/drivers/net/qdma/qdma_rxtx.c b/QDMA/DPDK/drivers/net/qdma/qdma_rxtx.c 36 | index 46d650d..e7b6ef9 100644 37 | --- a/QDMA/DPDK/drivers/net/qdma/qdma_rxtx.c 38 | +++ b/QDMA/DPDK/drivers/net/qdma/qdma_rxtx.c 39 | @@ -55,8 +55,6 @@ static int qdma_ul_extract_st_cmpt_info_v(void *ul_cmpt_entry, void *cmpt_info) 40 | cmpt_data = (union qdma_ul_st_cmpt_ring *)(cmpt_info); 41 | 42 | cmpt_data->data = cmpt_desc->data; 43 | - if (unlikely(!cmpt_desc->desc_used)) 44 | - cmpt_data->length = 0; 45 | 46 | return 0; 47 | } 48 | diff --git a/QDMA/DPDK/drivers/net/qdma/qdma_user.c b/QDMA/DPDK/drivers/net/qdma/qdma_user.c 49 | index a176536..b5580b0 100644 50 | --- a/QDMA/DPDK/drivers/net/qdma/qdma_user.c 51 | +++ b/QDMA/DPDK/drivers/net/qdma/qdma_user.c 52 | @@ -58,12 +58,10 @@ int qdma_ul_extract_st_cmpt_info(void *ul_cmpt_entry, void *cmpt_info) 53 | cmpt_desc = (union qdma_ul_st_cmpt_ring *)(ul_cmpt_entry); 54 | cmpt_data = (union qdma_ul_st_cmpt_ring *)(cmpt_info); 55 | 56 | - if (unlikely(cmpt_desc->err || cmpt_desc->data_frmt)) 57 | + if (unlikely(cmpt_desc->err)) 58 | return -1; 59 | 60 | cmpt_data->data = cmpt_desc->data; 61 | - if (unlikely(!cmpt_desc->desc_used)) 62 | - cmpt_data->length = 0; 63 | 64 | return 0; 65 | } 66 | @@ -79,7 +77,7 @@ int qdma_ul_extract_st_cmpt_info(void *ul_cmpt_entry, void *cmpt_info) 67 | */ 68 | uint16_t qdma_ul_get_cmpt_pkt_len(void *ul_cmpt_entry) 69 | { 70 | - return ((union qdma_ul_st_cmpt_ring *)ul_cmpt_entry)->length; 71 | + return ((union qdma_ul_st_cmpt_ring *)ul_cmpt_entry)->pkt_len; 72 | } 73 | 74 | /** 75 | @@ -279,7 +277,7 @@ int qdma_ul_process_immediate_data(void *cmpt_entry, uint16_t cmpt_desc_len, 76 | struct qdma_ul_cmpt_ring *cmpt_desc = 77 | (struct qdma_ul_cmpt_ring *)(cmpt_entry); 78 | 79 | - if (unlikely(cmpt_desc->err || cmpt_desc->data_frmt)) 80 | + if (unlikely(cmpt_desc->err)) 81 | return -1; 82 | 83 | cmpt_buff_ptr = (char *)cmpt_buff; 84 | diff --git a/QDMA/DPDK/drivers/net/qdma/qdma_user.h b/QDMA/DPDK/drivers/net/qdma/qdma_user.h 85 | index d0dcf1e..1182eb9 100644 86 | --- a/QDMA/DPDK/drivers/net/qdma/qdma_user.h 87 | +++ b/QDMA/DPDK/drivers/net/qdma/qdma_user.h 88 | @@ -48,40 +48,15 @@ 89 | * This structure is specific for the example design. 90 | * Processing of this ring happens in qdma_rxtx.c. 91 | */ 92 | -union qdma_ul_st_cmpt_ring { 93 | +union __attribute__ ((packed)) qdma_ul_st_cmpt_ring { 94 | volatile uint64_t data; 95 | - struct { 96 | - /* For 2018.2 IP, this field determines the 97 | - * Standard or User format of completion entry 98 | - */ 99 | - volatile uint32_t data_frmt:1; 100 | - 101 | - /* This field inverts every time PIDX wraps 102 | - * the completion ring 103 | - */ 104 | - volatile uint32_t color:1; 105 | - 106 | - /* Indicates that C2H engine encountered 107 | - * a descriptor error 108 | - */ 109 | - volatile uint32_t err:1; 110 | - 111 | - /* Indicates that the completion packet 112 | - * consumes descriptor in C2H ring 113 | - */ 114 | - volatile uint32_t desc_used:1; 115 | - 116 | - /* Indicates length of the data packet */ 117 | - volatile uint32_t length:16; 118 | - 119 | - /* Reserved field */ 120 | - volatile uint32_t user_rsv:4; 121 | - 122 | - /* User logic defined data of 123 | - * length based on CMPT entry 124 | - * length 125 | - */ 126 | - volatile uint8_t user_def[]; 127 | + struct __attribute__ ((packed)) { 128 | + volatile uint32_t rsvd:1; 129 | + volatile uint32_t color:1; 130 | + volatile uint32_t err:1; 131 | + volatile uint32_t rsvd2:29; 132 | + volatile uint32_t pkt_len:16; 133 | + volatile uint32_t pkt_id:16; 134 | }; 135 | }; 136 | 137 | -------------------------------------------------------------------------------- /0004-qdma-drop-vectorized-functions-for-rx-tx-rather-than.patch: -------------------------------------------------------------------------------- 1 | # BSD License 2 | # 3 | # OpenNIC patch for Xilinx DMA IP software 4 | # 5 | # Copyright (c) 2016-2022 Xilinx, Inc. All rights reserved. 6 | # 7 | # Redistribution and use in source and binary forms, with or without modification, 8 | # are permitted provided that the following conditions are met: 9 | # 10 | # * Redistributions of source code must retain the above copyright notice, this 11 | # list of conditions and the following disclaimer. 12 | # 13 | # * Redistributions in binary form must reproduce the above copyright notice, 14 | # this list of conditions and the following disclaimer in the documentation 15 | # and/or other materials provided with the distribution. 16 | # 17 | # * Neither the name Xilinx nor the names of its contributors may be used to 18 | # endorse or promote products derived from this software without specific 19 | # prior written permission. 20 | # 21 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 22 | # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 | # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 | # DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 25 | # ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 | # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 | # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 28 | # ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 | # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 | #---------------------------------------------------------------------------------- 32 | 33 | # Dropped vectorized functions for RX-TX, rather than update for now. 34 | 35 | diff --git a/QDMA/DPDK/drivers/net/qdma/qdma_rxtx.c b/QDMA/DPDK/drivers/net/qdma/qdma_rxtx.c 36 | index e7b6ef9..f7cb66f 100644 37 | --- a/QDMA/DPDK/drivers/net/qdma/qdma_rxtx.c 38 | +++ b/QDMA/DPDK/drivers/net/qdma/qdma_rxtx.c 39 | @@ -40,12 +40,6 @@ 40 | #include "qdma_rxtx.h" 41 | #include "qdma_devops.h" 42 | 43 | -#if defined RTE_ARCH_X86_64 44 | -#include 45 | -#include 46 | -#define RTE_QDMA_DESCS_PER_LOOP (2) 47 | -#endif //RTE_ARCH_X86_64 48 | - 49 | /******** User logic dependent functions start **********/ 50 | static int qdma_ul_extract_st_cmpt_info_v(void *ul_cmpt_entry, void *cmpt_info) 51 | { 52 | @@ -59,93 +53,6 @@ static int qdma_ul_extract_st_cmpt_info_v(void *ul_cmpt_entry, void *cmpt_info) 53 | return 0; 54 | } 55 | 56 | -#ifdef QDMA_RX_VEC_X86_64 57 | -/* Vector implementation to get packet length from two completion entries */ 58 | -static void qdma_ul_get_cmpt_pkt_len_v(void *ul_cmpt_entry, __m128i *data) 59 | -{ 60 | - union qdma_ul_st_cmpt_ring *cmpt_entry1, *cmpt_entry2; 61 | - __m128i pkt_len_shift = _mm_set_epi64x(0, 4); 62 | - 63 | - cmpt_entry1 = (union qdma_ul_st_cmpt_ring *)(ul_cmpt_entry); 64 | - cmpt_entry2 = cmpt_entry1 + 1; 65 | - 66 | - /* Read desc statuses backwards to avoid race condition */ 67 | - /* Load a pkt desc */ 68 | - data[1] = _mm_set_epi64x(0, cmpt_entry2->data); 69 | - /* Find packet length, currently driver needs 70 | - * only packet length from completion info 71 | - */ 72 | - data[1] = _mm_srl_epi32(data[1], pkt_len_shift); 73 | - 74 | - /* Load a pkt desc */ 75 | - data[0] = _mm_set_epi64x(0, cmpt_entry1->data); 76 | - /* Find packet length, currently driver needs 77 | - * only packet length from completion info 78 | - */ 79 | - data[0] = _mm_srl_epi32(data[0], pkt_len_shift); 80 | -} 81 | -#endif //QDMA_RX_VEC_X86_64 82 | - 83 | -#ifdef QDMA_TX_VEC_X86_64 84 | -/* Vector implementation to update H2C descriptor */ 85 | -static int qdma_ul_update_st_h2c_desc_v(void *qhndl, uint64_t q_offloads, 86 | - struct rte_mbuf *mb) 87 | -{ 88 | - (void)q_offloads; 89 | - int nsegs = mb->nb_segs; 90 | - uint16_t flags = S_H2C_DESC_F_SOP | S_H2C_DESC_F_EOP; 91 | - uint16_t id; 92 | - struct qdma_ul_st_h2c_desc *tx_ring_st; 93 | - struct qdma_tx_queue *txq = (struct qdma_tx_queue *)qhndl; 94 | - 95 | - tx_ring_st = (struct qdma_ul_st_h2c_desc *)txq->tx_ring; 96 | - id = txq->q_pidx_info.pidx; 97 | - 98 | - if (nsegs == 1) { 99 | - __m128i descriptor; 100 | - uint16_t datalen = mb->data_len; 101 | - 102 | - descriptor = _mm_set_epi64x(mb->buf_iova + mb->data_off, 103 | - (uint64_t)datalen << 16 | 104 | - (uint64_t)datalen << 32 | 105 | - (uint64_t)flags << 48); 106 | - _mm_store_si128((__m128i *)&tx_ring_st[id], descriptor); 107 | - 108 | - id++; 109 | - if (unlikely(id >= (txq->nb_tx_desc - 1))) 110 | - id -= (txq->nb_tx_desc - 1); 111 | - } else { 112 | - int pkt_segs = nsegs; 113 | - while (nsegs && mb) { 114 | - __m128i descriptor; 115 | - uint16_t datalen = mb->data_len; 116 | - 117 | - flags = 0; 118 | - if (nsegs == pkt_segs) 119 | - flags |= S_H2C_DESC_F_SOP; 120 | - if (nsegs == 1) 121 | - flags |= S_H2C_DESC_F_EOP; 122 | - 123 | - descriptor = _mm_set_epi64x(mb->buf_iova + mb->data_off, 124 | - (uint64_t)datalen << 16 | 125 | - (uint64_t)datalen << 32 | 126 | - (uint64_t)flags << 48); 127 | - _mm_store_si128((__m128i *)&tx_ring_st[id], descriptor); 128 | - 129 | - nsegs--; 130 | - mb = mb->next; 131 | - id++; 132 | - if (unlikely(id >= (txq->nb_tx_desc - 1))) 133 | - id -= (txq->nb_tx_desc - 1); 134 | - } 135 | - } 136 | - 137 | - txq->q_pidx_info.pidx = id; 138 | - 139 | - return 0; 140 | -} 141 | -#endif //QDMA_TX_VEC_X86_64 142 | - 143 | /******** User logic dependent functions end **********/ 144 | 145 | /** 146 | @@ -836,139 +743,11 @@ struct rte_mbuf *prepare_single_packet(struct qdma_rx_queue *rxq, 147 | return mb; 148 | } 149 | 150 | -#ifdef QDMA_RX_VEC_X86_64 151 | -/* Vector implementation to prepare mbufs for packets. 152 | - * Update this API if HW provides more information to be populated in mbuf. 153 | - */ 154 | -static uint16_t prepare_packets_v(struct qdma_rx_queue *rxq, 155 | - struct rte_mbuf **rx_pkts, uint16_t nb_pkts) 156 | -{ 157 | - struct rte_mbuf *mb; 158 | - uint16_t count = 0, count_pkts = 0; 159 | - uint16_t n_pkts = nb_pkts & -2; 160 | - uint16_t id = rxq->rx_tail; 161 | - struct rte_mbuf **sw_ring = rxq->sw_ring; 162 | - uint16_t rx_buff_size = rxq->rx_buff_size; 163 | - /* mask to shuffle from desc. to mbuf */ 164 | - __m128i shuf_msk = _mm_set_epi8( 165 | - 0xFF, 0xFF, 0xFF, 0xFF, /* skip 32bits rss */ 166 | - 0xFF, 0xFF, /* skip low 16 bits vlan_macip */ 167 | - 1, 0, /* octet 0~1, 16 bits data_len */ 168 | - 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */ 169 | - 1, 0, /* octet 0~1, low 16 bits pkt_len */ 170 | - 0xFF, 0xFF, /* skip 32 bit pkt_type */ 171 | - 0xFF, 0xFF 172 | - ); 173 | - __m128i mbuf_init, pktlen, zero_data; 174 | - 175 | - mbuf_init = _mm_set_epi64x(0, rxq->mbuf_initializer); 176 | - pktlen = _mm_setzero_si128(); 177 | - zero_data = _mm_setzero_si128(); 178 | - 179 | - /* compile-time check */ 180 | - RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) != 181 | - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4); 182 | - RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) != 183 | - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8); 184 | - RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) != 185 | - RTE_ALIGN(offsetof(struct rte_mbuf, rearm_data), 16)); 186 | - 187 | - for (count = 0; count < n_pkts; 188 | - count += RTE_QDMA_DESCS_PER_LOOP) { 189 | - __m128i pkt_len[RTE_QDMA_DESCS_PER_LOOP]; 190 | - __m128i pkt_mb1, pkt_mb2; 191 | - __m128i mbp1; 192 | - uint16_t pktlen1, pktlen2; 193 | - 194 | - qdma_ul_get_cmpt_pkt_len_v( 195 | - &rxq->cmpt_data[count], pkt_len); 196 | - 197 | - pktlen1 = _mm_extract_epi16(pkt_len[0], 0); 198 | - pktlen2 = _mm_extract_epi16(pkt_len[1], 0); 199 | - 200 | - /* Check if packets are segmented across descriptors */ 201 | - if ((pktlen1 && (pktlen1 <= rx_buff_size)) && 202 | - (pktlen2 && (pktlen2 <= rx_buff_size)) && 203 | - ((id + RTE_QDMA_DESCS_PER_LOOP) < 204 | - (rxq->nb_rx_desc - 1))) { 205 | - /* Load 2 (64 bit) mbuf pointers */ 206 | - mbp1 = _mm_loadu_si128((__m128i *)&sw_ring[id]); 207 | - 208 | - /* Copy 2 64 bit mbuf point into rx_pkts */ 209 | - _mm_storeu_si128((__m128i *)&rx_pkts[count_pkts], mbp1); 210 | - _mm_storeu_si128((__m128i *)&sw_ring[id], zero_data); 211 | - 212 | - /* Pkt 1,2 convert format from desc to pktmbuf */ 213 | - /* We only have packet length to copy */ 214 | - pkt_mb2 = _mm_shuffle_epi8(pkt_len[1], shuf_msk); 215 | - pkt_mb1 = _mm_shuffle_epi8(pkt_len[0], shuf_msk); 216 | - 217 | - /* Write the rearm data and the olflags in one write */ 218 | - _mm_store_si128( 219 | - (__m128i *)&rx_pkts[count_pkts]->rearm_data, mbuf_init); 220 | - _mm_store_si128( 221 | - (__m128i *)&rx_pkts[count_pkts + 1]->rearm_data, 222 | - mbuf_init); 223 | - 224 | - /* Write packet length */ 225 | - _mm_storeu_si128( 226 | - (void *)&rx_pkts[count_pkts]->rx_descriptor_fields1, 227 | - pkt_mb1); 228 | - _mm_storeu_si128( 229 | - (void *)&rx_pkts[count_pkts + 1]->rx_descriptor_fields1, 230 | - pkt_mb2); 231 | - 232 | - /* Accumulate packet length counter */ 233 | - pktlen = _mm_add_epi32(pktlen, pkt_len[0]); 234 | - pktlen = _mm_add_epi32(pktlen, pkt_len[1]); 235 | - 236 | - count_pkts += RTE_QDMA_DESCS_PER_LOOP; 237 | - id += RTE_QDMA_DESCS_PER_LOOP; 238 | - } else { 239 | - /* Handle packets segmented 240 | - * across multiple descriptors 241 | - * or ring wrap 242 | - */ 243 | - if (pktlen1) { 244 | - mb = prepare_segmented_packet(rxq, 245 | - pktlen1, &id); 246 | - rx_pkts[count_pkts++] = mb; 247 | - pktlen = _mm_add_epi32(pktlen, pkt_len[0]); 248 | - } 249 | - 250 | - if (pktlen2) { 251 | - mb = prepare_segmented_packet(rxq, 252 | - pktlen2, &id); 253 | - rx_pkts[count_pkts++] = mb; 254 | - pktlen = _mm_add_epi32(pktlen, pkt_len[1]); 255 | - } 256 | - } 257 | - } 258 | - 259 | - rxq->stats.pkts += count_pkts; 260 | - rxq->stats.bytes += _mm_extract_epi64(pktlen, 0); 261 | - rxq->rx_tail = id; 262 | - 263 | - /* Handle single packet, if any pending */ 264 | - if (nb_pkts & 1) { 265 | - mb = prepare_single_packet(rxq, count); 266 | - if (mb) 267 | - rx_pkts[count_pkts++] = mb; 268 | - } 269 | - 270 | - return count_pkts; 271 | -} 272 | -#endif //QDMA_RX_VEC_X86_64 273 | - 274 | /* Prepare mbufs with packet information */ 275 | static uint16_t prepare_packets(struct qdma_rx_queue *rxq, 276 | struct rte_mbuf **rx_pkts, uint16_t nb_pkts) 277 | { 278 | uint16_t count_pkts = 0; 279 | - 280 | -#ifdef QDMA_RX_VEC_X86_64 281 | - count_pkts = prepare_packets_v(rxq, rx_pkts, nb_pkts); 282 | -#else //QDMA_RX_VEC_X86_64 283 | struct rte_mbuf *mb; 284 | uint16_t pkt_length; 285 | uint16_t count = 0; 286 | @@ -984,7 +763,6 @@ static uint16_t prepare_packets(struct qdma_rx_queue *rxq, 287 | } 288 | count++; 289 | } 290 | -#endif //QDMA_RX_VEC_X86_64 291 | 292 | return count_pkts; 293 | } 294 | @@ -1023,47 +801,6 @@ static int rearm_c2h_ring(struct qdma_rx_queue *rxq, uint16_t num_desc) 295 | return -1; 296 | } 297 | 298 | -#ifdef QDMA_RX_VEC_X86_64 299 | - int rearm_cnt = rearm_descs & -2; 300 | - __m128i head_room = _mm_set_epi64x(RTE_PKTMBUF_HEADROOM, 301 | - RTE_PKTMBUF_HEADROOM); 302 | - 303 | - for (mbuf_index = 0; mbuf_index < ((uint16_t)rearm_cnt & 0xFFFF); 304 | - mbuf_index += RTE_QDMA_DESCS_PER_LOOP, 305 | - id += RTE_QDMA_DESCS_PER_LOOP) { 306 | - __m128i vaddr0, vaddr1; 307 | - __m128i dma_addr; 308 | - 309 | - /* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */ 310 | - RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) != 311 | - offsetof(struct rte_mbuf, buf_addr) + 8); 312 | - 313 | - /* Load two mbufs data addresses */ 314 | - vaddr0 = _mm_loadu_si128( 315 | - (__m128i *)&(rxq->sw_ring[id]->buf_addr)); 316 | - vaddr1 = _mm_loadu_si128( 317 | - (__m128i *)&(rxq->sw_ring[id+1]->buf_addr)); 318 | - 319 | - /* Extract physical addresses of two mbufs */ 320 | - dma_addr = _mm_unpackhi_epi64(vaddr0, vaddr1); 321 | - 322 | - /* Add headroom to dma_addr */ 323 | - dma_addr = _mm_add_epi64(dma_addr, head_room); 324 | - 325 | - /* Write C2H desc with physical dma_addr */ 326 | - _mm_storeu_si128((__m128i *)&rx_ring_st[id], dma_addr); 327 | - } 328 | - 329 | - if (rearm_descs & 1) { 330 | - mb = rxq->sw_ring[id]; 331 | - 332 | - /* rearm descriptor */ 333 | - rx_ring_st[id].dst_addr = 334 | - (uint64_t)mb->buf_iova + 335 | - RTE_PKTMBUF_HEADROOM; 336 | - id++; 337 | - } 338 | -#else //QDMA_RX_VEC_X86_64 339 | for (mbuf_index = 0; mbuf_index < rearm_descs; 340 | mbuf_index++, id++) { 341 | mb = rxq->sw_ring[id]; 342 | @@ -1074,7 +811,6 @@ static int rearm_c2h_ring(struct qdma_rx_queue *rxq, uint16_t num_desc) 343 | (uint64_t)mb->buf_iova + 344 | RTE_PKTMBUF_HEADROOM; 345 | } 346 | -#endif //QDMA_RX_VEC_X86_64 347 | 348 | if (unlikely(id >= (rxq->nb_rx_desc - 1))) 349 | id -= (rxq->nb_rx_desc - 1); 350 | @@ -1490,11 +1226,7 @@ uint16_t qdma_xmit_pkts_st(struct qdma_tx_queue *txq, struct rte_mbuf **tx_pkts, 351 | txq->sw_ring[id] = mb; 352 | pkt_len += rte_pktmbuf_pkt_len(mb); 353 | 354 | -#ifdef QDMA_TX_VEC_X86_64 355 | - ret = qdma_ul_update_st_h2c_desc_v(txq, txq->offloads, mb); 356 | -#else 357 | ret = qdma_ul_update_st_h2c_desc(txq, txq->offloads, mb); 358 | -#endif //RTE_ARCH_X86_64 359 | if (ret < 0) 360 | break; 361 | } 362 | -------------------------------------------------------------------------------- /0005-qdma-adapt-qdma-h2c-descriptor-structure-to-match-op.patch: -------------------------------------------------------------------------------- 1 | # BSD License 2 | # 3 | # OpenNIC patch for Xilinx DMA IP software 4 | # 5 | # Copyright (c) 2016-2022 Xilinx, Inc. All rights reserved. 6 | # 7 | # Redistribution and use in source and binary forms, with or without modification, 8 | # are permitted provided that the following conditions are met: 9 | # 10 | # * Redistributions of source code must retain the above copyright notice, this 11 | # list of conditions and the following disclaimer. 12 | # 13 | # * Redistributions in binary form must reproduce the above copyright notice, 14 | # this list of conditions and the following disclaimer in the documentation 15 | # and/or other materials provided with the distribution. 16 | # 17 | # * Neither the name Xilinx nor the names of its contributors may be used to 18 | # endorse or promote products derived from this software without specific 19 | # prior written permission. 20 | # 21 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 22 | # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 | # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 | # DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 25 | # ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 | # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 | # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 28 | # ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 | # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 | #---------------------------------------------------------------------------------- 32 | 33 | # Modify QDMA H2H descriptor to match open-nic-shell. 34 | 35 | diff --git a/QDMA/DPDK/drivers/net/qdma/qdma_user.c b/QDMA/DPDK/drivers/net/qdma/qdma_user.c 36 | index b5580b0..bd10a68 100644 37 | --- a/QDMA/DPDK/drivers/net/qdma/qdma_user.c 38 | +++ b/QDMA/DPDK/drivers/net/qdma/qdma_user.c 39 | @@ -169,34 +169,12 @@ int qdma_ul_update_st_h2c_desc(void *qhndl, uint64_t q_offloads, 40 | { 41 | (void)q_offloads; 42 | struct qdma_ul_st_h2c_desc *desc_info; 43 | - int nsegs = mb->nb_segs; 44 | - int pkt_segs = nsegs; 45 | 46 | - if (nsegs == 1) { 47 | - desc_info = get_st_h2c_desc(qhndl); 48 | - desc_info->len = rte_pktmbuf_data_len(mb); 49 | - desc_info->pld_len = desc_info->len; 50 | - desc_info->src_addr = mb->buf_iova + mb->data_off; 51 | - desc_info->flags = (S_H2C_DESC_F_SOP | S_H2C_DESC_F_EOP); 52 | - desc_info->cdh_flags = 0; 53 | - } else { 54 | - while (nsegs && mb) { 55 | - desc_info = get_st_h2c_desc(qhndl); 56 | - 57 | - desc_info->len = rte_pktmbuf_data_len(mb); 58 | - desc_info->pld_len = desc_info->len; 59 | - desc_info->src_addr = mb->buf_iova + mb->data_off; 60 | - desc_info->flags = 0; 61 | - if (nsegs == pkt_segs) 62 | - desc_info->flags |= S_H2C_DESC_F_SOP; 63 | - if (nsegs == 1) 64 | - desc_info->flags |= S_H2C_DESC_F_EOP; 65 | - desc_info->cdh_flags = 0; 66 | + desc_info = get_st_h2c_desc(qhndl); 67 | + desc_info->len = rte_pktmbuf_data_len(mb); 68 | + desc_info->meta_pkt_len = desc_info->len; 69 | + desc_info->src_addr = mb->buf_iova + mb->data_off; 70 | 71 | - nsegs--; 72 | - mb = mb->next; 73 | - } 74 | - } 75 | return 0; 76 | } 77 | 78 | diff --git a/QDMA/DPDK/drivers/net/qdma/qdma_user.h b/QDMA/DPDK/drivers/net/qdma/qdma_user.h 79 | index 1182eb9..febd351 100644 80 | --- a/QDMA/DPDK/drivers/net/qdma/qdma_user.h 81 | +++ b/QDMA/DPDK/drivers/net/qdma/qdma_user.h 82 | @@ -93,9 +93,6 @@ struct __attribute__ ((packed)) qdma_ul_st_c2h_desc 83 | uint64_t dst_addr; 84 | }; 85 | 86 | -#define S_H2C_DESC_F_SOP 1 87 | -#define S_H2C_DESC_F_EOP 2 88 | - 89 | /* pld_len and flags members are part of custom descriptor format needed 90 | * by example design for ST loopback and desc bypass 91 | */ 92 | @@ -103,10 +100,10 @@ struct __attribute__ ((packed)) qdma_ul_st_c2h_desc 93 | /** ST H2C Descriptor **/ 94 | struct __attribute__ ((packed)) qdma_ul_st_h2c_desc 95 | { 96 | - volatile uint16_t cdh_flags; 97 | - volatile uint16_t pld_len; 98 | + volatile uint16_t meta_pkt_len; 99 | + volatile uint16_t meta_unused; 100 | volatile uint16_t len; 101 | - volatile uint16_t flags; 102 | + volatile uint16_t rsvd; 103 | volatile uint64_t src_addr; 104 | }; 105 | 106 | -------------------------------------------------------------------------------- /COPYING: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 2, June 1991 3 | 4 | Copyright (C) 1989, 1991 Free Software Foundation, Inc. 5 | 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 6 | Everyone is permitted to copy and distribute verbatim copies 7 | of this license document, but changing it is not allowed. 8 | 9 | Preamble 10 | 11 | The licenses for most software are designed to take away your 12 | freedom to share and change it. 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If this is what you want to do, use the GNU Library General 340 | Public License instead of this License. -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | BSD License 2 | 3 | For OpenNIC patch for the Xilinx DMA IP software 4 | 5 | Copyright (c) 2016-2022 Xilinx, Inc. All rights reserved. 6 | 7 | Redistribution and use in source and binary forms, with or without modification, 8 | are permitted provided that the following conditions are met: 9 | 10 | * Redistributions of source code must retain the above copyright notice, this 11 | list of conditions and the following disclaimer. 12 | 13 | * Redistributions in binary form must reproduce the above copyright notice, 14 | this list of conditions and the following disclaimer in the documentation 15 | and/or other materials provided with the distribution. 16 | 17 | * Neither the name Xilinx nor the names of its contributors may be used to 18 | endorse or promote products derived from this software without specific 19 | prior written permission. 20 | 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 22 | ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 | WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 25 | ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 28 | ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | ## Instructions for Getting DPDK Drivers Up and Running on AMD OpenNIC 2 | 3 | This is one of the three components of the 4 | [OpenNIC project](https://github.com/Xilinx/open-nic.git). The other components are: 5 | - [OpenNIC shell](https://github.com/Xilinx/open-nic-shell.git) and 6 | - [OpenNIC driver](https://github.com/Xilinx/open-nic-driver.git). 7 | 8 | This OpenNIC DPDK repo contains a series of patch files and instructions with details for building DPDK with drivers for [OpenNIC](https://github.com/Xilinx/open-nic). The basic sections are: 9 | 10 | 1. Install Build Dependencies. 11 | 1. The drivers at [Xilinx QDMA's DPDK driver repo](https://github.com/Xilinx/dma_ip_drivers) need to be patched for OpenNIC using the patch files contained in this repo. 12 | 1. Download DPDK and DPDK pktgen. The DPDK 20.11 distribution needs minor edits to include these drivers. 13 | 1. Build. 14 | 1. Configure proc/cmdline and BIOS if necessary. 15 | 1. Run Vivado to generate the [open-nic-shell](https://github.com/Xilinx/open-nic-shell) configured for two CMAC ports and two PFs for testing these. 16 | 1. Gives examples for writing to the hardware registers in order to set up the test. 17 | 1. Gives examples for binding DPDK to devices and testing this driver by running pktgen for the two PFs. 18 | 19 | The rest of this document contains the step-by-step instructions for each of the sections listed above. These instructions were written assuming Ubuntu e.g. 18.04 or 20.04. 20 | 21 | ### Section 1: Install Build Dependencies 22 | 23 | 1. Install dependencies for building DPDK: 24 | ``` 25 | sudo apt install build-essential 26 | sudo apt install libnuma-dev 27 | sudo apt install pkg-config 28 | sudo apt install python3 python3-pip python3-setuptools 29 | sudo apt install python3-wheel python3-pyelftools 30 | sudo apt install ninja-build 31 | sudo pip3 install meson 32 | ``` 33 | 34 | 1. Install dependencies for building pktgen-dpdk: 35 | ``` 36 | sudo apt install libpcap-dev 37 | ``` 38 | 39 | Substitute the kernel version from "uname -a" into the command 40 | below: 41 | ``` 42 | sudo apt install linux-headers-5.4.0-96-generic 43 | ``` 44 | 45 | 46 | ### Section 2: Download Xilinx QDMA DPDK driver and Apply OpenNIC Patches 47 | 48 | 1. This repo contains several patch files that must be applied to the [Xilinx QDMA DPDK drivers](https://github.com/Xilinx/dma_ip_drivers.git). 49 | ``` 50 | git clone https://github.com/Xilinx/dma_ip_drivers.git 51 | cd dma_ip_drivers 52 | git checkout 7859957 53 | cd .. 54 | ``` 55 | 56 | 1. Clone this open-nic-dpdk repo: 57 | ``` 58 | git clone https://github.com/Xilinx/open-nic-dpdk 59 | ``` 60 | 61 | 1. Copy the `*.patch` files contained in this repo into the QDMA driver's directory. 62 | ``` 63 | cp open-nic-dpdk/*.patch dma_ip_drivers 64 | ``` 65 | 66 | 1. Then apply the OpenNIC patches: 67 | ``` 68 | cd dma_ip_drivers 69 | git apply *.patch 70 | cd .. 71 | ``` 72 | 73 | ### Section 3: Download DPDK and pktgen-dpdk 74 | 75 | 1. Download [DPDK source](https://fast.dpdk.org/rel/dpdk-20.11.tar.xz) and build it, including the QDMA drivers. 76 | 77 | ``` 78 | wget https://fast.dpdk.org/rel/dpdk-20.11.tar.xz 79 | tar xvf dpdk-20.11.tar.xz 80 | cd dpdk-20.11 81 | cp -R ../dma_ip_drivers/QDMA/DPDK/drivers/net/qdma ./drivers/net 82 | cp -R ../dma_ip_drivers/QDMA/DPDK/examples/qdma_testapp ./examples 83 | ``` 84 | 85 | 1. Edit `drivers/net/meson.build` to insert `'qdma'` into the list of drivers (~near line 46). Save the changes. 86 | 87 | 1. Return to the earlier directory: 88 | ``` 89 | cd .. 90 | ``` 91 | 92 | 1. Download [pktgen-dpdk source](https://git.dpdk.org/apps/pktgen-dpdk/snapshot/pktgen-dpdk-pktgen-20.11.3.tar.xz) and build it, including the QDMA drivers. 93 | ``` 94 | wget \ 95 | https://git.dpdk.org/apps/pktgen-dpdk/snapshot/pktgen-dpdk-pktgen-20.11.3.tar.xz 96 | tar xvf pktgen-dpdk-pktgen-20.11.3.tar.xz 97 | ``` 98 | 99 | ### Section 4: Build 100 | 101 | 102 | 103 | 1. Build DPDK: 104 | ``` 105 | cd dpdk-20.11 106 | meson build 107 | cd build 108 | ninja 109 | sudo ninja install 110 | ls -l /usr/local/lib/x86_64-linux-gnu/librte_net_qdma.so 111 | sudo ldconfig 112 | ls -l ./app/test/dpdk-test 113 | cd ../.. 114 | ``` 115 | 116 | 1. Build pktgen-dpdk: 117 | ``` 118 | cd pktgen-dpdk-pktgen-20.11.3 119 | make RTE_SDK=../dpdk-20.11 RTE_TARGET=build 120 | ``` 121 | 122 | 123 | ### Section 5: Configure proc/cmdline and BIOS if necessary 124 | 125 | 126 | 1. Make sure that IOMMU is enabled within the BIOS settings. 127 | 128 | *Note: Enable VT-d for Intel processors within the BIOS.* 129 | 130 | 1. Set grub settings to enable hugepages and IOMMU if necessary. The 131 | following example grub command line below is based on an AMD machine 132 | with e.g. 16GB of RAM, so please adjust the number of hugepages below 133 | as appropriate. 134 | 135 | Edit `/etc/default/grub` to include the following line: 136 | 137 | `GRUB_CMDLINE_LINUX=" default_hugepagesz=1G hugepagesz=1G hugepages=4"` 138 | 139 | *Note: Add* `intel_iommu=on` *above for Intel processors.* 140 | 141 | 1. Update grub: 142 | ``` 143 | sudo update-grub 144 | ``` 145 | 146 | 1. Reboot for the changes to take effect. 147 | ``` 148 | sudo reboot 149 | ``` 150 | 151 | 1. Confirm that hugepages appears within the `/proc/cmdline`: 152 | ``` 153 | cat /proc/cmdline 154 | ``` 155 | 156 | ### Section 6: Create the OpenNIC bitfile configured for two CMAC ports 157 | 158 | 1. Clone the latest version of the open-nic-shell from github (including 159 | some updates after 1.0 release). 160 | ``` 161 | git clone https://github.com/Xilinx/open-nic-shell.git 162 | ``` 163 | 1. Follow the instructions within 164 | for building the bitfile 165 | including specifying the appropriate board and also the following 166 | parameters: `-num_cmac_port 2 -num_phys_func 2`. 167 | 168 | 1. Open Vivado to complete the implementation and to generate the bitfile. 169 | 170 | 1. Use Vivado to load the bitfile. 171 | 172 | 1. Either reboot or pci rescan to redectect the pci devices, for example: 173 | ``` 174 | echo 1 | sudo tee /sys/bus/pci/devices/0000\:d7\:00.0/rescan 175 | sudo setpci -s d8:00.0 COMMAND=0x02 176 | ``` 177 | 178 | ### Section 7: Writing to Initialize the OpenNIC hardware registers 179 | 180 | 1. Find the pcie bus and device ID for the two PFs: 181 | ``` 182 | $ lspci -d 10ee: 183 | ``` 184 | > 08:00.0 Memory controller: Xilinx Corporation Device 903f 185 | > 186 | > 08:00.1 Memory controller: Xilinx Corporation Device 913f 187 | 188 | Below is an example of finding the sysfile name of the device ID: 189 | ``` 190 | $ lspci -td 10ee: 191 | ``` 192 | > -+-[0000:d8]-+-00.0 193 | > | \-00.1 194 | > \-[0000:00]- 195 | ``` 196 | $ cd -P /sys/bus/pci/devices/0000:d8:00.0 && pwd 197 | ``` 198 | > /sys/devices/pci0000:d7/0000:d7:00.0/0000:d8:00.0 199 | 200 | 1. Use a utility program such as pcimem or similar to write to enable 201 | the CMAC registers and the QDMA. 202 | 203 | The following example writes should be modified for your pcie device 204 | sysfile name. Perform the following register writes. 205 | 206 | Enable the PCIe device for writing: 207 | ``` 208 | sudo setpci -s 08:00.0 COMMAND=0x02; 209 | 210 | sudo setpci -s 08:00.1 COMMAND=0x02; 211 | ``` 212 | Write to QDMA: 213 | ``` 214 | sudo pcimem \ 215 | /sys/devices/pci0000:00/0000:00:03.1/0000:08:00.0/resource2 0x1000 w 0x1; 216 | 217 | sudo pcimem \ 218 | /sys/devices/pci0000:00/0000:00:03.1/0000:08:00.0/resource2 0x2000 w 0x00010001; 219 | ``` 220 | Write to enable CMAC0: 221 | ``` 222 | sudo pcimem \ 223 | /sys/devices/pci0000:00/0000:00:03.1/0000:08:00.0/resource2 0x8014 w 0x1; 224 | 225 | sudo pcimem \ 226 | /sys/devices/pci0000:00/0000:00:03.1/0000:08:00.0/resource2 0x800c w 0x1; 227 | ``` 228 | Write to enable CMAC1: 229 | ``` 230 | sudo pcimem \ 231 | /sys/devices/pci0000:00/0000:00:03.1/0000:08:00.0/resource2 0xC014 w 0x1; 232 | 233 | sudo pcimem \ 234 | /sys/devices/pci0000:00/0000:00:03.1/0000:08:00.0/resource2 0xC00c w 0x1; 235 | ``` 236 | ### Section 8: Binding DPDK and Testing by Running pktgen 237 | 238 | 1. Edit dpdk-devbind.py so that it can find the qdma PCIe class/vendor/device, for example like below. 239 | (The file dpdk-devbind.diff in this repo also contains these same lines from diff.) 240 | ``` 241 | 31a32,35 242 | > 243 | > qdma = {'Class: '02', 'Vendor': '10ee', 'Device': '903f,913f', 244 | > 'SVendor': None, 'SDevice': None} 245 | > 246 | 62c66 247 | < network_devices = [network_class, cavium_pkx, avp_vnic, ifpga_class] 248 | --- 249 | > network_devices = [network_class, cavium_pkx, avp_vnic, ifpga_class, qdma] 250 | ``` 251 | 252 | 2. Load dpdk-devbind.py with arguments for vfio and the two pcie bus and device identifiers: 253 | ``` 254 | sudo dpdk_patched/dpdk-20.11/usertools/dpdk-devbind.py -b vfio-pci \ 255 | 08:00.0 08:00.1 256 | ``` 257 | 3. Test by running pktgen-dpdk (note the command below specifies example device IDs 258 | and bus IDs for the two PFs, please substitute with the appropriate IDs): 259 | ``` 260 | sudo dpdk_patched/pktgen-dpdk/usr/local/bin/pktgen -a 08:00.0 -a 08:00.1 \ 261 | -d librte_net_qdma.so -l 4-10 -n 4 -a 00:03.0 -a 00:03.1 -- -m [6:7].0 -m [8:9].1 262 | ``` 263 | 264 | --- 265 | 266 | ### Copyright Notice and Disclaimer 267 | 268 | © Copyright 2020 – 2022 Xilinx, Inc. All rights reserved. 269 | 270 | This file contains confidential and proprietary information of Xilinx, Inc. and is protected under U.S. and international copyright and other intellectual property laws. 271 | 272 | DISCLAIMER 273 | 274 | This disclaimer is not a license and does not grant any rights to the materials distributed herewith. Except as otherwise provided in a valid license issued to you by Xilinx, and to the maximum extent permitted by applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising under or in connection with these materials, including for any direct, or any indirect, special, incidental, or consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same. 275 | 276 | CRITICAL APPLICATIONS 277 | 278 | Xilinx products are not designed or intended to be fail-safe, or for use in any application requiring failsafe performance, such as life-support or safety devices or systems, Class III medical devices, nuclear facilities, applications related to the deployment of airbags, or any other applications that could lead to death, personal injury, or severe property or environmental damage (individually and collectively, "Critical Applications"). Customer assumes the sole risk and liability of any use of Xilinx products in Critical Applications, subject only to applicable laws and regulations governing limitations on product liability. 279 | 280 | THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE AT ALL TIMES. 281 | -------------------------------------------------------------------------------- /bsd_license.txt: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the OpenNIC patch for Xilinx DMA IP software 3 | * 4 | * Copyright (c) 2018-2022, Xilinx, Inc. 5 | * All rights reserved. 6 | * 7 | * This source code is licensed under both the BSD-style license (found in the 8 | * LICENSE file in the root directory of this source tree) and the GPLv2 (found 9 | * in the COPYING file in the root directory of this source tree). 10 | * You may select, at your option, one of the above-listed licenses. 11 | */ 12 | 13 | -------------------------------------------------------------------------------- /dpdk-devbind.diff: -------------------------------------------------------------------------------- 1 | 31a32,35 2 | > 3 | > qdma = {'Class': '02', 'Vendor': '10ee', 'Device': '903f,913f', 4 | > 'SVendor': None, 'SDevice': None} 5 | > 6 | 62c66 7 | < network_devices = [network_class, cavium_pkx, avp_vnic, ifpga_class] 8 | --- 9 | > network_devices = [network_class, cavium_pkx, avp_vnic, ifpga_class, qdma] 10 | -------------------------------------------------------------------------------- /license.txt: -------------------------------------------------------------------------------- 1 | /* 2 | * This source code is free software; you can redistribute it and/or modify it 3 | * under the terms and conditions of the GNU General Public License, 4 | * version 2, as published by the Free Software Foundation. 5 | * 6 | * This program is distributed in the hope that it will be useful, but WITHOUT 7 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 8 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 9 | * more details. 10 | * 11 | * The full GNU General Public License is included in this distribution in 12 | * the file called "COPYING". 13 | */ 14 | --------------------------------------------------------------------------------