├── AXI4 ├── AXI4 Lite-No-Extensions Propositions.xlsx ├── README.md ├── doc │ ├── 23e2abbf85934eb3a87237499316b1f4.png │ ├── 38344b5dc8cb407ab530cb5651672ed4.png │ ├── 4378216bedc94ca5a96aab4119882da2.png │ ├── UG_verification_plan.lyx │ ├── UG_verification_plan.pdf │ ├── da465d7fac9245a58fdf0f1cdf2a2d6f.png │ └── org.png ├── examples │ ├── README.md │ ├── amba_validity_test │ │ ├── .gitignore │ │ ├── README.md │ │ ├── Results.xlsx │ │ ├── amba_validity_test.sby │ │ ├── initial_values.smt │ │ ├── results.txt │ │ ├── testbench.sv │ │ └── top_cell.sv │ ├── axi4_lite_gpio_destination │ │ ├── .gitignore │ │ ├── axilgpio.sby │ │ ├── axilgpio.v │ │ └── yosyshq_lite_source.sv │ ├── axi_crossbar │ │ ├── .gitignore │ │ ├── README.md │ │ ├── ap_AR_ARADDR_BOUNDARY_4KB.gtkw │ │ ├── arbiter.v │ │ ├── axi_crossbar.sby │ │ ├── axi_crossbar.v │ │ ├── axi_crossbar_addr.v │ │ ├── axi_crossbar_rd.v │ │ ├── axi_crossbar_wr.v │ │ ├── axi_register_rd.v │ │ ├── axi_register_wr.v │ │ ├── doc │ │ │ ├── ar_bound_4k.jpg │ │ │ ├── arch.png │ │ │ ├── crossbar_example.lyx │ │ │ ├── crossbar_example.pdf │ │ │ └── sby-gui.jpg │ │ ├── priority_encoder.v │ │ ├── testbench.sv │ │ └── top_cell.sv │ ├── spinal_axi4_lite │ │ ├── .gitignore │ │ ├── AxiLite4FormalComponent.sby │ │ ├── AxiLite4FormalComponent.v │ │ ├── amba_axi4_protocol_checker_wrapper.sv │ │ ├── build.sbt │ │ └── component.scala │ └── synthesis_test │ │ ├── axi4_full │ │ ├── .gitignore │ │ ├── synthesis_test.sby │ │ ├── testbench.sv │ │ └── top_cell.sv │ │ └── axi4_lite │ │ ├── .gitignore │ │ ├── synthesis_test.sby │ │ ├── testbench.sv │ │ └── top_cell.sv ├── src │ ├── .gitignore │ ├── amba_axi4_low_power_channel.sv │ ├── amba_axi4_protocol_checker.sv │ ├── amba_axi4_protocol_checker_pkg.sv │ ├── amba_axi4_read_address_channel.sv │ ├── amba_axi4_read_data_channel.sv │ ├── amba_axi4_write_address_channel.sv │ ├── amba_axi4_write_data_channel.sv │ ├── amba_axi4_write_response_channel.sv │ ├── axi4_lib │ │ ├── amba_axi4_exclusive_access_source_perspective.sv │ │ └── amba_axi4_write_response_dependencies.sv │ └── axi4_spec │ │ ├── amba_axi4_atomic_accesses.sv │ │ ├── amba_axi4_definition_of_axi4_lite.sv │ │ ├── amba_axi4_low_power_interface.sv │ │ ├── amba_axi4_single_interface_requirements.sv │ │ ├── amba_axi4_transaction_attributes.sv │ │ └── amba_axi4_transaction_structure.sv └── templates │ ├── axi4 │ ├── yosyshq_full_constraint.sv │ ├── yosyshq_full_destination.sv │ ├── yosyshq_full_monitor.sv │ └── yosyshq_full_source.sv │ ├── axi4_lite │ ├── yosyshq_lite_destination.sv │ └── yosyshq_lite_source.sv │ ├── tool_agnostic_example_setup.tcl │ └── yosyshq_tabbycad_example_setup.sby ├── AXI4_STREAM ├── amba_axi4_stream.sv ├── amba_axi4_stream_pkg.sv └── examples │ ├── dd01_self_check │ ├── .gitignore │ ├── source2sink.sby │ └── source2sink.sv │ ├── dd02_axis_fifo │ ├── .gitignore │ ├── README.md │ ├── amba_axi4_stream_pkg.sv │ ├── axis_fifo.sby │ ├── axis_fifo.v │ └── axis_fifo_protocol_check.sv │ ├── dd03_mat_mul │ ├── README.md │ ├── amba_axi4_stream_pkg.sv │ ├── bind.sv │ └── mat_mul.v │ └── dd04_axi_fifo_vhdlwiz │ ├── .gitignore │ ├── amba_axi4_formal_checker.sv │ ├── amba_axi4_stream_pkg.sv │ ├── axi_fifo.sby │ └── axi_fifo.vhd ├── COPYING └── README.md /AXI4/AXI4 Lite-No-Extensions Propositions.xlsx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/AXI4 Lite-No-Extensions Propositions.xlsx -------------------------------------------------------------------------------- /AXI4/README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/README.md -------------------------------------------------------------------------------- /AXI4/doc/23e2abbf85934eb3a87237499316b1f4.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/doc/23e2abbf85934eb3a87237499316b1f4.png -------------------------------------------------------------------------------- /AXI4/doc/38344b5dc8cb407ab530cb5651672ed4.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/doc/38344b5dc8cb407ab530cb5651672ed4.png -------------------------------------------------------------------------------- /AXI4/doc/4378216bedc94ca5a96aab4119882da2.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/doc/4378216bedc94ca5a96aab4119882da2.png -------------------------------------------------------------------------------- /AXI4/doc/UG_verification_plan.lyx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/doc/UG_verification_plan.lyx -------------------------------------------------------------------------------- /AXI4/doc/UG_verification_plan.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/doc/UG_verification_plan.pdf -------------------------------------------------------------------------------- /AXI4/doc/da465d7fac9245a58fdf0f1cdf2a2d6f.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/doc/da465d7fac9245a58fdf0f1cdf2a2d6f.png -------------------------------------------------------------------------------- /AXI4/doc/org.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/doc/org.png -------------------------------------------------------------------------------- /AXI4/examples/README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/README.md -------------------------------------------------------------------------------- /AXI4/examples/amba_validity_test/.gitignore: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/amba_validity_test/.gitignore -------------------------------------------------------------------------------- /AXI4/examples/amba_validity_test/README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/amba_validity_test/README.md -------------------------------------------------------------------------------- /AXI4/examples/amba_validity_test/Results.xlsx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/amba_validity_test/Results.xlsx -------------------------------------------------------------------------------- /AXI4/examples/amba_validity_test/amba_validity_test.sby: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/amba_validity_test/amba_validity_test.sby -------------------------------------------------------------------------------- /AXI4/examples/amba_validity_test/initial_values.smt: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/amba_validity_test/initial_values.smt -------------------------------------------------------------------------------- /AXI4/examples/amba_validity_test/results.txt: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/amba_validity_test/results.txt -------------------------------------------------------------------------------- /AXI4/examples/amba_validity_test/testbench.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/amba_validity_test/testbench.sv -------------------------------------------------------------------------------- /AXI4/examples/amba_validity_test/top_cell.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/amba_validity_test/top_cell.sv -------------------------------------------------------------------------------- /AXI4/examples/axi4_lite_gpio_destination/.gitignore: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi4_lite_gpio_destination/.gitignore -------------------------------------------------------------------------------- /AXI4/examples/axi4_lite_gpio_destination/axilgpio.sby: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi4_lite_gpio_destination/axilgpio.sby -------------------------------------------------------------------------------- /AXI4/examples/axi4_lite_gpio_destination/axilgpio.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi4_lite_gpio_destination/axilgpio.v -------------------------------------------------------------------------------- /AXI4/examples/axi4_lite_gpio_destination/yosyshq_lite_source.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi4_lite_gpio_destination/yosyshq_lite_source.sv -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/.gitignore: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/.gitignore -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/README.md -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/ap_AR_ARADDR_BOUNDARY_4KB.gtkw: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/ap_AR_ARADDR_BOUNDARY_4KB.gtkw -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/arbiter.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/arbiter.v -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/axi_crossbar.sby: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/axi_crossbar.sby -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/axi_crossbar.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/axi_crossbar.v -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/axi_crossbar_addr.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/axi_crossbar_addr.v -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/axi_crossbar_rd.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/axi_crossbar_rd.v -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/axi_crossbar_wr.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/axi_crossbar_wr.v -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/axi_register_rd.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/axi_register_rd.v -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/axi_register_wr.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/axi_register_wr.v -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/doc/ar_bound_4k.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/doc/ar_bound_4k.jpg -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/doc/arch.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/doc/arch.png -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/doc/crossbar_example.lyx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/doc/crossbar_example.lyx -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/doc/crossbar_example.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/doc/crossbar_example.pdf -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/doc/sby-gui.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/doc/sby-gui.jpg -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/priority_encoder.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/priority_encoder.v -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/testbench.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/testbench.sv -------------------------------------------------------------------------------- /AXI4/examples/axi_crossbar/top_cell.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/axi_crossbar/top_cell.sv -------------------------------------------------------------------------------- /AXI4/examples/spinal_axi4_lite/.gitignore: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/spinal_axi4_lite/.gitignore -------------------------------------------------------------------------------- /AXI4/examples/spinal_axi4_lite/AxiLite4FormalComponent.sby: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/spinal_axi4_lite/AxiLite4FormalComponent.sby -------------------------------------------------------------------------------- /AXI4/examples/spinal_axi4_lite/AxiLite4FormalComponent.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/spinal_axi4_lite/AxiLite4FormalComponent.v -------------------------------------------------------------------------------- /AXI4/examples/spinal_axi4_lite/amba_axi4_protocol_checker_wrapper.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/spinal_axi4_lite/amba_axi4_protocol_checker_wrapper.sv -------------------------------------------------------------------------------- /AXI4/examples/spinal_axi4_lite/build.sbt: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/spinal_axi4_lite/build.sbt -------------------------------------------------------------------------------- /AXI4/examples/spinal_axi4_lite/component.scala: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/spinal_axi4_lite/component.scala -------------------------------------------------------------------------------- /AXI4/examples/synthesis_test/axi4_full/.gitignore: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/synthesis_test/axi4_full/.gitignore -------------------------------------------------------------------------------- /AXI4/examples/synthesis_test/axi4_full/synthesis_test.sby: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/synthesis_test/axi4_full/synthesis_test.sby -------------------------------------------------------------------------------- /AXI4/examples/synthesis_test/axi4_full/testbench.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/synthesis_test/axi4_full/testbench.sv -------------------------------------------------------------------------------- /AXI4/examples/synthesis_test/axi4_full/top_cell.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/synthesis_test/axi4_full/top_cell.sv -------------------------------------------------------------------------------- /AXI4/examples/synthesis_test/axi4_lite/.gitignore: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/synthesis_test/axi4_lite/.gitignore -------------------------------------------------------------------------------- /AXI4/examples/synthesis_test/axi4_lite/synthesis_test.sby: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/synthesis_test/axi4_lite/synthesis_test.sby -------------------------------------------------------------------------------- /AXI4/examples/synthesis_test/axi4_lite/testbench.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/synthesis_test/axi4_lite/testbench.sv -------------------------------------------------------------------------------- /AXI4/examples/synthesis_test/axi4_lite/top_cell.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/examples/synthesis_test/axi4_lite/top_cell.sv -------------------------------------------------------------------------------- /AXI4/src/.gitignore: -------------------------------------------------------------------------------- 1 | .*.swp 2 | -------------------------------------------------------------------------------- /AXI4/src/amba_axi4_low_power_channel.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/amba_axi4_low_power_channel.sv -------------------------------------------------------------------------------- /AXI4/src/amba_axi4_protocol_checker.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/amba_axi4_protocol_checker.sv -------------------------------------------------------------------------------- /AXI4/src/amba_axi4_protocol_checker_pkg.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/amba_axi4_protocol_checker_pkg.sv -------------------------------------------------------------------------------- /AXI4/src/amba_axi4_read_address_channel.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/amba_axi4_read_address_channel.sv -------------------------------------------------------------------------------- /AXI4/src/amba_axi4_read_data_channel.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/amba_axi4_read_data_channel.sv -------------------------------------------------------------------------------- /AXI4/src/amba_axi4_write_address_channel.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/amba_axi4_write_address_channel.sv -------------------------------------------------------------------------------- /AXI4/src/amba_axi4_write_data_channel.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/amba_axi4_write_data_channel.sv -------------------------------------------------------------------------------- /AXI4/src/amba_axi4_write_response_channel.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/amba_axi4_write_response_channel.sv -------------------------------------------------------------------------------- /AXI4/src/axi4_lib/amba_axi4_exclusive_access_source_perspective.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/axi4_lib/amba_axi4_exclusive_access_source_perspective.sv -------------------------------------------------------------------------------- /AXI4/src/axi4_lib/amba_axi4_write_response_dependencies.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/axi4_lib/amba_axi4_write_response_dependencies.sv -------------------------------------------------------------------------------- /AXI4/src/axi4_spec/amba_axi4_atomic_accesses.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/axi4_spec/amba_axi4_atomic_accesses.sv -------------------------------------------------------------------------------- /AXI4/src/axi4_spec/amba_axi4_definition_of_axi4_lite.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/axi4_spec/amba_axi4_definition_of_axi4_lite.sv -------------------------------------------------------------------------------- /AXI4/src/axi4_spec/amba_axi4_low_power_interface.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/axi4_spec/amba_axi4_low_power_interface.sv -------------------------------------------------------------------------------- /AXI4/src/axi4_spec/amba_axi4_single_interface_requirements.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/axi4_spec/amba_axi4_single_interface_requirements.sv -------------------------------------------------------------------------------- /AXI4/src/axi4_spec/amba_axi4_transaction_attributes.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/axi4_spec/amba_axi4_transaction_attributes.sv -------------------------------------------------------------------------------- /AXI4/src/axi4_spec/amba_axi4_transaction_structure.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/src/axi4_spec/amba_axi4_transaction_structure.sv -------------------------------------------------------------------------------- /AXI4/templates/axi4/yosyshq_full_constraint.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/templates/axi4/yosyshq_full_constraint.sv -------------------------------------------------------------------------------- /AXI4/templates/axi4/yosyshq_full_destination.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/templates/axi4/yosyshq_full_destination.sv -------------------------------------------------------------------------------- /AXI4/templates/axi4/yosyshq_full_monitor.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/templates/axi4/yosyshq_full_monitor.sv -------------------------------------------------------------------------------- /AXI4/templates/axi4/yosyshq_full_source.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/templates/axi4/yosyshq_full_source.sv -------------------------------------------------------------------------------- /AXI4/templates/axi4_lite/yosyshq_lite_destination.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/templates/axi4_lite/yosyshq_lite_destination.sv -------------------------------------------------------------------------------- /AXI4/templates/axi4_lite/yosyshq_lite_source.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/templates/axi4_lite/yosyshq_lite_source.sv -------------------------------------------------------------------------------- /AXI4/templates/tool_agnostic_example_setup.tcl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/templates/tool_agnostic_example_setup.tcl -------------------------------------------------------------------------------- /AXI4/templates/yosyshq_tabbycad_example_setup.sby: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4/templates/yosyshq_tabbycad_example_setup.sby -------------------------------------------------------------------------------- /AXI4_STREAM/amba_axi4_stream.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/amba_axi4_stream.sv -------------------------------------------------------------------------------- /AXI4_STREAM/amba_axi4_stream_pkg.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/amba_axi4_stream_pkg.sv -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd01_self_check/.gitignore: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd01_self_check/.gitignore -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd01_self_check/source2sink.sby: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd01_self_check/source2sink.sby -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd01_self_check/source2sink.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd01_self_check/source2sink.sv -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd02_axis_fifo/.gitignore: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd02_axis_fifo/.gitignore -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd02_axis_fifo/README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd02_axis_fifo/README.md -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd02_axis_fifo/amba_axi4_stream_pkg.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd02_axis_fifo/amba_axi4_stream_pkg.sv -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd02_axis_fifo/axis_fifo.sby: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd02_axis_fifo/axis_fifo.sby -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd02_axis_fifo/axis_fifo.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd02_axis_fifo/axis_fifo.v -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd02_axis_fifo/axis_fifo_protocol_check.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd02_axis_fifo/axis_fifo_protocol_check.sv -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd03_mat_mul/README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd03_mat_mul/README.md -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd03_mat_mul/amba_axi4_stream_pkg.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd03_mat_mul/amba_axi4_stream_pkg.sv -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd03_mat_mul/bind.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd03_mat_mul/bind.sv -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd03_mat_mul/mat_mul.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd03_mat_mul/mat_mul.v -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd04_axi_fifo_vhdlwiz/.gitignore: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd04_axi_fifo_vhdlwiz/.gitignore -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd04_axi_fifo_vhdlwiz/amba_axi4_formal_checker.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd04_axi_fifo_vhdlwiz/amba_axi4_formal_checker.sv -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd04_axi_fifo_vhdlwiz/amba_axi4_stream_pkg.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd04_axi_fifo_vhdlwiz/amba_axi4_stream_pkg.sv -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd04_axi_fifo_vhdlwiz/axi_fifo.sby: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd04_axi_fifo_vhdlwiz/axi_fifo.sby -------------------------------------------------------------------------------- /AXI4_STREAM/examples/dd04_axi_fifo_vhdlwiz/axi_fifo.vhd: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/AXI4_STREAM/examples/dd04_axi_fifo_vhdlwiz/axi_fifo.vhd -------------------------------------------------------------------------------- /COPYING: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/COPYING -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/YosysHQ-GmbH/SVA-AXI4-FVIP/HEAD/README.md --------------------------------------------------------------------------------