├── APP ├── net_time │ ├── net_time.c │ └── net_time.h ├── oled_ui │ ├── oled_ui.c │ ├── oled_ui.h │ └── oled_ui_font.h ├── onenet_http │ ├── onenet_http.c │ └── onenet_http.h └── seniverse_http │ ├── seniverse_http.c │ └── seniverse_http.h ├── CMSIS ├── core_cm3.c ├── core_cm3.h ├── startup │ ├── startup_stm32f10x_cl.s │ ├── startup_stm32f10x_hd.s │ ├── startup_stm32f10x_hd_vl.s │ ├── startup_stm32f10x_ld.s │ ├── startup_stm32f10x_ld_vl.s │ ├── startup_stm32f10x_md.s │ ├── startup_stm32f10x_md_vl.s │ └── startup_stm32f10x_xl.s ├── stm32f10x.h ├── system_stm32f10x.c └── system_stm32f10x.h ├── F103-IOT-IC.pdf ├── F103物联工控板-AD-PCB工程.zip ├── FreeRTOS ├── croutine.c ├── event_groups.c ├── include │ ├── FreeRTOS.h │ ├── FreeRTOSConfig.h │ ├── StackMacros.h │ ├── croutine.h │ ├── deprecated_definitions.h │ ├── event_groups.h │ ├── list.h │ ├── mpu_prototypes.h │ ├── mpu_wrappers.h │ ├── portable.h │ ├── projdefs.h │ ├── queue.h │ ├── semphr.h │ ├── stdint.readme │ ├── task.h │ └── timers.h ├── list.c ├── portable │ ├── Keil │ │ └── See-also-the-RVDS-directory.txt │ ├── MemMang │ │ ├── ReadMe.url │ │ ├── heap_1.c │ │ ├── heap_2.c │ │ ├── heap_3.c │ │ ├── heap_4.c │ │ └── heap_5.c │ ├── RVDS │ │ ├── ARM7_LPC21xx │ │ │ ├── port.c │ │ │ ├── portASM.s │ │ │ ├── portmacro.h │ │ │ └── portmacro.inc │ │ ├── ARM_CA9 │ │ │ ├── port.c │ │ │ ├── portASM.s │ │ │ ├── portmacro.h │ │ │ └── portmacro.inc │ │ ├── ARM_CM0 │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── ARM_CM3 │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── ARM_CM4F │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ ├── ARM_CM4_MPU │ │ │ ├── port.c │ │ │ └── portmacro.h │ │ └── ARM_CM7 │ │ │ ├── ReadMe.txt │ │ │ └── r0p1 │ │ │ ├── port.c │ │ │ └── portmacro.h │ └── readme.txt ├── queue.c ├── readme.txt ├── tasks.c └── timers.c ├── README.md ├── img ├── F103-IOT-DEV-BOTTOM.jpg └── F103-IOT-DEV-TOP.jpg ├── peripheral ├── LED │ ├── led.c │ └── led.h ├── oled │ ├── oled.c │ ├── oled.h │ └── oledfont.h ├── oled1 │ ├── oled1.c │ └── oled1.h ├── spi1 │ ├── spi1.c │ └── spi1.h ├── spi2 │ ├── spi2.c │ └── spi2.h ├── timer3 │ ├── timer3.c │ └── timer3.h ├── uart1 │ ├── uart1.c │ └── uart1.h ├── uart2 │ ├── uart2.c │ └── uart2.h ├── uart3 │ ├── uart3.c │ └── uart3.h └── wifi │ ├── wifi.c │ └── wifi.h ├── project └── uVision5 │ ├── DebugConfig │ ├── F103Cx_FreeRTOS_emptyPrj_STM32F103C8_1.0.0.dbgconf │ └── Target_1_STM32F103C8_1.0.0.dbgconf │ ├── EventRecorderStub.scvd │ ├── F103Cx_FreeRTOS_emptyPrj.uvguix.14517 │ ├── F103Cx_FreeRTOS_emptyPrj.uvguix.Hello │ ├── F103Cx_FreeRTOS_emptyPrj.uvoptx │ ├── F103Cx_FreeRTOS_emptyPrj.uvprojx │ ├── JLinkLog.txt │ ├── JLinkSettings.ini │ ├── Listings │ ├── F103Cx_FreeRTOS_emptyPrj.map │ └── startup_stm32f10x_md.lst │ └── Objects │ ├── ExtDll.iex │ ├── F103Cx_FreeRTOS_emptyPrj.axf │ ├── F103Cx_FreeRTOS_emptyPrj.build_log.htm │ ├── F103Cx_FreeRTOS_emptyPrj.htm │ ├── F103Cx_FreeRTOS_emptyPrj.lnp │ ├── F103Cx_FreeRTOS_emptyPrj.sct │ ├── F103Cx_FreeRTOS_emptyPrj_F103Cx_FreeRTOS_emptyPrj.dep │ └── F103Cx_FreeRTOS_emptyPrj_sct.Bak ├── stdLib ├── inc │ ├── misc.h │ ├── stm32f10x_adc.h │ ├── stm32f10x_bkp.h │ ├── stm32f10x_can.h │ ├── stm32f10x_cec.h │ ├── stm32f10x_crc.h │ ├── stm32f10x_dac.h │ ├── stm32f10x_dbgmcu.h │ ├── stm32f10x_dma.h │ ├── stm32f10x_exti.h │ ├── stm32f10x_flash.h │ ├── stm32f10x_fsmc.h │ ├── stm32f10x_gpio.h │ ├── stm32f10x_i2c.h │ ├── stm32f10x_iwdg.h │ ├── stm32f10x_pwr.h │ ├── stm32f10x_rcc.h │ ├── stm32f10x_rtc.h │ ├── stm32f10x_sdio.h │ ├── stm32f10x_spi.h │ ├── stm32f10x_tim.h │ ├── stm32f10x_usart.h │ └── stm32f10x_wwdg.h └── src │ ├── misc.c │ ├── stm32f10x_adc.c │ ├── stm32f10x_bkp.c │ ├── stm32f10x_can.c │ ├── stm32f10x_cec.c │ ├── stm32f10x_crc.c │ ├── stm32f10x_dac.c │ ├── stm32f10x_dbgmcu.c │ ├── stm32f10x_dma.c │ ├── stm32f10x_exti.c │ ├── stm32f10x_flash.c │ ├── stm32f10x_fsmc.c │ ├── stm32f10x_gpio.c │ ├── stm32f10x_i2c.c │ ├── stm32f10x_iwdg.c │ ├── stm32f10x_pwr.c │ ├── stm32f10x_rcc.c │ ├── stm32f10x_rtc.c │ ├── stm32f10x_sdio.c │ ├── stm32f10x_spi.c │ ├── stm32f10x_tim.c │ ├── stm32f10x_usart.c │ └── stm32f10x_wwdg.c ├── system ├── delay │ ├── delay.c │ └── delay.h ├── structure │ ├── structure.c │ └── structure.h ├── sys │ ├── sys.c │ └── sys.h └── usart │ ├── usart.c │ └── usart.h └── user ├── main.c ├── stm32f10x_conf.h ├── stm32f10x_it.c └── stm32f10x_it.h /APP/net_time/net_time.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/APP/net_time/net_time.c -------------------------------------------------------------------------------- /APP/net_time/net_time.h: -------------------------------------------------------------------------------- 1 | #ifndef __NET_TIME_H 2 | #define __NET_TIME_H 3 | 4 | #include "stm32f10x.h" 5 | #include "structure.h" 6 | #include "stdlib.h" 7 | #include "string.h" 8 | 9 | void GMT_ToBeijingTime(char *strP, struct xTime *Time); 10 | void TimePlusOneSecond(struct xTime *Time); 11 | 12 | #endif 13 | -------------------------------------------------------------------------------- /APP/oled_ui/oled_ui.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/APP/oled_ui/oled_ui.c -------------------------------------------------------------------------------- /APP/oled_ui/oled_ui.h: -------------------------------------------------------------------------------- 1 | #ifndef __OLED_UI_H 2 | #define __OLED_UI_H 3 | 4 | #include "stm32f10x.h" 5 | #include "oled.h" 6 | 7 | 8 | void ui_ShowBootImg(void); 9 | void ui_ClockReload(uint8_t x, uint8_t y, uint8_t (*ram)[128]); 10 | void ui_WeatherReload(uint8_t (*ram)[128]); 11 | 12 | void ui_Show1608Time(uint8_t x, uint8_t y, uint8_t (*ram)[128], struct xTime *Time); 13 | void ui_ShowTime(uint8_t x, uint8_t y, uint8_t (*ram)[128], struct xTime* Time); 14 | 15 | void ui_ShowLed(uint8_t xnum, uint8_t status); 16 | 17 | void ui_ShowAllWeather(struct xWeather* weather); 18 | 19 | #endif 20 | -------------------------------------------------------------------------------- /APP/oled_ui/oled_ui_font.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/APP/oled_ui/oled_ui_font.h -------------------------------------------------------------------------------- /APP/onenet_http/onenet_http.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/APP/onenet_http/onenet_http.c -------------------------------------------------------------------------------- /APP/onenet_http/onenet_http.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/APP/onenet_http/onenet_http.h -------------------------------------------------------------------------------- /APP/seniverse_http/seniverse_http.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/APP/seniverse_http/seniverse_http.c -------------------------------------------------------------------------------- /APP/seniverse_http/seniverse_http.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/APP/seniverse_http/seniverse_http.h -------------------------------------------------------------------------------- /CMSIS/stm32f10x.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/CMSIS/stm32f10x.h -------------------------------------------------------------------------------- /CMSIS/system_stm32f10x.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f10x.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /** @addtogroup CMSIS 23 | * @{ 24 | */ 25 | 26 | /** @addtogroup stm32f10x_system 27 | * @{ 28 | */ 29 | 30 | /** 31 | * @brief Define to prevent recursive inclusion 32 | */ 33 | #ifndef __SYSTEM_STM32F10X_H 34 | #define __SYSTEM_STM32F10X_H 35 | 36 | #ifdef __cplusplus 37 | extern "C" { 38 | #endif 39 | 40 | /** @addtogroup STM32F10x_System_Includes 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @} 46 | */ 47 | 48 | 49 | /** @addtogroup STM32F10x_System_Exported_types 50 | * @{ 51 | */ 52 | 53 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /** @addtogroup STM32F10x_System_Exported_Constants 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @addtogroup STM32F10x_System_Exported_Macros 68 | * @{ 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** @addtogroup STM32F10x_System_Exported_Functions 76 | * @{ 77 | */ 78 | 79 | extern void SystemInit(void); 80 | extern void SystemCoreClockUpdate(void); 81 | /** 82 | * @} 83 | */ 84 | 85 | #ifdef __cplusplus 86 | } 87 | #endif 88 | 89 | #endif /*__SYSTEM_STM32F10X_H */ 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 99 | -------------------------------------------------------------------------------- /F103-IOT-IC.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/F103-IOT-IC.pdf -------------------------------------------------------------------------------- /F103物联工控板-AD-PCB工程.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/F103物联工控板-AD-PCB工程.zip -------------------------------------------------------------------------------- /FreeRTOS/include/FreeRTOSConfig.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/FreeRTOS/include/FreeRTOSConfig.h -------------------------------------------------------------------------------- /FreeRTOS/include/StackMacros.h: -------------------------------------------------------------------------------- 1 | /* 2 | FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. 3 | All rights reserved 4 | 5 | VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. 6 | 7 | This file is part of the FreeRTOS distribution. 8 | 9 | FreeRTOS is free software; you can redistribute it and/or modify it under 10 | the terms of the GNU General Public License (version 2) as published by the 11 | Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. 12 | 13 | *************************************************************************** 14 | >>! NOTE: The modification to the GPL is included to allow you to !<< 15 | >>! distribute a combined work that includes FreeRTOS without being !<< 16 | >>! obliged to provide the source code for proprietary components !<< 17 | >>! outside of the FreeRTOS kernel. !<< 18 | *************************************************************************** 19 | 20 | FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY 21 | WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS 22 | FOR A PARTICULAR PURPOSE. Full license text is available on the following 23 | link: http://www.freertos.org/a00114.html 24 | 25 | *************************************************************************** 26 | * * 27 | * FreeRTOS provides completely free yet professionally developed, * 28 | * robust, strictly quality controlled, supported, and cross * 29 | * platform software that is more than just the market leader, it * 30 | * is the industry's de facto standard. * 31 | * * 32 | * Help yourself get started quickly while simultaneously helping * 33 | * to support the FreeRTOS project by purchasing a FreeRTOS * 34 | * tutorial book, reference manual, or both: * 35 | * http://www.FreeRTOS.org/Documentation * 36 | * * 37 | *************************************************************************** 38 | 39 | http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading 40 | the FAQ page "My application does not run, what could be wrong?". Have you 41 | defined configASSERT()? 42 | 43 | http://www.FreeRTOS.org/support - In return for receiving this top quality 44 | embedded software for free we request you assist our global community by 45 | participating in the support forum. 46 | 47 | http://www.FreeRTOS.org/training - Investing in training allows your team to 48 | be as productive as possible as early as possible. Now you can receive 49 | FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers 50 | Ltd, and the world's leading authority on the world's leading RTOS. 51 | 52 | http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, 53 | including FreeRTOS+Trace - an indispensable productivity tool, a DOS 54 | compatible FAT file system, and our tiny thread aware UDP/IP stack. 55 | 56 | http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. 57 | Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. 58 | 59 | http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High 60 | Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS 61 | licenses offer ticketed support, indemnification and commercial middleware. 62 | 63 | http://www.SafeRTOS.com - High Integrity Systems also provide a safety 64 | engineered and independently SIL3 certified version for use in safety and 65 | mission critical applications that require provable dependability. 66 | 67 | 1 tab == 4 spaces! 68 | */ 69 | 70 | #ifndef STACK_MACROS_H 71 | #define STACK_MACROS_H 72 | 73 | /* 74 | * Call the stack overflow hook function if the stack of the task being swapped 75 | * out is currently overflowed, or looks like it might have overflowed in the 76 | * past. 77 | * 78 | * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check 79 | * the current stack state only - comparing the current top of stack value to 80 | * the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1 81 | * will also cause the last few stack bytes to be checked to ensure the value 82 | * to which the bytes were set when the task was created have not been 83 | * overwritten. Note this second test does not guarantee that an overflowed 84 | * stack will always be recognised. 85 | */ 86 | 87 | /*-----------------------------------------------------------*/ 88 | 89 | #if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) ) 90 | 91 | /* Only the current stack state is to be checked. */ 92 | #define taskCHECK_FOR_STACK_OVERFLOW() \ 93 | { \ 94 | /* Is the currently saved stack pointer within the stack limit? */ \ 95 | if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \ 96 | { \ 97 | vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ 98 | } \ 99 | } 100 | 101 | #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ 102 | /*-----------------------------------------------------------*/ 103 | 104 | #if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) ) 105 | 106 | /* Only the current stack state is to be checked. */ 107 | #define taskCHECK_FOR_STACK_OVERFLOW() \ 108 | { \ 109 | \ 110 | /* Is the currently saved stack pointer within the stack limit? */ \ 111 | if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \ 112 | { \ 113 | vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ 114 | } \ 115 | } 116 | 117 | #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ 118 | /*-----------------------------------------------------------*/ 119 | 120 | #if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) ) 121 | 122 | #define taskCHECK_FOR_STACK_OVERFLOW() \ 123 | { \ 124 | const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ 125 | const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \ 126 | \ 127 | if( ( pulStack[ 0 ] != ulCheckValue ) || \ 128 | ( pulStack[ 1 ] != ulCheckValue ) || \ 129 | ( pulStack[ 2 ] != ulCheckValue ) || \ 130 | ( pulStack[ 3 ] != ulCheckValue ) ) \ 131 | { \ 132 | vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ 133 | } \ 134 | } 135 | 136 | #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ 137 | /*-----------------------------------------------------------*/ 138 | 139 | #if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) ) 140 | 141 | #define taskCHECK_FOR_STACK_OVERFLOW() \ 142 | { \ 143 | int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ 144 | static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ 145 | tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ 146 | tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ 147 | tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ 148 | tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \ 149 | \ 150 | \ 151 | pcEndOfStack -= sizeof( ucExpectedStackBytes ); \ 152 | \ 153 | /* Has the extremity of the task stack ever been written over? */ \ 154 | if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \ 155 | { \ 156 | vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ 157 | } \ 158 | } 159 | 160 | #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ 161 | /*-----------------------------------------------------------*/ 162 | 163 | /* Remove stack overflow macro if not being used. */ 164 | #ifndef taskCHECK_FOR_STACK_OVERFLOW 165 | #define taskCHECK_FOR_STACK_OVERFLOW() 166 | #endif 167 | 168 | 169 | 170 | #endif /* STACK_MACROS_H */ 171 | 172 | -------------------------------------------------------------------------------- /FreeRTOS/include/projdefs.h: -------------------------------------------------------------------------------- 1 | /* 2 | FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. 3 | All rights reserved 4 | 5 | VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. 6 | 7 | This file is part of the FreeRTOS distribution. 8 | 9 | FreeRTOS is free software; you can redistribute it and/or modify it under 10 | the terms of the GNU General Public License (version 2) as published by the 11 | Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. 12 | 13 | *************************************************************************** 14 | >>! NOTE: The modification to the GPL is included to allow you to !<< 15 | >>! distribute a combined work that includes FreeRTOS without being !<< 16 | >>! obliged to provide the source code for proprietary components !<< 17 | >>! outside of the FreeRTOS kernel. !<< 18 | *************************************************************************** 19 | 20 | FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY 21 | WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS 22 | FOR A PARTICULAR PURPOSE. Full license text is available on the following 23 | link: http://www.freertos.org/a00114.html 24 | 25 | *************************************************************************** 26 | * * 27 | * FreeRTOS provides completely free yet professionally developed, * 28 | * robust, strictly quality controlled, supported, and cross * 29 | * platform software that is more than just the market leader, it * 30 | * is the industry's de facto standard. * 31 | * * 32 | * Help yourself get started quickly while simultaneously helping * 33 | * to support the FreeRTOS project by purchasing a FreeRTOS * 34 | * tutorial book, reference manual, or both: * 35 | * http://www.FreeRTOS.org/Documentation * 36 | * * 37 | *************************************************************************** 38 | 39 | http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading 40 | the FAQ page "My application does not run, what could be wrong?". Have you 41 | defined configASSERT()? 42 | 43 | http://www.FreeRTOS.org/support - In return for receiving this top quality 44 | embedded software for free we request you assist our global community by 45 | participating in the support forum. 46 | 47 | http://www.FreeRTOS.org/training - Investing in training allows your team to 48 | be as productive as possible as early as possible. Now you can receive 49 | FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers 50 | Ltd, and the world's leading authority on the world's leading RTOS. 51 | 52 | http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, 53 | including FreeRTOS+Trace - an indispensable productivity tool, a DOS 54 | compatible FAT file system, and our tiny thread aware UDP/IP stack. 55 | 56 | http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. 57 | Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. 58 | 59 | http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High 60 | Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS 61 | licenses offer ticketed support, indemnification and commercial middleware. 62 | 63 | http://www.SafeRTOS.com - High Integrity Systems also provide a safety 64 | engineered and independently SIL3 certified version for use in safety and 65 | mission critical applications that require provable dependability. 66 | 67 | 1 tab == 4 spaces! 68 | */ 69 | 70 | #ifndef PROJDEFS_H 71 | #define PROJDEFS_H 72 | 73 | /* 74 | * Defines the prototype to which task functions must conform. Defined in this 75 | * file to ensure the type is known before portable.h is included. 76 | */ 77 | typedef void (*TaskFunction_t)( void * ); 78 | 79 | /* Converts a time in milliseconds to a time in ticks. This macro can be 80 | overridden by a macro of the same name defined in FreeRTOSConfig.h in case the 81 | definition here is not suitable for your application. */ 82 | #ifndef pdMS_TO_TICKS 83 | #define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) ) 84 | #endif 85 | 86 | #define pdFALSE ( ( BaseType_t ) 0 ) 87 | #define pdTRUE ( ( BaseType_t ) 1 ) 88 | 89 | #define pdPASS ( pdTRUE ) 90 | #define pdFAIL ( pdFALSE ) 91 | #define errQUEUE_EMPTY ( ( BaseType_t ) 0 ) 92 | #define errQUEUE_FULL ( ( BaseType_t ) 0 ) 93 | 94 | /* FreeRTOS error definitions. */ 95 | #define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) 96 | #define errQUEUE_BLOCKED ( -4 ) 97 | #define errQUEUE_YIELD ( -5 ) 98 | 99 | /* Macros used for basic data corruption checks. */ 100 | #ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 101 | #define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0 102 | #endif 103 | 104 | #if( configUSE_16_BIT_TICKS == 1 ) 105 | #define pdINTEGRITY_CHECK_VALUE 0x5a5a 106 | #else 107 | #define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL 108 | #endif 109 | 110 | /* The following errno values are used by FreeRTOS+ components, not FreeRTOS 111 | itself. */ 112 | #define pdFREERTOS_ERRNO_NONE 0 /* No errors */ 113 | #define pdFREERTOS_ERRNO_ENOENT 2 /* No such file or directory */ 114 | #define pdFREERTOS_ERRNO_EINTR 4 /* Interrupted system call */ 115 | #define pdFREERTOS_ERRNO_EIO 5 /* I/O error */ 116 | #define pdFREERTOS_ERRNO_ENXIO 6 /* No such device or address */ 117 | #define pdFREERTOS_ERRNO_EBADF 9 /* Bad file number */ 118 | #define pdFREERTOS_ERRNO_EAGAIN 11 /* No more processes */ 119 | #define pdFREERTOS_ERRNO_EWOULDBLOCK 11 /* Operation would block */ 120 | #define pdFREERTOS_ERRNO_ENOMEM 12 /* Not enough memory */ 121 | #define pdFREERTOS_ERRNO_EACCES 13 /* Permission denied */ 122 | #define pdFREERTOS_ERRNO_EFAULT 14 /* Bad address */ 123 | #define pdFREERTOS_ERRNO_EBUSY 16 /* Mount device busy */ 124 | #define pdFREERTOS_ERRNO_EEXIST 17 /* File exists */ 125 | #define pdFREERTOS_ERRNO_EXDEV 18 /* Cross-device link */ 126 | #define pdFREERTOS_ERRNO_ENODEV 19 /* No such device */ 127 | #define pdFREERTOS_ERRNO_ENOTDIR 20 /* Not a directory */ 128 | #define pdFREERTOS_ERRNO_EISDIR 21 /* Is a directory */ 129 | #define pdFREERTOS_ERRNO_EINVAL 22 /* Invalid argument */ 130 | #define pdFREERTOS_ERRNO_ENOSPC 28 /* No space left on device */ 131 | #define pdFREERTOS_ERRNO_ESPIPE 29 /* Illegal seek */ 132 | #define pdFREERTOS_ERRNO_EROFS 30 /* Read only file system */ 133 | #define pdFREERTOS_ERRNO_EUNATCH 42 /* Protocol driver not attached */ 134 | #define pdFREERTOS_ERRNO_EBADE 50 /* Invalid exchange */ 135 | #define pdFREERTOS_ERRNO_EFTYPE 79 /* Inappropriate file type or format */ 136 | #define pdFREERTOS_ERRNO_ENMFILE 89 /* No more files */ 137 | #define pdFREERTOS_ERRNO_ENOTEMPTY 90 /* Directory not empty */ 138 | #define pdFREERTOS_ERRNO_ENAMETOOLONG 91 /* File or path name too long */ 139 | #define pdFREERTOS_ERRNO_EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ 140 | #define pdFREERTOS_ERRNO_ENOBUFS 105 /* No buffer space available */ 141 | #define pdFREERTOS_ERRNO_ENOPROTOOPT 109 /* Protocol not available */ 142 | #define pdFREERTOS_ERRNO_EADDRINUSE 112 /* Address already in use */ 143 | #define pdFREERTOS_ERRNO_ETIMEDOUT 116 /* Connection timed out */ 144 | #define pdFREERTOS_ERRNO_EINPROGRESS 119 /* Connection already in progress */ 145 | #define pdFREERTOS_ERRNO_EALREADY 120 /* Socket already connected */ 146 | #define pdFREERTOS_ERRNO_EADDRNOTAVAIL 125 /* Address not available */ 147 | #define pdFREERTOS_ERRNO_EISCONN 127 /* Socket is already connected */ 148 | #define pdFREERTOS_ERRNO_ENOTCONN 128 /* Socket is not connected */ 149 | #define pdFREERTOS_ERRNO_ENOMEDIUM 135 /* No medium inserted */ 150 | #define pdFREERTOS_ERRNO_EILSEQ 138 /* An invalid UTF-16 sequence was encountered. */ 151 | #define pdFREERTOS_ERRNO_ECANCELED 140 /* Operation canceled. */ 152 | 153 | /* The following endian values are used by FreeRTOS+ components, not FreeRTOS 154 | itself. */ 155 | #define pdFREERTOS_LITTLE_ENDIAN 0 156 | #define pdFREERTOS_BIG_ENDIAN 1 157 | 158 | #endif /* PROJDEFS_H */ 159 | 160 | 161 | 162 | -------------------------------------------------------------------------------- /FreeRTOS/include/stdint.readme: -------------------------------------------------------------------------------- 1 | 2 | #ifndef FREERTOS_STDINT 3 | #define FREERTOS_STDINT 4 | 5 | /******************************************************************************* 6 | * THIS IS NOT A FULL stdint.h IMPLEMENTATION - It only contains the definitions 7 | * necessary to build the FreeRTOS code. It is provided to allow FreeRTOS to be 8 | * built using compilers that do not provide their own stdint.h definition. 9 | * 10 | * To use this file: 11 | * 12 | * 1) Copy this file into the directory that contains your FreeRTOSConfig.h 13 | * header file, as that directory will already be in the compilers include 14 | * path. 15 | * 16 | * 2) Rename the copied file stdint.h. 17 | * 18 | */ 19 | 20 | typedef signed char int8_t; 21 | typedef unsigned char uint8_t; 22 | typedef short int16_t; 23 | typedef unsigned short uint16_t; 24 | typedef long int32_t; 25 | typedef unsigned long uint32_t; 26 | 27 | #endif /* FREERTOS_STDINT */ 28 | -------------------------------------------------------------------------------- /FreeRTOS/portable/Keil/See-also-the-RVDS-directory.txt: -------------------------------------------------------------------------------- 1 | Nothing to see here. -------------------------------------------------------------------------------- /FreeRTOS/portable/MemMang/ReadMe.url: -------------------------------------------------------------------------------- 1 | [{000214A0-0000-0000-C000-000000000046}] 2 | Prop3=19,2 3 | [InternetShortcut] 4 | URL=http://www.freertos.org/a00111.html 5 | IDList= 6 | -------------------------------------------------------------------------------- /FreeRTOS/portable/MemMang/heap_1.c: -------------------------------------------------------------------------------- 1 | /* 2 | FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. 3 | All rights reserved 4 | 5 | VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. 6 | 7 | This file is part of the FreeRTOS distribution. 8 | 9 | FreeRTOS is free software; you can redistribute it and/or modify it under 10 | the terms of the GNU General Public License (version 2) as published by the 11 | Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. 12 | 13 | *************************************************************************** 14 | >>! NOTE: The modification to the GPL is included to allow you to !<< 15 | >>! distribute a combined work that includes FreeRTOS without being !<< 16 | >>! obliged to provide the source code for proprietary components !<< 17 | >>! outside of the FreeRTOS kernel. !<< 18 | *************************************************************************** 19 | 20 | FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY 21 | WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS 22 | FOR A PARTICULAR PURPOSE. Full license text is available on the following 23 | link: http://www.freertos.org/a00114.html 24 | 25 | *************************************************************************** 26 | * * 27 | * FreeRTOS provides completely free yet professionally developed, * 28 | * robust, strictly quality controlled, supported, and cross * 29 | * platform software that is more than just the market leader, it * 30 | * is the industry's de facto standard. * 31 | * * 32 | * Help yourself get started quickly while simultaneously helping * 33 | * to support the FreeRTOS project by purchasing a FreeRTOS * 34 | * tutorial book, reference manual, or both: * 35 | * http://www.FreeRTOS.org/Documentation * 36 | * * 37 | *************************************************************************** 38 | 39 | http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading 40 | the FAQ page "My application does not run, what could be wrong?". Have you 41 | defined configASSERT()? 42 | 43 | http://www.FreeRTOS.org/support - In return for receiving this top quality 44 | embedded software for free we request you assist our global community by 45 | participating in the support forum. 46 | 47 | http://www.FreeRTOS.org/training - Investing in training allows your team to 48 | be as productive as possible as early as possible. Now you can receive 49 | FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers 50 | Ltd, and the world's leading authority on the world's leading RTOS. 51 | 52 | http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, 53 | including FreeRTOS+Trace - an indispensable productivity tool, a DOS 54 | compatible FAT file system, and our tiny thread aware UDP/IP stack. 55 | 56 | http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. 57 | Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. 58 | 59 | http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High 60 | Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS 61 | licenses offer ticketed support, indemnification and commercial middleware. 62 | 63 | http://www.SafeRTOS.com - High Integrity Systems also provide a safety 64 | engineered and independently SIL3 certified version for use in safety and 65 | mission critical applications that require provable dependability. 66 | 67 | 1 tab == 4 spaces! 68 | */ 69 | 70 | 71 | /* 72 | * The simplest possible implementation of pvPortMalloc(). Note that this 73 | * implementation does NOT allow allocated memory to be freed again. 74 | * 75 | * See heap_2.c, heap_3.c and heap_4.c for alternative implementations, and the 76 | * memory management pages of http://www.FreeRTOS.org for more information. 77 | */ 78 | #include 79 | 80 | /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining 81 | all the API functions to use the MPU wrappers. That should only be done when 82 | task.h is included from an application file. */ 83 | #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE 84 | 85 | #include "FreeRTOS.h" 86 | #include "task.h" 87 | 88 | #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE 89 | 90 | #if( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) 91 | #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0 92 | #endif 93 | 94 | /* A few bytes might be lost to byte aligning the heap start address. */ 95 | #define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT ) 96 | 97 | /* Allocate the memory for the heap. */ 98 | /* Allocate the memory for the heap. */ 99 | #if( configAPPLICATION_ALLOCATED_HEAP == 1 ) 100 | /* The application writer has already defined the array used for the RTOS 101 | heap - probably so it can be placed in a special segment or address. */ 102 | extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; 103 | #else 104 | static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; 105 | #endif /* configAPPLICATION_ALLOCATED_HEAP */ 106 | 107 | static size_t xNextFreeByte = ( size_t ) 0; 108 | 109 | /*-----------------------------------------------------------*/ 110 | 111 | void *pvPortMalloc( size_t xWantedSize ) 112 | { 113 | void *pvReturn = NULL; 114 | static uint8_t *pucAlignedHeap = NULL; 115 | 116 | /* Ensure that blocks are always aligned to the required number of bytes. */ 117 | #if( portBYTE_ALIGNMENT != 1 ) 118 | { 119 | if( xWantedSize & portBYTE_ALIGNMENT_MASK ) 120 | { 121 | /* Byte alignment required. */ 122 | xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ); 123 | } 124 | } 125 | #endif 126 | 127 | vTaskSuspendAll(); 128 | { 129 | if( pucAlignedHeap == NULL ) 130 | { 131 | /* Ensure the heap starts on a correctly aligned boundary. */ 132 | pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); 133 | } 134 | 135 | /* Check there is enough room left for the allocation. */ 136 | if( ( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) && 137 | ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) )/* Check for overflow. */ 138 | { 139 | /* Return the next free byte then increment the index past this 140 | block. */ 141 | pvReturn = pucAlignedHeap + xNextFreeByte; 142 | xNextFreeByte += xWantedSize; 143 | } 144 | 145 | traceMALLOC( pvReturn, xWantedSize ); 146 | } 147 | ( void ) xTaskResumeAll(); 148 | 149 | #if( configUSE_MALLOC_FAILED_HOOK == 1 ) 150 | { 151 | if( pvReturn == NULL ) 152 | { 153 | extern void vApplicationMallocFailedHook( void ); 154 | vApplicationMallocFailedHook(); 155 | } 156 | } 157 | #endif 158 | 159 | return pvReturn; 160 | } 161 | /*-----------------------------------------------------------*/ 162 | 163 | void vPortFree( void *pv ) 164 | { 165 | /* Memory cannot be freed using this scheme. See heap_2.c, heap_3.c and 166 | heap_4.c for alternative implementations, and the memory management pages of 167 | http://www.FreeRTOS.org for more information. */ 168 | ( void ) pv; 169 | 170 | /* Force an assert as it is invalid to call this function. */ 171 | configASSERT( pv == NULL ); 172 | } 173 | /*-----------------------------------------------------------*/ 174 | 175 | void vPortInitialiseBlocks( void ) 176 | { 177 | /* Only required when static memory is not cleared. */ 178 | xNextFreeByte = ( size_t ) 0; 179 | } 180 | /*-----------------------------------------------------------*/ 181 | 182 | size_t xPortGetFreeHeapSize( void ) 183 | { 184 | return ( configADJUSTED_HEAP_SIZE - xNextFreeByte ); 185 | } 186 | 187 | 188 | 189 | -------------------------------------------------------------------------------- /FreeRTOS/portable/MemMang/heap_3.c: -------------------------------------------------------------------------------- 1 | /* 2 | FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. 3 | All rights reserved 4 | 5 | VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. 6 | 7 | This file is part of the FreeRTOS distribution. 8 | 9 | FreeRTOS is free software; you can redistribute it and/or modify it under 10 | the terms of the GNU General Public License (version 2) as published by the 11 | Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. 12 | 13 | *************************************************************************** 14 | >>! NOTE: The modification to the GPL is included to allow you to !<< 15 | >>! distribute a combined work that includes FreeRTOS without being !<< 16 | >>! obliged to provide the source code for proprietary components !<< 17 | >>! outside of the FreeRTOS kernel. !<< 18 | *************************************************************************** 19 | 20 | FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY 21 | WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS 22 | FOR A PARTICULAR PURPOSE. Full license text is available on the following 23 | link: http://www.freertos.org/a00114.html 24 | 25 | *************************************************************************** 26 | * * 27 | * FreeRTOS provides completely free yet professionally developed, * 28 | * robust, strictly quality controlled, supported, and cross * 29 | * platform software that is more than just the market leader, it * 30 | * is the industry's de facto standard. * 31 | * * 32 | * Help yourself get started quickly while simultaneously helping * 33 | * to support the FreeRTOS project by purchasing a FreeRTOS * 34 | * tutorial book, reference manual, or both: * 35 | * http://www.FreeRTOS.org/Documentation * 36 | * * 37 | *************************************************************************** 38 | 39 | http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading 40 | the FAQ page "My application does not run, what could be wrong?". Have you 41 | defined configASSERT()? 42 | 43 | http://www.FreeRTOS.org/support - In return for receiving this top quality 44 | embedded software for free we request you assist our global community by 45 | participating in the support forum. 46 | 47 | http://www.FreeRTOS.org/training - Investing in training allows your team to 48 | be as productive as possible as early as possible. Now you can receive 49 | FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers 50 | Ltd, and the world's leading authority on the world's leading RTOS. 51 | 52 | http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, 53 | including FreeRTOS+Trace - an indispensable productivity tool, a DOS 54 | compatible FAT file system, and our tiny thread aware UDP/IP stack. 55 | 56 | http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. 57 | Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. 58 | 59 | http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High 60 | Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS 61 | licenses offer ticketed support, indemnification and commercial middleware. 62 | 63 | http://www.SafeRTOS.com - High Integrity Systems also provide a safety 64 | engineered and independently SIL3 certified version for use in safety and 65 | mission critical applications that require provable dependability. 66 | 67 | 1 tab == 4 spaces! 68 | */ 69 | 70 | 71 | /* 72 | * Implementation of pvPortMalloc() and vPortFree() that relies on the 73 | * compilers own malloc() and free() implementations. 74 | * 75 | * This file can only be used if the linker is configured to to generate 76 | * a heap memory area. 77 | * 78 | * See heap_1.c, heap_2.c and heap_4.c for alternative implementations, and the 79 | * memory management pages of http://www.FreeRTOS.org for more information. 80 | */ 81 | 82 | #include 83 | 84 | /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining 85 | all the API functions to use the MPU wrappers. That should only be done when 86 | task.h is included from an application file. */ 87 | #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE 88 | 89 | #include "FreeRTOS.h" 90 | #include "task.h" 91 | 92 | #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE 93 | 94 | #if( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) 95 | #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0 96 | #endif 97 | 98 | /*-----------------------------------------------------------*/ 99 | 100 | void *pvPortMalloc( size_t xWantedSize ) 101 | { 102 | void *pvReturn; 103 | 104 | vTaskSuspendAll(); 105 | { 106 | pvReturn = malloc( xWantedSize ); 107 | traceMALLOC( pvReturn, xWantedSize ); 108 | } 109 | ( void ) xTaskResumeAll(); 110 | 111 | #if( configUSE_MALLOC_FAILED_HOOK == 1 ) 112 | { 113 | if( pvReturn == NULL ) 114 | { 115 | extern void vApplicationMallocFailedHook( void ); 116 | vApplicationMallocFailedHook(); 117 | } 118 | } 119 | #endif 120 | 121 | return pvReturn; 122 | } 123 | /*-----------------------------------------------------------*/ 124 | 125 | void vPortFree( void *pv ) 126 | { 127 | if( pv ) 128 | { 129 | vTaskSuspendAll(); 130 | { 131 | free( pv ); 132 | traceFREE( pv, 0 ); 133 | } 134 | ( void ) xTaskResumeAll(); 135 | } 136 | } 137 | 138 | 139 | 140 | -------------------------------------------------------------------------------- /FreeRTOS/portable/RVDS/ARM7_LPC21xx/portASM.s: -------------------------------------------------------------------------------- 1 | ;/* 2 | ; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. 3 | ; All rights reserved 4 | ; 5 | ; 6 | ; *************************************************************************** 7 | ; * * 8 | ; * FreeRTOS tutorial books are available in pdf and paperback. * 9 | ; * Complete, revised, and edited pdf reference manuals are also * 10 | ; * available. * 11 | ; * * 12 | ; * Purchasing FreeRTOS documentation will not only help you, by * 13 | ; * ensuring you get running as quickly as possible and with an * 14 | ; * in-depth knowledge of how to use FreeRTOS, it will also help * 15 | ; * the FreeRTOS project to continue with its mission of providing * 16 | ; * professional grade, cross platform, de facto standard solutions * 17 | ; * for microcontrollers - completely free of charge! * 18 | ; * * 19 | ; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * 20 | ; * * 21 | ; * Thank you for using FreeRTOS, and thank you for your support! * 22 | ; * * 23 | ; *************************************************************************** 24 | ; 25 | ; 26 | ; This file is part of the FreeRTOS distribution. 27 | ; 28 | ; FreeRTOS is free software; you can redistribute it and/or modify it under 29 | ; the terms of the GNU General Public License (version 2) as published by the 30 | ; Free Software Foundation AND MODIFIED BY the FreeRTOS exception. 31 | ; >>>NOTE<<< The modification to the GPL is included to allow you to 32 | ; distribute a combined work that includes FreeRTOS without being obliged to 33 | ; provide the source code for proprietary components outside of the FreeRTOS 34 | ; kernel. FreeRTOS is distributed in the hope that it will be useful, but 35 | ; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 36 | ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 37 | ; more details. You should have received a copy of the GNU General Public 38 | ; License and the FreeRTOS license exception along with FreeRTOS; if not it 39 | ; can be viewed here: http://www.freertos.org/a00114.html and also obtained 40 | ; by writing to Richard Barry, contact details for whom are available on the 41 | ; FreeRTOS WEB site. 42 | ; 43 | ; 1 tab == 4 spaces! 44 | ; 45 | ; http://www.FreeRTOS.org - Documentation, latest information, license and 46 | ; contact details. 47 | ; 48 | ; http://www.SafeRTOS.com - A version that is certified for use in safety 49 | ; critical systems. 50 | ; 51 | ; http://www.OpenRTOS.com - Commercial support, development, porting, 52 | ; licensing and training services. 53 | ;*/ 54 | 55 | INCLUDE portmacro.inc 56 | 57 | IMPORT vTaskSwitchContext 58 | IMPORT xTaskIncrementTick 59 | 60 | EXPORT vPortYieldProcessor 61 | EXPORT vPortStartFirstTask 62 | EXPORT vPreemptiveTick 63 | EXPORT vPortYield 64 | 65 | 66 | VICVECTADDR EQU 0xFFFFF030 67 | T0IR EQU 0xE0004000 68 | T0MATCHBIT EQU 0x00000001 69 | 70 | ARM 71 | AREA PORT_ASM, CODE, READONLY 72 | 73 | 74 | 75 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 76 | ; Starting the first task is done by just restoring the context 77 | ; setup by pxPortInitialiseStack 78 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 79 | vPortStartFirstTask 80 | 81 | PRESERVE8 82 | 83 | portRESTORE_CONTEXT 84 | 85 | vPortYield 86 | 87 | PRESERVE8 88 | 89 | SVC 0 90 | bx lr 91 | 92 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 93 | ; Interrupt service routine for the SWI interrupt. The vector table is 94 | ; configured in the startup.s file. 95 | ; 96 | ; vPortYieldProcessor() is used to manually force a context switch. The 97 | ; SWI interrupt is generated by a call to taskYIELD() or portYIELD(). 98 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 99 | 100 | vPortYieldProcessor 101 | 102 | PRESERVE8 103 | 104 | ; Within an IRQ ISR the link register has an offset from the true return 105 | ; address, but an SWI ISR does not. Add the offset manually so the same 106 | ; ISR return code can be used in both cases. 107 | ADD LR, LR, #4 108 | 109 | ; Perform the context switch. 110 | portSAVE_CONTEXT ; Save current task context 111 | LDR R0, =vTaskSwitchContext ; Get the address of the context switch function 112 | MOV LR, PC ; Store the return address 113 | BX R0 ; Call the contedxt switch function 114 | portRESTORE_CONTEXT ; restore the context of the selected task 115 | 116 | 117 | 118 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 119 | ; Interrupt service routine for preemptive scheduler tick timer 120 | ; Only used if portUSE_PREEMPTION is set to 1 in portmacro.h 121 | ; 122 | ; Uses timer 0 of LPC21XX Family 123 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 124 | 125 | vPreemptiveTick 126 | 127 | PRESERVE8 128 | 129 | portSAVE_CONTEXT ; Save the context of the current task. 130 | 131 | LDR R0, =xTaskIncrementTick ; Increment the tick count. 132 | MOV LR, PC ; This may make a delayed task ready 133 | BX R0 ; to run. 134 | 135 | CMP R0, #0 136 | BEQ SkipContextSwitch 137 | LDR R0, =vTaskSwitchContext ; Find the highest priority task that 138 | MOV LR, PC ; is ready to run. 139 | BX R0 140 | SkipContextSwitch 141 | MOV R0, #T0MATCHBIT ; Clear the timer event 142 | LDR R1, =T0IR 143 | STR R0, [R1] 144 | 145 | LDR R0, =VICVECTADDR ; Acknowledge the interrupt 146 | STR R0,[R0] 147 | 148 | portRESTORE_CONTEXT ; Restore the context of the highest 149 | ; priority task that is ready to run. 150 | END 151 | 152 | -------------------------------------------------------------------------------- /FreeRTOS/portable/RVDS/ARM7_LPC21xx/portmacro.h: -------------------------------------------------------------------------------- 1 | /* 2 | FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. 3 | All rights reserved 4 | 5 | VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. 6 | 7 | This file is part of the FreeRTOS distribution. 8 | 9 | FreeRTOS is free software; you can redistribute it and/or modify it under 10 | the terms of the GNU General Public License (version 2) as published by the 11 | Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. 12 | 13 | *************************************************************************** 14 | >>! NOTE: The modification to the GPL is included to allow you to !<< 15 | >>! distribute a combined work that includes FreeRTOS without being !<< 16 | >>! obliged to provide the source code for proprietary components !<< 17 | >>! outside of the FreeRTOS kernel. !<< 18 | *************************************************************************** 19 | 20 | FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY 21 | WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS 22 | FOR A PARTICULAR PURPOSE. Full license text is available on the following 23 | link: http://www.freertos.org/a00114.html 24 | 25 | *************************************************************************** 26 | * * 27 | * FreeRTOS provides completely free yet professionally developed, * 28 | * robust, strictly quality controlled, supported, and cross * 29 | * platform software that is more than just the market leader, it * 30 | * is the industry's de facto standard. * 31 | * * 32 | * Help yourself get started quickly while simultaneously helping * 33 | * to support the FreeRTOS project by purchasing a FreeRTOS * 34 | * tutorial book, reference manual, or both: * 35 | * http://www.FreeRTOS.org/Documentation * 36 | * * 37 | *************************************************************************** 38 | 39 | http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading 40 | the FAQ page "My application does not run, what could be wrong?". Have you 41 | defined configASSERT()? 42 | 43 | http://www.FreeRTOS.org/support - In return for receiving this top quality 44 | embedded software for free we request you assist our global community by 45 | participating in the support forum. 46 | 47 | http://www.FreeRTOS.org/training - Investing in training allows your team to 48 | be as productive as possible as early as possible. Now you can receive 49 | FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers 50 | Ltd, and the world's leading authority on the world's leading RTOS. 51 | 52 | http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, 53 | including FreeRTOS+Trace - an indispensable productivity tool, a DOS 54 | compatible FAT file system, and our tiny thread aware UDP/IP stack. 55 | 56 | http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. 57 | Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. 58 | 59 | http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High 60 | Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS 61 | licenses offer ticketed support, indemnification and commercial middleware. 62 | 63 | http://www.SafeRTOS.com - High Integrity Systems also provide a safety 64 | engineered and independently SIL3 certified version for use in safety and 65 | mission critical applications that require provable dependability. 66 | 67 | 1 tab == 4 spaces! 68 | */ 69 | 70 | 71 | #ifndef PORTMACRO_H 72 | #define PORTMACRO_H 73 | 74 | #ifdef __cplusplus 75 | extern "C" { 76 | #endif 77 | 78 | /*----------------------------------------------------------- 79 | * Port specific definitions. 80 | * 81 | * The settings in this file configure FreeRTOS correctly for the 82 | * given hardware and compiler. 83 | * 84 | * These settings should not be altered. 85 | *----------------------------------------------------------- 86 | */ 87 | 88 | /* Type definitions. */ 89 | #define portCHAR char 90 | #define portFLOAT float 91 | #define portDOUBLE double 92 | #define portLONG long 93 | #define portSHORT short 94 | #define portSTACK_TYPE uint32_t 95 | #define portBASE_TYPE long 96 | 97 | typedef portSTACK_TYPE StackType_t; 98 | typedef long BaseType_t; 99 | typedef unsigned long UBaseType_t; 100 | 101 | 102 | #if( configUSE_16_BIT_TICKS == 1 ) 103 | typedef uint16_t TickType_t; 104 | #define portMAX_DELAY ( TickType_t ) 0xffff 105 | #else 106 | typedef uint32_t TickType_t; 107 | #define portMAX_DELAY ( TickType_t ) 0xffffffffUL 108 | #endif 109 | /*-----------------------------------------------------------*/ 110 | 111 | /* Hardware specifics. */ 112 | #define portSTACK_GROWTH ( -1 ) 113 | #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) 114 | #define portBYTE_ALIGNMENT 8 115 | /*-----------------------------------------------------------*/ 116 | 117 | /* Task utilities. */ 118 | 119 | /*----------------------------------------------------------- 120 | * ISR entry and exit macros. These are only required if a task switch 121 | * is required from an ISR. 122 | *----------------------------------------------------------*/ 123 | 124 | /* If a switch is required then we just need to call */ 125 | /* vTaskSwitchContext() as the context has already been */ 126 | /* saved. */ 127 | 128 | #define portEXIT_SWITCHING_ISR(SwitchRequired) \ 129 | { \ 130 | extern void vTaskSwitchContext(void); \ 131 | \ 132 | if(SwitchRequired) \ 133 | { \ 134 | vTaskSwitchContext(); \ 135 | } \ 136 | } \ 137 | 138 | extern void vPortYield( void ); 139 | #define portYIELD() vPortYield() 140 | 141 | 142 | /* Critical section management. */ 143 | 144 | /* 145 | ****************************************************************** 146 | * We don't need to worry about whether we're in ARM or 147 | * THUMB mode with the Keil Real View compiler when enabling 148 | * or disabling interrupts as the compiler's intrinsic functions 149 | * take care of that for us. 150 | ******************************************************************* 151 | */ 152 | #define portDISABLE_INTERRUPTS() __disable_irq() 153 | #define portENABLE_INTERRUPTS() __enable_irq() 154 | 155 | 156 | /*----------------------------------------------------------- 157 | * Critical section control 158 | * 159 | * The code generated by the Keil compiler does not maintain separate 160 | * stack and frame pointers. The portENTER_CRITICAL macro cannot therefore 161 | * use the stack as per other ports. Instead a variable is used to keep 162 | * track of the critical section nesting. This necessitates the use of a 163 | * function in place of the macro. 164 | *----------------------------------------------------------*/ 165 | 166 | extern void vPortEnterCritical( void ); 167 | extern void vPortExitCritical( void ); 168 | 169 | #define portENTER_CRITICAL() vPortEnterCritical(); 170 | #define portEXIT_CRITICAL() vPortExitCritical(); 171 | /*-----------------------------------------------------------*/ 172 | 173 | /* Compiler specifics. */ 174 | #define inline 175 | #define register 176 | #define portNOP() __asm{ NOP } 177 | /*-----------------------------------------------------------*/ 178 | 179 | /* Task function macros as described on the FreeRTOS.org WEB site. */ 180 | #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) 181 | #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) 182 | 183 | #ifdef __cplusplus 184 | } 185 | #endif 186 | 187 | #endif /* PORTMACRO_H */ 188 | 189 | -------------------------------------------------------------------------------- /FreeRTOS/portable/RVDS/ARM7_LPC21xx/portmacro.inc: -------------------------------------------------------------------------------- 1 | ;/* 2 | ; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. 3 | ; All rights reserved 4 | ; 5 | ; 6 | ; *************************************************************************** 7 | ; * * 8 | ; * FreeRTOS tutorial books are available in pdf and paperback. * 9 | ; * Complete, revised, and edited pdf reference manuals are also * 10 | ; * available. * 11 | ; * * 12 | ; * Purchasing FreeRTOS documentation will not only help you, by * 13 | ; * ensuring you get running as quickly as possible and with an * 14 | ; * in-depth knowledge of how to use FreeRTOS, it will also help * 15 | ; * the FreeRTOS project to continue with its mission of providing * 16 | ; * professional grade, cross platform, de facto standard solutions * 17 | ; * for microcontrollers - completely free of charge! * 18 | ; * * 19 | ; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * 20 | ; * * 21 | ; * Thank you for using FreeRTOS, and thank you for your support! * 22 | ; * * 23 | ; *************************************************************************** 24 | ; 25 | ; 26 | ; This file is part of the FreeRTOS distribution. 27 | ; 28 | ; FreeRTOS is free software; you can redistribute it and/or modify it under 29 | ; the terms of the GNU General Public License (version 2) as published by the 30 | ; Free Software Foundation AND MODIFIED BY the FreeRTOS exception. 31 | ; >>>NOTE<<< The modification to the GPL is included to allow you to 32 | ; distribute a combined work that includes FreeRTOS without being obliged to 33 | ; provide the source code for proprietary components outside of the FreeRTOS 34 | ; kernel. FreeRTOS is distributed in the hope that it will be useful, but 35 | ; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 36 | ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 37 | ; more details. You should have received a copy of the GNU General Public 38 | ; License and the FreeRTOS license exception along with FreeRTOS; if not it 39 | ; can be viewed here: http://www.freertos.org/a00114.html and also obtained 40 | ; by writing to Richard Barry, contact details for whom are available on the 41 | ; FreeRTOS WEB site. 42 | ; 43 | ; 1 tab == 4 spaces! 44 | ; 45 | ; http://www.FreeRTOS.org - Documentation, latest information, license and 46 | ; contact details. 47 | ; 48 | ; http://www.SafeRTOS.com - A version that is certified for use in safety 49 | ; critical systems. 50 | ; 51 | ; http://www.OpenRTOS.com - Commercial support, development, porting, 52 | ; licensing and training services. 53 | ;*/ 54 | 55 | IMPORT ulCriticalNesting ; 56 | IMPORT pxCurrentTCB ; 57 | 58 | 59 | MACRO 60 | portRESTORE_CONTEXT 61 | 62 | 63 | LDR R0, =pxCurrentTCB ; Set the LR to the task stack. The location was... 64 | LDR R0, [R0] ; ... stored in pxCurrentTCB 65 | LDR LR, [R0] 66 | 67 | LDR R0, =ulCriticalNesting ; The critical nesting depth is the first item on... 68 | LDMFD LR!, {R1} ; ...the stack. Load it into the ulCriticalNesting var. 69 | STR R1, [R0] ; 70 | 71 | LDMFD LR!, {R0} ; Get the SPSR from the stack. 72 | MSR SPSR_cxsf, R0 ; 73 | 74 | LDMFD LR, {R0-R14}^ ; Restore all system mode registers for the task. 75 | NOP ; 76 | 77 | LDR LR, [LR, #+60] ; Restore the return address 78 | 79 | ; And return - correcting the offset in the LR to obtain ... 80 | SUBS PC, LR, #4 ; ...the correct address. 81 | 82 | MEND 83 | 84 | ; /**********************************************************************/ 85 | 86 | MACRO 87 | portSAVE_CONTEXT 88 | 89 | 90 | STMDB SP!, {R0} ; Store R0 first as we need to use it. 91 | 92 | STMDB SP,{SP}^ ; Set R0 to point to the task stack pointer. 93 | NOP ; 94 | SUB SP, SP, #4 ; 95 | LDMIA SP!,{R0} ; 96 | 97 | STMDB R0!, {LR} ; Push the return address onto the stack. 98 | MOV LR, R0 ; Now we have saved LR we can use it instead of R0. 99 | LDMIA SP!, {R0} ; Pop R0 so we can save it onto the system mode stack. 100 | 101 | STMDB LR,{R0-LR}^ ; Push all the system mode registers onto the task stack. 102 | NOP ; 103 | SUB LR, LR, #60 ; 104 | 105 | MRS R0, SPSR ; Push the SPSR onto the task stack. 106 | STMDB LR!, {R0} ; 107 | 108 | LDR R0, =ulCriticalNesting ; 109 | LDR R0, [R0] ; 110 | STMDB LR!, {R0} ; 111 | 112 | LDR R0, =pxCurrentTCB ; Store the new top of stack for the task. 113 | LDR R1, [R0] ; 114 | STR LR, [R1] ; 115 | 116 | MEND 117 | 118 | END 119 | -------------------------------------------------------------------------------- /FreeRTOS/portable/RVDS/ARM_CA9/portASM.s: -------------------------------------------------------------------------------- 1 | ;/* 2 | ; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. 3 | ; All rights reserved 4 | ; 5 | ; 6 | ; *************************************************************************** 7 | ; * * 8 | ; * FreeRTOS tutorial books are available in pdf and paperback. * 9 | ; * Complete, revised, and edited pdf reference manuals are also * 10 | ; * available. * 11 | ; * * 12 | ; * Purchasing FreeRTOS documentation will not only help you, by * 13 | ; * ensuring you get running as quickly as possible and with an * 14 | ; * in-depth knowledge of how to use FreeRTOS, it will also help * 15 | ; * the FreeRTOS project to continue with its mission of providing * 16 | ; * professional grade, cross platform, de facto standard solutions * 17 | ; * for microcontrollers - completely free of charge! * 18 | ; * * 19 | ; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * 20 | ; * * 21 | ; * Thank you for using FreeRTOS, and thank you for your support! * 22 | ; * * 23 | ; *************************************************************************** 24 | ; 25 | ; 26 | ; This file is part of the FreeRTOS distribution. 27 | ; 28 | ; FreeRTOS is free software; you can redistribute it and/or modify it under 29 | ; the terms of the GNU General Public License (version 2) as published by the 30 | ; Free Software Foundation AND MODIFIED BY the FreeRTOS exception. 31 | ; >>>NOTE<<< The modification to the GPL is included to allow you to 32 | ; distribute a combined work that includes FreeRTOS without being obliged to 33 | ; provide the source code for proprietary components outside of the FreeRTOS 34 | ; kernel. FreeRTOS is distributed in the hope that it will be useful, but 35 | ; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 36 | ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 37 | ; more details. You should have received a copy of the GNU General Public 38 | ; License and the FreeRTOS license exception along with FreeRTOS; if not it 39 | ; can be viewed here: http://www.freertos.org/a00114.html and also obtained 40 | ; by writing to Richard Barry, contact details for whom are available on the 41 | ; FreeRTOS WEB site. 42 | ; 43 | ; 1 tab == 4 spaces! 44 | ; 45 | ; http://www.FreeRTOS.org - Documentation, latest information, license and 46 | ; contact details. 47 | ; 48 | ; http://www.SafeRTOS.com - A version that is certified for use in safety 49 | ; critical systems. 50 | ; 51 | ; http://www.OpenRTOS.com - Commercial support, development, porting, 52 | ; licensing and training services. 53 | ;*/ 54 | 55 | INCLUDE portmacro.inc 56 | 57 | IMPORT vApplicationIRQHandler 58 | IMPORT vTaskSwitchContext 59 | IMPORT ulPortYieldRequired 60 | IMPORT ulPortInterruptNesting 61 | IMPORT vTaskSwitchContext 62 | IMPORT ulICCIAR 63 | IMPORT ulICCEOIR 64 | 65 | EXPORT FreeRTOS_SWI_Handler 66 | EXPORT FreeRTOS_IRQ_Handler 67 | EXPORT vPortRestoreTaskContext 68 | 69 | ARM 70 | AREA PORT_ASM, CODE, READONLY 71 | 72 | 73 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 74 | ; SVC handler is used to yield a task. 75 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 76 | FreeRTOS_SWI_Handler 77 | 78 | PRESERVE8 79 | 80 | ; Save the context of the current task and select a new task to run. 81 | portSAVE_CONTEXT 82 | LDR R0, =vTaskSwitchContext 83 | BLX R0 84 | portRESTORE_CONTEXT 85 | 86 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 87 | ; vPortRestoreTaskContext is used to start the scheduler. 88 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 89 | vPortRestoreTaskContext 90 | ; Switch to system mode 91 | CPS #SYS_MODE 92 | portRESTORE_CONTEXT 93 | 94 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 95 | ; PL390 GIC interrupt handler 96 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 97 | FreeRTOS_IRQ_Handler 98 | 99 | ; Return to the interrupted instruction. 100 | SUB lr, lr, #4 101 | 102 | ; Push the return address and SPSR 103 | PUSH {lr} 104 | MRS lr, SPSR 105 | PUSH {lr} 106 | 107 | ; Change to supervisor mode to allow reentry. 108 | CPS #SVC_MODE 109 | 110 | ; Push used registers. 111 | PUSH {r0-r4, r12} 112 | 113 | ; Increment nesting count. r3 holds the address of ulPortInterruptNesting 114 | ; for future use. r1 holds the original ulPortInterruptNesting value for 115 | ; future use. 116 | LDR r3, =ulPortInterruptNesting 117 | LDR r1, [r3] 118 | ADD r4, r1, #1 119 | STR r4, [r3] 120 | 121 | ; Read value from the interrupt acknowledge register, which is stored in r0 122 | ; for future parameter and interrupt clearing use. 123 | LDR r2, =ulICCIAR 124 | LDR r0, [r2] 125 | 126 | ; Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for 127 | ; future use. 128 | MOV r2, sp 129 | AND r2, r2, #4 130 | SUB sp, sp, r2 131 | 132 | ; Call the interrupt handler 133 | PUSH {r0-r3, lr} 134 | LDR r1, =vApplicationIRQHandler 135 | BLX r1 136 | POP {r0-r3, lr} 137 | ADD sp, sp, r2 138 | 139 | CPSID i 140 | 141 | ; Write the value read from ICCIAR to ICCEOIR 142 | LDR r4, =ulICCEOIR 143 | STR r0, [r4] 144 | 145 | ; Restore the old nesting count 146 | STR r1, [r3] 147 | 148 | ; A context switch is never performed if the nesting count is not 0 149 | CMP r1, #0 150 | BNE exit_without_switch 151 | 152 | ; Did the interrupt request a context switch? r1 holds the address of 153 | ; ulPortYieldRequired and r0 the value of ulPortYieldRequired for future 154 | ; use. 155 | LDR r1, =ulPortYieldRequired 156 | LDR r0, [r1] 157 | CMP r0, #0 158 | BNE switch_before_exit 159 | 160 | exit_without_switch 161 | ; No context switch. Restore used registers, LR_irq and SPSR before 162 | ; returning. 163 | POP {r0-r4, r12} 164 | CPS #IRQ_MODE 165 | POP {LR} 166 | MSR SPSR_cxsf, LR 167 | POP {LR} 168 | MOVS PC, LR 169 | 170 | switch_before_exit 171 | ; A context swtich is to be performed. Clear the context switch pending 172 | ; flag. 173 | MOV r0, #0 174 | STR r0, [r1] 175 | 176 | ; Restore used registers, LR-irq and SPSR before saving the context 177 | ; to the task stack. 178 | POP {r0-r4, r12} 179 | CPS #IRQ_MODE 180 | POP {LR} 181 | MSR SPSR_cxsf, LR 182 | POP {LR} 183 | portSAVE_CONTEXT 184 | 185 | ; Call the function that selects the new task to execute. 186 | ; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD 187 | ; instructions, or 8 byte aligned stack allocated data. LR does not need 188 | ; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway. 189 | LDR r0, =vTaskSwitchContext 190 | BLX r0 191 | 192 | ; Restore the context of, and branch to, the task selected to execute next. 193 | portRESTORE_CONTEXT 194 | 195 | 196 | END 197 | 198 | 199 | 200 | 201 | -------------------------------------------------------------------------------- /FreeRTOS/portable/RVDS/ARM_CA9/portmacro.h: -------------------------------------------------------------------------------- 1 | /* 2 | FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. 3 | All rights reserved 4 | 5 | VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. 6 | 7 | This file is part of the FreeRTOS distribution. 8 | 9 | FreeRTOS is free software; you can redistribute it and/or modify it under 10 | the terms of the GNU General Public License (version 2) as published by the 11 | Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. 12 | 13 | *************************************************************************** 14 | >>! NOTE: The modification to the GPL is included to allow you to !<< 15 | >>! distribute a combined work that includes FreeRTOS without being !<< 16 | >>! obliged to provide the source code for proprietary components !<< 17 | >>! outside of the FreeRTOS kernel. !<< 18 | *************************************************************************** 19 | 20 | FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY 21 | WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS 22 | FOR A PARTICULAR PURPOSE. Full license text is available on the following 23 | link: http://www.freertos.org/a00114.html 24 | 25 | *************************************************************************** 26 | * * 27 | * FreeRTOS provides completely free yet professionally developed, * 28 | * robust, strictly quality controlled, supported, and cross * 29 | * platform software that is more than just the market leader, it * 30 | * is the industry's de facto standard. * 31 | * * 32 | * Help yourself get started quickly while simultaneously helping * 33 | * to support the FreeRTOS project by purchasing a FreeRTOS * 34 | * tutorial book, reference manual, or both: * 35 | * http://www.FreeRTOS.org/Documentation * 36 | * * 37 | *************************************************************************** 38 | 39 | http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading 40 | the FAQ page "My application does not run, what could be wrong?". Have you 41 | defined configASSERT()? 42 | 43 | http://www.FreeRTOS.org/support - In return for receiving this top quality 44 | embedded software for free we request you assist our global community by 45 | participating in the support forum. 46 | 47 | http://www.FreeRTOS.org/training - Investing in training allows your team to 48 | be as productive as possible as early as possible. Now you can receive 49 | FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers 50 | Ltd, and the world's leading authority on the world's leading RTOS. 51 | 52 | http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, 53 | including FreeRTOS+Trace - an indispensable productivity tool, a DOS 54 | compatible FAT file system, and our tiny thread aware UDP/IP stack. 55 | 56 | http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. 57 | Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. 58 | 59 | http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High 60 | Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS 61 | licenses offer ticketed support, indemnification and commercial middleware. 62 | 63 | http://www.SafeRTOS.com - High Integrity Systems also provide a safety 64 | engineered and independently SIL3 certified version for use in safety and 65 | mission critical applications that require provable dependability. 66 | 67 | 1 tab == 4 spaces! 68 | */ 69 | 70 | #ifndef PORTMACRO_H 71 | #define PORTMACRO_H 72 | 73 | #ifdef __cplusplus 74 | extern "C" { 75 | #endif 76 | 77 | /*----------------------------------------------------------- 78 | * Port specific definitions. 79 | * 80 | * The settings in this file configure FreeRTOS correctly for the given hardware 81 | * and compiler. 82 | * 83 | * These settings should not be altered. 84 | *----------------------------------------------------------- 85 | */ 86 | 87 | /* Type definitions. */ 88 | #define portCHAR char 89 | #define portFLOAT float 90 | #define portDOUBLE double 91 | #define portLONG long 92 | #define portSHORT short 93 | #define portSTACK_TYPE uint32_t 94 | #define portBASE_TYPE long 95 | 96 | typedef portSTACK_TYPE StackType_t; 97 | typedef long BaseType_t; 98 | typedef unsigned long UBaseType_t; 99 | 100 | 101 | #if( configUSE_16_BIT_TICKS == 1 ) 102 | typedef uint16_t TickType_t; 103 | #define portMAX_DELAY ( TickType_t ) 0xffff 104 | #else 105 | typedef uint32_t TickType_t; 106 | #define portMAX_DELAY ( TickType_t ) 0xffffffffUL 107 | 108 | /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do 109 | not need to be guarded with a critical section. */ 110 | #define portTICK_TYPE_IS_ATOMIC 1 111 | #endif 112 | /*-----------------------------------------------------------*/ 113 | 114 | /* Hardware specifics. */ 115 | #define portSTACK_GROWTH ( -1 ) 116 | #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) 117 | #define portBYTE_ALIGNMENT 8 118 | 119 | /*-----------------------------------------------------------*/ 120 | 121 | /* Task utilities. */ 122 | 123 | /* Called at the end of an ISR that can cause a context switch. */ 124 | #define portEND_SWITCHING_ISR( xSwitchRequired )\ 125 | { \ 126 | extern uint32_t ulPortYieldRequired; \ 127 | \ 128 | if( xSwitchRequired != pdFALSE ) \ 129 | { \ 130 | ulPortYieldRequired = pdTRUE; \ 131 | } \ 132 | } 133 | 134 | #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) 135 | #define portYIELD() __asm( "SWI 0" ); 136 | 137 | 138 | /*----------------------------------------------------------- 139 | * Critical section control 140 | *----------------------------------------------------------*/ 141 | 142 | extern void vPortEnterCritical( void ); 143 | extern void vPortExitCritical( void ); 144 | extern uint32_t ulPortSetInterruptMask( void ); 145 | extern void vPortClearInterruptMask( uint32_t ulNewMaskValue ); 146 | 147 | /* These macros do not globally disable/enable interrupts. They do mask off 148 | interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */ 149 | #define portENTER_CRITICAL() vPortEnterCritical(); 150 | #define portEXIT_CRITICAL() vPortExitCritical(); 151 | #define portDISABLE_INTERRUPTS() ulPortSetInterruptMask() 152 | #define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 ) 153 | #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask() 154 | #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x) 155 | 156 | /*-----------------------------------------------------------*/ 157 | 158 | /* Task function macros as described on the FreeRTOS.org WEB site. These are 159 | not required for this port but included in case common demo code that uses these 160 | macros is used. */ 161 | #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) 162 | #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) 163 | 164 | /* Prototype of the FreeRTOS tick handler. This must be installed as the 165 | handler for whichever peripheral is used to generate the RTOS tick. */ 166 | void FreeRTOS_Tick_Handler( void ); 167 | 168 | /* Any task that uses the floating point unit MUST call vPortTaskUsesFPU() 169 | before any floating point instructions are executed. */ 170 | void vPortTaskUsesFPU( void ); 171 | #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU() 172 | 173 | #define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL ) 174 | #define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL ) 175 | 176 | /* Architecture specific optimisations. */ 177 | #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION 178 | #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 179 | #endif 180 | 181 | #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 182 | 183 | /* Store/clear the ready priorities in a bit map. */ 184 | #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) 185 | #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) 186 | 187 | /*-----------------------------------------------------------*/ 188 | 189 | #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( uxReadyPriorities ) ) 190 | 191 | #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ 192 | 193 | #ifdef configASSERT 194 | void vPortValidateInterruptPriority( void ); 195 | #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() 196 | #endif 197 | 198 | #define portNOP() __nop() 199 | 200 | #ifdef __cplusplus 201 | } 202 | #endif 203 | 204 | #endif /* PORTMACRO_H */ 205 | 206 | -------------------------------------------------------------------------------- /FreeRTOS/portable/RVDS/ARM_CA9/portmacro.inc: -------------------------------------------------------------------------------- 1 | ;/* 2 | ; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. 3 | ; All rights reserved 4 | ; 5 | ; 6 | ; *************************************************************************** 7 | ; * * 8 | ; * FreeRTOS tutorial books are available in pdf and paperback. * 9 | ; * Complete, revised, and edited pdf reference manuals are also * 10 | ; * available. * 11 | ; * * 12 | ; * Purchasing FreeRTOS documentation will not only help you, by * 13 | ; * ensuring you get running as quickly as possible and with an * 14 | ; * in-depth knowledge of how to use FreeRTOS, it will also help * 15 | ; * the FreeRTOS project to continue with its mission of providing * 16 | ; * professional grade, cross platform, de facto standard solutions * 17 | ; * for microcontrollers - completely free of charge! * 18 | ; * * 19 | ; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * 20 | ; * * 21 | ; * Thank you for using FreeRTOS, and thank you for your support! * 22 | ; * * 23 | ; *************************************************************************** 24 | ; 25 | ; 26 | ; This file is part of the FreeRTOS distribution. 27 | ; 28 | ; FreeRTOS is free software; you can redistribute it and/or modify it under 29 | ; the terms of the GNU General Public License (version 2) as published by the 30 | ; Free Software Foundation AND MODIFIED BY the FreeRTOS exception. 31 | ; >>>NOTE<<< The modification to the GPL is included to allow you to 32 | ; distribute a combined work that includes FreeRTOS without being obliged to 33 | ; provide the source code for proprietary components outside of the FreeRTOS 34 | ; kernel. FreeRTOS is distributed in the hope that it will be useful, but 35 | ; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 36 | ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 37 | ; more details. You should have received a copy of the GNU General Public 38 | ; License and the FreeRTOS license exception along with FreeRTOS; if not it 39 | ; can be viewed here: http://www.freertos.org/a00114.html and also obtained 40 | ; by writing to Richard Barry, contact details for whom are available on the 41 | ; FreeRTOS WEB site. 42 | ; 43 | ; 1 tab == 4 spaces! 44 | ; 45 | ; http://www.FreeRTOS.org - Documentation, latest information, license and 46 | ; contact details. 47 | ; 48 | ; http://www.SafeRTOS.com - A version that is certified for use in safety 49 | ; critical systems. 50 | ; 51 | ; http://www.OpenRTOS.com - Commercial support, development, porting, 52 | ; licensing and training services. 53 | ;*/ 54 | 55 | SYS_MODE EQU 0x1f 56 | SVC_MODE EQU 0x13 57 | IRQ_MODE EQU 0x12 58 | 59 | IMPORT ulCriticalNesting 60 | IMPORT pxCurrentTCB 61 | IMPORT ulPortTaskHasFPUContext 62 | IMPORT ulAsmAPIPriorityMask 63 | IMPORT ulICCPMR 64 | 65 | 66 | MACRO 67 | portSAVE_CONTEXT 68 | 69 | ; Save the LR and SPSR onto the system mode stack before switching to 70 | ; system mode to save the remaining system mode registers 71 | SRSDB sp!, #SYS_MODE 72 | CPS #SYS_MODE 73 | PUSH {R0-R12, R14} 74 | 75 | ; Push the critical nesting count 76 | LDR R2, =ulCriticalNesting 77 | LDR R1, [R2] 78 | PUSH {R1} 79 | 80 | ; Does the task have a floating point context that needs saving? If 81 | ; ulPortTaskHasFPUContext is 0 then no. 82 | LDR R2, =ulPortTaskHasFPUContext 83 | LDR R3, [R2] 84 | CMP R3, #0 85 | 86 | ; Save the floating point context, if any 87 | FMRXNE R1, FPSCR 88 | VPUSHNE {D0-D15} 89 | VPUSHNE {D16-D31} 90 | PUSHNE {R1} 91 | 92 | ; Save ulPortTaskHasFPUContext itself 93 | PUSH {R3} 94 | 95 | ; Save the stack pointer in the TCB 96 | LDR R0, =pxCurrentTCB 97 | LDR R1, [R0] 98 | STR SP, [R1] 99 | 100 | MEND 101 | 102 | ; /**********************************************************************/ 103 | 104 | MACRO 105 | portRESTORE_CONTEXT 106 | 107 | ; Set the SP to point to the stack of the task being restored. 108 | LDR R0, =pxCurrentTCB 109 | LDR R1, [R0] 110 | LDR SP, [R1] 111 | 112 | ; Is there a floating point context to restore? If the restored 113 | ; ulPortTaskHasFPUContext is zero then no. 114 | LDR R0, =ulPortTaskHasFPUContext 115 | POP {R1} 116 | STR R1, [R0] 117 | CMP R1, #0 118 | 119 | ; Restore the floating point context, if any 120 | POPNE {R0} 121 | VPOPNE {D16-D31} 122 | VPOPNE {D0-D15} 123 | VMSRNE FPSCR, R0 124 | 125 | ; Restore the critical section nesting depth 126 | LDR R0, =ulCriticalNesting 127 | POP {R1} 128 | STR R1, [R0] 129 | 130 | ; Ensure the priority mask is correct for the critical nesting depth 131 | LDR R2, =ulICCPMR 132 | CMP R1, #0 133 | MOVEQ R4, #255 134 | LDRNE R4, =ulAsmAPIPriorityMask 135 | STR R4, [r2] 136 | 137 | ; Restore all system mode registers other than the SP (which is already 138 | ; being used) 139 | POP {R0-R12, R14} 140 | 141 | ; Return to the task code, loading CPSR on the way. 142 | RFEIA sp! 143 | 144 | MEND 145 | 146 | END 147 | 148 | -------------------------------------------------------------------------------- /FreeRTOS/portable/RVDS/ARM_CM0/portmacro.h: -------------------------------------------------------------------------------- 1 | /* 2 | FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. 3 | All rights reserved 4 | 5 | VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. 6 | 7 | This file is part of the FreeRTOS distribution. 8 | 9 | FreeRTOS is free software; you can redistribute it and/or modify it under 10 | the terms of the GNU General Public License (version 2) as published by the 11 | Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. 12 | 13 | *************************************************************************** 14 | >>! NOTE: The modification to the GPL is included to allow you to !<< 15 | >>! distribute a combined work that includes FreeRTOS without being !<< 16 | >>! obliged to provide the source code for proprietary components !<< 17 | >>! outside of the FreeRTOS kernel. !<< 18 | *************************************************************************** 19 | 20 | FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY 21 | WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS 22 | FOR A PARTICULAR PURPOSE. Full license text is available on the following 23 | link: http://www.freertos.org/a00114.html 24 | 25 | *************************************************************************** 26 | * * 27 | * FreeRTOS provides completely free yet professionally developed, * 28 | * robust, strictly quality controlled, supported, and cross * 29 | * platform software that is more than just the market leader, it * 30 | * is the industry's de facto standard. * 31 | * * 32 | * Help yourself get started quickly while simultaneously helping * 33 | * to support the FreeRTOS project by purchasing a FreeRTOS * 34 | * tutorial book, reference manual, or both: * 35 | * http://www.FreeRTOS.org/Documentation * 36 | * * 37 | *************************************************************************** 38 | 39 | http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading 40 | the FAQ page "My application does not run, what could be wrong?". Have you 41 | defined configASSERT()? 42 | 43 | http://www.FreeRTOS.org/support - In return for receiving this top quality 44 | embedded software for free we request you assist our global community by 45 | participating in the support forum. 46 | 47 | http://www.FreeRTOS.org/training - Investing in training allows your team to 48 | be as productive as possible as early as possible. Now you can receive 49 | FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers 50 | Ltd, and the world's leading authority on the world's leading RTOS. 51 | 52 | http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, 53 | including FreeRTOS+Trace - an indispensable productivity tool, a DOS 54 | compatible FAT file system, and our tiny thread aware UDP/IP stack. 55 | 56 | http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. 57 | Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. 58 | 59 | http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High 60 | Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS 61 | licenses offer ticketed support, indemnification and commercial middleware. 62 | 63 | http://www.SafeRTOS.com - High Integrity Systems also provide a safety 64 | engineered and independently SIL3 certified version for use in safety and 65 | mission critical applications that require provable dependability. 66 | 67 | 1 tab == 4 spaces! 68 | */ 69 | 70 | 71 | #ifndef PORTMACRO_H 72 | #define PORTMACRO_H 73 | 74 | #ifdef __cplusplus 75 | extern "C" { 76 | #endif 77 | 78 | /*----------------------------------------------------------- 79 | * Port specific definitions. 80 | * 81 | * The settings in this file configure FreeRTOS correctly for the 82 | * given hardware and compiler. 83 | * 84 | * These settings should not be altered. 85 | *----------------------------------------------------------- 86 | */ 87 | 88 | /* Type definitions. */ 89 | #define portCHAR char 90 | #define portFLOAT float 91 | #define portDOUBLE double 92 | #define portLONG long 93 | #define portSHORT short 94 | #define portSTACK_TYPE uint32_t 95 | #define portBASE_TYPE long 96 | 97 | typedef portSTACK_TYPE StackType_t; 98 | typedef long BaseType_t; 99 | typedef unsigned long UBaseType_t; 100 | 101 | #if( configUSE_16_BIT_TICKS == 1 ) 102 | typedef uint16_t TickType_t; 103 | #define portMAX_DELAY ( TickType_t ) 0xffff 104 | #else 105 | typedef uint32_t TickType_t; 106 | #define portMAX_DELAY ( TickType_t ) 0xffffffffUL 107 | 108 | /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do 109 | not need to be guarded with a critical section. */ 110 | #define portTICK_TYPE_IS_ATOMIC 1 111 | #endif 112 | /*-----------------------------------------------------------*/ 113 | 114 | /* Architecture specifics. */ 115 | #define portSTACK_GROWTH ( -1 ) 116 | #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) 117 | #define portBYTE_ALIGNMENT 8 118 | /*-----------------------------------------------------------*/ 119 | 120 | 121 | /* Scheduler utilities. */ 122 | extern void vPortYield( void ); 123 | #define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) 124 | #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) 125 | #define portYIELD() vPortYield() 126 | #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT 127 | #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) 128 | /*-----------------------------------------------------------*/ 129 | 130 | /* Critical section management. */ 131 | extern void vPortEnterCritical( void ); 132 | extern void vPortExitCritical( void ); 133 | extern uint32_t ulSetInterruptMaskFromISR( void ); 134 | extern void vClearInterruptMaskFromISR( uint32_t ulMask ); 135 | 136 | #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() 137 | #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) 138 | #define portDISABLE_INTERRUPTS() __disable_irq() 139 | #define portENABLE_INTERRUPTS() __enable_irq() 140 | #define portENTER_CRITICAL() vPortEnterCritical() 141 | #define portEXIT_CRITICAL() vPortExitCritical() 142 | 143 | /*-----------------------------------------------------------*/ 144 | 145 | /* Task function macros as described on the FreeRTOS.org WEB site. */ 146 | #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) 147 | #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) 148 | 149 | #define portNOP() 150 | 151 | #ifdef __cplusplus 152 | } 153 | #endif 154 | 155 | #endif /* PORTMACRO_H */ 156 | 157 | -------------------------------------------------------------------------------- /FreeRTOS/portable/RVDS/ARM_CM7/ReadMe.txt: -------------------------------------------------------------------------------- 1 | There are two options for running FreeRTOS on ARM Cortex-M7 microcontrollers. 2 | The best option depends on the revision of the ARM Cortex-M7 core in use. The 3 | revision is specified by an 'r' number, and a 'p' number, so will look something 4 | like 'r0p1'. Check the documentation for the microcontroller in use to find the 5 | revision of the Cortex-M7 core used in that microcontroller. If in doubt, use 6 | the FreeRTOS port provided specifically for r0p1 revisions, as that can be used 7 | with all core revisions. 8 | 9 | The first option is to use the ARM Cortex-M4F port, and the second option is to 10 | use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround. 11 | 12 | If the revision of the ARM Cortex-M7 core is not r0p1 then either option can be 13 | used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in 14 | the /FreeRTOS/Source/portable/RVDS/ARM_CM4F directory. 15 | 16 | If the revision of the ARM Cortex-M7 core is r0p1 then use the FreeRTOS ARM 17 | Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1 18 | directory. -------------------------------------------------------------------------------- /FreeRTOS/portable/readme.txt: -------------------------------------------------------------------------------- 1 | Each real time kernel port consists of three files that contain the core kernel 2 | components and are common to every port, and one or more files that are 3 | specific to a particular microcontroller and/or compiler. 4 | 5 | 6 | + The FreeRTOS/Source/Portable/MemMang directory contains the five sample 7 | memory allocators as described on the http://www.FreeRTOS.org WEB site. 8 | 9 | + The other directories each contain files specific to a particular 10 | microcontroller or compiler, where the directory name denotes the compiler 11 | specific files the directory contains. 12 | 13 | 14 | 15 | For example, if you are interested in the [compiler] port for the [architecture] 16 | microcontroller, then the port specific files are contained in 17 | FreeRTOS/Source/Portable/[compiler]/[architecture] directory. If this is the 18 | only port you are interested in then all the other directories can be 19 | ignored. 20 | 21 | -------------------------------------------------------------------------------- /FreeRTOS/readme.txt: -------------------------------------------------------------------------------- 1 | Each real time kernel port consists of three files that contain the core kernel 2 | components and are common to every port, and one or more files that are 3 | specific to a particular microcontroller and or compiler. 4 | 5 | + The FreeRTOS/Source directory contains the three files that are common to 6 | every port - list.c, queue.c and tasks.c. The kernel is contained within these 7 | three files. croutine.c implements the optional co-routine functionality - which 8 | is normally only used on very memory limited systems. 9 | 10 | + The FreeRTOS/Source/Portable directory contains the files that are specific to 11 | a particular microcontroller and or compiler. 12 | 13 | + The FreeRTOS/Source/include directory contains the real time kernel header 14 | files. 15 | 16 | See the readme file in the FreeRTOS/Source/Portable directory for more 17 | information. -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # 设计概况 2 | stm32F103+ESP8266+W5500+OLED 3 | FreeRTOS（对堆栈合理分配） 4 | OneNET远程4路开关应用 5 | 心知天气 6 | cjson解析（剩余RAM太小了，没有进行移植） 7 | uart1发送DMA 8 | uart2接收DMA（DMA相关代码有，但实测ESP8266与F103用AT通信时不适合用DMA。会导致单次通信的返回内容被拆分为多条，不好处理） 9 | 10 | **注意**：代码中主要使用`OLED`、`ESP8266`，`CH340`作为USB串口调试输出。`W5500`的电路、代码验证无误，但没有在此工程嵌入相关代码。 11 | 12 | # 2021.04.19 PCB 13 | AD-PCB工程已上传，全3D，显示起来蛮漂亮，不过工程大了些。打样直接把`F103-IOT-IC.PcbDoc`发JLC。 14 | ![image](https://github.com/ZhiliangMa/202004-F103-IOT-DEV_V1/blob/master/img/F103-IOT-DEV-TOP.jpg) 15 | ![image](https://github.com/ZhiliangMa/202004-F103-IOT-DEV_V1/blob/master/img/F103-IOT-DEV-BOTTOM.jpg) 16 | 17 | # 电源 18 | 支持`Micro USB`、`DC插头`输入，电路设有电源自动切换，两者可同时插入，不用担心两者冲突。 19 | 预留18650电池座、锂电保护及充电电路，可维持掉电后的几个小时续航。 20 | 21 | # 硬件Bug 22 | 此PCB的RTC不起振，已改用`网页HTML获取时间`+`FreeRTOS软件定时器`的方式，隔几分钟会自动校准。 23 | 24 | 25 | # 硬件资源 26 | STM32F103C8T6 27 | W5500 28 | ESP-12S/F 29 | EMW3080 30 | USB/CAN 31 | 485 32 | SPI-OLED/TFT 33 |
34 | uart1 -> CH340 -> usb Debug 35 | uart2 -> ESP12/EMW3080 36 | uart3 -> RS485/uart3 37 | SPI1 -> OLED/TFT 38 | SPI2 -> W5500 39 | 40 | # 引脚分配 41 | WIFI_TX -> UART2_RX -> PA3 42 | WIFI_RX -> UART2_TX -> PA2 43 | WIFI_RST -> PA4 44 | WIFI_EN -> 无，硬件默认始终使能 45 |
46 | OLED_SCK -> SPI1_SCK -> PA5 47 | OLED_MOSI-> SPI1_MOSI -> PA7 48 | OLED_RST-> PA6 49 | OLED_DC-> PB0 50 | OLED_CS-> PB1 51 |
52 | SWITCH1 -> SCR1 -> PB8 53 | SWITCH2 -> SCR2 -> PB5 54 | SWITCH3 -> JK1 -> PB4 55 | SWITCH4 -> JK2 -> PB3 56 |
57 | USB_Debug -> UART1_TX -> PA9 58 | USB_Debug -> UART1_RX -> PA10 59 |
60 | RS485_TX -> UART3_RX -> PB11 61 | RS485_RX -> UART3_TX -> PB10 62 | RS485_RD -> PB2 63 | -------------------------------------------------------------------------------- /img/F103-IOT-DEV-BOTTOM.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/img/F103-IOT-DEV-BOTTOM.jpg -------------------------------------------------------------------------------- /img/F103-IOT-DEV-TOP.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/img/F103-IOT-DEV-TOP.jpg -------------------------------------------------------------------------------- /peripheral/LED/led.c: -------------------------------------------------------------------------------- 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#define _OLED_H 3 | 4 | //#include "delay.h" 5 | #include "spi1.h" 6 | #include "stm32f10x_gpio.h" 7 | #include "stdlib.h" 8 | 9 | /* 引脚工作正常测试 */ 10 | //#define GPIO_DEBUG 11 | 12 | /* OLED接口配置 */ 13 | #define HardWare_SPI 0x01 14 | //#define SoftWare_SPI 0x02 15 | //#define SoftWare_IIC 0x04 16 | 17 | /* OLED引脚配置 */ 18 | #define OLED_SCL GPIO_Pin_13 19 | #define OLED_SDA GPIO_Pin_14 20 | 21 | #define OLED_D1 GPIO_Pin_7 //dat 22 | #define OLED_D0 GPIO_Pin_5 //sck 23 | #define OLED_RST GPIO_Pin_6 //reset - PA6 24 | #define OLED_DC GPIO_Pin_0 //dat/cmd PB0 25 | #define OLED_CS GPIO_Pin_1 //chip select PB1 26 | 27 | #define OLED_CMD 0 //写命令 28 | #define OLED_DATA 1 //写数据 29 | 30 | #define OLED_RST_H() GPIO_SetBits(GPIOB, OLED_RST) 31 | #define OLED_RST_L() GPIO_ResetBits(GPIOB, OLED_RST) 32 | #define OLED_D0_L() GPIO_ResetBits(GPIOA, OLED_D0) 33 | #define OLED_D0_H() GPIO_SetBits(GPIOA, OLED_D0) 34 | #define OLED_D1_L() GPIO_ResetBits(GPIOA, OLED_D1) 35 | #define OLED_D1_H() GPIO_SetBits(GPIOA, OLED_D1) 36 | #define OLED_DC_L() GPIO_ResetBits(GPIOB, OLED_DC) 37 | #define OLED_DC_H() GPIO_SetBits(GPIOB, OLED_DC) 38 | #define OLED_CS_L() GPIO_ResetBits(GPIOC, OLED_CS) 39 | #define OLED_CS_H() GPIO_SetBits(GPIOC, OLED_CS) 40 | 41 | /* OLED函数声明 */ 42 | void OLED_Init(void); 43 | void OLED_CLS(void); 44 | void OLED_4num(u8 x,u8 y,int number); 45 | void OLED_3num(u8 x,u8 y,u16 number); 46 | void OLED_2num(u8 x,u8 y,u8 number); 47 | void OLED_Num(u8 x,u8 y,u8 asc); 48 | void OLED_P6x8Str(u8 x,u8 y,u8 ch[]); 49 | void OLED_P8x16Str(u8 x,u8 y,u8 ch[]); 50 | void OLED_P14x16Str(u8 x,u8 y,u8 ch[]); 51 | void OLED_Print(u8 x, u8 y, u8 ch[]); 52 | void OLED_PutPixel(u8 x,u8 y); 53 | void OLED_Rectangle(int16_t acc_x,int16_t acc_y); 54 | 55 | void Draw_Logo(void); 56 | void Draw_BMP(u8 x0,u8 y0,u8 x1,u8 y1,u8 bmp[]); 57 | 58 | 59 | void OLED_DisOnOff(u8 d); 60 | void OLED_BkgLight(u8 d); 61 | 62 | void OLED_Fill(u8 dat); 63 | void Dis_String(u8 y, u8 x, u8 ch[]); 64 | void Dis_Char(u8 y,u8 x,u8 asc); 65 | void Dis_Num(u8 y, u8 x, u16 num,u8 N); 66 | void Dis_Float(u8 Y,u8 X,double real,u8 N); 67 | void Dis_Float2(u8 Y,u8 X,double real,u8 N1,u8 N2); 68 | void OLED_P6x8Num_8bit(u8 x,u8 y,u8 Number); 69 | void OLED_Num5(u8 x,u8 y,u16 number); 70 | void OLED_WhiteLine(u8 line , u8 num); //line:0~7 71 | void OLED_ClrLine(u8 line); 72 | 73 | //OLED_DisOnOff(0); //1,开启(白屏);0,关闭(黑屏) 74 | //OLED_BkgLight(2); 75 | 76 | #endif 77 | 78 | -------------------------------------------------------------------------------- /peripheral/spi1/spi1.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/peripheral/spi1/spi1.c -------------------------------------------------------------------------------- /peripheral/spi1/spi1.h: -------------------------------------------------------------------------------- 1 | #ifndef __SPI1_H 2 | #define __SPI1_H 3 | #include "sys.h" 4 | 5 | void SPI1_Init(void); 6 | void SPI1_SetSpeed(u8 SPI_BaudRatePrescaler); 7 | u8 SPI1_ReadWriteByte(u8 TxData); 8 | 9 | #endif 10 | -------------------------------------------------------------------------------- /peripheral/spi2/spi2.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/peripheral/spi2/spi2.c -------------------------------------------------------------------------------- /peripheral/spi2/spi2.h: -------------------------------------------------------------------------------- 1 | #ifndef __SPI_H 2 | #define __SPI_H 3 | 4 | #include "sys.h" 5 | 6 | #define SPI2_PORT GPIOB 7 | #define RCC_SPI2 RCC_APB2Periph_GPIOB 8 | #define SCK_PIN GPIO_Pin_13 9 | #define MISO_PIN GPIO_Pin_14 10 | #define MOSI_PIN GPIO_Pin_15 11 | #define NSS_PIN GPIO_Pin_12 12 | 13 | void SPI1_Init(void); 14 | void SPI2_Init(void); 15 | void SPI1_Speed(u8 speed); 16 | void SPI2_Speed(u8 speed); 17 | void SPI1_ReadWriteByte(u8 dat); 18 | u8 SPI2_ReadWriteByte(u8 dat); 19 | 20 | #endif 21 | 22 | -------------------------------------------------------------------------------- /peripheral/timer3/timer3.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/peripheral/timer3/timer3.c -------------------------------------------------------------------------------- /peripheral/timer3/timer3.h: -------------------------------------------------------------------------------- 1 | #ifndef __TIMER3_H 2 | #define __TIMER3_H 3 | 4 | #include "stm32f10x.h" 5 | 6 | void Wifi_RxFlag_Clear(void); 7 | void Tim3_Counter_Clear(void); 8 | void Timer3_Configuration(uint16_t xms); 9 | 10 | #endif 11 | -------------------------------------------------------------------------------- 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the software while HCLK is disabled 6 | // 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK 7 | // DBG_STOP 8 | // Debug Stop Mode 9 | // 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks 10 | // 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active 11 | // DBG_STANDBY 12 | // Debug Standby Mode 13 | // 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered. 14 | // 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active 15 | // DBG_IWDG_STOP 16 | // Debug independent watchdog stopped when core is halted 17 | // 0: The watchdog counter clock continues even if the core is halted 18 | // 1: The watchdog counter clock is stopped when the core is halted 19 | // DBG_WWDG_STOP 20 | // Debug window watchdog stopped when core is halted 21 | // 0: The window watchdog counter clock continues even if the core is halted 22 | // 1: The window watchdog counter clock is stopped when the core is halted 23 | // DBG_TIM1_STOP 24 | // Timer 1 counter stopped when core is halted 25 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 26 | // 1: The clock of the involved Timer counter is stopped when the core is halted 27 | // DBG_TIM2_STOP 28 | // Timer 2 counter stopped when core is halted 29 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 30 | // 1: The clock of the involved Timer counter is stopped when the core is halted 31 | // DBG_TIM3_STOP 32 | // Timer 3 counter stopped when core is halted 33 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 34 | // 1: The clock of the involved Timer counter is stopped when the core is halted 35 | // DBG_TIM4_STOP 36 | // Timer 4 counter stopped when core is halted 37 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 38 | // 1: The clock of the involved Timer counter is stopped when the core is halted 39 | // DBG_CAN1_STOP 40 | // Debug CAN1 stopped when Core is halted 41 | // 0: Same behavior as in normal mode 42 | // 1: CAN1 receive registers are frozen 43 | // DBG_I2C1_SMBUS_TIMEOUT 44 | // I2C1 SMBUS timeout mode stopped when Core is halted 45 | // 0: Same behavior as in normal mode 46 | // 1: The SMBUS timeout is frozen 47 | // DBG_I2C2_SMBUS_TIMEOUT 48 | // I2C2 SMBUS timeout mode stopped when Core is halted 49 | // 0: Same behavior as in normal mode 50 | // 1: The SMBUS timeout is frozen 51 | // DBG_TIM8_STOP 52 | // Timer 8 counter stopped when core is halted 53 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 54 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 55 | // DBG_TIM5_STOP 56 | // Timer 5 counter stopped when core is halted 57 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 58 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 59 | // DBG_TIM6_STOP 60 | // Timer 6 counter stopped when core is halted 61 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 62 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 63 | // DBG_TIM7_STOP 64 | // Timer 7 counter stopped when core is halted 65 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 66 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 67 | // DBG_CAN2_STOP 68 | // Debug CAN2 stopped when Core is halted 69 | // 0: Same behavior as in normal mode 70 | // 1: CAN2 receive registers are frozen 71 | // DBG_TIM12_STOP 72 | // Timer 12 counter stopped when core is halted 73 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 74 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 75 | // DBG_TIM13_STOP 76 | // Timer 13 counter stopped when core is halted 77 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 78 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 79 | // DBG_TIM14_STOP 80 | // Timer 14 counter stopped when core is halted 81 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 82 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 83 | // DBG_TIM9_STOP 84 | // Timer 9 counter stopped when core is halted 85 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 86 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 87 | // DBG_TIM10_STOP 88 | // Timer 10 counter stopped when core is halted 89 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 90 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 91 | // DBG_TIM11_STOP 92 | // Timer 11 counter stopped when core is halted 93 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 94 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 95 | // 96 | DbgMCU_CR = 0x00000007; 97 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /project/uVision5/DebugConfig/Target_1_STM32F103C8_1.0.0.dbgconf: -------------------------------------------------------------------------------- 1 | // <<< Use Configuration Wizard in Context Menu >>> 2 | // Debug MCU Configuration 3 | // DBG_SLEEP 4 | // Debug Sleep Mode 5 | // 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled 6 | // 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK 7 | // DBG_STOP 8 | // Debug Stop Mode 9 | // 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks 10 | // 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active 11 | // DBG_STANDBY 12 | // Debug Standby Mode 13 | // 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered. 14 | // 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active 15 | // DBG_IWDG_STOP 16 | // Debug independent watchdog stopped when core is halted 17 | // 0: The watchdog counter clock continues even if the core is halted 18 | // 1: The watchdog counter clock is stopped when the core is halted 19 | // DBG_WWDG_STOP 20 | // Debug window watchdog stopped when core is halted 21 | // 0: The window watchdog counter clock continues even if the core is halted 22 | // 1: The window watchdog counter clock is stopped when the core is halted 23 | // DBG_TIM1_STOP 24 | // Timer 1 counter stopped when core is halted 25 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 26 | // 1: The clock of the involved Timer counter is stopped when the core is halted 27 | // DBG_TIM2_STOP 28 | // Timer 2 counter stopped when core is halted 29 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 30 | // 1: The clock of the involved Timer counter is stopped when the core is halted 31 | // DBG_TIM3_STOP 32 | // Timer 3 counter stopped when core is halted 33 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 34 | // 1: The clock of the involved Timer counter is stopped when the core is halted 35 | // DBG_TIM4_STOP 36 | // Timer 4 counter stopped when core is halted 37 | // 0: The clock of the involved Timer Counter is fed even if the core is halted 38 | // 1: The clock of the involved Timer counter is stopped when the core is halted 39 | // DBG_CAN1_STOP 40 | // Debug CAN1 stopped when Core is halted 41 | // 0: Same behavior as in normal mode 42 | // 1: CAN1 receive registers are frozen 43 | // DBG_I2C1_SMBUS_TIMEOUT 44 | // I2C1 SMBUS timeout mode stopped when Core is halted 45 | // 0: Same behavior as in normal mode 46 | // 1: The SMBUS timeout is frozen 47 | // DBG_I2C2_SMBUS_TIMEOUT 48 | // I2C2 SMBUS timeout mode stopped when Core is halted 49 | // 0: Same behavior as in normal mode 50 | // 1: The SMBUS timeout is frozen 51 | // DBG_TIM8_STOP 52 | // Timer 8 counter stopped when core is halted 53 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 54 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 55 | // DBG_TIM5_STOP 56 | // Timer 5 counter stopped when core is halted 57 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 58 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 59 | // DBG_TIM6_STOP 60 | // Timer 6 counter stopped when core is halted 61 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 62 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 63 | // DBG_TIM7_STOP 64 | // Timer 7 counter stopped when core is halted 65 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 66 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 67 | // DBG_CAN2_STOP 68 | // Debug CAN2 stopped when Core is halted 69 | // 0: Same behavior as in normal mode 70 | // 1: CAN2 receive registers are frozen 71 | // DBG_TIM12_STOP 72 | // Timer 12 counter stopped when core is halted 73 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 74 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 75 | // DBG_TIM13_STOP 76 | // Timer 13 counter stopped when core is halted 77 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 78 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 79 | // DBG_TIM14_STOP 80 | // Timer 14 counter stopped when core is halted 81 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 82 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 83 | // DBG_TIM9_STOP 84 | // Timer 9 counter stopped when core is halted 85 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 86 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 87 | // DBG_TIM10_STOP 88 | // Timer 10 counter stopped when core is halted 89 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 90 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 91 | // DBG_TIM11_STOP 92 | // Timer 11 counter stopped when core is halted 93 | // 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally. 94 | // 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event). 95 | // 96 | DbgMCU_CR = 0x00000007; 97 | // <<< end of configuration section >>> -------------------------------------------------------------------------------- /project/uVision5/EventRecorderStub.scvd: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | -------------------------------------------------------------------------------- /project/uVision5/JLinkSettings.ini: -------------------------------------------------------------------------------- 1 | [BREAKPOINTS] 2 | ForceImpTypeAny = 0 3 | ShowInfoWin = 1 4 | EnableFlashBP = 2 5 | BPDuringExecution = 0 6 | [CFI] 7 | CFISize = 0x00 8 | CFIAddr = 0x00 9 | [CPU] 10 | MonModeVTableAddr = 0xFFFFFFFF 11 | MonModeDebug = 0 12 | MaxNumAPs = 0 13 | LowPowerHandlingMode = 0 14 | OverrideMemMap = 0 15 | AllowSimulation = 1 16 | ScriptFile="" 17 | [FLASH] 18 | CacheExcludeSize = 0x00 19 | CacheExcludeAddr = 0x00 20 | MinNumBytesFlashDL = 0 21 | SkipProgOnCRCMatch = 1 22 | VerifyDownload = 1 23 | AllowCaching = 1 24 | EnableFlashDL = 2 25 | Override = 0 26 | Device="ARM7" 27 | [GENERAL] 28 | WorkRAMSize = 0x00 29 | WorkRAMAddr = 0x00 30 | RAMUsageLimit = 0x00 31 | [SWO] 32 | SWOLogFile="" 33 | [MEM] 34 | RdOverrideOrMask = 0x00 35 | RdOverrideAndMask = 0xFFFFFFFF 36 | RdOverrideAddr = 0xFFFFFFFF 37 | WrOverrideOrMask = 0x00 38 | WrOverrideAndMask = 0xFFFFFFFF 39 | WrOverrideAddr = 0xFFFFFFFF 40 | -------------------------------------------------------------------------------- /project/uVision5/Objects/ExtDll.iex: -------------------------------------------------------------------------------- 1 | [EXTDLL] 2 | Count=0 3 | -------------------------------------------------------------------------------- /project/uVision5/Objects/F103Cx_FreeRTOS_emptyPrj.axf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/project/uVision5/Objects/F103Cx_FreeRTOS_emptyPrj.axf -------------------------------------------------------------------------------- /project/uVision5/Objects/F103Cx_FreeRTOS_emptyPrj.build_log.htm: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/project/uVision5/Objects/F103Cx_FreeRTOS_emptyPrj.build_log.htm -------------------------------------------------------------------------------- /project/uVision5/Objects/F103Cx_FreeRTOS_emptyPrj.lnp: -------------------------------------------------------------------------------- 1 | --cpu Cortex-M3 2 | ".\objects\startup_stm32f10x_md.o" 3 | ".\objects\core_cm3.o" 4 | ".\objects\system_stm32f10x.o" 5 | ".\objects\misc.o" 6 | ".\objects\stm32f10x_adc.o" 7 | ".\objects\stm32f10x_bkp.o" 8 | ".\objects\stm32f10x_can.o" 9 | ".\objects\stm32f10x_cec.o" 10 | ".\objects\stm32f10x_crc.o" 11 | ".\objects\stm32f10x_dac.o" 12 | ".\objects\stm32f10x_dbgmcu.o" 13 | ".\objects\stm32f10x_dma.o" 14 | ".\objects\stm32f10x_exti.o" 15 | ".\objects\stm32f10x_flash.o" 16 | ".\objects\stm32f10x_fsmc.o" 17 | ".\objects\stm32f10x_gpio.o" 18 | ".\objects\stm32f10x_i2c.o" 19 | ".\objects\stm32f10x_iwdg.o" 20 | ".\objects\stm32f10x_pwr.o" 21 | ".\objects\stm32f10x_rcc.o" 22 | ".\objects\stm32f10x_rtc.o" 23 | ".\objects\stm32f10x_sdio.o" 24 | ".\objects\stm32f10x_spi.o" 25 | ".\objects\stm32f10x_tim.o" 26 | ".\objects\stm32f10x_usart.o" 27 | ".\objects\stm32f10x_wwdg.o" 28 | ".\objects\main.o" 29 | ".\objects\stm32f10x_it.o" 30 | ".\objects\delay.o" 31 | ".\objects\sys.o" 32 | ".\objects\usart.o" 33 | ".\objects\structure.o" 34 | ".\objects\led.o" 35 | ".\objects\uart1.o" 36 | ".\objects\uart2.o" 37 | ".\objects\uart3.o" 38 | ".\objects\timer3.o" 39 | ".\objects\wifi.o" 40 | ".\objects\spi1.o" 41 | ".\objects\oled.o" 42 | ".\objects\croutine.o" 43 | ".\objects\event_groups.o" 44 | ".\objects\list.o" 45 | ".\objects\queue.o" 46 | ".\objects\tasks.o" 47 | ".\objects\timers.o" 48 | ".\objects\heap_4.o" 49 | ".\objects\port.o" 50 | ".\objects\onenet_http.o" 51 | ".\objects\seniverse_http.o" 52 | ".\objects\net_time.o" 53 | ".\objects\oled_ui.o" 54 | --strict --scatter ".\Objects\F103Cx_FreeRTOS_emptyPrj.sct" 55 | --summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols 56 | --info sizes --info totals --info unused --info veneers 57 | --list ".\Listings\F103Cx_FreeRTOS_emptyPrj.map" -o .\Objects\F103Cx_FreeRTOS_emptyPrj.axf -------------------------------------------------------------------------------- /project/uVision5/Objects/F103Cx_FreeRTOS_emptyPrj.sct: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00010000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00010000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | .ANY (+XO) 11 | } 12 | RW_IRAM1 0x20000000 0x00005000 { ; RW data 13 | .ANY (+RW +ZI) 14 | } 15 | } 16 | 17 | -------------------------------------------------------------------------------- /project/uVision5/Objects/F103Cx_FreeRTOS_emptyPrj_sct.Bak: -------------------------------------------------------------------------------- 1 | ; ************************************************************* 2 | ; *** Scatter-Loading Description File generated by uVision *** 3 | ; ************************************************************* 4 | 5 | LR_IROM1 0x08000000 0x00010000 { ; load region size_region 6 | ER_IROM1 0x08000000 0x00010000 { ; load address = execution address 7 | *.o (RESET, +First) 8 | *(InRoot$$Sections) 9 | .ANY (+RO) 10 | } 11 | RW_IRAM1 0x20000000 0x00005000 { ; RW data 12 | .ANY (+RW +ZI) 13 | } 14 | } 15 | 16 | -------------------------------------------------------------------------------- /stdLib/inc/stm32f10x_bkp.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_bkp.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the BKP firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_BKP_H 25 | #define __STM32F10x_BKP_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup BKP 39 | * @{ 40 | */ 41 | 42 | /** @defgroup BKP_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup BKP_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup Tamper_Pin_active_level 55 | * @{ 56 | */ 57 | 58 | #define BKP_TamperPinLevel_High ((uint16_t)0x0000) 59 | #define BKP_TamperPinLevel_Low ((uint16_t)0x0001) 60 | #define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \ 61 | ((LEVEL) == BKP_TamperPinLevel_Low)) 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup RTC_output_source_to_output_on_the_Tamper_pin 67 | * @{ 68 | */ 69 | 70 | #define BKP_RTCOutputSource_None ((uint16_t)0x0000) 71 | #define BKP_RTCOutputSource_CalibClock ((uint16_t)0x0080) 72 | #define BKP_RTCOutputSource_Alarm ((uint16_t)0x0100) 73 | #define BKP_RTCOutputSource_Second ((uint16_t)0x0300) 74 | #define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \ 75 | ((SOURCE) == BKP_RTCOutputSource_CalibClock) || \ 76 | ((SOURCE) == BKP_RTCOutputSource_Alarm) || \ 77 | ((SOURCE) == BKP_RTCOutputSource_Second)) 78 | /** 79 | * @} 80 | */ 81 | 82 | /** @defgroup Data_Backup_Register 83 | * @{ 84 | */ 85 | 86 | #define BKP_DR1 ((uint16_t)0x0004) 87 | #define BKP_DR2 ((uint16_t)0x0008) 88 | #define BKP_DR3 ((uint16_t)0x000C) 89 | #define BKP_DR4 ((uint16_t)0x0010) 90 | #define BKP_DR5 ((uint16_t)0x0014) 91 | #define BKP_DR6 ((uint16_t)0x0018) 92 | #define BKP_DR7 ((uint16_t)0x001C) 93 | #define BKP_DR8 ((uint16_t)0x0020) 94 | #define BKP_DR9 ((uint16_t)0x0024) 95 | #define BKP_DR10 ((uint16_t)0x0028) 96 | #define BKP_DR11 ((uint16_t)0x0040) 97 | #define BKP_DR12 ((uint16_t)0x0044) 98 | #define BKP_DR13 ((uint16_t)0x0048) 99 | #define BKP_DR14 ((uint16_t)0x004C) 100 | #define BKP_DR15 ((uint16_t)0x0050) 101 | #define BKP_DR16 ((uint16_t)0x0054) 102 | #define BKP_DR17 ((uint16_t)0x0058) 103 | #define BKP_DR18 ((uint16_t)0x005C) 104 | #define BKP_DR19 ((uint16_t)0x0060) 105 | #define BKP_DR20 ((uint16_t)0x0064) 106 | #define BKP_DR21 ((uint16_t)0x0068) 107 | #define BKP_DR22 ((uint16_t)0x006C) 108 | #define BKP_DR23 ((uint16_t)0x0070) 109 | #define BKP_DR24 ((uint16_t)0x0074) 110 | #define BKP_DR25 ((uint16_t)0x0078) 111 | #define BKP_DR26 ((uint16_t)0x007C) 112 | #define BKP_DR27 ((uint16_t)0x0080) 113 | #define BKP_DR28 ((uint16_t)0x0084) 114 | #define BKP_DR29 ((uint16_t)0x0088) 115 | #define BKP_DR30 ((uint16_t)0x008C) 116 | #define BKP_DR31 ((uint16_t)0x0090) 117 | #define BKP_DR32 ((uint16_t)0x0094) 118 | #define BKP_DR33 ((uint16_t)0x0098) 119 | #define BKP_DR34 ((uint16_t)0x009C) 120 | #define BKP_DR35 ((uint16_t)0x00A0) 121 | #define BKP_DR36 ((uint16_t)0x00A4) 122 | #define BKP_DR37 ((uint16_t)0x00A8) 123 | #define BKP_DR38 ((uint16_t)0x00AC) 124 | #define BKP_DR39 ((uint16_t)0x00B0) 125 | #define BKP_DR40 ((uint16_t)0x00B4) 126 | #define BKP_DR41 ((uint16_t)0x00B8) 127 | #define BKP_DR42 ((uint16_t)0x00BC) 128 | 129 | #define IS_BKP_DR(DR) (((DR) == BKP_DR1) || ((DR) == BKP_DR2) || ((DR) == BKP_DR3) || \ 130 | ((DR) == BKP_DR4) || ((DR) == BKP_DR5) || ((DR) == BKP_DR6) || \ 131 | ((DR) == BKP_DR7) || ((DR) == BKP_DR8) || ((DR) == BKP_DR9) || \ 132 | ((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || \ 133 | ((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || \ 134 | ((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || \ 135 | ((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || \ 136 | ((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || \ 137 | ((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || \ 138 | ((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || \ 139 | ((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || \ 140 | ((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || \ 141 | ((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || \ 142 | ((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42)) 143 | 144 | #define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F) 145 | /** 146 | * @} 147 | */ 148 | 149 | /** 150 | * @} 151 | */ 152 | 153 | /** @defgroup BKP_Exported_Macros 154 | * @{ 155 | */ 156 | 157 | /** 158 | * @} 159 | */ 160 | 161 | /** @defgroup BKP_Exported_Functions 162 | * @{ 163 | */ 164 | 165 | void BKP_DeInit(void); 166 | void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel); 167 | void BKP_TamperPinCmd(FunctionalState NewState); 168 | void BKP_ITConfig(FunctionalState NewState); 169 | void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource); 170 | void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue); 171 | void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data); 172 | uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR); 173 | FlagStatus BKP_GetFlagStatus(void); 174 | void BKP_ClearFlag(void); 175 | ITStatus BKP_GetITStatus(void); 176 | void BKP_ClearITPendingBit(void); 177 | 178 | #ifdef __cplusplus 179 | } 180 | #endif 181 | 182 | #endif /* __STM32F10x_BKP_H */ 183 | /** 184 | * @} 185 | */ 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | /** 192 | * @} 193 | */ 194 | 195 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 196 | -------------------------------------------------------------------------------- /stdLib/inc/stm32f10x_cec.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_cec.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the CEC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_CEC_H 25 | #define __STM32F10x_CEC_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup CEC 39 | * @{ 40 | */ 41 | 42 | 43 | /** @defgroup CEC_Exported_Types 44 | * @{ 45 | */ 46 | 47 | /** 48 | * @brief CEC Init structure definition 49 | */ 50 | typedef struct 51 | { 52 | uint16_t CEC_BitTimingMode; /*!< Configures the CEC Bit Timing Error Mode. 53 | This parameter can be a value of @ref CEC_BitTiming_Mode */ 54 | uint16_t CEC_BitPeriodMode; /*!< Configures the CEC Bit Period Error Mode. 55 | This parameter can be a value of @ref CEC_BitPeriod_Mode */ 56 | }CEC_InitTypeDef; 57 | 58 | /** 59 | * @} 60 | */ 61 | 62 | /** @defgroup CEC_Exported_Constants 63 | * @{ 64 | */ 65 | 66 | /** @defgroup CEC_BitTiming_Mode 67 | * @{ 68 | */ 69 | #define CEC_BitTimingStdMode ((uint16_t)0x00) /*!< Bit timing error Standard Mode */ 70 | #define CEC_BitTimingErrFreeMode CEC_CFGR_BTEM /*!< Bit timing error Free Mode */ 71 | 72 | #define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BitTimingStdMode) || \ 73 | ((MODE) == CEC_BitTimingErrFreeMode)) 74 | /** 75 | * @} 76 | */ 77 | 78 | /** @defgroup CEC_BitPeriod_Mode 79 | * @{ 80 | */ 81 | #define CEC_BitPeriodStdMode ((uint16_t)0x00) /*!< Bit period error Standard Mode */ 82 | #define CEC_BitPeriodFlexibleMode CEC_CFGR_BPEM /*!< Bit period error Flexible Mode */ 83 | 84 | #define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BitPeriodStdMode) || \ 85 | ((MODE) == CEC_BitPeriodFlexibleMode)) 86 | /** 87 | * @} 88 | */ 89 | 90 | 91 | /** @defgroup CEC_interrupts_definition 92 | * @{ 93 | */ 94 | #define CEC_IT_TERR CEC_CSR_TERR 95 | #define CEC_IT_TBTRF CEC_CSR_TBTRF 96 | #define CEC_IT_RERR CEC_CSR_RERR 97 | #define CEC_IT_RBTF CEC_CSR_RBTF 98 | #define IS_CEC_GET_IT(IT) (((IT) == CEC_IT_TERR) || ((IT) == CEC_IT_TBTRF) || \ 99 | ((IT) == CEC_IT_RERR) || ((IT) == CEC_IT_RBTF)) 100 | /** 101 | * @} 102 | */ 103 | 104 | 105 | /** @defgroup CEC_Own_Address 106 | * @{ 107 | */ 108 | #define IS_CEC_ADDRESS(ADDRESS) ((ADDRESS) < 0x10) 109 | /** 110 | * @} 111 | */ 112 | 113 | /** @defgroup CEC_Prescaler 114 | * @{ 115 | */ 116 | #define IS_CEC_PRESCALER(PRESCALER) ((PRESCALER) <= 0x3FFF) 117 | 118 | /** 119 | * @} 120 | */ 121 | 122 | /** @defgroup CEC_flags_definition 123 | * @{ 124 | */ 125 | 126 | /** 127 | * @brief ESR register flags 128 | */ 129 | #define CEC_FLAG_BTE ((uint32_t)0x10010000) 130 | #define CEC_FLAG_BPE ((uint32_t)0x10020000) 131 | #define CEC_FLAG_RBTFE ((uint32_t)0x10040000) 132 | #define CEC_FLAG_SBE ((uint32_t)0x10080000) 133 | #define CEC_FLAG_ACKE ((uint32_t)0x10100000) 134 | #define CEC_FLAG_LINE ((uint32_t)0x10200000) 135 | #define CEC_FLAG_TBTFE ((uint32_t)0x10400000) 136 | 137 | /** 138 | * @brief CSR register flags 139 | */ 140 | #define CEC_FLAG_TEOM ((uint32_t)0x00000002) 141 | #define CEC_FLAG_TERR ((uint32_t)0x00000004) 142 | #define CEC_FLAG_TBTRF ((uint32_t)0x00000008) 143 | #define CEC_FLAG_RSOM ((uint32_t)0x00000010) 144 | #define CEC_FLAG_REOM ((uint32_t)0x00000020) 145 | #define CEC_FLAG_RERR ((uint32_t)0x00000040) 146 | #define CEC_FLAG_RBTF ((uint32_t)0x00000080) 147 | 148 | #define IS_CEC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF03) == 0x00) && ((FLAG) != 0x00)) 149 | 150 | #define IS_CEC_GET_FLAG(FLAG) (((FLAG) == CEC_FLAG_BTE) || ((FLAG) == CEC_FLAG_BPE) || \ 151 | ((FLAG) == CEC_FLAG_RBTFE) || ((FLAG)== CEC_FLAG_SBE) || \ 152 | ((FLAG) == CEC_FLAG_ACKE) || ((FLAG) == CEC_FLAG_LINE) || \ 153 | ((FLAG) == CEC_FLAG_TBTFE) || ((FLAG) == CEC_FLAG_TEOM) || \ 154 | ((FLAG) == CEC_FLAG_TERR) || ((FLAG) == CEC_FLAG_TBTRF) || \ 155 | ((FLAG) == CEC_FLAG_RSOM) || ((FLAG) == CEC_FLAG_REOM) || \ 156 | ((FLAG) == CEC_FLAG_RERR) || ((FLAG) == CEC_FLAG_RBTF)) 157 | 158 | /** 159 | * @} 160 | */ 161 | 162 | /** 163 | * @} 164 | */ 165 | 166 | /** @defgroup CEC_Exported_Macros 167 | * @{ 168 | */ 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** @defgroup CEC_Exported_Functions 175 | * @{ 176 | */ 177 | void CEC_DeInit(void); 178 | void CEC_Init(CEC_InitTypeDef* CEC_InitStruct); 179 | void CEC_Cmd(FunctionalState NewState); 180 | void CEC_ITConfig(FunctionalState NewState); 181 | void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress); 182 | void CEC_SetPrescaler(uint16_t CEC_Prescaler); 183 | void CEC_SendDataByte(uint8_t Data); 184 | uint8_t CEC_ReceiveDataByte(void); 185 | void CEC_StartOfMessage(void); 186 | void CEC_EndOfMessageCmd(FunctionalState NewState); 187 | FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG); 188 | void CEC_ClearFlag(uint32_t CEC_FLAG); 189 | ITStatus CEC_GetITStatus(uint8_t CEC_IT); 190 | void CEC_ClearITPendingBit(uint16_t CEC_IT); 191 | 192 | #ifdef __cplusplus 193 | } 194 | #endif 195 | 196 | #endif /* __STM32F10x_CEC_H */ 197 | 198 | /** 199 | * @} 200 | */ 201 | 202 | /** 203 | * @} 204 | */ 205 | 206 | /** 207 | * @} 208 | */ 209 | 210 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 211 | -------------------------------------------------------------------------------- /stdLib/inc/stm32f10x_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_crc.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the CRC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_CRC_H 25 | #define __STM32F10x_CRC_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup CRC 39 | * @{ 40 | */ 41 | 42 | /** @defgroup CRC_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup CRC_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** 55 | * @} 56 | */ 57 | 58 | /** @defgroup CRC_Exported_Macros 59 | * @{ 60 | */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup CRC_Exported_Functions 67 | * @{ 68 | */ 69 | 70 | void CRC_ResetDR(void); 71 | uint32_t CRC_CalcCRC(uint32_t Data); 72 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength); 73 | uint32_t CRC_GetCRC(void); 74 | void CRC_SetIDRegister(uint8_t IDValue); 75 | uint8_t CRC_GetIDRegister(void); 76 | 77 | #ifdef __cplusplus 78 | } 79 | #endif 80 | 81 | #endif /* __STM32F10x_CRC_H */ 82 | /** 83 | * @} 84 | */ 85 | 86 | /** 87 | * @} 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 95 | -------------------------------------------------------------------------------- /stdLib/inc/stm32f10x_dbgmcu.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_dbgmcu.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the DBGMCU 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_DBGMCU_H 25 | #define __STM32F10x_DBGMCU_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup DBGMCU 39 | * @{ 40 | */ 41 | 42 | /** @defgroup DBGMCU_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup DBGMCU_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | #define DBGMCU_SLEEP ((uint32_t)0x00000001) 55 | #define DBGMCU_STOP ((uint32_t)0x00000002) 56 | #define DBGMCU_STANDBY ((uint32_t)0x00000004) 57 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00000100) 58 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000200) 59 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000400) 60 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000800) 61 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00001000) 62 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00002000) 63 | #define DBGMCU_CAN1_STOP ((uint32_t)0x00004000) 64 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) 65 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) 66 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00020000) 67 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00040000) 68 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00080000) 69 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00100000) 70 | #define DBGMCU_CAN2_STOP ((uint32_t)0x00200000) 71 | #define DBGMCU_TIM15_STOP ((uint32_t)0x00400000) 72 | #define DBGMCU_TIM16_STOP ((uint32_t)0x00800000) 73 | #define DBGMCU_TIM17_STOP ((uint32_t)0x01000000) 74 | #define DBGMCU_TIM12_STOP ((uint32_t)0x02000000) 75 | #define DBGMCU_TIM13_STOP ((uint32_t)0x04000000) 76 | #define DBGMCU_TIM14_STOP ((uint32_t)0x08000000) 77 | #define DBGMCU_TIM9_STOP ((uint32_t)0x10000000) 78 | #define DBGMCU_TIM10_STOP ((uint32_t)0x20000000) 79 | #define DBGMCU_TIM11_STOP ((uint32_t)0x40000000) 80 | 81 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00)) 82 | /** 83 | * @} 84 | */ 85 | 86 | /** @defgroup DBGMCU_Exported_Macros 87 | * @{ 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /** @defgroup DBGMCU_Exported_Functions 95 | * @{ 96 | */ 97 | 98 | uint32_t DBGMCU_GetREVID(void); 99 | uint32_t DBGMCU_GetDEVID(void); 100 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); 101 | 102 | #ifdef __cplusplus 103 | } 104 | #endif 105 | 106 | #endif /* __STM32F10x_DBGMCU_H */ 107 | /** 108 | * @} 109 | */ 110 | 111 | /** 112 | * @} 113 | */ 114 | 115 | /** 116 | * @} 117 | */ 118 | 119 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 120 | -------------------------------------------------------------------------------- /stdLib/inc/stm32f10x_exti.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_exti.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the EXTI firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_EXTI_H 25 | #define __STM32F10x_EXTI_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup EXTI 39 | * @{ 40 | */ 41 | 42 | /** @defgroup EXTI_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @brief EXTI mode enumeration 48 | */ 49 | 50 | typedef enum 51 | { 52 | EXTI_Mode_Interrupt = 0x00, 53 | EXTI_Mode_Event = 0x04 54 | }EXTIMode_TypeDef; 55 | 56 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event)) 57 | 58 | /** 59 | * @brief EXTI Trigger enumeration 60 | */ 61 | 62 | typedef enum 63 | { 64 | EXTI_Trigger_Rising = 0x08, 65 | EXTI_Trigger_Falling = 0x0C, 66 | EXTI_Trigger_Rising_Falling = 0x10 67 | }EXTITrigger_TypeDef; 68 | 69 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \ 70 | ((TRIGGER) == EXTI_Trigger_Falling) || \ 71 | ((TRIGGER) == EXTI_Trigger_Rising_Falling)) 72 | /** 73 | * @brief EXTI Init Structure definition 74 | */ 75 | 76 | typedef struct 77 | { 78 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled. 79 | This parameter can be any combination of @ref EXTI_Lines */ 80 | 81 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines. 82 | This parameter can be a value of @ref EXTIMode_TypeDef */ 83 | 84 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. 85 | This parameter can be a value of @ref EXTIMode_TypeDef */ 86 | 87 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines. 88 | This parameter can be set either to ENABLE or DISABLE */ 89 | }EXTI_InitTypeDef; 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** @defgroup EXTI_Exported_Constants 96 | * @{ 97 | */ 98 | 99 | /** @defgroup EXTI_Lines 100 | * @{ 101 | */ 102 | 103 | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */ 104 | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */ 105 | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */ 106 | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */ 107 | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */ 108 | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */ 109 | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */ 110 | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */ 111 | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */ 112 | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */ 113 | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */ 114 | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */ 115 | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */ 116 | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */ 117 | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */ 118 | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */ 119 | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */ 120 | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */ 121 | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS 122 | Wakeup from suspend event */ 123 | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */ 124 | 125 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00)) 126 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \ 127 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \ 128 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \ 129 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \ 130 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \ 131 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \ 132 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \ 133 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \ 134 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \ 135 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19)) 136 | 137 | 138 | /** 139 | * @} 140 | */ 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | /** @defgroup EXTI_Exported_Macros 147 | * @{ 148 | */ 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /** @defgroup EXTI_Exported_Functions 155 | * @{ 156 | */ 157 | 158 | void EXTI_DeInit(void); 159 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); 160 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); 161 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); 162 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); 163 | void EXTI_ClearFlag(uint32_t EXTI_Line); 164 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); 165 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line); 166 | 167 | #ifdef __cplusplus 168 | } 169 | #endif 170 | 171 | #endif /* __STM32F10x_EXTI_H */ 172 | /** 173 | * @} 174 | */ 175 | 176 | /** 177 | * @} 178 | */ 179 | 180 | /** 181 | * @} 182 | */ 183 | 184 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 185 | -------------------------------------------------------------------------------- /stdLib/inc/stm32f10x_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_iwdg.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the IWDG 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_IWDG_H 25 | #define __STM32F10x_IWDG_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup IWDG 39 | * @{ 40 | */ 41 | 42 | /** @defgroup IWDG_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup IWDG_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup IWDG_WriteAccess 55 | * @{ 56 | */ 57 | 58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) 59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000) 60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ 61 | ((ACCESS) == IWDG_WriteAccess_Disable)) 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup IWDG_prescaler 67 | * @{ 68 | */ 69 | 70 | #define IWDG_Prescaler_4 ((uint8_t)0x00) 71 | #define IWDG_Prescaler_8 ((uint8_t)0x01) 72 | #define IWDG_Prescaler_16 ((uint8_t)0x02) 73 | #define IWDG_Prescaler_32 ((uint8_t)0x03) 74 | #define IWDG_Prescaler_64 ((uint8_t)0x04) 75 | #define IWDG_Prescaler_128 ((uint8_t)0x05) 76 | #define IWDG_Prescaler_256 ((uint8_t)0x06) 77 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ 78 | ((PRESCALER) == IWDG_Prescaler_8) || \ 79 | ((PRESCALER) == IWDG_Prescaler_16) || \ 80 | ((PRESCALER) == IWDG_Prescaler_32) || \ 81 | ((PRESCALER) == IWDG_Prescaler_64) || \ 82 | ((PRESCALER) == IWDG_Prescaler_128)|| \ 83 | ((PRESCALER) == IWDG_Prescaler_256)) 84 | /** 85 | * @} 86 | */ 87 | 88 | /** @defgroup IWDG_Flag 89 | * @{ 90 | */ 91 | 92 | #define IWDG_FLAG_PVU ((uint16_t)0x0001) 93 | #define IWDG_FLAG_RVU ((uint16_t)0x0002) 94 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU)) 95 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | /** @defgroup IWDG_Exported_Macros 105 | * @{ 106 | */ 107 | 108 | /** 109 | * @} 110 | */ 111 | 112 | /** @defgroup IWDG_Exported_Functions 113 | * @{ 114 | */ 115 | 116 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); 117 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); 118 | void IWDG_SetReload(uint16_t Reload); 119 | void IWDG_ReloadCounter(void); 120 | void IWDG_Enable(void); 121 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); 122 | 123 | #ifdef __cplusplus 124 | } 125 | #endif 126 | 127 | #endif /* __STM32F10x_IWDG_H */ 128 | /** 129 | * @} 130 | */ 131 | 132 | /** 133 | * @} 134 | */ 135 | 136 | /** 137 | * @} 138 | */ 139 | 140 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 141 | -------------------------------------------------------------------------------- /stdLib/inc/stm32f10x_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_pwr.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the PWR firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_PWR_H 25 | #define __STM32F10x_PWR_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup PWR 39 | * @{ 40 | */ 41 | 42 | /** @defgroup PWR_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup PWR_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup PVD_detection_level 55 | * @{ 56 | */ 57 | 58 | #define PWR_PVDLevel_2V2 ((uint32_t)0x00000000) 59 | #define PWR_PVDLevel_2V3 ((uint32_t)0x00000020) 60 | #define PWR_PVDLevel_2V4 ((uint32_t)0x00000040) 61 | #define PWR_PVDLevel_2V5 ((uint32_t)0x00000060) 62 | #define PWR_PVDLevel_2V6 ((uint32_t)0x00000080) 63 | #define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0) 64 | #define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0) 65 | #define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0) 66 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \ 67 | ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \ 68 | ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \ 69 | ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9)) 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @defgroup Regulator_state_is_STOP_mode 75 | * @{ 76 | */ 77 | 78 | #define PWR_Regulator_ON ((uint32_t)0x00000000) 79 | #define PWR_Regulator_LowPower ((uint32_t)0x00000001) 80 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \ 81 | ((REGULATOR) == PWR_Regulator_LowPower)) 82 | /** 83 | * @} 84 | */ 85 | 86 | /** @defgroup STOP_mode_entry 87 | * @{ 88 | */ 89 | 90 | #define PWR_STOPEntry_WFI ((uint8_t)0x01) 91 | #define PWR_STOPEntry_WFE ((uint8_t)0x02) 92 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE)) 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | /** @defgroup PWR_Flag 99 | * @{ 100 | */ 101 | 102 | #define PWR_FLAG_WU ((uint32_t)0x00000001) 103 | #define PWR_FLAG_SB ((uint32_t)0x00000002) 104 | #define PWR_FLAG_PVDO ((uint32_t)0x00000004) 105 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ 106 | ((FLAG) == PWR_FLAG_PVDO)) 107 | 108 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB)) 109 | /** 110 | * @} 111 | */ 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | /** @defgroup PWR_Exported_Macros 118 | * @{ 119 | */ 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | /** @defgroup PWR_Exported_Functions 126 | * @{ 127 | */ 128 | 129 | void PWR_DeInit(void); 130 | void PWR_BackupAccessCmd(FunctionalState NewState); 131 | void PWR_PVDCmd(FunctionalState NewState); 132 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); 133 | void PWR_WakeUpPinCmd(FunctionalState NewState); 134 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); 135 | void PWR_EnterSTANDBYMode(void); 136 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); 137 | void PWR_ClearFlag(uint32_t PWR_FLAG); 138 | 139 | #ifdef __cplusplus 140 | } 141 | #endif 142 | 143 | #endif /* __STM32F10x_PWR_H */ 144 | /** 145 | * @} 146 | */ 147 | 148 | /** 149 | * @} 150 | */ 151 | 152 | /** 153 | * @} 154 | */ 155 | 156 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 157 | -------------------------------------------------------------------------------- /stdLib/inc/stm32f10x_rtc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_rtc.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the RTC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_RTC_H 25 | #define __STM32F10x_RTC_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup RTC 39 | * @{ 40 | */ 41 | 42 | /** @defgroup RTC_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup RTC_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup RTC_interrupts_define 55 | * @{ 56 | */ 57 | 58 | #define RTC_IT_OW ((uint16_t)0x0004) /*!< Overflow interrupt */ 59 | #define RTC_IT_ALR ((uint16_t)0x0002) /*!< Alarm interrupt */ 60 | #define RTC_IT_SEC ((uint16_t)0x0001) /*!< Second interrupt */ 61 | #define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00)) 62 | #define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \ 63 | ((IT) == RTC_IT_SEC)) 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup RTC_interrupts_flags 69 | * @{ 70 | */ 71 | 72 | #define RTC_FLAG_RTOFF ((uint16_t)0x0020) /*!< RTC Operation OFF flag */ 73 | #define RTC_FLAG_RSF ((uint16_t)0x0008) /*!< Registers Synchronized flag */ 74 | #define RTC_FLAG_OW ((uint16_t)0x0004) /*!< Overflow flag */ 75 | #define RTC_FLAG_ALR ((uint16_t)0x0002) /*!< Alarm flag */ 76 | #define RTC_FLAG_SEC ((uint16_t)0x0001) /*!< Second flag */ 77 | #define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00)) 78 | #define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \ 79 | ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \ 80 | ((FLAG) == RTC_FLAG_SEC)) 81 | #define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF) 82 | 83 | /** 84 | * @} 85 | */ 86 | 87 | /** 88 | * @} 89 | */ 90 | 91 | /** @defgroup RTC_Exported_Macros 92 | * @{ 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | /** @defgroup RTC_Exported_Functions 100 | * @{ 101 | */ 102 | 103 | void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState); 104 | void RTC_EnterConfigMode(void); 105 | void RTC_ExitConfigMode(void); 106 | uint32_t RTC_GetCounter(void); 107 | void RTC_SetCounter(uint32_t CounterValue); 108 | void RTC_SetPrescaler(uint32_t PrescalerValue); 109 | void RTC_SetAlarm(uint32_t AlarmValue); 110 | uint32_t RTC_GetDivider(void); 111 | void RTC_WaitForLastTask(void); 112 | void RTC_WaitForSynchro(void); 113 | FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG); 114 | void RTC_ClearFlag(uint16_t RTC_FLAG); 115 | ITStatus RTC_GetITStatus(uint16_t RTC_IT); 116 | void RTC_ClearITPendingBit(uint16_t RTC_IT); 117 | 118 | #ifdef __cplusplus 119 | } 120 | #endif 121 | 122 | #endif /* __STM32F10x_RTC_H */ 123 | /** 124 | * @} 125 | */ 126 | 127 | /** 128 | * @} 129 | */ 130 | 131 | /** 132 | * @} 133 | */ 134 | 135 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 136 | -------------------------------------------------------------------------------- /stdLib/inc/stm32f10x_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_wwdg.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the WWDG firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_WWDG_H 25 | #define __STM32F10x_WWDG_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup WWDG 39 | * @{ 40 | */ 41 | 42 | /** @defgroup WWDG_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup WWDG_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup WWDG_Prescaler 55 | * @{ 56 | */ 57 | 58 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000) 59 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080) 60 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100) 61 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180) 62 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \ 63 | ((PRESCALER) == WWDG_Prescaler_2) || \ 64 | ((PRESCALER) == WWDG_Prescaler_4) || \ 65 | ((PRESCALER) == WWDG_Prescaler_8)) 66 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F) 67 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F)) 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /** @defgroup WWDG_Exported_Macros 78 | * @{ 79 | */ 80 | /** 81 | * @} 82 | */ 83 | 84 | /** @defgroup WWDG_Exported_Functions 85 | * @{ 86 | */ 87 | 88 | void WWDG_DeInit(void); 89 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); 90 | void WWDG_SetWindowValue(uint8_t WindowValue); 91 | void WWDG_EnableIT(void); 92 | void WWDG_SetCounter(uint8_t Counter); 93 | void WWDG_Enable(uint8_t Counter); 94 | FlagStatus WWDG_GetFlagStatus(void); 95 | void WWDG_ClearFlag(void); 96 | 97 | #ifdef __cplusplus 98 | } 99 | #endif 100 | 101 | #endif /* __STM32F10x_WWDG_H */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | /** 112 | * @} 113 | */ 114 | 115 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 116 | -------------------------------------------------------------------------------- /stdLib/src/misc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file misc.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the miscellaneous firmware functions (add-on 8 | * to CMSIS functions). 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "misc.h" 25 | 26 | /** @addtogroup STM32F10x_StdPeriph_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup MISC 31 | * @brief MISC driver modules 32 | * @{ 33 | */ 34 | 35 | /** @defgroup MISC_Private_TypesDefinitions 36 | * @{ 37 | */ 38 | 39 | /** 40 | * @} 41 | */ 42 | 43 | /** @defgroup MISC_Private_Defines 44 | * @{ 45 | */ 46 | 47 | #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000) 48 | /** 49 | * @} 50 | */ 51 | 52 | /** @defgroup MISC_Private_Macros 53 | * @{ 54 | */ 55 | 56 | /** 57 | * @} 58 | */ 59 | 60 | /** @defgroup MISC_Private_Variables 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup MISC_Private_FunctionPrototypes 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** @defgroup MISC_Private_Functions 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief Configures the priority grouping: pre-emption priority and subpriority. 82 | * @param NVIC_PriorityGroup: specifies the priority grouping bits length. 83 | * This parameter can be one of the following values: 84 | * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority 85 | * 4 bits for subpriority 86 | * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority 87 | * 3 bits for subpriority 88 | * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority 89 | * 2 bits for subpriority 90 | * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority 91 | * 1 bits for subpriority 92 | * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority 93 | * 0 bits for subpriority 94 | * @retval None 95 | */ 96 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup) 97 | { 98 | /* Check the parameters */ 99 | assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup)); 100 | 101 | /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */ 102 | SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup; 103 | } 104 | 105 | /** 106 | * @brief Initializes the NVIC peripheral according to the specified 107 | * parameters in the NVIC_InitStruct. 108 | * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains 109 | * the configuration information for the specified NVIC peripheral. 110 | * @retval None 111 | */ 112 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct) 113 | { 114 | uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F; 115 | 116 | /* Check the parameters */ 117 | assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd)); 118 | assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority)); 119 | assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority)); 120 | 121 | if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE) 122 | { 123 | /* Compute the Corresponding IRQ Priority --------------------------------*/ 124 | tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08; 125 | tmppre = (0x4 - tmppriority); 126 | tmpsub = tmpsub >> tmppriority; 127 | 128 | tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre; 129 | tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub; 130 | tmppriority = tmppriority << 0x04; 131 | 132 | NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority; 133 | 134 | /* Enable the Selected IRQ Channels --------------------------------------*/ 135 | NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = 136 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); 137 | } 138 | else 139 | { 140 | /* Disable the Selected IRQ Channels -------------------------------------*/ 141 | NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = 142 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); 143 | } 144 | } 145 | 146 | /** 147 | * @brief Sets the vector table location and Offset. 148 | * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory. 149 | * This parameter can be one of the following values: 150 | * @arg NVIC_VectTab_RAM 151 | * @arg NVIC_VectTab_FLASH 152 | * @param Offset: Vector Table base offset field. This value must be a multiple 153 | * of 0x200. 154 | * @retval None 155 | */ 156 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset) 157 | { 158 | /* Check the parameters */ 159 | assert_param(IS_NVIC_VECTTAB(NVIC_VectTab)); 160 | assert_param(IS_NVIC_OFFSET(Offset)); 161 | 162 | SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80); 163 | } 164 | 165 | /** 166 | * @brief Selects the condition for the system to enter low power mode. 167 | * @param LowPowerMode: Specifies the new mode for the system to enter low power mode. 168 | * This parameter can be one of the following values: 169 | * @arg NVIC_LP_SEVONPEND 170 | * @arg NVIC_LP_SLEEPDEEP 171 | * @arg NVIC_LP_SLEEPONEXIT 172 | * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE. 173 | * @retval None 174 | */ 175 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState) 176 | { 177 | /* Check the parameters */ 178 | assert_param(IS_NVIC_LP(LowPowerMode)); 179 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 180 | 181 | if (NewState != DISABLE) 182 | { 183 | SCB->SCR |= LowPowerMode; 184 | } 185 | else 186 | { 187 | SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode); 188 | } 189 | } 190 | 191 | /** 192 | * @brief Configures the SysTick clock source. 193 | * @param SysTick_CLKSource: specifies the SysTick clock source. 194 | * This parameter can be one of the following values: 195 | * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source. 196 | * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source. 197 | * @retval None 198 | */ 199 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource) 200 | { 201 | /* Check the parameters */ 202 | assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource)); 203 | if (SysTick_CLKSource == SysTick_CLKSource_HCLK) 204 | { 205 | SysTick->CTRL |= SysTick_CLKSource_HCLK; 206 | } 207 | else 208 | { 209 | SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; 210 | } 211 | } 212 | 213 | /** 214 | * @} 215 | */ 216 | 217 | /** 218 | * @} 219 | */ 220 | 221 | /** 222 | * @} 223 | */ 224 | 225 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 226 | -------------------------------------------------------------------------------- /stdLib/src/stm32f10x_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_crc.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the CRC firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_crc.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup CRC 30 | * @brief CRC driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup CRC_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup CRC_Private_Defines 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup CRC_Private_Macros 51 | * @{ 52 | */ 53 | 54 | /** 55 | * @} 56 | */ 57 | 58 | /** @defgroup CRC_Private_Variables 59 | * @{ 60 | */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup CRC_Private_FunctionPrototypes 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @defgroup CRC_Private_Functions 75 | * @{ 76 | */ 77 | 78 | /** 79 | * @brief Resets the CRC Data register (DR). 80 | * @param None 81 | * @retval None 82 | */ 83 | void CRC_ResetDR(void) 84 | { 85 | /* Reset CRC generator */ 86 | CRC->CR = CRC_CR_RESET; 87 | } 88 | 89 | /** 90 | * @brief Computes the 32-bit CRC of a given data word(32-bit). 91 | * @param Data: data word(32-bit) to compute its CRC 92 | * @retval 32-bit CRC 93 | */ 94 | uint32_t CRC_CalcCRC(uint32_t Data) 95 | { 96 | CRC->DR = Data; 97 | 98 | return (CRC->DR); 99 | } 100 | 101 | /** 102 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit). 103 | * @param pBuffer: pointer to the buffer containing the data to be computed 104 | * @param BufferLength: length of the buffer to be computed 105 | * @retval 32-bit CRC 106 | */ 107 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength) 108 | { 109 | uint32_t index = 0; 110 | 111 | for(index = 0; index < BufferLength; index++) 112 | { 113 | CRC->DR = pBuffer[index]; 114 | } 115 | return (CRC->DR); 116 | } 117 | 118 | /** 119 | * @brief Returns the current CRC value. 120 | * @param None 121 | * @retval 32-bit CRC 122 | */ 123 | uint32_t CRC_GetCRC(void) 124 | { 125 | return (CRC->DR); 126 | } 127 | 128 | /** 129 | * @brief Stores a 8-bit data in the Independent Data(ID) register. 130 | * @param IDValue: 8-bit value to be stored in the ID register 131 | * @retval None 132 | */ 133 | void CRC_SetIDRegister(uint8_t IDValue) 134 | { 135 | CRC->IDR = IDValue; 136 | } 137 | 138 | /** 139 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register 140 | * @param None 141 | * @retval 8-bit value of the ID register 142 | */ 143 | uint8_t CRC_GetIDRegister(void) 144 | { 145 | return (CRC->IDR); 146 | } 147 | 148 | /** 149 | * @} 150 | */ 151 | 152 | /** 153 | * @} 154 | */ 155 | 156 | /** 157 | * @} 158 | */ 159 | 160 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 161 | -------------------------------------------------------------------------------- /stdLib/src/stm32f10x_dbgmcu.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_dbgmcu.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the DBGMCU firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_dbgmcu.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup DBGMCU 30 | * @brief DBGMCU driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup DBGMCU_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup DBGMCU_Private_Defines 43 | * @{ 44 | */ 45 | 46 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF) 47 | /** 48 | * @} 49 | */ 50 | 51 | /** @defgroup DBGMCU_Private_Macros 52 | * @{ 53 | */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /** @defgroup DBGMCU_Private_Variables 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @defgroup DBGMCU_Private_FunctionPrototypes 68 | * @{ 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** @defgroup DBGMCU_Private_Functions 76 | * @{ 77 | */ 78 | 79 | /** 80 | * @brief Returns the device revision identifier. 81 | * @param None 82 | * @retval Device revision identifier 83 | */ 84 | uint32_t DBGMCU_GetREVID(void) 85 | { 86 | return(DBGMCU->IDCODE >> 16); 87 | } 88 | 89 | /** 90 | * @brief Returns the device identifier. 91 | * @param None 92 | * @retval Device identifier 93 | */ 94 | uint32_t DBGMCU_GetDEVID(void) 95 | { 96 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK); 97 | } 98 | 99 | /** 100 | * @brief Configures the specified peripheral and low power mode behavior 101 | * when the MCU under Debug mode. 102 | * @param DBGMCU_Periph: specifies the peripheral and low power mode. 103 | * This parameter can be any combination of the following values: 104 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode 105 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode 106 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode 107 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted 108 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted 109 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted 110 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted 111 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted 112 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted 113 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted 114 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted 115 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted 116 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted 117 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted 118 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted 119 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted 120 | * @arg DBGMCU_CAN2_STOP: Debug CAN2 stopped when Core is halted 121 | * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted 122 | * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted 123 | * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted 124 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted 125 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted 126 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted 127 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted 128 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted 129 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted 130 | * @param NewState: new state of the specified peripheral in Debug mode. 131 | * This parameter can be: ENABLE or DISABLE. 132 | * @retval None 133 | */ 134 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) 135 | { 136 | /* Check the parameters */ 137 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph)); 138 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 139 | 140 | if (NewState != DISABLE) 141 | { 142 | DBGMCU->CR |= DBGMCU_Periph; 143 | } 144 | else 145 | { 146 | DBGMCU->CR &= ~DBGMCU_Periph; 147 | } 148 | } 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /** 155 | * @} 156 | */ 157 | 158 | /** 159 | * @} 160 | */ 161 | 162 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 163 | -------------------------------------------------------------------------------- /stdLib/src/stm32f10x_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_exti.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the EXTI firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_exti.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup EXTI 30 | * @brief EXTI driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup EXTI_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup EXTI_Private_Defines 43 | * @{ 44 | */ 45 | 46 | #define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */ 47 | 48 | /** 49 | * @} 50 | */ 51 | 52 | /** @defgroup EXTI_Private_Macros 53 | * @{ 54 | */ 55 | 56 | /** 57 | * @} 58 | */ 59 | 60 | /** @defgroup EXTI_Private_Variables 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup EXTI_Private_FunctionPrototypes 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** @defgroup EXTI_Private_Functions 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief Deinitializes the EXTI peripheral registers to their default reset values. 82 | * @param None 83 | * @retval None 84 | */ 85 | void EXTI_DeInit(void) 86 | { 87 | EXTI->IMR = 0x00000000; 88 | EXTI->EMR = 0x00000000; 89 | EXTI->RTSR = 0x00000000; 90 | EXTI->FTSR = 0x00000000; 91 | EXTI->PR = 0x000FFFFF; 92 | } 93 | 94 | /** 95 | * @brief Initializes the EXTI peripheral according to the specified 96 | * parameters in the EXTI_InitStruct. 97 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure 98 | * that contains the configuration information for the EXTI peripheral. 99 | * @retval None 100 | */ 101 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct) 102 | { 103 | uint32_t tmp = 0; 104 | 105 | /* Check the parameters */ 106 | assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode)); 107 | assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger)); 108 | assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line)); 109 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd)); 110 | 111 | tmp = (uint32_t)EXTI_BASE; 112 | 113 | if (EXTI_InitStruct->EXTI_LineCmd != DISABLE) 114 | { 115 | /* Clear EXTI line configuration */ 116 | EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line; 117 | EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line; 118 | 119 | tmp += EXTI_InitStruct->EXTI_Mode; 120 | 121 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; 122 | 123 | /* Clear Rising Falling edge configuration */ 124 | EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line; 125 | EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line; 126 | 127 | /* Select the trigger for the selected external interrupts */ 128 | if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling) 129 | { 130 | /* Rising Falling edge */ 131 | EXTI->RTSR |= EXTI_InitStruct->EXTI_Line; 132 | EXTI->FTSR |= EXTI_InitStruct->EXTI_Line; 133 | } 134 | else 135 | { 136 | tmp = (uint32_t)EXTI_BASE; 137 | tmp += EXTI_InitStruct->EXTI_Trigger; 138 | 139 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; 140 | } 141 | } 142 | else 143 | { 144 | tmp += EXTI_InitStruct->EXTI_Mode; 145 | 146 | /* Disable the selected external lines */ 147 | *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line; 148 | } 149 | } 150 | 151 | /** 152 | * @brief Fills each EXTI_InitStruct member with its reset value. 153 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will 154 | * be initialized. 155 | * @retval None 156 | */ 157 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct) 158 | { 159 | EXTI_InitStruct->EXTI_Line = EXTI_LINENONE; 160 | EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt; 161 | EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling; 162 | EXTI_InitStruct->EXTI_LineCmd = DISABLE; 163 | } 164 | 165 | /** 166 | * @brief Generates a Software interrupt. 167 | * @param EXTI_Line: specifies the EXTI lines to be enabled or disabled. 168 | * This parameter can be any combination of EXTI_Linex where x can be (0..19). 169 | * @retval None 170 | */ 171 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line) 172 | { 173 | /* Check the parameters */ 174 | assert_param(IS_EXTI_LINE(EXTI_Line)); 175 | 176 | EXTI->SWIER |= EXTI_Line; 177 | } 178 | 179 | /** 180 | * @brief Checks whether the specified EXTI line flag is set or not. 181 | * @param EXTI_Line: specifies the EXTI line flag to check. 182 | * This parameter can be: 183 | * @arg EXTI_Linex: External interrupt line x where x(0..19) 184 | * @retval The new state of EXTI_Line (SET or RESET). 185 | */ 186 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line) 187 | { 188 | FlagStatus bitstatus = RESET; 189 | /* Check the parameters */ 190 | assert_param(IS_GET_EXTI_LINE(EXTI_Line)); 191 | 192 | if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET) 193 | { 194 | bitstatus = SET; 195 | } 196 | else 197 | { 198 | bitstatus = RESET; 199 | } 200 | return bitstatus; 201 | } 202 | 203 | /** 204 | * @brief Clears the EXTI's line pending flags. 205 | * @param EXTI_Line: specifies the EXTI lines flags to clear. 206 | * This parameter can be any combination of EXTI_Linex where x can be (0..19). 207 | * @retval None 208 | */ 209 | void EXTI_ClearFlag(uint32_t EXTI_Line) 210 | { 211 | /* Check the parameters */ 212 | assert_param(IS_EXTI_LINE(EXTI_Line)); 213 | 214 | EXTI->PR = EXTI_Line; 215 | } 216 | 217 | /** 218 | * @brief Checks whether the specified EXTI line is asserted or not. 219 | * @param EXTI_Line: specifies the EXTI line to check. 220 | * This parameter can be: 221 | * @arg EXTI_Linex: External interrupt line x where x(0..19) 222 | * @retval The new state of EXTI_Line (SET or RESET). 223 | */ 224 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line) 225 | { 226 | ITStatus bitstatus = RESET; 227 | uint32_t enablestatus = 0; 228 | /* Check the parameters */ 229 | assert_param(IS_GET_EXTI_LINE(EXTI_Line)); 230 | 231 | enablestatus = EXTI->IMR & EXTI_Line; 232 | if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET)) 233 | { 234 | bitstatus = SET; 235 | } 236 | else 237 | { 238 | bitstatus = RESET; 239 | } 240 | return bitstatus; 241 | } 242 | 243 | /** 244 | * @brief Clears the EXTI's line pending bits. 245 | * @param EXTI_Line: specifies the EXTI lines to clear. 246 | * This parameter can be any combination of EXTI_Linex where x can be (0..19). 247 | * @retval None 248 | */ 249 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line) 250 | { 251 | /* Check the parameters */ 252 | assert_param(IS_EXTI_LINE(EXTI_Line)); 253 | 254 | EXTI->PR = EXTI_Line; 255 | } 256 | 257 | /** 258 | * @} 259 | */ 260 | 261 | /** 262 | * @} 263 | */ 264 | 265 | /** 266 | * @} 267 | */ 268 | 269 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 270 | -------------------------------------------------------------------------------- /stdLib/src/stm32f10x_flash.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/stdLib/src/stm32f10x_flash.c -------------------------------------------------------------------------------- /stdLib/src/stm32f10x_i2c.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/stdLib/src/stm32f10x_i2c.c -------------------------------------------------------------------------------- /stdLib/src/stm32f10x_iwdg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_iwdg.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the IWDG firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_iwdg.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup IWDG 30 | * @brief IWDG driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup IWDG_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup IWDG_Private_Defines 43 | * @{ 44 | */ 45 | 46 | /* ---------------------- IWDG registers bit mask ----------------------------*/ 47 | 48 | /* KR register bit mask */ 49 | #define KR_KEY_Reload ((uint16_t)0xAAAA) 50 | #define KR_KEY_Enable ((uint16_t)0xCCCC) 51 | 52 | /** 53 | * @} 54 | */ 55 | 56 | /** @defgroup IWDG_Private_Macros 57 | * @{ 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | /** @defgroup IWDG_Private_Variables 65 | * @{ 66 | */ 67 | 68 | /** 69 | * @} 70 | */ 71 | 72 | /** @defgroup IWDG_Private_FunctionPrototypes 73 | * @{ 74 | */ 75 | 76 | /** 77 | * @} 78 | */ 79 | 80 | /** @defgroup IWDG_Private_Functions 81 | * @{ 82 | */ 83 | 84 | /** 85 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers. 86 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers. 87 | * This parameter can be one of the following values: 88 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers 89 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers 90 | * @retval None 91 | */ 92 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) 93 | { 94 | /* Check the parameters */ 95 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess)); 96 | IWDG->KR = IWDG_WriteAccess; 97 | } 98 | 99 | /** 100 | * @brief Sets IWDG Prescaler value. 101 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value. 102 | * This parameter can be one of the following values: 103 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4 104 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8 105 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16 106 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32 107 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64 108 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128 109 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256 110 | * @retval None 111 | */ 112 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) 113 | { 114 | /* Check the parameters */ 115 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler)); 116 | IWDG->PR = IWDG_Prescaler; 117 | } 118 | 119 | /** 120 | * @brief Sets IWDG Reload value. 121 | * @param Reload: specifies the IWDG Reload value. 122 | * This parameter must be a number between 0 and 0x0FFF. 123 | * @retval None 124 | */ 125 | void IWDG_SetReload(uint16_t Reload) 126 | { 127 | /* Check the parameters */ 128 | assert_param(IS_IWDG_RELOAD(Reload)); 129 | IWDG->RLR = Reload; 130 | } 131 | 132 | /** 133 | * @brief Reloads IWDG counter with value defined in the reload register 134 | * (write access to IWDG_PR and IWDG_RLR registers disabled). 135 | * @param None 136 | * @retval None 137 | */ 138 | void IWDG_ReloadCounter(void) 139 | { 140 | IWDG->KR = KR_KEY_Reload; 141 | } 142 | 143 | /** 144 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled). 145 | * @param None 146 | * @retval None 147 | */ 148 | void IWDG_Enable(void) 149 | { 150 | IWDG->KR = KR_KEY_Enable; 151 | } 152 | 153 | /** 154 | * @brief Checks whether the specified IWDG flag is set or not. 155 | * @param IWDG_FLAG: specifies the flag to check. 156 | * This parameter can be one of the following values: 157 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going 158 | * @arg IWDG_FLAG_RVU: Reload Value Update on going 159 | * @retval The new state of IWDG_FLAG (SET or RESET). 160 | */ 161 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) 162 | { 163 | FlagStatus bitstatus = RESET; 164 | /* Check the parameters */ 165 | assert_param(IS_IWDG_FLAG(IWDG_FLAG)); 166 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET) 167 | { 168 | bitstatus = SET; 169 | } 170 | else 171 | { 172 | bitstatus = RESET; 173 | } 174 | /* Return the flag status */ 175 | return bitstatus; 176 | } 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | /** 183 | * @} 184 | */ 185 | 186 | /** 187 | * @} 188 | */ 189 | 190 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 191 | -------------------------------------------------------------------------------- /stdLib/src/stm32f10x_usart.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/stdLib/src/stm32f10x_usart.c -------------------------------------------------------------------------------- /stdLib/src/stm32f10x_wwdg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_wwdg.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the WWDG firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_wwdg.h" 24 | #include "stm32f10x_rcc.h" 25 | 26 | /** @addtogroup STM32F10x_StdPeriph_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup WWDG 31 | * @brief WWDG driver modules 32 | * @{ 33 | */ 34 | 35 | /** @defgroup WWDG_Private_TypesDefinitions 36 | * @{ 37 | */ 38 | 39 | /** 40 | * @} 41 | */ 42 | 43 | /** @defgroup WWDG_Private_Defines 44 | * @{ 45 | */ 46 | 47 | /* ----------- WWDG registers bit address in the alias region ----------- */ 48 | #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE) 49 | 50 | /* Alias word address of EWI bit */ 51 | #define CFR_OFFSET (WWDG_OFFSET + 0x04) 52 | #define EWI_BitNumber 0x09 53 | #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4)) 54 | 55 | /* --------------------- WWDG registers bit mask ------------------------ */ 56 | 57 | /* CR register bit mask */ 58 | #define CR_WDGA_Set ((uint32_t)0x00000080) 59 | 60 | /* CFR register bit mask */ 61 | #define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F) 62 | #define CFR_W_Mask ((uint32_t)0xFFFFFF80) 63 | #define BIT_Mask ((uint8_t)0x7F) 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | /** @defgroup WWDG_Private_Macros 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /** @defgroup WWDG_Private_Variables 78 | * @{ 79 | */ 80 | 81 | /** 82 | * @} 83 | */ 84 | 85 | /** @defgroup WWDG_Private_FunctionPrototypes 86 | * @{ 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @defgroup WWDG_Private_Functions 94 | * @{ 95 | */ 96 | 97 | /** 98 | * @brief Deinitializes the WWDG peripheral registers to their default reset values. 99 | * @param None 100 | * @retval None 101 | */ 102 | void WWDG_DeInit(void) 103 | { 104 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); 105 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); 106 | } 107 | 108 | /** 109 | * @brief Sets the WWDG Prescaler. 110 | * @param WWDG_Prescaler: specifies the WWDG Prescaler. 111 | * This parameter can be one of the following values: 112 | * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 113 | * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 114 | * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 115 | * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 116 | * @retval None 117 | */ 118 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) 119 | { 120 | uint32_t tmpreg = 0; 121 | /* Check the parameters */ 122 | assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler)); 123 | /* Clear WDGTB[1:0] bits */ 124 | tmpreg = WWDG->CFR & CFR_WDGTB_Mask; 125 | /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */ 126 | tmpreg |= WWDG_Prescaler; 127 | /* Store the new value */ 128 | WWDG->CFR = tmpreg; 129 | } 130 | 131 | /** 132 | * @brief Sets the WWDG window value. 133 | * @param WindowValue: specifies the window value to be compared to the downcounter. 134 | * This parameter value must be lower than 0x80. 135 | * @retval None 136 | */ 137 | void WWDG_SetWindowValue(uint8_t WindowValue) 138 | { 139 | __IO uint32_t tmpreg = 0; 140 | 141 | /* Check the parameters */ 142 | assert_param(IS_WWDG_WINDOW_VALUE(WindowValue)); 143 | /* Clear W[6:0] bits */ 144 | 145 | tmpreg = WWDG->CFR & CFR_W_Mask; 146 | 147 | /* Set W[6:0] bits according to WindowValue value */ 148 | tmpreg |= WindowValue & (uint32_t) BIT_Mask; 149 | 150 | /* Store the new value */ 151 | WWDG->CFR = tmpreg; 152 | } 153 | 154 | /** 155 | * @brief Enables the WWDG Early Wakeup interrupt(EWI). 156 | * @param None 157 | * @retval None 158 | */ 159 | void WWDG_EnableIT(void) 160 | { 161 | *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE; 162 | } 163 | 164 | /** 165 | * @brief Sets the WWDG counter value. 166 | * @param Counter: specifies the watchdog counter value. 167 | * This parameter must be a number between 0x40 and 0x7F. 168 | * @retval None 169 | */ 170 | void WWDG_SetCounter(uint8_t Counter) 171 | { 172 | /* Check the parameters */ 173 | assert_param(IS_WWDG_COUNTER(Counter)); 174 | /* Write to T[6:0] bits to configure the counter value, no need to do 175 | a read-modify-write; writing a 0 to WDGA bit does nothing */ 176 | WWDG->CR = Counter & BIT_Mask; 177 | } 178 | 179 | /** 180 | * @brief Enables WWDG and load the counter value. 181 | * @param Counter: specifies the watchdog counter value. 182 | * This parameter must be a number between 0x40 and 0x7F. 183 | * @retval None 184 | */ 185 | void WWDG_Enable(uint8_t Counter) 186 | { 187 | /* Check the parameters */ 188 | assert_param(IS_WWDG_COUNTER(Counter)); 189 | WWDG->CR = CR_WDGA_Set | Counter; 190 | } 191 | 192 | /** 193 | * @brief Checks whether the Early Wakeup interrupt flag is set or not. 194 | * @param None 195 | * @retval The new state of the Early Wakeup interrupt flag (SET or RESET) 196 | */ 197 | FlagStatus WWDG_GetFlagStatus(void) 198 | { 199 | return (FlagStatus)(WWDG->SR); 200 | } 201 | 202 | /** 203 | * @brief Clears Early Wakeup interrupt flag. 204 | * @param None 205 | * @retval None 206 | */ 207 | void WWDG_ClearFlag(void) 208 | { 209 | WWDG->SR = (uint32_t)RESET; 210 | } 211 | 212 | /** 213 | * @} 214 | */ 215 | 216 | /** 217 | * @} 218 | */ 219 | 220 | /** 221 | * @} 222 | */ 223 | 224 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 225 | -------------------------------------------------------------------------------- /system/delay/delay.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/system/delay/delay.c -------------------------------------------------------------------------------- /system/delay/delay.h: -------------------------------------------------------------------------------- 1 | #ifndef __DELAY_H 2 | #define __DELAY_H 3 | #include "sys.h" 4 | /************************************************ 5 | 6 | ************************************************/ 7 | 8 | void delay_init(void); 9 | void delay_ms(u32 nms); 10 | void delay_us(u32 nus); 11 | void delay_xms(u32 nms); 12 | #endif 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | -------------------------------------------------------------------------------- /system/structure/structure.c: -------------------------------------------------------------------------------- 1 | 2 | #include "structure.h" 3 | 4 | 5 | struct xRecMsg WifiMsg; 6 | struct xDevice Device; 7 | 8 | -------------------------------------------------------------------------------- /system/structure/structure.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/system/structure/structure.h -------------------------------------------------------------------------------- /system/sys/sys.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/system/sys/sys.c -------------------------------------------------------------------------------- /system/sys/sys.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/system/sys/sys.h -------------------------------------------------------------------------------- /system/usart/usart.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/system/usart/usart.c -------------------------------------------------------------------------------- /system/usart/usart.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/system/usart/usart.h -------------------------------------------------------------------------------- /user/main.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZhiliangMa/202004-F103-IOT-DEV_V1/d443b5cd4a816b2f756ac4bbbfbf961d5967a83f/user/main.c -------------------------------------------------------------------------------- /user/stm32f10x_conf.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 08-April-2011 7 | * @brief Library configuration file. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Define to prevent recursive inclusion -------------------------------------*/ 23 | #ifndef __STM32F10x_CONF_H 24 | #define __STM32F10x_CONF_H 25 | 26 | /* Includes ------------------------------------------------------------------*/ 27 | /* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */ 28 | #include "stm32f10x_adc.h" 29 | #include "stm32f10x_bkp.h" 30 | #include "stm32f10x_can.h" 31 | #include "stm32f10x_cec.h" 32 | #include "stm32f10x_crc.h" 33 | #include "stm32f10x_dac.h" 34 | #include "stm32f10x_dbgmcu.h" 35 | #include "stm32f10x_dma.h" 36 | #include "stm32f10x_exti.h" 37 | #include "stm32f10x_flash.h" 38 | #include "stm32f10x_fsmc.h" 39 | #include "stm32f10x_gpio.h" 40 | #include "stm32f10x_i2c.h" 41 | #include "stm32f10x_iwdg.h" 42 | #include "stm32f10x_pwr.h" 43 | #include "stm32f10x_rcc.h" 44 | #include "stm32f10x_rtc.h" 45 | #include "stm32f10x_sdio.h" 46 | #include "stm32f10x_spi.h" 47 | #include "stm32f10x_tim.h" 48 | #include "stm32f10x_usart.h" 49 | #include "stm32f10x_wwdg.h" 50 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ 51 | 52 | /* Exported types ------------------------------------------------------------*/ 53 | /* Exported constants --------------------------------------------------------*/ 54 | /* Uncomment the line below to expanse the "assert_param" macro in the 55 | Standard Peripheral Library drivers code */ 56 | /* #define USE_FULL_ASSERT 1 */ 57 | 58 | /* Exported macro ------------------------------------------------------------*/ 59 | #ifdef USE_FULL_ASSERT 60 | 61 | /** 62 | * @brief The assert_param macro is used for function's parameters check. 63 | * @param expr: If expr is false, it calls assert_failed function which reports 64 | * the name of the source file and the source line number of the call 65 | * that failed. If expr is true, it returns no value. 66 | * @retval None 67 | */ 68 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) 69 | /* Exported functions ------------------------------------------------------- */ 70 | void assert_failed(uint8_t* file, uint32_t line); 71 | #else 72 | #define assert_param(expr) ((void)0) 73 | #endif /* USE_FULL_ASSERT */ 74 | 75 | #endif /* __STM32F10x_CONF_H */ 76 | 77 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 78 | -------------------------------------------------------------------------------- /user/stm32f10x_it.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 08-April-2011 7 | * @brief Main Interrupt Service Routines. 8 | * This file provides template for all exceptions handler and 9 | * peripherals interrupt service routine. 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 14 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 15 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 16 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 17 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 18 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 19 | * 20 | *

© COPYRIGHT 2011 STMicroelectronics

21 | ****************************************************************************** 22 | */ 23 | 24 | /* Includes ------------------------------------------------------------------*/ 25 | #include "stm32f10x_it.h" 26 | 27 | /** @addtogroup STM32F10x_StdPeriph_Template 28 | * @{ 29 | */ 30 | 31 | /* Private typedef -----------------------------------------------------------*/ 32 | /* Private define ------------------------------------------------------------*/ 33 | /* Private macro -------------------------------------------------------------*/ 34 | /* Private variables ---------------------------------------------------------*/ 35 | /* Private function prototypes -----------------------------------------------*/ 36 | /* Private functions ---------------------------------------------------------*/ 37 | 38 | /******************************************************************************/ 39 | /* Cortex-M3 Processor Exceptions Handlers */ 40 | /******************************************************************************/ 41 | 42 | /** 43 | * @brief This function handles NMI exception. 44 | * @param None 45 | * @retval None 46 | */ 47 | void NMI_Handler(void) 48 | { 49 | } 50 | 51 | /** 52 | * @brief This function handles Hard Fault exception. 53 | * @param None 54 | * @retval None 55 | */ 56 | void HardFault_Handler(void) 57 | { 58 | /* Go to infinite loop when Hard Fault exception occurs */ 59 | while (1) 60 | { 61 | } 62 | } 63 | 64 | /** 65 | * @brief This function handles Memory Manage exception. 66 | * @param None 67 | * @retval None 68 | */ 69 | void MemManage_Handler(void) 70 | { 71 | /* Go to infinite loop when Memory Manage exception occurs */ 72 | while (1) 73 | { 74 | } 75 | } 76 | 77 | /** 78 | * @brief This function handles Bus Fault exception. 79 | * @param None 80 | * @retval None 81 | */ 82 | void BusFault_Handler(void) 83 | { 84 | /* Go to infinite loop when Bus Fault exception occurs */ 85 | while (1) 86 | { 87 | } 88 | } 89 | 90 | /** 91 | * @brief This function handles Usage Fault exception. 92 | * @param None 93 | * @retval None 94 | */ 95 | void UsageFault_Handler(void) 96 | { 97 | /* Go to infinite loop when Usage Fault exception occurs */ 98 | while (1) 99 | { 100 | } 101 | } 102 | 103 | /** 104 | * @brief This function handles SVCall exception. 105 | * @param None 106 | * @retval None 107 | */ 108 | //void SVC_Handler(void) 109 | //{ 110 | //} 111 | 112 | /** 113 | * @brief This function handles Debug Monitor exception. 114 | * @param None 115 | * @retval None 116 | */ 117 | void DebugMon_Handler(void) 118 | { 119 | } 120 | 121 | /** 122 | * @brief This function handles PendSVC exception. 123 | * @param None 124 | * @retval None 125 | */ 126 | //void PendSV_Handler(void) 127 | //{ 128 | //} 129 | 130 | /** 131 | * @brief This function handles SysTick Handler. 132 | * @param None 133 | * @retval None 134 | */ 135 | //void SysTick_Handler(void) 136 | //{ 137 | //} 138 | 139 | /******************************************************************************/ 140 | /* STM32F10x Peripherals Interrupt Handlers */ 141 | /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ 142 | /* available peripheral interrupt handler's name please refer to the startup */ 143 | /* file (startup_stm32f10x_xx.s). */ 144 | /******************************************************************************/ 145 | 146 | /** 147 | * @brief This function handles PPP interrupt request. 148 | * @param None 149 | * @retval None 150 | */ 151 | /*void PPP_IRQHandler(void) 152 | { 153 | }*/ 154 | 155 | /** 156 | * @} 157 | */ 158 | 159 | 160 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 161 | -------------------------------------------------------------------------------- /user/stm32f10x_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 08-April-2011 7 | * @brief This file contains the headers of the interrupt handlers. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Define to prevent recursive inclusion -------------------------------------*/ 23 | #ifndef __STM32F10x_IT_H 24 | #define __STM32F10x_IT_H 25 | 26 | #ifdef __cplusplus 27 | extern "C" { 28 | #endif 29 | 30 | /* Includes ------------------------------------------------------------------*/ 31 | #include "stm32f10x.h" 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | /* Exported constants --------------------------------------------------------*/ 35 | /* Exported macro ------------------------------------------------------------*/ 36 | /* Exported functions ------------------------------------------------------- */ 37 | 38 | void NMI_Handler(void); 39 | void HardFault_Handler(void); 40 | void MemManage_Handler(void); 41 | void BusFault_Handler(void); 42 | void UsageFault_Handler(void); 43 | void SVC_Handler(void); 44 | void DebugMon_Handler(void); 45 | void PendSV_Handler(void); 46 | void SysTick_Handler(void); 47 | 48 | #ifdef __cplusplus 49 | } 50 | #endif 51 | 52 | #endif /* __STM32F10x_IT_H */ 53 | 54 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 55 | --------------------------------------------------------------------------------