├── .gitignore ├── Makefile ├── README.md ├── autodata ├── .gitignore ├── Makefile ├── axibus.txt ├── axidma.txt ├── aximm2s.txt ├── axiperf.txt ├── axiram.txt ├── axis2mm.txt ├── controlbus.txt ├── dmaperf.txt ├── global.txt ├── legalgen.txt ├── mem_bkram_only.txt ├── mm2sperf.txt ├── noconsole.txt ├── ramperf.txt ├── s2mmperf.txt ├── streamsink.txt ├── streamsrc.txt └── vibus.txt ├── doc └── block-diagram.png ├── mkdatev.pl ├── rtl ├── Makefile ├── builddate.v ├── main.v ├── make.inc ├── streamcounter.v └── toplevel.v ├── sim ├── .gitignore ├── Makefile ├── automaster_tb.cpp ├── axi_tb.h ├── axisim.gtkw ├── byteswap.cpp ├── byteswap.h ├── devbus.h ├── main_tb.cpp ├── testb.h ├── verilated_cov_2_lcov.py └── vversion.sh └── sw ├── regdefs.cpp └── regdefs.h /.gitignore: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZipCPU/axidmacheck/HEAD/.gitignore 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