├── .gitignore ├── Makefile ├── README.md ├── autodata ├── .gitignore ├── Makefile ├── amdemod.txt ├── amsim.txt ├── amxmit.txt ├── clock36.txt ├── fmsim.txt ├── fmxmit.txt ├── global.txt ├── gpio.txt ├── hexbus.txt ├── histogram.txt ├── legalgen.txt ├── qamxmit.txt ├── qpskrcvr.txt ├── qpsksim.txt ├── qpskxmit.txt ├── receiver.txt ├── rfscope.txt ├── samplerate.txt ├── transmitter.txt ├── version.txt ├── wavsim.txt └── wbscope.txt ├── doc ├── bad-hist-multimode.png ├── bad-histogram.png ├── cooking-w-gas-screenshot.png ├── good-histogram.png ├── qpsk-matching-audio-lost-sync.png └── radio-set.jpg ├── gdr.pcf ├── mkdatev.pl ├── rtl ├── .gitignore ├── Makefile ├── addrdecode.v ├── amdemod.hex ├── amdemod.v ├── amxmit.v ├── audio8k.hex ├── builddate.v ├── cicfil.v ├── clkcounter.v ├── clocks.py ├── cycliciir.v ├── descrambler.v ├── fmdemod.v ├── fmxmit.v ├── hexbus │ ├── hbbus.v │ ├── hbdechex.v │ ├── hbdeword.v │ ├── hbexec.v │ ├── hbgenhex.v │ ├── hbidle.v │ ├── hbints.v │ ├── hbnewline.v │ └── hbpack.v ├── histogram.v ├── i2cio.v ├── iiravg.v ├── main.v ├── make.inc ├── oclkddr.v ├── pshape4x.hex ├── pshape8x.hex ├── pulseshaperiq.v ├── qpskrcvr.v ├── qpskxmit.v ├── quadpll.v ├── scrambler.v ├── sdpll.v ├── sdr.pcf ├── seqcordic.v ├── sfifo.v ├── sintable.hex ├── sintable.v ├── skidbuffer.v ├── smpladc.v ├── subfildown.v ├── subfildowniq.v ├── toplevel.v ├── wbgpio.v ├── wbscope │ └── wbscope.v ├── wbuart │ ├── rxuartlite.v │ └── txuartlite.v └── wbxbar.v ├── scad ├── .gitignore ├── GT.scad ├── zbreaker.scad ├── zbreakerlogo.scad ├── zbsolder.scad └── zipcpu.scad ├── sim ├── .gitignore ├── Makefile ├── amsim.gtkw ├── automaster_tb.cpp ├── fmsim.gtkw ├── gfx_tb.cpp ├── i2csim.cpp ├── i2csim.h ├── main_tb.cpp ├── micnco.cpp ├── micnco.h ├── qpsksim.gtkw ├── testb.h ├── twoc.cpp ├── twoc.h ├── uartsim.cpp ├── uartsim.h └── vversion.sh └── sw ├── .gitignore ├── Makefile ├── constellation.cpp ├── devbus.h ├── hexbus.cpp ├── hexbus.h ├── histogram.cpp ├── llcomms.cpp ├── llcomms.h ├── micscope.cpp ├── netuart.cpp ├── port.h ├── regdefs.cpp ├── regdefs.h ├── rfregs.cpp ├── rxconfig.sh ├── scopecls.cpp ├── scopecls.h ├── txconfig.sh └── wbregs.cpp /.gitignore: -------------------------------------------------------------------------------- 1 | 20*-sdr.tjz 2 | legal.txt 3 | .svn 4 | xilinx 5 | obj_dir 6 | obj-pc 7 | obj-zip 8 | *.o 9 | *.a 10 | *.vcd 11 | *.fst 12 | .swp 13 | .*.swp 14 | .*.swo 15 | svn-commit* 16 | *_tb 17 | *_tb.dbl 18 | *dbg.txt 19 | *dump.txt 20 | *debug.txt 21 | tags 22 | cpudefs.h 23 | design.h 24 | octave-workspace 25 | core 26 | *.aux 27 | *.log 28 | *.out 29 | *.ps 30 | *.yslog 31 | *.smt2 32 | lastbuild.v 33 | -------------------------------------------------------------------------------- /autodata/.gitignore: -------------------------------------------------------------------------------- 1 | autofpga.dbg 2 | board.h 3 | build.pcf 4 | main.v 5 | toplevel.v 6 | main_tb.cpp 7 | regdefs.cpp 8 | regdefs.h 9 | testb.h 10 | rtl.make.inc 11 | -------------------------------------------------------------------------------- /autodata/Makefile: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: auto-data/Makefile 4 | ## {{{ 5 | ## Project: GDR, a basic Gateware Defined Radio architecture 6 | ## 7 | ## Purpose: To coordinate the build of the glue logic holding this design 8 | ## together via autofpga. 9 | ## 10 | ## 11 | ## Creator: Dan Gisselquist, Ph.D. 12 | ## Gisselquist Technology, LLC 13 | ## 14 | ################################################################################ 15 | ## }}} 16 | ## Copyright (C) 2019-2024, Gisselquist Technology, LLC 17 | ## {{{ 18 | ## This program is free software (firmware): you can redistribute it and/or 19 | ## modify it under the terms of the GNU General Public License as published 20 | ## by the Free Software Foundation, either version 3 of the License, or (at 21 | ## your option) any later version. 22 | ## 23 | ## This program is distributed in the hope that it will be useful, but WITHOUT 24 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 25 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 26 | ## for more details. 27 | ## 28 | ## You should have received a copy of the GNU General Public License along 29 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 30 | ## target there if the PDF file isn't present.) If not, see 31 | ## for a copy. 32 | ## }}} 33 | ## License: GPL, v3, as defined and found on www.gnu.org, 34 | ## {{{ 35 | ## http://www.gnu.org/licenses/gpl.html 36 | ## 37 | ################################################################################ 38 | ## 39 | ## }}} 40 | .PHONY: all 41 | all: data 42 | # 43 | # Could also depend upon load, if desired, but not necessary 44 | # 45 | # This is the list of components that will form our project. Each file consists 46 | # of parts and pieces of our project that autofpga will copy/paste into our 47 | # main project files. 48 | # 49 | 50 | ## Potential Transmitters 51 | # 52 | # RF := qamxmit.txt 53 | # RF := amxmit.txt 54 | # RF := fmxmit.txt 55 | # RF := qpskxmit.txt 56 | 57 | ## Potential Receiver 58 | # 59 | # RF := amdemod.txt 60 | # RF := fmdemod.txt 61 | # RF := qpskrcvr.txt 62 | 63 | ## Full transmit/receiver chain 64 | # 65 | # RF := wavsim.txt 66 | # RF := amsim.txt 67 | # RF := fmsim.txt 68 | RF := qpsksim.txt 69 | 70 | DEBUG := histogram.txt rfscope.txt samplerate.txt 71 | DATA := global.txt clock36.txt version.txt hexbus.txt gpio.txt $(RF) $(DEBUG) 72 | 73 | AUTOFPGA := autofpga 74 | .PHONY: data 75 | data: $(DATA) 76 | $(AUTOFPGA) -d -o . $(DATA) 77 | 78 | clean: 79 | rm -f toplevel.v main.v regdefs.h regdefs.cpp board.h board.ld 80 | rm -f rtl.make.inc main_tb.cpp 81 | rm -f autofpga.dbg 82 | -------------------------------------------------------------------------------- /autodata/amdemod.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: amdemod.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ## 36 | ################################################################################ 37 | ## 38 | ## }}} 39 | @PREFIX=amdemod 40 | @DEVID=AMDEMOD 41 | @INCLUDEFILE=receiver.txt 42 | @RECEIVER=amdemod 43 | @RTL.MAKE.GROUP=AMDEMOD 44 | @RTL.MAKE.FILES=amdemod.v cicfil.v quadpll.v subfildowniq.v seqcordic.v iiravg.v 45 | @REGS.N=4 46 | @REGS.0=0 R_AMGAIN AMGAIN 47 | @REGS.1=1 R_AMFREQ AMFREQ 48 | @REGS.2=2 R_AMFLTR AMFLTR 49 | @REGS.3=3 R_AMPLL AMFPLL 50 | -------------------------------------------------------------------------------- /autodata/amsim.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: amsim.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=amsim 39 | @INCLUDEFILE=wavsim.txt 40 | @XMITTER=amxmit 41 | @RECEIVER=amdemod 42 | @REGS.N=8 43 | @REGS.0=0 R_TXGAIN TXGAIN 44 | @REGS.1=0 R_MICDATA MICDATA 45 | @REGS.2=1 R_GAINDATA GAINDATA 46 | @REGS.3=2 R_RFSAMPLE RFSAMPLE 47 | @REGS.4=4 R_RXGAIN RXGAIN 48 | @REGS.5=5 R_AMFREQ AMFREQ 49 | @REGS.6=6 R_AMFLTR AMFLTR 50 | @REGS.7=7 R_AMPLL AMFPLL 51 | @RTL.MAKE.GROUP=AMSIM 52 | @RTL.MAKE.FILES=amxmit.v smpladc.v cicfil.v amdemod.v cicfil.v 53 | quadpll.v subfildowniq.v seqcordic.v iiravg.v 54 | -------------------------------------------------------------------------------- /autodata/amxmit.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: amxmit.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=amtx 39 | @INCLUDEFILE=transmitter.txt 40 | @XMITTER=amxmit 41 | @REGS.N=4 42 | @REGS.0=0 R_AMGAIN AMGAIN 43 | @REGS.1=0 R_MICDATA MICDATA 44 | @REGS.2=1 R_GAINDATA GAINDATA 45 | @REGS.3=2 R_RFSAMPLE RFSAMPLE 46 | @RTL.MAKE.GROUP=AMTX 47 | @RTL.MAKE.FILES=amxmit.v smpladc.v cicfil.v 48 | -------------------------------------------------------------------------------- /autodata/clock36.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: clock36.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: Creates and defines a 36MHz clock for the rest of the design to 8 | ## use as the system clock. 9 | ## 10 | ## Creator: Dan Gisselquist, Ph.D. 11 | ## Gisselquist Technology, LLC 12 | ## 13 | ################################################################################ 14 | ## }}} 15 | ## Copyright (C) 2019-2024, Gisselquist Technology, LLC 16 | ## {{{ 17 | ## This program is free software (firmware): you can redistribute it and/or 18 | ## modify it under the terms of the GNU General Public License as published 19 | ## by the Free Software Foundation, either version 3 of the License, or (at 20 | ## your option) any later version. 21 | ## 22 | ## This program is distributed in the hope that it will be useful, but WITHOUT 23 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 24 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 25 | ## for more details. 26 | ## 27 | ## You should have received a copy of the GNU General Public License along 28 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 29 | ## target there if the PDF file isn't present.) If not, see 30 | ## for a copy. 31 | ## }}} 32 | ## License: GPL, v3, as defined and found on www.gnu.org, 33 | ## {{{ 34 | ## http://www.gnu.org/licenses/gpl.html 35 | ## 36 | ## 37 | ################################################################################ 38 | ## 39 | ## }}} 40 | @$CLKFREQHZ=36000000 41 | @PREFIX=clk 42 | @CLOCK.TOP=i_clk_12mhz 43 | @CLOCK.NAME=clk 44 | @TOP.DEFNS= 45 | wire s_clk, s_reset, pll_locked; 46 | reg [2:0] reset_pipe; 47 | reg [9:0] rst_counter; 48 | @TOP.INSERT= 49 | // No resets? 50 | // assign s_reset = 1'b0; 51 | initial reset_pipe = -1; 52 | always @(posedge s_clk, negedge pll_locked) 53 | if (!pll_locked) 54 | reset_pipe <= -1; 55 | else 56 | reset_pipe <= { reset_pipe[1:0], 1'b0 }; 57 | 58 | initial rst_counter = 0; 59 | always @(posedge s_clk) 60 | if (reset_pipe[2]) 61 | rst_counter <= 0; 62 | else if (!rst_counter[9]) 63 | rst_counter <= rst_counter + 1; 64 | 65 | assign s_reset = !rst_counter[9]; 66 | 67 | `ifdef VERILATOR 68 | assign s_clk = i_clk; 69 | assign pll_locked = 1'b1; 70 | `else 71 | // wire s_clk_36mhz; 72 | 73 | SB_PLL40_PAD #( 74 | /** 75 | * PLL configuration 76 | * 77 | * This Verilog header file was generated automatically 78 | * using the icepll tool from the IceStorm project. 79 | * It is intended for use with FPGA primitives SB_PLL40_CORE, 80 | * SB_PLL40_PAD, SB_PLL40_2_PAD, SB_PLL40_2F_CORE or 81 | * SB_PLL40_2F_PAD. 82 | * Use at your own risk. 83 | * 84 | * Given input frequency: 12.000 MHz 85 | * Requested output frequency: 36.000 MHz 86 | * Achieved output frequency: 36.000 MHz 87 | */ 88 | 89 | .FEEDBACK_PATH("SIMPLE"), 90 | .DIVR(4'b0000), // DIVR = 0 91 | .DIVF(7'b0101111), // DIVF = 47 92 | .DIVQ(3'b100), // DIVQ = 4 93 | .FILTER_RANGE(3'b001) // FILTER_RANGE = 1 94 | ) pll ( 95 | .PACKAGEPIN(i_clk_12mhz), 96 | // .PLLOUTCORE(s_clk_36mhz), 97 | .PLLOUTCORE(s_clk), 98 | .LOCK(pll_locked), 99 | .BYPASS(1'b0), 100 | .RESETB(1'b1)); 101 | 102 | // SB_GB global_buffer(s_clk_36mhz, s_clk); 103 | `endif 104 | 105 | @REGDEFS.H.DEFNS= 106 | #define CLKFREQHZ @$CLKFREQHZ 107 | @BDEF.DEFN= 108 | #define CLKFREQHZ @$CLKFREQHZ 109 | @CLOCK.NAME=clk 110 | @CLOCK.FREQUENCY= @$CLKFREQHZ 111 | -------------------------------------------------------------------------------- /autodata/fmsim.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: fmsim.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=fmsim 39 | @INCLUDEFILE=wavsim.txt 40 | @XMITTER=fmxmit 41 | @RECEIVER=fmdemod 42 | @REGS.N=8 43 | @REGS.0=0 R_TXGAIN TXGAIN 44 | @REGS.1=1 R_MICDATA MICDATA 45 | @REGS.2=2 R_GAINDATA GAINDATA 46 | @REGS.3=3 R_RFPHASE RFPHASE 47 | @REGS.4=4 R_RXGAIN RXGAIN 48 | @REGS.5=5 R_AMFREQ AMFREQ 49 | @REGS.6=6 R_AMFLTR AMFLTR 50 | @REGS.7=7 R_AMPLL AMFPLL 51 | @RTL.MAKE.GROUP=FMSIM 52 | @RTL.MAKE.FILES=fmxmit.v smpladc.v cicfil.v sintable.v cicfil.v 53 | quadpll.v subfildowniq.v 54 | 55 | -------------------------------------------------------------------------------- /autodata/fmxmit.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: fmxmit.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=fmtx 39 | @INCLUDEFILE=transmitter.txt 40 | @XMITTER=fmxmit 41 | @REGS.N=4 42 | @REGS.0=0 R_FMGAIN FMGAIN 43 | @REGS.1=1 R_MICDATA MICDATA 44 | @REGS.2=2 R_GAINDATA GAINDATA 45 | @REGS.3=3 R_RFPHASE RFPHASE 46 | @RTL.MAKE.GROUP=FMTX 47 | @RTL.MAKE.FILES=fmxmit.v smpladc.v sintable.v cicfil.v 48 | -------------------------------------------------------------------------------- /autodata/global.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: global.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: Capture any global configuration parameters 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2019-2024 Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @LEGAL=legalgen.txt 39 | @PROJECT=SDR, a basic Soft(Gate)ware Defined Radio architecture 40 | @PCF.FILE=../gdr.pcf 41 | # 42 | @DEFAULT.BUS=wb 43 | @REGISTER.BUS=wb 44 | @REGDEFS.H.INSERT= 45 | typedef struct { 46 | unsigned m_addr; 47 | const char *m_name; 48 | } REGNAME; 49 | 50 | extern const REGNAME *bregs; 51 | extern const int NREGS; 52 | // #define NREGS (sizeof(bregs)/sizeof(bregs[0])) 53 | 54 | extern unsigned addrdecode(const char *v); 55 | extern const char *addrname(const unsigned v); 56 | @REGDEFS.CPP.INCLUDE= 57 | #include 58 | #include 59 | #include 60 | #include 61 | @REGDEFS.CPP.INSERT= 62 | #define RAW_NREGS (sizeof(raw_bregs)/sizeof(bregs[0])) 63 | 64 | const REGNAME *bregs = raw_bregs; 65 | const int NREGS = RAW_NREGS; 66 | 67 | unsigned addrdecode(const char *v) { 68 | if (isalpha(v[0])) { 69 | for(int i=0; i for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=gpio 39 | @DEVID=GPIO 40 | @NADDR=1 41 | @ACCESS=@$(DEVID)_ACCESS 42 | @SLAVE.TYPE=SINGLE 43 | @SLAVE.BUS=wb 44 | ## Outputs: 45 | ## I2C SDA 46 | ## I2C SCL 47 | ## LEDG 48 | ## LEDR 49 | ## RF_ENABLE 50 | ## AUDIO_ENABLE 51 | ## HIST_SEL0 52 | ## HIST_SEL1 53 | ## (Not used) 54 | ## LED_RED 55 | ## LED_GREEN 56 | ## LED_BLUE 57 | ## Inputs: 58 | ## I2C SDA 59 | ## I2C SCL 60 | ## BUTTON (SW1) 61 | ## BTN0 (SW2) 62 | ## BTN1 (SW3) 63 | ## BTN2 (SW4) 64 | ## (Local) 65 | ## (Local) 66 | @$NUMOUTPUT=9 67 | @$NUMINPUT=6 68 | @INT.GPIO.WIRE=gpio_int 69 | ## @INT.GPIO.PIC=buspic 70 | @TOP.PORTLIST= 71 | // @$(DEVID) ports 72 | io_i2c_scl, io_i2c_sda, o_ledg, o_ledr, i_btn, o_rf_clk 73 | @TOP.IODECL= 74 | // GPIO wires 75 | inout wire io_i2c_scl, io_i2c_sda; 76 | output wire o_ledg; 77 | output wire o_ledr; 78 | input wire [3:0] i_btn; 79 | output wire o_rf_clk; 80 | @TOP.DEFNS= 81 | // GPIO declarations. The two wire busses are just virtual lists of 82 | // input (or output) ports. 83 | wire [@$(NUMINPUT) -1:0] i_@$(PREFIX); 84 | wire [@$(NUMOUTPUT)-1:0] o_@$(PREFIX); 85 | wire i_i2c_sda, i_i2c_scl; 86 | @TOP.MAIN= 87 | // GPIO wires 88 | i_@$(PREFIX), o_@$(PREFIX) 89 | @TOP.INSERT= 90 | assign i_gpio = { i_btn[3:1], ~i_btn[0], i_i2c_sda, i_i2c_scl }; 91 | assign o_ledg = !o_@$(PREFIX)[2]; 92 | assign o_ledr = !o_@$(PREFIX)[3] || !pll_locked; 93 | 94 | i2cio sckz(o_@$(PREFIX)[0], i_i2c_scl, io_i2c_scl); 95 | i2cio sdaz(o_@$(PREFIX)[1], i_i2c_sda, io_i2c_sda); 96 | 97 | oclkddr 98 | rfclock(s_clk, { o_@$(PREFIX)[4], 1'b0 }, o_rf_clk); 99 | 100 | @MAIN.PORTLIST= 101 | // GPIO ports 102 | i_@$(PREFIX), o_@$(PREFIX) 103 | @MAIN.IODECL= 104 | localparam NGPI = @$(NUMINPUT), NGPO=@$(NUMOUTPUT); 105 | // @$(DEVID) ports 106 | input [(NGPI-1):0] i_@$(PREFIX); 107 | output wire [(NGPO-1):0] o_@$(PREFIX); 108 | @MAIN.DEFNS= 109 | wire audio_en, rf_en; 110 | // wire [1:0] rfdbg_sel; 111 | @MAIN.INSERT= 112 | // 113 | // @$(DEVID) 114 | // 115 | // This interface should allow us to control up to 16 @$(DEVID) inputs, 116 | // and another 16 @$(DEVID) outputs. The interrupt trips when any of 117 | // the inputs changes. (Sorry, which input isn't (yet) selectable.) 118 | // 119 | localparam INITIAL_@$(DEVID) = @$(NUMOUTPUT)'h37; 120 | wbgpio #(NGPI, NGPO, INITIAL_@$(DEVID)) 121 | @$(PREFIX)i(i_clk, @$(SLAVE.PORTLIST), 122 | i_@$(PREFIX), o_@$(PREFIX), @$(PREFIX)_int); 123 | 124 | assign rf_en = o_@$(PREFIX)[4]; 125 | assign audio_en = o_@$(PREFIX)[5]; 126 | assign rfdbg_sel = o_@$(PREFIX)[7:6]; 127 | @REGS.N=1 128 | @REGS.0= 0 R_@$(DEVID) @$(DEVID) GPI GPO 129 | @BDEF.DEFN= 130 | // 131 | // @$(DEVID) input wires 132 | // 133 | #define @$(DEVID)_IN(WIRE) (((WIRE)>>16)&1) 134 | #define @$(DEVID)_I2C_SCL 0x00001 135 | #define @$(DEVID)_I2C_SDA 0x00002 136 | #define @$(DEVID)_BTN0 0x00004 137 | #define @$(DEVID)_BTN1 0x00008 138 | #define @$(DEVID)_BTN2 0x00010 139 | #define @$(DEVID)_BTN3 0x00020 140 | // 141 | // @$(DEVID) output wires 142 | // 143 | #define @$(DEVID)_SET(WIRE) (((WIRE)<<16)|(WIRE)) 144 | #define @$(DEVID)_CLR(WIRE) ((WIRE)<<16) 145 | // 146 | #define @$(DEVID)_LEDG 0x000000004 147 | #define @$(DEVID)_LEDR 0x000000008 148 | // 149 | #define @$(DEVID)_I2C_SCL_SET @$(DEVID)_SET(@$(DEVID)_I2C_SCL) 150 | #define @$(DEVID)_I2C_SCL_CLR @$(DEVID)_CLR(@$(DEVID)_I2C_SCL) 151 | #define @$(DEVID)_I2C_SDA_SET @$(DEVID)_SET(@$(DEVID)_I2C_SDA) 152 | #define @$(DEVID)_I2C_SDA_CLR @$(DEVID)_CLR(@$(DEVID)_I2C_SDA) 153 | @BDEF.IONAME= i_@$(PREFIX) 154 | @BDEF.IOTYPE= unsigned 155 | @BDEF.OSDEF= _BOARD_HAS_@$(DEVID) 156 | @BDEF.OSVAL= static volatile @$.BDEF.IOTYPE *const _@$(PREFIX) = ((@$.BDEF.IOTYPE *)@$REGBASE); 157 | @RTL.MAKE.FILES=wbgpio.v i2cio.v oclkddr.v 158 | @RTL.MAKE.GROUP=@$(DEVID) 159 | -------------------------------------------------------------------------------- /autodata/hexbus.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: hexbus.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: To describe what needs to be done to make the UART to Wishbone 8 | ## external bus master a part of the main .v and toplevel.v files. 9 | ## 10 | ## Creator: Dan Gisselquist, Ph.D. 11 | ## Gisselquist Technology, LLC 12 | ## 13 | ################################################################################ 14 | ## }}} 15 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 16 | ## {{{ 17 | ## This program is free software (firmware): you can redistribute it and/or 18 | ## modify it under the terms of the GNU General Public License as published 19 | ## by the Free Software Foundation, either version 3 of the License, or (at 20 | ## your option) any later version. 21 | ## 22 | ## This program is distributed in the hope that it will be useful, but WITHOUT 23 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 24 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 25 | ## for more details. 26 | ## 27 | ## You should have received a copy of the GNU General Public License along 28 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 29 | ## target there if the PDF file isn't present.) If not, see 30 | ## for a copy. 31 | ## }}} 32 | ## License: GPL, v3, as defined and found on www.gnu.org, 33 | ## {{{ 34 | ## http://www.gnu.org/licenses/gpl.html 35 | ## 36 | ################################################################################ 37 | ## 38 | ## }}} 39 | @PREFIX=hex 40 | @ACCESS=HEXBUS_MASTER 41 | @MASTER.BUS=wb 42 | @MASTER.TYPE=HOST 43 | @BUS.NAME=wb 44 | @BUS.CLOCK=clk 45 | @BUS.WIDTH=32 46 | @$BAUDRATE=1000000 47 | @CLOCK.NAME=clk 48 | @$SETUP=@$(CLOCK.FREQUENCY) / @$BAUDRATE 49 | @SETUP.FORMAT=24'h%x 50 | @$BUS_ADDRESS_WIDTH=@$(MASTER.BUS.AWID) 51 | @BP=@$(MASTER.PREFIX) 52 | @MAIN.PORTLIST= 53 | // UART/host to wishbone interface 54 | i_host_uart_rx, o_host_uart_tx 55 | @MAIN.IODECL= 56 | input wire i_host_uart_rx; 57 | output wire o_host_uart_tx; 58 | @MAIN.DEFNS= 59 | // 60 | // 61 | // UART interface 62 | // 63 | // 64 | localparam BUSUARTBITS = $clog2(@$SETUP); 65 | localparam [23:0] BUSUART = @$SETUP; // @$BAUDRATE baud 66 | // 67 | wire w_ck_uart, w_uart_tx; 68 | wire rx_host_stb; 69 | wire [7:0] rx_host_data; 70 | wire tx_host_stb; 71 | wire [7:0] tx_host_data; 72 | wire tx_host_busy; 73 | // 74 | @MAIN.INSERT= 75 | // The Host USB interface, to be used by the WB-UART bus 76 | rxuartlite #(.TIMING_BITS(BUSUARTBITS[4:0]), 77 | .CLOCKS_PER_BAUD(BUSUART[BUSUARTBITS-1:0])) 78 | rcv(i_clk, i_host_uart_rx, rx_host_stb, rx_host_data); 79 | txuartlite #(.TIMING_BITS(BUSUARTBITS[4:0]), 80 | .CLOCKS_PER_BAUD(BUSUART[BUSUARTBITS-1:0])) 81 | txv(i_clk, tx_host_stb, tx_host_data, o_host_uart_tx, tx_host_busy); 82 | 83 | hbbus #(.AW(@$(MASTER.BUS.AWID))) 84 | genbus(i_clk, 85 | rx_host_stb, rx_host_data, 86 | @$(MASTER.PORTLIST), 87 | 1'b0, // No interrupts defined 88 | tx_host_stb, tx_host_data, tx_host_busy); 89 | # 90 | @REGDEFS.H.DEFNS= 91 | #define BAUDRATE @$(BAUDRATE) 92 | @SIM.CLOCK=clk 93 | @SIM.INCLUDE= 94 | #include "uartsim.h" 95 | @SIM.DEFNS= 96 | UARTSIM *m_dbgbus; 97 | @SIM.INIT= 98 | m_dbgbus = new UARTSIM(FPGAPORT); 99 | m_dbgbus->setup(@$[%d](SETUP)); 100 | m_core->i_host_uart_rx = 1; 101 | @SIM.TICK= 102 | m_core->i_host_uart_rx = (*m_dbgbus)(m_core->o_host_uart_tx); 103 | @RTL.MAKE.GROUP=HEXBUS 104 | @RTL.MAKE.SUBD=hexbus 105 | @RTL.MAKE.FILES= hbbus.v hbdechex.v hbdeword.v 106 | hbexec.v hbgenhex.v hbidle.v hbints.v hbnewline.v hbpack.v 107 | @PREFIX=wbuart 108 | @RTL.MAKE.GROUP=WBUART 109 | @RTL.MAKE.SUBD=wbuart 110 | @RTL.MAKE.FILES=rxuartlite.v txuartlite.v 111 | -------------------------------------------------------------------------------- /autodata/histogram.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: histogram.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ## 36 | ################################################################################ 37 | ## 38 | ## }}} 39 | @PREFIX=hist 40 | @$LGNADDR=10 41 | @$NAVGS=16383 42 | @$NADDR=(1<<@$(LGNADDR)) 43 | @SLAVE.TYPE=OTHER 44 | @SLAVE.BUS=wb 45 | @MAIN.DEFNS= 46 | wire @$(PREFIX)_int; 47 | @MAIN.INSERT= 48 | // 49 | // Histogram 50 | // 51 | histogram #(.AW(@$(LGNADDR)),.NAVGS(@$(NAVGS))) 52 | @$(PREFIX)i(@$(SLAVE.BUS.CLOCK.WIRE), i_reset, 53 | @$(SLAVE.PORTLIST), 54 | rfdbg_ce, rfdbg_hist, 55 | @$(PREFIX)_int); 56 | @REGS.N=1 57 | @REGS.0=0 R_HISTOGRAM HISTOGRAM 58 | @RTL.MAKE.GROUP=HIST 59 | @RTL.MAKE.FILES=histogram.v 60 | -------------------------------------------------------------------------------- /autodata/legalgen.txt: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // DO NOT EDIT THIS FILE! 8 | // Computer Generated: This file is computer generated by AUTOFPGA. DO NOT EDIT. 9 | // DO NOT EDIT THIS FILE! 10 | // 11 | // CmdLine: 12 | // 13 | // Creator: Dan Gisselquist, Ph.D. 14 | // Gisselquist Technology, LLC 15 | // 16 | //////////////////////////////////////////////////////////////////////////////// 17 | // }}} 18 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 19 | // {{{ 20 | // This program is free software (firmware): you can redistribute it and/or 21 | // modify it under the terms of the GNU General Public License as published 22 | // by the Free Software Foundation, either version 3 of the License, or (at 23 | // your option) any later version. 24 | // 25 | // This program is distributed in the hope that it will be useful, but WITHOUT 26 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 27 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 28 | // for more details. 29 | // 30 | // You should have received a copy of the GNU General Public License along 31 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 32 | // target there if the PDF file isn't present.) If not, see 33 | // for a copy. 34 | // }}} 35 | // License: GPL, v3, as defined and found on www.gnu.org, 36 | // {{{ 37 | // http://www.gnu.org/licenses/gpl.html 38 | // 39 | //////////////////////////////////////////////////////////////////////////////// 40 | // 41 | // }}} 42 | -------------------------------------------------------------------------------- /autodata/qamxmit.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: qamxmit.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=qamxmit 39 | @DEVID=TRANSMITTER 40 | @DEPENDS=RFSCOPE_ACCESS 41 | @XMITTER=qamxmit 42 | @INCLUDEFILE=transmitter.txt 43 | @RTL.MAKE.GROUP=XMIT 44 | @RTL.MAKE.FILES=subfildown.v qamxmit.v smpladc.v sfifo.v 45 | -------------------------------------------------------------------------------- /autodata/qpskrcvr.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: qpskrcvr.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=qpskrx 39 | @DEVID=QPSKRX 40 | @INCLUDEFILE=receiver.txt 41 | @RECEIVER=qpskrcvr 42 | @RTL.MAKE.GROUP=@$(DEVID) 43 | @RTL.MAKE.FILES=qpskrcvr.v cicfil.v sdpll.v subfildowniq.v descrambler.v seqcordic.v cycliciir.v 44 | # @REGS.N=4 45 | # @REGS.0=0 R_RXFIL RXFIL 46 | # @REGS.1=1 R_RXSYM RXSYM 47 | # @REGS.2=2 R_RXCARRIER RXCARRIER 48 | # @REGS.3=3 R_RX3 RX3 49 | -------------------------------------------------------------------------------- /autodata/qpsksim.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: qpsksim.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=amsim 39 | @INCLUDEFILE=wavsim.txt 40 | @XMITTER=qpskxmit 41 | @RECEIVER=qpskrcvr 42 | @REGS.N=8 43 | @REGS.0=0 R_TXFIL TXFIL 44 | @REGS.1=0 R_TXPSHAPE TXPSHAPE 45 | @REGS.2=1 R_TX2 TX2 46 | @REGS.3=2 R_TX3 TX3 47 | @REGS.5=4 R_RXFIL RXFIL 48 | @REGS.4=5 R_RXSYM RXSYM 49 | @REGS.6=6 R_RXCARRIER RXCARRIER 50 | @REGS.7=7 R_RX3 RX3 51 | @RTL.MAKE.GROUP=QPSKSIM 52 | @RTL.MAKE.FILES=qpskxmit.v smpladc.v cicfil.v qpskrcvr.v cicfil.v 53 | sdpll.v subfildowniq.v 54 | -------------------------------------------------------------------------------- /autodata/qpskxmit.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: qpskxmit.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=qpsktx 39 | @INCLUDEFILE=transmitter.txt 40 | @XMITTER=qpskxmit 41 | @REGS.N=2 42 | @REGS.0=0 R_AUDIOFIL AUDIOFIL 43 | @REGS.1=0 R_PULSEFIL PULSEFIL 44 | @RTL.MAKE.GROUP=QPSKTX 45 | @RTL.MAKE.FILES=qpskxmit.v smpladc.v cicfil.v sfifo.v pulseshaperiq.v scrambler.v subfildown.v 46 | -------------------------------------------------------------------------------- /autodata/receiver.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: receiver.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=rx 39 | @DEVID=RECEIVER 40 | @DEPENDS=RFSCOPE_ACCESS 41 | @SLAVE.BUS=wb 42 | @SLAVE.TYPE=DOUBLE 43 | @NADDR=4 44 | @RECEIVER=amdemod 45 | @MAIN.PORTLIST= 46 | // @$(DEVID) I/O ports 47 | i_rf_data, o_pwm_audio, o_pwm_shutdown_n, o_pwm_gain 48 | @MAIN.IODECL= 49 | input wire [1:0] i_rf_data; 50 | output wire o_pwm_audio; 51 | output wire o_pwm_shutdown_n, o_pwm_gain; 52 | @MAIN.PARAMS= 53 | @MAIN.DEFNS= 54 | wire rfdbg_ce; 55 | wire [31:0] rfdbg_data; 56 | wire [9:0] rfdbg_hist; 57 | wire [1:0] rfdbg_sel; 58 | @MAIN.INSERT= 59 | @$(RECEIVER) 60 | @$(RECEIVER)i(i_clk, i_reset, audio_en, rf_en, 61 | @$(SLAVE.PORTLIST), 62 | i_rf_data, o_pwm_audio, 63 | rfdbg_sel, rfdbg_ce, rfdbg_data, rfdbg_hist); 64 | 65 | assign o_pwm_shutdown_n = audio_en; 66 | assign o_pwm_gain = audio_en; 67 | -------------------------------------------------------------------------------- /autodata/rfscope.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: rfscope.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=rfscope 39 | @DEVID=RFSCOPE 40 | @ACCESS=@$(DEVID)_ACCESS 41 | @INCLUDEFILE=wbscope.txt 42 | @LOG_CAPTURE_SIZE=8 43 | @TRIGGER=1'b1 44 | @SYNCHRONOUS=1 45 | @CAPTURECE=rfdbg_ce 46 | @DEBUG=rfdbg_data 47 | -------------------------------------------------------------------------------- /autodata/samplerate.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: samplerate.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=samplerate 39 | @DEVID=SRATE 40 | @REGS.N=2 41 | @REGS.0=0 R_@$(DEVID) @$(DEVID) 42 | @REGS.1=0 R_@$(DEVID) SAMPLERATE 43 | @SLAVE.BUS=wb 44 | @SLAVE.TYPE=SINGLE 45 | @NADDR=1 46 | @CKWIRE= @$(SLAVE.BUS.CLOCK.WIRE) 47 | @CLKFREQ=@$(SLAVE.BUS.CLOCK.FREQUENCY) 48 | @MAIN.DEFNS= 49 | reg [$clog2(@$(SLAVE.BUS.CLOCK.FREQUENCY))-1:0] 50 | r_@$(PREFIX)_counter, r_@$(PREFIX)_counts; 51 | reg [31:0] r_@$(PREFIX)_result; 52 | reg r_@$(PREFIX)_restart; 53 | 54 | @MAIN.INSERT= 55 | initial r_@$(PREFIX)_counter = 0; 56 | initial r_@$(PREFIX)_restart = 1; 57 | always @(posedge i_clk) 58 | /* 59 | if (i_reset) 60 | begin 61 | r_@$(PREFIX)_restart <= 1; 62 | r_@$(PREFIX)_counter <= 0; 63 | end else 64 | */ begin 65 | if (r_@$(PREFIX)_restart) 66 | r_@$(PREFIX)_counter <= 0; 67 | else 68 | r_@$(PREFIX)_counter <= r_@$(PREFIX)_counter + 1; 69 | 70 | r_@$(PREFIX)_restart <= (r_@$(PREFIX)_counter == @$(CLKFREQ)-2); 71 | end 72 | 73 | initial r_@$(PREFIX)_counts = 0; 74 | initial r_@$(PREFIX)_result = 0; 75 | always @(posedge i_clk) 76 | // if (i_reset) 77 | // begin 78 | // r_@$(PREFIX)_counts <= 0; 79 | // r_@$(PREFIX)_result <= 0; 80 | // end else 81 | if (r_@$(PREFIX)_restart) 82 | begin 83 | r_@$(PREFIX)_counts <= 0; 84 | r_@$(PREFIX)_result <= 0; 85 | r_@$(PREFIX)_result[$clog2(@$(SLAVE.BUS.CLOCK.FREQUENCY))-1:0] 86 | <= r_@$(PREFIX)_counts + (rfdbg_ce ? 1:0); 87 | end else if (rfdbg_ce) 88 | r_@$(PREFIX)_counts <= r_@$(PREFIX)_counts + 1; 89 | 90 | assign @$(SLAVE.PREFIX)_stall = 1'b0; 91 | assign @$(SLAVE.PREFIX)_ack = @$(SLAVE.PREFIX)_stb; 92 | assign @$(SLAVE.PREFIX)_idata = r_@$(PREFIX)_result; 93 | -------------------------------------------------------------------------------- /autodata/transmitter.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: transmitter.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=tx 39 | @DEVID=TRANSMITTER 40 | @DEPENDS=RFSCOPE_ACCESS 41 | @SLAVE.BUS=wb 42 | @SLAVE.TYPE=DOUBLE 43 | @NADDR=4 44 | @XMITTER=qamxmit 45 | @MAIN.PORTLIST= 46 | // @$(DEVID) I/O ports 47 | o_rf_data, o_mic_csn, o_mic_sck, i_mic_miso 48 | @MAIN.IODECL= 49 | output wire [1:0] o_rf_data; 50 | output wire o_mic_csn, o_mic_sck; 51 | input wire i_mic_miso; 52 | @MAIN.PARAMS= 53 | @MAIN.DEFNS= 54 | wire rfdbg_ce; 55 | wire [31:0] rfdbg_data; 56 | wire [9:0] rfdbg_hist; 57 | wire [1:0] rfdbg_sel; 58 | @MAIN.INSERT= 59 | // 60 | // Transmit logic 61 | // 62 | @$(XMITTER) 63 | @$(XMITTER)i(i_clk, i_reset, audio_en, rf_en, 64 | @$(SLAVE.PORTLIST), 65 | o_mic_csn, o_mic_sck, i_mic_miso, 66 | o_rf_data, 67 | rfdbg_sel, rfdbg_ce, rfdbg_data, rfdbg_hist); 68 | 69 | @SIM.CLOCK=clk 70 | @SIM.INCLUDE= 71 | #include "micnco.h" 72 | @SIM.DEFNS= 73 | MICNCO *m_mic; 74 | @SIM.INIT= 75 | m_mic = new MICNCO(); 76 | @SIM.TICK= 77 | m_core->i_mic_miso= (*m_mic)(m_core->o_mic_sck, m_core->o_mic_csn); 78 | -------------------------------------------------------------------------------- /autodata/version.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: version.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2019-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=version 39 | @DEVID=VERSION 40 | @NADDR=1 41 | @SLAVE.TYPE=SINGLE 42 | @SLAVE.BUS=wb 43 | @MAIN.DEFNS= 44 | `include "builddate.v" 45 | @MAIN.INSERT= 46 | assign @$(SLAVE.PREFIX)_idata = `DATESTAMP; 47 | assign @$(SLAVE.PREFIX)_ack = @$(SLAVE.PREFIX)_stb; 48 | assign @$(SLAVE.PREFIX)_stall = 1'b0; 49 | @REGS.N=1 50 | @REGS.0= 0 R_@$(DEVID) @$(DEVID) 51 | @BDEF.IONAME=_@$(PREFIX) 52 | @BDEF.IOTYPE=unsigned 53 | @BDEF.OSDEF=_BOARD_HAS_@$(DEVID) 54 | @BDEF.OSVAL=static volatile @$BDEF.IOTYPE *const @$BDEF.IONAME = ((@$BDEF.IOTYPE *)@$[0x%08x](REGBASE)); 55 | ## 56 | ## 57 | ## 58 | @PREFIX=buildtime 59 | @DEVID=BUILDTIME 60 | @NADDR=1 61 | @SLAVE.TYPE=SINGLE 62 | @SLAVE.BUS=wb 63 | @MAIN.DEFNS= 64 | // BUILDTIME doesnt need to include builddate.v a second time 65 | // `include "builddate.v" 66 | @MAIN.INSERT= 67 | assign @$(SLAVE.PREFIX)_idata = `BUILDTIME; 68 | assign @$(SLAVE.PREFIX)_ack = @$(SLAVE.PREFIX)_stb; 69 | assign @$(SLAVE.PREFIX)_stall = 1'b0; 70 | @REGS.N=1 71 | @REGS.0= 0 R_@$(DEVID) @$(DEVID) 72 | @BDEF.IONAME=_@$(PREFIX) 73 | @BDEF.IOTYPE=unsigned 74 | @BDEF.OSDEF=_BOARD_HAS_@$(DEVID) 75 | @BDEF.OSVAL=static volatile @$BDEF.IOTYPE *const @$BDEF.IONAME = ((@$.BDEF.IOTYPE *)@$[0x%08x](REGBASE)); 76 | -------------------------------------------------------------------------------- /autodata/wavsim.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: transmitter.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## 9 | ## Creator: Dan Gisselquist, Ph.D. 10 | ## Gisselquist Technology, LLC 11 | ## 12 | ################################################################################ 13 | ## }}} 14 | ## Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | ## {{{ 16 | ## This program is free software (firmware): you can redistribute it and/or 17 | ## modify it under the terms of the GNU General Public License as published 18 | ## by the Free Software Foundation, either version 3 of the License, or (at 19 | ## your option) any later version. 20 | ## 21 | ## This program is distributed in the hope that it will be useful, but WITHOUT 22 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | ## for more details. 25 | ## 26 | ## You should have received a copy of the GNU General Public License along 27 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | ## target there if the PDF file isn't present.) If not, see 29 | ## for a copy. 30 | ## }}} 31 | ## License: GPL, v3, as defined and found on www.gnu.org, 32 | ## {{{ 33 | ## http://www.gnu.org/licenses/gpl.html 34 | ## 35 | ################################################################################ 36 | ## 37 | ## }}} 38 | @PREFIX=tx 39 | @DEPENDS=RFSCOPE_ACCESS 40 | @SLAVE.BUS=wb 41 | @SLAVE.TYPE=DOUBLE 42 | @NADDR=8 43 | @XMITTER=amxmit 44 | @RECEIVER=amdemod 45 | @MAIN.PORTLIST= 46 | // Transmitter I/O ports 47 | o_rf_data, o_mic_csn, o_mic_sck, i_mic_miso, 48 | // Receiver I/O ports 49 | o_pwm_audio, o_pwm_shutdown_n, o_pwm_gain 50 | @MAIN.IODECL= 51 | output wire [1:0] o_rf_data; 52 | output wire o_mic_csn, o_mic_sck; 53 | input wire i_mic_miso; 54 | output wire o_pwm_audio, o_pwm_shutdown_n, o_pwm_gain; 55 | @MAIN.PARAMS= 56 | @MAIN.DEFNS= 57 | wire [1:0] rfdbg_sel; 58 | wire rfdbg_ce, txdbg_ce, rxdbg_ce; 59 | wire [31:0] rfdbg_data, txdbg_data, rxdbg_data; 60 | wire [9:0] rfdbg_hist, txdbg_hist, rxdbg_hist; 61 | // 62 | wire tx_@$(SLAVE.PREFIX)_stall, rx_@$(SLAVE.PREFIX)_stall; 63 | wire tx_@$(SLAVE.PREFIX)_ack, rx_@$(SLAVE.PREFIX)_ack; 64 | wire [31:0] tx_@$(SLAVE.PREFIX)_data, rx_@$(SLAVE.PREFIX)_data; 65 | @MAIN.INSERT= 66 | `ifdef VERILATOR 67 | // 68 | // Transmit logic 69 | // 70 | @$(XMITTER) 71 | @$(XMITTER)i(i_clk, i_reset, audio_en, rf_en, 72 | @$(SLAVE.PREFIX)_cyc, @$(SLAVE.PREFIX)_stb && !@$(SLAVE.PREFIX)_addr[2], @$(SLAVE.PREFIX)_we, 73 | @$(SLAVE.PREFIX)_addr[1:0], @$(SLAVE.PREFIX)_data, @$(SLAVE.PREFIX)_sel, 74 | tx_@$(SLAVE.PREFIX)_stall, tx_@$(SLAVE.PREFIX)_ack, tx_@$(SLAVE.PREFIX)_data, 75 | o_mic_csn, o_mic_sck, i_mic_miso, 76 | o_rf_data, 77 | rfdbg_sel, txdbg_ce, txdbg_data, txdbg_hist); 78 | 79 | // 80 | // Receiver logic 81 | // 82 | @$(RECEIVER) 83 | @$(RECEIVER)i(i_clk, i_reset, audio_en, rf_en, 84 | @$(SLAVE.PREFIX)_cyc, @$(SLAVE.PREFIX)_stb && @$(SLAVE.PREFIX)_addr[2], @$(SLAVE.PREFIX)_we, 85 | @$(SLAVE.PREFIX)_addr[1:0], @$(SLAVE.PREFIX)_data, @$(SLAVE.PREFIX)_sel, 86 | rx_@$(SLAVE.PREFIX)_stall, rx_@$(SLAVE.PREFIX)_ack, rx_@$(SLAVE.PREFIX)_data, 87 | o_rf_data, o_pwm_audio, 88 | rfdbg_sel, rxdbg_ce, rxdbg_data, rxdbg_hist); 89 | `else 90 | reg r_tx_@$(SLAVE.PREFIX)_ack, r_rx_@$(SLAVE.PREFIX)_ack; 91 | 92 | assign tx_@$(SLAVE.PREFIX)_stall = 0; 93 | assign rx_@$(SLAVE.PREFIX)_stall = 0; 94 | always @(posedge i_clk) 95 | r_tx_@$(SLAVE.PREFIX)_ack <= @$(SLAVE.PREFIX)_stb && !@$(SLAVE.PREFIX)_addr[2]; 96 | always @(posedge i_clk) 97 | r_rx_@$(SLAVE.PREFIX)_ack <= @$(SLAVE.PREFIX)_stb && @$(SLAVE.PREFIX)_addr[2]; 98 | assign tx_@$(SLAVE.PREFIX)_ack = r_tx_@$(SLAVE.PREFIX)_ack; 99 | assign rx_@$(SLAVE.PREFIX)_ack = r_rx_@$(SLAVE.PREFIX)_ack; 100 | assign tx_@$(SLAVE.PREFIX)_data = 0; 101 | assign rx_@$(SLAVE.PREFIX)_data = 0; 102 | `endif 103 | 104 | assign o_pwm_shutdown_n = audio_en; 105 | assign o_pwm_gain = audio_en; 106 | assign @$(SLAVE.PREFIX)_stall = tx_@$(SLAVE.PREFIX)_stall 107 | || rx_@$(SLAVE.PREFIX)_stall; 108 | assign @$(SLAVE.PREFIX)_ack = tx_@$(SLAVE.PREFIX)_ack 109 | || rx_@$(SLAVE.PREFIX)_ack; 110 | assign @$(SLAVE.PREFIX)_idata = (tx_@$(SLAVE.PREFIX)_ack) 111 | ? tx_@$(SLAVE.PREFIX)_data : rx_@$(SLAVE.PREFIX)_data; 112 | 113 | assign rfdbg_ce = o_gpio[8] ? rxdbg_ce : txdbg_ce; 114 | assign rfdbg_data = o_gpio[8] ? rxdbg_data : txdbg_data; 115 | assign rfdbg_hist = o_gpio[8] ? rxdbg_hist : txdbg_hist; 116 | 117 | @SIM.CLOCK=clk 118 | @SIM.INCLUDE= 119 | #include "micnco.h" 120 | @SIM.DEFNS= 121 | MICNCO *m_mic; 122 | @SIM.INIT= 123 | m_mic = new MICNCO(); 124 | @SIM.TICK= 125 | m_core->i_mic_miso= (*m_mic)(m_core->o_mic_sck, m_core->o_mic_csn); 126 | -------------------------------------------------------------------------------- /autodata/wbscope.txt: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: wbscope.txt 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: A generic scope description, from which other internal wbscopes 8 | ## may depend upon 9 | ## 10 | ## Creator: Dan Gisselquist, Ph.D. 11 | ## Gisselquist Technology, LLC 12 | ## 13 | ################################################################################ 14 | ## }}} 15 | ## Copyright (C) 2019-2024, Gisselquist Technology, LLC 16 | ## {{{ 17 | ## This program is free software (firmware): you can redistribute it and/or 18 | ## modify it under the terms of the GNU General Public License as published 19 | ## by the Free Software Foundation, either version 3 of the License, or (at 20 | ## your option) any later version. 21 | ## 22 | ## This program is distributed in the hope that it will be useful, but WITHOUT 23 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 24 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 25 | ## for more details. 26 | ## 27 | ## You should have received a copy of the GNU General Public License along 28 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 29 | ## target there if the PDF file isn't present.) If not, see 30 | ## for a copy. 31 | ## }}} 32 | ## License: GPL, v3, as defined and found on www.gnu.org, 33 | ## {{{ 34 | ## http://www.gnu.org/licenses/gpl.html 35 | ## 36 | ################################################################################ 37 | ## 38 | ## }}} 39 | @PREFIX=scope 40 | @DEVID=SCOPE 41 | @NADDR= 2 42 | @ACCESS=@$(DEVID)_SCOPE 43 | @SLAVE.TYPE=OTHER 44 | @SLAVE.BUS=wb 45 | @LOG_CAPTURE_SIZE=12 46 | @DATA_CLOCK=i_clk 47 | @CAPTURECE=1'b1 48 | @SYNCHRONOUS=1 49 | @CORE=wbscope 50 | @TRIGGER=@$(TARGET)_dbg_trigger 51 | @DEBUG=@$(TARGET)_debug 52 | @MAIN.DEFNS= 53 | // Remove this scope tag via inheritance when/if you connect the 54 | // scope interrupt 55 | // 56 | // Virilator lint_off UNUSED 57 | wire @$(PREFIX)_int; 58 | // Virilator lint_on UNUSED 59 | @MAIN.INSERT= 60 | @$(CORE) #(.LGMEM(@$(LOG_CAPTURE_SIZE)), 61 | .SYNCHRONOUS(@$(SYNCHRONOUS))) 62 | @$(PREFIX)i(@$(DATA_CLOCK), @$(CAPTURECE), @$(TRIGGER), @$(DEBUG), 63 | @$(SLAVE.BUS.CLOCK.WIRE), @$(SLAVE.PORTLIST), 64 | @$(PREFIX)_int); 65 | @MAIN.ALT= 66 | assign @$(PREFIX)_int = 0; 67 | @REGS.NOTE=// @$(PREFIX) scope 68 | @REGS.N=2 69 | @REGS.0=0 R_@$(DEVID) @$(DEVID) 70 | @REGS.1=1 R_@$(DEVID)D @$(DEVID)D 71 | @RTL.MAKE.GROUP=SCOPE 72 | @RTL.MAKE.SUBD=wbscope 73 | @RTL.MAKE.FILES=@$(CORE).v 74 | @BDEF.DEFN= 75 | #ifndef WBSCOPE_H 76 | #define WBSCOPE_H 77 | 78 | #define WBSCOPE_NO_RESET 0x80000000u 79 | #define WBSCOPE_STOPPED 0x40000000u 80 | #define WBSCOPE_TRIGGERED 0x20000000u 81 | #define WBSCOPE_PRIMED 0x10000000u 82 | #define WBSCOPE_TRIGGER (WBSCOPE_NO_RESET|0x08000000u) 83 | #define WBSCOPE_MANUAL (WBSCOPE_TRIGGER) 84 | #define WBSCOPE_DISABLE 0x04000000u 85 | 86 | typedef struct WBSCOPE_S { 87 | unsigned s_ctrl, s_data; 88 | } WBSCOPE; 89 | #endif 90 | @BDEF.IONAME=_@$(PREFIX) 91 | @BDEF.IOTYPE=WBSCOPE 92 | @BDEF.OSDEF=_BOARD_HAS_@$(DEVID) 93 | @BDEF.OSVAL=static volatile @$(BDEF.IOTYPE) *const @$(BDEF.IONAME) = ((@$(BDEF.IOTYPE) *)@$[0x%08x](REGBASE)); 94 | -------------------------------------------------------------------------------- /doc/bad-hist-multimode.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZipCPU/sdr/f143194d096579168e1c33c02713b0c44260c234/doc/bad-hist-multimode.png -------------------------------------------------------------------------------- /doc/bad-histogram.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZipCPU/sdr/f143194d096579168e1c33c02713b0c44260c234/doc/bad-histogram.png -------------------------------------------------------------------------------- /doc/cooking-w-gas-screenshot.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZipCPU/sdr/f143194d096579168e1c33c02713b0c44260c234/doc/cooking-w-gas-screenshot.png -------------------------------------------------------------------------------- /doc/good-histogram.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZipCPU/sdr/f143194d096579168e1c33c02713b0c44260c234/doc/good-histogram.png -------------------------------------------------------------------------------- /doc/qpsk-matching-audio-lost-sync.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZipCPU/sdr/f143194d096579168e1c33c02713b0c44260c234/doc/qpsk-matching-audio-lost-sync.png -------------------------------------------------------------------------------- /doc/radio-set.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ZipCPU/sdr/f143194d096579168e1c33c02713b0c44260c234/doc/radio-set.jpg -------------------------------------------------------------------------------- /gdr.pcf: -------------------------------------------------------------------------------- 1 | # set_io i_clk_12mhz 35 2 | # 3 | # set_io o_ledr 11 4 | # set_io o_ledg 37 5 | # 6 | # set_io i_btn[0] 10 ## BUTTONn 7 | # set_io i_btn[1] 20 ## P2_9 8 | # set_io i_btn[2] 19 ## P2_4 9 | # set_io i_btn[3] 18 ## P2_10 10 | # 11 | # FTDI 12 | # set_io i_host_uart_rx 6 13 | # set_io o_host_uart_tx 9 14 | # set_io o_host_uart_cts_n 15 | # set_io i_host_uart_rts_n 16 | # 17 | # PMod 1A bottom: MIC3 18 | # set_io o_mic_csn 3 # SS 7 P1A7 3 ### Top was ... 1 P1A1 4 19 | ### NC - no connect 20 | # set_io i_mic_miso 46 # MISO 10 P1A9 46 ### Top was ... 3 P1A3 47 21 | # set_io o_mic_sck 44 # SCK 9 P1A10 44 ### Top was ... 4 P1A4 45 22 | # 23 | # PMod 1A bottom: AMP2 (5-6 are GND/VCC) 24 | # set_io o_pwm_audio 3 # 1 P1A7 3 25 | # set_io o_pwm_gain 48 # 2 P1A8 48 26 | ### NC - no connect 27 | # set_io o_pwm_shutdown_n 44 # 4 P1A10 44 28 | # 29 | # Assuming sides ... 30 | # PMod 1B 31 | # set_io o_rf_clk 32 # CLK_IN P1B9 32 | # set_io o_rf_data[0] 38 # Q-In P1B2 33 | # set_io o_rf_data[1] 43 # I-In P1B1 34 | # 35 | # set_io i_rf_clk 28 # CLK_OUT P1B10 36 | # set_io i_rf_data[0] 34 # Q-Out P1B3 37 | # set_io i_rf_data[1] 31 # I-Out P1B4 38 | # 39 | # set_io io_i2c_scl 42 # I2C_CLK P1B7 40 | # set_io io_i2c_sda 36 # I2C_SDA P1B8 41 | ## 42 | -------------------------------------------------------------------------------- /mkdatev.pl: -------------------------------------------------------------------------------- 1 | #!/usr/bin/perl 2 | ################################################################################ 3 | ## 4 | ## Filename: mkdatev.pl 5 | ## {{{ 6 | ## Project: GDR, a basic Gateware Defined Radio architecture 7 | ## 8 | ## Purpose: This file creates a file containing a `define DATESTAMP 9 | ## which can be used to tell when the build took place. 10 | ## 11 | ## 12 | ## Creator: Dan Gisselquist, Ph.D. 13 | ## Gisselquist Technology, LLC 14 | ## 15 | ################################################################################ 16 | ## }}} 17 | ## Copyright (C) 2019-2024, Gisselquist Technology, LLC 18 | ## {{{ 19 | ## This program is free software (firmware): you can redistribute it and/or 20 | ## modify it under the terms of the GNU General Public License as published 21 | ## by the Free Software Foundation, either version 3 of the License, or (at 22 | ## your option) any later version. 23 | ## 24 | ## This program is distributed in the hope that it will be useful, but WITHOUT 25 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 26 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 27 | ## for more details. 28 | ## 29 | ## You should have received a copy of the GNU General Public License along 30 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 31 | ## target there if the PDF file isn't present.) If not, see 32 | ## for a copy. 33 | ## }}} 34 | ## License: GPL, v3, as defined and found on www.gnu.org, 35 | ## {{{ 36 | ## http://www.gnu.org/licenses/gpl.html 37 | ## 38 | ################################################################################ 39 | ## 40 | ## }}} 41 | 42 | $now = time; 43 | ($sc,$mn,$nhr,$ndy,$nmo,$nyr,$nwday,$nyday,$nisdst) = localtime($now); 44 | $nyr = $nyr+1900; $nmo = $nmo+1; 45 | 46 | # And just because perl doesn't like my dollars signs ... 47 | $doc = '$(ROOT)/doc'; 48 | 49 | print <<"EOM"; 50 | //////////////////////////////////////////////////////////////////////////////// 51 | // 52 | // Filename: builddate.v 53 | // {{{ 54 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 55 | // 56 | // Purpose: This file records the date of the last build. Running "make" 57 | // in the main directory will create this file. The `define found 58 | // within it then creates a version stamp that can be used to tell which 59 | // configuration is within an FPGA and so forth. 60 | // 61 | // Creator: Dan Gisselquist, Ph.D. 62 | // Gisselquist Technology, LLC 63 | // 64 | //////////////////////////////////////////////////////////////////////////////// 65 | // }}} 66 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 67 | // {{{ 68 | // This program is free software (firmware): you can redistribute it and/or 69 | // modify it under the terms of the GNU General Public License as published 70 | // by the Free Software Foundation, either version 3 of the License, or (at 71 | // your option) any later version. 72 | // 73 | // This program is distributed in the hope that it will be useful, but WITHOUT 74 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 75 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 76 | // for more details. 77 | // 78 | // You should have received a copy of the GNU General Public License along 79 | // with this program. (It's in the $doc directory. Run make with no 80 | // target there if the PDF file isn't present.) If not, see 81 | // for a copy. 82 | // }}} 83 | // License: GPL, v3, as defined and found on www.gnu.org, 84 | // {{{ 85 | // http://www.gnu.org/licenses/gpl.html 86 | // 87 | //////////////////////////////////////////////////////////////////////////////// 88 | // 89 | // }}} 90 | `ifndef DATESTAMP 91 | EOM 92 | 93 | print "`define DATESTAMP 32\'h"; 94 | printf("%04d%02d%02d\n", $nyr, $nmo, $ndy); 95 | print "`define BUILDTIME 32\'h"; 96 | printf("%04d%02d%02d\n", $nhr, $mn, $sc); 97 | printf("`endif\n//\n"); 98 | -------------------------------------------------------------------------------- /rtl/.gitignore: -------------------------------------------------------------------------------- 1 | obj_dir 2 | design.h 3 | sdr.json 4 | *.pnrlog 5 | *.yslog 6 | *.asc 7 | *.bin 8 | -------------------------------------------------------------------------------- /rtl/Makefile: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: rtl/Makefile 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: To direct the Yosys/NextPNR + Verilator build of the SDR 8 | ## sources. The result is C++ code (built by Verilator) that 9 | ## is then built (herein) into a library, as well as the bit file that 10 | ## can then be loaded onto the device. 11 | ## 12 | ## Creator: Dan Gisselquist, Ph.D. 13 | ## Gisselquist Technology, LLC 14 | ## 15 | ################################################################################ 16 | ## }}} 17 | ## Copyright (C) 2019-2024, Gisselquist Technology, LLC 18 | ## {{{ 19 | ## This program is free software (firmware): you can redistribute it and/or 20 | ## modify it under the terms of the GNU General Public License as published 21 | ## by the Free Software Foundation, either version 3 of the License, or (at 22 | ## your option) any later version. 23 | ## 24 | ## This program is distributed in the hope that it will be useful, but WITHOUT 25 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 26 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 27 | ## for more details. 28 | ## 29 | ## You should have received a copy of the GNU General Public License along 30 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 31 | ## target there if the PDF file isn't present.) If not, see 32 | ## for a copy. 33 | ## }}} 34 | ## License: GPL, v3, as defined and found on www.gnu.org, 35 | ## {{{ 36 | ## http://www.gnu.org/licenses/gpl.html 37 | ## 38 | ################################################################################ 39 | ## 40 | ## }}} 41 | .PHONY: all 42 | all: 43 | # 44 | # Our tools 45 | YOSYS := yosys 46 | NEXTPNR:= nextpnr-ice40 47 | ICEPACK:= icepack 48 | # Our files 49 | YYMMDD=`date +%Y%m%d` 50 | CXX := g++ 51 | FBDIR := . 52 | VDIRFB:= $(FBDIR)/obj_dir 53 | VOBJ := obj_dir 54 | BASE := main 55 | YLOG := sdr.yslog 56 | PNRLOG:= sdr.pnrlog 57 | JSON := sdr.json 58 | CONSTRAINTS:=sdr.pcf 59 | ASCFIL := sdr.asc 60 | BINFILE:= sdr.bin 61 | # 62 | # 63 | all: sim design.h $(BINFILE) 64 | 65 | .DELETE_ON_ERROR: 66 | .PHONY: sim 67 | sim: $(VOBJ)/V$(BASE)__ALL.a 68 | SUBMAKE := $(MAKE) --no-print-directory -C $(VOBJ) -f 69 | ifeq ($(VERILATOR_ROOT),) 70 | VERILATOR := verilator 71 | else 72 | VERILATOR := $(VERILATOR_ROOT)/bin/verilator 73 | endif 74 | VFLAGS = -Wall -Wno-TIMESCALEMOD --MMD -O3 --trace -Mdir $(VDIRFB) $(AUTOVDIRS) -cc 75 | 76 | -include make.inc 77 | 78 | $(VOBJ)/V$(BASE)__ALL.a: $(VOBJ)/V$(BASE).h 79 | $(VOBJ)/V$(BASE).mk: $(VOBJ)/V$(BASE).cpp 80 | $(VOBJ)/V$(BASE).cpp: $(VOBJ)/V$(BASE).h 81 | $(VOBJ)/V$(BASE).h: $(VFLIST) 82 | $(VERILATOR) $(VFLAGS) $(BASE).v --top-module main 83 | 84 | # $(VOBJ)/Venetctrl.h $(VOBJ)/Venetctrl.cpp $(VOBJ)/Venetctrl.mk: enetctrl.v 85 | $(VOBJ)/V%.h: $(FBDIR)/%.v 86 | $(VERILATOR) $(VFLAGS) $*.v 87 | 88 | $(VOBJ)/V%.cpp: $(VOBJ)/V%.h 89 | $(VOBJ)/V%.mk: $(VOBJ)/V%.h 90 | $(VOBJ)/V%.h: $(FBDIR)/%.v 91 | 92 | .PHONY: yosys 93 | yosys: $(JSON) 94 | $(JSON): toplevel.v $(VFLIST) 95 | $(YOSYS) -ql $(YLOG) -p 'synth_ice40 -device u -abc9 -dsp -top toplevel -json $(JSON)' toplevel.v wbxbar.v skidbuffer.v addrdecode.v $(sort $(VFLIST)) 96 | 97 | .PHONY: nextpnr 98 | CHIP := --up5k -r --package sg48 99 | CLOCKS := --freq 36 100 | $(ASCFIL): $(JSON) $(CONSTRAINTS) clocks.py 101 | $(NEXTPNR) -q --json $(JSON) $(CHIP) --pcf $(CONSTRAINTS) $(CLOCKS) --asc $(ASCFIL) -l $(PNRLOG) 102 | nextpnr: $(TEXTCFG) 103 | pnr: $(TEXTCFG) 104 | 105 | .PHONY: bin 106 | $(BINFILE): $(ASCFIL) 107 | # icetime -d up5k -c 36 $< 108 | $(ICEPACK) $(ASCFIL) $(BINFILE) 109 | bin: $(SVFILE) 110 | 111 | design.h: main.v 112 | @echo "Building design.h" 113 | @echo "// " > $@ 114 | @echo "// Do not edit this file, it is automatically generated!" >> $@ 115 | @echo "// To generate this file, \"make design.h\" in the rtl directory." >> $@ 116 | @echo "// " >> $@ 117 | @echo "#ifndef DESIGN_H" >> $@ 118 | @echo "#define DESIGN_H" >> $@ 119 | @echo >> $@ 120 | @grep "^\`" $< | grep -v default_nettype \ 121 | | grep -v include \ 122 | | grep -v timescale \ 123 | | sed -e '{ s/^`/#/ }' \ 124 | | sed -e ' s/^#elsif/#elif/' \ 125 | | sed -e ' s/main.v/design.h/' >> $@ 126 | @echo >> $@ 127 | @echo "#endif // DESIGN_H" >> $@ 128 | 129 | $(VOBJ)/V%__ALL.a: $(VOBJ)/V%.mk 130 | $(SUBMAKE) V$*.mk 131 | 132 | .PHONY: archive 133 | archive: 134 | tar --transform s,^,$(YYMMDD)-rtl/, -chjf $(YYMMDD)-rtl.tjz Makefile *.v cpu/*.v 135 | 136 | .PHONY: clean 137 | clean: 138 | rm -rf $(VOBJ)/ design.h 139 | rm -rf $(YLOG) $(PNRLOG) $(JSON) $(TEXTCFG) $(SVFILE) $(BINFILE) 140 | 141 | # 142 | # Note Verilator's dependency created information, and include it here if we 143 | # can 144 | DEPS := $(wildcard $(VOBJ)/*.d) 145 | ifneq ($(MAKECMDGOALS),clean) 146 | ifneq ($(DEPS),) 147 | include $(DEPS) 148 | endif 149 | endif 150 | -------------------------------------------------------------------------------- /rtl/builddate.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: builddate.v 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: This file records the date of the last build. Running "make" 8 | // in the main directory will create this file. The `define found 9 | // within it then creates a version stamp that can be used to tell which 10 | // configuration is within an FPGA and so forth. 11 | // 12 | // Creator: Dan Gisselquist, Ph.D. 13 | // Gisselquist Technology, LLC 14 | // 15 | //////////////////////////////////////////////////////////////////////////////// 16 | // }}} 17 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 18 | // {{{ 19 | // This program is free software (firmware): you can redistribute it and/or 20 | // modify it under the terms of the GNU General Public License as published 21 | // by the Free Software Foundation, either version 3 of the License, or (at 22 | // your option) any later version. 23 | // 24 | // This program is distributed in the hope that it will be useful, but WITHOUT 25 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 26 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 27 | // for more details. 28 | // 29 | // You should have received a copy of the GNU General Public License along 30 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 31 | // target there if the PDF file isn't present.) If not, see 32 | // for a copy. 33 | // }}} 34 | // License: GPL, v3, as defined and found on www.gnu.org, 35 | // {{{ 36 | // http://www.gnu.org/licenses/gpl.html 37 | // 38 | //////////////////////////////////////////////////////////////////////////////// 39 | // 40 | // }}} 41 | `ifndef DATESTAMP 42 | `define DATESTAMP 32'h20210125 43 | `define BUILDTIME 32'h00180257 44 | `endif 45 | // 46 | -------------------------------------------------------------------------------- /rtl/clkcounter.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: clkcounter.v 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: Given a clock, asynchronous to the main or system clock, and 8 | // given a PPS strobe that is synchronous to the main clock, count 9 | // the number of clock ticks that take place between system clocks. 10 | // 11 | // Creator: Dan Gisselquist, Ph.D. 12 | // Gisselquist Technology, LLC 13 | // 14 | //////////////////////////////////////////////////////////////////////////////// 15 | // }}} 16 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 17 | // {{{ 18 | // This program is free software (firmware): you can redistribute it and/or 19 | // modify it under the terms of the GNU General Public License as published 20 | // by the Free Software Foundation, either version 3 of the License, or (at 21 | // your option) any later version. 22 | // 23 | // This program is distributed in the hope that it will be useful, but WITHOUT 24 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 25 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 26 | // for more details. 27 | // 28 | // You should have received a copy of the GNU General Public License along 29 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 30 | // target there if the PDF file isn't present.) If not, see 31 | // for a copy. 32 | // }}} 33 | // License: GPL, v3, as defined and found on www.gnu.org, 34 | // {{{ 35 | // http://www.gnu.org/licenses/gpl.html 36 | // 37 | //////////////////////////////////////////////////////////////////////////////// 38 | // 39 | // 40 | `default_nettype none 41 | // }}} 42 | module clkcounter #( 43 | // {{{ 44 | parameter SYSFREQUENCY_HZ = 100_000_000, 45 | LGNAVGS = 6, BUSW=32 46 | // }}} 47 | ) ( 48 | // {{{ 49 | input wire i_sys_clk, i_tst_clk, 50 | output wire [(BUSW-1):0] o_sys_counts 51 | // }}} 52 | ); 53 | 54 | // Signal declarations 55 | // {{{ 56 | reg [$clog2(SYSFREQUENCY_HZ)-1:0] sys_pps_counts; 57 | reg ck_pps; 58 | reg [(LGNAVGS-1):0] avgs; 59 | reg tst_posedge; 60 | reg [(BUSW-LGNAVGS-1):0] counter; 61 | reg [(BUSW-LGNAVGS-1):0] r_sys_counts; 62 | (* ASYNC_REG = "TRUE" *) 63 | reg q_v, qq_v; 64 | // }}} 65 | 66 | // ck_pps, sys_pps_counts 67 | // {{{ 68 | initial { ck_pps, sys_pps_counts } = 0; 69 | always @(posedge i_sys_clk) 70 | if (sys_pps_counts == 0) 71 | begin 72 | sys_pps_counts <= SYSFREQUENCY_HZ-1; 73 | ck_pps <= 1; 74 | end else begin 75 | ck_pps <= 0; 76 | sys_pps_counts <= sys_pps_counts - 1; 77 | end 78 | // }}} 79 | 80 | // avgs, accumulated on the test clock 81 | // {{{ 82 | always @(posedge i_tst_clk) 83 | avgs <= avgs + 1'b1; 84 | // }}} 85 | 86 | // tst_posedge: Move the positive edge of the MSB of avgs across clocks 87 | // {{{ 88 | always @(posedge i_sys_clk) 89 | q_v <= avgs[(LGNAVGS-1)]; 90 | always @(posedge i_sys_clk) 91 | qq_v <= q_v; 92 | 93 | always @(posedge i_sys_clk) 94 | tst_posedge <= (!qq_v)&&(q_v); 95 | // }}} 96 | 97 | // counter: the actual clock counter 98 | // {{{ 99 | always @(posedge i_sys_clk) 100 | if (ck_pps) 101 | counter <= 0; 102 | else if (tst_posedge) 103 | counter <= counter + 1'b1; 104 | // }}} 105 | 106 | // r_sys_counts, o_sys_counts 107 | // {{{ 108 | always @(posedge i_sys_clk) 109 | if (ck_pps) 110 | r_sys_counts <= counter; 111 | 112 | assign o_sys_counts = { r_sys_counts, {(LGNAVGS){1'b0}} }; 113 | // }}} 114 | endmodule 115 | -------------------------------------------------------------------------------- /rtl/clocks.py: -------------------------------------------------------------------------------- 1 | ctx.addClock("i_clk_12mhz",12) 2 | -------------------------------------------------------------------------------- /rtl/cycliciir.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: cycliciir.v 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: Implements a cycle of recursive averaging filters. 8 | // 9 | // Creator: Dan Gisselquist, Ph.D. 10 | // Gisselquist Technology, LLC 11 | // 12 | //////////////////////////////////////////////////////////////////////////////// 13 | // }}} 14 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 15 | // {{{ 16 | // This program is free software (firmware): you can redistribute it and/or 17 | // modify it under the terms of the GNU General Public License as published 18 | // by the Free Software Foundation, either version 3 of the License, or (at 19 | // your option) any later version. 20 | // 21 | // This program is distributed in the hope that it will be useful, but WITHOUT 22 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | // for more details. 25 | // 26 | // You should have received a copy of the GNU General Public License along 27 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | // target there if the PDF file isn't present.) If not, see 29 | // for a copy. 30 | // }}} 31 | // License: GPL, v3, as defined and found on www.gnu.org, 32 | // {{{ 33 | // http://www.gnu.org/licenses/gpl.html 34 | // 35 | //////////////////////////////////////////////////////////////////////////////// 36 | // 37 | // 38 | `default_nettype none 39 | // }}} 40 | module cycliciir #( 41 | // {{{ 42 | parameter IW=15, OW=16, LGALPHA=4, 43 | parameter AW=(IW > OW ? IW : OW) +LGALPHA, 44 | parameter NCYCLE = 8, // Must be >= 4 45 | localparam LGNCYCLE = $clog2(NCYCLE) 46 | // }}} 47 | ) ( 48 | // {{{ 49 | input wire i_clk, i_reset, i_ce, 50 | input wire [(IW-1):0] i_data, 51 | output wire [(OW-1):0] o_data 52 | // }}} 53 | ); 54 | 55 | // Signal declarations 56 | // {{{ 57 | reg signed [(AW-1):0] mem [0:(1< for a copy. 30 | // }}} 31 | // License: GPL, v3, as defined and found on www.gnu.org, 32 | // {{{ 33 | // http://www.gnu.org/licenses/gpl.html 34 | // 35 | //////////////////////////////////////////////////////////////////////////////// 36 | // 37 | // 38 | `default_nettype none 39 | // }}} 40 | module descrambler #( 41 | // {{{ 42 | parameter WS=7, // Nbr of output bits per clock 43 | LN=31, // LFSR Reg len/polynomial deg 44 | parameter [(LN-1):0] TAPS = 31'h00_00_20_01, 45 | INITIAL_FILL = { { (LN-1){1'b0}}, 1'b1 } 46 | // }}} 47 | ) ( 48 | // {{{ 49 | input wire i_clk, i_reset, i_ce, 50 | input wire [(WS-1):0] i_word, 51 | output reg [(WS-1):0] o_word 52 | // }}} 53 | ); 54 | 55 | // Signal declarations 56 | // {{{ 57 | integer ik; 58 | 59 | reg [LN-1:0] sreg; 60 | reg [LN-1:0] step [0:WS-1]; 61 | // }}} 62 | 63 | // step[] 64 | // {{{ 65 | always @(*) 66 | begin 67 | step[0] = { i_word[WS-1], sreg[LN-1:1] }; 68 | 69 | for(ik=1; ik for a copy. 32 | // }}} 33 | // License: GPL, v3, as defined and found on www.gnu.org, 34 | // {{{ 35 | // http://www.gnu.org/licenses/gpl.html 36 | // 37 | //////////////////////////////////////////////////////////////////////////////// 38 | // 39 | // 40 | `default_nettype none 41 | // }}} 42 | module hbbus(i_clk, 43 | i_rx_stb, i_rx_byte, 44 | o_wb_cyc, o_wb_stb, o_wb_we, o_wb_addr, o_wb_data, o_wb_sel, 45 | i_wb_stall, i_wb_ack, i_wb_data, i_wb_err, 46 | i_interrupt, 47 | o_tx_stb, o_tx_byte, i_tx_busy); 48 | parameter AW=30; 49 | localparam DW=32; 50 | input wire i_clk; 51 | input wire i_rx_stb; 52 | input wire [7:0] i_rx_byte; 53 | output wire o_wb_cyc, o_wb_stb, o_wb_we; 54 | output wire [(AW-1):0] o_wb_addr; 55 | output wire [(DW-1):0] o_wb_data; 56 | output wire [(DW/8-1):0] o_wb_sel; 57 | input wire i_wb_stall, i_wb_ack; 58 | input wire [(DW-1):0] i_wb_data; 59 | input wire i_wb_err; 60 | input wire i_interrupt; 61 | output wire o_tx_stb; 62 | output wire [7:0] o_tx_byte; 63 | input wire i_tx_busy; 64 | 65 | 66 | wire w_reset; 67 | wire dec_stb; 68 | wire [4:0] dec_bits; 69 | wire iw_stb; 70 | wire [33:0] iw_word; 71 | wire ow_stb; 72 | wire [33:0] ow_word; 73 | wire idl_busy, int_stb; 74 | wire [33:0] int_word; 75 | wire hb_busy, idl_stb; 76 | wire [33:0] idl_word; 77 | wire hb_stb, hx_busy; 78 | wire [4:0] hb_bits; 79 | wire hx_stb, nl_busy; 80 | wire [6:0] hx_byte; 81 | // verilator lint_off UNUSED 82 | wire wb_busy; 83 | wire int_busy; 84 | // verilator lint_on UNUSED 85 | 86 | // 87 | // 88 | // The incoming stream ... 89 | // 90 | // 91 | // First step, convert the incoming bytes into bits 92 | hbdechex dechxi(i_clk, 93 | i_rx_stb, i_rx_byte, 94 | dec_stb, w_reset, dec_bits); 95 | 96 | 97 | // ... that can then be transformed into bus command words 98 | hbpack packxi(i_clk, w_reset, 99 | dec_stb, dec_bits, iw_stb, iw_word); 100 | 101 | // 102 | // We'll use these bus command words to drive a wishbone bus 103 | // 104 | hbexec #(AW) wbexec(i_clk, w_reset, iw_stb, iw_word, wb_busy, 105 | ow_stb, ow_word, 106 | o_wb_cyc, o_wb_stb, o_wb_we, o_wb_addr, o_wb_data, 107 | o_wb_sel, i_wb_ack, i_wb_stall, i_wb_err, 108 | i_wb_data); 109 | 110 | // We'll then take the responses from the bus, and add an interrupt 111 | // flag to the output any time things are idle. This also acts 112 | // as a one-stage FIFO 113 | hbints addints(i_clk, w_reset, i_interrupt, 114 | ow_stb, ow_word, int_busy, 115 | int_stb, int_word, idl_busy); 116 | 117 | // 118 | // 119 | // 120 | hbidle addidles(i_clk, w_reset, 121 | int_stb, int_word, idl_busy, 122 | idl_stb, idl_word, hb_busy); 123 | 124 | // We'll then take that ouput from that stage, and disassemble the 125 | // response word into smaller (5-bit) sized units ... 126 | hbdeword unpackx(i_clk, w_reset, 127 | idl_stb, idl_word, hb_busy, 128 | hb_stb, hb_bits, hx_busy); 129 | 130 | // ... that can then be transmitted back down the channel 131 | hbgenhex genhex(i_clk, w_reset, hb_stb, hb_bits, hx_busy, 132 | hx_stb, hx_byte, nl_busy); 133 | 134 | // 135 | // We'll also add carriage return newline pairs any time the channel 136 | // goes idle 137 | hbnewline addnl(i_clk, w_reset, hx_stb, hx_byte, nl_busy, 138 | o_tx_stb, o_tx_byte[6:0], i_tx_busy); 139 | assign o_tx_byte[7] = 1'b0; 140 | 141 | endmodule 142 | -------------------------------------------------------------------------------- /rtl/hexbus/hbdechex.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: hbdechex.v 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: To decode incoming hexadecimal numbers, together with some 8 | // out of band control characters, into a stream that can be 9 | // further processed into a wishbone bus command stream. 10 | // 11 | // Note that the decoding is stateless, yet it still requires one clock. 12 | // 13 | // 14 | // Creator: Dan Gisselquist, Ph.D. 15 | // Gisselquist Technology, LLC 16 | // 17 | //////////////////////////////////////////////////////////////////////////////// 18 | // }}} 19 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 20 | // {{{ 21 | // This program is free software (firmware): you can redistribute it and/or 22 | // modify it under the terms of the GNU General Public License as published 23 | // by the Free Software Foundation, either version 3 of the License, or (at 24 | // your option) any later version. 25 | // 26 | // This program is distributed in the hope that it will be useful, but WITHOUT 27 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 28 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 29 | // for more details. 30 | // 31 | // You should have received a copy of the GNU General Public License along 32 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 33 | // target there if the PDF file isn't present.) If not, see 34 | // for a copy. 35 | // }}} 36 | // License: GPL, v3, as defined and found on www.gnu.org, 37 | // {{{ 38 | // http://www.gnu.org/licenses/gpl.html 39 | // 40 | //////////////////////////////////////////////////////////////////////////////// 41 | // 42 | // }}} 43 | module hbdechex(i_clk, i_stb, i_byte, o_dh_stb, o_reset, o_dh_bits); 44 | input wire i_clk, i_stb; 45 | input wire [7:0] i_byte; 46 | output reg o_dh_stb; 47 | output reg o_reset; 48 | output reg [4:0] o_dh_bits; 49 | 50 | initial o_reset = 1'b1; 51 | always @(posedge i_clk) 52 | o_reset <= (i_stb)&&(i_byte[6:0] == 7'h54); 53 | 54 | initial o_dh_stb = 1'b0; 55 | always @(posedge i_clk) 56 | o_dh_stb <= (i_stb)&&(i_byte[6:0] != 7'h7f); 57 | 58 | always @(posedge i_clk) 59 | begin 60 | // These are the defaults, to be overwridden by the ifs below 61 | o_dh_bits <= 5'h00; 62 | 63 | case(i_byte[6:0]) 64 | // Transform hexadecimal characters '0' to '9' to their 65 | // binary equivalents, with the out of band flag cleared 66 | 7'h30: o_dh_bits <= 5'h00; 67 | 7'h31: o_dh_bits <= 5'h01; 68 | 7'h32: o_dh_bits <= 5'h02; 69 | 7'h33: o_dh_bits <= 5'h03; 70 | 7'h34: o_dh_bits <= 5'h04; 71 | 7'h35: o_dh_bits <= 5'h05; 72 | 7'h36: o_dh_bits <= 5'h06; 73 | 7'h37: o_dh_bits <= 5'h07; 74 | 7'h38: o_dh_bits <= 5'h08; 75 | 7'h39: o_dh_bits <= 5'h09; 76 | // 77 | // Hexadecimal characters 'a' through 'f' 78 | // (Note that 'A' is used for 'Address' and hence we don't 79 | // support upper case hexadecimal letters here) 80 | 7'h61: o_dh_bits <= 5'h0a; 81 | 7'h62: o_dh_bits <= 5'h0b; 82 | 7'h63: o_dh_bits <= 5'h0c; 83 | 7'h64: o_dh_bits <= 5'h0d; 84 | 7'h65: o_dh_bits <= 5'h0e; 85 | 7'h66: o_dh_bits <= 5'h0f; 86 | // 87 | // Other characters set out of band information (o_dh_bits[4]) 88 | // These are primarily the bus command bits 89 | 7'h52: o_dh_bits <= 5'h10; // 'R' 90 | 7'h57: o_dh_bits <= 5'h11; // 'W' 91 | 7'h41: o_dh_bits <= 5'h12; // 'A' 92 | 7'h53: o_dh_bits <= 5'h13; // 'S' 93 | 7'h54: o_dh_bits <= 5'h16; // 'T' --set for form only 94 | default: // an "other" character, to be subsequently ignored. 95 | // Also used as an end of word character, if received 96 | o_dh_bits <= 5'h1f; 97 | endcase 98 | end 99 | 100 | // And just to keep verilator happy 101 | // verilator lint_on UNUSED 102 | wire unused; 103 | assign unused = i_byte[7]; 104 | // verilator lint_off UNUSED 105 | 106 | endmodule 107 | 108 | -------------------------------------------------------------------------------- /rtl/hexbus/hbdeword.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: hbdeword.v 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: Once a word has come from the bus, hbdeword turns that 34-bit 8 | // word into a series of 5-bit data values. The top bit of this 9 | // five bit word is an out of band bit, indicating that the top two 10 | // command bits of the interface have changed. 11 | // 12 | // 13 | // Creator: Dan Gisselquist, Ph.D. 14 | // Gisselquist Technology, LLC 15 | // 16 | //////////////////////////////////////////////////////////////////////////////// 17 | // }}} 18 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 19 | // {{{ 20 | // This program is free software (firmware): you can redistribute it and/or 21 | // modify it under the terms of the GNU General Public License as published 22 | // by the Free Software Foundation, either version 3 of the License, or (at 23 | // your option) any later version. 24 | // 25 | // This program is distributed in the hope that it will be useful, but WITHOUT 26 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 27 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 28 | // for more details. 29 | // 30 | // You should have received a copy of the GNU General Public License along 31 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 32 | // target there if the PDF file isn't present.) If not, see 33 | // for a copy. 34 | // }}} 35 | // License: GPL, v3, as defined and found on www.gnu.org, 36 | // {{{ 37 | // http://www.gnu.org/licenses/gpl.html 38 | // 39 | //////////////////////////////////////////////////////////////////////////////// 40 | // 41 | // }}} 42 | module hbdeword(i_clk, i_reset, 43 | i_stb, i_word, o_dw_busy, 44 | o_dw_stb, o_dw_bits, i_tx_busy); 45 | input wire i_clk, i_reset; 46 | // The input command word interface 47 | input wire i_stb; 48 | input wire [33:0] i_word; 49 | output wire o_dw_busy; 50 | // The output command word interface 51 | output reg o_dw_stb; 52 | output reg [4:0] o_dw_bits; 53 | input wire i_tx_busy; 54 | 55 | 56 | reg [3:0] r_len; 57 | reg [31:0] r_word; 58 | 59 | initial o_dw_stb = 1'b0; 60 | initial r_len = 4'h0; 61 | 62 | always @(posedge i_clk) 63 | if (i_reset) 64 | begin 65 | r_len <= 0; 66 | o_dw_stb <= 0; 67 | end else if ((i_stb)&&(!o_dw_busy)) 68 | begin 69 | o_dw_stb <= 1'b1; 70 | if (i_word[33:32] == 2'b11) 71 | r_len <= 4'h0; 72 | else 73 | r_len <= 4'h8; 74 | end else if (!i_tx_busy) 75 | begin 76 | o_dw_stb <= (r_len != 4'h0); 77 | if (r_len != 4'h0) 78 | r_len <= r_len - 1'b1; 79 | end 80 | 81 | always @(posedge i_clk) 82 | // No reset logic needed 83 | if ((i_stb)&&(!o_dw_busy)) 84 | r_word <= i_word[31:0]; 85 | else if (!i_tx_busy) 86 | // Whenever we aren't busy, a new nibble is accepted 87 | // and the word shifts. If we never set our output 88 | // strobe, this will never become busy, but if the 89 | // register isn't in use, there's no penalty for 90 | // clearing it repeatedly 91 | r_word <= { r_word[27:0], 4'h0 }; 92 | 93 | always @(posedge i_clk) 94 | if ((i_stb)&&(!o_dw_busy)) 95 | begin 96 | if (i_word[33:32] == 2'b11) 97 | o_dw_bits <= i_word[33:29]; 98 | else 99 | o_dw_bits <= { 3'b100, i_word[33:32] }; 100 | end else if (!i_tx_busy) 101 | o_dw_bits <= { 1'b0, r_word[31:28] }; 102 | 103 | assign o_dw_busy = o_dw_stb; 104 | 105 | endmodule 106 | 107 | -------------------------------------------------------------------------------- /rtl/hexbus/hbgenhex.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: hbgenhex.v 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: Supports a conversion from a five digit channel to a printable 8 | // ASCII character representing the lower four bits, or special 9 | // command characters instead if the MSB (fifth bit) is set. We use an 10 | // lowercase hexadecimal for the conversion as follows: 11 | // 12 | // 1'b0,0-9 -> 0-9 13 | // 1'b0,10-15 -> a-f 14 | // 15 | // Other out of band characters are: 16 | // 17 | // 5'h10 -> R (Read) 18 | // 5'h11 -> W (Write) 19 | // 5'h12 -> A (Address) 20 | // 5'h13 -> S (Special) 21 | // 5'h14 -> I (Interrupt) 22 | // 5'h15 -> Z (IDLE) 23 | // 5'h16 -> T (Reset) 24 | // 25 | // All others characters will cause a carriage return, newline pair 26 | // to be sent, with the exception that duplicate carriage return, newlin 27 | // pairs will be suppressed. 28 | // 29 | // Creator: Dan Gisselquist, Ph.D. 30 | // Gisselquist Technology, LLC 31 | // 32 | //////////////////////////////////////////////////////////////////////////////// 33 | // }}} 34 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 35 | // {{{ 36 | // This program is free software (firmware): you can redistribute it and/or 37 | // modify it under the terms of the GNU General Public License as published 38 | // by the Free Software Foundation, either version 3 of the License, or (at 39 | // your option) any later version. 40 | // 41 | // This program is distributed in the hope that it will be useful, but WITHOUT 42 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 43 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 44 | // for more details. 45 | // 46 | // You should have received a copy of the GNU General Public License along 47 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 48 | // target there if the PDF file isn't present.) If not, see 49 | // for a copy. 50 | // }}} 51 | // License: GPL, v3, as defined and found on www.gnu.org, 52 | // {{{ 53 | // http://www.gnu.org/licenses/gpl.html 54 | // 55 | //////////////////////////////////////////////////////////////////////////////// 56 | // 57 | // 58 | `default_nettype none 59 | // }}} 60 | module hbgenhex(i_clk, i_reset, i_stb, i_bits, o_gx_busy, o_gx_stb, o_gx_char, i_busy); 61 | input wire i_clk, i_reset; 62 | input wire i_stb; 63 | input wire [4:0] i_bits; 64 | output wire o_gx_busy; 65 | output reg o_gx_stb; 66 | output reg [6:0] o_gx_char; 67 | input wire i_busy; 68 | 69 | initial o_gx_stb = 1'b0; 70 | always @(posedge i_clk) 71 | if (i_reset) 72 | o_gx_stb <= 1'b0; 73 | else if (!o_gx_busy) 74 | o_gx_stb <= i_stb; 75 | 76 | reg [7:0] w_gx_char; 77 | always @(*) 78 | case(i_bits) 79 | 5'h00: w_gx_char = "0"; 80 | 5'h01: w_gx_char = "1"; 81 | 5'h02: w_gx_char = "2"; 82 | 5'h03: w_gx_char = "3"; 83 | 5'h04: w_gx_char = "4"; 84 | 5'h05: w_gx_char = "5"; 85 | 5'h06: w_gx_char = "6"; 86 | 5'h07: w_gx_char = "7"; 87 | 5'h08: w_gx_char = "8"; 88 | 5'h09: w_gx_char = "9"; 89 | 5'h0a: w_gx_char = "a"; 90 | 5'h0b: w_gx_char = "b"; 91 | 5'h0c: w_gx_char = "c"; 92 | 5'h0d: w_gx_char = "d"; 93 | 5'h0e: w_gx_char = "e"; 94 | 5'h0f: w_gx_char = "f"; 95 | // 96 | 5'h10: w_gx_char = "R"; // Read response w/data 97 | 5'h11: w_gx_char = "K"; // Write ACK 98 | 5'h12: w_gx_char = "A"; // Address was set 99 | 5'h13: w_gx_char = "S"; // Special 100 | // 101 | 5'h18: w_gx_char = "T"; // reseT 102 | 5'h19: w_gx_char = "E"; // BUS Error 103 | 5'h1a: w_gx_char = "I"; // Interrupt 104 | 5'h1b: w_gx_char = "Z"; // Zzzz -- I'm here, but sleeping 105 | default: w_gx_char = 8'hd; // Carriage return 106 | endcase 107 | 108 | initial o_gx_char = 7'h00; 109 | always @(posedge i_clk) 110 | if (!o_gx_busy) 111 | o_gx_char <= w_gx_char[6:0]; 112 | 113 | assign o_gx_busy = (o_gx_stb)&&(i_busy); 114 | 115 | // Verilator lint_off UNUSED 116 | wire unused; 117 | assign unused = w_gx_char[7]; 118 | // Verilator lint_on UNUSED 119 | `ifdef FORMAL 120 | `ifdef HBGENHEX 121 | `define ASSUME assume 122 | `define ASSERT assert 123 | `else 124 | `define ASSUME assert 125 | `define ASSERT assert 126 | `endif 127 | //// 128 | reg f_past_valid; 129 | initial f_past_valid = 1'b0; 130 | always @(posedge i_clk) 131 | f_past_valid <= 1'b1; 132 | 133 | always @(posedge i_clk) 134 | if ((f_past_valid)&&(!$past(i_reset)) 135 | &&($past(i_stb))&&($past(o_gx_busy))) 136 | `ASSUME(($stable(i_stb))&&($stable(i_bits))); 137 | always @(posedge i_clk) 138 | if ((f_past_valid)&&(!$past(i_reset)) 139 | &&($past(o_gx_stb))&&($past(i_busy))) 140 | `ASSERT(($stable(o_gx_stb))&&($stable(o_gx_char))); 141 | always @(posedge i_clk) 142 | if ((f_past_valid)&&(!$past(i_reset))&&($past(i_stb))&&(!$past(i_busy))) 143 | `ASSERT(o_gx_stb); 144 | `endif 145 | endmodule 146 | 147 | -------------------------------------------------------------------------------- /rtl/hexbus/hbidle.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: hbidle.v 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: 8 | // 9 | // Creator: Dan Gisselquist, Ph.D. 10 | // Gisselquist Technology, LLC 11 | // 12 | //////////////////////////////////////////////////////////////////////////////// 13 | // }}} 14 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 15 | // {{{ 16 | // This program is free software (firmware): you can redistribute it and/or 17 | // modify it under the terms of the GNU General Public License as published 18 | // by the Free Software Foundation, either version 3 of the License, or (at 19 | // your option) any later version. 20 | // 21 | // This program is distributed in the hope that it will be useful, but WITHOUT 22 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | // for more details. 25 | // 26 | // You should have received a copy of the GNU General Public License along 27 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | // target there if the PDF file isn't present.) If not, see 29 | // for a copy. 30 | // }}} 31 | // License: GPL, v3, as defined and found on www.gnu.org, 32 | // {{{ 33 | // http://www.gnu.org/licenses/gpl.html 34 | // 35 | //////////////////////////////////////////////////////////////////////////////// 36 | // 37 | // 38 | `default_nettype none 39 | // }}} 40 | `define IDLE_SUB_WORD 5'b11011 41 | `define IDLE_WORD { `IDLE_SUB_WORD, {(34-5){1'b0}} } 42 | // 43 | // 44 | module hbidle(i_clk, i_reset, i_cmd_stb, i_cmd_word, o_idl_busy, 45 | o_idl_stb, o_idl_word, i_busy); 46 | input wire i_clk, i_reset; 47 | // 48 | input wire i_cmd_stb; 49 | input wire [33:0] i_cmd_word; 50 | output wire o_idl_busy; 51 | // 52 | output reg o_idl_stb; 53 | output reg [33:0] o_idl_word; 54 | input wire i_busy; 55 | 56 | 57 | // 58 | // If our bus has been idle for a long time, then set an idle_stb, so 59 | // that we can send a message back just to say that we are alive. 60 | // 61 | reg idle_stb; 62 | `ifdef VERILATOR 63 | reg [22:0] idle_counter; 64 | `else 65 | reg [29:0] idle_counter; 66 | `endif 67 | initial idle_stb = 0; 68 | initial idle_counter = 0; 69 | always @(posedge i_clk) 70 | if ((i_reset)||(i_cmd_stb)) 71 | begin 72 | idle_stb <= 1'b0; 73 | idle_counter <= 0; 74 | end else 75 | { idle_stb, idle_counter } <= idle_counter + 1'b1; 76 | 77 | initial o_idl_stb = 1'b0; 78 | always @(posedge i_clk) 79 | if (i_reset) 80 | o_idl_stb <= 1'b0; 81 | else if ((i_cmd_stb)&&(!o_idl_busy)) 82 | o_idl_stb <= 1'b1; 83 | else if ((idle_stb)&&(!o_idl_stb)) 84 | o_idl_stb <= 1'b1; 85 | else if (!i_busy) 86 | o_idl_stb <= 1'b0; 87 | 88 | initial o_idl_word = `IDLE_WORD; 89 | always @(posedge i_clk) 90 | if ((i_cmd_stb)&&(!o_idl_busy)) 91 | o_idl_word <= i_cmd_word; 92 | else if (!i_busy) 93 | o_idl_word <= `IDLE_WORD; 94 | 95 | assign o_idl_busy = (o_idl_stb)&&(i_busy); 96 | 97 | endmodule 98 | 99 | -------------------------------------------------------------------------------- /rtl/hexbus/hbints.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: hbints.v 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: 8 | // 9 | // Creator: Dan Gisselquist, Ph.D. 10 | // Gisselquist Technology, LLC 11 | // 12 | //////////////////////////////////////////////////////////////////////////////// 13 | // }}} 14 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 15 | // {{{ 16 | // This program is free software (firmware): you can redistribute it and/or 17 | // modify it under the terms of the GNU General Public License as published 18 | // by the Free Software Foundation, either version 3 of the License, or (at 19 | // your option) any later version. 20 | // 21 | // This program is distributed in the hope that it will be useful, but WITHOUT 22 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | // for more details. 25 | // 26 | // You should have received a copy of the GNU General Public License along 27 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | // target there if the PDF file isn't present.) If not, see 29 | // for a copy. 30 | // }}} 31 | // License: GPL, v3, as defined and found on www.gnu.org, 32 | // {{{ 33 | // http://www.gnu.org/licenses/gpl.html 34 | // 35 | //////////////////////////////////////////////////////////////////////////////// 36 | // 37 | // 38 | `default_nettype none 39 | // }}} 40 | // 41 | `define INT_PREFIX 5'b11010 42 | `define INT_WORD { `INT_PREFIX, {(34-5){1'b0}} } 43 | // 44 | module hbints(i_clk, i_reset, i_interrupt, 45 | i_stb, i_word, o_int_busy, 46 | o_int_stb, o_int_word, i_busy); 47 | input wire i_clk, i_reset; 48 | input wire i_interrupt; 49 | // 50 | input wire i_stb; 51 | input wire [33:0] i_word; 52 | output wire o_int_busy; 53 | // 54 | output reg o_int_stb; 55 | output reg [33:0] o_int_word; 56 | input wire i_busy; 57 | 58 | reg int_state, pending_interrupt, loaded, int_loaded; 59 | 60 | initial int_state = 1'b0; 61 | always @(posedge i_clk) 62 | if (i_reset) 63 | int_state <= 1'b0; 64 | else if ((i_interrupt)&&(!int_state)) 65 | int_state <= 1'b1; 66 | else if ((!pending_interrupt)&&(!i_interrupt)) 67 | int_state <= 1'b0; 68 | 69 | initial pending_interrupt = 1'b0; 70 | always @(posedge i_clk) 71 | if (i_reset) 72 | pending_interrupt <= 1'b0; 73 | else if ((i_interrupt)&&(!int_state)) 74 | pending_interrupt <= 1'b1; 75 | else if ((o_int_stb)&&(!i_busy)&&(int_loaded)) 76 | pending_interrupt <= 1'b0; 77 | 78 | initial loaded = 1'b0; 79 | always @(posedge i_clk) 80 | if (i_reset) 81 | loaded <= 1'b0; 82 | else if ((i_stb)&&(!o_int_busy)) 83 | loaded <= 1'b1; 84 | else if ((o_int_stb)&&(!i_busy)) 85 | loaded <= 1'b0; 86 | 87 | initial o_int_stb = 1'b0; 88 | always @(posedge i_clk) 89 | if (i_reset) 90 | o_int_stb <= 1'b0; 91 | else if ((i_stb)&&(!o_int_busy)) 92 | o_int_stb <= 1'b1; 93 | else if ((pending_interrupt)&&((!int_loaded)||(i_busy))) 94 | o_int_stb <= 1'b1; 95 | else if ((!loaded)||(!i_busy)) 96 | o_int_stb <= 1'b0; 97 | 98 | initial int_loaded = 1'b1; 99 | initial o_int_word = `INT_WORD; 100 | always @(posedge i_clk) 101 | if ((i_stb)&&(!o_int_busy)) 102 | begin 103 | int_loaded <= 1'b0; 104 | o_int_word <= i_word; 105 | end else if ((!i_busy)||(!o_int_stb)) 106 | begin 107 | // Send an interrupt 108 | o_int_word <= `INT_WORD; 109 | int_loaded <= 1'b1; 110 | end 111 | 112 | assign o_int_busy = (o_int_stb)&&(loaded); 113 | `ifdef FORMAL 114 | `ifdef HBINTS 115 | `define ASSUME assume 116 | `define ASSERT assert 117 | `else 118 | `define ASSUME assert 119 | `define ASSERT assert 120 | `endif 121 | 122 | reg f_past_valid; 123 | initial f_past_valid = 1'b0; 124 | 125 | always @(posedge i_clk) 126 | f_past_valid <= 1'b1; 127 | 128 | always @(posedge i_clk) 129 | if ((f_past_valid)&&(!$past(i_reset))&&($past(i_stb))&&($past(o_int_busy))) 130 | `ASSUME(($stable(i_stb))&&($stable(i_word))); 131 | 132 | always @(posedge i_clk) 133 | if ((f_past_valid)&&(!$past(i_reset))&&($past(i_busy))&&($past(o_int_word != `INT_WORD)) 134 | &&($past(o_int_stb))) 135 | `ASSERT(($stable(o_int_stb))&&($stable(o_int_word))); 136 | 137 | always @(posedge i_clk) 138 | if ((f_past_valid)&&(!$past(i_reset))&&($past(i_stb))&&(!$past(o_int_busy))) 139 | `ASSERT((o_int_stb)&&(o_int_word == $past(i_word))); 140 | 141 | always @(posedge i_clk) 142 | if ((f_past_valid)&&(!$past(i_reset))&&(o_int_word != `INT_WORD)) 143 | `ASSERT((!o_int_stb)||(loaded)); 144 | 145 | always @(*) 146 | if (loaded) 147 | `ASSERT(o_int_stb); 148 | 149 | always @(*) 150 | if (i_stb) 151 | `ASSUME(i_word != `INT_WORD); 152 | 153 | // If we just sent an interrupt signal, then don't send another 154 | always @(posedge i_clk) 155 | if((f_past_valid)&&($past(o_int_stb))&&($past(o_int_word == `INT_WORD)) 156 | &&(!$past(i_busy))) 157 | `ASSERT((!o_int_stb)||(o_int_word != `INT_WORD)); 158 | 159 | always @(*) 160 | `ASSERT(int_loaded == (o_int_word == `INT_WORD)); 161 | /* 162 | reg f_state; 163 | always @(posedge i_clk) 164 | if (f_past_valid) 165 | case(f_state) 166 | if ((f_past_valid)&&($past(i_interrupt))&&(!$past(int_state))) 167 | f_state <= 2'b00 168 | */ 169 | `endif 170 | endmodule 171 | -------------------------------------------------------------------------------- /rtl/hexbus/hbpack.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: hbpack 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: Given a set of incoming bits (4 at a time, with one out of band 8 | // indicator), turn them into 34-bit command bits for our wishbone 9 | // protocol. 10 | // 11 | // Values 5'h0 through 5'hf are used to build a data word to be sent with 12 | // the 34-bit command as the lower 32 bits. 13 | // 14 | // Any value with the 5'th bit set, 5'h10-5'h1f, is an out of band 15 | // indicator. These are used as indicators to end command words and start 16 | // the next command word. Specific out of band words include: 17 | // 18 | // 5'h10 Read, top 2-bits set to 2'b00 19 | // 5'h11 Write, top 2-bits set to 2'b01 20 | // Payload is the value to be written 21 | // 22 | // 5'h12 Address, top 2-bits set to 2'b10 23 | // Payload is the new address to go to 24 | // 25 | // 5'h13 Special, top 2-bits set to 2'b11 26 | // 27 | // All other out of band characters are quietly ignored 28 | // 29 | // Creator: Dan Gisselquist, Ph.D. 30 | // Gisselquist Technology, LLC 31 | // 32 | //////////////////////////////////////////////////////////////////////////////// 33 | // }}} 34 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 35 | // {{{ 36 | // This program is free software (firmware): you can redistribute it and/or 37 | // modify it under the terms of the GNU General Public License as published 38 | // by the Free Software Foundation, either version 3 of the License, or (at 39 | // your option) any later version. 40 | // 41 | // This program is distributed in the hope that it will be useful, but WITHOUT 42 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 43 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 44 | // for more details. 45 | // 46 | // You should have received a copy of the GNU General Public License along 47 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 48 | // target there if the PDF file isn't present.) If not, see 49 | // for a copy. 50 | // }}} 51 | // License: GPL, v3, as defined and found on www.gnu.org, 52 | // {{{ 53 | // http://www.gnu.org/licenses/gpl.html 54 | // 55 | //////////////////////////////////////////////////////////////////////////////// 56 | // 57 | // 58 | `default_nettype none 59 | // }}} 60 | module hbpack(i_clk, i_reset, i_stb, i_bits, o_pck_stb, o_pck_word); 61 | input wire i_clk, i_reset; 62 | // The incoming (partially decoded) byte stream 63 | input wire i_stb; // True if something is valid on input 64 | input wire [4:0] i_bits; // Value on input 65 | output reg o_pck_stb; 66 | output reg [33:0] o_pck_word; 67 | 68 | reg cmd_loaded; 69 | reg [33:0] r_word; 70 | 71 | initial cmd_loaded = 1'b0; 72 | always @(posedge i_clk) 73 | if (i_reset) 74 | cmd_loaded <= 1'b0; 75 | else if ((i_stb)&&(i_bits[4:2] == 3'b100)) 76 | cmd_loaded <= 1'b1; 77 | else if ((i_stb)&&(i_bits[4])) 78 | cmd_loaded <= 1'b0; 79 | 80 | initial o_pck_stb = 1'b0; 81 | always @(posedge i_clk) 82 | o_pck_stb <= (!i_reset)&&((i_stb)&&(cmd_loaded)&&(i_bits[4])); 83 | 84 | initial r_word = 0; 85 | always @(posedge i_clk) 86 | if (i_reset) 87 | r_word <= 0; 88 | else if (i_stb) 89 | begin 90 | if (i_bits[4]) 91 | begin 92 | // Record the command into our buffer 93 | r_word[33:32] <= i_bits[1:0]; 94 | // Clear our buffer on any new command 95 | r_word[31:0] <= 0; 96 | end else 97 | // Other wise, new hex digits just get 98 | // placed in the bottom of our shift register, 99 | // and everything quietly moves over by one 100 | r_word[31:0] <= { r_word[27:0], i_bits[3:0] }; 101 | end 102 | 103 | initial o_pck_word = 0; 104 | always @(posedge i_clk) 105 | if (i_reset) 106 | o_pck_word <= 0; 107 | else if (i_stb) 108 | o_pck_word <= r_word; 109 | `ifdef FORMAL 110 | `ifdef HBPACK 111 | `define ASSUME assume 112 | `define ASSERT assesrt 113 | `else 114 | `define ASSUME assert 115 | `define ASSERT assert 116 | `endif 117 | reg f_past_valid; 118 | initial f_past_valid = 1'b0; 119 | always @(posedge i_clk) 120 | f_past_valid = 1'b1; 121 | 122 | always @(posedge i_clk) 123 | if ((!f_past_valid)||($past(i_reset))) 124 | begin 125 | `ASSERT(cmd_loaded == 1'b0); 126 | `ASSERT(r_word == 0); 127 | `ASSERT(o_pck_word == 0); 128 | `ASSERT(o_pck_stb == 0); 129 | end 130 | 131 | always @(posedge i_clk) 132 | if ((f_past_valid)&&(!$past(i_reset)) 133 | &&($past(i_stb))&&($past(i_bits[4:2])==3'b100)) 134 | `ASSERT(cmd_loaded); 135 | `endif 136 | endmodule 137 | -------------------------------------------------------------------------------- /rtl/i2cio.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: i2cio.v 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Creator: Dan Gisselquist, Ph.D. 8 | // Gisselquist Technology, LLC 9 | // 10 | //////////////////////////////////////////////////////////////////////////////// 11 | // }}} 12 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 13 | // {{{ 14 | // This program is free software (firmware): you can redistribute it and/or 15 | // modify it under the terms of the GNU General Public License as published 16 | // by the Free Software Foundation, either version 3 of the License, or (at 17 | // your option) any later version. 18 | // 19 | // This program is distributed in the hope that it will be useful, but WITHOUT 20 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 21 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 22 | // for more details. 23 | // 24 | // You should have received a copy of the GNU General Public License along 25 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 26 | // target there if the PDF file isn't present.) If not, see 27 | // for a copy. 28 | // }}} 29 | // License: GPL, v3, as defined and found on www.gnu.org, 30 | // {{{ 31 | // http://www.gnu.org/licenses/gpl.html 32 | // 33 | //////////////////////////////////////////////////////////////////////////////// 34 | // 35 | // 36 | `default_nettype none 37 | // }}} 38 | module i2cio(i_data, o_data, io_pin); 39 | input wire i_data; 40 | output wire o_data; 41 | inout wire io_pin; 42 | 43 | SB_IO #(.PULLUP(1'b1), 44 | .PIN_TYPE(6'b101001)) 45 | theio( 46 | .OUTPUT_ENABLE(!i_data), 47 | .PACKAGE_PIN(io_pin), 48 | .D_OUT_0(1'b0), 49 | .D_IN_0(o_data) 50 | ); 51 | 52 | endmodule 53 | -------------------------------------------------------------------------------- /rtl/iiravg.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: iiravg.v 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: Implements a simple recursive filter. 8 | // 9 | // Creator: Dan Gisselquist, Ph.D. 10 | // Gisselquist Technology, LLC 11 | // 12 | //////////////////////////////////////////////////////////////////////////////// 13 | // }}} 14 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 15 | // {{{ 16 | // This program is free software (firmware): you can redistribute it and/or 17 | // modify it under the terms of the GNU General Public License as published 18 | // by the Free Software Foundation, either version 3 of the License, or (at 19 | // your option) any later version. 20 | // 21 | // This program is distributed in the hope that it will be useful, but WITHOUT 22 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | // for more details. 25 | // 26 | // You should have received a copy of the GNU General Public License along 27 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | // target there if the PDF file isn't present.) If not, see 29 | // for a copy. 30 | // }}} 31 | // License: GPL, v3, as defined and found on www.gnu.org, 32 | // {{{ 33 | // http://www.gnu.org/licenses/gpl.html 34 | // 35 | //////////////////////////////////////////////////////////////////////////////// 36 | // 37 | // 38 | `default_nettype none 39 | // }}} 40 | module iiravg #( 41 | // {{{ 42 | parameter IW=15, OW=16, LGALPHA=4, 43 | parameter AW=(IW > OW ? IW : OW) +LGALPHA, 44 | parameter [AW-1:0] RESET_VALUE = 0 45 | // }}} 46 | ) ( 47 | // {{{ 48 | input wire i_clk, i_reset, i_ce, 49 | input wire [(IW-1):0] i_data, 50 | output wire [(OW-1):0] o_data 51 | // }}} 52 | ); 53 | 54 | // Signal declarations 55 | // {{{ 56 | wire signed [(AW-1):0] difference; 57 | reg [(AW-1):0] r_average, adjustment; 58 | // }}} 59 | 60 | assign difference = { i_data, {(AW-IW){1'b0}} } - r_average; 61 | 62 | always @(posedge i_clk) 63 | adjustment <= { {(LGALPHA){(difference[(AW-1)])}}, 64 | difference[(AW-1):LGALPHA] }; 65 | 66 | always @(posedge i_clk) 67 | if (i_reset) 68 | r_average <= RESET_VALUE; 69 | else if (i_ce) 70 | r_average <= r_average + adjustment; 71 | 72 | assign o_data = r_average[AW-1:AW-OW]; 73 | 74 | endmodule 75 | -------------------------------------------------------------------------------- /rtl/make.inc: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: ./rtl.make.inc 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## DO NOT EDIT THIS FILE! 8 | ## Computer Generated: This file is computer generated by AUTOFPGA. DO NOT EDIT. 9 | ## DO NOT EDIT THIS FILE! 10 | ## 11 | ## CmdLine: autofpga autofpga -d -o . global.txt clock36.txt version.txt hexbus.txt gpio.txt qpsksim.txt histogram.txt rfscope.txt samplerate.txt 12 | ## 13 | ## Creator: Dan Gisselquist, Ph.D. 14 | ## Gisselquist Technology, LLC 15 | ## 16 | ################################################################################ 17 | ## }}} 18 | ## Copyright (C) 2019-2024, Gisselquist Technology, LLC 19 | ## {{{ 20 | ## This program is free software (firmware): you can redistribute it and/or 21 | ## modify it under the terms of the GNU General Public License as published 22 | ## by the Free Software Foundation, either version 3 of the License, or (at 23 | ## your option) any later version. 24 | ## 25 | ## This program is distributed in the hope that it will be useful, but WITHOUT 26 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 27 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 28 | ## for more details. 29 | ## 30 | ## You should have received a copy of the GNU General Public License along 31 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 32 | ## target there if the PDF file isn't present.) If not, see 33 | ## for a copy. 34 | ## }}} 35 | ## License: GPL, v3, as defined and found on www.gnu.org, 36 | ## {{{ 37 | ## http://www.gnu.org/licenses/gpl.html 38 | ## 39 | ################################################################################ 40 | ## 41 | ## }}} 42 | SCOPED := wbscope 43 | SCOPE := $(addprefix $(SCOPED)/,wbscope.v) 44 | QPSKSIM := qpskxmit.v smpladc.v cicfil.v qpskrcvr.v cicfil.v sdpll.v subfildowniq.v 45 | 46 | GPIO := wbgpio.v i2cio.v oclkddr.v 47 | 48 | HEXBUSD := hexbus 49 | HEXBUS := $(addprefix $(HEXBUSD)/,hbbus.v hbdechex.v hbdeword.v hbexec.v hbgenhex.v hbidle.v hbints.v hbnewline.v hbpack.v) 50 | WBUARTD := wbuart 51 | WBUART := $(addprefix $(WBUARTD)/,rxuartlite.v txuartlite.v) 52 | HIST := histogram.v 53 | 54 | VFLIST := main.v $(SCOPE) $(QPSKSIM) $(GPIO) $(HEXBUS) $(WBUART) $(HIST) 55 | AUTOVDIRS := -y wbscope -y hexbus -y wbuart 56 | -------------------------------------------------------------------------------- /rtl/oclkddr.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: oclkddr.v 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: 8 | // 9 | // Creator: Dan Gisselquist, Ph.D. 10 | // Gisselquist Technology, LLC 11 | // 12 | //////////////////////////////////////////////////////////////////////////////// 13 | // }}} 14 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 15 | // {{{ 16 | // This program is free software (firmware): you can redistribute it and/or 17 | // modify it under the terms of the GNU General Public License as published 18 | // by the Free Software Foundation, either version 3 of the License, or (at 19 | // your option) any later version. 20 | // 21 | // This program is distributed in the hope that it will be useful, but WITHOUT 22 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | // for more details. 25 | // 26 | // You should have received a copy of the GNU General Public License along 27 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | // target there if the PDF file isn't present.) If not, see 29 | // for a copy. 30 | // }}} 31 | // License: GPL, v3, as defined and found on www.gnu.org, 32 | // {{{ 33 | // http://www.gnu.org/licenses/gpl.html 34 | // 35 | //////////////////////////////////////////////////////////////////////////////// 36 | // 37 | // 38 | `default_nettype none 39 | // }}} 40 | module oclkddr( 41 | // {{{ 42 | input wire i_clk, 43 | input wire [1:0] i_ddr, 44 | output wire o_pin 45 | // }}} 46 | ); 47 | 48 | SB_IO #(.PIN_TYPE(6'b0100_01) 49 | ) oddr( 50 | .OUTPUT_CLK(i_clk), 51 | .CLOCK_ENABLE(1'b1), 52 | .D_OUT_0(i_ddr[1]), 53 | .D_OUT_1(i_ddr[0]), 54 | .OUTPUT_ENABLE(1), 55 | .PACKAGE_PIN(o_pin)); 56 | 57 | endmodule 58 | -------------------------------------------------------------------------------- /rtl/pshape4x.hex: -------------------------------------------------------------------------------- 1 | 000 2 | 000 3 | 000 4 | 000 5 | 000 6 | 000 7 | 000 8 | 000 9 | 000 10 | 000 11 | 000 12 | 000 13 | 000 14 | 000 15 | 000 16 | 000 17 | 000 18 | 000 19 | 000 20 | 000 21 | 000 22 | 000 23 | 000 24 | 000 25 | 000 26 | 000 27 | 000 28 | 000 29 | 000 30 | 000 31 | 400 32 | 4ff 33 | 4ff 34 | 4ff 35 | 400 36 | 000 37 | 000 38 | 000 39 | 000 40 | 000 41 | 000 42 | 000 43 | 000 44 | 000 45 | 000 46 | 000 47 | 000 48 | 000 49 | 000 50 | 000 51 | 000 52 | 000 53 | 000 54 | 000 55 | 000 56 | 000 57 | 000 58 | 000 59 | 000 60 | 000 61 | 000 62 | 000 63 | 000 64 | 000 65 | -------------------------------------------------------------------------------- /rtl/pshape8x.hex: -------------------------------------------------------------------------------- 1 | 400 2 | 400 3 | 400 4 | 400 5 | 400 6 | 400 7 | 400 8 | 400 9 | 400 10 | 400 11 | 400 12 | 400 13 | 400 14 | 400 15 | 400 16 | 400 17 | 400 18 | 400 19 | 400 20 | 400 21 | 400 22 | 400 23 | 400 24 | 400 25 | 400 26 | 400 27 | 400 28 | 400 29 | 400 30 | 400 31 | 400 32 | 400 33 | 000 34 | 000 35 | 000 36 | 000 37 | 000 38 | 000 39 | 000 40 | 000 41 | 000 42 | 000 43 | 000 44 | 000 45 | 000 46 | 000 47 | 000 48 | 000 49 | 000 50 | 000 51 | 000 52 | 000 53 | 000 54 | 000 55 | 000 56 | 000 57 | 000 58 | 000 59 | 000 60 | 000 61 | 000 62 | 000 63 | 000 64 | -------------------------------------------------------------------------------- /rtl/scrambler.v: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: scrambler.v 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: To run WS bits through an LFSR and so generate WS output bits 8 | // on each clock cycle. The LFSR length is given by the LN 9 | // parameter, and its internal feedback by the TAPS parameter. The first 10 | // LN bits out of the register are given by the INITIAL_VALUE parameter. 11 | // 12 | // Creator: Dan Gisselquist, Ph.D. 13 | // Gisselquist Technology, LLC 14 | // 15 | //////////////////////////////////////////////////////////////////////////////// 16 | // }}} 17 | // Copyright (C) 2020-2024, Gisselquist Technology, LLC 18 | // {{{ 19 | // This program is free software (firmware): you can redistribute it and/or 20 | // modify it under the terms of the GNU General Public License as published 21 | // by the Free Software Foundation, either version 3 of the License, or (at 22 | // your option) any later version. 23 | // 24 | // This program is distributed in the hope that it will be useful, but WITHOUT 25 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 26 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 27 | // for more details. 28 | // 29 | // You should have received a copy of the GNU General Public License along 30 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 31 | // target there if the PDF file isn't present.) If not, see 32 | // for a copy. 33 | // }}} 34 | // License: GPL, v3, as defined and found on www.gnu.org, 35 | // {{{ 36 | // http://www.gnu.org/licenses/gpl.html 37 | // 38 | // 39 | //////////////////////////////////////////////////////////////////////////////// 40 | // 41 | // 42 | `default_nettype none 43 | // }}} 44 | module scrambler #( 45 | // {{{ 46 | parameter WS=7, // Nbr of output bits per clock 47 | LN=31, // LFSR Reg length/poly deg 48 | parameter [(LN-1):0] TAPS = 31'h00_00_20_01, 49 | INITIAL_FILL = { { (LN-1){1'b0}}, 1'b1 } 50 | // }}} 51 | ) ( 52 | // {{{ 53 | input wire i_clk, i_reset, i_ce, 54 | input wire [(WS-1):0] i_word, 55 | output reg [(WS-1):0] o_word 56 | // }}} 57 | ); 58 | 59 | // Signal declarations 60 | // {{{ 61 | integer ik; 62 | reg [LN-1:0] sreg; 63 | reg [LN-1:0] step [0:WS-1]; 64 | // }}} 65 | 66 | // step[] 67 | // {{{ 68 | always @(*) 69 | begin 70 | step[0] ={ { ^{ (sreg & TAPS) , i_word[WS-1] }}, sreg[LN-1:1] }; 71 | 72 | for(ik=1; ik for a copy. 32 | // 33 | // License: GPL, v3, as defined and found on www.gnu.org, 34 | // http://www.gnu.org/licenses/gpl.html 35 | // 36 | //////////////////////////////////////////////////////////////////////////////// 37 | // 38 | `default_nettype none 39 | // }}} 40 | module sintable #( 41 | // {{{ 42 | parameter PW = 8, // Number of bits in the input phase 43 | OW =12 // Number of output bits 44 | // }}} 45 | ) ( 46 | // {{{ 47 | input wire i_clk, i_reset, i_ce, 48 | input wire [(PW-1):0] i_phase, 49 | output reg [(OW-1):0] o_val, 50 | // 51 | input wire i_aux, 52 | output reg o_aux 53 | // }}} 54 | ); 55 | 56 | // Declare variables 57 | // {{{ 58 | reg [(OW-1):0] tbl [0:((1< for a copy. 53 | // }}} 54 | // License: GPL, v3, as defined and found on www.gnu.org, 55 | // {{{ 56 | // http://www.gnu.org/licenses/gpl.html 57 | // 58 | // 59 | //////////////////////////////////////////////////////////////////////////////// 60 | // 61 | // 62 | `default_nettype none 63 | // }}} 64 | module wbgpio #( 65 | // {{{ 66 | parameter NIN=16, NOUT=16, 67 | parameter [(NOUT-1):0] DEFAULT=0 68 | // }}} 69 | ) ( 70 | // {{{ 71 | input wire i_clk, 72 | // Wishbone interface 73 | // {{{ 74 | input wire i_wb_cyc, i_wb_stb, i_wb_we, 75 | input wire [31:0] i_wb_data, 76 | input wire [3:0] i_wb_sel, 77 | output wire o_wb_stall, o_wb_ack, 78 | output wire [31:0] o_wb_data, 79 | // }}} 80 | // GPIO pins 81 | // {{{ 82 | input wire [(NIN-1):0] i_gpio, 83 | output reg [(NOUT-1):0] o_gpio, 84 | // }}} 85 | // Pin changed interrupt 86 | output reg o_int 87 | // }}} 88 | ); 89 | 90 | // Signal declarations 91 | // {{{ 92 | reg [(NIN-1):0] x_gpio, q_gpio, r_gpio; 93 | reg [15:0] hi_bits, low_bits; 94 | // }}} 95 | 96 | // o_gpio 97 | // {{{ 98 | // 9LUT's, 16 FF's 99 | initial o_gpio = DEFAULT; 100 | always @(posedge i_clk) 101 | if ((i_wb_stb)&&(i_wb_we)) 102 | o_gpio <= ((o_gpio)&(~i_wb_data[(NOUT+16-1):16])) 103 | |((i_wb_data[(NOUT-1):0])&(i_wb_data[(NOUT+16-1):16])); 104 | // }}} 105 | 106 | // Incoming GPIO clock crossing, and interrupt generation 107 | // {{{ 108 | // 3 LUTs, 33 FF's 109 | always @(posedge i_clk) 110 | begin 111 | x_gpio <= i_gpio; 112 | q_gpio <= x_gpio; 113 | r_gpio <= q_gpio; 114 | o_int <= (x_gpio != r_gpio); 115 | end 116 | // }}} 117 | 118 | always @(*) 119 | begin 120 | low_bits = 0; 121 | hi_bits = 0; 122 | low_bits[NOUT-1:0] = o_gpio; 123 | hi_bits[NIN-1:0] = r_gpio; 124 | end 125 | 126 | assign o_wb_stall = 1'b0; 127 | assign o_wb_ack = i_wb_stb; 128 | assign o_wb_data = { hi_bits, low_bits }; 129 | 130 | // Make Verilator happy 131 | // {{{ 132 | // verilator lint_off UNUSED 133 | wire unused; 134 | assign unused = &{ 1'b0, i_wb_cyc, i_wb_data[31:0], i_wb_sel }; 135 | // verilator lint_on UNUSED 136 | // }}} 137 | endmodule 138 | -------------------------------------------------------------------------------- /scad/.gitignore: -------------------------------------------------------------------------------- 1 | *.stl 2 | -------------------------------------------------------------------------------- /scad/GT.scad: -------------------------------------------------------------------------------- 1 | module GTlogo() { 2 | linear_extrude(height=5) { 3 | union() { 4 | polygon(points=[ 5 | [10,14], 6 | [4,14], 7 | [0,10], 8 | [0,4], 9 | [4,0], 10 | [10,0], 11 | [12,2], 12 | [12,0], 13 | [14,0], 14 | [14,8], 15 | [8,8], 16 | [8,6], 17 | [12,6], 18 | [12,4], 19 | [10,2], 20 | [4,2], 21 | [2,4], 22 | [2,10], 23 | [4,12], 24 | [10,12] ]); 25 | polygon(points=[ 26 | [18,0], 27 | [18,12], 28 | [12,12], 29 | [12,14], 30 | [20,14], 31 | [20,0] ]); 32 | polygon(points=[ 33 | [22,14], 34 | [26,14], 35 | [26,12], 36 | [22,12] ]); 37 | } 38 | } 39 | } 40 | gtlogo_w = 26; 41 | gtlogo_l = 14; 42 | gtlogo_h = 5; -------------------------------------------------------------------------------- /scad/zbreakerlogo.scad: -------------------------------------------------------------------------------- 1 | zblogow = 52; 2 | zblogol = 8; 3 | zblogob = 2; 4 | zblogoh = 5; 5 | module zbreakerlogo() { 6 | linear_extrude(height=zblogoh) { 7 | union() { 8 | // Z 9 | polygon(points=[ 10 | [0,0], 11 | [4,0], 12 | [5,1], 13 | [2,1], 14 | [9,8], 15 | [3,8], 16 | [2,7], 17 | [7,7] ]); 18 | // Dot on the 'i' 19 | polygon(points=[ 20 | [5,2], 21 | [6,2], 22 | [7,3], 23 | [6,3] ]); 24 | // The 'p' 25 | polygon(points=[ 26 | [3,-2], 27 | [4,-2], 28 | [8,2], 29 | [11,2], 30 | [10,1], 31 | [8,1], 32 | [7,0], 33 | [10,0], 34 | [12,2], 35 | [12,3], 36 | [8,3] ]); 37 | // The B 38 | polygon(points=[ 39 | [12,0], 40 | [13,0], 41 | [19,6], 42 | [22,6], 43 | [20,4], 44 | [18,4], 45 | [17,3], 46 | [18,3], 47 | [18,2], 48 | [17,1], 49 | [15,1], 50 | [14,0], 51 | [17,0], 52 | [19,2], 53 | [19,3], 54 | [20,3], 55 | [23,6], 56 | [23,7], 57 | [19,7] ]); 58 | // R 59 | polygon(points=[ 60 | [18,0], 61 | [19,0], 62 | [23,4], 63 | [25,4], 64 | [24,3], 65 | [23,3], 66 | [22,2], 67 | [22,0], 68 | [23,0], 69 | [23,2], 70 | [24,2], 71 | [26,4], 72 | [26,5], 73 | [23,5] ]); 74 | // E 75 | polygon(points=[ 76 | [24,0], 77 | [28,0], 78 | [29,1], 79 | [26,1], 80 | [27,2], 81 | [28,2], 82 | [29,3], 83 | [28,3], 84 | [29,4], 85 | [32,4], 86 | [33,5], 87 | [29,5]]); 88 | // A 89 | polygon(points=[ 90 | [29,0], 91 | [30,0], 92 | [34,4], 93 | [36,4], 94 | [35,3], 95 | [34,3], 96 | [33,2], 97 | [34,2], 98 | [32,0], 99 | [33,0], 100 | [37,4], 101 | [37,5], 102 | [34,5]]); 103 | // K 104 | polygon(points=[ 105 | [34,0], 106 | [35,0], 107 | [37,2], 108 | [38,2], 109 | [38,1], 110 | [37,0], 111 | [38,0], 112 | [39,1], 113 | [39,2], 114 | [42,5], 115 | [41,5], 116 | [39,3], 117 | [38,3], 118 | [40,5], 119 | [39,5] ]); 120 | // E 121 | translate([15,0,0]) 122 | polygon(points=[ 123 | [24,0], 124 | [28,0], 125 | [29,1], 126 | [26,1], 127 | [27,2], 128 | [28,2], 129 | [29,3], 130 | [28,3], 131 | [29,4], 132 | [32,4], 133 | [33,5], 134 | [29,5]]); 135 | // R 136 | translate([44-18,0,0]) 137 | polygon(points=[ 138 | [18,0], 139 | [19,0], 140 | [23,4], 141 | [25,4], 142 | [24,3], 143 | [23,3], 144 | [22,2], 145 | [22,0], 146 | [23,0], 147 | [23,2], 148 | [24,2], 149 | [26,4], 150 | [26,5], 151 | [23,5] ]); 152 | } 153 | } 154 | } 155 | 156 | // zbreakerlogo(); 157 | // translate([0,-zblogob,-zblogoh]) color("red") cube([zblogow, zblogol+zblogob, zblogoh]); 158 | 159 | -------------------------------------------------------------------------------- /scad/zipcpu.scad: -------------------------------------------------------------------------------- 1 | zlogow = 62; 2 | zlogol = 14; 3 | zlogob = 6; 4 | zlogoh = 5; 5 | module zipcpulogo() { 6 | linear_extrude(height=zlogoh) { 7 | union() { 8 | // Z 9 | polygon(points=[ 10 | [0,0], 11 | [8,0], 12 | [10,2], 13 | [4,2], 14 | [16,14], 15 | [6,14], 16 | [4,12], 17 | [12,12] ]); 18 | // Dot on the 'i' 19 | polygon(points=[ 20 | [10,4], 21 | [12,4], 22 | [14,6], 23 | [12,6] ]); 24 | // The 'p' 25 | polygon(points=[ 26 | [4,-6], 27 | [6,-6], 28 | [12,0], 29 | [18,0], 30 | [22,4], 31 | [22,6], 32 | [16,6], 33 | [14,4], 34 | [20,4], 35 | [18,2], 36 | [12,2] ]); 37 | // The C 38 | polygon(points=[ 39 | [28,0], 40 | [28,2], 41 | [34,8], 42 | [42,8], 43 | [40,6], 44 | [34,6], 45 | [30,2], 46 | [36,2], 47 | [34,0] ]); 48 | // The P 49 | polygon(points=[ 50 | [36,0], 51 | [38,0], 52 | [40,2], 53 | [46,2], 54 | [50,6], 55 | [50,8], 56 | [44,8], 57 | [42,6], 58 | [48,6], 59 | [46,4], 60 | [40,4]]); 61 | // The U 62 | polygon(points=[ 63 | [48,0], 64 | [54,0], 65 | [62,8], 66 | [60,8], 67 | [54,2], 68 | [50,2], 69 | [56,8], 70 | [54,8], 71 | [48,2]]); 72 | } 73 | } 74 | } 75 | 76 | // zipcpulogo(); 77 | // translate([0,-zlogob,-zlogoh]) color("red") cube([zlogow, zlogol+zlogob, zlogoh]); 78 | 79 | -------------------------------------------------------------------------------- /sim/.gitignore: -------------------------------------------------------------------------------- 1 | main_tb 2 | obj-pc/ 3 | *.hex 4 | *.vcd 5 | tags 6 | -------------------------------------------------------------------------------- /sim/Makefile: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: Makefile 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: To coordinate the build of a cycle accurate, Verilator based, 8 | ## simulation of the main module. Access to the simulation is 9 | ## provided via the same software commands that will access the board, save 10 | ## that the parameters are a touch different. (See the access software for 11 | ## more information ...) 12 | ## 13 | ## Creator: Dan Gisselquist, Ph.D. 14 | ## Gisselquist Technology, LLC 15 | ## 16 | ################################################################################ 17 | ## }}} 18 | ## Copyright (C) 2019-2024, Gisselquist Technology, LLC 19 | ## {{{ 20 | ## This program is free software (firmware): you can redistribute it and/or 21 | ## modify it under the terms of the GNU General Public License as published 22 | ## by the Free Software Foundation, either version 3 of the License, or (at 23 | ## your option) any later version. 24 | ## 25 | ## This program is distributed in the hope that it will be useful, but WITHOUT 26 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 27 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 28 | ## for more details. 29 | ## 30 | ## You should have received a copy of the GNU General Public License along 31 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 32 | ## target there if the PDF file isn't present.) If not, see 33 | ## for a copy. 34 | ## }}} 35 | ## License: GPL, v3, as defined and found on www.gnu.org, 36 | ## {{{ 37 | ## http://www.gnu.org/licenses/gpl.html 38 | ## 39 | ################################################################################ 40 | ## 41 | ## }}} 42 | .PHONY: all 43 | # Make certain the "all" target is the first and therefore the default target 44 | all: 45 | CXX := g++ 46 | OBJDIR := obj-pc 47 | RTLD := ../rtl 48 | VOBJDR := $(RTLD)/obj_dir 49 | ifneq ($(VERILATOR_ROOT),) 50 | VERILATOR:=$(VERILATOR_ROOT)/bin/verilator 51 | else 52 | VERILATOR_ROOT ?= $(shell bash -c 'verilator -V|grep VERILATOR_ROOT | head -1 | sed -e " s/^.*=\s*//"') 53 | endif 54 | export $(VERILATOR) 55 | VROOT := $(VERILATOR_ROOT) 56 | VDEFS := $(shell ./vversion.sh) 57 | SIGLIBD := $(HOME)/src/siglib 58 | SIGDPYD := $(HOME)/src/sigdisplay 59 | GFXFLAGS:= -I $(SIGLIBD) -I $(SIGDPYD) `pkg-config gtkmm-3.0 --cflags` 60 | GFXLIBS := $(SIGDPYD)/sigdpy.a $(SIGLIBD)/siglib.a `pkg-config gtkmm-3.0 --cflags --libs` 61 | FLAGS := -Wall -Og -g $(VDEFS) 62 | VINCD := $(VROOT)/include 63 | VINC := -I$(VINCD) -I$(VINCD)/vltstd -I$(VOBJDR) 64 | INCS := -I. -I../sw -I$(RTLD) $(VINC) 65 | # 66 | # A list of our sources and headers 67 | # 68 | SOURCES := automaster_tb.cpp main_tb.cpp uartsim.cpp micnco.cpp 69 | HEADERS := ../sw/port.h testb.h uartsim.h micnco.h 70 | VOBJDR := $(RTLD)/obj_dir 71 | VOBJS := $(OBJDIR)/verilated.o $(OBJDIR)/verilated_vcd_c.o $(OBJDIR)/verilated_threads.o 72 | VMAIN := $(VOBJDR)/Vmain__ALL.a 73 | SIMSRCS := uartsim.cpp micnco.cpp twoc.cpp 74 | SIMOBJ := $(subst .cpp,.o,$(SIMSRCS)) 75 | SIMOBJS:= $(addprefix $(OBJDIR)/,$(SIMOBJ)) 76 | # 77 | PROGRAMS := main_tb 78 | # Now the return to the "all" target, and fill in some details 79 | all: $(PROGRAMS) hex 80 | 81 | $(OBJDIR)/%.o: %.cpp 82 | $(mk-objdir) 83 | $(CXX) $(FLAGS) $(INCS) -c $< -o $@ 84 | 85 | $(OBJDIR)/%.o: $(VINCD)/%.cpp 86 | $(mk-objdir) 87 | $(CXX) $(FLAGS) $(INCS) -c $< -o $@ 88 | 89 | .PHONY: hex 90 | # hex: $(subst $(RTLD)/,,$(wildcard $(RTLD)/*.hex)) 91 | hex: sintable.hex amdemod.hex 92 | # %.hex: $(RTLD)/%.hex 93 | sintable.hex: $(RTLD)/sintable.hex 94 | @bash -c "if [ ! -e $@ ]; then ln -s $< $@ ; fi" 95 | amdemod.hex: $(RTLD)/amdemod.hex 96 | @bash -c "if [ ! -e $@ ]; then ln -s $< $@ ; fi" 97 | 98 | # 99 | $(OBJDIR)/main_tb.o: automaster_tb.cpp 100 | $(mk-objdir) 101 | $(CXX) $(FLAGS) $(INCS) -c $< -o $@ 102 | 103 | $(OBJDIR)/gfx_tb.o: gfx_tb.cpp 104 | $(mk-objdir) 105 | $(CXX) $(FLAGS) $(GFXFLAGS) $(INCS) -c $< -o $@ 106 | 107 | 108 | main_tb: $(OBJDIR)/main_tb.o $(SIMOBJS) $(VMAIN) $(VOBJS) 109 | $(CXX) $(FLAGS) $(INCS) $^ -lelf -lpthread -o $@ 110 | 111 | gfx_tb: $(OBJDIR)/gfx_tb.o $(SIMOBJS) $(VMAIN) $(VOBJS) 112 | $(CXX) $(FLAGS) $(GFXFLAGS) $(INCS) $^ $(GFXLIBS) -lelf -lpthread -o $@ 113 | 114 | # 115 | # The "clean" target, removing any and all remaining build products 116 | # 117 | .PHONY: clean 118 | clean: 119 | rm -f *.vcd 120 | rm -f $(PROGRAMS) 121 | rm -rf $(OBJDIR)/ 122 | 123 | # 124 | # The "depends" target, to know what files things depend upon. The depends 125 | # file itself is kept in $(OBJDIR)/depends.txt 126 | # 127 | define build-depends 128 | $(mk-objdir) 129 | @echo "Building dependency file" 130 | @$(CXX) $(VDEFS) $(GFXFLAGS) $(INCS) -MM $(SOURCES) > $(OBJDIR)/xdepends.txt 131 | @sed -e 's/^.*.o: /$(OBJDIR)\/&/' < $(OBJDIR)/xdepends.txt > $(OBJDIR)/depends.txt 132 | @rm $(OBJDIR)/xdepends.txt 133 | endef 134 | 135 | .PHONY: depends 136 | depends: tags 137 | $(build-depends) 138 | 139 | $(OBJDIR)/depends.txt: depends 140 | 141 | # 142 | define mk-objdir 143 | @bash -c "if [ ! -e $(OBJDIR) ]; then mkdir -p $(OBJDIR); fi" 144 | endef 145 | 146 | 147 | # 148 | # The "tags" target 149 | # 150 | tags: $(SOURCES) $(HEADERS) 151 | @echo "Generating tags" 152 | @ctags $(SOURCES) $(HEADERS) 153 | 154 | 155 | ifneq ($(MAKECMDGOALS),clean) 156 | -include $(OBJDIR)/depends.txt 157 | endif 158 | -------------------------------------------------------------------------------- /sim/automaster_tb.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: automaster_tb.cpp 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: This file calls and accesses the main.v function via the 8 | // MAIN_TB class found in main_tb.cpp. When put together with 9 | // the other components here, this file will simulate (all of) the 10 | // host's interaction with the FPGA circuit board. 11 | // 12 | // Creator: Dan Gisselquist, Ph.D. 13 | // Gisselquist Technology, LLC 14 | // 15 | //////////////////////////////////////////////////////////////////////////////// 16 | // }}} 17 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 18 | // {{{ 19 | // This program is free software (firmware): you can redistribute it and/or 20 | // modify it under the terms of the GNU General Public License as published 21 | // by the Free Software Foundation, either version 3 of the License, or (at 22 | // your option) any later version. 23 | // 24 | // This program is distributed in the hope that it will be useful, but WITHOUT 25 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 26 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 27 | // for more details. 28 | // 29 | // You should have received a copy of the GNU General Public License along 30 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 31 | // target there if the PDF file isn't present.) If not, see 32 | // for a copy. 33 | // }}} 34 | // License: GPL, v3, as defined and found on www.gnu.org, 35 | // {{{ 36 | // http://www.gnu.org/licenses/gpl.html 37 | // 38 | //////////////////////////////////////////////////////////////////////////////// 39 | // 40 | // }}} 41 | #include 42 | #include 43 | #include 44 | #include 45 | #include 46 | 47 | #include "verilated.h" 48 | #include "design.h" 49 | 50 | // #define TRACE_FST 51 | 52 | #include "testb.h" 53 | // #include "twoc.h" 54 | 55 | #include "port.h" 56 | 57 | #include "main_tb.cpp" 58 | 59 | // usage() 60 | // {{{ 61 | void usage(void) { 62 | fprintf(stderr, "USAGE: main_tb \n"); 63 | fprintf(stderr, 64 | // -h 65 | // -p # command port 66 | // -s # serial port 67 | // -f # profile file 68 | "\t-d\tSets the debugging flag\n" 69 | ); 70 | } 71 | // }}} 72 | 73 | int main(int argc, char **argv) { 74 | Verilated::commandArgs(argc, argv); 75 | 76 | const char *trace_file = NULL; // "trace.vcd"; 77 | bool debug_flag = false; 78 | 79 | MAINTB *tb = new MAINTB; 80 | 81 | // Argument processing 82 | // {{{ 83 | for(int argn=1; argn < argc; argn++) { 84 | if (argv[argn][0] == '-') for(int j=1; 85 | (j<512)&&(argv[argn][j]);j++) { 86 | switch(tolower(argv[argn][j])) { 87 | case 'd': debug_flag = true; 88 | if (trace_file == NULL) 89 | trace_file = "trace.vcd"; 90 | break; 91 | // case 't': trace_file = argv[++argn]; j=1000; break; 92 | case 'h': usage(); exit(0); break; 93 | default: 94 | fprintf(stderr, "ERR: Unexpected flag, -%c\n\n", 95 | argv[argn][j]); 96 | usage(); 97 | break; 98 | } 99 | } else { 100 | fprintf(stderr, "ERR: Unknown argument, %s\n", argv[argn]); 101 | exit(EXIT_FAILURE); 102 | } 103 | } 104 | // }}} 105 | 106 | if (debug_flag) { 107 | printf("Opening design with\n"); 108 | printf("\tDebug Access port = %d\n", FPGAPORT); // fpga_port); 109 | printf("\tVCD File = %s\n", trace_file); 110 | } if (trace_file) 111 | tb->opentrace(trace_file); 112 | 113 | tb->reset(); 114 | 115 | while(true) 116 | tb->tick(); 117 | 118 | tb->close(); 119 | delete tb; 120 | 121 | return EXIT_SUCCESS; 122 | } 123 | -------------------------------------------------------------------------------- /sim/i2csim.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: i2csim.h 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: To create an I2C slave simulation that can then be driven and 8 | // tested by an RTL I2C master. 9 | // 10 | // Creator: Dan Gisselquist, Ph.D. 11 | // Gisselquist Technology, LLC 12 | // 13 | //////////////////////////////////////////////////////////////////////////////// 14 | // }}} 15 | // Copyright (C) 2020-2024, Gisselquist Technology, LLC 16 | // {{{ 17 | // This program is free software (firmware): you can redistribute it and/or 18 | // modify it under the terms of the GNU General Public License as published 19 | // by the Free Software Foundation, either version 3 of the License, or (at 20 | // your option) any later version. 21 | // 22 | // This program is distributed in the hope that it will be useful, but WITHOUT 23 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 24 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 25 | // for more details. 26 | // 27 | // You should have received a copy of the GNU General Public License along 28 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 29 | // target there if the PDF file isn't present.) If not, see 30 | // for a copy. 31 | // }}} 32 | // License: GPL, v3, as defined and found on www.gnu.org, 33 | // {{{ 34 | // http://www.gnu.org/licenses/gpl.html 35 | // 36 | //////////////////////////////////////////////////////////////////////////////// 37 | // 38 | // }}} 39 | #ifndef I2CSIM_H 40 | #define I2CSIM_H 41 | 42 | #include 43 | #include 44 | #include 45 | 46 | class I2CBUS { 47 | // {{{ 48 | public: 49 | unsigned int m_scl:1; 50 | unsigned int m_sda:1; 51 | I2CBUS(int scl=1, int sda=1) : m_scl(scl), m_sda(sda) {}; 52 | I2CBUS operator+(const I2CBUS b) const { 53 | return I2CBUS(m_scl&b.m_scl, m_sda&b.m_sda); } 54 | I2CBUS operator+=(const I2CBUS b) { 55 | m_scl &= b.m_scl; m_sda &= b.m_sda; 56 | return *this; 57 | } 58 | // }}} 59 | }; 60 | 61 | typedef enum { I2CIDLE=0, I2CDEVADDR, I2CDEVACK, 62 | I2CADDR, I2CSACK, I2CSRX, I2CSTX, I2CMACK, I2CLOSTBUS, I2CILLEGAL 63 | } I2CSTATE; 64 | 65 | class I2CSIMSLAVE { 66 | // {{{ 67 | char *m_data; 68 | int m_addr, m_daddr, m_abits, m_dbits, m_dreg, m_ack, 69 | m_last_sda, m_last_scl, m_counter, m_devword, 70 | m_memsz, m_adrmsk, 71 | m_devaddr; 72 | bool m_illegal; 73 | unsigned long m_tick, m_last_change_tick, m_speed; 74 | I2CBUS m_bus; // My inputs 75 | 76 | I2CSTATE m_state; 77 | // }}} 78 | 79 | volatile int getack(int addr) { 80 | // {{{ 81 | m_ack = 0; 82 | return m_ack; 83 | } // }}} 84 | volatile char read(int addr) { 85 | // {{{ 86 | // printf("SETTING READ ADDRESS TO %02x\n", m_daddr & m_adrmsk); 87 | m_daddr = addr; 88 | return m_data[m_daddr]; 89 | } // }}} 90 | volatile char read(void) { 91 | // {{{ 92 | char vl = m_data[m_daddr]; 93 | // printf("READING FROM ADDRESS %02x\n", m_daddr & m_adrmsk); 94 | m_daddr = (m_daddr+1)&m_adrmsk; 95 | return vl; 96 | } // }}} 97 | volatile void write(int addr, char data) { 98 | // {{{ 99 | m_daddr = addr & m_adrmsk; 100 | m_data[m_daddr] = data; 101 | } volatile void write(char data) { 102 | // {{{ 103 | m_daddr = (m_daddr+1) & m_adrmsk; 104 | m_data[m_daddr] = data; 105 | } // }}} 106 | // }}} 107 | public: 108 | I2CSIMSLAVE(const int ADDRESS = 0x050, const int nbits = 7) { 109 | // {{{ 110 | m_memsz = (1< for a copy. 34 | // }}} 35 | // License: GPL, v3, as defined and found on www.gnu.org, 36 | // {{{ 37 | // http://www.gnu.org/licenses/gpl.html 38 | // 39 | //////////////////////////////////////////////////////////////////////////////// 40 | // 41 | // }}} 42 | // 43 | // SIM.INCLUDE 44 | // 45 | // Any SIM.INCLUDE tags you define will be pasted here. 46 | // This is useful for guaranteeing any include functions 47 | // your simulation needs are called. 48 | // 49 | #include "verilated.h" 50 | #include "Vmain.h" 51 | #define BASECLASS Vmain 52 | 53 | #include "design.h" 54 | #include "regdefs.h" 55 | #include "testb.h" 56 | #include "micnco.h" 57 | #include "uartsim.h" 58 | // 59 | // SIM.DEFINES 60 | // 61 | // This tag is useful fr pasting in any #define values that 62 | // might then control the simulation following. 63 | // 64 | class MAINTB : public TESTB { 65 | public: 66 | // SIM.DEFNS 67 | // 68 | // If you have any simulation components, create a 69 | // SIM.DEFNS tag to have those components defined here 70 | // as part of the main_tb.cpp function. 71 | MICNCO *m_mic; 72 | UARTSIM *m_dbgbus; 73 | MAINTB(void) { 74 | // SIM.INIT 75 | // 76 | // If your simulation components need to be initialized, 77 | // create a SIM.INIT tag. That tag's value will be pasted 78 | // here. 79 | // 80 | // From amsim 81 | m_mic = new MICNCO(); 82 | // From hex 83 | m_dbgbus = new UARTSIM(FPGAPORT); 84 | m_dbgbus->setup(36); 85 | m_core->i_host_uart_rx = 1; 86 | } 87 | 88 | void reset(void) { 89 | // SIM.SETRESET 90 | // If your simulation component needs logic before the 91 | // tick with reset set, that logic can be placed into 92 | // the SIM.SETRESET tag and thus pasted here. 93 | // 94 | TESTB::reset(); 95 | // SIM.CLRRESET 96 | // If your simulation component needs logic following the 97 | // reset tick, that logic can be placed into the 98 | // SIM.CLRRESET tag and thus pasted here. 99 | // 100 | } 101 | 102 | void trace(const char *vcd_trace_file_name) { 103 | fprintf(stderr, "Opening TRACE(%s)\n", 104 | vcd_trace_file_name); 105 | opentrace(vcd_trace_file_name); 106 | m_time_ps = 0; 107 | } 108 | 109 | void close(void) { 110 | m_done = true; 111 | } 112 | 113 | void tick(void) { 114 | TESTB::tick(); // Clock.size = 1 115 | } 116 | 117 | 118 | // Evaluating clock clk 119 | 120 | // sim_clk_tick() will be called from TESTB::tick() 121 | // following any falling edge of clock clk 122 | virtual void sim_clk_tick(void) { 123 | // Default clock tick 124 | // 125 | // SIM.TICK tags go here for SIM.CLOCK=clk 126 | // 127 | // SIM.TICK from amsim 128 | m_core->i_mic_miso= (*m_mic)(m_core->o_mic_sck, m_core->o_mic_csn); 129 | // SIM.TICK from hex 130 | m_core->i_host_uart_rx = (*m_dbgbus)(m_core->o_host_uart_tx); 131 | } 132 | inline void tick_clk(void) { tick(); } 133 | 134 | // 135 | // The load function 136 | // 137 | // This function is required by designs that need the flash or memory 138 | // set prior to run time. The test harness should be able to call 139 | // this function to load values into any (memory-type) location 140 | // on the bus. 141 | // 142 | bool load(uint32_t addr, const char *buf, uint32_t len) { 143 | return false; 144 | } 145 | 146 | // 147 | // KYSIM.METHODS 148 | // 149 | // If your simulation code will need to call any of its own function 150 | // define this tag by those functions (or other sim code), and 151 | // it will be pasated here. 152 | // 153 | 154 | }; 155 | -------------------------------------------------------------------------------- /sim/micnco.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: MICNCO.cpp 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: To provide a simulated A/D input for testing 8 | // 9 | // Creator: Dan Gisselquist, Ph.D. 10 | // Gisselquist Technology, LLC 11 | // 12 | //////////////////////////////////////////////////////////////////////////////// 13 | // }}} 14 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 15 | // {{{ 16 | // This program is free software (firmware): you can redistribute it and/or 17 | // modify it under the terms of the GNU General Public License as published 18 | // by the Free Software Foundation, either version 3 of the License, or (at 19 | // your option) any later version. 20 | // 21 | // This program is distributed in the hope that it will be useful, but WITHOUT 22 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | // for more details. 25 | // 26 | // You should have received a copy of the GNU General Public License along 27 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | // target there if the PDF file isn't present.) If not, see 29 | // for a copy. 30 | // }}} 31 | // License: GPL, v3, as defined and found on www.gnu.org, 32 | // {{{ 33 | // http://www.gnu.org/licenses/gpl.html 34 | // 35 | //////////////////////////////////////////////////////////////////////////////// 36 | // 37 | // }}} 38 | #include 39 | #include 40 | #include 41 | #include "micnco.h" 42 | 43 | #define ADC_BITS 12 44 | MICNCO::MICNCO() { m_phase = 0; m_step = 1; m_last_sck = 1; m_bomb = false; } 45 | void MICNCO::step(unsigned s) { m_step = s; } 46 | int MICNCO::operator()(int sck, int csn) { 47 | int ov; 48 | m_phase += (m_step>>1); 49 | m_step += 1; 50 | m_step &= 0x03ffff; 51 | if (csn) { 52 | // {{{ 53 | m_ticks = 3; 54 | if (!sck) { 55 | m_bomb = true; // assert(sck == 1); 56 | fprintf(stderr, "MICNCO-BOMB: SCK low while CSn is high\n"); 57 | } 58 | m_state = 0; 59 | m_oreg = 0; 60 | ov = 0; 61 | // }}} 62 | } else { 63 | // {{{ 64 | m_ticks++; 65 | if ((!m_last_sck)&&(sck)) { 66 | // {{{ 67 | if (m_ticks < 4) { 68 | fprintf(stderr, "MICNCO-BOMB: Clock too short\n"); 69 | m_bomb = true; // assert(m_ticks > 6); 70 | } 71 | m_ticks = 0; 72 | m_state++; 73 | if (m_state == 4) { 74 | double cv; 75 | cv = cos(2.0*M_PI*m_phase/(1<<30)/4.); 76 | cv *= (1<<(ADC_BITS-2)); 77 | if (cv >= (1<<(ADC_BITS-2))) 78 | cv = (1<<(ADC_BITS-2))-1.0; 79 | else if (cv < -(1<<(ADC_BITS-2))) 80 | cv = -(1<<(ADC_BITS-2)); 81 | m_oreg = ((int)(cv))&((1<>11)?1:0; 89 | // }}} 90 | } 91 | m_last_sck = sck; 92 | return ov; 93 | } 94 | 95 | -------------------------------------------------------------------------------- /sim/micnco.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: micnco.h 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: To define the class that will provide a simulated A/D input for 8 | // testing 9 | // 10 | // Creator: Dan Gisselquist, Ph.D. 11 | // Gisselquist Technology, LLC 12 | // 13 | //////////////////////////////////////////////////////////////////////////////// 14 | // }}} 15 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 16 | // {{{ 17 | // This program is free software (firmware): you can redistribute it and/or 18 | // modify it under the terms of the GNU General Public License as published 19 | // by the Free Software Foundation, either version 3 of the License, or (at 20 | // your option) any later version. 21 | // 22 | // This program is distributed in the hope that it will be useful, but WITHOUT 23 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 24 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 25 | // for more details. 26 | // 27 | // You should have received a copy of the GNU General Public License along 28 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 29 | // target there if the PDF file isn't present.) If not, see 30 | // for a copy. 31 | // }}} 32 | // License: GPL, v3, as defined and found on www.gnu.org, 33 | // {{{ 34 | // http://www.gnu.org/licenses/gpl.html 35 | // 36 | //////////////////////////////////////////////////////////////////////////////// 37 | // 38 | // }}} 39 | #ifndef MICNCO_H 40 | #define MICNCO_H 41 | 42 | class MICNCO { 43 | unsigned m_phase, m_step, m_ticks, m_state; 44 | int m_last_sck, m_oreg; 45 | public: 46 | bool m_bomb; 47 | MICNCO(); 48 | void step(unsigned s); 49 | int operator()(int sck, int csn); 50 | }; 51 | 52 | #endif 53 | 54 | -------------------------------------------------------------------------------- /sim/qpsksim.gtkw: -------------------------------------------------------------------------------- 1 | [*] 2 | [*] GTKWave Analyzer v3.3.86 (w)1999-2017 BSI 3 | [*] Sat Jul 18 21:53:33 2020 4 | [*] 5 | [timestart] 101464600000 6 | [size] 1920 1021 7 | [pos] -1 -1 8 | *-25.498001 5620100000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 9 | [treeopen] TOP. 10 | [treeopen] TOP.main. 11 | [treeopen] TOP.main.qpskxmiti. 12 | [treeopen] TOP.main.qpskxmiti.resample_audio. 13 | [sst_width] 270 14 | [signals_width] 470 15 | [sst_expanded] 1 16 | [sst_vpaned_height] 290 17 | @28 18 | TOP.i_clk 19 | TOP.main.i_reset 20 | @200 21 | - 22 | @22 23 | TOP.main.qpskxmiti.mic_sample[11:0] 24 | @28 25 | TOP.main.qpskxmiti.audio_ce 26 | @22 27 | TOP.main.qpskxmiti.audio_sample[6:0] 28 | TOP.main.qpskxmiti.scrambled_sample[6:0] 29 | TOP.main.qpskxmiti.qpsk_sreg[5:0] 30 | @28 31 | TOP.main.qpskxmiti.qpsk_ce 32 | TOP.main.qpskxmiti.qpsk_symbol[1:0] 33 | @8420 34 | TOP.main.qpskxmiti.baseband_i[11:0] 35 | TOP.main.qpskxmiti.baseband_q[11:0] 36 | @22 37 | TOP.main.qpskxmiti.baseband_i[11:0] 38 | TOP.main.qpskxmiti.pulse_i[11:0] 39 | TOP.main.qpskxmiti.baseband_q[11:0] 40 | TOP.main.qpskxmiti.pulse_q[11:0] 41 | @201 42 | - 43 | @22 44 | TOP.main.qpskxmiti.resample_audio.cval[11:0] 45 | TOP.main.qpskxmiti.resample_audio.didx[10:0] 46 | TOP.main.qpskxmiti.resample_audio.tidx[10:0] 47 | @28 48 | TOP.main.qpskxmiti.resample_audio.i_ce 49 | TOP.main.qpskxmiti.resample_audio.p_ce 50 | TOP.main.qpskxmiti.resample_audio.p_run 51 | [pattern_trace] 1 52 | [pattern_trace] 0 53 | -------------------------------------------------------------------------------- /sim/twoc.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: twoc.cpp 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: Some various two's complement related C++ helper routines. 8 | // Specifically, these help extract signed numbers from 9 | // packed bitfields, while guaranteeing that the upper bits 10 | // are properly sign extended (or not) as desired. 11 | // 12 | // Creator: Dan Gisselquist, Ph.D. 13 | // Gisselquist Technology, LLC 14 | // 15 | //////////////////////////////////////////////////////////////////////////////// 16 | // }}} 17 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 18 | // {{{ 19 | // This program is free software (firmware): you can redistribute it and/or 20 | // modify it under the terms of the GNU General Public License as published 21 | // by the Free Software Foundation, either version 3 of the License, or (at 22 | // your option) any later version. 23 | // 24 | // This program is distributed in the hope that it will be useful, but WITHOUT 25 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 26 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 27 | // for more details. 28 | // 29 | // You should have received a copy of the GNU General Public License along 30 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 31 | // target there if the PDF file isn't present.) If not, see 32 | // for a copy. 33 | // }}} 34 | // License: GPL, v3, as defined and found on www.gnu.org, 35 | // {{{ 36 | // http://www.gnu.org/licenses/gpl.html 37 | // 38 | //////////////////////////////////////////////////////////////////////////////// 39 | // 40 | // }}} 41 | #include "twoc.h" 42 | 43 | long sbits(const long val, const int bits) { 44 | long r; 45 | 46 | r = val & ((1l< for a copy. 33 | // }}} 34 | // License: GPL, v3, as defined and found on www.gnu.org, 35 | // {{{ 36 | // http://www.gnu.org/licenses/gpl.html 37 | // 38 | //////////////////////////////////////////////////////////////////////////////// 39 | // 40 | // }}} 41 | #ifndef TWOC_H 42 | #define TWOC_H 43 | 44 | extern long sbits(const long val, const int bits); 45 | extern unsigned long ubits(const long val, const int bits); 46 | 47 | #endif 48 | 49 | -------------------------------------------------------------------------------- /sim/uartsim.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: uartsim.h 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: To forward a Verilator simulated UART link over a TCP/IP pipe. 8 | // 9 | // This file provides the description of the interface between the UARTSIM 10 | // and the rest of the world. See below for more detailed descriptions. 11 | // 12 | // Creator: Dan Gisselquist, Ph.D. 13 | // Gisselquist Technology, LLC 14 | // 15 | //////////////////////////////////////////////////////////////////////////////// 16 | // }}} 17 | // Copyright (C) 2020-2024, Gisselquist Technology, LLC 18 | // {{{ 19 | // This program is free software (firmware): you can redistribute it and/or 20 | // modify it under the terms of the GNU General Public License as published 21 | // by the Free Software Foundation, either version 3 of the License, or (at 22 | // your option) any later version. 23 | // 24 | // This program is distributed in the hope that it will be useful, but WITHOUT 25 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 26 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 27 | // for more details. 28 | // 29 | // You should have received a copy of the GNU General Public License along 30 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 31 | // target there if the PDF file isn't present.) If not, see 32 | // for a copy. 33 | // }}} 34 | // License: GPL, v3, as defined and found on www.gnu.org, 35 | // {{{ 36 | // http://www.gnu.org/licenses/gpl.html 37 | // 38 | // 39 | //////////////////////////////////////////////////////////////////////////////// 40 | // 41 | // }}} 42 | #ifndef UARTSIM_H 43 | #define UARTSIM_H 44 | 45 | #include 46 | #include 47 | #include 48 | #include 49 | #include 50 | #include 51 | #include 52 | #include 53 | #include 54 | 55 | #define TXIDLE 0 56 | #define TXDATA 1 57 | #define RXIDLE 0 58 | #define RXDATA 1 59 | 60 | class UARTSIM { 61 | // Member declarations 62 | // {{{ 63 | // The file descriptors: 64 | // m_skt is the socket/port we are listening on 65 | // m_conrd is the file descriptor to read from 66 | // m_conwr is the file descriptor to write to 67 | int m_skt, m_conrd, m_conwr; 68 | // 69 | // The m_setup register is the 29'bit control register used within 70 | // the core. 71 | unsigned m_setup; 72 | // And the pieces of the setup register broken out. 73 | int m_nparity, m_fixdp, m_evenp, m_nbits, m_nstop, m_baud_counts; 74 | 75 | // UART state 76 | int m_rx_baudcounter, m_rx_state, m_rx_busy, 77 | m_rx_changectr, m_last_tx; 78 | int m_tx_baudcounter, m_tx_state, m_tx_busy; 79 | unsigned m_rx_data, m_tx_data; 80 | // }}} 81 | 82 | // Private methods 83 | // {{{ 84 | // setup_listener is an attempt to encapsulate all of the network 85 | // related setup stuff. 86 | void setup_listener(const int port); 87 | 88 | // Call check_for_new_connections() to see if we can accept a new 89 | // network socket connection to our device 90 | void check_for_new_connections(void); 91 | 92 | // nettick() gets called if we are connected to a network, and 93 | int nettick(const int i_tx); 94 | int fdtick(const int i_tx); 95 | int rawtick(const int i_tx, const bool network); 96 | 97 | // We'll use the file descriptor for the listener socket to determine 98 | // whether we are connected to the network or not. If not connected 99 | // to the network, then we assume m_conrd and m_conwr refer to 100 | // your more traditional file descriptors, and use them as such. 101 | int tick(const int i_tx) { 102 | return rawtick(i_tx, (m_skt >= 0)); 103 | } 104 | // }}} 105 | public: 106 | // Public member functions 107 | // {{{ 108 | 109 | // UARTSIM(port) 110 | // {{{ 111 | // The UARTSIM constructor takes one argument: the port on the 112 | // localhost to listen in on. Once started, connections may be made 113 | // to this port to get the output from the port. 114 | UARTSIM(const int port); 115 | // }}} 116 | 117 | // kill(void) 118 | // {{{ 119 | // kill() closes any active connection and the socket. Once killed, 120 | // no further output will be sent to the port. 121 | void kill(void); 122 | // }}} 123 | 124 | // setup(isetup) 125 | // {{{ 126 | // setup() busts out the bits from isetup to the various internal 127 | // parameters. It is ideally only called between bits at appropriate 128 | // transition intervals. 129 | void setup(unsigned isetup); 130 | // }}} 131 | 132 | // operator()(i_tx) 133 | // {{{ 134 | // The operator() function is called on every tick. The input is the 135 | // the output txuart transmit wire from the device. The output is to 136 | // be connected to the the rxuart receive wire into the device. This 137 | // makes hookup and operation very simple. 138 | // 139 | // This is the most appropriate simulation entry function if the 140 | // setup register will never change. 141 | // 142 | int operator()(int i_tx) { 143 | return tick(i_tx); } 144 | // }}} 145 | 146 | // operator()(i_tx, isetup) 147 | // {{{ 148 | // If there is a possibility that the core might change the UART setup, 149 | // then it makes sense to include that current setup when calling the 150 | // tick operator. 151 | int operator()(int i_tx, unsigned isetup) { 152 | setup(isetup); return tick(i_tx); } 153 | // }}} 154 | // }}} 155 | }; 156 | 157 | #endif 158 | -------------------------------------------------------------------------------- /sim/vversion.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | ################################################################################ 3 | ## 4 | ## Filename: vversion.sh 5 | ## {{{ 6 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 7 | ## 8 | ## Purpose: To determine whether or not the verilator prefix for internal 9 | ## variables is v__DOT__ or the name of the top level followed by 10 | ## __DOT__. If it is the later, output -DNEW_VERILATOR, else be silent. 11 | ## 12 | ## 13 | ## Creator: Dan Gisselquist, Ph.D. 14 | ## Gisselquist Technology, LLC 15 | ## 16 | ################################################################################ 17 | ## }}} 18 | ## Copyright (C) 2019-2024, Gisselquist Technology, LLC 19 | ## {{{ 20 | ## This program is free software (firmware): you can redistribute it and/or 21 | ## modify it under the terms of the GNU General Public License as published 22 | ## by the Free Software Foundation, either version 3 of the License, or (at 23 | ## your option) any later version. 24 | ## 25 | ## This program is distributed in the hope that it will be useful, but WITHOUT 26 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 27 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 28 | ## for more details. 29 | ## 30 | ## You should have received a copy of the GNU General Public License along 31 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 32 | ## target there if the PDF file isn't present.) If not, see 33 | ## for a copy. 34 | ## }}} 35 | ## License: GPL, v3, as defined and found on www.gnu.org, 36 | ## {{{ 37 | ## http://www.gnu.org/licenses/gpl.html 38 | ## 39 | ################################################################################ 40 | ## 41 | ## }}} 42 | if [[ x${VERILATOR_ROOT} != "x" && -x ${VERILATOR_ROOT}/bin/verilator ]]; 43 | then 44 | export VERILATOR=${VERILATOR_ROOT}/bin/verilator 45 | fi 46 | if [[ ! -x ${VERILATOR} ]]; 47 | then 48 | export VERILATOR=verilator 49 | fi 50 | if [[ ! -x `which ${VERILATOR}` ]]; 51 | then 52 | echo "Verilator not found in environment or in path" 53 | exit -1 54 | fi 55 | 56 | VVERLINE=`${VERILATOR} -V | grep -i ^Verilator` 57 | VVER=`echo ${VVERLINE} | cut -d " " -f 2` 58 | LATER=`echo $VVER \>= 3.9 | bc` 59 | if [[ $LATER > 0 ]]; 60 | then 61 | RLATER=`echo $VVER \>= 4.2 | bc` 62 | if [[ $RLATER > 0 ]]; 63 | then 64 | ## I'm not quite certain when Verilator started requiring a further 65 | ## subreference through rootp-> and including the Vdesign___024root.h 66 | ## include file. My best guess is that it is Verilator 4.2, but I don't 67 | ## know that for certain. What I do know is that on the development 68 | ## version 4.211, it requires different semantics to peek at register 69 | ## names. This is our attempt to capture that dependency. 70 | echo "-DROOT_VERILATOR" 71 | else 72 | echo "-DNEW_VERILATOR" 73 | fi 74 | else 75 | echo "-DOLD_VERILATOR" 76 | fi 77 | exit 0 78 | -------------------------------------------------------------------------------- /sw/.gitignore: -------------------------------------------------------------------------------- 1 | *.bin 2 | *.vcd 3 | histogram 4 | micscope 5 | constellation 6 | netuart 7 | obj-pc/* 8 | rfregs 9 | wbregs 10 | -------------------------------------------------------------------------------- /sw/Makefile: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | ## 3 | ## Filename: Makefile 4 | ## {{{ 5 | ## Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | ## 7 | ## Purpose: 8 | ## Targets: 9 | ## 10 | ## Creator: Dan Gisselquist, Ph.D. 11 | ## Gisselquist Technology, LLC 12 | ## 13 | ################################################################################ 14 | ## }}} 15 | ## Copyright (C) 2019-2024, Gisselquist Technology, LLC 16 | ## {{{ 17 | ## This program is free software (firmware): you can redistribute it and/or 18 | ## modify it under the terms of the GNU General Public License as published 19 | ## by the Free Software Foundation, either version 3 of the License, or (at 20 | ## your option) any later version. 21 | ## 22 | ## This program is distributed in the hope that it will be useful, but WITHOUT 23 | ## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 24 | ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 25 | ## for more details. 26 | ## 27 | ## You should have received a copy of the GNU General Public License along 28 | ## with this program. (It's in the $(ROOT)/doc directory. Run make with no 29 | ## target there if the PDF file isn't present.) If not, see 30 | ## for a copy. 31 | ## }}} 32 | ## License: GPL, v3, as defined and found on www.gnu.org, 33 | ## {{{ 34 | ## http://www.gnu.org/licenses/gpl.html 35 | ## 36 | ################################################################################ 37 | ## 38 | ## }}} 39 | .PHONY: all 40 | PROGRAMS := wbregs netuart rfregs histogram constellation 41 | SCOPES := micscope 42 | all: $(PROGRAMS) $(SCOPES) 43 | CXX := g++ 44 | OBJDIR := obj-pc 45 | BUS := hexbus 46 | EXTSRCS := $(BUS).cpp 47 | LCLSRCS := llcomms.cpp regdefs.cpp 48 | BUSSRCS := $(LCLSRCS) hexbus.cpp llcomms.cpp 49 | DEPSRCS := wbregs.cpp netuart.cpp histogram.cpp constellation.cpp $(BUSSRCS) 50 | HEADERS := llcomms.h port.h scopecls.h devbus.h $(wildcard ../$(BUS)/sw/*.h) 51 | BUSOBJS := $(addprefix $(OBJDIR)/,$(subst .cpp,.o,$(LCLSRCS) $(EXTSRCS))) 52 | CFLAGS := -g -Wall -I. -I../rtl 53 | LIBS := 54 | SUBMAKE := $(MAKE) --no-print-directory -C 55 | 56 | .PHONY: objects 57 | objects: 58 | echo $(BUSOBJS) 59 | 60 | %.o: $(OBJDIR)/%.o 61 | $(OBJDIR)/%.o: %.cpp 62 | $(mk-objdir) 63 | $(CXX) $(CFLAGS) -c $< -o $@ 64 | $(OBJDIR)/%.o: %.c 65 | $(mk-objdir) 66 | $(CXX) $(CFLAGS) -c $< -o $@ 67 | 68 | .PHONY: clean 69 | clean: 70 | rm -rf $(OBJDIR)/ $(PROGRAMS) a.out tags *.o 71 | 72 | netuart: $(OBJDIR)/netuart.o 73 | $(CXX) $(CFLAGS) $^ -o $@ 74 | # 75 | # Some simple programs that just depend upon the ability to talk to the FPGA, 76 | # and little more. 77 | # 78 | wbregs: $(OBJDIR)/wbregs.o $(BUSOBJS) 79 | $(CXX) $(CFLAGS) $^ $(LIBS) -o $@ 80 | 81 | rfregs: $(OBJDIR)/rfregs.o $(BUSOBJS) 82 | $(CXX) $(CFLAGS) $^ $(LIBS) -o $@ 83 | 84 | histogram: $(OBJDIR)/histogram.o $(BUSOBJS) 85 | $(CXX) $(CFLAGS) $^ $(LIBS) -o $@ 86 | 87 | constellation: $(OBJDIR)/constellation.o $(BUSOBJS) 88 | $(CXX) $(CFLAGS) $^ $(LIBS) -o $@ 89 | 90 | ## SCOPES 91 | # These depend upon the scopecls.o, the bus objects, as well as their 92 | # main file(s). 93 | # memscope: $(OBJDIR)/memscope.o $(OBJDIR)/scopecls.o $(BUSOBJS) 94 | # $(CXX) $(CFLAGS) $^ $(LIBS) -o $@ 95 | micscope: $(OBJDIR)/micscope.o $(OBJDIR)/scopecls.o $(BUSOBJS) 96 | $(CXX) $(CFLAGS) $^ $(LIBS) -o $@ 97 | 98 | define mk-objdir 99 | @bash -c "if [ ! -e $(OBJDIR) ]; then mkdir -p $(OBJDIR); fi" 100 | endef 101 | 102 | define build-depends 103 | @echo "Building dependency file(s)" 104 | $(mk-objdir) 105 | $(CXX) $(CFLAGS) -MM $(DEPSRCS) > $(OBJDIR)/xdepends.txt 106 | @sed -e 's/^.*.o: /$(OBJDIR)\/&/' < $(OBJDIR)/xdepends.txt > $(OBJDIR)/depends.txt 107 | @rm $(OBJDIR)/xdepends.txt 108 | endef 109 | 110 | tags: $(DEPSRCS) $(HEADERS) 111 | @echo "Generating tags" 112 | @ctags $(DEPSRCS) $(HEADERS) 113 | 114 | .PHONY: depends 115 | depends: $(OBJDIR)/depends.txt 116 | 117 | $(OBJDIR)/depends.txt: $(DEPSRCS) $(HEADERS) 118 | $(build-depends) 119 | 120 | -include $(OBJDIR)/depends.txt 121 | -------------------------------------------------------------------------------- /sw/constellation.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: constellation.cpp 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: 8 | // 9 | // Creator: Dan Gisselquist, Ph.D. 10 | // Gisselquist Technology, LLC 11 | // 12 | //////////////////////////////////////////////////////////////////////////////// 13 | // }}} 14 | // Copyright (C) 2020-2024, Gisselquist Technology, LLC 15 | // {{{ 16 | // This program is free software (firmware): you can redistribute it and/or 17 | // modify it under the terms of the GNU General Public License as published 18 | // by the Free Software Foundation, either version 3 of the License, or (at 19 | // your option) any later version. 20 | // 21 | // This program is distributed in the hope that it will be useful, but WITHOUT 22 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | // for more details. 25 | // 26 | // You should have received a copy of the GNU General Public License along 27 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | // target there if the PDF file isn't present.) If not, see 29 | // for a copy. 30 | // }}} 31 | // License: GPL, v3, as defined and found on www.gnu.org, 32 | // {{{ 33 | // http://www.gnu.org/licenses/gpl.html 34 | // 35 | //////////////////////////////////////////////////////////////////////////////// 36 | // 37 | // }}} 38 | #include 39 | #include 40 | #include 41 | #include 42 | #include 43 | #include 44 | #include 45 | #include 46 | 47 | #include "port.h" 48 | #include "regdefs.h" 49 | #include "hexbus.h" 50 | 51 | FPGA *m_fpga; 52 | void closeup(int v) { 53 | m_fpga->kill(); 54 | exit(0); 55 | } 56 | 57 | void usage(void) { 58 | printf("USAGE: constellation\n"); 59 | } 60 | 61 | int main(int argc, char **argv) { 62 | const char *host = FPGAHOST; 63 | int port=FPGAPORT; 64 | unsigned hbuf[1024]; 65 | int x, y; 66 | int con[32][32]; 67 | 68 | 69 | m_fpga = new FPGA(new NETCOMMS(host, port)); 70 | 71 | signal(SIGSTOP, closeup); 72 | signal(SIGHUP, closeup); 73 | 74 | m_fpga->readi(R_HISTOGRAM, 1024, hbuf); 75 | 76 | for(int k=0; k<1024; k++) { 77 | x = (k>>5) & 0x1f; 78 | y = k & 0x1f; 79 | 80 | con[y][x] = hbuf[k]; 81 | } 82 | 83 | for(int y=0; y<0x20; y++) { 84 | // {{{ 85 | int cy = y - 0x10; 86 | 87 | if (cy == 0) 88 | printf("-- "); 89 | else 90 | printf(" "); 91 | 92 | for(int x=0; x<0x20; x++) { 93 | int cx = x - 0x10, cp; 94 | 95 | cp = con[cy][cx]; 96 | if (cp == 0) 97 | printf(" "); 98 | else if (cp > 16) 99 | printf("X"); 100 | else if (cp > 8) 101 | printf("x"); 102 | else if (cp > 4) 103 | printf("o"); 104 | else if (cp > 2) 105 | printf("*"); 106 | else 107 | printf("."); 108 | } 109 | 110 | if (cy == 0) 111 | printf("-- "); 112 | else 113 | printf(" "); 114 | 115 | printf("\n"); 116 | // }}} 117 | } 118 | 119 | FILE *hp; 120 | hp = fopen("cons.bin","w"); 121 | fwrite(hbuf, sizeof(int), 1024, hp); 122 | fclose(hp); 123 | 124 | if (m_fpga->poll()) 125 | printf("FPGA was interrupted\n"); 126 | delete m_fpga; 127 | } 128 | 129 | -------------------------------------------------------------------------------- /sw/hexbus.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: hexbus.h 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: This is the C++ program on the command side that will interact 8 | // with a UART on an FPGA, to command the WISHBONE on that same 9 | // FPGA to ... whatever we wish to command it to do. 10 | // 11 | // This code does not run on an FPGA, is not a test bench, neither 12 | // is it a simulator. It is a portion of a command program 13 | // for commanding an FPGA. 14 | // 15 | // 16 | // Creator: Dan Gisselquist, Ph.D. 17 | // Gisselquist Technology, LLC 18 | // 19 | //////////////////////////////////////////////////////////////////////////////// 20 | // }}} 21 | // Copyright (C) 2020-2024, Gisselquist Technology, LLC 22 | // {{{ 23 | // This program is free software (firmware): you can redistribute it and/or 24 | // modify it under the terms of the GNU General Public License as published 25 | // by the Free Software Foundation, either version 3 of the License, or (at 26 | // your option) any later version. 27 | // 28 | // This program is distributed in the hope that it will be useful, but WITHOUT 29 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 30 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 31 | // for more details. 32 | // 33 | // You should have received a copy of the GNU General Public License along 34 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 35 | // target there if the PDF file isn't present.) If not, see 36 | // for a copy. 37 | // }}} 38 | // License: GPL, v3, as defined and found on www.gnu.org, 39 | // {{{ 40 | // http://www.gnu.org/licenses/gpl.html 41 | // 42 | //////////////////////////////////////////////////////////////////////////////// 43 | // 44 | // }}} 45 | #ifndef HEXBUS_H 46 | #define HEXBUS_H 47 | 48 | #include "llcomms.h" 49 | #include "devbus.h" 50 | 51 | extern bool gbl_last_readidle; 52 | 53 | class HEXBUS : public DEVBUS { 54 | public: 55 | unsigned long m_total_nread; 56 | private: 57 | LLCOMMSI *m_dev; 58 | 59 | bool m_interrupt_flag, m_addr_set, m_bus_err; 60 | unsigned int m_lastaddr, m_nacks; 61 | bool m_inc, m_isspace; 62 | 63 | int m_buflen; 64 | char *m_buf, m_cmd; 65 | 66 | void init(void) { 67 | m_total_nread = 0; 68 | m_interrupt_flag = false; 69 | m_buflen = 0; m_buf = NULL; 70 | m_addr_set = false; 71 | bufalloc(64); 72 | m_bus_err = false; 73 | m_cmd = 0; 74 | m_nacks = 0; 75 | gbl_last_readidle = true; 76 | } 77 | 78 | void bufalloc(int len); 79 | BUSW readword(void); // Reads a word value from the bus 80 | void readv(const BUSW a, const int inc, const int len, BUSW *buf); 81 | void writev(const BUSW a, const int p, const int len, const BUSW *buf); 82 | void readidle(void); 83 | 84 | int lclreadcode(char *buf, int len); 85 | char *encode_address(const BUSW a); 86 | public: 87 | HEXBUS(LLCOMMSI *comms) : m_dev(comms) { init(); } 88 | virtual ~HEXBUS(void) { 89 | m_dev->close(); 90 | if (m_buf) 91 | delete[] m_buf; 92 | m_buf = NULL; 93 | delete m_dev; 94 | } 95 | 96 | void kill(void) { m_dev->close(); } 97 | void close(void) { m_dev->close(); } 98 | void writeio(const BUSW a, const BUSW v); 99 | BUSW readio(const BUSW a); 100 | void readi( const BUSW a, const int len, BUSW *buf); 101 | void readz( const BUSW a, const int len, BUSW *buf); 102 | void writei(const BUSW a, const int len, const BUSW *buf); 103 | void writez(const BUSW a, const int len, const BUSW *buf); 104 | bool poll(void) { return m_interrupt_flag; }; 105 | void usleep(unsigned msec); // Sleep until interrupt 106 | void wait(void); // Sleep until interrupt 107 | bool bus_err(void) const { return m_bus_err; }; 108 | void reset_err(void) { m_bus_err = false; } 109 | void clear(void) { m_interrupt_flag = false; } 110 | }; 111 | 112 | typedef HEXBUS FPGA; 113 | 114 | #endif 115 | -------------------------------------------------------------------------------- /sw/histogram.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: histogram.cpp 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: To give a user access, via a command line program, to read 8 | // and write wishbone registers one at a time. Thus this program 9 | // implements readio() and writeio() but nothing more. 10 | // 11 | // 12 | // Creator: Dan Gisselquist, Ph.D. 13 | // Gisselquist Technology, LLC 14 | // 15 | //////////////////////////////////////////////////////////////////////////////// 16 | // }}} 17 | // Copyright (C) 2020-2024, Gisselquist Technology, LLC 18 | // {{{ 19 | // This program is free software (firmware): you can redistribute it and/or 20 | // modify it under the terms of the GNU General Public License as published 21 | // by the Free Software Foundation, either version 3 of the License, or (at 22 | // your option) any later version. 23 | // 24 | // This program is distributed in the hope that it will be useful, but WITHOUT 25 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 26 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 27 | // for more details. 28 | // 29 | // You should have received a copy of the GNU General Public License along 30 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 31 | // target there if the PDF file isn't present.) If not, see 32 | // for a copy. 33 | // }}} 34 | // License: GPL, v3, as defined and found on www.gnu.org, 35 | // {{{ 36 | // http://www.gnu.org/licenses/gpl.html 37 | // 38 | //////////////////////////////////////////////////////////////////////////////// 39 | // 40 | // }}} 41 | #include 42 | #include 43 | #include 44 | #include 45 | #include 46 | #include 47 | #include 48 | #include 49 | 50 | #include "port.h" 51 | #include "regdefs.h" 52 | #include "hexbus.h" 53 | 54 | FPGA *m_fpga; 55 | void closeup(int v) { 56 | m_fpga->kill(); 57 | exit(0); 58 | } 59 | 60 | void usage(void) { 61 | printf("USAGE: histogram\n"); 62 | } 63 | 64 | int main(int argc, char **argv) { 65 | const char *host = FPGAHOST; 66 | int port=FPGAPORT; 67 | unsigned hbuf[1024]; 68 | int lastzero = 0, sum = 0; 69 | 70 | m_fpga = new FPGA(new NETCOMMS(host, port)); 71 | 72 | signal(SIGSTOP, closeup); 73 | signal(SIGHUP, closeup); 74 | 75 | m_fpga->readi(R_HISTOGRAM, 1024, hbuf); 76 | lastzero = 0; 77 | sum = 0; 78 | for(int k=0; k<1024; k++) { 79 | // {{{ 80 | sum = sum + hbuf[k]; 81 | if (hbuf[k] == 0) 82 | lastzero = 1; 83 | else { 84 | if (lastzero) 85 | printf(" *****\n"); 86 | printf("@%4d #%6d: ", k, hbuf[k]); 87 | for(int j=0; j<64; j++) 88 | if (hbuf[k] > (unsigned)j*(2048/ 64)) 89 | printf("+"); 90 | printf("\n"); 91 | lastzero = 0; 92 | } 93 | // }}} 94 | } if (lastzero) 95 | printf(" *****\n"); 96 | 97 | printf("Total sum: %5d\n", sum); 98 | 99 | FILE *hp; 100 | hp = fopen("hist.bin","w"); 101 | fwrite(hbuf, sizeof(int), 1024, hp); 102 | fclose(hp); 103 | 104 | if (m_fpga->poll()) 105 | printf("FPGA was interrupted\n"); 106 | delete m_fpga; 107 | } 108 | 109 | -------------------------------------------------------------------------------- /sw/llcomms.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: llcomms.cpp 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: This is the C++ program on the command side that will interact 8 | // with a UART on an FPGA, both sending and receiving characters. 9 | // Any bus interaction will call routines from this lower level library to 10 | // accomplish the actual connection to and transmission to/from the board. 11 | // 12 | // 13 | // Creator: Dan Gisselquist, Ph.D. 14 | // Gisselquist Technology, LLC 15 | // 16 | //////////////////////////////////////////////////////////////////////////////// 17 | // }}} 18 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 19 | // {{{ 20 | // This program is free software (firmware): you can redistribute it and/or 21 | // modify it under the terms of the GNU General Public License as published 22 | // by the Free Software Foundation, either version 3 of the License, or (at 23 | // your option) any later version. 24 | // 25 | // This program is distributed in the hope that it will be useful, but WITHOUT 26 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 27 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 28 | // for more details. 29 | // 30 | // You should have received a copy of the GNU General Public License along 31 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 32 | // target there if the PDF file isn't present.) If not, see 33 | // for a copy. 34 | // }}} 35 | // License: GPL, v3, as defined and found on www.gnu.org, 36 | // {{{ 37 | // http://www.gnu.org/licenses/gpl.html 38 | // 39 | //////////////////////////////////////////////////////////////////////////////// 40 | // 41 | // }}} 42 | #include 43 | #include 44 | #include 45 | #include 46 | #include 47 | #include 48 | #include 49 | #include 50 | #include 51 | #include 52 | #include 53 | #include 54 | #include 55 | #include 56 | #include 57 | #include 58 | #include 59 | 60 | #include "llcomms.h" 61 | 62 | LLCOMMSI::LLCOMMSI(void) { 63 | m_fdw = -1; 64 | m_fdr = -1; 65 | m_total_nread = 0l; 66 | m_total_nwrit = 0l; 67 | } 68 | 69 | void LLCOMMSI::write(char *buf, int len) { 70 | int nw; 71 | nw = ::write(m_fdw, buf, len); 72 | if (nw <= 0) { 73 | throw "Write-Failure"; 74 | } else if (nw != len) { 75 | fprintf(stderr, "LLCOMMSI::ERR: %d byte write request, only %d written\n", len, nw); 76 | assert(nw == len); 77 | } 78 | m_total_nwrit += nw; 79 | assert(nw == len); 80 | } 81 | 82 | int LLCOMMSI::read(char *buf, int len) { 83 | int nr; 84 | nr = ::read(m_fdr, buf, len); 85 | if (nr <= 0) { 86 | throw "Read-Failure"; 87 | } 88 | m_total_nread += nr; 89 | return nr; 90 | } 91 | 92 | void LLCOMMSI::close(void) { 93 | if(m_fdw>=0) 94 | ::close(m_fdw); 95 | if((m_fdr>=0)&&(m_fdr != m_fdw)) 96 | ::close(m_fdr); 97 | m_fdw = m_fdr = -1; 98 | } 99 | 100 | bool LLCOMMSI::poll(unsigned ms) { 101 | struct pollfd fds; 102 | 103 | fds.fd = m_fdr; 104 | fds.events = POLLIN; 105 | ::poll(&fds, 1, ms); 106 | 107 | if (fds.revents & POLLIN) { 108 | return true; 109 | } else return false; 110 | } 111 | 112 | int LLCOMMSI::available(void) { 113 | return poll(0)?1:0; 114 | } 115 | 116 | TTYCOMMS::TTYCOMMS(const char *dev) { 117 | m_fdr = ::open(dev, O_RDWR | O_NONBLOCK); 118 | if (m_fdr < 0) { 119 | printf("\n Error : Could not open %s\n", dev); 120 | perror("O/S Err:"); 121 | exit(-1); 122 | } 123 | 124 | if (isatty(m_fdr)) { 125 | struct termios tb; 126 | tcgetattr(m_fdr, &tb); 127 | cfmakeraw(&tb); 128 | // tb.c_iflag &= (~(IXON|IXOFF)); 129 | tb.c_cflag &= (~(CRTSCTS)); 130 | tcsetattr(m_fdr, TCSANOW, &tb); 131 | tcflow(m_fdr, TCOON); 132 | } 133 | 134 | m_fdw = m_fdr; 135 | } 136 | 137 | NETCOMMS::NETCOMMS(const char *host, const int port) { 138 | struct sockaddr_in serv_addr; 139 | struct hostent *hp; 140 | 141 | if ((m_fdr = socket(AF_INET, SOCK_STREAM, 0)) < 0) { 142 | printf("\n Error : Could not create socket \n"); 143 | exit(-1); 144 | } 145 | 146 | memset(&serv_addr, '0', sizeof(serv_addr)); 147 | 148 | hp = gethostbyname(host); 149 | if (hp == NULL) { 150 | printf("Could not get host entity for %s\n", host); 151 | perror("O/S Err:"); 152 | exit(-1); 153 | } 154 | bcopy(hp->h_addr, &serv_addr.sin_addr.s_addr, hp->h_length); 155 | 156 | serv_addr.sin_family = AF_INET; 157 | serv_addr.sin_port = htons(port); 158 | 159 | if (connect(m_fdr,(struct sockaddr *)&serv_addr, sizeof(serv_addr))< 0){ 160 | perror("Connect Failed Err"); 161 | exit(-1); 162 | } 163 | 164 | m_fdw = m_fdr; 165 | } 166 | 167 | void NETCOMMS::close(void) { 168 | int nr; 169 | char buf[256]; 170 | 171 | shutdown(m_fdw, SHUT_WR); 172 | while(1) { 173 | nr = ::read(m_fdr, buf, sizeof(buf)); 174 | if (nr <= 0) 175 | break; 176 | } 177 | ::close(m_fdw); 178 | } 179 | -------------------------------------------------------------------------------- /sw/llcomms.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: llcomms.h 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: This is the C++ program on the command side that will interact 8 | // with a UART on an FPGA, both sending and receiving characters. 9 | // Any bus interaction will call routines from this lower level library to 10 | // accomplish the actual connection to and transmission to/from the board. 11 | // 12 | // Creator: Dan Gisselquist, Ph.D. 13 | // Gisselquist Technology, LLC 14 | // 15 | //////////////////////////////////////////////////////////////////////////////// 16 | // }}} 17 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 18 | // {{{ 19 | // This program is free software (firmware): you can redistribute it and/or 20 | // modify it under the terms of the GNU General Public License as published 21 | // by the Free Software Foundation, either version 3 of the License, or (at 22 | // your option) any later version. 23 | // 24 | // This program is distributed in the hope that it will be useful, but WITHOUT 25 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 26 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 27 | // for more details. 28 | // 29 | // You should have received a copy of the GNU General Public License along 30 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 31 | // target there if the PDF file isn't present.) If not, see 32 | // for a copy. 33 | // }}} 34 | // License: GPL, v3, as defined and found on www.gnu.org, 35 | // {{{ 36 | // http://www.gnu.org/licenses/gpl.html 37 | // 38 | // 39 | //////////////////////////////////////////////////////////////////////////////// 40 | // 41 | // }}} 42 | #ifndef LLCOMMS_H 43 | #define LLCOMMS_H 44 | 45 | class LLCOMMSI { 46 | protected: 47 | int m_fdw, m_fdr; 48 | LLCOMMSI(void); 49 | public: 50 | unsigned long m_total_nread, m_total_nwrit; 51 | 52 | virtual ~LLCOMMSI(void) { close(); } 53 | virtual void kill(void) { this->close(); }; 54 | virtual void close(void); 55 | virtual void write(char *buf, int len); 56 | virtual int read(char *buf, int len); 57 | virtual bool poll(unsigned ms); 58 | 59 | // Tests whether or not bytes are available to be read, returns a 60 | // count of the bytes that may be immediately read 61 | virtual int available(void); // { return 0; }; 62 | }; 63 | 64 | class TTYCOMMS : public LLCOMMSI { 65 | public: 66 | TTYCOMMS(const char *dev); 67 | }; 68 | 69 | class NETCOMMS : public LLCOMMSI { 70 | public: 71 | NETCOMMS(const char *dev, const int port); 72 | virtual void close(void); 73 | }; 74 | 75 | #endif 76 | -------------------------------------------------------------------------------- /sw/micscope.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: micscope.cpp 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: 8 | // 9 | // Creator: Dan Gisselquist, Ph.D. 10 | // Gisselquist Technology, LLC 11 | // 12 | //////////////////////////////////////////////////////////////////////////////// 13 | // }}} 14 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 15 | // {{{ 16 | // This program is free software (firmware): you can redistribute it and/or 17 | // modify it under the terms of the GNU General Public License as published 18 | // by the Free Software Foundation, either version 3 of the License, or (at 19 | // your option) any later version. 20 | // 21 | // This program is distributed in the hope that it will be useful, but WITHOUT 22 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 23 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 | // for more details. 25 | // 26 | // You should have received a copy of the GNU General Public License along 27 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 28 | // target there if the PDF file isn't present.) If not, see 29 | // for a copy. 30 | // }}} 31 | // License: GPL, v3, as defined and found on www.gnu.org, 32 | // {{{ 33 | // http://www.gnu.org/licenses/gpl.html 34 | // 35 | //////////////////////////////////////////////////////////////////////////////// 36 | // 37 | // }}} 38 | #include 39 | #include 40 | #include 41 | #include 42 | #include 43 | #include 44 | #include 45 | #include 46 | 47 | #include "port.h" 48 | #include "regdefs.h" 49 | #include "scopecls.h" 50 | 51 | #ifdef R_RFSCOPE 52 | 53 | #include "hexbus.h" 54 | 55 | #define WBSCOPE R_RFSCOPE 56 | #define WBSCOPEDATA R_RFSCOPED 57 | 58 | FPGA *m_fpga; 59 | void closeup(int v) { 60 | m_fpga->kill(); 61 | exit(0); 62 | } 63 | 64 | #define BIT(V,N) ((V>>N)&1) 65 | #define BITV(N) BIT(val,N) 66 | 67 | class MICSCOPE : public SCOPE { 68 | public: 69 | MICSCOPE(FPGA *fpga, unsigned addr, bool vecread) 70 | : SCOPE(fpga, addr, false, false) {}; 71 | ~MICSCOPE(void) {} 72 | virtual void decode(DEVBUS::BUSW val) const { 73 | // {{{ 74 | // int trig; 75 | int rf, sample, csn, sck, miso, ce, valid, audioen, rfen, 76 | micdata; 77 | 78 | rf = (val >> 29) & 0x03; 79 | sample = (val >> 20) & 0x03ff; 80 | csn = BITV(18); 81 | sck = BITV(17); 82 | miso = BITV(16); 83 | ce = BITV(15); 84 | valid = BITV(14); 85 | audioen = BITV(13); 86 | rfen = BITV(12); 87 | micdata = val & 0x0fff; 88 | 89 | printf("%s%s %s | %s%s (%s%s) -> %s%3x%s | %3x -> %s%s\n", 90 | (csn)?" ":"CSN", (sck)?"SCK":" ", miso ? "1":"0", 91 | (ce) ? "CE":" ",(valid) ?"VL":" ", 92 | (audioen)?"AU":"--", (rfen)?"RF":"--", 93 | (ce)?"0x":"( ", micdata, (ce)?" ": "?", 94 | sample, (rf & 2)?"I":"-", (rf&1)?"Q":"-"); 95 | // }}} 96 | } 97 | 98 | virtual void define_traces(void) { 99 | // {{{ 100 | register_trace("o_rf_data", 2, 29); 101 | register_trace("sample_data_off", 10, 20); 102 | register_trace("o_mic_csn", 1, 18); 103 | register_trace("o_mic_sck", 1, 17); 104 | register_trace("i_mic_miso", 1, 16); 105 | register_trace("mic_ce", 1, 15); 106 | register_trace("mic_valid", 1, 14); 107 | register_trace("i_audio_en", 1, 13); 108 | register_trace("i_rf_en", 1, 12); 109 | register_trace("mic_data", 12, 0); 110 | // }}} 111 | } 112 | }; 113 | 114 | void usage(void) { 115 | printf("USAGE: micscope\n"); 116 | } 117 | 118 | int main(int argc, char **argv) { 119 | const char *host = FPGAHOST; 120 | int port=FPGAPORT; 121 | 122 | m_fpga = new FPGA(new NETCOMMS(host, port)); 123 | 124 | MICSCOPE *scope = new MICSCOPE(m_fpga, WBSCOPE, false); 125 | scope->set_clkfreq_hz(36000000); 126 | if (!scope->ready()) { 127 | printf("Scope is not yet ready:\n"); 128 | scope->decode_control(); 129 | } else { 130 | scope->print(); 131 | scope->writevcd("micscope.vcd"); 132 | } 133 | delete m_fpga; 134 | } 135 | 136 | #else // RFSCOPE 137 | int main(int argc, char **argv) { 138 | fprintf(stderr, "No RF Scope enabled\n"); 139 | exit(EXIT_FAILURE); 140 | } 141 | #endif 142 | -------------------------------------------------------------------------------- /sw/port.h: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: port.h 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // Purpose: Defines the communication parameters necessary for communicating 8 | // both with our actual hardware device, as well as with our Verilator 9 | // simulation. The result is that whatever communicates with the other may 10 | // not know the difference (as desired). 11 | // 12 | // 13 | // Creator: Dan Gisselquist, Ph.D. 14 | // Gisselquist Technology, LLC 15 | // 16 | //////////////////////////////////////////////////////////////////////////////// 17 | // }}} 18 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 19 | // {{{ 20 | // This program is free software (firmware): you can redistribute it and/or 21 | // modify it under the terms of the GNU General Public License as published 22 | // by the Free Software Foundation, either version 3 of the License, or (at 23 | // your option) any later version. 24 | // 25 | // This program is distributed in the hope that it will be useful, but WITHOUT 26 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 27 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 28 | // for more details. 29 | // 30 | // You should have received a copy of the GNU General Public License along 31 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 32 | // target there if the PDF file isn't present.) If not, see 33 | // for a copy. 34 | // }}} 35 | // License: GPL, v3, as defined and found on www.gnu.org, 36 | // {{{ 37 | // http://www.gnu.org/licenses/gpl.html 38 | // 39 | //////////////////////////////////////////////////////////////////////////////// 40 | // 41 | // }}} 42 | #ifndef PORT_H 43 | #define PORT_H 44 | 45 | // There are two ways to connect: via a serial port, and via a TCP socket 46 | // connected to a serial port. This way, we can connect the device on one 47 | // computer, test it, and when/if it doesn't work we can replace the device 48 | // with the test-bench. Across the network, no one will know any better that 49 | // anything had changed. 50 | #define FPGAHOST "localhost" // Whatever computer is used to run this 51 | #define FPGAPORT 9401 // A somewhat random port number--CHANGEME 52 | 53 | #define FPGAOPEN(V) V= new FPGA(new NETCOMMS(FPGAHOST, FPGAPORT)) 54 | 55 | #endif 56 | -------------------------------------------------------------------------------- /sw/regdefs.cpp: -------------------------------------------------------------------------------- 1 | //////////////////////////////////////////////////////////////////////////////// 2 | // 3 | // Filename: ./regdefs.cpp 4 | // {{{ 5 | // Project: SDR, a basic Soft(Gate)ware Defined Radio architecture 6 | // 7 | // DO NOT EDIT THIS FILE! 8 | // Computer Generated: This file is computer generated by AUTOFPGA. DO NOT EDIT. 9 | // DO NOT EDIT THIS FILE! 10 | // 11 | // CmdLine: autofpga autofpga -d -o . global.txt clock36.txt version.txt hexbus.txt gpio.txt qpsksim.txt histogram.txt rfscope.txt samplerate.txt 12 | // 13 | // Creator: Dan Gisselquist, Ph.D. 14 | // Gisselquist Technology, LLC 15 | // 16 | //////////////////////////////////////////////////////////////////////////////// 17 | // }}} 18 | // Copyright (C) 2019-2024, Gisselquist Technology, LLC 19 | // {{{ 20 | // This program is free software (firmware): you can redistribute it and/or 21 | // modify it under the terms of the GNU General Public License as published 22 | // by the Free Software Foundation, either version 3 of the License, or (at 23 | // your option) any later version. 24 | // 25 | // This program is distributed in the hope that it will be useful, but WITHOUT 26 | // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or 27 | // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 28 | // for more details. 29 | // 30 | // You should have received a copy of the GNU General Public License along 31 | // with this program. (It's in the $(ROOT)/doc directory. Run make with no 32 | // target there if the PDF file isn't present.) If not, see 33 | // for a copy. 34 | // }}} 35 | // License: GPL, v3, as defined and found on www.gnu.org, 36 | // {{{ 37 | // http://www.gnu.org/licenses/gpl.html 38 | // 39 | //////////////////////////////////////////////////////////////////////////////// 40 | // 41 | // }}} 42 | #include 43 | #include 44 | #include 45 | #include 46 | #include "regdefs.h" 47 | 48 | const REGNAME raw_bregs[] = { 49 | { R_RFSCOPE , "RFSCOPE" }, 50 | { R_RFSCOPED , "RFSCOPED" }, 51 | { R_BUILDTIME, "BUILDTIME" }, 52 | { R_GPIO , "GPIO" }, 53 | { R_GPIO , "GPI" }, 54 | { R_GPIO , "GPO" }, 55 | { R_SRATE , "SRATE" }, 56 | { R_SRATE , "SAMPLERATE" }, 57 | { R_VERSION , "VERSION" }, 58 | { R_TXFIL , "TXFIL" }, 59 | { R_TXPSHAPE , "TXPSHAPE" }, 60 | { R_TX2 , "TX2" }, 61 | { R_TX3 , "TX3" }, 62 | { R_RXSYM , "RXSYM" }, 63 | { R_RXFIL , "RXFIL" }, 64 | { R_RXCARRIER, "RXCARRIER" }, 65 | { R_RX3 , "RX3" }, 66 | { R_HISTOGRAM, "HISTOGRAM" } 67 | }; 68 | 69 | // REGSDEFS.CPP.INSERT for any bus masters 70 | // And then from the peripherals 71 | // And finally any master REGS.CPP.INSERT tags 72 | #define RAW_NREGS (sizeof(raw_bregs)/sizeof(bregs[0])) 73 | 74 | const REGNAME *bregs = raw_bregs; 75 | const int NREGS = RAW_NREGS; 76 | 77 | unsigned addrdecode(const char *v) { 78 | if (isalpha(v[0])) { 79 | for(int i=0; i for a copy. 34 | // }}} 35 | // License: GPL, v3, as defined and found on www.gnu.org, 36 | // {{{ 37 | // http://www.gnu.org/licenses/gpl.html 38 | // 39 | //////////////////////////////////////////////////////////////////////////////// 40 | // 41 | // }}} 42 | #ifndef REGDEFS_H 43 | #define REGDEFS_H 44 | 45 | 46 | // 47 | // The @REGDEFS.H.INCLUDE tag 48 | // 49 | // @REGDEFS.H.INCLUDE for masters 50 | // @REGDEFS.H.INCLUDE for peripherals 51 | // And finally any master REGDEFS.H.INCLUDE tags 52 | // End of definitions from REGDEFS.H.INCLUDE 53 | 54 | 55 | // 56 | // Register address definitions, from @REGS.#d 57 | // 58 | // rfscope scope 59 | #define R_RFSCOPE 0x00000400 // 00000400, wbregs names: RFSCOPE 60 | #define R_RFSCOPED 0x00000404 // 00000400, wbregs names: RFSCOPED 61 | #define R_BUILDTIME 0x00000800 // 00000800, wbregs names: BUILDTIME 62 | #define R_GPIO 0x00000804 // 00000804, wbregs names: GPIO, GPI, GPO 63 | #define R_SRATE 0x00000808 // 00000808, wbregs names: SRATE 64 | #define R_SRATE 0x00000808 // 00000808, wbregs names: SAMPLERATE 65 | #define R_VERSION 0x0000080c // 0000080c, wbregs names: VERSION 66 | #define R_TXFIL 0x00000c00 // 00000c00, wbregs names: TXFIL 67 | #define R_TXPSHAPE 0x00000c00 // 00000c00, wbregs names: TXPSHAPE 68 | #define R_TX2 0x00000c04 // 00000c00, wbregs names: TX2 69 | #define R_TX3 0x00000c08 // 00000c00, wbregs names: TX3 70 | #define R_RXSYM 0x00000c14 // 00000c00, wbregs names: RXSYM 71 | #define R_RXFIL 0x00000c10 // 00000c00, wbregs names: RXFIL 72 | #define R_RXCARRIER 0x00000c18 // 00000c00, wbregs names: RXCARRIER 73 | #define R_RX3 0x00000c1c // 00000c00, wbregs names: RX3 74 | #define R_HISTOGRAM 0x00001000 // 00001000, wbregs names: HISTOGRAM 75 | 76 | 77 | // 78 | // The @REGDEFS.H.DEFNS tag 79 | // 80 | // @REGDEFS.H.DEFNS for masters 81 | #define BAUDRATE 1000000 82 | #define CLKFREQHZ 36000000 83 | // @REGDEFS.H.DEFNS for peripherals 84 | // @REGDEFS.H.DEFNS at the top level 85 | // End of definitions from REGDEFS.H.DEFNS 86 | // 87 | // The @REGDEFS.H.INSERT tag 88 | // 89 | // @REGDEFS.H.INSERT for masters 90 | // @REGDEFS.H.INSERT for peripherals 91 | // @REGDEFS.H.INSERT from the top level 92 | typedef struct { 93 | unsigned m_addr; 94 | const char *m_name; 95 | } REGNAME; 96 | 97 | extern const REGNAME *bregs; 98 | extern const int NREGS; 99 | // #define NREGS (sizeof(bregs)/sizeof(bregs[0])) 100 | 101 | extern unsigned addrdecode(const char *v); 102 | extern const char *addrname(const unsigned v); 103 | // End of definitions from REGDEFS.H.INSERT 104 | 105 | 106 | #endif // REGDEFS_H 107 | -------------------------------------------------------------------------------- /sw/rxconfig.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | ./rfregs regmode 2 # Enable the receiver 4 | -------------------------------------------------------------------------------- /sw/txconfig.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | ./rfregs -c 4 | # ./rfregs regmode 0x01 # Enable standby 5 | # ./rfregs frftx 0xcb5555 # = 915MHz, can be offset in steps of 68.66455Hz 6 | # ./rfregs txbw 0x00 # Transmit PLL bandwidth = 75kHz 7 | # ./rfregs diomapping 0 8 | # ./rfregs clkselect 1 9 | # ./rfregs regmode 0x0c # Enable transmit/broadcast 10 | 11 | ./rfregs regmode 0x8d 12 | ./rfregs clkselect 0x92 13 | 14 | # 15 | # Turn on the audio, transmitter, and LED 16 | ./wbregs gpio 0x340034 17 | 18 | grep AMGAIN regdefs.h > /dev/null && \ 19 | echo "To start the AM modulator, type: ./wbregs amgain 0x10003e00" 20 | --------------------------------------------------------------------------------