├── .gitignore
├── 1.Hardware
├── Daplink_CH552P
│ ├── Daplink_CH552P.kicad_pcb
│ ├── Daplink_CH552P.kicad_pro
│ ├── Daplink_CH552P.kicad_sch
│ ├── Daplink_Library.kicad_sym
│ ├── Daplink_Library.pretty
│ │ └── Connector_2.54mm_2_5P_SMD.kicad_mod
│ ├── fp-lib-table
│ └── sym-lib-table
└── STM32DemoBoard
│ ├── STM32DemoBoard.kicad_pcb
│ ├── STM32DemoBoard.kicad_pro
│ ├── STM32DemoBoard.kicad_sch
│ ├── STM32DemoBoard_Library.kicad_sym
│ └── sym-lib-table
├── 2.Firmware
├── KEIL
│ ├── CH55x_DAPLink.uvopt
│ ├── CH55x_DAPLink.uvproj
│ └── STARTUP.A51
└── SRC
│ ├── AT.c
│ ├── AT.h
│ ├── CH552.H
│ ├── DAP.c
│ ├── DAP.h
│ ├── DataFlash.C
│ ├── DataFlash.H
│ ├── Debug.C
│ ├── Debug.H
│ ├── FastWrite.a51
│ ├── FastWrite.h
│ ├── Keyboard.c
│ ├── Keyboard.h
│ ├── SW_DP.c
│ ├── SW_DP_asm.a51
│ ├── Timer.C
│ ├── Timer.H
│ ├── TouchKey.C
│ ├── TouchKey.H
│ ├── Uart.c
│ ├── Uart.h
│ ├── Usb.C
│ ├── Usb.h
│ ├── main.c
│ └── main.h
├── 3.Docs
├── CH552DS1.PDF
├── CH55X汇编指令.PDF
├── Keyboard_HID.txt
└── debug_interface_v5_2_architecture_specification_IHI0031F.pdf
├── 4.Waves
├── Flash3932.sr
├── Serial115200.sr
└── d单次刷写.webp
├── LICENSE
└── README.md
/.gitignore:
--------------------------------------------------------------------------------
1 | /2.Firmware/KEIL/Listings
2 | /2.Firmware/KEIL/Objects
3 | 2.Firmware/KEIL/*.uvgui.*
4 | .idea/
5 | Waves/
6 |
7 | 1.Hardware/*/*.000
8 | 1.Hardware/*/*.bak
9 | 1.Hardware/*/*.bck
10 | 1.Hardware/*/*.kicad_pcb-bak
11 | 1.Hardware/*/*.kicad_sch-bak
12 | 1.Hardware/*/*-backups
13 | 1.Hardware/*/*.kicad_prl
14 | 1.Hardware/*/*.sch-bak
15 | 1.Hardware/*/~
16 | 1.Hardware/*/_autosave-
17 | 1.Hardware/*/*.tmp
18 | 1.Hardware/*/*-save.pro
19 | 1.Hardware/*/*-save.kicad_pcb
20 | 1.Hardware/*/fp-info-cache
21 | 1.Hardware/*/*.net
22 | 1.Hardware/*/*.dsn
23 | 1.Hardware/*/*.ses
24 | 1.Hardware/*/*.xml
25 | 1.Hardware/*/*.csv
26 | 1.Hardware/*/*.pdf
--------------------------------------------------------------------------------
/1.Hardware/Daplink_CH552P/Daplink_CH552P.kicad_pro:
--------------------------------------------------------------------------------
1 | {
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3 | "design_settings": {
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6 | "copper_line_width": 0.19999999999999998,
7 | "copper_text_italic": false,
8 | "copper_text_size_h": 1.5,
9 | "copper_text_size_v": 1.5,
10 | "copper_text_thickness": 0.3,
11 | "copper_text_upright": false,
12 | "courtyard_line_width": 0.049999999999999996,
13 | "dimension_precision": 4,
14 | "dimension_units": 3,
15 | "dimensions": {
16 | "arrow_length": 1270000,
17 | "extension_offset": 500000,
18 | "keep_text_aligned": true,
19 | "suppress_zeroes": false,
20 | "text_position": 0,
21 | "units_format": 1
22 | },
23 | "fab_line_width": 0.09999999999999999,
24 | "fab_text_italic": false,
25 | "fab_text_size_h": 1.0,
26 | "fab_text_size_v": 1.0,
27 | "fab_text_thickness": 0.15,
28 | "fab_text_upright": false,
29 | "other_line_width": 0.15,
30 | "other_text_italic": false,
31 | "other_text_size_h": 1.0,
32 | "other_text_size_v": 1.0,
33 | "other_text_thickness": 0.15,
34 | "other_text_upright": false,
35 | "pads": {
36 | "drill": 0.762,
37 | "height": 1.524,
38 | "width": 1.524
39 | },
40 | "silk_line_width": 0.15,
41 | "silk_text_italic": false,
42 | "silk_text_size_h": 1.0,
43 | "silk_text_size_v": 1.0,
44 | "silk_text_thickness": 0.15,
45 | "silk_text_upright": false,
46 | "zones": {
47 | "45_degree_only": false,
48 | "min_clearance": 0.254
49 | }
50 | },
51 | "diff_pair_dimensions": [
52 | {
53 | "gap": 0.0,
54 | "via_gap": 0.0,
55 | "width": 0.0
56 | }
57 | ],
58 | "drc_exclusions": [],
59 | "meta": {
60 | "version": 2
61 | },
62 | "rule_severities": {
63 | "annular_width": "error",
64 | "clearance": "error",
65 | "copper_edge_clearance": "error",
66 | "courtyards_overlap": "error",
67 | "diff_pair_gap_out_of_range": "error",
68 | "diff_pair_uncoupled_length_too_long": "error",
69 | "drill_out_of_range": "error",
70 | "duplicate_footprints": "warning",
71 | "extra_footprint": "warning",
72 | "footprint_type_mismatch": "error",
73 | "hole_clearance": "error",
74 | "hole_near_hole": "error",
75 | "invalid_outline": "error",
76 | "item_on_disabled_layer": "error",
77 | "items_not_allowed": "error",
78 | "length_out_of_range": "error",
79 | "malformed_courtyard": "error",
80 | "microvia_drill_out_of_range": "error",
81 | "missing_courtyard": "ignore",
82 | "missing_footprint": "warning",
83 | "net_conflict": "warning",
84 | "npth_inside_courtyard": "ignore",
85 | "padstack": "error",
86 | "pth_inside_courtyard": "ignore",
87 | "shorting_items": "error",
88 | "silk_over_copper": "warning",
89 | "silk_overlap": "warning",
90 | "skew_out_of_range": "error",
91 | "through_hole_pad_without_hole": "error",
92 | "too_many_vias": "error",
93 | "track_dangling": "warning",
94 | "track_width": "error",
95 | "tracks_crossing": "error",
96 | "unconnected_items": "error",
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98 | "via_dangling": "warning",
99 | "zone_has_empty_net": "error",
100 | "zones_intersect": "error"
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104 | "allow_microvias": false,
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111 | "min_microvia_drill": 0.09999999999999999,
112 | "min_silk_clearance": 0.0,
113 | "min_through_hole_diameter": 0.3,
114 | "min_track_width": 0.127,
115 | "min_via_annular_width": 0.09999999999999999,
116 | "min_via_diameter": 0.5,
117 | "solder_mask_clearance": 0.0,
118 | "solder_mask_min_width": 0.0,
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131 | },
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141 | },
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144 | "equivalence_files": []
145 | },
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150 | },
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319 | ]
320 | ],
321 | "rule_severities": {
322 | "bus_definition_conflict": "error",
323 | "bus_entry_needed": "error",
324 | "bus_label_syntax": "error",
325 | "bus_to_bus_conflict": "error",
326 | "bus_to_net_conflict": "error",
327 | "different_unit_footprint": "error",
328 | "different_unit_net": "error",
329 | "duplicate_reference": "error",
330 | "duplicate_sheet_names": "error",
331 | "extra_units": "error",
332 | "global_label_dangling": "warning",
333 | "hier_label_mismatch": "error",
334 | "label_dangling": "error",
335 | "lib_symbol_issues": "warning",
336 | "multiple_net_names": "warning",
337 | "net_not_bus_member": "warning",
338 | "no_connect_connected": "warning",
339 | "no_connect_dangling": "warning",
340 | "pin_not_connected": "error",
341 | "pin_not_driven": "error",
342 | "pin_to_pin": "warning",
343 | "power_pin_not_driven": "error",
344 | "similar_labels": "warning",
345 | "unannotated": "error",
346 | "unit_value_mismatch": "error",
347 | "unresolved_variable": "error",
348 | "wire_dangling": "error"
349 | }
350 | },
351 | "libraries": {
352 | "pinned_footprint_libs": [],
353 | "pinned_symbol_libs": []
354 | },
355 | "meta": {
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357 | "version": 1
358 | },
359 | "net_settings": {
360 | "classes": [
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363 | "clearance": 0.2,
364 | "diff_pair_gap": 0.25,
365 | "diff_pair_via_gap": 0.25,
366 | "diff_pair_width": 0.2,
367 | "line_style": 0,
368 | "microvia_diameter": 0.3,
369 | "microvia_drill": 0.1,
370 | "name": "Default",
371 | "pcb_color": "rgba(0, 0, 0, 0.000)",
372 | "schematic_color": "rgba(0, 0, 0, 0.000)",
373 | "track_width": 0.25,
374 | "via_diameter": 0.8,
375 | "via_drill": 0.4,
376 | "wire_width": 6.0
377 | }
378 | ],
379 | "meta": {
380 | "version": 2
381 | },
382 | "net_colors": null
383 | },
384 | "pcbnew": {
385 | "last_paths": {
386 | "gencad": "",
387 | "idf": "",
388 | "netlist": "",
389 | "specctra_dsn": "",
390 | "step": "",
391 | "vrml": ""
392 | },
393 | "page_layout_descr_file": ""
394 | },
395 | "schematic": {
396 | "annotate_start_num": 0,
397 | "drawing": {
398 | "default_line_thickness": 6.0,
399 | "default_text_size": 50.0,
400 | "field_names": [],
401 | "intersheets_ref_own_page": false,
402 | "intersheets_ref_prefix": "",
403 | "intersheets_ref_short": false,
404 | "intersheets_ref_show": false,
405 | "intersheets_ref_suffix": "",
406 | "junction_size_choice": 3,
407 | "label_size_ratio": 0.375,
408 | "pin_symbol_size": 25.0,
409 | "text_offset_ratio": 0.15
410 | },
411 | "legacy_lib_dir": "",
412 | "legacy_lib_list": [],
413 | "meta": {
414 | "version": 1
415 | },
416 | "net_format_name": "",
417 | "ngspice": {
418 | "fix_include_paths": true,
419 | "fix_passive_vals": false,
420 | "meta": {
421 | "version": 0
422 | },
423 | "model_mode": 0,
424 | "workbook_filename": ""
425 | },
426 | "page_layout_descr_file": "",
427 | "plot_directory": "",
428 | "spice_adjust_passive_values": false,
429 | "spice_external_command": "spice \"%I\"",
430 | "subpart_first_id": 65,
431 | "subpart_id_separator": 0
432 | },
433 | "sheets": [
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437 | ]
438 | ],
439 | "text_variables": {}
440 | }
441 |
--------------------------------------------------------------------------------
/1.Hardware/Daplink_CH552P/Daplink_Library.kicad_sym:
--------------------------------------------------------------------------------
1 | (kicad_symbol_lib (version 20211014) (generator kicad_symbol_editor)
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3 | (property "Reference" "U3" (id 0) (at 1.27 -4.1148 0)
4 | (effects (font (size 1.27 1.27)))
5 | )
6 | (property "Value" "CH552G" (id 1) (at 1.27 -1.5748 0)
7 | (effects (font (size 1.27 1.27)))
8 | )
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11 | )
12 | (property "Datasheet" "" (id 3) (at 0 0 0)
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/1.Hardware/Daplink_CH552P/Daplink_Library.pretty/Connector_2.54mm_2_5P_SMD.kicad_mod:
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2 | (layer "F.Cu")
3 | (tedit 0)
4 | (property "Sheetfile" "Daplink_CH552P.kicad_sch")
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30 | (pad "7" connect roundrect (at 2.54 0 90) (size 4 1.524) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.25) (tstamp f1b3d8cb-caa1-4aa7-991c-c13079ad930d))
31 | (pad "8" connect roundrect (at 0 0 90) (size 4 1.524) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.25) (tstamp 86aa0ecf-e95c-4952-b416-ac0255909a18))
32 | (pad "9" connect roundrect (at -2.54 0 90) (size 4 1.524) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.25) (tstamp 744d92ce-dc84-43e6-967e-ef336b1ba649))
33 | (pad "10" connect roundrect (at -5.08 0 90) (size 4 1.524) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.25) (tstamp 8d00e5e0-4e9a-4162-8e8d-1e53467a25d4))
34 | )
35 |
--------------------------------------------------------------------------------
/1.Hardware/Daplink_CH552P/fp-lib-table:
--------------------------------------------------------------------------------
1 | (fp_lib_table
2 | (lib (name "Daplink_Library")(type "KiCad")(uri "${KIPRJMOD}/Daplink_Library.pretty")(options "")(descr ""))
3 | )
4 |
--------------------------------------------------------------------------------
/1.Hardware/Daplink_CH552P/sym-lib-table:
--------------------------------------------------------------------------------
1 | (sym_lib_table
2 | (lib (name "Daplink_Library")(type "KiCad")(uri "${KIPRJMOD}/Daplink_Library.kicad_sym")(options "")(descr ""))
3 | )
4 |
--------------------------------------------------------------------------------
/1.Hardware/STM32DemoBoard/STM32DemoBoard.kicad_pcb:
--------------------------------------------------------------------------------
1 | (kicad_pcb (version 20211014) (generator pcbnew)
2 | )
--------------------------------------------------------------------------------
/1.Hardware/STM32DemoBoard/STM32DemoBoard.kicad_pro:
--------------------------------------------------------------------------------
1 | {
2 | "board": {
3 | "design_settings": {
4 | "defaults": {
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6 | "copper_line_width": 0.2,
7 | "copper_text_size_h": 1.5,
8 | "copper_text_size_v": 1.5,
9 | "copper_text_thickness": 0.3,
10 | "other_line_width": 0.15,
11 | "silk_line_width": 0.15,
12 | "silk_text_size_h": 1.0,
13 | "silk_text_size_v": 1.0,
14 | "silk_text_thickness": 0.15
15 | },
16 | "diff_pair_dimensions": [],
17 | "drc_exclusions": [],
18 | "rules": {
19 | "min_copper_edge_clearance": 0.0,
20 | "solder_mask_clearance": 0.0,
21 | "solder_mask_min_width": 0.0
22 | },
23 | "track_widths": [],
24 | "via_dimensions": []
25 | },
26 | "layer_presets": []
27 | },
28 | "boards": [],
29 | "cvpcb": {
30 | "equivalence_files": []
31 | },
32 | "erc": {
33 | "erc_exclusions": [],
34 | "meta": {
35 | "version": 0
36 | },
37 | "pin_map": [
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198 | 2,
199 | 2,
200 | 2,
201 | 2,
202 | 2,
203 | 2,
204 | 2
205 | ]
206 | ],
207 | "rule_severities": {
208 | "bus_definition_conflict": "error",
209 | "bus_entry_needed": "error",
210 | "bus_label_syntax": "error",
211 | "bus_to_bus_conflict": "error",
212 | "bus_to_net_conflict": "error",
213 | "different_unit_footprint": "error",
214 | "different_unit_net": "error",
215 | "duplicate_reference": "error",
216 | "duplicate_sheet_names": "error",
217 | "extra_units": "error",
218 | "global_label_dangling": "warning",
219 | "hier_label_mismatch": "error",
220 | "label_dangling": "error",
221 | "lib_symbol_issues": "warning",
222 | "multiple_net_names": "warning",
223 | "net_not_bus_member": "warning",
224 | "no_connect_connected": "warning",
225 | "no_connect_dangling": "warning",
226 | "pin_not_connected": "error",
227 | "pin_not_driven": "error",
228 | "pin_to_pin": "warning",
229 | "power_pin_not_driven": "error",
230 | "similar_labels": "warning",
231 | "unannotated": "error",
232 | "unit_value_mismatch": "error",
233 | "unresolved_variable": "error",
234 | "wire_dangling": "error"
235 | }
236 | },
237 | "libraries": {
238 | "pinned_footprint_libs": [],
239 | "pinned_symbol_libs": []
240 | },
241 | "meta": {
242 | "filename": "STM32DemoBoard.kicad_pro",
243 | "version": 1
244 | },
245 | "net_settings": {
246 | "classes": [
247 | {
248 | "bus_width": 12.0,
249 | "clearance": 0.2,
250 | "diff_pair_gap": 0.25,
251 | "diff_pair_via_gap": 0.25,
252 | "diff_pair_width": 0.2,
253 | "line_style": 0,
254 | "microvia_diameter": 0.3,
255 | "microvia_drill": 0.1,
256 | "name": "Default",
257 | "pcb_color": "rgba(0, 0, 0, 0.000)",
258 | "schematic_color": "rgba(0, 0, 0, 0.000)",
259 | "track_width": 0.25,
260 | "via_diameter": 0.8,
261 | "via_drill": 0.4,
262 | "wire_width": 6.0
263 | }
264 | ],
265 | "meta": {
266 | "version": 2
267 | },
268 | "net_colors": null
269 | },
270 | "pcbnew": {
271 | "last_paths": {
272 | "gencad": "",
273 | "idf": "",
274 | "netlist": "",
275 | "specctra_dsn": "",
276 | "step": "",
277 | "vrml": ""
278 | },
279 | "page_layout_descr_file": ""
280 | },
281 | "schematic": {
282 | "annotate_start_num": 0,
283 | "drawing": {
284 | "default_line_thickness": 6.0,
285 | "default_text_size": 50.0,
286 | "field_names": [],
287 | "intersheets_ref_own_page": false,
288 | "intersheets_ref_prefix": "",
289 | "intersheets_ref_short": false,
290 | "intersheets_ref_show": false,
291 | "intersheets_ref_suffix": "",
292 | "junction_size_choice": 3,
293 | "label_size_ratio": 0.375,
294 | "pin_symbol_size": 25.0,
295 | "text_offset_ratio": 0.15
296 | },
297 | "legacy_lib_dir": "",
298 | "legacy_lib_list": [],
299 | "meta": {
300 | "version": 1
301 | },
302 | "net_format_name": "",
303 | "ngspice": {
304 | "fix_include_paths": true,
305 | "fix_passive_vals": false,
306 | "meta": {
307 | "version": 0
308 | },
309 | "model_mode": 0,
310 | "workbook_filename": ""
311 | },
312 | "page_layout_descr_file": "",
313 | "plot_directory": "",
314 | "spice_adjust_passive_values": false,
315 | "spice_external_command": "spice \"%I\"",
316 | "subpart_first_id": 65,
317 | "subpart_id_separator": 0
318 | },
319 | "sheets": [
320 | [
321 | "f12fa982-e6c5-423e-a7d8-12d255dc9929",
322 | ""
323 | ]
324 | ],
325 | "text_variables": {}
326 | }
327 |
--------------------------------------------------------------------------------
/1.Hardware/STM32DemoBoard/STM32DemoBoard_Library.kicad_sym:
--------------------------------------------------------------------------------
1 | (kicad_symbol_lib (version 20211014) (generator kicad_symbol_editor)
2 | (symbol "CH552G" (in_bom yes) (on_board yes)
3 | (property "Reference" "U" (id 0) (at 0 -15.5448 0)
4 | (effects (font (size 1.27 1.27)))
5 | )
6 | (property "Value" "CH552G" (id 1) (at 0 -13.0048 0)
7 | (effects (font (size 1.27 1.27)))
8 | )
9 | (property "Footprint" "Package_SO:SOP-16_3.9x9.9mm_P1.27mm" (id 2) (at 1.27 12.7 0)
10 | (effects (font (size 1.27 1.27)) hide)
11 | )
12 | (property "Datasheet" "" (id 3) (at 7.62 -11.43 0)
13 | (effects (font (size 1.27 1.27)) hide)
14 | )
15 | (symbol "CH552G_0_1"
16 | (rectangle (start -12.7 10.16) (end 12.7 -10.16)
17 | (stroke (width 0.254) (type default) (color 0 0 0 0))
18 | (fill (type background))
19 | )
20 | )
21 | (symbol "CH552G_1_1"
22 | (pin bidirectional line (at -15.24 8.89 0) (length 2.54)
23 | (name "P3.2" (effects (font (size 1.27 1.27))))
24 | (number "1" (effects (font (size 1.27 1.27))))
25 | )
26 | (pin bidirectional line (at 15.24 -6.35 180) (length 2.54)
27 | (name "P3.3" (effects (font (size 1.27 1.27))))
28 | (number "10" (effects (font (size 1.27 1.27))))
29 | )
30 | (pin bidirectional line (at 15.24 -3.81 180) (length 2.54)
31 | (name "P3.4" (effects (font (size 1.27 1.27))))
32 | (number "11" (effects (font (size 1.27 1.27))))
33 | )
34 | (pin bidirectional line (at 15.24 -1.27 180) (length 2.54)
35 | (name "P3.6" (effects (font (size 1.27 1.27))))
36 | (number "12" (effects (font (size 1.27 1.27))))
37 | )
38 | (pin bidirectional line (at 15.24 1.27 180) (length 2.54)
39 | (name "P3.7" (effects (font (size 1.27 1.27))))
40 | (number "13" (effects (font (size 1.27 1.27))))
41 | )
42 | (pin power_in line (at 15.24 3.81 180) (length 2.54)
43 | (name "GND" (effects (font (size 1.27 1.27))))
44 | (number "14" (effects (font (size 1.27 1.27))))
45 | )
46 | (pin power_in line (at 15.24 6.35 180) (length 2.54)
47 | (name "VCC" (effects (font (size 1.27 1.27))))
48 | (number "15" (effects (font (size 1.27 1.27))))
49 | )
50 | (pin passive line (at 15.24 8.89 180) (length 2.54)
51 | (name "V33" (effects (font (size 1.27 1.27))))
52 | (number "16" (effects (font (size 1.27 1.27))))
53 | )
54 | (pin bidirectional line (at -15.24 6.35 0) (length 2.54)
55 | (name "P1.4" (effects (font (size 1.27 1.27))))
56 | (number "2" (effects (font (size 1.27 1.27))))
57 | )
58 | (pin bidirectional line (at -15.24 3.81 0) (length 2.54)
59 | (name "P1.5" (effects (font (size 1.27 1.27))))
60 | (number "3" (effects (font (size 1.27 1.27))))
61 | )
62 | (pin bidirectional line (at -15.24 1.27 0) (length 2.54)
63 | (name "P1.6" (effects (font (size 1.27 1.27))))
64 | (number "4" (effects (font (size 1.27 1.27))))
65 | )
66 | (pin bidirectional line (at -15.24 -1.27 0) (length 2.54)
67 | (name "P1.7" (effects (font (size 1.27 1.27))))
68 | (number "5" (effects (font (size 1.27 1.27))))
69 | )
70 | (pin output line (at -15.24 -3.81 0) (length 2.54)
71 | (name "RST" (effects (font (size 1.27 1.27))))
72 | (number "6" (effects (font (size 1.27 1.27))))
73 | )
74 | (pin bidirectional line (at -15.24 -6.35 0) (length 2.54)
75 | (name "P3.1" (effects (font (size 1.27 1.27))))
76 | (number "7" (effects (font (size 1.27 1.27))))
77 | )
78 | (pin bidirectional line (at -15.24 -8.89 0) (length 2.54)
79 | (name "P3.0" (effects (font (size 1.27 1.27))))
80 | (number "8" (effects (font (size 1.27 1.27))))
81 | )
82 | (pin bidirectional line (at 15.24 -8.89 180) (length 2.54)
83 | (name "P1.1" (effects (font (size 1.27 1.27))))
84 | (number "9" (effects (font (size 1.27 1.27))))
85 | )
86 | )
87 | )
88 | )
89 |
--------------------------------------------------------------------------------
/1.Hardware/STM32DemoBoard/sym-lib-table:
--------------------------------------------------------------------------------
1 | (sym_lib_table
2 | (lib (name "STM32DemoBoard_Library")(type "KiCad")(uri "${KIPRJMOD}/STM32DemoBoard_Library.kicad_sym")(options "")(descr ""))
3 | )
4 |
--------------------------------------------------------------------------------
/2.Firmware/KEIL/CH55x_DAPLink.uvopt:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | 1.0
5 |
6 | ### uVision Project, (C) Keil Software
7 |
8 |
9 | *.c
10 | *.s*; *.src; *.a*
11 | *.obj; *.o
12 | *.lib
13 | *.txt; *.h; *.inc; *.md
14 | *.plm
15 | *.cpp; *.cc; *.cxx
16 | 0
17 |
18 |
19 |
20 | 0
21 | 0
22 |
23 |
24 |
25 | Target 1
26 | 0x0
27 | MCS-51
28 |
29 | 24000000
30 |
31 | 1
32 | 1
33 | 1
34 | 0
35 | 0
36 |
37 |
38 | 0
39 | 65535
40 | 0
41 | 0
42 | 0
43 |
44 |
45 | 120
46 | 65
47 | 8
48 | .\Listings\
49 |
50 |
51 | 1
52 | 1
53 | 1
54 | 0
55 | 1
56 | 1
57 | 0
58 | 1
59 | 1
60 | 0
61 | 0
62 | 0
63 |
64 |
65 | 1
66 | 1
67 | 1
68 | 1
69 | 1
70 | 1
71 | 1
72 | 0
73 | 0
74 |
75 |
76 | 1
77 | 0
78 | 1
79 |
80 | 0
81 |
82 | 1
83 | 0
84 | 1
85 | 1
86 | 1
87 | 1
88 | 1
89 | 1
90 | 1
91 | 1
92 | 0
93 | 1
94 | 1
95 | 1
96 | 0
97 | 1
98 | 1
99 | 1
100 | 1
101 | 0
102 | 0
103 | 1
104 | 0
105 | 0
106 | -1
107 |
108 |
109 |
110 |
111 |
112 |
113 |
114 |
115 |
116 |
117 |
118 |
119 |
120 |
121 | 0
122 | DLGDP51
123 | (98=-1,-1,-1,-1,0)(82=-1,-1,-1,-1,0)(83=-1,-1,-1,-1,0)(84=-1,-1,-1,-1,0)(85=-1,-1,-1,-1,0)(99=-1,-1,-1,-1,0)(91=-1,-1,-1,-1,0)(92=-1,-1,-1,-1,0)(5067=-1,-1,-1,-1,0)
124 |
125 |
126 | 0
127 | DLGTP51
128 | (98=-1,-1,-1,-1,0)(82=-1,-1,-1,-1,0)(83=-1,-1,-1,-1,0)(84=-1,-1,-1,-1,0)(85=-1,-1,-1,-1,0)(80=-1,-1,-1,-1,0)(91=-1,-1,-1,-1,0)(92=-1,-1,-1,-1,0)
129 |
130 |
131 | 0
132 | CH55xISP
133 | -S1 -B115200 -O3072
134 |
135 |
136 |
137 |
138 |
139 | 1
140 | 0
141 | D:0x66
142 | 0
143 |
144 |
145 |
146 |
147 | 2
148 | 0
149 | X:0x010C
150 | 0
151 |
152 |
153 |
154 | 0
155 |
156 |
157 | 0
158 | 1
159 | 1
160 | 0
161 | 0
162 | 0
163 | 0
164 | 1
165 | 0
166 | 0
167 | 0
168 | 0
169 | 0
170 | 0
171 | 0
172 | 0
173 | 0
174 | 0
175 | 0
176 | 0
177 | 0
178 | 0
179 | 0
180 | 0
181 |
182 |
183 |
184 | 0
185 | 0
186 | 0
187 |
188 |
189 |
190 |
191 |
192 |
193 |
194 |
195 |
196 |
197 |
198 |
199 | Source Group 1
200 | 1
201 | 0
202 | 0
203 | 0
204 |
205 | 1
206 | 1
207 | 1
208 | 0
209 | 0
210 | 0
211 | ..\SRC\DAP.c
212 | DAP.c
213 | 0
214 | 0
215 |
216 |
217 | 1
218 | 2
219 | 1
220 | 0
221 | 0
222 | 0
223 | ..\SRC\Debug.C
224 | Debug.C
225 | 0
226 | 0
227 |
228 |
229 | 1
230 | 3
231 | 1
232 | 0
233 | 0
234 | 0
235 | ..\SRC\SW_DP.c
236 | SW_DP.c
237 | 0
238 | 0
239 |
240 |
241 | 1
242 | 4
243 | 1
244 | 0
245 | 0
246 | 0
247 | ..\SRC\Uart.c
248 | Uart.c
249 | 0
250 | 0
251 |
252 |
253 | 1
254 | 5
255 | 1
256 | 0
257 | 0
258 | 0
259 | ..\SRC\AT.c
260 | AT.c
261 | 0
262 | 0
263 |
264 |
265 | 1
266 | 6
267 | 1
268 | 0
269 | 0
270 | 0
271 | ..\SRC\TouchKey.C
272 | TouchKey.C
273 | 0
274 | 0
275 |
276 |
277 | 1
278 | 7
279 | 1
280 | 0
281 | 0
282 | 0
283 | ..\SRC\Keyboard.c
284 | Keyboard.c
285 | 0
286 | 0
287 |
288 |
289 | 1
290 | 8
291 | 1
292 | 0
293 | 0
294 | 0
295 | ..\SRC\DataFlash.C
296 | DataFlash.C
297 | 0
298 | 0
299 |
300 |
301 | 1
302 | 9
303 | 2
304 | 0
305 | 0
306 | 0
307 | ..\SRC\FastWrite.a51
308 | FastWrite.a51
309 | 0
310 | 0
311 |
312 |
313 | 1
314 | 10
315 | 1
316 | 0
317 | 0
318 | 0
319 | ..\SRC\main.c
320 | main.c
321 | 0
322 | 0
323 |
324 |
325 | 1
326 | 11
327 | 1
328 | 0
329 | 0
330 | 0
331 | ..\SRC\Usb.C
332 | Usb.C
333 | 0
334 | 0
335 |
336 |
337 |
338 |
339 |
--------------------------------------------------------------------------------
/2.Firmware/KEIL/CH55x_DAPLink.uvproj:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 | 1.1
5 |
6 | ### uVision Project, (C) Keil Software
7 |
8 |
9 |
10 | Target 1
11 | 0x0
12 | MCS-51
13 | 0
14 |
15 |
16 | CH552
17 | WCH
18 | IRAM(0-0xFF) XRAM(0-0x3FF) IROM(0-0x3FFF) CLOCK(24000000)
19 |
20 | "LIB\STARTUP.A51" ("Standard 8051 Startup Code")
21 |
22 | 0
23 | CH552.H
24 |
25 |
26 |
27 |
28 |
29 |
30 |
31 |
32 |
33 |
34 | 0
35 | 0
36 |
37 |
38 |
39 | WCH\
40 | WCH\
41 |
42 | 0
43 | 0
44 | 0
45 | 0
46 | 1
47 |
48 | .\Objects\
49 | CH55x_DAPLink
50 | 1
51 | 0
52 | 1
53 | 1
54 | 1
55 | .\Listings\
56 | 0
57 | 0
58 | 0
59 |
60 | 0
61 | 0
62 |
63 |
64 | 0
65 | 0
66 | 0
67 | 0
68 |
69 |
70 | 0
71 | 0
72 |
73 |
74 | 0
75 | 0
76 | 0
77 | 0
78 |
79 |
80 | 0
81 | 0
82 |
83 |
84 | 0
85 | 0
86 | 0
87 | 0
88 |
89 | 0
90 |
91 |
92 |
93 | 0
94 | 0
95 | 0
96 | 0
97 | 0
98 | 1
99 | 0
100 | 0
101 | 0
102 | 0
103 | 3
104 |
105 |
106 | 1
107 | 65535
108 |
109 |
110 | S8051.DLL
111 |
112 | DP51.DLL
113 | -pDR8051
114 | S8051.DLL
115 |
116 | TP51.DLL
117 | -p51
118 |
119 |
120 |
121 | 0
122 | 0
123 | 0
124 | 0
125 | 16
126 |
127 |
128 | 1
129 | 1
130 | 1
131 | 1
132 | 1
133 | 1
134 | 1
135 | 1
136 | 0
137 | 1
138 |
139 |
140 | 0
141 | 1
142 | 0
143 | 1
144 | 1
145 | 1
146 | 0
147 | 1
148 | 1
149 | 1
150 |
151 | 0
152 | -1
153 |
154 |
155 |
156 |
157 |
158 |
159 |
160 |
161 |
162 |
163 |
164 |
165 |
166 |
167 |
168 |
169 |
170 |
171 | 1
172 | 0
173 | 0
174 | 0
175 | 0
176 | -1
177 |
178 | 1
179 |
180 | "" ()
181 |
182 |
183 |
184 |
185 | 0
186 |
187 |
188 |
189 | 0
190 | 0
191 | 1
192 | 0
193 | 0
194 | 0
195 | 0
196 | 0
197 | 0
198 | 1
199 | 1
200 | 1
201 | 0
202 | 0
203 | 0
204 | 0
205 | 0
206 | 0
207 | 0
208 | 0
209 | 0
210 | 0
211 | 0
212 | 0
213 | 0
214 | 0
215 | 0
216 | 0
217 | 0
218 | 0
219 | 0
220 | 0
221 | 0
222 | 0
223 | 0
224 | 0
225 | 0
226 | 0
227 | 0
228 | 0
229 | 0
230 | 0
231 | 0
232 |
233 |
234 | 0
235 | 0x0
236 | 0xffff
237 |
238 |
239 | 0
240 | 0x0
241 | 0x0
242 |
243 |
244 | 0
245 | 0x0
246 | 0x0
247 |
248 |
249 | 0
250 | 0x0
251 | 0x0
252 |
253 |
254 | 0
255 | 0x0
256 | 0x0
257 |
258 |
259 | 0
260 | 0x0
261 | 0x0
262 |
263 |
264 | 0
265 | 0x0
266 | 0x0
267 |
268 |
269 | 0
270 | 0x0
271 | 0x0
272 |
273 |
274 | 1
275 | 0x0
276 | 0x4000
277 |
278 |
279 | 0
280 | 0x0
281 | 0x100
282 |
283 |
284 | 0
285 | 0x0
286 | 0x400
287 |
288 |
289 | 0
290 | 0x0
291 | 0x0
292 |
293 |
294 | 0
295 | 0x0
296 | 0x0
297 |
298 |
299 | 0
300 | 0x0
301 | 0x0
302 |
303 |
304 | 0
305 | 0x0
306 | 0x0
307 |
308 |
309 |
310 |
311 | 1
312 | 0
313 | 1
314 | 0
315 | 1
316 | 3
317 | 8
318 | 2
319 | 1
320 | 1
321 | 0
322 | 0
323 |
324 |
325 |
326 |
327 |
328 |
329 |
330 |
331 | 0
332 | 1
333 | 0
334 | 0
335 |
336 |
337 |
338 |
339 |
340 |
341 |
342 |
343 | 0
344 | 0
345 | 1
346 | 0
347 | 2
348 | 1
349 |
350 |
351 |
352 |
353 |
354 |
355 |
356 |
357 |
358 |
359 |
360 |
361 |
362 |
363 |
364 |
365 |
366 |
367 |
368 |
369 |
370 |
371 |
372 |
373 |
374 |
375 |
376 |
377 | Source Group 1
378 |
379 |
380 | DAP.c
381 | 1
382 | ..\SRC\DAP.c
383 |
384 |
385 | Debug.C
386 | 1
387 | ..\SRC\Debug.C
388 |
389 |
390 | SW_DP.c
391 | 1
392 | ..\SRC\SW_DP.c
393 |
394 |
395 | Uart.c
396 | 1
397 | ..\SRC\Uart.c
398 |
399 |
400 | AT.c
401 | 1
402 | ..\SRC\AT.c
403 |
404 |
405 | TouchKey.C
406 | 1
407 | ..\SRC\TouchKey.C
408 |
409 |
410 | Keyboard.c
411 | 1
412 | ..\SRC\Keyboard.c
413 |
414 |
415 | DataFlash.C
416 | 1
417 | ..\SRC\DataFlash.C
418 |
419 |
420 | FastWrite.a51
421 | 2
422 | ..\SRC\FastWrite.a51
423 |
424 |
425 | 2
426 | 0
427 | 0
428 | 0
429 | 0
430 | 2
431 | 2
432 | 2
433 | 2
434 | 2
435 | 11
436 |
437 |
438 | 1
439 | 65535
440 |
441 |
442 |
443 | 2
444 | 2
445 | 2
446 | 0
447 |
448 |
449 |
450 |
451 |
452 |
453 |
454 |
455 |
456 |
457 |
458 | main.c
459 | 1
460 | ..\SRC\main.c
461 |
462 |
463 | Usb.C
464 | 1
465 | ..\SRC\Usb.C
466 |
467 |
468 |
469 |
470 |
471 |
472 |
473 |
474 |
--------------------------------------------------------------------------------
/2.Firmware/KEIL/STARTUP.A51:
--------------------------------------------------------------------------------
1 | $NOMOD51
2 | ;------------------------------------------------------------------------------
3 | ; This file is part of the C51 Compiler package
4 | ; Copyright (c) 1988-2005 Keil Elektronik GmbH and Keil Software, Inc.
5 | ; Version 8.01
6 | ;
7 | ; *** <<< Use Configuration Wizard in Context Menu >>> ***
8 | ;------------------------------------------------------------------------------
9 | ; STARTUP.A51: This code is executed after processor reset.
10 | ;
11 | ; To translate this file use A51 with the following invocation:
12 | ;
13 | ; A51 STARTUP.A51
14 | ;
15 | ; To link the modified STARTUP.OBJ file to your application use the following
16 | ; Lx51 invocation:
17 | ;
18 | ; Lx51 your object file list, STARTUP.OBJ controls
19 | ;
20 | ;------------------------------------------------------------------------------
21 | ;
22 | ; User-defined Power-On Initialization of Memory
23 | ;
24 | ; With the following EQU statements the initialization of memory
25 | ; at processor reset can be defined:
26 | ;
27 | ; IDATALEN: IDATA memory size <0x0-0x100>
28 | ; Note: The absolute start-address of IDATA memory is always 0
29 | ; The IDATA space overlaps physically the DATA and BIT areas.
30 | IDATALEN EQU 80H
31 | ;
32 | ; XDATASTART: XDATA memory start address <0x0-0xFFFF>
33 | ; The absolute start address of XDATA memory
34 | XDATASTART EQU 0
35 | ;
36 | ; XDATALEN: XDATA memory size <0x0-0xFFFF>
37 | ; The length of XDATA memory in bytes.
38 | XDATALEN EQU 0
39 | ;
40 | ; PDATASTART: PDATA memory start address <0x0-0xFFFF>
41 | ; The absolute start address of PDATA memory
42 | PDATASTART EQU 0H
43 | ;
44 | ; PDATALEN: PDATA memory size <0x0-0xFF>
45 | ; The length of PDATA memory in bytes.
46 | PDATALEN EQU 0H
47 | ;
48 | ;
49 | ;------------------------------------------------------------------------------
50 | ;
51 | ; Reentrant Stack Initialization
52 | ;
53 | ; The following EQU statements define the stack pointer for reentrant
54 | ; functions and initialized it:
55 | ;
56 | ; Stack Space for reentrant functions in the SMALL model.
57 | ; IBPSTACK: Enable SMALL model reentrant stack
58 | ; Stack space for reentrant functions in the SMALL model.
59 | IBPSTACK EQU 0 ; set to 1 if small reentrant is used.
60 | ; IBPSTACKTOP: End address of SMALL model stack <0x0-0xFF>
61 | ; Set the top of the stack to the highest location.
62 | IBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1
63 | ;
64 | ;
65 | ; Stack Space for reentrant functions in the LARGE model.
66 | ; XBPSTACK: Enable LARGE model reentrant stack
67 | ; Stack space for reentrant functions in the LARGE model.
68 | XBPSTACK EQU 0 ; set to 1 if large reentrant is used.
69 | ; XBPSTACKTOP: End address of LARGE model stack <0x0-0xFFFF>
70 | ; Set the top of the stack to the highest location.
71 | XBPSTACKTOP EQU 0xFFFF +1 ; default 0FFFFH+1
72 | ;
73 | ;
74 | ; Stack Space for reentrant functions in the COMPACT model.
75 | ; PBPSTACK: Enable COMPACT model reentrant stack
76 | ; Stack space for reentrant functions in the COMPACT model.
77 | PBPSTACK EQU 0 ; set to 1 if compact reentrant is used.
78 | ;
79 | ; PBPSTACKTOP: End address of COMPACT model stack <0x0-0xFFFF>
80 | ; Set the top of the stack to the highest location.
81 | PBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1
82 | ;
83 | ;
84 | ;------------------------------------------------------------------------------
85 | ;
86 | ; Memory Page for Using the Compact Model with 64 KByte xdata RAM
87 | ; Compact Model Page Definition
88 | ;
89 | ; Define the XDATA page used for PDATA variables.
90 | ; PPAGE must conform with the PPAGE set in the linker invocation.
91 | ;
92 | ; Enable pdata memory page initalization
93 | PPAGEENABLE EQU 0 ; set to 1 if pdata object are used.
94 | ;
95 | ; PPAGE number <0x0-0xFF>
96 | ; uppermost 256-byte address of the page used for PDATA variables.
97 | PPAGE EQU 0
98 | ;
99 | ; SFR address which supplies uppermost address byte <0x0-0xFF>
100 | ; most 8051 variants use P2 as uppermost address byte
101 | PPAGE_SFR DATA 0A0H
102 | ;
103 | ;
104 | ;------------------------------------------------------------------------------
105 |
106 | ; Standard SFR Symbols
107 | ACC DATA 0E0H
108 | B DATA 0F0H
109 | SP DATA 81H
110 | DPL DATA 82H
111 | DPH DATA 83H
112 |
113 | NAME ?C_STARTUP
114 |
115 |
116 | ?C_C51STARTUP SEGMENT CODE
117 | ?STACK SEGMENT IDATA
118 |
119 | RSEG ?STACK
120 | DS 1
121 |
122 | EXTRN CODE (?C_START)
123 | PUBLIC ?C_STARTUP
124 |
125 | CSEG AT 0
126 | ?C_STARTUP: LJMP STARTUP1
127 |
128 | RSEG ?C_C51STARTUP
129 |
130 | STARTUP1:
131 |
132 | IF IDATALEN <> 0
133 | MOV R0,#IDATALEN - 1
134 | CLR A
135 | IDATALOOP: MOV @R0,A
136 | DJNZ R0,IDATALOOP
137 | ENDIF
138 |
139 | IF XDATALEN <> 0
140 | MOV DPTR,#XDATASTART
141 | MOV R7,#LOW (XDATALEN)
142 | IF (LOW (XDATALEN)) <> 0
143 | MOV R6,#(HIGH (XDATALEN)) +1
144 | ELSE
145 | MOV R6,#HIGH (XDATALEN)
146 | ENDIF
147 | CLR A
148 | XDATALOOP: MOVX @DPTR,A
149 | INC DPTR
150 | DJNZ R7,XDATALOOP
151 | DJNZ R6,XDATALOOP
152 | ENDIF
153 |
154 | IF PPAGEENABLE <> 0
155 | MOV PPAGE_SFR,#PPAGE
156 | ENDIF
157 |
158 | IF PDATALEN <> 0
159 | MOV R0,#LOW (PDATASTART)
160 | MOV R7,#LOW (PDATALEN)
161 | CLR A
162 | PDATALOOP: MOVX @R0,A
163 | INC R0
164 | DJNZ R7,PDATALOOP
165 | ENDIF
166 |
167 | IF IBPSTACK <> 0
168 | EXTRN DATA (?C_IBP)
169 |
170 | MOV ?C_IBP,#LOW IBPSTACKTOP
171 | ENDIF
172 |
173 | IF XBPSTACK <> 0
174 | EXTRN DATA (?C_XBP)
175 |
176 | MOV ?C_XBP,#HIGH XBPSTACKTOP
177 | MOV ?C_XBP+1,#LOW XBPSTACKTOP
178 | ENDIF
179 |
180 | IF PBPSTACK <> 0
181 | EXTRN DATA (?C_PBP)
182 | MOV ?C_PBP,#LOW PBPSTACKTOP
183 | ENDIF
184 |
185 | MOV SP,#?STACK-1
186 |
187 | ; This code is required if you use L51_BANK.A51 with Banking Mode 4
188 | ; Code Banking
189 | ; Select Bank 0 for L51_BANK.A51 Mode 4
190 | #if 0
191 | ; Initialize bank mechanism to code bank 0 when using L51_BANK.A51 with Banking Mode 4.
192 | EXTRN CODE (?B_SWITCH0)
193 | CALL ?B_SWITCH0 ; init bank mechanism to code bank 0
194 | #endif
195 | ;
196 | LJMP ?C_START
197 |
198 | END
199 |
--------------------------------------------------------------------------------
/2.Firmware/SRC/AT.c:
--------------------------------------------------------------------------------
1 | /**
2 | * @author Chi Zhang
3 | * @date 2023/1/13
4 | */
5 |
6 | #include "AT.h"
7 |
8 | #include "Uart.h"
9 | #include "TouchKey.H"
10 | #include "DataFlash.H"
11 | #include "Keyboard.h"
12 |
13 | #include
14 |
15 | #pragma RB(1)
16 |
17 | BOOL TO_IAP = 0;
18 |
19 | void CDC_Print(char * targetString){
20 | char * str;
21 | if (!Uart_RxDealingWhich){
22 | str = Uart_RxBuff0;
23 | }else{
24 | str = Uart_RxBuff1;
25 | }
26 |
27 | strcpy(str,targetString);
28 |
29 | UEP1_T_LEN = strlen(targetString);
30 | UEP1_CTRL = UEP1_CTRL & ~ MASK_UEP_T_RES | UEP_T_RES_ACK;
31 | Uart_RxDealingWhich = ~Uart_RxDealingWhich;
32 | }
33 |
34 | UINT8 AT_Process(char xdata * Uart_TxBuff){
35 | if(!strncmp("DAT+",Uart_TxBuff,4)){
36 | Uart_TxBuff += 4;
37 | if(!strncmp("RST",&Uart_TxBuff[0],3)){
38 | EA = 0;
39 | SAFE_MOD = 0x55;
40 | SAFE_MOD = 0xAA;
41 | GLOBAL_CFG |= bSW_RESET;
42 |
43 | }else if(!strncmp("IAP",&Uart_TxBuff[0],3)){
44 | TO_IAP = 1;
45 |
46 | }else if(!strncmp("CHIP_ID",&Uart_TxBuff[0],7)){
47 | char * str;
48 | if (!Uart_RxDealingWhich){
49 | str = Uart_RxBuff0;
50 | }else{
51 | str = Uart_RxBuff1;
52 | }
53 |
54 | HEX_TO_ASCII(str[0],*(UINT8C *)(0x3FFC)/16);
55 | HEX_TO_ASCII(str[1],*(UINT8C *)(0x3FFC)%16);
56 | HEX_TO_ASCII(str[2],*(UINT8C *)(0x3FFD)/16);
57 | HEX_TO_ASCII(str[3],*(UINT8C *)(0x3FFD)%16);
58 |
59 | HEX_TO_ASCII(str[4],*(UINT8C *)(0x3FFE)/16);
60 | HEX_TO_ASCII(str[5],*(UINT8C *)(0x3FFE)%16);
61 | HEX_TO_ASCII(str[6],*(UINT8C *)(0x3FFF)/16);
62 | HEX_TO_ASCII(str[7],*(UINT8C *)(0x3FFF)%16);
63 |
64 | UEP1_T_LEN = 8;
65 | UEP1_CTRL = UEP1_CTRL & ~ MASK_UEP_T_RES | UEP_T_RES_ACK;
66 | Uart_RxDealingWhich = ~Uart_RxDealingWhich;
67 | }else if(!strncmp("KEY=",&Uart_TxBuff[0],4)){
68 | UINT8 x;
69 | ASCII_TO_HEX(x,&Uart_TxBuff[4]);
70 | TargetKey = x;
71 | Keyboard_FlashFlag = 1;
72 | }else if(!strncmp("KEY?",&Uart_TxBuff[0],4)){
73 | UINT8 str[5] = {0};
74 | HEX_TO_ASCII(str[0],TargetKey/16);
75 | HEX_TO_ASCII(str[1],TargetKey%16);
76 | str[2] = '\n';
77 | str[3] = '\r';
78 | CDC_Print(str);
79 | }else if(!strncmp("AUTHOR",&Uart_TxBuff[0],6)){
80 | CDC_Print("GitHub:abgelehnt/Tiny-DAPLink\n\r");
81 | }else if(!strncmp("KEY_VALUE",&Uart_TxBuff[0],9)){
82 | UINT8 str[13] = {0};
83 | HEX_TO_ASCII(str[0],Key_FreeBuf/16/16/16);
84 | HEX_TO_ASCII(str[1],Key_FreeBuf/16/16%16);
85 | HEX_TO_ASCII(str[2],Key_FreeBuf/16%16);
86 | HEX_TO_ASCII(str[3],Key_FreeBuf%16);
87 | str[4] = ':';
88 | HEX_TO_ASCII(str[5],Key_DataBuf/16/16/16);
89 | HEX_TO_ASCII(str[6],Key_DataBuf/16/16%16);
90 | HEX_TO_ASCII(str[7],Key_DataBuf/16%16);
91 | HEX_TO_ASCII(str[8],Key_DataBuf%16);
92 | str[9] = ':';
93 | HEX_TO_ASCII(str[10],0);
94 | str[11] = '\n';
95 | str[12] = '\0';
96 | CDC_Print(str);
97 | }else if(!strncmp("KEY_FLASH",&Uart_TxBuff[0],9)){
98 | TK_FlashFreeFlag = 1;
99 | }
100 | return 1;
101 | }
102 | return 0;
103 | }
--------------------------------------------------------------------------------
/2.Firmware/SRC/AT.h:
--------------------------------------------------------------------------------
1 | /**
2 | * @author Chi Zhang
3 | * @date 2023/1/13
4 | */
5 |
6 | #ifndef _AT_H
7 | #define _AT_H
8 |
9 | #include "CH552.H"
10 |
11 | extern BOOL TO_IAP;
12 |
13 | #define HEX_TO_ASCII(target,x) if((x)<10){(target)=(x)+'0';}else{(target)=(x)+'A'-10;}
14 | #define ASCII_TO_HEX(target,x) if((x)[0]>='0' && (x)[0] <= '9'){target = ((x)[0]-'0')*16;} \
15 | else{target = ((x)[0]-'A'+10)*16;} \
16 | if((x)[1]>='0' && (x)[1] <= '9'){target += (x)[1]-'0';} \
17 | else{target += (x)[1]-'A'+10;}
18 |
19 | UINT8 AT_Process(UINT8 xdata * Uart_TxBuff);
20 |
21 | #endif //_AT_H
22 |
--------------------------------------------------------------------------------
/2.Firmware/SRC/CH552.H:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/abgelehnt/Tiny-DAPLink/03b467e6eddbe9adfbdd9a63097d21b422037495/2.Firmware/SRC/CH552.H
--------------------------------------------------------------------------------
/2.Firmware/SRC/DAP.c:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | *
6 | * Licensed under the Apache License, Version 2.0 (the License); you may
7 | * not use this file except in compliance with the License.
8 | * You may obtain a copy of the License at
9 | *
10 | * www.apache.org/licenses/LICENSE-2.0
11 | *
12 | * Unless required by applicable law or agreed to in writing, software
13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 | * See the License for the specific language governing permissions and
16 | * limitations under the License.
17 | *
18 | * ----------------------------------------------------------------------
19 | *
20 | * $Date: 1. December 2017
21 | * $Revision: V2.0.0
22 | *
23 | * Project: CMSIS-DAP Source
24 | * Title: DAP.c CMSIS-DAP Commands
25 | *
26 | *---------------------------------------------------------------------------*/
27 |
28 | #include "DAP.h"
29 |
30 | #include "FastWrite.h"
31 |
32 | // Get DAP Information
33 | // id: info identifier
34 | // info: pointer to info datas
35 | // return: number of bytes in info datas
36 | static UINT8I DAP_Info(UINT8 id, UINT8 *info)
37 | {
38 | UINT8I length = 0U;
39 |
40 | switch (id)
41 | {
42 | case DAP_ID_VENDOR:
43 | length = 0;
44 | break;
45 | case DAP_ID_PRODUCT:
46 | length = 0;
47 | break;
48 | case DAP_ID_SER_NUM:
49 | length = 0;
50 | break;
51 | case DAP_ID_FW_VER:
52 | length = (UINT8)sizeof(DAP_FW_VER);
53 | memcpy(info, DAP_FW_VER, length);
54 | break;
55 | case DAP_ID_DEVICE_VENDOR:
56 |
57 | break;
58 | case DAP_ID_DEVICE_NAME:
59 |
60 | break;
61 | case DAP_ID_CAPABILITIES:
62 | info[0] = DAP_PORT_SWD;
63 | length = 1U;
64 | break;
65 | case DAP_ID_TIMESTAMP_CLOCK:
66 |
67 | break;
68 | case DAP_ID_SWO_BUFFER_SIZE:
69 |
70 | break;
71 | case DAP_ID_PACKET_SIZE:
72 | info[0] = (UINT8)(DAP_PACKET_SIZE >> 0);
73 | info[1] = (UINT8)(DAP_PACKET_SIZE >> 8);
74 | length = 2U;
75 | break;
76 | case DAP_ID_PACKET_COUNT:
77 | info[0] = DAP_PACKET_COUNT;
78 | length = 1U;
79 | break;
80 | default:
81 | break;
82 | }
83 |
84 | return (length);
85 | }
86 |
87 | // Process Delay command and prepare response
88 | // request: pointer to request datas
89 | // response: pointer to response datas
90 | // return: number of bytes in response (lower 16 bits)
91 | // number of bytes in request (upper 16 bits)
92 | static UINT8I DAP_Delay(const UINT8 xdata *req, UINT8 xdata *res)
93 | {
94 | UINT16I delay;
95 |
96 | delay = (UINT16)(*(req + 0)) |
97 | (UINT16)(*(req + 1) << 8);
98 |
99 | while (--delay)
100 | {
101 | };
102 |
103 | *res = DAP_OK;
104 | return 1;
105 | }
106 |
107 | // Process Host Status command and prepare response
108 | // request: pointer to request datas
109 | // response: pointer to response datas
110 | // return: number of bytes in response (lower 16 bits)
111 | // number of bytes in request (upper 16 bits)
112 | static UINT8I DAP_HostStatus(const UINT8 xdata *req, UINT8 xdata *res)
113 | {
114 |
115 | switch (*req)
116 | {
117 | case DAP_DEBUGGER_CONNECTED:
118 | DAP_LED_BUSY = ((*(req + 1) & 1U));
119 | break;
120 | case DAP_TARGET_RUNNING:
121 | DAP_LED_BUSY = ((*(req + 1) & 1U));
122 | break;
123 | default:
124 | *res = DAP_ERROR;
125 | return 1;
126 | }
127 |
128 | *res = DAP_OK;
129 | return 1;
130 | }
131 |
132 | // Process Connect command and prepare response
133 | // request: pointer to request datas
134 | // response: pointer to response datas
135 | // return: number of bytes in response (lower 16 bits)
136 | // number of bytes in request (upper 16 bits)
137 | UINT8I debug_port;
138 | static UINT8I DAP_Connect(const UINT8 xdata *req, UINT8 xdata *res)
139 | {
140 | UINT8I port;
141 |
142 | if (*req == DAP_PORT_AUTODETECT)
143 | {
144 | port = DAP_DEFAULT_PORT;
145 | }
146 | else
147 | {
148 | port = *req;
149 | }
150 |
151 | switch (port)
152 | {
153 | case DAP_PORT_SWD:
154 | debug_port = DAP_PORT_SWD;
155 | PORT_SWD_SETUP();
156 | break;
157 | default:
158 | port = DAP_PORT_DISABLED;
159 | break;
160 | }
161 |
162 | *res = (UINT8)port;
163 | return 1;
164 | }
165 |
166 | // Process Disconnect command and prepare response
167 | // response: pointer to response datas
168 | // return: number of bytes in response
169 | static UINT8I DAP_Disconnect(UINT8 *res)
170 | {
171 | debug_port = DAP_PORT_DISABLED;
172 | PORT_SWD_OFF();
173 | *res = DAP_OK;
174 | return (1U);
175 | }
176 |
177 | // Process Reset Target command and prepare response
178 | // response: pointer to response datas
179 | // return: number of bytes in response
180 | static UINT8I DAP_ResetTarget(UINT8 xdata *res)
181 | {
182 | SWD_ResetTarget_Soft();
183 | *(res + 1) = 0;
184 | *(res + 0) = DAP_OK;
185 | return 2;
186 | }
187 |
188 | // Process SWJ Pins command and prepare response
189 | // request: pointer to request datas
190 | // response: pointer to response datas
191 | // return: number of bytes in response (lower 16 bits)
192 | // number of bytes in request (upper 16 bits)
193 | static UINT8I DAP_SWJ_Pins(const UINT8 xdata *req, UINT8 xdata *res)
194 | {
195 | UINT8I value;
196 | UINT8I select;
197 | UINT16I wait;
198 |
199 | value = (UINT8I) * (req + 0);
200 | select = (UINT8I) * (req + 1);
201 | wait = (UINT16I)(*(req + 2) << 0) | (UINT16I)(*(req + 3) << 8);
202 | if ((UINT8I)(*(req + 4)) || (UINT8I)(*(req + 5)))
203 | wait |= 0x8000;
204 |
205 | if ((select & DAP_SWJ_SWCLK_TCK_BIT) != 0U)
206 | {
207 | if ((value & DAP_SWJ_SWCLK_TCK_BIT) != 0U)
208 | {
209 | SWK = 1;
210 | }
211 | else
212 | {
213 | SWK = 0;
214 | }
215 | }
216 | if ((select & DAP_SWJ_SWDIO_TMS_BIT) != 0U)
217 | {
218 | if ((value & DAP_SWJ_SWDIO_TMS_BIT) != 0U)
219 | {
220 | SWD = 1;
221 | }
222 | else
223 | {
224 | SWD = 0;
225 | }
226 | }
227 | if ((select & DAP_SWJ_nRESET_BIT) != 0U)
228 | {
229 | if ((value & DAP_SWJ_SWDIO_TMS_BIT) != 0U)
230 | {
231 | RST = 0;
232 | }
233 | else
234 | {
235 | SWD_ResetTarget_Soft();
236 | RST = 1;
237 | }
238 | // RST = value >> DAP_SWJ_nRESET;
239 | }
240 |
241 | // if (wait != 0U)
242 | // {
243 |
244 | // do
245 | // {
246 | // if ((select & DAP_SWJ_SWCLK_TCK_BIT) != 0U)
247 | // {
248 | // if ((value >> DAP_SWJ_SWCLK_TCK) ^ SWK)
249 | // {
250 | // continue;
251 | // }
252 | // }
253 | // if ((select & DAP_SWJ_SWDIO_TMS_BIT) != 0U)
254 | // {
255 | // if ((value >> DAP_SWJ_SWDIO_TMS) ^ SWD)
256 | // {
257 | // continue;
258 | // }
259 | // }
260 | // if ((select & DAP_SWJ_nRESET_BIT) != 0U)
261 | // {
262 | // //continue;
263 | //// if ((value >> DAP_SWJ_nRESET) ^ RST)
264 | //// {
265 | //// continue;
266 | //// }
267 | // }
268 | // break;
269 | // }
270 | // while (wait--);
271 | // }
272 |
273 | // value = ((UINT8I)SWK << DAP_SWJ_SWCLK_TCK) |
274 | // ((UINT8I)SWD << DAP_SWJ_SWDIO_TMS) |
275 | // (0 << DAP_SWJ_TDI) |
276 | // (0 << DAP_SWJ_TDO) |
277 | // (0 << DAP_SWJ_nTRST) |
278 | // ((UINT8I)RST << DAP_SWJ_nRESET);
279 | value = ((UINT8I)SWK << DAP_SWJ_SWCLK_TCK) |
280 | ((UINT8I)SWD << DAP_SWJ_SWDIO_TMS) |
281 | (0 << DAP_SWJ_TDI) |
282 | (0 << DAP_SWJ_TDO) |
283 | (0 << DAP_SWJ_nTRST) |
284 | (0 << DAP_SWJ_nRESET);
285 | if(RST == 0) value|=(1 << DAP_SWJ_nRESET);
286 |
287 | *res = (UINT8)value;
288 |
289 | return 1;
290 | }
291 |
292 | // Process SWJ Clock command and prepare response
293 | // request: pointer to request datas
294 | // response: pointer to response datas
295 | // return: number of bytes in response (lower 16 bits)
296 | // number of bytes in request (upper 16 bits)
297 | UINT8I fast_clock;
298 | UINT8I clock_delay;
299 | static UINT8I DAP_SWJ_Clock(const UINT8 xdata *req, UINT8 xdata *res)
300 | {
301 | /**/
302 | fast_clock = *req;
303 | fast_clock = 0;
304 | clock_delay = 0;
305 |
306 | *res = DAP_OK;
307 | return 1;
308 | }
309 | // Process SWJ Sequence command and prepare response
310 | // request: pointer to request datas
311 | // response: pointer to response datas
312 | // return: number of bytes in response (lower 16 bits)
313 | // number of bytes in request (upper 16 bits)
314 | static UINT8I DAP_SWJ_Sequence(const UINT8 xdata *req, UINT8 xdata *res)
315 | {
316 | UINT8I count;
317 |
318 | count = *req++;
319 | if (count == 0U)
320 | {
321 | count = 255U;
322 | }
323 | SWJ_Sequence(count, req);
324 | *res = DAP_OK;
325 |
326 |
327 | return 1;
328 | }
329 |
330 | // Process SWD Configure command and prepare response
331 | // request: pointer to request datas
332 | // response: pointer to response datas
333 | // return: number of bytes in response (lower 16 bits)
334 | // number of bytes in request (upper 16 bits)
335 | UINT8I turnaround;
336 | UINT8I data_phase;
337 | static UINT8I DAP_SWD_Configure(const UINT8 xdata *req, UINT8 xdata *res)
338 | {
339 | UINT8I value;
340 |
341 | value = *req;
342 | turnaround = (value & 0x03U) + 1U;
343 | data_phase = (value & 0x04U) ? 1U : 0U;
344 |
345 | *res = DAP_OK;
346 | return 1;
347 | }
348 |
349 | // Process SWD Sequence command and prepare response
350 | // request: pointer to request datas
351 | // response: pointer to response datas
352 | // return: number of bytes in response (lower 16 bits)
353 | // number of bytes in request (upper 16 bits)
354 | static UINT8I DAP_SWD_Sequence(const UINT8 xdata *req, UINT8 xdata *res)
355 | {
356 | UINT8I sequence_info;
357 | UINT8I sequence_count;
358 | UINT8I request_count;
359 | UINT8I response_count;
360 | UINT8I count;
361 |
362 | *res++ = DAP_OK;
363 |
364 | request_count = 1U;
365 | response_count = 1U;
366 |
367 | sequence_count = *req++;
368 | while (sequence_count--)
369 | {
370 | sequence_info = *req++;
371 | count = sequence_info & SWD_SEQUENCE_CLK;
372 | if (count == 0U)
373 | {
374 | count = 64U;
375 | }
376 | count = (count + 7U) / 8U;
377 | if ((sequence_info & SWD_SEQUENCE_DIN) != 0U)
378 | {
379 | SWD = 1;//PIN_SWDIO_OUT_DISABLE();
380 | }
381 | else
382 | {
383 | SWD = 1;//PIN_SWDIO_OUT_ENABLE();
384 | }
385 | SWD_Sequence(sequence_info, req, res);
386 | if (sequence_count == 0U)
387 | {
388 | SWD = 1;//PIN_SWDIO_OUT_ENABLE();
389 | }
390 | if ((sequence_info & SWD_SEQUENCE_DIN) != 0U)
391 | {
392 | request_count++;
393 | res += count;
394 | response_count += count;
395 | }
396 | else
397 | {
398 | req += count;
399 | request_count += count + 1U;
400 | }
401 | }
402 |
403 | return response_count;
404 | }
405 |
406 | //static UINT8I DAP_SWD_Sequence(const UINT8 *req, UINT8 *res)
407 | //{
408 | // UINT8I sequence_info;
409 | // UINT8I sequence_count;
410 | // //UINT8I request_count;
411 | // UINT8I request_count;
412 | // UINT8I response_count;
413 | // UINT8I count;
414 | //
415 | // *res++ = DAP_OK;
416 | //
417 | // //request_count = 1U;
418 | // response_count = 1U;
419 | // sequence_count = *req++;
420 | // while (sequence_count--)
421 | // {
422 | // sequence_info = *req++;
423 | // count = sequence_info & SWD_SEQUENCE_CLK;
424 | // if (count == 0U)
425 | // {
426 | // count = 64U;
427 | // }
428 | //// if ((sequence_info & SWD_SEQUENCE_DIN) != 0U)
429 | //// {//input
430 | //// SWD_IN_Sequence(count,res);
431 | //// count = (count + 7U) / 8U;
432 | //// //request_count++;
433 | //// res += count;
434 | //// response_count += count;
435 | //// }
436 | //// else
437 | //// {//output
438 | //// SWJ_Sequence(count,req);
439 | //// count = (count + 7U) / 8U;
440 | //// req += count;
441 | //// //request_count += count + 1U;
442 | //// }
443 | // count = (count + 7U) / 8U;
444 | // if ((sequence_info & SWD_SEQUENCE_DIN) != 0U) {
445 | // SWD = 1;
446 | // } else {
447 | // SWD = 0;
448 | // }
449 | // SWD_Sequence(sequence_info, req, res);
450 | // if (sequence_count == 0U) {
451 | // SWD = 0;
452 | // }
453 | // if ((sequence_info & SWD_SEQUENCE_DIN) != 0U) {
454 | // request_count++;
455 | // res += count;
456 | // response_count += count;
457 | // } else {
458 | // req += count;
459 | // request_count += count + 1U;
460 | // }
461 | // }
462 | // return response_count;
463 | //}
464 |
465 | // Process Transfer Configure command and prepare response
466 | // request: pointer to request datas
467 | // response: pointer to response datas
468 | // return: number of bytes in response (lower 16 bits)
469 | // number of bytes in request (upper 16 bits)
470 | UINT8I idle_cycles;
471 | UINT16I retry_count;
472 | UINT16I match_retry;
473 | static UINT8I DAP_TransferConfigure(const UINT8 xdata *req, UINT8 xdata *res)
474 | {
475 |
476 | idle_cycles = *(req + 0);
477 | retry_count = (UINT16I) * (req + 1) |
478 | (UINT16I)(*(req + 2) << 8);
479 | match_retry = (UINT16I) * (req + 3) |
480 | (UINT16I)(*(req + 4) << 8);
481 |
482 | *res = DAP_OK;
483 | return 1;
484 | }
485 |
486 | // Process SWD Transfer command and prepare response
487 | // request: pointer to request datas
488 | // response: pointer to response datas
489 | // return: number of bytes in response (lower 16 bits)
490 | // number of bytes in request (upper 16 bits)
491 |
492 | //#define
493 |
494 | UINT8 datas[4];
495 | UINT8I match_mask[4];
496 | UINT8I match_value[4];
497 | UINT8I DAP_TransferAbort = 0U;
498 | UINT8I request_count;
499 | UINT8I request_value;
500 | UINT8I response_count;
501 | UINT8I response_value;
502 | UINT16I retry;
503 | static UINT8I DAP_SWD_Transfer(const UINT8 xdata *req, UINT8 xdata *res)
504 | {
505 | const UINT8 *request_head;
506 | UINT8 *response_head;
507 |
508 | UINT8I post_read;
509 | UINT8I check_write;
510 | request_head = req;
511 |
512 | response_count = 0U;
513 | response_value = 0U;
514 | response_head = res;
515 | res += 2;
516 |
517 | DAP_TransferAbort = 0U;
518 |
519 | post_read = 0U;
520 | check_write = 0U;
521 |
522 | req++; // Ignore DAP index
523 |
524 | request_count = *req++;
525 | for (; request_count != 0U; request_count--)
526 | {
527 | request_value = *req++;
528 | if ((request_value & DAP_TRANSFER_RnW) != 0U)
529 | {
530 | // Read registers
531 | if (post_read)
532 | {
533 | // Read was posted before
534 | retry = retry_count;
535 | if ((request_value & (DAP_TRANSFER_APnDP | DAP_TRANSFER_MATCH_VALUE)) == DAP_TRANSFER_APnDP)
536 | {
537 | // Read previous AP datas and post next AP read
538 | do
539 | {
540 | response_value = SWD_Transfer(request_value, &datas);
541 | }
542 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
543 | }
544 | else
545 | {
546 | // Read previous AP datas
547 | do
548 | {
549 | response_value = SWD_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, &datas);
550 | }
551 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
552 | post_read = 0U;
553 | }
554 | if (response_value != DAP_TRANSFER_OK)
555 | {
556 | break;
557 | }
558 | // Store previous AP datas
559 | DATA_TO_XRAM((UINT8)res,datas);
560 | res += 4;
561 | //*res++ = (UINT8)datas[0];
562 | //*res++ = (UINT8)datas[1];
563 | //*res++ = (UINT8)datas[2];
564 | //*res++ = (UINT8)datas[3];
565 | }
566 | if ((request_value & DAP_TRANSFER_MATCH_VALUE) != 0U)
567 | {
568 | // Read with value match
569 | XRAM_TO_DATA(match_value,(UINT8)req);
570 | //match_value[0] = (UINT8)(*(req + 0));
571 | //match_value[1] = (UINT8)(*(req + 1));
572 | //match_value[2] = (UINT8)(*(req + 2));
573 | //match_value[3] = (UINT8)(*(req + 3));
574 | req += 4;
575 | match_retry = match_retry;
576 | if ((request_value & DAP_TRANSFER_APnDP) != 0U)
577 | {
578 | // Post AP read
579 | retry = retry_count;
580 | do
581 | {
582 | response_value = SWD_Transfer(request_value, NULL);
583 | }
584 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
585 | if (response_value != DAP_TRANSFER_OK)
586 | {
587 | break;
588 | }
589 | }
590 | do
591 | {
592 | // Read registers until its value matches or retry counter expires
593 | retry = retry_count;
594 | do
595 | {
596 | response_value = SWD_Transfer(request_value, &datas);
597 | }
598 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
599 | if (response_value != DAP_TRANSFER_OK)
600 | {
601 | break;
602 | }
603 | }
604 | while (((datas[0] & match_mask[0]) != match_value[0] ||
605 | (datas[1] & match_mask[1]) != match_value[1] ||
606 | (datas[2] & match_mask[2]) != match_value[2] ||
607 | (datas[3] & match_mask[3]) != match_value[3]) &&
608 | match_retry-- && !DAP_TransferAbort);
609 | if ((datas[0] & match_mask[0]) != match_value[0] ||
610 | (datas[1] & match_mask[1]) != match_value[1] ||
611 | (datas[2] & match_mask[2]) != match_value[2] ||
612 | (datas[3] & match_mask[3]) != match_value[3])
613 | {
614 | response_value |= DAP_TRANSFER_MISMATCH;
615 | }
616 | if (response_value != DAP_TRANSFER_OK)
617 | {
618 | break;
619 | }
620 | }
621 | else
622 | {
623 | // Normal read
624 | retry = retry_count;
625 | if ((request_value & DAP_TRANSFER_APnDP) != 0U)
626 | {
627 | // Read AP registers
628 | if (post_read == 0U)
629 | {
630 | // Post AP read
631 | do
632 | {
633 | response_value = SWD_Transfer(request_value, NULL);
634 | }
635 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
636 | if (response_value != DAP_TRANSFER_OK)
637 | {
638 | break;
639 | }
640 | post_read = 1U;
641 | }
642 | }
643 | else
644 | {
645 | // Read DP register
646 | do
647 | {
648 | response_value = SWD_Transfer(request_value, &datas);
649 | }
650 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
651 | if (response_value != DAP_TRANSFER_OK)
652 | {
653 | break;
654 | }
655 |
656 | // Store datas
657 | DATA_TO_XRAM((UINT8)res,datas);
658 | res += 4;
659 | //*res++ = datas[0];
660 | //*res++ = datas[1];
661 | //*res++ = datas[2];
662 | //*res++ = datas[3];
663 | }
664 | }
665 | check_write = 0U;
666 | }
667 | else
668 | {
669 | // Write register
670 | if (post_read)
671 | {
672 | // Read previous datas
673 | retry = retry_count;
674 | do
675 | {
676 | response_value = SWD_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, &datas);
677 | }
678 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
679 | if (response_value != DAP_TRANSFER_OK)
680 | {
681 | break;
682 | }
683 | // Store previous datas
684 | DATA_TO_XRAM((UINT8)res,datas);
685 | res += 4;
686 | //*res++ = datas[0];
687 | //*res++ = datas[1];
688 | //*res++ = datas[2];
689 | //*res++ = datas[3];
690 | post_read = 0U;
691 | }
692 | // Load datas
693 | XRAM_TO_DATA(datas,(UINT8)req);
694 | //datas[0] = (UINT8)(*(req + 0));
695 | //datas[1] = (UINT8)(*(req + 1));
696 | //datas[2] = (UINT8)(*(req + 2));
697 | //datas[3] = (UINT8)(*(req + 3));
698 | req += 4;
699 | if ((request_value & DAP_TRANSFER_MATCH_MASK) != 0U)
700 | {
701 | // Write match mask
702 | match_mask[0] = datas[0];
703 | match_mask[1] = datas[1];
704 | match_mask[2] = datas[2];
705 | match_mask[3] = datas[3];
706 | response_value = DAP_TRANSFER_OK;
707 | }
708 | else
709 | {
710 | // Write DP/AP register
711 | retry = retry_count;
712 | do
713 | {
714 | response_value = SWD_Transfer(request_value, &datas);
715 | }
716 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
717 | if (response_value != DAP_TRANSFER_OK)
718 | {
719 | break;
720 | }
721 |
722 | check_write = 1U;
723 | }
724 | }
725 | response_count++;
726 | if (DAP_TransferAbort)
727 | {
728 | break;
729 | }
730 | }
731 |
732 | for (; request_count != 0U; request_count--)
733 | {
734 | // Process canceled requests
735 | request_value = *req++;
736 | if ((request_value & DAP_TRANSFER_RnW) != 0U)
737 | {
738 | // Read register
739 | if ((request_value & DAP_TRANSFER_MATCH_VALUE) != 0U)
740 | {
741 | // Read with value match
742 | req += 4;
743 | }
744 | }
745 | else
746 | {
747 | // Write register
748 | req += 4;
749 | }
750 | }
751 |
752 | if (response_value == DAP_TRANSFER_OK)
753 | {
754 | if (post_read)
755 | {
756 | // Read previous datas
757 | retry = retry_count;
758 | do
759 | {
760 | response_value = SWD_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, &datas);
761 | }
762 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
763 | if (response_value != DAP_TRANSFER_OK)
764 | {
765 | goto end;
766 | }
767 | // Store previous datas
768 | DATA_TO_XRAM((UINT8)res,datas);
769 | res += 4;
770 | //*res++ = (UINT8)datas[0];
771 | //*res++ = (UINT8)datas[1];
772 | //*res++ = (UINT8)datas[2];
773 | //*res++ = (UINT8)datas[3];
774 | }
775 | else if (check_write)
776 | {
777 | // Check last write
778 | retry = retry_count;
779 | do
780 | {
781 | response_value = SWD_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, NULL);
782 | }
783 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
784 | }
785 | }
786 |
787 | end:
788 | *(response_head + 0) = (UINT8)response_count;
789 | *(response_head + 1) = (UINT8)response_value;
790 |
791 | return ((UINT8I)(res - response_head));
792 | }
793 |
794 | // Process Dummy Transfer command and prepare response
795 | // request: pointer to request datas
796 | // response: pointer to response datas
797 | // return: number of bytes in response (lower 16 bits)
798 | // number of bytes in request (upper 16 bits)
799 | //static UINT8 DAP_Dummy_Transfer(const UINT8 *req, UINT8 *res)
800 | //{
801 | // UINT8 *request_head;
802 | // UINT8 request_count;
803 | // UINT8 request_value;
804 |
805 | // request_head = req;
806 |
807 | // req++; // Ignore DAP index
808 |
809 | // request_count = *req++;
810 |
811 | // for (; request_count != 0U; request_count--)
812 | // {
813 | // // Process dummy requests
814 | // request_value = *req++;
815 | // if ((request_value & DAP_TRANSFER_RnW) != 0U)
816 | // {
817 | // // Read registers
818 | // if ((request_value & DAP_TRANSFER_MATCH_VALUE) != 0U)
819 | // {
820 | // // Read with value match
821 | // req += 4;
822 | // }
823 | // }
824 | // else
825 | // {
826 | // // Write registers
827 | // req += 4;
828 | // }
829 | // }
830 |
831 | // *(res + 0) = 0U; // res count
832 | // *(res + 1) = 0U; // res value
833 |
834 | // return 2;
835 | //}
836 |
837 | // Process Transfer command and prepare response
838 | // request: pointer to request datas
839 | // response: pointer to response datas
840 | // return: number of bytes in response (lower 16 bits)
841 | // number of bytes in request (upper 16 bits)
842 | static UINT8 DAP_Transfer(const UINT8 xdata *req, UINT8 xdata *res)
843 | {
844 | UINT8 num = 0;
845 |
846 | // switch (debug_port)
847 | // {
848 | // case DAP_PORT_SWD:
849 | num = DAP_SWD_Transfer(req, res);
850 | // break;
851 | // default:
852 | // num = DAP_Dummy_Transfer(req, res);
853 | // break;
854 | // }
855 |
856 | return (num);
857 | }
858 |
859 | // Process SWD Transfer Block command and prepare response
860 | // request: pointer to request datas
861 | // response: pointer to response datas
862 | // return: number of bytes in response
863 | static UINT8I DAP_SWD_TransferBlock(const UINT8 xdata *req, UINT8 xdata *res)
864 | {
865 |
866 | UINT8 *response_head;
867 |
868 | response_count = 0U;
869 | response_value = 0U;
870 | response_head = res;
871 | res += 3;
872 |
873 | DAP_TransferAbort = 0U;
874 |
875 | req++; // Ignore DAP index
876 |
877 | request_count = (UINT16)(*(req + 0) << 0) |
878 | (UINT16)(*(req + 1) << 8);
879 | req += 2;
880 | if (request_count == 0U)
881 | {
882 | goto end;
883 | }
884 |
885 | request_value = *req++;
886 | if ((request_value & DAP_TRANSFER_RnW) != 0U)
887 | {
888 | // Read register block
889 | if ((request_value & DAP_TRANSFER_APnDP) != 0U)
890 | {
891 | // Post AP read
892 | retry = retry_count;
893 | do
894 | {
895 | response_value = SWD_Transfer(request_value, NULL);
896 | }
897 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
898 | if (response_value != DAP_TRANSFER_OK)
899 | {
900 | goto end;
901 | }
902 | }
903 | while (request_count--)
904 | {
905 | // Read DP/AP register
906 | if ((request_count == 0U) && ((request_value & DAP_TRANSFER_APnDP) != 0U))
907 | {
908 | // Last AP read
909 | request_value = DP_RDBUFF | DAP_TRANSFER_RnW;
910 | }
911 | retry = retry_count;
912 | do
913 | {
914 | response_value = SWD_Transfer(request_value, &datas);
915 | }
916 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
917 | if (response_value != DAP_TRANSFER_OK)
918 | {
919 | goto end;
920 | }
921 | // Store datas
922 | DATA_TO_XRAM((UINT8)res,datas);
923 | res += 4;
924 | //*res++ = (UINT8)datas[0];
925 | //*res++ = (UINT8)datas[1];
926 | //*res++ = (UINT8)datas[2];
927 | //*res++ = (UINT8)datas[3]; // TODO Use DB To Save Time;
928 | response_count++;
929 | }
930 | }
931 | else
932 | {
933 | // Write register block
934 | while (request_count--)
935 | {
936 | // Load datas
937 | XRAM_TO_DATA(datas,(UINT8)req);
938 | //datas[0] = (UINT8)(*(req + 0));
939 | //datas[1] = (UINT8)(*(req + 1));
940 | //datas[2] = (UINT8)(*(req + 2));
941 | //datas[3] = (UINT8)(*(req + 3));
942 |
943 | req += 4;
944 | // Write DP/AP register
945 | retry = retry_count;
946 | do
947 | {
948 | response_value = SWD_Transfer(request_value, &datas);
949 | }
950 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
951 | if (response_value != DAP_TRANSFER_OK)
952 | {
953 | goto end;
954 | }
955 | response_count++;
956 | }
957 | // Check last write
958 | retry = retry_count;
959 | do
960 | {
961 | response_value = SWD_Transfer(DP_RDBUFF | DAP_TRANSFER_RnW, NULL);
962 | }
963 | while ((response_value == DAP_TRANSFER_WAIT) && retry-- && !DAP_TransferAbort);
964 | }
965 |
966 | end:
967 | *(response_head + 0) = (UINT8)(response_count >> 0);
968 | *(response_head + 1) = (UINT8)(response_count >> 8);
969 | *(response_head + 2) = (UINT8)response_value;
970 |
971 | return ((UINT8I)(res - response_head));
972 | }
973 |
974 | // Process Transfer Block command and prepare response
975 | // request: pointer to request datas
976 | // response: pointer to response datas
977 | // return: number of bytes in response (lower 16 bits)
978 | // number of bytes in request (upper 16 bits)
979 | static UINT8I DAP_TransferBlock(const UINT8 xdata *req, UINT8 xdata *res)
980 | {
981 | UINT8I num;
982 |
983 | switch (debug_port)
984 | {
985 | case DAP_PORT_SWD:
986 | num = DAP_SWD_TransferBlock(req, res);
987 | break;
988 |
989 | default:
990 | *(res + 0) = 0U; // res count [7:0]
991 | *(res + 1) = 0U; // res count[15:8]
992 | *(res + 2) = 0U; // res value
993 | num = 3U;
994 | break;
995 | }
996 |
997 | if ((*(req + 3) & DAP_TRANSFER_RnW) != 0U)
998 | {
999 | // Read registers block
1000 | num |= 4U << 16;
1001 | }
1002 | else
1003 | {
1004 | // Write registers block
1005 | num |= (4U + (((UINT8I)(*(req + 1)) | (UINT8I)(*(req + 2) << 8)) * 4)) << 16;
1006 | }
1007 |
1008 | return (num);
1009 | }
1010 |
1011 | // Process SWD Write ABORT command and prepare response
1012 | // request: pointer to request datas
1013 | // response: pointer to response datas
1014 | // return: number of bytes in response
1015 | static UINT8I DAP_SWD_WriteAbort(const UINT8 xdata *req, UINT8 xdata *res)
1016 | {
1017 | // Load datas (Ignore DAP index)
1018 | datas[0] = (UINT8I)(*(req + 1));
1019 | datas[1] = (UINT8I)(*(req + 2));
1020 | datas[2] = (UINT8I)(*(req + 3));
1021 | datas[3] = (UINT8I)(*(req + 4));
1022 |
1023 | // Write Abort register
1024 | SWD_Transfer(DP_ABORT, &datas);
1025 |
1026 | *res = DAP_OK;
1027 | return (1U);
1028 | }
1029 |
1030 | // Process Write ABORT command and prepare response
1031 | // request: pointer to request datas
1032 | // response: pointer to response datas
1033 | // return: number of bytes in response (lower 16 bits)
1034 | // number of bytes in request (upper 16 bits)
1035 | static UINT8I DAP_WriteAbort(const UINT8 xdata *req, UINT8 xdata *res)
1036 | {
1037 | UINT8I num;
1038 |
1039 | switch (debug_port)
1040 | {
1041 | case DAP_PORT_SWD:
1042 | num = DAP_SWD_WriteAbort(req, res);
1043 | break;
1044 |
1045 | default:
1046 | *res = DAP_ERROR;
1047 | num = 1U;
1048 | break;
1049 | }
1050 | return num;
1051 | }
1052 |
1053 | // DAP Thread.
1054 | void DAP_Thread(void)
1055 | {
1056 | UINT8 num;
1057 |
1058 | if (Ep2Oi != Ep2Oo)
1059 | {
1060 | PUINT8 req = &Ep2BufferO[Ep2Oo];
1061 | PUINT8 res = &Ep3BufferI[Ep3Ii];
1062 | Ep2Oo += 64;
1063 |
1064 |
1065 | *res++ = *req;
1066 | switch (*req++)
1067 | {
1068 | case ID_DAP_Transfer:
1069 | num = DAP_Transfer(req, res);
1070 | break;
1071 |
1072 | case ID_DAP_TransferBlock:
1073 | num = DAP_TransferBlock(req, res);
1074 | break;
1075 |
1076 | case ID_DAP_Info:
1077 | num = DAP_Info(*req, res + 1);
1078 | *res = (UINT8)num;
1079 | num++;
1080 | break;
1081 |
1082 | case ID_DAP_HostStatus:
1083 | num = DAP_HostStatus(req, res);
1084 | break;
1085 |
1086 | case ID_DAP_Connect:
1087 | num = DAP_Connect(req, res);
1088 | break;
1089 |
1090 | case ID_DAP_Disconnect:
1091 | num = DAP_Disconnect(res);
1092 | break;
1093 |
1094 | case ID_DAP_Delay:
1095 | num = DAP_Delay(req, res);
1096 | break;
1097 |
1098 | case ID_DAP_ResetTarget:
1099 | num = DAP_ResetTarget(res);
1100 | break;
1101 |
1102 | case ID_DAP_SWJ_Pins:
1103 | num = DAP_SWJ_Pins(req, res);
1104 | break;
1105 |
1106 | case ID_DAP_SWJ_Clock:
1107 | num = DAP_SWJ_Clock(req, res);
1108 | break;
1109 |
1110 | case ID_DAP_SWJ_Sequence:
1111 | num = DAP_SWJ_Sequence(req, res);
1112 | break;
1113 |
1114 | case ID_DAP_SWD_Configure:
1115 | num = DAP_SWD_Configure(req, res);
1116 | break;
1117 |
1118 | case ID_DAP_SWD_Sequence:
1119 | num = DAP_SWD_Sequence(req, res);
1120 | break;
1121 |
1122 | case ID_DAP_TransferConfigure:
1123 | num = DAP_TransferConfigure(req, res);
1124 | break;
1125 |
1126 | case ID_DAP_WriteABORT:
1127 | num = DAP_WriteAbort(req, res);
1128 | break;
1129 |
1130 | case ID_DAP_ExecuteCommands:
1131 | case ID_DAP_QueueCommands:
1132 | default:
1133 | *(res - 1) = ID_DAP_Invalid;
1134 | num = 1;
1135 | break;
1136 | }
1137 |
1138 | Ep3Is[0]/*(Ep3Ii>>6)]*/ = num + 1;
1139 | Ep3Ii += 64;
1140 | }
1141 | }
1142 |
--------------------------------------------------------------------------------
/2.Firmware/SRC/DAP.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
3 | *
4 | * SPDX-License-Identifier: Apache-2.0
5 | *
6 | * Licensed under the Apache License, Version 2.0 (the License); you may
7 | * not use this file except in compliance with the License.
8 | * You may obtain a copy of the License at
9 | *
10 | * www.apache.org/licenses/LICENSE-2.0
11 | *
12 | * Unless required by applicable law or agreed to in writing, software
13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 | * See the License for the specific language governing permissions and
16 | * limitations under the License.
17 | *
18 | * ----------------------------------------------------------------------
19 | *
20 | * $Date: 1. December 2017
21 | * $Revision: V2.0.0
22 | *
23 | * Project: CMSIS-DAP Include
24 | * Title: DAP.h Definitions
25 | *
26 | *---------------------------------------------------------------------------*/
27 |
28 | #ifndef __DAP_H__
29 | #define __DAP_H__
30 |
31 | #include "CH552.H"
32 | #include
33 | #include
34 | #include
35 |
36 | // DAP Firmware Version
37 | #define DAP_FW_VER "2.0.0"
38 |
39 | // DAP Command IDs
40 | #define ID_DAP_Info 0x00U
41 | #define ID_DAP_HostStatus 0x01U
42 | #define ID_DAP_Connect 0x02U
43 | #define ID_DAP_Disconnect 0x03U
44 | #define ID_DAP_TransferConfigure 0x04U
45 | #define ID_DAP_Transfer 0x05U
46 | #define ID_DAP_TransferBlock 0x06U
47 | #define ID_DAP_TransferAbort 0x07U
48 | #define ID_DAP_WriteABORT 0x08U
49 | #define ID_DAP_Delay 0x09U
50 | #define ID_DAP_ResetTarget 0x0AU
51 | #define ID_DAP_SWJ_Pins 0x10U
52 | #define ID_DAP_SWJ_Clock 0x11U
53 | #define ID_DAP_SWJ_Sequence 0x12U
54 | #define ID_DAP_SWD_Configure 0x13U
55 | #define ID_DAP_SWD_Sequence 0x1DU
56 | #define ID_DAP_JTAG_Sequence 0x14U
57 | #define ID_DAP_JTAG_Configure 0x15U
58 | #define ID_DAP_JTAG_IDCODE 0x16U
59 | #define ID_DAP_SWO_Transport 0x17U
60 | #define ID_DAP_SWO_Mode 0x18U
61 | #define ID_DAP_SWO_Baudrate 0x19U
62 | #define ID_DAP_SWO_Control 0x1AU
63 | #define ID_DAP_SWO_Status 0x1BU
64 | #define ID_DAP_SWO_ExtendedStatus 0x1EU
65 | #define ID_DAP_SWO_Data 0x1CU
66 |
67 | #define ID_DAP_QueueCommands 0x7EU
68 | #define ID_DAP_ExecuteCommands 0x7FU
69 |
70 | // DAP Vendor Command IDs
71 | #define ID_DAP_Vendor0 0x80U
72 | #define ID_DAP_Vendor1 0x81U
73 | #define ID_DAP_Vendor2 0x82U
74 | #define ID_DAP_Vendor3 0x83U
75 | #define ID_DAP_Vendor4 0x84U
76 | #define ID_DAP_Vendor5 0x85U
77 | #define ID_DAP_Vendor6 0x86U
78 | #define ID_DAP_Vendor7 0x87U
79 | #define ID_DAP_Vendor8 0x88U
80 | #define ID_DAP_Vendor9 0x89U
81 | #define ID_DAP_Vendor10 0x8AU
82 | #define ID_DAP_Vendor11 0x8BU
83 | #define ID_DAP_Vendor12 0x8CU
84 | #define ID_DAP_Vendor13 0x8DU
85 | #define ID_DAP_Vendor14 0x8EU
86 | #define ID_DAP_Vendor15 0x8FU
87 | #define ID_DAP_Vendor16 0x90U
88 | #define ID_DAP_Vendor17 0x91U
89 | #define ID_DAP_Vendor18 0x92U
90 | #define ID_DAP_Vendor19 0x93U
91 | #define ID_DAP_Vendor20 0x94U
92 | #define ID_DAP_Vendor21 0x95U
93 | #define ID_DAP_Vendor22 0x96U
94 | #define ID_DAP_Vendor23 0x97U
95 | #define ID_DAP_Vendor24 0x98U
96 | #define ID_DAP_Vendor25 0x99U
97 | #define ID_DAP_Vendor26 0x9AU
98 | #define ID_DAP_Vendor27 0x9BU
99 | #define ID_DAP_Vendor28 0x9CU
100 | #define ID_DAP_Vendor29 0x9DU
101 | #define ID_DAP_Vendor30 0x9EU
102 | #define ID_DAP_Vendor31 0x9FU
103 |
104 | #define ID_DAP_Invalid 0xFFU
105 |
106 | // DAP Status Code
107 | #define DAP_OK 0U
108 | #define DAP_ERROR 0xFFU
109 |
110 | // DAP ID
111 | #define DAP_ID_VENDOR 1U
112 | #define DAP_ID_PRODUCT 2U
113 | #define DAP_ID_SER_NUM 3U
114 | #define DAP_ID_FW_VER 4U
115 | #define DAP_ID_DEVICE_VENDOR 5U
116 | #define DAP_ID_DEVICE_NAME 6U
117 | #define DAP_ID_CAPABILITIES 0xF0U
118 | #define DAP_ID_TIMESTAMP_CLOCK 0xF1U
119 | #define DAP_ID_SWO_BUFFER_SIZE 0xFDU
120 | #define DAP_ID_PACKET_COUNT 0xFEU
121 | #define DAP_ID_PACKET_SIZE 0xFFU
122 |
123 | // DAP Host Status
124 | #define DAP_DEBUGGER_CONNECTED 0U
125 | #define DAP_TARGET_RUNNING 1U
126 |
127 | // DAP Port
128 | #define DAP_PORT_AUTODETECT 0U // Autodetect Port
129 | #define DAP_PORT_DISABLED 0U // Port Disabled (I/O pins in High-Z)
130 | #define DAP_PORT_SWD 1U // SWD Port (SWCLK, SWDIO) + nRESET
131 | #define DAP_PORT_JTAG 2U // JTAG Port (TCK, TMS, TDI, TDO, nTRST) + nRESET
132 |
133 | // DAP SWJ Pins
134 | #define DAP_SWJ_SWCLK_TCK 0 // SWCLK/TCK
135 | #define DAP_SWJ_SWDIO_TMS 1 // SWDIO/TMS
136 | #define DAP_SWJ_TDI 2 // TDI
137 | #define DAP_SWJ_TDO 3 // TDO
138 | #define DAP_SWJ_nTRST 5 // nTRST
139 | #define DAP_SWJ_nRESET 7 // nRESET
140 |
141 | #define DAP_SWJ_SWCLK_TCK_BIT 0x01 // SWCLK/TCK
142 | #define DAP_SWJ_SWDIO_TMS_BIT 0x02 // SWDIO/TMS
143 | #define DAP_SWJ_TDI_BIT 0x04 // TDI
144 | #define DAP_SWJ_TDO_BIT 0x08 // TDO
145 | #define DAP_SWJ_nTRST_BIT 0x20 // nTRST
146 | #define DAP_SWJ_nRESET_BIT 0x80 // nRESET
147 |
148 | // DAP Transfer Request
149 | #define DAP_TRANSFER_APnDP (1U << 0)
150 | #define DAP_TRANSFER_RnW (1U << 1)
151 | #define DAP_TRANSFER_A2 (1U << 2)
152 | #define DAP_TRANSFER_A3 (1U << 3)
153 | #define DAP_TRANSFER_MATCH_VALUE (1U << 4)
154 | #define DAP_TRANSFER_MATCH_MASK (1U << 5)
155 | #define DAP_TRANSFER_TIMESTAMP (1U << 7)
156 |
157 | // DAP Transfer Response
158 | #define DAP_TRANSFER_OK (1U << 0)
159 | #define DAP_TRANSFER_WAIT (1U << 1)
160 | #define DAP_TRANSFER_FAULT (1U << 2)
161 | #define DAP_TRANSFER_ERROR (1U << 3)
162 | #define DAP_TRANSFER_MISMATCH (1U << 4)
163 |
164 | // DAP SWO Trace Mode
165 | #define DAP_SWO_OFF 0U
166 | #define DAP_SWO_UART 1U
167 | #define DAP_SWO_MANCHESTER 2U
168 |
169 | // DAP SWO Trace Status
170 | #define DAP_SWO_CAPTURE_ACTIVE (1U << 0)
171 | #define DAP_SWO_CAPTURE_PAUSED (1U << 1)
172 | #define DAP_SWO_STREAM_ERROR (1U << 6)
173 | #define DAP_SWO_BUFFER_OVERRUN (1U << 7)
174 |
175 | // Debug Port Register Addresses
176 | #define DP_IDCODE 0x00U // IDCODE Register (SW Read only)
177 | #define DP_ABORT 0x00U // Abort Register (SW Write only)
178 | #define DP_CTRL_STAT 0x04U // Control & Status
179 | #define DP_WCR 0x04U // Wire Control Register (SW Only)
180 | #define DP_SELECT 0x08U // Select Register (JTAG R/W & SW W)
181 | #define DP_RESEND 0x08U // Resend (SW Read Only)
182 | #define DP_RDBUFF 0x0CU // Read Buffer (Read Only)
183 |
184 | // JTAG IR Codes
185 | #define JTAG_ABORT 0x08U
186 | #define JTAG_DPACC 0x0AU
187 | #define JTAG_APACC 0x0BU
188 | #define JTAG_IDCODE 0x0EU
189 | #define JTAG_BYPASS 0x0FU
190 |
191 | // JTAG Sequence Info
192 | #define JTAG_SEQUENCE_TCK 0x3FU // TCK count
193 | #define JTAG_SEQUENCE_TMS 0x40U // TMS value
194 | #define JTAG_SEQUENCE_TDO 0x80U // TDO capture
195 |
196 | // SWD Sequence Info
197 | #define SWD_SEQUENCE_CLK 0x3FU // SWCLK count
198 | #define SWD_SEQUENCE_DIN 0x80U // SWDIO capture
199 |
200 | #define DAP_PACKET_COUNT 4
201 | #define DAP_PACKET_SIZE 64 //THIS_ENDP0_SIZE
202 | #define DAP_DEFAULT_PORT DAP_PORT_SWD
203 |
204 | sbit RST = P1 ^ 4;
205 | sbit SWK = P1 ^ 7;
206 | sbit SWD = P1 ^ 5;
207 | sbit LED = P3 ^ 3;
208 | sbit LED2 = P3 ^ 2;
209 | sbit DIR_SWD = P1 ^ 6;
210 | extern BOOL DAP_LED_BUSY;
211 |
212 | extern UINT8I Ep2Oi;
213 | extern UINT8I Ep2Oo;
214 | extern UINT8I Ep3Ii;
215 | extern UINT8I Ep3Io;
216 | extern UINT8I Ep3Is[];
217 |
218 | extern UINT8X Ep2BufferO[];
219 | extern UINT8X Ep3BufferI[];
220 |
221 | extern UINT8I turnaround;
222 | extern UINT8I data_phase;
223 | extern UINT8I idle_cycles;
224 |
225 | extern void DAP_Thread(void);
226 | extern void PORT_SWD_SETUP(void);
227 | extern void PORT_SWD_OFF(void);
228 | extern void SWD_ResetTarget_Soft(void);
229 | extern UINT8 SWD_Transfer(UINT8 req, char data *datas);
230 | extern void SWJ_Sequence(UINT8I count, const UINT8 *datas);
231 | //extern void SWD_Sequence(UINT8I info, const UINT8 *swdo, UINT8 *swdi);
232 | extern void SWD_IN_Sequence(UINT8I count, UINT8 *swdi);
233 | extern void SWD_Sequence(UINT8I info, const UINT8 *swdo, UINT8 *swdi);
234 |
235 | #endif /* __DAP_H__ */
236 |
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/2.Firmware/SRC/DataFlash.C:
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/2.Firmware/SRC/DataFlash.H:
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/2.Firmware/SRC/Debug.H:
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/2.Firmware/SRC/FastWrite.a51:
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1 | XRAM_TO_DATA SEGMENT CODE
2 | DATA_TO_XRAM SEGMENT CODE
3 |
4 | PUBLIC _DATA_TO_XRAM
5 | PUBLIC _XRAM_TO_DATA
6 |
7 | XBUS_AUX DATA 0A2H
8 |
9 | ; R7 data target
10 | ; R5 xdata
11 | RSEG XRAM_TO_DATA
12 | _XRAM_TO_DATA:
13 | MOV A,R7
14 | MOV R1,A
15 | MOV DPH,#01H
16 | MOV DPL,R5
17 |
18 | MOVX A,@DPTR
19 | MOV @R1,A
20 | INC R1
21 | INC DPL
22 | MOVX A,@DPTR
23 | MOV @R1,A
24 | INC R1
25 | INC DPL
26 | MOVX A,@DPTR
27 | MOV @R1,A
28 | INC R1
29 | INC DPL
30 | MOVX A,@DPTR
31 | MOV @R1,A
32 | INC R1
33 | INC DPL
34 |
35 | RET
36 |
37 | ; R5 data
38 | ; R7 xdata
39 | RSEG DATA_TO_XRAM
40 | _DATA_TO_XRAM:
41 | INC XBUS_AUX
42 | MOV DPH,#02H
43 | MOV DPL,R7
44 | DEC XBUS_AUX
45 | MOV A,R5
46 | MOV R1,A
47 |
48 | MOV A,@R1
49 | DB 0A5H
50 | INC R1
51 | MOV A,@R1
52 | DB 0A5H
53 | INC R1
54 | MOV A,@R1
55 | DB 0A5H
56 | INC R1
57 | MOV A,@R1
58 | DB 0A5H
59 | INC R1
60 |
61 | RET
62 |
63 | END
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/2.Firmware/SRC/FastWrite.h:
--------------------------------------------------------------------------------
1 | /**
2 | * @author Chi Zhang
3 | * @date 2023/1/13
4 | */
5 |
6 | #ifndef _FASTWRITE_H
7 | #define _FASTWRITE_H
8 |
9 | #include "CH552.H"
10 |
11 | void XRAM_TO_DATA(UINT8 idata * target,UINT8 pointer);
12 | void DATA_TO_XRAM(UINT8 pointer,UINT8 idata * target);
13 |
14 | #endif //_FASTWRITE_H
15 |
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/2.Firmware/SRC/Keyboard.c:
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/2.Firmware/SRC/SW_DP.c:
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/2.Firmware/SRC/SW_DP_asm.a51:
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1 | $NOMOD51
2 | NAME SW_DP_ASM
3 |
4 | SWC_PIN BIT 090H.7
5 | SWD_PIN BIT 090H.5
6 | SWD_PIN_DIR BIT 0B0H.2
7 | SWD_PMOD_OC DATA 092H
8 | SWD_PDIR_PU DATA 093H
9 | P2 DATA 0A0H
10 | ;Pn_MOD_OC Pn_DIR_PU
11 | ; 0 0 Input
12 | ; 0 1 PP_Output
13 | ; 1 0 OC_Output
14 | ; 1 1 OC_PU_Output
15 |
16 | ?PR?SWD_Write_Byte?SW_DP_ASM SEGMENT CODE
17 | ?PR?_SWD_Transfer?SW_DP_ASM SEGMENT CODE
18 |
19 | EXTRN IDATA (data_phase)
20 | EXTRN IDATA (idle_cycles)
21 | ;EXTRN IDATA (turnaround)
22 | PUBLIC _SWD_Transfer
23 |
24 | ;ACC = data
25 | ;R0 = Bits
26 | RSEG ?PR?SWD_Write_Byte?SW_DP_ASM
27 | SWD_Write_Byte:
28 | MOV R0,#8
29 | SWD_Write_Bits:
30 | SETB SWC_PIN
31 | RRC A
32 | MOV SWD_PIN,C
33 | CLR SWC_PIN
34 | DJNZ R0,SWD_Write_Bits
35 | SETB SWC_PIN
36 | RET
37 |
38 | SWD_Read_Byte:
39 | MOV R0,#8
40 | SWD_Read_Bits:
41 | CLR SWC_PIN
42 | MOV C,SWD_PIN
43 | RRC A
44 | SETB SWC_PIN
45 | DJNZ R0,SWD_Read_Bits
46 | RET
47 |
48 | ;R5 = datas Addr(Idata)
49 | ;R7 = Req
50 | RSEG ?PR?_SWD_Transfer?SW_DP_ASM
51 | _SWD_Transfer:
52 | MOV A,R5
53 | MOV R1,A
54 | SWD_T1:
55 | MOV A,R7
56 | ANL ACC,#0FH
57 | RL A
58 | JNB PSW.0,SWD_T2
59 | SETB ACC.5
60 | SWD_T2:
61 | ORL ACC,#81H
62 | call SWD_Write_Byte ;Start->Park
63 | SETB SWD_PIN
64 | ORL SWD_PMOD_OC,#20H ;PP_Output->OC_PU_Output->PU_Input ;P1.5
65 | ;ANL SWD_PDIR_PU,#0DFH ;PP_Output->Input
66 | CLR SWD_PIN_DIR
67 | MOV R0,#4
68 | call SWD_Read_Bits ;Trn+3bit_ASK
69 | SWAP A
70 | RR A
71 | ANL ACC,#07H
72 | XCH A,R7;R7=ACK[2:0](for return) A=request
73 | CJNE R7,#01H,SWD_T3;ACK=001b WAIT=010b FAULT=100b (LSB)
74 | JB ACC.1,SWD_TR1
75 | ;write
76 | CLR SWC_PIN ;Trn
77 | NOP
78 | NOP
79 | SETB SWC_PIN
80 | MOV R5,#0 ;PARITY
81 | SETB SWD_PIN_DIR
82 | ANL SWD_PMOD_OC,#0DFH ;PU_Input->PP_Output ;P1.5
83 | ;ORL SWD_PDIR_PU,#20H
84 | ;write 33bits
85 | MOV A,@R1
86 | JNB PSW.0,SWD_TW1
87 | INC R5
88 | SWD_TW1:
89 | CALL SWD_Write_Byte
90 | INC R1
91 | MOV A,@R1
92 | JNB PSW.0,SWD_TW2
93 | INC R5
94 | SWD_TW2:
95 | CALL SWD_Write_Byte
96 | INC R1
97 | MOV A,@R1
98 | JNB PSW.0,SWD_TW3
99 | INC R5
100 | SWD_TW3:
101 | CALL SWD_Write_Byte
102 | INC R1
103 | MOV A,@R1
104 | JNB PSW.0,SWD_TW4
105 | INC R5
106 | SWD_TW4:
107 | CALL SWD_Write_Byte
108 | MOV A,R5
109 | RRC A
110 | MOV SWD_PIN,C;PARITY bit
111 | SJMP SWD_TR7
112 | SWD_TR1: ;read
113 | ;read 33bits
114 | MOV R5,#0 ;PARITY
115 | CALL SWD_Read_Byte
116 | JNB PSW.0,SWD_TR2
117 | INC R5
118 | SWD_TR2:
119 | MOV @R1,A
120 | INC R1
121 | CALL SWD_Read_Byte
122 | JNB PSW.0,SWD_TR3
123 | INC R5
124 | SWD_TR3:
125 | MOV @R1,A
126 | INC R1
127 | CALL SWD_Read_Byte
128 | JNB PSW.0,SWD_TR4
129 | INC R5
130 | SWD_TR4:
131 | MOV @R1,A
132 | INC R1
133 | CALL SWD_Read_Byte
134 | JNB PSW.0,SWD_TR5
135 | INC R5
136 | SWD_TR5:
137 | MOV @R1,A
138 | CLR SWC_PIN
139 | CLR A
140 | MOV C,SWD_PIN
141 | RLC A
142 | SETB SWC_PIN
143 | XRL A,R5
144 | JNB ACC.0,SWD_TR6
145 | MOV R7,#08H
146 | SWD_TR6:
147 | SETB SWD_PIN_DIR
148 | ANL SWD_PMOD_OC,#0DFH ;PU_Input->PP_Output ;P1.5
149 | ;ORL SWD_PDIR_PU,#20H
150 | SWD_TR7:
151 | ;MOV R0,#LOW (idle_cycles)
152 | ;INC R0
153 | ;MOV R0,#01H
154 | ;SWD_TR8:
155 | CLR SWC_PIN
156 | NOP
157 | NOP
158 | SETB SWC_PIN
159 | ;DJNZ R0,SWD_TR8
160 | RET
161 |
162 | SWD_T3: ; wait/fault/error
163 | ;Dummy write/read
164 | CJNE R7,#02H,SWD_TE1 ;010b wait
165 | SJMP SWD_TE3
166 | SWD_TE1:
167 | CJNE R7,#02H,SWD_TE2 ;100b fault
168 | SJMP SWD_TE3
169 | SWD_TE2:
170 | MOV R7,#010H ;others:MISMATCH
171 | MOV R0,#022H
172 | SJMP SWD_TE4
173 | SWD_TE3:
174 | ; MOV R0,#022H
175 | ; MOV A,#LOW (data_phase)
176 | ; JNZ SWD_TE4
177 | MOV R0,#01H
178 | SWD_TE4:
179 | CLR SWC_PIN
180 | NOP
181 | NOP
182 | SETB SWC_PIN
183 | DJNZ R0,SWD_TE4
184 | SETB SWD_PIN_DIR
185 | ANL SWD_PMOD_OC,#0DFH ;PU_Input->PP_Output ;P1.5
186 | ;ORL SWD_PDIR_PU,#20H
187 | RET
188 |
189 | END
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1 | #ifndef _TOUCH_KEY_H
2 | #define _TOUCH_KEY_H
3 |
4 | #include "CH552.H"
5 |
6 | #define SAMPLE_TIMES (0x05)
7 |
8 | extern UINT16 Key_FreeBuf;
9 | extern UINT16 Key_DataBuf;
10 | extern bit Press_Flag;
11 |
12 | extern bit TK_FlashFreeFlag;
13 |
14 | void TK_Init(void);
15 |
16 | UINT8 TK_Measure(void);
17 |
18 | void TK_FlashKeyBuf(void);
19 |
20 |
21 |
22 | #endif
23 |
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1 | #ifndef __UART_H__
2 | #define __UART_H__
3 |
4 | #define DEFAULT_UART_BUAD 115200
5 |
6 | extern UINT8X Uart_TxBuff0[];
7 | extern UINT8X Uart_TxBuff1[];
8 | extern UINT8X Uart_RxBuff0[];
9 | extern UINT8X Uart_RxBuff1[];
10 |
11 | extern BOOL Uart_RxDealingWhich;
12 |
13 | void UART_Setup(void);
14 | void Config_Uart0(UINT8 *cfg_uart);
15 |
16 | void USB_CDC_PushData(void);
17 | void USB_CDC_GetData(void);
18 |
19 | #endif
20 |
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1 | /**
2 | * @author Chi Zhang
3 | * @date 2023/2/7
4 | */
5 |
6 | #ifndef _MAIN_H
7 | #define _MAIN_H
8 |
9 | #include "CH552.H"
10 |
11 | #endif //_MAIN_H
12 |
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674 | .
675 |
--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
1 | # Tiny-DAPLink
2 |
3 | > 小巧的使用CH552实现的DAPLink
4 |
5 | 详见[Tiny-DAPLink：开源CH552实现的CMSIS-DAP v2升级版](https://whycan.com/t_9365.html)
6 |
7 | ## 硬件设计
8 |
9 | 1. 下载按键需要超级小的两脚小龟按键，如果不重复下载调试，可以不焊
10 | 2. 整体需要包热缩管进行绝缘，不然手汗会造成数据异常
11 |
12 | ## DAT命令列表
13 |
14 | 使用任意串口工具发送特定的命令即可对Tiny-DAPLink进行相应的设置。
15 |
16 | | 命令 | 描述 |
17 | |:--------------|:---------------------------------------------------|
18 | | DAT+RST | 重启调试器 |
19 | | DAT+IAP | 进入调试器固件下载模式 |
20 | | DAT+KEY? | 查询电容键盘映射的按键 |
21 | | DAT+KEY=XX | 更改电容键盘映射的按键[USB CDC键盘键值表](3.Docs/Keyboard_HID.txt) |
22 | | DAT+KEY=FF | 关闭电容键盘功能 |
23 | | DAT+AUTHOR? | 查询作者信息 |
24 | | DAT+KEY_FLASH | 刷新电容按键参数 |
25 | | DAT+KEY_VALUE | 查看电容按键参数 |
26 |
27 | ## 注意事项
28 |
29 | 1. 一些不合格的数据线会使Type C接口外壳对地短路，使电容按键失效
--------------------------------------------------------------------------------