├── rom ├── ascii.chr ├── upload.tcl ├── Makefile ├── init.asm ├── sd.asm ├── dat.inc ├── fs2.asm ├── name.asm ├── flash.asm ├── main.asm ├── cons.asm └── fs.asm ├── board └── 1.0 │ ├── snes.PrjPcbStructure │ ├── conf.SchDoc │ ├── mem.SchDoc │ ├── pcb.PcbDoc │ ├── pcb.PcbLib │ ├── parts.SchLib │ ├── power.SchDoc │ ├── snesio.SchDoc │ └── snes.PrjPcb ├── vhdl ├── snes.sdc ├── rom.qip ├── pll.qip ├── snes.qpf ├── main.vhdl ├── mem.vhdl ├── rom.vhd ├── dma.vhdl ├── cic.vhdl ├── sd.vhdl ├── pll.vhd └── snes.qsf └── README.md /rom/ascii.chr: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/aiju/snes-flash/HEAD/rom/ascii.chr -------------------------------------------------------------------------------- /board/1.0/snes.PrjPcbStructure: -------------------------------------------------------------------------------- 1 | Record=TopLevelDocument|FileName=conf.SchDoc 2 | -------------------------------------------------------------------------------- /board/1.0/conf.SchDoc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/aiju/snes-flash/HEAD/board/1.0/conf.SchDoc -------------------------------------------------------------------------------- /board/1.0/mem.SchDoc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/aiju/snes-flash/HEAD/board/1.0/mem.SchDoc -------------------------------------------------------------------------------- /board/1.0/pcb.PcbDoc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/aiju/snes-flash/HEAD/board/1.0/pcb.PcbDoc -------------------------------------------------------------------------------- /board/1.0/pcb.PcbLib: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/aiju/snes-flash/HEAD/board/1.0/pcb.PcbLib -------------------------------------------------------------------------------- /board/1.0/parts.SchLib: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/aiju/snes-flash/HEAD/board/1.0/parts.SchLib -------------------------------------------------------------------------------- /board/1.0/power.SchDoc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/aiju/snes-flash/HEAD/board/1.0/power.SchDoc -------------------------------------------------------------------------------- /board/1.0/snesio.SchDoc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/aiju/snes-flash/HEAD/board/1.0/snesio.SchDoc -------------------------------------------------------------------------------- /vhdl/snes.sdc: -------------------------------------------------------------------------------- 1 | create_clock -name "inclk" -period 20.000ns [get_ports {inclk}] 2 | derive_pll_clocks -create_base_clocks 3 | derive_clock_uncertainty 4 | -------------------------------------------------------------------------------- /vhdl/rom.qip: -------------------------------------------------------------------------------- 1 | set_global_assignment -name IP_TOOL_NAME "RAM: 1-PORT" 2 | set_global_assignment -name IP_TOOL_VERSION "13.1" 3 | set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "rom.vhd"] 4 | -------------------------------------------------------------------------------- /rom/upload.tcl: -------------------------------------------------------------------------------- 1 | begin_memory_edit -hardware_name "USB-Blaster \[USB-0\]" -device_name "@1: EP3C(10|5)/EP4CE(10|6) (0x020F10DD)" 2 | update_content_to_memory_from_file -instance_index 0 -mem_file_path "rom.mif" -mem_file_type mif 3 | end_memory_edit 4 | -------------------------------------------------------------------------------- /vhdl/pll.qip: -------------------------------------------------------------------------------- 1 | set_global_assignment -name IP_TOOL_NAME "ALTPLL" 2 | set_global_assignment -name IP_TOOL_VERSION "13.1" 3 | set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "pll.vhd"] 4 | set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll.ppf"] 5 | -------------------------------------------------------------------------------- /rom/Makefile: -------------------------------------------------------------------------------- 1 | ASM=wla-65816 2 | LINK=wlalink 3 | OBJ=\ 4 | init.o\ 5 | main.o\ 6 | cons.o\ 7 | sd.o\ 8 | fs.o\ 9 | fs2.o\ 10 | name.o\ 11 | flash.o\ 12 | 13 | all: rom.mif 14 | 15 | clean: 16 | rm -f $(OBJ) 17 | 18 | rom.mif: rom.smc 19 | (echo -e 'DEPTH = 32768;\nWIDTH = 8;\nADDRESS_RADIX = HEX;\nDATA_RADIX = HEX;\nCONTENT\nBEGIN'; xxd -g 1 $< | sed 's/ .*$$/;/'; echo 'END;') > rom.mif 20 | 21 | rom.smc: $(OBJ) 22 | ( echo '[objects]' ; for i in $(OBJ); do echo $$i; done ) | $(LINK) /dev/stdin rom.smc 23 | 24 | %.o: %.asm dat.inc 25 | $(ASM) -o $< 26 | -------------------------------------------------------------------------------- /vhdl/snes.qpf: -------------------------------------------------------------------------------- 1 | # -------------------------------------------------------------------------- # 2 | # 3 | # Copyright (C) 1991-2013 Altera Corporation 4 | # Your use of Altera Corporation's design tools, logic functions 5 | # and other software and tools, and its AMPP partner logic 6 | # functions, and any output files from any of the foregoing 7 | # (including device programming or simulation files), and any 8 | # associated documentation or information are expressly subject 9 | # to the terms and conditions of the Altera Program License 10 | # Subscription Agreement, Altera MegaCore Function License 11 | # Agreement, or other applicable license agreement, including, 12 | # without limitation, that your use is for the sole purpose of 13 | # programming logic devices manufactured by Altera and sold by 14 | # Altera or its authorized distributors. Please refer to the 15 | # applicable agreement for further details. 16 | # 17 | # -------------------------------------------------------------------------- # 18 | # 19 | # Quartus II 64-Bit 20 | # Version 13.1.0 Build 162 10/23/2013 SJ Web Edition 21 | # Date created = 12:56:16 March 19, 2014 22 | # 23 | # -------------------------------------------------------------------------- # 24 | 25 | QUARTUS_VERSION = "13.1" 26 | DATE = "12:56:16 March 19, 2014" 27 | 28 | # Revisions 29 | 30 | PROJECT_REVISION = "snes" 31 | -------------------------------------------------------------------------------- /rom/init.asm: -------------------------------------------------------------------------------- 1 | .INCLUDE "dat.inc" 2 | 3 | .SNESEMUVECTOR 4 | COP noop 5 | ABORT noop 6 | NMI noop 7 | RESET init 8 | IRQBRK noop 9 | .ENDEMUVECTOR 10 | 11 | .SNESNATIVEVECTOR 12 | COP noop 13 | ABORT noop 14 | NMI vblank 15 | IRQ noop 16 | BRK noop 17 | .ENDNATIVEVECTOR 18 | 19 | 20 | .SECTION "CODE" 21 | init: 22 | sei 23 | clc 24 | xce 25 | rep #$38 26 | ldx #$1fff 27 | txs 28 | phk 29 | plb 30 | lda #$0 31 | tcd 32 | sep #$20 33 | lda #$8f 34 | sta $2100 35 | stz $210d 36 | stz $211b 37 | ldx #$2101 38 | - stz $00,x 39 | inx 40 | cpx #$2134 41 | bne - 42 | lda #$80 43 | sta $2115 44 | lda #$ff 45 | sta $4201 46 | stz $420d 47 | 48 | stz $2116 49 | stz $2117 50 | ldx #$8000 51 | - stz $2118 52 | stz $2119 53 | dex 54 | bne - 55 | 56 | stz $2116 57 | lda #$41 58 | sta $2117 59 | lda #96 60 | sta tmp 61 | ldx #font 62 | -- ldy #8 63 | - lda $00,x 64 | sta $2118 65 | lda $08,x 66 | sta $2119 67 | inx 68 | dey 69 | bne - 70 | rep #$21 71 | txa 72 | adc #$8 73 | tax 74 | sep #$20 75 | dec tmp 76 | bne -- 77 | 78 | lda #HIROM 79 | sta dmactrl 80 | sta DMACTRL 81 | 82 | rep #$20 83 | lda #$FFFF 84 | sta ROMMASK 85 | sta RAMMASK 86 | lda #$FE80 87 | sta inf 88 | 89 | jsr main 90 | loop: wai 91 | pea $0000 92 | plb 93 | sep #$20 94 | lda #$0 95 | sta $4200 96 | jml inf 97 | 98 | font: 99 | .incbin "ascii.chr" 100 | .ENDS 101 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # SNES flash cartridge 2 | 3 | This repository contains schematics/board layout, VHDL and assembly code for a SNES MicroSD flash cartridge. 4 | 5 | ## How to build 6 | 7 | Use WLA-DX to build the ROM to give a rom.mif file which is copied to the vhdl directory. 8 | Quartus compiles the vhdl and the rom.mif into a .sof file which can be flashed using JTAG. 9 | To generate a file for flashing onto the onboard flash convert the .sof file to a .pof and then a .rpd file. 10 | Finally reverse the bits in each byte in the .rpd file to yield snescart.bin. 11 | Copy it onto the sd card and press L+R+Start+Select to flash the firmware. 12 | 13 | ## SD card format 14 | 15 | The filesystem on the card must be FAT32. 16 | Folders and file names of any length are fine. 17 | ROM file names must end in either .sfc or .smc. SMC headers are fine and Lorom/Hirom is autodetected. 18 | Savegames need to created on a computer in the appropriate size (as deduced from the header in the file). 19 | They need to have the same name as the ROM but have their name extension replaced by sav. 20 | 21 | ## Bugs 22 | 23 | SD card hotswap occasionally causes trouble. Avoid. 24 | Never touch the card while the game is running, removing the card during gameplay will disable saving until the next reset (to prevent corrupting another card). 25 | Games larger than 32 megabits, using more than 64 kilobit of SRAM and using expansion chips are not supported (the SRAM limit is the easiest to fix). 26 | 27 | ## TODO 28 | 29 | - Implement lockout chip (current board revision is flawed) 30 | - Implement creating save files (or at least a PC tool for that purpose) 31 | - Make the menus prettier 32 | - Fix solder mask sliver on board (causes bridges during reflow) 33 | 34 | ## Links 35 | 36 | - [The schematics and board layout as PDF](http://aiju.de/snesflash.pdf) 37 | -------------------------------------------------------------------------------- /rom/sd.asm: -------------------------------------------------------------------------------- 1 | .INCLUDE "dat.inc" 2 | 3 | .SECTION "CODE" 4 | busy: 5 | php 6 | sep #$20 7 | - bit SDSTAT 8 | bmi - 9 | bvs + 10 | bit cardsw-1 11 | bmi + 12 | plp 13 | clc 14 | rts 15 | + plp 16 | sec 17 | rts 18 | 19 | sderror: 20 | php 21 | rep #$10 22 | sep #$20 23 | lda SDSTAT 24 | bit #NOCARD 25 | beq + 26 | ldx #nocard 27 | jsr puts 28 | plp 29 | rts 30 | + bit #$10 31 | beq + 32 | ldx #_crcerr 33 | jsr puts 34 | bra _pblk 35 | + rep #$10 36 | sep #$20 37 | ldx #_error 38 | jsr puts 39 | lda SDFAILED 40 | and #$3F 41 | jsr putbyte 42 | ldx #_response 43 | jsr puts 44 | lda SDRESP+3 45 | jsr putbyte 46 | lda SDRESP+2 47 | jsr putbyte 48 | lda SDRESP+1 49 | jsr putbyte 50 | lda SDRESP 51 | jsr putbyte 52 | _pblk: ldx #_blk 53 | jsr puts 54 | rep #$20 55 | clc 56 | lda sdblk 57 | adc partoff 58 | pha 59 | lda sdblk+2 60 | adc partoff+2 61 | jsr putword 62 | pla 63 | jsr putword 64 | plp 65 | rts 66 | 67 | sramflush: 68 | php 69 | sep #$20 70 | lda dmactrl 71 | ora #RAMFLUSH 72 | sta DMACTRL 73 | - bit DMACTRL 74 | bpl - 75 | plp 76 | sec 77 | rts 78 | 79 | sramdis: 80 | php 81 | rep #$20 82 | lda #MAGIC 83 | sta LOCK 84 | sep #$20 85 | lda dmactrl 86 | sta DMACTRL 87 | lda #0 88 | - sta BLKADDR 89 | rep #$20 90 | lda #$FFFF 91 | sta RAMBLK 92 | sta RAMBLK+2 93 | sep #$20 94 | lda BLKADDR 95 | ina 96 | cmp #NSRAM 97 | bcc - 98 | rep #$20 99 | stz LOCK 100 | plp 101 | rts 102 | 103 | sdfatal: 104 | jsr box 105 | jsr sderror 106 | jmp loop 107 | 108 | sdread: 109 | php 110 | rep #$20 111 | lda sdaddr 112 | sta DMAADDR 113 | clc 114 | lda sdblk 115 | adc partoff 116 | sta SDBLK 117 | lda sdblk+2 118 | adc partoff+2 119 | sta SDBLK+2 120 | sep #$20 121 | lda dmactrl 122 | ora sdmode 123 | sta DMACTRL 124 | lda #READCMD 125 | sta SDCMD 126 | jsr busy 127 | lda dmactrl 128 | sta DMACTRL 129 | rol tmp 130 | plp 131 | ror tmp 132 | rts 133 | 134 | nocard: .ASC "NO CARD", 0 135 | _error: .ASC "CARD ERROR", 10, "CMD $", 0 136 | _response: .ASC 10, "RESPONSE ", 0 137 | _blk: .ASC 10, "BLOCK ", 0 138 | _crcerr: .ASC "CRC ERROR", 0 139 | 140 | .ENDS 141 | -------------------------------------------------------------------------------- /rom/dat.inc: -------------------------------------------------------------------------------- 1 | .MEMORYMAP 2 | SLOTSIZE $8000 3 | DEFAULTSLOT 0 4 | SLOT 0 $8000 5 | .ENDME 6 | 7 | .ROMBANKSIZE $8000 8 | .ROMBANKS 1 9 | .LOROM 10 | 11 | .SNESHEADER 12 | NAME "FLASH CART" 13 | ROMSIZE $05 14 | .ENDSNES 15 | 16 | .ENUM $0 17 | inf DS 2 18 | tmp DS 2 19 | tmp2 DS 2 20 | tmp3 DS 2 21 | ptr DS 3 22 | ptr2 DS 3 23 | dmactrl DB 24 | sdmode DB 25 | cardsw DB 26 | 27 | pos DS 3 28 | attrib DB 29 | window DB 30 | baron DB 31 | update DB 32 | prog DS 2 33 | progst DS 2 34 | 35 | sdaddr DS 2 36 | sdblk DS 4 37 | partoff DS 4 38 | 39 | clsiz DB 40 | clsh DB 41 | dir DS 4 42 | clust DS 4 43 | cloff DS 4 44 | eof DB 45 | fat DS 4 46 | 47 | dirend DS 3 48 | dpend DS 3 49 | dent DS 3 50 | dirptr DS 3 51 | lfn DB 52 | 53 | scrtop DS 3 54 | scrbot DS 2 55 | sel DS 2 56 | 57 | btn DS 2 58 | bmask DS 2 59 | key DS 2 60 | 61 | smch DS 1 62 | gamectl DS 1 63 | size DS 4 64 | rommask DS 2 65 | rammask DS 2 66 | 67 | buf DS 514 68 | buf2 DS 514 69 | .ENDE 70 | 71 | .EQU PICSIZ 1920 72 | .EQU BOXL 4 73 | .EQU BOXT 4 74 | .EQU BOXW 20 75 | .EQU BOXH 10 76 | .EQU BOX BOXL | (BOXT << 8) 77 | .EQU NAMES $0303 78 | 79 | .EQU BARL 16 80 | .EQU BART 128 81 | .EQU BARW 224 82 | .EQU BARH 16 83 | 84 | .EQU REGLOC 2*64 - 10 85 | 86 | .EQU DIRMAX 2048 87 | .EQU NAMEMAX 256 88 | .EQU DISPLEN 26 89 | .EQU DISPNUM 20 90 | 91 | .ENUM $7F0000 92 | pic DS PICSIZ 93 | picbak DS PICSIZ 94 | dirp DS DIRMAX*3+3 95 | .ENDE 96 | 97 | .EQU SDSTAT $3000 98 | .EQU SDCMD $3000 99 | .EQU RESETCMD 0 100 | .EQU READCMD 1 101 | .EQU SDFAILED $3001 102 | .EQU SDRESP $3002 103 | .EQU SDBLK $3001 104 | .EQU MEMMODE 1 105 | .EQU ROMDIS 2 106 | .EQU HIROM 4 107 | .EQU SAVERAM 8 108 | .EQU RAMFLUSH 16 109 | .EQU SPICE 32 110 | .EQU NOCARD $20 111 | .EQU DMACTRL $3010 112 | .EQU DMAADDR $3011 113 | .EQU ROMMASK $3013 114 | .EQU RAMMASK $3015 115 | .EQU BLKADDR $3016 116 | .EQU RAMBLK $3017 117 | .EQU LOCK $301B 118 | .EQU MAGIC $1337 119 | .EQU NSRAM 16 120 | .EQU ROMMAX $c 121 | .EQU SPI $301D 122 | 123 | .EQU BREC $FF0000 124 | .EQU FAT $FF0200 125 | .EQU DIR $400000 126 | .EQU HEAD $FF0400 127 | .EQU ROMOFF $400000 128 | 129 | .MACRO LDADDR 130 | lda #((\1>>9)&$4000)|((\1>>8)&$3FFF) 131 | .ENDM 132 | 133 | .EQU BTNB $8000 134 | .EQU BTNA $0080 135 | .EQU BTNUP $0800 136 | .EQU BTNDOWN $0400 137 | .EQU BTNFLASH $3030 138 | .EQU BTNLR $0030 139 | -------------------------------------------------------------------------------- /vhdl/main.vhdl: -------------------------------------------------------------------------------- 1 | library ieee; 2 | use ieee.std_logic_1164.all; 3 | use ieee.numeric_std.all; 4 | 5 | entity snes is 6 | port( 7 | inclk : in std_logic; 8 | 9 | snesdir : out std_logic; 10 | snesa : in unsigned(23 downto 0); 11 | snesd : inout unsigned(7 downto 0); 12 | snesrd, sneswr, snescart : in std_logic; 13 | snesreset, snesclk : in std_logic; 14 | 15 | ramclk, ramcke, ramcs, ramwe : out std_logic; 16 | ramcas, ramras, ramldqm, ramudqm : out std_logic; 17 | rama : out unsigned(11 downto 0); 18 | ramba : out unsigned(1 downto 0); 19 | ramdq : inout unsigned(15 downto 0); 20 | 21 | sdclk : out std_logic; 22 | sdcmd : inout std_logic; 23 | sddat : inout unsigned(3 downto 0); 24 | sdcd : in std_logic; 25 | 26 | spice, spisck, spisi : out std_logic; 27 | spiso : in std_logic 28 | ); 29 | end snes; 30 | 31 | architecture main of snes is 32 | signal clk, reset, refresh, memmode, romen, memstart, txstart, txstep, txinstart, txdone, txerr, card : std_logic; 33 | signal snesrd0, snesrd1, sneswr0, sneswr1, snescart0, snesreset0, snesclk0 : std_logic; 34 | signal snesa0 : unsigned(23 downto 0); 35 | signal romaddr, dmaaddr : unsigned(22 downto 0); 36 | signal memdata, romdata, txdata, sdreg, dmareg, snesd0, txindata : unsigned(7 downto 0); 37 | signal memen, cartrd, regen, dmaen : std_logic; 38 | signal romdata0 : std_logic_vector(7 downto 0); 39 | signal wrblk : unsigned(31 downto 0); 40 | 41 | signal sden : std_logic; 42 | 43 | type refcnt_t is range 0 to 255; 44 | signal rctr : refcnt_t; 45 | begin 46 | process 47 | begin 48 | wait until rising_edge(clk); 49 | snesreset0 <= snesreset; 50 | snescart0 <= snescart; 51 | snesrd0 <= snesrd; 52 | sneswr0 <= sneswr; 53 | sneswr1 <= sneswr0; 54 | snesa0 <= snesa; 55 | snesd0 <= snesd; 56 | snesclk0 <= snesclk; 57 | if snesclk0 = '0' then 58 | if rctr < rctr'high then 59 | rctr <= rctr + 1; 60 | end if; 61 | else 62 | rctr <= 0; 63 | end if; 64 | end process; 65 | 66 | refresh <= '1' when rctr > 110 and rctr < 145 else '0'; 67 | pll0: entity work.pll port map(inclk, clk, reset); 68 | ramclk <= clk; 69 | mem0: entity work.mem port map(clk, reset, ramcke, ramcs, ramwe, ramcas, ramras, ramldqm, ramudqm, rama, ramba, ramdq, memmode, memen, romaddr, memdata, txstart, txstep, dmaaddr, txdata, refresh); 70 | rom0: entity work.rom port map(std_logic_vector(romaddr(14 downto 0)), clk, (others => '0'), '0', romdata0); 71 | romdata <= unsigned(romdata0); 72 | regen <= sden or dmaen; 73 | cartrd <= snesrd0 nor (snescart0 and not regen); 74 | snesd <= (others => 'Z') when cartrd = '0' else 75 | sdreg when sden = '1' else 76 | dmareg when dmaen = '1' else 77 | memdata when memen = '1' else 78 | romdata; 79 | snesdir <= cartrd; 80 | 81 | sd0: entity work.sd port map(clk, sdclk, sdcd, sdcmd, sddat, sden and not snesrd0, sden and sneswr0 and not sneswr1, snesa0(3 downto 0), snesd0, sdreg, txstart, txstep, txdata, txinstart, txindata, wrblk, txdone, txerr, card); 82 | dma0: entity work.dma port map(clk, snesreset0, snesa0, snesd0, dmareg, not snesrd0, sneswr0 and not sneswr1, not snescart0, romaddr, dmaaddr, memen, sden, dmaen, memmode, txstart, txstep, txdata, txinstart, txindata, wrblk, txdone, txerr, card, spice, spisck, spisi, spiso); 83 | end main; -------------------------------------------------------------------------------- /rom/fs2.asm: -------------------------------------------------------------------------------- 1 | .INCLUDE "dat.inc" 2 | 3 | .SECTION "CODE" 4 | modname: 5 | php 6 | rep #$30 7 | jsr strcpy 8 | 9 | ldx #-2 10 | ldy #-1 11 | - inx 12 | inx 13 | lda buf2,x 14 | cmp #'.' 15 | bne + 16 | txy 17 | + cmp #0 18 | bne - 19 | 20 | cpy #-1 21 | bne + 22 | txy 23 | + cpy #502 24 | bcc + 25 | ldy #502 26 | + ldx #0 27 | - lda _end.w,x 28 | sta buf2,y 29 | iny 30 | inx 31 | cpx #10 32 | bne - 33 | plp 34 | rts 35 | _end: .DB '.', 0, 's', 0, 'a', 0, 'v', 0, 0, 0 36 | 37 | namecmp: 38 | rep #$30 39 | ldx #0 40 | - lda buf,x 41 | bne + 42 | lda buf2,x 43 | rts 44 | + eor buf2,x 45 | beq + 46 | and #$FFDF 47 | bne ++ 48 | lda buf,x 49 | and #$FFDF 50 | cmp #$41 51 | bcc ++ 52 | cmp #$5B 53 | bcc + 54 | ina 55 | ++ rts 56 | + inx 57 | inx 58 | bra - 59 | 60 | openfile: 61 | php 62 | rep #$30 63 | lda #DIR >> 8 64 | sta dent+1 65 | lda #DIR & $FFFF 66 | sta dent 67 | - rep #$20 68 | lda dent+1 69 | cmp dirend+1 70 | bne + 71 | plp 72 | sec 73 | rts 74 | + sep #$30 75 | lda [dent] 76 | beq + 77 | cmp #$E5 78 | beq + 79 | ldy #$B 80 | lda [dent],y 81 | and #$D8 82 | bne + 83 | jsr filename 84 | jsr namecmp 85 | rep #$30 86 | bne + 87 | plp 88 | clc 89 | rts 90 | + rep #$20 91 | lda dent 92 | clc 93 | adc #$20 94 | sta dent 95 | bcc - 96 | inc dent+2 97 | bra - 98 | 99 | createfile: 100 | rep #$10 101 | ldx #_nofile 102 | jsr puts 103 | plp 104 | sec 105 | rts 106 | _nofile: .ASC "NO SAVE", 0 107 | 108 | _sde: 109 | sep #$20 110 | bit cardsw 111 | bra + 112 | jsr box 113 | jsr sderror 114 | jsr waitkey 115 | + plp 116 | sec 117 | rts 118 | 119 | checkclust: 120 | php 121 | rep #$20 122 | 123 | lda clsiz 124 | and #$FF 125 | sta tmp 126 | lda rammask 127 | lsr 128 | clc 129 | adc tmp 130 | 131 | sep #$10 132 | ldx clsh 133 | - lsr 134 | dex 135 | bne - 136 | sta tmp2 137 | 138 | ldy #$1A 139 | lda [dent],y 140 | sta clust 141 | ldy #$14 142 | lda [dent],y 143 | sta clust+2 144 | ora clust 145 | beq + 146 | - jsr nextclust 147 | bcs _sde 148 | dec tmp2 149 | beq ++ 150 | bit eof-1 151 | bpl - 152 | + rep #$10 153 | ldx #_nofile 154 | jsr puts 155 | plp 156 | sec 157 | rts 158 | ++ plp 159 | clc 160 | rts 161 | 162 | 163 | readin: 164 | php 165 | rep #$20 166 | lda rammask 167 | ina 168 | lsr 169 | sta tmp2 170 | sep #$30 171 | stz BLKADDR 172 | rep #$20 173 | lda #MAGIC 174 | sta LOCK 175 | stz sdaddr 176 | ldy #$1A 177 | lda [dent],y 178 | sta clust 179 | ldy #$14 180 | lda [dent],y 181 | sta clust+2 182 | 183 | -- jsr clustsec 184 | ldx clsiz 185 | - lda #MEMMODE 186 | trb sdmode 187 | jsr sdread 188 | lda #MEMMODE 189 | tsb sdmode 190 | bcs +++ 191 | clc 192 | lda sdblk 193 | adc partoff 194 | sta RAMBLK 195 | lda sdblk+2 196 | adc partoff+2 197 | sta RAMBLK+2 198 | 199 | sep #$20 200 | inc BLKADDR 201 | rep #$20 202 | inc sdaddr 203 | inc sdaddr 204 | inc sdblk 205 | bne + 206 | inc sdblk+2 207 | + dec tmp2 208 | beq ++ 209 | dex 210 | bne - 211 | jsr nextclust 212 | bra -- 213 | ++ stz LOCK 214 | plp 215 | clc 216 | rts 217 | 218 | +++ stz LOCK 219 | jmp _sde 220 | 221 | findslot: 222 | php 223 | rep #$30 224 | stz tmp 225 | lda #DIR >> 8 226 | sta ptr+1 227 | lda #DIR & $FFFF 228 | sta ptr 229 | 230 | - rep #$20 231 | lda ptr+1 232 | cmp dirend+1 233 | beq ++ 234 | sep #$20 235 | lda [ptr] 236 | beq + 237 | cmp #$E5 238 | beq + 239 | rep #$20 240 | stz tmp 241 | 242 | -- lda ptr 243 | clc 244 | adc #$20 245 | sta ptr 246 | bcc - 247 | inc ptr+2 248 | bra - 249 | 250 | + rep #$20 251 | lda ptr+1 252 | sta dent+1 253 | lda ptr 254 | sta dent 255 | sep #$20 256 | lda tmp 257 | cmp lfn 258 | beq + 259 | inc tmp 260 | bra -- 261 | + 262 | ++ 263 | 264 | 265 | plp 266 | rts 267 | .ENDS 268 | -------------------------------------------------------------------------------- /rom/name.asm: -------------------------------------------------------------------------------- 1 | .INCLUDE "dat.inc" 2 | 3 | .SECTION "CODE" 4 | filename: 5 | php 6 | sep #$20 7 | stz lfn 8 | jsr _sfnsum 9 | sta tmp 10 | stz tmp+1 11 | 12 | lda dent+2 13 | sta ptr+2 14 | rep #$20 15 | lda dent 16 | sta ptr 17 | 18 | lda #buf 19 | sta tmp3 20 | 21 | - rep #$20 22 | lda ptr 23 | sec 24 | sbc #$20 25 | sta ptr 26 | bcs + 27 | sep #$20 28 | dec ptr+2 29 | lda ptr+2 30 | cmp #DIR>>16 31 | rep #$20 32 | bcc sfn 33 | 34 | + ldy #$B 35 | lda [ptr],y 36 | cmp #$F 37 | bne sfn 38 | ldy #$1A 39 | lda [ptr],y 40 | bne sfn 41 | sep #$20 42 | ldy #$D 43 | lda [ptr],y 44 | cmp tmp 45 | bne sfn 46 | lda [ptr] 47 | beq sfn 48 | cmp #$E5 49 | beq sfn 50 | and #$1F 51 | inc tmp+1 52 | cmp tmp+1 53 | bne sfn 54 | 55 | rep #$20 56 | ldy #$01 57 | ldx #5 58 | jsr _copy 59 | ldy #$0E 60 | ldx #6 61 | jsr _copy 62 | ldy #$1C 63 | ldx #2 64 | jsr _copy 65 | 66 | sep #$20 67 | inc lfn 68 | lda [ptr] 69 | asl 70 | bpl - 71 | rep #$20 72 | lda #0 73 | sta (tmp3) 74 | stz buf+510 75 | plp 76 | rts 77 | _copy: 78 | lda [ptr],y 79 | iny 80 | iny 81 | sta (tmp3) 82 | lda tmp3 83 | cmp #buf+510 84 | bcs + 85 | adc #2 86 | sta tmp3 87 | + dex 88 | bne _copy 89 | rts 90 | 91 | sfn: 92 | sep #$30 93 | stz lfn 94 | ldx #0 95 | ldy #0 96 | sty tmp 97 | - lda [dent],y 98 | sta buf,x 99 | and #$DF 100 | beq + 101 | stx tmp 102 | + inx 103 | stz buf,x 104 | inx 105 | iny 106 | cpy #8 107 | bne - 108 | 109 | lda #'.' 110 | sta buf,x 111 | inx 112 | stz buf,x 113 | inx 114 | 115 | - lda [dent],y 116 | iny 117 | sta buf,x 118 | and #$DF 119 | beq + 120 | stx tmp 121 | + inx 122 | stz buf,x 123 | inx 124 | cpy #11 125 | bne - 126 | 127 | ldx tmp 128 | inx 129 | inx 130 | rep #$20 131 | stz buf,x 132 | plp 133 | rts 134 | 135 | _sfnsum: 136 | sep #$30 137 | ldy #0 138 | lda #0 139 | - pha 140 | lsr 141 | pla 142 | ror 143 | clc 144 | adc [dent],y 145 | iny 146 | cpy #11 147 | bne - 148 | rts 149 | 150 | sort: 151 | php 152 | rep #$30 153 | lda #dirp >> 8 154 | sta dirptr+1 155 | sta ptr2+1 156 | stz dirptr 157 | lda dpend 158 | sec 159 | sbc #3 160 | pha 161 | pea dirp & $FFFF 162 | jsr quicksort 163 | pla 164 | pla 165 | plp 166 | rts 167 | 168 | strcpy: 169 | ldx #-2 170 | - inx 171 | inx 172 | lda buf,x 173 | jsr _upper 174 | sta buf2,x 175 | tay 176 | bne - 177 | lda buf+512 178 | sta buf2+512 179 | rts 180 | 181 | quicksort: 182 | lda 3,s 183 | cmp 5,s 184 | bcc + 185 | rts 186 | + lda 5,s 187 | pha 188 | tay 189 | jsr _name 190 | jsr strcpy 191 | ply 192 | lda 5,s 193 | sta ptr2 194 | jsr swap 195 | 196 | lda 3,s 197 | tay 198 | sta ptr2 199 | - phy 200 | jsr _name 201 | jsr _cmp 202 | ply 203 | bcc + 204 | jsr swap 205 | lda ptr2 206 | clc 207 | adc #3 208 | sta ptr2 209 | + iny 210 | iny 211 | iny 212 | tya 213 | cmp 5,s 214 | bcc - 215 | ++ jsr swap 216 | 217 | lda ptr2 218 | sec 219 | sbc #3 220 | pha 221 | lda 5,s 222 | pha 223 | jsr quicksort 224 | ply 225 | pla 226 | clc 227 | adc #6 228 | sta 3,s 229 | bra quicksort 230 | 231 | _name: 232 | lda [dirptr],y 233 | sta dent 234 | phy 235 | iny 236 | lda [dirptr],y 237 | sta dent+1 238 | ldy #$B 239 | lda [dent],y 240 | sta buf+512 241 | jsr filename 242 | ply 243 | rts 244 | 245 | swap: 246 | lda [dirptr],y 247 | pha 248 | lda [ptr2] 249 | sta [dirptr],y 250 | pla 251 | sta [ptr2] 252 | sep #$20 253 | tyx 254 | ldy #2 255 | lda $7F0002,x 256 | pha 257 | lda [ptr2],y 258 | sta $7F0002,x 259 | pla 260 | sta [ptr2],y 261 | txy 262 | rep #$20 263 | rts 264 | 265 | _cmp: 266 | lda buf+512 267 | eor buf2+512 268 | and #$10 269 | beq ++ 270 | clc 271 | lda buf+512 272 | and #$10 273 | beq + 274 | sec 275 | rts 276 | ++ ldx #-2 277 | - inx 278 | inx 279 | lda buf,x 280 | jsr _upper 281 | eor #$FFFF 282 | sec 283 | adc buf2,x 284 | bne + 285 | lda buf,x 286 | bne - 287 | + rts 288 | 289 | _upper: 290 | cmp #'z'+1 291 | bcs + 292 | cmp #'a' 293 | bcc + 294 | sec 295 | sbc #'a'-'A' 296 | + rts 297 | 298 | .ENDS 299 | -------------------------------------------------------------------------------- /vhdl/mem.vhdl: -------------------------------------------------------------------------------- 1 | library ieee; 2 | use ieee.std_logic_1164.all; 3 | use ieee.numeric_std.all; 4 | 5 | entity mem is 6 | port( 7 | clk, reset : in std_logic; 8 | cke, cs, we, cas, ras, ldqm, udqm : out std_logic; 9 | a : out unsigned(11 downto 0); 10 | ba : out unsigned(1 downto 0); 11 | dq : inout unsigned(15 downto 0); 12 | mode, en : in std_logic; 13 | addr0 : in unsigned(22 downto 0); 14 | data0 : out unsigned(7 downto 0); 15 | start, step : in std_logic; 16 | addr1 : in unsigned(22 downto 0); 17 | data1 : in unsigned(7 downto 0); 18 | refresh : in std_logic 19 | ); 20 | end mem; 21 | 22 | architecture main of mem is 23 | type state_t is (RESETCMD, IDLE, READCMD, WRITECMD, AUTOREFRESH); 24 | signal curaddr : unsigned(22 downto 0); 25 | signal buf, db : unsigned(7 downto 0); 26 | signal state : state_t := RESETCMD; 27 | type ctr_t is range 0 to 31; 28 | constant tRCD : ctr_t := 2; 29 | constant tCAS : ctr_t := 2; 30 | constant tRP : ctr_t := 1; 31 | constant tRC : ctr_t := 5; 32 | signal ctr : ctr_t; 33 | signal stepped : std_logic; 34 | begin 35 | db <= dq(15 downto 8) when curaddr(0) = '1' else dq(7 downto 0); 36 | data0 <= db when state = READCMD else buf; 37 | cke <= '1'; 38 | process 39 | variable sel : boolean; 40 | variable addr : unsigned(22 downto 0); 41 | begin 42 | wait until rising_edge(clk); 43 | cs <= '0'; 44 | we <= '1'; 45 | cas <= '1'; 46 | ras <= '1'; 47 | a <= (others => '0'); 48 | ba <= (others => '0'); 49 | dq <= (others => 'Z'); 50 | if mode = '1' and start = '1' and step = '1' then 51 | stepped <= '1'; 52 | end if; 53 | case state is 54 | when RESETCMD => 55 | ctr <= ctr + 1; 56 | case ctr is 57 | when 0 => 58 | ras <= '0'; 59 | we <= '0'; 60 | a(10) <= '1'; 61 | when 2 | 10 => 62 | ras <= '0'; 63 | cas <= '0'; 64 | when 17 => 65 | a(5) <= '1'; 66 | when 18 => 67 | ras <= '0'; 68 | cas <= '0'; 69 | we <= '0'; 70 | a(5) <= '1'; 71 | when 20 => 72 | state <= IDLE; 73 | when others => 74 | end case; 75 | when IDLE => 76 | sel := false; 77 | --cs <= '1'; 78 | if refresh = '1' and (mode = '0' or start = '0') then 79 | ctr <= 0; 80 | cs <= '0'; 81 | ras <= '0'; 82 | cas <= '0'; 83 | state <= AUTOREFRESH; 84 | end if; 85 | if mode = '0' and en = '1' and addr0 /= curaddr then 86 | sel := true; 87 | state <= READCMD; 88 | addr := addr0; 89 | end if; 90 | if mode = '1' and start = '1' then 91 | sel := true; 92 | state <= WRITECMD; 93 | addr := addr1; 94 | end if; 95 | if sel then 96 | cs <= '0'; 97 | ras <= '0'; 98 | cas <= '1'; 99 | curaddr <= addr; 100 | ba <= addr(22 downto 21); 101 | a <= addr(20 downto 9); 102 | ldqm <= addr(0); 103 | udqm <= not addr(0); 104 | ctr <= 0; 105 | end if; 106 | when READCMD => 107 | ctr <= ctr + 1; 108 | case ctr is 109 | when (tRCD - 1) | tRCD => 110 | cas <= '0'; 111 | ba <= curaddr(22 downto 21); 112 | a(7 downto 0) <= curaddr(8 downto 1); 113 | a(10) <= '1'; 114 | when tRCD+tCAS => 115 | buf <= db; 116 | state <= IDLE; 117 | when others => 118 | end case; 119 | when WRITECMD => 120 | ctr <= ctr + 1; 121 | case ctr is 122 | when tRCD => 123 | if step = '1' or stepped = '1' then 124 | stepped <= '0'; 125 | cas <= '0'; 126 | we <= '0'; 127 | ba <= curaddr(22 downto 21); 128 | a(7 downto 0) <= curaddr(8 downto 1); 129 | ldqm <= curaddr(0); 130 | udqm <= not curaddr(0); 131 | if curaddr(0) = '1' then 132 | dq(15 downto 8) <= data1; 133 | else 134 | dq(7 downto 0) <= data1; 135 | end if; 136 | curaddr <= curaddr + 1; 137 | end if; 138 | if start = '1' then 139 | ctr <= tRCD; 140 | end if; 141 | when tRCD+1 => 142 | ras <= '0'; 143 | we <= '0'; 144 | a(10) <= '1'; 145 | when tRCD+1+tRP => 146 | state <= IDLE; 147 | when others => 148 | end case; 149 | when AUTOREFRESH => 150 | ctr <= ctr + 1; 151 | if ctr = tRC then 152 | state <= IDLE; 153 | end if; 154 | end case; 155 | if reset = '0' then 156 | state <= RESETCMD; 157 | ctr <= 0; 158 | cs <= '1'; 159 | end if; 160 | end process; 161 | end main; -------------------------------------------------------------------------------- /rom/flash.asm: -------------------------------------------------------------------------------- 1 | .INCLUDE "dat.inc" 2 | 3 | .SECTION "CODE" 4 | flash: 5 | rep #$30 6 | jsr box 7 | ldx #_flashname 8 | ldy #buf2 9 | lda #26 10 | mvn 0, 0 11 | jsr openfile 12 | bcc + 13 | - jsr box 14 | ldx #_nofirm 15 | jsr puts 16 | jmp confirm 17 | + ldx #_flashmsg 18 | jsr puts 19 | jsr waitkey 20 | lda #BTNA 21 | beq + 22 | lda $4218 23 | bit #$F 24 | bne + 25 | and #BTNLR 26 | eor #BTNLR 27 | bne + 28 | bra ++ 29 | + jmp endbox 30 | ++ ldy #$1A 31 | lda [dent],y 32 | sta clust 33 | ldy #$14 34 | lda [dent],y 35 | sta clust+2 36 | ora clust 37 | beq - 38 | ldy #$1C 39 | lda [dent],y 40 | sta size 41 | bne - 42 | ldy #$1E 43 | lda [dent],y 44 | sta size+2 45 | cmp #$8 46 | bne - 47 | stz sdaddr 48 | jsr readfile 49 | bcc _try 50 | rts 51 | _try jsr endbox 52 | jsr clrscreen 53 | ldx #$0300 54 | jsr move 55 | ldx #_powermsg 56 | jsr puts 57 | 58 | sep #$20 59 | jsr ceoff 60 | jsr readid 61 | jsr putword 62 | jsr clrwp 63 | jsr erase 64 | jsr program 65 | ldx #$0300 66 | jsr move 67 | ldx #_vermsg 68 | jsr puts 69 | jsr verify 70 | bcs _try 71 | jsr clrscreen 72 | ldx #$0300 73 | jsr move 74 | ldx #_success 75 | jsr puts 76 | jmp loop 77 | 78 | 79 | ceon: 80 | lda dmactrl 81 | ora #SPICE 82 | sta DMACTRL 83 | rts 84 | 85 | ceoff: 86 | lda dmactrl 87 | sta DMACTRL 88 | rts 89 | 90 | readid: 91 | jsr ceon 92 | lda #$AB 93 | sta SPI 94 | stz SPI 95 | stz SPI 96 | stz SPI 97 | stz SPI 98 | lda SPI 99 | stz SPI 100 | xba 101 | lda SPI 102 | pha 103 | jsr ceoff 104 | pla 105 | rts 106 | 107 | _busy: 108 | jsr ceon 109 | lda #$05 110 | sta SPI 111 | - stz SPI 112 | lda SPI 113 | and #$1 114 | bne - 115 | jmp ceoff 116 | 117 | we: 118 | jsr ceon 119 | lda #$06 120 | sta SPI 121 | jsr ceoff 122 | rts 123 | 124 | clrwp: 125 | jsr we 126 | jsr ceon 127 | lda #$1 128 | sta SPI 129 | stz SPI 130 | jsr ceoff 131 | rts 132 | 133 | erase: 134 | jsr we 135 | jsr ceon 136 | lda #$C7 137 | sta SPI 138 | jsr ceoff 139 | jmp _busy 140 | 141 | program: 142 | jsr bar 143 | rep #$30 144 | lda #BARW 145 | sta progst 146 | stz ptr 147 | sep #$20 148 | lda #$40 149 | sta ptr+2 150 | 151 | jsr we 152 | jsr ceon 153 | lda #$AD 154 | sta SPI 155 | stz SPI 156 | stz SPI 157 | stz SPI 158 | 159 | ldy #$0 160 | bra + 161 | - jsr ceon 162 | lda #$AD 163 | sta SPI 164 | + lda [ptr],y 165 | sta SPI 166 | iny 167 | lda [ptr],y 168 | sta SPI 169 | iny 170 | jsr ceoff 171 | cpy #$200 172 | bne - 173 | jsr showprog 174 | ldy #$0 175 | rep #$20 176 | lda ptr+1 177 | clc 178 | adc #$2 179 | sta ptr+1 180 | cmp #$4800 181 | sep #$20 182 | bne - 183 | jsr ceon 184 | lda #$04 185 | sta SPI 186 | jsr ceoff 187 | rts 188 | 189 | verify: 190 | jsr ceon 191 | lda #$03 192 | sta SPI 193 | stz SPI 194 | stz SPI 195 | stz SPI 196 | rep #$20 197 | stz ptr 198 | sep #$20 199 | lda #$40 200 | sta ptr+2 201 | ldy #$0 202 | - stz SPI 203 | lda [ptr],y 204 | cmp SPI 205 | bne + 206 | iny 207 | cpy #$200 208 | bne - 209 | jsr showprog 210 | ldy #$0 211 | rep #$20 212 | lda ptr+1 213 | clc 214 | adc #$2 215 | sta ptr+1 216 | cmp #$4800 217 | sep #$20 218 | bne - 219 | jsr ceoff 220 | clc 221 | rts 222 | + pha 223 | phy 224 | jsr ceoff 225 | ldx #$0300 226 | jsr move 227 | ldx #_vererr 228 | jsr puts 229 | rep #$20 230 | pla 231 | clc 232 | adc ptr 233 | sta ptr 234 | bcc + 235 | inc ptr+2 236 | + lda ptr+2 237 | and #$3F 238 | jsr putbyte 239 | lda ptr 240 | jsr putword 241 | ldx #_readmsg 242 | jsr puts 243 | sep #$20 244 | lda SPI 245 | jsr putbyte 246 | ldx #_insteadmsg 247 | jsr puts 248 | pla 249 | jsr putbyte 250 | jsr waitkey 251 | sec 252 | rts 253 | 254 | _flashmsg: .ASC "TO FLASH FIRMWARE", 10, "PRESS L+R+A", 10, "TO ABORT PRESS B", 10, 0 255 | _powermsg: .ASC " FLASHING ...", 10, " DO NOT RESET", 10, " OR REMOVE POWER", 10, " CHIP ID: ", 0 256 | _vermsg: .ASC " VERIFYING ...", 0 257 | _vererr: .ASC " DATA FAILED TO VERIFY", 10, " PRESS A TO TRY AGAIN", 10, " DO NOT REMOVE POWER!", 10, " AT ", 0 258 | _success: .ASC " SUCCESS!", 10, " CYCLE POWER TO LOAD", 10, " NEW FIRMWARE", 0 259 | _readmsg: .ASC " READ ", 0 260 | _insteadmsg: .ASC 10, " INSTEAD OF ", 0 261 | _nofirm: .ASC "SNESCART.BIN", 10, "NOT FOUND", 10, "OR INVALID", 0 262 | _flashname: .DB 'S', 0, 'N', 0, 'E', 0, 'S', 0, 'C', 0, 'A', 0, 'R', 0, 'T', 0, '.', 0, 'B', 0, 'I', 0, 'N', 0, 0, 0 263 | .ENDS 264 | -------------------------------------------------------------------------------- /rom/main.asm: -------------------------------------------------------------------------------- 1 | .INCLUDE "dat.inc" 2 | 3 | .SECTION "CODE" 4 | fatal: jmp sdfatal 5 | main: 6 | -- jsr consinit 7 | rep #$30 8 | ldx #title 9 | jsr puts 10 | jsr box 11 | sep #$20 12 | lda #NOCARD 13 | bit SDSTAT 14 | beq ++ 15 | ldx #nocard 16 | jsr puts 17 | lda #NOCARD 18 | - bit SDSTAT 19 | bne - 20 | jsr box 21 | bra + 22 | ++ lda #RESETCMD 23 | sta SDCMD 24 | + ldx #busystr 25 | jsr puts 26 | rep #$20 27 | jsr busy 28 | jsr sramflush 29 | jsr sramdis 30 | jsr sramflush 31 | jsr mbr 32 | jsr initfat 33 | jsr endbox 34 | jsr redraw 35 | 36 | poll rep #$30 37 | wai 38 | - bit cardsw-1 39 | bmi -- 40 | lda btn 41 | beq - 42 | pea poll-1 43 | bit #BTNUP 44 | bne _up 45 | bit #BTNDOWN 46 | bne _down 47 | bit #BTNA 48 | bne loadgame 49 | bit #BTNB 50 | beq + 51 | jmp parent 52 | + lda $4218 53 | and #BTNFLASH 54 | eor #BTNFLASH 55 | bne + 56 | jmp flash 57 | + rts 58 | _up ldy sel 59 | jsr prevshown 60 | sty sel 61 | cpy #0 62 | bpl + 63 | tya 64 | clc 65 | adc scrtop 66 | sta scrtop 67 | stz sel 68 | + jmp redraw 69 | _down ldy sel 70 | jsr nextshown 71 | sty sel 72 | cpy scrbot 73 | bcc + 74 | beq + 75 | ldy #0 76 | jsr nextshown 77 | tya 78 | sta tmp 79 | clc 80 | adc scrtop 81 | sta scrtop 82 | lda sel 83 | sec 84 | sbc tmp 85 | sta sel 86 | + jmp redraw 87 | 88 | loadgame: 89 | rep #$30 90 | jsr box 91 | ldx #busystr 92 | jsr puts 93 | sep #$20 94 | stz gamectl 95 | jsr readheader 96 | bcs + 97 | sep #$20 98 | lda HEAD+$1D5 99 | and #$EF 100 | cmp #$20 101 | beq ++ 102 | lda #HIROM 103 | sta gamectl 104 | jsr readheader 105 | bcs + 106 | sep #$20 107 | lda HEAD+$1D5 108 | and #$EF 109 | cmp #$21 110 | beq ++ 111 | rep #$30 112 | jsr box 113 | - ldx #_hdmsg 114 | jsr puts 115 | jmp confirm 116 | + rts 117 | ++ rep #$30 118 | jsr box 119 | ldx #(HEAD+$1C0)&$FFFF 120 | ldy #buf 121 | lda #20 122 | mvn $00, HEAD>>16 123 | lda #$000A 124 | sta buf+21 125 | ldx #buf 126 | jsr puts 127 | jsr romregion 128 | jsr parseheader 129 | bcc + 130 | jmp confirm 131 | + jsr waitkey 132 | bcc + 133 | rts 134 | + and #BTNA 135 | bne + 136 | jmp endbox 137 | + jsr box 138 | ldx #busystr 139 | jsr puts 140 | lda #SAVERAM 141 | bit gamectl 142 | beq + 143 | lda rammask 144 | beq + 145 | jsr loadsave 146 | bcc + 147 | lda #SAVERAM 148 | trb gamectl 149 | lda #BTNA 150 | bit key 151 | bne + 152 | jmp endbox 153 | + jsr readrom 154 | bcc + 155 | jsr endbox 156 | rts 157 | + jsr endbox 158 | 159 | rep #$30 160 | ldx #gamestart 161 | ldy #buf 162 | lda #gameend-gamestart 163 | mvn $00, $00 164 | 165 | sep #$20 166 | stz $4200 167 | stz $420c 168 | lda $4210 169 | 170 | lda #SAVERAM 171 | bit gamectl 172 | beq + 173 | rep #$20 174 | lda #MAGIC 175 | sta LOCK 176 | sep #$20 177 | lda dmactrl 178 | ora #SAVERAM 179 | sta DMACTRL 180 | rep #$20 181 | stz LOCK 182 | 183 | + rep #$20 184 | lda rommask 185 | sta ROMMASK 186 | lda rammask 187 | sta RAMMASK 188 | jmp buf 189 | 190 | romregion: 191 | php 192 | sep #$20 193 | rep #$10 194 | lda HEAD+$1D9 195 | cmp #$E 196 | bcc + 197 | ldx #_unk 198 | - jsr puts 199 | plp 200 | rts 201 | + cmp #$D 202 | beq + 203 | cmp #$2 204 | bcc + 205 | ldx #_pal 206 | bra - 207 | + ldx #_ntsc 208 | bra - 209 | _unk: .ASC "???", 10, 0 210 | _pal: .ASC "PAL", 10, 0 211 | _ntsc: .ASC "NTSC", 10, 0 212 | 213 | mask: 214 | php 215 | rep #$30 216 | and #$FF 217 | beq + 218 | tax 219 | lda #$4 220 | - asl 221 | dex 222 | bne - 223 | dea 224 | + plp 225 | rts 226 | 227 | parseheader: 228 | php 229 | rep #$30 230 | lda HEAD+$1D7 231 | and #$FF 232 | bne ++ 233 | ldx #_hdmsg 234 | jsr puts 235 | bra + 236 | ++ cmp #ROMMAX+1 237 | bcc ++ 238 | ldx #_roml 239 | jsr puts 240 | bra + 241 | ++ jsr mask 242 | sta rommask 243 | lda HEAD+$1D8 244 | jsr mask 245 | cmp #NSRAM*2 246 | bcc ++ 247 | ldx #_raml 248 | jsr puts 249 | bra + 250 | ++ sta rammask 251 | sep #$20 252 | lda HEAD+$1D6 253 | cmp #$3 254 | bcs + 255 | cmp #$2 256 | bne ++ 257 | lda #SAVERAM 258 | tsb gamectl 259 | ++ lda #ROMDIS 260 | tsb gamectl 261 | plp 262 | clc 263 | rts 264 | + plp 265 | sec 266 | rts 267 | 268 | waitkey: 269 | php 270 | rep #$20 271 | wai 272 | lda #(BTNA|BTNB) 273 | - bit cardsw-1 274 | bmi + 275 | bit btn 276 | beq - 277 | lda btn 278 | sta key 279 | wai 280 | plp 281 | clc 282 | rts 283 | + stz key 284 | plp 285 | sec 286 | rts 287 | 288 | 289 | confirm: 290 | jsr waitkey 291 | jsr endbox 292 | sec 293 | rts 294 | 295 | loadsave: 296 | jsr filename 297 | jsr modname 298 | jsr openfile 299 | bcc + 300 | jsr createfile 301 | + jsr checkclust 302 | bcs + 303 | jsr readin 304 | bcs + 305 | clc 306 | rts 307 | + sec 308 | rts 309 | 310 | gamestart: 311 | sep #$30 312 | lda gamectl 313 | sta DMACTRL 314 | sec 315 | xce 316 | jmp ($FFFC) 317 | gameend: 318 | 319 | title: .ASC 10, " SNES FLASH CART", 0 320 | busystr: .ASC "BUSY", 10, 0 321 | _hdmsg: .ASC 10, "INVALID HEADER", 0 322 | _roml: .ASC 10, "GAME REQUIRES", 10, "TOO MUCH ROM", 0 323 | _raml: .ASC 10, "GAME REQUIRES", 10, "TOO MUCH SRAM", 0 324 | .ENDS 325 | -------------------------------------------------------------------------------- /rom/cons.asm: -------------------------------------------------------------------------------- 1 | .INCLUDE "dat.inc" 2 | 3 | digits: .db "0123456789abcdef" 4 | palette: .dw 0, $FFFF, $FFFF, $FFFF, 0, $FFFF, $FFFF, $FFFF 5 | 6 | consinit: 7 | sep #$30 8 | stz attrib 9 | stz window 10 | stz baron 11 | rep #$10 12 | lda #pic 15 | sta pos+1 16 | lda #$7F 17 | sta pos+2 18 | rep #$30 19 | ldx #PICSIZ 20 | lda #$00 21 | - sta [pos] 22 | inc pos 23 | inc pos 24 | dex 25 | bne - 26 | lda #pic & $FFFF 27 | sta pos 28 | 29 | stz $2121 30 | stz $4300 31 | lda #$22 32 | sta $4301 33 | stz $4304 34 | rep #$20 35 | lda #palette 36 | sta $4302 37 | lda #16 38 | sta $4305 39 | sep #$20 40 | lda #1 41 | sta $420b 42 | 43 | lda #$ff 44 | sta $2112 45 | sta $2112 46 | 47 | stz $2116 48 | stz $2117 49 | 50 | lda #$1 51 | sta $2105 52 | lda #$4 53 | sta $210c 54 | lda #$4 55 | sta $212c 56 | 57 | lda #$20 58 | sta $2131 59 | lda #$EC 60 | sta $2132 61 | lda #$20 62 | sta $2125 63 | lda #$01 64 | sta $4370 65 | lda #$26 66 | sta $4371 67 | lda #windowdata 70 | sta $4373 71 | stz $4374 72 | lda #$80 73 | sta $420c 74 | 75 | stz update 76 | 77 | lda #$81 78 | sta $4200 79 | 80 | lda #$f 81 | sta $2100 82 | rts 83 | 84 | vblank: 85 | rep #$30 86 | pha 87 | phx 88 | phy 89 | phb 90 | phk 91 | plb 92 | 93 | sep #$20 94 | lda #NOCARD 95 | bit SDSTAT 96 | beq + 97 | dec cardsw 98 | + rep #$20 99 | 100 | jsr region 101 | 102 | stz $2116 103 | stz $2117 104 | lda #$1801 105 | sta $4300 106 | lda #$7F00 107 | sta $4303 108 | lda #pic & $FFFF 109 | sta $4302 110 | lda #PICSIZ 111 | sta $4305 112 | sep #$20 113 | lda update 114 | bne + 115 | lda #$01 116 | sta $420b 117 | + 118 | lda window 119 | ora baron 120 | and #$20 121 | eor #$30 122 | sta $2130 123 | 124 | lda #1 125 | - bit $4212 126 | bne - 127 | rep #$20 128 | lda $4218 129 | bit #$F 130 | beq + 131 | lda #$0 132 | + pha 133 | and bmask 134 | sta btn 135 | pla 136 | eor #$ffff 137 | sta bmask 138 | 139 | rep #$30 140 | plb 141 | ply 142 | plx 143 | pla 144 | noop rti 145 | 146 | region: 147 | rep #$10 148 | sep #$20 149 | lda #$00 150 | xba 151 | lda $213f 152 | and #$10 153 | lsr 154 | rep #$20 155 | adc #_reg 156 | tax 157 | ldy #(pic + REGLOC) & $FFFF 158 | lda #7 159 | phb 160 | mvn $7F, $00 161 | plb 162 | rts 163 | _reg: .DB 'N', 0, 'T', 0, 'S', 0, 'C', 0 164 | .DB 'P', 0, 'A', 0, 'L', 0, 0, 0 165 | 166 | return: 167 | php 168 | rep #$20 169 | stz pos 170 | plp 171 | rts 172 | 173 | putc: 174 | php 175 | sep #$20 176 | cmp #$A 177 | beq newline 178 | xba 179 | lda attrib 180 | xba 181 | rep #$20 182 | sta [pos] 183 | inc pos 184 | inc pos 185 | plp 186 | rts 187 | newline: 188 | rep #$20 189 | lda pos 190 | clc 191 | adc #$40 192 | and #$FFC0 193 | sep #$20 194 | bit window 195 | rep #$20 196 | bpl + 197 | clc 198 | adc #BOXL*2 199 | + sta pos 200 | plp 201 | rts 202 | 203 | puts: 204 | php 205 | rep #$20 206 | pha 207 | sep #$20 208 | - lda $00,x 209 | beq + 210 | jsr putc 211 | inx 212 | bra - 213 | + rep #$20 214 | pla 215 | plp 216 | rts 217 | 218 | putbyte: 219 | pha 220 | phx 221 | php 222 | sep #$30 223 | pha 224 | lsr 225 | lsr 226 | lsr 227 | lsr 228 | tax 229 | lda digits.w,x 230 | jsr putc 231 | pla 232 | and #$F 233 | tax 234 | lda digits.w,x 235 | jsr putc 236 | plp 237 | plx 238 | pla 239 | rts 240 | 241 | putword: 242 | php 243 | rep #$20 244 | pha 245 | xba 246 | jsr putbyte 247 | xba 248 | jsr putbyte 249 | pla 250 | plp 251 | rts 252 | 253 | clrline: 254 | php 255 | rep #$20 256 | lda pos 257 | pha 258 | and #$FFC0 259 | sta pos 260 | sep #$30 261 | ldx #$20 262 | - lda #$20 263 | jsr putc 264 | dex 265 | bne - 266 | rep #$20 267 | pla 268 | sta pos 269 | plp 270 | rts 271 | 272 | clrscreen: 273 | php 274 | rep #$30 275 | inc update 276 | ldx #0 277 | lda #0 278 | - sta pic,x 279 | inx 280 | inx 281 | cpx #PICSIZ 282 | bne - 283 | dec update 284 | plp 285 | rts 286 | 287 | move: 288 | php 289 | rep #$20 290 | txa 291 | sep #$20 292 | sta tmp 293 | lda #$00 294 | sta tmp+1 295 | xba 296 | rep #$20 297 | asl 298 | asl 299 | asl 300 | asl 301 | asl 302 | clc 303 | adc tmp 304 | asl 305 | clc 306 | adc #pic & $FFFF 307 | sta pos 308 | plp 309 | rts 310 | 311 | xmove: 312 | php 313 | rep #$20 314 | lda pos 315 | and #$FFC0 316 | sta pos 317 | txa 318 | and #$1F 319 | asl 320 | ora pos 321 | sta pos 322 | plp 323 | rts 324 | 325 | box: 326 | php 327 | sep #$20 328 | lda baron 329 | beq + 330 | jsr endbar 331 | + lda window 332 | bne + 333 | dec window 334 | rep #$30 335 | lda #PICSIZ-1 336 | ldx #pic & $FFFF 337 | ldy #picbak & $FFFF 338 | phb 339 | mvn $7F, $7F 340 | plb 341 | + rep #$30 342 | ldx #BOX 343 | phx 344 | sep #$20 345 | lda #BOXH 346 | sta tmp2 347 | -- jsr move 348 | ldy #BOXW 349 | - lda #$00 350 | jsr putc 351 | dey 352 | bne - 353 | rep #$20 354 | txa 355 | clc 356 | adc #$100 357 | tax 358 | sep #$20 359 | dec tmp2 360 | bne -- 361 | plx 362 | jsr move 363 | plp 364 | rts 365 | 366 | endbox: 367 | php 368 | sep #$20 369 | lda #$FF 370 | trb window 371 | beq + 372 | rep #$30 373 | lda #PICSIZ-1 374 | ldx #picbak & $FFFF 375 | ldy #pic & $FFFF 376 | phb 377 | mvn $7F, $7F 378 | plb 379 | + plp 380 | rts 381 | 382 | bar: 383 | php 384 | rep #$30 385 | ldx #bardata 386 | ldy #buf2 387 | lda #10 388 | mvn 0, 0 389 | sep #$20 390 | lda #buf2 393 | sta $4373 394 | dec baron 395 | 396 | rep #$20 397 | sep #$10 398 | ldx clsh 399 | lda #BARW*2 400 | - asl 401 | dex 402 | bne - 403 | sta progst 404 | stz prog 405 | plp 406 | rts 407 | 408 | showprog: 409 | php 410 | rep #$20 411 | lda prog 412 | adc progst 413 | - sec 414 | sbc size+1 415 | bcc + 416 | inc buf2+5 417 | bra - 418 | + adc size+1 419 | sta prog 420 | plp 421 | rts 422 | 423 | endbar: 424 | php 425 | sep #$20 426 | stz baron 427 | wai 428 | lda #windowdata 431 | sta $4373 432 | plp 433 | rts 434 | 435 | windowdata: 436 | .db BOXT*8-1, $FF, $00 437 | .db BOXH*8, BOXL*8, (BOXL+BOXW)*8 438 | .db $01, $FF, $00 439 | .db $00 440 | 441 | bardata: 442 | .db BART-1, $FF, $00 443 | .db BARH, BARL, BARL-1 444 | .db $01, $FF, $00 445 | .db $00 446 | 447 | nope: 448 | rep #$10 449 | ldx #_error 450 | jsr puts 451 | jmp loop 452 | _error: .ASC 10, "ERROR", 0 453 | -------------------------------------------------------------------------------- /vhdl/rom.vhd: -------------------------------------------------------------------------------- 1 | -- megafunction wizard: %RAM: 1-PORT% 2 | -- GENERATION: STANDARD 3 | -- VERSION: WM1.0 4 | -- MODULE: altsyncram 5 | 6 | -- ============================================================ 7 | -- File Name: rom.vhd 8 | -- Megafunction Name(s): 9 | -- altsyncram 10 | -- 11 | -- Simulation Library Files(s): 12 | -- altera_mf 13 | -- ============================================================ 14 | -- ************************************************************ 15 | -- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! 16 | -- 17 | -- 13.1.0 Build 162 10/23/2013 SJ Web Edition 18 | -- ************************************************************ 19 | 20 | 21 | --Copyright (C) 1991-2013 Altera Corporation 22 | --Your use of Altera Corporation's design tools, logic functions 23 | --and other software and tools, and its AMPP partner logic 24 | --functions, and any output files from any of the foregoing 25 | --(including device programming or simulation files), and any 26 | --associated documentation or information are expressly subject 27 | --to the terms and conditions of the Altera Program License 28 | --Subscription Agreement, Altera MegaCore Function License 29 | --Agreement, or other applicable license agreement, including, 30 | --without limitation, that your use is for the sole purpose of 31 | --programming logic devices manufactured by Altera and sold by 32 | --Altera or its authorized distributors. Please refer to the 33 | --applicable agreement for further details. 34 | 35 | 36 | LIBRARY ieee; 37 | USE ieee.std_logic_1164.all; 38 | 39 | LIBRARY altera_mf; 40 | USE altera_mf.altera_mf_components.all; 41 | 42 | ENTITY rom IS 43 | PORT 44 | ( 45 | address : IN STD_LOGIC_VECTOR (14 DOWNTO 0); 46 | clock : IN STD_LOGIC := '1'; 47 | data : IN STD_LOGIC_VECTOR (7 DOWNTO 0); 48 | wren : IN STD_LOGIC ; 49 | q : OUT STD_LOGIC_VECTOR (7 DOWNTO 0) 50 | ); 51 | END rom; 52 | 53 | 54 | ARCHITECTURE SYN OF rom IS 55 | 56 | SIGNAL sub_wire0 : STD_LOGIC_VECTOR (7 DOWNTO 0); 57 | 58 | BEGIN 59 | q <= sub_wire0(7 DOWNTO 0); 60 | 61 | altsyncram_component : altsyncram 62 | GENERIC MAP ( 63 | clock_enable_input_a => "BYPASS", 64 | clock_enable_output_a => "BYPASS", 65 | init_file => "rom.mif", 66 | intended_device_family => "Cyclone III", 67 | lpm_hint => "ENABLE_RUNTIME_MOD=YES,INSTANCE_NAME=rom", 68 | lpm_type => "altsyncram", 69 | numwords_a => 32768, 70 | operation_mode => "SINGLE_PORT", 71 | outdata_aclr_a => "NONE", 72 | outdata_reg_a => "CLOCK0", 73 | power_up_uninitialized => "FALSE", 74 | read_during_write_mode_port_a => "NEW_DATA_NO_NBE_READ", 75 | widthad_a => 15, 76 | width_a => 8, 77 | width_byteena_a => 1 78 | ) 79 | PORT MAP ( 80 | address_a => address, 81 | clock0 => clock, 82 | data_a => data, 83 | wren_a => wren, 84 | q_a => sub_wire0 85 | ); 86 | 87 | 88 | 89 | END SYN; 90 | 91 | -- ============================================================ 92 | -- CNX file retrieval info 93 | -- ============================================================ 94 | -- Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0" 95 | -- Retrieval info: PRIVATE: AclrAddr NUMERIC "0" 96 | -- Retrieval info: PRIVATE: AclrByte NUMERIC "0" 97 | -- Retrieval info: PRIVATE: AclrData NUMERIC "0" 98 | -- Retrieval info: PRIVATE: AclrOutput NUMERIC "0" 99 | -- Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC "0" 100 | -- Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8" 101 | -- Retrieval info: PRIVATE: BlankMemory NUMERIC "0" 102 | -- Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0" 103 | -- Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0" 104 | -- Retrieval info: PRIVATE: Clken NUMERIC "0" 105 | -- Retrieval info: PRIVATE: DataBusSeparated NUMERIC "1" 106 | -- Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC "0" 107 | -- Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_A" 108 | -- Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC "0" 109 | -- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III" 110 | -- Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "1" 111 | -- Retrieval info: PRIVATE: JTAG_ID STRING "rom" 112 | -- Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0" 113 | -- Retrieval info: PRIVATE: MIFfilename STRING "rom.mif" 114 | -- Retrieval info: PRIVATE: NUMWORDS_A NUMERIC "32768" 115 | -- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" 116 | -- Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC "3" 117 | -- Retrieval info: PRIVATE: RegAddr NUMERIC "1" 118 | -- Retrieval info: PRIVATE: RegData NUMERIC "1" 119 | -- Retrieval info: PRIVATE: RegOutput NUMERIC "1" 120 | -- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" 121 | -- Retrieval info: PRIVATE: SingleClock NUMERIC "1" 122 | -- Retrieval info: PRIVATE: UseDQRAM NUMERIC "1" 123 | -- Retrieval info: PRIVATE: WRCONTROL_ACLR_A NUMERIC "0" 124 | -- Retrieval info: PRIVATE: WidthAddr NUMERIC "15" 125 | -- Retrieval info: PRIVATE: WidthData NUMERIC "8" 126 | -- Retrieval info: PRIVATE: rden NUMERIC "0" 127 | -- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all 128 | -- Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS" 129 | -- Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS" 130 | -- Retrieval info: CONSTANT: INIT_FILE STRING "rom.mif" 131 | -- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III" 132 | -- Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=YES,INSTANCE_NAME=rom" 133 | -- Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram" 134 | -- Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "32768" 135 | -- Retrieval info: CONSTANT: OPERATION_MODE STRING "SINGLE_PORT" 136 | -- Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE" 137 | -- Retrieval info: CONSTANT: OUTDATA_REG_A STRING "CLOCK0" 138 | -- Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING "FALSE" 139 | -- Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING "NEW_DATA_NO_NBE_READ" 140 | -- Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "15" 141 | -- Retrieval info: CONSTANT: WIDTH_A NUMERIC "8" 142 | -- Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1" 143 | -- Retrieval info: USED_PORT: address 0 0 15 0 INPUT NODEFVAL "address[14..0]" 144 | -- Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC "clock" 145 | -- Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL "data[7..0]" 146 | -- Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]" 147 | -- Retrieval info: USED_PORT: wren 0 0 0 0 INPUT NODEFVAL "wren" 148 | -- Retrieval info: CONNECT: @address_a 0 0 15 0 address 0 0 15 0 149 | -- Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0 150 | -- Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0 151 | -- Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0 152 | -- Retrieval info: CONNECT: q 0 0 8 0 @q_a 0 0 8 0 153 | -- Retrieval info: GEN_FILE: TYPE_NORMAL rom.vhd TRUE 154 | -- Retrieval info: GEN_FILE: TYPE_NORMAL rom.inc FALSE 155 | -- Retrieval info: GEN_FILE: TYPE_NORMAL rom.cmp FALSE 156 | -- Retrieval info: GEN_FILE: TYPE_NORMAL rom.bsf FALSE 157 | -- Retrieval info: GEN_FILE: TYPE_NORMAL rom_inst.vhd FALSE 158 | -- Retrieval info: LIB_FILE: altera_mf 159 | -------------------------------------------------------------------------------- /vhdl/dma.vhdl: -------------------------------------------------------------------------------- 1 | library ieee; 2 | use ieee.std_logic_1164.all; 3 | use ieee.numeric_std.all; 4 | 5 | entity dma is 6 | port( 7 | clk : in std_logic; 8 | snesreset : in std_logic; 9 | 10 | addr : in unsigned(23 downto 0); 11 | datin : in unsigned(7 downto 0); 12 | datout : out unsigned(7 downto 0); 13 | 14 | rd, wr, cart : in std_logic; 15 | 16 | romaddr : out unsigned(22 downto 0); 17 | dmaaddr : buffer unsigned(22 downto 0); 18 | 19 | memen, sden, dmaen : out std_logic; 20 | memmode : buffer std_logic; 21 | 22 | txstart, txstep : in std_logic; 23 | txdata : in unsigned(7 downto 0); 24 | 25 | txinstart : out std_logic; 26 | txindata : out unsigned(7 downto 0); 27 | wrblk : out unsigned(31 downto 0); 28 | 29 | txdone, txerr, card : in std_logic; 30 | 31 | spice : out std_logic := '1'; 32 | spisck, spisi : out std_logic := '0'; 33 | spiso : in std_logic 34 | ); 35 | end dma; 36 | 37 | architecture main of dma is 38 | signal hirom, booten, sramen, regen, bat, armed1, armed2 : std_logic; 39 | signal romaddr0, rommask : unsigned(22 downto 0); 40 | signal rammask, ramaddr0, ramaddr, curaddr : unsigned(15 downto 0); 41 | signal regout, ramout : unsigned(7 downto 0); 42 | 43 | type state_t is (IDLE, READBLK, CHECKBLK, WRITEBLK, WAITDONE); 44 | signal state : state_t; 45 | constant nsram : integer := 16; 46 | type sram_t is array(0 to (512 * nsram - 1)) of unsigned(7 downto 0); 47 | signal sram : sram_t; 48 | signal dirty : unsigned(nsram - 1 downto 0) := (others => '0'); 49 | signal writeout : std_logic := '0'; 50 | type blocks_t is array(0 to nsram - 1) of unsigned(31 downto 0); 51 | signal blocks : blocks_t := (others => (others => '1')); 52 | signal blk : unsigned(23 downto 0); 53 | signal nblk : unsigned(7 downto 0); 54 | 55 | constant SAVETIME : integer := 100000000 / 2; 56 | signal saveclk : integer := 0; 57 | signal flush : std_logic; 58 | 59 | signal spibuf : unsigned(7 downto 0); 60 | signal spictr : unsigned(4 downto 0); 61 | begin 62 | process 63 | begin 64 | wait until rising_edge(clk); 65 | 66 | flush <= '0'; 67 | if wr = '1' and regen = '1' then 68 | case to_integer(addr(3 downto 0)) is 69 | when 0 => 70 | memmode <= datin(0); 71 | booten <= not datin(1); 72 | hirom <= datin(2); 73 | if armed1 = '1' and armed2 = '1' then 74 | bat <= datin(3); 75 | end if; 76 | if datin(4) = '1' then 77 | flush <= '1'; 78 | end if; 79 | spice <= not datin(5); 80 | when 1 => 81 | dmaaddr(15 downto 8) <= datin; 82 | when 2 => 83 | dmaaddr(22 downto 16) <= datin(6 downto 0); 84 | when 3 => 85 | rommask(15 downto 8) <= datin; 86 | when 4 => 87 | rommask(22 downto 16) <= datin(6 downto 0); 88 | when 5 => 89 | rammask(15 downto 8) <= datin; 90 | when 6 => 91 | nblk <= datin; 92 | when 7 => 93 | if armed1 = '1' and armed2 = '1' then 94 | blk(7 downto 0) <= datin; 95 | end if; 96 | when 8 => 97 | if armed1 = '1' and armed2 = '1' then 98 | blk(15 downto 8) <= datin; 99 | end if; 100 | when 9 => 101 | if armed1 = '1' and armed2 = '1' then 102 | blk(23 downto 16) <= datin; 103 | end if; 104 | when 10 => 105 | if armed1 = '1' and armed2 = '1' then 106 | blocks(to_integer(nblk)) <= datin & blk; 107 | end if; 108 | when 11 => 109 | if datin = X"37" then 110 | armed1 <= '1'; 111 | else 112 | armed1 <= '0'; 113 | end if; 114 | when 12 => 115 | if datin = X"13" then 116 | armed2 <= '1'; 117 | else 118 | armed2 <= '0'; 119 | end if; 120 | when others => 121 | end case; 122 | end if; 123 | 124 | if snesreset = '0' then 125 | armed1 <= '0'; 126 | armed2 <= '0'; 127 | booten <= '1'; 128 | spice <= '1'; 129 | rommask(22 downto 8) <= (others => '1'); 130 | end if; 131 | if card = '0' then 132 | bat <= '0'; 133 | end if; 134 | end process; 135 | 136 | process 137 | begin 138 | wait until rising_edge(clk); 139 | 140 | if rd = '1' and regen = '1' then 141 | regout <= (others => '0'); 142 | case to_integer(addr(3 downto 0)) is 143 | when 0 => 144 | if state /= IDLE then 145 | regout(7) <= '0'; 146 | else 147 | regout(7) <= '1'; 148 | end if; 149 | when 6 => 150 | regout <= nblk; 151 | when 13 => 152 | regout <= spibuf; 153 | when others => 154 | end case; 155 | end if; 156 | end process; 157 | 158 | process 159 | begin 160 | wait until rising_edge(clk); 161 | 162 | ramout <= sram(to_integer(ramaddr)); 163 | txindata <= sram(to_integer(curaddr)); 164 | wrblk <= blocks(to_integer(curaddr(15 downto 9))); 165 | if wr = '1' and sramen = '1' then 166 | sram(to_integer(ramaddr)) <= datin; 167 | end if; 168 | if bat = '1' and saveclk = 0 and dirty /= (nsram - 1 downto 0 => '0') and state = IDLE then 169 | saveclk <= SAVETIME; 170 | end if; 171 | if saveclk /= 0 then 172 | saveclk <= saveclk - 1; 173 | end if; 174 | if flush = '1' then 175 | saveclk <= 0; 176 | end if; 177 | end process; 178 | 179 | process 180 | variable ctr : integer; 181 | begin 182 | wait until rising_edge(clk); 183 | 184 | case state is 185 | when IDLE => 186 | txinstart <= '0'; 187 | if txstart = '1' and memmode = '0' then 188 | curaddr <= dmaaddr(15 downto 0); 189 | dirty(to_integer(dmaaddr(15 downto 9))) <= '0'; 190 | state <= READBLK; 191 | end if; 192 | if writeout = '1' then 193 | state <= CHECKBLK; 194 | curaddr <= (others => '0'); 195 | writeout <= '0'; 196 | end if; 197 | when READBLK => 198 | if txstep = '1' then 199 | sram(to_integer(curaddr)) <= txdata; 200 | curaddr <= curaddr + 1; 201 | end if; 202 | if txstart = '0' then 203 | state <= IDLE; 204 | end if; 205 | when CHECKBLK => 206 | ctr := to_integer(curaddr(15 downto 9)); 207 | if ctr = nsram then 208 | state <= IDLE; 209 | txinstart <= '0'; 210 | elsif dirty(ctr) = '1' then 211 | dirty(ctr) <= '0'; 212 | state <= WRITEBLK; 213 | curaddr(8 downto 0) <= (others => '0'); 214 | txinstart <= '1'; 215 | else 216 | txinstart <= '0'; 217 | curaddr <= curaddr + X"0200"; 218 | end if; 219 | when WRITEBLK => 220 | if txstep = '1' then 221 | curaddr(8 downto 0) <= curaddr(8 downto 0) + 1; 222 | if curaddr(8 downto 0) = "111111111" then 223 | state <= WAITDONE; 224 | txinstart <= '0'; 225 | end if; 226 | end if; 227 | if txdone = '1' then 228 | state <= WAITDONE; 229 | end if; 230 | when WAITDONE => 231 | if txdone = '1' then 232 | if txerr = '1' then 233 | dirty(to_integer(curaddr(15 downto 9))) <= '1'; 234 | end if; 235 | curaddr <= curaddr + X"0200"; 236 | state <= CHECKBLK; 237 | end if; 238 | end case; 239 | if bat = '1' and (saveclk = 1 or flush = '1') then 240 | writeout <= '1'; 241 | else 242 | writeout <= '0'; 243 | end if; 244 | if wr = '1' and sramen = '1' then 245 | dirty(to_integer(ramaddr(15 downto 9))) <= '1'; 246 | end if; 247 | if bat = '0' and flush = '1' then 248 | dirty <= (others => '0'); 249 | end if; 250 | end process; 251 | 252 | rammask(7 downto 0) <= (others => '1'); 253 | rommask(7 downto 0) <= (others => '1'); 254 | dmaaddr(7 downto 0) <= (others => '0'); 255 | 256 | romaddr0 <= addr(23) & addr(21 downto 0) when hirom = '1' else addr(23 downto 16) & addr(14 downto 0); 257 | romaddr <= romaddr0 and rommask; 258 | ramaddr0 <= addr(18 downto 16) & addr(12 downto 0) when hirom = '1' else addr(16) & addr(14 downto 0); 259 | ramaddr <= ramaddr0 and rammask; 260 | 261 | datout <= regout when regen = '1' else ramout; 262 | sden <= booten when (addr and X"40FFF0") = X"003000" else '0'; 263 | regen <= booten when (addr and X"40FFF0") = X"003010" else '0'; 264 | sramen <= snesreset and addr(21) and 265 | ((hirom and addr(14) and addr(13) and not addr(22) and not cart) or (not hirom and addr(20) and addr(22) and not addr(15) and cart)); 266 | dmaen <= regen or sramen; 267 | memen <= (rd and cart) when booten = '0' or addr(23 downto 16) /= "00000000" else '0'; 268 | 269 | process 270 | begin 271 | wait until rising_edge(clk); 272 | 273 | if spictr /= "00000" then 274 | case spictr(1 downto 0) is 275 | when "00" => 276 | when "01" => 277 | spisck <= '1'; 278 | when "10" => 279 | spibuf <= spibuf(6 downto 0) & spiso; 280 | when "11" => 281 | spisi <= spibuf(7); 282 | spisck <= '0'; 283 | end case; 284 | spictr <= spictr + 1; 285 | elsif wr = '1' and regen = '1' and addr(3 downto 0) = X"D" then 286 | spictr <= spictr + 1; 287 | spisi <= datin(7); 288 | spibuf <= datin; 289 | end if; 290 | end process; 291 | end main; -------------------------------------------------------------------------------- /vhdl/cic.vhdl: -------------------------------------------------------------------------------- 1 | library ieee; 2 | use ieee.std_logic_1164.all; 3 | use ieee.numeric_std.all; 4 | 5 | entity cic is 6 | port( 7 | clk : in std_logic; 8 | reset, cicin : in std_logic; 9 | cicout : out std_logic 10 | ); 11 | end cic; 12 | 13 | architecture main of cic is 14 | signal a, x, bl, p0 : unsigned(3 downto 0) := X"0"; 15 | signal bm, sp, pch : unsigned(1 downto 0) := "00"; 16 | signal pc : unsigned(9 downto 0) := (others => '0'); 17 | signal carry : unsigned(0 downto 0) := "0"; 18 | 19 | signal b : integer; 20 | type ram_t is array(0 to 31) of unsigned(3 downto 0); 21 | signal mem : ram_t; 22 | type stack_t is array(0 to 3) of unsigned(9 downto 0); 23 | signal stack : stack_t; 24 | type rom_t is array(0 to 511) of unsigned(7 downto 0); 25 | signal rom : rom_t := ( 26 | X"00", X"80", X"78", X"cb", X"21", X"00", X"46", X"27", X"00", X"35", X"00", X"d3", X"75", X"31", X"7c", X"4a", 27 | X"21", X"00", X"a1", X"30", X"c1", X"00", X"01", X"70", X"00", X"d4", X"21", X"41", X"46", X"00", X"34", X"70", 28 | X"20", X"30", X"00", X"34", X"9b", X"fa", X"48", X"30", X"c1", X"93", X"00", X"00", X"00", X"5d", X"79", X"21", 29 | X"e1", X"00", X"67", X"00", X"01", X"46", X"3d", X"2e", X"30", X"00", X"46", X"21", X"fd", X"62", X"31", X"46", 30 | X"7c", X"33", X"e4", X"3c", X"00", X"4c", X"21", X"46", X"46", X"73", X"7d", X"20", X"00", X"2b", X"4c", X"43", 31 | X"46", X"4a", X"42", X"5d", X"33", X"00", X"00", X"46", X"00", X"00", X"b4", X"38", X"42", X"46", X"32", X"55", 32 | X"27", X"01", X"00", X"74", X"00", X"55", X"00", X"55", X"75", X"30", X"20", X"00", X"ae", X"42", X"b8", X"67", 33 | X"30", X"2b", X"00", X"66", X"21", X"30", X"31", X"f6", X"23", X"de", X"30", X"75", X"46", X"21", X"20", X"80", 34 | X"00", X"80", X"80", X"bd", X"bf", X"00", X"d7", X"61", X"55", X"10", X"00", X"00", X"23", X"60", X"d9", X"a1", 35 | X"df", X"00", X"5d", X"55", X"5d", X"00", X"00", X"46", X"7d", X"4a", X"d9", X"23", X"46", X"7c", X"01", X"7c", 36 | X"d9", X"5d", X"00", X"20", X"6c", X"46", X"5c", X"00", X"f5", X"68", X"00", X"74", X"7d", X"00", X"41", X"dd", 37 | X"7c", X"74", X"47", X"4c", X"4c", X"7c", X"40", X"7d", X"f0", X"41", X"b0", X"d7", X"d7", X"5d", X"cb", X"5c", 38 | X"30", X"7c", X"fe", X"d7", X"21", X"00", X"55", X"7c", X"20", X"41", X"41", X"00", X"fa", X"41", X"00", X"b1", 39 | X"60", X"64", X"64", X"47", X"61", X"4c", X"fa", X"78", X"d9", X"75", X"20", X"f0", X"7d", X"30", X"65", X"74", 40 | X"21", X"bd", X"4c", X"4a", X"4a", X"55", X"75", X"55", X"fa", X"21", X"c1", X"4b", X"61", X"27", X"f0", X"7d", 41 | X"46", X"7d", X"30", X"64", X"d7", X"60", X"fa", X"cb", X"80", X"de", X"00", X"75", X"fc", X"7d", X"31", X"80", 42 | X"00", X"80", X"78", X"74", X"42", X"fe", X"00", X"00", X"31", X"39", X"78", X"42", X"00", X"6a", X"c8", X"42", 43 | X"75", X"36", X"42", X"3d", X"31", X"41", X"3f", X"00", X"3b", X"68", X"65", X"3f", X"42", X"7c", X"3f", X"60", 44 | X"3b", X"41", X"42", X"da", X"36", X"3e", X"3a", X"42", X"69", X"3c", X"3c", X"3e", X"3d", X"37", X"6b", X"7c", 45 | X"21", X"42", X"65", X"30", X"35", X"da", X"42", X"42", X"3b", X"3a", X"30", X"da", X"61", X"42", X"31", X"21", 46 | X"78", X"21", X"38", X"83", X"42", X"31", X"7c", X"34", X"22", X"42", X"42", X"7c", X"31", X"42", X"31", X"30", 47 | X"42", X"65", X"42", X"38", X"00", X"42", X"42", X"c8", X"3f", X"42", X"42", X"38", X"42", X"65", X"30", X"31", 48 | X"80", X"75", X"3e", X"42", X"39", X"da", X"42", X"7c", X"31", X"42", X"7c", X"31", X"41", X"37", X"35", X"63", 49 | X"7d", X"36", X"42", X"c8", X"42", X"62", X"7c", X"30", X"fa", X"31", X"34", X"7c", X"e1", X"c8", X"75", X"80", 50 | X"00", X"80", X"78", X"69", X"00", X"00", X"d0", X"42", X"00", X"00", X"00", X"00", X"20", X"64", X"72", X"f4", 51 | X"00", X"00", X"00", X"00", X"00", X"00", X"00", X"ef", X"00", X"40", X"20", X"00", X"00", X"08", X"67", X"52", 52 | X"4c", X"00", X"00", X"37", X"00", X"00", X"00", X"00", X"30", X"00", X"00", X"00", X"00", X"00", X"4c", X"4a", 53 | X"72", X"00", X"57", X"00", X"00", X"55", X"00", X"00", X"00", X"00", X"42", X"5d", X"42", X"55", X"4a", X"2f", 54 | X"78", X"00", X"00", X"01", X"00", X"00", X"4a", X"4d", X"00", X"00", X"00", X"5d", X"00", X"00", X"00", X"72", 55 | X"68", X"60", X"00", X"00", X"4a", X"00", X"00", X"52", X"4a", X"00", X"00", X"00", X"00", X"0f", X"70", X"40", 56 | X"80", X"00", X"00", X"00", X"00", X"5c", X"00", X"54", X"6a", X"00", X"23", X"49", X"52", X"00", X"00", X"5c", 57 | X"74", X"00", X"00", X"42", X"4c", X"72", X"c3", X"48", X"7d", X"73", X"20", X"21", X"bf", X"72", X"75", X"80" 58 | ); 59 | signal loadpc, skip : std_logic; 60 | begin 61 | b <= to_integer(bm & bl); 62 | cicout <= p0(0); 63 | p0(1) <= cicin; 64 | p0(2) <= '0'; 65 | p0(3) <= '0'; 66 | process(clk) 67 | variable op : unsigned(7 downto 0); 68 | variable tmp : unsigned(4 downto 0); 69 | variable jumped : std_logic; 70 | begin 71 | if rising_edge(clk) then 72 | if loadpc = '1' then 73 | pc(8 downto 7) <= pch; 74 | pc(6 downto 0) <= rom(to_integer(pc))(6 downto 0); 75 | jumped := '1'; 76 | else 77 | jumped := '0'; 78 | skip <= '0'; 79 | end if; 80 | if reset = '1' then 81 | pc <= (others => '0'); 82 | jumped := '1'; 83 | skip <= '0'; 84 | end if; 85 | if loadpc = '1' or skip = '1' or reset = '1' then 86 | op := X"00"; 87 | else 88 | op := rom(to_integer(pc)); 89 | end if; 90 | loadpc <= '0'; 91 | case op(7 downto 4) is 92 | when X"0" => 93 | tmp := ('0' & a) + ('0' & op(3 downto 0)); 94 | a <= tmp(3 downto 0); 95 | skip <= tmp(4); 96 | when X"1" => 97 | if a = op(3 downto 0) then 98 | skip <= '1'; 99 | end if; 100 | when X"2" => 101 | bl <= op(3 downto 0); 102 | when X"3" => 103 | a <= op(3 downto 0); 104 | when X"4" | X"5" | X"6" | X"7" => 105 | case op is 106 | when X"40" => a <= mem(b); 107 | when X"41" => a <= mem(b); mem(b) <= a; 108 | when X"42" => 109 | a <= mem(b); 110 | mem(b) <= a; 111 | bl <= bl + 1; 112 | if bl = X"F" then 113 | skip <= '1'; 114 | end if; 115 | when X"43" => 116 | a <= mem(b); 117 | mem(b) <= a; 118 | bl <= bl - 1; 119 | if bl = X"0" then 120 | skip <= '1'; 121 | end if; 122 | when X"44" => a <= (not a) + 1; 123 | when X"46" => 124 | if bl = X"0" then 125 | p0(0) <= a(0); 126 | end if; 127 | when X"47" => 128 | if bl = X"0" then 129 | p0(0) <= '0'; 130 | end if; 131 | when X"48" => carry <= "1"; 132 | when X"49" => carry <= "0"; 133 | when X"4C" => 134 | pc <= stack(to_integer(sp)); 135 | jumped := '1'; 136 | sp <= sp + 1; 137 | when X"4D" => 138 | pc <= stack(to_integer(sp)); 139 | sp <= sp + 1; 140 | jumped := '1'; 141 | skip <= '1'; 142 | when X"52" => 143 | a <= mem(b); 144 | bl <= bl + 1; 145 | if bl = X"F" then 146 | skip <= '1'; 147 | end if; 148 | when X"55" => 149 | if bl = X"0" then 150 | a <= p0; 151 | else 152 | a <= X"0"; 153 | end if; 154 | when X"54" => a <= not a; 155 | when X"57" => a <= bl; bl <= a; 156 | when X"5C" => x <= a; 157 | when X"5D" => x <= a; a <= x; 158 | when X"60" => skip <= mem(b)(0); 159 | when X"61" => skip <= mem(b)(1); 160 | when X"62" => skip <= mem(b)(2); 161 | when X"63" => skip <= mem(b)(3); 162 | when X"64" => skip <= a(0); 163 | when X"65" => skip <= a(1); 164 | when X"66" => skip <= a(2); 165 | when X"67" => skip <= a(3); 166 | when X"68" => mem(b)(0) <= '0'; 167 | when X"69" => mem(b)(1) <= '0'; 168 | when X"6A" => mem(b)(2) <= '0'; 169 | when X"6B" => mem(b)(3) <= '0'; 170 | when X"6C" => mem(b)(0) <= '1'; 171 | when X"6D" => mem(b)(1) <= '1'; 172 | when X"6E" => mem(b)(2) <= '1'; 173 | when X"6F" => mem(b)(3) <= '1'; 174 | when X"70" => a <= a + mem(b); 175 | when X"72" => a <= a + mem(b) + carry; 176 | when X"73" => 177 | tmp := ('0' & a) + ('0' & mem(b)) + ("0000" & carry); 178 | a <= tmp(3 downto 0); 179 | skip <= tmp(4); 180 | when X"74" => bm <= "00"; 181 | when X"75" => bm <= "01"; 182 | when X"76" => bm <= "10"; 183 | when X"77" => bm <= "11"; 184 | when X"78" => pch <= "00"; loadpc <= '1'; 185 | when X"79" => pch <= "01"; loadpc <= '1'; 186 | when X"7a" => pch <= "10"; loadpc <= '1'; 187 | when X"7b" => pch <= "11"; loadpc <= '1'; 188 | when X"7c" | X"7d" | X"7e" | X"7f" => 189 | pch <= op(1 downto 0); 190 | loadpc <= '1'; 191 | stack(to_integer(sp - 1)) <= pc; 192 | sp <= sp - 1; 193 | when others => 194 | end case; 195 | when others => 196 | pc(6 downto 0) <= op(6 downto 0); 197 | jumped := '1'; 198 | end case; 199 | if jumped = '0' then 200 | pc(6 downto 0) <= (pc(0) xnor pc(1)) & pc(6 downto 1); 201 | end if; 202 | end if; 203 | end process; 204 | end main; -------------------------------------------------------------------------------- /rom/fs.asm: -------------------------------------------------------------------------------- 1 | .INCLUDE "dat.inc" 2 | 3 | .SECTION "CODE" 4 | mbr: 5 | sep #$20 6 | stz cardsw 7 | lda #MEMMODE 8 | sta sdmode 9 | rep #$30 10 | ldx #_mbrmsg 11 | jsr puts 12 | stz sdblk 13 | stz sdblk+2 14 | stz partoff 15 | stz partoff+2 16 | LDADDR BREC 17 | sta sdaddr 18 | jsr sdread 19 | bcc + 20 | jmp sdfatal 21 | + lda BREC+$1FE 22 | cmp #$AA55 23 | beq + 24 | _out jmp nope 25 | + sep #$20 26 | lda BREC+$1C2 27 | beq _out 28 | rep #$20 29 | lda BREC+$1C6 30 | sta partoff 31 | lda BREC+$1C8 32 | sta partoff+2 33 | rts 34 | _mbrmsg: .ASC "MBR ", 0 35 | 36 | initfat: 37 | rep #$30 38 | ldx #_fatmsg 39 | jsr puts 40 | jsr sdread 41 | bcc + 42 | jmp sdfatal 43 | + lda BREC+$00B 44 | cmp #512 45 | bne _out 46 | lda BREC+$011 47 | bne _out 48 | lda BREC+$02A 49 | bne _out 50 | 51 | sep #$30 52 | lda BREC+$00D 53 | beq _out 54 | sta clsiz 55 | ldx #$0 56 | - lsr 57 | beq + 58 | bcs _out 59 | inx 60 | bra - 61 | + stx clsh 62 | 63 | rep #$20 64 | stz fat 65 | stz fat+2 66 | lda BREC+$00E 67 | sta cloff 68 | stz cloff+2 69 | lda BREC+$010 70 | tax 71 | beq _out 72 | - clc 73 | lda cloff 74 | adc BREC+$024 75 | sta cloff 76 | lda cloff+2 77 | adc BREC+$026 78 | sta cloff+2 79 | dex 80 | bne - 81 | ldx clsiz 82 | txa 83 | asl 84 | bcs + 85 | sta tmp 86 | sec 87 | lda cloff 88 | sbc tmp 89 | sta cloff 90 | bcs ++ 91 | + dec cloff+2 92 | ++ rep #$10 93 | ldx #_rootmsg 94 | jsr puts 95 | lda BREC+$02C 96 | sta dir 97 | lda BREC+$02E 98 | sta dir+2 99 | jsr readdir 100 | bcc + 101 | jmp sdfatal 102 | + rts 103 | _fatmsg: .ASC "FAT ", 0 104 | _rootmsg: .ASC "ROOT ", 0 105 | 106 | readdir: 107 | php 108 | rep #$30 109 | lda dir 110 | sta clust 111 | lda dir+2 112 | sta clust+2 113 | LDADDR DIR 114 | sta sdaddr 115 | - jsr readclust 116 | bcs ++ 117 | jsr nextclust 118 | bcc + 119 | ++ plp 120 | sec 121 | rts 122 | + bit eof-1 123 | bpl - 124 | + stz dirend 125 | lda sdaddr 126 | ora #ROMOFF>>8 127 | sta dirend+1 128 | jsr scandir 129 | jsr sort 130 | lda #$7F00 131 | sta scrtop+1 132 | lda #dirp&$FFFF 133 | sta scrtop 134 | ldy #$FFFD 135 | jsr nextshown 136 | tya 137 | bmi + 138 | clc 139 | adc scrtop 140 | sta scrtop 141 | + stz sel 142 | plp 143 | clc 144 | rts 145 | 146 | clustsec: 147 | rep #$20 148 | sep #$10 149 | lda clust 150 | sta sdblk 151 | lda clust+2 152 | sta sdblk+2 153 | ldx clsh 154 | - asl sdblk 155 | rol sdblk+2 156 | dex 157 | bne - 158 | clc 159 | lda sdblk 160 | adc cloff 161 | sta sdblk 162 | lda sdblk+2 163 | adc cloff+2 164 | sta sdblk+2 165 | rts 166 | 167 | readclust: 168 | php 169 | jsr clustsec 170 | ldx clsiz 171 | - beq ++ 172 | jsr sdread 173 | bcs +++ 174 | inc sdaddr 175 | inc sdaddr 176 | inc sdblk 177 | bne + 178 | inc sdblk+2 179 | + dex 180 | bra - 181 | ++ plp 182 | clc 183 | rts 184 | +++ plp 185 | sec 186 | rts 187 | 188 | nextclust: 189 | php 190 | sep #$30 191 | lda clust 192 | asl 193 | rep #$20 194 | lda clust+1 195 | rol 196 | sta sdblk 197 | ldx clust+3 198 | txa 199 | rol 200 | sta sdblk+2 201 | lda sdblk 202 | adc BREC+$00E 203 | sta sdblk 204 | bcc + 205 | inc sdblk+2 206 | + cmp fat 207 | bne ++ 208 | lda sdblk+2 209 | cmp fat+2 210 | beq + 211 | ++ lda sdblk 212 | sta fat 213 | lda sdblk+2 214 | sta fat+2 215 | lda sdaddr 216 | pha 217 | LDADDR FAT 218 | sta sdaddr 219 | jsr sdread 220 | pla 221 | sta sdaddr 222 | bcc + 223 | plp 224 | sec 225 | rts 226 | + rep #$10 227 | lda clust 228 | and #$7F 229 | asl 230 | asl 231 | tax 232 | lda FAT,x 233 | sta clust 234 | inx 235 | inx 236 | lda FAT,x 237 | and #$FFF 238 | sta clust+2 239 | 240 | sep #$10 241 | ldx #$0 242 | lda clust+2 243 | bne + 244 | lda clust 245 | cmp #$2 246 | bcs ++ 247 | - dex 248 | bra ++ 249 | + lda clust 250 | cmp #$FFF8 251 | bcs - 252 | ++ stx eof 253 | plp 254 | clc 255 | rts 256 | 257 | scandir: 258 | php 259 | rep #$20 260 | lda #DIR>>8 261 | sta ptr+1 262 | lda #DIR & $FFFF 263 | sta ptr 264 | lda #$7F00 265 | sta dpend+1 266 | lda #dirp & $FFFF 267 | sta dpend 268 | -- rep #$20 269 | lda #$01FF 270 | bit ptr 271 | bne + 272 | lda ptr+1 273 | cmp dirend+1 274 | bne + 275 | --- rep #$30 276 | lda #$0 277 | sta [dpend] 278 | ldy #$1 279 | sta [dpend],y 280 | plp 281 | rts 282 | + sep #$30 283 | lda [ptr] 284 | beq + 285 | cmp #$E5 286 | beq + 287 | ldy #$B 288 | lda [ptr],y 289 | and #$C8 290 | bne + 291 | lda ptr+2 292 | ldy #$2 293 | sta [dpend],y 294 | rep #$20 295 | lda ptr 296 | sta [dpend] 297 | lda dpend 298 | cmp #DIRMAX*3 299 | beq --- 300 | clc 301 | lda dpend 302 | adc #$3 303 | sta dpend 304 | + rep #$20 305 | clc 306 | lda ptr 307 | adc #$20 308 | sta ptr 309 | bcc -- 310 | sep #$20 311 | inc ptr+2 312 | bra -- 313 | 314 | getdent: 315 | php 316 | rep #$30 317 | tya 318 | bpl + 319 | dec scrtop+2 320 | + phy 321 | lda [scrtop],y 322 | sta dent 323 | iny 324 | iny 325 | sep #$20 326 | lda [scrtop],y 327 | sta dent+2 328 | ply 329 | bpl + 330 | inc scrtop+2 331 | + ora dent 332 | ora dent+1 333 | xba 334 | plp 335 | xba 336 | rts 337 | 338 | isshown: 339 | php 340 | rep #$10 341 | sep #$20 342 | ldy #0 343 | lda [dent],y 344 | cmp #$2E 345 | beq + 346 | ldy #$B 347 | lda [dent],y 348 | bit #$02 349 | bne + 350 | bit #$10 351 | bne ++ 352 | ldy #$8 353 | lda [dent],y 354 | cmp #'S' 355 | bne + 356 | ldy #$A 357 | lda [dent],y 358 | cmp #'C' 359 | bne + 360 | ldy #$9 361 | lda [dent],y 362 | cmp #'F' 363 | beq ++ 364 | cmp #'M' 365 | bne + 366 | ++ plp 367 | sec 368 | rts 369 | + plp 370 | clc 371 | rts 372 | 373 | nextshown: 374 | php 375 | rep #$30 376 | sty tmp 377 | - iny 378 | iny 379 | iny 380 | jsr getdent 381 | bne + 382 | ldy tmp 383 | bra ++ 384 | + phy 385 | jsr isshown 386 | ply 387 | bcc - 388 | ++ plp 389 | rts 390 | 391 | prevshown: 392 | php 393 | rep #$30 394 | sty tmp 395 | - dey 396 | dey 397 | dey 398 | tya 399 | clc 400 | adc scrtop 401 | cmp #dirp & $FFFF 402 | bcs + 403 | ldy tmp 404 | bra ++ 405 | + jsr getdent 406 | bne + 407 | + phy 408 | jsr isshown 409 | ply 410 | bcc - 411 | ++ plp 412 | rts 413 | 414 | putlfn: 415 | php 416 | rep #$30 417 | stz tmp 418 | ldy #$0 419 | - lda buf,y 420 | beq ++ 421 | bit #$FF80 422 | beq + 423 | lda #'?' 424 | + jsr putc 425 | iny 426 | iny 427 | inc tmp 428 | lda tmp 429 | cmp #DISPLEN 430 | bne - 431 | ++ sep #$20 432 | ldy #$B 433 | lda [dent],y 434 | and #$10 435 | beq + 436 | lda #'/' 437 | jsr putc 438 | + rep #$20 439 | - lda tmp 440 | cmp #DISPLEN 441 | bcs + 442 | lda #' ' 443 | jsr putc 444 | inc tmp 445 | bra - 446 | + plp 447 | rts 448 | 449 | redraw: 450 | php 451 | sep #$20 452 | inc update 453 | rep #$30 454 | ldx #NAMES 455 | jsr move 456 | lda #DISPNUM 457 | sta tmp2 458 | ldy #$0 459 | - jsr getdent 460 | beq _f 461 | sty scrbot 462 | phy 463 | jsr isshown 464 | bcc + 465 | jsr filename 466 | jsr clrline 467 | ldx #NAMES-1 468 | jsr xmove 469 | ldx #' ' 470 | lda 1,s 471 | cmp sel 472 | bne ++ 473 | ldx #'>' 474 | ++ txa 475 | jsr putc 476 | jsr putlfn 477 | lda #$A 478 | jsr putc 479 | dec tmp2 480 | bne + 481 | ply 482 | bra ++ 483 | + ply 484 | iny 485 | iny 486 | iny 487 | bra - 488 | 489 | __ jsr clrline 490 | lda #$A 491 | jsr putc 492 | dec tmp2 493 | bne _b 494 | ++ sep #$20 495 | dec update 496 | plp 497 | rts 498 | 499 | parent: 500 | rep #$30 501 | lda scrtop 502 | sta tmp2 503 | lda #dirp & $FFFF 504 | sta scrtop 505 | ldy #$0 506 | - jsr getdent 507 | bne + 508 | lda tmp2 509 | sta scrtop 510 | rts 511 | + lda [dent] 512 | cmp #$2E2E 513 | bne + 514 | ldy #$1A 515 | lda [dent],y 516 | sta dir 517 | ldy #$14 518 | lda [dent],y 519 | sta dir+2 520 | ora dir 521 | bne ++ 522 | lda BREC+$02C 523 | sta dir 524 | lda BREC+$02E 525 | sta dir+2 526 | ++ jsr readdir 527 | jsr redraw 528 | rts 529 | + iny 530 | iny 531 | iny 532 | bra - 533 | 534 | chdir: 535 | lda clust 536 | sta dir 537 | lda clust+2 538 | sta dir+2 539 | jsr readdir 540 | bcc + 541 | jmp _sde 542 | + jsr endbox 543 | jsr redraw 544 | sec 545 | rts 546 | 547 | _fs 548 | pea _fsmsg&$FFFF 549 | _err jsr box 550 | plx 551 | jsr puts 552 | jmp confirm 553 | _size pea _szmsg&$FFFF 554 | bra _err 555 | readheader: 556 | sep #$20 557 | stz smch 558 | rep #$30 559 | ldy sel 560 | jsr getdent 561 | beq _fs 562 | 563 | ldy #$1A 564 | lda [dent],y 565 | sta clust 566 | ldy #$14 567 | lda [dent],y 568 | sta clust+2 569 | lda clust 570 | ora clust+2 571 | beq _fs 572 | ldy #$B 573 | lda [dent],y 574 | and #$10 575 | bne chdir 576 | 577 | ldy #$1C 578 | lda [dent],y 579 | sta size 580 | and #$3FF 581 | beq + 582 | cmp #$200 583 | bne _size 584 | sep #$20 585 | dec smch 586 | rep #$20 587 | + iny 588 | iny 589 | lda [dent],y 590 | sta size+2 591 | cmp #$61 592 | bcs _size 593 | 594 | lda #$3F 595 | sta tmp2 596 | lda #HIROM 597 | bit gamectl 598 | beq + 599 | lda #$7F 600 | sta tmp2 601 | + bit smch-1 602 | bpl + 603 | inc tmp2 604 | + lda tmp2 605 | sep #$10 606 | ldx clsh 607 | - lsr 608 | dex 609 | bne - 610 | sta tmp2 611 | pha 612 | rep #$10 613 | 614 | - dec tmp2 615 | bmi + 616 | jsr nextclust 617 | bcs _sde 618 | bit eof-1 619 | bmi ++ 620 | bra - 621 | ++ jmp _fs 622 | 623 | + jsr clustsec 624 | sep #$10 625 | ldx clsiz 626 | rep #$30 627 | dex 628 | stx tmp2 629 | pla 630 | and tmp2 631 | clc 632 | adc sdblk 633 | sta sdblk 634 | bcc + 635 | inc sdblk+2 636 | + LDADDR HEAD 637 | sta sdaddr 638 | jsr sdread 639 | bcs _sde 640 | clc 641 | rts 642 | _sde 643 | jsr box 644 | jsr sderror 645 | jmp confirm 646 | 647 | readrom: 648 | rep #$30 649 | ldy sel 650 | jsr getdent 651 | bne + 652 | jmp _fs 653 | + sep #$10 654 | lda #$0 655 | ldx smch 656 | bpl + 657 | lda #-2 658 | + sta sdaddr 659 | ldy #$1A 660 | lda [dent],y 661 | sta clust 662 | ldy #$14 663 | lda [dent],y 664 | sta clust+2 665 | jsr endbox 666 | readfile: 667 | jsr bar 668 | - jsr readclust 669 | bcs + 670 | jsr nextclust 671 | bcs + 672 | jsr showprog 673 | bit eof-1 674 | bpl - 675 | jsr endbar 676 | clc 677 | rts 678 | + rep #$30 679 | jsr endbar 680 | bit cardsw-1 681 | bpl + 682 | jsr box 683 | jsr sderror 684 | jsr waitkey 685 | jsr readdir 686 | jsr redraw 687 | + sec 688 | rts 689 | 690 | 691 | _fsmsg: .ASC "FS ERROR", 0 692 | _szmsg: .ASC "INVALID SIZE", 0 693 | .ENDS 694 | -------------------------------------------------------------------------------- /vhdl/sd.vhdl: -------------------------------------------------------------------------------- 1 | library ieee; 2 | use ieee.std_logic_1164.all; 3 | use ieee.numeric_std.all; 4 | 5 | entity sd is 6 | port( 7 | clk : in std_logic; 8 | sdclk : out std_logic; 9 | sdcd : in std_logic; 10 | sdcmd : inout std_logic; 11 | sddat : inout unsigned(3 downto 0); 12 | regrd, regwr : in std_logic; 13 | regaddr : in unsigned(3 downto 0); 14 | regin: in unsigned(7 downto 0); 15 | regout : out unsigned(7 downto 0); 16 | txstart : out std_logic := '0'; 17 | txstep : buffer std_logic; 18 | txdata : out unsigned(7 downto 0); 19 | txinstart : in std_logic; 20 | txindata : in unsigned(7 downto 0); 21 | wrblk : in unsigned(31 downto 0); 22 | txdone, txerr : out std_logic; 23 | card : buffer std_logic := '0' 24 | ); 25 | end sd; 26 | 27 | architecture main of sd is 28 | signal div : unsigned(7 downto 0); 29 | signal clkout, clkin : std_logic; 30 | signal sdcd0, sdcd1, sdcmd0 : std_logic; 31 | signal sddat0 : unsigned(3 downto 0); 32 | signal cdctr : unsigned(23 downto 0); 33 | signal slow : std_logic := '1'; 34 | 35 | signal cmdtimeout, datatimeout : integer; 36 | constant TIMEOUT : integer := 1000 * 1000; 37 | constant WRITETIMEOUT : integer := 10 * TIMEOUT; 38 | type cmdstate_t is (IDLE, COMMAND, WAITRESP, RESP, RESP2, WAITBUSY, WAIT0, DONE, TIMEERR); 39 | signal cmdstate : cmdstate_t := IDLE; 40 | signal buf : unsigned(47 downto 0); 41 | type counter_t is range 0 to 255; 42 | signal cmdctr, ctr : counter_t; 43 | signal cmd, ecmd : unsigned(5 downto 0); 44 | constant NOOP : unsigned(5 downto 0) := "111111"; 45 | signal arg : unsigned(31 downto 0); 46 | signal go, failed, dir : std_logic; 47 | 48 | type nbyte_t is range 0 to 511; 49 | signal datbuf, datbufl : unsigned(3 downto 0); 50 | type datastate_t is (IDLE, WAITDATA, DATA, CRC, TIMEERR, STARTBIT, OUTDATA, OUTCRC, WAITRESP, RESP, WAITBUSY); 51 | signal datastate : datastate_t := IDLE; 52 | type crc16_t is array(15 downto 0) of unsigned(3 downto 0); 53 | signal crc16 : crc16_t; 54 | signal nibble : std_logic; 55 | signal nbyte : nbyte_t; 56 | signal datago, datastop, dataclr, datafailed : std_logic; 57 | 58 | signal response : unsigned(31 downto 0); 59 | type state_t is (NOCARD, RESET, IDLE, ERROR, READCMD, WRITECMD, WAITDATA); 60 | signal state : state_t := NOCARD; 61 | signal hc : std_logic; 62 | signal rca : unsigned(15 downto 0); 63 | 64 | signal blk : unsigned(31 downto 0); 65 | signal resetcmd, readblk : std_logic; 66 | begin 67 | process 68 | begin 69 | wait until rising_edge(clk); 70 | div <= div + 1; 71 | sdcmd0 <= sdcmd; 72 | sdcd0 <= sdcd; 73 | sdcd1 <= sdcd0; 74 | sddat0 <= sddat; 75 | if sdcd1 /= card then 76 | cdctr <= X"000000"; 77 | else 78 | cdctr <= cdctr + 1; 79 | if cdctr = X"FFFFFF" then 80 | card <= not sdcd1; 81 | end if; 82 | end if; 83 | end process; 84 | sdclk <= div(7) when slow = '1' else div(1); 85 | clkin <= '1' when (slow = '1' and div = X"81") or (slow = '0' and div(1 downto 0) = "11") else '0'; 86 | clkout <= '1' when (slow = '1' and div = X"FF") or (slow = '0' and div(1 downto 0) = "11") else '0'; 87 | 88 | process 89 | variable v : unsigned(3 downto 0); 90 | begin 91 | wait until rising_edge(clk); 92 | datatimeout <= datatimeout + 1; 93 | txstep <= '0'; 94 | 95 | case datastate is 96 | when IDLE => 97 | txstart <= '0'; 98 | txdone <= '0'; 99 | if datago = '1' then 100 | if datago = '1' and dir = '1' then 101 | datastate <= STARTBIT; 102 | else 103 | datastate <= WAITDATA; 104 | end if; 105 | datatimeout <= 0; 106 | end if; 107 | if dataclr = '1' then 108 | datafailed <= '0'; 109 | end if; 110 | if datastop = '1' and txinstart = '1' then 111 | txdone <= '1'; 112 | end if; 113 | when WAITDATA => 114 | if datatimeout = TIMEOUT then 115 | datastate <= TIMEERR; 116 | end if; 117 | if clkin = '1' and sddat0(0) = '0' then 118 | datastate <= DATA; 119 | nibble <= '0'; 120 | nbyte <= 0; 121 | txstart <= '1'; 122 | end if; 123 | if datastop = '1' then 124 | datafailed <= '0'; 125 | txstart <= '0'; 126 | datastate <= IDLE; 127 | end if; 128 | when DATA => 129 | if clkin = '1' then 130 | if nibble = '0' then 131 | datbuf <= sddat0; 132 | else 133 | txstep <= '1'; 134 | txdata(7 downto 4) <= datbuf; 135 | txdata(3 downto 0) <= sddat0; 136 | if nbyte = 511 then 137 | datastate <= CRC; 138 | datafailed <= '0'; 139 | txstart <= '0'; 140 | nbyte <= 0; 141 | else 142 | nbyte <= nbyte + 1; 143 | end if; 144 | end if; 145 | nibble <= not nibble; 146 | end if; 147 | when CRC => 148 | if clkin = '1' then 149 | if nbyte = 15 then 150 | datastate <= IDLE; 151 | else 152 | nbyte <= nbyte + 1; 153 | end if; 154 | if crc16(15) /= sddat0 then 155 | datafailed <= '1'; 156 | end if; 157 | end if; 158 | when STARTBIT => 159 | if clkout = '1' then 160 | txstep <= '1'; 161 | datbuf <= txindata(7 downto 4); 162 | datbufl <= txindata(3 downto 0); 163 | sddat <= "0000"; 164 | datastate <= OUTDATA; 165 | nibble <= '0'; 166 | nbyte <= 0; 167 | end if; 168 | when OUTDATA => 169 | if clkout = '1' then 170 | sddat <= datbuf; 171 | if nibble = '1' then 172 | txstep <= '1'; 173 | datbuf <= txindata(7 downto 4); 174 | datbufl <= txindata(3 downto 0); 175 | if nbyte = 511 then 176 | nbyte <= 0; 177 | datastate <= OUTCRC; 178 | else 179 | nbyte <= nbyte + 1; 180 | end if; 181 | else 182 | datbuf <= datbufl; 183 | end if; 184 | nibble <= not nibble; 185 | end if; 186 | when OUTCRC => 187 | if clkout = '1' then 188 | nbyte <= nbyte + 1; 189 | if nbyte = 17 then 190 | datastate <= WAITRESP; 191 | sddat <= "ZZZZ"; 192 | datatimeout <= 0; 193 | elsif nbyte = 16 then 194 | sddat <= "1111"; 195 | else 196 | sddat <= crc16(15); 197 | end if; 198 | end if; 199 | when WAITRESP => 200 | if datatimeout = TIMEOUT then 201 | datastate <= TIMEERR; 202 | txdone <= '1'; 203 | end if; 204 | if datastop = '1' then 205 | datastate <= IDLE; 206 | datafailed <= '0'; 207 | txdone <= '1'; 208 | end if; 209 | if clkin = '1' then 210 | if sddat0(0) = '0' then 211 | datastate <= RESP; 212 | nbyte <= 0; 213 | end if; 214 | end if; 215 | when RESP => 216 | if clkin = '1' then 217 | datbuf(integer(nbyte)) <= sddat0(0); 218 | if nbyte = 3 then 219 | if datbuf(2 downto 0) /= "010" then 220 | datafailed <= '1'; 221 | else 222 | datafailed <= '0'; 223 | end if; 224 | datastate <= WAITBUSY; 225 | datatimeout <= 0; 226 | else 227 | nbyte <= nbyte + 1; 228 | end if; 229 | end if; 230 | when WAITBUSY => 231 | if datatimeout = WRITETIMEOUT then 232 | datastate <= TIMEERR; 233 | txdone <= '1'; 234 | end if; 235 | if datastop = '1' then 236 | datastate <= IDLE; 237 | datafailed <= '0'; 238 | txdone <= '1'; 239 | end if; 240 | if clkin = '1' and sddat0(0) = '1' then 241 | datastate <= IDLE; 242 | txdone <= '1'; 243 | end if; 244 | when TIMEERR => 245 | datafailed <= '1'; 246 | datastate <= IDLE; 247 | end case; 248 | if (dir = '0' and clkin = '1') or (dir = '1' and clkout = '1') then 249 | if datastate = DATA then 250 | v := crc16(15) xor sddat0; 251 | elsif datastate = OUTDATA then 252 | v := crc16(15) xor datbuf; 253 | else 254 | v := "0000"; 255 | end if; 256 | crc16 <= crc16(14 downto 0) & v; 257 | crc16(5) <= crc16(4) xor v; 258 | crc16(12) <= crc16(11) xor v; 259 | end if; 260 | if card = '0' or resetcmd = '1' then 261 | datastate <= IDLE; 262 | txstart <= '0'; 263 | datafailed <= '1'; 264 | txdone <= '1'; 265 | end if; 266 | end process; 267 | txerr <= '1' when state = NOCARD else failed or datafailed; 268 | 269 | process 270 | variable err : std_logic; 271 | variable cond : boolean; 272 | begin 273 | wait until rising_edge(clk); 274 | cmdtimeout <= cmdtimeout + 1; 275 | datago <= '0'; 276 | datastop <= '0'; 277 | dataclr <= '0'; 278 | case cmdstate is 279 | when IDLE => 280 | sdcmd <= '1'; 281 | sddat <= "ZZZZ"; 282 | if go = '1' then 283 | buf(47) <= '0'; 284 | buf(46) <= '1'; 285 | buf(45 downto 40) <= cmd; 286 | buf(39 downto 8) <= arg; 287 | buf(7 downto 1) <= "0000000"; 288 | buf(0) <= '1'; 289 | cmdstate <= COMMAND; 290 | cmdctr <= 0; 291 | if cmd = NOOP then 292 | cmdstate <= RESP2; 293 | end if; 294 | if cmd /= "001101" then 295 | ecmd <= cmd; 296 | end if; 297 | end if; 298 | when COMMAND => 299 | if clkout = '1' then 300 | buf <= buf(46 downto 1) & (buf(47) xor buf(7)) & '0'; 301 | if cmdctr < 40 then 302 | sdcmd <= buf(47); 303 | buf(1) <= buf(47) xor buf(7); 304 | buf(4) <= buf(3) xor (buf(47) xor buf(7)); 305 | else 306 | sdcmd <= buf(7); 307 | end if; 308 | if cmdctr = 47 then 309 | sdcmd <= '1'; 310 | end if; 311 | if cmdctr = 48 then 312 | cmdctr <= 0; 313 | cmdtimeout <= 0; 314 | case cmd is 315 | when "000000" => 316 | sdcmd <= '1'; 317 | cmdstate <= WAIT0; 318 | response <= (others => '0'); 319 | failed <= '0'; 320 | when "010001" => 321 | sdcmd <= 'Z'; 322 | cmdstate <= WAITRESP; 323 | datago <= '1'; 324 | when others => 325 | sdcmd <= 'Z'; 326 | cmdstate <= WAITRESP; 327 | end case; 328 | else 329 | cmdctr <= cmdctr + 1; 330 | end if; 331 | end if; 332 | when WAITRESP => 333 | if cmdtimeout = TIMEOUT then 334 | cmdstate <= TIMEERR; 335 | end if; 336 | if clkin = '1' and sdcmd0 = '0' then 337 | if cmd = "000010" then 338 | cmdstate <= RESP2; 339 | else 340 | cmdstate <= RESP; 341 | end if; 342 | buf(0) <= '0'; 343 | end if; 344 | when RESP => 345 | if clkin = '1' then 346 | buf <= buf(46 downto 0) & sdcmd0; 347 | if cmdctr = 47 then 348 | cmdctr <= 0; 349 | cmdstate <= WAIT0; 350 | response <= buf(39 downto 8); 351 | cond := false; 352 | case cmd is 353 | when "000010" | "101001" => 354 | when "000011" => 355 | cond := buf(23 downto 21) /= "000"; 356 | when "000111" => 357 | cmdstate <= WAITBUSY; 358 | when "001000" => 359 | cond := buf(19 downto 8) /= arg(11 downto 0); 360 | when others => 361 | cond := (buf(39 downto 24) and X"FD38") /= X"0000"; 362 | end case; 363 | if cond then 364 | failed <= '1'; 365 | else 366 | failed <= buf(46) or not buf(0); 367 | end if; 368 | if cmd = "010001" and failed = '1' then 369 | datastop <= '1'; 370 | elsif cmd = "011000" and failed = '0' then 371 | datago <= '1'; 372 | else 373 | dataclr <= '1'; 374 | end if; 375 | else 376 | cmdctr <= cmdctr + 1; 377 | end if; 378 | end if; 379 | when RESP2 => 380 | if clkin = '1' then 381 | if cmdctr = 135 then 382 | cmdstate <= WAIT0; 383 | cmdctr <= 0; 384 | response <= (others => '0'); 385 | failed <= '0'; 386 | else 387 | cmdctr <= cmdctr + 1; 388 | end if; 389 | end if; 390 | when WAITBUSY => 391 | if clkin = '1' and sddat0(0) = '1' then 392 | cmdstate <= WAIT0; 393 | cmdctr <= 0; 394 | end if; 395 | when TIMEERR => 396 | failed <= '1'; 397 | datastop <= '1'; 398 | response <= (others => '0'); 399 | cmdstate <= DONE; 400 | when WAIT0 => 401 | if clkin = '1' then 402 | if cmdctr = 9 then 403 | cmdstate <= DONE; 404 | else 405 | cmdctr <= cmdctr + 1; 406 | end if; 407 | end if; 408 | when DONE => 409 | cmdstate <= IDLE; 410 | end case; 411 | if card = '0' or resetcmd = '1' then 412 | cmdstate <= IDLE; 413 | end if; 414 | end process; 415 | 416 | process 417 | begin 418 | wait until rising_edge(clk); 419 | go <= '0'; 420 | case state is 421 | when NOCARD => 422 | if card = '1' then 423 | state <= RESET; 424 | ctr <= 0; 425 | end if; 426 | when RESET => 427 | if cmdstate = IDLE then 428 | go <= '1'; 429 | case ctr is 430 | when 0 => 431 | cmd <= "000000"; 432 | arg <= (others => '0'); 433 | when 1 => 434 | cmd <= "001000"; 435 | arg <= X"000001AA"; 436 | when 2 => 437 | cmd <= "110111"; 438 | arg <= (others => '0'); 439 | when 3 => 440 | cmd <= "101001"; 441 | arg <= X"40700000"; 442 | when 4 => 443 | go <= '0'; 444 | if response(31) = '0' then 445 | ctr <= 2; 446 | else 447 | ctr <= 5; 448 | hc <= response(30); 449 | end if; 450 | when 5 => 451 | cmd <= "000010"; 452 | arg <= (others => '0'); 453 | when 6 => 454 | cmd <= "000011"; 455 | when 7 => 456 | cmd <= "000111"; 457 | rca <= response(31 downto 16); 458 | arg(31 downto 16) <= response(31 downto 16); 459 | when 8 => 460 | slow <= '0'; 461 | cmd <= NOOP; 462 | when 9 => 463 | cmd <= "110111"; 464 | when 10 => 465 | cmd <= "101010"; 466 | arg(31 downto 0) <= (others => '0'); 467 | when 11 => 468 | cmd <= "110111"; 469 | arg(31 downto 16) <= rca; 470 | when 12 => 471 | cmd <= "000110"; 472 | arg(31 downto 0) <= (others => '0'); 473 | arg(1) <= '1'; 474 | when others => 475 | cmd <= "000000"; 476 | go <= '0'; 477 | state <= IDLE; 478 | end case; 479 | end if; 480 | if cmdstate = DONE then 481 | if failed = '1' and ctr /= 1 then 482 | state <= ERROR; 483 | ctr <= 0; 484 | else 485 | ctr <= ctr + 1; 486 | end if; 487 | end if; 488 | when IDLE => 489 | if readblk = '1' then 490 | state <= READCMD; 491 | end if; 492 | if txinstart = '1' then 493 | state <= WRITECMD; 494 | end if; 495 | when READCMD => 496 | if cmdstate = IDLE then 497 | if hc = '1' then 498 | arg <= blk; 499 | else 500 | arg <= blk(22 downto 0) & "000000000"; 501 | end if; 502 | cmd <= "010001"; 503 | go <= '1'; 504 | dir <= '0'; 505 | end if; 506 | if cmdstate = DONE then 507 | state <= WAITDATA; 508 | end if; 509 | when WRITECMD => 510 | if cmdstate = IDLE then 511 | if hc = '1' then 512 | arg <= wrblk; 513 | else 514 | arg <= wrblk(22 downto 0) & "000000000"; 515 | end if; 516 | cmd <= "011000"; 517 | go <= '1'; 518 | dir <= '1'; 519 | end if; 520 | if cmdstate = DONE then 521 | state <= WAITDATA; 522 | end if; 523 | when WAITDATA => 524 | if datastate = IDLE then 525 | state <= IDLE; 526 | end if; 527 | when ERROR => 528 | if ctr = 0 and response(31 downto 0) = (31 downto 0 => '0') then 529 | cmd <= "001101"; 530 | go <= '1'; 531 | ctr <= 1; 532 | end if; 533 | end case; 534 | if card = '0' or resetcmd = '1' then 535 | state <= NOCARD; 536 | slow <= '1'; 537 | rca <= (others => '0'); 538 | end if; 539 | end process; 540 | 541 | process 542 | begin 543 | wait until rising_edge(clk); 544 | readblk <= '0'; 545 | resetcmd <= '0'; 546 | if regrd = '1' then 547 | regout <= X"00"; 548 | case to_integer(regaddr) is 549 | when 0 => 550 | if state /= IDLE and state /= ERROR then 551 | regout(7) <= card; 552 | end if; 553 | regout(6) <= not card or failed or datafailed; 554 | regout(5) <= not card; 555 | regout(4) <= datafailed; 556 | when 1 => 557 | regout(5 downto 0) <= ecmd; 558 | when 2 => regout <= response(7 downto 0); 559 | when 3 => regout <= response(15 downto 8); 560 | when 4 => regout <= response(23 downto 16); 561 | when 5 => regout <= response(31 downto 24); 562 | when others => 563 | end case; 564 | end if; 565 | if regwr = '1' then 566 | case to_integer(regaddr) is 567 | when 0 => 568 | case to_integer(regin) is 569 | when 0 => 570 | resetcmd <= '1'; 571 | when 1 => 572 | readblk <= '1'; 573 | when others => 574 | end case; 575 | when 1 => blk(7 downto 0) <= regin; 576 | when 2 => blk(15 downto 8) <= regin; 577 | when 3 => blk(23 downto 16) <= regin; 578 | when 4 => blk(31 downto 24) <= regin; 579 | when others => 580 | end case; 581 | end if; 582 | end process; 583 | end main; -------------------------------------------------------------------------------- /vhdl/pll.vhd: -------------------------------------------------------------------------------- 1 | -- megafunction wizard: %ALTPLL% 2 | -- GENERATION: STANDARD 3 | -- VERSION: WM1.0 4 | -- MODULE: altpll 5 | 6 | -- ============================================================ 7 | -- File Name: pll.vhd 8 | -- Megafunction Name(s): 9 | -- altpll 10 | -- 11 | -- Simulation Library Files(s): 12 | -- altera_mf 13 | -- ============================================================ 14 | -- ************************************************************ 15 | -- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! 16 | -- 17 | -- 13.1.0 Build 162 10/23/2013 SJ Web Edition 18 | -- ************************************************************ 19 | 20 | 21 | --Copyright (C) 1991-2013 Altera Corporation 22 | --Your use of Altera Corporation's design tools, logic functions 23 | --and other software and tools, and its AMPP partner logic 24 | --functions, and any output files from any of the foregoing 25 | --(including device programming or simulation files), and any 26 | --associated documentation or information are expressly subject 27 | --to the terms and conditions of the Altera Program License 28 | --Subscription Agreement, Altera MegaCore Function License 29 | --Agreement, or other applicable license agreement, including, 30 | --without limitation, that your use is for the sole purpose of 31 | --programming logic devices manufactured by Altera and sold by 32 | --Altera or its authorized distributors. Please refer to the 33 | --applicable agreement for further details. 34 | 35 | 36 | LIBRARY ieee; 37 | USE ieee.std_logic_1164.all; 38 | 39 | LIBRARY altera_mf; 40 | USE altera_mf.all; 41 | 42 | ENTITY pll IS 43 | PORT 44 | ( 45 | inclk0 : IN STD_LOGIC := '0'; 46 | c0 : OUT STD_LOGIC ; 47 | locked : OUT STD_LOGIC 48 | ); 49 | END pll; 50 | 51 | 52 | ARCHITECTURE SYN OF pll IS 53 | 54 | SIGNAL sub_wire0 : STD_LOGIC_VECTOR (4 DOWNTO 0); 55 | SIGNAL sub_wire1 : STD_LOGIC ; 56 | SIGNAL sub_wire2 : STD_LOGIC ; 57 | SIGNAL sub_wire3 : STD_LOGIC ; 58 | SIGNAL sub_wire4 : STD_LOGIC_VECTOR (1 DOWNTO 0); 59 | SIGNAL sub_wire5_bv : BIT_VECTOR (0 DOWNTO 0); 60 | SIGNAL sub_wire5 : STD_LOGIC_VECTOR (0 DOWNTO 0); 61 | 62 | 63 | 64 | COMPONENT altpll 65 | GENERIC ( 66 | bandwidth_type : STRING; 67 | clk0_divide_by : NATURAL; 68 | clk0_duty_cycle : NATURAL; 69 | clk0_multiply_by : NATURAL; 70 | clk0_phase_shift : STRING; 71 | compensate_clock : STRING; 72 | inclk0_input_frequency : NATURAL; 73 | intended_device_family : STRING; 74 | lpm_hint : STRING; 75 | lpm_type : STRING; 76 | operation_mode : STRING; 77 | pll_type : STRING; 78 | port_activeclock : STRING; 79 | port_areset : STRING; 80 | port_clkbad0 : STRING; 81 | port_clkbad1 : STRING; 82 | port_clkloss : STRING; 83 | port_clkswitch : STRING; 84 | port_configupdate : STRING; 85 | port_fbin : STRING; 86 | port_inclk0 : STRING; 87 | port_inclk1 : STRING; 88 | port_locked : STRING; 89 | port_pfdena : STRING; 90 | port_phasecounterselect : STRING; 91 | port_phasedone : STRING; 92 | port_phasestep : STRING; 93 | port_phaseupdown : STRING; 94 | port_pllena : STRING; 95 | port_scanaclr : STRING; 96 | port_scanclk : STRING; 97 | port_scanclkena : STRING; 98 | port_scandata : STRING; 99 | port_scandataout : STRING; 100 | port_scandone : STRING; 101 | port_scanread : STRING; 102 | port_scanwrite : STRING; 103 | port_clk0 : STRING; 104 | port_clk1 : STRING; 105 | port_clk2 : STRING; 106 | port_clk3 : STRING; 107 | port_clk4 : STRING; 108 | port_clk5 : STRING; 109 | port_clkena0 : STRING; 110 | port_clkena1 : STRING; 111 | port_clkena2 : STRING; 112 | port_clkena3 : STRING; 113 | port_clkena4 : STRING; 114 | port_clkena5 : STRING; 115 | port_extclk0 : STRING; 116 | port_extclk1 : STRING; 117 | port_extclk2 : STRING; 118 | port_extclk3 : STRING; 119 | self_reset_on_loss_lock : STRING; 120 | width_clock : NATURAL 121 | ); 122 | PORT ( 123 | clk : OUT STD_LOGIC_VECTOR (4 DOWNTO 0); 124 | inclk : IN STD_LOGIC_VECTOR (1 DOWNTO 0); 125 | locked : OUT STD_LOGIC 126 | ); 127 | END COMPONENT; 128 | 129 | BEGIN 130 | sub_wire5_bv(0 DOWNTO 0) <= "0"; 131 | sub_wire5 <= To_stdlogicvector(sub_wire5_bv); 132 | sub_wire1 <= sub_wire0(0); 133 | c0 <= sub_wire1; 134 | locked <= sub_wire2; 135 | sub_wire3 <= inclk0; 136 | sub_wire4 <= sub_wire5(0 DOWNTO 0) & sub_wire3; 137 | 138 | altpll_component : altpll 139 | GENERIC MAP ( 140 | bandwidth_type => "AUTO", 141 | clk0_divide_by => 1, 142 | clk0_duty_cycle => 50, 143 | clk0_multiply_by => 2, 144 | clk0_phase_shift => "0", 145 | compensate_clock => "CLK0", 146 | inclk0_input_frequency => 20000, 147 | intended_device_family => "Cyclone III", 148 | lpm_hint => "CBX_MODULE_PREFIX=pll", 149 | lpm_type => "altpll", 150 | operation_mode => "NORMAL", 151 | pll_type => "AUTO", 152 | port_activeclock => "PORT_UNUSED", 153 | port_areset => "PORT_UNUSED", 154 | port_clkbad0 => "PORT_UNUSED", 155 | port_clkbad1 => "PORT_UNUSED", 156 | port_clkloss => "PORT_UNUSED", 157 | port_clkswitch => "PORT_UNUSED", 158 | port_configupdate => "PORT_UNUSED", 159 | port_fbin => "PORT_UNUSED", 160 | port_inclk0 => "PORT_USED", 161 | port_inclk1 => "PORT_UNUSED", 162 | port_locked => "PORT_USED", 163 | port_pfdena => "PORT_UNUSED", 164 | port_phasecounterselect => "PORT_UNUSED", 165 | port_phasedone => "PORT_UNUSED", 166 | port_phasestep => "PORT_UNUSED", 167 | port_phaseupdown => "PORT_UNUSED", 168 | port_pllena => "PORT_UNUSED", 169 | port_scanaclr => "PORT_UNUSED", 170 | port_scanclk => "PORT_UNUSED", 171 | port_scanclkena => "PORT_UNUSED", 172 | port_scandata => "PORT_UNUSED", 173 | port_scandataout => "PORT_UNUSED", 174 | port_scandone => "PORT_UNUSED", 175 | port_scanread => "PORT_UNUSED", 176 | port_scanwrite => "PORT_UNUSED", 177 | port_clk0 => "PORT_USED", 178 | port_clk1 => "PORT_UNUSED", 179 | port_clk2 => "PORT_UNUSED", 180 | port_clk3 => "PORT_UNUSED", 181 | port_clk4 => "PORT_UNUSED", 182 | port_clk5 => "PORT_UNUSED", 183 | port_clkena0 => "PORT_UNUSED", 184 | port_clkena1 => "PORT_UNUSED", 185 | port_clkena2 => "PORT_UNUSED", 186 | port_clkena3 => "PORT_UNUSED", 187 | port_clkena4 => "PORT_UNUSED", 188 | port_clkena5 => "PORT_UNUSED", 189 | port_extclk0 => "PORT_UNUSED", 190 | port_extclk1 => "PORT_UNUSED", 191 | port_extclk2 => "PORT_UNUSED", 192 | port_extclk3 => "PORT_UNUSED", 193 | self_reset_on_loss_lock => "OFF", 194 | width_clock => 5 195 | ) 196 | PORT MAP ( 197 | inclk => sub_wire4, 198 | clk => sub_wire0, 199 | locked => sub_wire2 200 | ); 201 | 202 | 203 | 204 | END SYN; 205 | 206 | -- ============================================================ 207 | -- CNX file retrieval info 208 | -- ============================================================ 209 | -- Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0" 210 | -- Retrieval info: PRIVATE: BANDWIDTH STRING "1.000" 211 | -- Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1" 212 | -- Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz" 213 | -- Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low" 214 | -- Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1" 215 | -- Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0" 216 | -- Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0" 217 | -- Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0" 218 | -- Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0" 219 | -- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0" 220 | -- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0" 221 | -- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0" 222 | -- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" 223 | -- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0" 224 | -- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "7" 225 | -- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "3" 226 | -- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" 227 | -- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "100.000000" 228 | -- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0" 229 | -- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" 230 | -- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" 231 | -- Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0" 232 | -- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" 233 | -- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" 234 | -- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" 235 | -- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000" 236 | -- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" 237 | -- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" 238 | -- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" 239 | -- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1" 240 | -- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz" 241 | -- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III" 242 | -- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" 243 | -- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1" 244 | -- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" 245 | -- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available" 246 | -- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" 247 | -- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" 248 | -- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any" 249 | -- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" 250 | -- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "6" 251 | -- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" 252 | -- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.00000000" 253 | -- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1" 254 | -- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" 255 | -- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1" 256 | -- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0" 257 | -- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" 258 | -- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0" 259 | -- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" 260 | -- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0" 261 | -- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0" 262 | -- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" 263 | -- Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0" 264 | -- Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0" 265 | -- Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0" 266 | -- Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0" 267 | -- Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0" 268 | -- Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0" 269 | -- Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0" 270 | -- Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll.mif" 271 | -- Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0" 272 | -- Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1" 273 | -- Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0" 274 | -- Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0" 275 | -- Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0" 276 | -- Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000" 277 | -- Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz" 278 | -- Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500" 279 | -- Retrieval info: PRIVATE: SPREAD_USE STRING "0" 280 | -- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" 281 | -- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" 282 | -- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" 283 | -- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1" 284 | -- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" 285 | -- Retrieval info: PRIVATE: USE_CLK0 STRING "1" 286 | -- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" 287 | -- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0" 288 | -- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" 289 | -- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all 290 | -- Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO" 291 | -- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1" 292 | -- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" 293 | -- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "2" 294 | -- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" 295 | -- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" 296 | -- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000" 297 | -- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III" 298 | -- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" 299 | -- Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL" 300 | -- Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO" 301 | -- Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED" 302 | -- Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED" 303 | -- Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED" 304 | -- Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED" 305 | -- Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED" 306 | -- Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED" 307 | -- Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED" 308 | -- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED" 309 | -- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED" 310 | -- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED" 311 | -- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_USED" 312 | -- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED" 313 | -- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED" 314 | -- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED" 315 | -- Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED" 316 | -- Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED" 317 | -- Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED" 318 | -- Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED" 319 | -- Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED" 320 | -- Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED" 321 | -- Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED" 322 | -- Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED" 323 | -- Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED" 324 | -- Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED" 325 | -- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED" 326 | -- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED" 327 | -- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED" 328 | -- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED" 329 | -- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED" 330 | -- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED" 331 | -- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED" 332 | -- Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED" 333 | -- Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED" 334 | -- Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED" 335 | -- Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED" 336 | -- Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED" 337 | -- Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED" 338 | -- Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED" 339 | -- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED" 340 | -- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED" 341 | -- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED" 342 | -- Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING "OFF" 343 | -- Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5" 344 | -- Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]" 345 | -- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]" 346 | -- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0" 347 | -- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0" 348 | -- Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked" 349 | -- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 350 | -- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 351 | -- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 352 | -- Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0 353 | -- Retrieval info: GEN_FILE: TYPE_NORMAL pll.vhd TRUE 354 | -- Retrieval info: GEN_FILE: TYPE_NORMAL pll.ppf TRUE 355 | -- Retrieval info: GEN_FILE: TYPE_NORMAL pll.inc FALSE 356 | -- Retrieval info: GEN_FILE: TYPE_NORMAL pll.cmp FALSE 357 | -- Retrieval info: GEN_FILE: TYPE_NORMAL pll.bsf FALSE 358 | -- Retrieval info: GEN_FILE: TYPE_NORMAL pll_inst.vhd FALSE 359 | -- Retrieval info: LIB_FILE: altera_mf 360 | -- Retrieval info: CBX_MODULE_PREFIX: ON 361 | -------------------------------------------------------------------------------- /vhdl/snes.qsf: -------------------------------------------------------------------------------- 1 | # -------------------------------------------------------------------------- # 2 | # 3 | # Copyright (C) 1991-2013 Altera Corporation 4 | # Your use of Altera Corporation's design tools, logic functions 5 | # and other software and tools, and its AMPP partner logic 6 | # functions, and any output files from any of the foregoing 7 | # (including device programming or simulation files), and any 8 | # associated documentation or information are expressly subject 9 | # to the terms and conditions of the Altera Program License 10 | # Subscription Agreement, Altera MegaCore Function License 11 | # Agreement, or other applicable license agreement, including, 12 | # without limitation, that your use is for the sole purpose of 13 | # programming logic devices manufactured by Altera and sold by 14 | # Altera or its authorized distributors. Please refer to the 15 | # applicable agreement for further details. 16 | # 17 | # -------------------------------------------------------------------------- # 18 | # 19 | # Quartus II 64-Bit 20 | # Version 13.1.0 Build 162 10/23/2013 SJ Web Edition 21 | # Date created = 12:56:16 March 19, 2014 22 | # 23 | # -------------------------------------------------------------------------- # 24 | # 25 | # Notes: 26 | # 27 | # 1) The default values for assignments are stored in the file: 28 | # snes_assignment_defaults.qdf 29 | # If this file doesn't exist, see file: 30 | # assignment_defaults.qdf 31 | # 32 | # 2) Altera recommends that you do not modify this file. This 33 | # file is updated automatically by the Quartus II software 34 | # and any changes you make may be lost or overwritten. 35 | # 36 | # -------------------------------------------------------------------------- # 37 | 38 | 39 | set_global_assignment -name FAMILY "Cyclone III" 40 | set_global_assignment -name DEVICE EP3C5F256C7 41 | set_global_assignment -name TOP_LEVEL_ENTITY snes 42 | set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1 43 | set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:56:16 MARCH 19, 2014" 44 | set_global_assignment -name LAST_QUARTUS_VERSION 13.1 45 | set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files 46 | set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 47 | set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 48 | set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA 49 | set_global_assignment -name DEVICE_FILTER_PIN_COUNT 256 50 | set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 51 | set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top 52 | set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top 53 | set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top 54 | set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL" 55 | set_location_assignment PIN_F10 -to snesdir 56 | set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF 57 | set_global_assignment -name ENABLE_NCE_PIN OFF 58 | set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF 59 | set_global_assignment -name USE_CONFIGURATION_DEVICE OFF 60 | set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF 61 | set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise 62 | set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall 63 | set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise 64 | set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall 65 | set_global_assignment -name ENABLE_SIGNALTAP ON 66 | set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp 67 | set_location_assignment PIN_T8 -to rama[11] 68 | set_location_assignment PIN_P8 -to rama[10] 69 | set_location_assignment PIN_R8 -to rama[9] 70 | set_location_assignment PIN_T7 -to rama[8] 71 | set_location_assignment PIN_R7 -to rama[7] 72 | set_location_assignment PIN_T6 -to rama[6] 73 | set_location_assignment PIN_R6 -to rama[5] 74 | set_location_assignment PIN_T5 -to rama[4] 75 | set_location_assignment PIN_K8 -to rama[3] 76 | set_location_assignment PIN_L8 -to rama[2] 77 | set_location_assignment PIN_M8 -to rama[1] 78 | set_location_assignment PIN_N8 -to rama[0] 79 | set_location_assignment PIN_M7 -to ramba[1] 80 | set_location_assignment PIN_N6 -to ramba[0] 81 | set_location_assignment PIN_P3 -to ramcas 82 | set_location_assignment PIN_R5 -to ramcke 83 | set_location_assignment PIN_R4 -to ramclk 84 | set_location_assignment PIN_M6 -to ramcs 85 | set_location_assignment PIN_R12 -to ramdq[15] 86 | set_location_assignment PIN_T12 -to ramdq[14] 87 | set_location_assignment PIN_R11 -to ramdq[13] 88 | set_location_assignment PIN_T11 -to ramdq[12] 89 | set_location_assignment PIN_R10 -to ramdq[11] 90 | set_location_assignment PIN_T10 -to ramdq[10] 91 | set_location_assignment PIN_R9 -to ramdq[9] 92 | set_location_assignment PIN_T9 -to ramdq[8] 93 | set_location_assignment PIN_M11 -to ramdq[7] 94 | set_location_assignment PIN_N12 -to ramdq[6] 95 | set_location_assignment PIN_P14 -to ramdq[5] 96 | set_location_assignment PIN_T13 -to ramdq[4] 97 | set_location_assignment PIN_R13 -to ramdq[3] 98 | set_location_assignment PIN_T14 -to ramdq[2] 99 | set_location_assignment PIN_R14 -to ramdq[1] 100 | set_location_assignment PIN_T15 -to ramdq[0] 101 | set_location_assignment PIN_T2 -to ramldqm 102 | set_location_assignment PIN_N3 -to ramras 103 | set_location_assignment PIN_T3 -to ramudqm 104 | set_location_assignment PIN_R3 -to ramwe 105 | set_location_assignment PIN_L2 -to sdcd 106 | set_location_assignment PIN_P1 -to sdclk 107 | set_location_assignment PIN_N2 -to sdcmd 108 | set_location_assignment PIN_N1 -to sddat[3] 109 | set_location_assignment PIN_L1 -to sddat[2] 110 | set_location_assignment PIN_R1 -to sddat[1] 111 | set_location_assignment PIN_P2 -to sddat[0] 112 | set_location_assignment PIN_J16 -to snesa[23] 113 | set_location_assignment PIN_H15 -to snesa[22] 114 | set_location_assignment PIN_G15 -to snesa[21] 115 | set_location_assignment PIN_K11 -to snesa[20] 116 | set_location_assignment PIN_F13 -to snesa[19] 117 | set_location_assignment PIN_D12 -to snesa[18] 118 | set_location_assignment PIN_C14 -to snesa[17] 119 | set_location_assignment PIN_D15 -to snesa[16] 120 | set_location_assignment PIN_C15 -to snesa[15] 121 | set_location_assignment PIN_A15 -to snesa[14] 122 | set_location_assignment PIN_A14 -to snesa[13] 123 | set_location_assignment PIN_A12 -to snesa[12] 124 | set_location_assignment PIN_A13 -to snesa[11] 125 | set_location_assignment PIN_B14 -to snesa[10] 126 | set_location_assignment PIN_B16 -to snesa[9] 127 | set_location_assignment PIN_C16 -to snesa[8] 128 | set_location_assignment PIN_D16 -to snesa[7] 129 | set_location_assignment PIN_D14 -to snesa[6] 130 | set_location_assignment PIN_D11 -to snesa[5] 131 | set_location_assignment PIN_G11 -to snesa[4] 132 | set_location_assignment PIN_F15 -to snesa[3] 133 | set_location_assignment PIN_G16 -to snesa[2] 134 | set_location_assignment PIN_H16 -to snesa[1] 135 | set_location_assignment PIN_J15 -to snesa[0] 136 | set_location_assignment PIN_L15 -to snescart 137 | set_location_assignment PIN_K12 -to snesd[7] 138 | set_location_assignment PIN_J14 -to snesd[6] 139 | set_location_assignment PIN_J11 -to snesd[5] 140 | set_location_assignment PIN_K16 -to snesd[4] 141 | set_location_assignment PIN_L13 -to snesd[3] 142 | set_location_assignment PIN_J13 -to snesd[2] 143 | set_location_assignment PIN_J12 -to snesd[1] 144 | set_location_assignment PIN_K15 -to snesd[0] 145 | set_location_assignment PIN_N15 -to snesrd 146 | set_location_assignment PIN_M12 -to snesreset 147 | set_location_assignment PIN_L16 -to sneswr 148 | set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to sdcd 149 | set_location_assignment PIN_E2 -to inclk 150 | set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE 100% 151 | set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON 152 | set_instance_assignment -name IO_STANDARD "2.5 V" -to altera_reserved_tdo 153 | set_instance_assignment -name IO_STANDARD "2.5 V" -to altera_reserved_tck 154 | set_instance_assignment -name IO_STANDARD "2.5 V" -to altera_reserved_tdi 155 | set_instance_assignment -name IO_STANDARD "2.5 V" -to altera_reserved_tms 156 | set_location_assignment PIN_L12 -to snesclk 157 | set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0 158 | set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0 159 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "pll:pll0|c0" -section_id auto_signaltap_0 160 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_BLOCK_TYPE=AUTO" -section_id auto_signaltap_0 161 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=805334528" -section_id auto_signaltap_0 162 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0 163 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ATTRIBUTE_MEM_MODE=OFF" -section_id auto_signaltap_0 164 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_FLOW_USE_GENERATED=0" -section_id auto_signaltap_0 165 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_BITS=11" -section_id auto_signaltap_0 166 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_BUFFER_FULL_STOP=1" -section_id auto_signaltap_0 167 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_CURRENT_RESOURCE_WIDTH=1" -section_id auto_signaltap_0 168 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0 169 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0 170 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0 171 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0 172 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0 173 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to "dma:dma0|dirty[0]" -section_id auto_signaltap_0 174 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to "dma:dma0|dirty[10]" -section_id auto_signaltap_0 175 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to "dma:dma0|dirty[11]" -section_id auto_signaltap_0 176 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to "dma:dma0|dirty[12]" -section_id auto_signaltap_0 177 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to "dma:dma0|dirty[13]" -section_id auto_signaltap_0 178 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to "dma:dma0|dirty[14]" -section_id auto_signaltap_0 179 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to "dma:dma0|dirty[15]" -section_id auto_signaltap_0 180 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to "dma:dma0|dirty[1]" -section_id auto_signaltap_0 181 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[8] -to "dma:dma0|dirty[2]" -section_id auto_signaltap_0 182 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[9] -to "dma:dma0|dirty[3]" -section_id auto_signaltap_0 183 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[10] -to "dma:dma0|dirty[4]" -section_id auto_signaltap_0 184 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[11] -to "dma:dma0|dirty[5]" -section_id auto_signaltap_0 185 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[12] -to "dma:dma0|dirty[6]" -section_id auto_signaltap_0 186 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[13] -to "dma:dma0|dirty[7]" -section_id auto_signaltap_0 187 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[14] -to "dma:dma0|dirty[8]" -section_id auto_signaltap_0 188 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[15] -to "dma:dma0|dirty[9]" -section_id auto_signaltap_0 189 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[16] -to "dma:dma0|state.CHECKBLK" -section_id auto_signaltap_0 190 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[17] -to "dma:dma0|state.IDLE" -section_id auto_signaltap_0 191 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[18] -to "dma:dma0|state.READBLK" -section_id auto_signaltap_0 192 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[19] -to "dma:dma0|state.WAITDONE" -section_id auto_signaltap_0 193 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[20] -to "dma:dma0|state.WRITEBLK" -section_id auto_signaltap_0 194 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[21] -to "dma:dma0|txdone" -section_id auto_signaltap_0 195 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[22] -to "dma:dma0|txerr" -section_id auto_signaltap_0 196 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_GAP_RECORD=0" -section_id auto_signaltap_0 197 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_MODE=TRANSITIONAL" -section_id auto_signaltap_0 198 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[23] -to "sd:sd0|datafailed" -section_id auto_signaltap_0 199 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[24] -to "sd:sd0|datastate.CRC" -section_id auto_signaltap_0 200 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[25] -to "sd:sd0|datastate.DATA" -section_id auto_signaltap_0 201 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[26] -to "sd:sd0|datastate.IDLE" -section_id auto_signaltap_0 202 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[27] -to "sd:sd0|datastate.OUTCRC" -section_id auto_signaltap_0 203 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[28] -to "sd:sd0|datastate.OUTDATA" -section_id auto_signaltap_0 204 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[29] -to "sd:sd0|datastate.RESP" -section_id auto_signaltap_0 205 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[30] -to "sd:sd0|datastate.STARTBIT" -section_id auto_signaltap_0 206 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[31] -to "sd:sd0|datastate.TIMEERR" -section_id auto_signaltap_0 207 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[32] -to "sd:sd0|datastate.WAITBUSY" -section_id auto_signaltap_0 208 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[33] -to "sd:sd0|datastate.WAITDATA" -section_id auto_signaltap_0 209 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[34] -to "sd:sd0|datastate.WAITRESP" -section_id auto_signaltap_0 210 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[35] -to "sd:sd0|failed" -section_id auto_signaltap_0 211 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[36] -to "sd:sd0|response[0]" -section_id auto_signaltap_0 212 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[37] -to "sd:sd0|response[10]" -section_id auto_signaltap_0 213 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[38] -to "sd:sd0|response[11]" -section_id auto_signaltap_0 214 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[39] -to "sd:sd0|response[12]" -section_id auto_signaltap_0 215 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[40] -to "sd:sd0|response[13]" -section_id auto_signaltap_0 216 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[41] -to "sd:sd0|response[14]" -section_id auto_signaltap_0 217 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[42] -to "sd:sd0|response[15]" -section_id auto_signaltap_0 218 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[43] -to "sd:sd0|response[16]" -section_id auto_signaltap_0 219 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[44] -to "sd:sd0|response[17]" -section_id auto_signaltap_0 220 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[45] -to "sd:sd0|response[18]" -section_id auto_signaltap_0 221 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[46] -to "sd:sd0|response[19]" -section_id auto_signaltap_0 222 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[47] -to "sd:sd0|response[1]" -section_id auto_signaltap_0 223 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[48] -to "sd:sd0|response[20]" -section_id auto_signaltap_0 224 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[49] -to "sd:sd0|response[21]" -section_id auto_signaltap_0 225 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[50] -to "sd:sd0|response[22]" -section_id auto_signaltap_0 226 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[51] -to "sd:sd0|response[23]" -section_id auto_signaltap_0 227 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[52] -to "sd:sd0|response[24]" -section_id auto_signaltap_0 228 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[53] -to "sd:sd0|response[25]" -section_id auto_signaltap_0 229 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[54] -to "sd:sd0|response[26]" -section_id auto_signaltap_0 230 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[55] -to "sd:sd0|response[27]" -section_id auto_signaltap_0 231 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[56] -to "sd:sd0|response[28]" -section_id auto_signaltap_0 232 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[57] -to "sd:sd0|response[29]" -section_id auto_signaltap_0 233 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[58] -to "sd:sd0|response[2]" -section_id auto_signaltap_0 234 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[59] -to "sd:sd0|response[30]" -section_id auto_signaltap_0 235 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[60] -to "sd:sd0|response[31]" -section_id auto_signaltap_0 236 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[61] -to "sd:sd0|response[3]" -section_id auto_signaltap_0 237 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[62] -to "sd:sd0|response[4]" -section_id auto_signaltap_0 238 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[63] -to "sd:sd0|response[5]" -section_id auto_signaltap_0 239 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[64] -to "sd:sd0|response[6]" -section_id auto_signaltap_0 240 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[65] -to "sd:sd0|response[7]" -section_id auto_signaltap_0 241 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[66] -to "sd:sd0|response[8]" -section_id auto_signaltap_0 242 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[67] -to "sd:sd0|response[9]" -section_id auto_signaltap_0 243 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[68] -to "sd:sd0|state.ERROR" -section_id auto_signaltap_0 244 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[69] -to "sd:sd0|state.IDLE" -section_id auto_signaltap_0 245 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[70] -to "sd:sd0|state.NOCARD" -section_id auto_signaltap_0 246 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[71] -to "sd:sd0|state.READCMD" -section_id auto_signaltap_0 247 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[72] -to "sd:sd0|state.RESET" -section_id auto_signaltap_0 248 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[73] -to "sd:sd0|state.WAITDATA" -section_id auto_signaltap_0 249 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[74] -to "sd:sd0|state.WRITECMD" -section_id auto_signaltap_0 250 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=75" -section_id auto_signaltap_0 251 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_INVERSION_MASK_LENGTH=76" -section_id auto_signaltap_0 252 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_LOWORD=48231" -section_id auto_signaltap_0 253 | set_global_assignment -name CYCLONEIII_CONFIGURATION_DEVICE EPCS4 254 | set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON 255 | set_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS OFF 256 | set_global_assignment -name SYNTH_MESSAGE_LEVEL HIGH 257 | set_global_assignment -name VHDL_FILE mem.vhdl 258 | set_global_assignment -name VHDL_FILE main.vhdl 259 | set_global_assignment -name QIP_FILE pll.qip 260 | set_global_assignment -name SDC_FILE snes.sdc 261 | set_global_assignment -name VHDL_FILE bootrom.vhdl 262 | set_global_assignment -name SIGNALTAP_FILE stp1.stp 263 | set_global_assignment -name QIP_FILE rom.qip 264 | set_global_assignment -name VHDL_FILE sd.vhdl 265 | set_global_assignment -name VHDL_FILE dma.vhdl 266 | set_location_assignment PIN_D2 -to spice 267 | set_location_assignment PIN_H1 -to spisck 268 | set_location_assignment PIN_C1 -to spisi 269 | set_location_assignment PIN_H2 -to spiso 270 | set_global_assignment -name TRI_STATE_SPI_PINS OFF 271 | set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO" 272 | set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO" 273 | set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO" 274 | set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO" 275 | set_global_assignment -name RESERVE_DATA7_THROUGH_DATA2_AFTER_CONFIGURATION "USE AS REGULAR IO" 276 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to "dma:dma0|dirty[0]" -section_id auto_signaltap_0 277 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to "dma:dma0|dirty[10]" -section_id auto_signaltap_0 278 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to "dma:dma0|dirty[11]" -section_id auto_signaltap_0 279 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to "dma:dma0|dirty[12]" -section_id auto_signaltap_0 280 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to "dma:dma0|dirty[13]" -section_id auto_signaltap_0 281 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to "dma:dma0|dirty[14]" -section_id auto_signaltap_0 282 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to "dma:dma0|dirty[15]" -section_id auto_signaltap_0 283 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to "dma:dma0|dirty[1]" -section_id auto_signaltap_0 284 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to "dma:dma0|dirty[2]" -section_id auto_signaltap_0 285 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[9] -to "dma:dma0|dirty[3]" -section_id auto_signaltap_0 286 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[10] -to "dma:dma0|dirty[4]" -section_id auto_signaltap_0 287 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[11] -to "dma:dma0|dirty[5]" -section_id auto_signaltap_0 288 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[12] -to "dma:dma0|dirty[6]" -section_id auto_signaltap_0 289 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[13] -to "dma:dma0|dirty[7]" -section_id auto_signaltap_0 290 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[14] -to "dma:dma0|dirty[8]" -section_id auto_signaltap_0 291 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[15] -to "dma:dma0|dirty[9]" -section_id auto_signaltap_0 292 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[16] -to "dma:dma0|state.CHECKBLK" -section_id auto_signaltap_0 293 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[17] -to "dma:dma0|state.IDLE" -section_id auto_signaltap_0 294 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[18] -to "dma:dma0|state.READBLK" -section_id auto_signaltap_0 295 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[19] -to "dma:dma0|state.WAITDONE" -section_id auto_signaltap_0 296 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[20] -to "dma:dma0|state.WRITEBLK" -section_id auto_signaltap_0 297 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[21] -to "dma:dma0|txdone" -section_id auto_signaltap_0 298 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[22] -to "dma:dma0|txerr" -section_id auto_signaltap_0 299 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[23] -to "sd:sd0|datafailed" -section_id auto_signaltap_0 300 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[24] -to "sd:sd0|datastate.CRC" -section_id auto_signaltap_0 301 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[25] -to "sd:sd0|datastate.DATA" -section_id auto_signaltap_0 302 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[26] -to "sd:sd0|datastate.IDLE" -section_id auto_signaltap_0 303 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[27] -to "sd:sd0|datastate.OUTCRC" -section_id auto_signaltap_0 304 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[28] -to "sd:sd0|datastate.OUTDATA" -section_id auto_signaltap_0 305 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[29] -to "sd:sd0|datastate.RESP" -section_id auto_signaltap_0 306 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[30] -to "sd:sd0|datastate.STARTBIT" -section_id auto_signaltap_0 307 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[31] -to "sd:sd0|datastate.TIMEERR" -section_id auto_signaltap_0 308 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[32] -to "sd:sd0|datastate.WAITBUSY" -section_id auto_signaltap_0 309 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[33] -to "sd:sd0|datastate.WAITDATA" -section_id auto_signaltap_0 310 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[34] -to "sd:sd0|datastate.WAITRESP" -section_id auto_signaltap_0 311 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[35] -to "sd:sd0|failed" -section_id auto_signaltap_0 312 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[36] -to "sd:sd0|response[0]" -section_id auto_signaltap_0 313 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[37] -to "sd:sd0|response[10]" -section_id auto_signaltap_0 314 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[38] -to "sd:sd0|response[11]" -section_id auto_signaltap_0 315 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[39] -to "sd:sd0|response[12]" -section_id auto_signaltap_0 316 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[40] -to "sd:sd0|response[13]" -section_id auto_signaltap_0 317 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[41] -to "sd:sd0|response[14]" -section_id auto_signaltap_0 318 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[42] -to "sd:sd0|response[15]" -section_id auto_signaltap_0 319 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[43] -to "sd:sd0|response[16]" -section_id auto_signaltap_0 320 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[44] -to "sd:sd0|response[17]" -section_id auto_signaltap_0 321 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[45] -to "sd:sd0|response[18]" -section_id auto_signaltap_0 322 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[46] -to "sd:sd0|response[19]" -section_id auto_signaltap_0 323 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[47] -to "sd:sd0|response[1]" -section_id auto_signaltap_0 324 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[48] -to "sd:sd0|response[20]" -section_id auto_signaltap_0 325 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[49] -to "sd:sd0|response[21]" -section_id auto_signaltap_0 326 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[50] -to "sd:sd0|response[22]" -section_id auto_signaltap_0 327 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[51] -to "sd:sd0|response[23]" -section_id auto_signaltap_0 328 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[52] -to "sd:sd0|response[24]" -section_id auto_signaltap_0 329 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[53] -to "sd:sd0|response[25]" -section_id auto_signaltap_0 330 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[54] -to "sd:sd0|response[26]" -section_id auto_signaltap_0 331 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[55] -to "sd:sd0|response[27]" -section_id auto_signaltap_0 332 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[56] -to "sd:sd0|response[28]" -section_id auto_signaltap_0 333 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[57] -to "sd:sd0|response[29]" -section_id auto_signaltap_0 334 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[58] -to "sd:sd0|response[2]" -section_id auto_signaltap_0 335 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[59] -to "sd:sd0|response[30]" -section_id auto_signaltap_0 336 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[60] -to "sd:sd0|response[31]" -section_id auto_signaltap_0 337 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[61] -to "sd:sd0|response[3]" -section_id auto_signaltap_0 338 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[62] -to "sd:sd0|response[4]" -section_id auto_signaltap_0 339 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[63] -to "sd:sd0|response[5]" -section_id auto_signaltap_0 340 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[64] -to "sd:sd0|response[6]" -section_id auto_signaltap_0 341 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[65] -to "sd:sd0|response[7]" -section_id auto_signaltap_0 342 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[66] -to "sd:sd0|response[8]" -section_id auto_signaltap_0 343 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[67] -to "sd:sd0|response[9]" -section_id auto_signaltap_0 344 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[68] -to "sd:sd0|state.ERROR" -section_id auto_signaltap_0 345 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[69] -to "sd:sd0|state.IDLE" -section_id auto_signaltap_0 346 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[70] -to "sd:sd0|state.NOCARD" -section_id auto_signaltap_0 347 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[71] -to "sd:sd0|state.READCMD" -section_id auto_signaltap_0 348 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[72] -to "sd:sd0|state.RESET" -section_id auto_signaltap_0 349 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[73] -to "sd:sd0|state.WAITDATA" -section_id auto_signaltap_0 350 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[74] -to "sd:sd0|state.WRITECMD" -section_id auto_signaltap_0 351 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[0] -to "dma:dma0|dirty[0]" -section_id auto_signaltap_0 352 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[1] -to "dma:dma0|dirty[10]" -section_id auto_signaltap_0 353 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[2] -to "dma:dma0|dirty[11]" -section_id auto_signaltap_0 354 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[3] -to "dma:dma0|dirty[12]" -section_id auto_signaltap_0 355 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[4] -to "dma:dma0|dirty[13]" -section_id auto_signaltap_0 356 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[5] -to "dma:dma0|dirty[14]" -section_id auto_signaltap_0 357 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[6] -to "dma:dma0|dirty[15]" -section_id auto_signaltap_0 358 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[7] -to "dma:dma0|dirty[1]" -section_id auto_signaltap_0 359 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[8] -to "dma:dma0|dirty[2]" -section_id auto_signaltap_0 360 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[9] -to "dma:dma0|dirty[3]" -section_id auto_signaltap_0 361 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[10] -to "dma:dma0|dirty[4]" -section_id auto_signaltap_0 362 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[11] -to "dma:dma0|dirty[5]" -section_id auto_signaltap_0 363 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[12] -to "dma:dma0|dirty[6]" -section_id auto_signaltap_0 364 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[13] -to "dma:dma0|dirty[7]" -section_id auto_signaltap_0 365 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[14] -to "dma:dma0|dirty[8]" -section_id auto_signaltap_0 366 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[15] -to "dma:dma0|dirty[9]" -section_id auto_signaltap_0 367 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[16] -to "dma:dma0|state.CHECKBLK" -section_id auto_signaltap_0 368 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[17] -to "dma:dma0|state.IDLE" -section_id auto_signaltap_0 369 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[18] -to "dma:dma0|state.READBLK" -section_id auto_signaltap_0 370 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[19] -to "dma:dma0|state.WAITDONE" -section_id auto_signaltap_0 371 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[20] -to "dma:dma0|state.WRITEBLK" -section_id auto_signaltap_0 372 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[21] -to "dma:dma0|txdone" -section_id auto_signaltap_0 373 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[22] -to "dma:dma0|txerr" -section_id auto_signaltap_0 374 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[23] -to "sd:sd0|datafailed" -section_id auto_signaltap_0 375 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[24] -to "sd:sd0|datastate.CRC" -section_id auto_signaltap_0 376 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[25] -to "sd:sd0|datastate.DATA" -section_id auto_signaltap_0 377 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[26] -to "sd:sd0|datastate.IDLE" -section_id auto_signaltap_0 378 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[27] -to "sd:sd0|datastate.OUTCRC" -section_id auto_signaltap_0 379 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[28] -to "sd:sd0|datastate.OUTDATA" -section_id auto_signaltap_0 380 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[29] -to "sd:sd0|datastate.RESP" -section_id auto_signaltap_0 381 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[30] -to "sd:sd0|datastate.STARTBIT" -section_id auto_signaltap_0 382 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[31] -to "sd:sd0|datastate.TIMEERR" -section_id auto_signaltap_0 383 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[32] -to "sd:sd0|datastate.WAITBUSY" -section_id auto_signaltap_0 384 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[33] -to "sd:sd0|datastate.WAITDATA" -section_id auto_signaltap_0 385 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[34] -to "sd:sd0|datastate.WAITRESP" -section_id auto_signaltap_0 386 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[35] -to "sd:sd0|failed" -section_id auto_signaltap_0 387 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[36] -to "sd:sd0|response[0]" -section_id auto_signaltap_0 388 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[37] -to "sd:sd0|response[10]" -section_id auto_signaltap_0 389 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[38] -to "sd:sd0|response[11]" -section_id auto_signaltap_0 390 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[39] -to "sd:sd0|response[12]" -section_id auto_signaltap_0 391 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[40] -to "sd:sd0|response[13]" -section_id auto_signaltap_0 392 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[41] -to "sd:sd0|response[14]" -section_id auto_signaltap_0 393 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[42] -to "sd:sd0|response[15]" -section_id auto_signaltap_0 394 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[43] -to "sd:sd0|response[16]" -section_id auto_signaltap_0 395 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[44] -to "sd:sd0|response[17]" -section_id auto_signaltap_0 396 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[45] -to "sd:sd0|response[18]" -section_id auto_signaltap_0 397 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[46] -to "sd:sd0|response[19]" -section_id auto_signaltap_0 398 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[47] -to "sd:sd0|response[1]" -section_id auto_signaltap_0 399 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[48] -to "sd:sd0|response[20]" -section_id auto_signaltap_0 400 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[49] -to "sd:sd0|response[21]" -section_id auto_signaltap_0 401 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[50] -to "sd:sd0|response[22]" -section_id auto_signaltap_0 402 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[51] -to "sd:sd0|response[23]" -section_id auto_signaltap_0 403 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[52] -to "sd:sd0|response[24]" -section_id auto_signaltap_0 404 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[53] -to "sd:sd0|response[25]" -section_id auto_signaltap_0 405 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[54] -to "sd:sd0|response[26]" -section_id auto_signaltap_0 406 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[55] -to "sd:sd0|response[27]" -section_id auto_signaltap_0 407 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[56] -to "sd:sd0|response[28]" -section_id auto_signaltap_0 408 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[57] -to "sd:sd0|response[29]" -section_id auto_signaltap_0 409 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[58] -to "sd:sd0|response[2]" -section_id auto_signaltap_0 410 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[59] -to "sd:sd0|response[30]" -section_id auto_signaltap_0 411 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[60] -to "sd:sd0|response[31]" -section_id auto_signaltap_0 412 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[61] -to "sd:sd0|response[3]" -section_id auto_signaltap_0 413 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[62] -to "sd:sd0|response[4]" -section_id auto_signaltap_0 414 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[63] -to "sd:sd0|response[5]" -section_id auto_signaltap_0 415 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[64] -to "sd:sd0|response[6]" -section_id auto_signaltap_0 416 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[65] -to "sd:sd0|response[7]" -section_id auto_signaltap_0 417 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[66] -to "sd:sd0|response[8]" -section_id auto_signaltap_0 418 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[67] -to "sd:sd0|response[9]" -section_id auto_signaltap_0 419 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[68] -to "sd:sd0|state.ERROR" -section_id auto_signaltap_0 420 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[69] -to "sd:sd0|state.IDLE" -section_id auto_signaltap_0 421 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[70] -to "sd:sd0|state.NOCARD" -section_id auto_signaltap_0 422 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[71] -to "sd:sd0|state.READCMD" -section_id auto_signaltap_0 423 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[72] -to "sd:sd0|state.RESET" -section_id auto_signaltap_0 424 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[73] -to "sd:sd0|state.WAITDATA" -section_id auto_signaltap_0 425 | set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_storage_qualifier_in[74] -to "sd:sd0|state.WRITECMD" -section_id auto_signaltap_0 426 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=75" -section_id auto_signaltap_0 427 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_BITS=75" -section_id auto_signaltap_0 428 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" -section_id auto_signaltap_0 429 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=324" -section_id auto_signaltap_0 430 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=512" -section_id auto_signaltap_0 431 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_HIWORD=30508" -section_id auto_signaltap_0 432 | set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=512" -section_id auto_signaltap_0 433 | set_global_assignment -name GENERATE_RBF_FILE ON 434 | set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top 435 | set_global_assignment -name SLD_FILE db/stp1_auto_stripped.stp -------------------------------------------------------------------------------- /board/1.0/snes.PrjPcb: -------------------------------------------------------------------------------- 1 | [Design] 2 | Version=1.0 3 | HierarchyMode=0 4 | ChannelRoomNamingStyle=0 5 | LogFolderPath= 6 | ReleasesFolder= 7 | ReleaseVaultGUID= 8 | ReleaseVaultName= 9 | ChannelDesignatorFormatString=$Component_$RoomName 10 | ChannelRoomLevelSeperator=_ 11 | OpenOutputs=1 12 | ArchiveProject=0 13 | TimestampOutput=0 14 | SeparateFolders=0 15 | TemplateLocationPath= 16 | PinSwapBy_Netlabel=1 17 | PinSwapBy_Pin=1 18 | AllowPortNetNames=0 19 | AllowSheetEntryNetNames=1 20 | AppendSheetNumberToLocalNets=0 21 | NetlistSinglePinNets=0 22 | DefaultConfiguration=Default Configuration 23 | UserID=0xFFFFFFFF 24 | DefaultPcbProtel=1 25 | DefaultPcbPcad=0 26 | ReorderDocumentsOnCompile=1 27 | NameNetsHierarchically=0 28 | PowerPortNamesTakePriority=0 29 | PushECOToAnnotationFile=1 30 | DItemRevisionGUID= 31 | ReportSuppressedErrorsInMessages=0 32 | OutputPath= 33 | 34 | [Document1] 35 | DocumentPath=power.SchDoc 36 | AnnotationEnabled=1 37 | AnnotateStartValue=1 38 | AnnotationIndexControlEnabled=1 39 | AnnotateSuffix= 40 | AnnotateScope=All 41 | AnnotateOrder=1 42 | DoLibraryUpdate=1 43 | DoDatabaseUpdate=1 44 | ClassGenCCAutoEnabled=1 45 | ClassGenCCAutoRoomEnabled=1 46 | ClassGenNCAutoScope=None 47 | DItemRevisionGUID= 48 | GenerateClassCluster=0 49 | 50 | [Document2] 51 | DocumentPath=snesio.SchDoc 52 | AnnotationEnabled=1 53 | AnnotateStartValue=1 54 | AnnotationIndexControlEnabled=1 55 | AnnotateSuffix= 56 | AnnotateScope=All 57 | AnnotateOrder=2 58 | DoLibraryUpdate=1 59 | DoDatabaseUpdate=1 60 | ClassGenCCAutoEnabled=1 61 | ClassGenCCAutoRoomEnabled=1 62 | ClassGenNCAutoScope=None 63 | DItemRevisionGUID= 64 | GenerateClassCluster=0 65 | 66 | [Document3] 67 | DocumentPath=mem.SchDoc 68 | AnnotationEnabled=1 69 | AnnotateStartValue=1 70 | AnnotationIndexControlEnabled=1 71 | AnnotateSuffix= 72 | AnnotateScope=All 73 | AnnotateOrder=3 74 | DoLibraryUpdate=1 75 | DoDatabaseUpdate=1 76 | ClassGenCCAutoEnabled=1 77 | ClassGenCCAutoRoomEnabled=1 78 | ClassGenNCAutoScope=None 79 | DItemRevisionGUID= 80 | GenerateClassCluster=0 81 | 82 | [Document4] 83 | DocumentPath=conf.SchDoc 84 | AnnotationEnabled=1 85 | AnnotateStartValue=1 86 | AnnotationIndexControlEnabled=1 87 | AnnotateSuffix= 88 | AnnotateScope=All 89 | AnnotateOrder=0 90 | DoLibraryUpdate=1 91 | DoDatabaseUpdate=1 92 | ClassGenCCAutoEnabled=1 93 | ClassGenCCAutoRoomEnabled=1 94 | ClassGenNCAutoScope=None 95 | DItemRevisionGUID= 96 | GenerateClassCluster=0 97 | 98 | [Document5] 99 | DocumentPath=parts.SchLib 100 | AnnotationEnabled=1 101 | AnnotateStartValue=1 102 | AnnotationIndexControlEnabled=0 103 | AnnotateSuffix= 104 | AnnotateScope=All 105 | AnnotateOrder=-1 106 | DoLibraryUpdate=1 107 | DoDatabaseUpdate=1 108 | ClassGenCCAutoEnabled=1 109 | ClassGenCCAutoRoomEnabled=1 110 | ClassGenNCAutoScope=None 111 | DItemRevisionGUID= 112 | GenerateClassCluster=0 113 | 114 | [Document6] 115 | DocumentPath=pcb.PcbLib 116 | AnnotationEnabled=1 117 | AnnotateStartValue=1 118 | AnnotationIndexControlEnabled=0 119 | AnnotateSuffix= 120 | AnnotateScope=All 121 | AnnotateOrder=-1 122 | DoLibraryUpdate=1 123 | DoDatabaseUpdate=1 124 | ClassGenCCAutoEnabled=1 125 | ClassGenCCAutoRoomEnabled=1 126 | ClassGenNCAutoScope=None 127 | DItemRevisionGUID= 128 | GenerateClassCluster=0 129 | 130 | [Document7] 131 | DocumentPath=pcb.PcbDoc 132 | AnnotationEnabled=1 133 | AnnotateStartValue=1 134 | AnnotationIndexControlEnabled=0 135 | AnnotateSuffix= 136 | AnnotateScope=All 137 | AnnotateOrder=-1 138 | DoLibraryUpdate=1 139 | DoDatabaseUpdate=1 140 | ClassGenCCAutoEnabled=1 141 | ClassGenCCAutoRoomEnabled=1 142 | ClassGenNCAutoScope=None 143 | DItemRevisionGUID= 144 | GenerateClassCluster=0 145 | 146 | [GeneratedDocument1] 147 | DocumentPath=Project Outputs for snes\BGA Escape Route - pcb.html 148 | DItemRevisionGUID= 149 | 150 | [GeneratedDocument2] 151 | DocumentPath=Project Outputs for snes\Design Rule Check - pcb.html 152 | DItemRevisionGUID= 153 | 154 | [GeneratedDocument3] 155 | DocumentPath=Project Outputs for snes\pcb.DRR 156 | DItemRevisionGUID= 157 | 158 | [GeneratedDocument4] 159 | DocumentPath=Project Outputs for snes\pcb.EXTREP 160 | DItemRevisionGUID= 161 | 162 | [GeneratedDocument5] 163 | DocumentPath=Project Outputs for snes\pcb.G1 164 | DItemRevisionGUID= 165 | 166 | [GeneratedDocument6] 167 | DocumentPath=Project Outputs for snes\pcb.GBL 168 | DItemRevisionGUID= 169 | 170 | [GeneratedDocument7] 171 | DocumentPath=Project Outputs for snes\pcb.GBO 172 | DItemRevisionGUID= 173 | 174 | [GeneratedDocument8] 175 | DocumentPath=Project Outputs for snes\pcb.GBP 176 | DItemRevisionGUID= 177 | 178 | [GeneratedDocument9] 179 | DocumentPath=Project Outputs for snes\pcb.GBS 180 | DItemRevisionGUID= 181 | 182 | [GeneratedDocument10] 183 | DocumentPath=Project Outputs for snes\pcb.GD1 184 | DItemRevisionGUID= 185 | 186 | [GeneratedDocument11] 187 | DocumentPath=Project Outputs for snes\pcb.GG1 188 | DItemRevisionGUID= 189 | 190 | [GeneratedDocument12] 191 | DocumentPath=Project Outputs for snes\pcb.GKO 192 | DItemRevisionGUID= 193 | 194 | [GeneratedDocument13] 195 | DocumentPath=Project Outputs for snes\pcb.GP1 196 | DItemRevisionGUID= 197 | 198 | [GeneratedDocument14] 199 | DocumentPath=Project Outputs for snes\pcb.GTL 200 | DItemRevisionGUID= 201 | 202 | [GeneratedDocument15] 203 | DocumentPath=Project Outputs for snes\pcb.GTO 204 | DItemRevisionGUID= 205 | 206 | [GeneratedDocument16] 207 | DocumentPath=Project Outputs for snes\pcb.GTS 208 | DItemRevisionGUID= 209 | 210 | [GeneratedDocument17] 211 | DocumentPath=Project Outputs for snes\pcb.LDP 212 | DItemRevisionGUID= 213 | 214 | [GeneratedDocument18] 215 | DocumentPath=pcb.PcbDoc.htm 216 | DItemRevisionGUID= 217 | 218 | [GeneratedDocument19] 219 | DocumentPath=Project Outputs for snes\pcb.REP 220 | DItemRevisionGUID= 221 | 222 | [GeneratedDocument20] 223 | DocumentPath=Project Outputs for snes\pcb.RUL 224 | DItemRevisionGUID= 225 | 226 | [GeneratedDocument21] 227 | DocumentPath=Project Outputs for snes\pcb.TXT 228 | DItemRevisionGUID= 229 | 230 | [Configuration1] 231 | Name=Default Configuration 232 | ParameterCount=0 233 | ConstraintFileCount=0 234 | ReleaseItemId= 235 | CurrentRevision= 236 | Variant=[No Variations] 237 | GenerateBOM=0 238 | OutputJobsCount=0 239 | 240 | [OutputGroup1] 241 | Name=Netlist Outputs 242 | Description= 243 | TargetPrinter=Microsoft XPS Document Writer 244 | PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 245 | OutputType1=CadnetixNetlist 246 | OutputName1=Cadnetix Netlist 247 | OutputDocumentPath1= 248 | OutputVariantName1= 249 | OutputDefault1=0 250 | OutputType2=CalayNetlist 251 | OutputName2=Calay Netlist 252 | OutputDocumentPath2= 253 | OutputVariantName2= 254 | OutputDefault2=0 255 | OutputType3=EDIF 256 | OutputName3=EDIF for PCB 257 | OutputDocumentPath3= 258 | OutputVariantName3= 259 | OutputDefault3=0 260 | OutputType4=EESofNetlist 261 | OutputName4=EESof Netlist 262 | OutputDocumentPath4= 263 | OutputVariantName4= 264 | OutputDefault4=0 265 | OutputType5=IntergraphNetlist 266 | OutputName5=Intergraph Netlist 267 | OutputDocumentPath5= 268 | OutputVariantName5= 269 | OutputDefault5=0 270 | OutputType6=MentorBoardStationNetlist 271 | OutputName6=Mentor BoardStation Netlist 272 | OutputDocumentPath6= 273 | OutputVariantName6= 274 | OutputDefault6=0 275 | OutputType7=MultiWire 276 | OutputName7=MultiWire 277 | OutputDocumentPath7= 278 | OutputVariantName7= 279 | OutputDefault7=0 280 | OutputType8=OrCadPCB2Netlist 281 | OutputName8=Orcad/PCB2 Netlist 282 | OutputDocumentPath8= 283 | OutputVariantName8= 284 | OutputDefault8=0 285 | OutputType9=PADSNetlist 286 | OutputName9=PADS ASCII Netlist 287 | OutputDocumentPath9= 288 | OutputVariantName9= 289 | OutputDefault9=0 290 | OutputType10=Pcad 291 | OutputName10=Pcad for PCB 292 | OutputDocumentPath10= 293 | OutputVariantName10= 294 | OutputDefault10=0 295 | OutputType11=PCADNetlist 296 | OutputName11=PCAD Netlist 297 | OutputDocumentPath11= 298 | OutputVariantName11= 299 | OutputDefault11=0 300 | OutputType12=PCADnltNetlist 301 | OutputName12=PCADnlt Netlist 302 | OutputDocumentPath12= 303 | OutputVariantName12= 304 | OutputDefault12=0 305 | OutputType13=Protel2Netlist 306 | OutputName13=Protel2 Netlist 307 | OutputDocumentPath13= 308 | OutputVariantName13= 309 | OutputDefault13=0 310 | OutputType14=ProtelNetlist 311 | OutputName14=Protel 312 | OutputDocumentPath14= 313 | OutputVariantName14= 314 | OutputDefault14=0 315 | OutputType15=RacalNetlist 316 | OutputName15=Racal Netlist 317 | OutputDocumentPath15= 318 | OutputVariantName15= 319 | OutputDefault15=0 320 | OutputType16=RINFNetlist 321 | OutputName16=RINF Netlist 322 | OutputDocumentPath16= 323 | OutputVariantName16= 324 | OutputDefault16=0 325 | OutputType17=SciCardsNetlist 326 | OutputName17=SciCards Netlist 327 | OutputDocumentPath17= 328 | OutputVariantName17= 329 | OutputDefault17=0 330 | OutputType18=SIMetrixNetlist 331 | OutputName18=SIMetrix 332 | OutputDocumentPath18= 333 | OutputVariantName18= 334 | OutputDefault18=0 335 | OutputType19=SIMPLISNetlist 336 | OutputName19=SIMPLIS 337 | OutputDocumentPath19= 338 | OutputVariantName19= 339 | OutputDefault19=0 340 | OutputType20=TangoNetlist 341 | OutputName20=Tango Netlist 342 | OutputDocumentPath20= 343 | OutputVariantName20= 344 | OutputDefault20=0 345 | OutputType21=TelesisNetlist 346 | OutputName21=Telesis Netlist 347 | OutputDocumentPath21= 348 | OutputVariantName21= 349 | OutputDefault21=0 350 | OutputType22=WireListNetlist 351 | OutputName22=WireList Netlist 352 | OutputDocumentPath22= 353 | OutputVariantName22= 354 | OutputDefault22=0 355 | OutputType23=XSpiceNetlist 356 | OutputName23=XSpice Netlist 357 | OutputDocumentPath23= 358 | OutputVariantName23= 359 | OutputDefault23=0 360 | 361 | [OutputGroup2] 362 | Name=Simulator Outputs 363 | Description= 364 | TargetPrinter=Microsoft XPS Document Writer 365 | PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 366 | OutputType1=AdvSimNetlist 367 | OutputName1=Mixed Sim 368 | OutputDocumentPath1= 369 | OutputVariantName1= 370 | OutputDefault1=0 371 | OutputType2=SIMetrix_Sim 372 | OutputName2=SIMetrix 373 | OutputDocumentPath2= 374 | OutputVariantName2= 375 | OutputDefault2=0 376 | OutputType3=SIMPLIS_Sim 377 | OutputName3=SIMPLIS 378 | OutputDocumentPath3= 379 | OutputVariantName3= 380 | OutputDefault3=0 381 | 382 | [OutputGroup3] 383 | Name=Documentation Outputs 384 | Description= 385 | TargetPrinter=Microsoft XPS Document Writer 386 | PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 387 | OutputType1=Composite 388 | OutputName1=Composite Drawing 389 | OutputDocumentPath1=PCB1.PcbDoc 390 | OutputVariantName1= 391 | OutputDefault1=0 392 | PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 393 | Configuration1_Name1=OutputConfigurationParameter1 394 | Configuration1_Item1=PrintArea=DesignExtent|PrintAreaLowerLeftCornerX=0|PrintAreaLowerLeftCornerY=0|PrintAreaUpperRightCornerX=0|PrintAreaUpperRightCornerY=0|Record=PcbPrintView 395 | Configuration1_Name2=OutputConfigurationParameter2 396 | Configuration1_Item2=IncludeBottomLayerComponents=True|IncludeMultiLayerComponents=True|IncludeTopLayerComponents=True|Index=0|Mirror=False|Name=MultiLayer Default Print|PadNumberFontSize=14|Record=PcbPrintOut|ShowHoles=False|ShowPadNets=False|ShowPadNumbers=False|SubstituteFonts=False 397 | Configuration1_Name3=OutputConfigurationParameter3 398 | Configuration1_Item3=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=MultiLayer|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer 399 | OutputType2=PCB 3D Print 400 | OutputName2=PCB 3D Print 401 | OutputDocumentPath2= 402 | OutputVariantName2=[No Variations] 403 | OutputDefault2=0 404 | PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 405 | OutputType3=PCB 3D Video 406 | OutputName3=PCB 3D Video 407 | OutputDocumentPath3= 408 | OutputVariantName3=[No Variations] 409 | OutputDefault3=0 410 | PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 411 | OutputType4=PCB Print 412 | OutputName4=PCB Prints 413 | OutputDocumentPath4= 414 | OutputVariantName4= 415 | OutputDefault4=0 416 | PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 417 | OutputType5=Report Print 418 | OutputName5=Report Prints 419 | OutputDocumentPath5= 420 | OutputVariantName5= 421 | OutputDefault5=0 422 | PageOptions5=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 423 | OutputType6=Schematic Print 424 | OutputName6=Schematic Prints 425 | OutputDocumentPath6= 426 | OutputVariantName6= 427 | OutputDefault6=0 428 | PageOptions6=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 429 | OutputType7=SimView Print 430 | OutputName7=SimView Prints 431 | OutputDocumentPath7= 432 | OutputVariantName7= 433 | OutputDefault7=0 434 | PageOptions7=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 435 | OutputType8=Wave Print 436 | OutputName8=Wave Prints 437 | OutputDocumentPath8= 438 | OutputVariantName8= 439 | OutputDefault8=0 440 | PageOptions8=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 441 | OutputType9=WaveSim Print 442 | OutputName9=WaveSim Prints 443 | OutputDocumentPath9= 444 | OutputVariantName9= 445 | OutputDefault9=0 446 | PageOptions9=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 447 | OutputType10=PCBLIB Print 448 | OutputName10=PCBLIB Prints 449 | OutputDocumentPath10= 450 | OutputVariantName10= 451 | OutputDefault10=0 452 | PageOptions10=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 453 | 454 | [OutputGroup4] 455 | Name=Assembly Outputs 456 | Description= 457 | TargetPrinter=Microsoft XPS Document Writer 458 | PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 459 | OutputType1=Assembly 460 | OutputName1=Assembly Drawings 461 | OutputDocumentPath1= 462 | OutputVariantName1=[No Variations] 463 | OutputDefault1=0 464 | PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=3.30|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 465 | Configuration1_Name1=OutputConfigurationParameter1 466 | Configuration1_Item1=DesignatorDisplayMode=Physical|PrintArea=DesignExtent|PrintAreaLowerLeftCornerX=0|PrintAreaLowerLeftCornerY=0|PrintAreaUpperRightCornerX=0|PrintAreaUpperRightCornerY=0|Record=PcbPrintView 467 | Configuration1_Name2=OutputConfigurationParameter2 468 | Configuration1_Item2=IncludeBottomLayerComponents=False|IncludeMultiLayerComponents=True|IncludeTopLayerComponents=True|IncludeViewports=True|Index=0|Mirror=False|Name=Top Assembly Drawing|PadNumberFontSize=14|Record=PcbPrintOut|ShowHoles=False|ShowPadNets=False|ShowPadNumbers=False|SubstituteFonts=False 469 | Configuration1_Name3=OutputConfigurationParameter3 470 | Configuration1_Item3=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Hidden|FFill=Hidden|FPad=Hidden|FRegion=Hidden|FText=Hidden|FTrack=Hidden|FVia=Hidden|Layer=TopLayer|Polygon=Hidden|PrintOutIndex=0|Record=PcbPrintLayer 471 | Configuration1_Name4=OutputConfigurationParameter4 472 | Configuration1_Item4=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=TopOverlay|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer 473 | Configuration1_Name5=OutputConfigurationParameter5 474 | Configuration1_Item5=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Hidden|Layer=MultiLayer|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer 475 | Configuration1_Name6=OutputConfigurationParameter6 476 | Configuration1_Item6=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=Mechanical13|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer 477 | Configuration1_Name7=OutputConfigurationParameter7 478 | Configuration1_Item7=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=Mechanical15|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer 479 | Configuration1_Name8=OutputConfigurationParameter8 480 | Configuration1_Item8=IncludeBottomLayerComponents=True|IncludeMultiLayerComponents=True|IncludeTopLayerComponents=False|IncludeViewports=True|Index=1|Mirror=False|Name=Bottom Assembly Drawing|PadNumberFontSize=14|Record=PcbPrintOut|ShowHoles=False|ShowPadNets=False|ShowPadNumbers=False|SubstituteFonts=False 481 | Configuration1_Name9=OutputConfigurationParameter9 482 | Configuration1_Item9=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Hidden|FFill=Hidden|FPad=Hidden|FRegion=Hidden|FText=Hidden|FTrack=Hidden|FVia=Hidden|Layer=BottomLayer|Polygon=Hidden|PrintOutIndex=1|Record=PcbPrintLayer 483 | Configuration1_Name10=OutputConfigurationParameter10 484 | Configuration1_Item10=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=BottomOverlay|Polygon=Full|PrintOutIndex=1|Record=PcbPrintLayer 485 | Configuration1_Name11=OutputConfigurationParameter11 486 | Configuration1_Item11=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Hidden|Layer=MultiLayer|Polygon=Full|PrintOutIndex=1|Record=PcbPrintLayer 487 | Configuration1_Name12=OutputConfigurationParameter12 488 | Configuration1_Item12=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=Mechanical13|Polygon=Full|PrintOutIndex=1|Record=PcbPrintLayer 489 | Configuration1_Name13=OutputConfigurationParameter13 490 | Configuration1_Item13=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=Mechanical15|Polygon=Full|PrintOutIndex=1|Record=PcbPrintLayer 491 | OutputType2=Pick Place 492 | OutputName2=Generates pick and place files 493 | OutputDocumentPath2= 494 | OutputVariantName2=[No Variations] 495 | OutputDefault2=0 496 | OutputType3=Test Points For Assembly 497 | OutputName3=Test Point Report 498 | OutputDocumentPath3= 499 | OutputVariantName3=[No Variations] 500 | OutputDefault3=0 501 | 502 | [OutputGroup5] 503 | Name=Fabrication Outputs 504 | Description= 505 | TargetPrinter=Microsoft XPS Document Writer 506 | PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 507 | OutputType1=Drill 508 | OutputName1=Drill Drawing/Guides 509 | OutputDocumentPath1= 510 | OutputVariantName1=[No Variations] 511 | OutputDefault1=0 512 | PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 513 | OutputType2=Mask 514 | OutputName2=Solder/Paste Mask Prints 515 | OutputDocumentPath2= 516 | OutputVariantName2= 517 | OutputDefault2=0 518 | PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 519 | OutputType3=Final 520 | OutputName3=Final Artwork Prints 521 | OutputDocumentPath3= 522 | OutputVariantName3=[No Variations] 523 | OutputDefault3=0 524 | PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 525 | OutputType4=CompositeDrill 526 | OutputName4=Composite Drill Drawing 527 | OutputDocumentPath4= 528 | OutputVariantName4=[No Variations] 529 | OutputDefault4=0 530 | PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 531 | OutputType5=NC Drill 532 | OutputName5=NC Drill Files 533 | OutputDocumentPath5= 534 | OutputVariantName5= 535 | OutputDefault5=0 536 | Configuration5_Name1=OutputConfigurationParameter1 537 | Configuration5_Item1=BoardEdgeRoutToolDia=2000000|GenerateBoardEdgeRout=False|GenerateDrilledSlotsG85=False|GenerateEIADrillFile=False|GenerateSeparatePlatedNonPlatedFiles=False|NumberOfDecimals=5|NumberOfUnits=2|OptimizeChangeLocationCommands=True|OriginPosition=Relative|Record=DrillView|Units=Imperial|ZeroesMode=SuppressTrailingZeroes 538 | OutputType6=ODB 539 | OutputName6=ODB++ Files 540 | OutputDocumentPath6= 541 | OutputVariantName6=[No Variations] 542 | OutputDefault6=0 543 | OutputType7=Plane 544 | OutputName7=Power-Plane Prints 545 | OutputDocumentPath7= 546 | OutputVariantName7= 547 | OutputDefault7=0 548 | PageOptions7=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 549 | OutputType8=Test Points 550 | OutputName8=Test Point Report 551 | OutputDocumentPath8= 552 | OutputVariantName8= 553 | OutputDefault8=0 554 | OutputType9=Gerber 555 | OutputName9=Gerber Files 556 | OutputDocumentPath9= 557 | OutputVariantName9=[No Variations] 558 | OutputDefault9=0 559 | Configuration9_Name1=OutputConfigurationParameter1 560 | Configuration9_Item1=AddToAllPlots.Set=SerializeLayerHash.Version~2,ClassName~TLayerToBoolean|CentrePlots=False|DrillDrawingSymbol=GraphicsSymbol|DrillDrawingSymbolSize=500000|EmbeddedApertures=True|FilmBorderSize=10000000|FilmXSize=200000000|FilmYSize=160000000|FlashAllFills=False|FlashPadShapes=True|G54OnApertureChange=False|GenerateDRCRulesFile=True|GenerateReliefShapes=True|GerberUnit=Imperial|IncludeUnconnectedMidLayerPads=False|LeadingAndTrailingZeroesMode=SuppressLeadingZeroes|MaxApertureSize=2500000|MinusApertureTolerance=50|Mirror.Set=SerializeLayerHash.Version~2,ClassName~TLayerToBoolean|MirrorDrillDrawingPlots=False|MirrorDrillGuidePlots=False|NumberOfDecimals=5|OptimizeChangeLocationCommands=True|OriginPosition=Relative|Panelize=False|Plot.Set=SerializeLayerHash.Version~2,ClassName~TLayerToBoolean,16973830~1,16973834~1,16777217~1,16842753~1,16777218~1,16842751~1,16973835~1,16973831~1,16973837~1|PlotPositivePlaneLayers=False|PlotUsedDrillDrawingLayerPairs=False|PlotUsedDrillGuideLayerPairs=False|PlusApertureTolerance=50|Record=GerberView|SoftwareArcs=False|Sorted=False 561 | 562 | [OutputGroup6] 563 | Name=Report Outputs 564 | Description= 565 | TargetPrinter=Microsoft XPS Document Writer 566 | PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 567 | OutputType1=Script 568 | OutputName1=Script Output 569 | OutputDocumentPath1= 570 | OutputVariantName1=[No Variations] 571 | OutputDefault1=0 572 | OutputType2=SimpleBOM 573 | OutputName2=Simple BOM 574 | OutputDocumentPath2= 575 | OutputVariantName2=[No Variations] 576 | OutputDefault2=0 577 | OutputType3=SinglePinNetReporter 578 | OutputName3=Report Single Pin Nets 579 | OutputDocumentPath3= 580 | OutputVariantName3=[No Variations] 581 | OutputDefault3=0 582 | OutputType4=BOM_PartType 583 | OutputName4=Bill of Materials 584 | OutputDocumentPath4= 585 | OutputVariantName4=[No Variations] 586 | OutputDefault4=0 587 | PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 588 | Configuration4_Name1=Filter 589 | Configuration4_Item1=545046300E5446696C74657257726170706572000D46696C7465722E416374697665090F46696C7465722E43726974657269610A04000000000000000000 590 | Configuration4_Name2=General 591 | Configuration4_Item2=OpenExported=True|AddToProject=False|ForceFit=False|NotFitted=False|Database=False|IncludePCBData=True|IncludeVaultData=False|ShowExportOptions=True|TemplateFilename=BOM Default Template 95.xlt|BatchMode=5|FormWidth=942|FormHeight=641|SupplierProdQty=1|SupplierAutoQty=False|SupplierUseCachedPricing=False|SupplierCurrency= 592 | Configuration4_Name3=GroupOrder 593 | Configuration4_Item3=Comment=True|Footprint=True 594 | Configuration4_Name4=OutputConfigurationParameter1 595 | Configuration4_Item4=? 596 | Configuration4_Name5=SortOrder 597 | Configuration4_Item5=Designator=Up|Comment=Up|Footprint=Up 598 | Configuration4_Name6=VisibleOrder 599 | Configuration4_Item6=Comment=100|Description=100|Designator=100|Footprint=100|LibRef=100|Quantity=100 600 | OutputType5=ComponentCrossReference 601 | OutputName5=Component Cross Reference Report 602 | OutputDocumentPath5= 603 | OutputVariantName5=[No Variations] 604 | OutputDefault5=0 605 | OutputType6=ReportHierarchy 606 | OutputName6=Report Project Hierarchy 607 | OutputDocumentPath6= 608 | OutputVariantName6=[No Variations] 609 | OutputDefault6=0 610 | 611 | [OutputGroup7] 612 | Name=Other Outputs 613 | Description= 614 | TargetPrinter=Microsoft XPS Document Writer 615 | PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 616 | OutputType1=Text Print 617 | OutputName1=Text Print 618 | OutputDocumentPath1= 619 | OutputVariantName1= 620 | OutputDefault1=0 621 | PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 622 | OutputType2=Text Print 623 | OutputName2=Text Print 624 | OutputDocumentPath2= 625 | OutputVariantName2= 626 | OutputDefault2=0 627 | PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 628 | OutputType3=Text Print 629 | OutputName3=Text Print 630 | OutputDocumentPath3= 631 | OutputVariantName3= 632 | OutputDefault3=0 633 | PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 634 | OutputType4=Text Print 635 | OutputName4=Text Print 636 | OutputDocumentPath4= 637 | OutputVariantName4= 638 | OutputDefault4=0 639 | PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 640 | OutputType5=Text Print 641 | OutputName5=Text Print 642 | OutputDocumentPath5= 643 | OutputVariantName5= 644 | OutputDefault5=0 645 | PageOptions5=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 646 | OutputType6=Text Print 647 | OutputName6=Text Print 648 | OutputDocumentPath6= 649 | OutputVariantName6= 650 | OutputDefault6=0 651 | PageOptions6=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 652 | OutputType7=Text Print 653 | OutputName7=Text Print 654 | OutputDocumentPath7= 655 | OutputVariantName7= 656 | OutputDefault7=0 657 | PageOptions7=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 658 | OutputType8=Text Print 659 | OutputName8=Text Print 660 | OutputDocumentPath8= 661 | OutputVariantName8= 662 | OutputDefault8=0 663 | PageOptions8=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 664 | OutputType9=Text Print 665 | OutputName9=Text Print 666 | OutputDocumentPath9= 667 | OutputVariantName9= 668 | OutputDefault9=0 669 | PageOptions9=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 670 | OutputType10=Text Print 671 | OutputName10=Text Print 672 | OutputDocumentPath10= 673 | OutputVariantName10= 674 | OutputDefault10=0 675 | PageOptions10=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 676 | OutputType11=Text Print 677 | OutputName11=Text Print 678 | OutputDocumentPath11= 679 | OutputVariantName11= 680 | OutputDefault11=0 681 | PageOptions11=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 682 | OutputType12=Text Print 683 | OutputName12=Text Print 684 | OutputDocumentPath12= 685 | OutputVariantName12= 686 | OutputDefault12=0 687 | PageOptions12=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 688 | OutputType13=Text Print 689 | OutputName13=Text Print 690 | OutputDocumentPath13= 691 | OutputVariantName13= 692 | OutputDefault13=0 693 | PageOptions13=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 694 | OutputType14=Text Print 695 | OutputName14=Text Print 696 | OutputDocumentPath14= 697 | OutputVariantName14= 698 | OutputDefault14=0 699 | PageOptions14=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 700 | OutputType15=Text Print 701 | OutputName15=Text Print 702 | OutputDocumentPath15= 703 | OutputVariantName15= 704 | OutputDefault15=0 705 | PageOptions15=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 706 | OutputType16=Text Print 707 | OutputName16=Text Print 708 | OutputDocumentPath16= 709 | OutputVariantName16= 710 | OutputDefault16=0 711 | PageOptions16=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 712 | OutputType17=Text Print 713 | OutputName17=Text Print 714 | OutputDocumentPath17= 715 | OutputVariantName17= 716 | OutputDefault17=0 717 | PageOptions17=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 718 | OutputType18=Text Print 719 | OutputName18=Text Print 720 | OutputDocumentPath18= 721 | OutputVariantName18= 722 | OutputDefault18=0 723 | PageOptions18=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 724 | OutputType19=Text Print 725 | OutputName19=Text Print 726 | OutputDocumentPath19= 727 | OutputVariantName19= 728 | OutputDefault19=0 729 | PageOptions19=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 730 | OutputType20=Text Print 731 | OutputName20=Text Print 732 | OutputDocumentPath20= 733 | OutputVariantName20= 734 | OutputDefault20=0 735 | PageOptions20=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 736 | OutputType21=Text Print 737 | OutputName21=Text Print 738 | OutputDocumentPath21= 739 | OutputVariantName21= 740 | OutputDefault21=0 741 | PageOptions21=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 742 | OutputType22=Text Print 743 | OutputName22=Text Print 744 | OutputDocumentPath22= 745 | OutputVariantName22= 746 | OutputDefault22=0 747 | PageOptions22=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 748 | OutputType23=Text Print 749 | OutputName23=Text Print 750 | OutputDocumentPath23= 751 | OutputVariantName23= 752 | OutputDefault23=0 753 | PageOptions23=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 754 | OutputType24=Text Print 755 | OutputName24=Text Print 756 | OutputDocumentPath24= 757 | OutputVariantName24= 758 | OutputDefault24=0 759 | PageOptions24=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 760 | OutputType25=Text Print 761 | OutputName25=Text Print 762 | OutputDocumentPath25= 763 | OutputVariantName25= 764 | OutputDefault25=0 765 | PageOptions25=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 766 | OutputType26=Text Print 767 | OutputName26=Text Print 768 | OutputDocumentPath26= 769 | OutputVariantName26= 770 | OutputDefault26=0 771 | PageOptions26=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 772 | OutputType27=Text Print 773 | OutputName27=Text Print 774 | OutputDocumentPath27= 775 | OutputVariantName27= 776 | OutputDefault27=0 777 | PageOptions27=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 778 | OutputType28=Text Print 779 | OutputName28=Text Print 780 | OutputDocumentPath28= 781 | OutputVariantName28= 782 | OutputDefault28=0 783 | PageOptions28=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 784 | OutputType29=Text Print 785 | OutputName29=Text Print 786 | OutputDocumentPath29= 787 | OutputVariantName29= 788 | OutputDefault29=0 789 | PageOptions29=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=Letter|PrintScaleMode=1 790 | 791 | [OutputGroup8] 792 | Name=Validation Outputs 793 | Description= 794 | TargetPrinter=Microsoft XPS Document Writer 795 | PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 796 | OutputType1=Design Rules Check 797 | OutputName1=Design Rules Check 798 | OutputDocumentPath1= 799 | OutputVariantName1= 800 | OutputDefault1=0 801 | PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 802 | OutputType2=Differences Report 803 | OutputName2=Differences Report 804 | OutputDocumentPath2= 805 | OutputVariantName2= 806 | OutputDefault2=0 807 | PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 808 | OutputType3=Electrical Rules Check 809 | OutputName3=Electrical Rules Check 810 | OutputDocumentPath3= 811 | OutputVariantName3= 812 | OutputDefault3=0 813 | PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 814 | OutputType4=Footprint Comparison Report 815 | OutputName4=Footprint Comparison Report 816 | OutputDocumentPath4= 817 | OutputVariantName4= 818 | OutputDefault4=0 819 | 820 | [OutputGroup9] 821 | Name=Export Outputs 822 | Description= 823 | TargetPrinter=Microsoft XPS Document Writer 824 | PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1 825 | OutputType1=ExportSTEP 826 | OutputName1=Export STEP 827 | OutputDocumentPath1= 828 | OutputVariantName1=[No Variations] 829 | OutputDefault1=0 830 | OutputType2=ExportIDF 831 | OutputName2=Export IDF 832 | OutputDocumentPath2= 833 | OutputVariantName2= 834 | OutputDefault2=0 835 | OutputType3=AutoCAD dwg/dxf PCB 836 | OutputName3=AutoCAD dwg/dxf File PCB 837 | OutputDocumentPath3= 838 | OutputVariantName3= 839 | OutputDefault3=0 840 | OutputType4=AutoCAD dwg/dxf Schematic 841 | OutputName4=AutoCAD dwg/dxf File Schematic 842 | OutputDocumentPath4= 843 | OutputVariantName4= 844 | OutputDefault4=0 845 | 846 | [Modification Levels] 847 | Type1=1 848 | Type2=1 849 | Type3=1 850 | Type4=1 851 | Type5=1 852 | Type6=1 853 | Type7=1 854 | Type8=1 855 | Type9=1 856 | Type10=1 857 | Type11=1 858 | Type12=1 859 | Type13=1 860 | Type14=1 861 | Type15=1 862 | Type16=1 863 | Type17=1 864 | Type18=1 865 | Type19=1 866 | Type20=1 867 | Type21=1 868 | Type22=1 869 | Type23=1 870 | Type24=1 871 | Type25=1 872 | Type26=1 873 | Type27=1 874 | Type28=1 875 | Type29=1 876 | Type30=1 877 | Type31=1 878 | Type32=1 879 | Type33=1 880 | Type34=1 881 | Type35=1 882 | Type36=1 883 | Type37=1 884 | Type38=1 885 | Type39=1 886 | Type40=1 887 | Type41=1 888 | Type42=1 889 | Type43=1 890 | Type44=1 891 | Type45=1 892 | Type46=1 893 | Type47=1 894 | Type48=1 895 | Type49=1 896 | Type50=1 897 | Type51=1 898 | Type52=1 899 | Type53=1 900 | Type54=1 901 | Type55=1 902 | Type56=1 903 | Type57=1 904 | Type58=1 905 | Type59=1 906 | Type60=1 907 | Type61=1 908 | Type62=1 909 | Type63=1 910 | Type64=1 911 | Type65=1 912 | Type66=1 913 | Type67=1 914 | Type68=1 915 | Type69=1 916 | Type70=1 917 | Type71=1 918 | Type72=1 919 | Type73=1 920 | Type74=1 921 | Type75=1 922 | Type76=1 923 | Type77=1 924 | Type78=1 925 | 926 | [Difference Levels] 927 | Type1=1 928 | Type2=1 929 | Type3=1 930 | Type4=1 931 | Type5=1 932 | Type6=1 933 | Type7=1 934 | Type8=1 935 | Type9=1 936 | Type10=1 937 | Type11=1 938 | Type12=1 939 | Type13=1 940 | Type14=1 941 | Type15=1 942 | Type16=1 943 | Type17=1 944 | Type18=1 945 | Type19=1 946 | Type20=1 947 | Type21=1 948 | Type22=1 949 | Type23=1 950 | Type24=1 951 | Type25=1 952 | Type26=1 953 | Type27=1 954 | Type28=1 955 | Type29=1 956 | Type30=1 957 | Type31=1 958 | Type32=1 959 | Type33=1 960 | Type34=1 961 | Type35=1 962 | Type36=1 963 | Type37=1 964 | Type38=1 965 | Type39=1 966 | Type40=1 967 | Type41=1 968 | Type42=1 969 | Type43=1 970 | 971 | [Electrical Rules Check] 972 | Type1=1 973 | Type2=1 974 | Type3=2 975 | Type4=1 976 | Type5=2 977 | Type6=2 978 | Type7=1 979 | Type8=1 980 | Type9=1 981 | Type10=1 982 | Type11=2 983 | Type12=2 984 | Type13=2 985 | Type14=1 986 | Type15=1 987 | Type16=1 988 | Type17=1 989 | Type18=1 990 | Type19=1 991 | Type20=1 992 | Type21=1 993 | Type22=1 994 | Type23=1 995 | Type24=1 996 | Type25=2 997 | Type26=2 998 | Type27=2 999 | Type28=1 1000 | Type29=1 1001 | Type30=1 1002 | Type31=1 1003 | Type32=2 1004 | Type33=2 1005 | Type34=2 1006 | Type35=1 1007 | Type36=2 1008 | Type37=1 1009 | Type38=2 1010 | Type39=2 1011 | Type40=2 1012 | Type41=0 1013 | Type42=2 1014 | Type43=1 1015 | Type44=1 1016 | Type45=2 1017 | Type46=1 1018 | Type47=2 1019 | Type48=2 1020 | Type49=1 1021 | Type50=2 1022 | Type51=1 1023 | Type52=1 1024 | Type53=1 1025 | Type54=1 1026 | Type55=1 1027 | Type56=2 1028 | Type57=1 1029 | Type58=1 1030 | Type59=0 1031 | Type60=1 1032 | Type61=2 1033 | Type62=2 1034 | Type63=1 1035 | Type64=0 1036 | Type65=2 1037 | Type66=3 1038 | Type67=2 1039 | Type68=2 1040 | Type69=1 1041 | Type70=2 1042 | Type71=2 1043 | Type72=2 1044 | Type73=2 1045 | Type74=1 1046 | Type75=2 1047 | Type76=1 1048 | Type77=1 1049 | Type78=1 1050 | Type79=1 1051 | Type80=2 1052 | Type81=3 1053 | Type82=3 1054 | Type83=3 1055 | Type84=3 1056 | Type85=3 1057 | Type86=2 1058 | Type87=2 1059 | Type88=2 1060 | Type89=1 1061 | Type90=1 1062 | Type91=3 1063 | Type92=3 1064 | Type93=2 1065 | Type94=2 1066 | Type95=2 1067 | Type96=2 1068 | Type97=2 1069 | Type98=0 1070 | Type99=1 1071 | Type100=2 1072 | 1073 | [ERC Connection Matrix] 1074 | L1=NNNNNNNNNNNWNNNWW 1075 | L2=NNWNNNNWWWNWNWNWN 1076 | L3=NWEENEEEENEWNEEWN 1077 | L4=NNENNNWEENNWNENWN 1078 | L5=NNNNNNNNNNNNNNNNN 1079 | L6=NNENNNNEENNWNENWN 1080 | L7=NNEWNNWEENNWNENWN 1081 | L8=NWEENEENEEENNEENN 1082 | L9=NWEENEEEENEWNEEWW 1083 | L10=NWNNNNNENNEWNNEWN 1084 | L11=NNENNNNEEENWNENWN 1085 | L12=WWWWNWWNWWWNWWWNN 1086 | L13=NNNNNNNNNNNWNNNWW 1087 | L14=NWEENEEEENEWNEEWW 1088 | L15=NNENNNNEEENWNENWW 1089 | L16=WWWWNWWNWWWNWWWNW 1090 | L17=WNNNNNNNWNNNWWWWN 1091 | 1092 | [Annotate] 1093 | SortOrder=3 1094 | SortLocation=0 1095 | MatchParameter1=Comment 1096 | MatchStrictly1=1 1097 | MatchParameter2=Library Reference 1098 | MatchStrictly2=1 1099 | PhysicalNamingFormat=$Component_$RoomName 1100 | GlobalIndexSortOrder=3 1101 | GlobalIndexSortLocation=0 1102 | 1103 | [PrjClassGen] 1104 | CompClassManualEnabled=0 1105 | CompClassManualRoomEnabled=0 1106 | NetClassAutoBusEnabled=1 1107 | NetClassAutoCompEnabled=0 1108 | NetClassAutoNamedHarnessEnabled=0 1109 | NetClassManualEnabled=1 1110 | 1111 | [LibraryUpdateOptions] 1112 | SelectedOnly=0 1113 | PartTypes=0 1114 | FullReplace=1 1115 | UpdateDesignatorLock=1 1116 | UpdatePartIDLock=1 1117 | PreserveParameterLocations=1 1118 | DoGraphics=1 1119 | DoParameters=1 1120 | DoModels=1 1121 | AddParameters=0 1122 | RemoveParameters=0 1123 | AddModels=1 1124 | RemoveModels=1 1125 | UpdateCurrentModels=1 1126 | 1127 | [DatabaseUpdateOptions] 1128 | SelectedOnly=0 1129 | PartTypes=0 1130 | 1131 | [Comparison Options] 1132 | ComparisonOptions0=Kind=Net|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 1133 | ComparisonOptions1=Kind=Net Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 1134 | ComparisonOptions2=Kind=Component Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 1135 | ComparisonOptions3=Kind=Rule|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 1136 | ComparisonOptions4=Kind=Differential Pair|MinPercent=50|MinMatch=1|ShowMatch=0|Confirm=0|UseName=0|InclAllRules=0 1137 | ComparisonOptions5=Kind=Structure Class|MinPercent=75|MinMatch=3|ShowMatch=-1|Confirm=-1|UseName=-1|InclAllRules=0 1138 | 1139 | [SmartPDF] 1140 | PageOptions=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1 1141 | 1142 | --------------------------------------------------------------------------------