├── .cproject ├── .project ├── LICENSE ├── Makefile ├── README.md ├── airspy_m0 ├── .cproject ├── .project ├── Makefile ├── airspy_m0.c ├── airspy_m0.h ├── airspy_rx.c ├── airspy_rx.h ├── airspy_usb_req.c ├── airspy_usb_req.h ├── usb_descriptor.c ├── usb_descriptor.h ├── usb_device.c ├── usb_device.h ├── usb_endpoint.c └── usb_endpoint.h ├── airspy_m0s ├── .cproject ├── .project ├── Makefile ├── airspy_m0s.c └── airspy_m0s.h ├── airspy_m4 ├── adchs.c ├── adchs.h ├── airspy_m4.c ├── m0_bin.h ├── m0_bin.s ├── m0s_bin.h └── m0s_bin.s ├── airspy_rom_to_ram ├── .cproject ├── .project ├── Makefile ├── dfuprog_airspy │ ├── dfu-suffix.exe │ ├── dfu-util.exe │ ├── dfuprog_airspy.bat │ ├── iram_dfu_util_spiflash.bin.hdr │ ├── libusb-1.0.dll │ └── lpcdfu.exe ├── m0_bin.s ├── m0s_bin.s └── usbprog_airspy │ ├── airspy.dll │ ├── airspy_spiflash.bat │ ├── airspy_spiflash.exe │ ├── libusb-1.0.dll │ └── pthreadVCE2.dll ├── common ├── LPC4370_M0_ram_only.ld ├── LPC4370_M0s_ram_only.ld ├── LPC4370_M4.ld ├── LPC4370_M4_ram_only.ld ├── LPC4370_M4_rom_to_ram.ld ├── Makefile_M0_inc.mk ├── Makefile_M0s_inc.mk ├── Makefile_inc.mk ├── README ├── airspy_calib.h ├── airspy_commands.h ├── airspy_conf.h ├── airspy_core.c ├── airspy_core.h ├── airspy_mini_conf.c ├── airspy_nos_conf.c ├── fault_handler.c ├── fault_handler.h ├── lpc43xx_rom_to_ram.ld ├── r820t.c ├── r820t.h ├── rom_iap.c ├── rom_iap.h ├── si5351c.c ├── si5351c.h ├── signal_mcu.c ├── signal_mcu.h ├── usb.c ├── usb.h ├── usb_queue.c ├── usb_queue.h ├── usb_request.c ├── usb_request.h ├── usb_standard_request.c ├── usb_standard_request.h ├── usb_type.h ├── w25q80bv.c └── w25q80bv.h ├── libopencm3 ├── .gitignore ├── COPYING.GPL3 ├── COPYING.LGPL3 ├── HACKING ├── HACKING_COMMON_DOC ├── Makefile ├── README ├── doc │ ├── Doxyfile │ ├── Doxyfile_common │ ├── DoxygenLayout.xml │ ├── HACKING │ ├── Makefile │ ├── README │ ├── cm3 │ │ ├── Doxyfile │ │ └── DoxygenLayout_cm3.xml │ ├── index.html │ └── lpc43xx │ │ ├── Doxyfile │ │ ├── Doxyfile_latex │ │ ├── DoxygenLayout_lpc43xx.xml │ │ └── header_lpc43xx.tex ├── include │ ├── libopencm3 │ │ ├── cm3 │ │ │ ├── assert.h │ │ │ ├── common.h │ │ │ ├── cortex.h │ │ │ ├── doc-cm3.h │ │ │ ├── fpb.h │ │ │ ├── itm.h │ │ │ ├── memorymap.h │ │ │ ├── mpu.h │ │ │ ├── nvic.h │ │ │ ├── scb.h │ │ │ ├── scs.h │ │ │ ├── sync.h │ │ │ ├── systick.h │ │ │ ├── tpiu.h │ │ │ └── vector.h │ │ ├── dispatch │ │ │ └── nvic.h │ │ ├── docmain.dox │ │ ├── license.dox │ │ └── lpc43xx │ │ │ ├── adc.h │ │ │ ├── atimer.h │ │ │ ├── ccu.h │ │ │ ├── cgu.h │ │ │ ├── creg.h │ │ │ ├── doc-lpc43xx.h │ │ │ ├── eventrouter.h │ │ │ ├── gima.h │ │ │ ├── gpdma.h │ │ │ ├── gpio.h │ │ │ ├── i2c.h │ │ │ ├── i2s.h │ │ │ ├── ipc.h │ │ │ ├── m0 │ │ │ └── nvic.h │ │ │ ├── m0s │ │ │ └── nvic.h │ │ │ ├── m4 │ │ │ └── nvic.h │ │ │ ├── memorymap.h │ │ │ ├── rgu.h │ │ │ ├── ritimer.h │ │ │ ├── scu.h │ │ │ ├── sdio.h │ │ │ ├── sgpio.h │ │ │ ├── ssp.h │ │ │ ├── timer.h │ │ │ ├── uart.h │ │ │ ├── usb.h │ │ │ └── wwdt.h │ └── libopencmsis │ │ ├── core_cm3.h │ │ └── dispatch │ │ └── irqhandlers.h ├── ld │ └── devices.data ├── lib │ ├── Makefile.include │ ├── cm3 │ │ ├── assert.c │ │ ├── nvic.c │ │ ├── scb.c │ │ ├── sync.c │ │ ├── systick.c │ │ └── vector.c │ ├── dispatch │ │ ├── vector_chipset.c │ │ └── vector_nvic.c │ ├── linker.ld.S │ └── lpc43xx │ │ ├── gpio.c │ │ ├── i2c.c │ │ ├── ipc.c │ │ ├── libopencm3_lpc43xx_ram_only.ld │ │ ├── m0 │ │ ├── Makefile │ │ ├── libopencm3_lpc43xx_m0.ld │ │ ├── libopencm3_lpc43xx_ram_only_m0.ld │ │ └── vector_nvic.c │ │ ├── m0s │ │ ├── Makefile │ │ ├── libopencm3_lpc43xx_m0s.ld │ │ ├── libopencm3_lpc43xx_ram_only_m0s.ld │ │ └── vector_nvic.c │ │ ├── m4 │ │ ├── Makefile │ │ ├── libopencm3_lpc43xx.ld │ │ ├── libopencm3_lpc43xx_ram_only.ld │ │ ├── libopencm3_lpc43xx_rom_to_ram.ld │ │ ├── vector_chipset.c │ │ └── vector_nvic.c │ │ ├── scu.c │ │ ├── ssp.c │ │ ├── timer.c │ │ └── uart.c ├── locm3.sublime-project └── scripts │ ├── black_magic_probe_debug.scr │ ├── black_magic_probe_flash.scr │ └── data │ └── lpc43xx │ ├── README │ ├── adc.csv │ ├── adc.yaml │ ├── atimer.csv │ ├── atimer.yaml │ ├── ccu.csv │ ├── ccu.yaml │ ├── cgu.csv │ ├── cgu.yaml │ ├── creg.csv │ ├── creg.yaml │ ├── csv2yaml.py │ ├── eventrouter.csv │ ├── eventrouter.yaml │ ├── gen.py │ ├── gima.csv │ ├── gima.yaml │ ├── gpdma.csv │ ├── gpdma.yaml │ ├── gpio.csv │ ├── gpio.yaml │ ├── i2c.csv │ ├── i2c.yaml │ ├── i2s.csv │ ├── i2s.yaml │ ├── rgu.csv │ ├── rgu.yaml │ ├── ritimer.csv │ ├── ritimer.yaml │ ├── scu.csv │ ├── scu.yaml │ ├── sgpio.csv │ ├── sgpio.yaml │ ├── ssp.csv │ ├── ssp.yaml │ ├── usb.csv │ ├── usb.yaml │ └── yaml_odict.py └── scripts ├── airspy_fw-version.py └── get-pip.py /.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | airspy_rom_to_ram_m4 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | org.eclipse.cdt.core.cnature 23 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 24 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 25 | 26 | 27 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | # Hey Emacs, this is a -*- makefile -*- 2 | # 3 | # Copyright 2013 Benjamin Vernoux 4 | # 5 | # This file is part of AirSpy (based on HackRF project). 6 | # 7 | # This program is free software; you can redistribute it and/or modify 8 | # it under the terms of the GNU General Public License as published by 9 | # the Free Software Foundation; either version 2, or (at your option) 10 | # any later version. 11 | # 12 | # This program is distributed in the hope that it will be useful, 13 | # but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | # GNU General Public License for more details. 16 | # 17 | # You should have received a copy of the GNU General Public License 18 | # along with this program; see the file COPYING. If not, write to 19 | # the Free Software Foundation, Inc., 51 Franklin Street, 20 | # Boston, MA 02110-1301, USA. 21 | # 22 | 23 | TARGETS = airspy_m0 \ 24 | airspy_m0s \ 25 | airspy_rom_to_ram 26 | 27 | all: build 28 | 29 | build: airspy_fw 30 | 31 | airspy_fw: 32 | $(Q)for i in $(TARGETS); do \ 33 | if [ -d $$i ]; then \ 34 | printf " BUILD $$i\n"; \ 35 | $(MAKE) -C $$i || exit $?; \ 36 | fi; \ 37 | done 38 | 39 | clean: 40 | $(Q)for i in $(addprefix lib/,$(TARGETS)) \ 41 | $(TARGETS); do \ 42 | if [ -d $$i ]; then \ 43 | printf " CLEAN $$i\n"; \ 44 | $(MAKE) -C $$i clean || exit $?; \ 45 | fi; \ 46 | done 47 | 48 | .PHONY: build airspy_fw 49 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | firmware 2 | ======== 3 | 4 | AirSpy Firmware (called also airspy_fw) 5 | 6 | For more details how to build, flash ... see the Wiki: https://github.com/airspy/firmware/wiki 7 | -------------------------------------------------------------------------------- /airspy_m0/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | airspy_m0 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | org.eclipse.cdt.core.cnature 23 | org.eclipse.cdt.core.ccnature 24 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 25 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 26 | 27 | 28 | -------------------------------------------------------------------------------- /airspy_m0/Makefile: -------------------------------------------------------------------------------- 1 | # Hey Emacs, this is a -*- makefile -*- 2 | # 3 | # Copyright 2012 Jared Boone 4 | # Copyright 2013-2016 Benjamin Vernoux 5 | # 6 | # This file is part of AirSpy (based on HackRF project). 7 | # 8 | # This program is free software; you can redistribute it and/or modify 9 | # it under the terms of the GNU General Public License as published by 10 | # the Free Software Foundation; either version 2, or (at your option) 11 | # any later version. 12 | # 13 | # This program is distributed in the hope that it will be useful, 14 | # but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | # GNU General Public License for more details. 17 | # 18 | # You should have received a copy of the GNU General Public License 19 | # along with this program; see the file COPYING. If not, write to 20 | # the Free Software Foundation, Inc., 51 Franklin Street, 21 | # Boston, MA 02110-1301, USA. 22 | # 23 | 24 | BINARY = airspy_m0 25 | 26 | SRC = $(BINARY).c\ 27 | airspy_rx.c \ 28 | airspy_usb_req.c \ 29 | usb_descriptor.c \ 30 | usb_device.c \ 31 | usb_endpoint.c 32 | 33 | # Source from ../common dir 34 | VPATH += ../common 35 | SRC += \ 36 | airspy_core.c \ 37 | fault_handler.c \ 38 | si5351c.c \ 39 | r820t.c \ 40 | w25q80bv.c \ 41 | rom_iap.c \ 42 | signal_mcu.c \ 43 | usb.c \ 44 | usb_queue.c \ 45 | usb_request.c \ 46 | usb_standard_request.c 47 | 48 | LDSCRIPT = ../common/LPC4370_M0_ram_only.ld 49 | 50 | include ../common/Makefile_M0_inc.mk 51 | -------------------------------------------------------------------------------- /airspy_m0/airspy_m0.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2014 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy. 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #ifndef __AIRSPY_M0_H__ 23 | #define __AIRSPY_M0_H__ 24 | 25 | #include "airspy_commands.h" 26 | 27 | void ADCHS_start(uint8_t conf_num); 28 | void ADCHS_stop(uint8_t conf_num); 29 | 30 | void set_samplerate_m4(uint8_t conf_num); 31 | void set_packing_m4(uint8_t state); 32 | 33 | #endif//__AIRSPY_M0_H__ 34 | -------------------------------------------------------------------------------- /airspy_m0/airspy_rx.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * Copyright 2013-2016 Benjamin Vernoux 4 | * 5 | * This file is part of AirSpy (based on HackRF project). 6 | * 7 | * This program is free software; you can redistribute it and/or modify 8 | * it under the terms of the GNU General Public License as published by 9 | * the Free Software Foundation; either version 2, or (at your option) 10 | * any later version. 11 | * 12 | * This program is distributed in the hope that it will be useful, 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | * GNU General Public License for more details. 16 | * 17 | * You should have received a copy of the GNU General Public License 18 | * along with this program; see the file COPYING. If not, write to 19 | * the Free Software Foundation, Inc., 51 Franklin Street, 20 | * Boston, MA 02110-1301, USA. 21 | */ 22 | 23 | #include "usb.h" 24 | #include "usb_type.h" 25 | #include "usb_request.h" 26 | #include "usb_descriptor.h" 27 | #include "usb_standard_request.h" 28 | 29 | #include "airspy_m0.h" 30 | #include "airspy_usb_req.h" 31 | #include "airspy_commands.h" 32 | #include "r820t.h" 33 | 34 | extern usb_endpoint_t usb_endpoint_bulk_in; 35 | 36 | static volatile receiver_mode_t receiver_mode = RECEIVER_MODE_OFF; 37 | 38 | void set_receiver_mode(const receiver_mode_t new_receiver_mode) 39 | { 40 | usb_streaming_disable(); 41 | 42 | if( new_receiver_mode == RECEIVER_MODE_RX ) 43 | { 44 | usb_endpoint_init(&usb_endpoint_bulk_in); 45 | ADCHS_start(sample_rate_conf_no); 46 | }else 47 | { 48 | ADCHS_stop(sample_rate_conf_no); 49 | } 50 | receiver_mode = new_receiver_mode; 51 | } 52 | 53 | receiver_mode_t get_receiver_mode(void) 54 | { 55 | return receiver_mode; 56 | } 57 | 58 | 59 | -------------------------------------------------------------------------------- /airspy_m0/airspy_rx.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2014-2016 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy. 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #ifndef __AIRSPY_RX_H__ 23 | #define __AIRSPY_RX_H__ 24 | 25 | void set_receiver_mode(const receiver_mode_t new_receiver_mode); 26 | receiver_mode_t get_receiver_mode(void); 27 | 28 | #endif//__AIRSPY_RX_H__ 29 | -------------------------------------------------------------------------------- /airspy_m0/airspy_usb_req.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2014 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy. 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #ifndef __AIRSPY_USB_REQ_H__ 23 | #define __AIRSPY_USB_REQ_H__ 24 | 25 | #include "usb_type.h" 26 | 27 | extern usb_endpoint_t usb_endpoint_bulk_in; 28 | extern usb_endpoint_t usb_endpoint_bulk_out; 29 | extern usb_endpoint_t usb_endpoint_control_in; 30 | extern usb_endpoint_t usb_endpoint_control_out; 31 | extern usb_device_t usb_device; 32 | 33 | extern uint8_t sample_rate_conf_no; 34 | 35 | void airspy_usb_req_init(void); 36 | 37 | void usb_streaming_disable(void); 38 | 39 | #endif//__AIRSPY_USB_REQ_H__ 40 | -------------------------------------------------------------------------------- /airspy_m0/usb_descriptor.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * 4 | * This file is part of AirSpy (based on HackRF project). 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #include 23 | 24 | extern uint8_t usb_descriptor_device[]; 25 | extern uint8_t usb_descriptor_device_qualifier[]; 26 | extern uint8_t usb_descriptor_configuration_full_speed[]; 27 | extern uint8_t usb_descriptor_configuration_high_speed[]; 28 | extern uint8_t usb_descriptor_string_languages[]; 29 | extern uint8_t usb_descriptor_string_manufacturer[]; 30 | extern uint8_t usb_descriptor_string_product[]; 31 | extern uint8_t usb_descriptor_string_serial_number[]; 32 | 33 | extern uint8_t* const usb_descriptor_strings[]; 34 | 35 | extern uint8_t usb_descriptor_MSDescriptor[]; 36 | extern uint8_t usb_descriptor_CompatIDDescriptor[]; 37 | extern uint8_t usb_descriptor_ExtProps[]; 38 | 39 | typedef union 40 | { 41 | uint64_t sn_64b; 42 | uint32_t sn_32b[2]; /* 2*32bits 64bits Unique ID */ 43 | uint8_t sn_8b[8]; /* 8*8bits 64bits Unique ID */ 44 | } usb_descriptor_serial_number_t; 45 | 46 | void usb_descriptor_fill_string_serial_number(usb_descriptor_serial_number_t serial_number); 47 | -------------------------------------------------------------------------------- /airspy_m0/usb_device.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * 4 | * This file is part of AirSpy (based on HackRF project). 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | #include "usb_device.h" 22 | #include 23 | #include "usb_descriptor.h" 24 | 25 | usb_configuration_t usb_configuration_high_speed = { 26 | .number = 1, 27 | .speed = USB_SPEED_HIGH, 28 | .descriptor = usb_descriptor_configuration_high_speed, 29 | }; 30 | 31 | usb_configuration_t usb_configuration_full_speed = { 32 | .number = 1, 33 | .speed = USB_SPEED_FULL, 34 | .descriptor = usb_descriptor_configuration_full_speed, 35 | }; 36 | 37 | usb_configuration_t* usb_configurations[] = { 38 | &usb_configuration_high_speed, 39 | &usb_configuration_full_speed, 40 | 0, 41 | }; 42 | 43 | usb_device_t usb_device = { 44 | .descriptor = usb_descriptor_device, 45 | .descriptor_strings = usb_descriptor_strings, 46 | .qualifier_descriptor = usb_descriptor_device_qualifier, 47 | .configurations = &usb_configurations, 48 | .configuration = 0, 49 | }; 50 | -------------------------------------------------------------------------------- /airspy_m0/usb_device.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * Copyright 2013-2016 Benjamin Vernoux 4 | * 5 | * This file is part of AirSpy (based on HackRF project). 6 | * 7 | * This program is free software; you can redistribute it and/or modify 8 | * it under the terms of the GNU General Public License as published by 9 | * the Free Software Foundation; either version 2, or (at your option) 10 | * any later version. 11 | * 12 | * This program is distributed in the hope that it will be useful, 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | * GNU General Public License for more details. 16 | * 17 | * You should have received a copy of the GNU General Public License 18 | * along with this program; see the file COPYING. If not, write to 19 | * the Free Software Foundation, Inc., 51 Franklin Street, 20 | * Boston, MA 02110-1301, USA. 21 | */ 22 | 23 | #ifndef __USB_DEVICE_H__ 24 | #define __USB_DEVICE_H__ 25 | 26 | #include 27 | 28 | extern usb_device_t usb_device; 29 | 30 | #endif /* end of include guard: __USB_DEVICE_H__ */ 31 | -------------------------------------------------------------------------------- /airspy_m0/usb_endpoint.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * Copyright 2013-2016 Benjamin Vernoux 4 | * 5 | * This file is part of AirSpy (based on HackRF project). 6 | * 7 | * This program is free software; you can redistribute it and/or modify 8 | * it under the terms of the GNU General Public License as published by 9 | * the Free Software Foundation; either version 2, or (at your option) 10 | * any later version. 11 | * 12 | * This program is distributed in the hope that it will be useful, 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | * GNU General Public License for more details. 16 | * 17 | * You should have received a copy of the GNU General Public License 18 | * along with this program; see the file COPYING. If not, write to 19 | * the Free Software Foundation, Inc., 51 Franklin Street, 20 | * Boston, MA 02110-1301, USA. 21 | */ 22 | #include "usb_endpoint.h" 23 | #include 24 | #include "usb_device.h" 25 | 26 | usb_endpoint_t usb_endpoint_control_out = { 27 | .address = 0x00, 28 | .device = &usb_device, 29 | .in = &usb_endpoint_control_in, 30 | .out = &usb_endpoint_control_out, 31 | .setup_complete = usb_setup_complete, 32 | .transfer_complete = usb_control_out_complete, 33 | }; 34 | USB_DEFINE_QUEUE(usb_endpoint_control_out, 4); 35 | 36 | usb_endpoint_t usb_endpoint_control_in = { 37 | .address = 0x80, 38 | .device = &usb_device, 39 | .in = &usb_endpoint_control_in, 40 | .out = &usb_endpoint_control_out, 41 | .setup_complete = 0, 42 | .transfer_complete = usb_control_in_complete, 43 | }; 44 | static USB_DEFINE_QUEUE(usb_endpoint_control_in, 4); 45 | 46 | usb_endpoint_t usb_endpoint_bulk_in = { 47 | .address = 0x81, 48 | .device = &usb_device, 49 | .in = &usb_endpoint_bulk_in, 50 | .out = 0, 51 | .setup_complete = 0, 52 | .transfer_complete = usb_queue_transfer_complete, 53 | }; 54 | static USB_DEFINE_QUEUE(usb_endpoint_bulk_in, 1); 55 | 56 | usb_endpoint_t usb_endpoint_bulk_out = { 57 | .address = 0x02, 58 | .device = &usb_device, 59 | .in = 0, 60 | .out = &usb_endpoint_bulk_out, 61 | .setup_complete = 0, 62 | .transfer_complete = usb_queue_transfer_complete, 63 | }; 64 | static USB_DEFINE_QUEUE(usb_endpoint_bulk_out, 1); 65 | -------------------------------------------------------------------------------- /airspy_m0/usb_endpoint.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * Copyright 2013-2016 Benjamin Vernoux 4 | * 5 | * This file is part of AirSpy (based on HackRF project). 6 | * 7 | * This program is free software; you can redistribute it and/or modify 8 | * it under the terms of the GNU General Public License as published by 9 | * the Free Software Foundation; either version 2, or (at your option) 10 | * any later version. 11 | * 12 | * This program is distributed in the hope that it will be useful, 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | * GNU General Public License for more details. 16 | * 17 | * You should have received a copy of the GNU General Public License 18 | * along with this program; see the file COPYING. If not, write to 19 | * the Free Software Foundation, Inc., 51 Franklin Street, 20 | * Boston, MA 02110-1301, USA. 21 | */ 22 | #ifndef __USB_ENDPOINT_H__ 23 | #define __USB_ENDPOINT_H__ 24 | 25 | #include 26 | #include 27 | 28 | extern usb_endpoint_t usb_endpoint_control_out; 29 | extern USB_DECLARE_QUEUE(usb_endpoint_control_out); 30 | 31 | extern usb_endpoint_t usb_endpoint_control_in; 32 | extern USB_DECLARE_QUEUE(usb_endpoint_control_in); 33 | 34 | extern usb_endpoint_t usb_endpoint_bulk_in; 35 | extern USB_DECLARE_QUEUE(usb_endpoint_bulk_in); 36 | 37 | extern usb_endpoint_t usb_endpoint_bulk_out; 38 | extern USB_DECLARE_QUEUE(usb_endpoint_bulk_out); 39 | 40 | #endif /* end of include guard: __USB_ENDPOINT_H__ */ 41 | -------------------------------------------------------------------------------- /airspy_m0s/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | airspy_m0s 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | org.eclipse.cdt.core.cnature 23 | org.eclipse.cdt.core.ccnature 24 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 25 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 26 | 27 | 28 | -------------------------------------------------------------------------------- /airspy_m0s/Makefile: -------------------------------------------------------------------------------- 1 | # Hey Emacs, this is a -*- makefile -*- 2 | # 3 | # Copyright 2013-2016 Benjamin Vernoux 4 | # 5 | # This file is part of AirSpy. 6 | # 7 | # This program is free software; you can redistribute it and/or modify 8 | # it under the terms of the GNU General Public License as published by 9 | # the Free Software Foundation; either version 2, or (at your option) 10 | # any later version. 11 | # 12 | # This program is distributed in the hope that it will be useful, 13 | # but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | # GNU General Public License for more details. 16 | # 17 | # You should have received a copy of the GNU General Public License 18 | # along with this program; see the file COPYING. If not, write to 19 | # the Free Software Foundation, Inc., 51 Franklin Street, 20 | # Boston, MA 02110-1301, USA. 21 | # 22 | 23 | BINARY = airspy_m0s 24 | 25 | SRC = $(BINARY).c 26 | 27 | # Source from ../common dir 28 | VPATH += ../common 29 | SRC += \ 30 | fault_handler.c \ 31 | signal_mcu.c 32 | 33 | LDSCRIPT = ../common/LPC4370_M0s_ram_only.ld 34 | 35 | include ../common/Makefile_M0s_inc.mk 36 | -------------------------------------------------------------------------------- /airspy_m0s/airspy_m0s.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2013-2016 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy. 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #include 23 | 24 | /* 25 | M0s Core Wait Infinite Loop 26 | */ 27 | int main(void) 28 | { 29 | while(1) 30 | { 31 | signal_wfe(); 32 | } 33 | } 34 | -------------------------------------------------------------------------------- /airspy_m0s/airspy_m0s.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2013-2016 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy. 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #ifndef __AIRSPY_M0S_H__ 23 | #define __AIRSPY_M0S_H__ 24 | 25 | #endif//__AIRSPY_M0S_H__ 26 | -------------------------------------------------------------------------------- /airspy_m4/m0_bin.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012-2016 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy. 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #ifndef __M0_BIN_H 21 | #define __M0_BIN_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" 25 | { 26 | #endif 27 | 28 | extern uint8_t m0_bin[]; 29 | extern uint32_t m0_bin_size; 30 | extern uint32_t cm0_exec_baseaddr; /* defined in linker script */ 31 | 32 | #ifdef __cplusplus 33 | } 34 | #endif 35 | 36 | #endif /* __M0_BIN_H */ 37 | -------------------------------------------------------------------------------- /airspy_m4/m0_bin.s: -------------------------------------------------------------------------------- 1 | 2 | .section .rodata 3 | 4 | .global m0_bin 5 | .align 4 6 | m0_bin: 7 | .incbin "../airspy_m0/airspy_m0.bin" 8 | 9 | .global m0_bin_size 10 | .align 4 11 | m0_bin_size: 12 | .int m0_bin_size - m0_bin 13 | -------------------------------------------------------------------------------- /airspy_m4/m0s_bin.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012-2016 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy. 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #ifndef __M0S_BIN_H 21 | #define __M0S_BIN_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" 25 | { 26 | #endif 27 | 28 | extern uint8_t m0s_bin[]; 29 | extern uint32_t m0s_bin_size; 30 | extern uint32_t cm0s_exec_baseaddr; /* defined in linker script */ 31 | 32 | #ifdef __cplusplus 33 | } 34 | #endif 35 | 36 | #endif /* __M0S_BIN_H */ 37 | -------------------------------------------------------------------------------- /airspy_m4/m0s_bin.s: -------------------------------------------------------------------------------- 1 | 2 | .section .rodata 3 | 4 | .global m0s_bin 5 | .align 4 6 | m0s_bin: 7 | .incbin "../airspy_m0s/airspy_m0s.bin" 8 | 9 | .global m0s_bin_size 10 | .align 4 11 | m0s_bin_size: 12 | .int m0s_bin_size - m0s_bin 13 | -------------------------------------------------------------------------------- /airspy_rom_to_ram/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | airspy_rom_to_ram 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | org.eclipse.cdt.core.cnature 23 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 24 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 25 | 26 | 27 | -------------------------------------------------------------------------------- /airspy_rom_to_ram/Makefile: -------------------------------------------------------------------------------- 1 | # Hey Emacs, this is a -*- makefile -*- 2 | # 3 | # Copyright 2013-2016 Benjamin Vernoux 4 | # 5 | # This file is part of AirSpy (based on HackRF project). 6 | # 7 | # This program is free software; you can redistribute it and/or modify 8 | # it under the terms of the GNU General Public License as published by 9 | # the Free Software Foundation; either version 2, or (at your option) 10 | # any later version. 11 | # 12 | # This program is distributed in the hope that it will be useful, 13 | # but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | # GNU General Public License for more details. 16 | # 17 | # You should have received a copy of the GNU General Public License 18 | # along with this program; see the file COPYING. If not, write to 19 | # the Free Software Foundation, Inc., 51 Franklin Street, 20 | # Boston, MA 02110-1301, USA. 21 | # 22 | 23 | BINARY = airspy_rom_to_ram 24 | 25 | SRC_DIR = airspy_m4 26 | 27 | SRC = airspy_m4.c adchs.c 28 | 29 | OBJ = m0_bin.o m0s_bin.o 30 | 31 | # Source from ../common dir 32 | VPATH += ../common 33 | SRC += \ 34 | fault_handler.c \ 35 | airspy_core.c \ 36 | si5351c.c \ 37 | w25q80bv.c \ 38 | rom_iap.c \ 39 | signal_mcu.c \ 40 | airspy_nos_conf.c \ 41 | airspy_mini_conf.c 42 | 43 | LDSCRIPT = ../common/LPC4370_M4_rom_to_ram.ld 44 | 45 | %.o: ../$(SRC_DIR)/%.c Makefile 46 | @printf " CC $(subst $(shell pwd)/,,$(@))\n" 47 | $(Q)$(CC) $(CFLAGS) -o $@ -c $< 48 | 49 | include ../common/Makefile_inc.mk 50 | 51 | -------------------------------------------------------------------------------- /airspy_rom_to_ram/dfuprog_airspy/dfu-suffix.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/airspy/airspyone_firmware/cf1a37440d40e4229e9b474077e9fdd56f4926b1/airspy_rom_to_ram/dfuprog_airspy/dfu-suffix.exe -------------------------------------------------------------------------------- /airspy_rom_to_ram/dfuprog_airspy/dfu-util.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/airspy/airspyone_firmware/cf1a37440d40e4229e9b474077e9fdd56f4926b1/airspy_rom_to_ram/dfuprog_airspy/dfu-util.exe -------------------------------------------------------------------------------- /airspy_rom_to_ram/dfuprog_airspy/dfuprog_airspy.bat: -------------------------------------------------------------------------------- 1 | @echo off 2 | echo Downloading algo... 3 | dfu-util -d 1fc9:000c -t 2048 -R -D iram_dfu_util_spiflash.bin.hdr 4 | echo Programming ../airspy_rom_to_ram.bin 5 | lpcdfu -d 3 -e -D ../airspy_rom_to_ram.bin -U 6 | Pause 7 | -------------------------------------------------------------------------------- /airspy_rom_to_ram/dfuprog_airspy/iram_dfu_util_spiflash.bin.hdr: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/airspy/airspyone_firmware/cf1a37440d40e4229e9b474077e9fdd56f4926b1/airspy_rom_to_ram/dfuprog_airspy/iram_dfu_util_spiflash.bin.hdr -------------------------------------------------------------------------------- /airspy_rom_to_ram/dfuprog_airspy/libusb-1.0.dll: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/airspy/airspyone_firmware/cf1a37440d40e4229e9b474077e9fdd56f4926b1/airspy_rom_to_ram/dfuprog_airspy/libusb-1.0.dll -------------------------------------------------------------------------------- /airspy_rom_to_ram/dfuprog_airspy/lpcdfu.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/airspy/airspyone_firmware/cf1a37440d40e4229e9b474077e9fdd56f4926b1/airspy_rom_to_ram/dfuprog_airspy/lpcdfu.exe -------------------------------------------------------------------------------- /airspy_rom_to_ram/m0_bin.s: -------------------------------------------------------------------------------- 1 | 2 | .section .rodata 3 | 4 | .global m0_bin 5 | .align 4 6 | m0_bin: 7 | .incbin "../airspy_m0/airspy_m0.bin" 8 | 9 | .global m0_bin_size 10 | .align 4 11 | m0_bin_size: 12 | .int m0_bin_size - m0_bin 13 | -------------------------------------------------------------------------------- /airspy_rom_to_ram/m0s_bin.s: -------------------------------------------------------------------------------- 1 | 2 | .section .rodata 3 | 4 | .global m0s_bin 5 | .align 4 6 | m0s_bin: 7 | .incbin "../airspy_m0s/airspy_m0s.bin" 8 | 9 | .global m0s_bin_size 10 | .align 4 11 | m0s_bin_size: 12 | .int m0s_bin_size - m0s_bin 13 | -------------------------------------------------------------------------------- /airspy_rom_to_ram/usbprog_airspy/airspy.dll: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/airspy/airspyone_firmware/cf1a37440d40e4229e9b474077e9fdd56f4926b1/airspy_rom_to_ram/usbprog_airspy/airspy.dll -------------------------------------------------------------------------------- /airspy_rom_to_ram/usbprog_airspy/airspy_spiflash.bat: -------------------------------------------------------------------------------- 1 | airspy_spiflash.exe -w ../airspy_rom_to_ram.bin 2 | Pause 3 | -------------------------------------------------------------------------------- /airspy_rom_to_ram/usbprog_airspy/airspy_spiflash.exe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/airspy/airspyone_firmware/cf1a37440d40e4229e9b474077e9fdd56f4926b1/airspy_rom_to_ram/usbprog_airspy/airspy_spiflash.exe -------------------------------------------------------------------------------- /airspy_rom_to_ram/usbprog_airspy/libusb-1.0.dll: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/airspy/airspyone_firmware/cf1a37440d40e4229e9b474077e9fdd56f4926b1/airspy_rom_to_ram/usbprog_airspy/libusb-1.0.dll -------------------------------------------------------------------------------- /airspy_rom_to_ram/usbprog_airspy/pthreadVCE2.dll: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/airspy/airspyone_firmware/cf1a37440d40e4229e9b474077e9fdd56f4926b1/airspy_rom_to_ram/usbprog_airspy/pthreadVCE2.dll -------------------------------------------------------------------------------- /common/LPC4370_M0_ram_only.ld: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | 4 | * Copyright 2012 Michael Ossmann 5 | * Copyright 2012 Jared Boone 6 | * Copyright 2013-2016 Benjamin Vernoux 7 | * 8 | * This library is free software: you can redistribute it and/or modify 9 | * it under the terms of the GNU Lesser General Public License as published by 10 | * the Free Software Foundation, either version 3 of the License, or 11 | * (at your option) any later version. 12 | * 13 | * This library is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU Lesser General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU Lesser General Public License 19 | * along with this library. If not, see . 20 | */ 21 | 22 | /* Linker script for AirSpy (LPC4370, 1M or 4MB SPI flash, 282K SRAM). */ 23 | MEMORY 24 | { 25 | /* rom is really the shadow region that points to SPI flash or elsewhere */ 26 | rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M 27 | ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K 28 | ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 72K 29 | /* LPC437x only: Reserved for M0 subsystem SRAM 16KB + 2KB */ 30 | ram_local_m0sub (rwx) : ORIGIN = 0x18000000, LENGTH = 18K 31 | 32 | ram_ahb1_m0_stack (rwx) : ORIGIN = 0x20000000, LENGTH = 4K 33 | ram_ahb1_spare (rwx) : ORIGIN = 0x20001000, LENGTH = 3K 34 | ram_ahb1_m4_share (rwx) : ORIGIN = 0x20001C00, LENGTH = 1K 35 | ram_ahb1_adchs (rwx) : ORIGIN = 0x20002000, LENGTH = 4K 36 | ram_ahb1_m0_share (rwx) : ORIGIN = 0x20003000, LENGTH = 4K 37 | 38 | /* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM 39 | * to get performance benefit of having two USB buffers addressable 40 | * simultaneously (on two different buses of the AHB multilayer matrix) 41 | */ 42 | /* ram_ahb1_0 (rwx) : ORIGIN = 0x20004000, LENGTH = 16K */ 43 | /* ram_ahb1_1 (rwx) : ORIGIN = 0x20008000, LENGTH = 16K */ 44 | /* Reserved for Cortex M0 code/data */ 45 | ram_ahb2 (rwx) : ORIGIN = 0x2000C000, LENGTH = 16K 46 | } 47 | 48 | cm4_data_share = ORIGIN(ram_ahb1_m4_share); /* M4 data shared (write by M4 read by M0 */ 49 | adchs_data = ORIGIN(ram_ahb1_adchs); /* M4 ADCHS data (write by ADCHS DMA or M4) */ 50 | cm0_data_share = ORIGIN(ram_ahb1_m0_share); /* M0 data shared (write by M0 read by M4) */ 51 | 52 | cm0_exec_baseaddr = ORIGIN(ram_ahb2); /* Used by M4 to load code from M4 RAM to M0 final exec/run addr */ 53 | cm0s_exec_baseaddr = ORIGIN(ram_local_m0sub); /* Used by M4 to load code from M4 RAM to M0Sub final exec/run addr */ 54 | 55 | conf_data_share = ORIGIN(ram_ahb1_spare); /* M4/M0 conf data shared */ 56 | conf_data_share_size = LENGTH(ram_ahb1_spare); /* M4/M0 conf data shared size */ 57 | 58 | /* Include the common ld script. */ 59 | INCLUDE libopencm3_lpc43xx_m0.ld 60 | -------------------------------------------------------------------------------- /common/LPC4370_M0s_ram_only.ld: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | 4 | * Copyright 2012 Michael Ossmann 5 | * Copyright 2012 Jared Boone 6 | * Copyright 2013-2016 Benjamin Vernoux 7 | * 8 | * This library is free software: you can redistribute it and/or modify 9 | * it under the terms of the GNU Lesser General Public License as published by 10 | * the Free Software Foundation, either version 3 of the License, or 11 | * (at your option) any later version. 12 | * 13 | * This library is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU Lesser General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU Lesser General Public License 19 | * along with this library. If not, see . 20 | */ 21 | 22 | /* Linker script for AirSpy (LPC4370, 1M or 4MB SPI flash, 282K SRAM). */ 23 | MEMORY 24 | { 25 | /* rom is really the shadow region that points to SPI flash or elsewhere */ 26 | rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M 27 | ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K 28 | ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 72K 29 | /* LPC437x only: Reserved for M0 subsystem SRAM 16KB + 2KB */ 30 | ram_local_m0sub (rwx) : ORIGIN = 0x18000000, LENGTH = 18K 31 | 32 | ram_ahb1_m0_stack (rwx) : ORIGIN = 0x20000000, LENGTH = 4K 33 | ram_ahb1_spare (rwx) : ORIGIN = 0x20001000, LENGTH = 3K 34 | ram_ahb1_m4_share (rwx) : ORIGIN = 0x20001C00, LENGTH = 1K 35 | ram_ahb1_adchs (rwx) : ORIGIN = 0x20002000, LENGTH = 4K 36 | ram_ahb1_m0_share (rwx) : ORIGIN = 0x20003000, LENGTH = 4K 37 | 38 | /* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM 39 | * to get performance benefit of having two USB buffers addressable 40 | * simultaneously (on two different buses of the AHB multilayer matrix) 41 | */ 42 | /* ram_ahb1_0 (rwx) : ORIGIN = 0x20004000, LENGTH = 16K */ 43 | /* ram_ahb1_1 (rwx) : ORIGIN = 0x20008000, LENGTH = 16K */ 44 | /* Reserved for Cortex M0 code/data */ 45 | ram_ahb2 (rwx) : ORIGIN = 0x2000C000, LENGTH = 16K 46 | } 47 | 48 | cm4_data_share = ORIGIN(ram_ahb1_m4_share); /* M4 data shared (write by M4 read by M0 */ 49 | adchs_data = ORIGIN(ram_ahb1_adchs); /* M4 ADCHS data (write by ADCHS DMA or M4) */ 50 | cm0_data_share = ORIGIN(ram_ahb1_m0_share); /* M0 data shared (write by M0 read by M4) */ 51 | 52 | cm0_exec_baseaddr = ORIGIN(ram_ahb2); /* Used by M4 to load code from M4 RAM to M0 final exec/run addr */ 53 | cm0s_exec_baseaddr = ORIGIN(ram_local_m0sub); /* Used by M4 to load code from M4 RAM to M0Sub final exec/run addr */ 54 | 55 | conf_data_share = ORIGIN(ram_ahb1_spare); /* M4/M0 conf data shared */ 56 | conf_data_share_size = LENGTH(ram_ahb1_spare); /* M4/M0 conf data shared size */ 57 | 58 | /* Include the common ld script. */ 59 | INCLUDE libopencm3_lpc43xx_m0s.ld 60 | -------------------------------------------------------------------------------- /common/LPC4370_M4.ld: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Michael Ossmann 3 | * Copyright 2012 Jared Boone 4 | * Copyright 2013-2016 Benjamin Vernoux 5 | * 6 | * This file is part of AirSpy (based on HackRF project). 7 | * 8 | * This program is free software; you can redistribute it and/or modify 9 | * it under the terms of the GNU General Public License as published by 10 | * the Free Software Foundation; either version 2, or (at your option) 11 | * any later version. 12 | * 13 | * This program is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU General Public License 19 | * along with this program; see the file COPYING. If not, write to 20 | * the Free Software Foundation, Inc., 51 Franklin Street, 21 | * Boston, MA 02110-1301, USA. 22 | */ 23 | 24 | /* Linker script for AirSpy (LPC4370, 1M or 4MB SPI flash, 282K SRAM). */ 25 | 26 | MEMORY 27 | { 28 | /* rom is really the shadow region that points to SPI flash or elsewhere */ 29 | rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M 30 | ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K 31 | ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 72K 32 | /* LPC437x only: Reserved for M0 subsystem SRAM 16KB + 2KB */ 33 | ram_local_m0sub (rwx) : ORIGIN = 0x18000000, LENGTH = 18K 34 | 35 | ram_ahb1 (rwx) : ORIGIN = 0x20000000, LENGTH = 7K 36 | ram_ahb1_m4_share (rwx) : ORIGIN = 0x20001C00, LENGTH = 1K 37 | ram_ahb1_adchs (rwx) : ORIGIN = 0x20002000, LENGTH = 4K 38 | ram_ahb1_m0_share (rwx) : ORIGIN = 0x20003000, LENGTH = 4K 39 | 40 | /* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM 41 | * to get performance benefit of having two USB buffers addressable 42 | * simultaneously (on two different buses of the AHB multilayer matrix) 43 | */ 44 | /* ram_ahb1_0 (rwx) : ORIGIN = 0x20004000, LENGTH = 16K */ 45 | /* ram_ahb1_1 (rwx) : ORIGIN = 0x20008000, LENGTH = 16K */ 46 | /* Reserved for Cortex M0 code/data */ 47 | ram_ahb2 (rwx) : ORIGIN = 0x2000C000, LENGTH = 16K 48 | } 49 | 50 | cm4_data_share = ORIGIN(ram_ahb1_m4_share); /* M4 data shared (write by M4 read by M0 */ 51 | adchs_data = ORIGIN(ram_ahb1_adchs); /* M4 ADCHS data (write by ADCHS DMA or M4) */ 52 | cm0_data_share = ORIGIN(ram_ahb1_m0_share); /* M0 data shared (write by M0 read by M4) */ 53 | 54 | cm0_exec_baseaddr = ORIGIN(ram_ahb2); /* Used by M4 to load code from M4 RAM to M0 final exec/run addr */ 55 | cm0s_exec_baseaddr = ORIGIN(ram_local_m0sub); /* Used by M4 to load code from M4 RAM to M0Sub final exec/run addr */ 56 | 57 | /* Include the common ld script. */ 58 | INCLUDE libopencm3_lpc43xx.ld 59 | -------------------------------------------------------------------------------- /common/LPC4370_M4_ram_only.ld: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | 4 | * Copyright 2012 Michael Ossmann 5 | * Copyright 2012 Jared Boone 6 | * Copyright 2013-2016 Benjamin Vernoux 7 | * 8 | * This library is free software: you can redistribute it and/or modify 9 | * it under the terms of the GNU Lesser General Public License as published by 10 | * the Free Software Foundation, either version 3 of the License, or 11 | * (at your option) any later version. 12 | * 13 | * This library is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU Lesser General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU Lesser General Public License 19 | * along with this library. If not, see . 20 | */ 21 | 22 | /* Linker script for AirSpy (LPC4370, 1M or 4MB SPI flash, 282K SRAM). */ 23 | MEMORY 24 | { 25 | /* rom is really the shadow region that points to SPI flash or elsewhere */ 26 | rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M 27 | ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K 28 | ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 72K 29 | /* LPC437x only: Reserved for M0 subsystem SRAM 16KB + 2KB */ 30 | ram_local_m0sub (rwx) : ORIGIN = 0x18000000, LENGTH = 18K 31 | ram_ahb1 (rwx) : ORIGIN = 0x20000000, LENGTH = 16K 32 | /* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM 33 | * to get performance benefit of having two USB buffers addressable 34 | * simultaneously (on two different buses of the AHB multilayer matrix) 35 | */ 36 | /* ram_ahb1_0 (rwx) : ORIGIN = 0x20004000, LENGTH = 16K */ 37 | /* ram_ahb1_1 (rwx) : ORIGIN = 0x20008000, LENGTH = 16K */ 38 | /* Reserved for Cortex M0 code/data */ 39 | ram_ahb2 (rwx) : ORIGIN = 0x2000C000, LENGTH = 16K 40 | } 41 | 42 | cm0_exec_baseaddr = ORIGIN(ram_ahb2); /* Used by M4 to load code from M4 RAM to M0 final exec/run addr */ 43 | cm0s_exec_baseaddr = ORIGIN(ram_local_m0sub); /* Used by M4 to load code from M4 RAM to M0Sub final exec/run addr */ 44 | 45 | /* Include the common ld script. */ 46 | INCLUDE libopencm3_lpc43xx_ram_only.ld 47 | -------------------------------------------------------------------------------- /common/LPC4370_M4_rom_to_ram.ld: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | 4 | * Copyright 2012 Michael Ossmann 5 | * Copyright 2012 Jared Boone 6 | * Copyright 2013-2016 Benjamin Vernoux 7 | * 8 | * This library is free software: you can redistribute it and/or modify 9 | * it under the terms of the GNU Lesser General Public License as published by 10 | * the Free Software Foundation, either version 3 of the License, or 11 | * (at your option) any later version. 12 | * 13 | * This library is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU Lesser General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU Lesser General Public License 19 | * along with this library. If not, see . 20 | */ 21 | 22 | /* Linker script for AirSpy (LPC4370, 1M or 4MB SPI flash, 282K SRAM). */ 23 | MEMORY 24 | { 25 | /* Physical address in Flash used to copy Code from Flash to RAM */ 26 | rom_flash (rx) : ORIGIN = 0x80000000, LENGTH = 1M 27 | /* rom is really the shadow region that points to SPI flash or elsewhere */ 28 | rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M 29 | ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K 30 | ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 72K 31 | /* LPC437x only: Reserved for M0 subsystem SRAM 16KB + 2KB */ 32 | ram_local_m0sub (rwx) : ORIGIN = 0x18000000, LENGTH = 18K 33 | 34 | ram_ahb1_m0_stack (rwx) : ORIGIN = 0x20000000, LENGTH = 4K 35 | ram_ahb1_spare (rwx) : ORIGIN = 0x20001000, LENGTH = 3K 36 | ram_ahb1_m4_share (rwx) : ORIGIN = 0x20001C00, LENGTH = 1K 37 | ram_ahb1_adchs (rwx) : ORIGIN = 0x20002000, LENGTH = 4K 38 | ram_ahb1_m0_share (rwx) : ORIGIN = 0x20003000, LENGTH = 4K 39 | 40 | /* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM 41 | * to get performance benefit of having two USB buffers addressable 42 | * simultaneously (on two different buses of the AHB multilayer matrix) 43 | */ 44 | /* ram_ahb1_0 (rwx) : ORIGIN = 0x20004000, LENGTH = 16K */ 45 | /* ram_ahb1_1 (rwx) : ORIGIN = 0x20008000, LENGTH = 16K */ 46 | /* Reserved for Cortex M0 code/data */ 47 | ram_ahb2 (rwx) : ORIGIN = 0x2000C000, LENGTH = 16K 48 | } 49 | 50 | cm4_data_share = ORIGIN(ram_ahb1_m4_share); /* M4 data shared (write by M4 read by M0 */ 51 | adchs_data = ORIGIN(ram_ahb1_adchs); /* M4 ADCHS data (write by ADCHS DMA or M4) */ 52 | cm0_data_share = ORIGIN(ram_ahb1_m0_share); /* M0 data shared (write by M0 read by M4) */ 53 | 54 | cm0_exec_baseaddr = ORIGIN(ram_ahb2); /* Used by M4 to load code from M4 RAM to M0 final exec/run addr */ 55 | cm0s_exec_baseaddr = ORIGIN(ram_local_m0sub); /* Used by M4 to load code from M4 RAM to M0Sub final exec/run addr */ 56 | 57 | conf_data_share = ORIGIN(ram_ahb1_spare); /* M4/M0 conf data shared */ 58 | conf_data_share_size = LENGTH(ram_ahb1_spare); /* M4/M0 conf data shared size */ 59 | 60 | /* Include the common ld script. */ 61 | INCLUDE lpc43xx_rom_to_ram.ld 62 | -------------------------------------------------------------------------------- /common/README: -------------------------------------------------------------------------------- 1 | This directory contains things shared by multiple AirSpy firmware 2 | implementations. 3 | -------------------------------------------------------------------------------- /common/airspy_calib.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2016 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy. 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #ifndef __AIRSPY_CALIB_H 23 | #define __AIRSPY_CALIB_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" 27 | { 28 | #endif 29 | 30 | #define AIRSPY_FLASH_CALIB_OFFSET (0x20000) /* After 128KB (Reserved for Firmware + 64KB Spare) */ 31 | #define AIRSPY_FLASH_CALIB_HEADER (0xCA1B0001) 32 | 33 | /* For each configuration the index corresponds to uint32_t */ 34 | typedef struct 35 | { 36 | uint32_t header; /* Shall be equal to AIRSPY_FLASH_CALIB_HEADER */ 37 | uint32_t timestamp; /* Epoch Unix Time Stamp */ 38 | int32_t correction_ppb; 39 | } airspy_calib_t; 40 | 41 | #ifdef __cplusplus 42 | } 43 | #endif 44 | 45 | #endif /* __AIRSPY_CALIB_H */ 46 | -------------------------------------------------------------------------------- /common/airspy_commands.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2013-2016 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy. 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #ifndef __AIRSPY_COMMANDS_H__ 23 | #define __AIRSPY_COMMANDS_H__ 24 | 25 | #include 26 | 27 | #ifdef __cplusplus 28 | extern "C" 29 | { 30 | #endif 31 | 32 | typedef enum 33 | { 34 | RECEIVER_MODE_OFF = 0, 35 | RECEIVER_MODE_RX = 1 36 | } receiver_mode_t; 37 | 38 | // Commands (usb vendor request) shared between Firmware and Host. 39 | #define AIRSPY_CMD_MAX (27) 40 | typedef enum 41 | { 42 | AIRSPY_INVALID = 0 , 43 | AIRSPY_RECEIVER_MODE = 1 , 44 | AIRSPY_SI5351C_WRITE = 2 , 45 | AIRSPY_SI5351C_READ = 3 , 46 | AIRSPY_R820T_WRITE = 4 , 47 | AIRSPY_R820T_READ = 5 , 48 | AIRSPY_SPIFLASH_ERASE = 6 , 49 | AIRSPY_SPIFLASH_WRITE = 7 , 50 | AIRSPY_SPIFLASH_READ = 8 , 51 | AIRSPY_BOARD_ID_READ = 9 , 52 | AIRSPY_VERSION_STRING_READ = 10, 53 | AIRSPY_BOARD_PARTID_SERIALNO_READ = 11, 54 | AIRSPY_SET_SAMPLERATE = 12, 55 | AIRSPY_SET_FREQ = 13, 56 | AIRSPY_SET_LNA_GAIN = 14, 57 | AIRSPY_SET_MIXER_GAIN = 15, 58 | AIRSPY_SET_VGA_GAIN = 16, 59 | AIRSPY_SET_LNA_AGC = 17, 60 | AIRSPY_SET_MIXER_AGC = 18, 61 | AIRSPY_MS_VENDOR_CMD = 19, 62 | AIRSPY_SET_RF_BIAS_CMD = 20, 63 | AIRSPY_GPIO_WRITE = 21, 64 | AIRSPY_GPIO_READ = 22, 65 | AIRSPY_GPIODIR_WRITE = 23, 66 | AIRSPY_GPIODIR_READ = 24, 67 | AIRSPY_GET_SAMPLERATES = 25, 68 | AIRSPY_SET_PACKING = 26, 69 | AIRSPY_SPIFLASH_ERASE_SECTOR = AIRSPY_CMD_MAX 70 | } airspy_vendor_request; 71 | 72 | typedef enum 73 | { 74 | GPIO_PORT0 = 0, 75 | GPIO_PORT1 = 1, 76 | GPIO_PORT2 = 2, 77 | GPIO_PORT3 = 3, 78 | GPIO_PORT4 = 4, 79 | GPIO_PORT5 = 5, 80 | GPIO_PORT6 = 6, 81 | GPIO_PORT7 = 7 82 | } airspy_gpio_port_t; 83 | 84 | typedef enum 85 | { 86 | GPIO_PIN0 = 0, 87 | GPIO_PIN1 = 1, 88 | GPIO_PIN2 = 2, 89 | GPIO_PIN3 = 3, 90 | GPIO_PIN4 = 4, 91 | GPIO_PIN5 = 5, 92 | GPIO_PIN6 = 6, 93 | GPIO_PIN7 = 7, 94 | GPIO_PIN8 = 8, 95 | GPIO_PIN9 = 9, 96 | GPIO_PIN10 = 10, 97 | GPIO_PIN11 = 11, 98 | GPIO_PIN12 = 12, 99 | GPIO_PIN13 = 13, 100 | GPIO_PIN14 = 14, 101 | GPIO_PIN15 = 15, 102 | GPIO_PIN16 = 16, 103 | GPIO_PIN17 = 17, 104 | GPIO_PIN18 = 18, 105 | GPIO_PIN19 = 19, 106 | GPIO_PIN20 = 20, 107 | GPIO_PIN21 = 21, 108 | GPIO_PIN22 = 22, 109 | GPIO_PIN23 = 23, 110 | GPIO_PIN24 = 24, 111 | GPIO_PIN25 = 25, 112 | GPIO_PIN26 = 26, 113 | GPIO_PIN27 = 27, 114 | GPIO_PIN28 = 28, 115 | GPIO_PIN29 = 29, 116 | GPIO_PIN30 = 30, 117 | GPIO_PIN31 = 31 118 | } airspy_gpio_pin_t; 119 | 120 | #ifdef __cplusplus 121 | } // __cplusplus defined. 122 | #endif 123 | 124 | #endif//__AIRSPY_COMMANDS_H__ 125 | -------------------------------------------------------------------------------- /common/fault_handler.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * Copyright 2013-2016 Benjamin Vernoux 4 | * 5 | * This file is part of AirSpy (based on HackRF project). 6 | * 7 | * This program is free software; you can redistribute it and/or modify 8 | * it under the terms of the GNU General Public License as published by 9 | * the Free Software Foundation; either version 2, or (at your option) 10 | * any later version. 11 | * 12 | * This program is distributed in the hope that it will be useful, 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | * GNU General Public License for more details. 16 | * 17 | * You should have received a copy of the GNU General Public License 18 | * along with this program; see the file COPYING. If not, write to 19 | * the Free Software Foundation, Inc., 51 Franklin Street, 20 | * Boston, MA 02110-1301, USA. 21 | */ 22 | 23 | #include 24 | #include "fault_handler.h" 25 | 26 | typedef struct 27 | { 28 | uint32_t r0; 29 | uint32_t r1; 30 | uint32_t r2; 31 | uint32_t r3; 32 | uint32_t r12; 33 | uint32_t lr; /* Link Register. */ 34 | uint32_t pc; /* Program Counter. */ 35 | uint32_t psr;/* Program Status Register. */ 36 | } hard_fault_stack_t; 37 | 38 | /* Code Compatible with CortexM0, M3, M4 (R4 & R5 are modified for ARCH 6M) */ 39 | __attribute__((naked)) 40 | void hard_fault_handler(void) 41 | { 42 | #if defined(__ARM_ARCH_6M__) 43 | __asm__("MOVS R4, #4"); 44 | __asm__("MOV R5, LR"); 45 | __asm__("TST R4, R5"); 46 | __asm__("BEQ _MSP"); 47 | __asm__("MRS R0, PSP"); 48 | __asm__("B hard_fault_handler_c"); 49 | __asm__("_MSP:"); 50 | __asm__("MRS R0, MSP"); 51 | __asm__("B hard_fault_handler_c"); 52 | #elif defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) 53 | __asm__("TST LR, #4"); 54 | __asm__("ITE EQ"); 55 | __asm__("MRSEQ R0, MSP"); 56 | __asm__("MRSNE R0, PSP"); 57 | __asm__("B hard_fault_handler_c"); 58 | #else 59 | #error "unsupported CortexMx architecture" 60 | #endif 61 | } 62 | 63 | volatile hard_fault_stack_t* hard_fault_stack_pt; 64 | 65 | __attribute__((used)) void hard_fault_handler_c(uint32_t* args) 66 | { 67 | /* hard_fault_stack_pt contains registers saved before the hard fault */ 68 | hard_fault_stack_pt = (hard_fault_stack_t*)args; 69 | 70 | /* 71 | // args[0-7]: r0, r1, r2, r3, r12, lr, pc, psr 72 | // Other interesting registers to examine (see SCB data structure): 73 | // CFSR: Configurable Fault Status Register 74 | // HFSR: Hard Fault Status Register 75 | // DFSR: Debug Fault Status Register 76 | // AFSR: Auxiliary Fault Status Register 77 | // MMAR: MemManage Fault Address Register 78 | // BFAR: Bus Fault Address Register 79 | 80 | if( SCB->HFSR & SCB_HFSR_FORCED ) { 81 | if( SCB->CFSR & SCB_CFSR_BFSR_BFARVALID ) { 82 | SCB->BFAR; 83 | if( SCB->CFSR & CSCB_CFSR_BFSR_PRECISERR ) { 84 | } 85 | } 86 | } 87 | */ 88 | __asm("BKPT #0\n") ; // Break into the debugger 89 | 90 | while(1); 91 | } 92 | 93 | void mem_manage_handler() { 94 | while(1); 95 | } 96 | 97 | void bus_fault_handler() { 98 | while(1); 99 | } 100 | 101 | void usage_fault_handler() { 102 | while(1); 103 | } 104 | -------------------------------------------------------------------------------- /common/fault_handler.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * 4 | * This file is part of AirSpy (based on HackRF project). 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #ifndef __FAULT_HANDLER__ 23 | #define __FAULT_HANDLER__ 24 | 25 | #include 26 | 27 | #include 28 | 29 | // TODO: Move all this to a Cortex-M(?) include file, since these 30 | // structures are supposedly the same between processors (to an 31 | // undetermined extent). 32 | typedef struct armv7m_scb_t armv7m_scb_t; 33 | struct armv7m_scb_t { 34 | volatile const uint32_t CPUID; 35 | volatile uint32_t ICSR; 36 | volatile uint32_t VTOR; 37 | volatile uint32_t AIRCR; 38 | volatile uint32_t SCR; 39 | volatile uint32_t CCR; 40 | volatile uint32_t SHPR1; 41 | volatile uint32_t SHPR2; 42 | volatile uint32_t SHPR3; 43 | volatile uint32_t SHCSR; 44 | volatile uint32_t CFSR; 45 | volatile uint32_t HFSR; 46 | volatile uint32_t DFSR; 47 | volatile uint32_t MMFAR; 48 | volatile uint32_t BFAR; 49 | volatile uint32_t AFSR; 50 | volatile const uint32_t ID_PFR0; 51 | volatile const uint32_t ID_PFR1; 52 | volatile const uint32_t ID_DFR0; 53 | volatile const uint32_t ID_AFR0; 54 | volatile const uint32_t ID_MMFR0; 55 | volatile const uint32_t ID_MMFR1; 56 | volatile const uint32_t ID_MMFR2; 57 | volatile const uint32_t ID_MMFR3; 58 | volatile const uint32_t ID_ISAR0; 59 | volatile const uint32_t ID_ISAR1; 60 | volatile const uint32_t ID_ISAR2; 61 | volatile const uint32_t ID_ISAR3; 62 | volatile const uint32_t ID_ISAR4; 63 | volatile const uint32_t __reserved_0x74_0x87[5]; 64 | volatile uint32_t CPACR; 65 | } __attribute__((packed)); 66 | 67 | static armv7m_scb_t* const SCB = (armv7m_scb_t*)SCB_BASE; 68 | 69 | #define SCB_HFSR_DEBUGEVT (1 << 31) 70 | #define SCB_HFSR_FORCED (1 << 30) 71 | #define SCB_HFSR_VECTTBL (1 << 1) 72 | 73 | #endif//__FAULT_HANDLER__ 74 | -------------------------------------------------------------------------------- /common/r820t.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2013-2016 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy. 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #ifndef __R820T_H 23 | #define __R820T_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" 27 | { 28 | #endif 29 | 30 | #include 31 | #include "airspy_commands.h" 32 | 33 | #define R820T_I2C_ADDR (0x1A << 1) 34 | 35 | #define REG_SHADOW_START 5 36 | #define NUM_REGS 30 37 | 38 | /* R820T Clock */ 39 | #define CALIBRATION_LO 88000 40 | 41 | typedef struct 42 | { 43 | uint32_t xtal_freq; /* XTAL_FREQ_HZ */ 44 | uint32_t freq; 45 | uint32_t if_freq; 46 | uint8_t regs[NUM_REGS]; 47 | uint16_t padding; 48 | } r820t_priv_t; 49 | 50 | void airspy_r820t_write_single(r820t_priv_t *priv, uint8_t reg, uint8_t val); 51 | uint8_t airspy_r820t_read_single(r820t_priv_t *priv, uint8_t reg); 52 | 53 | void r820t_startup(r820t_priv_t *priv); 54 | int r820t_init(r820t_priv_t *priv, const uint32_t if_freq); 55 | int r820t_set_freq(r820t_priv_t *priv, uint32_t freq); 56 | int r820t_set_lna_gain(r820t_priv_t *priv, uint8_t gain_index); 57 | int r820t_set_mixer_gain(r820t_priv_t *priv, uint8_t gain_index); 58 | int r820t_set_vga_gain(r820t_priv_t *priv, uint8_t gain_index); 59 | int r820t_set_lna_agc(r820t_priv_t *priv, uint8_t value); 60 | int r820t_set_mixer_agc(r820t_priv_t *priv, uint8_t value); 61 | void r820t_set_if_bandwidth(r820t_priv_t *priv, uint8_t bw); 62 | int r820t_standby(void); 63 | 64 | #ifdef __cplusplus 65 | } 66 | #endif 67 | 68 | #endif /* __R820T_H */ 69 | -------------------------------------------------------------------------------- /common/rom_iap.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2013-2016 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy (based on HackRF project). 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #include "airspy_core.h" 23 | #include 24 | 25 | #include "rom_iap.h" 26 | #include "w25q80bv.h" 27 | 28 | #define ROM_IAP_ADDR (0x10400100) 29 | #define ROM_IAP_UNDEF_ADDR (0x12345678) 30 | 31 | #define CHIP_PART_ID (0x40043200) 32 | #define ROM_OTP_PART_ID_ADDR (0x40045000) 33 | 34 | typedef void (* IAP_t)(uint32_t [],uint32_t[]); 35 | 36 | typedef struct 37 | { 38 | const IAP_t IAP; /* If equal to 0x12345678 IAP not implemented */ 39 | /* Other TBD */ 40 | } *pENTRY_ROM_API_t; 41 | #define pROM_API ((pENTRY_ROM_API_t)ROM_IAP_ADDR) 42 | 43 | /* 44 | See Errata sheet ES_LPC43X0_A.pdf (LPC4350/30/20/10 Rev A) 45 | 3.5 IAP.1: In-Application Programming API not present on flashless parts 46 | Introduction: 47 | The LPC43x0 microcontrollers contain an APIfor In-Application Programming of flash 48 | memory. This API also allows identification of the part. 49 | Problem: 50 | On the LPC43x0 microcontrollers, the IAP API is not present. The ISP interface is present 51 | which allows the part to be identified externally (via the UART) but part identification is not 52 | possible internally using the IAP call because it is not implemented. 53 | The first word of the Part ID can be read directly from OTP at 0x40045000. The second word of the Part ID is always 54 | '0' on flashless parts. */ 55 | 56 | bool iap_is_implemented(void) 57 | { 58 | bool res; 59 | if( *((uint32_t*)ROM_IAP_ADDR) != ROM_IAP_UNDEF_ADDR ) 60 | { 61 | res = true; 62 | }else 63 | { 64 | res = false; 65 | } 66 | return res; 67 | } 68 | 69 | isp_iap_ret_code_t iap_cmd_call(iap_cmd_res_t* iap_cmd_res) 70 | { 71 | uint32_t* p_u32_data; 72 | 73 | if( iap_is_implemented() ) 74 | { 75 | pROM_API->IAP( (uint32_t*)&iap_cmd_res->cmd_param, (uint32_t*)&iap_cmd_res->status_res); 76 | }else 77 | { 78 | /* 79 | Alternative way to retrieve Part Id on MCU with no IAP 80 | Read Serial No => Read Unique ID in SPIFI (only compatible with W25Q80BV) 81 | */ 82 | w25q80bv_setup(); 83 | 84 | switch(iap_cmd_res->cmd_param.command_code) 85 | { 86 | case IAP_CMD_READ_PART_ID_NO: 87 | p_u32_data = (uint32_t*)CHIP_PART_ID; 88 | iap_cmd_res->status_res.iap_result[0] = p_u32_data[0]; 89 | p_u32_data = (uint32_t*)ROM_OTP_PART_ID_ADDR; 90 | iap_cmd_res->status_res.iap_result[1] = p_u32_data[0]; 91 | iap_cmd_res->status_res.status_ret = CMD_SUCCESS; 92 | break; 93 | 94 | case IAP_CMD_READ_SERIAL_NO: 95 | /* Only 64bits used */ 96 | iap_cmd_res->status_res.iap_result[0] = 0; 97 | iap_cmd_res->status_res.iap_result[1] = 0; 98 | w25q80bv_get_unique_id( (w25q80bv_unique_id_t*)&iap_cmd_res->status_res.iap_result[2] ); 99 | iap_cmd_res->status_res.status_ret = CMD_SUCCESS; 100 | break; 101 | 102 | default: 103 | iap_cmd_res->status_res.status_ret = ERROR_IAP_NOT_IMPLEMENTED; 104 | break; 105 | } 106 | } 107 | return iap_cmd_res->status_res.status_ret; 108 | } 109 | -------------------------------------------------------------------------------- /common/rom_iap.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/airspy/airspyone_firmware/cf1a37440d40e4229e9b474077e9fdd56f4926b1/common/rom_iap.h -------------------------------------------------------------------------------- /common/si5351c.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Michael Ossmann 3 | * Copyright 2012 Jared Boone 4 | * Copyright 2014-2016 Benjamin Vernoux 5 | * 6 | * This file is part of AirSpy (based on HackRF project). 7 | * 8 | * This program is free software; you can redistribute it and/or modify 9 | * it under the terms of the GNU General Public License as published by 10 | * the Free Software Foundation; either version 2, or (at your option) 11 | * any later version. 12 | * 13 | * This program is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU General Public License 19 | * along with this program; see the file COPYING. If not, write to 20 | * the Free Software Foundation, Inc., 51 Franklin Street, 21 | * Boston, MA 02110-1301, USA. 22 | */ 23 | 24 | #ifndef __SI5351C_H 25 | #define __SI5351C_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" 29 | { 30 | #endif 31 | 32 | #include 33 | #include "airspy_core.h" 34 | #include "airspy_conf.h" 35 | 36 | #define SI5351C_I2C_ADDR (0x60 << 1) 37 | 38 | #define SI5351C_CLK_POWERDOWN (1<<7) 39 | 40 | #define SI5351C_REG0_CLKIN_LOS (1<<4) 41 | 42 | void si5351c_airspy_config(const si5351c_conf_t* const pt_si5351c_conf); 43 | 44 | void si5351c_disable_all_outputs(void); 45 | bool si5351c_disable_oeb_pin_control(void); 46 | void si5351c_power_down_all_clocks(void); 47 | void si5351c_enable_clock_outputs(void); 48 | 49 | void si5351c_init_fanout(void); 50 | void si5351c_init_xtal(void); 51 | void si5351c_init_pll_soft_reset(void); 52 | 53 | void si5351c_write_single(uint8_t reg, uint8_t val); 54 | uint8_t si5351c_read_single(uint8_t reg); 55 | void si5351c_write(uint8_t* const data, const uint_fast8_t data_count); 56 | 57 | #ifdef __cplusplus 58 | } 59 | #endif 60 | 61 | #endif /* __SI5351C_H */ 62 | -------------------------------------------------------------------------------- /common/signal_mcu.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2014-2016 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy. 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | // see file #include "signal_mcu.h" 22 | -------------------------------------------------------------------------------- /common/signal_mcu.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012-2016 Benjamin Vernoux 3 | * 4 | * This file is part of AirSpy. 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | #ifndef __SIGNAL_MCU__ 22 | #define __SIGNAL_MCU__ 23 | 24 | /* ---------- provided operations: ------------------------------------------ */ 25 | 26 | /* SEV causes an event to be signaled to all processors in a multiprocessor system 27 | It also sets the local event register, see Power management (sleep mode, deep sleep mode of System Control Register for more details). 28 | Instruction for Cortex M0, M3/M4 */ 29 | __attribute__ ((always_inline)) static inline void signal_sev(void) 30 | { 31 | /* make sure all data transactions complete before next instruction is executed */ 32 | __asm("dsb"); 33 | __asm("sev"); 34 | } 35 | 36 | /* 37 | Wait For Event. 38 | If the event register is 0, WFE suspends execution until one of the following events occurs: 39 | - an exception, unless masked by the exception mask registers or the current priority level 40 | - an exception enters the Pending state, if SEVONPEND in the System Control Register is set 41 | - a Debug Entry request, if debug is enabled 42 | - an event signaled by a peripheral or another processor in a multiprocessor system using the SEV instruction. 43 | If the event register is 1, WFE clears it to 0 and completes immediately. 44 | Instruction for Cortex M0, M3/M4 45 | */ 46 | __attribute__ ((always_inline)) static inline void signal_wfe(void) 47 | { 48 | __asm("wfe"); 49 | } 50 | /* 51 | Wait For Interrupt. 52 | WFI suspends execution until one of the following events occurs: 53 | - an exception 54 | - an interrupt becomes pending, which would preempt if PRIMASK was clear 55 | - a Debug Entry request, regardless of whether debug is enabled. 56 | Instruction for Cortex M0, M3/M4 57 | */ 58 | __attribute__ ((always_inline)) static inline void signal_wfi(void) 59 | { 60 | __asm("wfi"); 61 | } 62 | 63 | 64 | #endif /* __SIGNAL_MCU__ */ 65 | -------------------------------------------------------------------------------- /common/usb.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * 4 | * This file is part of AirSpy (based on HackRF project). 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #ifndef __USB_H__ 23 | #define __USB_H__ 24 | 25 | // TODO: Refactor to support high performance operations without having to 26 | // expose usb_transfer_descriptor_t. Or usb_endpoint_prime(). Or, or, or... 27 | #include 28 | 29 | #include "usb_type.h" 30 | 31 | void usb_peripheral_reset(); 32 | 33 | void usb_device_init( 34 | const uint_fast8_t device_ordinal, 35 | usb_device_t* const device 36 | ); 37 | 38 | void usb_run( 39 | usb_device_t* const device 40 | ); 41 | 42 | void usb_run_tasks( 43 | const usb_device_t* const device 44 | ); 45 | 46 | usb_speed_t usb_speed( 47 | const usb_device_t* const device 48 | ); 49 | 50 | void usb_set_address_immediate( 51 | const usb_device_t* const device, 52 | const uint_fast8_t address 53 | ); 54 | 55 | void usb_set_address_deferred( 56 | const usb_device_t* const device, 57 | const uint_fast8_t address 58 | ); 59 | 60 | void usb_endpoint_init( 61 | const usb_endpoint_t* const endpoint 62 | ); 63 | 64 | void usb_endpoint_stall( 65 | const usb_endpoint_t* const endpoint 66 | ); 67 | 68 | void usb_endpoint_disable( 69 | const usb_endpoint_t* const endpoint 70 | ); 71 | 72 | void usb_endpoint_flush( 73 | const usb_endpoint_t* const endpoint 74 | ); 75 | 76 | bool usb_endpoint_is_ready( 77 | const usb_endpoint_t* const endpoint 78 | ); 79 | 80 | void usb_endpoint_prime( 81 | const usb_endpoint_t* const endpoint, 82 | usb_transfer_descriptor_t* const first_td 83 | ); 84 | 85 | void usb_endpoint_schedule_wait( 86 | const usb_endpoint_t* const endpoint, 87 | usb_transfer_descriptor_t* const td 88 | ); 89 | 90 | void usb_endpoint_schedule_append( 91 | const usb_endpoint_t* const endpoint, 92 | usb_transfer_descriptor_t* const tail_td, 93 | usb_transfer_descriptor_t* const new_td 94 | ); 95 | 96 | #endif//__USB_H__ 97 | -------------------------------------------------------------------------------- /common/usb_queue.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * Copyright 2013 Ben Gamari 4 | * Copyright 2015 Benjamin Vernoux 5 | * 6 | * This file is part of AirSpy (based on HackRF project). 7 | * 8 | * This program is free software; you can redistribute it and/or modify 9 | * it under the terms of the GNU General Public License as published by 10 | * the Free Software Foundation; either version 2, or (at your option) 11 | * any later version. 12 | * 13 | * This program is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU General Public License 19 | * along with this program; see the file COPYING. If not, write to 20 | * the Free Software Foundation, Inc., 51 Franklin Street, 21 | * Boston, MA 02110-1301, USA. 22 | */ 23 | #ifndef __USB_QUEUE_H__ 24 | #define __USB_QUEUE_H__ 25 | 26 | #include 27 | 28 | #include "usb_type.h" 29 | 30 | typedef struct _usb_transfer_t usb_transfer_t; 31 | typedef struct _usb_queue_t usb_queue_t; 32 | 33 | // This is an opaque datatype. Thou shall not touch these members. 34 | struct _usb_transfer_t 35 | { 36 | struct _usb_transfer_t* next; 37 | usb_transfer_descriptor_t td ATTR_ALIGNED(64); 38 | unsigned int maximum_length; 39 | struct _usb_queue_t* queue; 40 | }; 41 | 42 | // This is an opaque datatype. Thou shall not touch these members. 43 | struct _usb_queue_t 44 | { 45 | struct usb_endpoint_t* endpoint; 46 | const unsigned int pool_size; 47 | usb_transfer_t* volatile free_transfers; 48 | usb_transfer_t* volatile active; 49 | }; 50 | 51 | #define USB_DECLARE_QUEUE(endpoint_name) \ 52 | struct _usb_queue_t endpoint_name##_queue; 53 | #define USB_DEFINE_QUEUE(endpoint_name, _pool_size) \ 54 | struct _usb_transfer_t endpoint_name##_transfers[_pool_size]; \ 55 | struct _usb_queue_t endpoint_name##_queue = { \ 56 | .endpoint = &endpoint_name, \ 57 | .free_transfers = endpoint_name##_transfers, \ 58 | .pool_size = _pool_size \ 59 | }; 60 | 61 | void usb_queue_flush_endpoint(const usb_endpoint_t* const endpoint); 62 | 63 | int usb_transfer_schedule( 64 | const usb_endpoint_t* const endpoint, 65 | void* const data, 66 | const uint32_t maximum_length 67 | ); 68 | 69 | int usb_transfer_schedule_block( 70 | const usb_endpoint_t* const endpoint, 71 | void* const data, 72 | const uint32_t maximum_length 73 | ); 74 | 75 | int usb_transfer_schedule_ack(const usb_endpoint_t* const endpoint); 76 | 77 | void usb_queue_init(usb_queue_t* const queue); 78 | 79 | void usb_queue_transfer_complete(usb_endpoint_t* const endpoint); 80 | 81 | #endif//__USB_QUEUE_H__ 82 | -------------------------------------------------------------------------------- /common/usb_request.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * 4 | * This file is part of AirSpy (based on HackRF project). 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #include "usb.h" 23 | #include "usb_request.h" 24 | #include "usb_queue.h" 25 | 26 | #include 27 | 28 | static void usb_request( 29 | usb_endpoint_t* const endpoint, 30 | const usb_transfer_stage_t stage) 31 | { 32 | usb_request_status_t status = USB_REQUEST_STATUS_STALL; 33 | usb_request_handler_fn handler = 0; 34 | 35 | switch( endpoint->setup.request_type & USB_SETUP_REQUEST_TYPE_mask ) 36 | { 37 | case USB_SETUP_REQUEST_TYPE_STANDARD: 38 | handler = usb_request_handlers.standard; 39 | break; 40 | 41 | case USB_SETUP_REQUEST_TYPE_CLASS: 42 | handler = usb_request_handlers.class; 43 | break; 44 | 45 | case USB_SETUP_REQUEST_TYPE_VENDOR: 46 | handler = usb_request_handlers.vendor; 47 | break; 48 | 49 | case USB_SETUP_REQUEST_TYPE_RESERVED: 50 | handler = usb_request_handlers.reserved; 51 | break; 52 | } 53 | 54 | if( handler ) { 55 | status = handler(endpoint, stage); 56 | } 57 | 58 | if( status != USB_REQUEST_STATUS_OK ) { 59 | // USB 2.0 section 9.2.7 "Request Error" 60 | usb_endpoint_stall(endpoint); 61 | } 62 | } 63 | 64 | void usb_setup_complete(usb_endpoint_t* const endpoint) 65 | { 66 | usb_request(endpoint, USB_TRANSFER_STAGE_SETUP); 67 | } 68 | 69 | void usb_control_out_complete(usb_endpoint_t* const endpoint) 70 | { 71 | const bool device_to_host = 72 | endpoint->setup.request_type >> USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift; 73 | if( device_to_host ) { 74 | usb_request(endpoint, USB_TRANSFER_STAGE_STATUS); 75 | } else { 76 | usb_request(endpoint, USB_TRANSFER_STAGE_DATA); 77 | } 78 | usb_queue_transfer_complete(endpoint); 79 | } 80 | 81 | void usb_control_in_complete(usb_endpoint_t* const endpoint) 82 | { 83 | const bool device_to_host = 84 | endpoint->setup.request_type >> USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift; 85 | if( device_to_host ) { 86 | usb_request(endpoint, USB_TRANSFER_STAGE_DATA); 87 | } else { 88 | usb_request(endpoint, USB_TRANSFER_STAGE_STATUS); 89 | } 90 | usb_queue_transfer_complete(endpoint); 91 | } 92 | 93 | -------------------------------------------------------------------------------- /common/usb_request.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * 4 | * This file is part of AirSpy (based on HackRF project). 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #ifndef __USB_REQUEST_H__ 23 | #define __USB_REQUEST_H__ 24 | 25 | #include "usb_type.h" 26 | 27 | typedef enum { 28 | USB_RESPONSE_NONE, 29 | USB_RESPONSE_IN, 30 | USB_RESPONSE_OUT, 31 | USB_RESPONSE_STALL, 32 | } usb_endpoint_type_t; 33 | 34 | typedef enum { 35 | USB_TRANSFER_STAGE_SETUP, 36 | USB_TRANSFER_STAGE_DATA, 37 | USB_TRANSFER_STAGE_STATUS, 38 | } usb_transfer_stage_t; 39 | 40 | typedef enum { 41 | USB_REQUEST_STATUS_OK = 0, 42 | USB_REQUEST_STATUS_STALL = 1, 43 | } usb_request_status_t; 44 | 45 | typedef usb_request_status_t (*usb_request_handler_fn)( 46 | usb_endpoint_t* const endpoint, 47 | const usb_transfer_stage_t stage 48 | ); 49 | 50 | typedef struct { 51 | usb_request_handler_fn standard; 52 | usb_request_handler_fn class; 53 | usb_request_handler_fn vendor; 54 | usb_request_handler_fn reserved; 55 | } usb_request_handlers_t; 56 | 57 | extern const usb_request_handlers_t usb_request_handlers; 58 | 59 | void usb_setup_complete( 60 | usb_endpoint_t* const endpoint 61 | ); 62 | 63 | void usb_control_in_complete( 64 | usb_endpoint_t* const endpoint 65 | ); 66 | 67 | void usb_control_out_complete( 68 | usb_endpoint_t* const endpoint 69 | ); 70 | 71 | #endif//__USB_REQUEST_H__ 72 | -------------------------------------------------------------------------------- /common/usb_standard_request.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2012 Jared Boone 3 | * 4 | * This file is part of AirSpy (based on HackRF project). 5 | * 6 | * This program is free software; you can redistribute it and/or modify 7 | * it under the terms of the GNU General Public License as published by 8 | * the Free Software Foundation; either version 2, or (at your option) 9 | * any later version. 10 | * 11 | * This program is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU General Public License 17 | * along with this program; see the file COPYING. If not, write to 18 | * the Free Software Foundation, Inc., 51 Franklin Street, 19 | * Boston, MA 02110-1301, USA. 20 | */ 21 | 22 | #ifndef __USB_STANDARD_REQUEST_H__ 23 | #define __USB_STANDARD_REQUEST_H__ 24 | 25 | #include "usb_type.h" 26 | #include "usb_request.h" 27 | 28 | void usb_set_configuration_changed_cb( 29 | void (*callback)(usb_device_t* const) 30 | ); 31 | 32 | usb_request_status_t usb_standard_request( 33 | usb_endpoint_t* const endpoint, 34 | const usb_transfer_stage_t stage 35 | ); 36 | 37 | const uint8_t* usb_endpoint_descriptor( 38 | const usb_endpoint_t* const endpoint 39 | ); 40 | 41 | uint_fast16_t usb_endpoint_descriptor_max_packet_size( 42 | const uint8_t* const endpoint_descriptor 43 | ); 44 | 45 | usb_transfer_type_t usb_endpoint_descriptor_transfer_type( 46 | const uint8_t* const endpoint_descriptor 47 | ); 48 | 49 | bool usb_set_configuration( 50 | usb_device_t* const device, 51 | const uint_fast8_t configuration_number 52 | ); 53 | 54 | #endif//__USB_STANDARD_REQUEST_H__ 55 | -------------------------------------------------------------------------------- /common/w25q80bv.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2013 Michael Ossmann 3 | * Copyright 2013-2016 Benjamin Vernoux 4 | * 5 | * This file is part of AirSpy (based on HackRF project). 6 | * 7 | * This program is free software; you can redistribute it and/or modify 8 | * it under the terms of the GNU General Public License as published by 9 | * the Free Software Foundation; either version 2, or (at your option) 10 | * any later version. 11 | * 12 | * This program is distributed in the hope that it will be useful, 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | * GNU General Public License for more details. 16 | * 17 | * You should have received a copy of the GNU General Public License 18 | * along with this program; see the file COPYING. If not, write to 19 | * the Free Software Foundation, Inc., 51 Franklin Street, 20 | * Boston, MA 02110-1301, USA. 21 | */ 22 | 23 | #ifndef __W25Q80BV_H__ 24 | #define __W25Q80BV_H__ 25 | 26 | #define W25Q80BV_PAGE_LEN 256U 27 | #define W25Q80BV_NUM_PAGES 4096U 28 | #define W25Q80BV_NUM_BYTES 1048576U 29 | 30 | #define W25Q80BV_FAST_READ 0x0B 31 | #define W25Q80BV_WRITE_ENABLE 0x06 32 | #define W25Q80BV_CHIP_ERASE 0xC7 33 | #define W25Q80BV_SECTOR_ERASE 0xD8 34 | #define W25Q80BV_READ_STATUS1 0x05 35 | #define W25Q80BV_PAGE_PROGRAM 0x02 36 | #define W25Q80BV_DEVICE_ID 0xAB 37 | #define W25Q80BV_UNIQUE_ID 0x4B 38 | 39 | #define W25Q80BV_STATUS_BUSY 0x01 40 | 41 | #define W25Q80BV_DEVICE_ID_RES 0x13 /* Expected device_id for W25Q80BV */ 42 | #define S25FL032P_DEVICE_ID_RES 0x15 /* Expected device_id for S25FL032P */ 43 | 44 | #define S25FL032P_READ_OTP 0x4B 45 | #define S25FL032P_OTP_SN1_ADDR 0x102 /* 8 bytes (ESN1) Unique ID for S25FL032P */ 46 | 47 | typedef union 48 | { 49 | uint64_t id_64b; 50 | uint32_t id_32b[2]; /* 2*32bits 64bits Unique ID */ 51 | uint8_t id_8b[8]; /* 8*8bits 64bits Unique ID */ 52 | } w25q80bv_unique_id_t; 53 | 54 | void w25q80bv_setup(void); 55 | void w25q80bv_chip_erase(void); 56 | void w25q80bv_sector_erase(const uint32_t addr); /* 1 Sector=64KB */ 57 | void w25q80bv_program(uint32_t addr, uint32_t len, const uint8_t* data); 58 | uint8_t w25q80bv_get_device_id(void); 59 | void w25q80bv_get_unique_id(w25q80bv_unique_id_t* unique_id); 60 | void w25q80bv_read(uint32_t addr, uint32_t len, uint8_t* const data); 61 | 62 | #endif//__W25Q80BV_H__ 63 | -------------------------------------------------------------------------------- /libopencm3/.gitignore: -------------------------------------------------------------------------------- 1 | *.d 2 | *.o 3 | *.bin 4 | *.hex 5 | *.list 6 | *.srec 7 | *.a 8 | *.elf 9 | lib/*.ld 10 | *.swp 11 | \#* 12 | .\#* 13 | *~ 14 | *.map 15 | *.log 16 | html/ 17 | latex/ 18 | *.pdf 19 | *.tag 20 | .DS_Store 21 | # These are generated 22 | include/libopencmsis/lpc43xx/ 23 | -------------------------------------------------------------------------------- /libopencm3/HACKING: -------------------------------------------------------------------------------- 1 | ------------------------------------------------------------------------------ 2 | HACKING 3 | ------------------------------------------------------------------------------ 4 | 5 | Coding style 6 | ------------ 7 | 8 | The whole library is programmed using the Linux kernel coding style, see 9 | http://lxr.linux.no/linux/Documentation/CodingStyle for details. 10 | 11 | Please use the same style for any code contributions, thanks! 12 | 13 | Amendments to the Linux kernel coding style 14 | ------------------------------------------- 15 | 16 | 1) We use the stdint types. The linux kernel accepts the abbreviated types (u8, 17 | s8, u16 and so on) for legacy reasons. We should in general not introduce 18 | things like types ourselves as long as they are not necessary to make our 19 | job possible of refining the hardware and make it easier to be used. stdint 20 | is a standard and it is not in the scope of our project to introduce a new 21 | type standard. 22 | 23 | 2) Based on the same logic as in (1) we do not use __packed and __aligned 24 | definitions, it is not our job to add compiler extensions. If we need to 25 | deal with compiler incompatibility we will do that the same way we are 26 | dealing with the depricated attribute by introducing a normal macro that is 27 | not in the compiler reserved keyword space. 28 | 29 | 3) We accept to write an empty body busy waiting while loop like this: 30 | while (1); 31 | there is no need to put the colon on the next line as per linux kernel 32 | style. 33 | 34 | 4) We always add brackets around bodies of if, while and for statements, even 35 | if the body contains only one expression. It is dangerous to not have them 36 | as it easily happens that one adds a second expression and is hunting for 37 | hours why the code is not working just because of a missing bracket pair. 38 | 39 | Development guidelines 40 | ---------------------- 41 | 42 | - Every new file added must have the usual license header, see the 43 | existing files for examples. 44 | 45 | - In general, please try to keep the register and bit naming as close 46 | as possible to the official vendor datasheets. Among other reasons, this 47 | makes it easier for users to find what they're looking for in the 48 | datasheets, programming manuals, and application notes. 49 | 50 | - All register definitions should follow the following naming conventions: 51 | 52 | - The #define names should be all-caps, parts are separated by 53 | an underscore. 54 | 55 | - The name should be of the form SUBSYSTEM_REGISTER_BIT, e.g. 56 | ADC_CR2_DMA, where ADC is the subsystem name, CR2 is the register NAME, 57 | and DMA is the name of the bit in the register that is defined. 58 | 59 | - All subsystem-specific function names should be prefixed with the 60 | subsystem name. For example, gpio_set_mode() or rcc_osc_on(). 61 | 62 | - Please consistently use the short form types from , 63 | e.g. u8, u16, u32, and so on. 64 | 65 | - Variables that are used to store register values read from registers or 66 | to be stored in a register should be named reg8, reg16, reg32 etc. 67 | 68 | - In the examples directory, the following structure should be used: 69 | 70 | - One (or more) subdirectories for the type of microcontroller, e.g. 71 | lm3s, lpc13xx, stm32/f1, stm32/f2, stm32/f4. 72 | 73 | - One subdirectory in there for each eval board or piece of hardware, e.g. 74 | stm32-h103, lisa-m, stm32vl-discovery, stm32f4-discovery, etc. 75 | 76 | - One subdirectory in there for each example, e.g. 77 | miniblink, button, usart, usb_dfu, etc. 78 | 79 | Tips and tricks 80 | --------------- 81 | 82 | SublimeText users: 83 | 84 | - The project contains a sublime project description file with some basic 85 | settings provided to make hacking on libopencm3 easier. 86 | 87 | - Recommended SublimeText plugins when hacking on libopencm3: 88 | 89 | - TrailingSpaces: Show and trim trailing line spaces. 90 | 91 | - SublimeLinter: Run checkpatch.pl in the background while you write your 92 | code and indicate possible coding style issues on the fly. 93 | -------------------------------------------------------------------------------- /libopencm3/HACKING_COMMON_DOC: -------------------------------------------------------------------------------- 1 | Files for each peripheral (examples given for STM32 GPIO) 2 | --------------------------------------------------------- 3 | 4 | In include/libopencm3/stm32. 5 | A "dispatch" header to point to the subfamily header (gpio.h) 6 | 7 | In include/libopencm3/stm32/f* 8 | A file with defines that are specific to the subfamily, and an include of 9 | needed common header files (gpio.h). 10 | 11 | In include/libopencm3/stm32/common 12 | A file with defines common to all subfamilies. Includes the cm3 common header 13 | (gpio_common_all.h). 14 | 15 | In include/libopencm3/stm32/common 16 | May be one other file with defines common to a subgroup of devices. 17 | This includes the file common to all (gpio_common_f24.h). 18 | 19 | In lib/stm32/f* 20 | A file with functions specific to the subfamily. Includes the "dispatch" header 21 | and any common headers needed (gpio.c). 22 | 23 | In lib/stm32/common 24 | Has functions common to all subfamilies. Includes the "dispatch" header 25 | (gpio_common_all.c). 26 | 27 | In lib/stm32/common 28 | May be one other file with functions common to a group of subfamilies. Includes 29 | the "dispatch" header and the file common to all (gpio_common_f24.h). 30 | 31 | Makefiles in lib/stm32/f? have the common object files added and the 32 | common directory added to VPATH. 33 | 34 | NOTE: The common source files MUST have the "dispatch" header so that 35 | compilation will use the specific defines for the subfamily being compiled. 36 | These can differ between subfamilies. 37 | 38 | NOTE: The common source files must have a line of the form 39 | 40 | #ifdef LIBOPENCM3_xxx_H 41 | 42 | where xxx is the associated peripheral name. This prevents the common files 43 | from being included accidentally into a user's application. This however 44 | causes doxygen to skip processing of the remainder of the file. Thus a 45 | 46 | @cond ... @endcond 47 | 48 | directive must be placed around the statement to prevent doxygen from 49 | processing it. This works only for doxygen 1.8.4 or later. At the present 50 | time most distros have an earlier buggy version. 51 | 52 | Documentation 53 | ------------- 54 | 55 | In include/libopencm3/stm32/f* 56 | A file doc-stm32f*.h contains a definition of the particular family grouping. 57 | This grouping will appear in the main index of the resulting document with all 58 | documentation under it. 59 | 60 | All header files for a peripheral (common or otherwise) will subgroup under a 61 | name which is the same in all families (such as gpio_defines). The peripheral 62 | header file in include/libopencm3/stm32/f* will then include this group as a 63 | subgroup under the specific family group. Doxygen is run separately for each 64 | family so there is no danger of accidentally including the wrong stuff. 65 | 66 | Similarly for the source files for a peripheral which will subgroup under a 67 | same name (such as gpio_files). The peripheral source file in lib/stm32/f* 68 | will include this as a subgroup under the specific family group. 69 | 70 | DOXYFILE for a particular family will list the family specific and common files 71 | (headers and source) that are to be included. The result (in the long run) will 72 | be that all peripherals will appear under the same family grouping in the 73 | documentation, even if they are identical over a number of families. That is 74 | probably most useful to end users who only need to see the documentation for 75 | one family. 76 | 77 | -------------------------------------------------------------------------------- /libopencm3/Makefile: -------------------------------------------------------------------------------- 1 | ## 2 | ## This file is part of the libopencm3 project. 3 | ## 4 | ## Copyright (C) 2009 Uwe Hermann 5 | ## Copyright (C) 2014 Benjamin Vernoux (LPC43xxx) 6 | ## 7 | ## This library is free software: you can redistribute it and/or modify 8 | ## it under the terms of the GNU Lesser General Public License as published by 9 | ## the Free Software Foundation, either version 3 of the License, or 10 | ## (at your option) any later version. 11 | ## 12 | ## This library is distributed in the hope that it will be useful, 13 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | ## GNU Lesser General Public License for more details. 16 | ## 17 | ## You should have received a copy of the GNU Lesser General Public License 18 | ## along with this library. If not, see . 19 | ## 20 | 21 | PREFIX ?= arm-none-eabi 22 | #PREFIX ?= arm-elf 23 | 24 | ifeq ($(DETECT_TOOLCHAIN),) 25 | DESTDIR ?= /usr/local 26 | else 27 | DESTDIR ?= $(shell dirname $(shell readlink -f $(shell which $(PREFIX)-gcc)))/.. 28 | endif 29 | 30 | INCDIR := $(DESTDIR)/$(PREFIX)/include 31 | LIBDIR := $(DESTDIR)/$(PREFIX)/lib 32 | INSTALL := install 33 | 34 | SRCLIBDIR:= $(realpath lib) 35 | 36 | TARGETS:= lpc43xx/m4 lpc43xx/m0 lpc43xx/m0s 37 | 38 | # Be silent per default, but 'make V=1' will show all compiler calls. 39 | ifneq ($(V),1) 40 | Q := @ 41 | # Do not print "Entering directory ...". 42 | MAKEFLAGS += --no-print-directory 43 | endif 44 | 45 | all: build 46 | 47 | build: lib 48 | 49 | LIB_DIRS:=$(wildcard $(addprefix lib/,$(TARGETS))) 50 | $(LIB_DIRS): 51 | @printf " BUILD $@\n"; 52 | $(Q)$(MAKE) --directory=$@ SRCLIBDIR=$(SRCLIBDIR) 53 | 54 | lib: $(LIB_DIRS) 55 | $(Q)true 56 | 57 | install: lib 58 | @printf " INSTALL headers\n" 59 | $(Q)$(INSTALL) -d $(INCDIR)/libopencm3 60 | $(Q)$(INSTALL) -d $(INCDIR)/libopencmsis 61 | $(Q)$(INSTALL) -d $(LIBDIR) 62 | $(Q)cp -r include/libopencm3/* $(INCDIR)/libopencm3 63 | $(Q)cp -r include/libopencmsis/* $(INCDIR)/libopencmsis 64 | @printf " INSTALL libs\n" 65 | $(Q)$(INSTALL) -m 0644 lib/*.a $(LIBDIR) 66 | @printf " INSTALL ldscripts\n" 67 | $(Q)$(INSTALL) -m 0644 lib/*.ld $(LIBDIR) 68 | 69 | doc: 70 | $(Q)$(MAKE) -C doc html 71 | 72 | clean: $(LIB_DIRS:=.clean) $(EXAMPLE_DIRS:=.clean) doc.clean 73 | 74 | %.clean: 75 | $(Q)if [ -d $* ]; then \ 76 | printf " CLEAN $*\n"; \ 77 | $(MAKE) -C $* clean SRCLIBDIR=$(SRCLIBDIR) || exit $?; \ 78 | fi; 79 | 80 | .PHONY: build lib $(LIB_DIRS) install doc clean 81 | 82 | -------------------------------------------------------------------------------- /libopencm3/doc/Doxyfile: -------------------------------------------------------------------------------- 1 | # Doxygen include file to generate top level entry document 2 | 3 | # 14 September 2012 4 | # (C) Ken Sarkies 5 | # (C) Benjamin Vernoux 6 | 7 | #--------------------------------------------------------------------------- 8 | # Common Include File 9 | #--------------------------------------------------------------------------- 10 | 11 | @INCLUDE = ./Doxyfile_common 12 | 13 | #--------------------------------------------------------------------------- 14 | # Local settings 15 | #--------------------------------------------------------------------------- 16 | 17 | INPUT = ../include/libopencm3/docmain.dox 18 | 19 | LAYOUT_FILE = DoxygenLayout.xml 20 | 21 | GENERATE_LATEX = NO 22 | 23 | TAGFILES = ./cm3/cm3.tag=../cm3/html \ 24 | ./lpc43xx/lpc43xx.tag=../lpc43xx/html 25 | 26 | 27 | -------------------------------------------------------------------------------- /libopencm3/doc/Makefile: -------------------------------------------------------------------------------- 1 | # Makefile to build libopencm3 documentation 2 | 3 | # 14 September 2012 4 | # (C) Ken Sarkies 5 | # (C) Benjamin Vernoux 6 | 7 | doc: html latex 8 | 9 | html: cm3 lpc43 top 10 | 11 | cm3: 12 | cd cm3/; doxygen 13 | 14 | lpc43: 15 | cd lpc43xx/; doxygen 16 | 17 | top: 18 | doxygen 19 | 20 | latex: lpc43.pdf 21 | 22 | lpc43.pdf: 23 | cd lpc43xx/; doxygen Doxyfile_latex; cd latex/; $(MAKE); cp refman.pdf ../../lpc43.pdf 24 | 25 | clean: 26 | @rm -rf html/ */html/ */latex/ *.pdf */*.tag 27 | 28 | .PHONY: doc html cm3 lpc43 top latex 29 | 30 | -------------------------------------------------------------------------------- /libopencm3/doc/README: -------------------------------------------------------------------------------- 1 | libopencm3 Documentation 2 | 14 September 2012 (C) K Sarkies 3 | ------------------------------- 4 | 5 | To generate all documentation run 'make doc' in the doc directory, or 6 | for html documentation only run 'make html' (much faster). This runs doxygen 7 | for each of the processor families then integrates the whole. 8 | 9 | Alternatively run 'make doc' in the top directory to make html documentation. 10 | LaTeX and pdf documentation is currently very large in size. 11 | 12 | This requires doxygen v 1.8.2 or later. 13 | 14 | HTML, LaTeX, and pdf output can be produced. 15 | 16 | Generation of HTML 17 | ------------------ 18 | 19 | To view HTML, point a browser to libopencm3/doc/html/index.html. 20 | 21 | Generation of PDF 22 | ----------------- 23 | 24 | The pdf is generated via LaTeX. The pdf files are placed in the 25 | doc directory. Each file contains all documentation for the core and common 26 | features. The resulting files are huge. 27 | 28 | -------------------------------------------------------------------------------- /libopencm3/doc/cm3/Doxyfile: -------------------------------------------------------------------------------- 1 | # HTML Documentation for CM3 Core features. 2 | 3 | # 14 September 2012 4 | # (C) Ken Sarkies 5 | 6 | #--------------------------------------------------------------------------- 7 | # Common Include File 8 | #--------------------------------------------------------------------------- 9 | 10 | @INCLUDE = ../Doxyfile_common 11 | 12 | #--------------------------------------------------------------------------- 13 | # Local settings 14 | #--------------------------------------------------------------------------- 15 | 16 | WARN_LOGFILE = doxygen_cm3.log 17 | 18 | INPUT = ../../include/libopencm3/license.dox \ 19 | ../../include/libopencm3/cm3/ 20 | 21 | LAYOUT_FILE = DoxygenLayout_cm3.xml 22 | 23 | GENERATE_TAGFILE = cm3.tag 24 | 25 | -------------------------------------------------------------------------------- /libopencm3/doc/index.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | Documentation index

7 | 8 | 9 | -------------------------------------------------------------------------------- /libopencm3/doc/lpc43xx/Doxyfile: -------------------------------------------------------------------------------- 1 | # HTML Documentation for LPC43xx code level 2 | 3 | # 14 September 2012 4 | # (C) Ken Sarkies 5 | 6 | #--------------------------------------------------------------------------- 7 | # Common Include File 8 | #--------------------------------------------------------------------------- 9 | 10 | @INCLUDE = ../Doxyfile_common 11 | 12 | #--------------------------------------------------------------------------- 13 | # Local settings 14 | #--------------------------------------------------------------------------- 15 | 16 | WARN_LOGFILE = doxygen_lpc43xx.log 17 | 18 | INPUT = ../../include/libopencm3/license.dox \ 19 | ../../include/libopencm3/lpc43xx \ 20 | ../../lib/lpc43xx 21 | 22 | LAYOUT_FILE = DoxygenLayout_lpc43xx.xml 23 | 24 | TAGFILES = ../cm3/cm3.tag=../../cm3/html 25 | 26 | GENERATE_TAGFILE = lpc43xx.tag 27 | 28 | ENABLE_PREPROCESSING = NO 29 | 30 | 31 | -------------------------------------------------------------------------------- /libopencm3/doc/lpc43xx/Doxyfile_latex: -------------------------------------------------------------------------------- 1 | # LaTeX Documentation for LPC43xx code level 2 | 3 | # 14 September 2012 4 | # (C) Ken Sarkies 5 | 6 | #--------------------------------------------------------------------------- 7 | # Common Include File 8 | #--------------------------------------------------------------------------- 9 | 10 | @INCLUDE = ../Doxyfile_common 11 | 12 | #--------------------------------------------------------------------------- 13 | # Local settings 14 | #--------------------------------------------------------------------------- 15 | 16 | WARN_LOGFILE = doxygen_lpc43xx_latex.log 17 | 18 | INPUT = ../../include/libopencm3/docmain.dox \ 19 | ../../include/libopencm3/license.dox \ 20 | ../../include/libopencm3/lpc43xx/ \ 21 | ../../lib/lpc43xx 22 | 23 | EXCLUDE = ../../include/libopencm3/lpc43xx/doc-lpc43xx.h 24 | 25 | LAYOUT_FILE = DoxygenLayout_lpc43xx.xml 26 | 27 | GENERATE_HTML = NO 28 | 29 | GENERATE_LATEX = YES 30 | 31 | LATEX_HEADER = header_lpc43xx.tex 32 | 33 | -------------------------------------------------------------------------------- /libopencm3/doc/lpc43xx/header_lpc43xx.tex: -------------------------------------------------------------------------------- 1 | \documentclass{book} 2 | \usepackage[a4paper,top=2.5cm,bottom=2.5cm,left=2.5cm,right=2.5cm]{geometry} 3 | \usepackage{makeidx} 4 | \usepackage{natbib} 5 | \usepackage{graphicx} 6 | \usepackage{multicol} 7 | \usepackage{float} 8 | \usepackage{listings} 9 | \usepackage{color} 10 | \usepackage{ifthen} 11 | \usepackage[table]{xcolor} 12 | \usepackage{textcomp} 13 | \usepackage{alltt} 14 | \usepackage{ifpdf} 15 | \ifpdf 16 | \usepackage[pdftex, 17 | pagebackref=true, 18 | colorlinks=true, 19 | linkcolor=blue, 20 | unicode 21 | ]{hyperref} 22 | \else 23 | \usepackage[ps2pdf, 24 | pagebackref=true, 25 | colorlinks=true, 26 | linkcolor=blue, 27 | unicode 28 | ]{hyperref} 29 | \usepackage{pspicture} 30 | \fi 31 | \usepackage[utf8]{inputenc} 32 | \usepackage{mathptmx} 33 | \usepackage[scaled=.90]{helvet} 34 | \usepackage{courier} 35 | \usepackage{sectsty} 36 | \usepackage{amssymb} 37 | \usepackage[titles]{tocloft} 38 | \usepackage{doxygen} 39 | \lstset{language=C++,inputencoding=utf8,basicstyle=\footnotesize,breaklines=true,breakatwhitespace=true,tabsize=4,numbers=left } 40 | \makeindex 41 | \setcounter{tocdepth}{3} 42 | \renewcommand{\footrulewidth}{0.4pt} 43 | \renewcommand{\familydefault}{\sfdefault} 44 | \hfuzz=15pt 45 | \setlength{\emergencystretch}{15pt} 46 | \hbadness=750 47 | \tolerance=750 48 | \begin{document} 49 | \hypersetup{pageanchor=false,citecolor=blue} 50 | \begin{titlepage} 51 | \vspace*{7cm} 52 | \begin{center} 53 | {\Huge libopencm3: API Reference\\ NXP LPC43xx ARM Cortex M3 Series}\\ 54 | \vspace*{1cm} 55 | {\large Generated by Doxygen 1.8.2}\\ 56 | \vspace*{0.5cm} 57 | {\small Thu Sep 13 2012 23:26:45}\\ 58 | \end{center} 59 | \end{titlepage} 60 | \pagenumbering{arabic} 61 | \hypersetup{pageanchor=true,citecolor=blue} 62 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/cm3/common.h: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2009 Uwe Hermann 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #ifndef LIBOPENCM3_CM3_COMMON_H 21 | #define LIBOPENCM3_CM3_COMMON_H 22 | 23 | #include 24 | #include 25 | 26 | /* This must be placed around external function declaration for C++ 27 | * support. */ 28 | #ifdef __cplusplus 29 | # define BEGIN_DECLS extern "C" { 30 | # define END_DECLS } 31 | #else 32 | # define BEGIN_DECLS 33 | # define END_DECLS 34 | #endif 35 | 36 | /* Full-featured deprecation attribute with fallback for older compilers. */ 37 | 38 | #ifdef __GNUC__ 39 | # if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ > 4) 40 | # define LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x))) 41 | # else 42 | # define LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated)) 43 | # endif 44 | #else 45 | # define LIBOPENCM3_DEPRECATED(x) 46 | #endif 47 | 48 | 49 | /* Generic memory-mapped I/O accessor functions */ 50 | #define MMIO8(addr) (*(volatile uint8_t *)(addr)) 51 | #define MMIO16(addr) (*(volatile uint16_t *)(addr)) 52 | #define MMIO32(addr) (*(volatile uint32_t *)(addr)) 53 | #define MMIO64(addr) (*(volatile uint64_t *)(addr)) 54 | 55 | /* Generic bit-band I/O accessor functions */ 56 | #define BBIO_SRAM(addr, bit) \ 57 | MMIO8(((addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4) 58 | 59 | #define BBIO_PERIPH(addr, bit) \ 60 | MMIO8(((addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4) 61 | 62 | /* Generic bit definition */ 63 | #define BIT0 (1<<0) 64 | #define BIT1 (1<<1) 65 | #define BIT2 (1<<2) 66 | #define BIT3 (1<<3) 67 | #define BIT4 (1<<4) 68 | #define BIT5 (1<<5) 69 | #define BIT6 (1<<6) 70 | #define BIT7 (1<<7) 71 | #define BIT8 (1<<8) 72 | #define BIT9 (1<<9) 73 | #define BIT10 (1<<10) 74 | #define BIT11 (1<<11) 75 | #define BIT12 (1<<12) 76 | #define BIT13 (1<<13) 77 | #define BIT14 (1<<14) 78 | #define BIT15 (1<<15) 79 | #define BIT16 (1<<16) 80 | #define BIT17 (1<<17) 81 | #define BIT18 (1<<18) 82 | #define BIT19 (1<<19) 83 | #define BIT20 (1<<20) 84 | #define BIT21 (1<<21) 85 | #define BIT22 (1<<22) 86 | #define BIT23 (1<<23) 87 | #define BIT24 (1<<24) 88 | #define BIT25 (1<<25) 89 | #define BIT26 (1<<26) 90 | #define BIT27 (1<<27) 91 | #define BIT28 (1<<28) 92 | #define BIT29 (1<<29) 93 | #define BIT30 (1<<30) 94 | #define BIT31 (1<<31) 95 | 96 | #endif 97 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/cm3/cortex.h: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2013 Ben Gamari 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #ifndef LIBOPENCM3_CORTEX_H 21 | #define LIBOPENCM3_CORTEX_H 22 | 23 | static inline void cm_enable_interrupts(void) 24 | { 25 | __asm__("CPSIE I\n"); 26 | } 27 | 28 | static inline void cm_disable_interrupts(void) 29 | { 30 | __asm__("CPSID I\n"); 31 | } 32 | 33 | #endif 34 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/cm3/doc-cm3.h: -------------------------------------------------------------------------------- 1 | /** @mainpage libopencm3 Core CM3 2 | 3 | @version 1.0.0 4 | 5 | @date 14 September 2012 6 | 7 | API documentation for Cortex M3 core features. 8 | 9 | LGPL License Terms @ref lgpl_license 10 | */ 11 | 12 | /** @defgroup CM3_defines CM3 Defines 13 | 14 | @brief Defined Constants and Types for Cortex M3 core features 15 | 16 | @version 1.0.0 17 | 18 | @date 14 September 2012 19 | 20 | LGPL License Terms @ref lgpl_license 21 | */ 22 | 23 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/cm3/fpb.h: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2011 Gareth McMullin 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #ifndef LIBOPENCM3_CM3_FPB_H 21 | #define LIBOPENCM3_CM3_FPB_H 22 | 23 | /* Cortex-M3 Flash Patch and Breakpoint (FPB) unit */ 24 | 25 | /* Those defined only on ARMv7 and above */ 26 | #if !defined(__ARM_ARCH_7M__) || !defined(__ARM_ARCH_7EM__) 27 | #error "Flash Patch and Breakpoint not available in CM0" 28 | #endif 29 | 30 | /* Note: We always use "FPB" as abbreviation, docs sometimes use only "FP". */ 31 | 32 | /* --- FPB registers ------------------------------------------------------- */ 33 | 34 | /* Flash Patch Control (FPB_CTRL) */ 35 | #define FPB_CTRL MMIO32(FPB_BASE + 0) 36 | 37 | /* Flash Patch Remap (FPB_REMAP) */ 38 | #define FPB_REMAP MMIO32(FPB_BASE + 4) 39 | 40 | /* Flash Patch Comparator (FPB_COMPx) */ 41 | #define FPB_COMP (&MMIO32(FPB_BASE + 8)) 42 | 43 | /* TODO: PID, CID */ 44 | 45 | /* --- FPB_CTRL values ----------------------------------------------------- */ 46 | 47 | /* Bits [31:15]: Reserved, read as zero, writes ignored */ 48 | 49 | #define FPB_CTRL_NUM_CODE2_MASK (0x7 << 12) 50 | 51 | #define FPB_CTRL_NUM_LIT_MASK (0xf << 8) 52 | 53 | #define FPB_CTRL_NUM_CODE1_MASK (0xf << 4) 54 | 55 | /* Bits [3:2]: Reserved */ 56 | 57 | #define FPB_CTRL_KEY (1 << 1) 58 | 59 | #define FPB_CTRL_ENABLE (1 << 0) 60 | 61 | /* --- FPB_REMAP values ---------------------------------------------------- */ 62 | 63 | /* TODO */ 64 | 65 | /* --- FPB_COMPx values ---------------------------------------------------- */ 66 | 67 | #define FPB_COMP_REPLACE_REMAP (0x0 << 30) 68 | #define FPB_COMP_REPLACE_BREAK_LOWER (0x1 << 30) 69 | #define FPB_COMP_REPLACE_BREAK_UPPER (0x2 << 30) 70 | #define FPB_COMP_REPLACE_BREAK_BOTH (0x3 << 30) 71 | #define FPB_COMP_REPLACE_MASK (0x3 << 30) 72 | 73 | /* Bit 29: Reserved */ 74 | 75 | /* TODO */ 76 | 77 | /* Bit 1: Reserved */ 78 | 79 | #define FPB_COMP_ENABLE (1 << 0) 80 | 81 | #endif 82 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/cm3/itm.h: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2011 Gareth McMullin 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #ifndef LIBOPENCM3_CM3_ITM_H 21 | #define LIBOPENCM3_CM3_ITM_H 22 | 23 | /* Cortex-M3 Instrumentation Trace Macrocell (ITM) */ 24 | 25 | /* Those defined only on ARMv7 and above */ 26 | #if !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) 27 | #error "Instrumentation Trace Macrocell not available in CM0" 28 | #endif 29 | 30 | /* --- ITM registers ------------------------------------------------------- */ 31 | 32 | /* Stimulus Port x (ITM_STIM[x]) */ 33 | #define ITM_STIM (&MMIO32(ITM_BASE)) 34 | 35 | /* Trace Enable ports (ITM_TER[x]) */ 36 | #define ITM_TER (&MMIO32(ITM_BASE + 0xE00)) 37 | 38 | /* Trace Privilege (ITM_TPR) */ 39 | #define ITM_TPR MMIO32(ITM_BASE + 0xE40) 40 | 41 | /* Trace Control (ITM_TCR) */ 42 | #define ITM_TCR MMIO32(ITM_BASE + 0xE80) 43 | 44 | /* TODO: PID, CID */ 45 | 46 | /* --- ITM_STIM values ----------------------------------------------------- */ 47 | 48 | /* Bits 31:0 - Write to port FIFO for forwarding as software event packet */ 49 | /* Bits 31:1 - RAZ */ 50 | #define ITM_STIM_FIFOREADY (1 << 0) 51 | 52 | /* --- ITM_TER values ------------------------------------------------------ */ 53 | 54 | /* Bits 31:0 - Stimulus port #N is enabled with STIMENA[N] is set */ 55 | 56 | /* --- ITM_TPR values ------------------------------------------------------ */ 57 | /* 58 | * Bits 31:0 - Bit [N] of PRIVMASK controls stimulus ports 8N to 8N+7 59 | * 0: User access allowed to stimulus ports 60 | * 1: Privileged access only to stimulus ports 61 | */ 62 | 63 | /* --- ITM_TCR values ------------------------------------------------------ */ 64 | 65 | /* Bits 31:24 - Reserved */ 66 | #define ITM_TCR_BUSY (1 << 23) 67 | #define ITM_TCR_TRACE_BUS_ID_MASK (0x3f << 16) 68 | /* Bits 15:10 - Reserved */ 69 | #define ITM_TCR_TSPRESCALE_NONE (0 << 8) 70 | #define ITM_TCR_TSPRESCALE_DIV4 (1 << 8) 71 | #define ITM_TCR_TSPRESCALE_DIV16 (2 << 8) 72 | #define ITM_TCR_TSPRESCALE_DIV64 (3 << 8) 73 | #define ITM_TCR_TSPRESCALE_MASK (3 << 8) 74 | /* Bits 7:5 - Reserved */ 75 | #define ITM_TCR_SWOENA (1 << 4) 76 | #define ITM_TCR_TXENA (1 << 3) 77 | #define ITM_TCR_SYNCENA (1 << 2) 78 | #define ITM_TCR_TSENA (1 << 1) 79 | #define ITM_TCR_ITMENA (1 << 0) 80 | 81 | #endif 82 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/cm3/memorymap.h: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2009 Uwe Hermann 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #ifndef LIBOPENCM3_CM3_MEMORYMAP_H 21 | #define LIBOPENCM3_CM3_MEMORYMAP_H 22 | 23 | /* --- ARM Cortex-M0, M3 and M4 specific definitions ----------------------- */ 24 | 25 | /* Private peripheral bus - Internal */ 26 | #define PPBI_BASE 0xE0000000 27 | 28 | /* Those defined only on ARMv7 and above */ 29 | #if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) 30 | /* ITM: Instrumentation Trace Macrocell */ 31 | #define ITM_BASE (PPBI_BASE + 0x0000) 32 | 33 | /* DWT: Data Watchpoint and Trace unit */ 34 | #define DWT_BASE (PPBI_BASE + 0x1000) 35 | 36 | /* FPB: Flash Patch and Breakpoint unit */ 37 | #define FPB_BASE (PPBI_BASE + 0x2000) 38 | #endif 39 | 40 | /* PPBI_BASE + 0x3000 (0xE000 3000 - 0xE000 DFFF): Reserved */ 41 | 42 | #define SCS_BASE (PPBI_BASE + 0xE000) 43 | 44 | /* PPBI_BASE + 0xF000 (0xE000 F000 - 0xE003 FFFF): Reserved */ 45 | 46 | /* Those defined only on ARMv7 and above */ 47 | #if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) 48 | #define TPIU_BASE (PPBI_BASE + 0x40000) 49 | #endif 50 | 51 | /* --- ITM: Instrumentation Trace Macrocell --- */ 52 | /* TODO */ 53 | 54 | /* --- DWT: Data Watchpoint and Trace unit --- */ 55 | /* TODO */ 56 | 57 | /* --- FPB: Flash Patch and Breakpoint unit --- */ 58 | /* TODO */ 59 | 60 | /* --- SCS: System Control Space --- */ 61 | 62 | /* Those defined only on ARMv7 and above */ 63 | #if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) 64 | /* ITR: Interrupt Type Register */ 65 | #define ITR_BASE (SCS_BASE + 0x0000) 66 | #endif 67 | 68 | /* SYS_TICK: System Timer */ 69 | #define SYS_TICK_BASE (SCS_BASE + 0x0010) 70 | 71 | /* NVIC: Nested Vector Interrupt Controller */ 72 | #define NVIC_BASE (SCS_BASE + 0x0100) 73 | 74 | /* SCB: System Control Block */ 75 | #define SCB_BASE (SCS_BASE + 0x0D00) 76 | 77 | #ifdef CM0_PLUS 78 | /* MPU: Memory protection unit */ 79 | #define MPU_BASE (SCS_BASE + 0x0D90) 80 | #endif 81 | 82 | /* Those defined only on CM0*/ 83 | #if defined(__ARM_ARCH_6M__) 84 | /* DEBUG: Debug control and configuration */ 85 | #define DEBUG_BASE (SCS_BASE + 0x0DF0) 86 | #endif 87 | 88 | /* Those defined only on ARMv7 and above */ 89 | #if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) 90 | /* STE: Software Trigger Interrupt Register */ 91 | #define STIR_BASE (SCS_BASE + 0x0F00) 92 | /* ID: ID space */ 93 | #define ID_BASE (SCS_BASE + 0x0FD0) 94 | #endif 95 | 96 | #endif 97 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/cm3/sync.h: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2012 Fergus Noble 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #ifndef LIBOPENCM3_CM3_SYNC_H 21 | #define LIBOPENCM3_CM3_SYNC_H 22 | 23 | #include "common.h" 24 | 25 | void __dmb(void); 26 | 27 | /* Implements synchronisation primitives as discussed in the ARM document 28 | * DHT0008A (ID081709) "ARM Synchronization Primitives" and the ARM v7-M 29 | * Architecture Reference Manual. 30 | */ 31 | 32 | /* --- Exclusive load and store instructions ------------------------------- */ 33 | 34 | /* Those are defined only on CM3 or CM4 */ 35 | #if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) 36 | 37 | uint32_t __ldrex(volatile uint32_t *addr); 38 | uint32_t __strex(uint32_t val, volatile uint32_t *addr); 39 | 40 | /* --- Convenience functions ----------------------------------------------- */ 41 | 42 | /* Here we implement some simple synchronisation primitives. */ 43 | 44 | typedef uint32_t mutex_t; 45 | 46 | #define MUTEX_UNLOCKED 0 47 | #define MUTEX_LOCKED 1 48 | 49 | void mutex_lock(mutex_t *m); 50 | void mutex_unlock(mutex_t *m); 51 | 52 | #endif 53 | 54 | #endif 55 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/cm3/vector.h: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2012 chrysn 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | /** @file 21 | * 22 | * Definitions for handling vector tables. 23 | * 24 | * This implements d0002_efm32_cortex-m3_reference_manual.pdf's figure 2.2 25 | * (from the EFM32 documentation at 26 | * http://www.energymicro.com/downloads/datasheets), and was seen analogously 27 | * in other ARM implementations' libopencm3 files. 28 | * 29 | * The structure of the vector table is implemented independently of the system 30 | * vector table starting at memory position 0x0, as it can be relocated to 31 | * other memory locations too. 32 | * 33 | * The exact size of a vector interrupt table depends on the number of 34 | * interrupts IRQ_COUNT, which is defined per family. 35 | */ 36 | 37 | #ifndef LIBOPENCM3_VECTOR_H 38 | #define LIBOPENCM3_VECTOR_H 39 | 40 | #include 41 | #include 42 | 43 | /** Type of an interrupt function. Only used to avoid hard-to-read function 44 | * pointers in the efm32_vector_table_t struct. */ 45 | typedef void (*vector_table_entry_t)(void); 46 | 47 | typedef struct { 48 | unsigned int *initial_sp_value; /**< Initial stack pointer value. */ 49 | vector_table_entry_t reset; 50 | vector_table_entry_t nmi; 51 | vector_table_entry_t hard_fault; 52 | vector_table_entry_t memory_manage_fault; /* not in CM0 */ 53 | vector_table_entry_t bus_fault; /* not in CM0 */ 54 | vector_table_entry_t usage_fault; /* not in CM0 */ 55 | vector_table_entry_t reserved_x001c[4]; 56 | vector_table_entry_t sv_call; 57 | vector_table_entry_t debug_monitor; /* not in CM0 */ 58 | vector_table_entry_t reserved_x0034; 59 | vector_table_entry_t pend_sv; 60 | vector_table_entry_t systick; 61 | vector_table_entry_t irq[NVIC_IRQ_COUNT]; 62 | } vector_table_t; 63 | 64 | extern vector_table_t vector_table; 65 | 66 | #endif 67 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/dispatch/nvic.h: -------------------------------------------------------------------------------- 1 | #if defined(STM32F0) 2 | # include 3 | #elif defined(STM32F1) 4 | # include 5 | #elif defined(STM32F2) 6 | # include 7 | #elif defined(STM32F3) 8 | # include 9 | #elif defined(STM32F4) 10 | # include 11 | #elif defined(STM32L1) 12 | # include 13 | 14 | #elif defined(EFM32TG) 15 | # include 16 | #elif defined(EFM32G) 17 | # include 18 | #elif defined(EFM32LG) 19 | # include 20 | #elif defined(EFM32GG) 21 | # include 22 | 23 | #elif defined(LPC13XX) 24 | # include 25 | #elif defined(LPC17XX) 26 | # include 27 | #elif defined(LPC43XX_M4) 28 | # include 29 | #elif defined(LPC43XX_M0) 30 | # include 31 | #elif defined(LPC43XX_M0S) 32 | # include 33 | 34 | #elif defined(SAM3X) 35 | # include 36 | #elif defined(SAM3N) 37 | # include 38 | 39 | #elif defined(LM3S) || defined(LM4F) 40 | /* Yes, we use the same interrupt table for both LM3S and LM4F */ 41 | # include 42 | 43 | #else 44 | # warning"no interrupts defined for chipset; NVIC_IRQ_COUNT = 0" 45 | 46 | #define NVIC_IRQ_COUNT 0 47 | 48 | #endif 49 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/docmain.dox: -------------------------------------------------------------------------------- 1 | /** @mainpage libopencm3 Developer Documentation 2 | 3 | @version 1.0.0 4 | 5 | @date 7 September 2012 6 | 7 | * The libopencm3 project (previously known as libopenstm32) aims to create 8 | * a free/libre/open-source (GPL v3, or later) firmware library for various 9 | * ARM Cortex-M3 microcontrollers, including ST STM32, Toshiba TX03, 10 | * Atmel SAM3U, NXP LPC1000 and others. 11 | * 12 | * @par "" 13 | * 14 | * See the libopencm3 wiki for 15 | * more information. 16 | 17 | LGPL License Terms @ref lgpl_license 18 | */ 19 | 20 | 21 | 22 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/license.dox: -------------------------------------------------------------------------------- 1 | /** @page lgpl_license libopencm3 License 2 | 3 | libopencm3 is free software: you can redistribute it and/or modify 4 | it under the terms of the GNU Lesser General Public License as published by the Free 5 | Software Foundation, either version 3 of the License, or (at your option) any 6 | later version. 7 | 8 | libopencm3 is distributed in the hope that it will be useful, but WITHOUT ANY 9 | WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A 10 | PARTICULAR PURPOSE. See the GNU Lesser General Public License for more details. 11 | 12 | You should have received a copy of the GNU Lesser General Public License along with this 13 | program. If not, see . 14 | 15 | */ 16 | 17 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/lpc43xx/atimer.h: -------------------------------------------------------------------------------- 1 | /** @defgroup atimer_defines Alarm Timer Defines 2 | 3 | @brief Defined Constants and Types for the LPC43xx Alarm Timer 4 | 5 | @ingroup LPC43xx_defines 6 | 7 | @version 1.0.0 8 | 9 | @author @htmlonly © @endhtmlonly 2012 Michael Ossmann 10 | 11 | @date 10 March 2013 12 | 13 | LGPL License Terms @ref lgpl_license 14 | */ 15 | /* 16 | * This file is part of the libopencm3 project. 17 | * 18 | * Copyright (C) 2012 Michael Ossmann 19 | * 20 | * This library is free software: you can redistribute it and/or modify 21 | * it under the terms of the GNU Lesser General Public License as published by 22 | * the Free Software Foundation, either version 3 of the License, or 23 | * (at your option) any later version. 24 | * 25 | * This library is distributed in the hope that it will be useful, 26 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 27 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 28 | * GNU Lesser General Public License for more details. 29 | * 30 | * You should have received a copy of the GNU Lesser General Public License 31 | * along with this library. If not, see . 32 | */ 33 | 34 | #ifndef LPC43XX_ATIMER_H 35 | #define LPC43XX_ATIMER_H 36 | 37 | /**@{*/ 38 | 39 | #include 40 | #include 41 | 42 | /* --- Alarm Timer registers ----------------------------------------------- */ 43 | 44 | /* Downcounter register */ 45 | #define ATIMER_DOWNCOUNTER MMIO32(ATIMER_BASE + 0x000) 46 | 47 | /* Preset value register */ 48 | #define ATIMER_PRESET MMIO32(ATIMER_BASE + 0x004) 49 | 50 | /* Interrupt clear enable register */ 51 | #define ATIMER_CLR_EN MMIO32(ATIMER_BASE + 0xFD8) 52 | 53 | /* Interrupt set enable register */ 54 | #define ATIMER_SET_EN MMIO32(ATIMER_BASE + 0xFDC) 55 | 56 | /* Status register */ 57 | #define ATIMER_STATUS MMIO32(ATIMER_BASE + 0xFE0) 58 | 59 | /* Enable register */ 60 | #define ATIMER_ENABLE MMIO32(ATIMER_BASE + 0xFE4) 61 | 62 | /* Clear register */ 63 | #define ATIMER_CLR_STAT MMIO32(ATIMER_BASE + 0xFE8) 64 | 65 | /* Set register */ 66 | #define ATIMER_SET_STAT MMIO32(ATIMER_BASE + 0xFEC) 67 | 68 | /**@}*/ 69 | 70 | #endif 71 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/lpc43xx/doc-lpc43xx.h: -------------------------------------------------------------------------------- 1 | /** @mainpage libopencm3 LPC43xx 2 | 3 | @version 1.0.0 4 | 5 | @date 14 September 2012 6 | 7 | API documentation for NXP Semiconductors LPC43xx Cortex M3 series. 8 | 9 | LGPL License Terms @ref lgpl_license 10 | */ 11 | 12 | /** @defgroup LPC43xx LPC43xx 13 | Libraries for NXP Semiconductors LPC43xx series. 14 | 15 | @version 1.0.0 16 | 17 | @date 14 September 2012 18 | 19 | LGPL License Terms @ref lgpl_license 20 | */ 21 | 22 | /** @defgroup LPC43xx_defines LPC43xx Defines 23 | 24 | @brief Defined Constants and Types for the LPC43xx series 25 | 26 | @version 1.0.0 27 | 28 | @date 14 September 2012 29 | 30 | LGPL License Terms @ref lgpl_license 31 | */ 32 | 33 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/lpc43xx/eventrouter.h: -------------------------------------------------------------------------------- 1 | /** @defgroup eventrouter_defines Event Router Defines 2 | 3 | @brief Defined Constants and Types for the LPC43xx Event Router 4 | 5 | @ingroup LPC43xx_defines 6 | 7 | @version 1.0.0 8 | 9 | @author @htmlonly © @endhtmlonly 2012 Michael Ossmann 10 | 11 | @date 10 March 2013 12 | 13 | LGPL License Terms @ref lgpl_license 14 | */ 15 | /* 16 | * This file is part of the libopencm3 project. 17 | * 18 | * Copyright (C) 2012 Michael Ossmann 19 | * 20 | * This library is free software: you can redistribute it and/or modify 21 | * it under the terms of the GNU Lesser General Public License as published by 22 | * the Free Software Foundation, either version 3 of the License, or 23 | * (at your option) any later version. 24 | * 25 | * This library is distributed in the hope that it will be useful, 26 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 27 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 28 | * GNU Lesser General Public License for more details. 29 | * 30 | * You should have received a copy of the GNU Lesser General Public License 31 | * along with this library. If not, see . 32 | */ 33 | 34 | #ifndef LPC43XX_EVENTROUTER_H 35 | #define LPC43XX_EVENTROUTER_H 36 | 37 | /**@{*/ 38 | 39 | #include 40 | #include 41 | 42 | /* --- Event Router registers ---------------------------------------------- */ 43 | 44 | /* Level configuration register */ 45 | #define EVENTROUTER_HILO MMIO32(EVENTROUTER_BASE + 0x000) 46 | 47 | /* Edge configuration */ 48 | #define EVENTROUTER_EDGE MMIO32(EVENTROUTER_BASE + 0x004) 49 | 50 | /* Clear event enable register */ 51 | #define EVENTROUTER_CLR_EN MMIO32(EVENTROUTER_BASE + 0xFD8) 52 | 53 | /* Set event enable register */ 54 | #define EVENTROUTER_SET_EN MMIO32(EVENTROUTER_BASE + 0xFDC) 55 | 56 | /* Event Status register */ 57 | #define EVENTROUTER_STATUS MMIO32(EVENTROUTER_BASE + 0xFE0) 58 | 59 | /* Event Enable register */ 60 | #define EVENTROUTER_ENABLE MMIO32(EVENTROUTER_BASE + 0xFE4) 61 | 62 | /* Clear event status register */ 63 | #define EVENTROUTER_CLR_STAT MMIO32(EVENTROUTER_BASE + 0xFE8) 64 | 65 | /* Set event status register */ 66 | #define EVENTROUTER_SET_STAT MMIO32(EVENTROUTER_BASE + 0xFEC) 67 | 68 | /**@}*/ 69 | 70 | #endif 71 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/lpc43xx/ipc.h: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2012/2014 Benjamin Vernoux 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #ifndef LPC43XX_IPC_H 21 | #define LPC43XX_IPC_H 22 | 23 | #include 24 | #include 25 | 26 | /* M0 */ 27 | void ipc_halt_m0(void); 28 | void ipc_start_m0(uint32_t cm0_baseaddr); 29 | void ipc_m0apptxevent_clear(void); 30 | 31 | /* M0s (only for LPC4370) */ 32 | void ipc_halt_m0s(void); 33 | void ipc_start_m0s(uint32_t cm0s_baseaddr); 34 | void ipc_m0subtxevent_clear(void); 35 | 36 | #endif 37 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/lpc43xx/m0/nvic.h: -------------------------------------------------------------------------------- 1 | /* This file is part of the libopencm3 project. 2 | * 3 | * It was generated by the irq2nvic_h script. 4 | */ 5 | 6 | #ifndef LIBOPENCM3_LPC43xx_M0_NVIC_H 7 | #define LIBOPENCM3_LPC43xx_M0_NVIC_H 8 | 9 | #include 10 | 11 | /** @defgroup CM3_nvic_defines_LPC43xx (M0) User interrupts for LPC 43xx series M0APP core (rev_1_7_UM10503) 12 | @ingroup CM3_nvic_defines 13 | 14 | @{*/ 15 | 16 | #define NVIC_RTC_IRQ 0 17 | #define NVIC_M4CORE_IRQ 1 18 | #define NVIC_DMA_IRQ 2 19 | #define NVIC_FLASHEEPROMAT_IRQ 4 20 | #define NVIC_ETHERNET_IRQ 5 21 | #define NVIC_SDIO_IRQ 6 22 | #define NVIC_LCD_IRQ 7 23 | #define NVIC_USB0_IRQ 8 24 | #define NVIC_USB1_IRQ 9 25 | #define NVIC_SCT_IRQ 10 26 | #define NVIC_RITIMER_OR_WWDT_IRQ 11 27 | #define NVIC_TIMER0_IRQ 12 28 | #define NVIC_GINT1_IRQ 13 29 | #define NVIC_PIN_INT4_IRQ 14 30 | #define NVIC_TIMER3_IRQ 15 31 | #define NVIC_MCPWM_IRQ 16 32 | #define NVIC_ADC0_IRQ 17 33 | #define NVIC_I2C0_OR_IRC1_IRQ 18 34 | #define NVIC_SGPIO_IRQ 19 35 | #define NVIC_SPI_OR_DAC_IRQ 20 36 | #define NVIC_ADC1_IRQ 21 37 | #define NVIC_SSP0_OR_SSP1_IRQ 22 38 | #define NVIC_EVENTROUTER_IRQ 23 39 | #define NVIC_USART0_IRQ 24 40 | #define NVIC_UART1_IRQ 25 41 | #define NVIC_USART2_OR_C_CAN1_IRQ 26 42 | #define NVIC_USART3_IRQ 27 43 | #define NVIC_I2S0_OR_I2S1_IRQ 28 44 | #define NVIC_C_CAN0_IRQ 29 45 | #define NVIC_SPIFI_OR_ADCHS_IRQ 30 46 | #define NVIC_M0SUB_IRQ 31 47 | 48 | #define NVIC_IRQ_COUNT 32 49 | 50 | /**@}*/ 51 | 52 | /** @defgroup CM3_nvic_isrprototypes_LPC43xx (M0) User interrupt service routines (ISR) prototypes for LPC 43xx series M0APP core (rev_1_7_UM10503) 53 | @ingroup CM3_nvic_isrprototypes 54 | 55 | @{*/ 56 | 57 | BEGIN_DECLS 58 | 59 | void WEAK rtc_isr(void); 60 | void WEAK m4core_isr(void); 61 | void WEAK dma_isr(void); 62 | void WEAK flasheepromat_isr(void); 63 | void WEAK ethernet_isr(void); 64 | void WEAK sdio_isr(void); 65 | void WEAK lcd_isr(void); 66 | void WEAK usb0_isr(void); 67 | void WEAK usb1_isr(void); 68 | void WEAK sct_isr(void); 69 | void WEAK ritimer_or_wwdt_isr(void); 70 | void WEAK timer0_isr(void); 71 | void WEAK gint1_isr(void); 72 | void WEAK pin_int4_isr(void); 73 | void WEAK timer3_isr(void); 74 | void WEAK mcpwm_isr(void); 75 | void WEAK adc0_isr(void); 76 | void WEAK i2c0_or_irc1_isr(void); 77 | void WEAK sgpio_isr(void); 78 | void WEAK spi_or_dac_isr(void); 79 | void WEAK adc1_isr(void); 80 | void WEAK ssp0_or_ssp1_isr(void); 81 | void WEAK eventrouter_isr(void); 82 | void WEAK usart0_isr(void); 83 | void WEAK uart1_isr(void); 84 | void WEAK usart2_or_c_can1_isr(void); 85 | void WEAK usart3_isr(void); 86 | void WEAK i2s0_or_i2s1_isr(void); 87 | void WEAK c_can0_isr(void); 88 | void WEAK spifi_or_adchs_isr(void); 89 | void WEAK m0sub_isr(void); 90 | 91 | END_DECLS 92 | 93 | /**@}*/ 94 | 95 | #endif /* LIBOPENCM3_LPC43xx_M0_NVIC_H */ 96 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/lpc43xx/m0s/nvic.h: -------------------------------------------------------------------------------- 1 | /* This file is part of the libopencm3 project. 2 | * 3 | * It was generated by the irq2nvic_h script. 4 | */ 5 | 6 | #ifndef LIBOPENCM3_LPC43xx_M0S_NVIC_H 7 | #define LIBOPENCM3_LPC43xx_M0S_NVIC_H 8 | 9 | #include 10 | 11 | /** @defgroup CM3_nvic_defines_LPC43xx (M0SUB) User interrupts for LPC 43xx series M0SUB core (rev_1_7_UM10503) 12 | @ingroup CM3_nvic_defines 13 | 14 | @{*/ 15 | 16 | #define NVIC_DAC_IRQ 0 17 | #define NVIC_M4CORE_IRQ 1 18 | #define NVIC_DMA_IRQ 2 19 | #define NVIC_SGPIO_INPUT_IRQ 4 20 | #define NVIC_SGPIO_MATCH_IRQ 5 21 | #define NVIC_SGPIO_SHIFT_IRQ 6 22 | #define NVIC_SGPIO_POS_IRQ 7 23 | #define NVIC_USB0_IRQ 8 24 | #define NVIC_USB1_IRQ 9 25 | #define NVIC_SCT_IRQ 10 26 | #define NVIC_RITIMER_IRQ 11 27 | #define NVIC_GINT1_IRQ 12 28 | #define NVIC_TIMER1_IRQ 13 29 | #define NVIC_TIMER2_IRQ 14 30 | #define NVIC_PIN_INT5_IRQ 15 31 | #define NVIC_MCPWM_IRQ 16 32 | #define NVIC_ADC0_IRQ 17 33 | #define NVIC_I2C0_IRQ 18 34 | #define NVIC_I2C1_IRQ 19 35 | #define NVIC_SPI_IRQ 20 36 | #define NVIC_ADC1_IRQ 21 37 | #define NVIC_SSP0_OR_SSP1_IRQ 22 38 | #define NVIC_EVENTROUTER_IRQ 23 39 | #define NVIC_USART0_IRQ 24 40 | #define NVIC_UART1_IRQ 25 41 | #define NVIC_USART2_OR_C_CAN1_IRQ 26 42 | #define NVIC_USART3_IRQ 27 43 | #define NVIC_I2S0_OR_I2S1_OR_QEI_IRQ 28 44 | #define NVIC_C_CAN0_IRQ 29 45 | #define NVIC_SPIFI_OR_ADCHS_IRQ 30 46 | #define NVIC_M0APP_IRQ 31 47 | 48 | #define NVIC_IRQ_COUNT 32 49 | 50 | /**@}*/ 51 | 52 | /** @defgroup CM3_nvic_isrprototypes_LPC43xx (M0SUB) User interrupt service routines (ISR) prototypes for LPC 43xx series M0SUB core (rev_1_7_UM10503) 53 | @ingroup CM3_nvic_isrprototypes 54 | 55 | @{*/ 56 | 57 | BEGIN_DECLS 58 | 59 | void WEAK dac_isr(void); 60 | void WEAK m4core_isr(void); 61 | void WEAK dma_isr(void); 62 | void WEAK sgpio_input_isr(void); 63 | void WEAK sgpio_match_isr(void); 64 | void WEAK sgpio_shift_isr(void); 65 | void WEAK sgpio_pos_isr(void); 66 | void WEAK usb0_isr(void); 67 | void WEAK usb1_isr(void); 68 | void WEAK sct_isr(void); 69 | void WEAK ritimer_isr(void); 70 | void WEAK gint1_isr(void); 71 | void WEAK timer1_isr(void); 72 | void WEAK timer2_isr(void); 73 | void WEAK pin_int5_isr(void); 74 | void WEAK mcpwm_isr(void); 75 | void WEAK adc0_isr(void); 76 | void WEAK i2c0_isr(void); 77 | void WEAK i2c1_isr(void); 78 | void WEAK spi_isr(void); 79 | void WEAK adc1_isr(void); 80 | void WEAK ssp0_or_ssp1_isr(void); 81 | void WEAK eventrouter_isr(void); 82 | void WEAK usart0_isr(void); 83 | void WEAK uart1_isr(void); 84 | void WEAK usart2_or_c_can1_isr(void); 85 | void WEAK usart3_isr(void); 86 | void WEAK i2s0_or_i2s1_or_qei_isr(void); 87 | void WEAK c_can0_isr(void); 88 | void WEAK spifi_or_adchs_isr(void); 89 | void WEAK m0app_isr(void); 90 | 91 | END_DECLS 92 | 93 | /**@}*/ 94 | 95 | #endif /* LIBOPENCM3_LPC43xx_M0S_NVIC_H */ 96 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/lpc43xx/m4/nvic.h: -------------------------------------------------------------------------------- 1 | /* This file is part of the libopencm3 project. 2 | * 3 | * It was generated by the irq2nvic_h script. 4 | */ 5 | 6 | #ifndef LIBOPENCM3_LPC43xx_M4_NVIC_H 7 | #define LIBOPENCM3_LPC43xx_M4_NVIC_H 8 | 9 | #include 10 | 11 | /** @defgroup CM3_nvic_defines_LPC43xx (M4) User interrupts for LPC 43xx series M4 core (rev_1_7_UM10503) 12 | @ingroup CM3_nvic_defines 13 | 14 | @{*/ 15 | 16 | #define NVIC_DAC_IRQ 0 17 | #define NVIC_M0CORE_IRQ 1 18 | #define NVIC_DMA_IRQ 2 19 | #define NVIC_FLASHEEPROM_IRQ 4 20 | #define NVIC_ETHERNET_IRQ 5 21 | #define NVIC_SDIO_IRQ 6 22 | #define NVIC_LCD_IRQ 7 23 | #define NVIC_USB0_IRQ 8 24 | #define NVIC_USB1_IRQ 9 25 | #define NVIC_SCT_IRQ 10 26 | #define NVIC_RITIMER_IRQ 11 27 | #define NVIC_TIMER0_IRQ 12 28 | #define NVIC_TIMER1_IRQ 13 29 | #define NVIC_TIMER2_IRQ 14 30 | #define NVIC_TIMER3_IRQ 15 31 | #define NVIC_MCPWM_IRQ 16 32 | #define NVIC_ADC0_IRQ 17 33 | #define NVIC_I2C0_IRQ 18 34 | #define NVIC_I2C1_IRQ 19 35 | #define NVIC_SPI_IRQ 20 36 | #define NVIC_ADC1_IRQ 21 37 | #define NVIC_SSP0_IRQ 22 38 | #define NVIC_SSP1_IRQ 23 39 | #define NVIC_USART0_IRQ 24 40 | #define NVIC_UART1_IRQ 25 41 | #define NVIC_USART2_IRQ 26 42 | #define NVIC_USART3_IRQ 27 43 | #define NVIC_I2S0_IRQ 28 44 | #define NVIC_I2S1_IRQ 29 45 | #define NVIC_SPIFI_IRQ 30 46 | #define NVIC_SGPIO_IRQ 31 47 | #define NVIC_PIN_INT0_IRQ 32 48 | #define NVIC_PIN_INT1_IRQ 33 49 | #define NVIC_PIN_INT2_IRQ 34 50 | #define NVIC_PIN_INT3_IRQ 35 51 | #define NVIC_PIN_INT4_IRQ 36 52 | #define NVIC_PIN_INT5_IRQ 37 53 | #define NVIC_PIN_INT6_IRQ 38 54 | #define NVIC_PIN_INT7_IRQ 39 55 | #define NVIC_GINT0_IRQ 40 56 | #define NVIC_GINT1_IRQ 41 57 | #define NVIC_EVENTROUTER_IRQ 42 58 | #define NVIC_C_CAN1_IRQ 43 59 | #define NVIC_ADCHS_IRQ 45 60 | #define NVIC_ATIMER_IRQ 46 61 | #define NVIC_RTC_IRQ 47 62 | #define NVIC_WWDT_IRQ 49 63 | #define NVIC_M0SUB_IRQ 50 64 | #define NVIC_C_CAN0_IRQ 51 65 | #define NVIC_QEI_IRQ 52 66 | 67 | #define NVIC_IRQ_COUNT 53 68 | 69 | /**@}*/ 70 | 71 | /** @defgroup CM3_nvic_isrprototypes_LPC43xx (M4) User interrupt service routines (ISR) prototypes for LPC 43xx series M4 core (rev_1_7_UM10503) 72 | @ingroup CM3_nvic_isrprototypes 73 | 74 | @{*/ 75 | 76 | BEGIN_DECLS 77 | 78 | void WEAK dac_isr(void); 79 | void WEAK m0core_isr(void); 80 | void WEAK dma_isr(void); 81 | void WEAK flasheeprom_isr(void); 82 | void WEAK ethernet_isr(void); 83 | void WEAK sdio_isr(void); 84 | void WEAK lcd_isr(void); 85 | void WEAK usb0_isr(void); 86 | void WEAK usb1_isr(void); 87 | void WEAK sct_isr(void); 88 | void WEAK ritimer_isr(void); 89 | void WEAK timer0_isr(void); 90 | void WEAK timer1_isr(void); 91 | void WEAK timer2_isr(void); 92 | void WEAK timer3_isr(void); 93 | void WEAK mcpwm_isr(void); 94 | void WEAK adc0_isr(void); 95 | void WEAK i2c0_isr(void); 96 | void WEAK i2c1_isr(void); 97 | void WEAK spi_isr(void); 98 | void WEAK adc1_isr(void); 99 | void WEAK ssp0_isr(void); 100 | void WEAK ssp1_isr(void); 101 | void WEAK usart0_isr(void); 102 | void WEAK uart1_isr(void); 103 | void WEAK usart2_isr(void); 104 | void WEAK usart3_isr(void); 105 | void WEAK i2s0_isr(void); 106 | void WEAK i2s1_isr(void); 107 | void WEAK spifi_isr(void); 108 | void WEAK sgpio_isr(void); 109 | void WEAK pin_int0_isr(void); 110 | void WEAK pin_int1_isr(void); 111 | void WEAK pin_int2_isr(void); 112 | void WEAK pin_int3_isr(void); 113 | void WEAK pin_int4_isr(void); 114 | void WEAK pin_int5_isr(void); 115 | void WEAK pin_int6_isr(void); 116 | void WEAK pin_int7_isr(void); 117 | void WEAK gint0_isr(void); 118 | void WEAK gint1_isr(void); 119 | void WEAK eventrouter_isr(void); 120 | void WEAK c_can1_isr(void); 121 | void WEAK adchs_isr(void); 122 | void WEAK atimer_isr(void); 123 | void WEAK rtc_isr(void); 124 | void WEAK wwdt_isr(void); 125 | void WEAK m0sub_isr(void); 126 | void WEAK c_can0_isr(void); 127 | void WEAK qei_isr(void); 128 | 129 | END_DECLS 130 | 131 | /**@}*/ 132 | 133 | #endif /* LIBOPENCM3_LPC43xx_M4_NVIC_H */ 134 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/lpc43xx/ritimer.h: -------------------------------------------------------------------------------- 1 | /** @defgroup ritimer_defines Repetitive Interrupt Timer Defines 2 | 3 | @brief Defined Constants and Types for the LPC43xx Repetitive Interrupt 4 | Timer 5 | 6 | @ingroup LPC43xx_defines 7 | 8 | @version 1.0.0 9 | 10 | @author @htmlonly © @endhtmlonly 2012 Michael Ossmann 11 | 12 | @date 10 March 2013 13 | 14 | LGPL License Terms @ref lgpl_license 15 | */ 16 | /* 17 | * This file is part of the libopencm3 project. 18 | * 19 | * Copyright (C) 2012 Michael Ossmann 20 | * 21 | * This library is free software: you can redistribute it and/or modify 22 | * it under the terms of the GNU Lesser General Public License as published by 23 | * the Free Software Foundation, either version 3 of the License, or 24 | * (at your option) any later version. 25 | * 26 | * This library is distributed in the hope that it will be useful, 27 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 28 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 29 | * GNU Lesser General Public License for more details. 30 | * 31 | * You should have received a copy of the GNU Lesser General Public License 32 | * along with this library. If not, see . 33 | */ 34 | 35 | #ifndef LPC43XX_RITIMER_H 36 | #define LPC43XX_RITIMER_H 37 | 38 | /**@{*/ 39 | 40 | #include 41 | #include 42 | 43 | /* --- Repetitive Interrupt Timer registers -------------------------------- */ 44 | 45 | /* Compare register */ 46 | #define RITIMER_COMPVAL MMIO32(RITIMER_BASE + 0x000) 47 | 48 | /* Mask register */ 49 | #define RITIMER_MASK MMIO32(RITIMER_BASE + 0x004) 50 | 51 | /* Control register */ 52 | #define RITIMER_CTRL MMIO32(RITIMER_BASE + 0x008) 53 | 54 | /* 32-bit counter */ 55 | #define RITIMER_COUNTER MMIO32(RITIMER_BASE + 0x00C) 56 | 57 | /**@}*/ 58 | 59 | #endif 60 | -------------------------------------------------------------------------------- /libopencm3/include/libopencm3/lpc43xx/wwdt.h: -------------------------------------------------------------------------------- 1 | /** @defgroup wwdt_defines Windowed Watchdog Timer 2 | 3 | @brief Defined Constants and Types for the LPC43xx Windowed Watchdog 4 | Timer 5 | 6 | @ingroup LPC43xx_defines 7 | 8 | @version 1.0.0 9 | 10 | @author @htmlonly © @endhtmlonly 2012 Michael Ossmann 11 | 12 | @date 10 March 2013 13 | 14 | LGPL License Terms @ref lgpl_license 15 | */ 16 | /* 17 | * This file is part of the libopencm3 project. 18 | * 19 | * Copyright (C) 2012 Michael Ossmann 20 | * 21 | * This library is free software: you can redistribute it and/or modify 22 | * it under the terms of the GNU Lesser General Public License as published by 23 | * the Free Software Foundation, either version 3 of the License, or 24 | * (at your option) any later version. 25 | * 26 | * This library is distributed in the hope that it will be useful, 27 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 28 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 29 | * GNU Lesser General Public License for more details. 30 | * 31 | * You should have received a copy of the GNU Lesser General Public License 32 | * along with this library. If not, see . 33 | */ 34 | 35 | #ifndef LPC43XX_WWDT_H 36 | #define LPC43XX_WWDT_H 37 | 38 | /**@{*/ 39 | 40 | #include 41 | #include 42 | 43 | /* --- Windowed Watchdog Timer (WWDT) registers ---------------------------- */ 44 | 45 | /* Watchdog mode register */ 46 | #define WWDT_MOD MMIO32(WWDT_BASE + 0x000) 47 | 48 | /* Watchdog timer constant register */ 49 | #define WWDT_TC MMIO32(WWDT_BASE + 0x004) 50 | 51 | /* Watchdog feed sequence register */ 52 | #define WWDT_FEED MMIO32(WWDT_BASE + 0x008) 53 | 54 | /* Watchdog timer value register */ 55 | #define WWDT_TV MMIO32(WWDT_BASE + 0x00C) 56 | 57 | /* Watchdog warning interrupt register */ 58 | #define WWDT_WARNINT MMIO32(WWDT_BASE + 0x014) 59 | 60 | /* Watchdog timer window register */ 61 | #define WWDT_WINDOW MMIO32(WWDT_BASE + 0x018) 62 | 63 | /**@}*/ 64 | 65 | #endif 66 | -------------------------------------------------------------------------------- /libopencm3/include/libopencmsis/dispatch/irqhandlers.h: -------------------------------------------------------------------------------- 1 | #if defined(STM32F1) 2 | # include 3 | #elif defined(STM32F2) 4 | # include 5 | #elif defined(STM32F4) 6 | # include 7 | 8 | #elif defined(EFM32TG) 9 | # include 10 | #elif defined(EFM32G) 11 | # include 12 | #elif defined(EFM32LG) 13 | # include 14 | #elif defined(EFM32GG) 15 | # include 16 | 17 | #elif defined(LPC43XX) 18 | # include 19 | 20 | #else 21 | # warning"no chipset defined; user interrupts are not redirected" 22 | 23 | #endif 24 | -------------------------------------------------------------------------------- /libopencm3/lib/Makefile.include: -------------------------------------------------------------------------------- 1 | ## 2 | ## This file is part of the libopencm3 project. 3 | ## 4 | ## Copyright (C) 2009 Uwe Hermann 5 | ## Copyright (C) 2012 Piotr Esden-Tempski 6 | ## 7 | ## This library is free software: you can redistribute it and/or modify 8 | ## it under the terms of the GNU Lesser General Public License as published by 9 | ## the Free Software Foundation, either version 3 of the License, or 10 | ## (at your option) any later version. 11 | ## 12 | ## This library is distributed in the hope that it will be useful, 13 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | ## GNU Lesser General Public License for more details. 16 | ## 17 | ## You should have received a copy of the GNU Lesser General Public License 18 | ## along with this library. If not, see . 19 | ## 20 | 21 | # Be silent per default, but 'make V=1' will show all compiler calls. 22 | ifneq ($(V),1) 23 | Q := @ 24 | endif 25 | 26 | # common objects 27 | OBJS += vector.o systick.o scb.o nvic.o assert.o sync.o 28 | 29 | all: $(SRCLIBDIR)/$(LIBNAME).a 30 | 31 | $(SRCLIBDIR)/$(LIBNAME).a: $(SRCLIBDIR)/$(LIBNAME).ld $(OBJS) 32 | @printf " AR $(@F)\n" 33 | $(Q)$(AR) $(ARFLAGS) $@ $(OBJS) 34 | 35 | $(SRCLIBDIR)/$(LIBNAME).ld: $(LIBNAME).ld 36 | @printf " CP $(@F)\n" 37 | $(Q)cp $^ $@ 38 | $(Q)if [ -f $(LIBNAME)_rom_to_ram.ld ]; then cp $(LIBNAME)_rom_to_ram.ld $(SRCLIBDIR); fi 39 | 40 | %.o: %.c 41 | @printf " CC $( 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #include 21 | 22 | void __attribute__((weak)) cm3_assert_failed(void) 23 | { 24 | while (1); 25 | } 26 | 27 | void __attribute__((weak)) cm3_assert_failed_verbose( 28 | const char *file __attribute__((unused)), 29 | int line __attribute__((unused)), 30 | const char *func __attribute__((unused)), 31 | const char *assert_expr __attribute__((unused))) 32 | { 33 | cm3_assert_failed(); 34 | } 35 | -------------------------------------------------------------------------------- /libopencm3/lib/cm3/scb.c: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2010 Gareth McMullin 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #include 21 | 22 | #include 23 | 24 | /* Those are defined only on CM3 or CM4 */ 25 | #if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) 26 | void scb_reset_core(void) 27 | { 28 | SCB_AIRCR = SCB_AIRCR_VECTKEY | SCB_AIRCR_VECTRESET; 29 | 30 | while (1); 31 | } 32 | #endif 33 | 34 | void scb_reset_system(void) 35 | { 36 | SCB_AIRCR = SCB_AIRCR_VECTKEY | SCB_AIRCR_SYSRESETREQ; 37 | 38 | while (1); 39 | } 40 | 41 | /* Those are defined only on CM3 or CM4 */ 42 | #if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) 43 | void scb_set_priority_grouping(uint32_t prigroup) 44 | { 45 | SCB_AIRCR = SCB_AIRCR_VECTKEY | prigroup; 46 | } 47 | #endif 48 | -------------------------------------------------------------------------------- /libopencm3/lib/cm3/sync.c: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2012 Fergus Noble 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #include 21 | 22 | /* DMB is supported on CM0 */ 23 | void __dmb() 24 | { 25 | __asm__ volatile ("dmb"); 26 | } 27 | 28 | /* Those are defined only on CM3 or CM4 */ 29 | #if defined(__ARM_ARCH_6M__) 30 | #warning "sync not supported on ARMv6-M arch" 31 | #else 32 | 33 | uint32_t __ldrex(volatile uint32_t *addr) 34 | { 35 | uint32_t res; 36 | __asm__ volatile ("ldrex %0, [%1]" : "=r" (res) : "r" (addr)); 37 | return res; 38 | } 39 | 40 | uint32_t __strex(uint32_t val, volatile uint32_t *addr) 41 | { 42 | uint32_t res; 43 | __asm__ volatile ("strex %0, %2, [%1]" 44 | : "=&r" (res) : "r" (addr), "r" (val)); 45 | return res; 46 | } 47 | 48 | void mutex_lock(mutex_t *m) 49 | { 50 | uint32_t status = 0; 51 | 52 | do { 53 | /* Wait until the mutex is unlocked. */ 54 | while (__ldrex(m) != MUTEX_UNLOCKED); 55 | 56 | /* Try to acquire it. */ 57 | status = __strex(MUTEX_LOCKED, m); 58 | 59 | /* Did we get it? If not then try again. */ 60 | } while (status != 0); 61 | 62 | /* Execute the mysterious Data Memory Barrier instruction! */ 63 | __dmb(); 64 | } 65 | 66 | void mutex_unlock(mutex_t *m) 67 | { 68 | /* Ensure accesses to protected resource are finished */ 69 | __dmb(); 70 | 71 | /* Free the lock. */ 72 | *m = MUTEX_UNLOCKED; 73 | } 74 | 75 | #endif 76 | -------------------------------------------------------------------------------- /libopencm3/lib/cm3/vector.c: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2010 Piotr Esden-Tempski , 5 | * Copyright (C) 2012 chrysn 6 | * 7 | * This library is free software: you can redistribute it and/or modify 8 | * it under the terms of the GNU Lesser General Public License as published by 9 | * the Free Software Foundation, either version 3 of the License, or 10 | * (at your option) any later version. 11 | * 12 | * This library is distributed in the hope that it will be useful, 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | * GNU Lesser General Public License for more details. 16 | * 17 | * You should have received a copy of the GNU Lesser General Public License 18 | * along with this library. If not, see . 19 | */ 20 | 21 | #include 22 | 23 | /* load optional platform dependent initialization routines */ 24 | #include "../dispatch/vector_chipset.c" 25 | /* load the weak symbols for IRQ_HANDLERS */ 26 | #include "../dispatch/vector_nvic.c" 27 | 28 | /* Symbols exported by the linker script(s): */ 29 | extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack; 30 | typedef void (*funcp_t) (void); 31 | extern funcp_t __preinit_array_start, __preinit_array_end; 32 | extern funcp_t __init_array_start, __init_array_end; 33 | extern funcp_t __fini_array_start, __fini_array_end; 34 | 35 | void main(void); 36 | void blocking_handler(void); 37 | void null_handler(void); 38 | 39 | __attribute__ ((section(".vectors"))) 40 | vector_table_t vector_table = { 41 | .initial_sp_value = &_stack, 42 | .reset = reset_handler, 43 | .nmi = nmi_handler, 44 | .hard_fault = hard_fault_handler, 45 | 46 | /* Those are defined only on CM3 or CM4 */ 47 | #if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) 48 | .memory_manage_fault = mem_manage_handler, 49 | .bus_fault = bus_fault_handler, 50 | .usage_fault = usage_fault_handler, 51 | .debug_monitor = debug_monitor_handler, 52 | #endif 53 | 54 | .sv_call = sv_call_handler, 55 | .pend_sv = pend_sv_handler, 56 | .systick = sys_tick_handler, 57 | .irq = { 58 | IRQ_HANDLERS 59 | } 60 | }; 61 | 62 | void WEAK __attribute__ ((naked)) reset_handler(void) 63 | { 64 | volatile unsigned *src, *dest; 65 | funcp_t *fp; 66 | 67 | for (src = &_data_loadaddr, dest = &_data; 68 | dest < &_edata; 69 | src++, dest++) { 70 | *dest = *src; 71 | } 72 | 73 | while (dest < &_ebss) { 74 | *dest++ = 0; 75 | } 76 | 77 | /* Constructors. */ 78 | for (fp = &__preinit_array_start; fp < &__preinit_array_end; fp++) { 79 | (*fp)(); 80 | } 81 | for (fp = &__init_array_start; fp < &__init_array_end; fp++) { 82 | (*fp)(); 83 | } 84 | 85 | /* might be provided by platform specific vector.c */ 86 | pre_main(); 87 | 88 | /* Call the application's entry point. */ 89 | main(); 90 | 91 | /* Destructors. */ 92 | for (fp = &__fini_array_start; fp < &__fini_array_end; fp++) { 93 | (*fp)(); 94 | } 95 | 96 | } 97 | 98 | void blocking_handler(void) 99 | { 100 | while (1); 101 | } 102 | 103 | void null_handler(void) 104 | { 105 | /* Do nothing. */ 106 | } 107 | 108 | #pragma weak nmi_handler = null_handler 109 | #pragma weak hard_fault_handler = blocking_handler 110 | #pragma weak sv_call_handler = null_handler 111 | #pragma weak pend_sv_handler = null_handler 112 | #pragma weak sys_tick_handler = null_handler 113 | 114 | /* Those are defined only on CM3 or CM4 */ 115 | #if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) 116 | #pragma weak mem_manage_handler = blocking_handler 117 | #pragma weak bus_fault_handler = blocking_handler 118 | #pragma weak usage_fault_handler = blocking_handler 119 | #pragma weak debug_monitor_handler = null_handler 120 | #endif 121 | 122 | -------------------------------------------------------------------------------- /libopencm3/lib/dispatch/vector_chipset.c: -------------------------------------------------------------------------------- 1 | #if defined(STM32F4) 2 | # include "../stm32/f4/vector_chipset.c" 3 | 4 | #elif defined(LPC43XX_M4) 5 | # include "../lpc43xx/m4/vector_chipset.c" 6 | 7 | #else 8 | 9 | static void pre_main(void) {} 10 | 11 | #endif 12 | -------------------------------------------------------------------------------- /libopencm3/lib/dispatch/vector_nvic.c: -------------------------------------------------------------------------------- 1 | #if defined(STM32F0) 2 | # include "../stm32/f0/vector_nvic.c" 3 | #elif defined(STM32F1) 4 | # include "../stm32/f1/vector_nvic.c" 5 | #elif defined(STM32F2) 6 | # include "../stm32/f2/vector_nvic.c" 7 | #elif defined(STM32F3) 8 | # include "../stm32/f3/vector_nvic.c" 9 | #elif defined(STM32F4) 10 | # include "../stm32/f4/vector_nvic.c" 11 | #elif defined(STM32L1) 12 | # include "../stm32/l1/vector_nvic.c" 13 | 14 | #elif defined(EFM32TG) 15 | # include "../efm32/efm32tg/vector_nvic.c" 16 | #elif defined(EFM32G) 17 | # include "../efm32/efm32g/vector_nvic.c" 18 | #elif defined(EFM32LG) 19 | # include "../efm32/efm32lg/vector_nvic.c" 20 | #elif defined(EFM32GG) 21 | # include "../efm32/efm32gg/vector_nvic.c" 22 | 23 | #elif defined(LPC13XX) 24 | # include "../lpc13xx/vector_nvic.c" 25 | #elif defined(LPC17XX) 26 | # include "../lpc17xx/vector_nvic.c" 27 | #elif defined(LPC43XX_M4) 28 | # include "../lpc43xx/m4/vector_nvic.c" 29 | #elif defined(LPC43XX_M0) 30 | # include "../lpc43xx/m0/vector_nvic.c" 31 | #elif defined(LPC43XX_M0S) 32 | # include "../lpc43xx/m0s/vector_nvic.c" 33 | 34 | #elif defined(SAM3X) 35 | # include "../sam/3x/vector_nvic.c" 36 | #elif defined(SAM3N) 37 | # include "../sam/3n/vector_nvic.c" 38 | 39 | #elif defined(LM3S) || defined(LM4F) 40 | /* Yes, we use the same interrupt table for both LM3S and LM4F */ 41 | # include "../lm3s/vector_nvic.c" 42 | 43 | #else 44 | # warning "no interrupts defined for chipset;"\ 45 | "not allocating space in the vector table" 46 | 47 | #define IRQ_HANDLERS 48 | 49 | #endif 50 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/gpio.c: -------------------------------------------------------------------------------- 1 | /** @defgroup gpio_file GPIO 2 | 3 | @ingroup LPC43xx 4 | 5 | @brief libopencm3 LPC43xx General Purpose I/O 6 | 7 | @version 1.0.0 8 | 9 | @author @htmlonly © @endhtmlonly 2009 Uwe Hermann 10 | 11 | LGPL License Terms @ref lgpl_license 12 | */ 13 | 14 | /* 15 | * This file is part of the libopencm3 project. 16 | * 17 | * Copyright (C) 2010 Uwe Hermann 18 | * 19 | * This library is free software: you can redistribute it and/or modify 20 | * it under the terms of the GNU Lesser General Public License as published by 21 | * the Free Software Foundation, either version 3 of the License, or 22 | * (at your option) any later version. 23 | * 24 | * This library is distributed in the hope that it will be useful, 25 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 26 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 27 | * GNU Lesser General Public License for more details. 28 | * 29 | * You should have received a copy of the GNU Lesser General Public License 30 | * along with this library. If not, see . 31 | */ 32 | 33 | /**@{*/ 34 | 35 | #include 36 | 37 | void gpio_set(uint32_t gpioport, uint32_t gpios) 38 | { 39 | GPIO_SET(gpioport) = gpios; 40 | } 41 | 42 | void gpio_clear(uint32_t gpioport, uint32_t gpios) 43 | { 44 | GPIO_CLR(gpioport) = gpios; 45 | } 46 | 47 | void gpio_toggle(uint32_t gpioport, uint32_t gpios) 48 | { 49 | GPIO_NOT(gpioport) = gpios; 50 | } 51 | 52 | uint32_t gpio_get(uint32_t gpioport, uint32_t gpios) 53 | { 54 | return (GPIO_PIN(gpioport) & gpios) != 0; 55 | } 56 | 57 | /**@}*/ 58 | 59 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/ipc.c: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2012/2014 Benjamin Vernoux 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | */ 19 | 20 | #include 21 | #include 22 | #include 23 | 24 | /* Set M0 in reset mode */ 25 | void ipc_halt_m0(void) 26 | { 27 | volatile uint32_t rst_active_status1; 28 | 29 | /* Check if M0 is reset by reading status */ 30 | rst_active_status1 = RESET_ACTIVE_STATUS1; 31 | 32 | /* If the M0 has reset not asserted, halt it... */ 33 | while (rst_active_status1 & RESET_CTRL1_M0APP_RST) { 34 | RESET_CTRL1 = ((~rst_active_status1) | RESET_CTRL1_M0APP_RST); 35 | rst_active_status1 = RESET_ACTIVE_STATUS1; 36 | } 37 | } 38 | 39 | /* Start M0 */ 40 | void ipc_start_m0(uint32_t cm0_baseaddr) 41 | { 42 | volatile uint32_t rst_active_status1; 43 | 44 | /* Set M0 memory mapping to point to start of M0 image */ 45 | CREG_M0APPMEMMAP = cm0_baseaddr; 46 | 47 | /* Start/run M0 core */ 48 | 49 | /* Release Slave from reset, first read status */ 50 | rst_active_status1 = RESET_ACTIVE_STATUS1; 51 | 52 | /* If the M0 is being held in reset, release it */ 53 | /* 1 = no reset, 0 = reset */ 54 | while (!(rst_active_status1 & RESET_CTRL1_M0APP_RST)) { 55 | RESET_CTRL1 = ((~rst_active_status1) & ~RESET_CTRL1_M0APP_RST); 56 | rst_active_status1 = RESET_ACTIVE_STATUS1; 57 | } 58 | } 59 | 60 | /* Clear event M0 */ 61 | void ipc_m0apptxevent_clear(void) { 62 | CREG_M0TXEVENT &= ~CREG_M0TXEVENT_TXEVCLR; 63 | } 64 | 65 | /* Set M0s in reset mode (only for LPC4370) */ 66 | void ipc_halt_m0s(void) 67 | { 68 | volatile uint32_t rst_active_status0; 69 | 70 | /* Check if M0s is reset by reading status */ 71 | rst_active_status0 = RESET_ACTIVE_STATUS0; 72 | 73 | /* If the M0s has reset not asserted, halt it... */ 74 | while (rst_active_status0 & RESET_CTRL0_M0_SUB_RST) { 75 | RESET_CTRL0 = ((~rst_active_status0) | RESET_CTRL0_M0_SUB_RST); 76 | rst_active_status0 = RESET_ACTIVE_STATUS0; 77 | } 78 | } 79 | 80 | /* Start M0s (only for LPC4370) */ 81 | void ipc_start_m0s(uint32_t cm0s_baseaddr) 82 | { 83 | volatile uint32_t rst_active_status0; 84 | 85 | /* Set M0s memory mapping to point to start of M0 image */ 86 | CREG_M0SUBMEMMAP = cm0s_baseaddr; 87 | 88 | /* Start/run M0s core */ 89 | 90 | /* Release Slave from reset, first read status */ 91 | rst_active_status0 = RESET_ACTIVE_STATUS0; 92 | 93 | /* If the M0 is being held in reset, release it */ 94 | /* 1 = no reset, 0 = reset */ 95 | while (!(rst_active_status0 & RESET_CTRL0_M0_SUB_RST)) { 96 | RESET_CTRL0 = ((~rst_active_status0) & ~RESET_CTRL0_M0_SUB_RST); 97 | rst_active_status0 = RESET_ACTIVE_STATUS0; 98 | } 99 | } 100 | 101 | /* Clear event M0s (only for LPC4370) */ 102 | void ipc_m0subtxevent_clear(void) { 103 | CREG_M0SUBTXEVENT &= ~CREG_M0SUBTXEVENT_TXEVCLR; 104 | } 105 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/m0/Makefile: -------------------------------------------------------------------------------- 1 | ## 2 | ## This file is part of the libopencm3 project. 3 | ## 4 | ## Copyright (C) 2009 Uwe Hermann 5 | ## Copyright (C) 2012 Michael Ossmann 6 | ## Copyright (C) 2012/2013 Benjamin Vernoux 7 | ## 8 | ## This library is free software: you can redistribute it and/or modify 9 | ## it under the terms of the GNU Lesser General Public License as published by 10 | ## the Free Software Foundation, either version 3 of the License, or 11 | ## (at your option) any later version. 12 | ## 13 | ## This library is distributed in the hope that it will be useful, 14 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | ## GNU Lesser General Public License for more details. 17 | ## 18 | ## You should have received a copy of the GNU Lesser General Public License 19 | ## along with this library. If not, see . 20 | ## 21 | 22 | LIBNAME = libopencm3_lpc43xx_m0 23 | 24 | PREFIX ?= arm-none-eabi 25 | #PREFIX ?= arm-elf 26 | CC = $(PREFIX)-gcc 27 | AR = $(PREFIX)-ar 28 | CFLAGS = -O2 -g3 -Wall -Wextra -I../../../include -fno-common \ 29 | -mcpu=cortex-m0 -mthumb -Wstrict-prototypes \ 30 | -ffunction-sections -fdata-sections -MD -DLPC43XX -DLPC43XX_M0 31 | # ARFLAGS = rcsv 32 | ARFLAGS = rcs 33 | 34 | # LPC43xx common files for M4 / M0 35 | OBJ_LPC43XX = gpio.o scu.o i2c.o ssp.o uart.o timer.o 36 | 37 | #LPC43xx M0 specific file + Generic LPC43xx M4/M0 files 38 | OBJS = $(OBJ_LPC43XX) 39 | 40 | VPATH += ../:../../cm3 41 | 42 | include ../../Makefile.include 43 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/m0/libopencm3_lpc43xx_m0.ld: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2009 Uwe Hermann 5 | * Copyright (C) 2012 Michael Ossmann 6 | * Copyright (C) 2012 Benjamin Vernoux 7 | * Copyright (C) 2012 Jared Boone 8 | * 9 | * This library is free software: you can redistribute it and/or modify 10 | * it under the terms of the GNU Lesser General Public License as published by 11 | * the Free Software Foundation, either version 3 of the License, or 12 | * (at your option) any later version. 13 | * 14 | * This library is distributed in the hope that it will be useful, 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 | * GNU Lesser General Public License for more details. 18 | * 19 | * You should have received a copy of the GNU Lesser General Public License 20 | * along with this library. If not, see . 21 | */ 22 | 23 | /* Generic linker script for LPC43XX targets using libopencm3. */ 24 | 25 | /* Memory regions must be defined in the ld script which includes this one. */ 26 | 27 | /* Enforce emmition of the vector table. */ 28 | EXTERN (vector_table) 29 | 30 | /* Define the entry point of the output file. */ 31 | ENTRY(reset_handler) 32 | 33 | /* Define sections. */ 34 | SECTIONS 35 | { 36 | . = ORIGIN(ram_ahb2); 37 | 38 | .text : { 39 | . = ALIGN(0x400); 40 | *(.vectors) /* Vector table */ 41 | *(.text*) /* Program code */ 42 | . = ALIGN(4); 43 | *(.rodata*) /* Read-only data */ 44 | . = ALIGN(4); 45 | } >ram_ahb2 46 | 47 | /* C++ Static constructors/destructors, also used for __attribute__ 48 | * ((constructor)) and the likes */ 49 | .preinit_array : { 50 | . = ALIGN(4); 51 | __preinit_array_start = .; 52 | KEEP (*(.preinit_array)) 53 | __preinit_array_end = .; 54 | } >ram_ahb2 55 | .init_array : { 56 | . = ALIGN(4); 57 | __init_array_start = .; 58 | KEEP (*(SORT(.init_array.*))) 59 | KEEP (*(.init_array)) 60 | __init_array_end = .; 61 | } >ram_ahb2 62 | .fini_array : { 63 | . = ALIGN(4); 64 | __fini_array_start = .; 65 | KEEP (*(.fini_array)) 66 | KEEP (*(SORT(.fini_array.*))) 67 | __fini_array_end = .; 68 | } >ram_ahb2 69 | 70 | /* 71 | * Another section used by C++ stuff, appears when using newlib with 72 | * 64bit (long long) printf support 73 | */ 74 | .ARM.extab : { 75 | *(.ARM.extab*) 76 | } >ram_ahb2 77 | 78 | /* exception index - required due to libgcc.a issuing /0 exceptions */ 79 | .ARM.exidx : { 80 | __exidx_start = .; 81 | *(.ARM.exidx*) 82 | __exidx_end = .; 83 | } >ram_ahb2 84 | 85 | . = ALIGN(4); 86 | _etext = .; 87 | _etext_ram = 0; /* Start of Code in RAM NULL because Copy of Code from ROM to RAM disabled */ 88 | _etext_rom = 0; /* Start of Code in RAM NULL because Copy of Code from ROM to RAM disabled */ 89 | 90 | . = ORIGIN(ram_ahb2); 91 | 92 | .data : { 93 | _data = .; 94 | *(.data*) /* Read-write initialized data */ 95 | . = ALIGN(4); 96 | } >ram_ahb2 97 | 98 | _data_loadaddr = LOADADDR(.data); 99 | 100 | _data = .; 101 | _edata = .; 102 | 103 | .bss : { 104 | _bss = .; 105 | *(.bss_aligned*) /* Read-write zero initialized data */ 106 | *(.bss*) /* Read-write zero initialized data */ 107 | *(COMMON) 108 | . = ALIGN(4); 109 | _ebss = .; 110 | } >ram_ahb2 111 | 112 | /* exception unwind data - required due to libgcc.a issuing /0 exceptions */ 113 | .ARM.extab : { 114 | *(.ARM.extab*) 115 | } >ram_ahb2 116 | 117 | /* 118 | * The .eh_frame section appears to be used for C++ exception handling. 119 | * You may need to fix this if you're using C++. 120 | */ 121 | /DISCARD/ : { *(.eh_frame) } 122 | 123 | . = ALIGN(4); 124 | end = .; 125 | 126 | /* Leave room above stack for IAP to run. */ 127 | __StackTop = ORIGIN(ram_ahb1_m0_stack) + LENGTH(ram_ahb1_m0_stack) - 32; 128 | PROVIDE(_stack = __StackTop); 129 | } 130 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/m0/libopencm3_lpc43xx_ram_only_m0.ld: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2009 Uwe Hermann 5 | * Copyright (C) 2012 Michael Ossmann 6 | * Copyright (C) 2012 Benjamin Vernoux 7 | * Copyright (C) 2012 Jared Boone 8 | * 9 | * This library is free software: you can redistribute it and/or modify 10 | * it under the terms of the GNU Lesser General Public License as published by 11 | * the Free Software Foundation, either version 3 of the License, or 12 | * (at your option) any later version. 13 | * 14 | * This library is distributed in the hope that it will be useful, 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 | * GNU Lesser General Public License for more details. 18 | * 19 | * You should have received a copy of the GNU Lesser General Public License 20 | * along with this library. If not, see . 21 | */ 22 | 23 | /* Generic linker script for LPC43XX targets using libopencm3. */ 24 | 25 | /* Memory regions must be defined in the ld script which includes this one. */ 26 | 27 | /* Enforce emmition of the vector table. */ 28 | EXTERN (vector_table) 29 | 30 | /* Define the entry point of the output file. */ 31 | ENTRY(reset_handler) 32 | 33 | /* Define sections. */ 34 | SECTIONS 35 | { 36 | . = ORIGIN(ram_ahb2); 37 | 38 | .text : { 39 | . = ALIGN(0x400); 40 | *(.vectors) /* Vector table */ 41 | *(.text*) /* Program code */ 42 | . = ALIGN(4); 43 | *(.rodata*) /* Read-only data */ 44 | . = ALIGN(4); 45 | } >ram_ahb2 46 | 47 | /* exception index - required due to libgcc.a issuing /0 exceptions */ 48 | __exidx_start = .; 49 | .ARM.exidx : { 50 | *(.ARM.exidx*) 51 | } > ram_ahb2 52 | __exidx_end = .; 53 | 54 | _etext = .; 55 | 56 | . = ORIGIN(ram_ahb2); 57 | 58 | .data : { 59 | *(.data*) /* Read-write initialized data */ 60 | . = ALIGN(4); 61 | } >ram_ahb2 62 | 63 | _data = .; 64 | _edata = .; 65 | 66 | .bss : { 67 | _bss = .; 68 | *(.bss_aligned*) /* Read-write zero initialized data */ 69 | *(.bss*) /* Read-write zero initialized data */ 70 | *(COMMON) 71 | . = ALIGN(4); 72 | _ebss = .; 73 | } >ram_ahb2 74 | 75 | /* exception unwind data - required due to libgcc.a issuing /0 exceptions */ 76 | .ARM.extab : { 77 | *(.ARM.extab*) 78 | } >ram_ahb2 79 | 80 | /* 81 | * The .eh_frame section appears to be used for C++ exception handling. 82 | * You may need to fix this if you're using C++. 83 | */ 84 | /DISCARD/ : { *(.eh_frame) } 85 | 86 | /* 87 | * Another section used by C++ stuff, appears when using newlib with 88 | * 64bit (long long) printf support - discard it for now. 89 | */ 90 | /DISCARD/ : { *(.ARM.exidx) } 91 | 92 | end = .; 93 | 94 | /* Leave room above stack for IAP to run. */ 95 | __StackTop = ORIGIN(ram_ahb1_m0_stack) + LENGTH(ram_ahb1_m0_stack) - 32; 96 | PROVIDE(_stack = __StackTop); 97 | } 98 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/m0/vector_nvic.c: -------------------------------------------------------------------------------- 1 | /* This file is part of the libopencm3 project. 2 | * 3 | * It was generated by the irq2nvic_h script. 4 | * 5 | * This part needs to get included in the compilation unit where 6 | * blocking_handler gets defined due to the way #pragma works. 7 | */ 8 | 9 | 10 | /** @defgroup CM3_nvic_isrpragmas_LPC43xx (M0) User interrupt service routines (ISR) defaults for LPC 43xx series M0APP core (rev_1_7_UM10503) 11 | @ingroup CM3_nvic_isrpragmas 12 | 13 | @{*/ 14 | 15 | #pragma weak rtc_isr = blocking_handler 16 | #pragma weak m4core_isr = blocking_handler 17 | #pragma weak dma_isr = blocking_handler 18 | #pragma weak flasheepromat_isr = blocking_handler 19 | #pragma weak ethernet_isr = blocking_handler 20 | #pragma weak sdio_isr = blocking_handler 21 | #pragma weak lcd_isr = blocking_handler 22 | #pragma weak usb0_isr = blocking_handler 23 | #pragma weak usb1_isr = blocking_handler 24 | #pragma weak sct_isr = blocking_handler 25 | #pragma weak ritimer_or_wwdt_isr = blocking_handler 26 | #pragma weak timer0_isr = blocking_handler 27 | #pragma weak gint1_isr = blocking_handler 28 | #pragma weak pin_int4_isr = blocking_handler 29 | #pragma weak timer3_isr = blocking_handler 30 | #pragma weak mcpwm_isr = blocking_handler 31 | #pragma weak adc0_isr = blocking_handler 32 | #pragma weak i2c0_or_irc1_isr = blocking_handler 33 | #pragma weak sgpio_isr = blocking_handler 34 | #pragma weak spi_or_dac_isr = blocking_handler 35 | #pragma weak adc1_isr = blocking_handler 36 | #pragma weak ssp0_or_ssp1_isr = blocking_handler 37 | #pragma weak eventrouter_isr = blocking_handler 38 | #pragma weak usart0_isr = blocking_handler 39 | #pragma weak uart1_isr = blocking_handler 40 | #pragma weak usart2_or_c_can1_isr = blocking_handler 41 | #pragma weak usart3_isr = blocking_handler 42 | #pragma weak i2s0_or_i2s1_isr = blocking_handler 43 | #pragma weak c_can0_isr = blocking_handler 44 | #pragma weak spifi_or_adchs_isr = blocking_handler 45 | #pragma weak m0sub_isr = blocking_handler 46 | 47 | /**@}*/ 48 | 49 | /* Initialization template for the interrupt vector table. This definition is 50 | * used by the startup code generator (vector.c) to set the initial values for 51 | * the interrupt handling routines to the chip family specific _isr weak 52 | * symbols. */ 53 | 54 | #define IRQ_HANDLERS \ 55 | [NVIC_RTC_IRQ] = rtc_isr, \ 56 | [NVIC_M4CORE_IRQ] = m4core_isr, \ 57 | [NVIC_DMA_IRQ] = dma_isr, \ 58 | [NVIC_FLASHEEPROMAT_IRQ] = flasheepromat_isr, \ 59 | [NVIC_ETHERNET_IRQ] = ethernet_isr, \ 60 | [NVIC_SDIO_IRQ] = sdio_isr, \ 61 | [NVIC_LCD_IRQ] = lcd_isr, \ 62 | [NVIC_USB0_IRQ] = usb0_isr, \ 63 | [NVIC_USB1_IRQ] = usb1_isr, \ 64 | [NVIC_SCT_IRQ] = sct_isr, \ 65 | [NVIC_RITIMER_OR_WWDT_IRQ] = ritimer_or_wwdt_isr, \ 66 | [NVIC_TIMER0_IRQ] = timer0_isr, \ 67 | [NVIC_GINT1_IRQ] = gint1_isr, \ 68 | [NVIC_PIN_INT4_IRQ] = pin_int4_isr, \ 69 | [NVIC_TIMER3_IRQ] = timer3_isr, \ 70 | [NVIC_MCPWM_IRQ] = mcpwm_isr, \ 71 | [NVIC_ADC0_IRQ] = adc0_isr, \ 72 | [NVIC_I2C0_OR_IRC1_IRQ] = i2c0_or_irc1_isr, \ 73 | [NVIC_SGPIO_IRQ] = sgpio_isr, \ 74 | [NVIC_SPI_OR_DAC_IRQ] = spi_or_dac_isr, \ 75 | [NVIC_ADC1_IRQ] = adc1_isr, \ 76 | [NVIC_SSP0_OR_SSP1_IRQ] = ssp0_or_ssp1_isr, \ 77 | [NVIC_EVENTROUTER_IRQ] = eventrouter_isr, \ 78 | [NVIC_USART0_IRQ] = usart0_isr, \ 79 | [NVIC_UART1_IRQ] = uart1_isr, \ 80 | [NVIC_USART2_OR_C_CAN1_IRQ] = usart2_or_c_can1_isr, \ 81 | [NVIC_USART3_IRQ] = usart3_isr, \ 82 | [NVIC_I2S0_OR_I2S1_IRQ] = i2s0_or_i2s1_isr, \ 83 | [NVIC_C_CAN0_IRQ] = c_can0_isr, \ 84 | [NVIC_SPIFI_OR_ADCHS_IRQ] = spifi_or_adchs_isr, \ 85 | [NVIC_M0SUB_IRQ] = m0sub_isr 86 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/m0s/Makefile: -------------------------------------------------------------------------------- 1 | ## 2 | ## This file is part of the libopencm3 project. 3 | ## 4 | ## Copyright (C) 2009 Uwe Hermann 5 | ## Copyright (C) 2012 Michael Ossmann 6 | ## Copyright (C) 2012/2014 Benjamin Vernoux 7 | ## 8 | ## This library is free software: you can redistribute it and/or modify 9 | ## it under the terms of the GNU Lesser General Public License as published by 10 | ## the Free Software Foundation, either version 3 of the License, or 11 | ## (at your option) any later version. 12 | ## 13 | ## This library is distributed in the hope that it will be useful, 14 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | ## GNU Lesser General Public License for more details. 17 | ## 18 | ## You should have received a copy of the GNU Lesser General Public License 19 | ## along with this library. If not, see . 20 | ## 21 | 22 | LIBNAME = libopencm3_lpc43xx_m0s 23 | 24 | PREFIX ?= arm-none-eabi 25 | #PREFIX ?= arm-elf 26 | CC = $(PREFIX)-gcc 27 | AR = $(PREFIX)-ar 28 | CFLAGS = -O2 -g3 -Wall -Wextra -I../../../include -fno-common \ 29 | -mcpu=cortex-m0 -mthumb -Wstrict-prototypes \ 30 | -ffunction-sections -fdata-sections -MD -DLPC43XX -DLPC43XX_M0S 31 | # ARFLAGS = rcsv 32 | ARFLAGS = rcs 33 | 34 | # LPC43xx common files for M4 / M0 / M0s 35 | OBJ_LPC43XX = gpio.o scu.o i2c.o ssp.o uart.o timer.o 36 | 37 | #LPC43xx M0s specific file + Generic LPC43xx M4/M0/M0s files 38 | OBJS = $(OBJ_LPC43XX) 39 | 40 | VPATH += ../:../../cm3 41 | 42 | include ../../Makefile.include 43 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/m0s/libopencm3_lpc43xx_ram_only_m0s.ld: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2009 Uwe Hermann 5 | * Copyright (C) 2012 Michael Ossmann 6 | * Copyright (C) 2012/2014 Benjamin Vernoux 7 | * Copyright (C) 2012 Jared Boone 8 | * 9 | * This library is free software: you can redistribute it and/or modify 10 | * it under the terms of the GNU Lesser General Public License as published by 11 | * the Free Software Foundation, either version 3 of the License, or 12 | * (at your option) any later version. 13 | * 14 | * This library is distributed in the hope that it will be useful, 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 | * GNU Lesser General Public License for more details. 18 | * 19 | * You should have received a copy of the GNU Lesser General Public License 20 | * along with this library. If not, see . 21 | */ 22 | 23 | /* Generic linker script for LPC43XX targets using libopencm3. */ 24 | 25 | /* Memory regions must be defined in the ld script which includes this one. */ 26 | 27 | /* Enforce emmition of the vector table. */ 28 | EXTERN (vector_table) 29 | 30 | /* Define the entry point of the output file. */ 31 | ENTRY(reset_handler) 32 | 33 | /* Define sections. */ 34 | SECTIONS 35 | { 36 | . = ORIGIN(ram_local_m0sub); 37 | 38 | .text : { 39 | . = ALIGN(0x400); 40 | *(.vectors) /* Vector table */ 41 | *(.text*) /* Program code */ 42 | . = ALIGN(4); 43 | *(.rodata*) /* Read-only data */ 44 | . = ALIGN(4); 45 | } >ram_local_m0sub 46 | 47 | /* exception index - required due to libgcc.a issuing /0 exceptions */ 48 | __exidx_start = .; 49 | .ARM.exidx : { 50 | *(.ARM.exidx*) 51 | } > ram_local_m0sub 52 | __exidx_end = .; 53 | 54 | _etext = .; 55 | 56 | . = ORIGIN(ram_local_m0sub); 57 | 58 | .data : { 59 | *(.data*) /* Read-write initialized data */ 60 | . = ALIGN(4); 61 | } >ram_local_m0sub 62 | 63 | _data = .; 64 | _edata = .; 65 | 66 | .bss : { 67 | _bss = .; 68 | *(.bss_aligned*) /* Read-write zero initialized data */ 69 | *(.bss*) /* Read-write zero initialized data */ 70 | *(COMMON) 71 | . = ALIGN(4); 72 | _ebss = .; 73 | } >ram_local_m0sub 74 | 75 | /* exception unwind data - required due to libgcc.a issuing /0 exceptions */ 76 | .ARM.extab : { 77 | *(.ARM.extab*) 78 | } >ram_local_m0sub 79 | 80 | /* 81 | * The .eh_frame section appears to be used for C++ exception handling. 82 | * You may need to fix this if you're using C++. 83 | */ 84 | /DISCARD/ : { *(.eh_frame) } 85 | 86 | /* 87 | * Another section used by C++ stuff, appears when using newlib with 88 | * 64bit (long long) printf support - discard it for now. 89 | */ 90 | /DISCARD/ : { *(.ARM.exidx) } 91 | 92 | end = .; 93 | 94 | /* Leave room above stack for IAP to run. */ 95 | __StackTop = ORIGIN(ram_local_m0sub) + LENGTH(ram_local_m0sub) - 32; 96 | PROVIDE(_stack = __StackTop); 97 | } 98 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/m0s/vector_nvic.c: -------------------------------------------------------------------------------- 1 | /* This file is part of the libopencm3 project. 2 | * 3 | * It was generated by the irq2nvic_h script. 4 | * 5 | * This part needs to get included in the compilation unit where 6 | * blocking_handler gets defined due to the way #pragma works. 7 | */ 8 | 9 | 10 | /** @defgroup CM3_nvic_isrpragmas_LPC43xx (M0SUB) User interrupt service routines (ISR) defaults for LPC 43xx series M0SUB core (rev_1_7_UM10503) 11 | @ingroup CM3_nvic_isrpragmas 12 | 13 | @{*/ 14 | 15 | #pragma weak dac_isr = blocking_handler 16 | #pragma weak m4core_isr = blocking_handler 17 | #pragma weak dma_isr = blocking_handler 18 | #pragma weak sgpio_input_isr = blocking_handler 19 | #pragma weak sgpio_match_isr = blocking_handler 20 | #pragma weak sgpio_shift_isr = blocking_handler 21 | #pragma weak sgpio_pos_isr = blocking_handler 22 | #pragma weak usb0_isr = blocking_handler 23 | #pragma weak usb1_isr = blocking_handler 24 | #pragma weak sct_isr = blocking_handler 25 | #pragma weak ritimer_isr = blocking_handler 26 | #pragma weak gint1_isr = blocking_handler 27 | #pragma weak timer1_isr = blocking_handler 28 | #pragma weak timer2_isr = blocking_handler 29 | #pragma weak pin_int5_isr = blocking_handler 30 | #pragma weak mcpwm_isr = blocking_handler 31 | #pragma weak adc0_isr = blocking_handler 32 | #pragma weak i2c0_isr = blocking_handler 33 | #pragma weak i2c1_isr = blocking_handler 34 | #pragma weak spi_isr = blocking_handler 35 | #pragma weak adc1_isr = blocking_handler 36 | #pragma weak ssp0_or_ssp1_isr = blocking_handler 37 | #pragma weak eventrouter_isr = blocking_handler 38 | #pragma weak usart0_isr = blocking_handler 39 | #pragma weak uart1_isr = blocking_handler 40 | #pragma weak usart2_or_c_can1_isr = blocking_handler 41 | #pragma weak usart3_isr = blocking_handler 42 | #pragma weak i2s0_or_i2s1_or_qei_isr = blocking_handler 43 | #pragma weak c_can0_isr = blocking_handler 44 | #pragma weak spifi_or_adchs_isr = blocking_handler 45 | #pragma weak m0app_isr = blocking_handler 46 | 47 | /**@}*/ 48 | 49 | /* Initialization template for the interrupt vector table. This definition is 50 | * used by the startup code generator (vector.c) to set the initial values for 51 | * the interrupt handling routines to the chip family specific _isr weak 52 | * symbols. */ 53 | 54 | #define IRQ_HANDLERS \ 55 | [NVIC_DAC_IRQ] = dac_isr, \ 56 | [NVIC_M4CORE_IRQ] = m4core_isr, \ 57 | [NVIC_DMA_IRQ] = dma_isr, \ 58 | [NVIC_SGPIO_INPUT_IRQ] = sgpio_input_isr, \ 59 | [NVIC_SGPIO_MATCH_IRQ] = sgpio_match_isr, \ 60 | [NVIC_SGPIO_SHIFT_IRQ] = sgpio_shift_isr, \ 61 | [NVIC_SGPIO_POS_IRQ] = sgpio_pos_isr, \ 62 | [NVIC_USB0_IRQ] = usb0_isr, \ 63 | [NVIC_USB1_IRQ] = usb1_isr, \ 64 | [NVIC_SCT_IRQ] = sct_isr, \ 65 | [NVIC_RITIMER_IRQ] = ritimer_isr, \ 66 | [NVIC_GINT1_IRQ] = gint1_isr, \ 67 | [NVIC_TIMER1_IRQ] = timer1_isr, \ 68 | [NVIC_TIMER2_IRQ] = timer2_isr, \ 69 | [NVIC_PIN_INT5_IRQ] = pin_int5_isr, \ 70 | [NVIC_MCPWM_IRQ] = mcpwm_isr, \ 71 | [NVIC_ADC0_IRQ] = adc0_isr, \ 72 | [NVIC_I2C0_IRQ] = i2c0_isr, \ 73 | [NVIC_I2C1_IRQ] = i2c1_isr, \ 74 | [NVIC_SPI_IRQ] = spi_isr, \ 75 | [NVIC_ADC1_IRQ] = adc1_isr, \ 76 | [NVIC_SSP0_OR_SSP1_IRQ] = ssp0_or_ssp1_isr, \ 77 | [NVIC_EVENTROUTER_IRQ] = eventrouter_isr, \ 78 | [NVIC_USART0_IRQ] = usart0_isr, \ 79 | [NVIC_UART1_IRQ] = uart1_isr, \ 80 | [NVIC_USART2_OR_C_CAN1_IRQ] = usart2_or_c_can1_isr, \ 81 | [NVIC_USART3_IRQ] = usart3_isr, \ 82 | [NVIC_I2S0_OR_I2S1_OR_QEI_IRQ] = i2s0_or_i2s1_or_qei_isr, \ 83 | [NVIC_C_CAN0_IRQ] = c_can0_isr, \ 84 | [NVIC_SPIFI_OR_ADCHS_IRQ] = spifi_or_adchs_isr, \ 85 | [NVIC_M0APP_IRQ] = m0app_isr 86 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/m4/Makefile: -------------------------------------------------------------------------------- 1 | ## 2 | ## This file is part of the libopencm3 project. 3 | ## 4 | ## Copyright (C) 2009 Uwe Hermann 5 | ## Copyright (C) 2012 Michael Ossmann 6 | ## Copyright (C) 2012 Benjamin Vernoux 7 | ## Copyright (C) 2013 Alexandru Gagniuc 8 | ## 9 | ## This library is free software: you can redistribute it and/or modify 10 | ## it under the terms of the GNU Lesser General Public License as published by 11 | ## the Free Software Foundation, either version 3 of the License, or 12 | ## (at your option) any later version. 13 | ## 14 | ## This library is distributed in the hope that it will be useful, 15 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of 16 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 | ## GNU Lesser General Public License for more details. 18 | ## 19 | ## You should have received a copy of the GNU Lesser General Public License 20 | ## along with this library. If not, see . 21 | ## 22 | 23 | LIBNAME = libopencm3_lpc43xx 24 | 25 | FP_FLAGS ?= -mfloat-abi=hard -mfpu=fpv4-sp-d16 26 | PREFIX ?= arm-none-eabi 27 | 28 | CC = $(PREFIX)-gcc 29 | AR = $(PREFIX)-ar 30 | CFLAGS = -O2 -g3 \ 31 | -Wall -Wextra -Wimplicit-function-declaration \ 32 | -Wredundant-decls -Wmissing-prototypes -Wstrict-prototypes \ 33 | -Wundef -Wshadow \ 34 | -I../../../include -fno-common \ 35 | -mcpu=cortex-m4 -mthumb -Wstrict-prototypes \ 36 | -ffunction-sections -fdata-sections -MD \ 37 | $(FP_FLAGS) -DLPC43XX -DLPC43XX_M4 38 | 39 | ARFLAGS = rcs 40 | 41 | # LPC43xx common files for M4 / M0 42 | OBJ_LPC43XX = gpio.o scu.o i2c.o ssp.o uart.o timer.o 43 | 44 | #LPC43xx M4 specific file + Generic LPC43xx M4/M0 files 45 | OBJS = $(OBJ_LPC43XX) ipc.o 46 | 47 | VPATH += ../:../../cm3 48 | 49 | include ../../Makefile.include 50 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/m4/libopencm3_lpc43xx_rom_to_ram.ld: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2009 Uwe Hermann 5 | * Copyright (C) 2012 Michael Ossmann 6 | * Copyright (C) 2012 Benjamin Vernoux 7 | * Copyright (C) 2012 Jared Boone 8 | * 9 | * This library is free software: you can redistribute it and/or modify 10 | * it under the terms of the GNU Lesser General Public License as published by 11 | * the Free Software Foundation, either version 3 of the License, or 12 | * (at your option) any later version. 13 | * 14 | * This library is distributed in the hope that it will be useful, 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 | * GNU Lesser General Public License for more details. 18 | * 19 | * You should have received a copy of the GNU Lesser General Public License 20 | * along with this library. If not, see . 21 | */ 22 | 23 | /* Generic linker script for LPC43XX targets using libopencm3. */ 24 | 25 | /* Memory regions must be defined in the ld script which includes this one. */ 26 | 27 | /* Enforce emmition of the vector table. */ 28 | EXTERN (vector_table) 29 | 30 | /* Define the entry point of the output file. */ 31 | ENTRY(reset_handler) 32 | 33 | /* Define sections. */ 34 | SECTIONS 35 | { 36 | .text : { 37 | . = ALIGN(0x400); 38 | _text_ram = (. - ORIGIN(rom)) + ORIGIN(ram_local1); /* Start of Code in RAM */ 39 | 40 | *(.vectors) /* Vector table */ 41 | *(.text*) /* Program code */ 42 | . = ALIGN(4); 43 | *(.rodata*) /* Read-only data */ 44 | . = ALIGN(4); 45 | } >rom 46 | 47 | /* C++ Static constructors/destructors, also used for __attribute__ 48 | * ((constructor)) and the likes */ 49 | .preinit_array : { 50 | . = ALIGN(4); 51 | __preinit_array_start = .; 52 | KEEP (*(.preinit_array)) 53 | __preinit_array_end = .; 54 | } >rom 55 | .init_array : { 56 | . = ALIGN(4); 57 | __init_array_start = .; 58 | KEEP (*(SORT(.init_array.*))) 59 | KEEP (*(.init_array)) 60 | __init_array_end = .; 61 | } >rom 62 | .fini_array : { 63 | . = ALIGN(4); 64 | __fini_array_start = .; 65 | KEEP (*(.fini_array)) 66 | KEEP (*(SORT(.fini_array.*))) 67 | __fini_array_end = .; 68 | } >rom 69 | 70 | /* 71 | * Another section used by C++ stuff, appears when using newlib with 72 | * 64bit (long long) printf support 73 | */ 74 | .ARM.extab : { 75 | *(.ARM.extab*) 76 | } >rom 77 | 78 | /* exception index - required due to libgcc.a issuing /0 exceptions */ 79 | .ARM.exidx : { 80 | __exidx_start = .; 81 | *(.ARM.exidx*) 82 | __exidx_end = .; 83 | } >rom 84 | 85 | . = ALIGN(4); 86 | _etext = .; 87 | _etext_ram = (. - ORIGIN(rom)) + ORIGIN(ram_local1); 88 | _etext_rom = (. - ORIGIN(rom)) + ORIGIN(rom_flash); 89 | 90 | . = ORIGIN(ram_local2); 91 | 92 | .data : { 93 | _data = .; 94 | *(.data*) /* Read-write initialized data */ 95 | . = ALIGN(4); 96 | _edata = .; 97 | } >ram_local2 AT >rom 98 | _data_loadaddr = LOADADDR(.data); 99 | 100 | _data_rom = LOADADDR (.data) + ORIGIN(rom_flash); 101 | _edata_rom = _data_rom + SIZEOF (.data); 102 | 103 | .bss : { 104 | _bss = .; 105 | *(.bss_aligned*) /* Read-write zero initialized data */ 106 | *(.bss*) /* Read-write zero initialized data */ 107 | *(COMMON) 108 | . = ALIGN(4); 109 | _ebss = .; 110 | } >ram_local2 111 | 112 | /* exception unwind data - required due to libgcc.a issuing /0 exceptions */ 113 | .ARM.extab : { 114 | *(.ARM.extab*) 115 | } >ram_local2 116 | 117 | /* 118 | * The .eh_frame section appears to be used for C++ exception handling. 119 | * You may need to fix this if you're using C++. 120 | */ 121 | /DISCARD/ : { *(.eh_frame) } 122 | 123 | . = ALIGN(4); 124 | end = .; 125 | 126 | /* Leave room above stack for IAP to run. */ 127 | __StackTop = ORIGIN(ram_local2) + LENGTH(ram_local2) - 32; 128 | PROVIDE(_stack = __StackTop); 129 | } 130 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/m4/vector_chipset.c: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2010 Piotr Esden-Tempski 5 | * Copyright (C) 2012 Michael Ossmann 6 | * 7 | * This library is free software: you can redistribute it and/or modify 8 | * it under the terms of the GNU Lesser General Public License as published by 9 | * the Free Software Foundation, either version 3 of the License, or 10 | * (at your option) any later version. 11 | * 12 | * This library is distributed in the hope that it will be useful, 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | * GNU Lesser General Public License for more details. 16 | * 17 | * You should have received a copy of the GNU Lesser General Public License 18 | * along with this library. If not, see . 19 | */ 20 | 21 | #include 22 | #include 23 | 24 | extern unsigned _etext_ram, _text_ram, _etext_rom; 25 | 26 | #define CREG_M4MEMMAP MMIO32((0x40043000 + 0x100)) 27 | 28 | static void pre_main(void) 29 | { 30 | volatile unsigned *src, *dest; 31 | 32 | // ************************************************************* 33 | // The following conditional block of code manually resets as 34 | // much of the peripheral set of the LPC43 as possible. This is 35 | // done because the LPC43 does not provide a means of triggering 36 | // a full system reset under debugger control, which can cause 37 | // problems in certain circumstances when debugging. 38 | // 39 | // You can prevent this code block being included if you require 40 | // (for example when creating a final executable which you will 41 | // not debug) by setting the define 'DONT_RESET_ON_RESTART'. 42 | // 43 | #ifndef DONT_RESET_ON_RESTART 44 | // Disable interrupts 45 | __asm volatile ("cpsid i"); 46 | // equivalent to CMSIS '__disable_irq()' function 47 | unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100; 48 | // LPC_RGU->RESET_CTRL0 @ 0x40053100 49 | // LPC_RGU->RESET_CTRL1 @ 0x40053104 50 | // Note that we do not use the CMSIS register access mechanism, 51 | // as there is no guarantee that the project has been configured 52 | // to use CMSIS. 53 | // Write to LPC_RGU->RESET_CTRL0 54 | *(RESET_CONTROL+0) = 0x10DF1000; 55 | // GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST| 56 | // USB1_RST|USB0_RST|LCD_RST|M0_SUB_RST 57 | // Write to LPC_RGU->RESET_CTRL1 58 | *(RESET_CONTROL+1) = 0x01DFF7FF; 59 | // M0APP_RST|CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST| 60 | // I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST| 61 | // DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST| 62 | // RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST 63 | // Clear all pending interrupts in the NVIC 64 | volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280; 65 | unsigned int irqpendloop; 66 | for(irqpendloop = 0; irqpendloop < 8; irqpendloop++) 67 | { 68 | *(NVIC_ICPR+irqpendloop)= 0xFFFFFFFF; 69 | } 70 | // Reenable interrupts 71 | __asm volatile ("cpsie i"); 72 | // equivalent to CMSIS '__enable_irq()' function 73 | #endif // ifndef DONT_RESET_ON_RESTART 74 | // ************************************************************* 75 | 76 | /* Copy the code from ROM to Real RAM (if enabled) */ 77 | if ((&_etext_ram-&_text_ram) > 0) { 78 | src = &_etext_rom-(&_etext_ram-&_text_ram); 79 | /* Change Shadow memory to ROM (for Debug Purpose in case Boot 80 | * has not set correctly the M4MEMMAP because of debug) 81 | */ 82 | CREG_M4MEMMAP = (unsigned long)src; 83 | 84 | for (dest = &_text_ram; dest < &_etext_ram; ) { 85 | *dest++ = *src++; 86 | } 87 | 88 | /* Change Shadow memory to Real RAM */ 89 | CREG_M4MEMMAP = (unsigned long)&_text_ram; 90 | 91 | /* Continue Execution in RAM */ 92 | } 93 | 94 | /* Enable access to Floating-Point coprocessor. */ 95 | SCB_CPACR |= SCB_CPACR_FULL * (SCB_CPACR_CP10 | SCB_CPACR_CP11); 96 | } 97 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/scu.c: -------------------------------------------------------------------------------- 1 | /** @defgroup scu_file System Control Unit 2 | 3 | @ingroup LPC43xx 4 | 5 | @brief libopencm3 LPC43xx System Control Unit 6 | 7 | @version 1.0.0 8 | 9 | @author @htmlonly © @endhtmlonly 2012 Benjamin Vernoux 10 | 11 | LGPL License Terms @ref lgpl_license 12 | */ 13 | 14 | /* 15 | * This file is part of the libopencm3 project. 16 | * 17 | * Copyright (C) 2012 Benjamin Vernoux 18 | * 19 | * This library is free software: you can redistribute it and/or modify 20 | * it under the terms of the GNU Lesser General Public License as published by 21 | * the Free Software Foundation, either version 3 of the License, or 22 | * (at your option) any later version. 23 | * 24 | * This library is distributed in the hope that it will be useful, 25 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 26 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 27 | * GNU Lesser General Public License for more details. 28 | * 29 | * You should have received a copy of the GNU Lesser General Public License 30 | * along with this library. If not, see . 31 | */ 32 | 33 | /**@{*/ 34 | 35 | #include 36 | 37 | /* For pin_conf_normal value see scu.h define SCU_CONF_XXX or Configuration for 38 | * different I/O pins types 39 | */ 40 | void scu_pinmux(scu_grp_pin_t group_pin, uint32_t scu_conf) 41 | { 42 | MMIO32(group_pin) = scu_conf; 43 | } 44 | 45 | /* For other special SCU register USB1, I2C0, ADC0/1, DAC, EMC clock delay See 46 | * scu.h 47 | */ 48 | 49 | /* For Pin interrupt select register see scu.h SCU_PINTSEL0 & SCU_PINTSEL1 */ 50 | 51 | /**@}*/ 52 | 53 | -------------------------------------------------------------------------------- /libopencm3/lib/lpc43xx/timer.c: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the libopencm3 project. 3 | * 4 | * Copyright (C) 2013 Ben Gamari 5 | * 6 | * This library is free software: you can redistribute it and/or modify 7 | * it under the terms of the GNU Lesser General Public License as published by 8 | * the Free Software Foundation, either version 3 of the License, or 9 | * (at your option) any later version. 10 | * 11 | * This library is distributed in the hope that it will be useful, 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | * GNU Lesser General Public License for more details. 15 | * 16 | * You should have received a copy of the GNU Lesser General Public License 17 | * along with this library. If not, see . 18 | * 19 | * This provides the code for the "next gen" EXTI block provided in F2/F4/L1 20 | * devices. (differences only in the source selection) 21 | */ 22 | 23 | #include 24 | 25 | void timer_reset(uint32_t timer_peripheral) 26 | { 27 | TIMER_TCR(timer_peripheral) |= TIMER_TCR_CRST; 28 | TIMER_TCR(timer_peripheral) &= ~TIMER_TCR_CRST; 29 | } 30 | 31 | void timer_enable_counter(uint32_t timer_peripheral) 32 | { 33 | TIMER_TCR(timer_peripheral) |= TIMER_TCR_CEN; 34 | } 35 | 36 | void timer_disable_counter(uint32_t timer_peripheral) 37 | { 38 | TIMER_TCR(timer_peripheral) &= ~TIMER_TCR_CEN; 39 | } 40 | 41 | void timer_set_counter(uint32_t timer_peripheral, uint32_t count) 42 | { 43 | TIMER_TC(timer_peripheral) = count; 44 | } 45 | 46 | uint32_t timer_get_counter(uint32_t timer_peripheral) 47 | { 48 | return TIMER_TC(timer_peripheral); 49 | } 50 | 51 | uint32_t timer_get_prescaler(uint32_t timer_peripheral) 52 | { 53 | return TIMER_PR(timer_peripheral); 54 | } 55 | 56 | void timer_set_prescaler(uint32_t timer_peripheral, uint32_t prescaler) 57 | { 58 | TIMER_PR(timer_peripheral) = prescaler; 59 | } 60 | 61 | void timer_set_mode(uint32_t timer_peripheral, uint32_t mode) 62 | { 63 | TIMER_CTCR(timer_peripheral) = mode | 64 | (TIMER_CTCR(timer_peripheral) & TIMER_CTCR_MODE_MASK); 65 | } 66 | 67 | void timer_set_count_input(uint32_t timer_peripheral, uint32_t input) 68 | { 69 | TIMER_CTCR(timer_peripheral) = input | 70 | (TIMER_CTCR(timer_peripheral) & TIMER_CTCR_CINSEL_MASK); 71 | } 72 | 73 | -------------------------------------------------------------------------------- /libopencm3/locm3.sublime-project: -------------------------------------------------------------------------------- 1 | { 2 | "folders": 3 | [ 4 | { 5 | "path": ".", 6 | "file_exclude_patterns": 7 | [ 8 | "*.o", 9 | "*.a", 10 | "*.d", 11 | "*.sublime-project", 12 | "*.sublime-workspace", 13 | "*.swp" 14 | ], 15 | "folder_exclude_patterns": 16 | [ 17 | ] 18 | } 19 | ], 20 | "settings": 21 | { 22 | "tab_size": 8, 23 | "translate_tabs_to_spaces": false, 24 | "rulers": [80] 25 | }, 26 | "build_systems": 27 | [ 28 | { 29 | "name": "libopencm3", 30 | "working_dir": "${project_path}", 31 | "file_regex": "^(..[^:]*):([0-9]+):?([0-9]+)?:? (.*)$", 32 | "cmd": ["make"] 33 | } 34 | ] 35 | } 36 | -------------------------------------------------------------------------------- /libopencm3/scripts/black_magic_probe_debug.scr: -------------------------------------------------------------------------------- 1 | monitor version 2 | monitor swdp_scan 3 | attach 1 4 | run 5 | -------------------------------------------------------------------------------- /libopencm3/scripts/black_magic_probe_flash.scr: -------------------------------------------------------------------------------- 1 | monitor version 2 | monitor swdp_scan 3 | attach 1 4 | load 5 | -------------------------------------------------------------------------------- /libopencm3/scripts/data/lpc43xx/README: -------------------------------------------------------------------------------- 1 | These files contain information derived from the LPC43xx user manual (UM10503). 2 | They are intended to be used by scripts for the generation of header files and 3 | functions. 4 | 5 | Each line describes a field within a register. The comma separated values are: 6 | register name (as found in include/lpc43xx/*.h), 7 | bit position, 8 | length in bits, 9 | field name, 10 | description/comment (may be empty if not specified in data sheet), 11 | reset value (may be empty if not specified in data sheet), 12 | access (may be empty if not specified in data sheet) 13 | 14 | The access field may consist of any of the following codes: 15 | r: read only 16 | rw: read/write 17 | rwc: read/write one to clear 18 | rwo: read/write once 19 | rws: read/write one to set 20 | w: write only 21 | ws: write one to set 22 | 23 | Descriptions containing commas are quoted. 24 | -------------------------------------------------------------------------------- /libopencm3/scripts/data/lpc43xx/atimer.csv: -------------------------------------------------------------------------------- 1 | ATIMER_DOWNCOUNTER,0,16,CVAL,When equal to zero an interrupt is raised,0,rw 2 | ATIMER_PRESET,0,16,PRESETVAL,Value loaded in DOWNCOUNTER when DOWNCOUNTER equals zero,0,rw 3 | ATIMER_CLR_EN,0,1,CLR_EN,Writing a 1 to this bit clears the interrupt enable bit in the ENABLE register,0,w 4 | ATIMER_SET_EN,0,1,SET_EN,Writing a 1 to this bit sets the interrupt enable bit in the ENABLE register,0,w 5 | ATIMER_STATUS,0,1,STAT,A 1 in this bit shows that the STATUS interrupt has been raised,0,r 6 | ATIMER_ENABLE,0,1,ENA,A 1 in this bit shows that the STATUS interrupt has been enabled and that the STATUS interrupt request signal is asserted when STAT = 1 in the STATUS register,0,r 7 | ATIMER_CLR_STAT,0,1,CSTAT,Writing a 1 to this bit clears the STATUS interrupt bit in the STATUS register,0,w 8 | ATIMER_SET_STAT,0,1,SSTAT,Writing a 1 to this bit sets the STATUS interrupt bit in the STATUS register,0,w 9 | -------------------------------------------------------------------------------- /libopencm3/scripts/data/lpc43xx/atimer.yaml: -------------------------------------------------------------------------------- 1 | !!omap 2 | - ATIMER_DOWNCOUNTER: 3 | fields: !!omap 4 | - CVAL: 5 | access: rw 6 | description: When equal to zero an interrupt is raised 7 | lsb: 0 8 | reset_value: '0' 9 | width: 16 10 | - ATIMER_PRESET: 11 | fields: !!omap 12 | - PRESETVAL: 13 | access: rw 14 | description: Value loaded in DOWNCOUNTER when DOWNCOUNTER equals zero 15 | lsb: 0 16 | reset_value: '0' 17 | width: 16 18 | - ATIMER_CLR_EN: 19 | fields: !!omap 20 | - CLR_EN: 21 | access: w 22 | description: Writing a 1 to this bit clears the interrupt enable bit in the 23 | ENABLE register 24 | lsb: 0 25 | reset_value: '0' 26 | width: 1 27 | - ATIMER_SET_EN: 28 | fields: !!omap 29 | - SET_EN: 30 | access: w 31 | description: Writing a 1 to this bit sets the interrupt enable bit in the 32 | ENABLE register 33 | lsb: 0 34 | reset_value: '0' 35 | width: 1 36 | - ATIMER_STATUS: 37 | fields: !!omap 38 | - STAT: 39 | access: r 40 | description: A 1 in this bit shows that the STATUS interrupt has been raised 41 | lsb: 0 42 | reset_value: '0' 43 | width: 1 44 | - ATIMER_ENABLE: 45 | fields: !!omap 46 | - ENA: 47 | access: r 48 | description: A 1 in this bit shows that the STATUS interrupt has been enabled 49 | and that the STATUS interrupt request signal is asserted when STAT = 1 in 50 | the STATUS register 51 | lsb: 0 52 | reset_value: '0' 53 | width: 1 54 | - ATIMER_CLR_STAT: 55 | fields: !!omap 56 | - CSTAT: 57 | access: w 58 | description: Writing a 1 to this bit clears the STATUS interrupt bit in the 59 | STATUS register 60 | lsb: 0 61 | reset_value: '0' 62 | width: 1 63 | - ATIMER_SET_STAT: 64 | fields: !!omap 65 | - SSTAT: 66 | access: w 67 | description: Writing a 1 to this bit sets the STATUS interrupt bit in the 68 | STATUS register 69 | lsb: 0 70 | reset_value: '0' 71 | width: 1 72 | -------------------------------------------------------------------------------- /libopencm3/scripts/data/lpc43xx/creg.csv: -------------------------------------------------------------------------------- 1 | CREG_CREG0,0,1,EN1KHZ,Enable 1 kHz output,0,rw 2 | CREG_CREG0,1,1,EN32KHZ,Enable 32 kHz output,0,rw 3 | CREG_CREG0,2,1,RESET32KHZ,32 kHz oscillator reset,1,rw 4 | CREG_CREG0,3,1,PD32KHZ,32 kHz power control,1,rw 5 | CREG_CREG0,5,1,USB0PHY,USB0 PHY power control,1,rw 6 | CREG_CREG0,6,2,ALARMCTRL,RTC_ALARM pin output control,0,rw 7 | CREG_CREG0,8,2,BODLVL1,BOD trip level to generate an interrupt,0x3,rw 8 | CREG_CREG0,10,2,BODLVL2,BOD trip level to generate a reset,0x3,rw 9 | CREG_CREG0,12,2,SAMPLECTRL,SAMPLE pin input/output control,0,rw 10 | CREG_CREG0,14,2,WAKEUP0CTRL,WAKEUP0 pin input/output control,0,rw 11 | CREG_CREG0,16,2,WAKEUP1CTRL,WAKEUP1 pin input/output control,0,rw 12 | CREG_M4MEMMAP,12,20,M4MAP,Shadow address when accessing memory at address 0x00000000,0x10400000,rw 13 | CREG_CREG5,6,1,M4TAPSEL,JTAG debug select for M4 core,1,rw 14 | CREG_CREG5,9,1,M0APPTAPSEL,JTAG debug select for M0 co-processor,1,rw 15 | CREG_DMAMUX,0,2,DMAMUXPER0,Select DMA to peripheral connection for DMA peripheral 0,0,rw 16 | CREG_DMAMUX,2,2,DMAMUXPER1,Select DMA to peripheral connection for DMA peripheral 1,0,rw 17 | CREG_DMAMUX,4,2,DMAMUXPER2,Select DMA to peripheral connection for DMA peripheral 2,0,rw 18 | CREG_DMAMUX,6,2,DMAMUXPER3,Select DMA to peripheral connection for DMA peripheral 3,0,rw 19 | CREG_DMAMUX,8,2,DMAMUXPER4,Select DMA to peripheral connection for DMA peripheral 4,0,rw 20 | CREG_DMAMUX,10,2,DMAMUXPER5,Select DMA to peripheral connection for DMA peripheral 5,0,rw 21 | CREG_DMAMUX,12,2,DMAMUXPER6,Select DMA to peripheral connection for DMA peripheral 6,0,rw 22 | CREG_DMAMUX,14,2,DMAMUXPER7,Select DMA to peripheral connection for DMA peripheral 7,0,rw 23 | CREG_DMAMUX,16,2,DMAMUXPER8,Select DMA to peripheral connection for DMA peripheral 8,0,rw 24 | CREG_DMAMUX,18,2,DMAMUXPER9,Select DMA to peripheral connection for DMA peripheral 9,0,rw 25 | CREG_DMAMUX,20,2,DMAMUXPER10,Select DMA to peripheral connection for DMA peripheral 10,0,rw 26 | CREG_DMAMUX,22,2,DMAMUXPER11,Select DMA to peripheral connection for DMA peripheral 11,0,rw 27 | CREG_DMAMUX,24,2,DMAMUXPER12,Select DMA to peripheral connection for DMA peripheral 12,0,rw 28 | CREG_DMAMUX,26,2,DMAMUXPER13,Select DMA to peripheral connection for DMA peripheral 13,0,rw 29 | CREG_DMAMUX,28,2,DMAMUXPER14,Select DMA to peripheral connection for DMA peripheral 14,0,rw 30 | CREG_DMAMUX,30,2,DMAMUXPER15,Select DMA to peripheral connection for DMA peripheral 15,0,rw 31 | CREG_FLASHCFGA,12,4,FLASHTIM,Flash access time. The value of this field plus 1 gives the number of BASE_M4_CLK clocks used for a flash access,,rw 32 | CREG_FLASHCFGA,31,1,POW,Flash bank A power control,1,rw 33 | CREG_FLASHCFGB,12,4,FLASHTIM,Flash access time. The value of this field plus 1 gives the number of BASE_M4_CLK clocks used for a flash access,,rw 34 | CREG_FLASHCFGB,31,1,POW,Flash bank B power control,1,rw 35 | CREG_ETBCFG,0,1,ETB,Select SRAM interface,1,rw 36 | CREG_CREG6,0,3,ETHMODE,Selects the Ethernet mode. Reset the ethernet after changing the PHY interface,,rw 37 | CREG_CREG6,4,1,CTOUTCTRL,Selects the functionality of the SCT outputs,0,rw 38 | CREG_CREG6,12,1,I2S0_TX_SCK_IN_SEL,I2S0_TX_SCK input select,0,rw 39 | CREG_CREG6,13,1,I2S0_RX_SCK_IN_SEL,I2S0_RX_SCK input select,0,rw 40 | CREG_CREG6,14,1,I2S1_TX_SCK_IN_SEL,I2S1_TX_SCK input select,0,rw 41 | CREG_CREG6,15,1,I2S1_RX_SCK_IN_SEL,I2S1_RX_SCK input select,0,rw 42 | CREG_CREG6,16,1,EMC_CLK_SEL,EMC_CLK divided clock select,0,rw 43 | CREG_M4TXEVENT,0,1,TXEVCLR,Cortex-M4 TXEV event,0,rw 44 | CREG_M0TXEVENT,0,1,TXEVCLR,Cortex-M0 TXEV event,0,rw 45 | CREG_M0APPMEMMAP,12,20,M0APPMAP,Shadow address when accessing memory at address 0x00000000,0x20000000,rw 46 | CREG_USB0FLADJ,0,6,FLTV,Frame length timing value,0x20,rw 47 | CREG_USB1FLADJ,0,6,FLTV,Frame length timing value,0x20,rw 48 | -------------------------------------------------------------------------------- /libopencm3/scripts/data/lpc43xx/csv2yaml.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | 3 | import sys 4 | import yaml 5 | import csv 6 | from collections import OrderedDict 7 | import yaml_odict 8 | 9 | def convert_file(fname): 10 | reader = csv.reader(open(fname, 'r')) 11 | 12 | registers = OrderedDict() 13 | for register_name, lsb, width, field_name, description, reset_value, access in reader: 14 | if register_name not in registers: 15 | registers[register_name] = { 16 | 'fields': OrderedDict(), 17 | } 18 | 19 | register = registers[register_name] 20 | fields = register['fields'] 21 | if field_name in fields: 22 | raise RuntimeError('Duplicate field name "%s" in register "%s"' % 23 | field_name, register_name) 24 | else: 25 | fields[field_name] = { 26 | 'lsb': int(lsb), 27 | 'width': int(width), 28 | 'description': description, 29 | 'reset_value': reset_value, 30 | 'access': access, 31 | } 32 | 33 | with open(fname.replace('.csv', '.yaml'), 'w') as out_file: 34 | yaml.dump(registers, out_file, default_flow_style=False) 35 | 36 | for fname in sys.argv[1:]: 37 | convert_file(fname) 38 | -------------------------------------------------------------------------------- /libopencm3/scripts/data/lpc43xx/gen.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | 3 | import sys 4 | import yaml 5 | import yaml_odict 6 | from collections import OrderedDict 7 | 8 | from pprint import pprint 9 | 10 | registers = yaml.load(open(sys.argv[1], 'r')) 11 | 12 | for register_name, register in registers.iteritems(): 13 | print('/* --- %s values %s */' % (register_name, '-' * (50 - len(register_name)))) 14 | print 15 | fields = register['fields'] 16 | #for field_name, field in sorted(fields.items(), lambda x, y: cmp(x[1]['lsb'], y[1]['lsb'])): 17 | for field_name, field in fields.items(): 18 | mask_bits = (1 << field['width']) - 1 19 | print('/* %s: %s */' % (field_name, field['description'])) 20 | print('#define %s_%s_SHIFT (%d)' % ( 21 | register_name, field_name, field['lsb'], 22 | )) 23 | print('#define %s_%s_MASK (0x%x << %s_%s_SHIFT)' % ( 24 | register_name, field_name, mask_bits, register_name, field_name, 25 | )) 26 | print('#define %s_%s(x) ((x) << %s_%s_SHIFT)' % ( 27 | register_name, field_name, register_name, field_name, 28 | )) 29 | print 30 | -------------------------------------------------------------------------------- /libopencm3/scripts/data/lpc43xx/i2c.csv: -------------------------------------------------------------------------------- 1 | I2C0_CONSET,2,1,AA,Assert acknowledge flag,0,rw 2 | I2C0_CONSET,3,1,SI,I2C interrupt flag,0,rw 3 | I2C0_CONSET,4,1,STO,STOP flag,0,rw 4 | I2C0_CONSET,5,1,STA,START flag,0,rw 5 | I2C0_CONSET,6,1,I2EN,I2C interface enable,0,rw 6 | I2C1_CONSET,2,1,AA,Assert acknowledge flag,0,rw 7 | I2C1_CONSET,3,1,SI,I2C interrupt flag,0,rw 8 | I2C1_CONSET,4,1,STO,STOP flag,0,rw 9 | I2C1_CONSET,5,1,STA,START flag,0,rw 10 | I2C1_CONSET,6,1,I2EN,I2C interface enable,0,rw 11 | I2C0_STAT,3,5,STATUS,These bits give the actual status information about the I2C interface,0x1f,r 12 | I2C1_STAT,3,5,STATUS,These bits give the actual status information about the I2C interface,0x1f,r 13 | I2C0_DAT,0,8,DATA,This register holds data values that have been received or are to be transmitted,0,rw 14 | I2C1_DAT,0,8,DATA,This register holds data values that have been received or are to be transmitted,0,rw 15 | I2C0_ADR0,0,1,GC,General Call enable bit,0,rw 16 | I2C0_ADR0,1,7,ADDRESS,The I2C device address for slave mode,0,rw 17 | I2C1_ADR0,0,1,GC,General Call enable bit,0,rw 18 | I2C1_ADR0,1,7,ADDRESS,The I2C device address for slave mode,0,rw 19 | I2C0_SCLH,0,16,SCLH,Count for SCL HIGH time period selection,0x0004,rw 20 | I2C1_SCLH,0,16,SCLH,Count for SCL HIGH time period selection,0x0004,rw 21 | I2C0_SCLL,0,16,SCLL,Count for SCL LOW time period selection,0x0004,rw 22 | I2C1_SCLL,0,16,SCLL,Count for SCL LOW time period selection,0x0004,rw 23 | I2C0_CONCLR,2,1,AAC,Assert acknowledge Clear bit,0,w 24 | I2C0_CONCLR,3,1,SIC,I2C interrupt Clear bit,0,w 25 | I2C0_CONCLR,5,1,STAC,START flag Clear bit,0,w 26 | I2C0_CONCLR,6,1,I2ENC,I2C interface Disable bit,0,w 27 | I2C1_CONCLR,2,1,AAC,Assert acknowledge Clear bit,0,w 28 | I2C1_CONCLR,3,1,SIC,I2C interrupt Clear bit,0,w 29 | I2C1_CONCLR,5,1,STAC,START flag Clear bit,0,w 30 | I2C1_CONCLR,6,1,I2ENC,I2C interface Disable bit,0,w 31 | I2C0_MMCTRL,0,1,MM_ENA,Monitor mode enable,0,rw 32 | I2C0_MMCTRL,1,1,ENA_SCL,SCL output enable,0,rw 33 | I2C0_MMCTRL,2,1,MATCH_ALL,Select interrupt register match,0,rw 34 | I2C1_MMCTRL,0,1,MM_ENA,Monitor mode enable,0,rw 35 | I2C1_MMCTRL,1,1,ENA_SCL,SCL output enable,0,rw 36 | I2C1_MMCTRL,2,1,MATCH_ALL,Select interrupt register match,0,rw 37 | I2C0_ADR1,0,1,GC,General Call enable bit,0,rw 38 | I2C0_ADR1,1,7,ADDRESS,The I2C device address for slave mode,0,rw 39 | I2C1_ADR1,0,1,GC,General Call enable bit,0,rw 40 | I2C1_ADR1,1,7,ADDRESS,The I2C device address for slave mode,0,rw 41 | I2C0_ADR2,0,1,GC,General Call enable bit,0,rw 42 | I2C0_ADR2,1,7,ADDRESS,The I2C device address for slave mode,0,rw 43 | I2C1_ADR2,0,1,GC,General Call enable bit,0,rw 44 | I2C1_ADR2,1,7,ADDRESS,The I2C device address for slave mode,0,rw 45 | I2C0_ADR3,0,1,GC,General Call enable bit,0,rw 46 | I2C0_ADR3,1,7,ADDRESS,The I2C device address for slave mode,0,rw 47 | I2C1_ADR3,0,1,GC,General Call enable bit,0,rw 48 | I2C1_ADR3,1,7,ADDRESS,The I2C device address for slave mode,0,rw 49 | I2C0_DATA_BUFFER,0,8,DATA,This register holds contents of the 8 MSBs of the DAT shift register,0,r 50 | I2C1_DATA_BUFFER,0,8,DATA,This register holds contents of the 8 MSBs of the DAT shift register,0,r 51 | I2C0_MASK0,1,7,MASK,Mask bits,0,rw 52 | I2C1_MASK0,1,7,MASK,Mask bits,0,rw 53 | I2C0_MASK1,1,7,MASK,Mask bits,0,rw 54 | I2C1_MASK1,1,7,MASK,Mask bits,0,rw 55 | I2C0_MASK2,1,7,MASK,Mask bits,0,rw 56 | I2C1_MASK2,1,7,MASK,Mask bits,0,rw 57 | I2C0_MASK3,1,7,MASK,Mask bits,0,rw 58 | I2C1_MASK3,1,7,MASK,Mask bits,0,rw 59 | -------------------------------------------------------------------------------- /libopencm3/scripts/data/lpc43xx/ritimer.csv: -------------------------------------------------------------------------------- 1 | RITIMER_COMPVAL,0,32,RICOMP,Compare register,0xFFFFFFFF,rw 2 | RITIMER_MASK,0,32,RIMASK,Mask register,0,rw 3 | RITIMER_CTRL,0,1,RITINT,Interrupt flag,0,rw 4 | RITIMER_CTRL,1,1,RITENCLR,Timer enable clear,0,rw 5 | RITIMER_CTRL,2,1,RITENBR,Timer enable for debug,1,rw 6 | RITIMER_CTRL,3,1,RITEN,Timer enable,1,rw 7 | RITIMER_COUNTER,0,32,RICOUNTER,32-bit up counter,0,rw 8 | -------------------------------------------------------------------------------- /libopencm3/scripts/data/lpc43xx/ritimer.yaml: -------------------------------------------------------------------------------- 1 | !!omap 2 | - RITIMER_COMPVAL: 3 | fields: !!omap 4 | - RICOMP: 5 | access: rw 6 | description: Compare register 7 | lsb: 0 8 | reset_value: '0xFFFFFFFF' 9 | width: 32 10 | - RITIMER_MASK: 11 | fields: !!omap 12 | - RIMASK: 13 | access: rw 14 | description: Mask register 15 | lsb: 0 16 | reset_value: '0' 17 | width: 32 18 | - RITIMER_CTRL: 19 | fields: !!omap 20 | - RITINT: 21 | access: rw 22 | description: Interrupt flag 23 | lsb: 0 24 | reset_value: '0' 25 | width: 1 26 | - RITENCLR: 27 | access: rw 28 | description: Timer enable clear 29 | lsb: 1 30 | reset_value: '0' 31 | width: 1 32 | - RITENBR: 33 | access: rw 34 | description: Timer enable for debug 35 | lsb: 2 36 | reset_value: '1' 37 | width: 1 38 | - RITEN: 39 | access: rw 40 | description: Timer enable 41 | lsb: 3 42 | reset_value: '1' 43 | width: 1 44 | - RITIMER_COUNTER: 45 | fields: !!omap 46 | - RICOUNTER: 47 | access: rw 48 | description: 32-bit up counter 49 | lsb: 0 50 | reset_value: '0' 51 | width: 32 52 | -------------------------------------------------------------------------------- /libopencm3/scripts/data/lpc43xx/yaml_odict.py: -------------------------------------------------------------------------------- 1 | import yaml 2 | from collections import OrderedDict 3 | def construct_odict(load, node): 4 | """This is the same as SafeConstructor.construct_yaml_omap(), 5 | except the data type is changed to OrderedDict() and setitem is 6 | used instead of append in the loop. 7 | 8 | >>> yaml.load(''' 9 | ... !!omap 10 | ... - foo: bar 11 | ... - mumble: quux 12 | ... - baz: gorp 13 | ... ''') 14 | OrderedDict([('foo', 'bar'), ('mumble', 'quux'), ('baz', 'gorp')]) 15 | 16 | >>> yaml.load('''!!omap [ foo: bar, mumble: quux, baz : gorp ]''') 17 | OrderedDict([('foo', 'bar'), ('mumble', 'quux'), ('baz', 'gorp')]) 18 | """ 19 | 20 | omap = OrderedDict() 21 | yield omap 22 | if not isinstance(node, yaml.SequenceNode): 23 | raise yaml.constructor.ConstructorError( 24 | "while constructing an ordered map", 25 | node.start_mark, 26 | "expected a sequence, but found %s" % node.id, node.start_mark 27 | ) 28 | for subnode in node.value: 29 | if not isinstance(subnode, yaml.MappingNode): 30 | raise yaml.constructor.ConstructorError( 31 | "while constructing an ordered map", node.start_mark, 32 | "expected a mapping of length 1, but found %s" % subnode.id, 33 | subnode.start_mark 34 | ) 35 | if len(subnode.value) != 1: 36 | raise yaml.constructor.ConstructorError( 37 | "while constructing an ordered map", node.start_mark, 38 | "expected a single mapping item, but found %d items" % len(subnode.value), 39 | subnode.start_mark 40 | ) 41 | key_node, value_node = subnode.value[0] 42 | key = load.construct_object(key_node) 43 | value = load.construct_object(value_node) 44 | omap[key] = value 45 | 46 | yaml.add_constructor(u'tag:yaml.org,2002:omap', construct_odict) 47 | 48 | def repr_pairs(dump, tag, sequence, flow_style=None): 49 | """This is the same code as BaseRepresenter.represent_sequence(), 50 | but the value passed to dump.represent_data() in the loop is a 51 | dictionary instead of a tuple.""" 52 | 53 | value = [] 54 | node = yaml.SequenceNode(tag, value, flow_style=flow_style) 55 | if dump.alias_key is not None: 56 | dump.represented_objects[dump.alias_key] = node 57 | best_style = True 58 | for (key, val) in sequence: 59 | item = dump.represent_data({key: val}) 60 | if not (isinstance(item, yaml.ScalarNode) and not item.style): 61 | best_style = False 62 | value.append(item) 63 | if flow_style is None: 64 | if dump.default_flow_style is not None: 65 | node.flow_style = dump.default_flow_style 66 | else: 67 | node.flow_style = best_style 68 | return node 69 | 70 | def repr_odict(dumper, data): 71 | """ 72 | >>> data = OrderedDict([('foo', 'bar'), ('mumble', 'quux'), ('baz', 'gorp')]) 73 | >>> yaml.dump(data, default_flow_style=False) 74 | '!!omap\\n- foo: bar\\n- mumble: quux\\n- baz: gorp\\n' 75 | >>> yaml.dump(data, default_flow_style=True) 76 | '!!omap [foo: bar, mumble: quux, baz: gorp]\\n' 77 | """ 78 | return repr_pairs(dumper, u'tag:yaml.org,2002:omap', data.iteritems()) 79 | 80 | yaml.add_representer(OrderedDict, repr_odict) 81 | 82 | -------------------------------------------------------------------------------- /scripts/airspy_fw-version.py: -------------------------------------------------------------------------------- 1 | import sys 2 | from optparse import OptionParser 3 | from datetime import * 4 | from git import * 5 | 6 | if __name__=="__main__": 7 | usage = """ 8 | %prog outfile.txt""" 9 | 10 | parser = OptionParser(usage=usage) 11 | (options, args) = parser.parse_args() 12 | if len(args)==1: 13 | sys.stdout = open(args[0], 'w') 14 | git=Repo(search_parent_directories=True).git 15 | print('#define AIRSPY_FW_GIT_TAG "' + git.describe(tags=True,always=True,dirty=True,long=True) + '"') 16 | print('#define AIRSPY_FW_CHECKIN_DATE "' + git.show(['-s', '--pretty=format:%ai']).partition(' ')[0] + '"') 17 | else: 18 | parser.print_help() 19 | sys.exit(1) 20 | --------------------------------------------------------------------------------