├── README ├── dconv ├── README ├── dconv.go ├── dmp_reader.go ├── dsq_reader.go ├── dsq_writer.go ├── hex_reader.go └── hex_writer.go ├── diseqc2 ├── .cproject ├── .project ├── .settings │ └── language.settings.xml ├── README ├── cmd.c ├── diseqc.c ├── diseqc.h ├── linker.ld ├── newlib_stubs.c ├── startup.S ├── system │ ├── include │ │ ├── cmsis │ │ │ ├── README_DEVICE.txt │ │ │ ├── arm_common_tables.h │ │ │ ├── arm_const_structs.h │ │ │ ├── arm_math.h │ │ │ ├── cmsis_armcc.h │ │ │ ├── cmsis_armcc_V6.h │ │ │ ├── cmsis_device.h │ │ │ ├── cmsis_gcc.h │ │ │ ├── core_cm0.h │ │ │ ├── core_cm0plus.h │ │ │ ├── core_cm3.h │ │ │ ├── core_cm4.h │ │ │ ├── core_cm7.h │ │ │ ├── core_cmFunc.h │ │ │ ├── core_cmInstr.h │ │ │ ├── core_cmSimd.h │ │ │ ├── core_sc000.h │ │ │ └── core_sc300.h │ │ ├── stm32f0-stdperiph │ │ │ ├── stm32f0xx_adc.h │ │ │ ├── stm32f0xx_can.h │ │ │ ├── stm32f0xx_cec.h │ │ │ ├── stm32f0xx_comp.h │ │ │ ├── stm32f0xx_conf.h │ │ │ ├── stm32f0xx_crc.h │ │ │ ├── stm32f0xx_crs.h │ │ │ ├── stm32f0xx_dac.h │ │ │ ├── stm32f0xx_dbgmcu.h │ │ │ ├── stm32f0xx_dma.h │ │ │ ├── stm32f0xx_exti.h │ │ │ ├── stm32f0xx_flash.h │ │ │ ├── stm32f0xx_gpio.h │ │ │ ├── stm32f0xx_i2c.h │ │ │ ├── stm32f0xx_iwdg.h │ │ │ ├── stm32f0xx_misc.h │ │ │ ├── stm32f0xx_pwr.h │ │ │ ├── stm32f0xx_rcc.h │ │ │ ├── stm32f0xx_rtc.h │ │ │ ├── stm32f0xx_spi.h │ │ │ ├── stm32f0xx_syscfg.h │ │ │ ├── stm32f0xx_tim.h │ │ │ ├── stm32f0xx_usart.h │ │ │ └── stm32f0xx_wwdg.h │ │ ├── stm32f0xx.h │ │ └── usb │ │ │ ├── usb_bsp.h │ │ │ ├── usb_conf.h │ │ │ ├── usb_core.h │ │ │ ├── usb_dcd.h │ │ │ ├── usb_dcd_int.h │ │ │ ├── usb_regs.h │ │ │ ├── usbd_conf.h │ │ │ ├── usbd_core.h │ │ │ ├── usbd_def.h │ │ │ ├── usbd_desc.h │ │ │ ├── usbd_ioreq.h │ │ │ ├── usbd_pwr.h │ │ │ └── usbd_req.h │ └── src │ │ ├── stm32f0-stdperiph │ │ ├── stm32f0xx_adc.c │ │ ├── stm32f0xx_can.c │ │ ├── stm32f0xx_cec.c │ │ ├── stm32f0xx_comp.c │ │ ├── stm32f0xx_crc.c │ │ ├── stm32f0xx_crs.c │ │ ├── stm32f0xx_dac.c │ │ ├── stm32f0xx_dbgmcu.c │ │ ├── stm32f0xx_dma.c │ │ ├── stm32f0xx_exti.c │ │ ├── stm32f0xx_flash.c │ │ ├── stm32f0xx_gpio.c │ │ ├── stm32f0xx_i2c.c │ │ ├── stm32f0xx_iwdg.c │ │ ├── stm32f0xx_misc.c │ │ ├── stm32f0xx_pwr.c │ │ ├── stm32f0xx_rcc.c │ │ ├── stm32f0xx_rtc.c │ │ ├── stm32f0xx_spi.c │ │ ├── stm32f0xx_syscfg.c │ │ ├── stm32f0xx_tim.c │ │ ├── stm32f0xx_usart.c │ │ └── stm32f0xx_wwdg.c │ │ └── usb │ │ ├── usb_bsp.c │ │ ├── usb_core.c │ │ ├── usb_dcd.c │ │ ├── usb_dcd_int.c │ │ ├── usbd_core.c │ │ ├── usbd_desc.c │ │ ├── usbd_ioreq.c │ │ ├── usbd_pwr.c │ │ └── usbd_req.c ├── usbcom.c └── usbcom.h ├── dsqsend ├── README └── senddsq.c └── hookdll └── mpusbapi.cpp /README: -------------------------------------------------------------------------------- 1 | This is a set of tools related to maxLinear Unicable II devices programming. 2 | 3 | hookdll - hook dll for snifiing exchange between original programmer and app. Windows c++ 4 | dconv - config formats converter. Go code 5 | dsqsend - sending diseqc sequences using STB card. Linux C code 6 | diseqc2 - diseqc firmware for STM32072B-DISCOVERY. Coretex-M0 ARM C code 7 | 8 | All tools have some issues, but i'm solved all my tasks. 9 | I'm has no time and i stop working on this project, so forking and future development is welcome! 10 | 11 | I will try to answering in Issues section, so if you has a question - welcome. 12 | -------------------------------------------------------------------------------- /dconv/README: -------------------------------------------------------------------------------- 1 | simple Go app for converting maxLinear configs. 2 | 3 | building: 4 | go build 5 | 6 | help: 7 | dconv -h 8 | 9 | example: 10 | cat /dev/ttyACM0 > dconv -it dmp -ot dsq -o myconfig.dsq 11 | this command take dump-stream from programmer, convert it to diseqc sequence and write to myconfig.dsq 12 | -------------------------------------------------------------------------------- /dconv/dconv.go: -------------------------------------------------------------------------------- 1 | package main 2 | 3 | import ( 4 | "flag" 5 | "fmt" 6 | "os" 7 | "io" 8 | ) 9 | 10 | func showerr(err error) { 11 | fmt.Fprintf(os.Stderr, "Error: %v\n", err) 12 | } 13 | 14 | func dclose(c io.Closer) { 15 | if err := c.Close(); err != nil { 16 | showerr(err) 17 | } 18 | } 19 | 20 | func run() (n int64, err error) { 21 | var ( 22 | r io.Reader 23 | w io.Writer 24 | ) 25 | 26 | inTypePtr := flag.String("it", "dmp", "Input file type. dsq | bin | dmp | hex") 27 | outTypePtr := flag.String("ot", "dsq", "Output file name. dsq | bin | hex") 28 | inNamePtr := flag.String("i", "", "Input file name. if omitted") 29 | outNamePtr := flag.String("o", "", "Output file name. if omitted") 30 | dsqLenPtr := flag.Int("l", 16, "Maximun length of diseqc command for dsq out") 31 | bufLenPtr := flag.Int("b", 1, "Copy buffer size") 32 | flag.Parse() 33 | 34 | inFile := os.Stdin 35 | if *inNamePtr != "" { 36 | if inFile, err = os.OpenFile(*inNamePtr, os.O_RDONLY, 0); err != nil { 37 | return 38 | } 39 | defer dclose(inFile) 40 | } 41 | 42 | outFile := os.Stdout 43 | if *outNamePtr != "" { 44 | if outFile, err = os.OpenFile(*outNamePtr, os.O_WRONLY | os.O_CREATE | os.O_TRUNC, 664); err != nil { 45 | return 46 | } 47 | defer dclose(outFile) 48 | } 49 | 50 | switch(*inTypePtr) { 51 | case "dsq": 52 | r = NewDsqReader(inFile) 53 | case "bin": 54 | r = inFile 55 | case "dmp": 56 | r = NewDmpReader(inFile) 57 | case "hex": 58 | r = NewHexReader(inFile) 59 | default: 60 | err = fmt.Errorf("Invalid input file type") 61 | } 62 | if err != nil { 63 | return 64 | } 65 | 66 | switch(*outTypePtr) { 67 | case "dsq": 68 | var writer *DsqWriter 69 | if writer, err = NewDsqWriter(outFile, *dsqLenPtr); err == nil { 70 | w = writer 71 | defer dclose(writer) 72 | } 73 | case "bin": 74 | w = outFile 75 | case "hex": 76 | var writer *HexWriter 77 | if writer, err = NewHexWriter(outFile, *dsqLenPtr); err == nil { 78 | w = writer 79 | defer dclose(writer) 80 | } 81 | default: 82 | err = fmt.Errorf("Invalid output file type") 83 | } 84 | if err != nil { 85 | return 86 | } 87 | 88 | if n, err = io.CopyBuffer(w, r, make([]byte, *bufLenPtr)); err != nil { 89 | return 90 | } 91 | 92 | return 93 | } 94 | 95 | func main() { 96 | if n, err := run(); err != nil { 97 | showerr(err) 98 | os.Exit(1) 99 | } else if n != 0x1c0 { 100 | fmt.Fprintf(os.Stderr, "Warning: we nedded 0x01C0 bytes, but has %04X\n", n) 101 | } 102 | } 103 | -------------------------------------------------------------------------------- /dconv/dmp_reader.go: -------------------------------------------------------------------------------- 1 | package main 2 | 3 | import ( 4 | "fmt" 5 | "io" 6 | ) 7 | 8 | const ( 9 | state_first = 0 10 | state_next = 1 11 | state_skip = 2 12 | ) 13 | 14 | type DmpReader struct { 15 | r io.Reader 16 | state int 17 | } 18 | 19 | func (self *DmpReader) Read(p []byte) (n int, err error) { 20 | for ; n < len(p) ; { 21 | var data byte 22 | if _, err = fmt.Fscanf(self.r, "%02X", &data); err != nil { 23 | if err.Error() != "unexpected newline" { 24 | break; 25 | } 26 | err = nil 27 | self.state = state_first 28 | } else { 29 | if self.state == state_first { 30 | if data == 0x74 { 31 | self.state = state_next 32 | } else { 33 | self.state = state_skip 34 | } 35 | } else if self.state == state_next { 36 | p[n] = data 37 | n++ 38 | } 39 | } 40 | } 41 | return 42 | } 43 | 44 | func NewDmpReader(r io.Reader) *DmpReader { 45 | return &DmpReader{r: r} 46 | } 47 | -------------------------------------------------------------------------------- /dconv/dsq_reader.go: -------------------------------------------------------------------------------- 1 | package main 2 | 3 | import ( 4 | "fmt" 5 | "io" 6 | ) 7 | 8 | type DsqReader struct { 9 | r io.Reader 10 | cnt int 11 | prev byte 12 | st int 13 | } 14 | 15 | const ( 16 | st_first = 0 17 | st_second = 1 18 | st_digit = 2 19 | st_skip = 3 20 | ) 21 | 22 | func (self *DsqReader) get() (data byte, err error) { 23 | for { 24 | if _, err = fmt.Fscanf(self.r, "%02X", &data); err != nil { 25 | if err.Error() != "unexpected newline" { 26 | break; 27 | } 28 | err = nil 29 | self.st = st_first 30 | } else { 31 | if self.st == st_digit { 32 | break 33 | } else if self.st == st_first { 34 | if data == 0x7F { 35 | self.st = st_second 36 | } else { 37 | self.st = st_skip 38 | } 39 | } else if self.st == st_second { 40 | if data == 0x10 { 41 | self.st = st_digit 42 | } else { 43 | self.st = st_skip 44 | } 45 | } 46 | } 47 | } 48 | return 49 | } 50 | 51 | func (self *DsqReader) Read(p []byte) (n int, err error) { 52 | var data byte 53 | for ; n < len(p) ; { 54 | if self.cnt > 0 { 55 | p[n] = self.prev 56 | n++ 57 | self.cnt-- 58 | } else if data, err = self.get(); err != nil { 59 | break; 60 | } else if self.cnt == -1 { 61 | self.cnt = (int)(data) 62 | } else { 63 | p[n] = data 64 | n++ 65 | if (self.cnt == -2) && (data == self.prev) { 66 | self.cnt = -1 67 | } else { 68 | self.cnt = -2 69 | self.prev = data 70 | } 71 | } 72 | } 73 | return 74 | } 75 | 76 | func NewDsqReader(r io.Reader) *DsqReader { 77 | return &DsqReader{r: r} 78 | } 79 | -------------------------------------------------------------------------------- /dconv/dsq_writer.go: -------------------------------------------------------------------------------- 1 | package main 2 | 3 | import ( 4 | "fmt" 5 | "io" 6 | ) 7 | 8 | type DsqWriter struct { 9 | w io.Writer 10 | maxLen int 11 | outCount int 12 | prev byte 13 | repCount int 14 | } 15 | 16 | func (self *DsqWriter) out(data byte) (err error) { 17 | if self.outCount % (self.maxLen - 2) == 0 { 18 | _, err = fmt.Fprintf(self.w, "\n7F 10 %02X", data) 19 | } else { 20 | _, err = fmt.Fprintf(self.w, " %02X", data) 21 | } 22 | self.outCount++ 23 | return 24 | } 25 | 26 | //CNTIN 0 1 >1 27 | //SAME CNT++ CNT++ 28 | // OUT 29 | //DIFFER CNTOUT 30 | // CNT=1 CNT=1 CNT=1 31 | // PRV=CUR PRV=CUR PRV=CUR 32 | // OUT OUT OUT 33 | 34 | func (self *DsqWriter) put(data byte) error { 35 | switch { 36 | case (self.repCount > 0) && (data == self.prev) : 37 | if self.repCount == 1 { 38 | self.repCount++ 39 | break 40 | } 41 | if self.repCount < 257 { 42 | self.repCount++ 43 | return nil 44 | } 45 | fallthrough 46 | default: 47 | if self.repCount > 1 { 48 | if err := self.out((byte)(self.repCount - 2)); err != nil { 49 | return err 50 | } 51 | } 52 | self.repCount = 1 53 | self.prev = data 54 | } 55 | return self.out(data) 56 | } 57 | 58 | func (self *DsqWriter) Write(p []byte) (n int, err error) { 59 | for _, data := range p { 60 | if err = self.put(data); err != nil { 61 | break 62 | } 63 | n++ 64 | } 65 | return 66 | } 67 | 68 | func (self *DsqWriter) Close() (err error) { 69 | if self.repCount > 1 { 70 | if err = self.out((byte)(self.repCount - 2)); err != nil { 71 | return 72 | } 73 | } 74 | 75 | _, err = fmt.Fprintf(self.w, "\n7F 20 00 %02X %02X\n", (byte)(self.outCount / 256), (byte)(self.outCount % 256)) 76 | return 77 | } 78 | 79 | func NewDsqWriter(w io.Writer, maxLen int) (*DsqWriter, error) { 80 | if (maxLen < 3) || (maxLen > 32) { 81 | return nil, fmt.Errorf("Invalid dsq command length : %d", maxLen) 82 | } 83 | 84 | if _, err := fmt.Fprintf(w, "7F 04 00 00 00"); err != nil { 85 | return nil, err 86 | } 87 | 88 | return &DsqWriter{w: w, maxLen: maxLen}, nil 89 | } 90 | -------------------------------------------------------------------------------- /dconv/hex_reader.go: -------------------------------------------------------------------------------- 1 | package main 2 | 3 | import ( 4 | "fmt" 5 | "io" 6 | ) 7 | 8 | type HexReader struct { 9 | r io.Reader 10 | } 11 | 12 | func (self *HexReader) Read(p []byte) (n int, err error) { 13 | for ; n < len(p) ; { 14 | var data byte 15 | if _, err = fmt.Fscanf(self.r, "%02X", &data); err != nil { 16 | if err.Error() != "unexpected newline" { 17 | break; 18 | } 19 | err = nil 20 | } else { 21 | p[n] = data 22 | n++ 23 | } 24 | } 25 | return 26 | } 27 | 28 | func NewHexReader(r io.Reader) *HexReader { 29 | return &HexReader{r: r} 30 | } 31 | -------------------------------------------------------------------------------- /dconv/hex_writer.go: -------------------------------------------------------------------------------- 1 | package main 2 | 3 | import ( 4 | "fmt" 5 | "io" 6 | ) 7 | 8 | type HexWriter struct { 9 | w io.Writer 10 | maxLen int 11 | outCount int 12 | } 13 | 14 | func (self *HexWriter) Write(p []byte) (n int, err error) { 15 | for _, data := range p { 16 | if self.outCount == 0 { 17 | _, err = fmt.Fprintf(self.w, "%02X", data) 18 | self.outCount++ 19 | } else if self.outCount < self.maxLen - 1 { 20 | _, err = fmt.Fprintf(self.w, " %02X", data) 21 | self.outCount++ 22 | } else { 23 | _, err = fmt.Fprintf(self.w, " %02X\n", data) 24 | self.outCount = 0 25 | } 26 | if err != nil { 27 | break 28 | } 29 | n++ 30 | } 31 | return 32 | } 33 | 34 | func (self *HexWriter) Close() (err error) { 35 | if (self.outCount > 0) && (self.outCount < self.maxLen) { 36 | _, err = fmt.Fprintf(self.w, "\n") 37 | } 38 | return 39 | } 40 | 41 | func NewHexWriter(w io.Writer, maxLen int) (*HexWriter, error) { 42 | if (maxLen < 3) || (maxLen > 32) { 43 | return nil, fmt.Errorf("Invalid hex line length : %d", maxLen) 44 | } 45 | return &HexWriter{w: w, maxLen: maxLen}, nil 46 | } 47 | -------------------------------------------------------------------------------- /diseqc2/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | diseqc2 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | org.eclipse.cdt.core.cnature 23 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 24 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 25 | org.eclipse.cdt.core.ccnature 26 | 27 | 28 | -------------------------------------------------------------------------------- /diseqc2/.settings/language.settings.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | -------------------------------------------------------------------------------- /diseqc2/README: -------------------------------------------------------------------------------- 1 | This is my buggy realisation of diseqc for STM32072B-DISCOVERY. 2 | 3 | compile: 4 | use eclipse, CDC for ARM, gnu toolchain. 5 | for me, Release is not working, so compile debug 6 | some STmicro files has little mods. be careful 7 | 8 | Schematic is simple: 9 | Input circuit: Cable -> small inductor -> filter capacitor -> R-R voltage divider form +3V to GND -> PA1 10 | Output circuit: PA8 -> current limiter 2K R -> GP NPN transitor base, emitter grounded, collector -> 22K R -> Cable 11 | Sorry, i'm too lazy for schematic drawing. 12 | 13 | use any st-link for flash firmware, then use USER usb connector on board (side, not center) 14 | some CDC usb device will present in your system. 15 | 16 | USAGE: 17 | cat /dev/ttyACM0 18 | monitor all diseqc traffic 19 | cat somefile > dev/ttyACM0 20 | push diseqc sequence 21 | 22 | SEQUENCE FORMAT: 23 | 1. 2-digit HEX separated by spaces finished by linefeed 24 | send sequence. sequence must be 32 bytes max. Input will blocked while sending in progress 25 | 2. <.> (DOT). No linefeeds 26 | send EOF back to host 27 | 3. (Y letter). No linefeeds 28 | turn diseqc echo on (default) 29 | 3. (N letter). No linefeeds 30 | turn diseqc echo off 31 | 32 | all another symbols will be skipped 33 | -------------------------------------------------------------------------------- /diseqc2/cmd.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include "diseqc.h" 3 | #include "usbcom.h" 4 | 5 | // diseqc event handlers 6 | volatile uint16_t rxcount = 0; 7 | 8 | void DiseqcOnRx(uint8_t data, uint8_t parityError) { 9 | if(parityError) 10 | printf("##"); 11 | if(rxcount) 12 | printf(" "); 13 | printf("%02X", data); 14 | rxcount++; 15 | } 16 | 17 | void DiseqcOnPause(uint8_t srNotEmpty) { 18 | if(srNotEmpty) 19 | printf("##"); 20 | printf("\n"); 21 | rxcount = 0; 22 | } 23 | 24 | void DiseqcOnTxc() { 25 | UsbComConfirmRx(); 26 | } 27 | 28 | void DiseqcOnNoise(uint16_t duration) { 29 | printf("(%u)\n", duration); 30 | } 31 | 32 | // usb com event handler 33 | volatile uint8_t txbuf[64], txbufp = 0, txbufs = 0; 34 | 35 | void UsbComDigit(uint8_t byte) { 36 | if(!txbufs) //first digit 37 | txbufs = byte | 0xF0; 38 | else { //second digit 39 | txbuf[txbufp++] = ((txbufs & 0x0F) << 4) | byte; 40 | txbufs = 0; 41 | if(txbufp == sizeof(txbuf)) { 42 | txbufp = 0; 43 | printf(">>\n"); 44 | } 45 | } 46 | } 47 | 48 | uint8_t UsbComOnRx(uint8_t data) { 49 | if((data == 0x0D) || (data == 0x0A)) { 50 | txbufs = 0; 51 | if(txbufp) { 52 | DiseqcSend(txbuf, txbufp); 53 | txbufp = 0; 54 | return 0; 55 | } 56 | } else if(data == 'Y') 57 | DiseqcEchoOn(); 58 | else if(data == 'N') 59 | DiseqcEchoOff(); 60 | else if(data == '.') 61 | printf("%c", 0x04); //EOT 62 | else if (data >= '0' && data <= '9') 63 | UsbComDigit(data - '0'); 64 | else if (data >= 'a' && data <= 'f') 65 | UsbComDigit(data - 'a' + 10); 66 | else if (data >= 'A' && data <= 'F') 67 | UsbComDigit(data - 'A' + 10); 68 | return 1; 69 | } 70 | 71 | int main() { 72 | setbuf(stdout, NULL); 73 | UsbComInit(); // init sysclock too 74 | DiseqcInit(); 75 | 76 | while (1) { 77 | } 78 | return 0; 79 | } 80 | 81 | #ifdef USE_FULL_ASSERT 82 | void assert_failed(uint8_t* file, uint32_t line) { 83 | while (1); 84 | } 85 | #endif 86 | 87 | -------------------------------------------------------------------------------- /diseqc2/diseqc.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include "diseqc.h" 3 | 4 | // CONFIG 5 | #define DISEQC_NOISE_MAX (2085 + 40) //default upper noise threshold 6 | #define DISEQC_NOISE_MIN (2085 - 40) //default lower noise threshold 7 | 8 | #define DISEQC_T0_MIN 800 //all times in microseconds 9 | #define DISEQC_T0_MAX 1200 10 | #define DISEQC_T1_MIN 400 11 | #define DISEQC_T1_MAX 600 12 | #define DISEQC_TPAUSE 1800 13 | 14 | #define DISEQC_ANSWER_TIMEOUT 25 // diseqc answer timeout. ms 15 | #define DISEQC_WAIT_TIMEOUT 50 // delay between diseqc transaction and TXC, ms 16 | 17 | //TRANSMITTER 18 | #define STATE_IDLE 0 // tx idle 19 | #define STATE_SEND 1 // data tx in progress 20 | #define STATE_LAST 2 // all data sent. awaiting one more cycle for complete rx 21 | #define STATE_ANSWERWAIT 3 // awaiting answer 22 | #define STATE_ANSWER 4 // answer rx in progress 23 | #define STATE_WAIT 5 // delay between transaction and TXC 24 | 25 | volatile uint8_t *ds_data, ds_parity, ds_state = STATE_IDLE; 26 | volatile uint16_t ds_size, ds_sent; 27 | 28 | void DiseqcSend(volatile uint8_t *data, uint8_t size) { 29 | if(ds_state == STATE_IDLE) { 30 | ds_data = data; 31 | ds_size = 9 * (uint16_t)size; 32 | ds_sent = 0; 33 | ds_parity = 0; 34 | ds_state = STATE_SEND; 35 | } 36 | } 37 | 38 | void TIM17_IRQHandler() { 39 | TIM17->SR = 0; 40 | if(ds_state == STATE_LAST) { 41 | ds_state = STATE_ANSWERWAIT; 42 | TIM7->CNT = 0; 43 | TIM7->ARR = DISEQC_ANSWER_TIMEOUT; 44 | TIM7->CR1 |= TIM_CR1_CEN; 45 | } else if(ds_state == STATE_SEND) { 46 | if(ds_sent >= ds_size) { 47 | TIM17->CCR1 = 0; 48 | ds_state = STATE_LAST; 49 | } else { 50 | if((ds_sent % 9) < 8 ) { //ordinary bit 51 | if((ds_data[ds_sent / 9] << (ds_sent % 9)) & 0x80) { //one 52 | TIM17->CCR1 = 1; 53 | ds_parity++; 54 | } else { //zero 55 | TIM17->CCR1 = 2; 56 | } 57 | } else { //parity 58 | TIM17->CCR1 = (ds_parity % 2) ? 2 : 1; 59 | ds_parity = 0; 60 | } 61 | ds_sent++; 62 | } 63 | } 64 | } 65 | 66 | void TIM7_IRQHandler() { 67 | TIM7->SR = 0; 68 | if(ds_state == STATE_ANSWERWAIT) { 69 | ds_state = STATE_WAIT; 70 | TIM7->CNT = 0; 71 | TIM7->ARR = DISEQC_WAIT_TIMEOUT; 72 | TIM7->CR1 |= TIM_CR1_CEN; 73 | } else { 74 | ds_state = STATE_IDLE; 75 | DiseqcOnTxc(); 76 | } 77 | } 78 | 79 | //RECEIVER 80 | volatile uint8_t dr_data = 0, dr_count = 0, dr_parity = 0, dr_echo = 1; 81 | 82 | void DiseqcEchoOn() { 83 | dr_echo = 1; 84 | } 85 | 86 | void DiseqcEchoOff() { 87 | dr_echo = 0; 88 | } 89 | 90 | void DiseqcRcvReset() { 91 | dr_data = dr_count = dr_parity = 0; 92 | } 93 | 94 | void DiseqcDigitReceived( uint8_t digit ) { 95 | if(ds_state == STATE_ANSWERWAIT) { // answer reception started 96 | ds_state = STATE_ANSWER; 97 | TIM7->CR1 &= ~TIM_CR1_CEN; // stop answer waiting timer 98 | TIM7->SR = 0; 99 | } 100 | dr_parity += digit; 101 | if(dr_count > 7) { 102 | if( dr_echo || (ds_state == STATE_IDLE) || (ds_state == STATE_ANSWER) || (ds_state == STATE_WAIT) ) 103 | DiseqcOnRx(dr_data, !(dr_parity % 2)); 104 | DiseqcRcvReset(); 105 | } 106 | else { 107 | dr_data = (dr_data << 1) | digit; 108 | dr_count++; 109 | } 110 | } 111 | 112 | void TIM15_IRQHandler() { 113 | TIM15->SR = 0; 114 | if( dr_echo || (ds_state == STATE_IDLE) || (ds_state == STATE_ANSWER) || (ds_state == STATE_WAIT) ) { 115 | DiseqcOnPause(dr_count); 116 | DiseqcRcvReset(); 117 | } 118 | if(ds_state == STATE_ANSWER) { // answer reception ended 119 | ds_state = STATE_WAIT; 120 | TIM7->CNT = 0; 121 | TIM7->ARR = DISEQC_WAIT_TIMEOUT; 122 | TIM7->CR1 |= TIM_CR1_CEN; 123 | } 124 | } 125 | 126 | void TIM3_IRQHandler() { 127 | TIM3->SR = 0; 128 | uint16_t siglen = TIM15->CNT; 129 | if( (siglen >= DISEQC_T1_MIN) && (siglen <= DISEQC_T1_MAX) ) 130 | DiseqcDigitReceived(1); 131 | else if( (siglen >= DISEQC_T0_MIN) && (siglen <= DISEQC_T0_MAX) ) 132 | DiseqcDigitReceived(0); 133 | else 134 | DiseqcOnNoise(siglen); 135 | } 136 | 137 | //INIT 138 | volatile uint16_t dr_zerosource = 0; 139 | 140 | void DiseqcInit() { 141 | // TRANSMITTER 142 | // gpio PA8-output fast speed pull down AF2 (Tim1_Ch1) 143 | RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); 144 | GPIOA->AFR[1] &= ~0xF; 145 | GPIOA->AFR[1] |= 0x2; 146 | GPIOA->MODER |= GPIO_MODER_MODER8_1; //output AF 147 | GPIOA->OSPEEDR |= GPIO_OSPEEDR_OSPEEDR8_0 | GPIO_OSPEEDR_OSPEEDR8_1; //fast speed 148 | GPIOA->PUPDR |= GPIO_PUPDR_PUPDR8_1; // pull down 149 | // tim1 22 kHz 50% duty PWM mode1 on ch1 GATED by TIM17 150 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE); 151 | TIM1->PSC = 1091 - 1; // pure magic 48000000 / 220000 152 | TIM1->ARR = 1; 153 | TIM1->CCR1 = 1; // duty = 50% 154 | TIM1->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE; // pwm mode 2 155 | TIM1->EGR |= TIM_EGR_UG; 156 | TIM1->CCER = TIM_CCER_CC1E; 157 | TIM1->BDTR = TIM_BDTR_MOE; 158 | TIM1->SMCR = TIM_SMCR_TS_1 | TIM_SMCR_TS_0 | TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0; 159 | TIM1->CR1 = TIM_CR1_CEN; 160 | // TIM17 TRGO is always OC1 (not OCref) 161 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM17, ENABLE); 162 | NVIC_EnableIRQ(TIM17_IRQn); 163 | TIM17->PSC = 1091 * 22 - 1; //pure magic 164 | TIM17->ARR = 2; 165 | TIM17->CCR1 = 0; 166 | TIM17->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1PE; // pwm mode 1 167 | TIM17->EGR |= TIM_EGR_UG; 168 | TIM17->CCER = TIM_CCER_CC1E; 169 | TIM17->BDTR = TIM_BDTR_MOE; 170 | TIM17->DIER = TIM_DIER_UIE; 171 | TIM17->CR1 = TIM_CR1_CEN; 172 | // tim6. tx delays counter 173 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM7, ENABLE); 174 | NVIC_EnableIRQ(TIM7_IRQn); 175 | TIM7->PSC = 48000 - 1; // 1ms clock 176 | TIM7->EGR |= TIM_EGR_UG; 177 | TIM7->SR = 0; 178 | TIM7->DIER = TIM_DIER_UIE; 179 | TIM7->CR1 = TIM_CR1_OPM; //one pulse 180 | // RECEIVER 181 | // dac 182 | RCC_APB1PeriphClockCmd(RCC_APB1ENR_DACEN, ENABLE); 183 | DAC->DHR12R1 = DISEQC_NOISE_MAX; 184 | DAC->DHR12R2 = DISEQC_NOISE_MIN; 185 | DAC->CR = DAC_CR_EN1 | DAC_CR_EN2; 186 | // comparators 1 & 2 +input from PA1 -input from DAC 1 & 2. No hysteresis out to TIM3 CH1 187 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); //comparators 188 | COMP->CSR = COMP_CSR_COMP1OUTSEL_2 | COMP_CSR_COMP1OUTSEL_1 | COMP_CSR_COMP1INSEL_2 | \ 189 | COMP_CSR_COMP1HYST_1 | COMP_CSR_COMP1HYST_0 | \ 190 | COMP_CSR_COMP2OUTSEL_2 | COMP_CSR_COMP2OUTSEL_1 | COMP_CSR_COMP2INSEL_2 | COMP_CSR_COMP2INSEL_0 | \ 191 | COMP_CSR_COMP2HYST_1 | COMP_CSR_COMP2HYST_0 | \ 192 | COMP_CSR_WNDWEN | COMP_CSR_COMP2POL; 193 | COMP->CSR |= COMP_CSR_COMP1EN | COMP_CSR_COMP2EN; 194 | // DMA ch4 for TIM3 TRG. TIM3->CNT = 0 195 | RCC_AHBPeriphClockCmd(RCC_AHBENR_DMAEN, ENABLE); 196 | DMA1_Channel4->CPAR = (uint32_t)(&(TIM3->CNT)); 197 | DMA1_Channel4->CMAR = (uint32_t)(&dr_zerosource); 198 | DMA1_Channel4->CNDTR = 1; 199 | DMA1_Channel4->CCR = DMA_CCR_MSIZE_0 | DMA_CCR_PSIZE_0 | DMA_CCR_CIRC | DMA_CCR_DIR; 200 | DMA1_Channel4->CCR |= DMA_CCR_EN; 201 | // DMA ch5 for TIM`5 TRG. TIM15->CNT = 0 202 | DMA1_Channel5->CPAR = (uint32_t)(&(TIM15->CNT)); 203 | DMA1_Channel5->CMAR = (uint32_t)(&dr_zerosource); 204 | DMA1_Channel5->CNDTR = 1; 205 | DMA1_Channel5->CCR = DMA_CCR_MSIZE_0 | DMA_CCR_PSIZE_0 | DMA_CCR_CIRC | DMA_CCR_DIR; 206 | DMA1_Channel5->CCR |= DMA_CCR_EN; 207 | // tim15. PURE MAGIC. TRIGGER & RESET on SAME event from TIM3 208 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM15, ENABLE); 209 | NVIC_EnableIRQ(TIM15_IRQn); 210 | TIM15->ARR = 1600; //def 211 | TIM15->CCR1 = 1600; //def 212 | TIM15->PSC = 47; 213 | TIM15->EGR |= TIM_EGR_UG; 214 | TIM15->CCMR1 = TIM_CCMR1_OC1M_0; // ch1 as output one-pulse 215 | TIM15->DIER = TIM_DIER_TDE | TIM_DIER_CC1IE; //DMA req on trigger, INT on CC1 216 | TIM15->CR1 = TIM_CR1_OPM; //one pulse 217 | TIM15->SMCR = TIM_SMCR_TS_0 | TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1; // TRIGGER mode from TIM3 218 | // tim3. PURE MAGIC. TRIGGER & RESET on SAME event from comparators 219 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); 220 | NVIC_EnableIRQ(TIM3_IRQn); 221 | TIM3->ARR = 2200; //def 222 | TIM3->CCR2 = 2200; //def 223 | TIM3->CCMR1 = TIM_CCMR1_CC1S_0 | TIM_CCMR1_OC2M_0; // channel 1 as input from ic1, ch2 as output one-pulse 224 | TIM3->DIER = TIM_DIER_TDE | TIM_DIER_CC2IE; //DMA req on trigger, INT on CC2 225 | TIM3->CR2 = TIM_CR2_MMS_0; //TRGO = ENABLE 226 | TIM3->CR1 = TIM_CR1_OPM; //one pulse 227 | TIM3->SMCR = TIM_SMCR_TS_2 | TIM_SMCR_TS_0 | TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1; // TRIGGER mode self-slave on channel1 228 | } 229 | 230 | // comparators control 231 | void DiseqcSetCompValue(uint8_t comparator, uint16_t value) { 232 | if( comparator == DISEQC_COMP_MAX) 233 | DAC->DHR12R1 = value; 234 | else if( comparator == DISEQC_COMP_MIN) 235 | DAC->DHR12R2 = value; 236 | } 237 | 238 | uint16_t DiseqcGetCompValue(uint8_t comparator) { 239 | if( comparator == DISEQC_COMP_MAX) 240 | return DAC->DHR12R1; 241 | else if( comparator == DISEQC_COMP_MIN) 242 | return DAC->DHR12R2; 243 | return 0; 244 | } 245 | 246 | uint8_t DiseqcGetCompOutput(uint8_t comparator) { 247 | uint16_t mask = 0; 248 | if( comparator == DISEQC_COMP_MAX) 249 | mask = COMP_CSR_COMP1OUT; 250 | else if( comparator == DISEQC_COMP_MIN) 251 | mask = COMP_CSR_COMP2OUT; 252 | return (COMP->CSR & mask) ? 1 : 0; 253 | } 254 | 255 | // event weak stubs 256 | void __attribute__((weak)) DiseqcOnRx(uint8_t data, uint8_t parityError) {} 257 | void __attribute__((weak)) DiseqcOnPause(uint8_t srNotEmpty) {} 258 | void __attribute__((weak)) DiseqcOnTxc() {} 259 | void __attribute__((weak)) DiseqcOnNoise(uint16_t duration) {} 260 | -------------------------------------------------------------------------------- /diseqc2/diseqc.h: -------------------------------------------------------------------------------- 1 | // main functions 2 | void DiseqcInit(); 3 | void DiseqcSend(volatile uint8_t *data, uint8_t size); // data must be volatile 4 | 5 | // events (weak) 6 | void DiseqcOnRx(uint8_t data, uint8_t parityError); 7 | void DiseqcOnPause(uint8_t srNotEmpty); 8 | void DiseqcOnTxc(); 9 | void DiseqcOnNoise(uint16_t duration); 10 | 11 | // echp control 12 | void DiseqcEchoOn(); 13 | void DiseqcEchoOff(); 14 | 15 | // comparators control 16 | #define DISEQC_COMP_MAX 1 // comparator number for upper windows border 17 | #define DISEQC_COMP_MIN 2 // comparator number for lower windows border 18 | 19 | void DiseqcSetCompValue(uint8_t comparator, uint16_t value); 20 | uint16_t DiseqcGetCompValue(uint8_t comparator); 21 | uint8_t DiseqcGetCompOutput(uint8_t comparator); 22 | -------------------------------------------------------------------------------- /diseqc2/newlib_stubs.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include "usbcom.h" 7 | 8 | #undef errno 9 | extern int errno; 10 | 11 | char *__env[1] = { 0 }; 12 | char **environ = __env; 13 | 14 | int _write(int file, char *ptr, int len); 15 | 16 | void _exit(int status) { 17 | _write(1, "exit", 4); 18 | while (1) { 19 | ; 20 | } 21 | } 22 | 23 | int _close(int file) { 24 | return -1; 25 | } 26 | /* 27 | execve 28 | Transfer control to a new process. Minimal implementation (for a system without processes): 29 | */ 30 | int _execve(char *name, char **argv, char **env) { 31 | errno = ENOMEM; 32 | return -1; 33 | } 34 | /* 35 | fork 36 | Create a new process. Minimal implementation (for a system without processes): 37 | */ 38 | 39 | int _fork() { 40 | errno = EAGAIN; 41 | return -1; 42 | } 43 | /* 44 | fstat 45 | Status of an open file. For consistency with other minimal implementations in these examples, 46 | all files are regarded as character special devices. 47 | The `sys/stat.h' header file required is distributed in the `include' subdirectory for this C library. 48 | */ 49 | int _fstat(int file, struct stat *st) { 50 | st->st_mode = S_IFCHR; 51 | return 0; 52 | } 53 | 54 | /* 55 | getpid 56 | Process-ID; this is sometimes used to generate strings unlikely to conflict with other processes. Minimal implementation, for a system without processes: 57 | */ 58 | 59 | int _getpid() { 60 | return 1; 61 | } 62 | 63 | /* 64 | isatty 65 | Query whether output stream is a terminal. For consistency with the other minimal implementations, 66 | */ 67 | int _isatty(int file) { 68 | switch (file){ 69 | case STDOUT_FILENO: 70 | case STDERR_FILENO: 71 | case STDIN_FILENO: 72 | return 1; 73 | default: 74 | //errno = ENOTTY; 75 | errno = EBADF; 76 | return 0; 77 | } 78 | } 79 | 80 | 81 | /* 82 | kill 83 | Send a signal. Minimal implementation: 84 | */ 85 | int _kill(int pid, int sig) { 86 | errno = EINVAL; 87 | return (-1); 88 | } 89 | 90 | /* 91 | link 92 | Establish a new name for an existing file. Minimal implementation: 93 | */ 94 | 95 | int _link(char *old, char *new) { 96 | errno = EMLINK; 97 | return -1; 98 | } 99 | 100 | /* 101 | lseek 102 | Set position in a file. Minimal implementation: 103 | */ 104 | int _lseek(int file, int ptr, int dir) { 105 | return 0; 106 | } 107 | 108 | /* 109 | sbrk 110 | Increase program data space. 111 | Malloc and related functions depend on this 112 | */ 113 | 114 | caddr_t _sbrk(int incr) { 115 | 116 | extern char _ebss; // Defined by the linker 117 | static char *heap_end; 118 | char *prev_heap_end; 119 | 120 | if (heap_end == 0) { 121 | heap_end = &_ebss; 122 | } 123 | prev_heap_end = heap_end; 124 | 125 | char * stack = (char*) __get_MSP(); 126 | if (heap_end + incr > stack) 127 | { 128 | _write (STDERR_FILENO, "Heap and stack collision\n", 25); 129 | errno = ENOMEM; 130 | return (caddr_t) -1; 131 | //abort (); 132 | } 133 | 134 | heap_end += incr; 135 | return (caddr_t) prev_heap_end; 136 | 137 | } 138 | 139 | /* 140 | read 141 | Read a character to a file. `libc' subroutines will use this system routine for input from all files, including stdin 142 | Returns -1 on error or blocks until the number of characters have been read. 143 | */ 144 | 145 | 146 | int _read(int file, char *ptr, int len) { 147 | return 0; 148 | } 149 | 150 | /* 151 | stat 152 | Status of a file (by name). Minimal implementation: 153 | int _EXFUN(stat,( const char *__path, struct stat *__sbuf )); 154 | */ 155 | 156 | int _stat(const char *filepath, struct stat *st) { 157 | st->st_mode = S_IFCHR; 158 | return 0; 159 | } 160 | 161 | /* 162 | times 163 | Timing information for current process. Minimal implementation: 164 | */ 165 | 166 | clock_t _times(struct tms *buf) { 167 | return -1; 168 | } 169 | 170 | /* 171 | unlink 172 | Remove a file's directory entry. Minimal implementation: 173 | */ 174 | int _unlink(char *name) { 175 | errno = ENOENT; 176 | return -1; 177 | } 178 | 179 | /* 180 | wait 181 | Wait for a child process. Minimal implementation: 182 | */ 183 | int _wait(int *status) { 184 | errno = ECHILD; 185 | return -1; 186 | } 187 | 188 | /* 189 | write 190 | Write a character to a file. `libc' subroutines will use this system routine for output to all files, including stdout 191 | Returns -1 on error or number of bytes sent 192 | */ 193 | int _write(int file, char *ptr, int len) { 194 | switch (file) { 195 | case STDERR_FILENO: 196 | case STDOUT_FILENO: 197 | for (int n = 0; n < len; n++) { 198 | if( *ptr == '\n' ) 199 | UsbComSend('\r'); 200 | UsbComSend(*ptr++); 201 | } 202 | break; 203 | default: 204 | errno = EBADF; 205 | return -1; 206 | } 207 | return len; 208 | } 209 | -------------------------------------------------------------------------------- /diseqc2/startup.S: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file startup_stm32f0xx.s 4 | * @author MCD Application Team 5 | * @version V1.3.1 6 | * @date 17-January-2014 7 | * @brief STM32F072 Devices vector table for RIDE7 toolchain. 8 | * This module performs: 9 | * - Set the initial SP 10 | * - Set the initial PC == Reset_Handler, 11 | * - Set the vector table entries with the exceptions ISR address 12 | * - Configure the system clock 13 | * - Branches to main in the C library (which eventually 14 | * calls main()). 15 | * After Reset the Cortex-M0 processor is in Thread mode, 16 | * priority is Privileged, and the Stack is set to Main. 17 | ****************************************************************************** 18 | * @attention 19 | * 20 | *

© COPYRIGHT 2014 STMicroelectronics

21 | * 22 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 23 | * You may not use this file except in compliance with the License. 24 | * You may obtain a copy of the License at: 25 | * 26 | * http://www.st.com/software_license_agreement_liberty_v2 27 | * 28 | * Unless required by applicable law or agreed to in writing, software 29 | * distributed under the License is distributed on an "AS IS" BASIS, 30 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 31 | * See the License for the specific language governing permissions and 32 | * limitations under the License. 33 | * 34 | ****************************************************************************** 35 | */ 36 | 37 | .syntax unified 38 | .cpu cortex-m0 39 | .fpu softvfp 40 | .thumb 41 | 42 | .global g_pfnVectors 43 | .global Default_Handler 44 | 45 | /* start address for the initialization values of the .data section. 46 | defined in linker script */ 47 | .word _sidata 48 | /* start address for the .data section. defined in linker script */ 49 | .word _sdata 50 | /* end address for the .data section. defined in linker script */ 51 | .word _edata 52 | /* start address for the .bss section. defined in linker script */ 53 | .word _sbss 54 | /* end address for the .bss section. defined in linker script */ 55 | .word _ebss 56 | 57 | .equ BootRAM, 0xF108F85F 58 | /** 59 | * @brief This is the code that gets called when the processor first 60 | * starts execution following a reset event. Only the absolutely 61 | * necessary set is performed, after which the application 62 | * supplied main() routine is called. 63 | * @param None 64 | * @retval : None 65 | */ 66 | 67 | .section .text.Reset_Handler 68 | .weak Reset_Handler 69 | .type Reset_Handler, %function 70 | Reset_Handler: 71 | ldr r0, =_estack 72 | mov sp, r0 /* set stack pointer */ 73 | 74 | /* Copy the data segment initializers from flash to SRAM */ 75 | movs r1, #0 76 | b LoopCopyDataInit 77 | 78 | CopyDataInit: 79 | ldr r3, =_sidata 80 | ldr r3, [r3, r1] 81 | str r3, [r0, r1] 82 | adds r1, r1, #4 83 | 84 | LoopCopyDataInit: 85 | ldr r0, =_sdata 86 | ldr r3, =_edata 87 | adds r2, r0, r1 88 | cmp r2, r3 89 | bcc CopyDataInit 90 | ldr r2, =_sbss 91 | b LoopFillZerobss 92 | /* Zero fill the bss segment. */ 93 | FillZerobss: 94 | movs r3, #0 95 | str r3, [r2] 96 | adds r2, r2, #4 97 | 98 | 99 | LoopFillZerobss: 100 | ldr r3, = _ebss 101 | cmp r2, r3 102 | bcc FillZerobss 103 | 104 | /* Call the clock system intitialization function.*/ 105 | /* bl SystemInit 106 | */ 107 | /* Call the application's entry point.*/ 108 | bl main 109 | 110 | LoopForever: 111 | b LoopForever 112 | 113 | 114 | .size Reset_Handler, .-Reset_Handler 115 | 116 | /** 117 | * @brief This is the code that gets called when the processor receives an 118 | * unexpected interrupt. This simply enters an infinite loop, preserving 119 | * the system state for examination by a debugger. 120 | * 121 | * @param None 122 | * @retval : None 123 | */ 124 | .section .text.Default_Handler,"ax",%progbits 125 | Default_Handler: 126 | Infinite_Loop: 127 | b Infinite_Loop 128 | .size Default_Handler, .-Default_Handler 129 | /****************************************************************************** 130 | * 131 | * The minimal vector table for a Cortex M0. Note that the proper constructs 132 | * must be placed on this to ensure that it ends up at physical address 133 | * 0x0000.0000. 134 | * 135 | ******************************************************************************/ 136 | .section .isr_vector,"a",%progbits 137 | .type g_pfnVectors, %object 138 | .size g_pfnVectors, .-g_pfnVectors 139 | 140 | 141 | g_pfnVectors: 142 | .word _estack 143 | .word Reset_Handler 144 | 145 | .word NMI_Handler 146 | .word HardFault_Handler 147 | .word 0 148 | .word 0 149 | .word 0 150 | .word 0 151 | .word 0 152 | .word 0 153 | .word 0 154 | .word SVC_Handler 155 | .word 0 156 | .word 0 157 | .word PendSV_Handler 158 | .word SysTick_Handler 159 | 160 | 161 | .word WWDG_IRQHandler 162 | .word PVD_VDDIO2_IRQHandler 163 | .word RTC_IRQHandler 164 | .word FLASH_IRQHandler 165 | .word RCC_CRS_IRQHandler 166 | .word EXTI0_1_IRQHandler 167 | .word EXTI2_3_IRQHandler 168 | .word EXTI4_15_IRQHandler 169 | .word TSC_IRQHandler 170 | .word DMA1_Channel1_IRQHandler 171 | .word DMA1_Channel2_3_IRQHandler 172 | .word DMA1_Channel4_5_6_7_IRQHandler 173 | .word ADC1_COMP_IRQHandler 174 | .word TIM1_BRK_UP_TRG_COM_IRQHandler 175 | .word TIM1_CC_IRQHandler 176 | .word TIM2_IRQHandler 177 | .word TIM3_IRQHandler 178 | .word TIM6_DAC_IRQHandler 179 | .word TIM7_IRQHandler 180 | .word TIM14_IRQHandler 181 | .word TIM15_IRQHandler 182 | .word TIM16_IRQHandler 183 | .word TIM17_IRQHandler 184 | .word I2C1_IRQHandler 185 | .word I2C2_IRQHandler 186 | .word SPI1_IRQHandler 187 | .word SPI2_IRQHandler 188 | .word USART1_IRQHandler 189 | .word USART2_IRQHandler 190 | .word USART3_4_IRQHandler 191 | .word CEC_CAN_IRQHandler 192 | .word USB_IRQHandler 193 | .word BootRAM /* @0x108. This is for boot in RAM mode for 194 | STM32F0xx devices. */ 195 | 196 | /******************************************************************************* 197 | * 198 | * Provide weak aliases for each Exception handler to the Default_Handler. 199 | * As they are weak aliases, any function with the same name will override 200 | * this definition. 201 | * 202 | *******************************************************************************/ 203 | 204 | .weak NMI_Handler 205 | .thumb_set NMI_Handler,Default_Handler 206 | 207 | .weak HardFault_Handler 208 | .thumb_set HardFault_Handler,Default_Handler 209 | 210 | .weak SVC_Handler 211 | .thumb_set SVC_Handler,Default_Handler 212 | 213 | .weak PendSV_Handler 214 | .thumb_set PendSV_Handler,Default_Handler 215 | 216 | .weak SysTick_Handler 217 | .thumb_set SysTick_Handler,Default_Handler 218 | 219 | .weak WWDG_IRQHandler 220 | .thumb_set WWDG_IRQHandler,Default_Handler 221 | 222 | .weak PVD_VDDIO2_IRQHandler 223 | .thumb_set PVD_VDDIO2_IRQHandler,Default_Handler 224 | 225 | .weak RTC_IRQHandler 226 | .thumb_set RTC_IRQHandler,Default_Handler 227 | 228 | .weak FLASH_IRQHandler 229 | .thumb_set FLASH_IRQHandler,Default_Handler 230 | 231 | .weak RCC_CRS_IRQHandler 232 | .thumb_set RCC_CRS_IRQHandler,Default_Handler 233 | 234 | .weak EXTI0_1_IRQHandler 235 | .thumb_set EXTI0_1_IRQHandler,Default_Handler 236 | 237 | .weak EXTI2_3_IRQHandler 238 | .thumb_set EXTI2_3_IRQHandler,Default_Handler 239 | 240 | .weak EXTI4_15_IRQHandler 241 | .thumb_set EXTI4_15_IRQHandler,Default_Handler 242 | 243 | .weak TSC_IRQHandler 244 | .thumb_set TSC_IRQHandler,Default_Handler 245 | 246 | .weak DMA1_Channel1_IRQHandler 247 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 248 | 249 | .weak DMA1_Channel2_3_IRQHandler 250 | .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler 251 | 252 | .weak DMA1_Channel4_5_6_7_IRQHandler 253 | .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler 254 | 255 | .weak ADC1_COMP_IRQHandler 256 | .thumb_set ADC1_COMP_IRQHandler,Default_Handler 257 | 258 | .weak TIM1_BRK_UP_TRG_COM_IRQHandler 259 | .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler 260 | 261 | .weak TIM1_CC_IRQHandler 262 | .thumb_set TIM1_CC_IRQHandler,Default_Handler 263 | 264 | .weak TIM2_IRQHandler 265 | .thumb_set TIM2_IRQHandler,Default_Handler 266 | 267 | .weak TIM3_IRQHandler 268 | .thumb_set TIM3_IRQHandler,Default_Handler 269 | 270 | .weak TIM6_DAC_IRQHandler 271 | .thumb_set TIM6_DAC_IRQHandler,Default_Handler 272 | 273 | .weak TIM7_IRQHandler 274 | .thumb_set TIM7_IRQHandler,Default_Handler 275 | 276 | .weak TIM14_IRQHandler 277 | .thumb_set TIM14_IRQHandler,Default_Handler 278 | 279 | .weak TIM15_IRQHandler 280 | .thumb_set TIM15_IRQHandler,Default_Handler 281 | 282 | .weak TIM16_IRQHandler 283 | .thumb_set TIM16_IRQHandler,Default_Handler 284 | 285 | .weak TIM17_IRQHandler 286 | .thumb_set TIM17_IRQHandler,Default_Handler 287 | 288 | .weak I2C1_IRQHandler 289 | .thumb_set I2C1_IRQHandler,Default_Handler 290 | 291 | .weak I2C2_IRQHandler 292 | .thumb_set I2C2_IRQHandler,Default_Handler 293 | 294 | .weak SPI1_IRQHandler 295 | .thumb_set SPI1_IRQHandler,Default_Handler 296 | 297 | .weak SPI2_IRQHandler 298 | .thumb_set SPI2_IRQHandler,Default_Handler 299 | 300 | .weak USART1_IRQHandler 301 | .thumb_set USART1_IRQHandler,Default_Handler 302 | 303 | .weak USART2_IRQHandler 304 | .thumb_set USART2_IRQHandler,Default_Handler 305 | 306 | .weak USART3_4_IRQHandler 307 | .thumb_set USART3_4_IRQHandler,Default_Handler 308 | 309 | .weak CEC_CAN_IRQHandler 310 | .thumb_set CEC_CAN_IRQHandler,Default_Handler 311 | 312 | .weak USB_IRQHandler 313 | .thumb_set USB_IRQHandler,Default_Handler 314 | 315 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 316 | 317 | -------------------------------------------------------------------------------- /diseqc2/system/include/cmsis/README_DEVICE.txt: -------------------------------------------------------------------------------- 1 | The stm32f0xx.h and system_stm32f0xx.h files are from 2 | STM32F0xx_StdPeriph_Lib_V1.5.0.zip, the folder: 3 | 4 | STM32F0xx_StdPeriph_Lib_V1.5.0/Libraries/CMSIS/Device/ST/STM32F0xx/Include 5 | 6 | The cmsis_device.h is added for convenience. 7 | 8 | -------------------------------------------------------------------------------- /diseqc2/system/include/cmsis/arm_common_tables.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 19. October 2015 5 | * $Revision: V.1.4.5 a 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_common_tables.h 9 | * 10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 11 | * 12 | * Target Processor: Cortex-M4/Cortex-M3 13 | * 14 | * Redistribution and use in source and binary forms, with or without 15 | * modification, are permitted provided that the following conditions 16 | * are met: 17 | * - Redistributions of source code must retain the above copyright 18 | * notice, this list of conditions and the following disclaimer. 19 | * - Redistributions in binary form must reproduce the above copyright 20 | * notice, this list of conditions and the following disclaimer in 21 | * the documentation and/or other materials provided with the 22 | * distribution. 23 | * - Neither the name of ARM LIMITED nor the names of its contributors 24 | * may be used to endorse or promote products derived from this 25 | * software without specific prior written permission. 26 | * 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 | * POSSIBILITY OF SUCH DAMAGE. 39 | * -------------------------------------------------------------------- */ 40 | 41 | #ifndef _ARM_COMMON_TABLES_H 42 | #define _ARM_COMMON_TABLES_H 43 | 44 | #include "arm_math.h" 45 | 46 | extern const uint16_t armBitRevTable[1024]; 47 | extern const q15_t armRecipTableQ15[64]; 48 | extern const q31_t armRecipTableQ31[64]; 49 | /* extern const q31_t realCoefAQ31[1024]; */ 50 | /* extern const q31_t realCoefBQ31[1024]; */ 51 | extern const float32_t twiddleCoef_16[32]; 52 | extern const float32_t twiddleCoef_32[64]; 53 | extern const float32_t twiddleCoef_64[128]; 54 | extern const float32_t twiddleCoef_128[256]; 55 | extern const float32_t twiddleCoef_256[512]; 56 | extern const float32_t twiddleCoef_512[1024]; 57 | extern const float32_t twiddleCoef_1024[2048]; 58 | extern const float32_t twiddleCoef_2048[4096]; 59 | extern const float32_t twiddleCoef_4096[8192]; 60 | #define twiddleCoef twiddleCoef_4096 61 | extern const q31_t twiddleCoef_16_q31[24]; 62 | extern const q31_t twiddleCoef_32_q31[48]; 63 | extern const q31_t twiddleCoef_64_q31[96]; 64 | extern const q31_t twiddleCoef_128_q31[192]; 65 | extern const q31_t twiddleCoef_256_q31[384]; 66 | extern const q31_t twiddleCoef_512_q31[768]; 67 | extern const q31_t twiddleCoef_1024_q31[1536]; 68 | extern const q31_t twiddleCoef_2048_q31[3072]; 69 | extern const q31_t twiddleCoef_4096_q31[6144]; 70 | extern const q15_t twiddleCoef_16_q15[24]; 71 | extern const q15_t twiddleCoef_32_q15[48]; 72 | extern const q15_t twiddleCoef_64_q15[96]; 73 | extern const q15_t twiddleCoef_128_q15[192]; 74 | extern const q15_t twiddleCoef_256_q15[384]; 75 | extern const q15_t twiddleCoef_512_q15[768]; 76 | extern const q15_t twiddleCoef_1024_q15[1536]; 77 | extern const q15_t twiddleCoef_2048_q15[3072]; 78 | extern const q15_t twiddleCoef_4096_q15[6144]; 79 | extern const float32_t twiddleCoef_rfft_32[32]; 80 | extern const float32_t twiddleCoef_rfft_64[64]; 81 | extern const float32_t twiddleCoef_rfft_128[128]; 82 | extern const float32_t twiddleCoef_rfft_256[256]; 83 | extern const float32_t twiddleCoef_rfft_512[512]; 84 | extern const float32_t twiddleCoef_rfft_1024[1024]; 85 | extern const float32_t twiddleCoef_rfft_2048[2048]; 86 | extern const float32_t twiddleCoef_rfft_4096[4096]; 87 | 88 | 89 | /* floating-point bit reversal tables */ 90 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) 91 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) 92 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) 93 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) 94 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) 95 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) 96 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) 97 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) 98 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) 99 | 100 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; 101 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; 102 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; 103 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; 104 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; 105 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; 106 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; 107 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; 108 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; 109 | 110 | /* fixed-point bit reversal tables */ 111 | #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) 112 | #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) 113 | #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) 114 | #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) 115 | #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) 116 | #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) 117 | #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) 118 | #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) 119 | #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) 120 | 121 | extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; 122 | extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; 123 | extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; 124 | extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; 125 | extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; 126 | extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; 127 | extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; 128 | extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; 129 | extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; 130 | 131 | /* Tables for Fast Math Sine and Cosine */ 132 | extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; 133 | extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; 134 | extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; 135 | 136 | #endif /* ARM_COMMON_TABLES_H */ 137 | -------------------------------------------------------------------------------- /diseqc2/system/include/cmsis/arm_const_structs.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 19. March 2015 5 | * $Revision: V.1.4.5 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_const_structs.h 9 | * 10 | * Description: This file has constant structs that are initialized for 11 | * user convenience. For example, some can be given as 12 | * arguments to the arm_cfft_f32() function. 13 | * 14 | * Target Processor: Cortex-M4/Cortex-M3 15 | * 16 | * Redistribution and use in source and binary forms, with or without 17 | * modification, are permitted provided that the following conditions 18 | * are met: 19 | * - Redistributions of source code must retain the above copyright 20 | * notice, this list of conditions and the following disclaimer. 21 | * - Redistributions in binary form must reproduce the above copyright 22 | * notice, this list of conditions and the following disclaimer in 23 | * the documentation and/or other materials provided with the 24 | * distribution. 25 | * - Neither the name of ARM LIMITED nor the names of its contributors 26 | * may be used to endorse or promote products derived from this 27 | * software without specific prior written permission. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 | * POSSIBILITY OF SUCH DAMAGE. 41 | * -------------------------------------------------------------------- */ 42 | 43 | #ifndef _ARM_CONST_STRUCTS_H 44 | #define _ARM_CONST_STRUCTS_H 45 | 46 | #include "arm_math.h" 47 | #include "arm_common_tables.h" 48 | 49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; 50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; 51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; 52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; 53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; 54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; 55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; 56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; 57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; 58 | 59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; 60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; 61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; 62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; 63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; 64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; 65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; 66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; 67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; 68 | 69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; 70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; 71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; 72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; 73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; 74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; 75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; 76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; 77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; 78 | 79 | #endif 80 | -------------------------------------------------------------------------------- /diseqc2/system/include/cmsis/cmsis_device.h: -------------------------------------------------------------------------------- 1 | /* 2 | * This file is part of the µOS++ distribution. 3 | * (https://github.com/micro-os-plus) 4 | * Copyright (c) 2014 Liviu Ionescu. 5 | * 6 | * Permission is hereby granted, free of charge, to any person 7 | * obtaining a copy of this software and associated documentation 8 | * files (the "Software"), to deal in the Software without 9 | * restriction, including without limitation the rights to use, 10 | * copy, modify, merge, publish, distribute, sublicense, and/or 11 | * sell copies of the Software, and to permit persons to whom 12 | * the Software is furnished to do so, subject to the following 13 | * conditions: 14 | * 15 | * The above copyright notice and this permission notice shall be 16 | * included in all copies or substantial portions of the Software. 17 | * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 19 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 20 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 21 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 22 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 23 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 24 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 | * OTHER DEALINGS IN THE SOFTWARE. 26 | */ 27 | 28 | #ifndef STM32F0_CMSIS_DEVICE_H_ 29 | #define STM32F0_CMSIS_DEVICE_H_ 30 | 31 | #include "stm32f0xx.h" 32 | 33 | #endif // STM32F0_CMSIS_DEVICE_H_ 34 | -------------------------------------------------------------------------------- /diseqc2/system/include/cmsis/core_cmFunc.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmFunc.h 3 | * @brief CMSIS Cortex-M Core Function Access Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMFUNC_H 42 | #define __CORE_CMFUNC_H 43 | 44 | 45 | /* ########################### Core Function Access ########################### */ 46 | /** \ingroup CMSIS_Core_FunctionInterface 47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 48 | @{ 49 | */ 50 | 51 | /*------------------ RealView Compiler -----------------*/ 52 | #if defined ( __CC_ARM ) 53 | #include "cmsis_armcc.h" 54 | 55 | /*------------------ ARM Compiler V6 -------------------*/ 56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 57 | #include "cmsis_armcc_V6.h" 58 | 59 | /*------------------ GNU Compiler ----------------------*/ 60 | #elif defined ( __GNUC__ ) 61 | #include "cmsis_gcc.h" 62 | 63 | /*------------------ ICC Compiler ----------------------*/ 64 | #elif defined ( __ICCARM__ ) 65 | #include 66 | 67 | /*------------------ TI CCS Compiler -------------------*/ 68 | #elif defined ( __TMS470__ ) 69 | #include 70 | 71 | /*------------------ TASKING Compiler ------------------*/ 72 | #elif defined ( __TASKING__ ) 73 | /* 74 | * The CMSIS functions have been implemented as intrinsics in the compiler. 75 | * Please use "carm -?i" to get an up to date list of all intrinsics, 76 | * Including the CMSIS ones. 77 | */ 78 | 79 | /*------------------ COSMIC Compiler -------------------*/ 80 | #elif defined ( __CSMC__ ) 81 | #include 82 | 83 | #endif 84 | 85 | /*@} end of CMSIS_Core_RegAccFunctions */ 86 | 87 | #endif /* __CORE_CMFUNC_H */ 88 | -------------------------------------------------------------------------------- /diseqc2/system/include/cmsis/core_cmInstr.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmInstr.h 3 | * @brief CMSIS Cortex-M Core Instruction Access Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMINSTR_H 42 | #define __CORE_CMINSTR_H 43 | 44 | 45 | /* ########################## Core Instruction Access ######################### */ 46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 47 | Access to dedicated instructions 48 | @{ 49 | */ 50 | 51 | /*------------------ RealView Compiler -----------------*/ 52 | #if defined ( __CC_ARM ) 53 | #include "cmsis_armcc.h" 54 | 55 | /*------------------ ARM Compiler V6 -------------------*/ 56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 57 | #include "cmsis_armcc_V6.h" 58 | 59 | /*------------------ GNU Compiler ----------------------*/ 60 | #elif defined ( __GNUC__ ) 61 | #include "cmsis_gcc.h" 62 | 63 | /*------------------ ICC Compiler ----------------------*/ 64 | #elif defined ( __ICCARM__ ) 65 | #include 66 | 67 | /*------------------ TI CCS Compiler -------------------*/ 68 | #elif defined ( __TMS470__ ) 69 | #include 70 | 71 | /*------------------ TASKING Compiler ------------------*/ 72 | #elif defined ( __TASKING__ ) 73 | /* 74 | * The CMSIS functions have been implemented as intrinsics in the compiler. 75 | * Please use "carm -?i" to get an up to date list of all intrinsics, 76 | * Including the CMSIS ones. 77 | */ 78 | 79 | /*------------------ COSMIC Compiler -------------------*/ 80 | #elif defined ( __CSMC__ ) 81 | #include 82 | 83 | #endif 84 | 85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ 86 | 87 | #endif /* __CORE_CMINSTR_H */ 88 | -------------------------------------------------------------------------------- /diseqc2/system/include/cmsis/core_cmSimd.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmSimd.h 3 | * @brief CMSIS Cortex-M SIMD Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMSIMD_H 42 | #define __CORE_CMSIMD_H 43 | 44 | #ifdef __cplusplus 45 | extern "C" { 46 | #endif 47 | 48 | 49 | /* ################### Compiler specific Intrinsics ########################### */ 50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics 51 | Access to dedicated SIMD instructions 52 | @{ 53 | */ 54 | 55 | /*------------------ RealView Compiler -----------------*/ 56 | #if defined ( __CC_ARM ) 57 | #include "cmsis_armcc.h" 58 | 59 | /*------------------ ARM Compiler V6 -------------------*/ 60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 61 | #include "cmsis_armcc_V6.h" 62 | 63 | /*------------------ GNU Compiler ----------------------*/ 64 | #elif defined ( __GNUC__ ) 65 | #include "cmsis_gcc.h" 66 | 67 | /*------------------ ICC Compiler ----------------------*/ 68 | #elif defined ( __ICCARM__ ) 69 | #include 70 | 71 | /*------------------ TI CCS Compiler -------------------*/ 72 | #elif defined ( __TMS470__ ) 73 | #include 74 | 75 | /*------------------ TASKING Compiler ------------------*/ 76 | #elif defined ( __TASKING__ ) 77 | /* 78 | * The CMSIS functions have been implemented as intrinsics in the compiler. 79 | * Please use "carm -?i" to get an up to date list of all intrinsics, 80 | * Including the CMSIS ones. 81 | */ 82 | 83 | /*------------------ COSMIC Compiler -------------------*/ 84 | #elif defined ( __CSMC__ ) 85 | #include 86 | 87 | #endif 88 | 89 | /*@} end of group CMSIS_SIMD_intrinsics */ 90 | 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /* __CORE_CMSIMD_H */ 97 | -------------------------------------------------------------------------------- /diseqc2/system/include/stm32f0-stdperiph/stm32f0xx_conf.h: -------------------------------------------------------------------------------- 1 | #ifndef __STM32F0XX_CONF_H 2 | #define __STM32F0XX_CONF_H 3 | 4 | #include "stm32f0xx_adc.h" 5 | #include "stm32f0xx_can.h" 6 | #include "stm32f0xx_cec.h" 7 | #include "stm32f0xx_crc.h" 8 | #include "stm32f0xx_crs.h" 9 | #include "stm32f0xx_comp.h" 10 | #include "stm32f0xx_dac.h" 11 | #include "stm32f0xx_dbgmcu.h" 12 | #include "stm32f0xx_dma.h" 13 | #include "stm32f0xx_exti.h" 14 | #include "stm32f0xx_flash.h" 15 | #include "stm32f0xx_gpio.h" 16 | #include "stm32f0xx_syscfg.h" 17 | #include "stm32f0xx_i2c.h" 18 | #include "stm32f0xx_iwdg.h" 19 | #include "stm32f0xx_pwr.h" 20 | #include "stm32f0xx_rcc.h" 21 | #include "stm32f0xx_rtc.h" 22 | #include "stm32f0xx_spi.h" 23 | #include "stm32f0xx_tim.h" 24 | #include "stm32f0xx_usart.h" 25 | #include "stm32f0xx_wwdg.h" 26 | #include "stm32f0xx_misc.h" 27 | 28 | #ifdef USE_FULL_ASSERT 29 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) 30 | void assert_failed(uint8_t* file, uint32_t line); 31 | #else 32 | #define assert_param(expr) ((void)0) 33 | #endif /* USE_FULL_ASSERT */ 34 | 35 | #endif /* __STM32F0XX_CONF_H */ 36 | -------------------------------------------------------------------------------- /diseqc2/system/include/stm32f0-stdperiph/stm32f0xx_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_crc.h 4 | * @author MCD Application Team 5 | * @version V1.5.0 6 | * @date 05-December-2014 7 | * @brief This file contains all the functions prototypes for the CRC firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F0XX_CRC_H 31 | #define __STM32F0XX_CRC_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /*!< Includes ----------------------------------------------------------------*/ 38 | #include "stm32f0xx.h" 39 | 40 | /** @addtogroup STM32F0xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup CRC 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup CRC_ReverseInputData 52 | * @{ 53 | */ 54 | #define CRC_ReverseInputData_No ((uint32_t)0x00000000) /*!< No reverse operation of Input Data */ 55 | #define CRC_ReverseInputData_8bits CRC_CR_REV_IN_0 /*!< Reverse operation of Input Data on 8 bits */ 56 | #define CRC_ReverseInputData_16bits CRC_CR_REV_IN_1 /*!< Reverse operation of Input Data on 16 bits */ 57 | #define CRC_ReverseInputData_32bits CRC_CR_REV_IN /*!< Reverse operation of Input Data on 32 bits */ 58 | 59 | #define IS_CRC_REVERSE_INPUT_DATA(DATA) (((DATA) == CRC_ReverseInputData_No) || \ 60 | ((DATA) == CRC_ReverseInputData_8bits) || \ 61 | ((DATA) == CRC_ReverseInputData_16bits) || \ 62 | ((DATA) == CRC_ReverseInputData_32bits)) 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup CRC_PolynomialSize 69 | * @brief Only applicable for STM32F042 and STM32F072 devices 70 | * @{ 71 | */ 72 | #define CRC_PolSize_7 CRC_CR_POLSIZE /*!< 7-bit polynomial for CRC calculation */ 73 | #define CRC_PolSize_8 CRC_CR_POLSIZE_1 /*!< 8-bit polynomial for CRC calculation */ 74 | #define CRC_PolSize_16 CRC_CR_POLSIZE_0 /*!< 16-bit polynomial for CRC calculation */ 75 | #define CRC_PolSize_32 ((uint32_t)0x00000000)/*!< 32-bit polynomial for CRC calculation */ 76 | 77 | #define IS_CRC_POL_SIZE(SIZE) (((SIZE) == CRC_PolSize_7) || \ 78 | ((SIZE) == CRC_PolSize_8) || \ 79 | ((SIZE) == CRC_PolSize_16) || \ 80 | ((SIZE) == CRC_PolSize_32)) 81 | 82 | /** 83 | * @} 84 | */ 85 | 86 | /* Exported macro ------------------------------------------------------------*/ 87 | /* Exported functions ------------------------------------------------------- */ 88 | /* Configuration of the CRC computation unit **********************************/ 89 | void CRC_DeInit(void); 90 | void CRC_ResetDR(void); 91 | void CRC_PolynomialSizeSelect(uint32_t CRC_PolSize); /*!< Only applicable for STM32F042 and STM32F072 devices */ 92 | void CRC_ReverseInputDataSelect(uint32_t CRC_ReverseInputData); 93 | void CRC_ReverseOutputDataCmd(FunctionalState NewState); 94 | void CRC_SetInitRegister(uint32_t CRC_InitValue); 95 | void CRC_SetPolynomial(uint32_t CRC_Pol); /*!< Only applicable for STM32F042 and STM32F072 devices */ 96 | 97 | /* CRC computation ************************************************************/ 98 | uint32_t CRC_CalcCRC(uint32_t CRC_Data); 99 | uint32_t CRC_CalcCRC16bits(uint16_t CRC_Data); /*!< Only applicable for STM32F042 and STM32F072 devices */ 100 | uint32_t CRC_CalcCRC8bits(uint8_t CRC_Data); /*!< Only applicable for STM32F042 and STM32F072 devices */ 101 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength); 102 | uint32_t CRC_GetCRC(void); 103 | 104 | /* Independent register (IDR) access (write/read) *****************************/ 105 | void CRC_SetIDRegister(uint8_t CRC_IDValue); 106 | uint8_t CRC_GetIDRegister(void); 107 | 108 | #ifdef __cplusplus 109 | } 110 | #endif 111 | 112 | #endif /* __STM32F0XX_CRC_H */ 113 | 114 | /** 115 | * @} 116 | */ 117 | 118 | /** 119 | * @} 120 | */ 121 | 122 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 123 | -------------------------------------------------------------------------------- /diseqc2/system/include/stm32f0-stdperiph/stm32f0xx_crs.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_crs.h 4 | * @author MCD Application Team 5 | * @version V1.5.0 6 | * @date 05-December-2014 7 | * @brief This file contains all the functions prototypes for the CRS firmware 8 | * library, applicable only for STM32F042 and STM32F072 devices. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F0XX_CRS_H 31 | #define __STM32F0XX_CRS_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /*!< Includes ----------------------------------------------------------------*/ 38 | #include "stm32f0xx.h" 39 | 40 | /** @addtogroup STM32F0xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup CRS 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup CRS_Interrupt_Sources 52 | * @{ 53 | */ 54 | #define CRS_IT_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK */ 55 | #define CRS_IT_SYNCWARN CRS_ISR_SYNCWARNF /*!< SYNC warning */ 56 | #define CRS_IT_ERR CRS_ISR_ERRF /*!< error */ 57 | #define CRS_IT_ESYNC CRS_ISR_ESYNCF /*!< Expected SYNC */ 58 | #define CRS_IT_TRIMOVF CRS_ISR_TRIMOVF /*!< Trimming overflow or underflow */ 59 | #define CRS_IT_SYNCERR CRS_ISR_SYNCERR /*!< SYNC error */ 60 | #define CRS_IT_SYNCMISS CRS_ISR_SYNCMISS /*!< SYNC missed*/ 61 | 62 | #define IS_CRS_IT(IT) (((IT) == CRS_IT_SYNCOK) || ((IT) == CRS_IT_SYNCWARN) || \ 63 | ((IT) == CRS_IT_ERR) || ((IT) == CRS_IT_ESYNC)) 64 | 65 | #define IS_CRS_GET_IT(IT) (((IT) == CRS_IT_SYNCOK) || ((IT) == CRS_IT_SYNCWARN) || \ 66 | ((IT) == CRS_IT_ERR) || ((IT) == CRS_IT_ESYNC) || \ 67 | ((IT) == CRS_IT_TRIMOVF) || ((IT) == CRS_IT_SYNCERR) || \ 68 | ((IT) == CRS_IT_SYNCMISS)) 69 | 70 | #define IS_CRS_CLEAR_IT(IT) ((IT) != 0x00) 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** @defgroup CRS_Flags 77 | * @{ 78 | */ 79 | #define CRS_FLAG_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK */ 80 | #define CRS_FLAG_SYNCWARN CRS_ISR_SYNCWARNF /*!< SYNC warning */ 81 | #define CRS_FLAG_ERR CRS_ISR_ERRF /*!< error */ 82 | #define CRS_FLAG_ESYNC CRS_ISR_ESYNCF /*!< Expected SYNC */ 83 | #define CRS_FLAG_TRIMOVF CRS_ISR_TRIMOVF /*!< Trimming overflow or underflow */ 84 | #define CRS_FLAG_SYNCERR CRS_ISR_SYNCERR /*!< SYNC error */ 85 | #define CRS_FLAG_SYNCMISS CRS_ISR_SYNCMISS /*!< SYNC missed*/ 86 | 87 | #define IS_CRS_FLAG(FLAG) (((FLAG) == CRS_FLAG_SYNCOK) || ((FLAG) == CRS_FLAG_SYNCWARN) || \ 88 | ((FLAG) == CRS_FLAG_ERR) || ((FLAG) == CRS_FLAG_ESYNC) || \ 89 | ((FLAG) == CRS_FLAG_TRIMOVF) || ((FLAG) == CRS_FLAG_SYNCERR) || \ 90 | ((FLAG) == CRS_FLAG_SYNCMISS)) 91 | 92 | /** 93 | * @} 94 | */ 95 | 96 | /** @defgroup CRS_Synchro_Source 97 | * @{ 98 | */ 99 | #define CRS_SYNCSource_GPIO ((uint32_t)0x00) /*!< Synchro Signal soucre GPIO */ 100 | #define CRS_SYNCSource_LSE CRS_CFGR_SYNCSRC_0 /*!< Synchro Signal source LSE */ 101 | #define CRS_SYNCSource_USB CRS_CFGR_SYNCSRC_1 /*!< Synchro Signal source USB SOF */ 102 | 103 | #define IS_CRS_SYNC_SOURCE(SOURCE) (((SOURCE) == CRS_SYNCSource_GPIO) || \ 104 | ((SOURCE) == CRS_SYNCSource_LSE) ||\ 105 | ((SOURCE) == CRS_SYNCSource_USB)) 106 | /** 107 | * @} 108 | */ 109 | 110 | /** @defgroup CRS_SynchroDivider 111 | * @{ 112 | */ 113 | #define CRS_SYNC_Div1 ((uint32_t)0x00) /*!< Synchro Signal not divided */ 114 | #define CRS_SYNC_Div2 CRS_CFGR_SYNCDIV_0 /*!< Synchro Signal divided by 2 */ 115 | #define CRS_SYNC_Div4 CRS_CFGR_SYNCDIV_1 /*!< Synchro Signal divided by 4 */ 116 | #define CRS_SYNC_Div8 (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */ 117 | #define CRS_SYNC_Div16 CRS_CFGR_SYNCDIV_2 /*!< Synchro Signal divided by 16 */ 118 | #define CRS_SYNC_Div32 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */ 119 | #define CRS_SYNC_Div64 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */ 120 | #define CRS_SYNC_Div128 CRS_CFGR_SYNCDIV /*!< Synchro Signal divided by 128 */ 121 | 122 | #define IS_CRS_SYNC_DIV(DIV) (((DIV) == CRS_SYNC_Div1) || ((DIV) == CRS_SYNC_Div2) ||\ 123 | ((DIV) == CRS_SYNC_Div4) || ((DIV) == CRS_SYNC_Div8) || \ 124 | ((DIV) == CRS_SYNC_Div16) || ((DIV) == CRS_SYNC_Div32) || \ 125 | ((DIV) == CRS_SYNC_Div64) || ((DIV) == CRS_SYNC_Div128)) 126 | /** 127 | * @} 128 | */ 129 | 130 | /** @defgroup CRS_SynchroPolarity 131 | * @{ 132 | */ 133 | #define CRS_SYNCPolarity_Rising ((uint32_t)0x00) /*!< Synchro Active on rising edge */ 134 | #define CRS_SYNCPolarity_Falling CRS_CFGR_SYNCPOL /*!< Synchro Active on falling edge */ 135 | 136 | #define IS_CRS_SYNC_POLARITY(POLARITY) (((POLARITY) == CRS_SYNCPolarity_Rising) || \ 137 | ((POLARITY) == CRS_SYNCPolarity_Falling)) 138 | /** 139 | * @} 140 | */ 141 | 142 | 143 | 144 | /* Exported macro ------------------------------------------------------------*/ 145 | /* Exported functions ------------------------------------------------------- */ 146 | /* Configuration of the CRS **********************************/ 147 | void CRS_DeInit(void); 148 | void CRS_AdjustHSI48CalibrationValue(uint8_t CRS_HSI48CalibrationValue); 149 | void CRS_FrequencyErrorCounterCmd(FunctionalState NewState); 150 | void CRS_AutomaticCalibrationCmd(FunctionalState NewState); 151 | void CRS_SoftwareSynchronizationGenerate(void); 152 | void CRS_FrequencyErrorCounterReload(uint32_t CRS_ReloadValue); 153 | void CRS_FrequencyErrorLimitConfig(uint8_t CRS_ErrorLimitValue); 154 | void CRS_SynchronizationPrescalerConfig(uint32_t CRS_Prescaler); 155 | void CRS_SynchronizationSourceConfig(uint32_t CRS_Source); 156 | void CRS_SynchronizationPolarityConfig(uint32_t CRS_Polarity); 157 | uint32_t CRS_GetReloadValue(void); 158 | uint32_t CRS_GetHSI48CalibrationValue(void); 159 | uint32_t CRS_GetFrequencyErrorValue(void); 160 | uint32_t CRS_GetFrequencyErrorDirection(void); 161 | 162 | /* Interrupts and flags management functions **********************************/ 163 | void CRS_ITConfig(uint32_t CRS_IT, FunctionalState NewState); 164 | FlagStatus CRS_GetFlagStatus(uint32_t CRS_FLAG); 165 | void CRS_ClearFlag(uint32_t CRS_FLAG); 166 | ITStatus CRS_GetITStatus(uint32_t CRS_IT); 167 | void CRS_ClearITPendingBit(uint32_t CRS_IT); 168 | 169 | #ifdef __cplusplus 170 | } 171 | #endif 172 | 173 | #endif /* __STM32F0XX_CRS_H */ 174 | 175 | /** 176 | * @} 177 | */ 178 | 179 | /** 180 | * @} 181 | */ 182 | 183 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 184 | -------------------------------------------------------------------------------- /diseqc2/system/include/stm32f0-stdperiph/stm32f0xx_dbgmcu.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_dbgmcu.h 4 | * @author MCD Application Team 5 | * @version V1.5.0 6 | * @date 05-December-2014 7 | * @brief This file contains all the functions prototypes for the DBGMCU firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F0XX_DBGMCU_H 31 | #define __STM32F0XX_DBGMCU_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f0xx.h" 39 | 40 | /** @addtogroup STM32F0xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup DBGMCU 45 | * @{ 46 | */ 47 | /* Exported types ------------------------------------------------------------*/ 48 | /* Exported constants --------------------------------------------------------*/ 49 | 50 | 51 | /** @defgroup DBGMCU_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | #define DBGMCU_STOP DBGMCU_CR_DBG_STOP 56 | #define DBGMCU_STANDBY DBGMCU_CR_DBG_STANDBY 57 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF9) == 0x00) && ((PERIPH) != 0x00)) 58 | 59 | #define DBGMCU_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP /*!< Not applicable for STM32F030 devices */ 60 | #define DBGMCU_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP 61 | #define DBGMCU_TIM6_STOP DBGMCU_APB1_FZ_DBG_TIM6_STOP 62 | #define DBGMCU_TIM7_STOP DBGMCU_APB1_FZ_DBG_TIM7_STOP /*!< Only applicable for STM32F072 devices */ 63 | #define DBGMCU_TIM14_STOP DBGMCU_APB1_FZ_DBG_TIM14_STOP 64 | #define DBGMCU_RTC_STOP DBGMCU_APB1_FZ_DBG_RTC_STOP 65 | #define DBGMCU_WWDG_STOP DBGMCU_APB1_FZ_DBG_WWDG_STOP 66 | #define DBGMCU_IWDG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP 67 | #define DBGMCU_I2C1_SMBUS_TIMEOUT DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT 68 | #define DBGMCU_CAN1_STOP DBGMCU_APB1_FZ_DBG_CAN1_STOP /*!< Only applicable for STM32F042 and STM32F072 devices */ 69 | #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xFDDFE2CC) == 0x00) && ((PERIPH) != 0x00)) 70 | 71 | #define DBGMCU_TIM1_STOP DBGMCU_APB2_FZ_DBG_TIM1_STOP 72 | #define DBGMCU_TIM15_STOP DBGMCU_APB2_FZ_DBG_TIM15_STOP 73 | #define DBGMCU_TIM16_STOP DBGMCU_APB2_FZ_DBG_TIM16_STOP 74 | #define DBGMCU_TIM17_STOP DBGMCU_APB2_FZ_DBG_TIM17_STOP 75 | #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8F7FF) == 0x00) && ((PERIPH) != 0x00)) 76 | 77 | /** 78 | * @} 79 | */ 80 | 81 | /* Exported macro ------------------------------------------------------------*/ 82 | /* Exported functions ------------------------------------------------------- */ 83 | 84 | /* Device and Revision ID management functions ********************************/ 85 | uint32_t DBGMCU_GetREVID(void); 86 | uint32_t DBGMCU_GetDEVID(void); 87 | 88 | /* Peripherals Configuration functions ****************************************/ 89 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); 90 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState); 91 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState); 92 | 93 | #ifdef __cplusplus 94 | } 95 | #endif 96 | 97 | #endif /* __STM32F0XX_DBGMCU_H */ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 108 | -------------------------------------------------------------------------------- /diseqc2/system/include/stm32f0-stdperiph/stm32f0xx_exti.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_exti.h 4 | * @author MCD Application Team 5 | * @version V1.5.0 6 | * @date 05-December-2014 7 | * @brief This file contains all the functions prototypes for the EXTI 8 | * firmware library 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F0XX_EXTI_H 31 | #define __STM32F0XX_EXTI_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f0xx.h" 39 | 40 | /** @addtogroup STM32F0xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup EXTI 45 | * @{ 46 | */ 47 | /* Exported types ------------------------------------------------------------*/ 48 | 49 | /** 50 | * @brief EXTI mode enumeration 51 | */ 52 | 53 | typedef enum 54 | { 55 | EXTI_Mode_Interrupt = 0x00, 56 | EXTI_Mode_Event = 0x04 57 | }EXTIMode_TypeDef; 58 | 59 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event)) 60 | 61 | /** 62 | * @brief EXTI Trigger enumeration 63 | */ 64 | 65 | typedef enum 66 | { 67 | EXTI_Trigger_Rising = 0x08, 68 | EXTI_Trigger_Falling = 0x0C, 69 | EXTI_Trigger_Rising_Falling = 0x10 70 | }EXTITrigger_TypeDef; 71 | 72 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \ 73 | ((TRIGGER) == EXTI_Trigger_Falling) || \ 74 | ((TRIGGER) == EXTI_Trigger_Rising_Falling)) 75 | /** 76 | * @brief EXTI Init Structure definition 77 | */ 78 | 79 | typedef struct 80 | { 81 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled. 82 | This parameter can be any combination of @ref EXTI_Lines */ 83 | 84 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines. 85 | This parameter can be a value of @ref EXTIMode_TypeDef */ 86 | 87 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. 88 | This parameter can be a value of @ref EXTIMode_TypeDef */ 89 | 90 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines. 91 | This parameter can be set either to ENABLE or DISABLE */ 92 | }EXTI_InitTypeDef; 93 | 94 | /* Exported constants --------------------------------------------------------*/ 95 | 96 | /** @defgroup EXTI_Exported_Constants 97 | * @{ 98 | */ 99 | /** @defgroup EXTI_Lines 100 | * @{ 101 | */ 102 | 103 | #define EXTI_Line0 ((uint32_t)0x00000001) /*!< External interrupt line 0 */ 104 | #define EXTI_Line1 ((uint32_t)0x00000002) /*!< External interrupt line 1 */ 105 | #define EXTI_Line2 ((uint32_t)0x00000004) /*!< External interrupt line 2 */ 106 | #define EXTI_Line3 ((uint32_t)0x00000008) /*!< External interrupt line 3 */ 107 | #define EXTI_Line4 ((uint32_t)0x00000010) /*!< External interrupt line 4 */ 108 | #define EXTI_Line5 ((uint32_t)0x00000020) /*!< External interrupt line 5 */ 109 | #define EXTI_Line6 ((uint32_t)0x00000040) /*!< External interrupt line 6 */ 110 | #define EXTI_Line7 ((uint32_t)0x00000080) /*!< External interrupt line 7 */ 111 | #define EXTI_Line8 ((uint32_t)0x00000100) /*!< External interrupt line 8 */ 112 | #define EXTI_Line9 ((uint32_t)0x00000200) /*!< External interrupt line 9 */ 113 | #define EXTI_Line10 ((uint32_t)0x00000400) /*!< External interrupt line 10 */ 114 | #define EXTI_Line11 ((uint32_t)0x00000800) /*!< External interrupt line 11 */ 115 | #define EXTI_Line12 ((uint32_t)0x00001000) /*!< External interrupt line 12 */ 116 | #define EXTI_Line13 ((uint32_t)0x00002000) /*!< External interrupt line 13 */ 117 | #define EXTI_Line14 ((uint32_t)0x00004000) /*!< External interrupt line 14 */ 118 | #define EXTI_Line15 ((uint32_t)0x00008000) /*!< External interrupt line 15 */ 119 | #define EXTI_Line16 ((uint32_t)0x00010000) /*!< External interrupt line 16 120 | Connected to the PVD Output, 121 | not applicable for STM32F030 devices */ 122 | #define EXTI_Line17 ((uint32_t)0x00020000) /*!< Internal interrupt line 17 123 | Connected to the RTC Alarm 124 | event */ 125 | #define EXTI_Line18 ((uint32_t)0x00040000) /*!< Internal interrupt line 18 126 | Connected to the USB 127 | event, only applicable for 128 | STM32F072 devices */ 129 | #define EXTI_Line19 ((uint32_t)0x00080000) /*!< Internal interrupt line 19 130 | Connected to the RTC Tamper 131 | and Time Stamp events */ 132 | #define EXTI_Line20 ((uint32_t)0x00100000) /*!< Internal interrupt line 20 133 | Connected to the RTC wakeup 134 | event, only applicable for 135 | STM32F072 devices */ 136 | #define EXTI_Line21 ((uint32_t)0x00200000) /*!< Internal interrupt line 21 137 | Connected to the Comparator 1 138 | event, only applicable for STM32F051 139 | ans STM32F072 devices */ 140 | #define EXTI_Line22 ((uint32_t)0x00400000) /*!< Internal interrupt line 22 141 | Connected to the Comparator 2 142 | event, only applicable for STM32F051 143 | and STM32F072 devices */ 144 | #define EXTI_Line23 ((uint32_t)0x00800000) /*!< Internal interrupt line 23 145 | Connected to the I2C1 wakeup 146 | event, not applicable for STM32F030 devices */ 147 | #define EXTI_Line25 ((uint32_t)0x02000000) /*!< Internal interrupt line 25 148 | Connected to the USART1 wakeup 149 | event, not applicable for STM32F030 devices */ 150 | #define EXTI_Line26 ((uint32_t)0x04000000) /*!< Internal interrupt line 26 151 | Connected to the USART2 wakeup 152 | event, applicable only for 153 | STM32F072 devices */ 154 | #define EXTI_Line27 ((uint32_t)0x08000000) /*!< Internal interrupt line 27 155 | Connected to the CEC wakeup 156 | event, applicable only for STM32F051 157 | and STM32F072 devices */ 158 | #define EXTI_Line31 ((uint32_t)0x80000000) /*!< Internal interrupt line 31 159 | Connected to the VDD USB monitor 160 | event, applicable only for 161 | STM32F072 devices */ 162 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0x71000000) == 0x00) && ((LINE) != (uint16_t)0x00)) 163 | 164 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \ 165 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \ 166 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \ 167 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \ 168 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \ 169 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \ 170 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \ 171 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \ 172 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \ 173 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19) || \ 174 | ((LINE) == EXTI_Line20) || ((LINE) == EXTI_Line21) || \ 175 | ((LINE) == EXTI_Line22) || ((LINE) == EXTI_Line23) || \ 176 | ((LINE) == EXTI_Line25) || ((LINE) == EXTI_Line26) || \ 177 | ((LINE) == EXTI_Line27) || ((LINE) == EXTI_Line31)) 178 | 179 | /** 180 | * @} 181 | */ 182 | 183 | /** 184 | * @} 185 | */ 186 | 187 | /* Exported macro ------------------------------------------------------------*/ 188 | /* Exported functions ------------------------------------------------------- */ 189 | /* Function used to set the EXTI configuration to the default reset state *****/ 190 | void EXTI_DeInit(void); 191 | 192 | /* Initialization and Configuration functions *********************************/ 193 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); 194 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); 195 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); 196 | 197 | /* Interrupts and flags management functions **********************************/ 198 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); 199 | void EXTI_ClearFlag(uint32_t EXTI_Line); 200 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); 201 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line); 202 | 203 | #ifdef __cplusplus 204 | } 205 | #endif 206 | 207 | #endif /* __STM32F0XX_EXTI_H */ 208 | /** 209 | * @} 210 | */ 211 | 212 | /** 213 | * @} 214 | */ 215 | 216 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 217 | -------------------------------------------------------------------------------- /diseqc2/system/include/stm32f0-stdperiph/stm32f0xx_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_iwdg.h 4 | * @author MCD Application Team 5 | * @version V1.5.0 6 | * @date 05-December-2014 7 | * @brief This file contains all the functions prototypes for the IWDG 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F0XX_IWDG_H 31 | #define __STM32F0XX_IWDG_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f0xx.h" 39 | 40 | /** @addtogroup STM32F0xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup IWDG 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | 51 | /** @defgroup IWDG_Exported_Constants 52 | * @{ 53 | */ 54 | 55 | /** @defgroup IWDG_WriteAccess 56 | * @{ 57 | */ 58 | 59 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) 60 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000) 61 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ 62 | ((ACCESS) == IWDG_WriteAccess_Disable)) 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @defgroup IWDG_prescaler 68 | * @{ 69 | */ 70 | 71 | #define IWDG_Prescaler_4 ((uint8_t)0x00) 72 | #define IWDG_Prescaler_8 ((uint8_t)0x01) 73 | #define IWDG_Prescaler_16 ((uint8_t)0x02) 74 | #define IWDG_Prescaler_32 ((uint8_t)0x03) 75 | #define IWDG_Prescaler_64 ((uint8_t)0x04) 76 | #define IWDG_Prescaler_128 ((uint8_t)0x05) 77 | #define IWDG_Prescaler_256 ((uint8_t)0x06) 78 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ 79 | ((PRESCALER) == IWDG_Prescaler_8) || \ 80 | ((PRESCALER) == IWDG_Prescaler_16) || \ 81 | ((PRESCALER) == IWDG_Prescaler_32) || \ 82 | ((PRESCALER) == IWDG_Prescaler_64) || \ 83 | ((PRESCALER) == IWDG_Prescaler_128)|| \ 84 | ((PRESCALER) == IWDG_Prescaler_256)) 85 | /** 86 | * @} 87 | */ 88 | 89 | /** @defgroup IWDG_Flag 90 | * @{ 91 | */ 92 | 93 | #define IWDG_FLAG_PVU IWDG_SR_PVU 94 | #define IWDG_FLAG_RVU IWDG_SR_RVU 95 | #define IWDG_FLAG_WVU IWDG_SR_WVU 96 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU) || \ 97 | ((FLAG) == IWDG_FLAG_WVU)) 98 | 99 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) 100 | 101 | #define IS_IWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0xFFF) 102 | /** 103 | * @} 104 | */ 105 | 106 | /** 107 | * @} 108 | */ 109 | 110 | /* Exported macro ------------------------------------------------------------*/ 111 | /* Exported functions ------------------------------------------------------- */ 112 | 113 | /* Prescaler and Counter configuration functions ******************************/ 114 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); 115 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); 116 | void IWDG_SetReload(uint16_t Reload); 117 | void IWDG_ReloadCounter(void); 118 | void IWDG_SetWindowValue(uint16_t WindowValue); 119 | 120 | /* IWDG activation function ***************************************************/ 121 | void IWDG_Enable(void); 122 | 123 | /* Flag management function ***************************************************/ 124 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); 125 | 126 | #ifdef __cplusplus 127 | } 128 | #endif 129 | 130 | #endif /* __STM32F0XX_IWDG_H */ 131 | 132 | /** 133 | * @} 134 | */ 135 | 136 | /** 137 | * @} 138 | */ 139 | 140 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 141 | -------------------------------------------------------------------------------- /diseqc2/system/include/stm32f0-stdperiph/stm32f0xx_misc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_misc.h 4 | * @author MCD Application Team 5 | * @version V1.5.0 6 | * @date 05-December-2014 7 | * @brief This file contains all the functions prototypes for the miscellaneous 8 | * firmware library functions (add-on to CMSIS functions). 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F0XX_MISC_H 31 | #define __STM32F0XX_MISC_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f0xx.h" 39 | 40 | /** @addtogroup STM32F0xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup MISC 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | 50 | /** 51 | * @brief NVIC Init Structure definition 52 | */ 53 | 54 | typedef struct 55 | { 56 | uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled. 57 | This parameter can be a value of @ref IRQn_Type 58 | (For the complete STM32 Devices IRQ Channels list, 59 | please refer to stm32f0xx.h file) */ 60 | 61 | uint8_t NVIC_IRQChannelPriority; /*!< Specifies the priority level for the IRQ channel specified 62 | in NVIC_IRQChannel. This parameter can be a value 63 | between 0 and 3. */ 64 | 65 | FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel 66 | will be enabled or disabled. 67 | This parameter can be set either to ENABLE or DISABLE */ 68 | } NVIC_InitTypeDef; 69 | 70 | /** 71 | * 72 | @verbatim 73 | 74 | @endverbatim 75 | */ 76 | 77 | /* Exported constants --------------------------------------------------------*/ 78 | 79 | /** @defgroup MISC_Exported_Constants 80 | * @{ 81 | */ 82 | 83 | /** @defgroup MISC_System_Low_Power 84 | * @{ 85 | */ 86 | 87 | #define NVIC_LP_SEVONPEND ((uint8_t)0x10) 88 | #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04) 89 | #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02) 90 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \ 91 | ((LP) == NVIC_LP_SLEEPDEEP) || \ 92 | ((LP) == NVIC_LP_SLEEPONEXIT)) 93 | /** 94 | * @} 95 | */ 96 | 97 | /** @defgroup MISC_Preemption_Priority_Group 98 | * @{ 99 | */ 100 | #define IS_NVIC_PRIORITY(PRIORITY) ((PRIORITY) < 0x04) 101 | 102 | /** 103 | * @} 104 | */ 105 | 106 | /** @defgroup MISC_SysTick_clock_source 107 | * @{ 108 | */ 109 | 110 | #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB) 111 | #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004) 112 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \ 113 | ((SOURCE) == SysTick_CLKSource_HCLK_Div8)) 114 | /** 115 | * @} 116 | */ 117 | 118 | /** 119 | * @} 120 | */ 121 | 122 | /* Exported macro ------------------------------------------------------------*/ 123 | /* Exported functions ------------------------------------------------------- */ 124 | 125 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct); 126 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState); 127 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource); 128 | 129 | #ifdef __cplusplus 130 | } 131 | #endif 132 | 133 | #endif /* __STM32F0XX_MISC_H */ 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | /** 140 | * @} 141 | */ 142 | 143 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 144 | -------------------------------------------------------------------------------- /diseqc2/system/include/stm32f0-stdperiph/stm32f0xx_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_pwr.h 4 | * @author MCD Application Team 5 | * @version V1.5.0 6 | * @date 05-December-2014 7 | * @brief This file contains all the functions prototypes for the PWR firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F0XX_PWR_H 31 | #define __STM32F0XX_PWR_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f0xx.h" 39 | 40 | /** @addtogroup STM32F0xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup PWR 45 | * @{ 46 | */ 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | 50 | /* Exported constants --------------------------------------------------------*/ 51 | 52 | /** @defgroup PWR_Exported_Constants 53 | * @{ 54 | */ 55 | 56 | /** @defgroup PWR_PVD_detection_level 57 | * @brief This parameters are only applicable for STM32F051 and STM32F072 devices 58 | * @{ 59 | */ 60 | 61 | #define PWR_PVDLevel_0 PWR_CR_PLS_LEV0 62 | #define PWR_PVDLevel_1 PWR_CR_PLS_LEV1 63 | #define PWR_PVDLevel_2 PWR_CR_PLS_LEV2 64 | #define PWR_PVDLevel_3 PWR_CR_PLS_LEV3 65 | #define PWR_PVDLevel_4 PWR_CR_PLS_LEV4 66 | #define PWR_PVDLevel_5 PWR_CR_PLS_LEV5 67 | #define PWR_PVDLevel_6 PWR_CR_PLS_LEV6 68 | #define PWR_PVDLevel_7 PWR_CR_PLS_LEV7 69 | 70 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \ 71 | ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \ 72 | ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \ 73 | ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7)) 74 | /** 75 | * @} 76 | */ 77 | 78 | /** @defgroup PWR_WakeUp_Pins 79 | * @{ 80 | */ 81 | 82 | #define PWR_WakeUpPin_1 PWR_CSR_EWUP1 83 | #define PWR_WakeUpPin_2 PWR_CSR_EWUP2 84 | #define PWR_WakeUpPin_3 PWR_CSR_EWUP3 /*!< only applicable for STM32F072 devices */ 85 | #define PWR_WakeUpPin_4 PWR_CSR_EWUP4 /*!< only applicable for STM32F072 devices */ 86 | #define PWR_WakeUpPin_5 PWR_CSR_EWUP5 /*!< only applicable for STM32F072 devices */ 87 | #define PWR_WakeUpPin_6 PWR_CSR_EWUP6 /*!< only applicable for STM32F072 devices */ 88 | #define PWR_WakeUpPin_7 PWR_CSR_EWUP7 /*!< only applicable for STM32F072 devices */ 89 | #define PWR_WakeUpPin_8 PWR_CSR_EWUP8 /*!< only applicable for STM32F072 devices */ 90 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WakeUpPin_1) || ((PIN) == PWR_WakeUpPin_2) || \ 91 | ((PIN) == PWR_WakeUpPin_3) || ((PIN) == PWR_WakeUpPin_4) || \ 92 | ((PIN) == PWR_WakeUpPin_5) || ((PIN) == PWR_WakeUpPin_6) || \ 93 | ((PIN) == PWR_WakeUpPin_7) || ((PIN) == PWR_WakeUpPin_8)) 94 | /** 95 | * @} 96 | */ 97 | 98 | 99 | /** @defgroup PWR_Regulator_state_is_Sleep_STOP_mode 100 | * @{ 101 | */ 102 | 103 | #define PWR_Regulator_ON ((uint32_t)0x00000000) 104 | #define PWR_Regulator_LowPower PWR_CR_LPSDSR 105 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \ 106 | ((REGULATOR) == PWR_Regulator_LowPower)) 107 | /** 108 | * @} 109 | */ 110 | 111 | /** @defgroup PWR_SLEEP_mode_entry 112 | * @{ 113 | */ 114 | 115 | #define PWR_SLEEPEntry_WFI ((uint8_t)0x01) 116 | #define PWR_SLEEPEntry_WFE ((uint8_t)0x02) 117 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPEntry_WFI) || ((ENTRY) == PWR_SLEEPEntry_WFE)) 118 | 119 | /** 120 | * @} 121 | */ 122 | 123 | /** @defgroup PWR_STOP_mode_entry 124 | * @{ 125 | */ 126 | 127 | #define PWR_STOPEntry_WFI ((uint8_t)0x01) 128 | #define PWR_STOPEntry_WFE ((uint8_t)0x02) 129 | #define PWR_STOPEntry_SLEEPONEXIT ((uint8_t)0x03) 130 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE) ||\ 131 | ((ENTRY) == PWR_STOPEntry_SLEEPONEXIT)) 132 | 133 | /** 134 | * @} 135 | */ 136 | 137 | /** @defgroup PWR_Flag 138 | * @{ 139 | */ 140 | 141 | #define PWR_FLAG_WU PWR_CSR_WUF 142 | #define PWR_FLAG_SB PWR_CSR_SBF 143 | #define PWR_FLAG_PVDO PWR_CSR_PVDO /*!< Not applicable for STM32F030 devices */ 144 | #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF 145 | 146 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ 147 | ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_VREFINTRDY)) 148 | 149 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB)) 150 | /** 151 | * @} 152 | */ 153 | 154 | /** 155 | * @} 156 | */ 157 | 158 | /* Exported macro ------------------------------------------------------------*/ 159 | /* Exported functions ------------------------------------------------------- */ 160 | 161 | /* Function used to set the PWR configuration to the default reset state ******/ 162 | void PWR_DeInit(void); 163 | 164 | /* Backup Domain Access function **********************************************/ 165 | void PWR_BackupAccessCmd(FunctionalState NewState); 166 | 167 | /* PVD configuration functions ************************************************/ 168 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); /*!< only applicable for STM32F051 and STM32F072 devices */ 169 | void PWR_PVDCmd(FunctionalState NewState); /*!< only applicable for STM32F051 and STM32F072 devices */ 170 | 171 | /* WakeUp pins configuration functions ****************************************/ 172 | void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState); 173 | 174 | /* Low Power modes configuration functions ************************************/ 175 | void PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry); 176 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); 177 | void PWR_EnterSTANDBYMode(void); 178 | 179 | /* Flags management functions *************************************************/ 180 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); 181 | void PWR_ClearFlag(uint32_t PWR_FLAG); 182 | 183 | #ifdef __cplusplus 184 | } 185 | #endif 186 | 187 | #endif /* __STM32F0XX_PWR_H */ 188 | 189 | /** 190 | * @} 191 | */ 192 | 193 | /** 194 | * @} 195 | */ 196 | 197 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 198 | -------------------------------------------------------------------------------- /diseqc2/system/include/stm32f0-stdperiph/stm32f0xx_wwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_wwdg.h 4 | * @author MCD Application Team 5 | * @version V1.5.0 6 | * @date 05-December-2014 7 | * @brief This file contains all the functions prototypes for the WWDG 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F0XX_WWDG_H 31 | #define __STM32F0XX_WWDG_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /* Includes ------------------------------------------------------------------*/ 38 | #include "stm32f0xx.h" 39 | 40 | /** @addtogroup STM32F0xx_StdPeriph_Driver 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup WWDG 45 | * @{ 46 | */ 47 | /* Exported types ------------------------------------------------------------*/ 48 | /* Exported constants --------------------------------------------------------*/ 49 | 50 | /** @defgroup WWDG_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup WWDG_Prescaler 55 | * @{ 56 | */ 57 | 58 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000) 59 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080) 60 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100) 61 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180) 62 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \ 63 | ((PRESCALER) == WWDG_Prescaler_2) || \ 64 | ((PRESCALER) == WWDG_Prescaler_4) || \ 65 | ((PRESCALER) == WWDG_Prescaler_8)) 66 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F) 67 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F)) 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /* Exported macro ------------------------------------------------------------*/ 78 | /* Exported functions ------------------------------------------------------- */ 79 | /* Function used to set the WWDG configuration to the default reset state ****/ 80 | void WWDG_DeInit(void); 81 | 82 | /* Prescaler, Refresh window and Counter configuration functions **************/ 83 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); 84 | void WWDG_SetWindowValue(uint8_t WindowValue); 85 | void WWDG_EnableIT(void); 86 | void WWDG_SetCounter(uint8_t Counter); 87 | 88 | /* WWDG activation functions **************************************************/ 89 | void WWDG_Enable(uint8_t Counter); 90 | 91 | /* Interrupts and flags management functions **********************************/ 92 | FlagStatus WWDG_GetFlagStatus(void); 93 | void WWDG_ClearFlag(void); 94 | 95 | #ifdef __cplusplus 96 | } 97 | #endif 98 | 99 | #endif /* __STM32F0XX_WWDG_H */ 100 | 101 | /** 102 | * @} 103 | */ 104 | 105 | /** 106 | * @} 107 | */ 108 | 109 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 110 | -------------------------------------------------------------------------------- /diseqc2/system/include/usb/usb_bsp.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usb_bsp.h 4 | * @author MCD Application Team 5 | * @version V1.0.1 6 | * @date 31-January-2014 7 | * @brief Specific api's related to the used hardware platform 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __USB_BSP__H__ 30 | #define __USB_BSP__H__ 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "usb_dcd.h" 34 | 35 | #define USB_IT_PRIO 1 36 | /* Exported defines ----------------------------------------------------------*/ 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* Exported macros -----------------------------------------------------------*/ 39 | /* Exported variables --------------------------------------------------------*/ 40 | /* Exported functions ------------------------------------------------------- */ 41 | void USB_BSP_EnableInterrupt (USB_CORE_HANDLE *pdev); 42 | void USB_BSP_uDelay (const uint32_t usec); 43 | void USB_BSP_mDelay (const uint32_t msec); 44 | 45 | #endif /* __USB_BSP__H__ */ 46 | 47 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 48 | 49 | -------------------------------------------------------------------------------- /diseqc2/system/include/usb/usb_conf.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usb_conf.h 4 | * @author MCD Application Team 5 | * @version V1.0.0 6 | * @date 31-January-2014 7 | * @brief General low level driver configuration 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __USB_CONF__H__ 30 | #define __USB_CONF__H__ 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | 34 | #include "stm32f0xx.h" 35 | 36 | /* Exported types ------------------------------------------------------------*/ 37 | /* Exported constants --------------------------------------------------------*/ 38 | /* Select D+ pullup: internal or external */ 39 | //#ifdef USE_STM32072B_EVAL 40 | /* When using STM32072B_EVAL board the internal pullup must be enabled */ 41 | #define INTERNAL_PULLUP 42 | #//endif 43 | 44 | /* Define if Low power mode is enabled; it allows entering the device into STOP mode 45 | following USB Suspend event, and wakes up after the USB wakeup event is received. */ 46 | /* #define USB_DEVICE_LOW_PWR_MGMT_SUPPORT */ 47 | 48 | /* Configure the USB clock source as HSI48 with Clock Recovery System(CRS)*/ 49 | #define USB_CLOCK_SOURCE_CRS 50 | 51 | 52 | /* Endpoints used by the device */ 53 | #define EP_NUM (4) /* EP0 + EP1 For CDC IN + 54 | EP3 For CDC OUT +EP2 For CDC INT */ 55 | 56 | /* buffer table base address */ 57 | #define BTABLE_ADDRESS (0x000) 58 | 59 | /* EP0, RX/TX buffers base address */ 60 | #define ENDP0_RX_ADDRESS (0x40) 61 | #define ENDP0_TX_ADDRESS (0x80) 62 | 63 | /* EP2 Tx buffer base address */ 64 | #define BULK_IN_TX_ADDRESS (0xC0) 65 | 66 | /* EP2 Rx buffer base address */ 67 | #define BULK_OUT_RX_ADDRESS (0x110) 68 | 69 | /* EP3 Tx buffer base address */ 70 | #define INT_IN_TX_ADDRESS (0x100) 71 | /* Exported macro ------------------------------------------------------------*/ 72 | /* Exported functions ------------------------------------------------------- */ 73 | 74 | #endif /* __USB_CONF__H__ */ 75 | 76 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 77 | -------------------------------------------------------------------------------- /diseqc2/system/include/usb/usb_dcd.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usb_dcd.h 4 | * @author MCD Application Team 5 | * @version V1.0.1 6 | * @date 31-January-2014 7 | * @brief Device Control Driver Header file 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __DCD_H__ 30 | #define __DCD_H__ 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "usb_core.h" 34 | 35 | /* Exported defines ----------------------------------------------------------*/ 36 | #define USB_EP_CONTROL 0 37 | #define USB_EP_ISOC 1 38 | #define USB_EP_BULK 2 39 | #define USB_EP_INT 3 40 | 41 | /* Endpoint Kind */ 42 | #define USB_SNG_BUF 0 43 | #define USB_DBL_BUF 1 44 | 45 | /* Device Status */ 46 | #define USB_UNCONNECTED 0 47 | #define USB_DEFAULT 1 48 | #define USB_ADDRESSED 2 49 | #define USB_CONFIGURED 3 50 | #define USB_SUSPENDED 4 51 | 52 | 53 | /* Exported types ------------------------------------------------------------*/ 54 | /******************************************************************************** 55 | Data structure type 56 | ********************************************************************************/ 57 | typedef struct 58 | { 59 | uint8_t bLength; 60 | uint8_t bDescriptorType; 61 | uint8_t bEndpointAddress; 62 | uint8_t bmAttributes; 63 | uint16_t wMaxPacketSize; 64 | uint8_t bInterval; 65 | } 66 | EP_DESCRIPTOR , *PEP_DESCRIPTOR; 67 | 68 | typedef struct USB_ep 69 | { 70 | uint8_t num; 71 | uint8_t is_in; 72 | uint8_t is_stall; 73 | uint8_t type; 74 | uint16_t pmaadress; 75 | uint16_t pmaaddr0; 76 | uint16_t pmaaddr1; 77 | uint8_t doublebuffer; 78 | uint32_t maxpacket; 79 | /* transaction level variables !!! up to one max packet per transaction !!! */ 80 | uint8_t *xfer_buff; 81 | uint32_t xfer_len ; 82 | uint32_t xfer_count; 83 | /* control transfer variables*/ 84 | uint32_t rem_data_len; 85 | uint32_t total_data_len; 86 | uint32_t ctl_data_len; 87 | } 88 | USB_EP; 89 | 90 | typedef struct usb_setup_req { 91 | 92 | uint8_t bmRequest; 93 | uint8_t bRequest; 94 | uint16_t wValue; 95 | uint16_t wIndex; 96 | uint16_t wLength; 97 | } USB_SETUP_REQ; 98 | 99 | typedef struct _Device_TypeDef 100 | { 101 | uint8_t *(*GetDeviceDescriptor)( uint8_t speed , uint16_t *length); 102 | #ifdef LPM_ENABLED 103 | uint8_t *(*GetBOSDescriptor)( uint8_t speed , uint16_t *length); 104 | #endif 105 | uint8_t *(*GetLangIDStrDescriptor)( uint8_t speed , uint16_t *length); 106 | uint8_t *(*GetManufacturerStrDescriptor)( uint8_t speed , uint16_t *length); 107 | uint8_t *(*GetProductStrDescriptor)( uint8_t speed , uint16_t *length); 108 | uint8_t *(*GetSerialStrDescriptor)( uint8_t speed , uint16_t *length); 109 | uint8_t *(*GetConfigurationStrDescriptor)( uint8_t speed , uint16_t *length); 110 | uint8_t *(*GetInterfaceStrDescriptor)( uint8_t speed , uint16_t *length); 111 | } USBD_DEVICE, *pUSBD_DEVICE; 112 | 113 | 114 | 115 | 116 | typedef struct _Device_cb 117 | { 118 | uint8_t (*Init) (void *pdev , uint8_t cfgidx); 119 | uint8_t (*DeInit) (void *pdev , uint8_t cfgidx); 120 | /* Control Endpoints*/ 121 | uint8_t (*Setup) (void *pdev , USB_SETUP_REQ *req); 122 | uint8_t (*EP0_TxSent) (void *pdev ); 123 | uint8_t (*EP0_RxReady) (void *pdev); 124 | /* Class Specific Endpoints*/ 125 | uint8_t (*DataIn) (void *pdev , uint8_t epnum); 126 | uint8_t (*DataOut) (void *pdev , uint8_t epnum); 127 | uint8_t (*SOF) (void *pdev); 128 | uint8_t *(*GetConfigDescriptor)( uint8_t speed , uint16_t *length); 129 | 130 | #ifdef USB_SUPPORT_USER_STRING_DESC 131 | uint8_t *(*GetUsrStrDescriptor)( uint8_t speed ,uint8_t index, uint16_t *length); 132 | #endif 133 | 134 | } USBD_Class_cb_TypeDef; 135 | 136 | 137 | 138 | typedef struct _DCD 139 | { 140 | uint8_t device_config; 141 | uint8_t device_state; 142 | uint8_t device_status; 143 | uint8_t device_old_status; 144 | uint8_t device_address; 145 | uint32_t DevRemoteWakeup; 146 | uint32_t speed; 147 | uint8_t setup_packet [8]; 148 | USB_EP in_ep [EP_NUM]; 149 | USB_EP out_ep [EP_NUM]; 150 | USBD_Class_cb_TypeDef *class_cb; 151 | USBD_DEVICE *usr_device; 152 | uint8_t *pConfig_descriptor; 153 | } 154 | DCD_DEV , *DCD_PDEV; 155 | 156 | typedef struct USB_Device_handle 157 | { 158 | DCD_DEV dev; 159 | } 160 | USB_DEVICE_HANDLE, USB_CORE_HANDLE; 161 | 162 | /* Exported macros -----------------------------------------------------------*/ 163 | /* Exported variables --------------------------------------------------------*/ 164 | /* Exported functions ------------------------------------------------------- */ 165 | 166 | /******************************************************************************** 167 | EXPORTED FUNCTION FROM THE USB-DEVICE LAYER 168 | ********************************************************************************/ 169 | void DCD_Init(USB_CORE_HANDLE *pdev); 170 | 171 | void DCD_DevConnect (USB_CORE_HANDLE *pdev); 172 | void DCD_DevDisconnect (USB_CORE_HANDLE *pdev); 173 | void DCD_EP_SetAddress (USB_CORE_HANDLE *pdev, 174 | uint8_t address); 175 | 176 | uint32_t DCD_PMA_Config(USB_CORE_HANDLE *pdev , 177 | uint16_t ep_addr, 178 | uint16_t ep_kind, 179 | uint32_t pmaadress); 180 | 181 | uint32_t DCD_EP_Open(USB_CORE_HANDLE *pdev , 182 | uint16_t ep_addr, 183 | uint16_t ep_mps, 184 | uint8_t ep_type); 185 | 186 | uint32_t DCD_EP_Close (USB_CORE_HANDLE *pdev, 187 | uint8_t ep_addr); 188 | 189 | 190 | uint32_t DCD_EP_PrepareRx ( USB_CORE_HANDLE *pdev, 191 | uint8_t ep_addr, 192 | uint8_t *pbuf, 193 | uint16_t buf_len); 194 | 195 | uint32_t DCD_EP_Tx (USB_CORE_HANDLE *pdev, 196 | uint8_t ep_addr, 197 | uint8_t *pbuf, 198 | uint32_t buf_len); 199 | uint32_t DCD_EP_Stall (USB_CORE_HANDLE *pdev, 200 | uint8_t epnum); 201 | uint32_t DCD_EP_ClrStall (USB_CORE_HANDLE *pdev, 202 | uint8_t epnum); 203 | 204 | uint32_t DCD_Handle_ISR(USB_CORE_HANDLE *pdev); 205 | 206 | uint32_t DCD_GetEPStatus(USB_CORE_HANDLE *pdev , 207 | uint8_t epnum); 208 | 209 | void DCD_SetEPStatus (USB_CORE_HANDLE *pdev , 210 | uint8_t epnum , 211 | uint32_t Status); 212 | 213 | void DCD_StopDevice(USB_CORE_HANDLE *pdev); 214 | 215 | #endif /* __DCD_H__ */ 216 | 217 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 218 | -------------------------------------------------------------------------------- /diseqc2/system/include/usb/usb_dcd_int.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usb_dcd_int.h 4 | * @author MCD Application Team 5 | * @version V1.0.1 6 | * @date 31-January-2014 7 | * @brief Device Control driver Interrupt management Header file 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef USB_DCD_INT_H__ 30 | #define USB_DCD_INT_H__ 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "usbd_pwr.h" 34 | 35 | /* Exported defines ----------------------------------------------------------*/ 36 | /* Mask defining which events has to be handled by the device application software */ 37 | #define IMR_MSK (CNTR_CTRM | CNTR_WKUPM | CNTR_SUSPM | CNTR_ERRM | CNTR_SOFM | \ 38 | CNTR_ESOFM | CNTR_RESETM) 39 | #ifdef LPM_ENABLED 40 | #undef IMR_MSK 41 | #define IMR_MSK (CNTR_CTRM | CNTR_WKUPM | CNTR_SUSPM | CNTR_ERRM | CNTR_SOFM | \ 42 | CNTR_ESOFM | CNTR_RESETM | CNTR_L1REQM) 43 | #endif 44 | 45 | 46 | 47 | /* Exported types ------------------------------------------------------------*/ 48 | typedef struct _USBD_DCD_INT 49 | { 50 | uint8_t (* DataOutStage) (USB_CORE_HANDLE *pdev , uint8_t epnum); 51 | uint8_t (* DataInStage) (USB_CORE_HANDLE *pdev , uint8_t epnum); 52 | uint8_t (* SetupStage) (USB_CORE_HANDLE *pdev); 53 | uint8_t (* SOF) (USB_CORE_HANDLE *pdev); 54 | uint8_t (* Reset) (USB_CORE_HANDLE *pdev); 55 | uint8_t (* Suspend) (USB_CORE_HANDLE *pdev); 56 | uint8_t (* Resume) (USB_CORE_HANDLE *pdev); 57 | 58 | }USBD_DCD_INT_cb_TypeDef; 59 | 60 | extern USBD_DCD_INT_cb_TypeDef *USBD_DCD_INT_fops; 61 | 62 | /* Exported macros -----------------------------------------------------------*/ 63 | /* Exported variables --------------------------------------------------------*/ 64 | /* Exported functions ------------------------------------------------------- */ 65 | void CTR(void); 66 | void USB_Istr(void); 67 | 68 | #endif /* USB_DCD_INT_H__ */ 69 | 70 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 71 | -------------------------------------------------------------------------------- /diseqc2/system/include/usb/usbd_conf.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_conf.h 4 | * @author MCD Application Team 5 | * @version V1.0.0 6 | * @date 31-January-2014 7 | * @brief USB Device configuration file 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __USBD_CONF__H__ 30 | #define __USBD_CONF__H__ 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "usb_conf.h" 34 | 35 | /* Exported types ------------------------------------------------------------*/ 36 | /* Exported constants --------------------------------------------------------*/ 37 | #define USBD_CFG_MAX_NUM 1 38 | #define USBD_ITF_MAX_NUM 1 39 | 40 | #define USBD_SELF_POWERED 41 | 42 | #define USB_MAX_STR_DESC_SIZ 255 43 | 44 | #define CDC_IN_EP 0x81 /* EP1 for data IN */ 45 | #define CDC_OUT_EP 0x03 /* EP3 for data OUT */ 46 | #define CDC_CMD_EP 0x82 /* EP2 for CDC commands */ 47 | 48 | /* CDC Endpoints parameters: you can fine tune these values depending on the needed baudrates and performance. */ 49 | #define CDC_DATA_MAX_PACKET_SIZE 64 /* Endpoint IN & OUT Packet size */ 50 | #define CDC_CMD_PACKET_SZE 8 /* Control Endpoint Packet size */ 51 | 52 | #define CDC_IN_FRAME_INTERVAL 5 /* Number of frames between IN transfers */ 53 | #define APP_RX_DATA_SIZE 2048 /* Total size of IN buffer: 54 | APP_RX_DATA_SIZE*8/MAX_BAUDARATE*1000 should be > CDC_IN_FRAME_INTERVAL */ 55 | 56 | #endif /* __USBD_CONF__H__ */ 57 | 58 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 59 | 60 | -------------------------------------------------------------------------------- /diseqc2/system/include/usb/usbd_core.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_core.h 4 | * @author MCD Application Team 5 | * @version V1.0.1 6 | * @date 31-January-2014 7 | * @brief Header file for usbd_core.c 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __USBD_CORE_H 30 | #define __USBD_CORE_H 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "usb_dcd.h" 34 | #include "usb_dcd_int.h" 35 | 36 | /* Exported defines ----------------------------------------------------------*/ 37 | /* Exported types ------------------------------------------------------------*/ 38 | typedef enum { 39 | USBD_OK = 0, 40 | USBD_BUSY, 41 | USBD_FAIL, 42 | }USBD_Status; 43 | /* Exported macros -----------------------------------------------------------*/ 44 | /* Exported variables --------------------------------------------------------*/ 45 | /* Exported functions ------------------------------------------------------- */ 46 | void USBD_Init(USB_CORE_HANDLE *pdev, 47 | USBD_DEVICE *pDevice, 48 | USBD_Class_cb_TypeDef *class_cb); 49 | 50 | USBD_Status USBD_DeInit(USB_CORE_HANDLE *pdev); 51 | 52 | USBD_Status USBD_ClrCfg(USB_CORE_HANDLE *pdev, uint8_t cfgidx); 53 | 54 | USBD_Status USBD_SetCfg(USB_CORE_HANDLE *pdev, uint8_t cfgidx); 55 | 56 | #endif /* __USBD_CORE_H */ 57 | 58 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 59 | -------------------------------------------------------------------------------- /diseqc2/system/include/usb/usbd_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_def.h 4 | * @author MCD Application Team 5 | * @version V1.0.1 6 | * @date 31-January-2014 7 | * @brief general defines for the usb device library 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __USBD_DEF_H 30 | #define __USBD_DEF_H 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "usbd_conf.h" 34 | #include "stdbool.h" 35 | 36 | /* Exported defines ----------------------------------------------------------*/ 37 | #ifndef NULL 38 | #define NULL 0 39 | #endif 40 | 41 | #define USB_LEN_DEV_QUALIFIER_DESC 0x0A 42 | #define USB_LEN_CFG_DESC 0x09 43 | 44 | #define USBD_IDX_LANGID_STR 0x00 45 | #define USBD_IDX_MFC_STR 0x01 46 | #define USBD_IDX_PRODUCT_STR 0x02 47 | #define USBD_IDX_SERIAL_STR 0x03 48 | #define USBD_IDX_CONFIG_STR 0x04 49 | #define USBD_IDX_INTERFACE_STR 0x05 50 | 51 | #define USB_REQ_TYPE_STANDARD 0x00 52 | #define USB_REQ_TYPE_CLASS 0x20 53 | #define USB_REQ_TYPE_MASK 0x60 54 | 55 | #define USB_REQ_RECIPIENT_DEVICE 0x00 56 | #define USB_REQ_RECIPIENT_INTERFACE 0x01 57 | #define USB_REQ_RECIPIENT_ENDPOINT 0x02 58 | #define USB_REQ_RECIPIENT_MASK 0x03 59 | 60 | #define USB_REQ_GET_STATUS 0x00 61 | #define USB_REQ_CLEAR_FEATURE 0x01 62 | #define USB_REQ_SET_FEATURE 0x03 63 | #define USB_REQ_SET_ADDRESS 0x05 64 | #define USB_REQ_GET_DESCRIPTOR 0x06 65 | #define USB_REQ_GET_CONFIGURATION 0x08 66 | #define USB_REQ_SET_CONFIGURATION 0x09 67 | #define USB_REQ_GET_INTERFACE 0x0A 68 | #define USB_REQ_SET_INTERFACE 0x0B 69 | 70 | #define USB_DESC_TYPE_DEVICE 1 71 | #define USB_DESC_TYPE_CONFIGURATION 2 72 | #define USB_DESC_TYPE_STRING 3 73 | #define USB_DESC_TYPE_DEVICE_QUALIFIER 6 74 | #define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 7 75 | #define USB_DESC_TYPE_BOS 0xF 76 | 77 | 78 | #define USB_CONFIG_REMOTE_WAKEUP 2 79 | #define USB_CONFIG_SELF_POWERED 1 80 | 81 | #define USB_FEATURE_EP_HALT 0 82 | #define USB_FEATURE_REMOTE_WAKEUP 1 83 | #define USB_FEATURE_TEST_MODE 2 84 | 85 | /* Exported types ------------------------------------------------------------*/ 86 | /* Exported macros -----------------------------------------------------------*/ 87 | #define SWAPBYTE(addr) (((uint16_t)(*((uint8_t *)(addr)))) + \ 88 | (((uint16_t)(*(((uint8_t *)(addr)) + 1))) << 8)) 89 | 90 | #define LOBYTE(x) ((uint8_t)(x & 0x00FF)) 91 | #define HIBYTE(x) ((uint8_t)((x & 0xFF00) >>8)) 92 | 93 | #define MIN(a, b) (((a) < (b)) ? (a) : (b)) 94 | /* Exported variables --------------------------------------------------------*/ 95 | /* Exported functions ------------------------------------------------------- */ 96 | 97 | 98 | #endif /* __USBD_DEF_H */ 99 | 100 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 101 | -------------------------------------------------------------------------------- /diseqc2/system/include/usb/usbd_desc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_desc.h 4 | * @author MCD Application Team 5 | * @version V1.0.0 6 | * @date 31-January-2014 7 | * @brief header file for the usbd_desc.c file 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | 30 | #ifndef __USB_DESC_H 31 | #define __USB_DESC_H 32 | 33 | /* Includes ------------------------------------------------------------------*/ 34 | #include "usbd_req.h" 35 | 36 | /* Exported types ------------------------------------------------------------*/ 37 | /* Exported constants --------------------------------------------------------*/ 38 | #define USB_DEVICE_DESCRIPTOR_TYPE 0x01 39 | #define USB_CONFIGURATION_DESCRIPTOR_TYPE 0x02 40 | #define USB_STRING_DESCRIPTOR_TYPE 0x03 41 | #define USB_INTERFACE_DESCRIPTOR_TYPE 0x04 42 | #define USB_ENDPOINT_DESCRIPTOR_TYPE 0x05 43 | #define USB_SIZ_DEVICE_DESC 18 44 | #define USB_SIZ_STRING_LANGID 4 45 | #define USB_SIZ_STRING_SERIAL 26 46 | 47 | #define Device1_Identifier (0x1FFFF7AC) 48 | #define Device2_Identifier (0x1FFFF7B0) 49 | #define Device3_Identifier (0x1FFFF7B4) 50 | /* Exported macro ------------------------------------------------------------*/ 51 | /* Exported variables --------------------------------------------------------*/ 52 | extern uint8_t USBD_StrDesc[USB_MAX_STR_DESC_SIZ]; 53 | extern uint8_t USBD_OtherSpeedCfgDesc[USB_LEN_CFG_DESC]; 54 | extern USBD_DEVICE USR_desc; 55 | extern uint8_t USBD_StringSerial[USB_SIZ_STRING_SERIAL]; 56 | 57 | 58 | /* Exported functions ------------------------------------------------------- */ 59 | void Get_SerialNum(void); 60 | uint8_t * USBD_USR_DeviceDescriptor( uint8_t speed , uint16_t *length); 61 | uint8_t * USBD_USR_LangIDStrDescriptor( uint8_t speed , uint16_t *length); 62 | uint8_t * USBD_USR_ManufacturerStrDescriptor ( uint8_t speed , uint16_t *length); 63 | uint8_t * USBD_USR_ProductStrDescriptor ( uint8_t speed , uint16_t *length); 64 | uint8_t * USBD_USR_SerialStrDescriptor( uint8_t speed , uint16_t *length); 65 | uint8_t * USBD_USR_ConfigStrDescriptor( uint8_t speed , uint16_t *length); 66 | uint8_t * USBD_USR_InterfaceStrDescriptor( uint8_t speed , uint16_t *length); 67 | 68 | #ifdef USB_SUPPORT_USER_STRING_DESC 69 | uint8_t * USBD_USR_USRStringDesc (uint8_t speed, uint8_t idx , uint16_t *length); 70 | #endif /* USB_SUPPORT_USER_STRING_DESC */ 71 | 72 | 73 | #endif /* __USBD_DESC_H */ 74 | 75 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 76 | -------------------------------------------------------------------------------- /diseqc2/system/include/usb/usbd_ioreq.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_ioreq.h 4 | * @author MCD Application Team 5 | * @version V1.0.1 6 | * @date 31-January-2014 7 | * @brief header file for the usbd_ioreq.c file 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __USBD_IOREQ_H_ 30 | #define __USBD_IOREQ_H_ 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "usbd_def.h" 34 | #include "usbd_core.h" 35 | 36 | /* Exported defines ----------------------------------------------------------*/ 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* Exported macros -----------------------------------------------------------*/ 39 | /* Exported variables --------------------------------------------------------*/ 40 | /* Exported functions ------------------------------------------------------- */ 41 | 42 | USBD_Status USBD_CtlSendData (USB_CORE_HANDLE *pdev, 43 | uint8_t *buf, 44 | uint16_t len); 45 | 46 | USBD_Status USBD_CtlContinueSendData (USB_CORE_HANDLE *pdev, 47 | uint8_t *pbuf, 48 | uint16_t len); 49 | 50 | USBD_Status USBD_CtlPrepareRx (USB_CORE_HANDLE *pdev, 51 | uint8_t *pbuf, 52 | uint16_t len); 53 | 54 | USBD_Status USBD_CtlContinueRx (USB_CORE_HANDLE *pdev, 55 | uint8_t *pbuf, 56 | uint16_t len); 57 | 58 | USBD_Status USBD_CtlSendStatus (USB_CORE_HANDLE *pdev); 59 | 60 | USBD_Status USBD_CtlReceiveStatus (USB_CORE_HANDLE *pdev); 61 | 62 | uint16_t USBD_GetRxCount (USB_CORE_HANDLE *pdev , 63 | uint8_t epnum); 64 | 65 | 66 | #endif /* __USBD_IOREQ_H_ */ 67 | 68 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 69 | -------------------------------------------------------------------------------- /diseqc2/system/include/usb/usbd_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_pwr.h 4 | * @author MCD Application Team 5 | * @version V1.0.1 6 | * @date 31-January-2014 7 | * @brief Header file for usbd_pwr.c 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | #ifndef __USBD_PWR_H__ 30 | #define __USBD_PWR_H__ 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "usbd_core.h" 34 | #include "usb_bsp.h" 35 | 36 | /* Exported defines ----------------------------------------------------------*/ 37 | /* Exported types ------------------------------------------------------------*/ 38 | typedef enum _RESUME_STATE 39 | { 40 | RESUME_EXTERNAL, 41 | RESUME_INTERNAL, 42 | #ifdef LPM_ENABLED 43 | L1_RESUME_INTERNAL, 44 | #endif 45 | RESUME_LATER, 46 | RESUME_WAIT, 47 | RESUME_START, 48 | RESUME_ON, 49 | RESUME_OFF, 50 | RESUME_ESOF 51 | } RESUME_STATE; 52 | 53 | /* Exported macros -----------------------------------------------------------*/ 54 | /* Exported variables --------------------------------------------------------*/ 55 | extern USB_CORE_HANDLE USB_Device_dev; 56 | 57 | /* Exported functions ------------------------------------------------------- */ 58 | void Suspend(void); 59 | void Resume_Init(void); 60 | void Resume(RESUME_STATE eResumeSetVal); 61 | void Leave_LowPowerMode(void); 62 | 63 | #endif /*__USBD_PWR_H__*/ 64 | 65 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 66 | -------------------------------------------------------------------------------- /diseqc2/system/include/usb/usbd_req.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_req.h 4 | * @author MCD Application Team 5 | * @version V1.0.1 6 | * @date 31-January-2014 7 | * @brief header file for the usbd_req.c file 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Define to prevent recursive inclusion -------------------------------------*/ 29 | 30 | #ifndef __USB_REQUEST_H_ 31 | #define __USB_REQUEST_H_ 32 | 33 | /* Includes ------------------------------------------------------------------*/ 34 | #include "usbd_ioreq.h" 35 | #include "usbd_desc.h" 36 | 37 | /* Exported defines ----------------------------------------------------------*/ 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported macros -----------------------------------------------------------*/ 40 | /* Exported variables --------------------------------------------------------*/ 41 | /* Exported functions ------------------------------------------------------- */ 42 | USBD_Status USBD_StdDevReq (USB_CORE_HANDLE *pdev, USB_SETUP_REQ *req); 43 | USBD_Status USBD_StdItfReq (USB_CORE_HANDLE *pdev, USB_SETUP_REQ *req); 44 | USBD_Status USBD_StdEPReq (USB_CORE_HANDLE *pdev, USB_SETUP_REQ *req); 45 | void USBD_ParseSetupRequest( USB_CORE_HANDLE *pdev, 46 | USB_SETUP_REQ *req); 47 | 48 | void USBD_CtlError( USB_CORE_HANDLE *pdev, 49 | USB_SETUP_REQ *req); 50 | 51 | void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len); 52 | 53 | #endif /* __USB_REQUEST_H_ */ 54 | 55 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 56 | -------------------------------------------------------------------------------- /diseqc2/system/src/stm32f0-stdperiph/stm32f0xx_dbgmcu.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_dbgmcu.c 4 | * @author MCD Application Team 5 | * @version V1.5.0 6 | * @date 05-December-2014 7 | * @brief This file provides firmware functions to manage the following 8 | * functionalities of the Debug MCU (DBGMCU) peripheral: 9 | * + Device and Revision ID management 10 | * + Peripherals Configuration 11 | * @verbatim 12 | * @endverbatim 13 | * 14 | ****************************************************************************** 15 | * @attention 16 | * 17 | *

© COPYRIGHT 2014 STMicroelectronics

18 | * 19 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 20 | * You may not use this file except in compliance with the License. 21 | * You may obtain a copy of the License at: 22 | * 23 | * http://www.st.com/software_license_agreement_liberty_v2 24 | * 25 | * Unless required by applicable law or agreed to in writing, software 26 | * distributed under the License is distributed on an "AS IS" BASIS, 27 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 28 | * See the License for the specific language governing permissions and 29 | * limitations under the License. 30 | * 31 | ****************************************************************************** 32 | */ 33 | 34 | /* Includes ------------------------------------------------------------------*/ 35 | #include "stm32f0xx_dbgmcu.h" 36 | 37 | /** @addtogroup STM32F0xx_StdPeriph_Driver 38 | * @{ 39 | */ 40 | 41 | /** @defgroup DBGMCU 42 | * @brief DBGMCU driver modules 43 | * @{ 44 | */ 45 | 46 | /* Private typedef -----------------------------------------------------------*/ 47 | /* Private define ------------------------------------------------------------*/ 48 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF) 49 | 50 | /* Private macro -------------------------------------------------------------*/ 51 | /* Private variables ---------------------------------------------------------*/ 52 | /* Private function prototypes -----------------------------------------------*/ 53 | /* Private functions ---------------------------------------------------------*/ 54 | 55 | /** @defgroup DBGMCU_Private_Functions 56 | * @{ 57 | */ 58 | 59 | 60 | /** @defgroup DBGMCU_Group1 Device and Revision ID management functions 61 | * @brief Device and Revision ID management functions 62 | * 63 | @verbatim 64 | ============================================================================== 65 | ##### Device and Revision ID management functions ##### 66 | ============================================================================== 67 | 68 | @endverbatim 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @brief Returns the device revision identifier. 74 | * @param None 75 | * @retval Device revision identifier 76 | */ 77 | uint32_t DBGMCU_GetREVID(void) 78 | { 79 | return(DBGMCU->IDCODE >> 16); 80 | } 81 | 82 | /** 83 | * @brief Returns the device identifier. 84 | * @param None 85 | * @retval Device identifier 86 | */ 87 | uint32_t DBGMCU_GetDEVID(void) 88 | { 89 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK); 90 | } 91 | 92 | /** 93 | * @} 94 | */ 95 | 96 | /** @defgroup DBGMCU_Group2 Peripherals Configuration functions 97 | * @brief Peripherals Configuration 98 | * 99 | @verbatim 100 | ============================================================================== 101 | ##### Peripherals Configuration functions ##### 102 | ============================================================================== 103 | 104 | @endverbatim 105 | * @{ 106 | */ 107 | 108 | /** 109 | * @brief Configures low power mode behavior when the MCU is in Debug mode. 110 | * @param DBGMCU_Periph: specifies the low power mode. 111 | * This parameter can be any combination of the following values: 112 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode 113 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode 114 | * @param NewState: new state of the specified low power mode in Debug mode. 115 | * This parameter can be: ENABLE or DISABLE. 116 | * @retval None 117 | */ 118 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) 119 | { 120 | /* Check the parameters */ 121 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph)); 122 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 123 | 124 | if (NewState != DISABLE) 125 | { 126 | DBGMCU->CR |= DBGMCU_Periph; 127 | } 128 | else 129 | { 130 | DBGMCU->CR &= ~DBGMCU_Periph; 131 | } 132 | } 133 | 134 | 135 | /** 136 | * @brief Configures APB1 peripheral behavior when the MCU is in Debug mode. 137 | * @param DBGMCU_Periph: specifies the APB1 peripheral. 138 | * This parameter can be any combination of the following values: 139 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted, 140 | * not applicable for STM32F030 devices 141 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted 142 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted 143 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted, 144 | * applicable only for STM32F072 devices 145 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted 146 | * @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped 147 | * when Core is halted. 148 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted 149 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted 150 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped 151 | * when Core is halted 152 | * @arg DBGMCU_CAN1_STOP: Debug CAN1 stopped when Core is halted, 153 | * applicable only for STM32F042 and STM32F072 devices 154 | * @param NewState: new state of the specified APB1 peripheral in Debug mode. 155 | * This parameter can be: ENABLE or DISABLE. 156 | * @retval None 157 | */ 158 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState) 159 | { 160 | /* Check the parameters */ 161 | assert_param(IS_DBGMCU_APB1PERIPH(DBGMCU_Periph)); 162 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 163 | 164 | if (NewState != DISABLE) 165 | { 166 | DBGMCU->APB1FZ |= DBGMCU_Periph; 167 | } 168 | else 169 | { 170 | DBGMCU->APB1FZ &= ~DBGMCU_Periph; 171 | } 172 | } 173 | 174 | /** 175 | * @brief Configures APB2 peripheral behavior when the MCU is in Debug mode. 176 | * @param DBGMCU_Periph: specifies the APB2 peripheral. 177 | * This parameter can be any combination of the following values: 178 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted 179 | * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted 180 | * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted 181 | * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted 182 | * @param NewState: new state of the specified APB2 peripheral in Debug mode. 183 | * This parameter can be: ENABLE or DISABLE. 184 | * @retval None 185 | */ 186 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState) 187 | { 188 | /* Check the parameters */ 189 | assert_param(IS_DBGMCU_APB2PERIPH(DBGMCU_Periph)); 190 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 191 | 192 | if (NewState != DISABLE) 193 | { 194 | DBGMCU->APB2FZ |= DBGMCU_Periph; 195 | } 196 | else 197 | { 198 | DBGMCU->APB2FZ &= ~DBGMCU_Periph; 199 | } 200 | } 201 | 202 | /** 203 | * @} 204 | */ 205 | 206 | /** 207 | * @} 208 | */ 209 | 210 | /** 211 | * @} 212 | */ 213 | 214 | /** 215 | * @} 216 | */ 217 | 218 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 219 | -------------------------------------------------------------------------------- /diseqc2/system/src/stm32f0-stdperiph/stm32f0xx_misc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_misc.c 4 | * @author MCD Application Team 5 | * @version V1.5.0 6 | * @date 05-December-2014 7 | * @brief This file provides all the miscellaneous firmware functions (add-on 8 | * to CMSIS functions). 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2014 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32f0xx_misc.h" 31 | 32 | /** @addtogroup STM32F0xx_StdPeriph_Driver 33 | * @{ 34 | */ 35 | 36 | /** @defgroup MISC 37 | * @brief MISC driver modules 38 | * @{ 39 | */ 40 | 41 | /* Private typedef -----------------------------------------------------------*/ 42 | /* Private define ------------------------------------------------------------*/ 43 | /* Private macro -------------------------------------------------------------*/ 44 | /* Private variables ---------------------------------------------------------*/ 45 | /* Private function prototypes -----------------------------------------------*/ 46 | /* Private functions ---------------------------------------------------------*/ 47 | 48 | /** @defgroup MISC_Private_Functions 49 | * @{ 50 | */ 51 | /** 52 | * 53 | @verbatim 54 | ******************************************************************************* 55 | ##### Interrupts configuration functions ##### 56 | ******************************************************************************* 57 | [..] This section provide functions allowing to configure the NVIC interrupts 58 | (IRQ). The Cortex-M0 exceptions are managed by CMSIS functions. 59 | (#) Enable and Configure the priority of the selected IRQ Channels. 60 | The priority can be 0..3. 61 | 62 | -@- Lower priority values gives higher priority. 63 | -@- Priority Order: 64 | (#@) Lowest priority. 65 | (#@) Lowest hardware priority (IRQn position). 66 | 67 | @endverbatim 68 | */ 69 | 70 | /** 71 | * @brief Initializes the NVIC peripheral according to the specified 72 | * parameters in the NVIC_InitStruct. 73 | * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains 74 | * the configuration information for the specified NVIC peripheral. 75 | * @retval None 76 | */ 77 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct) 78 | { 79 | uint32_t tmppriority = 0x00; 80 | 81 | /* Check the parameters */ 82 | assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd)); 83 | assert_param(IS_NVIC_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPriority)); 84 | 85 | if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE) 86 | { 87 | /* Compute the Corresponding IRQ Priority --------------------------------*/ 88 | tmppriority = NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel >> 0x02]; 89 | tmppriority &= (uint32_t)(~(((uint32_t)0xFF) << ((NVIC_InitStruct->NVIC_IRQChannel & 0x03) * 8))); 90 | tmppriority |= (uint32_t)((((uint32_t)NVIC_InitStruct->NVIC_IRQChannelPriority << 6) & 0xFF) << ((NVIC_InitStruct->NVIC_IRQChannel & 0x03) * 8)); 91 | 92 | NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel >> 0x02] = tmppriority; 93 | 94 | /* Enable the Selected IRQ Channels --------------------------------------*/ 95 | NVIC->ISER[0] = (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); 96 | } 97 | else 98 | { 99 | /* Disable the Selected IRQ Channels -------------------------------------*/ 100 | NVIC->ICER[0] = (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); 101 | } 102 | } 103 | 104 | /** 105 | * @brief Selects the condition for the system to enter low power mode. 106 | * @param LowPowerMode: Specifies the new mode for the system to enter low power mode. 107 | * This parameter can be one of the following values: 108 | * @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend. 109 | * @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request. 110 | * @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit. 111 | * @param NewState: new state of LP condition. 112 | * This parameter can be: ENABLE or DISABLE. 113 | * @retval None 114 | */ 115 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState) 116 | { 117 | /* Check the parameters */ 118 | assert_param(IS_NVIC_LP(LowPowerMode)); 119 | 120 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 121 | 122 | if (NewState != DISABLE) 123 | { 124 | SCB->SCR |= LowPowerMode; 125 | } 126 | else 127 | { 128 | SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode); 129 | } 130 | } 131 | 132 | /** 133 | * @brief Configures the SysTick clock source. 134 | * @param SysTick_CLKSource: specifies the SysTick clock source. 135 | * This parameter can be one of the following values: 136 | * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source. 137 | * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source. 138 | * @retval None 139 | */ 140 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource) 141 | { 142 | /* Check the parameters */ 143 | assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource)); 144 | 145 | if (SysTick_CLKSource == SysTick_CLKSource_HCLK) 146 | { 147 | SysTick->CTRL |= SysTick_CLKSource_HCLK; 148 | } 149 | else 150 | { 151 | SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; 152 | } 153 | } 154 | 155 | /** 156 | * @} 157 | */ 158 | 159 | /** 160 | * @} 161 | */ 162 | 163 | /** 164 | * @} 165 | */ 166 | 167 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 168 | -------------------------------------------------------------------------------- /diseqc2/system/src/stm32f0-stdperiph/stm32f0xx_wwdg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f0xx_wwdg.c 4 | * @author MCD Application Team 5 | * @version V1.5.0 6 | * @date 05-December-2014 7 | * @brief This file provides firmware functions to manage the following 8 | * functionalities of the Window watchdog (WWDG) peripheral: 9 | * + Prescaler, Refresh window and Counter configuration 10 | * + WWDG activation 11 | * + Interrupts and flags management 12 | * 13 | * @verbatim 14 | * 15 | ============================================================================== 16 | ##### WWDG features ##### 17 | ============================================================================== 18 | [..] Once enabled the WWDG generates a system reset on expiry of a programmed 19 | time period, unless the program refreshes the counter (downcounter) 20 | before to reach 0x3F value (i.e. a reset is generated when the counter 21 | value rolls over from 0x40 to 0x3F). 22 | [..] An MCU reset is also generated if the counter value is refreshed 23 | before the counter has reached the refresh window value. This 24 | implies that the counter must be refreshed in a limited window. 25 | 26 | [..] Once enabled the WWDG cannot be disabled except by a system reset. 27 | 28 | [..] WWDGRST flag in RCC_CSR register can be used to inform when a WWDG 29 | reset occurs. 30 | 31 | [..] The WWDG counter input clock is derived from the APB clock divided 32 | by a programmable prescaler. 33 | 34 | [..] WWDG counter clock = PCLK1 / Prescaler. 35 | [..] WWDG timeout = (WWDG counter clock) * (counter value). 36 | 37 | [..] Min-max timeout value @32MHz (PCLK1): ~85us / ~43ms. 38 | 39 | ##### How to use this driver ##### 40 | ============================================================================== 41 | [..] 42 | (#) Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) 43 | function. 44 | 45 | (#) Configure the WWDG prescaler using WWDG_SetPrescaler() function. 46 | 47 | (#) Configure the WWDG refresh window using WWDG_SetWindowValue() function. 48 | 49 | (#) Set the WWDG counter value and start it using WWDG_Enable() function. 50 | When the WWDG is enabled the counter value should be configured to 51 | a value greater than 0x40 to prevent generating an immediate reset. 52 | 53 | (#) Optionally you can enable the Early wakeup interrupt which is 54 | generated when the counter reach 0x40. 55 | Once enabled this interrupt cannot be disabled except by a system reset. 56 | 57 | (#) Then the application program must refresh the WWDG counter at regular 58 | intervals during normal operation to prevent an MCU reset, using 59 | WWDG_SetCounter() function. This operation must occur only when 60 | the counter value is lower than the refresh window value, 61 | programmed using WWDG_SetWindowValue(). 62 | 63 | * @endverbatim 64 | * 65 | ****************************************************************************** 66 | * @attention 67 | * 68 | *

© COPYRIGHT 2014 STMicroelectronics

69 | * 70 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 71 | * You may not use this file except in compliance with the License. 72 | * You may obtain a copy of the License at: 73 | * 74 | * http://www.st.com/software_license_agreement_liberty_v2 75 | * 76 | * Unless required by applicable law or agreed to in writing, software 77 | * distributed under the License is distributed on an "AS IS" BASIS, 78 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 79 | * See the License for the specific language governing permissions and 80 | * limitations under the License. 81 | * 82 | ****************************************************************************** 83 | */ 84 | 85 | /* Includes ------------------------------------------------------------------*/ 86 | #include "stm32f0xx_wwdg.h" 87 | #include "stm32f0xx_rcc.h" 88 | 89 | /** @addtogroup STM32F0xx_StdPeriph_Driver 90 | * @{ 91 | */ 92 | 93 | /** @defgroup WWDG 94 | * @brief WWDG driver modules 95 | * @{ 96 | */ 97 | 98 | /* Private typedef -----------------------------------------------------------*/ 99 | /* Private define ------------------------------------------------------------*/ 100 | /* --------------------- WWDG registers bit mask ---------------------------- */ 101 | /* CFR register bit mask */ 102 | #define CFR_WDGTB_MASK ((uint32_t)0xFFFFFE7F) 103 | #define CFR_W_MASK ((uint32_t)0xFFFFFF80) 104 | #define BIT_MASK ((uint8_t)0x7F) 105 | 106 | /* Private macro -------------------------------------------------------------*/ 107 | /* Private variables ---------------------------------------------------------*/ 108 | /* Private function prototypes -----------------------------------------------*/ 109 | /* Private functions ---------------------------------------------------------*/ 110 | 111 | /** @defgroup WWDG_Private_Functions 112 | * @{ 113 | */ 114 | 115 | /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions 116 | * @brief Prescaler, Refresh window and Counter configuration functions 117 | * 118 | @verbatim 119 | ============================================================================== 120 | ##### Prescaler, Refresh window and Counter configuration functions ##### 121 | ============================================================================== 122 | 123 | @endverbatim 124 | * @{ 125 | */ 126 | 127 | /** 128 | * @brief Deinitializes the WWDG peripheral registers to their default reset values. 129 | * @param None 130 | * @retval None 131 | */ 132 | void WWDG_DeInit(void) 133 | { 134 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); 135 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); 136 | } 137 | 138 | /** 139 | * @brief Sets the WWDG Prescaler. 140 | * @param WWDG_Prescaler: specifies the WWDG Prescaler. 141 | * This parameter can be one of the following values: 142 | * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 143 | * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 144 | * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 145 | * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 146 | * @retval None 147 | */ 148 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) 149 | { 150 | uint32_t tmpreg = 0; 151 | /* Check the parameters */ 152 | assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler)); 153 | /* Clear WDGTB[1:0] bits */ 154 | tmpreg = WWDG->CFR & CFR_WDGTB_MASK; 155 | /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */ 156 | tmpreg |= WWDG_Prescaler; 157 | /* Store the new value */ 158 | WWDG->CFR = tmpreg; 159 | } 160 | 161 | /** 162 | * @brief Sets the WWDG window value. 163 | * @param WindowValue: specifies the window value to be compared to the downcounter. 164 | * This parameter value must be lower than 0x80. 165 | * @retval None 166 | */ 167 | void WWDG_SetWindowValue(uint8_t WindowValue) 168 | { 169 | __IO uint32_t tmpreg = 0; 170 | 171 | /* Check the parameters */ 172 | assert_param(IS_WWDG_WINDOW_VALUE(WindowValue)); 173 | /* Clear W[6:0] bits */ 174 | 175 | tmpreg = WWDG->CFR & CFR_W_MASK; 176 | 177 | /* Set W[6:0] bits according to WindowValue value */ 178 | tmpreg |= WindowValue & (uint32_t) BIT_MASK; 179 | 180 | /* Store the new value */ 181 | WWDG->CFR = tmpreg; 182 | } 183 | 184 | /** 185 | * @brief Enables the WWDG Early Wakeup interrupt(EWI). 186 | * @note Once enabled this interrupt cannot be disabled except by a system reset. 187 | * @param None 188 | * @retval None 189 | */ 190 | void WWDG_EnableIT(void) 191 | { 192 | WWDG->CFR |= WWDG_CFR_EWI; 193 | } 194 | 195 | /** 196 | * @brief Sets the WWDG counter value. 197 | * @param Counter: specifies the watchdog counter value. 198 | * This parameter must be a number between 0x40 and 0x7F (to prevent 199 | * generating an immediate reset). 200 | * @retval None 201 | */ 202 | void WWDG_SetCounter(uint8_t Counter) 203 | { 204 | /* Check the parameters */ 205 | assert_param(IS_WWDG_COUNTER(Counter)); 206 | /* Write to T[6:0] bits to configure the counter value, no need to do 207 | a read-modify-write; writing a 0 to WDGA bit does nothing */ 208 | WWDG->CR = Counter & BIT_MASK; 209 | } 210 | 211 | /** 212 | * @} 213 | */ 214 | 215 | /** @defgroup WWDG_Group2 WWDG activation functions 216 | * @brief WWDG activation functions 217 | * 218 | @verbatim 219 | ============================================================================== 220 | ##### WWDG activation function ##### 221 | ============================================================================== 222 | 223 | @endverbatim 224 | * @{ 225 | */ 226 | 227 | /** 228 | * @brief Enables WWDG and load the counter value. 229 | * @param Counter: specifies the watchdog counter value. 230 | * This parameter must be a number between 0x40 and 0x7F (to prevent 231 | * generating an immediate reset). 232 | * @retval None 233 | */ 234 | void WWDG_Enable(uint8_t Counter) 235 | { 236 | /* Check the parameters */ 237 | assert_param(IS_WWDG_COUNTER(Counter)); 238 | WWDG->CR = WWDG_CR_WDGA | Counter; 239 | } 240 | 241 | /** 242 | * @} 243 | */ 244 | 245 | /** @defgroup WWDG_Group3 Interrupts and flags management functions 246 | * @brief Interrupts and flags management functions 247 | * 248 | @verbatim 249 | ============================================================================== 250 | ##### Interrupts and flags management functions ##### 251 | ============================================================================== 252 | 253 | @endverbatim 254 | * @{ 255 | */ 256 | 257 | /** 258 | * @brief Checks whether the Early Wakeup interrupt flag is set or not. 259 | * @param None 260 | * @retval The new state of the Early Wakeup interrupt flag (SET or RESET). 261 | */ 262 | FlagStatus WWDG_GetFlagStatus(void) 263 | { 264 | FlagStatus bitstatus = RESET; 265 | 266 | if ((WWDG->SR) != (uint32_t)RESET) 267 | { 268 | bitstatus = SET; 269 | } 270 | else 271 | { 272 | bitstatus = RESET; 273 | } 274 | return bitstatus; 275 | } 276 | 277 | /** 278 | * @brief Clears Early Wakeup interrupt flag. 279 | * @param None 280 | * @retval None 281 | */ 282 | void WWDG_ClearFlag(void) 283 | { 284 | WWDG->SR = (uint32_t)RESET; 285 | } 286 | 287 | /** 288 | * @} 289 | */ 290 | 291 | /** 292 | * @} 293 | */ 294 | 295 | /** 296 | * @} 297 | */ 298 | 299 | /** 300 | * @} 301 | */ 302 | 303 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 304 | -------------------------------------------------------------------------------- /diseqc2/system/src/usb/usb_bsp.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usb_bsp.c 4 | * @author MCD Application Team 5 | * @version V1.0.0 6 | * @date 31-January-2014 7 | * @brief This file Provides Device Core configuration Functions 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "usb_bsp.h" 30 | 31 | /* Private typedef -----------------------------------------------------------*/ 32 | /* Private define ------------------------------------------------------------*/ 33 | /* Private macro -------------------------------------------------------------*/ 34 | /* Private variables ---------------------------------------------------------*/ 35 | /* Private function prototypes -----------------------------------------------*/ 36 | #if defined USB_CLOCK_SOURCE_CRS 37 | static void CRS_Config(void); 38 | #endif /* USB_CLOCK_SOURCE_CRS */ 39 | 40 | /* Private functions ---------------------------------------------------------*/ 41 | 42 | /** 43 | * @brief Initialize BSP configurations 44 | * @param None 45 | * @retval None 46 | */ 47 | 48 | void USB_BSP_Init(USB_CORE_HANDLE *pdev) 49 | { 50 | #ifdef USB_DEVICE_LOW_PWR_MGMT_SUPPORT 51 | EXTI_InitTypeDef EXTI_InitStructure; 52 | #endif /*USB_DEVICE_LOW_PWR_MGMT_SUPPORT */ 53 | 54 | /* Enable USB clock */ 55 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_USB, ENABLE); 56 | 57 | #if defined USB_CLOCK_SOURCE_CRS 58 | 59 | /*For using CRS, you need to do the following: 60 | - Enable HSI48 (managed by the SystemInit() function at the application startup) 61 | - Select HSI48 as USB clock 62 | - Enable CRS clock 63 | - Set AUTOTRIMEN 64 | - Set CEN 65 | */ 66 | 67 | /* Select HSI48 as USB clock */ 68 | RCC_USBCLKConfig(RCC_USBCLK_HSI48); 69 | 70 | /* Configure the Clock Recovery System */ 71 | CRS_Config(); 72 | #else 73 | /* Configure PLL to be used as USB clock: 74 | - Enable HSE external clock (for this example the system is clocked by HSI48 75 | managed by the SystemInit() function at the application startup) 76 | - Enable PLL 77 | - Select PLL as USB clock */ 78 | /* Enable HSE */ 79 | RCC_HSEConfig(RCC_HSE_ON); 80 | 81 | /* Wait till HSE is ready */ 82 | while (RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET) 83 | {} 84 | 85 | /* Enable PLL */ 86 | RCC_PLLCmd(ENABLE); 87 | 88 | /* Wait till PLL is ready */ 89 | while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) 90 | {} 91 | 92 | /* Configure USBCLK from PLL clock */ 93 | RCC_USBCLKConfig(RCC_USBCLK_PLLCLK); 94 | #endif /*USB_CLOCK_SOURCE_CRS */ 95 | 96 | #ifdef USB_DEVICE_LOW_PWR_MGMT_SUPPORT 97 | 98 | EXTI_InitTypeDef EXTI_InitStructure; 99 | 100 | /* Enable the PWR clock */ 101 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); 102 | 103 | /* EXTI line 18 is connected to the USB Wakeup from suspend event */ 104 | EXTI_ClearITPendingBit(EXTI_Line18); 105 | EXTI_InitStructure.EXTI_Line = EXTI_Line18; 106 | /*Must Configure the EXTI Line 18 to be sensitive to rising edge*/ 107 | EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; 108 | EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; 109 | EXTI_InitStructure.EXTI_LineCmd = ENABLE; 110 | EXTI_Init(&EXTI_InitStructure); 111 | #endif /*USB_DEVICE_LOW_PWR_MGMT_SUPPORT */ 112 | 113 | } 114 | 115 | /** 116 | * @brief Enable USB Global interrupt 117 | * @param None 118 | * @retval None 119 | */ 120 | void USB_BSP_EnableInterrupt(USB_CORE_HANDLE *pdev) 121 | { 122 | NVIC_InitTypeDef NVIC_InitStructure; 123 | 124 | /* Enable the USB interrupt */ 125 | NVIC_InitStructure.NVIC_IRQChannel = USB_IRQn; 126 | NVIC_InitStructure.NVIC_IRQChannelPriority = USB_IT_PRIO; 127 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; 128 | NVIC_Init(&NVIC_InitStructure); 129 | } 130 | 131 | #if defined USB_CLOCK_SOURCE_CRS 132 | /** 133 | * @brief Configure CRS peripheral to automatically trim the HSI 134 | * oscillator according to USB SOF 135 | * @param None 136 | * @retval None 137 | */ 138 | static void CRS_Config(void) 139 | { 140 | /*Enable CRS Clock*/ 141 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_CRS, ENABLE); 142 | 143 | /* Select USB SOF as synchronization source */ 144 | CRS_SynchronizationSourceConfig(CRS_SYNCSource_USB); 145 | 146 | /*Enables the automatic hardware adjustment of TRIM bits: AUTOTRIMEN:*/ 147 | CRS_AutomaticCalibrationCmd(ENABLE); 148 | 149 | /*Enables the oscillator clock for frequency error counter CEN*/ 150 | CRS_FrequencyErrorCounterCmd(ENABLE); 151 | } 152 | 153 | #endif 154 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 155 | -------------------------------------------------------------------------------- /diseqc2/system/src/usb/usbd_core.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_core.c 4 | * @author MCD Application Team 5 | * @version V1.0.1 6 | * @date 31-January-2014 7 | * @brief This file provides all the USBD core functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "usbd_core.h" 30 | #include "usbd_req.h" 31 | #include "usbd_ioreq.h" 32 | 33 | /* Private typedef -----------------------------------------------------------*/ 34 | /* Private define ------------------------------------------------------------*/ 35 | /* Private macro -------------------------------------------------------------*/ 36 | /* Private variables ---------------------------------------------------------*/ 37 | extern uint32_t ADDRESS; 38 | 39 | /* Private function prototypes -----------------------------------------------*/ 40 | static uint8_t USBD_SetupStage(USB_CORE_HANDLE *pdev); 41 | static uint8_t USBD_DataOutStage(USB_CORE_HANDLE *pdev , uint8_t epnum); 42 | static uint8_t USBD_DataInStage(USB_CORE_HANDLE *pdev , uint8_t epnum); 43 | static uint8_t USBD_SOF(USB_CORE_HANDLE *pdev); 44 | static uint8_t USBD_Reset(USB_CORE_HANDLE *pdev); 45 | static uint8_t USBD_Suspend(USB_CORE_HANDLE *pdev); 46 | static uint8_t USBD_Resume(USB_CORE_HANDLE *pdev); 47 | 48 | USBD_DCD_INT_cb_TypeDef USBD_DCD_INT_cb = 49 | { 50 | USBD_DataOutStage, 51 | USBD_DataInStage, 52 | USBD_SetupStage, 53 | USBD_SOF, 54 | USBD_Reset, 55 | USBD_Suspend, 56 | USBD_Resume, 57 | 58 | }; 59 | 60 | USBD_DCD_INT_cb_TypeDef *USBD_DCD_INT_fops = &USBD_DCD_INT_cb; 61 | 62 | /* Private functions ---------------------------------------------------------*/ 63 | /** 64 | * @brief USBD_Init 65 | * Initializes the device stack and load the class driver 66 | * @param pdev: device instance 67 | * @param class_cb: Class callback structure address 68 | * @param usr_cb: User callback structure address 69 | * @retval None 70 | */ 71 | void USBD_Init(USB_CORE_HANDLE *pdev, 72 | USBD_DEVICE *pDevice, 73 | USBD_Class_cb_TypeDef *class_cb) 74 | { 75 | /* Hardware Init */ 76 | USB_BSP_Init(pdev); 77 | 78 | USBD_DeInit(pdev); 79 | 80 | /*Register class and user callbacks */ 81 | pdev->dev.class_cb = class_cb; 82 | pdev->dev.usr_device = pDevice; 83 | 84 | /* Update the serial number string descriptor with the data from the unique ID*/ 85 | Get_SerialNum(); 86 | 87 | /* set USB DEVICE core params */ 88 | DCD_Init(pdev); 89 | 90 | /* Enable Interrupts */ 91 | USB_BSP_EnableInterrupt(pdev); 92 | 93 | /* Enable the pull-up */ 94 | #ifdef INTERNAL_PULLUP 95 | DCD_DevConnect(pdev); 96 | #else 97 | USB_BSP_DevConnect(pdev); 98 | #endif 99 | } 100 | 101 | /** 102 | * @brief USBD_DeInit 103 | * Re-Initialize th device library 104 | * @param pdev: device instance 105 | * @retval status: status 106 | */ 107 | USBD_Status USBD_DeInit(USB_CORE_HANDLE *pdev) 108 | { 109 | /* Software Init */ 110 | 111 | return USBD_OK; 112 | } 113 | 114 | /** 115 | * @brief USBD_SetupStage 116 | * Handle the setup stage 117 | * @param pdev: device instance 118 | * @retval status 119 | */ 120 | static uint8_t USBD_SetupStage(USB_CORE_HANDLE *pdev) 121 | { 122 | USB_SETUP_REQ req; 123 | 124 | USBD_ParseSetupRequest(pdev , &req); 125 | 126 | switch (req.bmRequest & 0x1F) 127 | { 128 | case USB_REQ_RECIPIENT_DEVICE: 129 | USBD_StdDevReq (pdev, &req); 130 | break; 131 | 132 | case USB_REQ_RECIPIENT_INTERFACE: 133 | USBD_StdItfReq(pdev, &req); 134 | break; 135 | 136 | case USB_REQ_RECIPIENT_ENDPOINT: 137 | USBD_StdEPReq(pdev, &req); 138 | break; 139 | 140 | default: 141 | DCD_EP_Stall(pdev , req.bmRequest & 0x80); 142 | break; 143 | } 144 | return USBD_OK; 145 | } 146 | 147 | /** 148 | * @brief USBD_DataOutStage 149 | * Handle data out stage 150 | * @param pdev: device instance 151 | * @param epnum: endpoint index 152 | * @retval status 153 | */ 154 | static uint8_t USBD_DataOutStage(USB_CORE_HANDLE *pdev , uint8_t epnum) 155 | { 156 | USB_EP *ep; 157 | 158 | if(epnum == 0) 159 | { 160 | ep = &pdev->dev.out_ep[0]; 161 | if ( pdev->dev.device_state == USB_EP0_DATA_OUT) 162 | { 163 | if(ep->rem_data_len > ep->maxpacket) 164 | { 165 | ep->rem_data_len -= ep->maxpacket; 166 | 167 | USBD_CtlContinueRx (pdev, 168 | ep->xfer_buff, 169 | MIN(ep->rem_data_len ,ep->maxpacket)); 170 | } 171 | else 172 | { 173 | if((pdev->dev.class_cb->EP0_RxReady != NULL)&& 174 | (pdev->dev.device_status == USB_CONFIGURED)) 175 | { 176 | pdev->dev.class_cb->EP0_RxReady(pdev); 177 | } 178 | USBD_CtlSendStatus(pdev); 179 | } 180 | } 181 | } 182 | else if((pdev->dev.class_cb->DataOut != NULL)&& 183 | (pdev->dev.device_status == USB_CONFIGURED)) 184 | { 185 | pdev->dev.class_cb->DataOut(pdev, epnum); 186 | } 187 | return USBD_OK; 188 | } 189 | 190 | /** 191 | * @brief USBD_DataInStage 192 | * Handle data in stage 193 | * @param pdev: device instance 194 | * @param epnum: endpoint index 195 | * @retval status 196 | */ 197 | static uint8_t USBD_DataInStage(USB_CORE_HANDLE *pdev , uint8_t epnum) 198 | { 199 | USB_EP *ep; 200 | 201 | if(epnum == 0) 202 | { 203 | ep = &pdev->dev.in_ep[0]; 204 | if ( pdev->dev.device_state == USB_EP0_DATA_IN) 205 | { 206 | if(ep->rem_data_len > ep->maxpacket) 207 | { 208 | ep->rem_data_len -= ep->maxpacket; 209 | USBD_CtlContinueSendData (pdev, 210 | ep->xfer_buff, 211 | ep->rem_data_len); 212 | } 213 | else 214 | { /* last packet is MPS multiple, so send ZLP packet */ 215 | if((ep->total_data_len % ep->maxpacket == 0) && 216 | (ep->total_data_len >= ep->maxpacket) && 217 | (ep->total_data_len < ep->ctl_data_len )) 218 | { 219 | 220 | USBD_CtlContinueSendData(pdev , NULL, 0); 221 | ep->ctl_data_len = 0; 222 | } 223 | else 224 | { 225 | if((pdev->dev.class_cb->EP0_TxSent != NULL)&& 226 | (pdev->dev.device_status == USB_CONFIGURED)) 227 | { 228 | pdev->dev.class_cb->EP0_TxSent(pdev); 229 | } 230 | USBD_CtlReceiveStatus(pdev); 231 | } 232 | } 233 | } 234 | else if ((pdev->dev.device_state == USB_EP0_STATUS_IN)&& (ADDRESS!=0)) 235 | { 236 | 237 | DCD_EP_SetAddress(pdev, ADDRESS); 238 | ADDRESS = 0; 239 | } 240 | } 241 | else if((pdev->dev.class_cb->DataIn != NULL)&& 242 | (pdev->dev.device_status == USB_CONFIGURED)) 243 | { 244 | pdev->dev.class_cb->DataIn(pdev, epnum); 245 | } 246 | return USBD_OK; 247 | } 248 | 249 | /** 250 | * @brief USBD_Reset 251 | * Handle Reset event 252 | * @param pdev: device instance 253 | * @retval status 254 | */ 255 | 256 | static uint8_t USBD_Reset(USB_CORE_HANDLE *pdev) 257 | { 258 | 259 | DCD_PMA_Config(pdev , 0x00 ,USB_SNG_BUF, ENDP0_RX_ADDRESS); 260 | DCD_PMA_Config(pdev , 0x80 ,USB_SNG_BUF, ENDP0_TX_ADDRESS); 261 | 262 | /* Open EP0 OUT */ 263 | DCD_EP_Open(pdev, 264 | 0x00, 265 | USB_MAX_EP0_SIZE, 266 | EP_TYPE_CTRL); 267 | 268 | /* Open EP0 IN */ 269 | DCD_EP_Open(pdev, 270 | 0x80, 271 | USB_MAX_EP0_SIZE, 272 | EP_TYPE_CTRL); 273 | 274 | /* Upon Reset call user call back */ 275 | pdev->dev.device_status = USB_DEFAULT; 276 | 277 | return USBD_OK; 278 | } 279 | 280 | /** 281 | * @brief USBD_Resume 282 | * Handle Resume event 283 | * @param pdev: device instance 284 | * @retval status 285 | */ 286 | 287 | static uint8_t USBD_Resume(USB_CORE_HANDLE *pdev) 288 | { 289 | /* Upon Resume call user call back */ 290 | pdev->dev.device_status = pdev->dev.device_old_status; 291 | return USBD_OK; 292 | } 293 | 294 | 295 | /** 296 | * @brief USBD_Suspend 297 | * Handle Suspend event 298 | * @param pdev: device instance 299 | * @retval status 300 | */ 301 | 302 | static uint8_t USBD_Suspend(USB_CORE_HANDLE *pdev) 303 | { 304 | pdev->dev.device_old_status = pdev->dev.device_status; 305 | /*Device is in Suspended State*/ 306 | pdev->dev.device_status = USB_SUSPENDED; 307 | /* Upon Resume call user call back */ 308 | return USBD_OK; 309 | } 310 | 311 | 312 | /** 313 | * @brief USBD_SOF 314 | * Handle SOF event 315 | * @param pdev: device instance 316 | * @retval status 317 | */ 318 | 319 | static uint8_t USBD_SOF(USB_CORE_HANDLE *pdev) 320 | { 321 | if(pdev->dev.class_cb->SOF) 322 | { 323 | pdev->dev.class_cb->SOF(pdev); 324 | } 325 | return USBD_OK; 326 | } 327 | /** 328 | * @brief USBD_SetCfg 329 | * Configure device and start the interface 330 | * @param pdev: device instance 331 | * @param cfgidx: configuration index 332 | * @retval status 333 | */ 334 | 335 | USBD_Status USBD_SetCfg(USB_CORE_HANDLE *pdev, uint8_t cfgidx) 336 | { 337 | pdev->dev.class_cb->Init(pdev, cfgidx); 338 | return USBD_OK; 339 | } 340 | 341 | /** 342 | * @brief USBD_ClrCfg 343 | * Clear current configuration 344 | * @param pdev: device instance 345 | * @param cfgidx: configuration index 346 | * @retval status: USBD_Status 347 | */ 348 | USBD_Status USBD_ClrCfg(USB_CORE_HANDLE *pdev, uint8_t cfgidx) 349 | { 350 | pdev->dev.class_cb->DeInit(pdev, cfgidx); 351 | return USBD_OK; 352 | } 353 | 354 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 355 | 356 | -------------------------------------------------------------------------------- /diseqc2/system/src/usb/usbd_desc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_desc.c 4 | * @author MCD Application Team 5 | * @version V1.0.0 6 | * @date 31-January-2014 7 | * @brief This file provides the USBD descriptors and string formating method. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "usbd_desc.h" 30 | 31 | /* Private typedef -----------------------------------------------------------*/ 32 | /* Private define ------------------------------------------------------------*/ 33 | #define USBD_VID 0x0483 34 | #define USBD_PID 0x5740 35 | 36 | #define USBD_LANGID_STRING 0x409 37 | #define USBD_MANUFACTURER_STRING "STMicroelectronics" 38 | 39 | #define USBD_PRODUCT_FS_STRING "STM32 Virtual ComPort in FS Mode" 40 | 41 | #define USBD_CONFIGURATION_FS_STRING "VCP Config" 42 | #define USBD_INTERFACE_FS_STRING "VCP Interface" 43 | 44 | /* Private macro -------------------------------------------------------------*/ 45 | /* Private variables ---------------------------------------------------------*/ 46 | char USBD_SERIALNUMBER_FS_STRING[26]; 47 | 48 | USBD_DEVICE USR_desc = 49 | { 50 | USBD_USR_DeviceDescriptor, 51 | USBD_USR_LangIDStrDescriptor, 52 | USBD_USR_ManufacturerStrDescriptor, 53 | USBD_USR_ProductStrDescriptor, 54 | USBD_USR_SerialStrDescriptor, 55 | USBD_USR_ConfigStrDescriptor, 56 | USBD_USR_InterfaceStrDescriptor, 57 | }; 58 | 59 | /* USB Standard Device Descriptor */ 60 | const uint8_t USBD_DeviceDesc[USB_SIZ_DEVICE_DESC] = 61 | { 62 | 0x12, /*bLength */ 63 | USB_DEVICE_DESCRIPTOR_TYPE, /*bDescriptorType*/ 64 | 0x00, /*bcdUSB */ 65 | 0x02, 66 | 0x00, /*bDeviceClass*/ 67 | 0x00, /*bDeviceSubClass*/ 68 | 0x00, /*bDeviceProtocol*/ 69 | USB_MAX_EP0_SIZE, /*bMaxPacketSize*/ 70 | LOBYTE(USBD_VID), /*idVendor*/ 71 | HIBYTE(USBD_VID), /*idVendor*/ 72 | LOBYTE(USBD_PID), /*idVendor*/ 73 | HIBYTE(USBD_PID), /*idVendor*/ 74 | 0x00, /*bcdDevice rel. 2.00*/ 75 | 0x02, 76 | USBD_IDX_MFC_STR, /*Index of manufacturer string*/ 77 | USBD_IDX_PRODUCT_STR, /*Index of product string*/ 78 | USBD_IDX_SERIAL_STR, /*Index of serial number string*/ 79 | USBD_CFG_MAX_NUM /*bNumConfigurations*/ 80 | } ; /* USB_DeviceDescriptor */ 81 | 82 | /* USB Standard Device Descriptor */ 83 | const uint8_t USBD_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC] = 84 | { 85 | USB_LEN_DEV_QUALIFIER_DESC, 86 | USB_DESC_TYPE_DEVICE_QUALIFIER, 87 | 0x00, 88 | 0x02, 89 | 0x00, 90 | 0x00, 91 | 0x00, 92 | 0x40, 93 | 0x01, 94 | 0x00, 95 | }; 96 | 97 | /* USB Standard Device Descriptor */ 98 | const uint8_t USBD_LangIDDesc[USB_SIZ_STRING_LANGID] = 99 | { 100 | USB_SIZ_STRING_LANGID, 101 | USB_DESC_TYPE_STRING, 102 | LOBYTE(USBD_LANGID_STRING), 103 | HIBYTE(USBD_LANGID_STRING), 104 | }; 105 | 106 | uint8_t USBD_StringSerial[USB_SIZ_STRING_SERIAL] = 107 | { 108 | USB_SIZ_STRING_SERIAL, /* bLength */ 109 | USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */ 110 | }; 111 | 112 | /* Private function prototypes -----------------------------------------------*/ 113 | static void IntToUnicode (uint32_t value , uint8_t *pbuf , uint8_t len); 114 | 115 | /* Private functions ---------------------------------------------------------*/ 116 | 117 | /** 118 | * @brief return the device descriptor 119 | * @param speed : current device speed 120 | * @param length : pointer to data length variable 121 | * @retval pointer to descriptor buffer 122 | */ 123 | uint8_t * USBD_USR_DeviceDescriptor( uint8_t speed , uint16_t *length) 124 | { 125 | *length = sizeof(USBD_DeviceDesc); 126 | return (uint8_t*)USBD_DeviceDesc; 127 | } 128 | 129 | /** 130 | * @brief return the LangID string descriptor 131 | * @param speed : current device speed 132 | * @param length : pointer to data length variable 133 | * @retval pointer to descriptor buffer 134 | */ 135 | uint8_t * USBD_USR_LangIDStrDescriptor( uint8_t speed , uint16_t *length) 136 | { 137 | *length = sizeof(USBD_LangIDDesc); 138 | return (uint8_t*)USBD_LangIDDesc; 139 | } 140 | 141 | 142 | /** 143 | * @brief return the product string descriptor 144 | * @param speed : current device speed 145 | * @param length : pointer to data length variable 146 | * @retval pointer to descriptor buffer 147 | */ 148 | uint8_t * USBD_USR_ProductStrDescriptor( uint8_t speed , uint16_t *length) 149 | { 150 | USBD_GetString ( (uint8_t*)USBD_PRODUCT_FS_STRING, USBD_StrDesc, length); 151 | return USBD_StrDesc; 152 | } 153 | 154 | /** 155 | * @brief return the manufacturer string descriptor 156 | * @param speed : current device speed 157 | * @param length : pointer to data length variable 158 | * @retval pointer to descriptor buffer 159 | */ 160 | uint8_t * USBD_USR_ManufacturerStrDescriptor( uint8_t speed , uint16_t *length) 161 | { 162 | USBD_GetString ( (uint8_t*)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); 163 | return USBD_StrDesc; 164 | } 165 | 166 | /** 167 | * @brief return the serial number string descriptor 168 | * @param speed : current device speed 169 | * @param length : pointer to data length variable 170 | * @retval pointer to descriptor buffer 171 | */ 172 | uint8_t * USBD_USR_SerialStrDescriptor( uint8_t speed , uint16_t *length) 173 | { 174 | *length = USB_SIZ_STRING_SERIAL; 175 | return USBD_StringSerial; 176 | } 177 | 178 | /** 179 | * @brief return the configuration string descriptor 180 | * @param speed : current device speed 181 | * @param length : pointer to data length variable 182 | * @retval pointer to descriptor buffer 183 | */ 184 | uint8_t * USBD_USR_ConfigStrDescriptor( uint8_t speed , uint16_t *length) 185 | { 186 | USBD_GetString ( (uint8_t*)USBD_CONFIGURATION_FS_STRING, USBD_StrDesc, length); 187 | return USBD_StrDesc; 188 | } 189 | 190 | 191 | /** 192 | * @brief return the interface string descriptor 193 | * @param speed : current device speed 194 | * @param length : pointer to data length variable 195 | * @retval pointer to descriptor buffer 196 | */ 197 | uint8_t * USBD_USR_InterfaceStrDescriptor( uint8_t speed , uint16_t *length) 198 | { 199 | USBD_GetString ( (uint8_t*)USBD_INTERFACE_FS_STRING, USBD_StrDesc, length); 200 | return USBD_StrDesc; 201 | } 202 | 203 | /** 204 | * @brief Create the serial number string descriptor 205 | * @param None 206 | * @retval None 207 | */ 208 | void Get_SerialNum(void) 209 | { 210 | uint32_t Device_Serial0, Device_Serial1, Device_Serial2; 211 | 212 | Device_Serial0 = *(uint32_t*)Device1_Identifier; 213 | Device_Serial1 = *(uint32_t*)Device2_Identifier; 214 | Device_Serial2 = *(uint32_t*)Device3_Identifier; 215 | 216 | Device_Serial0 += Device_Serial2; 217 | 218 | if (Device_Serial0 != 0) 219 | { 220 | IntToUnicode (Device_Serial0, &USBD_StringSerial[2] ,8); 221 | IntToUnicode (Device_Serial1, &USBD_StringSerial[18] ,4); 222 | } 223 | } 224 | 225 | /** 226 | * @brief Convert Hex 32Bits value into char 227 | * @param value: value to convert 228 | * @param pbuf: pointer to the buffer 229 | * @param len: buffer length 230 | * @retval None 231 | */ 232 | static void IntToUnicode (uint32_t value , uint8_t *pbuf , uint8_t len) 233 | { 234 | uint8_t idx = 0; 235 | 236 | for( idx = 0 ; idx < len ; idx ++) 237 | { 238 | if( ((value >> 28)) < 0xA ) 239 | { 240 | pbuf[ 2* idx] = (value >> 28) + '0'; 241 | } 242 | else 243 | { 244 | pbuf[2* idx] = (value >> 28) + 'A' - 10; 245 | } 246 | 247 | value = value << 4; 248 | 249 | pbuf[ 2* idx + 1] = 0; 250 | } 251 | } 252 | 253 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 254 | 255 | -------------------------------------------------------------------------------- /diseqc2/system/src/usb/usbd_ioreq.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_ioreq.c 4 | * @author MCD Application Team 5 | * @version V1.0.1 6 | * @date 31-January-2014 7 | * @brief This file provides the IO requests APIs for control endpoints. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "usbd_ioreq.h" 30 | 31 | /* Private typedef -----------------------------------------------------------*/ 32 | /* Private define ------------------------------------------------------------*/ 33 | /* Private macro -------------------------------------------------------------*/ 34 | /* Private variables ---------------------------------------------------------*/ 35 | /* Private function prototypes -----------------------------------------------*/ 36 | /* Private functions ---------------------------------------------------------*/ 37 | /** 38 | * @brief USBD_CtlSendData 39 | * send data on the ctl pipe 40 | * @param pdev: device instance 41 | * @param buff: pointer to data buffer 42 | * @param len: length of data to be sent 43 | * @retval status 44 | */ 45 | USBD_Status USBD_CtlSendData (USB_CORE_HANDLE *pdev, 46 | uint8_t *pbuf, 47 | uint16_t len) 48 | { 49 | USBD_Status ret = USBD_OK; 50 | 51 | pdev->dev.in_ep[0].total_data_len = len; 52 | pdev->dev.in_ep[0].rem_data_len = len; 53 | pdev->dev.device_state = USB_EP0_DATA_IN; 54 | 55 | DCD_EP_Tx (pdev, 0, pbuf, len); 56 | 57 | return ret; 58 | } 59 | 60 | /** 61 | * @brief USBD_CtlContinueSendData 62 | * continue sending data on the ctl pipe 63 | * @param pdev: device instance 64 | * @param buff: pointer to data buffer 65 | * @param len: length of data to be sent 66 | * @retval status 67 | */ 68 | USBD_Status USBD_CtlContinueSendData (USB_CORE_HANDLE *pdev, 69 | uint8_t *pbuf, 70 | uint16_t len) 71 | { 72 | USBD_Status ret = USBD_OK; 73 | 74 | DCD_EP_Tx (pdev, 0, pbuf, len); 75 | 76 | 77 | return ret; 78 | } 79 | 80 | /** 81 | * @brief USBD_CtlPrepareRx 82 | * receive data on the ctl pipe 83 | * @param pdev: USB device instance 84 | * @param buff: pointer to data buffer 85 | * @param len: length of data to be received 86 | * @retval status 87 | */ 88 | USBD_Status USBD_CtlPrepareRx (USB_CORE_HANDLE *pdev, 89 | uint8_t *pbuf, 90 | uint16_t len) 91 | { 92 | USBD_Status ret = USBD_OK; 93 | 94 | pdev->dev.out_ep[0].total_data_len = len; 95 | pdev->dev.out_ep[0].rem_data_len = len; 96 | pdev->dev.device_state = USB_EP0_DATA_OUT; 97 | 98 | DCD_EP_PrepareRx (pdev, 99 | 0, 100 | pbuf, 101 | len); 102 | 103 | 104 | return ret; 105 | } 106 | 107 | /** 108 | * @brief USBD_CtlContinueRx 109 | * continue receive data on the ctl pipe 110 | * @param pdev: USB device instance 111 | * @param buff: pointer to data buffer 112 | * @param len: length of data to be received 113 | * @retval status 114 | */ 115 | USBD_Status USBD_CtlContinueRx (USB_CORE_HANDLE *pdev, 116 | uint8_t *pbuf, 117 | uint16_t len) 118 | { 119 | USBD_Status ret = USBD_OK; 120 | 121 | DCD_EP_PrepareRx (pdev, 122 | 0, 123 | pbuf, 124 | len); 125 | return ret; 126 | } 127 | /** 128 | * @brief USBD_CtlSendStatus 129 | * send zero length packet on the ctl pipe 130 | * @param pdev: USB device instance 131 | * @retval status 132 | */ 133 | USBD_Status USBD_CtlSendStatus (USB_CORE_HANDLE *pdev) 134 | { 135 | USBD_Status ret = USBD_OK; 136 | pdev->dev.device_state = USB_EP0_STATUS_IN; 137 | DCD_EP_Tx (pdev, 138 | 0, 139 | NULL, 140 | 0); 141 | return ret; 142 | } 143 | 144 | /** 145 | * @brief USBD_CtlReceiveStatus 146 | * receive zero length packet on the ctl pipe 147 | * @param pdev: USB device instance 148 | * @retval status 149 | */ 150 | USBD_Status USBD_CtlReceiveStatus (USB_CORE_HANDLE *pdev) 151 | { 152 | USBD_Status ret = USBD_OK; 153 | pdev->dev.device_state = USB_EP0_STATUS_OUT; 154 | DCD_EP_PrepareRx ( pdev, 155 | 0, 156 | NULL, 157 | 0); 158 | 159 | return ret; 160 | } 161 | 162 | 163 | /** 164 | * @brief USBD_GetRxCount 165 | * returns the received data length 166 | * @param pdev: USB device instance 167 | * epnum: endpoint index 168 | * @retval Rx Data blength 169 | */ 170 | uint16_t USBD_GetRxCount (USB_CORE_HANDLE *pdev , uint8_t epnum) 171 | { 172 | return pdev->dev.out_ep[epnum].xfer_count; 173 | } 174 | 175 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 176 | -------------------------------------------------------------------------------- /diseqc2/system/src/usb/usbd_pwr.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file usbd_pwr.c 4 | * @author MCD Application Team 5 | * @version V1.0.0 6 | * @date 31-January-2014 7 | * @brief This file provides functions for power management 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT 2014 STMicroelectronics

12 | * 13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 14 | * You may not use this file except in compliance with the License. 15 | * You may obtain a copy of the License at: 16 | * 17 | * http://www.st.com/software_license_agreement_liberty_v2 18 | * 19 | * Unless required by applicable law or agreed to in writing, software 20 | * distributed under the License is distributed on an "AS IS" BASIS, 21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 | * See the License for the specific language governing permissions and 23 | * limitations under the License. 24 | * 25 | ****************************************************************************** 26 | */ 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "usbd_pwr.h" 30 | 31 | /* Private typedef -----------------------------------------------------------*/ 32 | /* Private define ------------------------------------------------------------*/ 33 | /* Private macro -------------------------------------------------------------*/ 34 | /* Private variables ---------------------------------------------------------*/ 35 | struct 36 | { 37 | __IO RESUME_STATE eState; 38 | __IO uint8_t bESOFcnt; 39 | } 40 | ResumeS; 41 | 42 | __IO uint32_t remotewakeupon=0; 43 | 44 | /* Private function prototypes -----------------------------------------------*/ 45 | /* Private functions ---------------------------------------------------------*/ 46 | 47 | /** 48 | * @brief Sets suspend mode operating conditions 49 | * @param None 50 | * @retval USB_SUCCESS 51 | */ 52 | void Suspend(void) 53 | { 54 | uint16_t wCNTR; 55 | 56 | /*Store CNTR value */ 57 | wCNTR = _GetCNTR(); 58 | /* Set FSUSP bit in USB_CNTR register*/ 59 | wCNTR |= CNTR_FSUSP; 60 | _SetCNTR(wCNTR); 61 | 62 | /* force low-power mode in the macrocell */ 63 | wCNTR = _GetCNTR(); 64 | wCNTR |= CNTR_LPMODE; 65 | _SetCNTR(wCNTR); 66 | 67 | #ifdef USB_DEVICE_LOW_PWR_MGMT_SUPPORT 68 | 69 | /* enter system in STOP mode, only when wakeup flag in not set */ 70 | if((_GetISTR()&ISTR_WKUP)==0) 71 | { 72 | /*Enter STOP mode with SLEEPONEXIT*/ 73 | PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_SLEEPONEXIT); 74 | } 75 | else 76 | { 77 | /* Clear Wakeup flag */ 78 | _SetISTR(CLR_WKUP); 79 | /* clear FSUSP to abort entry in suspend mode */ 80 | wCNTR = _GetCNTR(); 81 | wCNTR&=~CNTR_FSUSP; 82 | _SetCNTR(wCNTR); 83 | } 84 | #endif 85 | } 86 | 87 | /** 88 | * @brief Handles wake-up restoring normal operations 89 | * @param None 90 | * @retval USB_SUCCESS 91 | */ 92 | void Resume_Init(void) 93 | { 94 | uint16_t wCNTR; 95 | 96 | /* ------------------ ONLY WITH BUS-POWERED DEVICES ---------------------- */ 97 | /* restart the clocks */ 98 | /* ... */ 99 | 100 | /* CNTR_LPMODE = 0 */ 101 | wCNTR = _GetCNTR(); 102 | wCNTR &= (~CNTR_LPMODE); 103 | _SetCNTR(wCNTR); 104 | #ifdef USB_DEVICE_LOW_PWR_MGMT_SUPPORT 105 | /* restore full power */ 106 | /* ... on connected devices */ 107 | Leave_LowPowerMode(); 108 | #endif 109 | /* reset FSUSP bit */ 110 | _SetCNTR(IMR_MSK); 111 | 112 | } 113 | 114 | 115 | /** 116 | * @brief Provides the state machine handling resume operations and 117 | * timing sequence. The control is based on the Resume structure 118 | * variables and on the ESOF interrupt calling this subroutine 119 | * without changing machine state. 120 | * @param a state machine value (RESUME_STATE) 121 | * RESUME_ESOF doesn't change ResumeS.eState allowing 122 | * decrementing of the ESOF counter in different states. 123 | * @retval Status 124 | */ 125 | void Resume(RESUME_STATE eResumeSetVal) 126 | { 127 | uint16_t wCNTR; 128 | 129 | if (eResumeSetVal != RESUME_ESOF) 130 | ResumeS.eState = eResumeSetVal; 131 | switch (ResumeS.eState) 132 | { 133 | case RESUME_EXTERNAL: 134 | 135 | if (remotewakeupon ==0) 136 | { 137 | Resume_Init(); 138 | ResumeS.eState = RESUME_OFF; 139 | } 140 | else /* RESUME detected during the RemoteWAkeup signalling => keep RemoteWakeup handling*/ 141 | { 142 | ResumeS.eState = RESUME_ON; 143 | } 144 | break; 145 | case RESUME_INTERNAL: 146 | Resume_Init(); 147 | ResumeS.eState = RESUME_START; 148 | remotewakeupon = 1; 149 | break; 150 | case RESUME_LATER: 151 | ResumeS.bESOFcnt = 2; 152 | ResumeS.eState = RESUME_WAIT; 153 | break; 154 | case RESUME_WAIT: 155 | ResumeS.bESOFcnt--; 156 | if (ResumeS.bESOFcnt == 0) 157 | ResumeS.eState = RESUME_START; 158 | break; 159 | case RESUME_START: 160 | wCNTR = _GetCNTR(); 161 | wCNTR |= CNTR_RESUME; 162 | _SetCNTR(wCNTR); 163 | ResumeS.eState = RESUME_ON; 164 | ResumeS.bESOFcnt = 10; 165 | break; 166 | case RESUME_ON: 167 | ResumeS.bESOFcnt--; 168 | if (ResumeS.bESOFcnt == 0) 169 | { 170 | wCNTR = _GetCNTR(); 171 | wCNTR &= (~CNTR_RESUME); 172 | _SetCNTR(wCNTR); 173 | ResumeS.eState = RESUME_OFF; 174 | remotewakeupon = 0; 175 | } 176 | break; 177 | case RESUME_OFF: 178 | case RESUME_ESOF: 179 | default: 180 | ResumeS.eState = RESUME_OFF; 181 | break; 182 | } 183 | } 184 | 185 | /** 186 | * @brief Restores system clocks and power while exiting suspend mode 187 | * @param None 188 | * @retval None 189 | */ 190 | void Leave_LowPowerMode(void) 191 | { 192 | #if defined USB_CLOCK_SOURCE_CRS 193 | /* Enable HSI48 oscillator */ 194 | RCC_HSI48Cmd(ENABLE); 195 | 196 | /* Wait till HSI48RDYF is set */ 197 | while(RCC_GetFlagStatus(RCC_FLAG_HSI48RDY) == RESET) 198 | { 199 | } 200 | /* Select HSI48 as system clock source */ 201 | RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI48); 202 | 203 | #else 204 | 205 | /* After wake-up from STOP mode restore system clock (system clock = PLL clock 206 | from HSE source )*/ 207 | /* Enable HSE */ 208 | RCC_HSEConfig(RCC_HSE_ON); 209 | 210 | /* Wait till HSE is ready */ 211 | while (RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET) 212 | {} 213 | 214 | /* Enable PLL */ 215 | RCC_PLLCmd(ENABLE); 216 | 217 | /* Wait till PLL is ready */ 218 | while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) 219 | {} 220 | 221 | /* Select PLL as system clock source */ 222 | RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); 223 | 224 | /* Wait till PLL is used as system clock source */ 225 | while (RCC_GetSYSCLKSource() != 0x08) 226 | {} 227 | #endif /* USB_CLOCK_SOURCE_CRS */ 228 | 229 | /*Low Power Sleep on Exit Disabled*/ 230 | NVIC_SystemLPConfig(NVIC_LP_SLEEPONEXIT, DISABLE); 231 | } 232 | 233 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 234 | -------------------------------------------------------------------------------- /diseqc2/usbcom.h: -------------------------------------------------------------------------------- 1 | #include "usbd_desc.h" 2 | 3 | // main functions 4 | void UsbComInit(); 5 | void UsbComSend(uint8_t data); 6 | void UsbComConfirmRx(); 7 | 8 | // events (weak) 9 | uint8_t UsbComOnRx(uint8_t data); // return 0 if NACK, then use UsbComConfirmRx 10 | -------------------------------------------------------------------------------- /dsqsend/README: -------------------------------------------------------------------------------- 1 | Simple tool for sending diseqc sequences using STB card on linux. 2 | 3 | Size of each sequence is limited to 6 by hardware and Linux API. 4 | Use dconv -l option for split programming sequences to small pieces. 5 | 6 | compiling: 7 | gcc senddsq.c -o senddsq 8 | 9 | help: 10 | ./senddsq -h 11 | 12 | Example 1 (you have ready small-splited sequence) 13 | 14 | ./senddsq -i myfile.dsq 15 | 16 | this command sending diseqc sequences from myfile.dsq 17 | 18 | Example 2: (you have .bin file from original app) 19 | 20 | ./dconv -i myfile.bin -it bin -ot dsq -l 6 | ./senddsq 21 | or 22 | ./dconv -i myfile.dsq -it dsq -ot dsq -l 6 | ./senddsq 23 | 24 | this commands take myfile.bin (myfile.dsq), converting it to small-pieced dsq and sends thru STB card 25 | -------------------------------------------------------------------------------- /dsqsend/senddsq.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include 7 | #include 8 | #include 9 | #include 10 | #include 11 | 12 | 13 | int dsend(int fd, char *data) { 14 | struct timespec req = { 0, 1000000 * 100 }; 15 | struct dvb_diseqc_master_cmd cmd; 16 | cmd.msg_len = 0; 17 | int p = 0, processed; 18 | unsigned char d; 19 | while(sscanf(&data[p], "%02hhx %n", &d, &processed) == 1) { 20 | if(cmd.msg_len < sizeof(cmd.msg)) { 21 | printf("%02X ", d); 22 | cmd.msg[cmd.msg_len++] = d; 23 | p += processed; 24 | } else { 25 | printf("Too much data in line\n"); 26 | return -1; 27 | } 28 | } 29 | printf("\n"); 30 | 31 | if (ioctl(fd, FE_DISEQC_SEND_MASTER_CMD, &cmd)) { 32 | printf("DiseqC sending error\n"); 33 | return -1; 34 | } 35 | 36 | while (nanosleep(&req, &req)); 37 | return 0; 38 | } 39 | 40 | int main (int argc, char **argv) { 41 | char frontend_devname[80], *filename = NULL; 42 | int adapter = 0, frontend = 0, opt, fd; 43 | FILE *in = stdin; 44 | char buf[64]; 45 | 46 | while ((opt = getopt(argc, argv, "a:f:i:h?")) != -1) { 47 | switch (opt) { 48 | case 'i': 49 | filename = optarg; 50 | break; 51 | case 'a': 52 | adapter = strtoul(optarg, NULL, 0); 53 | break; 54 | case 'f': 55 | frontend = strtoul(optarg, NULL, 0); 56 | break; 57 | default: 58 | printf("USAGE: %s [-a ][-f ][-i ]\n", argv[0]); 59 | return -1; 60 | } 61 | } 62 | 63 | if (filename && (!(in = fopen(filename, "rt")))) { 64 | printf("failed to open '%s'\n", filename); 65 | return -1; 66 | } 67 | 68 | snprintf (frontend_devname, sizeof(frontend_devname), 69 | "/dev/dvb/adapter%i/frontend%i", adapter, frontend); 70 | printf("using '%s' \n", frontend_devname); 71 | 72 | if ((fd = open (frontend_devname, O_RDWR | O_NONBLOCK)) < 0) { 73 | printf("failed to open '%s': %d\n", frontend_devname, errno); 74 | return -1; 75 | } 76 | 77 | if (ioctl(fd, FE_SET_TONE, SEC_TONE_OFF)) { 78 | printf("Setting tone error\n"); 79 | return -1; 80 | } 81 | 82 | if(ioctl(fd, FE_SET_VOLTAGE, SEC_VOLTAGE_13)) { 83 | printf("problem Setting the Voltage\n"); 84 | return -1; 85 | } 86 | usleep(2000000); 87 | while(fgets(buf, sizeof(buf), in) && (!dsend(fd, buf))) { 88 | } 89 | if(ferror(in)) { 90 | printf("Read error\n"); 91 | return -1; 92 | } 93 | 94 | if(filename) 95 | fclose(in); 96 | close (fd); 97 | return 0; 98 | } 99 | 100 | -------------------------------------------------------------------------------- /hookdll/mpusbapi.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | 4 | #define MAX_NUM_MPUSB_DEV 127 5 | #define MPUSB_FAIL 0 6 | #define MPUSB_SUCCESS 1 7 | 8 | #define MP_WRITE 0 9 | #define MP_READ 1 10 | 11 | void log(char* fmt, ...) { 12 | va_list ptr; 13 | FILE *logfile = fopen("d:\\dlllog.log", "a+t"); 14 | va_start(ptr, fmt); 15 | vfprintf(logfile, fmt, ptr); 16 | fprintf(logfile, "\n"); 17 | va_end(ptr); 18 | fclose(logfile); 19 | } 20 | 21 | extern "C" __declspec(dllexport) 22 | DWORD _MPUSBGetDLLVersion(void) { 23 | log("_GetDllBersion"); 24 | return 0; 25 | } 26 | 27 | char *pidvid = "vid_04d8&pid_000c"; 28 | 29 | extern "C" __declspec(dllexport) 30 | DWORD _MPUSBGetDeviceCount(PCHAR pVID_PID) { 31 | if (!strcmp(pVID_PID,pidvid)) { 32 | return 1; 33 | } 34 | return 0; 35 | } 36 | 37 | int cur_handle = 1; 38 | 39 | extern "C" __declspec(dllexport) 40 | HANDLE _MPUSBOpen(DWORD instance, // Input 41 | PCHAR pVID_PID, // Input 42 | PCHAR pEP, // Input 43 | DWORD dwDir, // Input 44 | DWORD dwReserved) { // Input 45 | if (!strcmp(pVID_PID, pidvid)) { 46 | return (HANDLE)cur_handle++; 47 | } 48 | return INVALID_HANDLE_VALUE; 49 | } 50 | 51 | extern "C" __declspec(dllexport) 52 | DWORD _MPUSBRead(HANDLE handle, // Input 53 | PVOID pData, // Output 54 | DWORD dwLen, // Input 55 | PDWORD pLength, // Output 56 | DWORD dwMilliseconds) { // Input 57 | log("read HANDLE=%d len=%d put 0x01", handle,dwLen); 58 | for (DWORD i = 0; i < dwLen; i++) 59 | ((UCHAR*)pData)[i] = 0x01; 60 | *pLength = dwLen; 61 | return MPUSB_SUCCESS; 62 | } 63 | 64 | extern "C" __declspec(dllexport) 65 | DWORD _MPUSBWrite(HANDLE handle, // Input 66 | PVOID pData, // Input 67 | DWORD dwLen, // Input 68 | PDWORD pLength, // Output 69 | DWORD dwMilliseconds){ // Input 70 | log("write HANDLE=%d", handle); 71 | for (DWORD i = 0; i < dwLen; i++) 72 | log("%02X",((UCHAR*)pData)[i]); 73 | *pLength = dwLen; 74 | return MPUSB_SUCCESS; 75 | } 76 | 77 | extern "C" __declspec(dllexport) 78 | DWORD _MPUSBReadInt(HANDLE handle, // Input 79 | PVOID pData, // Output 80 | DWORD dwLen, // Input 81 | PDWORD pLength, // Output 82 | DWORD dwMilliseconds){ // Input 83 | log("readint HANDLE=%d", handle); 84 | return 0; 85 | } 86 | 87 | extern "C" __declspec(dllexport) 88 | BOOL _MPUSBClose(HANDLE handle) { 89 | return 0; 90 | } 91 | 92 | BOOL APIENTRY DllMain(HMODULE hModule, 93 | DWORD ul_reason_for_call, 94 | LPVOID lpReserved 95 | ) 96 | { 97 | switch (ul_reason_for_call) 98 | { 99 | case DLL_PROCESS_ATTACH: 100 | log("process attach"); 101 | break; 102 | case DLL_THREAD_ATTACH: 103 | case DLL_THREAD_DETACH: 104 | break; 105 | case DLL_PROCESS_DETACH: 106 | log("process detach"); 107 | break; 108 | } 109 | return TRUE; 110 | } 111 | 112 | --------------------------------------------------------------------------------