├── .gitignore ├── LICENSE.md ├── Makefile ├── README.md ├── build ├── default_config.asl └── tools │ ├── gen_config │ ├── iasl-quiet-include.patch │ ├── iasl_darwin │ └── mount_efi ├── out └── .gitignore └── src ├── board ├── ASUS │ └── P8Z77-V-PRO-TB.asl └── Gigabyte │ ├── GA-Z77M-D3H.asl │ ├── GA-Z77X-D3H.asl │ ├── GA-Z77X-UD3H.asl │ ├── GA-Z77X-UD4H.asl │ ├── GA-Z77X-UD5H.asl │ ├── GA-Z77X-UP4-TH.asl │ └── GA-Z77X-UP5-TH.asl ├── common ├── pci │ └── firewire.asl ├── pwrb.asl └── sleep.asl └── panther_point ├── cpu.asl ├── gpe.asl ├── lpcb.asl ├── mem2.asl ├── operation_regions.asl ├── pci ├── chipset.asl ├── ehci.asl ├── hdef.asl ├── igpu.asl ├── imei.asl ├── intel_lan.asl ├── mchc.asl ├── peg.asl ├── pxsx.asl ├── rp01.asl ├── rp02.asl ├── rp03.asl ├── rp04.asl ├── rp05.asl ├── rp06.asl ├── rp07.asl ├── rp08.asl ├── sata.asl ├── thunderbolt.asl └── xhci.asl ├── pnlf.asl └── sbus.asl /.gitignore: -------------------------------------------------------------------------------- 1 | .DS_Store 2 | *.aml 3 | build/build_config.asl 4 | -------------------------------------------------------------------------------- /LICENSE.md: -------------------------------------------------------------------------------- 1 | GNU General Public License 2 | ========================== 3 | 4 | _Version 3, 29 June 2007_ 5 | _Copyright © 2007 Free Software Foundation, Inc. <>_ 6 | 7 | Everyone is permitted to copy and distribute verbatim copies of this license 8 | document, but changing it is not allowed. 9 | 10 | ## Preamble 11 | 12 | The GNU General Public License is a free, copyleft license for software and other 13 | kinds of works. 14 | 15 | The licenses for most software and other practical works are designed to take away 16 | your freedom to share and change the works. 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No Surrender of Others' Freedom 472 | 473 | If conditions are imposed on you (whether by court order, agreement or otherwise) 474 | that contradict the conditions of this License, they do not excuse you from the 475 | conditions of this License. If you cannot convey a covered work so as to satisfy 476 | simultaneously your obligations under this License and any other pertinent 477 | obligations, then as a consequence you may not convey it at all. For example, if you 478 | agree to terms that obligate you to collect a royalty for further conveying from 479 | those to whom you convey the Program, the only way you could satisfy both those terms 480 | and this License would be to refrain entirely from conveying the Program. 481 | 482 | ### 13. Use with the GNU Affero General Public License 483 | 484 | Notwithstanding any other provision of this License, you have permission to link or 485 | combine any covered work with a work licensed under version 3 of the GNU Affero 486 | General Public License into a single combined work, and to convey the resulting work. 487 | The terms of this License will continue to apply to the part which is the covered 488 | work, but the special requirements of the GNU Affero General Public License, section 489 | 13, concerning interaction through a network will apply to the combination as such. 490 | 491 | ### 14. Revised Versions of this License 492 | 493 | The Free Software Foundation may publish revised and/or new versions of the GNU 494 | General Public License from time to time. Such new versions will be similar in spirit 495 | to the present version, but may differ in detail to address new problems or concerns. 496 | 497 | Each version is given a distinguishing version number. If the Program specifies that 498 | a certain numbered version of the GNU General Public License “or any later 499 | version” applies to it, you have the option of following the terms and 500 | conditions either of that numbered version or of any later version published by the 501 | Free Software Foundation. If the Program does not specify a version number of the GNU 502 | General Public License, you may choose any version ever published by the Free 503 | Software Foundation. 504 | 505 | If the Program specifies that a proxy can decide which future versions of the GNU 506 | General Public License can be used, that proxy's public statement of acceptance of a 507 | version permanently authorizes you to choose that version for the Program. 508 | 509 | Later license versions may give you additional or different permissions. However, no 510 | additional obligations are imposed on any author or copyright holder as a result of 511 | your choosing to follow a later version. 512 | 513 | ### 15. Disclaimer of Warranty 514 | 515 | THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. 516 | EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES 517 | PROVIDE THE PROGRAM “AS IS” WITHOUT WARRANTY OF ANY KIND, EITHER 518 | EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 519 | MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE 520 | QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE PROGRAM PROVE 521 | DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 522 | 523 | ### 16. Limitation of Liability 524 | 525 | IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL ANY 526 | COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS THE PROGRAM AS 527 | PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, 528 | INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE 529 | PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE 530 | OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE 531 | WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE 532 | POSSIBILITY OF SUCH DAMAGES. 533 | 534 | ### 17. Interpretation of Sections 15 and 16 535 | 536 | If the disclaimer of warranty and limitation of liability provided above cannot be 537 | given local legal effect according to their terms, reviewing courts shall apply local 538 | law that most closely approximates an absolute waiver of all civil liability in 539 | connection with the Program, unless a warranty or assumption of liability accompanies 540 | a copy of the Program in return for a fee. 541 | 542 | _END OF TERMS AND CONDITIONS_ 543 | 544 | ## How to Apply These Terms to Your New Programs 545 | 546 | If you develop a new program, and you want it to be of the greatest possible use to 547 | the public, the best way to achieve this is to make it free software which everyone 548 | can redistribute and change under these terms. 549 | 550 | To do so, attach the following notices to the program. It is safest to attach them 551 | to the start of each source file to most effectively state the exclusion of warranty; 552 | and each file should have at least the “copyright” line and a pointer to 553 | where the full notice is found. 554 | 555 | 556 | Copyright (C) 557 | 558 | This program is free software: you can redistribute it and/or modify 559 | it under the terms of the GNU General Public License as published by 560 | the Free Software Foundation, either version 3 of the License, or 561 | (at your option) any later version. 562 | 563 | This program is distributed in the hope that it will be useful, 564 | but WITHOUT ANY WARRANTY; without even the implied warranty of 565 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 566 | GNU General Public License for more details. 567 | 568 | You should have received a copy of the GNU General Public License 569 | along with this program. If not, see . 570 | 571 | Also add information on how to contact you by electronic and paper mail. 572 | 573 | If the program does terminal interaction, make it output a short notice like this 574 | when it starts in an interactive mode: 575 | 576 | Copyright (C) 577 | This program comes with ABSOLUTELY NO WARRANTY; for details type 'show w'. 578 | This is free software, and you are welcome to redistribute it 579 | under certain conditions; type 'show c' for details. 580 | 581 | The hypothetical commands `show w` and `show c` should show the appropriate parts of 582 | the General Public License. Of course, your program's commands might be different; 583 | for a GUI interface, you would use an “about box”. 584 | 585 | You should also get your employer (if you work as a programmer) or school, if any, to 586 | sign a “copyright disclaimer” for the program, if necessary. For more 587 | information on this, and how to apply and follow the GNU GPL, see 588 | <>. 589 | 590 | The GNU General Public License does not permit incorporating your program into 591 | proprietary programs. If your program is a subroutine library, you may consider it 592 | more useful to permit linking proprietary applications with the library. If this is 593 | what you want to do, use the GNU Lesser General Public License instead of this 594 | License. But first, please read 595 | <>. 596 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | # Makefile for hack-acpi 2 | 3 | EFI_MOUNT := $(shell build/tools/mount_efi) 4 | OS := $(shell uname) 5 | 6 | ifeq ($(OS), Darwin) 7 | IASL := build/tools/iasl_darwin 8 | endif 9 | 10 | IASLFLAGS := -I build -I src -vo -p out/DSDT.aml 11 | 12 | all: src/board/$(BOARD).asl 13 | build/tools/gen_config 14 | $(IASL) $(IASLFLAGS) $< 15 | 16 | .PHONY: install 17 | install: all 18 | cp out/DSDT.aml "$(EFI_MOUNT)/EFI/CLOVER/ACPI/patched/DSDT.aml" 19 | 20 | .PHONY: cleanall 21 | cleanall: clean 22 | $(RM) build/build_config.asl 23 | 24 | .PHONY: clean 25 | clean: 26 | $(RM) out/DSDT.aml 27 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Hackintosh ACPI 2 | Stripped DSDTs for running macOS on various motherboards, [based off Pike R. Alpha's 3 | ACPI table examples](https://github.com/Piker-Alpha/DSDT). 4 | 5 | ### Supported motherboards 6 | - ASUS P8Z77-V PRO/Thunderbolt *(Thunderbolt support WIP, untested)* 7 | - Gigabyte GA-Z77M-D3H 8 | - Gigabyte GA-Z77X-D3H 9 | - Gigabyte GA-Z77X-UD3H 10 | - Gigabyte GA-Z77X-UD5H 11 | - Gigabyte GA-Z77X-UP5 TH *(Thunderbolt support WIP)* 12 | 13 | ### Usage 14 | Build a DSDT using `BOARD=target make`: 15 | 16 | ``` 17 | $ BOARD=Gigabyte/GA-Z77X-UD5H make 18 | build/tools/gen_config 19 | build/tools/iasl_darwin -I build -I src -vo -p out/DSDT.aml src/board/Gigabyte/GA-Z77X-UD5H.asl 20 | 21 | Intel ACPI Component Architecture 22 | ASL+ Optimizing Compiler/Disassembler version 20180508 23 | Copyright (c) 2000 - 2018 Intel Corporation 24 | 25 | src/panther_point/pci/imei.asl 23: age (Zero) {}) 26 | Remark 2095 - Effective AML package length is zero ^ 27 | 28 | src/panther_point/pci/intel_lan.asl 1: H1) 29 | Optimize 1075 - NamePath optimized ^ (ETH1) 30 | 31 | ASL Input: src/board/Gigabyte/GA-Z77X-UD5H.asl - 136 lines, 2940 bytes, 333 keywords 32 | AML Output: out/DSDT.aml - 5057 bytes, 274 named objects, 59 executable opcodes 33 | 34 | Compilation complete. 0 Errors, 0 Warnings, 1 Remarks, 1 Optimizations 35 | ``` 36 | 37 | Running `BOARD=target make install` will copy the DSDT to your the appropriate 38 | directory on your EFI system partition. 39 | 40 | ### Additional information 41 | These DSDTs contain device property injection in the `_DSM` methods for onboard 42 | FireWire controllers, Thunderbolt controllers (WIP), and USB controllers. This 43 | can be disabled in `config.asl`, by setting `CONFIG_ACPI_DSM_INJECTION` to zero. 44 | -------------------------------------------------------------------------------- /build/default_config.asl: -------------------------------------------------------------------------------- 1 | /* User ACPI build configuration */ 2 | 3 | // The amount of ACPI CPU objects to be added. 4 | /// 0xFF automatically selects the maximum amount of ACPI CPU objects. 5 | /// Manually set this to further strip the DSDT. 6 | #define CONFIG_ACPI_CPUS 0xFF 7 | 8 | // Enable or disable Apple CPU PM plugin-type injection. 9 | /// 0xFF automatically sets this depending on the chipset model. 10 | /// Disable this (set to 0x00) if a CPU PM SSDT is used. 11 | #define CONFIG_ACPI_CPU_PM 0xFF 12 | 13 | // Enable or disable device property injection from _DSM methods. 14 | /// Disable this (set to 0x00) to further strip the DSDT. 15 | #define CONFIG_ACPI_DSM_INJECTION 0x01 16 | 17 | // The GNVS SystemMemory address. Can be found in a dump of your DSDT. 18 | #define CONFIG_ACPI_GNVS_ADDRESS 0xFFFF0000 19 | 20 | // Enable or disable the creation of certain ACPI devices found on iMacs. 21 | /// Disable this (set to 0x00) to further strip the DSDT. 22 | #define CONFIG_ACPI_IMAC_DEVICES 0x00 23 | -------------------------------------------------------------------------------- /build/tools/gen_config: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | # gen_config 3 | 4 | set -e 5 | set -u 6 | 7 | export LC_ALL=C 8 | 9 | BDMESG=$(which bdmesg) 10 | 11 | if [[ ! -e build/build_config.asl ]]; then 12 | cp build/default_config.asl build/build_config.asl 13 | fi 14 | 15 | if [ -f "$BDMESG" ]; then 16 | ACPI_GNVS_ADDRESS=$($BDMESG | grep 'OperationRegion (GNVS...)' |\ 17 | awk -F ' ' '{gsub("addr=", ""); print $7}') 18 | 19 | if [[ -z $ACPI_GNVS_ADDRESS ]]; then 20 | ACPI_GNVS_ADDRESS=0x$($BDMESG | grep 'OperationRegion(GNVS,' | tail -n 1 |\ 21 | awk -F ' ' '{gsub("addr=", ""); print $6}' | tr -d ',') 22 | fi 23 | 24 | if [[ $ACPI_GNVS_ADDRESS != "0x" ]]; then 25 | sed -i '' "s/0xFFFF0000/$ACPI_GNVS_ADDRESS/g" build/build_config.asl 26 | fi 27 | else 28 | echo "gen_config: bdmesg not found, using fallback GNVS address" 29 | fi 30 | -------------------------------------------------------------------------------- /build/tools/iasl-quiet-include.patch: -------------------------------------------------------------------------------- 1 | diff --git a/source/compiler/aslfiles.c b/source/compiler/aslfiles.c 2 | index ea9ba5484..0c371276b 100644 3 | --- a/source/compiler/aslfiles.c 4 | +++ b/source/compiler/aslfiles.c 5 | @@ -390,7 +390,6 @@ FlOpenIncludeWithPrefix ( 6 | IncludeFile = fopen (Pathname, "r"); 7 | if (!IncludeFile) 8 | { 9 | - fprintf (stderr, "Could not open include file %s\n", Pathname); 10 | ACPI_FREE (Pathname); 11 | return (NULL); 12 | } 13 | diff --git a/source/compiler/prutils.c b/source/compiler/prutils.c 14 | index 33acec5c5..27110023c 100644 15 | --- a/source/compiler/prutils.c 16 | +++ b/source/compiler/prutils.c 17 | @@ -421,7 +421,6 @@ PrOpenIncludeWithPrefix ( 18 | IncludeFile = fopen (Pathname, OpenMode); 19 | if (!IncludeFile) 20 | { 21 | - fprintf (stderr, "Could not open include file %s\n", Pathname); 22 | return (NULL); 23 | } 24 | 25 | -------------------------------------------------------------------------------- /build/tools/iasl_darwin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/al3xtjames/hack-acpi/b15ac939c526199cf771e7775fa04968a5f91065/build/tools/iasl_darwin -------------------------------------------------------------------------------- /build/tools/mount_efi: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | # mount_efi.sh 3 | 4 | set -e 5 | set -u 6 | 7 | export LC_ALL=C 8 | 9 | # Mounts the EFI system partition for the currently-booted disk. 10 | function mount_efi() 11 | { 12 | # Find the BSD device name for the root volume 13 | local rootVolume=$(df / | awk '/disk/ {print $1}') 14 | 15 | # Find the EFI partition on the boot drive 16 | local efiVolume=$(diskutil list "$rootVolume" | awk '/EFI/ {print $6}') 17 | 18 | # Make sure the EFI partition actually exists 19 | if [ -z "$efiVolume" ]; then 20 | local apfsVolume=$(diskutil info "$rootVolume" | grep "APFS") 21 | local csVolume=$(diskutil info "$rootVolume" | grep "Core Storage") 22 | ## Check if the root volume is an APFS volume 23 | if [ ! -z "$apfsVolume" ]; then ## APFS volume detected 24 | ## Find the physical store in the diskutil output, and use that to find the EFI partition 25 | local physicalStore=$(diskutil list "$rootVolume" | awk '/Physical Store/ {print $3}') 26 | local efiVolume=$(diskutil list "$physicalStore" | awk '/EFI/ {print $6}') 27 | ## Check if the root volume is a Core Storage (CS) logical volume 28 | elif [ ! -z "$csVolume" ]; then ## CS logical volume detected 29 | ## Find the recovery volume in the diskutil output, and use that to find the EFI partition 30 | local recoveryVolume=$(diskutil info "$rootVolume" | awk '/Recovery Disk:/ {print $3}') 31 | local efiVolume=$(diskutil list "$recoveryVolume" | awk '/EFI/ {print $6}') 32 | else ## No CS volume present, so assume no EFI partition 33 | echo "No EFI system partition found on root volume ($rootVolume)." && exit 1 34 | fi 35 | fi 36 | 37 | # Check if the EFI partition is already mounted; if not, mount it 38 | if [ -z "$(mount | awk '/'"$efiVolume"'/ {print $1}')" ]; then 39 | diskutil mount "$efiVolume" > /dev/null 40 | export EFI_MOUNT=$(diskutil info "$efiVolume" | grep 'Mount Point' | sed -e 's/ Mount Point: //g') 41 | echo "$EFI_MOUNT" 42 | else 43 | export EFI_MOUNT=$(diskutil info "$efiVolume" | grep 'Mount Point' | sed -e 's/ Mount Point: //g') 44 | echo "$EFI_MOUNT" 45 | fi 46 | } 47 | 48 | mount_efi 49 | -------------------------------------------------------------------------------- /out/.gitignore: -------------------------------------------------------------------------------- 1 | # Ignore everything 2 | * 3 | # Except this file 4 | !.gitignore 5 | -------------------------------------------------------------------------------- /src/board/ASUS/P8Z77-V-PRO-TB.asl: -------------------------------------------------------------------------------- 1 | /* Minimal DSDT for ASUS P8Z77-V PRO/THUNDERBOLT */ 2 | 3 | // User ACPI build configuration 4 | #include 5 | 6 | // Motherboard ACPI build configuration - do not edit! 7 | #define CONFIG_CHIPSET_INTEL_LAN_DEVICE \_SB.PCI0.GIGE 8 | #define CONFIG_CHIPSET_INTEL_XHC_DEVICE \_SB.PCI0.XHC1 9 | 10 | #define CONFIG_GRAPHICS_IGPU_SUPPORT 0x01 11 | #define CONFIG_GRAPHICS_PCIE_SUPPORT 0x02 12 | 13 | #define CONFIG_PCI_PEG0_SLOT_NAME "Slot-2" 14 | #define CONFIG_PCI_PEG1_SLOT_NAME "Slot-5" 15 | 16 | DefinitionBlock ("DSDT.aml", "DSDT", 0x03, "APPLE ", "iMac", 0x20180518) 17 | { 18 | #include 19 | #include 20 | 21 | Scope (_SB) 22 | { 23 | #include 24 | 25 | Device (PCI0) 26 | { 27 | #include 28 | 29 | Device (RP01) 30 | { 31 | #include 32 | #include 33 | } 34 | 35 | Device (RP02) 36 | { 37 | #include 38 | } 39 | 40 | Device (RP03) 41 | { 42 | #include 43 | Device (XHC2) 44 | { 45 | #include 46 | } 47 | } 48 | 49 | Device (RP04) 50 | { 51 | #include 52 | Device (SATA) 53 | { 54 | #include 55 | } 56 | } 57 | 58 | Device (RP05) 59 | { 60 | #include 61 | } 62 | 63 | Device (RP06) 64 | { 65 | #include 66 | } 67 | 68 | Device (RP07) 69 | { 70 | #include 71 | Device (ARPT) 72 | { 73 | #include 74 | } 75 | } 76 | 77 | Device (RP08) 78 | { 79 | #include 80 | } 81 | } 82 | 83 | #if CONFIG_ACPI_IMAC_DEVICES == 1 84 | #include 85 | #endif // CONFIG_ACPI_IMAC_DEVICES 86 | #include 87 | } 88 | 89 | Scope (_GPE) 90 | { 91 | #include 92 | 93 | Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE 94 | { 95 | Notify (\_SB.PCI0.RP03, 0x02) 96 | Notify (\_SB.PCI0.RP04, 0x02) 97 | Notify (\_SB.PCI0.RP07, 0x02) 98 | Notify (\_SB.PCI0.RP08, 0x02) 99 | Notify (\_SB.PCI0.PEG0, 0x02) // Optional PEG0 notification 100 | Notify (\_SB.PCI0.PEG1, 0x02) // Optional PEG1 notification 101 | } 102 | } 103 | 104 | #include 105 | } 106 | -------------------------------------------------------------------------------- /src/board/Gigabyte/GA-Z77M-D3H.asl: -------------------------------------------------------------------------------- 1 | /* Minimal DSDT for Gigabyte GA-Z77M-D3H */ 2 | 3 | // User ACPI build configuration 4 | #include 5 | 6 | // Motherboard ACPI build configuration - do not edit! 7 | #define CONFIG_CHIPSET_INTEL_XHC_DEVICE \_SB.PCI0.XHC1 8 | 9 | #define CONFIG_GRAPHICS_IGPU_SUPPORT 0x01 10 | #define CONFIG_GRAPHICS_PCIE_SUPPORT 0x02 11 | 12 | #define CONFIG_PCI_PEG0_SLOT_NAME "Slot-1" 13 | #define CONFIG_PCI_PEG1_SLOT_NAME "Slot-4" 14 | 15 | DefinitionBlock ("DSDT.aml", "DSDT", 0x03, "APPLE ", "iMac", 0x20180518) 16 | { 17 | #include 18 | #include 19 | 20 | Scope (_SB) 21 | { 22 | #include 23 | 24 | Device (PCI0) 25 | { 26 | #include 27 | 28 | Device (RP01) 29 | { 30 | #include 31 | } 32 | 33 | Device (RP02) 34 | { 35 | #include 36 | } 37 | 38 | Device (RP03) 39 | { 40 | #include 41 | } 42 | 43 | Device (RP04) 44 | { 45 | #include 46 | } 47 | 48 | Device (RP05) 49 | { 50 | #include 51 | Device (GIGE) 52 | { 53 | #include 54 | } 55 | } 56 | 57 | Device (RP06) 58 | { 59 | #include 60 | } 61 | 62 | Device (RP07) 63 | { 64 | #include 65 | } 66 | 67 | Device (RP08) 68 | { 69 | #include 70 | Device (SATA) 71 | { 72 | #include 73 | } 74 | } 75 | } 76 | 77 | #if CONFIG_ACPI_IMAC_DEVICES == 1 78 | #include 79 | #endif // CONFIG_ACPI_IMAC_DEVICES 80 | #include 81 | } 82 | 83 | Scope (_GPE) 84 | { 85 | #include 86 | 87 | Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE 88 | { 89 | Notify (\_SB.PCI0.RP05, 0x02) 90 | Notify (\_SB.PCI0.PEG0, 0x02) // Optional PEG0 notification 91 | Notify (\_SB.PCI0.PEG1, 0x02) // Optional PEG1 notification 92 | } 93 | } 94 | 95 | #include 96 | } 97 | -------------------------------------------------------------------------------- /src/board/Gigabyte/GA-Z77X-D3H.asl: -------------------------------------------------------------------------------- 1 | /* Minimal DSDT for Gigabyte GA-Z77X-D3H/UD3H */ 2 | 3 | // User ACPI build configuration 4 | #include 5 | 6 | // Motherboard ACPI build configuration - do not edit! 7 | #define CONFIG_CHIPSET_INTEL_XHC_DEVICE \_SB.PCI0.XHC1 8 | 9 | #define CONFIG_GRAPHICS_IGPU_SUPPORT 0x01 10 | #define CONFIG_GRAPHICS_PCIE_SUPPORT 0x02 11 | 12 | #define CONFIG_PCI_PEG0_SLOT_NAME "Slot-2" 13 | #define CONFIG_PCI_PEG1_SLOT_NAME "Slot-5" 14 | 15 | DefinitionBlock ("DSDT.aml", "DSDT", 0x03, "APPLE ", "iMac", 0x20180518) 16 | { 17 | #include 18 | #include 19 | 20 | Scope (_SB) 21 | { 22 | #include 23 | 24 | Device (PCI0) 25 | { 26 | #include 27 | 28 | Device (RP01) 29 | { 30 | #include 31 | } 32 | 33 | Device (RP02) 34 | { 35 | #include 36 | } 37 | 38 | Device (RP03) 39 | { 40 | #include 41 | } 42 | 43 | Device (RP04) 44 | { 45 | #include 46 | } 47 | 48 | Device (RP05) 49 | { 50 | #include 51 | Device (XHC2) 52 | { 53 | #include 54 | } 55 | } 56 | 57 | Device (RP06) 58 | { 59 | #include 60 | } 61 | 62 | Device (RP07) 63 | { 64 | #include 65 | Device (GIGE) 66 | { 67 | #include 68 | } 69 | } 70 | 71 | Device (RP08) 72 | { 73 | #include 74 | Device (SATA) 75 | { 76 | #include 77 | } 78 | } 79 | } 80 | 81 | #if CONFIG_ACPI_IMAC_DEVICES == 1 82 | #include 83 | #endif // CONFIG_ACPI_IMAC_DEVICES 84 | #include 85 | } 86 | 87 | Scope (_GPE) 88 | { 89 | #include 90 | 91 | Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE 92 | { 93 | Notify (\_SB.PCI0.RP05, 0x02) 94 | Notify (\_SB.PCI0.RP07, 0x02) 95 | Notify (\_SB.PCI0.RP08, 0x02) 96 | Notify (\_SB.PCI0.PEG0, 0x02) // Optional PEG0 notification 97 | Notify (\_SB.PCI0.PEG1, 0x02) // Optional PEG1 notification 98 | } 99 | } 100 | 101 | #include 102 | } 103 | -------------------------------------------------------------------------------- /src/board/Gigabyte/GA-Z77X-UD3H.asl: -------------------------------------------------------------------------------- 1 | GA-Z77X-D3H.asl -------------------------------------------------------------------------------- /src/board/Gigabyte/GA-Z77X-UD4H.asl: -------------------------------------------------------------------------------- 1 | /* Minimal DSDT for Gigabyte GA-Z77X-UD4H */ 2 | 3 | // User ACPI build configuration 4 | #include 5 | 6 | // Motherboard ACPI build configuration - do not edit! 7 | #define CONFIG_CHIPSET_INTEL_XHC_DEVICE \_SB.PCI0.XHC1 8 | 9 | #define CONFIG_GRAPHICS_IGPU_SUPPORT 0x01 10 | #define CONFIG_GRAPHICS_PCIE_SUPPORT 0x02 11 | 12 | #define CONFIG_PCI_PEG0_SLOT_NAME "Slot-2" 13 | #define CONFIG_PCI_PEG1_SLOT_NAME "Slot-5" 14 | 15 | DefinitionBlock ("DSDT.aml", "DSDT", 0x03, "APPLE ", "iMac", 0x20180518) 16 | { 17 | #include 18 | #include 19 | 20 | Scope (_SB) 21 | { 22 | #include 23 | 24 | Device (PCI0) 25 | { 26 | #include 27 | 28 | Device (RP01) 29 | { 30 | #include 31 | } 32 | 33 | Device (RP02) 34 | { 35 | #include 36 | } 37 | 38 | Device (RP03) 39 | { 40 | #include 41 | } 42 | 43 | Device (RP04) 44 | { 45 | #include 46 | } 47 | 48 | Device (RP05) 49 | { 50 | #include 51 | Device (XHC2) 52 | { 53 | #include 54 | } 55 | } 56 | 57 | Device (RP06) 58 | { 59 | #include 60 | } 61 | 62 | Device (RP07) 63 | { 64 | #include 65 | Device (GIGE) 66 | { 67 | #include 68 | } 69 | } 70 | 71 | Device (RP08) 72 | { 73 | #include 74 | Device (SATA) 75 | { 76 | #include 77 | } 78 | } 79 | } 80 | 81 | #if CONFIG_ACPI_IMAC_DEVICES == 1 82 | #include 83 | #endif // CONFIG_ACPI_IMAC_DEVICES 84 | #include 85 | } 86 | 87 | Scope (_GPE) 88 | { 89 | #include 90 | 91 | Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE 92 | { 93 | Notify (\_SB.PCI0.RP05, 0x02) 94 | Notify (\_SB.PCI0.RP07, 0x02) 95 | Notify (\_SB.PCI0.RP08, 0x02) 96 | Notify (\_SB.PCI0.PEG0, 0x02) // Optional PEG0 notification 97 | Notify (\_SB.PCI0.PEG1, 0x02) // Optional PEG1 notification 98 | } 99 | } 100 | 101 | #include 102 | } 103 | -------------------------------------------------------------------------------- /src/board/Gigabyte/GA-Z77X-UD5H.asl: -------------------------------------------------------------------------------- 1 | /* Minimal DSDT for Gigabyte GA-Z77X-UD5H */ 2 | 3 | // User ACPI build configuration 4 | #include 5 | 6 | // Motherboard ACPI build configuration - do not edit! 7 | #define CONFIG_CHIPSET_INTEL_LAN_DEVICE \_SB.PCI0.ETH1 8 | #define CONFIG_CHIPSET_INTEL_LAN_DSM_LOCATION "2" 9 | #define CONFIG_CHIPSET_INTEL_XHC_DEVICE \_SB.PCI0.XHC1 10 | 11 | #define CONFIG_GRAPHICS_IGPU_SUPPORT 0x01 12 | #define CONFIG_GRAPHICS_PCIE_SUPPORT 0x02 13 | 14 | #define CONFIG_PCI_FIREWIRE_ADDRESS 0x06010000 15 | #define CONFIG_PCI_FIREWIRE_DEVICE \_SB.PCI0.RP06.FWBR.FRWR 16 | #define CONFIG_PCI_FIREWIRE_PORTS 0x02 17 | #define CONFIG_PCI_PEG0_SLOT_NAME "Slot-2" 18 | #define CONFIG_PCI_PEG1_SLOT_NAME "Slot-5" 19 | 20 | DefinitionBlock ("DSDT.aml", "DSDT", 0x03, "APPLE ", "iMac", 0x20180518) 21 | { 22 | #include 23 | #include 24 | 25 | Scope (_SB) 26 | { 27 | #include 28 | 29 | Device (PCI0) 30 | { 31 | #include 32 | 33 | Device (RP01) 34 | { 35 | #include 36 | } 37 | 38 | Device (RP02) 39 | { 40 | #include 41 | Device (SATA) 42 | { 43 | #include 44 | } 45 | } 46 | 47 | Device (RP03) 48 | { 49 | #include 50 | } 51 | 52 | Device (RP04) 53 | { 54 | #include 55 | } 56 | 57 | Device (RP05) 58 | { 59 | #include 60 | Device (ARPT) 61 | { 62 | #include 63 | } 64 | } 65 | 66 | Device (RP06) 67 | { 68 | #include 69 | #include 70 | } 71 | 72 | Device (RP07) 73 | { 74 | #include 75 | Device (ETH0) 76 | { 77 | #include 78 | #if CONFIG_ACPI_DSM_INJECTION == 1 79 | Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method 80 | { 81 | If (!Arg2) 82 | { 83 | Return (Buffer (One) { 0x03 }) 84 | } 85 | 86 | Return (Package (0x02) 87 | { 88 | "location", 89 | Buffer (0x02) { "1" } 90 | }) 91 | } 92 | #endif // CONFIG_ACPI_DSM_INJECTION 93 | } 94 | } 95 | 96 | Device (RP08) 97 | { 98 | #include 99 | Device (SATA) 100 | { 101 | #include 102 | } 103 | } 104 | } 105 | 106 | #if CONFIG_ACPI_IMAC_DEVICES == 1 107 | #include 108 | #endif // CONFIG_ACPI_IMAC_DEVICES 109 | #include 110 | } 111 | 112 | Scope (_GPE) 113 | { 114 | #include 115 | 116 | Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE 117 | { 118 | Notify (\_SB.PCI0.RP02, 0x02) 119 | Notify (\_SB.PCI0.RP05, 0x02) 120 | Notify (\_SB.PCI0.RP06, 0x02) 121 | Notify (\_SB.PCI0.RP07, 0x02) 122 | Notify (\_SB.PCI0.RP08, 0x02) 123 | Notify (\_SB.PCI0.PEG0, 0x02) // Optional PEG0 notification 124 | Notify (\_SB.PCI0.PEG1, 0x02) // Optional PEG1 notification 125 | } 126 | 127 | Method (_L1A, 0, NotSerialized) // _Lxx: Level-Triggered GPE 128 | { 129 | Notify (CONFIG_PCI_FIREWIRE_DEVICE, 0x02) 130 | } 131 | } 132 | 133 | #include 134 | } 135 | -------------------------------------------------------------------------------- /src/board/Gigabyte/GA-Z77X-UP4-TH.asl: -------------------------------------------------------------------------------- 1 | /* Minimal DSDT for Gigabyte GA-Z77X-UP4 TH */ 2 | 3 | // User ACPI build configuration 4 | #include 5 | 6 | // Motherboard ACPI build configuration - do not edit! 7 | #define CONFIG_CHIPSET_INTEL_XHC_DEVICE \_SB.PCI0.XHC1 8 | 9 | #define CONFIG_GRAPHICS_IGPU_SUPPORT 0x01 10 | #define CONFIG_GRAPHICS_PCIE_SUPPORT 0x02 11 | 12 | #define CONFIG_PCI_PEG0_SLOT_NAME "Slot-2" 13 | #define CONFIG_PCI_PEG1_SLOT_NAME "Slot-5" 14 | 15 | DefinitionBlock ("DSDT.aml", "DSDT", 0x03, "APPLE ", "iMac", 0x20180518) 16 | { 17 | #include 18 | #include 19 | 20 | Scope (_SB) 21 | { 22 | #include 23 | 24 | Device (PCI0) 25 | { 26 | #include 27 | 28 | Device (RP01) 29 | { 30 | #include 31 | #include 32 | } 33 | 34 | Device (RP02) 35 | { 36 | #include 37 | } 38 | 39 | Device (RP03) 40 | { 41 | #include 42 | } 43 | 44 | Device (RP04) 45 | { 46 | #include 47 | } 48 | 49 | Device (RP05) 50 | { 51 | #include 52 | Device (XHC2) 53 | { 54 | #include 55 | } 56 | } 57 | 58 | Device (RP06) 59 | { 60 | #include 61 | } 62 | 63 | Device (RP07) 64 | { 65 | #include 66 | Device (GIGE) 67 | { 68 | #include 69 | } 70 | } 71 | 72 | Device (RP08) 73 | { 74 | #include 75 | } 76 | } 77 | 78 | #if CONFIG_ACPI_IMAC_DEVICES == 1 79 | #include 80 | #endif // CONFIG_ACPI_IMAC_DEVICES 81 | #include 82 | } 83 | 84 | Scope (_GPE) 85 | { 86 | #include 87 | 88 | Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE 89 | { 90 | Notify (\_SB.PCI0.RP05, 0x02) 91 | Notify (\_SB.PCI0.RP07, 0x02) 92 | Notify (\_SB.PCI0.PEG0, 0x02) // Optional PEG0 notification 93 | Notify (\_SB.PCI0.PEG1, 0x02) // Optional PEG1 notification 94 | } 95 | } 96 | 97 | #include 98 | } 99 | -------------------------------------------------------------------------------- /src/board/Gigabyte/GA-Z77X-UP5-TH.asl: -------------------------------------------------------------------------------- 1 | /* Minimal DSDT for Gigabyte GA-Z77X-UP5 TH */ 2 | 3 | // User ACPI build configuration 4 | #include 5 | 6 | // Motherboard ACPI build configuration - do not edit! 7 | #define CONFIG_CHIPSET_INTEL_LAN_DEVICE \_SB.PCI0.GIGE 8 | #define CONFIG_CHIPSET_INTEL_XHC_DEVICE \_SB.PCI0.XHC1 9 | 10 | #define CONFIG_GRAPHICS_IGPU_SUPPORT 0x01 11 | #define CONFIG_GRAPHICS_PCIE_SUPPORT 0x02 12 | 13 | #define CONFIG_PCI_FIREWIRE_ADDRESS 0x69010000 14 | #define CONFIG_PCI_FIREWIRE_DEVICE \_SB.PCI0.RP06.FWBR.FRWR 15 | #define CONFIG_PCI_FIREWIRE_PORTS 0x01 16 | #define CONFIG_PCI_PEG0_SLOT_NAME "Slot-2" 17 | #define CONFIG_PCI_PEG1_SLOT_NAME "Slot-5" 18 | 19 | DefinitionBlock ("DSDT.aml", "DSDT", 0x03, "APPLE ", "iMac", 0x20180518) 20 | { 21 | #include 22 | #include 23 | 24 | Scope (_SB) 25 | { 26 | #include 27 | 28 | Device (PCI0) 29 | { 30 | #include 31 | 32 | Device (RP01) 33 | { 34 | #include 35 | #include 36 | } 37 | 38 | Device (RP02) 39 | { 40 | #include 41 | } 42 | 43 | Device (RP03) 44 | { 45 | #include 46 | } 47 | 48 | Device (RP04) 49 | { 50 | #include 51 | } 52 | 53 | Device (RP05) 54 | { 55 | #include 56 | } 57 | 58 | Device (RP06) 59 | { 60 | #include 61 | #include 62 | } 63 | 64 | Device (RP07) 65 | { 66 | #include 67 | } 68 | 69 | Device (RP08) 70 | { 71 | #include 72 | Device (SATA) 73 | { 74 | #include 75 | } 76 | } 77 | } 78 | 79 | #if CONFIG_ACPI_IMAC_DEVICES == 1 80 | #include 81 | #endif // CONFIG_ACPI_IMAC_DEVICES 82 | #include 83 | } 84 | 85 | Scope (_GPE) 86 | { 87 | #include 88 | 89 | Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE 90 | { 91 | Notify (\_SB.PCI0.RP06, 0x02) 92 | Notify (\_SB.PCI0.RP08, 0x02) 93 | Notify (\_SB.PCI0.PEG0, 0x02) // Optional PEG0 notification 94 | Notify (\_SB.PCI0.PEG1, 0x02) // Optional PEG1 notification 95 | } 96 | 97 | Method (_L1A, 0, NotSerialized) // _Lxx: Level-Triggered GPE 98 | { 99 | Notify (CONFIG_PCI_FIREWIRE_DEVICE, 0x02) 100 | } 101 | } 102 | 103 | #include 104 | } 105 | -------------------------------------------------------------------------------- /src/common/pci/firewire.asl: -------------------------------------------------------------------------------- 1 | Device (FWBR) 2 | { 3 | Name (_ADR, Zero) // _ADR: Address 4 | Alias (PW94, _PRW) // _PRW: Power Resources for Wake 5 | Device (FRWR) 6 | { 7 | Name (_ADR, CONFIG_PCI_FIREWIRE_ADDRESS) // _ADR: Address 8 | Name (_GPE, 0x1A) // _GPE: General Purpose Events 9 | #if CONFIG_ACPI_DSM_INJECTION == 1 10 | Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method 11 | { 12 | If (!Arg2) 13 | { 14 | Return (Buffer (One) { 0x03 }) 15 | } 16 | 17 | Return (Package (0x04) 18 | { 19 | "fwports", 20 | Buffer (0x04) { CONFIG_PCI_FIREWIRE_PORTS, Zero, Zero, Zero }, 21 | "fws0", 22 | Buffer (0x04) { One, Zero, Zero, Zero } 23 | }) 24 | } 25 | #endif // CONFIG_ACPI_DSM_INJECTION 26 | } 27 | } 28 | -------------------------------------------------------------------------------- /src/common/pwrb.asl: -------------------------------------------------------------------------------- 1 | Device (PWRB) 2 | { 3 | Name (_HID, EisaId ("PNP0C0C")) // _HID: Hardware ID 4 | } 5 | 6 | Device (SLPB) 7 | { 8 | Name (_HID, EisaId ("PNP0C0E")) // _HID: Hardware ID 9 | Name (_STA, 0x0B) // _STA: Status 10 | } 11 | -------------------------------------------------------------------------------- /src/common/sleep.asl: -------------------------------------------------------------------------------- 1 | Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model 2 | { 3 | GPIC = Arg0 4 | } 5 | 6 | Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep 7 | { 8 | // Reboot after shutdown fix 9 | If (Arg0 && Arg0 != 0x05) 10 | { 11 | \_SB.PCI0.LPCB.SPTS () 12 | } 13 | } 14 | 15 | Method (_WAK, 1, Serialized) // _WAK: Wake 16 | { 17 | \_SB.PCI0.LPCB.SWAK () 18 | Return (Package (0x02) { Zero, Zero }) 19 | } 20 | 21 | Name (_S0, Package (0x04) { Zero, Zero, Zero, Zero }) 22 | Name (_S3, Package (0x04) { 0x05, Zero, Zero, Zero }) 23 | Name (_S4, Package (0x04) { 0x06, Zero, Zero, Zero }) 24 | Name (_S5, Package (0x04) { 0x07, Zero, Zero, Zero }) 25 | -------------------------------------------------------------------------------- /src/panther_point/cpu.asl: -------------------------------------------------------------------------------- 1 | Scope (_PR) 2 | { 3 | Processor (CPU0, 0x01, 0x00000410, 0x06) 4 | { 5 | // CONFIG_ACPI_CPU_PM is disabled by default for Panther Point 6 | #if CONFIG_ACPI_CPU_PM == 1 7 | // This _DSM method is not optional if CONFIG_ACPI_CPU_PM is enabled 8 | Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method 9 | { 10 | If (!Arg2) 11 | { 12 | Return (Buffer (One) { 0x03 }) 13 | } 14 | 15 | Return (Package (0x02) 16 | { 17 | "plugin-type", One 18 | }) 19 | } 20 | #endif // CONFIG_ACPI_CPU_PM 21 | } 22 | 23 | Processor (CPU1, 0x02, 0x00000410, 0x06) {} 24 | 25 | #if CONFIG_ACPI_CPUS > 2 26 | Processor (CPU2, 0x03, 0x00000410, 0x06) {} 27 | Processor (CPU3, 0x04, 0x00000410, 0x06) {} 28 | 29 | #if CONFIG_ACPI_CPUS > 4 30 | Processor (CPU4, 0x05, 0x00001810, 0x06) {} 31 | Processor (CPU5, 0x06, 0x00001810, 0x06) {} 32 | Processor (CPU6, 0x07, 0x00001810, 0x06) {} 33 | Processor (CPU7, 0x08, 0x00001810, 0x06) {} 34 | #endif // CONFIG_ACPI_CPUS 35 | #endif // CONFIG_ACPI_CPUS 36 | } 37 | -------------------------------------------------------------------------------- /src/panther_point/gpe.asl: -------------------------------------------------------------------------------- 1 | Method (_L02, 0, NotSerialized) // _Lxx: Level-Triggered GPE 2 | { 3 | GPEC = Zero 4 | } 5 | 6 | Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE 7 | { 8 | Notify (\_SB.PCI0.EHC1, 0x02) 9 | Notify (\_SB.PCI0.EHC2, 0x02) 10 | #ifdef CONFIG_CHIPSET_INTEL_XHC_DEVICE 11 | Notify (CONFIG_CHIPSET_INTEL_XHC_DEVICE, 0x02) 12 | #endif // CONFIG_CHIPSET_INTEL_XHC_DEVICE 13 | Notify (\_SB.PCI0.HDEF, 0x02) 14 | #ifdef CONFIG_CHIPSET_INTEL_LAN_DEVICE 15 | Notify (CONFIG_CHIPSET_INTEL_LAN_DEVICE, 0x02) 16 | #endif // CONFIG_CHIPSET_INTEL_LAN_DEVICE 17 | } 18 | 19 | Method (_L1D, 0, NotSerialized) // _Lxx: Level-Triggered GPE 20 | { 21 | Notify (\_SB.PWRB, 0x02) 22 | } 23 | -------------------------------------------------------------------------------- /src/panther_point/lpcb.asl: -------------------------------------------------------------------------------- 1 | Device (LPCB) 2 | { 3 | Name (_ADR, 0x001F0000) // _ADR: Address 4 | OperationRegion (SMIE, SystemIO, PMBS, 0x04) 5 | Field (SMIE, ByteAcc, NoLock, Preserve) 6 | { 7 | , 10, 8 | RTCS, 1 9 | } 10 | 11 | OperationRegion (SLPR, SystemIO, SMCR, 0x08) 12 | Field (SLPR, ByteAcc, NoLock, Preserve) 13 | { 14 | , 4, 15 | SLPE, 1, 16 | , 31, 17 | SLPX, 1 18 | } 19 | 20 | Method (SPTS, 0, NotSerialized) 21 | { 22 | SLPX = One 23 | SLPE = One 24 | } 25 | 26 | Method (SWAK, 0, NotSerialized) 27 | { 28 | SLPE = Zero 29 | If (!RTCS) 30 | { 31 | Notify (PWRB, 0x02) 32 | } 33 | } 34 | 35 | #if CONFIG_ACPI_IMAC_DEVICES == 1 36 | Device (ALS0) 37 | { 38 | Name (_CID, "smc-als") // _CID: Compatible ID 39 | Name (_HID, "ACPI0008") // _HID: Hardware ID 40 | Name (_STA, 0x0F) // _STA: Status 41 | } 42 | #endif // CONFIG_ACPI_IMAC_DEVICES 43 | 44 | Device (DMAC) 45 | { 46 | Name (_HID, EisaId ("PNP0200")) // _HID: Hardware ID 47 | Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings 48 | { 49 | IO (Decode16, 0x0000, 0x0000, 0x01, 0x20, ) 50 | IO (Decode16, 0x0081, 0x0081, 0x01, 0x11, ) 51 | IO (Decode16, 0x0093, 0x0093, 0x01, 0x0D, ) 52 | IO (Decode16, 0x00C0, 0x00C0, 0x01, 0x20, ) 53 | DMA (Compatibility, NotBusMaster, Transfer8_16, ) 54 | {4} 55 | }) 56 | } 57 | 58 | Device (EC) 59 | { 60 | Name (_HID, EisaId ("PNP0C09")) // _HID: Hardware ID 61 | Name (_UID, Zero) // _UID: Unique ID 62 | Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings 63 | { 64 | IO (Decode16, 0x0062, 0x0062, 0x00, 0x01, ) 65 | IO (Decode16, 0x0066, 0x0066, 0x00, 0x01, ) 66 | }) 67 | 68 | Name (_GPE, 0x17) // _GPE: General Purpose Events 69 | } 70 | 71 | Device (FWHD) 72 | { 73 | Name (_HID, EisaId ("INT0800")) // _HID: Hardware ID 74 | Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings 75 | { 76 | Memory32Fixed (ReadOnly, 0xFF000000, 0x01000000, ) 77 | }) 78 | } 79 | 80 | Device (HPET) 81 | { 82 | Name (_HID, EisaId ("PNP0103")) // _HID: Hardware ID 83 | Name (_UID, Zero) // _UID: Unique ID 84 | Name (_STA, 0x0F) 85 | Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings 86 | { 87 | Memory32Fixed (ReadWrite, 0xFED00000, 0x00000400 ) 88 | IRQNoFlags () 89 | {0} 90 | IRQNoFlags () 91 | {8} 92 | }) 93 | } 94 | 95 | Device (IPIC) 96 | { 97 | Name (_HID, EisaId ("PNP0000")) // _HID: Hardware ID 98 | Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings 99 | { 100 | IO (Decode16, 0x0020, 0x0020, 0x01, 0x02, ) 101 | IO (Decode16, 0x0024, 0x0024, 0x01, 0x02, ) 102 | IO (Decode16, 0x0028, 0x0028, 0x01, 0x02, ) 103 | IO (Decode16, 0x002C, 0x002C, 0x01, 0x02, ) 104 | IO (Decode16, 0x0030, 0x0030, 0x01, 0x02, ) 105 | IO (Decode16, 0x0034, 0x0034, 0x01, 0x02, ) 106 | IO (Decode16, 0x0038, 0x0038, 0x01, 0x02, ) 107 | IO (Decode16, 0x003C, 0x003C, 0x01, 0x02, ) 108 | IO (Decode16, 0x00A0, 0x00A0, 0x01, 0x02, ) 109 | IO (Decode16, 0x00A4, 0x00A4, 0x01, 0x02, ) 110 | IO (Decode16, 0x00A8, 0x00A8, 0x01, 0x02, ) 111 | IO (Decode16, 0x00AC, 0x00AC, 0x01, 0x02, ) 112 | IO (Decode16, 0x00B0, 0x00B0, 0x01, 0x02, ) 113 | IO (Decode16, 0x00B4, 0x00B4, 0x01, 0x02, ) 114 | IO (Decode16, 0x00B8, 0x00B8, 0x01, 0x02, ) 115 | IO (Decode16, 0x00BC, 0x00BC, 0x01, 0x02, ) 116 | IO (Decode16, 0x04D0, 0x04D0, 0x01, 0x02, ) 117 | IRQNoFlags () 118 | {2} 119 | }) 120 | } 121 | 122 | Device (MATH) 123 | { 124 | Name (_HID, EisaId ("PNP0C04")) // _HID: Hardware ID 125 | Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings 126 | { 127 | IO (Decode16, 0x00F0, 0x00F0, 0x01, 0x01, ) 128 | IRQNoFlags () 129 | {13} 130 | }) 131 | } 132 | 133 | Device (LDRC) 134 | { 135 | Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID 136 | Name (_UID, 0x02) // _UID: Unique ID 137 | Name (_CRS, ResourceTemplate () 138 | { 139 | IO (Decode16, 0x002E, 0x002E, 0x01, 0x02, ) 140 | IO (Decode16, 0x004E, 0x004E, 0x01, 0x02, ) 141 | IO (Decode16, 0x0061, 0x0061, 0x01, 0x01, ) 142 | IO (Decode16, 0x0063, 0x0063, 0x01, 0x01, ) 143 | IO (Decode16, 0x0065, 0x0065, 0x01, 0x01, ) 144 | IO (Decode16, 0x0067, 0x0067, 0x01, 0x01, ) 145 | IO (Decode16, 0x0070, 0x0070, 0x01, 0x01, ) 146 | IO (Decode16, 0x0080, 0x0080, 0x01, 0x01, ) 147 | IO (Decode16, 0x0092, 0x0092, 0x01, 0x01, ) 148 | IO (Decode16, 0x00B2, 0x00B2, 0x01, 0x02, ) 149 | IO (Decode16, 0x0680, 0x0680, 0x01, 0x20, ) 150 | IO (Decode16, 0xFFFF, 0xFFFF, 0x01, 0x01, ) 151 | IO (Decode16, 0xFFFF, 0xFFFF, 0x01, 0x01, ) 152 | IO (Decode16, 0xFFFF, 0xFFFF, 0x01, 0x01, ) 153 | IO (Decode16, 0x1C00, 0x1C00, 0x01, 0xFF, ) // Name (GPBS, 0x1C00) 154 | IO (Decode16, 0x1D00, 0x1D00, 0x01, 0xFF, ) // GPBS + 0x100 = 0x1D00 155 | IO (Decode16, 0x1E00, 0x1E00, 0x01, 0xFF, ) // GPBS + 0x200 = 0x1E00 156 | IO (Decode16, 0x1F00, 0x1F00, 0x01, 0xFF, ) // GPBS + 0x300 = 0x1F00 157 | IO (Decode16, 0x1800, 0x1800, 0x01, 0xFF, ) 158 | IO (Decode16, 0x164E, 0x164E, 0x01, 0x02, ) 159 | }) 160 | } 161 | 162 | Device (RTC) 163 | { 164 | Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID 165 | Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings 166 | { 167 | IO (Decode16, 0x0070, 0x0070, 0x01, 0x08, ) 168 | IRQNoFlags () 169 | {8} 170 | }) 171 | } 172 | 173 | Device (TIMR) 174 | { 175 | Name (_HID, EisaId ("PNP0100")) // _HID: Hardware ID 176 | Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings 177 | { 178 | IO (Decode16, 0x0040, 0x0040, 0x01, 0x04, ) 179 | IO (Decode16, 0x0050, 0x0050, 0x10, 0x04, ) 180 | IRQNoFlags () 181 | {0} 182 | }) 183 | } 184 | } 185 | -------------------------------------------------------------------------------- /src/panther_point/mem2.asl: -------------------------------------------------------------------------------- 1 | Device (MEM2) // Optionally, required when the IGPU is enabled in the BIOS 2 | { 3 | Name (_HID, EisaId ("PNP0C01")) 4 | Name (_UID, 0x02) 5 | Name (_STA, 0x0F) 6 | Name (_CRS, ResourceTemplate () 7 | { 8 | Memory32Fixed (ReadWrite, 0x20000000, 0x00200000, ) 9 | Memory32Fixed (ReadWrite, 0x40000000, 0x00200000, ) 10 | }) 11 | } 12 | -------------------------------------------------------------------------------- /src/panther_point/operation_regions.asl: -------------------------------------------------------------------------------- 1 | Name (PMBS, 0x0400) 2 | Name (SMCR, 0x0430) 3 | 4 | OperationRegion (GNVS, SystemMemory, CONFIG_ACPI_GNVS_ADDRESS, 0x7D) 5 | Field (GNVS, AnyAcc, Lock, Preserve) 6 | { 7 | Offset (0x7B), 8 | ECON, 8, // Embedded Controller Availability Flag. 9 | GPIC, 8 // Global IOAPIC/8259 Interrupt Mode Flag. 10 | } 11 | 12 | OperationRegion (PMIO, SystemIO, PMBS, 0x80) 13 | Field (PMIO, ByteAcc, NoLock, Preserve) 14 | { 15 | Offset (0x42), 16 | , 1, 17 | GPEC, 1 18 | } 19 | 20 | -------------------------------------------------------------------------------- /src/panther_point/pci/chipset.asl: -------------------------------------------------------------------------------- 1 | Name (_ADR, Zero) // _ADR: Address 2 | Name (_UID, Zero) // _UID: Unique ID 3 | Name (_BBN, Zero) // _BBN: BIOS Bus Number 4 | Name (_CID, EisaId ("PNP0A03")) // _CID: Compatible ID 5 | Name (_HID, EisaId ("PNP0A08")) // _HID: Hardware ID 6 | Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings 7 | { 8 | IO (Decode16, 0x0CF8, 0x0CF8, 0x01, 0x08, ) 9 | WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, 0x0000, 0x003E, 0x0000, 0x003F,,, ) 10 | DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, 0x00000000, 0x00000CF7, 0x00000000, 0x00000CF8,,,, TypeStatic) 11 | DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, 0x00000D00, 0x0000FFFF, 0x00000000, 0x0000F300,,,, TypeStatic) 12 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, 0x000A0000, 0x000BFFFF, 0x00000000, 0x00020000,,,, AddressRangeMemory, TypeStatic) 13 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadOnly, 0x00000000, 0x000C0000, 0x000C3FFF, 0x00000000, 0x00004000,,,, AddressRangeMemory, TypeStatic) 14 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadOnly, 0x00000000, 0x000C4000, 0x000C7FFF, 0x00000000, 0x00004000,,,, AddressRangeMemory, TypeStatic) 15 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadOnly, 0x00000000, 0x000C8000, 0x000CBFFF, 0x00000000, 0x00004000,,,, AddressRangeMemory, TypeStatic) 16 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadOnly, 0x00000000, 0x000CC000, 0x000CFFFF, 0x00000000, 0x00004000,,,, AddressRangeMemory, TypeStatic) 17 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, 0x000D0000, 0x000D3FFF, 0x00000000, 0x00004000,,,, AddressRangeMemory, TypeStatic) 18 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, 0x000D4000, 0x000D7FFF, 0x00000000, 0x00004000,,,, AddressRangeMemory, TypeStatic) 19 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, 0x000D8000, 0x000DBFFF, 0x00000000, 0x00004000,,,, AddressRangeMemory, TypeStatic) 20 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, 0x000DC000, 0x000DFFFF, 0x00000000, 0x00004000,,,, AddressRangeMemory, TypeStatic) 21 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, 0x000E0000, 0x000E3FFF, 0x00000000, 0x00004000,,,, AddressRangeMemory, TypeStatic) 22 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, 0x000E4000, 0x000E7FFF, 0x00000000, 0x00004000,,,, AddressRangeMemory, TypeStatic) 23 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadOnly, 0x00000000, 0x000E8000, 0x000EBFFF, 0x00000000, 0x00004000,,,, AddressRangeMemory, TypeStatic) 24 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadOnly, 0x00000000, 0x000EC000, 0x000EFFFF, 0x00000000, 0x00004000,,,, AddressRangeMemory, TypeStatic) 25 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadOnly, 0x00000000, 0x000F0000, 0x000FFFFF, 0x00000000, 0x00010000,,,, AddressRangeMemory, TypeStatic) 26 | DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, 0xBFA00000, 0xFEAFFFFF, 0x00000000, 0x3F100000,,,, AddressRangeMemory, TypeStatic) 27 | }) 28 | 29 | Name (_PRT, Package () // _PRT: PCI Routing Table (AR00) 30 | { 31 | Package (0x04) { 0x001FFFFF, Zero, Zero, 0x15 }, 32 | Package (0x04) { 0x001FFFFF, One, Zero, 0x13 }, 33 | Package (0x04) { 0x001FFFFF, 0x02, Zero, 0x12 }, 34 | Package (0x04) { 0x001FFFFF, 0x03, Zero, 0x10 }, 35 | Package (0x04) { 0x0014FFFF, Zero, Zero, 0x10 }, // XHC1 36 | Package (0x04) { 0x001DFFFF, Zero, Zero, 0x17 }, // EHC1 37 | Package (0x04) { 0x001DFFFF, One, Zero, 0x13 }, // EHC1 38 | Package (0x04) { 0x001DFFFF, 0x02, Zero, 0x10 }, // EHC1 39 | Package (0x04) { 0x001DFFFF, 0x03, Zero, 0x12 }, // EHC1 40 | Package (0x04) { 0x001AFFFF, Zero, Zero, 0x10 }, // EHC2 41 | Package (0x04) { 0x001AFFFF, One, Zero, 0x15 }, // EHC2 42 | Package (0x04) { 0x001AFFFF, 0x02, Zero, 0x12 }, // EHC2 43 | Package (0x04) { 0x001AFFFF, 0x03, Zero, 0x13 }, // EHC2 44 | Package (0x04) { 0x001BFFFF, Zero, Zero, 0x16 }, // HDEF 45 | Package (0x04) { 0x0016FFFF, Zero, Zero, 0x10 }, 46 | Package (0x04) { 0x0016FFFF, One, Zero, 0x13 }, 47 | Package (0x04) { 0x0016FFFF, 0x02, Zero, 0x12 }, 48 | Package (0x04) { 0x0016FFFF, 0x03, Zero, 0x11 }, 49 | Package (0x04) { 0x001CFFFF, Zero, Zero, 0x10 }, // RP0n 50 | Package (0x04) { 0x001CFFFF, One, Zero, 0x11 }, // RP0n 51 | Package (0x04) { 0x001CFFFF, 0x02, Zero, 0x12 }, // RP0n 52 | Package (0x04) { 0x001CFFFF, 0x03, Zero, 0x13 }, // RP0n 53 | #if CONFIG_GRAPHICS_PCIE_SUPPORT > 0 54 | Package (0x04) { 0x0001FFFF, Zero, Zero, 0x10 }, // PEGn 55 | Package (0x04) { 0x0001FFFF, One, Zero, 0x11 }, // PEGn 56 | Package (0x04) { 0x0001FFFF, 0x02, Zero, 0x12 }, // PEGn 57 | Package (0x04) { 0x0001FFFF, 0x03, Zero, 0x13 }, // PEGn 58 | #endif // CONFIG_GRAPHICS_PCIE_SUPPORT 59 | Package (0x04) { 0x0006FFFF, Zero, Zero, 0x13 }, 60 | Package (0x04) { 0x0006FFFF, One, Zero, 0x10 }, 61 | Package (0x04) { 0x0006FFFF, 0x02, Zero, 0x11 }, 62 | Package (0x04) { 0x0006FFFF, 0x03, Zero, 0x12 }, 63 | #if CONFIG_GRAPHICS_IGPU_SUPPORT == 1 64 | Package (0x04) { 0x0002FFFF, Zero, Zero, 0x10 }, // IGPU 65 | #endif // CONFIG_GRAPHICS_IGPU_SUPPORT 66 | Package (0x04) { 0x0004FFFF, Zero, Zero, 0x10 }, 67 | Package (0x04) { 0x0004FFFF, One, Zero, 0x11 }, 68 | Package (0x04) { 0x0004FFFF, 0x02, Zero, 0x12 }, 69 | Package (0x04) { 0x0004FFFF, 0x03, Zero, 0x13 }, 70 | #ifdef CONFIG_CHIPSET_INTEL_LAN_DEVICE 71 | Package (0x04) { 0x0019FFFF, Zero, Zero, 0x14 } // GIGE 72 | #endif // CONFIG_CHIPSET_INTEL_LAN_DEVICE 73 | }) 74 | 75 | Device (PDRC) 76 | { 77 | Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID 78 | Name (_UID, One) // _UID: Unique ID 79 | Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings 80 | { 81 | Memory32Fixed (ReadWrite, 0x00000000, 0x00004000, ) 82 | Memory32Fixed (ReadWrite, 0x00000000, 0x00008000, ) 83 | Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, ) 84 | Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, ) 85 | Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, ) 86 | Memory32Fixed (ReadWrite, 0xFED20000, 0x00020000, ) 87 | Memory32Fixed (ReadOnly, 0xFED90000, 0x00004000, ) 88 | Memory32Fixed (ReadWrite, 0xFED45000, 0x0004B000, ) 89 | Memory32Fixed (ReadOnly, 0xFF000000, 0x01000000, ) 90 | Memory32Fixed (ReadOnly, 0xFEE00000, 0x00100000, ) 91 | Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, ) 92 | }) 93 | } 94 | 95 | Name (PW94, Package (0x02) 96 | { 97 | 0x09, 0x04 98 | }) 99 | 100 | Name (PWD4, Package (0x02) 101 | { 102 | 0x0D, 0x04 103 | }) 104 | 105 | // _UPC for USB 2 Type-A ports 106 | Name (UP2A, Package (0x04) 107 | { 108 | 0xFF, Zero, Zero, Zero 109 | }) 110 | 111 | // _UPC for USB 3 Type-A ports 112 | Name (UP3A, Package (0x04) 113 | { 114 | 0xFF, 0x03, Zero, Zero 115 | }) 116 | 117 | // _UPC for proprietary (internal) USB ports 118 | Name (UPIN, Package (0x04) 119 | { 120 | 0xFF, 0xFF, Zero, Zero 121 | }) 122 | 123 | #include 124 | #include 125 | #if CONFIG_GRAPHICS_IGPU_SUPPORT == 1 126 | #include 127 | #endif // CONFIG_GRAPHICS_IGPU_SUPPORT 128 | 129 | #if CONFIG_GRAPHICS_PCIE_SUPPORT > 0 130 | #include 131 | #endif // CONFIG_GRAPHICS_PCIE_SUPPORT 132 | 133 | #include 134 | #ifdef CONFIG_CHIPSET_INTEL_XHC_DEVICE 135 | #include 136 | #endif // CONFIG_CHIPSET_INTEL_XHC_DEVICE 137 | #include 138 | 139 | #ifdef CONFIG_CHIPSET_INTEL_LAN_DEVICE 140 | #include 141 | #endif // CONFIG_CHIPSET_INTEL_LAN_DEVICE 142 | 143 | #include 144 | #include 145 | #include 146 | -------------------------------------------------------------------------------- /src/panther_point/pci/ehci.asl: -------------------------------------------------------------------------------- 1 | Device (EHC1) 2 | { 3 | Name (_ADR, 0x001D0000) // _ADR: Address 4 | Alias (PWD4, _PRW) // _PRW: Power Resources for Wake 5 | Name (_S3D, 0x03) // _S3D: S3 Device State 6 | Name (_S4D, 0x03) // _S4D: S4 Device State 7 | Name (MBSD, One) // Enable USB SuperDrive support 8 | Device (RHUB) 9 | { 10 | Name (_ADR, Zero) // _ADR: Address 11 | Device (PRT1) 12 | { 13 | Name (_ADR, One) // _ADR: Address 14 | Alias (UPIN, _UPC) // _UPC: USB Port Capabilities 15 | 16 | Device (PRT1) 17 | { 18 | Name (_ADR, One) // _ADR: Address 19 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 20 | } 21 | 22 | Device (PRT2) 23 | { 24 | Name (_ADR, 0x02) // _ADR: Address 25 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 26 | } 27 | 28 | Device (PRT3) 29 | { 30 | Name (_ADR, 0x03) // _ADR: Address 31 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 32 | } 33 | 34 | Device (PRT4) 35 | { 36 | Name (_ADR, 0x04) // _ADR: Address 37 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 38 | } 39 | 40 | Device (PRT5) 41 | { 42 | Name (_ADR, 0x05) // _ADR: Address 43 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 44 | } 45 | 46 | Device (PRT6) 47 | { 48 | Name (_ADR, 0x06) // _ADR: Address 49 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 50 | } 51 | 52 | Device (PRT7) 53 | { 54 | Name (_ADR, 0x07) // _ADR: Address 55 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 56 | } 57 | 58 | Device (PRT8) 59 | { 60 | Name (_ADR, 0x08) // _ADR: Address 61 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 62 | } 63 | } 64 | } 65 | } 66 | 67 | Device (EHC2) 68 | { 69 | Name (_ADR, 0x001A0000) // _ADR: Address 70 | Alias (PWD4, _PRW) // _PRW: Power Resources for Wake 71 | Name (_S3D, 0x03) // _S3D: S3 Device State 72 | Name (_S4D, 0x03) // _S4D: S4 Device State 73 | Name (MBSD, One) // Enable USB SuperDrive support 74 | Device (RHUB) 75 | { 76 | Name (_ADR, Zero) // _ADR: Address 77 | Device (PRT1) 78 | { 79 | Name (_ADR, One) // _ADR: Address 80 | Alias (^^^EHC1.RHUB.PRT1._UPC, _UPC) 81 | Device (PRT1) 82 | { 83 | Name (_ADR, One) // _ADR: Address 84 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 85 | } 86 | 87 | Device (PRT2) 88 | { 89 | Name (_ADR, 0x02) // _ADR: Address 90 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 91 | } 92 | 93 | Device (PRT3) 94 | { 95 | Name (_ADR, 0x03) // _ADR: Address 96 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 97 | } 98 | 99 | Device (PRT4) 100 | { 101 | Name (_ADR, 0x04) // _ADR: Address 102 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 103 | } 104 | 105 | Device (PRT5) 106 | { 107 | Name (_ADR, 0x05) // _ADR: Address 108 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 109 | } 110 | 111 | Device (PRT6) 112 | { 113 | Name (_ADR, 0x06) // _ADR: Address 114 | Alias (UP2A, _UPC) // _UPC: USB Port Capabilities 115 | } 116 | } 117 | } 118 | } 119 | -------------------------------------------------------------------------------- /src/panther_point/pci/hdef.asl: -------------------------------------------------------------------------------- 1 | Device (HDEF) 2 | { 3 | Name (_ADR, 0x001B0000) // _ADR: Address 4 | Alias (PWD4, _PRW) // _PRW: Power Resources for Wake 5 | } 6 | -------------------------------------------------------------------------------- /src/panther_point/pci/igpu.asl: -------------------------------------------------------------------------------- 1 | Device (IGPU) 2 | { 3 | Name (_ADR, 0x00020000) // _ADR: Address 4 | OperationRegion (IGPH, PCI_Config, Zero, 0x40) 5 | Field (IGPH, ByteAcc, NoLock, Preserve) 6 | { 7 | VID, 16, 8 | DID, 16 9 | } 10 | } 11 | -------------------------------------------------------------------------------- /src/panther_point/pci/imei.asl: -------------------------------------------------------------------------------- 1 | Device (IMEI) 2 | { 3 | Name (_ADR, 0x00160000) 4 | #if CONFIG_ACPI_DSM_INJECTION == 1 5 | #if CONFIG_GRAPHICS_IGPU_SUPPORT == 1 6 | Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method 7 | { 8 | If (!Arg2) 9 | { 10 | Return (Buffer (One) { 0x03 }) 11 | } 12 | 13 | // Set IMEI device-id to 0x1C3A for Sandy Bridge CPUs & IGPUs on 7 Series chipsets 14 | If (((^^IGPU.DID == 0x0102) || (^^IGPU.DID == 0x0112)) || ((^^IGPU.DID == 0x0122) | (^^IGPU.DID == 0x010A))) 15 | { 16 | Return (Package (0x02) 17 | { 18 | "device-id", 19 | Buffer (0x04) { 0x3A, 0x1C, Zero, Zero } 20 | }) 21 | } 22 | 23 | Return (Package (Zero) {}) 24 | } 25 | #endif // CONFIG_GRAPHICS_IGPU_SUPPORT 26 | #endif // CONFIG_ACPI_DSM_INJECTION 27 | } 28 | -------------------------------------------------------------------------------- /src/panther_point/pci/intel_lan.asl: -------------------------------------------------------------------------------- 1 | Device (CONFIG_CHIPSET_INTEL_LAN_DEVICE) 2 | { 3 | Name (_ADR, 0x00190000) // _ADR: Address 4 | Alias (PWD4, _PRW) // _PRW: Power Resources for Wake 5 | #if CONFIG_ACPI_DSM_INJECTION == 1 6 | #ifdef CONFIG_CHIPSET_INTEL_LAN_DSM_LOCATION 7 | Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method 8 | { 9 | If (!Arg2) 10 | { 11 | Return (Buffer (One) { 0x03 }) 12 | } 13 | 14 | Return (Package (0x02) 15 | { 16 | "location", 17 | Buffer (0x02) { CONFIG_CHIPSET_INTEL_LAN_DSM_LOCATION } 18 | }) 19 | } 20 | #endif // CONFIG_CHIPSET_INTEL_LAN_DSM_LOCATION 21 | #endif // CONFIG_ACPI_DSM_INJECTION 22 | } 23 | -------------------------------------------------------------------------------- /src/panther_point/pci/mchc.asl: -------------------------------------------------------------------------------- 1 | Device (MCHC) 2 | { 3 | Name (_ADR, Zero) 4 | } 5 | -------------------------------------------------------------------------------- /src/panther_point/pci/peg.asl: -------------------------------------------------------------------------------- 1 | Device (PEG0) 2 | { 3 | Name (_ADR, 0x00010000) // _ADR: Address 4 | Alias (PWD4, _PRW) // _PRW: Power Resources for Wake 5 | Name (_PRT, Package (0x04) // _PRT: PCI Routing Table 6 | { 7 | Package (0x04) { 0xFFFF, Zero, Zero, 0x10 }, 8 | Package (0x04) { 0xFFFF, One, Zero, 0x11 }, 9 | Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 }, 10 | Package (0x04) { 0xFFFF, 0x03, Zero, 0x13 } 11 | }) 12 | 13 | Device (GFX0) // Optional, for PCIe GPU 14 | { 15 | Name (_ADR, Zero) // _ADR: Address 16 | Alias (PW94, _PRW) // _PRW: Power Resources for Wake 17 | #if CONFIG_ACPI_DSM_INJECTION == 1 18 | Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method 19 | { 20 | If (!Arg2) 21 | { 22 | Return (Buffer (One) { 0x03 }) 23 | } 24 | 25 | Return (Package () 26 | { 27 | "AAPL,boot-display", 28 | Buffer (Zero) {}, 29 | "AAPL,slot-name", 30 | #ifdef CONFIG_PCI_PEG0_SLOT_NAME 31 | Buffer () { CONFIG_PCI_PEG0_SLOT_NAME }, 32 | #else 33 | Buffer (0x07) { "Slot-1" }, 34 | #endif // CONFIG_PCI_PEG0_SLOT_NAME 35 | "hda-gfx", 36 | Buffer (0x0A) { "onboard-2" } 37 | }) 38 | } 39 | #endif // CONFIG_ACPI_DSM_INJECTION 40 | } 41 | 42 | Device (HDAU) // Optional, HDMI audio for PCIe GPU 43 | { 44 | Name (_ADR, One) // _ADR: Address 45 | } 46 | } 47 | 48 | #if CONFIG_GRAPHICS_PCIE_SUPPORT == 2 49 | Device (PEG1) 50 | { 51 | Name (_ADR, 0x00010001) // _ADR: Address 52 | Alias (PWD4, _PRW) // _PRW: Power Resources for Wake 53 | Name (_PRT, Package (0x04) // _PRT: PCI Routing Table 54 | { 55 | Package (0x04) { 0xFFFF, Zero, Zero, 0x11 }, 56 | Package (0x04) { 0xFFFF, One, Zero, 0x12 }, 57 | Package (0x04) { 0xFFFF, 0x02, Zero, 0x13 }, 58 | Package (0x04) { 0xFFFF, 0x03, Zero, 0x10 } 59 | }) 60 | 61 | Device (GFX1) // Optional, for PCIe GPU 62 | { 63 | Name (_ADR, Zero) // _ADR: Address 64 | Alias (PW94, _PRW) // _PRW: Power Resources for Wake 65 | #if CONFIG_ACPI_DSM_INJECTION == 1 66 | Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method 67 | { 68 | If (!Arg2) 69 | { 70 | Return (Buffer (One) { 0x03 }) 71 | } 72 | 73 | Return (Package () 74 | { 75 | "AAPL,boot-display", 76 | Buffer (Zero) {}, 77 | "AAPL,slot-name", 78 | #ifdef CONFIG_PCI_PEG1_SLOT_NAME 79 | Buffer () { CONFIG_PCI_PEG1_SLOT_NAME }, 80 | #else 81 | Buffer (0x07) { "Slot-2" }, 82 | #endif // CONFIG_PCI_PEG1_SLOT_NAME 83 | "hda-gfx", 84 | Buffer (0x0A) { "onboard-3" } 85 | }) 86 | } 87 | #endif // CONFIG_ACPI_DSM_INJECTION 88 | } 89 | 90 | Device (HDAU) // Optional, HDMI audio for PCIe GPU 91 | { 92 | Name (_ADR, One) // _ADR: Address 93 | } 94 | } 95 | #endif // CONFIG_GRAPHICS_PCIE_SUPPORT 96 | -------------------------------------------------------------------------------- /src/panther_point/pci/pxsx.asl: -------------------------------------------------------------------------------- 1 | Name (_ADR, Zero) // _ADR: Address 2 | Alias (PW94, _PRW) // _PRW: Power Resources for Wake 3 | -------------------------------------------------------------------------------- /src/panther_point/pci/rp01.asl: -------------------------------------------------------------------------------- 1 | Name (_ADR, 0x001C0000) // _ADR: Address 2 | Name (_PRT, Package (0x04) // _PRT: PCI Routing Table (AR04) 3 | { 4 | Package (0x04) { 0xFFFF, Zero, Zero, 0x10 }, 5 | Package (0x04) { 0xFFFF, One, Zero, 0x11 }, 6 | Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 }, 7 | Package (0x04) { 0xFFFF, 0x03, Zero, 0x13 } 8 | }) 9 | -------------------------------------------------------------------------------- /src/panther_point/pci/rp02.asl: -------------------------------------------------------------------------------- 1 | Name (_ADR, 0x001C0001) // _ADR: Address 2 | Name (_PRT, Package (0x04) // _PRT: PCI Routing Table (AR05) 3 | { 4 | Package (0x04) { 0xFFFF, Zero, Zero, 0x11 }, 5 | Package (0x04) { 0xFFFF, One, Zero, 0x12 }, 6 | Package (0x04) { 0xFFFF, 0x02, Zero, 0x13 }, 7 | Package (0x04) { 0xFFFF, 0x03, Zero, 0x10 } 8 | }) 9 | -------------------------------------------------------------------------------- /src/panther_point/pci/rp03.asl: -------------------------------------------------------------------------------- 1 | Name (_ADR, 0x001C0002) // _ADR: Address 2 | Name (_PRT, Package (0x04) // _PRT: PCI Routing Table (AR06) 3 | { 4 | Package (0x04) { 0xFFFF, Zero, Zero, 0x12 }, 5 | Package (0x04) { 0xFFFF, One, Zero, 0x13 }, 6 | Package (0x04) { 0xFFFF, 0x02, Zero, 0x10 }, 7 | Package (0x04) { 0xFFFF, 0x03, Zero, 0x11 } 8 | }) 9 | -------------------------------------------------------------------------------- /src/panther_point/pci/rp04.asl: -------------------------------------------------------------------------------- 1 | Name (_ADR, 0x001C0003) // _ADR: Address 2 | Name (_PRT, Package (0x04) // _PRT: PCI Routing Table (AR07) 3 | { 4 | Package (0x04) { 0xFFFF, Zero, Zero, 0x13 }, 5 | Package (0x04) { 0xFFFF, One, Zero, 0x10 }, 6 | Package (0x04) { 0xFFFF, 0x02, Zero, 0x11 }, 7 | Package (0x04) { 0xFFFF, 0x03, Zero, 0x12 } 8 | }) 9 | -------------------------------------------------------------------------------- /src/panther_point/pci/rp05.asl: -------------------------------------------------------------------------------- 1 | Name (_ADR, 0x001C0004) // _ADR: Address 2 | Name (_PRT, Package (0x04) // _PRT: PCI Routing Table (AR08) 3 | { 4 | Package (0x04) { 0xFFFF, Zero, Zero, 0x10 }, 5 | Package (0x04) { 0xFFFF, One, Zero, 0x11 }, 6 | Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 }, 7 | Package (0x04) { 0xFFFF, 0x03, Zero, 0x13 } 8 | }) 9 | -------------------------------------------------------------------------------- /src/panther_point/pci/rp06.asl: -------------------------------------------------------------------------------- 1 | Name (_ADR, 0x001C0005) // _ADR: Address 2 | Name (_PRT, Package (0x04) // _PRT: PCI Routing Table (AR09) 3 | { 4 | Package (0x04) { 0xFFFF, Zero, Zero, 0x11 }, 5 | Package (0x04) { 0xFFFF, One, Zero, 0x12 }, 6 | Package (0x04) { 0xFFFF, 0x02, Zero, 0x13 }, 7 | Package (0x04) { 0xFFFF, 0x03, Zero, 0x10 } 8 | }) 9 | -------------------------------------------------------------------------------- /src/panther_point/pci/rp07.asl: -------------------------------------------------------------------------------- 1 | Name (_ADR, 0x001C0006) // _ADR: Address 2 | Name (_PRT, Package (0x04) // _PRT: PCI Routing Table (AR0E) 3 | { 4 | Package (0x04) { 0xFFFF, Zero, Zero, 0x12 }, 5 | Package (0x04) { 0xFFFF, One, Zero, 0x13 }, 6 | Package (0x04) { 0xFFFF, 0x02, Zero, 0x10 }, 7 | Package (0x04) { 0xFFFF, 0x03, Zero, 0x11 } 8 | }) 9 | -------------------------------------------------------------------------------- /src/panther_point/pci/rp08.asl: -------------------------------------------------------------------------------- 1 | Name (_ADR, 0x001C0007) // _ADR: Address 2 | Name (_PRT, Package (0x04) // _PRT: PCI Routing Table (AR0F) 3 | { 4 | Package (0x04) { 0xFFFF, Zero, Zero, 0x13 }, 5 | Package (0x04) { 0xFFFF, One, Zero, 0x10 }, 6 | Package (0x04) { 0xFFFF, 0x02, Zero, 0x11 }, 7 | Package (0x04) { 0xFFFF, 0x03, Zero, 0x12 } 8 | }) 9 | -------------------------------------------------------------------------------- /src/panther_point/pci/sata.asl: -------------------------------------------------------------------------------- 1 | Device (SATA) 2 | { 3 | Name (_ADR, 0x001F0002) // _ADR: Address 4 | } 5 | -------------------------------------------------------------------------------- /src/panther_point/pci/thunderbolt.asl: -------------------------------------------------------------------------------- 1 | Device (UPSB) 2 | { 3 | Name (_ADR, Zero) // _ADR: Address 4 | 5 | #if CONFIG_ACPI_DSM_INJECTION == 1 6 | Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method 7 | { 8 | If (!Arg2) 9 | { 10 | Return (Buffer (One) { 0x03 }) 11 | } 12 | 13 | Return (Package (0x02) 14 | { 15 | "PCI-Thunderbolt", 16 | One 17 | }) 18 | } 19 | #endif // CONFIG_ACPI_DSM_INJECTION 20 | 21 | Name (_RMV, One) // _RMV: Removal Status 22 | 23 | Device (DSB0) 24 | { 25 | Name (_ADR, Zero) // _ADR: Address 26 | #if CONFIG_ACPI_DSM_INJECTION == 1 27 | Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method 28 | { 29 | If (!Arg2) 30 | { 31 | Return (Buffer (One) { 0x03 }) 32 | } 33 | 34 | Return (Package (0x02) 35 | { 36 | "PCIHotplugCapable", 37 | Zero 38 | }) 39 | } 40 | #endif // CONFIG_ACPI_DSM_INJECTION 41 | 42 | Device (NHI0) 43 | { 44 | Name (_ADR, Zero) // _ADR: Address 45 | #if 0 46 | Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method 47 | { 48 | If (!Arg2) 49 | { 50 | Return (Buffer (One) { 0x03 }) 51 | } 52 | 53 | Return (Package (0x02) 54 | { 55 | "power-save", 56 | Zero 57 | }) 58 | } 59 | #endif 60 | } 61 | } 62 | 63 | Device (DSB1) 64 | { 65 | Name (_ADR, 0x00030000) // _ADR: Address 66 | } 67 | 68 | Device (DSB2) 69 | { 70 | Name (_ADR, 0x00040000) // _ADR: Address 71 | } 72 | 73 | Device (DSB3) 74 | { 75 | Name (_ADR, 0x00050000) // _ADR: Address 76 | } 77 | 78 | Device (DSB4) 79 | { 80 | Name (_ADR, 0x00060000) // _ADR: Address 81 | } 82 | } 83 | -------------------------------------------------------------------------------- /src/panther_point/pci/xhci.asl: -------------------------------------------------------------------------------- 1 | Device (XHC1) 2 | { 3 | Name (_ADR, 0x00140000) // _ADR: Address 4 | Alias (PWD4, _PRW) // _PRW: Power Resources for Wake 5 | Name (MBSD, One) // Enable USB SuperDrive support 6 | Device (RHUB) 7 | { 8 | Name (_ADR, Zero) // _ADR: Address 9 | Device (HS01) 10 | { 11 | Name (_ADR, One) // _ADR: Address 12 | Alias (UP3A, _UPC) // _UPC: USB Port Capabilities 13 | } 14 | 15 | Device (HS02) 16 | { 17 | Name (_ADR, 0x02) // _ADR: Address 18 | Alias (UP3A, _UPC) // _UPC: USB Port Capabilities 19 | } 20 | 21 | Device (HS03) 22 | { 23 | Name (_ADR, 0x03) // _ADR: Address 24 | Alias (UP3A, _UPC) // _UPC: USB Port Capabilities 25 | } 26 | 27 | Device (HS04) 28 | { 29 | Name (_ADR, 0x04) // _ADR: Address 30 | Alias (UP3A, _UPC) // _UPC: USB Port Capabilities 31 | } 32 | 33 | Device (SSP1) 34 | { 35 | Name (_ADR, 0x05) // _ADR: Address 36 | Alias (UP3A, _UPC) // _UPC: USB Port Capabilities 37 | } 38 | 39 | Device (SSP2) 40 | { 41 | Name (_ADR, 0x06) // _ADR: Address 42 | Alias (UP3A, _UPC) // _UPC: USB Port Capabilities 43 | } 44 | 45 | Device (SSP3) 46 | { 47 | Name (_ADR, 0x07) // _ADR: Address 48 | Alias (UP3A, _UPC) // _UPC: USB Port Capabilities 49 | } 50 | 51 | Device (SSP4) 52 | { 53 | Name (_ADR, 0x08) // _ADR: Address 54 | Alias (UP3A, _UPC) // _UPC: USB Port Capabilities 55 | } 56 | } 57 | } 58 | -------------------------------------------------------------------------------- /src/panther_point/pnlf.asl: -------------------------------------------------------------------------------- 1 | Device (PNLF) 2 | { 3 | Name (_ADR, Zero) // _ADR: Address 4 | Name (_CID, "backlight") // _CID: Compatible ID 5 | Name (_HID, EisaId ("APP0002")) // _HID: Hardware ID 6 | Name (_STA, 0x0B) // _STA: Status 7 | Name (_UID, 0x0A) // _UID: Unique ID 8 | #if CONFIG_ACPI_DSM_INJECTION == 1 9 | Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method 10 | { 11 | If (!Arg2) 12 | { 13 | Return (Buffer (One) { 0x03 }) 14 | } 15 | 16 | Return (Package (0x04) 17 | { 18 | "refnum", Zero, 19 | "type", 0x49324300 20 | }) 21 | } 22 | #endif // CONFIG_ACPI_DSM_INJECTION 23 | } 24 | -------------------------------------------------------------------------------- /src/panther_point/sbus.asl: -------------------------------------------------------------------------------- 1 | Device (SBUS) 2 | { 3 | Name (_ADR, 0x001F0003) // _ADR: Address 4 | #if CONFIG_ACPI_IMAC_DEVICES == 1 5 | Device (BUS0) 6 | { 7 | Name (_ADR, Zero) // _ADR: Address 8 | Name (_CID, "smbus") // _CID: Compatible ID 9 | Device (BLC0) 10 | { 11 | Name (_ADR, Zero) // _ADR: Address 12 | Name (_CID, "smbus-blc") // _CID: Compatible ID 13 | Name (_STA, 0x0F) // _STA: Status 14 | #if CONFIG_ACPI_DSM_INJECTION == 1 15 | Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method 16 | { 17 | If (!Arg2) 18 | { 19 | Return (Buffer (One) { 0x03 }) 20 | } 21 | 22 | Return (Package (0x08) 23 | { 24 | "address", 0x2C, 25 | "command", Zero, 26 | "refnum", Zero, 27 | "type", 0x49324300 28 | }) 29 | } 30 | #endif // CONFIG_ACPI_DSM_INJECTION 31 | } 32 | } 33 | 34 | Device (BUS1) 35 | { 36 | Name (_ADR, One) // _ADR: Address 37 | Name (_CID, "smbus") // _CID: Compatible ID 38 | } 39 | #endif // CONFIG_ACPI_IMAC_DEVICES 40 | } 41 | --------------------------------------------------------------------------------