├── 1024Mb_ddr3_parameters.vh ├── README.md ├── ddr3.v ├── ddr3_controller.sv ├── defs.svh ├── intf.svh ├── sg093.v ├── st_defs.svh └── top.sv /1024Mb_ddr3_parameters.vh: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/alice820621/SystemVerilog-Implementation-of-DDR3-Controller/HEAD/1024Mb_ddr3_parameters.vh -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/alice820621/SystemVerilog-Implementation-of-DDR3-Controller/HEAD/README.md -------------------------------------------------------------------------------- /ddr3.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/alice820621/SystemVerilog-Implementation-of-DDR3-Controller/HEAD/ddr3.v -------------------------------------------------------------------------------- /ddr3_controller.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/alice820621/SystemVerilog-Implementation-of-DDR3-Controller/HEAD/ddr3_controller.sv -------------------------------------------------------------------------------- /defs.svh: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/alice820621/SystemVerilog-Implementation-of-DDR3-Controller/HEAD/defs.svh -------------------------------------------------------------------------------- /intf.svh: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/alice820621/SystemVerilog-Implementation-of-DDR3-Controller/HEAD/intf.svh -------------------------------------------------------------------------------- /sg093.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/alice820621/SystemVerilog-Implementation-of-DDR3-Controller/HEAD/sg093.v -------------------------------------------------------------------------------- /st_defs.svh: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/alice820621/SystemVerilog-Implementation-of-DDR3-Controller/HEAD/st_defs.svh -------------------------------------------------------------------------------- /top.sv: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/alice820621/SystemVerilog-Implementation-of-DDR3-Controller/HEAD/top.sv --------------------------------------------------------------------------------