└── README.md /README.md: -------------------------------------------------------------------------------- 1 | # VLSI Linkedin Index 2 | This repository provides an index of LinkedIn VLSI content creators and their materials 3 | 4 | ## List By Topic 5 | ### Analog Design 6 | - [Amit Bar](https://www.linkedin.com/in/amitbarju2023/) - Analog Circuit Design Engineer || YouTube - Amit Bar 7 | - [Anurag Bhargava](https://www.linkedin.com/in/anurag-bhargava-b64239b/) - Customer Success Manager | YouTuber | RF Design Enthusiast 8 | - [Chembiyan T](https://www.linkedin.com/in/chembiyan-t-0b34b910/) - Senior Staff RF/Analog Engineer 9 | - [Guillermo Martínez](https://www.linkedin.com/in/guillermb) - Hardware technical leader at Zennio 10 | - [Hesham Omran](https://www.linkedin.com/in/omranh/) - Associate Professor and CTO 11 | - [Himanshu Agarwal](https://www.linkedin.com/in/himanshu-agarwal-37148219a/) - PrepFusion || AIR 27(EC), AIR 45(IN) GATE'22 || YouTube @HimanshuAgarwal_ & @PrepFusion_GATE 12 | - [Javed G S, PhD](https://www.linkedin.com/in/javed-g-s-phd/) - Analog Design Manager @ Intel Advanced Design 13 | - [Muhammad Isa Aldacher](https://www.linkedin.com/in/muhammad-isa-aldacher-95336831/) - Analog / Mixed-Signal Design Engineer at Intel 14 | - [Master Micro](https://www.linkedin.com/company/master-micro/) - Master Micro provides EDA solutions and professional training and consulting services in the field of microelectronics. 15 | - [N. Raja Sekhar](https://www.linkedin.com/in/n-raja-sekhar-08ab1011/) - Analog Design Manager 16 | - [Shubham Jaiswal](https://www.linkedin.com/in/shubhamjaiswal-iisc/) - IISc Bangalore || M.Tech’25 || Analog/RF IC design Analog circuit design 17 | - [Tejas Ketkar](https://www.linkedin.com/in/tejas-ketkar-568863167/) - Circuit Designer | IEEE EDS UG Fellow | YouTube @ TejasKetkar 18 | 19 | ### Analog Layout 20 | ### Embedded Systems 21 | - [Balajee Seshadri](https://www.linkedin.com/in/balajeeseshadri/) - Freely Sharing Embedded Systems Programming Course 22 | - [Joseph Ogbonna](https://www.linkedin.com/in/joseph-ogbonna-2844171a5/) - Hardware Design Engineer | IoT Solutions Specialist | Transforming Ideas into Innovative Electronics & PCB Solutions 23 | - [Piyush Itankar](https://www.linkedin.com/in/streetdogg/) - Embedded Systems @Google | inpyjama.com 24 | - [Rosmianto Aji Saputro](https://www.linkedin.com/in/rosmianto/) - I help Arduino hobbyists transform into Pro Embedded Engineers | hobby2pro.rosmianto.com 25 | 26 | ### Fabrication 27 | - [Hyeongwon (HW.Seo) Seo](https://www.linkedin.com/in/hyeongwon-seo-60206a244/) - 3D V-RAM and V-CMOS unit concept, patent, and structure development. *Freelancer 28 | 29 | ### Digital Design 30 | - [Ahmed-Saghafi](https://www.linkedin.com/in/ahmad-saghafi/) - Founder & CEO of FPGA Technology Training (FPGATEK) | Founder of FaradAndish | FPGA Expert | Online Course Creator 31 | - [Adam Taylor](https://www.linkedin.com/in/adam-taylor-8a991713/) - Founder of FPGA Consultancy - Adiuvo Engineering. Embedded Systems Consultant, FPGA Expert, Prolific FPGA Writer 32 | - [Hemanth Chintalapudi](https://www.linkedin.com/in/hemanthch/) - Educator & Writer | Technical Sketch Artist | ASIC RTL Design Engineer 33 | - [Gregory Stitt](https://www.linkedin.com/in/gregory-stitt-92ab1819/) - Senior FPGA Engineer at Quantlab 34 | - [Jonas Julian Jensen](https://www.linkedin.com/in/jojuljen/) - Hardware and software engineer | VHDL blogger | Instructor at VHDLwhiz.com 35 | - [Koray Karakurt](https://www.linkedin.com/in/koray-karakurt/) - FPGA Expert 36 | - [Kumar Khandagle](https://www.linkedin.com/in/kumar-khandagle-6578b8194/) - Trainer @ Namaste FPGA 37 | - [Luca Benini](https://www.linkedin.com/in/lubenini/) - Full Professor at the University of Bologna and Chair of Digital Circuits and Systems at ETH Zurich 38 | - [Lukas Vik](https://www.linkedin.com/in/lukas-vik/) - FPGA Expert 39 | - [Michael Korobkov](https://www.linkedin.com/in/korobkov-michael/) - Leader of the FPGA / RTL / Verification developers community @fpgasystems 40 | - [Mitu Raj](https://www.linkedin.com/in/iammituraj/) - RTL Design Engineer & Embedded SW Developer ⇋ Founder & Content Creator at Chipmunk Logic™ 41 | - [Muhammed Kocaoglu](https://www.linkedin.com/in/muhammedkocaoglu/) - Digital Design Engineer 42 | - [Murali kumar M](https://www.linkedin.com/in/thefpgaman/) - FPGA Expert 43 | - [Onur Mutlu](https://www.linkedin.com/in/omutlu/) - Professor at ETH Zürich, Visiting Professor at Stanford University, Adjunct Professor at Carnegie Mellon University 44 | - [Rahul Behl](https://www.linkedin.com/in/raulbehl/) - Tenstorrent | Teaching proven hands-on RTL Design & Verification courses to succeed as a Hardware Engineer 45 | - [Russell Merrick](https://www.linkedin.com/in/russell-merrick-6058b34/) - FPGA Influencer 46 | - [Yunus Esergün](https://www.linkedin.com/in/yunus-eserg%C3%BCn-673577202/) - FPGA Design Engineer at ASELSAN 47 | 48 | ### Digital Verification 49 | - [Ahmed Alsawi](https://www.linkedin.com/in/ahmed-alsawi/) - Design Verification Engineer 50 | - [Anand Shirahatti](https://www.linkedin.com/in/anand-shirahatti-1258235/) - Scaling DV Teams 51 | - [Augustin JK](https://www.linkedin.com/in/augustin-jeba-kumar/) - Design Verification Engineer 52 | - [Dave Rich](https://www.linkedin.com/in/davidrich/) - Verification Methodologist at Siemens EDA 53 | - [Deva Kumar Talluri](https://www.linkedin.com/in/deva-kumar-talluri-028463284/) - DV engineer & EX professor of electronics and communication engineering (15+ years of technical experience) 54 | - [Jairaj Mirashi](https://www.linkedin.com/in/jairaj-mirashi-design-verification-engineer/) - Design Verification Engineer 55 | - [Jatin Koshiya](https://www.linkedin.com/in/jatinkoshiya/) - Design Verification Engineer 2 @ Microsoft | Ex Nvidia, Intel & TCS | 11k+ Followers | Mentor 56 | - [Harshit G.](https://www.linkedin.com/in/harshitgupta97/) - Design Verification Engineer @ Intel || Helped 500+ jobseekers in VLSI || Mock interview 57 | - [Peter Monsson](https://www.linkedin.com/in/petermonsson/) - Verification Tips | UVMkit.com | Verification Engineer 58 | - [Peng Yu](https://www.linkedin.com/in/peng-y-90121b294/) - Sr. Formal Verification Specialist | 14 yoe at Cadence | Making Professional Formal Verification Training Accessible To Individuals 59 | - [Prasanthi Chanda](https://www.linkedin.com/in/prasanthi-chanda-484205245/) - Co-Founder & Managing Director at Semi Design 60 | - [Pravallika Tammisetty](https://www.linkedin.com/in/pravallika-tammisetty-629091173/) - Senior Verification Engineer 61 | - [Robin Garg](https://www.linkedin.com/in/robingarg89/) - Principal Engineer, DV Architect at Intel || ex - Nuvia/Qualcomm/Arm 62 | - [Seelam Narendra Reddy](https://www.linkedin.com/in/seelam-narendra-reddy-b66a56168/) - Design Verification Engineer 63 | - [Sweety P.](https://www.linkedin.com/in/sweetypinjani/) - Formal Verification Engineer | Certified Keynote Speaker | Married to Semiconductors 64 | - [Shraddha Pawankar](https://www.linkedin.com/in/shraddha-pawankar-abc/) - Design and Verification Engineer 65 | - [Sougata Bhattacharjee](https://www.linkedin.com/in/sougata-bhattacharjee/) - LinkedIn Top Voice Samsung (SSIR) | Ex - Intel | ASIC Verification | Proficient in SV, UVM, OVM, SVA, Verilog 66 | 67 | ### ASIC Physical Design 68 | - [Ahmed-Abdelazeem](https://www.linkedin.com/in/ahmed-abdelazeem/) - ASIC Physical Design Engineer 69 | - [Isha Sood](https://www.linkedin.com/in/isha-sood-3602137/) - Structural Design Engineer at Intel | Ex-Lead Product Engineer at Cadence | Static Timing Analyst at Altran || IITK || Business Consultant 70 | - [Kunal Ghosh](https://www.linkedin.com/in/kunal-ghosh-vlsisystemdesign-com-28084836/) - Co-Founder at VLSI System Design, nurturing students in semiconductors 71 | - [Pooja Kumawat](https://www.linkedin.com/in/pooja47/) - 10k+ @Linkedin | ASIC Engineer @ NVIDIA | Intel Corporation | NXP Semiconductors | IIT BHU 72 | - [Prince Gupta](https://www.linkedin.com/in/prince-gupta-8b253987/) - Senior Staff Engineer - Physical Design | Ex-Intel 73 | - [Puneet Mittal](https://www.linkedin.com/in/mittalpuneet/) - Founder, Mentor, and Passionate Trainer at VLSI EXPERT Pvt. Ltd. 74 | - [Ramesh Kumar](https://www.linkedin.com/in/rameshkumar95/) - Physical Design || EMIR || PV || M.tech in VLSI || NIT SURAT 75 | - [Rashid Iqbal](https://www.linkedin.com/in/rashidco) - 23 years in Chip Design | 19 years at Intel | Physical Design 76 | - [Venu Kumar Kare](https://www.linkedin.com/in/venu-kumar-kare-465265233/) - Physical Design Trainee at Chip Edge Technologies Pvt. Ltd. 77 | 78 | ### Design For Test (DFT) 79 | - [Ashwani Maurya](https://www.linkedin.com/in/ashwani-maurya-562865117/) - MBIST - EDT - OCC - SCAN - ATPG - SIM - DBUG 80 | 81 | ### PCB Design 82 | - [Fabrizio Barragan](https://www.linkedin.com/in/fabrizio-barragan-aa2602ba/) - Electronic Designer IPC-CID/ IPC-A-610 CIT / Hardware PCB Layout 83 | - [Lukas Henkel](https://www.linkedin.com/in/lukas-henkel-ovt/) - Open Visions Technology - providing engineering services and highly repairable fully open-hardware consumer electronics 84 | - [Petr Dvořák](https://www.linkedin.com/in/petr-dvorak-hw/) - Hardware Designer 85 | - [Raghavendra Anjanappa](https://www.linkedin.com/in/raghavendra-anjanappa-ba7a0432/) - Ex-Manager PDE Micron Hyderabad 86 | - [Sobhan Aram](https://www.linkedin.com/in/sobhanaramm/) - Hardware System Designer | Electronic Design Engineer | Repairs of Electronic Systems | Microcontrollers | Control Systems 87 | - [Sobhan Jahaniparast](https://www.linkedin.com/in/sobhan-jahaniparast-930691203/) - Embedded Hardware | PCB Engineer | Consultant 88 | - [Waseem Alkhayer](https://www.linkedin.com/in/waseemalkhayer/) - Hardware Product Development 89 | - [Wei Zhang](https://www.linkedin.com/in/wei-zhang-ab2619307/) - PCB Design 90 | - [Zachariah Peterson](https://www.linkedin.com/in/zachariah-peterson/) - Owner, NWES | PCB Design for RF, Mil-Aero, Data Center, AI/ML | That guy in the Altium videos 91 | 92 | ### General 93 | - [Garal Das](https://www.linkedin.com/in/garal-das-aa895417a/) - EX Student OF HIT : AN ORDINARY TECH ENTHUSIAST. 94 | - [Kumar Priyadarshi](https://www.linkedin.com/in/kumar-priyadarshi-b0a2a7a2/) - Building TechoVedas | Global Foundries | NUS | IITB | IISER 95 | - [Learn VLSI](https://www.linkedin.com/company/learnvlsi/) 96 | - [Priya Pandey](https://www.linkedin.com/in/pandey-priya/) - Senior Engineer 1-Design@Microchip Technology ▪️ AI/ML/Data-Science Enthusiast 97 | - [Raju Prasad](https://www.linkedin.com/in/rajuprasadvlsi/) - VLSI Recruiter | Employer Branding | Chip Blogger 98 | - [Sanchit Kulkarni](https://www.linkedin.com/in/sanchit-kulkarni-4030a5148/) - AMD | Bits Pilani | Honeywell Aerospace | Talks about #vlsi #semiconductors 99 | - [Dr.Swamynathan S M](https://www.linkedin.com/in/dr-sms/) - Associate Professor-Dept.of ECE-Karpagam College of Engineering 100 | - [Shilpi Gupta](https://www.linkedin.com/in/shilpi-garg2328/) - 15k+ @LinkedIn | System Hardware Engineer @ Microsoft 101 | - [Simon Southwell](https://www.linkedin.com/in/simon-southwell-7684482/) - Semi-retired logic, software and systems designer. Technical writer, mentor, educator and presenter. 102 | - [Sri Harsha](https://www.linkedin.com/in/sriharsha-vangalapudi/) - ASIC Design and Verification Trainee @ VLSI FIRST 103 | - [vlsideepdive](https://www.linkedin.com/company/vlsideepdive/) 104 | --------------------------------------------------------------------------------