├── +adi ├── +AD9361 │ ├── Base.m │ ├── Rx.m │ ├── TuneAGC.m │ └── Tx.m ├── +AD9363 │ ├── Rx.m │ └── Tx.m ├── +AD9364 │ ├── Rx.m │ └── Tx.m ├── +AD9371 │ ├── Base.m │ ├── ORx.m │ ├── Rx.m │ └── Tx.m ├── +ADRV9002 │ ├── Base.m │ ├── Rx.m │ └── Tx.m ├── +ADRV9009 │ ├── Base.m │ ├── ORx.m │ ├── Rx.m │ └── Tx.m ├── +ADRV9009ZU11EG │ ├── Base.m │ ├── Rx.m │ └── Tx.m ├── +ADRV9361Z7035 │ ├── Rx.m │ └── Tx.m ├── +ADRV9364Z7020 │ ├── Rx.m │ └── Tx.m ├── +ADRV9371 │ ├── Rx.m │ └── Tx.m ├── +FMComms2 │ ├── Rx.m │ └── Tx.m ├── +FMComms3 │ ├── Rx.m │ └── Tx.m ├── +FMComms4 │ ├── Rx.m │ └── Tx.m ├── +FMComms5 │ ├── Base.m │ ├── Rx.m │ ├── TuneAGCFMComms5ChipB.m │ └── Tx.m ├── +FMComms8 │ ├── Rx.m │ └── Tx.m ├── +Pluto │ ├── Rx.m │ └── Tx.m ├── +utils │ ├── ADIWorkFlow.m │ ├── ConnectHardware.m │ ├── Downloader.m │ ├── InstallDriverBase.m │ ├── InstallDriverLinux.m │ ├── Step1.m │ ├── Step2.m │ ├── Step3.m │ ├── StepBase.m │ └── libad9361.m ├── Contents.m └── Version.m ├── .github └── workflows │ ├── build.yml │ ├── depends.yml │ └── doc.yml ├── .gitignore ├── .gitmodules ├── CI ├── ci_flags.md ├── doc │ ├── Makefile │ ├── README_doc.md │ ├── gen_pages │ │ ├── Makefile │ │ ├── _templates │ │ │ ├── allrefdesigns.tmpl │ │ │ ├── allsysobjs.tmpl │ │ │ ├── header.tmpl │ │ │ ├── refdesign.html │ │ │ └── sysobj.html │ │ ├── gen_hdl_refdesigns.py │ │ ├── gen_rd_svg.py │ │ ├── gen_sysobj_doc.m │ │ ├── gen_sysobj_pages.py │ │ └── sysobjs.json │ ├── make.bat │ ├── requirements_doc.txt │ └── source │ │ ├── _static │ │ ├── assets │ │ │ ├── ADI_Logo_AWP_Large.png │ │ │ ├── HWA.png │ │ │ ├── HWA_project_gen.png │ │ │ ├── HWA_verilog_gen.png │ │ │ ├── MATLAB_HDL_Ref_Design.png │ │ │ ├── MATLAB_libiio_Stack.png │ │ │ ├── Reference_Designs.fig │ │ │ ├── add_ex.png │ │ │ ├── addons_page.png │ │ │ ├── addons_page_wbox.png │ │ │ ├── matlab_white_icon.svg │ │ │ ├── rd_ad9361.svg │ │ │ ├── rd_ad9361_custom.svg │ │ │ ├── rd_adrv9001.svg │ │ │ ├── rd_adrv9001_custom.svg │ │ │ ├── rd_jesd.svg │ │ │ ├── rd_jesd_custom.svg │ │ │ ├── reference_design_with_IP.png │ │ │ ├── stock_reference_design.png │ │ │ ├── trx_search.png │ │ │ ├── trx_search_find.png │ │ │ ├── trx_search_find_wbox.png │ │ │ └── trx_search_wbox.png │ │ ├── css │ │ │ ├── rd_style.css │ │ │ └── style.css │ │ ├── favicon.png │ │ └── logos │ │ │ ├── logo_black.png │ │ │ ├── logo_black_cropped.png │ │ │ ├── logo_white.png │ │ │ └── logo_white_cropped.png │ │ ├── allrefdesigns.md │ │ ├── conf.py │ │ ├── dev_hdl_workflow.md │ │ ├── examples.md │ │ ├── index.md │ │ ├── install.md │ │ ├── objects.md │ │ ├── streaming.md │ │ └── targeting.md └── scripts │ ├── Docker │ ├── Makefile │ ├── adi_build.tcl │ ├── adi_build_win.tcl │ ├── adi_ip.tcl │ ├── adi_project.tcl │ ├── adi_project_xilinx.tcl │ ├── boot │ ├── adrv9361 │ │ ├── fsbl.elf │ │ ├── u-boot.elf │ │ └── zynq.bif │ ├── adrv9364 │ │ ├── fsbl.elf │ │ ├── u-boot.elf │ │ └── zynq.bif │ ├── zc702 │ │ ├── fsbl.elf │ │ ├── u-boot.elf │ │ └── zynq.bif │ ├── zc706 │ │ ├── fsbl.elf │ │ ├── u-boot.elf │ │ └── zynq.bif │ ├── zcu102 │ │ ├── bl31.elf │ │ ├── fsbl.elf │ │ ├── pmufw.elf │ │ ├── u-boot.elf │ │ └── zynq.bif │ └── zed │ │ ├── fsbl.elf │ │ ├── u-boot.elf │ │ └── zynq.bif │ ├── bsp.tmpl │ ├── bsp_noexamples.tmpl │ ├── build_bsp.sh │ ├── copy_all_packed_ips.tcl │ ├── dockermake │ ├── fixmake.sh │ ├── fsbl_build_zynq.tcl │ ├── fsbl_build_zynqmp.tcl │ ├── genTlbx.m │ ├── generate_ip_map.py │ ├── library │ └── util_sync │ │ ├── sync_fast_to_slow │ │ ├── Makefile │ │ ├── sync_fast_to_slow.v │ │ └── sync_fast_to_slow_ip.tcl │ │ ├── sync_slow_to_fast │ │ ├── Makefile │ │ ├── sync_slow_to_fast.v │ │ └── sync_slow_to_fast_ip.tcl │ │ └── util_delay │ │ ├── Makefile │ │ ├── util_delay.v │ │ └── util_delay_ip.tcl │ ├── linter.m │ ├── matlab_processors.tcl │ ├── pack_all_ips.tcl │ ├── pmufw_zynqmp.tcl │ ├── ports.json │ ├── read_ports_json.py │ ├── setupDocker.sh │ ├── synth_designs.sh │ ├── system_project_rxtx.tcl │ └── targeting_designs.sh ├── Jenkinsfile ├── JenkinsfileCron ├── JenkinsfileHW ├── LICENSE ├── README.md ├── hdl ├── common │ ├── +hdlbsp │ │ ├── +util │ │ │ ├── +SDUpdater │ │ │ │ ├── DeviceTypes.m │ │ │ │ ├── FWModes.m │ │ │ │ └── SDUpdater.m │ │ │ ├── SDUpdater.m │ │ │ └── vendorInstall.m │ │ ├── install.m │ │ └── uninstall.m │ └── Contents.m └── vendor │ └── AnalogDevices │ ├── +AnalogDevices │ ├── +adrv9002 │ │ └── +zcu102 │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ ├── plugin_rd_tx.m │ │ │ └── plugin_rd_txrx.m │ ├── +adrv9009 │ │ ├── +zc706 │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ └── +zcu102 │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ ├── +adrv9361z7035 │ │ ├── +ccbob_cmos │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ ├── +ccbob_lvds │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ ├── +ccbox_lvds │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ ├── +ccfmc_lvds │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ ├── +ccpackrf_lvds │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ ├── hdlcoder_ref_design_customization.m │ │ └── plugin_board.m │ ├── +adrv9364z7020 │ │ ├── +ccbob_cmos │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ ├── +ccbob_lvds │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ ├── +ccbox_lvds │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ ├── hdlcoder_ref_design_customization.m │ │ └── plugin_board.m │ ├── +adrv9371x │ │ ├── +zc706 │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ └── +zcu102 │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ ├── +fmcomms2 │ │ ├── +zc702 │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ ├── +zc706 │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ ├── +zcu102 │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ └── +zed │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ ├── +fmcomms5 │ │ ├── +zc702 │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ │ └── +zc706 │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ ├── +fmcomms8 │ │ └── +zcu102 │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ ├── plugin_rd_rx.m │ │ │ ├── plugin_rd_rxtx.m │ │ │ └── plugin_rd_tx.m │ ├── +pluto │ │ ├── hdlcoder_ref_design_customization.m │ │ ├── plugin_board.m │ │ ├── plugin_rd_rx.m │ │ ├── plugin_rd_rxtx.m │ │ └── plugin_rd_tx.m │ ├── +util │ │ ├── ADIZynqSDRAttributeInfo.xml │ │ ├── ADIZynqSDRParameterInfo.xml │ │ ├── adizynqsdr.xml │ │ └── extmodeHooksADI.m │ ├── add_clocks.m │ ├── add_io.m │ ├── add_io_ports.m │ ├── get_memory_axi_interface_info.m │ ├── install.m │ ├── plugin_board.m │ ├── plugin_rd.m │ ├── ports.json │ ├── set_params.m │ └── uninstall.m │ ├── Contents.m │ └── hdlcoder_board_customization.m ├── info.xml ├── logos ├── logo_black.png ├── logo_black.svg ├── logo_white.png └── logo_white.svg ├── test ├── @LTE_DemodTMN │ ├── DemodLTEWaveform.m │ ├── DemodSymbs.m │ ├── EVMSubframe.m │ ├── EstimateChannel.m │ ├── FrequencyOffsetCellRS.m │ ├── GenLTEWaveform.m │ ├── GetEVMWindow.m │ ├── LTE_DemodTMN.m │ └── Sync.m ├── AD9361Tests.m ├── AD9363Tests.m ├── AD9364Tests.m ├── AD9371Tests.m ├── ADRV9002Tests.m ├── ADRV9009Tests.m ├── ADRV9009ZU11EGTests.m ├── BSPInstallerTests.m ├── BSPTests.m ├── BSPTestsBase.m ├── DemoTests.m ├── FMComms5Tests.m ├── FMComms8Tests.m ├── HardwareTests.m ├── LTE15_MHz.ftr ├── LTE_Tests │ ├── AD936x_LTETests.m │ ├── LTETests.m │ ├── ad936x_filters │ │ ├── LTE10_MHz.ftr │ │ ├── LTE15_MHz.ftr │ │ ├── LTE20_MHz.ftr │ │ └── LTE5_MHz.ftr │ ├── details_recording_plugin.m │ └── runLTETests.m ├── ModemTests.m ├── NonHWTest.m ├── SysObjsTests.m ├── TestAppGUI.m ├── Tx_BW100_IR122p88_Rx_BW100_OR122p88_ORx_BW100_OR122p88_DC122p88.txt ├── Tx_BW200_IR245p76_Rx_BW100_OR122p88_ORx_BW200_OR245p76_ADRV9009.txt ├── Tx_BW200_IR245p76_Rx_BW200_OR245p76_ORx_BW200_OR245p76_ADRV9009.txt ├── Tx_BW200_IR245p76_Rx_BW200_OR245p76_ORx_BW200_OR245p76_DC245p76.txt ├── Tx_BW400_IR491p52_Rx_BW200_OR245p76_ORx_BW400_OR491p52_DC245p76.txt ├── adrv9002_profiles │ ├── lte_10_lvds_nco_api_68_0_6.json │ ├── lte_10_lvds_nco_api_68_0_6.stream │ ├── lte_10_lvds_nco_api_68_8_1.json │ ├── lte_10_lvds_nco_api_68_8_1.stream │ ├── lte_20_lvds_api_68_0_6.json │ ├── lte_20_lvds_api_68_0_6.stream │ ├── lte_20_lvds_api_68_8_1.json │ ├── lte_20_lvds_api_68_8_1.stream │ ├── lte_40_lvds_api_68_0_6.json │ ├── lte_40_lvds_api_68_0_6.stream │ ├── lte_40_lvds_api_68_8_1.json │ ├── lte_40_lvds_api_68_8_1.stream │ ├── lte_5_cmos_api_68_0_6.json │ ├── lte_5_cmos_api_68_0_6.stream │ ├── lte_5_cmos_api_68_8_1.json │ └── lte_5_cmos_api_68_8_1.stream ├── board_variants.m ├── build_design.m ├── customAD9361filter.ftr ├── getClasses.m ├── get_ref_name.m ├── graphicalInstaller.m ├── perf │ ├── HardwarePerformanceTests.m │ ├── LTETests.m │ └── hwTestRunner.m ├── profile_TxBW100_ORxBW100_RxBW100.txt ├── profile_TxBW50_ORxBW50_RxBW50.txt ├── runDemoTests.m ├── runHWTests.m ├── runInstallerTests.m ├── runNonHWTest.m ├── runSynthTests.m ├── runTests.m ├── setportmapping.m ├── testModel_Rx16Tx32_regs.slx ├── testModel_Tx32_regs.slx └── testModel_regs.slx └── trx_examples ├── streaming ├── LTE_PA_App │ ├── @LTEAppInternals │ │ ├── LTEAppInternals.m │ │ ├── PlutoRadio.m │ │ ├── lte10_filter_rx.mat │ │ ├── lte10_filter_tx.mat │ │ ├── lte15_filter_rx.mat │ │ ├── lte15_filter_tx.mat │ │ ├── lte20_filter_rx.mat │ │ ├── lte20_filter_tx.mat │ │ ├── lte3_filter_rx.mat │ │ ├── lte3_filter_tx.mat │ │ ├── lte5_filter_rx.mat │ │ └── lte5_filter_tx.mat │ ├── @LTETestModelWaveform │ │ ├── DemodSymbs.m │ │ ├── EVMSubframe.m │ │ ├── EstimateChannel.m │ │ ├── LTETestModelWaveform.m │ │ ├── Sync.m │ │ ├── frequencyOffsetCellRS.m │ │ └── getEVMWindow.m │ ├── LTEApp.m │ ├── genLTEPAInstaller.m │ └── img │ │ ├── Analog_Devices_Logo.png │ │ ├── LTEAPP_splash.png │ │ ├── doc.png │ │ ├── grid.png │ │ ├── play.png │ │ ├── refresh.png │ │ ├── step.png │ │ └── stop.png ├── ad936x │ ├── ADIRFSOM_DDS_Example.m │ ├── ADIRFSOM_DMA_Example.m │ ├── Pluto_DDS_Example.m │ └── Pluto_DMA_Example.m ├── ad9371 │ ├── AD9371_DDS_Example.m │ ├── AD9371_DMA_Example.m │ ├── AD9371_MIMO_Example.m │ └── profile_TxBW100_ORxBW100_RxBW100.txt ├── adrv9002 │ ├── ADRV9002_DDS_Example.m │ ├── ADRV9002_DMA_Example.m │ ├── lte_5_cmos_api_48_8_7.json │ └── lte_5_cmos_api_48_8_7.stream ├── adrv9009 │ ├── ADRV9009ZU11EG_Example.m │ ├── ADRV9009_DDS_Example.m │ ├── ADRV9009_DMA_Example.m │ ├── ADRV9009_ORx_Example.m │ ├── Tx_BW200_IR245p76_Rx_BW100_OR122p88_ORx_BW200_OR245p76_DC245p76.txt │ └── Tx_BW200_IR245p76_Rx_BW200_OR245p76_ORx_BW200_OR245p76_ADRV9009.txt └── legacy │ ├── ADSB_MATLAB │ ├── AltVelCalc.m │ ├── ConvertFracDeg.m │ ├── LICENSE │ ├── LatLongCalcSingleADI.m │ ├── ModeS_BitDecode4.m │ ├── ModeS_DataSearch4.m │ ├── ModeS_ReadMsg4.m │ ├── ModeS_Receiver.m │ ├── ad9361.cfg │ ├── ad9361_ModeS.m │ └── newModeS.mat │ ├── ADSB_Simulink │ ├── AltVelCalc.m │ ├── ConvertFracDeg.m │ ├── DecodeBits.m │ ├── LatLongCalcSingle.m │ ├── ModeS_FixPt_Pipelined_ADI.slx │ ├── ModeS_Simulink_Decode.mdl │ └── data_Yb.mat │ ├── ADSB_Simulink_libiio │ ├── AltVelCalc.m │ ├── ConvertFracDeg.m │ ├── DecodeBits.m │ ├── LatLongCalcSingle.m │ ├── ModeS_Simulink_libiio.slx │ ├── ad9361.cfg │ └── data_Yb.mat │ ├── ADSB_transmitter │ ├── adsbTxGen.m │ └── txData.mat │ ├── LTE_MATLAB │ ├── LTE10_MHz.ftr │ ├── LTE1p4_MHz.ftr │ ├── LTE3_MHz.ftr │ ├── LTE5_MHz.ftr │ ├── LTEReceiver.m │ ├── PDSCHEVM.m │ ├── ad9361.cfg │ ├── ad9361_LTE.m │ ├── ad9361_LTE_2ch.m │ └── demo.m │ ├── adrv9009 │ ├── adrv9009.cfg │ └── adrv9009_matlab.m │ ├── adrv9371 │ ├── ad9371.cfg │ └── ad9371_matlab.m │ ├── daq2_data_stream │ ├── daq2.cfg │ └── daq2_sim.slx │ ├── fmcomms2_3_data_stream │ ├── ad9361.cfg │ ├── ad9361_matlab.m │ └── ad9361_sim.slx │ ├── fmcomms4_data_stream │ ├── ad9364.cfg │ └── ad9364_sim.slx │ ├── fmcomms5_data_stream │ ├── ad9361-1.cfg │ ├── ad9361-2.cfg │ └── fmcomms5.slx │ ├── ieee80211_beacon_rx │ ├── ad9361.cfg │ ├── wlan80211BeaconRx.slx │ ├── wlan80211BeaconRxInit.m │ └── wlan80211BeaconRxModelParams.m │ └── qpsktxrx │ ├── ad9361.cfg │ ├── qpsktxrx.slx │ ├── sdrqpskrx.mat │ └── sdrqpsktx.mat └── targeting ├── frequency-hopping ├── +AnalogDevicesDemo │ └── +adrv9361z7035 │ │ ├── +ccfmc_lvds_hop │ │ └── +rxtx │ │ │ ├── add_rx_tx_io.m │ │ │ ├── hdlcoder_ref_design_customization.m │ │ │ ├── plugin_board.m │ │ │ └── plugin_rd.m │ │ └── +common │ │ ├── add_io.m │ │ ├── hdlcoder_ref_design_customization.m │ │ ├── plugin_board.m │ │ └── plugin_rd.m ├── FrequencyHopper.m ├── adi_build.tcl ├── build_kernel.sh ├── ccfmc_lvds_hop │ ├── fh_preprocess.tcl │ └── system_top.v ├── devicetree.dtb ├── fastlock.m ├── frequency_hopping.slx ├── hdlcoder_board_customization.m ├── hdlworkflow.m ├── hop_result.bmp └── hopper.patch ├── loopback-delay-estimation ├── custom_filter.ftr ├── find_corr_threshold.m ├── hdlworkflow.m ├── initScript.m ├── loopback_delay_estimation.slx ├── run_loopback_tests.m └── zc_out_data_fd.bb └── tuneAGC-ad9361 ├── +AnalogDevicesAGCDemo └── +adrv9361z7035 │ ├── +ccfmc_lvds_agc │ └── +rx │ │ ├── add_rx_io.m │ │ ├── hdlcoder_ref_design_customization.m │ │ ├── plugin_board.m │ │ └── plugin_rd.m │ └── +common │ ├── hdlcoder_ref_design_customization.m │ ├── plugin_board.m │ └── plugin_rd.m ├── AD9361TRx.m ├── ModeS_testbench.slx ├── ad9361_rx_wlan_testbench.slx ├── ad9361_rx_wlan_testbench_targeting.slx ├── adi_ad9361_models.slx ├── captures ├── IQData_m20.bb ├── IQData_m25.bb ├── IQData_m30.bb ├── IQData_m40.bb ├── IQData_m50.bb ├── IQData_m60.bb └── IQData_m70.bb ├── ccfmc_lvds_agc ├── system_top.v ├── tune_agc_postprocess.tcl └── tune_agc_preprocess.tcl ├── demod80211aTestWaveform.m ├── gen80211aTestWaveform.m ├── hdlcoder_board_customization.m ├── hdlworkflow.m ├── reg ├── Makefile ├── agc_ctrl.sh ├── devicetree.dts ├── reg.c └── reg.h ├── run_testbench.m ├── support ├── CollectBeacons.m ├── genBeacon.m ├── lltf.mat ├── nonHTBeaconRxMPDUDecode.m └── offline.m ├── tuneAD9361AGC.m └── tuneAGCad9361Tests.m /+adi/+AD9363/Rx.m: -------------------------------------------------------------------------------- 1 | classdef Rx < adi.AD9361.Rx 2 | % adi.AD9363.Rx Receive data from the AD9363 transceiver 3 | % The adi.AD9363.Rx System object is a signal source that can receive 4 | % complex data from the AD9364. 5 | % 6 | % rx = adi.AD9363.Rx; 7 | % rx = adi.AD9363.Rx('uri','192.168.2.1'); 8 | % 9 | % AD9363 Datasheet 10 | % 11 | % See also adi.Pluto.Rx 12 | 13 | methods 14 | %% Constructor 15 | function obj = Rx(varargin) 16 | % Returns the matlabshared.libiio.base object 17 | coder.allowpcode('plain'); 18 | obj = obj@adi.AD9361.Rx(varargin{:}); 19 | end 20 | end 21 | 22 | end 23 | 24 | -------------------------------------------------------------------------------- /+adi/+AD9363/Tx.m: -------------------------------------------------------------------------------- 1 | classdef Tx < adi.AD9361.Tx 2 | % adi.AD9363.Tx Transmit data from the AD9364 transceiver 3 | % The adi.AD9363.Tx System object is a signal sink that can 4 | % transmit complex data from the AD9364. 5 | % 6 | % tx = adi.AD9363.Tx; 7 | % tx = adi.AD9363.Tx('uri','192.168.2.1'); 8 | % 9 | % AD9363 Datasheet 10 | % 11 | % See also adi.Pluto.Tx 12 | 13 | methods 14 | %% Constructor 15 | function obj = Tx(varargin) 16 | % Returns the matlabshared.libiio.base object 17 | coder.allowpcode('plain'); 18 | obj = obj@adi.AD9361.Tx(varargin{:}); 19 | end 20 | end 21 | 22 | end 23 | 24 | -------------------------------------------------------------------------------- /+adi/+AD9364/Rx.m: -------------------------------------------------------------------------------- 1 | classdef Rx < adi.AD9361.Rx 2 | % adi.AD9364.Rx Receive data from the AD9364 transceiver 3 | % The adi.AD9361.Rx System object is a signal source that can receive 4 | % complex data from the AD9364. 5 | % 6 | % rx = adi.AD9364.Rx; 7 | % rx = adi.AD9364.Rx('uri','192.168.2.1'); 8 | % 9 | % AD9364 Datasheet 10 | % 11 | % See also adi.FMComms4.Rx 12 | 13 | methods 14 | %% Constructor 15 | function obj = Rx(varargin) 16 | % Returns the matlabshared.libiio.base object 17 | coder.allowpcode('plain'); 18 | obj = obj@adi.AD9361.Rx(varargin{:}); 19 | end 20 | end 21 | 22 | end 23 | 24 | -------------------------------------------------------------------------------- /+adi/+AD9364/Tx.m: -------------------------------------------------------------------------------- 1 | classdef Tx < adi.AD9361.Tx 2 | % adi.AD9364.Tx Transmit data from the AD9364 transceiver 3 | % The adi.AD9361.Rx System object is a signal sink that can 4 | % transmit complex data from the AD9364. 5 | % 6 | % tx = adi.AD9364.Tx; 7 | % tx = adi.AD9364.Tx('uri','192.168.2.1'); 8 | % 9 | % AD9364 Datasheet 10 | % 11 | % See also adi.FMComms4.Tx 12 | 13 | methods 14 | %% Constructor 15 | function obj = Tx(varargin) 16 | % Returns the matlabshared.libiio.base object 17 | coder.allowpcode('plain'); 18 | obj = obj@adi.AD9361.Tx(varargin{:}); 19 | end 20 | end 21 | 22 | end 23 | 24 | -------------------------------------------------------------------------------- /+adi/+ADRV9361Z7035/Rx.m: -------------------------------------------------------------------------------- 1 | classdef Rx < adi.AD9361.Rx 2 | % adi.ADRV9361Z7035.Rx Receive data from the ADRV9361Z7035 SOM 3 | % The adi.ADRV9361Z7035.Rx System object is a signal source that can 4 | % receive complex data from the ADRV9361Z7035. 5 | % 6 | % rx = adi.ADRV9361Z7035.Rx; 7 | % rx = adi.ADRV9361Z7035.Rx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9361.Rx 12 | methods 13 | %% Constructor 14 | function obj = Rx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9361.Rx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+ADRV9361Z7035/Tx.m: -------------------------------------------------------------------------------- 1 | classdef Tx < adi.AD9361.Tx 2 | % adi.ADRV9361Z7035.Tx Transmit data from the ADRV9361Z7035 SOM 3 | % The adi.ADRV9361Z7035.Tx System object is a signal source that can 4 | % send complex data to the FMComms2. 5 | % 6 | % tx = adi.ADRV9361Z7035.Tx; 7 | % tx = adi.ADRV9361Z7035.Tx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9361.Tx 12 | methods 13 | %% Constructor 14 | function obj = Tx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9361.Tx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+ADRV9364Z7020/Rx.m: -------------------------------------------------------------------------------- 1 | classdef Rx < adi.AD9364.Rx 2 | % adi.ADRV9364Z7020.Tx Transmit data from the ADRV9364Z7020 SOM 3 | % The adi.ADRV9364Z7020.Tx System object is a signal source that can 4 | % send complex data to the FMComms4. 5 | % 6 | % tx = adi.ADRV9364Z7020.Tx; 7 | % tx = adi.ADRV9364Z7020.Tx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9364.Tx 12 | methods 13 | %% Constructor 14 | function obj = Rx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9364.Rx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+ADRV9364Z7020/Tx.m: -------------------------------------------------------------------------------- 1 | classdef Tx < adi.AD9364.Tx 2 | % adi.ADRV9364Z7020.Tx Transmit data from the ADRV9364Z7020 SOM 3 | % The adi.ADRV9364Z7020.Tx System object is a signal sink that can 4 | % transmit complex data from the FMComms4. 5 | % 6 | % tx = adi.ADRV9364Z7020.Tx; 7 | % tx = adi.ADRV9364Z7020.Tx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9364.Tx 12 | methods 13 | %% Constructor 14 | function obj = Tx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9364.Tx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+ADRV9371/Rx.m: -------------------------------------------------------------------------------- 1 | classdef Rx < adi.AD9371.Rx 2 | % adi.ADRV9371.Rx Receive data from the ADRV9371 evaluation platform 3 | % The adi.ADRV9371.Rx System object is a signal source that can receive 4 | % complex data from the ADRV9371. 5 | % 6 | % rx = adi.AD9371.Rx; 7 | % rx = adi.AD9371.Rx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9371.Rx 12 | methods 13 | %% Constructor 14 | function obj = Rx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9371.Rx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+ADRV9371/Tx.m: -------------------------------------------------------------------------------- 1 | classdef Tx < adi.AD9371.Tx 2 | % adi.ADRV9371.Tx Transmit data to the ADRV9371 evaluation platform 3 | % The adi.ADRV9371.Tx System object is a signal sink that can send 4 | % complex data to the ADRV9371. 5 | % 6 | % tx = adi.AD9371.Tx; 7 | % tx = adi.AD9371.Tx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9371.Tx 12 | methods 13 | %% Constructor 14 | function obj = Tx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9371.Tx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+FMComms2/Rx.m: -------------------------------------------------------------------------------- 1 | classdef Rx < adi.AD9361.Rx 2 | % adi.FMComms2.Rx Receive data from the FMComms2 evaluation platform 3 | % The adi.FMComms2.Rx System object is a signal source that can 4 | % receive complex data from the FMComms2. 5 | % 6 | % rx = adi.FMComms2.Rx; 7 | % rx = adi.FMComms2.Rx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9361.Rx 12 | methods 13 | %% Constructor 14 | function obj = Rx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9361.Rx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+FMComms2/Tx.m: -------------------------------------------------------------------------------- 1 | classdef Tx < adi.AD9361.Tx 2 | % adi.FMComms2.Tx Transmit data from the FMComms2 evaluation platform 3 | % The adi.FMComms2.Tx System object is a signal source that can 4 | % send complex data to the FMComms2. 5 | % 6 | % tx = adi.FMComms2.Tx; 7 | % tx = adi.FMComms2.Tx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9361.Tx 12 | methods 13 | %% Constructor 14 | function obj = Tx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9361.Tx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+FMComms3/Rx.m: -------------------------------------------------------------------------------- 1 | classdef Rx < adi.AD9361.Rx 2 | % adi.FMComms3.Rx Receive data from the FMComms3 evaluation platform 3 | % The adi.FMComms3.Rx System object is a signal source that can 4 | % receive complex data from the FMComms2. 5 | % 6 | % rx = adi.FMComms3.Rx; 7 | % rx = adi.FMComms3.Rx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9361.Rx 12 | methods 13 | %% Constructor 14 | function obj = Rx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9361.Rx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+FMComms3/Tx.m: -------------------------------------------------------------------------------- 1 | classdef Tx < adi.AD9361.Tx 2 | % adi.FMComms3.Tx Transmit data from the FMComms3 evaluation platform 3 | % The adi.FMComms3.Tx System object is a signal source that can 4 | % send complex data to the FMComms2. 5 | % 6 | % tx = adi.FMComms3.Tx; 7 | % tx = adi.FMComms3.Tx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9361.Tx 12 | methods 13 | %% Constructor 14 | function obj = Tx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9361.Tx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+FMComms4/Rx.m: -------------------------------------------------------------------------------- 1 | classdef Rx < adi.AD9364.Rx 2 | % adi.FMComms4.Tx Transmit data from the FMComms4 evaluation platform 3 | % The adi.FMComms4.Tx System object is a signal source that can 4 | % send complex data to the FMComms4. 5 | % 6 | % tx = adi.FMComms4.Tx; 7 | % tx = adi.FMComms4.Tx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9364.Tx 12 | methods 13 | %% Constructor 14 | function obj = Rx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9364.Rx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+FMComms4/Tx.m: -------------------------------------------------------------------------------- 1 | classdef Tx < adi.AD9364.Tx 2 | % adi.FMComms4.Tx Transmit data from the FMComms4 evaluation board 3 | % The adi.FMComms4.Tx System object is a signal sink that can 4 | % transmit complex data from the FMComms4. 5 | % 6 | % tx = adi.FMComms4.Tx; 7 | % tx = adi.FMComms4.Tx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9364.Tx 12 | methods 13 | %% Constructor 14 | function obj = Tx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9364.Tx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+FMComms8/Rx.m: -------------------------------------------------------------------------------- 1 | classdef Rx < adi.ADRV9009ZU11EG.Rx 2 | % adi.FMComms8.Tx Transmit data from the FMComms8 evaluation platform 3 | % The adi.FMComms8.Tx System object is a signal source that can 4 | % send complex data to the FMComms8. 5 | % 6 | % tx = adi.FMComms8.Tx; 7 | % tx = adi.FMComms8.Tx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.FMComms8.Tx 12 | methods 13 | 14 | %% Constructor 15 | function obj = Rx(varargin) 16 | % Returns the matlabshared.libiio.base object 17 | coder.allowpcode('plain'); 18 | obj = obj@adi.ADRV9009ZU11EG.Rx(varargin{:}); 19 | obj.phyDevName = 'adrv9009-phy-c'; 20 | obj.phyDevNameChipB = 'adrv9009-phy-d'; 21 | end 22 | 23 | end 24 | 25 | end 26 | -------------------------------------------------------------------------------- /+adi/+FMComms8/Tx.m: -------------------------------------------------------------------------------- 1 | classdef Tx < adi.ADRV9009ZU11EG.Tx 2 | % adi.FMComms8.Tx Transmit data from the FMComms8 evaluation board 3 | % The adi.FMComms8.Tx System object is a signal sink that can 4 | % transmit complex data from the FMComms8. 5 | % 6 | % tx = adi.FMComms8.Tx; 7 | % tx = adi.FMComms8.Tx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.FMComms8.Rx 12 | methods 13 | 14 | %% Constructor 15 | function obj = Tx(varargin) 16 | % Returns the matlabshared.libiio.base object 17 | coder.allowpcode('plain'); 18 | obj = obj@adi.ADRV9009ZU11EG.Tx(varargin{:}); 19 | obj.phyDevName = 'adrv9009-phy-c'; 20 | obj.phyDevNameChipB = 'adrv9009-phy-d'; 21 | end 22 | 23 | end 24 | 25 | end 26 | -------------------------------------------------------------------------------- /+adi/+Pluto/Rx.m: -------------------------------------------------------------------------------- 1 | classdef Rx < adi.AD9363.Rx 2 | % adi.Pluto.Tx Transmit data from the Pluto evaluation platform 3 | % The adi.Pluto.Tx System object is a signal source that can 4 | % send complex data to the Pluto. 5 | % 6 | % tx = adi.Pluto.Tx; 7 | % tx = adi.Pluto.Tx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9363.Tx 12 | methods 13 | %% Constructor 14 | function obj = Rx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9363.Rx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+Pluto/Tx.m: -------------------------------------------------------------------------------- 1 | classdef Tx < adi.AD9363.Tx 2 | % adi.Pluto.Tx Transmit data from the Pluto evaluation board 3 | % The adi.Pluto.Tx System object is a signal sink that can 4 | % transmit complex data from the Pluto. 5 | % 6 | % tx = adi.Pluto.Tx; 7 | % tx = adi.Pluto.Tx('uri','192.168.2.1'); 8 | % 9 | % Product Page 10 | % 11 | % See also adi.AD9363.Tx 12 | methods 13 | %% Constructor 14 | function obj = Tx(varargin) 15 | % Returns the matlabshared.libiio.base object 16 | coder.allowpcode('plain'); 17 | obj = obj@adi.AD9363.Tx(varargin{:}); 18 | end 19 | end 20 | 21 | end 22 | 23 | -------------------------------------------------------------------------------- /+adi/+utils/Downloader.m: -------------------------------------------------------------------------------- 1 | classdef Downloader < adi.utils.libad9361 2 | 3 | properties (Constant) 4 | PossibleDependencies = {'libad9361'}; 5 | end 6 | 7 | methods 8 | 9 | function download(obj,dep) 10 | if nargin == 0 11 | fprintf('Specific dependency name on input. Options are:\n%s',obj.PossibleDependencies); 12 | end 13 | switch dep 14 | case 'libad9361' 15 | download_libad9361(obj); 16 | otherwise 17 | error('Unknown dependency %s',dep); 18 | end 19 | end 20 | 21 | end 22 | end 23 | 24 | -------------------------------------------------------------------------------- /+adi/+utils/Step2.m: -------------------------------------------------------------------------------- 1 | classdef Step2 < adi.StepBase 2 | 3 | % Copyright 2017 The MathWorks, Inc. 4 | 5 | methods 6 | function obj = Step2(varargin) 7 | obj@adi.StepBase(varargin{:}); 8 | 9 | % obj.Workflow.InstallDriverWorkflow = true; 10 | 11 | obj.Title.Text = 'ADI Board Support Package Installer: Step2'; 12 | 13 | obj.InfoText1.Position = [20 340 400 30]; 14 | obj.InfoText1.Text = 'Test1: Step2'; 15 | 16 | obj.InfoText2.Position = [20 290 400 50]; 17 | obj.InfoText2.Text = 'Test2: Step2'; 18 | 19 | obj.HelpText.AboutSelection = 'About Selection: Step2'; 20 | obj.HelpText.WhatToConsider = 'Test3: Step2'; 21 | end 22 | 23 | function out = getNextScreenID(obj) 24 | % HSA infrastructure requires a "getNextScreenID" method implemented 25 | % in the leaf class. Otherwise, it renders "Finish" button instead of 26 | % "Next". 27 | out = getNextScreenIDImpl(obj); 28 | end 29 | 30 | function restoreScreen(obj) 31 | obj.enableScreen(); 32 | end 33 | end 34 | 35 | methods (Access = protected) 36 | 37 | function out = getNextScreenIDImpl(~) 38 | out = 'adi.Step3'; 39 | end 40 | 41 | end 42 | 43 | end 44 | -------------------------------------------------------------------------------- /+adi/+utils/Step3.m: -------------------------------------------------------------------------------- 1 | classdef Step3 < adi.StepBase 2 | 3 | % Copyright 2017 The MathWorks, Inc. 4 | 5 | methods 6 | function obj = Step3(varargin) 7 | obj@adi.StepBase(varargin{:}); 8 | 9 | % obj.Workflow.InstallDriverWorkflow = true; 10 | 11 | obj.Title.Text = 'ADI Board Support Package Installer: Step3'; 12 | 13 | obj.InfoText1.Position = [20 340 400 30]; 14 | obj.InfoText1.Text = 'Test1: Step3'; 15 | 16 | obj.InfoText2.Position = [20 290 400 50]; 17 | obj.InfoText2.Text = 'Test2: Step3'; 18 | 19 | obj.HelpText.AboutSelection = 'About Selection: Step3'; 20 | obj.HelpText.WhatToConsider = 'Test3: Step3'; 21 | end 22 | 23 | % function out = getNextScreenID(obj) 24 | % % HSA infrastructure requires a "getNextScreenID" method implemented 25 | % % in the leaf class. Otherwise, it renders "Finish" button instead of 26 | % % "Next". 27 | % out = getNextScreenIDImpl(obj); 28 | % end 29 | 30 | function restoreScreen(obj) 31 | obj.enableScreen(); 32 | end 33 | end 34 | 35 | methods (Access = protected) 36 | 37 | function out = getNextScreenIDImpl(~) 38 | out = 'adi.Step3'; 39 | end 40 | 41 | end 42 | 43 | end 44 | -------------------------------------------------------------------------------- /+adi/+utils/StepBase.m: -------------------------------------------------------------------------------- 1 | classdef StepBase < matlab.hwmgr.internal.hwsetup.TemplateBase 2 | 3 | properties 4 | InfoText1 5 | InfoText2 6 | InfoText3 7 | end 8 | 9 | methods 10 | function obj = StepBase(varargin) 11 | obj@matlab.hwmgr.internal.hwsetup.TemplateBase(varargin{:}); 12 | 13 | parentContainer = obj.ContentPanel; 14 | 15 | obj.InfoText1 = matlab.hwmgr.internal.hwsetup.Label.getInstance(parentContainer); 16 | obj.InfoText1.Position = [20 290 400 80]; 17 | obj.InfoText1.Text = ''; 18 | obj.InfoText1.Color = matlab.hwmgr.internal.hwsetup.util.Color.WHITE; 19 | 20 | obj.InfoText2 = matlab.hwmgr.internal.hwsetup.Label.getInstance(parentContainer); 21 | obj.InfoText2.Position = [20 230 400 50]; 22 | obj.InfoText2.Text = ''; 23 | obj.InfoText2.Color = matlab.hwmgr.internal.hwsetup.util.Color.WHITE; 24 | 25 | obj.InfoText3 = matlab.hwmgr.internal.hwsetup.Label.getInstance(parentContainer); 26 | obj.InfoText3.Position = [20 170 400 50]; 27 | obj.InfoText3.Text = ''; 28 | obj.InfoText3.Color = matlab.hwmgr.internal.hwsetup.util.Color.WHITE; 29 | 30 | 31 | obj.HelpText.AboutSelection = ''; 32 | obj.HelpText.WhatToConsider = ''; 33 | 34 | if strcmp(obj.Workflow.FirstScreenID, class(obj)) 35 | obj.BackButton.Visible = 'off'; 36 | obj.BackButton.Enable = 'off'; 37 | end 38 | end 39 | 40 | function restoreScreen(obj) 41 | obj.enableScreen(); 42 | end 43 | end 44 | 45 | % methods (Access = protected, Abstract) 46 | % status = installDriverImpl(obj) 47 | % end 48 | 49 | end 50 | -------------------------------------------------------------------------------- /+adi/Version.m: -------------------------------------------------------------------------------- 1 | classdef Version 2 | %Version 3 | % BSP Version information 4 | properties(Constant) 5 | HDL = 'hdl_2022_r2'; 6 | Vivado = '2022.2'; 7 | MATLAB = 'R2023b'; 8 | Release = '23.2.2'; 9 | AppName = 'Analog Devices, Inc. Transceiver Toolbox'; 10 | ToolboxName = 'TransceiverToolbox'; 11 | ToolboxNameShort = 'trx'; 12 | ExamplesDir = 'trx_examples'; 13 | HasHDL = true; 14 | end 15 | properties(Dependent) 16 | VivadoShort 17 | end 18 | 19 | methods 20 | function value = get.VivadoShort(obj) 21 | value = obj.Vivado(1:6); 22 | end 23 | end 24 | end 25 | 26 | -------------------------------------------------------------------------------- /.github/workflows/doc.yml: -------------------------------------------------------------------------------- 1 | name: Documentation 2 | 3 | on: [push, pull_request] 4 | 5 | jobs: 6 | BuildDocs: 7 | runs-on: ubuntu-latest 8 | 9 | steps: 10 | - uses: actions/checkout@v2 11 | with: 12 | submodules: recursive 13 | - name: Set up Python 3.9 14 | uses: actions/setup-python@v2 15 | with: 16 | python-version: 3.9 17 | 18 | - name: Set up MATLAB 19 | uses: matlab-actions/setup-matlab@v2 20 | with: 21 | release: R2023b 22 | products: > 23 | Signal_Processing_Toolbox 24 | DSP_System_Toolbox 25 | Communications_Toolbox 26 | Communications_Toolbox_Support_Package_for_Analog_Devices_ADALM-Pluto_Radio 27 | 28 | - name: Install dependencies 29 | run: | 30 | sudo apt install -y python3-numpy 31 | pip install -r CI/doc/requirements_doc.txt 32 | 33 | - name: Generate MATLAB side of doc 34 | uses: matlab-actions/run-command@v1 35 | with: 36 | command: addpath(genpath('.')); gen_sysobj_doc; exit(); 37 | 38 | - name: Check doc build 39 | run: | 40 | make -C CI/doc gen_autodocs html 41 | 42 | - name: Publish master doc 43 | if: github.ref == 'refs/heads/master' 44 | uses: peaceiris/actions-gh-pages@v3 45 | with: 46 | github_token: ${{ secrets.GITHUB_TOKEN }} 47 | publish_dir: ./CI/doc/build/html 48 | destination_dir: master 49 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | *.mlappinstall 2 | *.mexw64 3 | **/slprj/** 4 | AD9361_Filter_Wizard/*TestFiltWiz*.m 5 | AD9361_Filter_Wizard/.previous_ip_addr 6 | _generated/* -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "+adi/+common"] 2 | path = +adi/+common 3 | url = https://github.com/analogdevicesinc/ToolboxCommon.git 4 | branch = master 5 | -------------------------------------------------------------------------------- /CI/ci_flags.md: -------------------------------------------------------------------------------- 1 | # CI Signaling 2 | 3 | Its possible to configure CI on build a project based on flags in the commit message. This is done by adding a special line to the commit that starts with CI: (must be all caps). The line can contain a list of flags separated by semi-colons. The following flags are supported: 4 | - skip= 5 | - skip_branch=: 6 | - enable_only_branch=: 7 | - env:= 8 | -------------------------------------------------------------------------------- /CI/doc/Makefile: -------------------------------------------------------------------------------- 1 | # Minimal makefile for Sphinx documentation 2 | # 3 | 4 | # You can set these variables from the command line, and also 5 | # from the environment for the first two. 6 | SPHINXOPTS ?= 7 | SPHINXBUILD ?= sphinx-build 8 | SOURCEDIR = source 9 | BUILDDIR = build 10 | 11 | PYTHON = python 12 | 13 | # Put it first so that "make" without argument is like "make help". 14 | help: 15 | @$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O) 16 | 17 | .PHONY: help Makefile 18 | 19 | # Catch-all target: route all unknown targets to Sphinx using the new 20 | # "make mode" option. $(O) is meant as a shortcut for $(SPHINXOPTS). 21 | %: Makefile 22 | @$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O) 23 | 24 | gen_autodocs: 25 | cd gen_pages ; \ 26 | $(PYTHON) gen_sysobj_pages.py ; \ 27 | $(PYTHON) gen_rd_svg.py ; \ 28 | $(PYTHON) gen_hdl_refdesigns.py 29 | -------------------------------------------------------------------------------- /CI/doc/README_doc.md: -------------------------------------------------------------------------------- 1 | # Doc Creation 2 | 3 | Doc is create by leveraging Sphinx as the documentation engine. To create the entire documentation set you must generate the dynamic pages which document the system object APIs and the reference designs. Then the output targets can be run. Since doc gen requires sphinx and some plugins they need to be installed first and ideally in a virtual environment. The following commands will create a virtual environment and install the necessary packages: 4 | 5 | ```bash 6 | python3 -m venv venv 7 | source venv/bin/activate 8 | pip install -r CI/doc/requirements_doc.txt 9 | ``` 10 | 11 | Next we can build the documentation. The following commands will build the documentation and place it in the *build* folder under the *CI/doc* folder: 12 | 13 | ```bash 14 | make -C CI/doc gen_autodocs html 15 | ``` 16 | 17 | ## Updating the System Object Documentation 18 | 19 | The system object documentation is generated from the MATLAB code and comments, which requires use of MATLAB itself. By running the script gen_sysobj_doc.m within the *gen_pages* folder, it will create the necessary sysobjs.json file which sphinx will then use to create the individual component pages. This is done by running the following command from the root of the toolbox in MATLAB: 20 | 21 | ```matlab 22 | cd CI/doc/gen_pages 23 | gen_sysobj_doc 24 | ``` 25 | -------------------------------------------------------------------------------- /CI/doc/gen_pages/Makefile: -------------------------------------------------------------------------------- 1 | # Define the Python interpreter 2 | PYTHON = python 3 | 4 | # Define the targets and their dependencies 5 | all: gen_sysobj_pages gen_rd_svg gen_hdl_refdesigns 6 | 7 | gen_sysobj_pages: 8 | $(PYTHON) gen_sysobj_pages.py 9 | 10 | gen_rd_svg: 11 | $(PYTHON) gen_rd_svg.py 12 | 13 | gen_hdl_refdesigns: 14 | $(PYTHON) gen_hdl_refdesigns.py -------------------------------------------------------------------------------- /CI/doc/gen_pages/_templates/allrefdesigns.tmpl: -------------------------------------------------------------------------------- 1 | {% include 'header.tmpl' %} 2 | # HDL Reference Designs 3 | 4 | Available hardware streaming interfaces in HSX Toolbox: 5 | 8 | 9 | ```{eval-rst} 10 | .. toctree:: 11 | :maxdepth: 1 12 | {% for obj in designs %} 13 | _generated/hdlrefdesigns/{{ obj }} 14 | {%- endfor %} 15 | 16 | ``` 17 | 18 | 19 | 20 | Click on left table of contents for individual component pages. -------------------------------------------------------------------------------- /CI/doc/gen_pages/_templates/allsysobjs.tmpl: -------------------------------------------------------------------------------- 1 | {% include 'header.tmpl' %} 2 | # Hardware Interface APIs 3 | 4 | Available hardware streaming interfaces in HSX Toolbox: 5 | 8 | 9 | ```{eval-rst} 10 | .. toctree:: 11 | :maxdepth: 1 12 | {% for obj in devices %} 13 | _generated/sysobjects/{{ obj }} 14 | {%- endfor %} 15 | 16 | ``` 17 | 18 | 19 | 20 | Click on left table of contents for individual component pages. -------------------------------------------------------------------------------- /CI/doc/gen_pages/_templates/header.tmpl: -------------------------------------------------------------------------------- 1 | {%- if disable_nav -%} 2 | --- 3 | hide: 4 | - navigation 5 | - toc 6 | --- 7 | {%- endif -%} -------------------------------------------------------------------------------- /CI/doc/make.bat: -------------------------------------------------------------------------------- 1 | @ECHO OFF 2 | 3 | pushd %~dp0 4 | 5 | REM Command file for Sphinx documentation 6 | 7 | if "%SPHINXBUILD%" == "" ( 8 | set SPHINXBUILD=sphinx-build 9 | ) 10 | set SOURCEDIR=source 11 | set BUILDDIR=build 12 | 13 | if "%1" == "" goto help 14 | 15 | %SPHINXBUILD% >NUL 2>NUL 16 | if errorlevel 9009 ( 17 | echo. 18 | echo.The 'sphinx-build' command was not found. Make sure you have Sphinx 19 | echo.installed, then set the SPHINXBUILD environment variable to point 20 | echo.to the full path of the 'sphinx-build' executable. Alternatively you 21 | echo.may add the Sphinx directory to PATH. 22 | echo. 23 | echo.If you don't have Sphinx installed, grab it from 24 | echo.http://sphinx-doc.org/ 25 | exit /b 1 26 | ) 27 | 28 | %SPHINXBUILD% -M %1 %SOURCEDIR% %BUILDDIR% %SPHINXOPTS% %O% 29 | goto end 30 | 31 | :help 32 | %SPHINXBUILD% -M help %SOURCEDIR% %BUILDDIR% %SPHINXOPTS% %O% 33 | 34 | :end 35 | popd 36 | -------------------------------------------------------------------------------- /CI/doc/requirements_doc.txt: -------------------------------------------------------------------------------- 1 | sphinx>=2.0 2 | myst-parser 3 | furo 4 | sphinx-favicon 5 | sphinxcontrib-mermaid 6 | sphinx-simplepdf 7 | pillow 8 | numpy 9 | jinja2 10 | sphinx_design -------------------------------------------------------------------------------- /CI/doc/source/_static/assets/ADI_Logo_AWP_Large.png: -------------------------------------------------------------------------------- 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-------------------------------------------------------------------------------- /CI/doc/source/examples.md: -------------------------------------------------------------------------------- 1 | 2 | # Examples 3 | 4 | Examples for streaming data and targeting FPGAs are listed within the Toolbox documentation itself. To view run the following with MATLAB: 5 | 6 | ``` 7 | doc adi 8 | ``` 9 | 10 | They can also be viewed on GitHub: 11 | 12 | - [Targeting examples](https://github.com/analogdevicesinc/TransceiverToolbox/tree/master/trx_examples/targeting) 13 | - [Streaming examples](https://github.com/analogdevicesinc/TransceiverToolbox/tree/master/trx_examples/streaming) 14 | 15 | ## Highlighted Demos 16 | 17 | Certain examples have full articles that discuss different applications 18 | 19 | - [Frequency hopping](https://wiki.analog.com/resources/eval/user-guides/adrv936x_rfsom/tutorials/frequency_hopping) 20 | - [Loopback delay estimation](https://wiki.analog.com/resources/eval/user-guides/adrv936x_rfsom/tutorials/loopback_delay_estimation) 21 | - [AGC Optimization](https://wiki.analog.com/resources/eval/user-guides/ad9361_agc_tuning) 22 | - [Pluto LTE App](https://wiki.analog.com/resources/tools-software/transceiver-toolbox/examples/pluto_lte_app) -------------------------------------------------------------------------------- /CI/doc/source/targeting.md: -------------------------------------------------------------------------------- 1 | 2 | # HDL Targeting with HDL-Coder 3 | 4 | Transceiver Toolbox supports the IP Core generation flow from MathWorks which allows for automated integration of DSP into HDL reference designs from Analog Devices. This workflow will take Simulink subsystems, run HDL-Coder to generate source Verilog, and then integrate that into a larger reference design. The figure below is a simplified block diagram of a SoC (Fabric+ARM) device, where specialized IP are inserted into the receive and transmit datapaths. This is supported on specific FPGA families and transceiver based reference designs. This support is based on the Zynq HDL-Coder and support 5 | 6 | 7 | 8 | ## Recommended Review 9 | 10 | - [Getting started with Zynq](https://www.mathworks.com/support/search.html/videos/getting-started-with-zynq-80338.html?fq%5B%5D=asset_type_name:video&fq%5B%5D=category:hdlcoder/index&page=1) 11 | 12 | ## Getting Started 13 | -------------------------------------------------------------------------------- /CI/scripts/Docker: -------------------------------------------------------------------------------- 1 | FROM ubuntu:16.04 2 | 3 | MAINTAINER Travis Collins 4 | RUN DEBIAN_FRONTEND=noninteractive apt update 5 | RUN DEBIAN_FRONTEND=noninteractive apt-get install -y libpng-dev libfreetype6-dev libblas-dev liblapack-dev gfortran build-essential xorg 6 | RUN DEBIAN_FRONTEND=noninteractive apt-get install -y openjdk-8-jre openjdk-8-jdk libgtk2.0-0 libxss1 libxt6 zip unzip curl wget tar git xvfb 7 | RUN DEBIAN_FRONTEND=noninteractive apt-get install -y fakeroot libncurses5-dev libssl-dev ccache dfu-util u-boot-tools device-tree-compiler 8 | RUN DEBIAN_FRONTEND=noninteractive apt-get install -y libssl-dev mtools bc python cpio zip unzip rsync file wget 9 | RUN DEBIAN_FRONTEND=noninteractive dpkg --add-architecture i386 10 | RUN DEBIAN_FRONTEND=noninteractive apt-get install -y lib32stdc++6 11 | -------------------------------------------------------------------------------- /CI/scripts/adi_build_win.tcl: -------------------------------------------------------------------------------- 1 | global fpga_board 2 | 3 | if {[info exists fpga_board]} { 4 | puts "===========" 5 | puts $fpga_board 6 | puts "===========" 7 | } else { 8 | # Set to something not ZCU102 9 | set fpga_board "ZYNQ" 10 | } 11 | 12 | # Build the project 13 | update_compile_order -fileset sources_1 14 | reset_run impl_1 15 | reset_run synth_1 16 | launch_runs synth_1 17 | wait_on_run synth_1 18 | launch_runs impl_1 -to_step write_bitstream 19 | wait_on_run impl_1 20 | 21 | # Define local variables 22 | set cdir [pwd] 23 | set sdk_loc vivado_prj.sdk 24 | 25 | # Export the hdf 26 | file delete -force $sdk_loc 27 | file mkdir $sdk_loc 28 | write_hw_platform -fixed -force -include_bit -file $sdk_loc/system_top.xsa 29 | 30 | # Close the Vivado project 31 | close_project 32 | 33 | # Create the BOOT.bin 34 | if {$fpga_board eq "ZCU102"} { 35 | set vversion [version -short] 36 | exec xsct $cdir/projects/scripts/fsbl_build_zynqmp.tcl $vversion 37 | if {[file exist boot/BOOT.BIN] eq 0} { 38 | puts "ERROR: BOOT.BIN not built" 39 | return -code error 11 40 | } else { 41 | puts "BOOT.BIN built correctly!" 42 | } 43 | 44 | } else { 45 | exec xsct -batch $cdir/projects/scripts/fsbl_build_zynq.tcl 46 | if {[file exist boot/BOOT.BIN] eq 0} { 47 | puts "ERROR: BOOT.BIN not built" 48 | return -code error 11 49 | } else { 50 | puts "BOOT.BIN built correctly!" 51 | } 52 | } 53 | 54 | puts "------------------------------------" 55 | puts "Embedded system build completed." 56 | puts "You may close this shell." 57 | puts "------------------------------------" 58 | exit 59 | -------------------------------------------------------------------------------- /CI/scripts/boot/adrv9361/fsbl.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/CI/scripts/boot/adrv9361/fsbl.elf -------------------------------------------------------------------------------- /CI/scripts/boot/adrv9361/u-boot.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/CI/scripts/boot/adrv9361/u-boot.elf -------------------------------------------------------------------------------- /CI/scripts/boot/adrv9361/zynq.bif: -------------------------------------------------------------------------------- 1 | the_ROM_image: 2 | { 3 | [bootloader] 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-------------------------------------------------------------------------------- /CI/scripts/copy_all_packed_ips.tcl: -------------------------------------------------------------------------------- 1 | 2 | 3 | proc copy_all_packed_ips { DEST_FOLDER } { 4 | 5 | #set WD [pwd] 6 | #set DEST_FOLDER D:/Work/hdlbsp-master/vendor/AnalogDevices/vivado/library 7 | #set DEST_FOLDER $WD 8 | 9 | set folder_list [glob -types d *] 10 | foreach dir $folder_list { 11 | puts "$dir" 12 | cd $dir 13 | 14 | if {[catch {set files_list [glob *]}]} { 15 | cd .. 16 | continue 17 | } 18 | 19 | foreach file $files_list { 20 | set idx [string first .zip $file 1] 21 | if {$idx != -1} { 22 | file copy -force $file $DEST_FOLDER/$file 23 | puts $file 24 | } 25 | } 26 | cd .. 27 | 28 | # Don't remove these folders 29 | if {$dir=="common"} {continue} 30 | if {$dir=="interfaces"} {continue} 31 | if {$dir=="prcfg"} {continue} 32 | if {$dir=="scripts"} {continue} 33 | if {$dir=="xilinx"} {continue} 34 | if {$dir=="jesd204"} {continue} 35 | if {$dir=="spi_engine"} {continue} 36 | file delete -force -- $dir 37 | 38 | 39 | } 40 | 41 | } 42 | 43 | cd hdl 44 | 45 | # Move main library core zips 46 | cd library 47 | set DEST [pwd] 48 | puts $DEST 49 | copy_all_packed_ips $DEST 50 | 51 | # Move Xilinx core zips 52 | cd xilinx 53 | set DEST [pwd] 54 | copy_all_packed_ips $DEST 55 | cd .. 56 | 57 | # Move jesd204 core zips 58 | cd jesd204 59 | set DEST [pwd] 60 | copy_all_packed_ips $DEST 61 | cd .. 62 | 63 | # Move spi_engine core zips 64 | cd spi_engine 65 | set DEST [pwd] 66 | copy_all_packed_ips $DEST 67 | 68 | 69 | cd ../../.. 70 | -------------------------------------------------------------------------------- /CI/scripts/dockermake: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | docker build . -t matlabci -f CI/scripts/Docker 3 | docker run --rm -e "INCLUDE_EXAMPLES=$INCLUDE_EXAMPLES" -e "BOARD=$BOARD" -e "LM_LICENSE_FILE=$LM_LICENSE_FILE" -e "XILINXD_LICENSE_FILE=$XILINXD_LICENSE_FILE" -e "MLRELEASE=$MLRELEASE" -e "HDLBRANCH=$HDLBRANCH" -v "$(pwd):/work" -v /mlhsp:/mlhspro:ro -v /usr/local/MATLAB:/usr/local/MATLAB -v /root/.matlab:/root/.matlabro:ro -v /root/.Xilinx:/root/.Xilinxro:ro -v /opt/Xilinx:/opt/Xilinx --mac-address="$ADDR" matlabci /bin/bash -c "cd /work && chmod +x CI/scripts/setupDocker.sh && ./CI/scripts/setupDocker.sh && make -C CI/scripts '$@'" 4 | -------------------------------------------------------------------------------- /CI/scripts/fixmake.sh: -------------------------------------------------------------------------------- 1 | #grep "CC_FLAGS :=" pmufw/Makefile | grep -e "-Os" || sed -i '/-mxl-soft-mul/ s/$/ -Os -flto -ffat-lto-objects/' pmufw/Makefile 2 | cd pmufw 3 | make 4 | -------------------------------------------------------------------------------- /CI/scripts/fsbl_build_zynq.tcl: -------------------------------------------------------------------------------- 1 | 2 | 3 | ### Calling script must generated have system_top.bit 4 | 5 | 6 | set cdir [pwd] 7 | set sdk_loc $cdir/vivado_prj.sdk 8 | 9 | ### Copy common dependent files for ZCU102 10 | file mkdir $cdir/boot 11 | file copy -force $cdir/projects/common/boot/zynq.bif $cdir/boot/zynq.bif 12 | if {$argc == 1} { 13 | file copy -force $cdir/projects/common/boot/[lindex $argv 0]/u-boot.elf $cdir/boot/u-boot.elf 14 | } else { 15 | file copy -force $cdir/projects/common/boot/u-boot.elf $cdir/boot/u-boot.elf 16 | } 17 | 18 | ### Copy system_top.bit into the output folder 19 | file copy -force $cdir/projects/common/boot/fsbl.elf $cdir/boot/fsbl.elf 20 | file copy -force $cdir/vivado_prj.runs/impl_1/system_top.bit $cdir/boot/system_top.bit 21 | 22 | ### Build BOOT.BIN 23 | cd $cdir/boot 24 | exec bootgen -arch zynq -image zynq.bif -o BOOT.BIN -w 25 | exit 26 | -------------------------------------------------------------------------------- /CI/scripts/fsbl_build_zynqmp.tcl: -------------------------------------------------------------------------------- 1 | 2 | 3 | ### Calling script must generated have system_top.bit 4 | 5 | 6 | set cdir [pwd] 7 | set sdk_loc $cdir/vivado_prj.sdk 8 | 9 | ### Copy common dependent files for ZCU102 10 | file mkdir $cdir/boot 11 | file copy -force $cdir/projects/common/boot/zynqmp.bif $cdir/boot/zynqmp.bif 12 | file copy -force $cdir/projects/common/boot/bl31.elf $cdir/boot/bl31.elf 13 | file copy -force $cdir/projects/common/boot/pmufw.elf $cdir/boot/pmufw.elf 14 | file copy -force $cdir/projects/common/boot/u-boot-zcu.elf $cdir/boot/u-boot-zcu.elf 15 | file copy -force $cdir/projects/common/boot/fsbl.elf $cdir/boot/fsbl.elf 16 | 17 | ### Copy system_top.bit into the output folder 18 | file copy -force $cdir/vivado_prj.runs/impl_1/system_top.bit $cdir/boot/system_top.bit 19 | 20 | ### Build BOOT.BIN 21 | cd $cdir/boot 22 | exec bootgen -arch zynqmp -image zynqmp.bif -o BOOT.BIN -w 23 | exit 24 | -------------------------------------------------------------------------------- /CI/scripts/library/util_sync/sync_fast_to_slow/Makefile: -------------------------------------------------------------------------------- 1 | #################################################################################### 2 | ## Copyright (c) 2018 - 2023 Analog Devices, Inc. 3 | ### SPDX short identifier: BSD-1-Clause 4 | ## Auto-generated, do not modify! 5 | #################################################################################### 6 | 7 | LIBRARY_NAME := sync_fast_to_slow 8 | 9 | GENERIC_DEPS += sync_fast_to_slow.v 10 | 11 | XILINX_DEPS += sync_fast_to_slow_ip.tcl 12 | 13 | include ../../scripts/library.mk 14 | -------------------------------------------------------------------------------- /CI/scripts/library/util_sync/sync_slow_to_fast/Makefile: -------------------------------------------------------------------------------- 1 | #################################################################################### 2 | ## Copyright (c) 2018 - 2023 Analog Devices, Inc. 3 | ### SPDX short identifier: BSD-1-Clause 4 | ## Auto-generated, do not modify! 5 | #################################################################################### 6 | 7 | LIBRARY_NAME := sync_slow_to_fast 8 | 9 | GENERIC_DEPS += sync_slow_to_fast.v 10 | 11 | XILINX_DEPS += sync_slow_to_fast_ip.tcl 12 | 13 | include ../../scripts/library.mk 14 | -------------------------------------------------------------------------------- /CI/scripts/library/util_sync/util_delay/Makefile: -------------------------------------------------------------------------------- 1 | #################################################################################### 2 | ## Copyright (c) 2018 - 2023 Analog Devices, Inc. 3 | ### SPDX short identifier: BSD-1-Clause 4 | ## Auto-generated, do not modify! 5 | #################################################################################### 6 | 7 | LIBRARY_NAME := util_delay 8 | 9 | GENERIC_DEPS += util_delay.v 10 | 11 | XILINX_DEPS += util_delay_ip.tcl 12 | 13 | include ../../scripts/library.mk 14 | -------------------------------------------------------------------------------- /CI/scripts/linter.m: -------------------------------------------------------------------------------- 1 | clc; 2 | ignoreFolders = {'CI','doc','test'}; 3 | cd ../.. 4 | d = pwd; 5 | cd .. 6 | addpath(genpath(d)); 7 | cd(d); 8 | 9 | files = dir('**/*.m'); 10 | for file = 1:length(files) 11 | if contains(files(file).folder,ignoreFolders) 12 | continue; 13 | end 14 | mfile = fullfile(files(file).folder,files(file).name); 15 | rpt = mlint(mfile); 16 | if ~isempty(rpt) 17 | disp(mfile); 18 | for l = 1:length(rpt) 19 | disp([num2str(rpt(l).line) ': ' rpt(l).message]); 20 | end 21 | end 22 | end 23 | 24 | -------------------------------------------------------------------------------- /CI/scripts/pack_all_ips.tcl: -------------------------------------------------------------------------------- 1 | 2 | # Create zip of IP cores 3 | proc pack_ip_core {} { 4 | 5 | set folder_list [glob -types d *] 6 | 7 | foreach dir $folder_list { 8 | puts "$dir" 9 | cd $dir 10 | 11 | if {[catch {set fp [open ${dir}_ip.tcl r]}]} { 12 | cd .. 13 | continue 14 | } 15 | close $fp 16 | 17 | set fp [open ${dir}_ip.tcl a+] 18 | puts -nonewline $fp "ipx::archive_core -verbose {analog.com_user_" 19 | puts -nonewline $fp "$dir" 20 | puts -nonewline $fp "_1.0.zip} \[ipx::current_core\]" 21 | close $fp 22 | 23 | source ./${dir}_ip.tcl 24 | 25 | cd .. 26 | } 27 | } 28 | 29 | source hdl/library/scripts/adi_ip_xilinx.tcl 30 | source hdl/scripts/adi_env.tcl 31 | 32 | cd hdl 33 | 34 | # Pack main library cores 35 | cd library 36 | pack_ip_core 37 | 38 | # Pack Xilinx cores 39 | cd xilinx 40 | pack_ip_core 41 | cd .. 42 | 43 | # Pack JESD cores 44 | cd jesd204 45 | pack_ip_core 46 | cd .. 47 | 48 | # Pack spi_engine cores 49 | cd spi_engine 50 | pack_ip_core 51 | cd .. 52 | 53 | cd ../../ 54 | -------------------------------------------------------------------------------- /CI/scripts/pmufw_zynqmp.tcl: -------------------------------------------------------------------------------- 1 | 2 | set cdir [pwd] 3 | set sdk_loc $cdir/vivado_prj.sdk 4 | 5 | ### Create create_pmufw_project.tcl 6 | set hwdsgn [open_hw_design $sdk_loc/system_top.hdf] 7 | generate_app -hw $hwdsgn -os standalone -proc psu_pmu_0 -app zynqmp_pmufw -sw pmufw -dir pmufw 8 | quit 9 | -------------------------------------------------------------------------------- /CI/scripts/setupDocker.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # This file is run inside of the docker container 3 | echo "Copying HSP files" 4 | cp -r /mlhspro /mlhsp 5 | echo "Copying .matlab" 6 | cp -r /root/.matlabro /root/.matlab 7 | echo "Copying .Xilinx" 8 | cp -r /root/.Xilinxro /root/.Xilinx 9 | -------------------------------------------------------------------------------- /CI/scripts/synth_designs.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | set -x 3 | 4 | BOARD=$1 5 | MLFLAGS="-nodisplay -nodesktop -nosplash" 6 | 7 | if [ -z "$MLRELEASE" ] 8 | then 9 | MLRELEASE=R2023b 10 | fi 11 | 12 | MLPATH=/opt/MATLAB 13 | 14 | cd ../.. 15 | cp hdl/vendor/AnalogDevices/hdlcoder_board_customization.m test/hdlcoder_board_customization_local.m 16 | sed -i "s/hdlcoder_board_customization/hdlcoder_board_customization_local/g" test/hdlcoder_board_customization_local.m 17 | source /opt/Xilinx/Vivado/2022.2/settings64.sh 18 | # Randomize DISPLAY number to avoid conflicts 19 | export DISPLAY_ID=:$(shuf -i 10-1000 -n 1) 20 | Xvfb $DISPLAY_ID & 21 | XVFB_PID=$! 22 | export DISPLAY=$DISPLAY_ID 23 | export SWT_GTK3=0 24 | source /opt/Xilinx/Vivado/2022.2/settings64.sh 25 | $MLPATH/$MLRELEASE/bin/matlab $MLFLAGS -r "cd('test');runSynthTests('$BOARD');" 26 | EC=$? 27 | kill -9 $XVFB_PID || true 28 | exit $EC 29 | -------------------------------------------------------------------------------- /CI/scripts/system_project_rxtx.tcl: -------------------------------------------------------------------------------- 1 | set start_dir [pwd] 2 | puts "Starting Transceiver Toolbox HDL build" 3 | 4 | if {$preprocess == "on"} { 5 | source $preprocess_script 6 | } 7 | 8 | if {$project == "pluto"} { 9 | cd projects/$project/ 10 | source ../scripts/adi_make.tcl 11 | } else { 12 | cd projects/$project/$carrier 13 | source ../../scripts/adi_make.tcl 14 | } 15 | adi_make::lib all 16 | 17 | set ::env(SKIP_SYNTHESIS) 1 18 | set ::env(MATLAB) 1 19 | set ::env(ADI_USE_OOC_SYNTHESYS) 1 20 | 21 | source ./system_project.tcl 22 | 23 | # Update block design to make room for new IP 24 | if {$project == "pluto"} { 25 | source ../scripts/matlab_processors.tcl 26 | } else { 27 | source ../../scripts/matlab_processors.tcl 28 | } 29 | preprocess_bd $project $carrier $ref_design $number_of_inputs $number_of_bits $number_of_valids $multiple 30 | 31 | if {$postprocess == "on"} { 32 | cd $start_dir 33 | source $postprocess_script 34 | } 35 | 36 | regenerate_bd_layout 37 | save_bd_design 38 | validate_bd_design 39 | 40 | # Back to root 41 | cd $start_dir 42 | -------------------------------------------------------------------------------- /CI/scripts/targeting_designs.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | set -x 3 | 4 | MLFLAGS="-nodisplay -nodesktop -nosplash" 5 | 6 | if [ -z "$MLRELEASE" ] 7 | then 8 | MLRELEASE=R2023b 9 | fi 10 | if [ -z "$DEMO" ] 11 | then 12 | DEMO="" 13 | fi 14 | echo "Testing demo: $DEMO" 15 | 16 | MLPATH=/opt/MATLAB 17 | 18 | cd ../.. 19 | source /opt/Xilinx/Vivado/2022.2/settings64.sh 20 | # Randomize DISPLAY number to avoid conflicts 21 | export DISPLAY_ID=:$(shuf -i 10-1000 -n 1) 22 | Xvfb $DISPLAY_ID & 23 | XVFB_PID=$! 24 | export DISPLAY=$DISPLAY_ID 25 | export SWT_GTK3=0 26 | source /opt/Xilinx/Vivado/2022.2/settings64.sh 27 | $MLPATH/$MLRELEASE/bin/matlab $MLFLAGS -r "addpath(genpath('test'));addpath(genpath('deps'));runDemoTests('$DEMO');" 28 | EC=$? 29 | sleep 5 30 | kill -9 $XVFB_PID || true 31 | exit $EC 32 | 33 | -------------------------------------------------------------------------------- /hdl/common/+hdlbsp/+util/+SDUpdater/DeviceTypes.m: -------------------------------------------------------------------------------- 1 | classdef DeviceTypes 2 | enumeration 3 | ZYNQ, ALTERA_SOC 4 | end 5 | end 6 | 7 | -------------------------------------------------------------------------------- /hdl/common/+hdlbsp/+util/+SDUpdater/FWModes.m: -------------------------------------------------------------------------------- 1 | classdef FWModes 2 | enumeration 3 | FAT32_ZIP, DISK_IMAGE 4 | end 5 | end 6 | 7 | -------------------------------------------------------------------------------- /hdl/common/+hdlbsp/+util/SDUpdater.m: -------------------------------------------------------------------------------- 1 | function SDUpdater(fhndl) 2 | 3 | persistent app cleanup; 4 | 5 | if ~isempty(cleanup) 6 | cleanup = []; 7 | end 8 | 9 | if ~ispc 10 | error('The SD Updater is only supported on Windows platforms'); 11 | end 12 | 13 | app = feval(fhndl); 14 | cleanup = onCleanup(@()delete(app)); 15 | 16 | -------------------------------------------------------------------------------- /hdl/common/+hdlbsp/install.m: -------------------------------------------------------------------------------- 1 | function install(mode) 2 | % hdlbsp.install adds/removes common BSP utilities 3 | 4 | % Copyright 2016 MathWorks, Inc. All Rights Reserved. 5 | 6 | if nargin == 0 7 | mode = 0; 8 | end 9 | 10 | %% Initialization 11 | % Determine where we're operating out of 12 | hdlbspRootDir = fileparts(strtok(mfilename('fullpath'), '+')); 13 | olddir = cd(hdlbspRootDir); % Make sure we can access the tools 14 | cleanup = onCleanup(@()cd(olddir)); 15 | 16 | % Update the path 17 | paths = {... 18 | fullfile(hdlbspRootDir),... 19 | }; 20 | 21 | hdlbsp.util.vendorInstall(mode,paths); 22 | end -------------------------------------------------------------------------------- /hdl/common/+hdlbsp/uninstall.m: -------------------------------------------------------------------------------- 1 | function uninstall 2 | % hdlbsp.uninstall removes common HDL BSP utilities 3 | 4 | % Copyright 2016 MathWorks, Inc. All Rights Reserved. 5 | 6 | hdlbsp.install(1); 7 | end 8 | -------------------------------------------------------------------------------- /hdl/common/Contents.m: -------------------------------------------------------------------------------- 1 | % HDL Coder BSP Tools 2 | % Version 1.07 (R2017b) 01-May-2018 3 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9002/+zcu102/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.adrv9002.zcu102.plugin_rd_rx', ... 16 | 'AnalogDevices.adrv9002.zcu102.plugin_rd_tx', ... 17 | 'AnalogDevices.adrv9002.zcu102.plugin_rd_rxtx', ... 18 | 'AnalogDevices.adrv9002.zcu102.plugin_rd_txrx', ... 19 | }; 20 | 21 | boardName = 'AnalogDevices ADRV9002 ZCU102'; 22 | 23 | end 24 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9002/+zcu102/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Copyright 2015 The MathWorks, Inc. 6 | 7 | % Call the common board definition function 8 | hP = AnalogDevices.plugin_board('ADRV9002', 'ZCU102'); 9 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9002/+zcu102/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9002', 'ZCU102', 'Rx'); 6 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9002/+zcu102/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('adrv9002', 'ZCU102', 'Rx & Tx - Rx is faster or has priority'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9002/+zcu102/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9002', 'ZCU102', 'Tx'); 6 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9002/+zcu102/plugin_rd_txrx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_txrx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('adrv9002', 'ZCU102', 'Tx & Rx - Tx is faster or has priority'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9009/+zc706/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.adrv9009.zc706.plugin_rd_rx', ... 16 | 'AnalogDevices.adrv9009.zc706.plugin_rd_tx', ... 17 | 'AnalogDevices.adrv9009.zc706.plugin_rd_rxtx', ... 18 | }; 19 | 20 | boardName = 'AnalogDevices ADRV9009 ZC706'; 21 | 22 | end 23 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9009/+zc706/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Copyright 2015 The MathWorks, Inc. 6 | 7 | % Call the common board definition function 8 | hP = AnalogDevices.plugin_board('ADRV9009', 'ZC706'); 9 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9009/+zc706/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9009', 'ZC706', 'Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9009/+zc706/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('adrv9009', 'ZC706', 'Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9009/+zc706/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('adrv9009', 'ZC706', 'Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9009/+zcu102/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.adrv9009.zcu102.plugin_rd_rx', ... 16 | 'AnalogDevices.adrv9009.zcu102.plugin_rd_tx', ... 17 | 'AnalogDevices.adrv9009.zcu102.plugin_rd_rxtx', ... 18 | }; 19 | 20 | boardName = 'AnalogDevices ADRV9009 ZCU102'; 21 | 22 | end 23 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9009/+zcu102/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Copyright 2015 The MathWorks, Inc. 6 | 7 | % Call the common board definition function 8 | hP = AnalogDevices.plugin_board('ADRV9009', 'ZCU102'); 9 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9009/+zcu102/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9009', 'ZCU102', 'Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9009/+zcu102/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('adrv9009', 'ZCU102', 'Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9009/+zcu102/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('adrv9009', 'ZCU102', 'Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccbob_cmos/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccbob_cmos','Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccbob_cmos/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccbob_cmos','Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccbob_cmos/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccbob_cmos','Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccbob_lvds/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccbob_lvds','Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccbob_lvds/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccbob_lvds','Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccbob_lvds/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccbob_lvds','Tx'); 6 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccbox_lvds/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccbox_lvds','Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccbox_lvds/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccbox_lvds','Rx & Tx'); 6 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccbox_lvds/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccbox_lvds','Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccfmc_lvds/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccfmc_lvds','Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccfmc_lvds/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccfmc_lvds','Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccfmc_lvds/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccfmc_lvds','Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccpackrf_lvds/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccpackrf_lvds','Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccpackrf_lvds/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccpackrf_lvds','Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/+ccpackrf_lvds/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9361-z7035', 'ccpackrf_lvds','Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9361z7035/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Copyright 2015 The MathWorks, Inc. 6 | 7 | % Call the common board definition function 8 | hP = AnalogDevices.plugin_board('adrv9361-z7035'); 9 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9364z7020/+ccbob_cmos/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9364-z7020', 'ccbob_cmos','Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9364z7020/+ccbob_cmos/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9364-z7020', 'ccbob_cmos','Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9364z7020/+ccbob_cmos/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9364-z7020', 'ccbob_cmos','Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9364z7020/+ccbob_lvds/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9364-z7020', 'ccbob_lvds','Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9364z7020/+ccbob_lvds/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9364-z7020', 'ccbob_lvds','Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9364z7020/+ccbob_lvds/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9364-z7020', 'ccbob_lvds','Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9364z7020/+ccbox_lvds/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9364-z7020', 'ccbox_lvds','Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9364z7020/+ccbox_lvds/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9364-z7020', 'ccbox_lvds','Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9364z7020/+ccbox_lvds/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9364-z7020', 'ccbox_lvds','Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9364z7020/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd,boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.adrv9364z7020.ccbob_cmos.plugin_rd_rx', ... 16 | 'AnalogDevices.adrv9364z7020.ccbob_cmos.plugin_rd_tx', ... 17 | 'AnalogDevices.adrv9364z7020.ccbob_cmos.plugin_rd_rxtx', ... 18 | ... 19 | 'AnalogDevices.adrv9364z7020.ccbob_lvds.plugin_rd_rx', ... 20 | 'AnalogDevices.adrv9364z7020.ccbob_lvds.plugin_rd_tx', ... 21 | 'AnalogDevices.adrv9364z7020.ccbob_lvds.plugin_rd_rxtx', ... 22 | }; 23 | 24 | boardName = 'AnalogDevices ADRV9364-Z7020'; 25 | 26 | end 27 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9364z7020/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Copyright 2015 The MathWorks, Inc. 6 | 7 | % Call the common board definition function 8 | hP = AnalogDevices.plugin_board('adrv9364-z7020'); 9 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9371x/+zc706/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.adrv9371x.zc706.plugin_rd_rx', ... 16 | 'AnalogDevices.adrv9371x.zc706.plugin_rd_tx', ... 17 | 'AnalogDevices.adrv9371x.zc706.plugin_rd_rxtx', ... 18 | }; 19 | 20 | boardName = 'AnalogDevices ADRV9371 ZC706'; 21 | 22 | end 23 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9371x/+zc706/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Copyright 2015 The MathWorks, Inc. 6 | 7 | % Call the common board definition function 8 | hP = AnalogDevices.plugin_board('ADRV9371','ZC706'); 9 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9371x/+zc706/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9371','ZC706', 'Rx'); 6 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9371x/+zc706/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('adrv9371','ZC706', 'Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9371x/+zc706/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('adrv9371','ZC706', 'Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9371x/+zcu102/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.adrv9371x.zcu102.plugin_rd_rx', ... 16 | 'AnalogDevices.adrv9371x.zcu102.plugin_rd_tx', ... 17 | 'AnalogDevices.adrv9371x.zcu102.plugin_rd_rxtx', ... 18 | }; 19 | 20 | boardName = 'AnalogDevices ADRV9371 ZCU102'; 21 | 22 | end 23 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9371x/+zcu102/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Copyright 2015 The MathWorks, Inc. 6 | 7 | % Call the common board definition function 8 | hP = AnalogDevices.plugin_board('ADRV9371','ZCU102'); 9 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9371x/+zcu102/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('adrv9371','ZCU102', 'Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9371x/+zcu102/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('adrv9371','ZCU102', 'Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+adrv9371x/+zcu102/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('adrv9371','ZCU102', 'Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zc702/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.fmcomms2.zc702.plugin_rd_rx', ... 16 | 'AnalogDevices.fmcomms2.zc702.plugin_rd_tx', ... 17 | 'AnalogDevices.fmcomms2.zc702.plugin_rd_rxtx', ... 18 | }; 19 | 20 | boardName = 'AnalogDevices FMCOMMS2/3 ZC702'; 21 | 22 | end 23 | 24 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zc702/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Call the common board definition function 6 | hP = AnalogDevices.plugin_board('FMComms2', 'ZC702'); 7 | 8 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zc702/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMComms2', 'ZC702', 'Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zc702/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMComms2', 'ZC702', 'Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zc702/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMComms2', 'ZC702', 'Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zc706/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.fmcomms2.zc706.plugin_rd_rx', ... 16 | 'AnalogDevices.fmcomms2.zc706.plugin_rd_tx', ... 17 | 'AnalogDevices.fmcomms2.zc706.plugin_rd_rxtx', ... 18 | }; 19 | 20 | boardName = 'AnalogDevices FMCOMMS2/3 ZC706'; 21 | 22 | end 23 | 24 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zc706/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Call the common board definition function 6 | hP = AnalogDevices.plugin_board('FMComms2', 'ZC706'); 7 | 8 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zc706/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMComms2', 'ZC706', 'Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zc706/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMComms2', 'ZC706', 'Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zc706/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMComms2', 'ZC706', 'Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zcu102/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.fmcomms2.zcu102.plugin_rd_rx', ... 16 | 'AnalogDevices.fmcomms2.zcu102.plugin_rd_tx', ... 17 | 'AnalogDevices.fmcomms2.zcu102.plugin_rd_rxtx', ... 18 | }; 19 | 20 | boardName = 'AnalogDevices FMCOMMS2/3 ZCU102'; 21 | 22 | end 23 | 24 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zcu102/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Call the common board definition function 6 | hP = AnalogDevices.plugin_board('FMComms2', 'ZCU102'); 7 | 8 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zcu102/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMComms2', 'ZCU102', 'Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zcu102/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMComms2', 'ZCU102', 'Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zcu102/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMComms2', 'ZCU102', 'Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zed/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.fmcomms2.zed.plugin_rd_rx', ... 16 | 'AnalogDevices.fmcomms2.zed.plugin_rd_tx', ... 17 | 'AnalogDevices.fmcomms2.zed.plugin_rd_rxtx', ... 18 | }; 19 | 20 | boardName = 'AnalogDevices FMCOMMS2/3 ZED'; 21 | 22 | end 23 | 24 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zed/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Call the common board definition function 6 | hP = AnalogDevices.plugin_board('FMComms2', 'ZED'); 7 | 8 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zed/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMComms2','ZED', 'Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zed/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMComms2','ZED', 'Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms2/+zed/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMComms2','ZED', 'Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms5/+zc702/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.fmcomms5.zc702.plugin_rd_rx', ... 16 | 'AnalogDevices.fmcomms5.zc702.plugin_rd_tx', ... 17 | 'AnalogDevices.fmcomms5.zc702.plugin_rd_rxtx', ... 18 | }; 19 | 20 | boardName = 'AnalogDevices FMCOMMS5 ZC702'; 21 | 22 | end 23 | 24 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms5/+zc702/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Copyright 2015 The MathWorks, Inc. 6 | 7 | % Call the common board definition function 8 | hP = AnalogDevices.plugin_board('FMCOMMS5','ZC702'); 9 | 10 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms5/+zc702/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('fmcomms5','ZC702', 'Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms5/+zc702/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('fmcomms5','ZC702', 'Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms5/+zc702/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('fmcomms5','ZC702', 'Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms5/+zc706/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.fmcomms5.zc706.plugin_rd_rx', ... 16 | 'AnalogDevices.fmcomms5.zc706.plugin_rd_tx', ... 17 | 'AnalogDevices.fmcomms5.zc706.plugin_rd_rxtx', ... 18 | }; 19 | 20 | boardName = 'AnalogDevices FMCOMMS5 ZC706'; 21 | 22 | end 23 | 24 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms5/+zc706/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Copyright 2015 The MathWorks, Inc. 6 | 7 | % Call the common board definition function 8 | hP = AnalogDevices.plugin_board('FMCOMMS5','ZC706'); 9 | 10 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms5/+zc706/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('fmcomms5','ZC706', 'Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms5/+zc706/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('fmcomms5','ZC706', 'Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms5/+zc706/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('fmcomms5','ZC706', 'Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms8/+zcu102/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.fmcomms8.zcu102.plugin_rd_rx', ... 16 | 'AnalogDevices.fmcomms8.zcu102.plugin_rd_tx', ... 17 | ...% 'AnalogDevices.fmcomms8.zcu102.plugin_rd_rxtx', ... 18 | }; 19 | 20 | boardName = 'AnalogDevices FMCOMMS8 ZCU102'; 21 | 22 | end 23 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms8/+zcu102/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Call the common board definition function 6 | hP = AnalogDevices.plugin_board('FMCOMMS8', 'ZCU102'); 7 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms8/+zcu102/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMCOMMS8', 'ZCU102', 'Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms8/+zcu102/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMCOMMS8', 'ZCU102', 'Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+fmcomms8/+zcu102/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Call the common reference design definition function 5 | hRD = AnalogDevices.plugin_rd('FMCOMMS8', 'ZCU102', 'Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+pluto/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevices.pluto.plugin_rd_rx', ... 16 | 'AnalogDevices.pluto.plugin_rd_tx', ... 17 | 'AnalogDevices.pluto.plugin_rd_rxtx', ... 18 | }; 19 | 20 | boardName = 'AnalogDevices PLUTO'; 21 | 22 | end 23 | 24 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+pluto/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Copyright 2015 The MathWorks, Inc. 6 | 7 | % Call the common board definition function 8 | hP = AnalogDevices.plugin_board('pluto'); 9 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+pluto/plugin_rd_rx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('pluto','PLUTO','Rx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+pluto/plugin_rd_rxtx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_rxtx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('pluto','PLUTO','Rx & Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+pluto/plugin_rd_tx.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd_tx 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevices.plugin_rd('pluto','PLUTO','Tx'); -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+util/ADIZynqSDRParameterInfo.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | Analog Devices Zynq SDR 5 | 6 | Clocking 7 | 8 | 9 | 10 | Build options 11 | 12 | 13 | 14 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+util/adizynqsdr.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | Analog Devices Zynq SDR 5 | ARM Cortex-A9 6 | ARM Cortex-A 7 | ARM Compatible->ARM Cortex 8 | 9 | "$(ARM_CORTEX_A_ROOT_DIR)/ssh_download.bat" 10 | "$(MATLAB_ROOT)/toolbox/idelink/foundation/hostapps" root analog $(ADI_ZYNQ_SDR_IPADDRESS) /home/analog/Downloads 11 | 12 | $(TARGET_ROOT)/registry/parameters/ADIZynqSDRParameterInfo.xml 13 | $(TARGET_ROOT)/registry/attributes/ADIZynqSDRAttributeInfo.xml 14 | 15 | 16 | 17 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/+util/extmodeHooksADI.m: -------------------------------------------------------------------------------- 1 | function extmodeHooksADI(hObj,hookpoint) 2 | 3 | % Copyright 2014-2015 The MathWorks, Inc. 4 | 5 | modelName = get(getModel(hObj),'Name'); 6 | modelName = sprintf('%s.elf', modelName); 7 | data = codertarget.data.getData(hObj); 8 | h__z = zynq(data.RTOS); 9 | h__z.IPAddress = getenv('ADI_ZYNQ_SDR_IPADDRESS'); 10 | h__z.Username = 'root'; 11 | h__z.Password = 'analog'; 12 | 13 | switch (lower(hookpoint)) 14 | case 'preconnectfcn', 15 | waitForAppToStart(h__z, modelName, 60); 16 | case 'setupfcn' 17 | checkConnection(h__z); 18 | otherwise 19 | end 20 | 21 | end 22 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/add_io.m: -------------------------------------------------------------------------------- 1 | function add_io(hRD,project,fpga,type) 2 | 3 | %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 4 | % Add AXI4 and AXI4-Lite slave interfaces 5 | %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 6 | out = AnalogDevices.get_memory_axi_interface_info(fpga,lower(project)); 7 | hRD.addAXI4SlaveInterface( ... 8 | 'InterfaceConnection', out.InterfaceConnection, ... 9 | 'BaseAddress', out.BaseAddress, ... 10 | 'MasterAddressSpace', out.MasterAddressSpace); 11 | 12 | %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 13 | % Add Reference design interfaces 14 | %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 15 | AnalogDevices.add_io_ports(hRD,lower(project),lower(type),lower(fpga)); 16 | 17 | end -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/set_params.m: -------------------------------------------------------------------------------- 1 | function [Number_of_inputs, Number_of_valids, Data_width] = set_params(project,design) 2 | 3 | switch lower(project) 4 | case 'adrv9002' 5 | Number_of_inputs = '4'; 6 | Number_of_valids = '1'; 7 | Data_width = '16'; 8 | case 'adrv9009' 9 | Number_of_inputs = '4'; 10 | Number_of_valids = '1'; 11 | Data_width = '32'; % 32-16 bit hybrid 12 | case 'fmcomms8' 13 | Number_of_inputs = '8'; 14 | Number_of_valids = '1'; 15 | Data_width = '32'; % 32-16 bit hybrid 16 | case {'pluto'} 17 | Number_of_inputs = '2'; 18 | Number_of_valids = '1'; 19 | Data_width = '16'; 20 | case {'adrv9361-z7035','adrv9364-z7020','fmcomms2','fmcomms5'} 21 | Number_of_inputs = '4'; 22 | Number_of_valids = '1'; 23 | Data_width = '16'; 24 | case 'adrv9371' 25 | Number_of_inputs = '4'; 26 | Number_of_valids = '1'; 27 | Data_width = '32'; 28 | otherwise 29 | Number_of_inputs = '0'; 30 | Number_of_valids = '0'; 31 | Data_width = '0'; 32 | end 33 | end 34 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/+AnalogDevices/uninstall.m: -------------------------------------------------------------------------------- 1 | function uninstall 2 | % AnalogDevices.uninstall removes AnalogDevices HDL BSPs 3 | 4 | % Copyright 2015 MathWorks, Inc. All Rights Reserved. 5 | 6 | AnalogDevices.install(1); 7 | end 8 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/Contents.m: -------------------------------------------------------------------------------- 1 | % HDL Coder BSP: Analog Devices Inc 2 | % Version 23.2.2 (R2023b) 25-October-2024 3 | -------------------------------------------------------------------------------- /hdl/vendor/AnalogDevices/hdlcoder_board_customization.m: -------------------------------------------------------------------------------- 1 | function r = hdlcoder_board_customization 2 | % Board plugin registration file 3 | % 1. Any registration file with this name on MATLAB path will be picked up 4 | % 2. Registration file returns a cell array pointing to the location of 5 | % the board plugins 6 | % 3. Board plugin must be a package folder accessible from MATLAB path, 7 | % and contains a board definition file 8 | 9 | % Copyright 2012-2013 The MathWorks, Inc. 10 | 11 | r = { ... 12 | 'AnalogDevices.pluto.plugin_board', ... 13 | 'AnalogDevices.fmcomms2.zed.plugin_board', ... 14 | 'AnalogDevices.fmcomms2.zc702.plugin_board', ... 15 | 'AnalogDevices.fmcomms2.zc706.plugin_board', ... 16 | 'AnalogDevices.fmcomms2.zcu102.plugin_board', ... 17 | 'AnalogDevices.fmcomms5.zc702.plugin_board', ... 18 | 'AnalogDevices.fmcomms5.zc706.plugin_board', ... 19 | 'AnalogDevices.fmcomms8.zcu102.plugin_board', ... 20 | 'AnalogDevices.adrv9364z7020.plugin_board', ... 21 | 'AnalogDevices.adrv9361z7035.plugin_board', ... 22 | 'AnalogDevices.adrv9371x.zc706.plugin_board', ... 23 | 'AnalogDevices.adrv9371x.zcu102.plugin_board', ... 24 | 'AnalogDevices.adrv9002.zcu102.plugin_board', ... 25 | 'AnalogDevices.adrv9009.zcu102.plugin_board', ... 26 | 'AnalogDevices.adrv9009.zc706.plugin_board', ... 27 | }; 28 | end 29 | % LocalWords: Zynq ZC 30 | -------------------------------------------------------------------------------- /info.xml: -------------------------------------------------------------------------------- 1 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | R2023b 12 | 13 | Analog Devices, Inc. Transceiver Toolbox 14 | 15 | 16 | toolbox 17 | 18 | 19 | adi_logo.png 20 | 21 | doc 22 | 23 | 24 | adi_logo.png 25 | 26 | -------------------------------------------------------------------------------- /logos/logo_black.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/logos/logo_black.png -------------------------------------------------------------------------------- /logos/logo_white.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/logos/logo_white.png -------------------------------------------------------------------------------- /test/@LTE_DemodTMN/GenLTEWaveform.m: -------------------------------------------------------------------------------- 1 | function [eNodeBOutput, etm] = GenLTEWaveform(TMN, BW) 2 | [eNodeBOutput, etm] = LTE_DemodTMN.Tx(TMN, BW); 3 | 4 | % scale the signal and cast to int16 5 | backoff = -3; % dB 6 | Output_max = max([max(abs(real(eNodeBOutput))) max(abs(imag(eNodeBOutput)))]); 7 | eNodeBOutput = eNodeBOutput.*(10^(backoff/20))/Output_max; 8 | eNodeBOutput = int16(eNodeBOutput*2^15); 9 | end -------------------------------------------------------------------------------- /test/@LTE_DemodTMN/GetEVMWindow.m: -------------------------------------------------------------------------------- 1 | function W = GetEVMWindow(enb) 2 | 3 | % Numbers of downlink resource blocks 4 | nrbs = [6 15 25 50 75 100]; 5 | 6 | % EVM window lengths W for normal CP 7 | Ws = [5 12 32 66 136 136]; 8 | 9 | % EVM window lengths W for extended CP 10 | if (isfield(enb,'CyclicPrefix')) 11 | if(strcmpi(enb.CyclicPrefix,'Extended')) 12 | Ws = [28 58 124 250 504 504]; 13 | end 14 | else 15 | enb.CyclicPrefix='Normal'; 16 | end 17 | 18 | % Get corresponding EVM window length for NDLRB; if NDLRB is 19 | % non-standard, use FFT size to determine the EVM window length 20 | if (isempty(find(enb.NDLRB==nrbs,1))) 21 | Nffts = [128 256 512 1024 2048]; 22 | ofdmInfo = lteOFDMInfo(enb); 23 | W = Ws(double(ofdmInfo.Nfft)==Nffts); 24 | else 25 | W = Ws(enb.NDLRB==nrbs); 26 | end 27 | 28 | end -------------------------------------------------------------------------------- /test/BSPTests.m: -------------------------------------------------------------------------------- 1 | classdef BSPTests < BSPTestsBase 2 | 3 | methods(TestClassSetup) 4 | function removeinstalledbsp(~) 5 | str = 'Analog Devices'; 6 | ts = matlab.addons.toolbox.installedToolboxes; 7 | for t = ts 8 | if contains(t.Name,str) 9 | disp('Removing installed BSP'); 10 | matlab.addons.toolbox.uninstallToolbox(t); 11 | end 12 | end 13 | end 14 | % Add the necessary files to path 15 | function addbspfiles(~) 16 | addpath(genpath('../hdl')); 17 | end 18 | end 19 | 20 | end 21 | -------------------------------------------------------------------------------- /test/HardwareTests.m: -------------------------------------------------------------------------------- 1 | classdef HardwareTests < matlab.unittest.TestCase 2 | 3 | properties (Abstract) 4 | author 5 | uri 6 | end 7 | 8 | methods(TestClassSetup) 9 | function UpdateURIFromEnv(testCase) 10 | urienv = getenv('IIO_URI'); 11 | if ~isempty(urienv) 12 | fprintf('Overriding default URI with: %s\n',urienv); 13 | testCase.uri = urienv; 14 | end 15 | end 16 | end 17 | 18 | methods 19 | % Check hardware connected 20 | function CheckDevice(testCase,type,Dev,ip,istx) 21 | try 22 | switch type 23 | case 'usb' 24 | d = Dev(); 25 | case 'ip' 26 | if strcmp(testCase.author,'MathWorks') 27 | d= Dev(); 28 | d.IPAddress = ip; 29 | else 30 | d= Dev(); 31 | d.uri = ['ip:',ip]; 32 | end 33 | otherwise 34 | error('Unknown interface type'); 35 | end 36 | if istx 37 | d(complex(randn(1024,1),randn(1024,1))); 38 | else 39 | d(); 40 | end 41 | 42 | catch ME 43 | disp(ME.message); 44 | assumeFail(testCase,'Filtering test: No device found'); 45 | end 46 | end 47 | 48 | end 49 | 50 | end 51 | -------------------------------------------------------------------------------- /test/ModemTests.m: -------------------------------------------------------------------------------- 1 | classdef ModemTests < matlab.unittest.TestCase 2 | 3 | properties 4 | demopath = '' 5 | end 6 | 7 | methods(TestClassSetup) 8 | function Setup(testCase) 9 | addpath(genpath('targeting')); 10 | setupHDL; 11 | cd .. 12 | testCase.demopath = pwd; 13 | end 14 | end 15 | 16 | methods (Static) 17 | end 18 | 19 | methods (Test) 20 | 21 | function Build_External_Mode(testCase) 22 | folder = [testCase.demopath,'/targeting/modem-qpsk/FixedPoint/demos']; 23 | cd(folder); 24 | folder = 'External_Mode'; 25 | cd(folder); 26 | hdlworkflow 27 | end 28 | 29 | function Build_Standard_IQ(testCase) 30 | folder = [testCase.demopath,'/targeting/modem-qpsk/FixedPoint/demos']; 31 | cd(folder); 32 | folder = 'Standard_IQ'; 33 | cd(folder); 34 | hdlworkflow 35 | end 36 | 37 | function Build_FPGA_Capture(testCase) 38 | folder = [testCase.demopath,'/targeting/modem-qpsk/FixedPoint/demos']; 39 | cd(folder); 40 | folder = 'FPGA_Capture'; 41 | cd(folder); 42 | generateBadFrame('StartPadding',2^4); 43 | hdlworkflow 44 | end 45 | 46 | end 47 | 48 | end 49 | 50 | -------------------------------------------------------------------------------- /test/NonHWTest.m: -------------------------------------------------------------------------------- 1 | classdef NonHWTest < matlab.unittest.TestCase 2 | properties(TestParameter) 3 | rootClasses = getClasses(); 4 | end 5 | 6 | methods (Test) 7 | function call_constructors(testCase,rootClasses) 8 | sdr = eval(['adi.',rootClasses,'()']); 9 | testCase.assertEqual(class(sdr),['adi.',rootClasses]); 10 | end 11 | end 12 | end -------------------------------------------------------------------------------- /test/SysObjsTests.m: -------------------------------------------------------------------------------- 1 | classdef SysObjsTests < AD9361Tests & AD9363Tests & AD9364Tests 2 | 3 | 4 | end 5 | 6 | -------------------------------------------------------------------------------- /test/adrv9002_profiles/lte_10_lvds_nco_api_68_0_6.stream: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/test/adrv9002_profiles/lte_10_lvds_nco_api_68_0_6.stream -------------------------------------------------------------------------------- /test/adrv9002_profiles/lte_10_lvds_nco_api_68_8_1.stream: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/test/adrv9002_profiles/lte_10_lvds_nco_api_68_8_1.stream -------------------------------------------------------------------------------- /test/adrv9002_profiles/lte_20_lvds_api_68_0_6.stream: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/test/adrv9002_profiles/lte_20_lvds_api_68_0_6.stream -------------------------------------------------------------------------------- /test/adrv9002_profiles/lte_20_lvds_api_68_8_1.stream: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/test/adrv9002_profiles/lte_20_lvds_api_68_8_1.stream -------------------------------------------------------------------------------- /test/adrv9002_profiles/lte_40_lvds_api_68_0_6.stream: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/test/adrv9002_profiles/lte_40_lvds_api_68_0_6.stream -------------------------------------------------------------------------------- /test/adrv9002_profiles/lte_40_lvds_api_68_8_1.stream: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/test/adrv9002_profiles/lte_40_lvds_api_68_8_1.stream -------------------------------------------------------------------------------- /test/adrv9002_profiles/lte_5_cmos_api_68_0_6.stream: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/test/adrv9002_profiles/lte_5_cmos_api_68_0_6.stream -------------------------------------------------------------------------------- /test/adrv9002_profiles/lte_5_cmos_api_68_8_1.stream: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/test/adrv9002_profiles/lte_5_cmos_api_68_8_1.stream -------------------------------------------------------------------------------- /test/getClasses.m: -------------------------------------------------------------------------------- 1 | function sysobjs = getClasses() 2 | cpwd = pwd; 3 | [filepath,~,~] = fileparts(mfilename('fullpath')); 4 | cd(filepath) 5 | cd('..'); 6 | 7 | filelist = dir(fullfile('+adi', ['**',filesep,'/*.*'])); 8 | 9 | sysobjs = {}; 10 | 11 | for fi = 1:length(filelist) 12 | name = filelist(fi).name; 13 | if strcmp(name,'Rx.m') || strcmp(name,'Tx.m') 14 | ffile = [filelist(fi).folder, filesep, name]; 15 | parts = strsplit(ffile,filesep); 16 | name = parts{end-1}; name = name(2:end); 17 | if strcmp(name,'common') 18 | continue; 19 | end 20 | if strcmp(name,'AD916x') 21 | continue 22 | end 23 | rxtx = parts{end}; rxtx = rxtx(1:end-2); 24 | sysobjs = [sysobjs(:)', {[name,'.',rxtx]}]; 25 | end 26 | end 27 | cd(cpwd); 28 | end -------------------------------------------------------------------------------- /test/graphicalInstaller.m: -------------------------------------------------------------------------------- 1 | workflow = adi.ADIWorkFlow; 2 | workflow.launch -------------------------------------------------------------------------------- /test/perf/hwTestRunner.m: -------------------------------------------------------------------------------- 1 | import matlab.unittest.plugins.DiagnosticsRecordingPlugin 2 | import matlab.unittest.plugins.TestReportPlugin 3 | 4 | runner = matlab.unittest.TestRunner.withNoPlugins; 5 | runner.addPlugin(DiagnosticsRecordingPlugin); 6 | runner.addPlugin(TestReportPlugin.producingPDF('Report.pdf',... 7 | 'IncludingPassingDiagnostics',true,'IncludingCommandWindowText',true)); 8 | runner.ArtifactsRootFolder = pwd; 9 | 10 | suite = testsuite('HardwarePerformanceTests'); 11 | 12 | if ~exist('logs', 'dir') 13 | mkdir('logs') 14 | end 15 | 16 | results = runner.run(suite); 17 | t = table(results); 18 | disp(t); 19 | 20 | exit(any([results.Failed])); 21 | -------------------------------------------------------------------------------- /test/runDemoTests.m: -------------------------------------------------------------------------------- 1 | function suite = runDemoTests(name) 2 | 3 | import matlab.unittest.TestRunner; 4 | import matlab.unittest.TestSuite; 5 | import matlab.unittest.plugins.TestReportPlugin; 6 | import matlab.unittest.plugins.XMLPlugin 7 | import matlab.unittest.plugins.DiagnosticsValidationPlugin 8 | 9 | suite = testsuite({'DemoTests'}); 10 | xmlFile = 'BSPDemoTests.xml'; 11 | 12 | if nargin > 0 13 | xmlFile = [name,'_DemoTests.xml']; 14 | suite = suite.selectIf('Name',['*',name,'*']); 15 | end 16 | 17 | 18 | try 19 | runner = matlab.unittest.TestRunner.withTextOutput('OutputDetail',4); 20 | runner.addPlugin(DiagnosticsValidationPlugin) 21 | 22 | xmlFile = 'BSPDemoTests.xml'; 23 | plugin = XMLPlugin.producingJUnitFormat(xmlFile); 24 | runner.addPlugin(plugin); 25 | 26 | results = runner.run(suite); 27 | 28 | t = table(results); 29 | disp(t); 30 | disp(repmat('#',1,80)); 31 | for test = results 32 | if test.Failed 33 | disp(test.Name); 34 | end 35 | end 36 | catch e 37 | disp(getReport(e,'extended')); 38 | bdclose('all'); 39 | exit(1); 40 | end 41 | 42 | save(['BSPInstallerTest_',datestr(now,'dd_mm_yyyy-HH:MM:SS'),'.mat'],'t'); 43 | bdclose('all'); 44 | exit(any([results.Failed])); 45 | -------------------------------------------------------------------------------- /test/runInstallerTests.m: -------------------------------------------------------------------------------- 1 | function runInstallerTests(board) 2 | 3 | import matlab.unittest.TestRunner; 4 | import matlab.unittest.TestSuite; 5 | import matlab.unittest.plugins.TestReportPlugin; 6 | import matlab.unittest.plugins.XMLPlugin 7 | import matlab.unittest.plugins.DiagnosticsValidationPlugin 8 | import matlab.unittest.parameters.Parameter 9 | 10 | SynthesizeDesign = {false}; 11 | param = Parameter.fromData('SynthesizeDesign',SynthesizeDesign); 12 | 13 | if nargin == 0 14 | suite = testsuite({'BSPInstallerTests'}); 15 | else 16 | boards = ['*',lower(board),'*']; 17 | suite = TestSuite.fromClass(?BSPInstallerTests,'ExternalParameters',param); 18 | suite = suite.selectIf('ParameterProperty','configs', 'ParameterName',boards); 19 | end 20 | 21 | try 22 | 23 | runner = matlab.unittest.TestRunner.withTextOutput('OutputDetail',1); 24 | runner.addPlugin(DiagnosticsValidationPlugin) 25 | 26 | xmlFile = 'BSPTestResults.xml'; 27 | plugin = XMLPlugin.producingJUnitFormat(xmlFile); 28 | runner.addPlugin(plugin); 29 | 30 | results = runner.run(suite); 31 | 32 | t = table(results); 33 | disp(t); 34 | disp(repmat('#',1,80)); 35 | for test = results 36 | if test.Failed 37 | disp(test.Name); 38 | end 39 | end 40 | catch e 41 | disp(getReport(e,'extended')); 42 | bdclose('all'); 43 | exit(1); 44 | end 45 | 46 | save(['BSPInstallerTest_',datestr(now,'dd_mm_yyyy-HH:MM:SS'),'.mat'],'t'); 47 | bdclose('all'); 48 | exit(any([results.Failed])); 49 | -------------------------------------------------------------------------------- /test/runNonHWTest.m: -------------------------------------------------------------------------------- 1 | function suite = runNonHWTest() 2 | 3 | import matlab.unittest.TestRunner; 4 | import matlab.unittest.TestSuite; 5 | import matlab.unittest.plugins.TestReportPlugin; 6 | import matlab.unittest.plugins.XMLPlugin 7 | import matlab.unittest.plugins.DiagnosticsValidationPlugin 8 | 9 | suite = testsuite({'NonHWTest'}); 10 | xmlFile = 'BSPDemoTests.xml'; 11 | 12 | 13 | try 14 | runner = matlab.unittest.TestRunner.withTextOutput('OutputDetail',1); 15 | runner.addPlugin(DiagnosticsValidationPlugin) 16 | 17 | xmlFile = 'BSPDemoTests.xml'; 18 | plugin = XMLPlugin.producingJUnitFormat(xmlFile); 19 | runner.addPlugin(plugin); 20 | 21 | results = runner.run(suite); 22 | 23 | t = table(results); 24 | disp(t); 25 | disp(repmat('#',1,80)); 26 | for test = results 27 | if test.Failed 28 | disp(test.Name); 29 | end 30 | end 31 | catch e 32 | disp(getReport(e,'extended')); 33 | bdclose('all'); 34 | exit(1); 35 | end 36 | 37 | save(['BSPInstallerTest_',datestr(now,'dd_mm_yyyy-HH:MM:SS'),'.mat'],'t'); 38 | bdclose('all'); 39 | exit(any([results.Failed])); -------------------------------------------------------------------------------- /test/testModel_Rx16Tx32_regs.slx: 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12 32 66 136 136]; 8 | 9 | % EVM window lengths W for extended CP 10 | if (isfield(enb,'CyclicPrefix')) 11 | if(strcmpi(enb.CyclicPrefix,'Extended')) 12 | Ws = [28 58 124 250 504 504]; 13 | end 14 | else 15 | enb.CyclicPrefix='Normal'; 16 | end 17 | 18 | % Get corresponding EVM window length for NDLRB; if NDLRB is 19 | % non-standard, use FFT size to determine the EVM window length 20 | if (isempty(find(enb.NDLRB==nrbs,1))) 21 | Nffts = [128 256 512 1024 2048]; 22 | ofdmInfo = lteOFDMInfo(enb); 23 | W = Ws(double(ofdmInfo.Nfft)==Nffts); 24 | else 25 | W = Ws(enb.NDLRB==nrbs); 26 | end 27 | 28 | end -------------------------------------------------------------------------------- /trx_examples/streaming/LTE_PA_App/img/Analog_Devices_Logo.png: -------------------------------------------------------------------------------- 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/trx_examples/streaming/ad936x/ADIRFSOM_DDS_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | %% Tx set up 4 | tx = adi.AD9361.Tx; 5 | tx.uri = 'ip:analog'; 6 | tx.DataSource = 'DDS'; 7 | tx.DDSFrequencies = [1e5 1e5; 0 0]; 8 | tx.DDSPhases = [90e3 0; 0 0]; % expressed in millidegrees 9 | tx.DDSScales = [1 1; 0 0]; 10 | tx.CenterFrequency = 1e9; 11 | tx(); 12 | pause(1); 13 | 14 | %% Rx set up 15 | rx = adi.AD9361.Rx('uri','ip:analog'); 16 | rx.CenterFrequency = tx.CenterFrequency; 17 | y = rx(); 18 | 19 | tx.release(); 20 | rx.release(); 21 | 22 | figure(1); 23 | plot(0:numel(y)-1, real(y), 'r', 0:numel(y)-1, imag(y), 'b'); 24 | xlim([0 250]); 25 | xlabel('sample index'); 26 | grid on; -------------------------------------------------------------------------------- /trx_examples/streaming/ad936x/ADIRFSOM_DMA_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | amplitude = 2^15; frequency = 0.12e6; 4 | swv1 = dsp.SineWave(amplitude, frequency); 5 | swv1.ComplexOutput = true; 6 | swv1.SamplesPerFrame = 1e4*10; 7 | swv1.SampleRate = 3e6; 8 | y = swv1(); 9 | 10 | %% Tx set up 11 | tx = adi.AD9361.Tx('uri','ip:analog'); 12 | tx.CenterFrequency = 1e9; 13 | tx.DataSource = 'DMA'; 14 | tx.EnableCyclicBuffers = true; 15 | tx.AttenuationChannel0 = -10; 16 | tx(y); 17 | 18 | %% Rx set up 19 | rx = adi.AD9361.Rx('uri','ip:analog'); 20 | rx.CenterFrequency = tx.CenterFrequency; 21 | rx.EnabledChannels = 1; 22 | rx.kernelBuffersCount = 1; 23 | 24 | %% Run 25 | for k=1:10 26 | valid = false; 27 | while ~valid 28 | [out, valid] = rx(); 29 | end 30 | end 31 | tx.release(); 32 | rx.release(); 33 | 34 | figure(1); 35 | plot(0:numel(y)-1, real(y), 'r', 0:numel(y)-1, imag(y), 'b'); 36 | xlim([0 250]); 37 | xlabel('sample index'); 38 | grid on; -------------------------------------------------------------------------------- /trx_examples/streaming/ad936x/Pluto_DDS_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | %% Tx set up 4 | tx = adi.Pluto.Tx; 5 | tx.uri = 'ip:pluto'; 6 | tx.DataSource = 'DDS'; 7 | tx.DDSFrequencies = [1e5 1e5; 0 0]; 8 | tx.DDSPhases = [90e3 0; 0 0]; % expressed in millidegrees 9 | tx.DDSScales = [1 1; 0 0]; 10 | tx.CenterFrequency = 1e9; 11 | tx(); 12 | pause(1); 13 | 14 | %% Rx set up 15 | rx = adi.Pluto.Rx('uri','ip:pluto'); 16 | rx.CenterFrequency = tx.CenterFrequency; 17 | y = rx(); 18 | 19 | tx.release(); 20 | rx.release(); 21 | 22 | figure(1); 23 | plot(0:numel(y)-1, real(y), 'r', 0:numel(y)-1, imag(y), 'b'); 24 | xlim([0 250]); 25 | xlabel('sample index'); 26 | grid on; -------------------------------------------------------------------------------- /trx_examples/streaming/ad936x/Pluto_DMA_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | amplitude = 2^15; frequency = 0.12e6; 4 | swv1 = dsp.SineWave(amplitude, frequency); 5 | swv1.ComplexOutput = true; 6 | swv1.SamplesPerFrame = 1e4*10; 7 | swv1.SampleRate = 3e6; 8 | y = swv1(); 9 | 10 | %% Tx set up 11 | tx = adi.Pluto.Tx('uri','ip:Pluto'); 12 | tx.CenterFrequency = 1e9; 13 | tx.DataSource = 'DMA'; 14 | tx.EnableCyclicBuffers = true; 15 | tx.AttenuationChannel0 = -10; 16 | tx(y); 17 | 18 | %% Rx set up 19 | rx = adi.Pluto.Rx('uri','ip:Pluto'); 20 | rx.CenterFrequency = tx.CenterFrequency; 21 | rx.EnabledChannels = 1; 22 | rx.kernelBuffersCount = 1; 23 | 24 | %% Run 25 | for k=1:10 26 | valid = false; 27 | while ~valid 28 | [out, valid] = rx(); 29 | end 30 | end 31 | 32 | tx.release(); 33 | rx.release(); 34 | 35 | figure(1); 36 | plot(0:numel(y)-1, real(y), 'r', 0:numel(y)-1, imag(y), 'b'); 37 | xlim([0 250]); 38 | xlabel('sample index'); 39 | grid on; -------------------------------------------------------------------------------- /trx_examples/streaming/ad9371/AD9371_DDS_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | %% Tx set up 4 | tx = adi.AD9371.Tx('uri','ip:analog'); 5 | tx.DataSource = 'DDS'; 6 | toneFreq = 30e6; 7 | tx.DDSFrequencies = repmat(toneFreq,2,4); 8 | tx.DDSScales = zeros(2,4); 9 | tx.DDSScales(1,1:2) = [1 1]; 10 | tx.DDSPhases = zeros(2,4); 11 | tx.DDSPhases(1,1) = 90000; 12 | tx.AttenuationChannel0 = -10; 13 | tx.EnableCustomProfile = true; 14 | tx.CustomProfileFileName = ... 15 | 'profile_TxBW100_ORxBW100_RxBW100.txt'; 16 | tx(); 17 | pause(1); 18 | 19 | %% Rx set up 20 | rx = adi.AD9371.Rx('uri','ip:analog'); 21 | rx.EnabledChannels = 1; 22 | rx.kernelBuffersCount = 1; 23 | for k=1:10 24 | valid = false; 25 | while ~valid 26 | [y, valid] = rx(); 27 | end 28 | end 29 | 30 | figure(1); 31 | plot(0:numel(y)-1, real(y), 'r', 0:numel(y)-1, imag(y), 'b'); 32 | xlim([0 250]); 33 | xlabel('sample index'); 34 | grid on; 35 | 36 | rx.release(); 37 | tx.release(); -------------------------------------------------------------------------------- /trx_examples/streaming/ad9371/AD9371_DMA_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | amplitude = 2^15; frequency = 20e6; 4 | swv1 = dsp.SineWave(amplitude, frequency); 5 | swv1.ComplexOutput = true; 6 | swv1.SamplesPerFrame = 2^20; 7 | swv1.SampleRate = testCase.SamplingRateRX; 8 | x = swv1(); 9 | 10 | %% Tx set up 11 | tx = adi.AD9371.Tx('uri','ip:analog'); 12 | tx.CenterFrequency = 1e9; 13 | tx.DataSource = 'DMA'; 14 | tx.EnableCyclicBuffers = true; 15 | tx.AttenuationChannel0 = -10; 16 | tx.EnableCustomProfile = true; 17 | tx.CustomProfileFileName = ... 18 | 'profile_TxBW100_ORxBW100_RxBW100.txt'; 19 | tx(x); 20 | 21 | %% Rx set up 22 | rx = adi.AD9371.Rx('uri','ip:analog'); 23 | rx.CenterFrequency = tx.CenterFrequency; 24 | rx.EnabledChannels = 1; 25 | rx.kernelBuffersCount = 1; 26 | for k=1:20 27 | valid = false; 28 | while ~valid 29 | [y, valid] = rx(); 30 | end 31 | end 32 | 33 | figure(1); 34 | plot(0:numel(y)-1, real(y), 'r', 0:numel(y)-1, imag(y), 'b'); 35 | xlim([0 250]); 36 | xlabel('sample index'); 37 | grid on; 38 | 39 | rx.release(); 40 | tx.release(); -------------------------------------------------------------------------------- /trx_examples/streaming/ad9371/AD9371_MIMO_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | % Test Tx DMA data output 4 | amplitude = 2^15; frequency = 20e6; 5 | swv1 = dsp.SineWave(amplitude, frequency); 6 | swv1.ComplexOutput = true; 7 | swv1.SamplesPerFrame = 2^20; 8 | swv1.SampleRate = 122880000; 9 | y1 = swv1(); 10 | 11 | amplitude = 2^15; frequency = 10e6; 12 | swv1 = dsp.SineWave(amplitude, frequency); 13 | swv1.ComplexOutput = true; 14 | swv1.SamplesPerFrame = 2^20; 15 | swv1.SampleRate = 122880000; 16 | y2 = swv1(); 17 | 18 | uri = 'ip:analog'; 19 | fc = 1e9; 20 | 21 | %% Tx set up 22 | tx = adi.AD9371.Tx('uri',uri); 23 | tx.CenterFrequency = fc; 24 | tx.EnableCustomProfile = true; 25 | tx.CustomProfileFileName = 'profile_TxBW100_ORxBW100_RxBW100.txt'; 26 | tx.DataSource = 'DMA'; 27 | tx.EnableCyclicBuffers = true; 28 | tx.AttenuationChannel0 = -10; 29 | tx.EnabledChannels = [1 2]; 30 | tx([y1,y2]); 31 | 32 | %% Rx set up 33 | rx = adi.AD9371.Rx('uri',uri); 34 | rx.CenterFrequency = fc; 35 | rx.EnabledChannels = [1 2]; 36 | 37 | %% Run 38 | for k=1:20 39 | valid = false; 40 | while ~valid 41 | [out, valid] = rx(); 42 | end 43 | end 44 | rx.release(); 45 | tx.release(); 46 | 47 | %% Plot 48 | nSamp = length(out); 49 | fs = tx.SamplingRate; 50 | FFTRxData1 = fftshift(10*log10(abs(fft(out(:,1))))); 51 | FFTRxData2 = fftshift(10*log10(abs(fft(out(:,2))))); 52 | df = fs/nSamp; freqRangeRx = (-fs/2:df:fs/2-df).'/1e6; 53 | subplot(2,1,1); 54 | plot(freqRangeRx, FFTRxData1); 55 | xlabel('Frequency (MHz)');ylabel('Amplitude (dB)');grid on; 56 | subplot(2,1,2); 57 | plot(freqRangeRx, FFTRxData2); 58 | xlabel('Frequency (MHz)');ylabel('Amplitude (dB)');grid on; 59 | -------------------------------------------------------------------------------- /trx_examples/streaming/adrv9002/ADRV9002_DDS_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | %% Tx set up 4 | tx = adi.ADRV9002.Tx('uri','ip:analog'); 5 | tx.DataSource = 'DDS'; 6 | toneFreq = 5e5; 7 | tx.DDSFrequencies = repmat(toneFreq,2,2); 8 | tx.AttenuationChannel0 = -30; 9 | tx(); 10 | pause(1); 11 | 12 | %% Rx set up 13 | rx = adi.ADRV9002.Rx('uri','ip:analog'); 14 | rx.EnabledChannels = 1; 15 | rx.kernelBuffersCount = 1; 16 | 17 | %% Run 18 | for k=1:10 19 | valid = false; 20 | while ~valid 21 | [y, valid] = rx(); 22 | end 23 | end 24 | tx.release(); 25 | rx.release(); 26 | 27 | figure(1); 28 | plot(0:numel(y)-1, real(y), 'r', 0:numel(y)-1, imag(y), 'b'); 29 | xlim([0 250]); 30 | xlabel('sample index'); 31 | grid on; -------------------------------------------------------------------------------- /trx_examples/streaming/adrv9002/ADRV9002_DMA_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | uri = 'ip:analog'; 4 | 5 | amplitude = 2^15; frequency = 0.12e6; 6 | swv1 = dsp.SineWave(amplitude, frequency); 7 | swv1.ComplexOutput = true; 8 | swv1.SamplesPerFrame = 1e4*10; 9 | swv1.SampleRate = 7.68e6; 10 | x = swv1(); 11 | 12 | %% Set profile 13 | rx = adi.ADRV9002.Rx('uri', uri); 14 | rx.EnableCustomProfile = true; 15 | rx.CustomProfileFileName = 'lte_5_cmos_api_48_8_7.json'; 16 | rx.CustomStreamFileName = 'lte_5_cmos_api_48_8_7.stream'; 17 | rx(); 18 | 19 | %% Tx set up 20 | tx = adi.ADRV9002.Tx('uri', uri); 21 | tx.CenterFrequencyChannel0 = 1e9; 22 | tx.DataSource = 'DMA'; 23 | tx.EnableCyclicBuffers = true; 24 | tx.AttenuationChannel0 = -10; 25 | tx(x); 26 | 27 | %% Rx set up 28 | rx = adi.ADRV9002.Rx('uri', uri); 29 | rx.CenterFrequencyChannel0 = tx.CenterFrequencyChannel0; 30 | rx.EnabledChannels = 1; 31 | rx.kernelBuffersCount = 1; 32 | 33 | %% Run 34 | for k=1:10 35 | valid = false; 36 | while ~valid 37 | [out, valid] = rx(); 38 | end 39 | end 40 | 41 | tx.release(); 42 | rx.release(); 43 | 44 | figure(1); 45 | plot(0:numel(out)-1, real(out), 'r', 0:numel(out)-1, imag(out), 'b'); 46 | xlim([0 250]); 47 | xlabel('sample index'); 48 | grid on; -------------------------------------------------------------------------------- /trx_examples/streaming/adrv9002/lte_5_cmos_api_48_8_7.stream: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/adrv9002/lte_5_cmos_api_48_8_7.stream -------------------------------------------------------------------------------- /trx_examples/streaming/adrv9009/ADRV9009ZU11EG_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | % Test Tx DMA data output 4 | amplitude = 2^15; frequency = 20e6; 5 | swv1 = dsp.SineWave(amplitude, frequency); 6 | swv1.ComplexOutput = true; 7 | swv1.SamplesPerFrame = 2^20; 8 | swv1.SampleRate = 200e6; 9 | y = swv1(); 10 | 11 | uri = 'ip:analog'; 12 | fc = 1e9; 13 | 14 | %% Tx set up 15 | tx = adi.ADRV9009ZU11EG.Tx('uri',uri); 16 | tx.CenterFrequency = fc; 17 | tx.DataSource = 'DMA'; 18 | tx.EnableCyclicBuffers = true; 19 | tx.AttenuationChannel0 = -10; 20 | tx(y); 21 | 22 | %% Rx set up 23 | rx = adi.ADRV9009ZU11EG.Rx('uri',uri); 24 | rx.CenterFrequency = fc; 25 | rx.EnabledChannels = [1,2,3,4]; 26 | %% Run 27 | for k=1:20 28 | valid = false; 29 | while ~valid 30 | [out, valid] = rx(); 31 | end 32 | end 33 | rx.release(); 34 | tx.release(); 35 | 36 | %% Plot 37 | nSamp = length(out); 38 | fs = tx.SamplingRate; 39 | FFTRxData = fftshift(10*log10(abs(fft(out)))); 40 | df = fs/nSamp; freqRangeRx = (-fs/2:df:fs/2-df).'/1000; 41 | plot(freqRangeRx, FFTRxData); 42 | xlabel('Frequency (kHz)');ylabel('Amplitude (dB)');grid on; 43 | 44 | -------------------------------------------------------------------------------- /trx_examples/streaming/adrv9009/ADRV9009_DDS_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | %% Tx set up 4 | tx = adi.ADRV9009.Tx('uri','ip:analog'); 5 | tx.DataSource = 'DDS'; 6 | toneFreq = 30e6; 7 | tx.DDSFrequencies = repmat(toneFreq,2,4); 8 | tx.AttenuationChannel0 = -10; 9 | tx.EnableCustomProfile = true; 10 | tx.CustomProfileFileName = ... 11 | 'Tx_BW200_IR245p76_Rx_BW200_OR245p76_ORx_BW200_OR245p76_DC245p76.txt'; 12 | tx(); 13 | pause(1); 14 | 15 | %% Rx set up 16 | rx = adi.ADRV9009.Rx('uri','ip:analog'); 17 | rx.EnabledChannels = 1; 18 | rx.kernelBuffersCount = 1; 19 | for k=1:10 20 | valid = false; 21 | while ~valid 22 | [y, valid] = rx(); 23 | end 24 | end 25 | 26 | tx.release(); 27 | rx.release(); 28 | 29 | figure(1); 30 | plot(0:numel(y)-1, real(y), 'r', 0:numel(y)-1, imag(y), 'b'); 31 | xlim([0 250]); 32 | xlabel('sample index'); 33 | grid on; -------------------------------------------------------------------------------- /trx_examples/streaming/adrv9009/ADRV9009_DMA_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | amplitude = 2^15; frequency = 20e6; 4 | swv1 = dsp.SineWave(amplitude, frequency); 5 | swv1.ComplexOutput = true; 6 | swv1.SamplesPerFrame = 2^20; 7 | swv1.SampleRate = 245.76e6; 8 | x = swv1(); 9 | 10 | %% Tx set up 11 | tx = adi.ADRV9009.Tx('uri','ip:analog'); 12 | tx.DataSource = 'DMA'; 13 | tx.EnableCyclicBuffers = true; 14 | tx.AttenuationChannel0 = -10; 15 | tx.EnableCustomProfile = true; 16 | tx.CustomProfileFileName = ... 17 | 'Tx_BW200_IR245p76_Rx_BW200_OR245p76_ORx_BW200_OR245p76_DC245p76.txt'; 18 | tx(x); 19 | 20 | %% Rx set up 21 | rx = adi.ADRV9009.Rx('uri','ip:analog'); 22 | rx.EnabledChannels = 1; 23 | rx.kernelBuffersCount = 1; 24 | for k=1:20 25 | valid = false; 26 | while ~valid 27 | [y, valid] = rx(); 28 | end 29 | end 30 | 31 | tx.release(); 32 | rx.release(); 33 | 34 | figure(1); 35 | plot(0:numel(y)-1, real(y), 'r', 0:numel(y)-1, imag(y), 'b'); 36 | xlim([0 250]); 37 | xlabel('sample index'); 38 | grid on; -------------------------------------------------------------------------------- /trx_examples/streaming/adrv9009/ADRV9009_ORx_Example.m: -------------------------------------------------------------------------------- 1 | clear all; 2 | 3 | % Test Tx DMA data output 4 | amplitude = 2^15; frequency = 20e6; 5 | swv1 = dsp.SineWave(amplitude, frequency); 6 | swv1.ComplexOutput = true; 7 | swv1.SamplesPerFrame = 2^20; 8 | swv1.SampleRate = 200e6; 9 | y = swv1(); 10 | 11 | uri = 'ip:analog'; 12 | fc = 1e9; 13 | 14 | %% Tx set up 15 | tx = adi.ADRV9009.Tx('uri',uri); 16 | tx.CenterFrequency = fc; 17 | tx.EnableCustomProfile = true; 18 | tx.CustomProfileFileName = 'Tx_BW200_IR245p76_Rx_BW100_OR122p88_ORx_BW200_OR245p76_DC245p76.txt'; 19 | tx.DataSource = 'DMA'; 20 | tx.EnableCyclicBuffers = true; 21 | tx.AttenuationChannel0 = -10; 22 | tx(y); 23 | 24 | %% Rx set up 25 | rx = adi.ADRV9009.ORx('uri',uri); 26 | rx.CenterFrequency = fc; 27 | 28 | %% Run 29 | for k=1:20 30 | valid = false; 31 | while ~valid 32 | [out, valid] = rx(); 33 | end 34 | end 35 | rx.release(); 36 | tx.release(); 37 | 38 | %% Plot 39 | nSamp = length(out); 40 | fs = tx.SamplingRate; 41 | FFTRxData = fftshift(10*log10(abs(fft(out)))); 42 | df = fs/nSamp; freqRangeRx = (-fs/2:df:fs/2-df).'/1000; 43 | plot(freqRangeRx, FFTRxData); 44 | xlabel('Frequency (kHz)');ylabel('Amplitude (dB)');grid on; 45 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_MATLAB/ConvertFracDeg.m: -------------------------------------------------------------------------------- 1 | function [dd,mm,ss] = ConvertFracDeg(degIn) 2 | 3 | % Copyright 2010, The MathWorks, Inc. 4 | 5 | if degIn>0 6 | dd=floor(degIn); 7 | else 8 | dd=ceil(degIn); 9 | end 10 | fracd = abs(degIn-dd); 11 | if dd==0 12 | if degIn>0 13 | mm=floor(fracd*60); 14 | fracm = fracd-(mm/60); 15 | else 16 | mm=-floor(fracd*60); 17 | fracm = fracd+(mm/60); 18 | end 19 | else 20 | mm=floor(fracd*60); 21 | fracm = fracd-(mm/60); 22 | end 23 | if (dd==0 && mm==0) 24 | if degIn>0 25 | ss=(fracm*3600); 26 | else 27 | ss=-(fracm*3600); 28 | end 29 | else 30 | ss=(fracm*3600); 31 | end 32 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_MATLAB/ModeS_BitDecode4.m: -------------------------------------------------------------------------------- 1 | function [goodCRC, bits] = ModeS_BitDecode4(yIn) 2 | 3 | % Copyright 2010-2011, The MathWorks, Inc. 4 | 5 | bits = false(1,112); 6 | diffVals = zeros(1,112); 7 | idx=round(12:12.5:1500); 8 | b1 = [ones(6,1);zeros(6,1)]; 9 | b0 = flipud(b1); 10 | 11 | matchedFilter = filter(b0,1,yIn); 12 | thr = filter(b1,1,yIn); 13 | 14 | for ii = 1:112 15 | if matchedFilter(idx(ii)) < thr(idx(ii)) 16 | bits(ii) = false; 17 | else 18 | bits(ii) = true; 19 | end 20 | diffVals(ii) = abs(matchedFilter(idx(ii))-thr(idx(ii))); 21 | end 22 | 23 | encoded = crc24f(bits(1:88)); 24 | encoded56 = crc24f(bits(1:32)); 25 | 26 | if all(bits(89:112) == encoded(89:112)) 27 | goodCRC = 1; 28 | elseif all(bits(33:56) == encoded56(33:56)) 29 | goodCRC = 2; 30 | else 31 | goodCRC = 0; 32 | end 33 | 34 | function y = crc24f(m) 35 | %#codegen 36 | 37 | persistent hcrc; 38 | 39 | if isempty(hcrc) 40 | g = logical([1 0 0 1 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1]); 41 | gflip = fliplr(g); 42 | hcrc = comm.CRCGenerator(gflip); 43 | end 44 | reset(hcrc); 45 | y = step(hcrc,m'); 46 | y = y'; -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_MATLAB/ModeS_DataSearch4.m: -------------------------------------------------------------------------------- 1 | function [rxMsg, SQ] = ModeS_DataSearch4(data, thr, SQ,location,lat,lon) 2 | 3 | % Copyright 2010-2011, The MathWorks, Inc. 4 | 5 | m = mean(data); 6 | recCount = 0; 7 | rxMsg = '8D00000000000000000000000000'; 8 | 9 | % fileIndex = find(data>thr*m,1,'first'); 10 | 11 | fileIdx = find(data>thr*m); 12 | if ~isempty(fileIdx) 13 | nextIdx = 0; 14 | for ii = 1:numel(fileIdx); 15 | if (fileIdx(ii)>nextIdx) 16 | fileIndex = fileIdx(ii); 17 | if (fileIndex > 100 && fileIndex < length(data)-1900) 18 | [rx, SQ] = ModeS_ReadMsg4(data(fileIndex-100:fileIndex+1899),SQ,location,lat,lon); 19 | else 20 | rx = '8d00000000000000000000000000'; 21 | end 22 | if (strcmp(rx,'8d00000000000000000000000000')==0) 23 | recCount = recCount+1; 24 | rxMsg(recCount,:) = rx; 25 | end 26 | nextIdx = fileIdx(ii)+1899; 27 | end 28 | end 29 | end -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_MATLAB/ModeS_Receiver.m: -------------------------------------------------------------------------------- 1 | function ModeS_Receiver(location,lat,lon,Rx) 2 | 3 | % Copyright 2010, The MathWorks, Inc. 4 | 5 | close all; 6 | hfilt = dsp.FIRInterpolator(5); 7 | searchThr = 5; 8 | 9 | SQD = repmat({' ',' ',' ',' ',' ',' ',' ',' ',rem(now,1),false},10,1); 10 | f = figure('Position',[100 100 1040 400]); 11 | uit = uitable(f,'Data',SQD,... 12 | 'ColumnName',({'Aircraft ID','Altitude','N/S vel','E/W vel','Lat',... 13 | 'Long','U/D vel','Flight ID','Time',' '}),... 14 | 'ColumnWidth',{100,100,100,100,100,100,100,120,100,30},... 15 | 'ColumnFormat',{'char','char','char','char',... 16 | 'bank','bank','char','char','char','logical'},... 17 | 'Position',[20 20 990 340],... 18 | 'FontSize',16); 19 | 20 | data2 = abs(step(hfilt,Rx)); 21 | 22 | [rxMsg, SQD2] = ModeS_DataSearch4(data2, searchThr, SQD,location,lat,lon); 23 | 24 | if ~isequal(SQD,SQD2) 25 | SQD = SQD2; 26 | for idx = 1:10 27 | if isnumeric(SQD2{idx,9}) 28 | if strcmp(SQD2{idx,1},' ') 29 | SQD2{idx,9} = ' '; 30 | else 31 | SQD2{idx,9} = datestr(SQD2{idx,9},'HH:MM:SS'); 32 | end 33 | end 34 | end 35 | set(uit,'Data',SQD2); 36 | drawnow; 37 | pause(0.5); 38 | for idx = 1:10 39 | SQD{idx,10} = false; 40 | end 41 | end -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_MATLAB/ad9361.cfg: -------------------------------------------------------------------------------- 1 | data_in_device = cf-ad9361-dds-core-lpc 2 | data_out_device = cf-ad9361-lpc 3 | ctrl_device = ad9361-phy 4 | channel = RX_LO_FREQ,IN,out_altvoltage0_RX_LO_frequency, 5 | channel = RX_SAMPLING_FREQ,IN,in_voltage_sampling_frequency, 6 | channel = RX_RF_BANDWIDTH,IN,in_voltage_rf_bandwidth, 7 | channel = RX1_GAIN_MODE,IN,in_voltage0_gain_control_mode, 8 | channel = RX1_GAIN,IN,in_voltage0_hardwaregain, 9 | channel = RX1_RSSI,OUT,in_voltage0_rssi, 10 | channel = RX2_GAIN_MODE,IN,in_voltage1_gain_control_mode, 11 | channel = RX2_GAIN,IN,in_voltage1_hardwaregain, 12 | channel = RX2_RSSI,OUT,in_voltage1_rssi, 13 | channel = TX_LO_FREQ,IN,out_altvoltage1_TX_LO_frequency, 14 | channel = TX_SAMPLING_FREQ,IN,out_voltage_sampling_frequency, 15 | channel = TX_RF_BANDWIDTH,IN,out_voltage_rf_bandwidth, 16 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_MATLAB/newModeS.mat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/ADSB_MATLAB/newModeS.mat -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_Simulink/ConvertFracDeg.m: -------------------------------------------------------------------------------- 1 | function [dd,mm,ss] = ConvertFracDeg(degIn) 2 | 3 | % Copyright 2010, The MathWorks, Inc. 4 | 5 | if degIn>0 6 | dd=floor(degIn); 7 | else 8 | dd=ceil(degIn); 9 | end 10 | fracd = abs(degIn-dd); 11 | if dd==0 12 | if degIn>0 13 | mm=floor(fracd*60); 14 | fracm = fracd-(mm/60); 15 | else 16 | mm=-floor(fracd*60); 17 | fracm = fracd+(mm/60); 18 | end 19 | else 20 | mm=floor(fracd*60); 21 | fracm = fracd-(mm/60); 22 | end 23 | if (dd==0 && mm==0) 24 | if degIn>0 25 | ss=(fracm*3600); 26 | else 27 | ss=-(fracm*3600); 28 | end 29 | else 30 | ss=(fracm*3600); 31 | end 32 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_Simulink/DecodeBits.m: -------------------------------------------------------------------------------- 1 | function DecodeBits(bits) 2 | 3 | % Copyright 2010, The MathWorks, Inc. 4 | 5 | c = reshape(bits(1:112),4,28); 6 | d = bin2dec(num2str(c')); 7 | rxBytes = dec2hex(d)'; 8 | s1 = sprintf('Aircraft ID %s Long Message CRC: %s', rxBytes(3:8), rxBytes); 9 | disp(s1) 10 | if rxBytes(9) == '9' && rxBytes(10) == '9' 11 | [nV, eV, aV] = AltVelCalc(rxBytes); 12 | elseif rxBytes(9) == '5' || rxBytes(9) == '6' 13 | [alt, lat, long] = LatLongCalcSingle(rxBytes); 14 | elseif rxBytes(9) == '9' && rxBytes(10) =='0' 15 | [alt, lat, long] = LatLongCalcSingle(rxBytes); 16 | end 17 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_Simulink/ModeS_FixPt_Pipelined_ADI.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/ADSB_Simulink/ModeS_FixPt_Pipelined_ADI.slx -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_Simulink/data_Yb.mat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/ADSB_Simulink/data_Yb.mat -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_Simulink_libiio/ConvertFracDeg.m: -------------------------------------------------------------------------------- 1 | function [dd,mm,ss] = ConvertFracDeg(degIn) 2 | 3 | % Copyright 2010, The MathWorks, Inc. 4 | 5 | if degIn>0 6 | dd=floor(degIn); 7 | else 8 | dd=ceil(degIn); 9 | end 10 | fracd = abs(degIn-dd); 11 | if dd==0 12 | if degIn>0 13 | mm=floor(fracd*60); 14 | fracm = fracd-(mm/60); 15 | else 16 | mm=-floor(fracd*60); 17 | fracm = fracd+(mm/60); 18 | end 19 | else 20 | mm=floor(fracd*60); 21 | fracm = fracd-(mm/60); 22 | end 23 | if (dd==0 && mm==0) 24 | if degIn>0 25 | ss=(fracm*3600); 26 | else 27 | ss=-(fracm*3600); 28 | end 29 | else 30 | ss=(fracm*3600); 31 | end 32 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_Simulink_libiio/DecodeBits.m: -------------------------------------------------------------------------------- 1 | function DecodeBits(bits) 2 | 3 | % Copyright 2010, The MathWorks, Inc. 4 | 5 | c = reshape(bits(1:112),4,28); 6 | d = bin2dec(num2str(c')); 7 | rxBytes = dec2hex(d)'; 8 | s1 = sprintf('Aircraft ID %s Long Message CRC: %s', rxBytes(3:8), rxBytes); 9 | disp(s1) 10 | if rxBytes(9) == '9' && rxBytes(10) == '9' 11 | [nV, eV, aV] = AltVelCalc(rxBytes); 12 | elseif rxBytes(9) == '5' || rxBytes(9) == '6' 13 | [alt, lat, long] = LatLongCalcSingle(rxBytes); 14 | elseif rxBytes(9) == '9' && rxBytes(10) =='0' 15 | [alt, lat, long] = LatLongCalcSingle(rxBytes); 16 | end 17 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_Simulink_libiio/ModeS_Simulink_libiio.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/ADSB_Simulink_libiio/ModeS_Simulink_libiio.slx -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_Simulink_libiio/ad9361.cfg: -------------------------------------------------------------------------------- 1 | data_in_device = cf-ad9361-dds-core-lpc 2 | data_out_device = cf-ad9361-lpc 3 | ctrl_device = ad9361-phy 4 | channel = RX_LO_FREQ,IN,out_altvoltage0_RX_LO_frequency, 5 | channel = RX_SAMPLING_FREQ,IN,in_voltage_sampling_frequency, 6 | channel = RX_RF_BANDWIDTH,IN,in_voltage_rf_bandwidth, 7 | channel = RX1_GAIN_MODE,IN,in_voltage0_gain_control_mode, 8 | channel = RX1_GAIN,IN,in_voltage0_hardwaregain, 9 | channel = RX1_RSSI,OUT,in_voltage0_rssi, 10 | channel = RX2_GAIN_MODE,IN,in_voltage1_gain_control_mode, 11 | channel = RX2_GAIN,IN,in_voltage1_hardwaregain, 12 | channel = RX2_RSSI,OUT,in_voltage1_rssi, 13 | channel = TX_LO_FREQ,IN,out_altvoltage1_TX_LO_frequency, 14 | channel = TX_SAMPLING_FREQ,IN,out_voltage_sampling_frequency, 15 | channel = TX_RF_BANDWIDTH,IN,out_voltage_rf_bandwidth, 16 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_Simulink_libiio/data_Yb.mat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/ADSB_Simulink_libiio/data_Yb.mat -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_transmitter/adsbTxGen.m: -------------------------------------------------------------------------------- 1 | function txData = adsbTxGen(msg) 2 | % Generate ADSB messages to transmit 3 | % Input msg: ADSB messages characters 4 | % Example: txData = adsbTxGen('8D86D5E058135037C0A9112B72B7'); 5 | 6 | % Copyright 2016, The MathWorks, Inc. 7 | 8 | % Preamble 9 | syncPattern = logical([1 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0]); 10 | 11 | % Convert msg characters to bits 12 | msgsz=size(msg); 13 | msgBits = logical(zeros(msgsz(1),4*msgsz(2))); 14 | for ii=1:msgsz(1) 15 | for jj=1:msgsz(2) 16 | decNum = hex2dec(msg(ii,jj)); 17 | msgBits(ii,(jj-1)*4+1:jj*4) = logical(fliplr(de2bi(decNum,4))); 18 | end 19 | end 20 | 21 | % Build ADSB waveform 22 | sz=size(msgBits); 23 | adsbWF = false(sz(1),sz(2)*2+length(syncPattern)); 24 | for jj=1:sz(1) 25 | adsbWF(jj,1:16) = syncPattern; 26 | for ii=1:sz(2) 27 | if msgBits(jj,ii) == 1 28 | adsbWF(jj,16+(ii-1)*2+1:16+ii*2) = [true false]; 29 | else 30 | adsbWF(jj,16+(ii-1)*2+1:16+ii*2) = [false true]; 31 | end 32 | end 33 | end 34 | 35 | % Add zeros to the end of the waveform 36 | wfsz = size(adsbWF); 37 | wfLength=wfsz(2); 38 | txZeros = single(complex(zeros(wfLength*49,1))); 39 | ppm = single(adsbWF.'); 40 | txData=[ppm(:,1);txZeros]; 41 | 42 | % Resample the waveform 43 | txData = resample(double(txData),25,4); 44 | 45 | % Add noise and scale 46 | txData = awgn(txData,80)*1e-4; 47 | 48 | end -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ADSB_transmitter/txData.mat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/ADSB_transmitter/txData.mat -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/LTE_MATLAB/ad9361.cfg: -------------------------------------------------------------------------------- 1 | data_in_device = cf-ad9361-dds-core-lpc 2 | data_out_device = cf-ad9361-lpc 3 | ctrl_device = ad9361-phy 4 | channel = RX_LO_FREQ,IN,out_altvoltage0_RX_LO_frequency, 5 | channel = RX_SAMPLING_FREQ,IN,in_voltage_sampling_frequency, 6 | channel = RX_RF_BANDWIDTH,IN,in_voltage_rf_bandwidth, 7 | channel = RX1_GAIN_MODE,IN,in_voltage0_gain_control_mode, 8 | channel = RX1_GAIN,IN,in_voltage0_hardwaregain, 9 | channel = RX1_RSSI,OUT,in_voltage0_rssi, 10 | channel = RX2_GAIN_MODE,IN,in_voltage1_gain_control_mode, 11 | channel = RX2_GAIN,IN,in_voltage1_hardwaregain, 12 | channel = RX2_RSSI,OUT,in_voltage1_rssi, 13 | channel = TX_LO_FREQ,IN,out_altvoltage1_TX_LO_frequency, 14 | channel = TX_SAMPLING_FREQ,IN,out_voltage_sampling_frequency, 15 | channel = TX_RF_BANDWIDTH,IN,out_voltage_rf_bandwidth, 16 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/LTE_MATLAB/demo.m: -------------------------------------------------------------------------------- 1 | function demo(IP) 2 | %while(1) 3 | [plots,~,~]=ad9361_LTE(IP,'LTE1.4'); 4 | close all; 5 | 6 | delete(plots{1});delete(plots{2});delete(plots{3});delete(plots{4}); 7 | clear functions; 8 | [plots,~,~]=ad9361_LTE(IP,'LTE3'); 9 | close all; 10 | 11 | delete(plots{1});delete(plots{2});delete(plots{3});delete(plots{4}); 12 | clear functions; 13 | [plots,~,~]=ad9361_LTE(IP,'LTE5'); 14 | close all; 15 | 16 | delete(plots{1});delete(plots{2});delete(plots{3});delete(plots{4}); 17 | clear functions; 18 | [plots,~,~]=ad9361_LTE(IP,'LTE10'); 19 | close all; 20 | 21 | delete(plots{1});delete(plots{2});delete(plots{3});delete(plots{4}); 22 | clear functions; 23 | %end -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/adrv9009/adrv9009.cfg: -------------------------------------------------------------------------------- 1 | data_in_device = axi-adrv9009-tx-hpc 2 | data_out_device = axi-adrv9009-rx-hpc 3 | ctrl_device = adrv9009-phy 4 | channel = TRX_LO_FREQ,IN,out_altvoltage0_TRX_LO_frequency, 5 | channel = RX1_RF_BANDWIDTH,IN,in_voltage0_rf_bandwidth, 6 | channel = RX1_GAIN_MODE,IN,in_voltage0_gain_control_mode, 7 | channel = RX1_GAIN,IN,in_voltage0_hardwaregain, 8 | channel = RX2_RF_BANDWIDTH,IN,in_voltage1_rf_bandwidth, 9 | channel = RX2_GAIN_MODE,IN,in_voltage1_gain_control_mode, 10 | channel = RX2_GAIN,IN,in_voltage1_hardwaregain, 11 | channel = TX_RF_BANDWIDTH,IN,out_voltage0_rf_bandwidth, 12 | channel = TX_GAIN,IN,out_voltage0_hardwaregain, 13 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/adrv9009/adrv9009_matlab.m: -------------------------------------------------------------------------------- 1 | clear; 2 | clc; 3 | 4 | s = iio_sys_obj_matlab; % Constructor 5 | s.ip_address = '10.66.99.200'; 6 | s.dev_name = 'adrv9009'; 7 | s.in_ch_no = 2; 8 | s.out_ch_no = 2; 9 | s.in_ch_size = 8192; 10 | s.out_ch_size = 8192; 11 | 12 | s = s.setupImpl(); 13 | 14 | input = cell(1, s.in_ch_no + length(s.iio_dev_cfg.cfg_ch)); 15 | Fs = 245.76e6; 16 | Fc = 1e6; 17 | Bw = 200e6; 18 | t = 1/Fs:1/Fs:s.in_ch_size/Fs; 19 | for i=1:s.in_ch_no 20 | input{i} = sin(2*pi*Fc*t+(i-1)*pi/2)*2^15; 21 | end 22 | 23 | input{s.getInChannel('TRX_LO_FREQ')} = 2.45e9; 24 | input{s.getInChannel('RX1_RF_BANDWIDTH')} = Bw; 25 | input{s.getInChannel('RX1_GAIN_MODE')} = 'slow_attack'; 26 | input{s.getInChannel('RX1_GAIN')} = 0; 27 | input{s.getInChannel('RX2_GAIN_MODE')} = 'slow_attack'; 28 | input{s.getInChannel('RX2_RF_BANDWIDTH')} = Bw; 29 | input{s.getInChannel('RX2_GAIN')} = 0; 30 | input{s.getInChannel('TX_RF_BANDWIDTH')} = Bw; 31 | input{s.getInChannel('TX_GAIN')} = -20; 32 | 33 | for i = 1:20 34 | output = stepImpl(s, input); 35 | end 36 | 37 | s.releaseImpl(); 38 | 39 | figure % new figure 40 | ax1 = subplot(2,1,1); % top subplot 41 | ax2 = subplot(2,1,2); % bottom subplot 42 | 43 | plot(ax1,output{1}); 44 | title(ax1,'I'); 45 | xlabel('Sample'); 46 | ylabel('Amplitude'); 47 | 48 | plot(ax2,output{2}); 49 | title(ax2,'Q'); 50 | xlabel('Sample'); 51 | ylabel('Amplitude'); 52 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/adrv9371/ad9371.cfg: -------------------------------------------------------------------------------- 1 | data_in_device = axi-ad9371-tx-hpc 2 | data_out_device = axi-ad9371-rx-hpc 3 | ctrl_device = ad9371-phy 4 | channel = RX_LO_FREQ,IN,out_altvoltage0_RX_LO_frequency, 5 | channel = RX1_RF_BANDWIDTH,IN,in_voltage0_rf_bandwidth, 6 | channel = RX1_GAIN_MODE,IN,in_voltage0_gain_control_mode, 7 | channel = RX1_GAIN,IN,in_voltage0_hardwaregain, 8 | channel = RX1_RSSI,OUT,in_voltage0_rssi, 9 | channel = RX2_RF_BANDWIDTH,IN,in_voltage1_rf_bandwidth, 10 | channel = RX2_GAIN_MODE,IN,in_voltage1_gain_control_mode, 11 | channel = RX2_GAIN,IN,in_voltage1_hardwaregain, 12 | channel = RX2_RSSI,OUT,in_voltage1_rssi, 13 | channel = TX_LO_FREQ,IN,out_altvoltage1_TX_LO_frequency, 14 | channel = TX_RF_BANDWIDTH,IN,out_voltage0_rf_bandwidth, 15 | channel = TX_GAIN,IN,out_voltage0_hardwaregain, 16 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/adrv9371/ad9371_matlab.m: -------------------------------------------------------------------------------- 1 | clear; 2 | clc; 3 | 4 | s = iio_sys_obj_matlab; % Constructor 5 | s.ip_address = '10.66.99.200'; 6 | s.dev_name = 'ad9371'; 7 | s.in_ch_no = 1; 8 | s.out_ch_no = 2; 9 | s.in_ch_size = 8192; 10 | s.out_ch_size = 8192; 11 | 12 | s = s.setupImpl(); 13 | 14 | input = cell(1, s.in_ch_no + length(s.iio_dev_cfg.cfg_ch)); 15 | Fs = 245760000; 16 | Fc = 1e6; 17 | Bw = 75000000; 18 | t = 1/Fs:1/Fs:s.in_ch_size/Fs; 19 | for i=1:s.in_ch_no 20 | input{i} = sin(2*pi*Fc*t+(i-1)*pi/2)*2^15; 21 | end 22 | 23 | input{s.getInChannel('RX_LO_FREQ')} = 2.45e9; 24 | input{s.getInChannel('RX1_RF_BANDWIDTH')} = Bw; 25 | input{s.getInChannel('RX1_GAIN_MODE')} = 'automatic'; 26 | input{s.getInChannel('RX1_GAIN')} = 0; 27 | input{s.getInChannel('RX2_GAIN_MODE')} = 'automatic'; 28 | input{s.getInChannel('RX2_RF_BANDWIDTH')} = Bw; 29 | input{s.getInChannel('RX2_GAIN')} = 0; 30 | input{s.getInChannel('TX_LO_FREQ')} = 2.45e9; 31 | input{s.getInChannel('TX_RF_BANDWIDTH')} = Bw; 32 | input{s.getInChannel('TX_GAIN')} = -20; 33 | 34 | output = cell(1, s.out_ch_no + length(s.iio_dev_cfg.mon_ch)); 35 | 36 | for i = 1:20 37 | output = stepImpl(s, input); 38 | rssi1 = output{s.out_ch_no+1}; 39 | rssi2 = output{s.out_ch_no+2}; 40 | end 41 | 42 | s.releaseImpl(); 43 | 44 | figure % new figure 45 | ax1 = subplot(2,1,1); % top subplot 46 | ax2 = subplot(2,1,2); % bottom subplot 47 | 48 | plot(ax1,output{1}); 49 | title(ax1,'I'); 50 | xlabel('Sample'); 51 | ylabel('Amplitude'); 52 | 53 | plot(ax2,output{2}); 54 | title(ax2,'Q'); 55 | xlabel('Sample'); 56 | ylabel('Amplitude'); -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/daq2_data_stream/daq2.cfg: -------------------------------------------------------------------------------- 1 | data_in_device = axi-ad9144-hpc 2 | data_out_device = axi-ad9680-hpc 3 | ctrl_device = ad9523-1 -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/daq2_data_stream/daq2_sim.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/daq2_data_stream/daq2_sim.slx -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/fmcomms2_3_data_stream/ad9361.cfg: -------------------------------------------------------------------------------- 1 | data_in_device = cf-ad9361-dds-core-lpc 2 | data_out_device = cf-ad9361-lpc 3 | ctrl_device = ad9361-phy 4 | channel = RX_LO_FREQ,IN,out_altvoltage0_RX_LO_frequency, 5 | channel = RX_SAMPLING_FREQ,IN,in_voltage_sampling_frequency, 6 | channel = RX_RF_BANDWIDTH,IN,in_voltage_rf_bandwidth, 7 | channel = RX1_GAIN_MODE,IN,in_voltage0_gain_control_mode, 8 | channel = RX1_GAIN,IN,in_voltage0_hardwaregain, 9 | channel = RX1_RSSI,OUT,in_voltage0_rssi, 10 | channel = RX2_GAIN_MODE,IN,in_voltage1_gain_control_mode, 11 | channel = RX2_GAIN,IN,in_voltage1_hardwaregain, 12 | channel = RX2_RSSI,OUT,in_voltage1_rssi, 13 | channel = TX_LO_FREQ,IN,out_altvoltage1_TX_LO_frequency, 14 | channel = TX_SAMPLING_FREQ,IN,out_voltage_sampling_frequency, 15 | channel = TX_RF_BANDWIDTH,IN,out_voltage_rf_bandwidth, 16 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/fmcomms2_3_data_stream/ad9361_matlab.m: -------------------------------------------------------------------------------- 1 | clear; 2 | clc; 3 | 4 | s = iio_sys_obj_matlab; % Constructor 5 | s.ip_address = '10.66.99.200'; 6 | s.dev_name = 'ad9361'; 7 | s.in_ch_no = 2; 8 | s.out_ch_no = 2; 9 | s.in_ch_size = 8192; 10 | s.out_ch_size = 8192; 11 | 12 | s = s.setupImpl(); 13 | 14 | input = cell(1, s.in_ch_no + length(s.iio_dev_cfg.cfg_ch)); 15 | Fs = 30.72e6; 16 | Fc = 1e6; 17 | t = 1/Fs:1/Fs:s.in_ch_size/Fs; 18 | for i=1:s.in_ch_no 19 | input{i} = sin(2*pi*Fc*t+(i-1)*pi/2)*1024; 20 | end 21 | input{s.getInChannel('RX_LO_FREQ')} = 2.4e9; 22 | input{s.getInChannel('RX_SAMPLING_FREQ')} = 30.72e6; 23 | input{s.getInChannel('RX_RF_BANDWIDTH')} = 18.0e6; 24 | input{s.getInChannel('RX1_GAIN_MODE')} = 'slow_attack'; 25 | input{s.getInChannel('RX1_GAIN')} = 0; 26 | input{s.getInChannel('RX2_GAIN_MODE')} = 'slow_attack'; 27 | input{s.getInChannel('RX2_GAIN')} = 0; 28 | input{s.getInChannel('TX_LO_FREQ')} = 2.4e9; 29 | input{s.getInChannel('TX_SAMPLING_FREQ')} = 30.72e6; 30 | input{s.getInChannel('TX_RF_BANDWIDTH')} = 18.0e6; 31 | 32 | output = cell(1, s.out_ch_no + length(s.iio_dev_cfg.mon_ch)); 33 | 34 | for i = 1:5 35 | output = stepImpl(s, input); 36 | rssi1 = output{s.out_ch_no+1}; 37 | rssi2 = output{s.out_ch_no+2}; 38 | end 39 | 40 | s.releaseImpl(); 41 | 42 | figure % new figure 43 | ax1 = subplot(2,1,1); % top subplot 44 | ax2 = subplot(2,1,2); % bottom subplot 45 | 46 | plot(ax1,output{1}); 47 | title(ax1,'I'); 48 | xlabel('Sample'); 49 | ylabel('Amplitude'); 50 | 51 | plot(ax2,output{2}); 52 | title(ax2,'Q'); 53 | xlabel('Sample'); 54 | ylabel('Amplitude'); -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/fmcomms2_3_data_stream/ad9361_sim.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/fmcomms2_3_data_stream/ad9361_sim.slx -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/fmcomms4_data_stream/ad9364.cfg: -------------------------------------------------------------------------------- 1 | data_in_device = cf-ad9361-dds-core-lpc 2 | data_out_device = cf-ad9361-lpc 3 | ctrl_device = ad9361-phy 4 | channel = RX_LO_FREQ,IN,out_altvoltage0_RX_LO_frequency, 5 | channel = RX_SAMPLING_FREQ,IN,in_voltage_sampling_frequency, 6 | channel = RX_RF_BANDWIDTH,IN,in_voltage_rf_bandwidth, 7 | channel = RX_GAIN_MODE,IN,in_voltage0_gain_control_mode, 8 | channel = RX_GAIN,IN,in_voltage0_hardwaregain, 9 | channel = RX_RSSI,OUT,in_voltage0_rssi, 10 | channel = TX_LO_FREQ,IN,out_altvoltage1_TX_LO_frequency, 11 | channel = TX_SAMPLING_FREQ,IN,out_voltage_sampling_frequency, 12 | channel = TX_RF_BANDWIDTH,IN,out_voltage_rf_bandwidth, 13 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/fmcomms4_data_stream/ad9364_sim.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/fmcomms4_data_stream/ad9364_sim.slx -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/fmcomms5_data_stream/ad9361-1.cfg: -------------------------------------------------------------------------------- 1 | data_in_device = cf-ad9361-dds-core-lpc 2 | data_out_device = cf-ad9361-A 3 | ctrl_device = ad9361-phy 4 | channel = RX_LO_FREQ,IN,out_altvoltage0_RX_LO_frequency, 5 | channel = RX_SAMPLING_FREQ,IN,in_voltage_sampling_frequency, 6 | channel = RX_RF_BANDWIDTH,IN,in_voltage_rf_bandwidth, 7 | channel = RX1_GAIN_MODE,IN,in_voltage0_gain_control_mode, 8 | channel = RX1_GAIN,IN,in_voltage0_hardwaregain, 9 | channel = RX1_RSSI,OUT,in_voltage0_rssi, 10 | channel = RX2_GAIN_MODE,IN,in_voltage1_gain_control_mode, 11 | channel = RX2_GAIN,IN,in_voltage1_hardwaregain, 12 | channel = RX2_RSSI,OUT,in_voltage1_rssi, 13 | channel = TX_LO_FREQ,IN,out_altvoltage1_TX_LO_frequency, 14 | channel = TX_SAMPLING_FREQ,IN,out_voltage_sampling_frequency, 15 | channel = TX_RF_BANDWIDTH,IN,out_voltage_rf_bandwidth, 16 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/fmcomms5_data_stream/ad9361-2.cfg: -------------------------------------------------------------------------------- 1 | data_in_device = cf-ad9361-dds-core-B 2 | ctrl_device = ad9361-phy-B 3 | channel = RX_LO_FREQ,IN,out_altvoltage0_RX_LO_frequency, 4 | channel = RX_SAMPLING_FREQ,IN,in_voltage_sampling_frequency, 5 | channel = RX_RF_BANDWIDTH,IN,in_voltage_rf_bandwidth, 6 | channel = RX1_GAIN_MODE,IN,in_voltage0_gain_control_mode, 7 | channel = RX1_GAIN,IN,in_voltage0_hardwaregain, 8 | channel = RX1_RSSI,OUT,in_voltage0_rssi, 9 | channel = RX2_GAIN_MODE,IN,in_voltage1_gain_control_mode, 10 | channel = RX2_GAIN,IN,in_voltage1_hardwaregain, 11 | channel = RX2_RSSI,OUT,in_voltage1_rssi, 12 | channel = TX_LO_FREQ,IN,out_altvoltage1_TX_LO_frequency, 13 | channel = TX_SAMPLING_FREQ,IN,out_voltage_sampling_frequency, 14 | channel = TX_RF_BANDWIDTH,IN,out_voltage_rf_bandwidth, 15 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/fmcomms5_data_stream/fmcomms5.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/fmcomms5_data_stream/fmcomms5.slx -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ieee80211_beacon_rx/ad9361.cfg: -------------------------------------------------------------------------------- 1 | data_out_device = cf-ad9361-lpc 2 | ctrl_device = ad9361-phy 3 | channel = RX_LO_FREQ,IN,out_altvoltage0_RX_LO_frequency, 4 | channel = RX_SAMPLING_FREQ,IN,in_voltage_sampling_frequency, 5 | channel = RX_RF_BANDWIDTH,IN,in_voltage_rf_bandwidth, 6 | channel = RX1_GAIN_MODE,IN,in_voltage0_gain_control_mode, 7 | channel = RX1_GAIN,IN,in_voltage0_hardwaregain, 8 | channel = RX1_RSSI,OUT,in_voltage0_rssi, -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ieee80211_beacon_rx/wlan80211BeaconRx.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/ieee80211_beacon_rx/wlan80211BeaconRx.slx -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/ieee80211_beacon_rx/wlan80211BeaconRxInit.m: -------------------------------------------------------------------------------- 1 | function p80211 = wlan80211BeaconRxInit(agcStepSize, agcMaxGain, ... 2 | corrThreshold, sampsPerChip, chanNum) 3 | % wlan80211BeaconRxInit 802.11 Beacon Frame receiver parameters 4 | % p80211 = wlan80211BeaconRxInit(SZ,MG,TH,SPC,CHNUM) returns the 5 | % parameters required by the 802.11 Beacon Frame receiver 6 | % example, where SZ is AGC step size, MG is AGC maximum gain, TH is 7 | % synchronization threshold, SPC is samples per chip, and CHNUM is channel 8 | % number. 9 | % 10 | 11 | p80211 = commwlan80211BeaconRxInit(agcStepSize, agcMaxGain, ... 12 | corrThreshold, sampsPerChip); 13 | 14 | p80211.DecimationFactor = 4; 15 | p80211.ChannelNumber = chanNum; -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/qpsktxrx/ad9361.cfg: -------------------------------------------------------------------------------- 1 | data_in_device = cf-ad9361-dds-core-lpc 2 | data_out_device = cf-ad9361-lpc 3 | ctrl_device = ad9361-phy 4 | channel = RX_LO_FREQ,IN,out_altvoltage0_RX_LO_frequency, 5 | channel = RX_SAMPLING_FREQ,IN,in_voltage_sampling_frequency, 6 | channel = RX_RF_BANDWIDTH,IN,in_voltage_rf_bandwidth, 7 | channel = RX1_GAIN_MODE,IN,in_voltage0_gain_control_mode, 8 | channel = RX1_GAIN,IN,in_voltage0_hardwaregain, 9 | channel = RX1_RSSI,OUT,in_voltage0_rssi, 10 | channel = RX2_GAIN_MODE,IN,in_voltage1_gain_control_mode, 11 | channel = RX2_GAIN,IN,in_voltage1_hardwaregain, 12 | channel = RX2_RSSI,OUT,in_voltage1_rssi, 13 | channel = TX_LO_FREQ,IN,out_altvoltage1_TX_LO_frequency, 14 | channel = TX_SAMPLING_FREQ,IN,out_voltage_sampling_frequency, 15 | channel = TX_RF_BANDWIDTH,IN,out_voltage_rf_bandwidth, 16 | -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/qpsktxrx/qpsktxrx.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/qpsktxrx/qpsktxrx.slx -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/qpsktxrx/sdrqpskrx.mat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/qpsktxrx/sdrqpskrx.mat -------------------------------------------------------------------------------- /trx_examples/streaming/legacy/qpsktxrx/sdrqpsktx.mat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/streaming/legacy/qpsktxrx/sdrqpsktx.mat -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/+AnalogDevicesDemo/+adrv9361z7035/+ccfmc_lvds_hop/+rxtx/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {'AnalogDevicesDemo.adrv9361z7035.ccfmc_lvds_hop.rxtx.plugin_rd', ... 15 | }; 16 | 17 | boardName = 'AnalogDevicesDemo adrv9361z7035 fmc lvds hop (Rx & Tx)'; 18 | 19 | end 20 | 21 | -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/+AnalogDevicesDemo/+adrv9361z7035/+ccfmc_lvds_hop/+rxtx/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Copyright 2015 The MathWorks, Inc. 6 | 7 | % Call the common board definition function 8 | hP = AnalogDevices.adrv9361z7035.common.plugin_board('fmc lvds hop', 'Rx & Tx'); 9 | 10 | -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/+AnalogDevicesDemo/+adrv9361z7035/+ccfmc_lvds_hop/+rxtx/plugin_rd.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevicesDemo.adrv9361z7035.common.plugin_rd('ccfmc_lvds_hop', 'Rx & Tx'); 8 | AnalogDevicesDemo.adrv9361z7035.ccfmc_lvds_hop.rxtx.add_rx_tx_io(hRD); -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/+AnalogDevicesDemo/+adrv9361z7035/+common/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd,boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevicesDemo.adrv9361z7035.ccfmc_lvds_hop.rxtx.plugin_rd', ... 16 | }; 17 | 18 | boardName = 'AnalogDevices ADRV9361-Z7035 Frequency Hopping'; 19 | 20 | end 21 | -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/+AnalogDevicesDemo/+adrv9361z7035/+common/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hB = plugin_board() 2 | % Use Plugin API to create board plugin object 3 | 4 | % Copyright 2015 The MathWorks, Inc. 5 | 6 | hB = hdlcoder.Board; 7 | 8 | % Target Board Information 9 | hB.BoardName = sprintf('AnalogDevices ADRV9361-Z7035 Frequency Hopping'); 10 | 11 | % FPGA Device 12 | hB.FPGAVendor = 'Xilinx'; 13 | hB.FPGAFamily = 'Zynq'; 14 | 15 | % Determine the device based on the board 16 | hB.FPGADevice = sprintf('xc7%s', 'z035i'); 17 | hB.FPGAPackage = 'fbg676'; 18 | hB.FPGASpeed = '-2L'; 19 | 20 | 21 | % Tool Info 22 | hB.SupportedTool = {'Xilinx Vivado'}; 23 | 24 | % FPGA JTAG chain position 25 | hB.JTAGChainPosition = 2; 26 | 27 | %% Add interfaces 28 | % Standard "External Port" interface 29 | 30 | -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/adi_build.tcl: -------------------------------------------------------------------------------- 1 | # Build the project 2 | update_compile_order -fileset sources_1 3 | reset_run impl_1 4 | reset_run synth_1 5 | launch_runs synth_1 6 | wait_on_run synth_1 7 | launch_runs impl_1 -to_step write_bitstream 8 | wait_on_run impl_1 9 | 10 | # Define local variables 11 | set cdir [pwd] 12 | set sdk_loc vivado_prj.sdk 13 | 14 | # Export the hdf 15 | file delete -force $sdk_loc 16 | file mkdir $sdk_loc 17 | file copy -force vivado_prj.runs/impl_1/system_top.sysdef $sdk_loc/system_top.hdf 18 | 19 | # Close the Vivado project 20 | close_project 21 | 22 | # Create the BOOT.bin 23 | exec xsdk -batch -source $cdir/projects/scripts/fsbl_build.tcl -wait 24 | 25 | puts "------------------------------------" 26 | puts "Embedded system build completed." 27 | puts "You may close this shell." 28 | puts "------------------------------------" 29 | exit 30 | -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/build_kernel.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | # Build kernel 4 | git clone -b 2022_r2_release --depth=1 https://github.com/analogdevicesinc/linux.git 5 | cd linux 6 | export ARCH=arm 7 | export CROSS_COMPILE=arm-linux-gnueabihf- 8 | source /opt/Xilinx/Vivado/2022.2/settings64.sh 9 | cp ../hopper.patch . 10 | git apply --reject hopper.patch 11 | if [ "$?" != "0" ]; then 12 | exit 1 13 | fi 14 | make zynq_xcomm_adv7511_defconfig 15 | make -j4 UIMAGE_LOADADDR=0x8000 uImage 16 | -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/ccfmc_lvds_hop/fh_preprocess.tcl: -------------------------------------------------------------------------------- 1 | set ad_hdl_dir [pwd] 2 | 3 | #### Move files 4 | file rename -force $ad_hdl_dir/hdl/vendor/AnalogDevices/vivado/scripts $ad_hdl_dir/scripts 5 | file rename -force $ad_hdl_dir/hdl/vendor/AnalogDevices/vivado/projects $ad_hdl_dir/projects 6 | file rename -force $ad_hdl_dir/hdl/vendor/AnalogDevices/vivado/library $ad_hdl_dir/library 7 | file copy -force $ad_hdl_dir/trx_examples/targeting/frequency-hopping/ccfmc_lvds_hop/system_top.v $ad_hdl_dir/projects/adrv9361z7035/ccfmc_lvds/system_top.v 8 | set f [open $ad_hdl_dir/projects/adrv9361z7035/ccfmc_lvds/system_bd.tcl "a"] 9 | puts $f "create_bd_port -dir O gpio_en_agc" 10 | puts $f "create_bd_port -from 0 -to 7 -dir I gpio_status" 11 | puts $f "create_bd_port -from 0 -to 3 -dir O gpio_ctl" 12 | close $f -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/devicetree.dtb: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/targeting/frequency-hopping/devicetree.dtb -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/fastlock.m: -------------------------------------------------------------------------------- 1 | clear all 2 | uri = 'ip:192.168.86.35'; 3 | 4 | %% Turn on DDS 5 | tx = adi.AD9361.Tx('uri',uri); 6 | tx.DataSource = 'DDS'; 7 | tx.SamplingRate = 20e6; 8 | tx.RFBandwidth = 20e6; 9 | toneFreq = 4e6; 10 | tx.DDSFrequencies = repmat(toneFreq,2,4); 11 | tx.AttenuationChannel0 = -10; 12 | tx(); 13 | pause(1); 14 | %% Set up fastlock profiles 15 | freqs = 2.4e9+(1:8).*1e6; 16 | for f = 0:length(freqs)-1 17 | % Update LO 18 | tx.CenterFrequency = freqs(f+1); 19 | pause(1); 20 | % Save profile 21 | tx.setAttributeLongLong('altvoltage1','fastlock_store',int64(f),true,8); 22 | fprintf('Saving profile at LO %d\n',freqs(f+1)); 23 | end 24 | % Set pin control mode 25 | tx.setDebugAttributeBool('adi,tx-fastlock-pincontrol-enable',1); 26 | tx.setAttributeLongLong('altvoltage1','fastlock_recall',int64(0),true,8); 27 | %% Configure Hop mode 28 | h = FrequencyHopper; 29 | h.uri = uri; 30 | h.DwellSamples = 20000; 31 | h.HoppingEnable = true; 32 | h(); 33 | %% Capture 34 | rx = adi.AD9361.Rx('uri',uri); 35 | rx.SamplingRate = 20e6; 36 | rx.CenterFrequency = 2.4e9+0.5e6; 37 | rx.RFBandwidth = 20e6; 38 | rx.SamplesPerFrame = 1e6; 39 | rx.EnabledChannels = 1; 40 | rx.kernelBuffersCount = 1; 41 | for k=1:10 42 | valid = false; 43 | while ~valid 44 | [out, valid] = rx(); 45 | end 46 | end 47 | rx.release(); 48 | %% Plot 49 | spectrogram(double(out),128,80,100,20e6,'yaxis','centered') 50 | view(-77,72) 51 | shading interp 52 | colorbar off 53 | 54 | -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/frequency_hopping.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/targeting/frequency-hopping/frequency_hopping.slx -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/hdlcoder_board_customization.m: -------------------------------------------------------------------------------- 1 | function r = hdlcoder_board_customization 2 | % Board plugin registration file 3 | % 1. Any registration file with this name on MATLAB path will be picked up 4 | % 2. Registration file returns a cell array pointing to the location of 5 | % the board plugins 6 | % 3. Board plugin must be a package folder accessible from MATLAB path, 7 | % and contains a board definition file 8 | 9 | % Copyright 2012-2013 The MathWorks, Inc. 10 | 11 | r = { ... 12 | 'AnalogDevicesDemo.adrv9361z7035.common.plugin_board', ... 13 | }; 14 | end 15 | % LocalWords: Zynq ZC 16 | -------------------------------------------------------------------------------- /trx_examples/targeting/frequency-hopping/hop_result.bmp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/targeting/frequency-hopping/hop_result.bmp -------------------------------------------------------------------------------- /trx_examples/targeting/loopback-delay-estimation/custom_filter.ftr: -------------------------------------------------------------------------------- 1 | # Generated with AD9361 Filter Design Wizard 16.1.3 2 | # MATLAB 9.7.0.1261785 (R2019b) Update 3, 17-Jan-2020 14:57:13 3 | # Inputs: 4 | # Data Sample Frequency = 30720000 Hz 5 | TX 3 GAIN 0 INT 1 6 | RX 3 GAIN 0 DEC 1 7 | RTX 983040000 122880000 61440000 30720000 30720000 30720000 8 | RRX 983040000 245760000 122880000 61440000 30720000 30720000 9 | BWTX 27111613 10 | BWRX 25820686 11 | -7,-4 12 | -68,-63 13 | -40,-41 14 | 88,81 15 | -63,-56 16 | -52,-51 17 | 180,168 18 | -181,-165 19 | -20,-24 20 | 312,293 21 | -429,-395 22 | 160,141 23 | 406,381 24 | -834,-771 25 | 633,578 26 | 290,276 27 | -1364,-1258 28 | 1608,1473 29 | -358,-328 30 | -1980,-1778 31 | 3742,3407 32 | -2573,-2604 33 | -3123,-2580 34 | 19981,19819 35 | 19981,19819 36 | -3123,-2580 37 | -2573,-2604 38 | 3742,3407 39 | -1980,-1778 40 | -358,-328 41 | 1608,1473 42 | -1364,-1258 43 | 290,276 44 | 633,578 45 | -834,-771 46 | 406,381 47 | 160,141 48 | -429,-395 49 | 312,293 50 | -20,-24 51 | -181,-165 52 | 180,168 53 | -52,-51 54 | -63,-56 55 | 88,81 56 | -40,-41 57 | -68,-63 58 | -7,-4 59 | -------------------------------------------------------------------------------- /trx_examples/targeting/loopback-delay-estimation/initScript.m: -------------------------------------------------------------------------------- 1 | %% 2 | % This script is called by InitFcn callback function in the model 3 | 4 | clc; 5 | clear; 6 | close all; 7 | 8 | L = 8; 9 | a = 0.25; 10 | d = 12; 11 | len1 = 13; 12 | 13 | s = zadoffChuSeq(25, len1); 14 | txfilt = comm.RaisedCosineTransmitFilter('OutputSamplesPerSymbol', L, 'RolloffFactor', a, 'FilterSpanInSymbols', d); 15 | zc = txfilt([s; zeros(256-len1, 1)]); 16 | zc_re = real(zc); 17 | zc_im = imag(zc); 18 | scale = 25000; 19 | 20 | max_val_re = max(abs(zc_re)); 21 | max_val_im = max(abs(zc_im)); 22 | zc_re = round(scale*zc_re/max_val_re); 23 | zc_im = round(scale*zc_im/max_val_im); 24 | 25 | % amplitude difference of input 26 | len2 = (len1+d)*L; 27 | zc_re2 = zc_re(1:len2).^2; 28 | zc_im2 = zc_im(1:len2).^2; 29 | zc2 = zc_re2 + zc_im2; 30 | zc2_diff = zc2(1:end-1)-zc2(2:end); 31 | sign_res = sign(zc2_diff); 32 | tx_input_ampl_diff = sign_res; 33 | bool_ref = (tx_input_ampl_diff<0); 34 | 35 | t = 0:1/64:1-1/64; 36 | cst = exp(1i*2*pi*t); 37 | cst = round(scale*cst); 38 | cst_re = real(cst); 39 | cst_im = imag(cst); 40 | sync_seq_re = int16([cst_re zc_re.' zeros(1, 6000)]); 41 | sync_seq_im = int16([cst_im zc_im.' zeros(1, 6000)]); -------------------------------------------------------------------------------- /trx_examples/targeting/loopback-delay-estimation/loopback_delay_estimation.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/targeting/loopback-delay-estimation/loopback_delay_estimation.slx -------------------------------------------------------------------------------- /trx_examples/targeting/loopback-delay-estimation/zc_out_data_fd.bb: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/targeting/loopback-delay-estimation/zc_out_data_fd.bb -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/+AnalogDevicesAGCDemo/+adrv9361z7035/+ccfmc_lvds_agc/+rx/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd, boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {'AnalogDevicesAGCDemo.adrv9361z7035.ccfmc_lvds_agc.rx.plugin_rd', ... 15 | }; 16 | 17 | boardName = 'AnalogDevices adrv9361z7035 fmc lvds agc (Rx)'; 18 | 19 | end -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/+AnalogDevicesAGCDemo/+adrv9361z7035/+ccfmc_lvds_agc/+rx/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hP = plugin_board() 2 | % Zynq Platform PCore 3 | % Use Plugin API to create board plugin object 4 | 5 | % Copyright 2015 The MathWorks, Inc. 6 | 7 | % Call the common board definition function 8 | hP = AnalogDevicesAGCDemo.adrv9361z7035.common.plugin_board('fmc lvds agc', 'Rx'); 9 | -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/+AnalogDevicesAGCDemo/+adrv9361z7035/+ccfmc_lvds_agc/+rx/plugin_rd.m: -------------------------------------------------------------------------------- 1 | function hRD = plugin_rd 2 | % Reference design definition 3 | 4 | % Copyright 2014-2015 The MathWorks, Inc. 5 | 6 | % Call the common reference design definition function 7 | hRD = AnalogDevicesAGCDemo.adrv9361z7035.common.plugin_rd('fmc lvds agc', 'Rx'); 8 | AnalogDevicesAGCDemo.adrv9361z7035.ccfmc_lvds_agc.rx.add_rx_io(hRD); -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/+AnalogDevicesAGCDemo/+adrv9361z7035/+common/hdlcoder_ref_design_customization.m: -------------------------------------------------------------------------------- 1 | function [rd,boardName] = hdlcoder_ref_design_customization 2 | % Reference design plugin registration file 3 | % 1. The registration file with this name inside of a board plugin folder 4 | % will be picked up 5 | % 2. Any registration file with this name on MATLAB path will also be picked up 6 | % 3. The registration file returns a cell array pointing to the location of 7 | % the reference design plugins 8 | % 4. The registration file also returns its associated board name 9 | % 5. Reference design plugin must be a package folder accessible from 10 | % MATLAB path, and contains a reference design definition file 11 | 12 | % Copyright 2013-2014 The MathWorks, Inc. 13 | 14 | rd = {... 15 | 'AnalogDevicesAGCDemo.adrv9361z7035.ccfmc_lvds_agc.rx.plugin_rd', ... 16 | }; 17 | 18 | boardName = 'AnalogDevices ADRV9361-Z7035 AGC'; 19 | 20 | end -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/+AnalogDevicesAGCDemo/+adrv9361z7035/+common/plugin_board.m: -------------------------------------------------------------------------------- 1 | function hB = plugin_board() 2 | % Use Plugin API to create board plugin object 3 | 4 | % Copyright 2015 The MathWorks, Inc. 5 | 6 | hB = hdlcoder.Board; 7 | 8 | % Target Board Information 9 | hB.BoardName = sprintf('AnalogDevices ADRV9361-Z7035 AGC'); 10 | 11 | % FPGA Device 12 | hB.FPGAVendor = 'Xilinx'; 13 | hB.FPGAFamily = 'Zynq'; 14 | 15 | % Determine the device based on the board 16 | hB.FPGADevice = sprintf('xc7%s', 'z035i'); 17 | hB.FPGAPackage = 'fbg676'; 18 | hB.FPGASpeed = '-2L'; 19 | 20 | 21 | % Tool Info 22 | hB.SupportedTool = {'Xilinx Vivado'}; 23 | 24 | % FPGA JTAG chain position 25 | hB.JTAGChainPosition = 2; 26 | 27 | %% Add interfaces 28 | % Standard "External Port" interface 29 | -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/ModeS_testbench.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/targeting/tuneAGC-ad9361/ModeS_testbench.slx -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/ad9361_rx_wlan_testbench.slx: -------------------------------------------------------------------------------- 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-------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/ccfmc_lvds_agc/tune_agc_preprocess.tcl: -------------------------------------------------------------------------------- 1 | set ad_hdl_dir [pwd] 2 | 3 | #### Move files 4 | file rename -force $ad_hdl_dir/hdl/vendor/AnalogDevices/vivado/scripts $ad_hdl_dir/scripts 5 | file rename -force $ad_hdl_dir/hdl/vendor/AnalogDevices/vivado/projects $ad_hdl_dir/projects 6 | file rename -force $ad_hdl_dir/hdl/vendor/AnalogDevices/vivado/library $ad_hdl_dir/library 7 | file copy -force $ad_hdl_dir/trx_examples/targeting/tuneAGC-ad9361/ccfmc_lvds_agc/system_top.v $ad_hdl_dir/projects/adrv9361z7035/ccfmc_lvds/system_top.v 8 | set f [open $ad_hdl_dir/projects/adrv9361z7035/ccfmc_lvds/system_bd.tcl "a"] 9 | puts $f "create_bd_port -dir O gpio_en_agc" 10 | puts $f "create_bd_port -from 0 -to 7 -dir I gpio_status" 11 | close $f 12 | -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/hdlcoder_board_customization.m: -------------------------------------------------------------------------------- 1 | function r = hdlcoder_board_customization 2 | % Board plugin registration file 3 | % 1. Any registration file with this name on MATLAB path will be picked up 4 | % 2. Registration file returns a cell array pointing to the location of 5 | % the board plugins 6 | % 3. Board plugin must be a package folder accessible from MATLAB path, 7 | % and contains a board definition file 8 | 9 | % Copyright 2012-2013 The MathWorks, Inc. 10 | 11 | r = { ... 12 | 'AnalogDevicesAGCDemo.adrv9361z7035.common.plugin_board', ... 13 | }; 14 | end 15 | % LocalWords: Zynq ZC -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/reg/Makefile: -------------------------------------------------------------------------------- 1 | 2 | CFLAGS=-std=c99 -pedantic -Wall -D_POSIX_SOURCE 3 | DEPS = reg.h 4 | OBJ = reg.o 5 | prefix=/usr/local 6 | 7 | %.o: %.c $(DEPS) 8 | $(CC) $(CFLAGS) -c -o $@ $< 9 | 10 | reg: $(OBJ) 11 | $(CC) $(CFLAGS) -pthread -o $@ reg.o -lm 12 | 13 | 14 | install: 15 | install -m 0755 modemd $(prefix)/bin 16 | install -m 0777 restart_modem_gui.sh $(prefix)/bin 17 | install -m 0444 modem_filter.ftr $(prefix)/share/rfsom-box-gui 18 | clean: 19 | rm -rf reg *.o 20 | -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/reg/reg.h: -------------------------------------------------------------------------------- 1 | #ifndef __REG_H__ 2 | #define __REG_H__ 3 | 4 | int32_t reg_write(uint32_t reg_addr, uint32_t data); 5 | 6 | #endif /*__REG_H__ */ 7 | -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/run_testbench.m: -------------------------------------------------------------------------------- 1 | clc; 2 | clear all; 3 | close all; 4 | 5 | % Simulation settings 6 | sim_settings.SIM_STUDY = true; 7 | sim_settings.SIM_MODE = 1; 8 | sim_settings.GAIN_MODE = 0; 9 | sim_settings.snr = 5; 10 | 11 | % WLAN settings 12 | wlan_settings.fc = 5200e6; 13 | wlan_settings.mcs = 0; 14 | wlan_settings.numPackets = 10; 15 | wlan_settings.constPktLen = false; 16 | wlan_settings.seed = 0; 17 | 18 | % AD9361 settings 19 | ad9361_settings.AGC_MODE = 3; 20 | ad9361_settings.LOG_ADC_OUTPUT = 0; 21 | ad9361_settings.SAVE_LOG_DATA = 0; 22 | 23 | % AGC settings 24 | agc_settings.LMT_Hth = 30*16; 25 | agc_settings.LMT_Lth = 25*16; 26 | agc_settings.ADC_Ncycles = 4; 27 | agc_settings.ADC_Hth = 63; 28 | agc_settings.ADC_Lth = 56; 29 | agc_settings.AvgPwrMtr_Ncycles = 16; 30 | agc_settings.LowPwrTh = -40; 31 | agc_settings.EnergyLostLevel = 3; 32 | agc_settings.MaxIncrease = 63; 33 | agc_settings.AvgPwrLInc = 7; 34 | agc_settings.AvgPwrSInc = 4; 35 | agc_settings.AvgPwrLDec = 7; 36 | agc_settings.AvgPwrSDec = 6; 37 | agc_settings.AGCLockLevel = -7; 38 | 39 | sim_obj = tuneAD9361AGC(sim_settings, wlan_settings, ad9361_settings, agc_settings); -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/support/CollectBeacons.m: -------------------------------------------------------------------------------- 1 | 2 | SSID = 'ADI-BEACON'; 3 | osf = 1; % OverSampling factor 4 | fc2 = 1e9; 5 | % sdr = 'AD936x'; 6 | sdr = 'Pluto'; 7 | 8 | 9 | %% Generate Beacon Data 10 | [txWaveform,Rs,fc] = genBeacon(SSID); 11 | 12 | %% Send out SDR 13 | tx = sdrtx(sdr); 14 | % tx.ShowAdvancedProperties = true; 15 | % tx.BypassUserLogic = true; 16 | tx.BasebandSampleRate = Rs*osf; 17 | % tx.CenterFrequency = fc; 18 | tx.CenterFrequency = fc2; 19 | % Set transmit gain 20 | tx.Gain = -30; 21 | % Resample transmit waveform 22 | txWaveform = resample(txWaveform, osf, 1); 23 | % Transmit over-the-air 24 | % txWaveform = 0.9*2^15*(txWaveform)./max(abs(txWaveform)); 25 | transmitRepeat(tx, txWaveform); 26 | %% 27 | for g=1:1 28 | % Receive 29 | rx = sdrrx(sdr); 30 | % rx.CenterFrequency = fc+0;%40e3; 31 | rx.CenterFrequency = fc2; 32 | % rx.SamplesPerFrame = 2^15; 33 | rx.SamplesPerFrame = length(txWaveform)*5; 34 | rx.BasebandSampleRate = Rs*osf; 35 | % rx.GainSource = 'AGC Fast Attack'; 36 | rx.GainSource = 'Manual'; 37 | rx.Gain = 3; 38 | fprintf('\nStarting a new RF capture.\n\n') 39 | for k=1:20 40 | len = 0; 41 | while len == 0 42 | % Store one LTE frame worth of samples 43 | [dataRX,len] = rx(); 44 | end 45 | end 46 | disp('Done collection'); 47 | clear rx tx 48 | % dataRX = resample(double(dataRX),1,osf); 49 | 50 | % Save Waveform to File 51 | BBW = comm.BasebandFileWriter('nonHTBeaconPacketReceived.bb', Rs, fc); 52 | BBW(dataRX); 53 | release(BBW); 54 | disp(length(dataRX)/Rs); 55 | 56 | ReceiverFloatWLAN; 57 | 58 | end 59 | 60 | -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/support/lltf.mat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/analogdevicesinc/TransceiverToolbox/d2e905b82c66f04eead3d0992d98bd82527c80c3/trx_examples/targeting/tuneAGC-ad9361/support/lltf.mat -------------------------------------------------------------------------------- /trx_examples/targeting/tuneAGC-ad9361/support/offline.m: -------------------------------------------------------------------------------- 1 | function [numDataSym] = offline(cfgNonHT) 2 | 3 | mcsTable = wlan.internal.getRateTable(cfgNonHT); 4 | Ntail = 6; Nservice = 16; 5 | numDataSym = ceil((8*cfgNonHT.PSDULength + Nservice + Ntail)/mcsTable.NDBPS); 6 | --------------------------------------------------------------------------------