├── .editorconfig ├── .github └── workflows │ └── ci.yml ├── .gitignore ├── .gitlab-ci.yml ├── .gitlab-ci ├── core-v-verif-cva6.yml └── cva6.yml ├── .gitmodules ├── Bender.yml ├── CHANGELOG.md ├── CODEOWNERS ├── CONTRIBUTING.md ├── Flist.ariane ├── LICENSE ├── LICENSE.Berkeley ├── LICENSE.SiFive ├── Makefile ├── README.md ├── ariane.core ├── ci ├── build-riscv-gcc.sh ├── build-riscv-tests.sh ├── check-tests.sh ├── default.config ├── float.config ├── get-torture.sh ├── gitlab-ci-emul.sh ├── install-dtc.sh ├── install-fesvr.sh ├── install-riscvpk.sh ├── install-spike.sh ├── install-verilator.sh ├── make-tmp.sh ├── path-setup.sh ├── riscv-amo-tests.list ├── riscv-asm-tests.list ├── riscv-benchmarks.list ├── riscv-fp-tests.list ├── riscv-mul-tests.list ├── setup.sh ├── torture_make.patch └── travis-ci-emul.sh ├── common └── local │ └── util │ ├── ex_trace_item.svh │ ├── find_first_one.sv │ ├── instr_trace_item.svh │ ├── instr_tracer.sv │ ├── instr_tracer_if.sv │ └── sram.sv ├── core ├── Flist.cv32a6_imac_sv0 ├── Flist.cv32a6_imac_sv32 ├── Flist.cv32a6_imafc_sv32 ├── Flist.cv64a6_imafdc_sv39 ├── Flist.cv64a6_imafdc_sv39_gate ├── alu.sv ├── amo_buffer.sv ├── ariane.sv ├── ariane_regfile.sv ├── ariane_regfile_ff.sv ├── axi_adapter.sv ├── axi_shim.sv ├── branch_unit.sv ├── cache_subsystem │ ├── amo_alu.sv │ ├── cache_ctrl.sv │ ├── cva6_icache.sv │ ├── cva6_icache_axi_wrapper.sv │ ├── miss_handler.sv │ ├── std_cache_subsystem.sv │ ├── std_nbdcache.sv │ ├── std_no_dcache.sv │ ├── tag_cmp.sv │ ├── wt_axi_adapter.sv │ ├── wt_cache_subsystem.sv │ ├── wt_dcache.sv │ ├── wt_dcache_ctrl.sv │ ├── wt_dcache_mem.sv │ ├── wt_dcache_missunit.sv │ ├── wt_dcache_wbuffer.sv │ └── wt_l15_adapter.sv ├── commit_stage.sv ├── compressed_decoder.sv ├── controller.sv ├── csr_buffer.sv ├── csr_regfile.sv ├── cva6.sv ├── cvxif_example │ ├── cvxif_example_coprocessor.sv │ ├── include │ │ └── cvxif_instr_pkg.sv │ └── instr_decoder.sv ├── cvxif_fu.sv ├── decoder.sv ├── dromajo_ram.sv ├── ex_stage.sv ├── example_tb │ ├── verilator_results │ │ └── Vcva6_core_only_tb │ └── verilator_work │ │ ├── Vcva6_core_only_tb │ │ ├── Vcva6_core_only_tb.cpp │ │ ├── Vcva6_core_only_tb.d │ │ ├── Vcva6_core_only_tb.h │ │ ├── Vcva6_core_only_tb.mk │ │ ├── Vcva6_core_only_tb_AXI_BUS__A40_AB40_AC5_AD1.cpp │ │ ├── Vcva6_core_only_tb_AXI_BUS__A40_AB40_AC5_AD1.d │ │ ├── Vcva6_core_only_tb_AXI_BUS__A40_AB40_AC5_AD1.h │ │ ├── Vcva6_core_only_tb_AXI_BUS__A40_AB40_AC5_AD1__Slow.cpp │ │ ├── Vcva6_core_only_tb_AXI_BUS__A40_AB40_AC5_AD1__Slow.d │ │ ├── Vcva6_core_only_tb__1.cpp │ │ ├── Vcva6_core_only_tb__1.d │ │ ├── Vcva6_core_only_tb__10.cpp │ │ ├── Vcva6_core_only_tb__10.d │ │ ├── Vcva6_core_only_tb__10__Slow.cpp │ │ ├── Vcva6_core_only_tb__10__Slow.d │ │ ├── Vcva6_core_only_tb__11.cpp │ │ ├── Vcva6_core_only_tb__11.d │ │ ├── Vcva6_core_only_tb__11__Slow.cpp │ │ ├── Vcva6_core_only_tb__11__Slow.d │ │ ├── Vcva6_core_only_tb__12.cpp │ │ ├── Vcva6_core_only_tb__12.d │ │ ├── Vcva6_core_only_tb__12__Slow.cpp │ │ ├── Vcva6_core_only_tb__12__Slow.d │ │ ├── Vcva6_core_only_tb__1__Slow.cpp │ │ ├── Vcva6_core_only_tb__1__Slow.d │ │ ├── Vcva6_core_only_tb__2.cpp │ │ ├── Vcva6_core_only_tb__2.d │ │ ├── Vcva6_core_only_tb__2__Slow.cpp │ │ ├── Vcva6_core_only_tb__2__Slow.d │ │ ├── Vcva6_core_only_tb__3.cpp │ │ ├── Vcva6_core_only_tb__3.d │ │ ├── Vcva6_core_only_tb__3__Slow.cpp │ │ ├── Vcva6_core_only_tb__3__Slow.d │ │ ├── Vcva6_core_only_tb__4.cpp │ │ ├── Vcva6_core_only_tb__4.d │ │ ├── Vcva6_core_only_tb__4__Slow.cpp │ │ ├── Vcva6_core_only_tb__4__Slow.d │ │ ├── Vcva6_core_only_tb__5.cpp │ │ ├── Vcva6_core_only_tb__5.d │ │ ├── Vcva6_core_only_tb__5__Slow.cpp │ │ ├── Vcva6_core_only_tb__5__Slow.d │ │ ├── Vcva6_core_only_tb__6.cpp │ │ ├── Vcva6_core_only_tb__6.d │ │ ├── Vcva6_core_only_tb__6__Slow.cpp │ │ ├── Vcva6_core_only_tb__6__Slow.d │ │ ├── Vcva6_core_only_tb__7.cpp │ │ ├── Vcva6_core_only_tb__7.d │ │ ├── Vcva6_core_only_tb__7__Slow.cpp │ │ ├── Vcva6_core_only_tb__7__Slow.d │ │ ├── Vcva6_core_only_tb__8.cpp │ │ ├── Vcva6_core_only_tb__8.d │ │ ├── Vcva6_core_only_tb__8__Slow.cpp │ │ ├── Vcva6_core_only_tb__8__Slow.d │ │ ├── Vcva6_core_only_tb__9.cpp │ │ ├── Vcva6_core_only_tb__9.d │ │ ├── Vcva6_core_only_tb__9__Slow.cpp │ │ ├── Vcva6_core_only_tb__9__Slow.d │ │ ├── Vcva6_core_only_tb__ALL.a │ │ ├── Vcva6_core_only_tb__Slow.cpp │ │ ├── Vcva6_core_only_tb__Slow.d │ │ ├── Vcva6_core_only_tb__Syms.cpp │ │ ├── Vcva6_core_only_tb__Syms.d │ │ ├── Vcva6_core_only_tb__Syms.h │ │ ├── Vcva6_core_only_tb___024unit.cpp │ │ ├── Vcva6_core_only_tb___024unit.d │ │ ├── Vcva6_core_only_tb___024unit.h │ │ ├── Vcva6_core_only_tb___024unit__Slow.cpp │ │ ├── Vcva6_core_only_tb___024unit__Slow.d │ │ ├── Vcva6_core_only_tb__ver.d │ │ ├── Vcva6_core_only_tb__verFiles.dat │ │ ├── Vcva6_core_only_tb_classes.mk │ │ ├── cva6_tb_verilator.d │ │ ├── verilated.d │ │ └── verilated_vpi.d ├── fpu_wrap.sv ├── frontend │ ├── bht.sv │ ├── btb.sv │ ├── frontend.sv │ ├── instr_queue.sv │ ├── instr_scan.sv │ └── ras.sv ├── id_stage.sv ├── include │ ├── ariane_axi_pkg.sv │ ├── ariane_pkg.sv │ ├── ariane_rvfi_pkg.sv │ ├── axi_intf.sv │ ├── cv32a6_imac_sv0_config_pkg.sv │ ├── cv32a6_imac_sv32_config_pkg.sv │ ├── cv32a6_imafc_sv32_config_pkg.sv │ ├── cv64a6_imafdc_sv39_config_pkg.sv │ ├── cvxif_pkg.sv │ ├── instr_tracer_pkg.sv │ ├── percival_imafdcxposit_sv39_config_pkg.sv │ ├── riscv_pkg.sv │ ├── std_cache_pkg.sv │ └── wt_cache_pkg.sv ├── instr_realign.sv ├── issue_read_operands.sv ├── issue_stage.sv ├── load_store_unit.sv ├── load_unit.sv ├── mmu_sv32 │ ├── cva6_mmu_sv32.sv │ ├── cva6_ptw_sv32.sv │ └── cva6_tlb_sv32.sv ├── mmu_sv39 │ ├── mmu.sv │ ├── ptw.sv │ └── tlb.sv ├── mult.sv ├── multiplier.sv ├── pau │ ├── pau64_add.vhd │ ├── pau64_div.vhd │ ├── pau64_div_approx.vhd │ ├── pau64_i2p.vhd │ ├── pau64_l2p.vhd │ ├── pau64_lu2p.vhd │ ├── pau64_mult.vhd │ ├── pau64_mult_approx.vhd │ ├── pau64_p2i.vhd │ ├── pau64_p2l.vhd │ ├── pau64_p2lu.vhd │ ├── pau64_p2u.vhd │ ├── pau64_q2p.vhd │ ├── pau64_qmadd.vhd │ ├── pau64_sqrt.vhd │ ├── pau64_sqrt_approx.vhd │ ├── pau64_u2p.vhd │ ├── pau_add.vhd │ ├── pau_div.vhd │ ├── pau_div_approx.vhd │ ├── pau_i2p.vhd │ ├── pau_l2p.vhd │ ├── pau_lu2p.vhd │ ├── pau_mult.vhd │ ├── pau_mult_approx.vhd │ ├── pau_p2i.vhd │ ├── pau_p2l.vhd │ ├── pau_p2lu.vhd │ ├── pau_p2u.vhd │ ├── pau_q2p.vhd │ ├── pau_qmadd.vhd │ ├── pau_sqrt.vhd │ ├── pau_sqrt_approx.vhd │ └── pau_u2p.vhd ├── pau_top.sv ├── perf_counters.sv ├── pmp │ ├── .gitignore │ ├── Bender.yml │ ├── Makefile │ ├── README.md │ ├── formal.sby │ ├── include │ │ └── riscv.sv │ ├── src │ │ ├── pmp.sv │ │ └── pmp_entry.sv │ └── tb │ │ ├── pmp_tb.sv │ │ └── tb_pkg.sv ├── re_name.sv ├── scoreboard.sv ├── serdiv.sv ├── store_buffer.sv └── store_unit.sv ├── corev_apu ├── bootrom │ ├── .gitignore │ ├── Makefile │ ├── ariane.dts │ ├── bootrom.S │ ├── bootrom.h │ ├── bootrom.sv │ ├── dromajo_bootrom.sv │ ├── encoding.h │ ├── gen_rom.py │ └── linker.ld ├── clint │ ├── README.md │ ├── axi_lite_interface.sv │ └── clint.sv ├── fpga │ ├── .gitignore │ ├── Makefile │ ├── ariane-multi-hart.cfg │ ├── ariane.cfg │ ├── ariane_pmod.cfg │ ├── ariane_pmod_tiny.cfg │ ├── constraints │ │ ├── ariane.xdc │ │ ├── genesys-2.xdc │ │ ├── kc705.xdc │ │ ├── vc707.xdc │ │ └── vcu118.xdc │ ├── scripts │ │ ├── program.tcl │ │ ├── prologue.tcl │ │ ├── run.tcl │ │ └── write_cfgmem.tcl │ ├── sourceme.sh │ ├── src │ │ ├── ariane_peripherals_xilinx.sv │ │ ├── ariane_xilinx.sv │ │ ├── bootrom │ │ │ ├── .gitignore │ │ │ ├── Makefile │ │ │ ├── README.md │ │ │ ├── bootrom_32.h │ │ │ ├── bootrom_32.sv │ │ │ ├── bootrom_64.h │ │ │ ├── bootrom_64.sv │ │ │ ├── cv32a6.dts │ │ │ ├── cv64a6.dts │ │ │ ├── gen_rom.py │ │ │ ├── linker.lds │ │ │ ├── platform.h │ │ │ ├── src │ │ │ │ ├── gpt.c │ │ │ │ ├── gpt.h │ │ │ │ ├── main.c │ │ │ │ ├── sd.c │ │ │ │ ├── sd.h │ │ │ │ ├── smp.h │ │ │ │ ├── spi.c │ │ │ │ ├── spi.h │ │ │ │ ├── uart.c │ │ │ │ └── uart.h │ │ │ └── startup.S │ │ ├── fan_ctrl.sv │ │ ├── genesysii.svh │ │ ├── kc705.svh │ │ ├── vc707.svh │ │ └── vcu118.svh │ └── xilinx │ │ ├── .gitignore │ │ ├── ariane_xlnx_ip.yml │ │ ├── common.mk │ │ ├── xlnx_axi_clock_converter │ │ ├── Makefile │ │ └── tcl │ │ │ └── run.tcl │ │ ├── xlnx_axi_dwidth_converter │ │ ├── Makefile │ │ └── tcl │ │ │ └── run.tcl │ │ ├── xlnx_axi_dwidth_converter_dm_master │ │ ├── Makefile │ │ └── tcl │ │ │ └── run.tcl │ │ ├── xlnx_axi_dwidth_converter_dm_slave │ │ ├── Makefile │ │ └── tcl │ │ │ └── run.tcl │ │ ├── xlnx_axi_gpio │ │ ├── Makefile │ │ └── tcl │ │ │ └── run.tcl │ │ ├── xlnx_axi_quad_spi │ │ ├── Makefile │ │ └── tcl │ │ │ └── run.tcl │ │ ├── xlnx_clk_gen │ │ ├── Makefile │ │ └── tcl │ │ │ └── run.tcl │ │ ├── xlnx_ila │ │ ├── Makefile │ │ └── tcl │ │ │ └── run.tcl │ │ ├── xlnx_mig_7_ddr3 │ │ ├── Makefile │ │ ├── mig_genesys2.prj │ │ ├── mig_kc705.prj │ │ ├── mig_vc707.prj │ │ └── tcl │ │ │ └── run.tcl │ │ └── xlnx_protocol_checker │ │ ├── Makefile │ │ └── tcl │ │ └── run.tcl ├── include │ └── traced_instr_pkg.sv ├── openpiton │ ├── ariane_verilog_wrap.sv │ ├── bootrom │ │ ├── .gitignore │ │ ├── baremetal │ │ │ ├── .gitignore │ │ │ ├── Makefile │ │ │ ├── ariane.dts │ │ │ ├── bootrom.S │ │ │ ├── gen_rom.py │ │ │ └── linker.ld │ │ └── linux │ │ │ ├── .gitignore │ │ │ ├── Makefile │ │ │ ├── README.md │ │ │ ├── ariane.dts │ │ │ ├── gen_rom.py │ │ │ ├── info.h │ │ │ ├── linker.lds │ │ │ ├── platform.h │ │ │ ├── src │ │ │ ├── gpt.c │ │ │ ├── gpt.h │ │ │ ├── main.c │ │ │ ├── sd.c │ │ │ ├── sd.h │ │ │ ├── smp.h │ │ │ ├── spi.c │ │ │ ├── spi.h │ │ │ ├── uart.c │ │ │ └── uart.h │ │ │ └── startup.S │ └── riscv_peripherals.sv └── tb │ ├── ariane_axi_soc_pkg.sv │ ├── ariane_peripherals.sv │ ├── ariane_soc_pkg.sv │ ├── ariane_tb.cpp │ ├── ariane_tb.sv │ ├── ariane_testharness.sv │ ├── common │ ├── SimDTM.sv │ ├── SimJTAG.sv │ ├── assign.svh │ ├── core_mem.sv │ ├── dp_ram.sv │ ├── mock_uart.sv │ ├── spike.sv │ ├── string_buffer.svh │ ├── tb.svh │ ├── tb_dcache_pkg.sv │ ├── tb_readport.sv │ ├── tb_writeport.sv │ └── uart.sv │ ├── dpi │ ├── SimDTM.cc │ ├── SimJTAG.cc │ ├── bootrom.h │ ├── dromajo_cosim_dpi.cc │ ├── elfloader.cc │ ├── msim_helper.cc │ ├── msim_helper.h │ ├── remote_bitbang.cc │ ├── remote_bitbang.h │ ├── sim_spike.cc │ ├── sim_spike.h │ ├── spike.cc │ └── verilator.h │ ├── riscv-isa-sim │ ├── .gitignore │ ├── LICENSE │ ├── Makefile.in │ ├── README.md │ ├── aclocal.m4 │ ├── config.h.in │ ├── configure │ ├── configure.ac │ ├── debug_rom │ │ ├── .gitignore │ │ ├── Makefile │ │ ├── debug_rom.S │ │ ├── debug_rom.h │ │ └── link.ld │ ├── dummy_rocc │ │ ├── dummy_rocc.ac │ │ ├── dummy_rocc.cc │ │ ├── dummy_rocc.mk.in │ │ └── dummy_rocc_test.c │ ├── riscv-dummy_rocc.pc.in │ ├── riscv-riscv.pc.in │ ├── riscv-softfloat.pc.in │ ├── riscv-spike.pc.in │ ├── riscv-spike_main.pc.in │ ├── riscv │ │ ├── bootrom.h │ │ ├── cachesim.cc │ │ ├── cachesim.h │ │ ├── clint.cc │ │ ├── common.h │ │ ├── debug_defines.h │ │ ├── debug_module.cc │ │ ├── debug_module.h │ │ ├── debug_rom_defines.h │ │ ├── decode.h │ │ ├── devices.cc │ │ ├── devices.h │ │ ├── disasm.h │ │ ├── dts.cc │ │ ├── dts.h │ │ ├── dump.cc │ │ ├── encoding.h │ │ ├── execute.cc │ │ ├── extension.cc │ │ ├── extension.h │ │ ├── extensions.cc │ │ ├── gen_icache │ │ ├── insn_template.cc │ │ ├── insn_template.h │ │ ├── insns │ │ │ ├── add.h │ │ │ ├── addi.h │ │ │ ├── addiw.h │ │ │ ├── addw.h │ │ │ ├── amoadd_d.h │ │ │ ├── amoadd_w.h │ │ │ ├── amoand_d.h │ │ │ ├── amoand_w.h │ │ │ ├── amomax_d.h │ │ │ ├── amomax_w.h │ │ │ ├── amomaxu_d.h │ │ │ ├── amomaxu_w.h │ │ │ ├── amomin_d.h │ │ │ ├── amomin_w.h │ │ │ ├── amominu_d.h │ │ │ ├── amominu_w.h │ │ │ ├── amoor_d.h │ │ │ ├── amoor_w.h │ │ │ ├── amoswap_d.h │ │ │ ├── amoswap_w.h │ │ │ ├── amoxor_d.h │ │ │ ├── amoxor_w.h │ │ │ ├── and.h │ │ │ ├── andi.h │ │ │ ├── auipc.h │ │ │ ├── beq.h │ │ │ ├── bge.h │ │ │ ├── bgeu.h │ │ │ ├── blt.h │ │ │ ├── bltu.h │ │ │ ├── bne.h │ │ │ ├── c_add.h │ │ │ ├── c_addi.h │ │ │ ├── c_addi4spn.h │ │ │ ├── c_addw.h │ │ │ ├── c_and.h │ │ │ ├── c_andi.h │ │ │ ├── c_beqz.h │ │ │ ├── c_bnez.h │ │ │ ├── c_ebreak.h │ │ │ ├── c_fld.h │ │ │ ├── c_fldsp.h │ │ │ ├── c_flw.h │ │ │ ├── c_flwsp.h │ │ │ ├── c_fsd.h │ │ │ ├── c_fsdsp.h │ │ │ ├── c_fsw.h │ │ │ ├── c_fswsp.h │ │ │ ├── c_j.h │ │ │ ├── c_jal.h │ │ │ ├── c_jalr.h │ │ │ ├── c_jr.h │ │ │ ├── c_li.h │ │ │ ├── c_lui.h │ │ │ ├── c_lw.h │ │ │ ├── c_lwsp.h │ │ │ ├── c_mv.h │ │ │ ├── c_or.h │ │ │ ├── c_slli.h │ │ │ ├── c_srai.h │ │ │ ├── c_srli.h │ │ │ ├── c_sub.h │ │ │ ├── c_subw.h │ │ │ ├── c_sw.h │ │ │ ├── c_swsp.h │ │ │ ├── c_xor.h │ │ │ ├── csrrc.h │ │ │ ├── csrrci.h │ │ │ ├── csrrs.h │ │ │ ├── csrrsi.h │ │ │ ├── csrrw.h │ │ │ ├── csrrwi.h │ │ │ ├── div.h │ │ │ ├── divu.h │ │ │ ├── divuw.h │ │ │ ├── divw.h │ │ │ ├── dret.h │ │ │ ├── ebreak.h │ │ │ ├── ecall.h │ │ │ ├── fadd_d.h │ │ │ ├── fadd_q.h │ │ │ ├── fadd_s.h │ │ │ ├── fclass_d.h │ │ │ ├── fclass_q.h │ │ │ ├── fclass_s.h │ │ │ ├── fcvt_d_l.h │ │ │ ├── fcvt_d_lu.h │ │ │ ├── fcvt_d_q.h │ │ │ ├── fcvt_d_s.h │ │ │ ├── fcvt_d_w.h │ │ │ ├── fcvt_d_wu.h │ │ │ ├── fcvt_l_d.h │ │ │ ├── fcvt_l_q.h │ │ │ ├── fcvt_l_s.h │ │ │ ├── fcvt_lu_d.h │ │ │ ├── fcvt_lu_q.h │ │ │ ├── fcvt_lu_s.h │ │ │ ├── fcvt_q_d.h │ │ │ ├── fcvt_q_l.h │ │ │ ├── fcvt_q_lu.h │ │ │ ├── fcvt_q_s.h │ │ │ ├── fcvt_q_w.h │ │ │ ├── fcvt_q_wu.h │ │ │ ├── fcvt_s_d.h │ │ │ ├── fcvt_s_l.h │ │ │ ├── fcvt_s_lu.h │ │ │ ├── fcvt_s_q.h │ │ │ ├── fcvt_s_w.h │ │ │ ├── fcvt_s_wu.h │ │ │ ├── fcvt_w_d.h │ │ │ ├── fcvt_w_q.h │ │ │ ├── fcvt_w_s.h │ │ │ ├── fcvt_wu_d.h │ │ │ ├── fcvt_wu_q.h │ │ │ ├── fcvt_wu_s.h │ │ │ ├── fdiv_d.h │ │ │ ├── fdiv_q.h │ │ │ ├── fdiv_s.h │ │ │ ├── fence.h │ │ │ ├── fence_i.h │ │ │ ├── feq_d.h │ │ │ ├── feq_q.h │ │ │ ├── feq_s.h │ │ │ ├── fld.h │ │ │ ├── fle_d.h │ │ │ ├── fle_q.h │ │ │ ├── fle_s.h │ │ │ ├── flq.h │ │ │ ├── flt_d.h │ │ │ ├── flt_q.h │ │ │ ├── flt_s.h │ │ │ ├── flw.h │ │ │ ├── fmadd_d.h │ │ │ ├── fmadd_q.h │ │ │ ├── fmadd_s.h │ │ │ ├── fmax_d.h │ │ │ ├── fmax_q.h │ │ │ ├── fmax_s.h │ │ │ ├── fmin_d.h │ │ │ ├── fmin_q.h │ │ │ ├── fmin_s.h │ │ │ ├── fmsub_d.h │ │ │ ├── fmsub_q.h │ │ │ ├── fmsub_s.h │ │ │ ├── fmul_d.h │ │ │ ├── fmul_q.h │ │ │ ├── fmul_s.h │ │ │ ├── fmv_d_x.h │ │ │ ├── fmv_w_x.h │ │ │ ├── fmv_x_d.h │ │ │ ├── fmv_x_w.h │ │ │ ├── fnmadd_d.h │ │ │ ├── fnmadd_q.h │ │ │ ├── fnmadd_s.h │ │ │ ├── fnmsub_d.h │ │ │ ├── fnmsub_q.h │ │ │ ├── fnmsub_s.h │ │ │ ├── fsd.h │ │ │ ├── fsgnj_d.h │ │ │ ├── fsgnj_q.h │ │ │ ├── fsgnj_s.h │ │ │ ├── fsgnjn_d.h │ │ │ ├── fsgnjn_q.h │ │ │ ├── fsgnjn_s.h │ │ │ ├── fsgnjx_d.h │ │ │ ├── fsgnjx_q.h │ │ │ ├── fsgnjx_s.h │ │ │ ├── fsq.h │ │ │ ├── fsqrt_d.h │ │ │ ├── fsqrt_q.h │ │ │ ├── fsqrt_s.h │ │ │ ├── fsub_d.h │ │ │ ├── fsub_q.h │ │ │ ├── fsub_s.h │ │ │ ├── fsw.h │ │ │ ├── jal.h │ │ │ ├── jalr.h │ │ │ ├── lb.h │ │ │ ├── lbu.h │ │ │ ├── ld.h │ │ │ ├── lh.h │ │ │ ├── lhu.h │ │ │ ├── lr_d.h │ │ │ ├── lr_w.h │ │ │ ├── lui.h │ │ │ ├── lw.h │ │ │ ├── lwu.h │ │ │ ├── mret.h │ │ │ ├── mul.h │ │ │ ├── mulh.h │ │ │ ├── mulhsu.h │ │ │ ├── mulhu.h │ │ │ ├── mulw.h │ │ │ ├── or.h │ │ │ ├── ori.h │ │ │ ├── rem.h │ │ │ ├── remu.h │ │ │ ├── remuw.h │ │ │ ├── remw.h │ │ │ ├── sb.h │ │ │ ├── sc_d.h │ │ │ ├── sc_w.h │ │ │ ├── sd.h │ │ │ ├── sfence_vma.h │ │ │ ├── sh.h │ │ │ ├── sll.h │ │ │ ├── slli.h │ │ │ ├── slliw.h │ │ │ ├── sllw.h │ │ │ ├── slt.h │ │ │ ├── slti.h │ │ │ ├── sltiu.h │ │ │ ├── sltu.h │ │ │ ├── sra.h │ │ │ ├── srai.h │ │ │ ├── sraiw.h │ │ │ ├── sraw.h │ │ │ ├── sret.h │ │ │ ├── srl.h │ │ │ ├── srli.h │ │ │ ├── srliw.h │ │ │ ├── srlw.h │ │ │ ├── sub.h │ │ │ ├── subw.h │ │ │ ├── sw.h │ │ │ ├── wfi.h │ │ │ ├── xor.h │ │ │ └── xori.h │ │ ├── interactive.cc │ │ ├── jtag_dtm.cc │ │ ├── jtag_dtm.h │ │ ├── memtracer.h │ │ ├── mmu.cc │ │ ├── mmu.h │ │ ├── mulhi.h │ │ ├── opcodes.h │ │ ├── processor.cc │ │ ├── processor.h │ │ ├── regnames.cc │ │ ├── remote_bitbang.cc │ │ ├── remote_bitbang.h │ │ ├── riscv.ac │ │ ├── riscv.mk.in │ │ ├── rocc.cc │ │ ├── rocc.h │ │ ├── rom.cc │ │ ├── sim.cc │ │ ├── sim.h │ │ ├── simif.h │ │ ├── tracer.h │ │ ├── trap.cc │ │ ├── trap.h │ │ └── uart.cc │ ├── scripts │ │ ├── config.guess │ │ ├── config.sub │ │ ├── install.sh │ │ ├── mk-install-dirs.sh │ │ └── vcs-version.sh │ ├── softfloat │ │ ├── f128_add.c │ │ ├── f128_classify.c │ │ ├── f128_div.c │ │ ├── f128_eq.c │ │ ├── f128_eq_signaling.c │ │ ├── f128_isSignalingNaN.c │ │ ├── f128_le.c │ │ ├── f128_le_quiet.c │ │ ├── f128_lt.c │ │ ├── f128_lt_quiet.c │ │ ├── f128_mul.c │ │ ├── f128_mulAdd.c │ │ ├── f128_rem.c │ │ ├── f128_roundToInt.c │ │ ├── f128_sqrt.c │ │ ├── f128_sub.c │ │ ├── f128_to_f16.c │ │ ├── f128_to_f32.c │ │ ├── f128_to_f64.c │ │ ├── f128_to_i32.c │ │ ├── f128_to_i32_r_minMag.c │ │ ├── f128_to_i64.c │ │ ├── f128_to_i64_r_minMag.c │ │ ├── f128_to_ui32.c │ │ ├── f128_to_ui32_r_minMag.c │ │ ├── f128_to_ui64.c │ │ ├── f128_to_ui64_r_minMag.c │ │ ├── f16_add.c │ │ ├── f16_div.c │ │ ├── f16_eq.c │ │ ├── f16_eq_signaling.c │ │ ├── f16_isSignalingNaN.c │ │ ├── f16_le.c │ │ ├── f16_le_quiet.c │ │ ├── f16_lt.c │ │ ├── f16_lt_quiet.c │ │ ├── f16_mul.c │ │ ├── f16_mulAdd.c │ │ ├── f16_rem.c │ │ ├── f16_roundToInt.c │ │ ├── f16_sqrt.c │ │ ├── f16_sub.c │ │ ├── f16_to_f128.c │ │ ├── f16_to_f32.c │ │ ├── f16_to_f64.c │ │ ├── f16_to_i32.c │ │ ├── f16_to_i32_r_minMag.c │ │ ├── f16_to_i64.c │ │ ├── f16_to_i64_r_minMag.c │ │ ├── f16_to_ui32.c │ │ ├── f16_to_ui32_r_minMag.c │ │ ├── f16_to_ui64.c │ │ ├── f16_to_ui64_r_minMag.c │ │ ├── f32_add.c │ │ ├── f32_classify.c │ │ ├── f32_div.c │ │ ├── f32_eq.c │ │ ├── f32_eq_signaling.c │ │ ├── f32_isSignalingNaN.c │ │ ├── f32_le.c │ │ ├── f32_le_quiet.c │ │ ├── f32_lt.c │ │ ├── f32_lt_quiet.c │ │ ├── f32_mul.c │ │ ├── f32_mulAdd.c │ │ ├── f32_rem.c │ │ ├── f32_roundToInt.c │ │ ├── f32_sqrt.c │ │ ├── f32_sub.c │ │ ├── f32_to_f128.c │ │ ├── f32_to_f16.c │ │ ├── f32_to_f64.c │ │ ├── f32_to_i32.c │ │ ├── f32_to_i32_r_minMag.c │ │ ├── f32_to_i64.c │ │ ├── f32_to_i64_r_minMag.c │ │ ├── f32_to_ui32.c │ │ ├── f32_to_ui32_r_minMag.c │ │ ├── f32_to_ui64.c │ │ ├── f32_to_ui64_r_minMag.c │ │ ├── f64_add.c │ │ ├── f64_classify.c │ │ ├── f64_div.c │ │ ├── f64_eq.c │ │ ├── f64_eq_signaling.c │ │ ├── f64_isSignalingNaN.c │ │ ├── f64_le.c │ │ ├── f64_le_quiet.c │ │ ├── f64_lt.c │ │ ├── f64_lt_quiet.c │ │ ├── f64_mul.c │ │ ├── f64_mulAdd.c │ │ ├── f64_rem.c │ │ ├── f64_roundToInt.c │ │ ├── f64_sqrt.c │ │ ├── f64_sub.c │ │ ├── f64_to_f128.c │ │ ├── f64_to_f16.c │ │ ├── f64_to_f32.c │ │ ├── f64_to_i32.c │ │ ├── f64_to_i32_r_minMag.c │ │ ├── f64_to_i64.c │ │ ├── f64_to_i64_r_minMag.c │ │ ├── f64_to_ui32.c │ │ ├── f64_to_ui32_r_minMag.c │ │ ├── f64_to_ui64.c │ │ ├── f64_to_ui64_r_minMag.c │ │ ├── i32_to_f128.c │ │ ├── i32_to_f16.c │ │ ├── i32_to_f32.c │ │ ├── i32_to_f64.c │ │ ├── i64_to_f128.c │ │ ├── i64_to_f16.c │ │ ├── i64_to_f32.c │ │ ├── i64_to_f64.c │ │ ├── internals.h │ │ ├── platform.h │ │ ├── primitiveTypes.h │ │ ├── primitives.h │ │ ├── s_add128.c │ │ ├── s_add256M.c │ │ ├── s_addCarryM.c │ │ ├── s_addComplCarryM.c │ │ ├── s_addM.c │ │ ├── s_addMagsF128.c │ │ ├── s_addMagsF16.c │ │ ├── s_addMagsF32.c │ │ ├── s_addMagsF64.c │ │ ├── s_approxRecip32_1.c │ │ ├── s_approxRecipSqrt32_1.c │ │ ├── s_approxRecipSqrt_1Ks.c │ │ ├── s_approxRecip_1Ks.c │ │ ├── s_commonNaNToF128UI.c │ │ ├── s_commonNaNToF16UI.c │ │ ├── s_commonNaNToF32UI.c │ │ ├── s_commonNaNToF64UI.c │ │ ├── s_compare128M.c │ │ ├── s_compare96M.c │ │ ├── s_countLeadingZeros16.c │ │ ├── s_countLeadingZeros32.c │ │ ├── s_countLeadingZeros64.c │ │ ├── s_countLeadingZeros8.c │ │ ├── s_eq128.c │ │ ├── s_f128UIToCommonNaN.c │ │ ├── s_f16UIToCommonNaN.c │ │ ├── s_f32UIToCommonNaN.c │ │ ├── s_f64UIToCommonNaN.c │ │ ├── s_le128.c │ │ ├── s_lt128.c │ │ ├── s_mul128By32.c │ │ ├── s_mul128MTo256M.c │ │ ├── s_mul128To256M.c │ │ ├── s_mul64ByShifted32To128.c │ │ ├── s_mul64To128.c │ │ ├── s_mul64To128M.c │ │ ├── s_mulAddF128.c │ │ ├── s_mulAddF16.c │ │ ├── s_mulAddF32.c │ │ ├── s_mulAddF64.c │ │ ├── s_negXM.c │ │ ├── s_normRoundPackToF128.c │ │ ├── s_normRoundPackToF16.c │ │ ├── s_normRoundPackToF32.c │ │ ├── s_normRoundPackToF64.c │ │ ├── s_normSubnormalF128Sig.c │ │ ├── s_normSubnormalF16Sig.c │ │ ├── s_normSubnormalF32Sig.c │ │ ├── s_normSubnormalF64Sig.c │ │ ├── s_propagateNaNF128UI.c │ │ ├── s_propagateNaNF16UI.c │ │ ├── s_propagateNaNF32UI.c │ │ ├── s_propagateNaNF64UI.c │ │ ├── s_remStepMBy32.c │ │ ├── s_roundMToI64.c │ │ ├── s_roundMToUI64.c │ │ ├── s_roundPackMToI64.c │ │ ├── s_roundPackMToUI64.c │ │ ├── s_roundPackToF128.c │ │ ├── s_roundPackToF16.c │ │ ├── s_roundPackToF32.c │ │ ├── s_roundPackToF64.c │ │ ├── s_roundPackToI32.c │ │ ├── s_roundPackToI64.c │ │ ├── s_roundPackToUI32.c │ │ ├── s_roundPackToUI64.c │ │ ├── s_roundToI32.c │ │ ├── s_roundToI64.c │ │ ├── s_roundToUI32.c │ │ ├── s_roundToUI64.c │ │ ├── s_shiftRightJam128.c │ │ ├── s_shiftRightJam128Extra.c │ │ ├── s_shiftRightJam256M.c │ │ ├── s_shiftRightJam32.c │ │ ├── s_shiftRightJam64.c │ │ ├── s_shiftRightJam64Extra.c │ │ ├── s_shortShiftLeft128.c │ │ ├── s_shortShiftLeft64To96M.c │ │ ├── s_shortShiftRight128.c │ │ ├── s_shortShiftRightExtendM.c │ │ ├── s_shortShiftRightJam128.c │ │ ├── s_shortShiftRightJam128Extra.c │ │ ├── s_shortShiftRightJam64.c │ │ ├── s_shortShiftRightJam64Extra.c │ │ ├── s_shortShiftRightM.c │ │ ├── s_sub128.c │ │ ├── s_sub1XM.c │ │ ├── s_sub256M.c │ │ ├── s_subM.c │ │ ├── s_subMagsF128.c │ │ ├── s_subMagsF16.c │ │ ├── s_subMagsF32.c │ │ ├── s_subMagsF64.c │ │ ├── softfloat.ac │ │ ├── softfloat.h │ │ ├── softfloat.mk.in │ │ ├── softfloat_raiseFlags.c │ │ ├── softfloat_state.c │ │ ├── softfloat_types.h │ │ ├── specialize.h │ │ ├── ui32_to_f128.c │ │ ├── ui32_to_f16.c │ │ ├── ui32_to_f32.c │ │ ├── ui32_to_f64.c │ │ ├── ui64_to_f128.c │ │ ├── ui64_to_f16.c │ │ ├── ui64_to_f32.c │ │ └── ui64_to_f64.c │ ├── spike_main │ │ ├── disasm.cc │ │ ├── spike-dasm.cc │ │ ├── spike.cc │ │ ├── spike_main.ac │ │ ├── spike_main.mk.in │ │ ├── termios-xspike.cc │ │ └── xspike.cc │ └── tests │ │ ├── ebreak.py │ │ ├── ebreak.s │ │ └── testlib.py │ ├── rvfi_pkg.sv │ ├── rvfi_tracer.sv │ ├── tb_cva6_icache │ ├── .gitignore │ ├── Makefile │ ├── hdl │ │ ├── mem_emul.sv │ │ ├── tb.sv │ │ ├── tb_pkg.sv │ │ └── tlb_emul.sv │ ├── tb.list │ └── wave.do │ ├── tb_serdiv │ ├── .gitignore │ ├── Makefile │ ├── hdl │ │ ├── tb.sv │ │ ├── tb_div.sv │ │ ├── tb_pkg.sv │ │ ├── tb_rem.sv │ │ ├── tb_udiv.sv │ │ └── tb_urem.sv │ └── tb.list │ ├── tb_wb_dcache │ ├── .gitignore │ ├── Makefile │ ├── hdl │ │ ├── tb.sv │ │ └── tb_amoport.sv │ ├── tb.list │ └── wave.do │ ├── tb_wt_dcache │ ├── .gitignore │ ├── Makefile │ ├── hdl │ │ ├── tb.sv │ │ └── tb_mem.sv │ ├── tb.list │ └── wave.do │ └── wave │ └── wave_core.do ├── docs ├── .gitignore ├── Makefile ├── _static │ ├── ariane_overview.pdf │ ├── ariane_overview.png │ ├── bg.jpg │ ├── branch_prediction.pdf │ ├── branch_prediction.png │ ├── fpga_bd.pdf │ ├── fpga_bd.png │ ├── instr_realign.pdf │ ├── instr_realign.png │ ├── jekyll-dark.png │ ├── jekyll.png │ ├── ld_pipeline_diagram.svg │ ├── logonav.png │ ├── lsu_blockdiagram.pdf │ ├── lsu_blockdiagram.png │ ├── mmu_blockdiagramm.pdf │ ├── mmu_blockdiagramm.png │ ├── openhw-landscape.svg │ ├── pau_diagram.png │ ├── scoreboard.pdf │ ├── scoreboard.png │ ├── uvm_fu_tb.ai │ └── uvm_fu_tb.png ├── commit_stage.rst ├── conf.py ├── cva6_soc.rst ├── ex_stage.md ├── id_stage.md ├── if_stage.md ├── index.rst ├── intro.rst ├── issue_stage.md ├── make.bat ├── pcgen_stage.md ├── requirements.txt └── user_guide │ └── cva6_ug_csr.adoc ├── init_testharness.do ├── pd └── synth │ ├── .gitignore │ ├── Makefile │ ├── SyncSpRamBeNx64.sv │ ├── SyncSpRamBeNx64_1.sv │ ├── cva6_read.tcl │ ├── cva6_synth.tcl │ └── scripts │ ├── dc_setup.tcl │ ├── dc_setup_filenames.tcl │ └── gate_analysis.py ├── posit64_testsuite_llvm.c ├── posit_testsuite_llvm.c ├── scripts └── parse_ila_trace.py └── src_files.yml /.editorconfig: -------------------------------------------------------------------------------- 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