├── .gitignore ├── Makefile.in ├── README.md ├── build ├── linux │ └── KeepMe └── osx │ └── KeepMe ├── cdl ├── README.md ├── analyzer │ └── src │ │ ├── analyzer_async_data_slow_to_fast.cdl │ │ ├── analyzer_mux_2.cdl │ │ ├── analyzer_mux_8.cdl │ │ ├── analyzer_mux_8_e2.cdl │ │ ├── analyzer_target.cdl │ │ └── analyzer_target_stub.cdl ├── apb │ ├── src │ │ ├── apb_logging.cdl │ │ ├── apb_master_axi.cdl │ │ ├── apb_master_mux.cdl │ │ ├── apb_processor.cdl │ │ ├── apb_target_analyzer.cdl │ │ ├── apb_target_axi4s.cdl │ │ ├── apb_target_de1_cl_inputs.cdl │ │ ├── apb_target_dprintf.cdl │ │ ├── apb_target_dprintf_uart.cdl │ │ ├── apb_target_gpio.cdl │ │ ├── apb_target_i2c_master.cdl │ │ ├── apb_target_jtag.cdl │ │ ├── apb_target_led_ws2812.cdl │ │ ├── apb_target_ps2_host.cdl │ │ ├── apb_target_rv_timer.cdl │ │ ├── apb_target_sram_interface.cdl │ │ ├── apb_target_timer.cdl │ │ └── apb_target_uart_minimal.cdl │ └── tb_src │ │ ├── tb_apb_processor.cdl │ │ ├── tb_apb_target_axi4s.cdl │ │ ├── tb_apb_target_i2c.cdl │ │ └── tb_apb_target_rv_timer.cdl ├── axi │ ├── src │ │ └── axi4s32_fifo_4.cdl │ └── tb_src │ │ └── tb_axi.cdl ├── boards │ ├── de1_cl │ │ ├── src │ │ │ ├── bbc_micro_de1_cl.cdl │ │ │ ├── bbc_micro_de1_cl_bbc.cdl │ │ │ ├── bbc_micro_de1_cl_io.cdl │ │ │ ├── de1_cl_controls.cdl │ │ │ ├── picoriscv_de1_cl.cdl │ │ │ └── riscv_adjunct_de1_cl.cdl │ │ └── tb_src │ │ │ └── tb_de1_cl_controls.cdl │ ├── de1_cl_hps │ │ ├── src │ │ │ └── de1_cl_hps_debug.cdl │ │ └── tb_src │ │ │ ├── tb_de1_cl_hps_debug.cdl │ │ │ └── tb_de1_cl_hps_generic.cdl │ ├── de1_hps │ │ ├── src │ │ │ └── de1_hps_debug.cdl │ │ └── tb_src │ │ │ └── tb_de1_hps_generic.cdl │ ├── de2 │ │ └── src │ │ │ └── picorisc_de2.cdl │ └── vcu108 │ │ ├── src │ │ ├── vcu108_debug.cdl │ │ ├── vcu108_riscv.cdl │ │ ├── vcu108_riscv_3.cdl │ │ └── vcu108_riscv_generic.cdl │ │ └── tb_src │ │ ├── tb_vcu108_debug.cdl │ │ ├── tb_vcu108_generic.cdl │ │ ├── tb_vcu108_riscv.cdl │ │ └── tb_vcu108_riscv_3.cdl ├── clocking │ ├── src │ │ ├── clock_timer.cdl │ │ ├── clock_timer_as_sec_nsec.cdl │ │ ├── clock_timer_async.cdl │ │ ├── clocking_eye_tracking.cdl │ │ └── clocking_phase_measure.cdl │ └── tb_src │ │ ├── tb_clock_timer.cdl │ │ └── tb_clocking.cdl ├── cpu │ ├── riscv │ │ ├── README.md │ │ ├── doc │ │ │ ├── Makefile │ │ │ ├── dml │ │ │ │ └── pipeline.dml │ │ │ ├── dss │ │ │ │ └── pipeline.dss │ │ │ ├── reve_r │ │ │ │ ├── architecture.md │ │ │ │ ├── coprocessors.md │ │ │ │ ├── debug.md │ │ │ │ ├── exceptions_and_interrupts.md │ │ │ │ ├── extensions.md │ │ │ │ ├── implementation.md │ │ │ │ ├── interfacing.md │ │ │ │ ├── introduction.md │ │ │ │ ├── modes.md │ │ │ │ ├── title.md │ │ │ │ └── trace.md │ │ │ └── riscv_cpu_implementation.md │ │ ├── src │ │ │ ├── riscv_csrs.cdl │ │ │ ├── riscv_csrs_decode.cdl │ │ │ ├── riscv_csrs_machine_debug.cdl │ │ │ ├── riscv_csrs_machine_debug_user.cdl │ │ │ ├── riscv_csrs_machine_debug_user_irq.cdl │ │ │ ├── riscv_csrs_machine_only.cdl │ │ │ ├── riscv_e32_decode.cdl │ │ │ ├── riscv_e32c_decode.cdl │ │ │ ├── riscv_i32_alu.cdl │ │ │ ├── riscv_i32_debug.cdl │ │ │ ├── riscv_i32_debug_decode.cdl │ │ │ ├── riscv_i32_decode.cdl │ │ │ ├── riscv_i32_dmem_read_data.cdl │ │ │ ├── riscv_i32_dmem_request.cdl │ │ │ ├── riscv_i32_fetch_debug.cdl │ │ │ ├── riscv_i32_minimal.cdl │ │ │ ├── riscv_i32_minimal3.cdl │ │ │ ├── riscv_i32_minimal_apb.cdl │ │ │ ├── riscv_i32_muldiv.cdl │ │ │ ├── riscv_i32_pipeline_control.cdl │ │ │ ├── riscv_i32_pipeline_control_fetch_data.cdl │ │ │ ├── riscv_i32_pipeline_control_fetch_req.cdl │ │ │ ├── riscv_i32_pipeline_control_flow.cdl │ │ │ ├── riscv_i32_pipeline_debug.cdl │ │ │ ├── riscv_i32_pipeline_trap_interposer.cdl │ │ │ ├── riscv_i32_trace.cdl │ │ │ ├── riscv_i32_trace_compression.cdl │ │ │ ├── riscv_i32_trace_decompression.cdl │ │ │ ├── riscv_i32_trace_pack.cdl │ │ │ ├── riscv_i32c_decode.cdl │ │ │ ├── riscv_i32c_pipeline.cdl │ │ │ ├── riscv_i32c_pipeline2.cdl │ │ │ ├── riscv_i32c_pipeline3.cdl │ │ │ ├── riscv_jtag_apb_dm.cdl │ │ │ ├── riscv_minimal_debug.cdl │ │ │ └── to_do.md │ │ └── tb_src │ │ │ ├── tb_riscv_i32_minimal.cdl │ │ │ ├── tb_riscv_i32_minimal_generic.cdl │ │ │ ├── tb_riscv_i32_muldiv.cdl │ │ │ ├── tb_riscv_i32c_minimal.cdl │ │ │ ├── tb_riscv_i32c_minimal3.cdl │ │ │ ├── tb_riscv_i32c_pipeline3.cdl │ │ │ ├── tb_riscv_i32mc_minimal3.cdl │ │ │ ├── tb_riscv_i32mc_pipeline3.cdl │ │ │ ├── tb_riscv_i32mc_system.cdl │ │ │ ├── tb_riscv_jtag_debug.cdl │ │ │ └── tb_riscv_minimal_single_memory.cdl │ ├── src │ │ └── cpu6502.cdl │ └── tb_src │ │ └── tb_6502.cdl ├── crypt │ └── kasumi │ │ ├── doc │ │ └── kasumi.md │ │ ├── src │ │ ├── kasumi_cipher_3.cdl │ │ ├── kasumi_fi.cdl │ │ ├── kasumi_fo_cycles_3.cdl │ │ ├── kasumi_sbox7.cdl │ │ └── kasumi_sbox9.cdl │ │ └── tb_src │ │ └── tb_kasumi_cipher.cdl ├── csrs │ ├── src │ │ ├── csr_master_apb.cdl │ │ ├── csr_target_apb.cdl │ │ ├── csr_target_csr.cdl │ │ └── csr_target_timeout.cdl │ └── tb_src │ │ └── tb_csrs.cdl ├── inc │ ├── analyzer │ │ └── analyzer_modules.h │ ├── apb │ │ ├── apb_masters.h │ │ ├── apb_targets.h │ │ └── apb_utilities.h │ ├── axi │ │ ├── axi4s_modules.h │ │ └── axi_masters.h │ ├── boards │ │ ├── de1.h │ │ ├── de1 │ │ │ └── de1_hps.h │ │ ├── de1_cl │ │ │ ├── de1_cl_apb.h │ │ │ ├── de1_cl_bbc_micro.h │ │ │ ├── de1_cl_hps.h │ │ │ └── de1_cl_types.h │ │ ├── de2.h │ │ ├── vcu108.h │ │ └── vcu108 │ │ │ └── vcu108_generic.h │ ├── clocking │ │ ├── clock_timer_modules.h │ │ └── clocking_modules.h │ ├── cpu │ │ └── riscv │ │ │ ├── chk_riscv.h │ │ │ ├── riscv.h │ │ │ ├── riscv_config.h │ │ │ ├── riscv_internal_types.h │ │ │ ├── riscv_modules.h │ │ │ ├── riscv_pipeline.h │ │ │ ├── riscv_pipeline_types.h │ │ │ └── riscv_submodules.h │ ├── crypt │ │ ├── kasumi_modules.h │ │ ├── kasumi_submodules.h │ │ └── kasumi_types.h │ ├── csr │ │ ├── csr_masters.h │ │ └── csr_targets.h │ ├── input │ │ ├── hysteresis.h │ │ ├── i2c_modules.h │ │ ├── ps2_modules.h │ │ └── uart_modules.h │ ├── led │ │ └── led_modules.h │ ├── microcomputers │ │ └── bbc │ │ │ ├── bbc_submodules.h │ │ │ └── bbc_types.h │ ├── networking │ │ ├── encoders.h │ │ ├── ethernet_modules.h │ │ └── gmii_modules.h │ ├── picoriscv.h │ ├── picoriscv_submodules.h │ ├── picoriscv_types.h │ ├── srams.h │ ├── subsystem │ │ └── subsys_minimal.h │ ├── technology │ │ ├── serdes_modules.h │ │ └── sync_modules.h │ ├── types │ │ ├── analyzer.h │ │ ├── apb.h │ │ ├── axi.h │ │ ├── clock_divider.h │ │ ├── clocking.h │ │ ├── csr.h │ │ ├── dprintf.h │ │ ├── encoding.h │ │ ├── ethernet.h │ │ ├── i2c.h │ │ ├── io.h │ │ ├── jtag.h │ │ ├── led.h │ │ ├── mdio.h │ │ ├── memories.h │ │ ├── networking.h │ │ ├── ps2.h │ │ ├── sram.h │ │ ├── subsystem.h │ │ ├── teletext.h │ │ ├── timer.h │ │ ├── uart.h │ │ └── video.h │ ├── utils │ │ ├── async_reduce_modules.h │ │ ├── clock_divider_modules.h │ │ ├── dprintf_modules.h │ │ └── jtag_modules.h │ └── video │ │ ├── framebuffer_modules.h │ │ └── teletext_modules.h ├── input_devices │ ├── src │ │ ├── i2c_interface.cdl │ │ ├── i2c_master.cdl │ │ ├── i2c_slave.cdl │ │ ├── i2c_slave_apb_master.cdl │ │ ├── ps2_host.cdl │ │ ├── ps2_host_keyboard.cdl │ │ └── uart_minimal.cdl │ └── tb_src │ │ ├── tb_i2c.cdl │ │ └── tb_input_devices.cdl ├── jtag │ ├── src │ │ ├── jtag_apb.cdl │ │ └── jtag_tap.cdl │ └── tb_src │ │ └── tb_jtag_apb_timer.cdl ├── led │ ├── src │ │ ├── led_seven_segment.cdl │ │ └── led_ws2812_chain.cdl │ └── tb_src │ │ └── tb_led_ws2812_chain.cdl ├── microcomputers │ ├── bbc │ │ ├── src │ │ │ ├── bbc_csr_interface.cdl │ │ │ ├── bbc_display_sram.cdl │ │ │ ├── bbc_floppy_sram.cdl │ │ │ ├── bbc_keyboard_csr.cdl │ │ │ ├── bbc_keyboard_ps2.cdl │ │ │ ├── bbc_micro.cdl │ │ │ ├── bbc_micro_clocking.cdl │ │ │ ├── bbc_micro_keyboard.cdl │ │ │ ├── bbc_micro_rams.cdl │ │ │ ├── bbc_micro_with_rams.cdl │ │ │ └── bbc_vidproc.cdl │ │ └── tb_src │ │ │ └── tb_bbc_display_sram.cdl │ └── picoriscv │ │ ├── src │ │ ├── picoriscv.cdl │ │ └── picoriscv_clocking.cdl │ │ └── tb_src │ │ └── tb_picoriscv.cdl ├── networking │ ├── src │ │ ├── decode_8b10b.cdl │ │ ├── encode_8b10b.cdl │ │ ├── gbe_axi4s32.cdl │ │ ├── gbe_single.cdl │ │ ├── sgmii_gmii_gasket.cdl │ │ └── sgmii_transceiver.cdl │ └── tb_src │ │ ├── tb_8b10b.cdl │ │ ├── tb_gbe.cdl │ │ └── tb_sgmii.cdl ├── serial │ └── src │ │ ├── acia6850.cdl │ │ └── via6522.cdl ├── storage │ └── disk │ │ └── src │ │ └── fdc8271.cdl ├── subsystem │ └── src │ │ └── subsys_minimal.cdl ├── technology │ └── src │ │ ├── tech_sync_bit.cdl │ │ └── tech_sync_flop.cdl ├── utils │ ├── src │ │ ├── async_reduce2_4_28_l.cdl │ │ ├── async_reduce2_4_28_r.cdl │ │ ├── async_reduce_4_28_l.cdl │ │ ├── async_reduce_4_28_r.cdl │ │ ├── async_reduce_4_60_l.cdl │ │ ├── async_reduce_4_60_r.cdl │ │ ├── clock_divider.cdl │ │ ├── dprintf.cdl │ │ ├── dprintf_2_fifo_4.cdl │ │ ├── dprintf_2_mux.cdl │ │ ├── dprintf_4_async.cdl │ │ ├── dprintf_4_dp_sram_512.cdl │ │ ├── dprintf_4_fifo_4.cdl │ │ ├── dprintf_4_fifo_512.cdl │ │ ├── dprintf_4_mux.cdl │ │ ├── generic_async_reduce.cdl │ │ ├── generic_valid_ack_async_slow.cdl │ │ ├── generic_valid_ack_fifo.cdl │ │ ├── generic_valid_ack_mux.cdl │ │ ├── generic_valid_ack_sram_fifo.cdl │ │ └── hysteresis_switch.cdl │ └── tb_src │ │ ├── tb_dprintf.cdl │ │ ├── tb_dprintf_mux.cdl │ │ └── tb_hysteresis_switch.cdl └── video │ ├── src │ ├── crtc6845.cdl │ ├── framebuffer.cdl │ ├── framebuffer_teletext.cdl │ ├── framebuffer_timing.cdl │ ├── saa5050.cdl │ └── teletext.cdl │ └── tb_src │ ├── tb_framebuffer_teletext.cdl │ └── tb_teletext.cdl ├── cmodel ├── inc │ ├── axi.h │ ├── axi_types.h │ ├── bbc_display.h │ ├── bbc_floppy.h │ ├── bbc_floppy_disk.h │ ├── bbc_shm.h │ ├── ef_object.h │ ├── fb.h │ ├── image_io.h │ └── vnc_rfb.h └── src │ ├── axi4s32_master_slave.cpp │ ├── axi_master.cpp │ ├── axi_types.cpp │ ├── bbc_display.cpp │ ├── bbc_display_vnc.cpp │ ├── bbc_floppy.cpp │ ├── bbc_floppy_disk.cpp │ ├── bbc_shm.cpp │ ├── chk_riscv_ifetch.cpp │ ├── chk_riscv_trace.cpp │ ├── ef_object.cpp │ ├── fb.cpp │ ├── image_io.cpp │ ├── srams.cpp │ └── vnc_rfb.cpp ├── config.h.in ├── configure.ac ├── disks └── elite.mif ├── doc ├── Doxyfile ├── Makefile ├── dots │ └── KeepMe ├── doxyfile.bbc_cdl ├── doxyfile.common ├── filters │ └── filter_cdl.py ├── layout_cdl.xml ├── layout_cdl_external.xml ├── layout_cdl_internal.xml ├── layout_default.xml ├── pdflatex_wrapper └── tabu.sty ├── model_list ├── python ├── apb_riscv_start.py ├── apb_rom.py ├── apb_speed_selection.py ├── apb_uart_tx.py ├── apb_vga.py ├── asm6502.py ├── bbc.py ├── bbc_kbd.py ├── clock_timer.py ├── crc.py ├── disk_to_mif.py ├── documentation.py ├── dump.py ├── dump_to_mif.py ├── encdec_8b10b.py ├── hps_remote.py ├── instr6502.py ├── model6502.py ├── model6522.py ├── multiplier.py ├── ps2.py ├── ps2_bbc_kbd_map.py ├── py_engine.py ├── remote.py ├── rom_to_mif.py ├── rv_flow.py ├── rv_rfw.py ├── rv_trace.py ├── serial_remote.py ├── sgmii_decode.py ├── svg_loffice_extract_slide.py ├── system6502.py ├── teletext_font.py └── test6502.py ├── regress_all ├── regression ├── __init__.py ├── apb.py ├── axi.py ├── axi_mixin.py ├── base6502.py ├── base6502_hw.py ├── bbc.py ├── bbc_hw.py ├── bbc_submodules.py ├── bbc_submodules2.py ├── bbc_submodules_hw.py ├── clarvi.py ├── clocking.py ├── crypt_kasumi.py ├── csrs.py ├── de1_cl.py ├── de1_cl_hps.py ├── ethernet.py ├── i2c.py ├── input_devices.py ├── jtag.py ├── jtag_support.py ├── leds.py ├── picoriscv.py ├── riscv_coproc.py ├── riscv_internal.py ├── riscv_minimal.py ├── simple_tb.py ├── structs.py ├── teletext.py ├── utils.py └── vcu108.py ├── riscv_trace ├── bit_manipulation_shift_rotate_reg.trace ├── bit_manipulation_swap_reg.trace ├── c_arith.trace ├── c_branch.trace ├── c_dprintf.trace ├── c_jump.trace ├── c_logic.trace ├── c_mv.trace ├── c_stack.trace ├── data.trace ├── logic.trace ├── rv32mi-p-ma_fetch.trace ├── rv32ui-p-add.trace ├── rv32ui-p-addi.trace ├── rv32ui-p-and.trace ├── rv32ui-p-andi.trace ├── rv32ui-p-auipc.trace ├── rv32ui-p-beq.trace ├── rv32ui-p-bge.trace ├── rv32ui-p-bgeu.trace ├── rv32ui-p-blt.trace ├── rv32ui-p-bltu.trace ├── rv32ui-p-bne.trace ├── rv32ui-p-jal.trace ├── rv32ui-p-jalr.trace ├── rv32ui-p-lb.trace ├── rv32ui-p-lbu.trace ├── rv32ui-p-lh.trace ├── rv32ui-p-lhu.trace ├── rv32ui-p-lui.trace ├── rv32ui-p-lw.trace ├── rv32ui-p-or.trace ├── rv32ui-p-ori.trace ├── rv32ui-p-sb.trace ├── rv32ui-p-sh.trace ├── rv32ui-p-simple.trace ├── rv32ui-p-sll.trace ├── rv32ui-p-slli.trace ├── rv32ui-p-slt.trace ├── rv32ui-p-slti.trace ├── rv32ui-p-sltiu.trace ├── rv32ui-p-sltu.trace ├── rv32ui-p-sra.trace ├── rv32ui-p-srai.trace ├── rv32ui-p-srl.trace ├── rv32ui-p-srli.trace ├── rv32ui-p-sub.trace ├── rv32ui-p-sw.trace ├── rv32ui-p-xor.trace ├── rv32ui-p-xori.trace ├── rv32um-p-div.trace ├── rv32um-p-divu.trace ├── rv32um-p-mul.trace ├── rv32um-p-mulh.trace ├── rv32um-p-mulhsu.trace ├── rv32um-p-mulhu.trace ├── rv32um-p-rem.trace ├── rv32um-p-remu.trace └── traps.trace ├── roms ├── ps2_bbc_kbd.mif ├── src │ ├── apb_rom_framebuffer.py │ ├── apb_rom_riscv_start.py │ ├── apb_rom_uart_tx.py │ ├── clock_divider.py │ ├── display_config.py │ ├── standard_apb_regs.py │ ├── uart_tx.py │ └── version_control.py └── teletext.mif └── scripts └── bitbang.cfg /.gitignore: -------------------------------------------------------------------------------- 1 | *~ 2 | *pyc 3 | build/*/sim 4 | build/*/*o 5 | build/*/*cdlh 6 | build/*/*cpp 7 | build/*/*v 8 | doc/html 9 | doc/latex 10 | doc/cdl_html 11 | doc/cdl_latex 12 | doc/dots 13 | *vcd 14 | *log 15 | models.make 16 | gh_pages/ 17 | -------------------------------------------------------------------------------- /build/linux/KeepMe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/atthecodeface/cdl_hardware/7f7e7a5c4b0520a67d4d196f5907316a275a4496/build/linux/KeepMe -------------------------------------------------------------------------------- /build/osx/KeepMe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/atthecodeface/cdl_hardware/7f7e7a5c4b0520a67d4d196f5907316a275a4496/build/osx/KeepMe -------------------------------------------------------------------------------- /cdl/analyzer/src/analyzer_mux_2.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2020, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file analyzer_mux_2.cdl 15 | * @brief Mux for 2 analyzer targets from one master 16 | * 17 | 18 | */ 19 | 20 | /*a Includes 21 | */ 22 | include "types/analyzer.h" 23 | include "analyzer/analyzer_modules.h" 24 | 25 | /*a Module 26 | */ 27 | /*m analyzer_mux_2 28 | * 29 | * 2 port analyzer mux using a 2-enabled 8 port mux 30 | * 31 | */ 32 | module analyzer_mux_2( clock clk, 33 | input bit reset_n, 34 | input t_analyzer_mst analyzer_mst, 35 | output t_analyzer_tgt analyzer_tgt, 36 | 37 | output t_analyzer_mst analyzer_mst_a, 38 | input t_analyzer_tgt analyzer_tgt_a, 39 | 40 | output t_analyzer_mst analyzer_mst_b, 41 | input t_analyzer_tgt analyzer_tgt_b 42 | 43 | ) 44 | { 45 | net t_analyzer_tgt analyzer_tgt; 46 | net t_analyzer_mst analyzer_mst_a; 47 | net t_analyzer_mst analyzer_mst_b; 48 | clocked clock clk reset active_low reset_n t_analyzer_tgt analyzer_tgt_zero = {*=0}; 49 | /*b Submodule */ 50 | submodule : { 51 | analyzer_tgt_zero <= {*=0}; 52 | analyzer_mux_8 mux( clk <- clk, reset_n <= reset_n, 53 | analyzer_mst <= analyzer_mst, 54 | analyzer_tgt => analyzer_tgt, 55 | analyzer_mst_a => analyzer_mst_a, 56 | analyzer_mst_b => analyzer_mst_b, 57 | analyzer_tgt_a <= analyzer_tgt_a, 58 | analyzer_tgt_b <= analyzer_tgt_b, 59 | analyzer_tgt_c <= analyzer_tgt_zero, 60 | analyzer_tgt_d <= analyzer_tgt_zero, 61 | analyzer_tgt_e <= analyzer_tgt_zero, 62 | analyzer_tgt_f <= analyzer_tgt_zero, 63 | analyzer_tgt_g <= analyzer_tgt_zero, 64 | analyzer_tgt_h <= analyzer_tgt_zero ); 65 | 66 | /*b All done */ 67 | } 68 | 69 | /*b All done */ 70 | } 71 | -------------------------------------------------------------------------------- /cdl/analyzer/src/analyzer_mux_8_e2.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2020, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file analyzer_mux_8_2e 15 | * @brief Two-enabled port of analyzer_mux_8 16 | * 17 | * Needs to be built in CDL with the options: 18 | * 19 | * dc:analyzer_config_num_targets=2 20 | * rmn:analyzer_mux_8=analyzer_mux_8_e2 21 | * 22 | */ 23 | /*a Module */ 24 | include "analyzer_mux_8.cdl" 25 | -------------------------------------------------------------------------------- /cdl/analyzer/src/analyzer_target_stub.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2020, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file analyzer_target.cdl 15 | * @brief Standard target for the analyzer bus 16 | * 17 | 18 | */ 19 | 20 | /*a Includes 21 | */ 22 | include "types/analyzer.h" 23 | include "analyzer/analyzer_modules.h" 24 | 25 | /*a Module 26 | */ 27 | /*m analyzer_target_stub 28 | * 29 | * Stub for the logic analyzer bus with no source (to plug muxes) 30 | * 31 | */ 32 | module analyzer_target_stub( clock clk, 33 | input bit reset_n, 34 | 35 | input t_analyzer_mst analyzer_mst, 36 | output t_analyzer_tgt analyzer_tgt 37 | ) 38 | { 39 | /*b Clock and reset */ 40 | default clock clk; 41 | default reset active_low reset_n; 42 | 43 | /*b APB interface state */ 44 | net t_analyzer_tgt analyzer_tgt; 45 | clocked t_analyzer_data analyzer_data = {*=0}; 46 | 47 | /*b Blah */ 48 | blah : { 49 | analyzer_data <= {*=0}; 50 | analyzer_target stub( clk<-clk, reset_n<=reset_n, 51 | analyzer_mst <= analyzer_mst, 52 | analyzer_tgt => analyzer_tgt, 53 | // analyzer_ctl => 54 | analyzer_data <= analyzer_data ); 55 | } 56 | 57 | /*b All done */ 58 | } 59 | -------------------------------------------------------------------------------- /cdl/apb/src/apb_logging.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file apb_logging.cdl 15 | * @brief Logging module for APB transactions 16 | * 17 | * This simple module provides a logging point for APB transactions, logging both 18 | * APB reads and writes separately. 19 | * 20 | * The module should be instantiated on an APB bus that the user wants 21 | * to have logged in CDL simulations 22 | * 23 | */ 24 | /*a Includes 25 | */ 26 | include "types/apb.h" 27 | 28 | /*a Module 29 | */ 30 | module apb_logging( clock clk "System clock", 31 | input bit reset_n "Active low reset", 32 | 33 | input t_apb_request apb_request "APB request", 34 | input t_apb_response apb_response "APB response" 35 | ) 36 | """ 37 | This simple module provides a logging point for APB transactions, logging both 38 | APB reads and writes separately. 39 | 40 | The module should be instantiated on an APB bus that the user wants 41 | to have logged in CDL simulations 42 | """ 43 | { 44 | /*b Clock and reset */ 45 | default clock clk; 46 | default reset active_low reset_n; 47 | 48 | /*b Logging */ 49 | apb_logging """ 50 | An APB transaction completes when @a psel, @a penable and @a pready are all high. 51 | Hence the @a pwdata and @prdata can be logged appropriately depending on @pwrite. 52 | """ : { 53 | /*b Logging */ 54 | if (apb_request.psel && apb_request.penable && apb_response.pready) { 55 | if (apb_request.pwrite) { 56 | log("APB write", 57 | "address", apb_request.paddr, 58 | "data", apb_request.pwdata ); 59 | } else { 60 | log("APB read", 61 | "address", apb_request.paddr, 62 | "data", apb_response.prdata ); 63 | } 64 | } 65 | 66 | /*b All done */ 67 | } 68 | 69 | /*b Done 70 | */ 71 | } 72 | -------------------------------------------------------------------------------- /cdl/apb/tb_src/tb_apb_target_rv_timer.cdl: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file tb_apb_processor.cdl 16 | * @brief Testbench for APB processor (ROM-based APB trasanctions) 17 | * 18 | * This is a simple testbench for the ROM-based APB transaction processor 19 | */ 20 | /*a Includes */ 21 | include "types/apb.h" 22 | include "apb/apb_targets.h" 23 | 24 | /*a External modules */ 25 | extern module se_test_harness( clock clk, 26 | output t_apb_request apb_request, 27 | input t_apb_response apb_response, 28 | output t_timer_control timer_control, 29 | input t_timer_value timer_value 30 | ) 31 | { 32 | timing from rising clock clk apb_request, timer_control; 33 | timing to rising clock clk apb_response, timer_value; 34 | } 35 | 36 | /*a Module */ 37 | module tb_apb_target_rv_timer( clock clk, 38 | input bit reset_n 39 | ) 40 | { 41 | 42 | /*b Nets */ 43 | net t_apb_request apb_request; 44 | comb t_apb_response apb_response; 45 | net t_timer_control timer_control; 46 | net t_timer_value timer_value; 47 | comb t_apb_request timer_apb_request; 48 | net t_apb_response timer_apb_response; 49 | 50 | /*b Instantiations */ 51 | instantiations: { 52 | se_test_harness th( clk <- clk, 53 | apb_request => apb_request, 54 | apb_response <= apb_response, 55 | timer_control => timer_control, 56 | timer_value <= timer_value ); 57 | 58 | apb_target_rv_timer timer( clk <- clk, 59 | reset_n <= reset_n, 60 | apb_request <= timer_apb_request, 61 | apb_response => timer_apb_response, 62 | timer_control <= timer_control, 63 | timer_value => timer_value ); 64 | timer_apb_request = apb_request; 65 | timer_apb_request.psel = apb_request.psel && (apb_request.paddr[4;28]==0); 66 | apb_response = timer_apb_response; 67 | if (apb_request.paddr[4;28]!=0) { apb_response = {*=0}; } 68 | } 69 | 70 | /*b All done */ 71 | } 72 | -------------------------------------------------------------------------------- /cdl/axi/src/axi4s32_fifo_4.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file axi4s32_fifo_4.cdl 15 | * @brief A 4-entry AXI4S-32 synchronous FIFO 16 | * 17 | * Use of the generic utility valid/ack multiplexer 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * rmt:gt_generic_valid_req=t_axi4s32 22 | * 23 | * rmn:generic_valid_ack_fifo=axi4s32_fifo_4 24 | * 25 | * dc:fifo_depth=3 26 | * 27 | * The FIFO depth in the constant can be 1 less than the required size as the FIFO as an output register 28 | */ 29 | /*a Includes */ 30 | include "types/axi.h" 31 | 32 | /*a Module */ 33 | include "generic_valid_ack_fifo.cdl" 34 | -------------------------------------------------------------------------------- /cdl/boards/de1_cl/tb_src/tb_de1_cl_controls.cdl: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file tb_de1_cl_controls.cdl 16 | * @brief Testbench for DE1 CL devices 17 | * 18 | * This is a simple testbench to instantiate the various DE1 CL 19 | * daughterboard devices. 20 | */ 21 | /*a Includes */ 22 | include "boards/de1_cl/de1_cl_types.h" 23 | 24 | /*a External modules */ 25 | extern module se_test_harness( clock clk "system clock - not the shift register pin, something faster", 26 | input t_de1_cl_inputs_control inputs_control "Signals to the shift register etc on the DE1 CL daughterboard", 27 | output t_de1_cl_inputs_status inputs_status "Signals from the shift register, rotary encoders, etc on the DE1 CL daughterboard", 28 | input t_de1_cl_user_inputs user_inputs "", 29 | output bit[8] sr_divider "clock divider to control speed of shift register" 30 | ) 31 | { 32 | timing from rising clock clk inputs_status, sr_divider; 33 | timing to rising clock clk inputs_control, user_inputs; 34 | } 35 | 36 | /*a Module */ 37 | module tb_de1_cl_controls( clock clk, 38 | input bit reset_n 39 | ) 40 | { 41 | 42 | /*b Nets */ 43 | net t_de1_cl_inputs_control inputs_control; 44 | net t_de1_cl_inputs_status inputs_status; 45 | net t_de1_cl_user_inputs user_inputs; 46 | net bit[8] sr_divider; 47 | 48 | /*b Instantiations */ 49 | instantiations: { 50 | se_test_harness th( clk <- clk, 51 | sr_divider => sr_divider, 52 | inputs_control <= inputs_control, 53 | inputs_status => inputs_status, 54 | user_inputs <= user_inputs ); 55 | 56 | de1_cl_controls controls( clk <- clk, 57 | reset_n <= reset_n, 58 | sr_divider <= sr_divider, 59 | inputs_control => inputs_control, 60 | inputs_status <= inputs_status, 61 | user_inputs => user_inputs ); 62 | } 63 | 64 | /*b All done */ 65 | } 66 | -------------------------------------------------------------------------------- /cdl/boards/de1_cl_hps/tb_src/tb_de1_cl_hps_debug.cdl: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file tb_bbc_display_sram.cdl 16 | * @brief Testbench for BBC display SRAM 17 | * 18 | */ 19 | /*a Includes */ 20 | include "tb_de1_cl_hps_generic.cdl" 21 | 22 | -------------------------------------------------------------------------------- /cdl/boards/vcu108/src/vcu108_riscv.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file vcu108_riscv_3.cdl 15 | * @brief RISC-V design for the VCU108 board 16 | * 17 | 18 | */ 19 | 20 | include "vcu108_riscv_generic.cdl" 21 | -------------------------------------------------------------------------------- /cdl/boards/vcu108/src/vcu108_riscv_3.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file vcu108_riscv_3.cdl 15 | * @brief RISC-V design for the VCU108 board 16 | * 17 | 18 | */ 19 | 20 | include "vcu108_riscv_generic.cdl" 21 | -------------------------------------------------------------------------------- /cdl/boards/vcu108/tb_src/tb_vcu108_debug.cdl: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file tb_vcu108_debug.cdl 16 | * @brief VCU108 debug project 17 | * 18 | */ 19 | /*a Includes */ 20 | include "tb_vcu108_generic.cdl" 21 | -------------------------------------------------------------------------------- /cdl/boards/vcu108/tb_src/tb_vcu108_riscv.cdl: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file tb_vcu108_debug.cdl 16 | * @brief VCU108 debug project 17 | * 18 | */ 19 | /*a Includes */ 20 | include "tb_vcu108_generic.cdl" 21 | -------------------------------------------------------------------------------- /cdl/boards/vcu108/tb_src/tb_vcu108_riscv_3.cdl: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file tb_vcu108_debug.cdl 16 | * @brief VCU108 debug project 17 | * 18 | */ 19 | /*a Includes */ 20 | include "tb_vcu108_generic.cdl" 21 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/README.md: -------------------------------------------------------------------------------- 1 | riscv_i32_alu 2 | ------------- 3 | 4 | riscv_i32_decode 5 | ---------------- 6 | 7 | riscv_i32c_decode 8 | ---------------- 9 | 10 | riscv_i32c_pipeline 11 | ---------------- 12 | 13 | * single stage execution pipeline (decode, fetch, execute) 14 | * dmem_access_req valid during the cycle 15 | * dmem_access_resp must be valid with read data at the end of the 16 | cycle 17 | * ifetch_req valid during the cycle 18 | * ifetch_resp must be valid with read data at the end of the 19 | cycle 20 | * supports coprocessor (e.g. for multiply) 21 | * includes: 22 | + riscv_i32_decode 23 | + riscv_i32c_decode 24 | + riscv_i32_alu 25 | 26 | 27 | riscv_i32c_minimal 28 | ---------------- 29 | 30 | * needs to be removed and changed to riscv_i32c_minimal 31 | * I/E32 instruction set + optionally compressed only (multiply etc 32 | disabled) 33 | * set riscv_config.i32c to 1 for RV32IC support 34 | * set riscv_config.i32c to 0 for no RV32IC support 35 | * set riscv_config.e32 to 1 for RV32E only (with/without C) 36 | * set riscv_config.e32 to 0 for no RV32E only (with/without C) 37 | * set riscv_config.i32m should be 0 38 | * minimal CSRs (machine mode only) 39 | * Includes: 40 | + riscv_i32c_pipeline 41 | 42 | Test benches 43 | ------------ 44 | 45 | tb_riscv_minimal 46 | ---------------- 47 | 48 | * I32C minimal CSRs instantiation without debug 49 | * riscv_config.{e32=0, i32c=0, i32m=0} 50 | * Includes: 51 | + riscv_minimal (Needs to change to riscv_i32c_minimal 52 | 53 | tb_riscv_i32c_minimal 54 | ---------------- 55 | 56 | * I32C minimal CSRs instantiation without debug 57 | * riscv_config.{e32=0, i32c=1, i32m=0} 58 | * Includes: 59 | + riscv_minimal (Needs to change to riscv_i32c_minimal 60 | 61 | tb_riscv_i32c_pipeline3 62 | ---------------- 63 | 64 | * I32C minimal CSRs instantiation with debug 65 | * riscv_config.{e32=0, i32c=1, i32m=0} 66 | * Includes: 67 | + riscv_i32c_pipeline3 68 | + riscv_i32_trace 69 | 70 | tb_riscv_i32mc_pipeline3 71 | ---------------- 72 | 73 | * I32C minimal CSRs instantiation with debug 74 | * riscv_config.{e32=0, i32c=1, i32m=1} 75 | * Includes: 76 | + jtag_tap 77 | + riscv_jtag_apb_dm 78 | + riscv_i32_debug 79 | + riscv_i32_pipeline_debug 80 | + riscv_i32c_pipeline3 81 | + riscv_i32_muldiv 82 | + riscv_i32_trace 83 | 84 | 85 | 86 | 87 | 88 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/doc/Makefile: -------------------------------------------------------------------------------- 1 | # pandoc needs the path to pdflatex 2 | PANDOC = PATH="/Library/TeX/texbin/:${PATH}" pandoc --pdf-engine=pdflatex 3 | 4 | DIAGRAM_INSTALL_BIN := $(shell which diagram) 5 | all: 6 | 7 | %.svg: dml/%.dml dss/%.dss $(DIAGRAM_INSTALL_BIN) 8 | @echo "Use diagam on DML/DSS files to create $@" 9 | @diagram --f dml/$*.dml dss/$*.dss --svg $@ 10 | 11 | 12 | %.pdf: %.md 13 | @echo "Run pandoc on $*.md to generate $@" 14 | @${PANDOC} --toc $*.md -o $@ 15 | 16 | 17 | %.pdf: %.md 18 | @echo "Run pandoc on $*.md to generate $@" 19 | @${PANDOC} --toc $*.md -o $@ 20 | 21 | reve_r__images += pipeline.svg 22 | reve_r__sources += reve_r/title.md 23 | reve_r__sources += reve_r/introduction.md 24 | reve_r__sources += reve_r/architecture.md 25 | reve_r__sources += reve_r/implementation.md 26 | reve_r__sources += reve_r/interfacing.md 27 | reve_r__sources += reve_r/modes.md 28 | reve_r__sources += reve_r/exceptions_and_interrupts.md 29 | reve_r__sources += reve_r/debug.md 30 | reve_r__sources += reve_r/trace.md 31 | reve_r__sources += reve_r/extensions.md 32 | reve_r__sources += reve_r/coprocessors.md 33 | 34 | #f cmodel_template 35 | define cmodel_template 36 | # @param $1 c filename 37 | # @param $2 object filename 38 | # @param $3 model name 39 | # @param $4 options 40 | 41 | ${TARGET_DIR}/$2 : ${SRC_ROOT}/$1 42 | @echo "CC $1 -o $2" 43 | $(Q)$(CXX) $(CXXFLAGS) -c -o ${TARGET_DIR}/$2 ${SRC_ROOT}/$1 $4 44 | 45 | MODELS += $3 46 | C_MODEL_SRCS += ${SRC_ROOT}/$1 47 | C_MODEL_OBJS += ${TARGET_DIR}/$2 48 | 49 | endef 50 | 51 | reve_r.pdf: $(reve_r__images) 52 | reve_r.pdf: $(reve_r__sources) 53 | @echo "Run pandoc on reve_r source md files to generate $@" 54 | @${PANDOC} --toc $(reve_r__sources) -o $@ 55 | 56 | all: reve_r.pdf 57 | 58 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/doc/dss/pipeline.dss: -------------------------------------------------------------------------------- 1 | #style id=debug border_color=red border=0.1 2 | #style id=base font_size=3. border_round=0.5 border_color=black magnets_per_side=5 eval="n=.magnets 2 sub;e=.magnets 6 sub;s=.magnets 10 sub;w=.magnets 14 sub;" 3 | #style id=pipeline_and_control border_fill=0.95 border=0.1 padding=0.5 4 | #style id=pipeline border_fill=0.9 border=0.1 padding=0.5 5 | #style id=pipeline_text rotation=270 font_size=3. border=0.1 margin=0.5 padding=0.3 6 | #style id=pipeline_stage expand=1 7 | #style id=pipeline_gap width=3 8 | #style id=pipeline_flow stroke_width=0.2 eval="coords=.magnets 14 sub .magnets 6 sub;" 9 | #style id=control border=0.1 padding=0.5 10 | #style id=ext_logic border=0.3 padding=0.5 11 | #style id=reg border_fill="1.0 0.7 0.3" 12 | #style id=comb border_fill="0.7 1.0 0.3" 13 | #style id=top_spacer width=3 height=8 14 | #style id=ext_io width="3 100" height=3 15 | #style id=unidir markers="stub arr" 16 | #style id=bidir markers="rev_arr arr" 17 | #style id=bus_label font_size=1.0 18 | #style id=base_path color=black 19 | #style id=int_flow stroke_width=0.3 20 | #style id=ext_flow stroke_width=0.5 21 | 22 | ;#rule style=debug 23 | #rule style=base 24 | #rule class=reg style=reg 25 | #rule class=comb style=comb 26 | #rule class=unidir style=unidir 27 | #rule class=bidir style=bidir 28 | #rule class=bus_label style=bus_label 29 | #rule tag=path style=base_path 30 | 31 | #rule id=pipeline_and_control style=pipeline_and_control 32 | #rule id=pipeline style=pipeline 33 | ##rule tag=text style=pipeline_text 34 | ##rule class=pipe_stage style=pipeline_stage 35 | ##rule class=pipe_gap style=pipeline_gap 36 | ##rule class=pipe_flow style=pipeline_flow 37 | ###apply style=unidir 38 | 39 | #rule class=control style=control 40 | #rule class=ext_logic style=ext_logic 41 | #rule class=int_flow style=int_flow 42 | #rule class=ext_flow style=ext_flow 43 | 44 | #style id=pipeline_control_state width=40 margin=0.5 45 | #rule id=pipeline_control_state style=pipeline_control_state 46 | 47 | 48 | #rule class=ext_io style=ext_io 49 | #rule class=top_spacer style=top_spacer 50 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/doc/reve_r/coprocessors.md: -------------------------------------------------------------------------------- 1 | # Coprocessors 2 | 3 | Coprocessors may be added to execute in parallel with the execution 4 | stage of a CDL RISC-V implementation. 5 | 6 | Caveat: currently only fully pipelined processors operate with 7 | coprocessors. This is due to implementation time and regression test 8 | capability. 9 | 10 | The concept behind the CDL RISC-V coprocessors is that they receive 11 | the instruction and data that the execution unit does, and they 12 | perform an operation whose result is returned to the execution unit - 13 | effectively they appear as a combinatorial operation on 32-bits of rs1 14 | and rs2 data producing a result. However, the coprocessor can take 15 | multiple cycles to operate, and so it may indicate to the pipeline 16 | control that it has started execution but that it has not completed. 17 | 18 | An example of a coprocessor is the multipy/divide unit; this utilizes 19 | the instruction decoder to decode the instructions, and it takes the 20 | decode to operate a state machine that performs a 4-bit-per-cycle 21 | multiply or a 1-bit-per-cycle divide. The logic in the coprocessor is 22 | optimized for die area, and the data pipeline for multiply and divide 23 | is common. The coprocessor can also perform fused operations: these 24 | are, for example, where two 32-bit numbers are multiplied and the 25 | full 64-bits of result are required; two successive instructions of 26 | the right form allow the first to do the full multiply (returning half 27 | the result) while the second can then complete in a single cycle 28 | (returning the other half of the result). In order to achieve this the 29 | coprocessor requires a 'look-ahead' at the next instruction to be 30 | executed - i.e. it needs a decode stage that is valid while the 31 | current instruction is in the execute stage. 32 | 33 | The coprocessor can also indicate that it is not ready to even *start* 34 | an instruction; this may be because its resources are otherwise 35 | busy. In this case the pipeline control can continue to try to execute 36 | the instruction in the next cycle. Unlike an inability to complete, 37 | though, the inability to start permits the pipeline control to 38 | *interrupt* the instruction execution (flushing the instruction in the 39 | execution stage). This is a better method of holding execution from a 40 | coprocessor if the reason that the coprocessor cannot execute is due 41 | to external signals. 42 | 43 | 44 | 45 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/doc/reve_r/introduction.md: -------------------------------------------------------------------------------- 1 | # Overview 2 | 3 | The RISC-V implementations here were originally designed to 4 | investigate the future development of the CDL language; to achieve 5 | this goal they have to pass regression tests for RISC-V, and cope with 6 | being targeted at silicon implementation (through verilog/synthesis), 7 | FPGA implementation (again through verilog/synthesis), and C-based 8 | simulation. 9 | 10 | Part of this original goal was to provide for a range of pipeline 11 | depths and resultant silicon costs, and to also provide for 12 | enhancements by replacing modules and overriding default type 13 | structures with enhanced type structures (for example in the 14 | instruction decode/ALU) to allow enhancements which require multiple 15 | submodule changes. In a more modern language these features would be 16 | handled with parametrized types, polymorphic modules, and type 17 | classes. 18 | 19 | Since the original implementations were completed, the goals have 20 | grown somewhat; this has encouraged a slightly more structured 21 | approach to the implementation, which leads to this more structured 22 | documentation. 23 | 24 | This document, then, is an implementation specification which is 25 | driving the final pipeline implementation. 26 | 27 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/doc/reve_r/title.md: -------------------------------------------------------------------------------- 1 | [header_comment]: # (This files is written in Markdown; it may be 2 | compiled to PDF using, for example, pandoc file.md 3 | --pdf-engine=pdflatex -o file.pdf; however it should be 4 | readable in text form) 5 | 6 | --- 7 | Title: book 8 | documentclass: book 9 | author: "Gavin J Stark" 10 | --- 11 | 12 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/src/riscv_csrs_machine_debug.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2019, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file riscv_csrs variant 15 | * @brief CSRs with specific options 16 | * 17 | */ 18 | 19 | /*a Includes 20 | */ 21 | include "riscv_csrs.cdl" 22 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/src/riscv_csrs_machine_debug_user.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2019, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file riscv_csrs variant 15 | * @brief CSRs with specific options 16 | * 17 | */ 18 | 19 | /*a Includes 20 | */ 21 | include "riscv_csrs.cdl" 22 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/src/riscv_csrs_machine_debug_user_irq.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2019, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file riscv_csrs variant 15 | * @brief CSRs with specific options 16 | * 17 | */ 18 | 19 | /*a Includes 20 | */ 21 | include "riscv_csrs.cdl" 22 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/src/riscv_csrs_machine_only.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2019, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file riscv_csrs variant 15 | * @brief CSRs with specific options 16 | * 17 | */ 18 | 19 | /*a Includes 20 | */ 21 | include "riscv_csrs.cdl" 22 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/src/riscv_e32_decode.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file riscv_i32_decode.cdl 15 | * @brief Instruction decoder for RISC-V implementation 16 | * 17 | * CDL implementation of RISC-V instruction decode based on the RISC-V 18 | * specification v2.1. 19 | * 20 | */ 21 | 22 | /*a Includes 23 | */ 24 | include "riscv_i32_decode.cdl" 25 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/src/riscv_e32c_decode.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file riscv_i32_decode.cdl 15 | * @brief Instruction decoder for RISC-V implementation 16 | * 17 | * CDL implementation of RISC-V instruction decode based on the RISC-V 18 | * specification v2.1. 19 | * 20 | */ 21 | 22 | /*a Includes 23 | */ 24 | include "riscv_i32c_decode.cdl" 25 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/src/riscv_i32_fetch_debug.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2018, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file riscv_i32_fetch_debug.cdl 15 | * @brief Instruction fetch interposer for debug 16 | * 17 | * CDL implementation of RISC-V i32 instruction fetch interposer designed 18 | * to work with the pipeline and associated stateful debug modules 19 | * 20 | */ 21 | 22 | /*a Includes 23 | */ 24 | include "cpu/riscv/riscv_internal_types.h" 25 | include "cpu/riscv/riscv.h" 26 | 27 | /*a Types 28 | */ 29 | /*a Module 30 | */ 31 | module riscv_i32_fetch_debug( input t_riscv_fetch_req pipeline_ifetch_req, 32 | output t_riscv_fetch_resp pipeline_ifetch_resp, 33 | input t_riscv_i32_trace pipeline_trace, 34 | input t_riscv_pipeline_debug_control debug_control, 35 | output t_riscv_pipeline_debug_control debug_response, 36 | output t_riscv_fetch_req ifetch_req, 37 | input t_riscv_fetch_resp ifetch_resp 38 | ) 39 | """ 40 | 41 | """ 42 | { 43 | 44 | /*b Signals - just the combs */ 45 | //comb t_fetch_debug_combs fetch_debug_combs "Combinatorials used in the module, not exported as the decode"; 46 | 47 | /*b FETCH_DEBUG operation */ 48 | fetch_debug_operation """ 49 | """ : { 50 | ifetch_req = pipeline_ifetch_req; 51 | pipeline_ifetch_resp = ifetch_resp; 52 | 53 | debug_response = {*=0}; 54 | 55 | /*b All done */ 56 | } 57 | 58 | /*b All done */ 59 | } 60 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/src/riscv_i32_trace.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file riscv_i32_trace.cdl 15 | * @brief Instruction trace for RISC-V implementation 16 | * 17 | * CDL implementation of RISC-V instruction trace based on the RISC-V 18 | * specification v2.1. 19 | * 20 | */ 21 | 22 | /*a Includes 23 | */ 24 | include "cpu/riscv/riscv_internal_types.h" 25 | include "cpu/riscv/riscv.h" 26 | 27 | /*a Types 28 | */ 29 | 30 | /*a Module 31 | */ 32 | module riscv_i32_trace( clock clk "Free-running clock", 33 | input bit reset_n "Active low reset", 34 | input bit riscv_clk_enable "asserted if the RISC-V ticks on this edge", 35 | input t_riscv_i32_trace trace "Trace signals" 36 | ) 37 | """ 38 | Trace instruction execution 39 | """ 40 | { 41 | 42 | default clock clk; 43 | default reset active_low reset_n; 44 | 45 | /*b Logging */ 46 | logging """ 47 | """ : { 48 | if (riscv_clk_enable) { 49 | if (trace.instr_valid) { 50 | log("PC", 51 | "pc",trace.instr_pc, 52 | "branch_taken",trace.branch_taken, 53 | "trap",trace.trap, 54 | "ret",trace.ret, 55 | "jalr",trace.jalr, 56 | "branch_target",trace.branch_target, 57 | "instr",trace.instruction); 58 | } 59 | if (trace.rfw_retire) { 60 | log("retire", "rfw", trace.rfw_data_valid, "rd", trace.rfw_rd, "data", trace.rfw_data ); 61 | } 62 | } 63 | } 64 | /*b All done */ 65 | } 66 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/src/to_do.md: -------------------------------------------------------------------------------- 1 | # To do 2 | 3 | pipeline_control_fetch_req needs riscv_config to use i32c enable for 4 | blocking branch prediction of misaligned targets 5 | 6 | mepc and dpc etc should have bits [2;0] zeroed if i32c not configured at all 7 | mepc and dpc etc should have bit [0] zeroed always (?) 8 | 9 | mepc and dpc etc should have bit[1] ignored if i32c is configured but 10 | disabled 11 | 12 | deleg for user N mode 13 | 14 | trace pack should be better with PCs - probably misses interrupt restarts and the like 15 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/tb_src/tb_riscv_i32_minimal.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2020, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file tb_riscv_i32_minimal.cdl 15 | * @brief Testbench for minimal RISC-V 16 | * 17 | */ 18 | 19 | 20 | include "tb_riscv_i32_minimal_generic.cdl" 21 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/tb_src/tb_riscv_i32_muldiv.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file tb_riscv_minimal.cdl 15 | * @brief Testbench for minimal RISC-V 16 | * 17 | */ 18 | 19 | /*a Includes 20 | */ 21 | include "srams.h" 22 | include "cpu/riscv/riscv.h" 23 | include "cpu/riscv/riscv_internal_types.h" 24 | include "cpu/riscv/riscv_submodules.h" 25 | 26 | /*a External modules */ 27 | extern module se_test_harness( clock clk, output t_riscv_i32_coproc_controls coproc_controls, input t_riscv_i32_coproc_response coproc_response, output t_riscv_config riscv_config) 28 | { 29 | timing from rising clock clk coproc_controls, riscv_config; 30 | timing to rising clock clk coproc_response; 31 | } 32 | 33 | /*a Module 34 | */ 35 | module tb_riscv_i32_muldiv( clock clk, 36 | input bit reset_n 37 | ) 38 | { 39 | 40 | /*b Nets 41 | */ 42 | net t_riscv_i32_coproc_controls coproc_controls; 43 | comb t_riscv_i32_coproc_controls coproc_controls_with_feedback; 44 | net t_riscv_i32_coproc_response coproc_response; 45 | net t_riscv_config riscv_config; 46 | 47 | /*b Instantiate RISC-V 48 | */ 49 | riscv_instance: { 50 | se_test_harness th( clk <- clk, 51 | coproc_controls => coproc_controls, 52 | coproc_response <= coproc_response, 53 | riscv_config => riscv_config ); 54 | 55 | coproc_controls_with_feedback = coproc_controls; 56 | coproc_controls_with_feedback.alu_cannot_start |= coproc_response.cannot_start; 57 | coproc_controls_with_feedback.alu_cannot_complete |= coproc_response.cannot_complete; 58 | coproc_controls_with_feedback.dec_to_alu_blocked |= coproc_response.cannot_start; 59 | coproc_controls_with_feedback.dec_to_alu_blocked |= coproc_response.cannot_complete; 60 | riscv_i32_muldiv dut( clk <- clk, 61 | reset_n <= reset_n, 62 | coproc_controls <= coproc_controls_with_feedback, 63 | coproc_response => coproc_response, 64 | riscv_config <= riscv_config ); 65 | } 66 | } 67 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/tb_src/tb_riscv_i32c_minimal.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2020, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file tb_riscv_i32c_minimal.cdl 15 | * @brief Testbench for minimal RISC-V 16 | * 17 | */ 18 | 19 | 20 | include "tb_riscv_i32_minimal_generic.cdl" 21 | -------------------------------------------------------------------------------- /cdl/cpu/riscv/tb_src/tb_riscv_i32c_minimal3.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2020, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file tb_riscv_i32c_minimal3.cdl 15 | * @brief Testbench for minimal RISC-V 16 | * 17 | */ 18 | 19 | 20 | include "tb_riscv_i32_minimal_generic.cdl" 21 | -------------------------------------------------------------------------------- /cdl/crypt/kasumi/tb_src/tb_kasumi_cipher.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file tb_kasumi_cipher.cdl 15 | * @brief Testbench for Kasumi cipher modules 16 | * 17 | */ 18 | 19 | /*a Includes 20 | */ 21 | include "crypt/kasumi_types.h" 22 | include "crypt/kasumi_modules.h" 23 | 24 | /*a External modules */ 25 | extern module se_test_harness( clock clk, output t_kasumi_input kasumi_input, input bit kasumi_input_ack, input t_kasumi_output kasumi_output, output bit kasumi_output_ack ) 26 | { 27 | timing from rising clock clk kasumi_input, kasumi_output_ack; 28 | timing to rising clock clk kasumi_output, kasumi_input_ack; 29 | } 30 | 31 | /*a Module 32 | */ 33 | module tb_kasumi_cipher( clock clk, 34 | input bit reset_n 35 | ) 36 | { 37 | 38 | /*b Nets 39 | */ 40 | net t_kasumi_input kasumi_input; 41 | net bit kasumi_input_ack; 42 | net t_kasumi_output kasumi_output; 43 | net bit kasumi_output_ack; 44 | 45 | /*b Instantiate RISC-V 46 | */ 47 | riscv_instance: { 48 | se_test_harness th( clk <- clk, 49 | kasumi_input => kasumi_input, 50 | kasumi_output_ack => kasumi_output_ack, 51 | 52 | kasumi_input_ack <= kasumi_input_ack, 53 | kasumi_output <= kasumi_output ); 54 | 55 | kasumi_cipher dut( clk <- clk, 56 | reset_n <= reset_n, 57 | kasumi_input_ack => kasumi_input_ack, 58 | kasumi_output => kasumi_output, 59 | kasumi_input <= kasumi_input, 60 | kasumi_output_ack <= kasumi_output_ack ); 61 | 62 | } 63 | } 64 | -------------------------------------------------------------------------------- /cdl/inc/apb/apb_utilities.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file apb_utilities.h 16 | * @brief Modules of various APB utilities 17 | * 18 | */ 19 | 20 | /*a Includes */ 21 | include "types/apb.h" 22 | 23 | /*a Modules - see also csr_target_apb, csr_master_apb in csr_interface.h */ 24 | /*m apb_logging 25 | * 26 | */ 27 | extern 28 | module apb_logging( clock clk "System clock", 29 | input bit reset_n "Active low reset", 30 | 31 | input t_apb_request apb_request "APB request", 32 | input t_apb_response apb_response "APB response" 33 | ) 34 | { 35 | timing to rising clock clk apb_request; 36 | timing to rising clock clk apb_response; 37 | } 38 | -------------------------------------------------------------------------------- /cdl/inc/axi/axi4s_modules.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2018, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file axi4s_modules.h 16 | * @brief AXI4s modules header file for CDL modules 17 | * 18 | * Header file for the types and CDL modules for AXI4S modules 19 | * 20 | */ 21 | 22 | /*a Includes */ 23 | include "types/axi.h" 24 | 25 | /*m axi4s32_fifo_4 */ 26 | extern 27 | module axi4s32_fifo_4( clock clk "Clock for the FIFO", 28 | input bit reset_n "Asynchronous reset", 29 | input t_axi4s32 req_in "AXI4S input side master data", 30 | output bit ack_in "AXI4S input side slave 'tready' signal", 31 | output t_axi4s32 req_out "AXI4S output side master data", 32 | input bit ack_out "AXI4S output side slave 'tready' signal" 33 | ) 34 | { 35 | timing to rising clock clk req_in; 36 | timing from rising clock clk ack_in; 37 | 38 | timing from rising clock clk req_out; 39 | timing to rising clock clk ack_out; 40 | } 41 | 42 | -------------------------------------------------------------------------------- /cdl/inc/axi/axi_masters.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2018, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file axi.h 16 | * @brief Types for the AXI bus 17 | * 18 | * Header file for the types for an AXI bus, but no modules 19 | * 20 | */ 21 | 22 | /*a Includes */ 23 | include "types/axi.h" 24 | 25 | /*a Modules - see also apb_master_axi in apb.h*/ 26 | /*m axi_master */ 27 | extern 28 | module axi_master(clock aclk, 29 | input bit areset_n, 30 | output t_axi_request ar, 31 | input bit awready, 32 | output t_axi_request aw, 33 | input bit arready, 34 | input bit wready, 35 | output t_axi_write_data w, 36 | output bit bready, 37 | input t_axi_write_response b, 38 | output bit rready, 39 | input t_axi_read_response r 40 | ) 41 | { 42 | timing from rising clock aclk ar, aw, w, bready, rready; 43 | timing to rising clock aclk awready, arready, wready, b, r; 44 | } 45 | -------------------------------------------------------------------------------- /cdl/inc/boards/de1.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file de2.h 16 | * @brief Header file for Altera DE2 board 17 | * 18 | * Header file for the types and CDL modules 19 | * 20 | */ 21 | 22 | /*a Types */ 23 | /*t t_de1_inputs */ 24 | typedef struct { 25 | bit irda_rxd; 26 | bit[4] keys; 27 | bit[10] switches; 28 | } t_de1_inputs; 29 | 30 | /*t t_de1_audio */ 31 | typedef struct { 32 | bit data; 33 | bit lrc; 34 | } t_de1_audio; 35 | 36 | /*t t_de1_leds */ 37 | typedef struct { 38 | bit[10] leds; 39 | bit[7] h0; 40 | bit[7] h1; 41 | bit[7] h2; 42 | bit[7] h3; 43 | bit[7] h4; 44 | bit[7] h5; 45 | } t_de1_leds; 46 | 47 | -------------------------------------------------------------------------------- /cdl/inc/boards/de1/de1_hps.h: -------------------------------------------------------------------------------- 1 | include "types/axi.h" 2 | include "types/ps2.h" 3 | include "types/video.h" 4 | include "boards/de1.h" 5 | extern 6 | module de1_hps_generic( clock clk, 7 | input bit reset_n, 8 | 9 | clock lw_axi_clock_clk, 10 | input t_axi_request lw_axi_ar, 11 | output bit lw_axi_arready, 12 | input t_axi_request lw_axi_aw, 13 | output bit lw_axi_awready, 14 | output bit lw_axi_wready, 15 | input t_axi_write_data lw_axi_w, 16 | input bit lw_axi_bready, 17 | output t_axi_write_response lw_axi_b, 18 | input bit lw_axi_rready, 19 | output t_axi_read_response lw_axi_r, 20 | 21 | clock de1_audio_bclk, 22 | input t_de1_audio de1_audio_adc, 23 | output t_de1_audio de1_audio_dac, 24 | 25 | input t_de1_inputs de1_inputs, 26 | output t_de1_leds de1_leds, 27 | 28 | input t_ps2_pins de1_ps2_in, 29 | output t_ps2_pins de1_ps2_out, 30 | input t_ps2_pins de1_ps2b_in, 31 | output t_ps2_pins de1_ps2b_out, 32 | 33 | clock de1_vga_clock, 34 | input bit de1_vga_reset_n, 35 | output t_adv7123 de1_vga 36 | ) 37 | { 38 | timing to rising clock lw_axi_clock_clk lw_axi_ar, lw_axi_aw, lw_axi_w, lw_axi_bready, lw_axi_rready; 39 | timing from rising clock lw_axi_clock_clk lw_axi_awready, lw_axi_arready, lw_axi_wready, lw_axi_b, lw_axi_r; 40 | 41 | timing to rising clock de1_audio_bclk de1_audio_adc; 42 | timing from rising clock de1_audio_bclk de1_audio_dac; 43 | 44 | timing from rising clock de1_vga_clock de1_vga; 45 | } 46 | -------------------------------------------------------------------------------- /cdl/inc/boards/de1_cl/de1_cl_apb.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file apb_peripherals.h 16 | * @brief Modules of various simple APB peripherals 17 | * 18 | * Header file for the modules for some very simple APB peripherals 19 | * 20 | */ 21 | 22 | /*a Includes */ 23 | include "types/apb.h" 24 | include "boards/de1_cl/de1_cl_types.h" 25 | 26 | /*a Modules - see also csr_target_apb, csr_master_apb in csr_interface.h */ 27 | /*m apb_target_de1_cl_inputs */ 28 | extern 29 | module apb_target_de1_cl_inputs( clock clk "System clock", 30 | input bit reset_n "Active low reset", 31 | 32 | input t_apb_request apb_request "APB request", 33 | output t_apb_response apb_response "APB response", 34 | 35 | input t_de1_cl_user_inputs user_inputs 36 | ) 37 | { 38 | timing to rising clock clk apb_request; 39 | timing from rising clock clk apb_response; 40 | 41 | timing to rising clock clk user_inputs; 42 | 43 | } 44 | 45 | /*a Editor preferences and notes 46 | mode: c *** 47 | c-basic-offset: 4 *** 48 | c-default-style: (quote ((c-mode . "k&r") (c++-mode . "k&r"))) *** 49 | outline-regexp: "/\\\*a\\\|[\t ]*\/\\\*[b-z][\t ]" *** 50 | */ 51 | 52 | 53 | -------------------------------------------------------------------------------- /cdl/inc/boards/de1_cl/de1_cl_hps.h: -------------------------------------------------------------------------------- 1 | include "types/axi.h" 2 | include "boards/de1_cl/de1_cl_types.h" 3 | extern 4 | module de1_cl_hps_generic( clock clk, 5 | input bit reset_n, 6 | 7 | clock lw_axi_clock_clk, 8 | input t_axi_request lw_axi_ar, 9 | output bit lw_axi_arready, 10 | input t_axi_request lw_axi_aw, 11 | output bit lw_axi_awready, 12 | output bit lw_axi_wready, 13 | input t_axi_write_data lw_axi_w, 14 | input bit lw_axi_bready, 15 | output t_axi_write_response lw_axi_b, 16 | input bit lw_axi_rready, 17 | output t_axi_read_response lw_axi_r, 18 | 19 | input t_de1_cl_inputs_status de1_cl_inputs_status, 20 | output t_de1_cl_inputs_control de1_cl_inputs_control, 21 | 22 | output bit de1_cl_led_data_pin, 23 | 24 | clock de1_cl_lcd_clock, 25 | input bit de1_cl_lcd_reset_n, 26 | output t_de1_cl_lcd de1_cl_lcd, 27 | output t_de1_leds de1_leds, 28 | 29 | input t_ps2_pins de1_ps2_in, 30 | output t_ps2_pins de1_ps2_out, 31 | input t_ps2_pins de1_ps2b_in, 32 | output t_ps2_pins de1_ps2b_out, 33 | 34 | clock de1_vga_clock, 35 | input bit de1_vga_reset_n, 36 | output t_adv7123 de1_vga, 37 | input bit[4] de1_keys, 38 | input bit[10] de1_switches, 39 | input bit de1_irda_rxd, 40 | output bit de1_irda_txd 41 | ) 42 | { 43 | timing to rising clock lw_axi_clock_clk lw_axi_ar, lw_axi_aw, lw_axi_w, lw_axi_bready, lw_axi_rready; 44 | timing from rising clock lw_axi_clock_clk lw_axi_awready, lw_axi_arready, lw_axi_wready, lw_axi_b, lw_axi_r; 45 | } 46 | -------------------------------------------------------------------------------- /cdl/inc/boards/vcu108.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file vcu108.h 16 | * @brief Header file for Xilinx VCU108 board 17 | * 18 | * Header file for the types and CDL modules 19 | * 20 | */ 21 | 22 | /*a Includes */ 23 | include "types/i2c.h" 24 | include "types/mdio.h" 25 | include "types/uart.h" 26 | 27 | /*a Types */ 28 | /*t t_vcu108_inputs - low speed inputs */ 29 | typedef struct { 30 | bit[4] switches; 31 | bit[5] buttons; // N S W E C 32 | t_uart_rx_data uart_rx; 33 | bit mdio; // L3, M1 34 | bit eth_int_n; // L1 35 | t_i2c i2c; 36 | } t_vcu108_inputs; 37 | 38 | /*t t_vcu108_outputs - low speed outputs */ 39 | typedef struct { 40 | bit[8] leds; 41 | t_uart_tx_data uart_tx; 42 | t_mdio_out mdio; // L3, M1 43 | bit eth_reset_n; // K3 44 | bit i2c_reset_mux_n; 45 | t_i2c i2c; 46 | } t_vcu108_outputs; 47 | 48 | /*t t_vcu108_bpi_flash - the actual I/O for record */ 49 | typedef struct { 50 | bit[16] d; 51 | bit[26] a; 52 | bit fwe_b; 53 | bit oe_b; 54 | bit adv; 55 | } t_vcu_bpi_flash; 56 | -------------------------------------------------------------------------------- /cdl/inc/boards/vcu108/vcu108_generic.h: -------------------------------------------------------------------------------- 1 | include "types/ethernet.h" 2 | include "types/dprintf.h" 3 | include "types/video.h" 4 | include "types/memories.h" 5 | include "boards/vcu108.h" 6 | extern 7 | module vcu108_generic( clock clk, 8 | clock clk_50, 9 | input bit reset_n, 10 | 11 | input t_dprintf_req_4 vcu108_dprintf_req, 12 | input t_vcu108_inputs vcu108_inputs, 13 | output t_vcu108_outputs vcu108_outputs, 14 | 15 | clock video_clk, 16 | input bit video_reset_n, 17 | output t_adv7511 vcu108_video, 18 | 19 | clock sgmii_tx_clk "Four-bit transmit serializing data clock (312.5MHz)", 20 | input bit sgmii_tx_reset_n "Reset deasserting sync to sgmii_tx_clk", 21 | output bit[4] sgmii_txd "First bit for wire in txd[0]", 22 | 23 | clock sgmii_rx_clk "Four-bit receive serializing data clock (312.5MHz)", 24 | input bit sgmii_rx_reset_n "Reset deasserting sync to sgmii_rx_clk", 25 | input bit[4] sgmii_rxd "Oldest bit in rxd[0]", 26 | output t_sgmii_transceiver_control sgmii_transceiver_control "Control of transceiver, on sgmii_rx_clk", 27 | input t_sgmii_transceiver_status sgmii_transceiver_status "Status from transceiver, on sgmii_rx_clk", 28 | 29 | clock flash_clk, 30 | input t_mem_flash_in flash_in, 31 | output t_mem_flash_out flash_out 32 | 33 | ) 34 | { 35 | timing to rising clock clk vcu108_inputs, vcu108_dprintf_req; 36 | timing from rising clock clk vcu108_outputs; 37 | 38 | timing to rising clock clk_50 vcu108_inputs; // keep clk_50! 39 | timing from rising clock clk_50 vcu108_outputs; // keep clk_50! 40 | 41 | timing from rising clock video_clk vcu108_video; 42 | 43 | timing to rising clock sgmii_tx_clk sgmii_tx_reset_n; 44 | timing from rising clock sgmii_tx_clk sgmii_txd; 45 | timing to rising clock sgmii_rx_clk sgmii_rx_reset_n, sgmii_rxd; 46 | timing from rising clock sgmii_rx_clk sgmii_transceiver_control; 47 | timing to rising clock sgmii_rx_clk sgmii_transceiver_status; 48 | 49 | timing to rising clock flash_clk flash_in; 50 | timing from rising clock flash_clk flash_out; 51 | } 52 | -------------------------------------------------------------------------------- /cdl/inc/clocking/clocking_modules.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file clocking_modules.h 16 | * @brief Modules for various clocking things 17 | * 18 | * Header file for the clocking modules 19 | * 20 | */ 21 | 22 | /*a Includes */ 23 | include "types/clocking.h" 24 | 25 | /*a Modules - see also csr_target_apb, csr_master_apb in csr_interface.h */ 26 | extern module clocking_phase_measure( clock clk, 27 | input bit reset_n, 28 | output t_bit_delay_config delay_config, 29 | input t_bit_delay_response delay_response, 30 | input t_phase_measure_request measure_request, 31 | output t_phase_measure_response measure_response 32 | ) 33 | { 34 | timing from rising clock clk delay_config, measure_response; 35 | timing to rising clock clk delay_response, measure_request; 36 | } 37 | 38 | extern module clocking_eye_tracking( clock clk, 39 | clock data_clk "Clock generating data_p_in and data_n_in (tracking data)", 40 | input bit reset_n, 41 | 42 | input bit[4] data_p_in, 43 | input bit[4] data_n_in, 44 | output t_bit_delay_config delay_config, 45 | input t_bit_delay_response delay_response, 46 | input t_eye_track_request eye_track_request, 47 | output t_eye_track_response eye_track_response 48 | ) 49 | { 50 | timing to rising clock data_clk data_p_in, data_n_in; 51 | timing from rising clock clk delay_config, eye_track_response; 52 | timing to rising clock clk delay_response, eye_track_request; 53 | } 54 | -------------------------------------------------------------------------------- /cdl/inc/cpu/riscv/chk_riscv.h: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file chk_riscv.h 15 | * @brief Header file for RISC-V checkers 16 | * 17 | */ 18 | 19 | /*a Includes */ 20 | include "cpu/riscv/riscv.h" 21 | 22 | /*a Risc-V instruction checkers */ 23 | /*m chk_riscv_ifetch */ 24 | extern module chk_riscv_ifetch( clock clk, 25 | input t_riscv_fetch_req fetch_req, 26 | input t_riscv_fetch_resp fetch_resp, 27 | output bit error_detected, 28 | output bit[32] cycle ) 29 | { 30 | timing to rising clock clk fetch_req, fetch_resp; 31 | timing from rising clock clk error_detected, cycle; 32 | } 33 | 34 | /*m chk_riscv_trace */ 35 | extern module chk_riscv_trace( clock clk, 36 | input t_riscv_i32_trace trace, 37 | output bit error_detected, 38 | output bit[32] cycle ) 39 | { 40 | timing to rising clock clk trace; 41 | timing from rising clock clk error_detected, cycle; 42 | } 43 | 44 | -------------------------------------------------------------------------------- /cdl/inc/cpu/riscv/riscv_config.h: -------------------------------------------------------------------------------- 1 | /*a Configuration constants 2 | */ 3 | constant integer rv_cfg_i32c_force_disable=0; 4 | constant integer rv_cfg_e32_force_enable=0; 5 | constant integer rv_cfg_i32m_force_disable=0; 6 | constant integer rv_cfg_i32_bitmap_enhanced_shift_enable=1; 7 | constant integer rv_cfg_i32_bitmap_others_enable=1; 8 | constant integer rv_cfg_i32_custom0_enable=1; 9 | constant integer rv_cfg_i32_custom0_as_load=1; 10 | constant integer rv_cfg_i32_custom0_as_store=0; 11 | constant integer rv_cfg_i32_custom1_enable=1; 12 | constant integer rv_cfg_i32_custom1_as_load=1; 13 | constant integer rv_cfg_i32_custom1_as_store=0; 14 | constant integer rv_cfg_i32_custom2_enable=0; 15 | constant integer rv_cfg_i32_custom2_as_load=1; 16 | constant integer rv_cfg_i32_custom2_as_store=0; 17 | constant integer rv_cfg_i32_custom3_enable=0; 18 | constant integer rv_cfg_i32_custom3_as_load=1; 19 | constant integer rv_cfg_i32_custom3_as_store=0; 20 | constant integer rv_cfg_memory_abort_disable=0; 21 | constant integer rv_cfg_memory_late_abort_enable=1; 22 | constant integer rv_cfg_coproc_force_disable=0; 23 | constant integer rv_cfg_debug_force_disable=0; 24 | constant integer rv_cfg_supervisor_mode_enable=0; 25 | constant integer rv_cfg_user_mode_enable=1; 26 | constant integer rv_cfg_user_irq_mode_enable=0; 27 | 28 | /*a CSR constants */ 29 | constant integer mimpid = 0; 30 | constant integer misa = 0; 31 | constant integer mvendorid = 0; 32 | constant integer marchid = 0; 33 | constant integer mhartid = 0; 34 | 35 | /*a Types 36 | */ 37 | typedef struct { 38 | bit[32] mhartid "ORred with constant"; 39 | bit[32] misa "ORred with constant"; 40 | bit[32] mvendorid "ORred with constant"; 41 | bit[32] marchid "ORred with constant"; 42 | bit[32] mimpid "ORred with constant"; 43 | } t_riscv_csr_access_custom; 44 | -------------------------------------------------------------------------------- /cdl/inc/crypt/kasumi_modules.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file kasumi_modules.h 16 | * @brief Header files for Kasumi modules 17 | * 18 | */ 19 | 20 | /*a Module */ 21 | /*m kasumi_cipher_3 */ 22 | extern module kasumi_cipher_3( clock clk, 23 | input bit reset_n, 24 | input t_kasumi_input kasumi_input, 25 | output bit kasumi_input_ack, 26 | output t_kasumi_output kasumi_output, 27 | input bit kasumi_output_ack 28 | ) 29 | { 30 | timing to rising clock clk kasumi_input, kasumi_output_ack; 31 | timing from rising clock clk kasumi_output, kasumi_input_ack; 32 | } 33 | 34 | /*m Generic kasumi_cipher */ 35 | extern module kasumi_cipher( clock clk, 36 | input bit reset_n, 37 | input t_kasumi_input kasumi_input, 38 | output bit kasumi_input_ack, 39 | output t_kasumi_output kasumi_output, 40 | input bit kasumi_output_ack 41 | ) 42 | { 43 | timing to rising clock clk kasumi_input, kasumi_output_ack; 44 | timing from rising clock clk kasumi_output, kasumi_input_ack; 45 | } 46 | 47 | -------------------------------------------------------------------------------- /cdl/inc/crypt/kasumi_submodules.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file kasumi_fi.cdl 16 | * @brief FI function for Kasumi 17 | * 18 | */ 19 | 20 | /*a Module */ 21 | /*m kasumi_fi */ 22 | extern module kasumi_fi( input bit[16] data_in, 23 | input bit[16] key_in, 24 | output bit[16] data_out 25 | ) 26 | { 27 | timing comb input data_in, key_in; 28 | timing comb output data_out; 29 | } 30 | 31 | /*m kasumi_sbox7 */ 32 | extern module kasumi_sbox7( input bit[7] sbox_in, 33 | output bit[7] sbox_out 34 | ) 35 | { 36 | timing comb input sbox_in; 37 | timing comb output sbox_out; 38 | } 39 | 40 | /*m kasumi_sbox9 */ 41 | extern module kasumi_sbox9( input bit[9] sbox_in, 42 | output bit[9] sbox_out 43 | ) 44 | { 45 | timing comb input sbox_in; 46 | timing comb output sbox_out; 47 | } 48 | 49 | /*m kasumi_fo_cycles_3 */ 50 | extern module kasumi_fo_cycles_3( clock clk, 51 | input bit reset_n, 52 | input bit start, 53 | input bit[32] data_in, 54 | input bit[32] keys_ki_ko_1, 55 | input bit[32] keys_ki_ko_2, 56 | input bit[32] keys_ki_ko_3, 57 | output bit data_valid, 58 | output bit[32] data_out 59 | ) 60 | { 61 | timing to rising clock clk start, data_in, keys_ki_ko_1, keys_ki_ko_2, keys_ki_ko_3; 62 | timing from rising clock clk data_out, data_valid; 63 | 64 | timing comb input data_in, keys_ki_ko_1, keys_ki_ko_2, keys_ki_ko_3; 65 | timing comb output data_out; 66 | } 67 | 68 | -------------------------------------------------------------------------------- /cdl/inc/csr/csr_masters.h: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file csr_interface.h 15 | * @brief Types and modules for the CSR interface 16 | * 17 | * Header file for the types and modules in the pipelined CSR 18 | * interface, including APB target to CSR master, CSR target to APB 19 | * master, and CSR target to simple CSR access. 20 | * 21 | */ 22 | 23 | /*a Includes */ 24 | include "types/apb.h" 25 | include "types/csr.h" 26 | 27 | /*a Modules */ 28 | /*m csr_master_apb 29 | * 30 | * APB target that drive a CSR master 31 | * 32 | */ 33 | extern 34 | module csr_master_apb( clock clk "Clock for the CSR interface; a superset of all targets clock", 35 | input bit reset_n "Active low reset", 36 | input t_apb_request apb_request "APB request from master", 37 | output t_apb_response apb_response "APB response to master", 38 | input t_csr_response csr_response "Pipelined csr request interface response", 39 | output t_csr_request csr_request "Pipelined csr request interface output" 40 | ) 41 | { 42 | timing to rising clock clk csr_response; 43 | timing from rising clock clk csr_request; 44 | 45 | timing to rising clock clk apb_request; 46 | timing from rising clock clk apb_response; 47 | } 48 | 49 | -------------------------------------------------------------------------------- /cdl/inc/input/hysteresis.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file utils.h 16 | * @brief Header file for utilities 17 | * 18 | * Header file for the types and CDL modules for generic utilities 19 | * 20 | */ 21 | 22 | /*a Types */ 23 | 24 | /*a Modules */ 25 | /*m hysteresis_switch */ 26 | extern 27 | module hysteresis_switch( clock clk, 28 | input bit reset_n, 29 | input bit clk_enable "Assert to enable the internal clock; this permits I/O switches to easily use a slower clock", 30 | input bit input_value, 31 | output bit output_value, 32 | input bit[16] filter_period "Period over which to filter the input - the larger the value, the longer it takes to switch, but the more glitches are removed", 33 | input bit[16] filter_level "Value to exceed to switch output levels - the larger the value, the larger the hysteresis; must be less than filter_period" 34 | ) 35 | { 36 | timing to rising clock clk clk_enable; 37 | timing to rising clock clk input_value, filter_period, filter_level; 38 | timing from rising clock clk output_value; 39 | } 40 | 41 | -------------------------------------------------------------------------------- /cdl/inc/input/ps2_modules.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file input_devices.h 16 | * @brief Input device header file for CDL modules 17 | * 18 | * Header file for the types and CDL modules for input devices 19 | * 20 | */ 21 | 22 | /*a Includes */ 23 | include "types/ps2.h" 24 | 25 | /*a Modules */ 26 | /*m ps2_host */ 27 | extern module ps2_host( clock clk "Clock", 28 | input bit reset_n, 29 | input t_ps2_pins ps2_in "Pin values from the outside", 30 | output t_ps2_pins ps2_out "Pin values to drive - 1 means float high, 0 means pull low", 31 | 32 | output t_ps2_rx_data ps2_rx_data, 33 | input bit[16] divider 34 | ) 35 | { 36 | timing to rising clock clk ps2_in, divider; 37 | timing from rising clock clk ps2_out, ps2_rx_data; 38 | } 39 | 40 | /*m ps2_host_keyboard */ 41 | extern module ps2_host_keyboard( clock clk "Clock", 42 | input bit reset_n, 43 | input t_ps2_rx_data ps2_rx_data, 44 | output t_ps2_key_state ps2_key 45 | ) 46 | { 47 | timing to rising clock clk ps2_rx_data; 48 | timing from rising clock clk ps2_key; 49 | } 50 | 51 | -------------------------------------------------------------------------------- /cdl/inc/input/uart_modules.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file input_devices.h 16 | * @brief Input device header file for CDL modules 17 | * 18 | * Header file for the types and CDL modules for input devices 19 | * 20 | */ 21 | 22 | /*a Includes */ 23 | include "types/uart.h" 24 | 25 | /*a Modules */ 26 | /*m uart_minimal */ 27 | extern module uart_minimal( clock clk, 28 | input bit reset_n, 29 | 30 | input t_uart_control uart_control, 31 | output t_uart_output uart_output, 32 | 33 | input t_uart_rx_data uart_rx, 34 | output t_uart_tx_data uart_tx 35 | ) 36 | { 37 | timing to rising clock clk uart_control, uart_rx; 38 | timing from rising clock clk uart_output, uart_tx; 39 | } 40 | 41 | -------------------------------------------------------------------------------- /cdl/inc/led/led_modules.h: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file leds.h 15 | * @brief Constants, types and modules for various LED drivers 16 | * 17 | * Header file for the types and modules controlling LEDs, including 18 | * Neopixel chains. 19 | * 20 | */ 21 | 22 | /*a Includes */ 23 | include "types/led.h" 24 | 25 | /*a Modules */ 26 | /*m led_seven_segment*/ 27 | extern module led_seven_segment( input bit[4] hex "Hexadecimal to display on 7-segment LED", 28 | output bit[7] leds "1 for LED on, 0 for LED off, for segments a-g in bits 0-7" 29 | ) 30 | { 31 | timing comb input hex; 32 | timing comb output leds; 33 | } 34 | 35 | /*m led_ws2812_chain*/ 36 | extern module led_ws2812_chain( clock clk "system clock - not the pin clock", 37 | input bit reset_n "async reset", 38 | input bit[8] divider_400ns "clock divider value to provide for generating a pulse every 400ns based on clk", 39 | output t_led_ws2812_request led_request "LED data request", 40 | input t_led_ws2812_data led_data "LED data, for the requested led", 41 | output bit led_chain "Data in pin for LED chain" 42 | ) 43 | { 44 | timing to rising clock clk divider_400ns, led_data; 45 | timing from rising clock clk led_request, led_chain; 46 | } 47 | -------------------------------------------------------------------------------- /cdl/inc/networking/encoders.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file encoders.h 16 | * @brief Modules for various encoders (generally for networking) 17 | * 18 | * Header file for encoder modules 19 | * 20 | */ 21 | 22 | /*a Includes */ 23 | include "types/encoding.h" 24 | 25 | /*a Modules */ 26 | /*m encode_8b10b */ 27 | extern module encode_8b10b( input t_8b10b_enc_data enc_data, 28 | output t_8b10b_symbol symbol 29 | ) 30 | { 31 | timing comb input enc_data; 32 | timing comb output symbol; 33 | } 34 | 35 | /*m decode_8b10b */ 36 | extern module decode_8b10b( input t_8b10b_symbol symbol, 37 | output t_8b10b_dec_data dec_data 38 | ) 39 | { 40 | timing comb input symbol; 41 | timing comb output dec_data; 42 | } 43 | 44 | -------------------------------------------------------------------------------- /cdl/inc/picoriscv.h: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file picoriscv.h 15 | * @brief Module that makes up a Pico-RISC-V microcomputer 16 | * 17 | */ 18 | 19 | /*a Includes 20 | */ 21 | include "types/video.h" 22 | include "types/csr.h" 23 | include "picoriscv_types.h" 24 | 25 | /*a Modules 26 | */ 27 | /*m picoriscv_clocking 28 | */ 29 | extern 30 | module picoriscv( clock clk "Clock, divided down for CPU", 31 | input bit reset_n "Active low reset", 32 | clock video_clk "Video clock, independent of CPU clock", 33 | input bit video_reset_n "Active low reset", 34 | output t_video_bus video_bus, 35 | input t_prv_keyboard keyboard, 36 | input t_csr_request csr_request, 37 | output t_csr_response csr_response 38 | 39 | //, 40 | //output t_bbc_floppy_op floppy_op, 41 | //input t_bbc_floppy_response floppy_response, 42 | //input t_bbc_micro_sram_request host_sram_request, 43 | //output t_bbc_micro_sram_response host_sram_response 44 | ) 45 | { 46 | timing to rising clock clk keyboard, csr_request; 47 | timing from rising clock clk csr_response; 48 | timing from rising clock video_clk video_bus; 49 | } 50 | -------------------------------------------------------------------------------- /cdl/inc/picoriscv_submodules.h: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file picoriscv_submodules.h 15 | * @brief Modules that make up a Pico-RISC-V microcomputer 16 | * 17 | */ 18 | 19 | /*a Includes 20 | */ 21 | include "picoriscv_types.h" 22 | 23 | /*a Modules 24 | */ 25 | /*m picoriscv_clocking 26 | */ 27 | extern 28 | module picoriscv_clocking( clock clk, 29 | input bit reset_n, 30 | input t_prv_clock_status clock_status, 31 | output t_prv_mem_control mem_control, 32 | output t_prv_clock_control clock_control, 33 | input t_csr_request csr_request, 34 | output t_csr_response csr_response 35 | ) 36 | { 37 | timing to rising clock clk clock_status, csr_request; 38 | timing from rising clock clk clock_control, csr_response; 39 | timing comb input clock_status; 40 | timing comb output clock_control, mem_control; 41 | } 42 | -------------------------------------------------------------------------------- /cdl/inc/picoriscv_types.h: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file picoriscv_types.cdl 15 | * @brief Internal types and constants for Pico-RISC-V microcomputer 16 | * 17 | */ 18 | 19 | /*a Includes 20 | */ 21 | include "cpu/riscv/riscv.h" 22 | 23 | /*t t_prv_mem_control */ 24 | /** 25 | * This structure conveys memory management to the 26 | * Pico-RISC-V CDL implementation and various peripherals and other 27 | * logic 28 | */ 29 | typedef struct { 30 | bit dmem_request; 31 | bit ifetch_request; 32 | bit dmem_set_reg; 33 | bit ifetch_set_reg; 34 | bit ifetch_use_reg; 35 | bit io_enable; 36 | } t_prv_mem_control; 37 | 38 | /*t t_prv_clock_control */ 39 | /** 40 | * This structure conveys clock gating and reset information to the 41 | * Pico-RISC-V CDL implementation and various peripherals and other 42 | * logic 43 | */ 44 | typedef struct { 45 | bit riscv_clk_enable; 46 | bit[4] debug; 47 | } t_prv_clock_control; 48 | 49 | /*t t_prv_clock_status */ 50 | /** 51 | * This structure conveys information in to the clock control module 52 | * from the RISC-V. 53 | */ 54 | typedef struct { 55 | bit imem_request; 56 | bit io_request; 57 | bit io_ready; 58 | bit dmem_read_enable; 59 | bit dmem_write_enable; 60 | } t_prv_clock_status; 61 | 62 | /*t t_prv_csr_select 63 | */ 64 | typedef enum[16] { 65 | prv_csr_select_clocks=0, 66 | } t_prv_csr_select; 67 | 68 | /*t t_prv_keyboard 69 | */ 70 | typedef struct { 71 | bit[64] keys_low; 72 | } t_prv_keyboard; 73 | 74 | 75 | -------------------------------------------------------------------------------- /cdl/inc/technology/sync_modules.h: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file sync_modules.h 15 | * @brief Header files for technology dependent synchronization modules 16 | * 17 | */ 18 | /*a Includes */ 19 | 20 | /*a Modules */ 21 | /*m tech_sync_flop */ 22 | extern module tech_sync_flop( clock clk "Clock to synchronize to", 23 | input bit reset_n "Active low reset", 24 | input bit d "Data in", 25 | output bit q "Data out" ) 26 | { 27 | timing to rising clock clk d; 28 | timing from rising clock clk q; 29 | } 30 | 31 | /*m tech_sync_bit */ 32 | extern module tech_sync_bit( clock clk "Clock to synchronize to", 33 | input bit reset_n "Active low reset", 34 | input bit d "Data in", 35 | output bit q "Data out from at least a pair of sync flops" ) 36 | { 37 | timing to rising clock clk d; 38 | timing from rising clock clk q; 39 | } 40 | -------------------------------------------------------------------------------- /cdl/inc/types/analyzer.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2020, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file analyzer.h 16 | * @brief Types for the analyzer data/control buses 17 | * 18 | * Header file for the types for the analyzer data/control buses 19 | * 20 | */ 21 | 22 | /*a Types */ 23 | /*t t_analyzer_mst - Master interface towards target */ 24 | typedef struct { 25 | bit valid "If asserted, shift in the data to the control registers"; 26 | bit[4] data "Data for control - N bits shifted in from low to high, with data out of 0 until valid is deasserted"; 27 | bit enable "If high and selected then node is enabled - chained through bus joiners and targets; if seen as low, then do not drive data bus"; 28 | bit select "If high when enable is seen to go high at a node then that node is selected and enabled"; 29 | } t_analyzer_mst; 30 | 31 | /*t t_analyzer_data - Analyzer data */ 32 | typedef struct { 33 | bit valid "High if the data is valid from the target"; 34 | bit[64] data "Analyzer data"; 35 | } t_analyzer_data; 36 | 37 | /*t t_analyzer_tgt - Target interface back towards master */ 38 | typedef struct { 39 | bit enable_return "If high and selected then node is enabled - chained through bus joiners and targets; if seen as low, then do not drive data bus"; 40 | bit selected "Asserted if node is selected - for status only"; 41 | t_analyzer_data data "Data from node; all zeros if not selected"; 42 | } t_analyzer_tgt; 43 | 44 | /*t t_analyzer_ctl - Control information to a target */ 45 | typedef struct { 46 | bit enable; 47 | bit[32] mux_control "Shifted in from valid/data - cleared when a node becomes selected"; 48 | } t_analyzer_ctl; 49 | 50 | -------------------------------------------------------------------------------- /cdl/inc/types/apb.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file apb.h 16 | * @brief Types for the APB bus 17 | * 18 | * Header file for the types for an APB bus, but no modules 19 | * 20 | */ 21 | 22 | /*a Types */ 23 | /*t t_apb_request */ 24 | typedef struct { 25 | bit[32] paddr; 26 | bit penable; 27 | bit psel; 28 | bit pwrite; 29 | bit[32] pwdata; 30 | } t_apb_request; 31 | 32 | /*t t_apb_response */ 33 | typedef struct { 34 | bit[32] prdata; 35 | bit pready; 36 | bit perr; 37 | } t_apb_response; 38 | 39 | /*t t_apb_processor_response */ 40 | typedef struct { 41 | bit acknowledge; 42 | bit rom_busy; 43 | } t_apb_processor_response; 44 | 45 | /*t t_apb_processor_request */ 46 | typedef struct { 47 | bit valid; 48 | bit[16] address; 49 | } t_apb_processor_request; 50 | 51 | /*t t_apb_rom_request */ 52 | typedef struct { 53 | bit enable; 54 | bit[16] address; 55 | } t_apb_rom_request; 56 | 57 | -------------------------------------------------------------------------------- /cdl/inc/types/clock_divider.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file clock_divider.h 16 | * @brief Types for clock divider modules 17 | * 18 | * Header file for the types for clock dividers 19 | * 20 | */ 21 | 22 | /*a Types */ 23 | /*t t_clock_divider_control */ 24 | typedef struct { 25 | bit write_config "Asserted if clock divider configuration should be written"; 26 | bit[32] write_data "Data to be used if write_config is asserted"; 27 | bit start "Assert to start the clock divider - deassert if running"; 28 | bit stop "Assert to stop the clock divider - only used if running"; 29 | bit disable_fractional "Assert to disable fractional mode"; 30 | } t_clock_divider_control; 31 | 32 | /*t t_clock_divider_output */ 33 | typedef struct { 34 | bit[32] config_data "Current configuration, as last written (defaults to 0)"; 35 | bit running "Asserted if the clock divider has been started"; 36 | bit clock_enable "Output from the clock divider"; 37 | } t_clock_divider_output; 38 | 39 | -------------------------------------------------------------------------------- /cdl/inc/types/dprintf.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file input_devices.h 16 | * @brief Input device header file for CDL modules 17 | * 18 | * Header file for the types and CDL modules for input devices 19 | * 20 | */ 21 | 22 | /*a Types */ 23 | /*t t_dprintf_req_4 */ 24 | typedef struct { 25 | bit valid; 26 | bit[16] address; 27 | bit[64] data_0; 28 | bit[64] data_1; 29 | bit[64] data_2; 30 | bit[64] data_3; 31 | } t_dprintf_req_4; 32 | 33 | /*t t_dprintf_req_2 */ 34 | typedef struct { 35 | bit valid; 36 | bit[16] address; 37 | bit[64] data_0; 38 | bit[64] data_1; 39 | } t_dprintf_req_2; 40 | 41 | /*t t_dprintf_resp */ 42 | typedef struct { 43 | bit ack; 44 | } t_dprintf_resp; 45 | 46 | /*t t_dprintf_byte 47 | * 48 | * Validated byte with address; the output of the dprintf module 49 | */ 50 | typedef struct { 51 | bit valid; 52 | bit last; 53 | bit[8] data; 54 | bit[16] address; 55 | } t_dprintf_byte; 56 | 57 | -------------------------------------------------------------------------------- /cdl/inc/types/encoding.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2018, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file encoding.h 16 | * @brief Types for encodings of bits (generally for networking) 17 | * 18 | * Header file for the types for encodings of bits in symbols 19 | * 20 | */ 21 | 22 | /*a Types */ 23 | /*t t_8b10b_dec_data */ 24 | typedef struct { 25 | bit valid "Asserted if a valid 8B10B symbol"; 26 | bit[8] data "Data decoded from symbol"; 27 | bit is_control "Asserted if a control symbol"; 28 | bit is_data "Asserted if a data symbol"; 29 | bit disparity_positive "Asserted if disparoirty after the symbol is positive"; 30 | } t_8b10b_dec_data; 31 | 32 | /*t t_8b10b_symbol 33 | */ 34 | typedef struct { 35 | bit disparity_positive; 36 | bit[10] symbol; 37 | } t_8b10b_symbol; 38 | 39 | /*t t_8b10b_enc_data */ 40 | typedef struct { 41 | bit[8] data "Data to be encoded in symbol"; 42 | bit is_control "Asserted if a control symbol"; 43 | bit disparity "Asserted high if positive disparity in"; 44 | } t_8b10b_enc_data; 45 | 46 | -------------------------------------------------------------------------------- /cdl/inc/types/ethernet.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file ethernet.h 16 | * @brief Types for various ethernet standards 17 | * 18 | */ 19 | 20 | /*a Includes */ 21 | include "types/clocking.h" 22 | 23 | /*a Types */ 24 | /*t t_gmii_tx */ 25 | typedef struct { 26 | bit tx_en; 27 | bit tx_er; 28 | bit [8] txd; 29 | } t_gmii_tx; 30 | 31 | /*t t_gmii_rx */ 32 | typedef struct { 33 | bit rx_dv; 34 | bit rx_er; 35 | bit rx_crs "Generally unused for GbE"; 36 | bit [8] rxd; 37 | } t_gmii_rx; 38 | 39 | /*t t_gmii_op */ 40 | typedef enum[3] { 41 | gmii_op_idle, 42 | gmii_op_data, 43 | gmii_op_transmit_error, 44 | gmii_op_carrier_extend, 45 | gmii_op_carrier_extend_error, 46 | gmii_op_low_power_idle, 47 | gmii_op_unknown 48 | } t_gmii_op; 49 | 50 | /*t t_tbi_valid */ 51 | typedef struct { 52 | bit valid; 53 | bit[10] data; 54 | } t_tbi_valid; 55 | /*t t_sgmii_gasket_trace */ 56 | typedef struct { 57 | bit valid; 58 | bit[3] an_fsm "Autonegotiation FSM state"; 59 | bit[6] rx_config_data_match; 60 | bit[8] debug_count; 61 | bit[10] comma_found; 62 | bit[4] rx_fsm; 63 | bit seeking_comma; 64 | bit rx_sync; 65 | bit symbol_valid; 66 | bit symbol_is_control; 67 | bit symbol_is_K; 68 | bit symbol_is_S; 69 | bit symbol_is_V; 70 | bit symbol_is_T; 71 | bit symbol_is_R; 72 | bit[8] symbol_data; 73 | } t_sgmii_gasket_trace; 74 | 75 | /*t t_sgmii_gasket_status */ 76 | typedef struct { 77 | bit rx_sync; 78 | bit rx_sync_toggle; 79 | bit[32] rx_symbols_since_sync; 80 | bit[16] an_config "Autonegotiation configuration"; 81 | t_sgmii_gasket_trace trace; 82 | } t_sgmii_gasket_status; 83 | 84 | /*t t_sgmii_gasket_control */ 85 | typedef struct { 86 | bit write_config; 87 | bit[4] write_address; 88 | bit[32] write_data; 89 | } t_sgmii_gasket_control; 90 | 91 | /*t t_sgmii_transceiver_status */ 92 | typedef struct { 93 | t_phase_measure_response measure_response; 94 | t_eye_track_response eye_track_response; 95 | } t_sgmii_transceiver_status; 96 | 97 | /*t t_sgmii_transceiver_control */ 98 | typedef struct { 99 | bit valid; 100 | } t_sgmii_transceiver_control; 101 | -------------------------------------------------------------------------------- /cdl/inc/types/io.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file io.h 16 | * @brief Types for various IO 17 | * 18 | */ 19 | 20 | /*a Includes */ 21 | 22 | /*a Types */ 23 | typedef struct { 24 | bit p; 25 | bit n; 26 | } t_io_diff; 27 | -------------------------------------------------------------------------------- /cdl/inc/types/jtag.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2018, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file jtag.h 16 | * @brief Types for JTAG handling 17 | * 18 | */ 19 | 20 | /*a Types */ 21 | /*t t_jtag 22 | */ 23 | typedef struct { 24 | bit ntrst; 25 | bit tms; 26 | bit tdi; 27 | } t_jtag; 28 | 29 | /* t_jtag_action 30 | */ 31 | typedef enum [2] { 32 | action_idle, 33 | action_capture, 34 | action_shift, 35 | action_update 36 | } t_jtag_action; 37 | -------------------------------------------------------------------------------- /cdl/inc/types/mdio.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file MDIO.h 16 | * @brief MDIO signals 17 | * 18 | * Header file for the types for MDIO signals 19 | * 20 | */ 21 | 22 | /*a Types */ 23 | /*t t_mdio_out - return is just mdio pin */ 24 | typedef struct { 25 | bit mdc; // max of 2.5MHz (min 400ns period) 26 | bit mdio; 27 | bit mdio_enable "if asserted (high) drive mdio"; 28 | } t_mdio_out; 29 | -------------------------------------------------------------------------------- /cdl/inc/types/memories.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file memories.h 16 | * @brief Types for external memory devices 17 | * 18 | * Header file for the types for external memory devices 19 | * 20 | */ 21 | 22 | /*a Types */ 23 | /*t t_mem_flash_out */ 24 | typedef struct { 25 | bit[32] address; // not all bits may be used 26 | bit we_n; 27 | bit wp_n; 28 | bit adv_n; 29 | bit rst_n; 30 | bit oe_n; 31 | bit ce_n; 32 | bit wait; 33 | bit clk; // may not be used (if tied to a real clock!) 34 | bit[32] data; // not all bits may be used 35 | bit data_enable; // Not a pin, use in conjunction with data 36 | } t_mem_flash_out; 37 | 38 | /*t t_mem_flash_in */ 39 | typedef struct { 40 | bit[32] data; 41 | } t_mem_flash_in; 42 | 43 | /*t t_sdio_out */ 44 | typedef struct { 45 | bit cmd; 46 | bit clk; 47 | bit[4] data; 48 | bit data_enable; // Not a pin, use in conjunction with data 49 | } t_sdio_out; 50 | 51 | /*t t_sdio_in */ 52 | typedef struct { 53 | bit[4] data; 54 | bit cd "Card detect"; 55 | } t_sdio_in; 56 | 57 | 58 | -------------------------------------------------------------------------------- /cdl/inc/types/networking.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file networking.h 16 | * @brief Types for networking that cross protocol types 17 | * 18 | */ 19 | 20 | /*a Includes */ 21 | 22 | /*a Types */ 23 | /*t t_packet_stat_type */ 24 | typedef enum [3] { 25 | packet_stat_type_okay "Packet received okay", 26 | packet_stat_type_short "Packet too short to be received", 27 | packet_stat_type_long "Packet too long to be received", 28 | packet_stat_type_data_error "Data had error during packet", 29 | packet_stat_type_carrier "Carrier lost during packet / outside packet", 30 | packet_stat_type_underrun "Data not ready when required", 31 | } t_packet_stat_type; 32 | 33 | /*t t_packet_stat */ 34 | typedef struct { 35 | bit valid "Asserted if packet stat is valid; if deasserted, the rest of the fields should be ignored"; 36 | t_packet_stat_type stat_type "Type of stat - valid packet, packet too short, packet too long, errored packet, carrier lost, etc"; 37 | bit[16] byte_count "Size of a packet if the packet is not in error"; 38 | bit is_broadcast "Asserted if the packet had a broadcast address"; 39 | bit is_multicast "Asserted if the packet had a multicast address"; 40 | } t_packet_stat; 41 | -------------------------------------------------------------------------------- /cdl/inc/types/ps2.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file input_devices.h 16 | * @brief Input device header file for CDL modules 17 | * 18 | * Header file for the types and CDL modules for input devices 19 | * 20 | */ 21 | 22 | /*a Key codes 23 | The PS2 codes are: 24 | 25 | Extended: 26 | //Prt Scr E012E07C 27 | //Pause/Break E11477E1F014E077 28 | 29 | Alt (right) E011 30 | Ctrl E014 31 | Windows (right) E027 32 | Menus E02F 33 | KP/ E04A 34 | KPEnter E05A 35 | End E069 36 | Left Arrow E06B 37 | Home E06C 38 | Insert E070 39 | Delete E071 40 | Down Arrow E072 41 | Right Arrow E074 42 | Up Arrow E075 43 | Page Down E07A 44 | Page Up E07D 45 | Windows E01F 46 | 47 | 01 F9 48 | 03 F5 49 | 04 F3 50 | 05 F1 51 | 06 F2 52 | 07 F12 53 | 09 F10 54 | 0A F8 55 | 0B F6 56 | 0C F4 57 | 0D Tab 58 | 0E ` 59 | 11 Alt (left) 60 | 12 Shift 61 | 14 Ctrl 62 | 15 Q 63 | 16 1 64 | 1A Z 65 | 1B S 66 | 1C A 67 | 1D W 68 | 1E 2 69 | 21 C 70 | 22 X 71 | 23 D 72 | 24 E 73 | 25 4 74 | 26 3 75 | 29 Spacebar 76 | 2A V 77 | 2B F 78 | 2C T 79 | 2D R 80 | 2E 5 81 | 31 N 82 | 32 B 83 | 33 H 84 | 34 G 85 | 35 Y 86 | 36 6 87 | 3A M 88 | 3B J 89 | 3C U 90 | 3D 7 91 | 3E 8 92 | 41 , 93 | 42 K 94 | 43 I 95 | 44 O 96 | 45 0 97 | 46 9 98 | 49 . 99 | 4A / 100 | 4B L 101 | 4C ; 102 | 4D P 103 | 4E - 104 | 52 ' 105 | 54 [ 106 | 55 = 107 | 58 Caps Lock 108 | 59 RtShift 109 | 5A Enter 110 | 5B ] 111 | 5D \ 112 | 66 Backspace 113 | 69 KP1 114 | 6B KP4 115 | 6C KP7 116 | 70 KP0 117 | 71 KP. 118 | 72 KP2 119 | 73 KP5 120 | 74 KP6 121 | 75 KP8 122 | 76 ESC 123 | 77 Num Lock 124 | 78 F11 125 | 79 KP+ 126 | 7A KP3 127 | 7B KP- 128 | 7C KP* 129 | 7D KP9 130 | 7E Scroll Lock 131 | 83 F7 132 | 133 | */ 134 | 135 | /*a Types */ 136 | /*t t_ps2_pins */ 137 | typedef struct { 138 | bit data; 139 | bit clk; 140 | } t_ps2_pins; 141 | 142 | /*t t_ps2_rx_data */ 143 | typedef struct { 144 | bit valid; 145 | bit[8] data; 146 | bit parity_error; 147 | bit protocol_error; 148 | bit timeout; 149 | } t_ps2_rx_data; 150 | 151 | /*t t_ps2_key_state */ 152 | typedef struct { 153 | bit valid; 154 | bit extended; 155 | bit release; 156 | bit[8] key_number; 157 | } t_ps2_key_state; 158 | 159 | -------------------------------------------------------------------------------- /cdl/inc/types/sram.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file srams.h 16 | * @brief SRAM modules used by all the modules 17 | * 18 | */ 19 | 20 | /*a Types */ 21 | /*t t_sram_access_req 22 | */ 23 | typedef struct { 24 | bit valid; 25 | bit[8] id; 26 | bit read_not_write; 27 | bit[8] byte_enable; 28 | bit[32] address; 29 | bit[64] write_data; 30 | } t_sram_access_req; 31 | 32 | /*t t_sram_access_resp 33 | */ 34 | typedef struct { 35 | bit ack; 36 | bit valid; 37 | bit[8] id; 38 | bit[64] data; 39 | } t_sram_access_resp; 40 | 41 | -------------------------------------------------------------------------------- /cdl/inc/types/subsystem.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file subsystem.h 16 | * @brief CDL header file for subsystem types used in subsystem modules 17 | * 18 | * Header file for the types and CDL modules for subsystems 19 | * 20 | */ 21 | 22 | /*a Includes */ 23 | include "types/i2c.h" 24 | include "types/uart.h" 25 | 26 | /*a Types */ 27 | /*t t_subsys_inputs */ 28 | typedef struct { 29 | bit[8] switches; 30 | bit[8] buttons; 31 | t_uart_rx_data uart_rx; 32 | t_i2c i2c; 33 | bit[8] gpio_input; 34 | } t_subsys_inputs; 35 | 36 | /*t t_subsys_outputs */ 37 | typedef struct { 38 | bit reset_request; 39 | t_uart_tx_data uart_tx; 40 | t_i2c i2c; 41 | bit[8] gpio_output; 42 | bit[8] gpio_output_enable; 43 | } t_subsys_outputs; 44 | 45 | -------------------------------------------------------------------------------- /cdl/inc/types/uart.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file uart.h 16 | * @brief Header for types for UARTs 17 | * 18 | * Header file for the types and CDL modules for UARTs 19 | * 20 | */ 21 | 22 | /*a Types */ 23 | /*t t_uart_tx_data */ 24 | typedef struct { 25 | bit txd "Transmit data pin out"; 26 | bit cts "Assert low to enable rx data if other end uses handshaking"; 27 | } t_uart_tx_data; 28 | 29 | /*t t_uart_rx_data */ 30 | typedef struct { 31 | bit rxd "Receive data pin in"; 32 | bit rts "Asserted low if other end allows start of transmit"; 33 | } t_uart_rx_data; 34 | 35 | /*t t_uart_status */ 36 | typedef struct { 37 | bit tx_empty; 38 | bit rx_not_empty; 39 | bit rx_half_full; 40 | bit rx_parity_error; 41 | bit rx_framing_error; 42 | bit rx_overflow; 43 | } t_uart_status; 44 | 45 | /*t t_uart_control */ 46 | typedef struct { 47 | bit clear_errors "Asserted if overflow, framing error, parity error, etc are to be cleared"; 48 | bit rx_ack "Asserted if any valid rx data is being taken"; 49 | bit tx_valid "Asserted if the tx data is valid"; 50 | bit[8] tx_data "Data to transmit if tx_valid is asserted"; 51 | bit write_config "Assert to write configuration of UART (framing etc)"; 52 | bit write_brg "Assert to write configuration of UART brg"; 53 | bit[32] write_data "Data to use if write_config or write_brg is asserted"; 54 | } t_uart_control; 55 | 56 | /*t t_uart_output */ 57 | typedef struct { 58 | bit[32] config_data "Current configuration, as last written (defaults to 0)"; 59 | bit[32] brg_config_data "Current configuration of brg, as last written (defaults to 0)"; 60 | t_uart_status status "Status for, e.g. interrupts"; 61 | bit tx_ack "If asserted, a tx_valid byte will be taken"; 62 | bit rx_valid "Asserted if rx_data is valid"; 63 | bit[8] rx_data "Data received if rx_valid is asserted"; 64 | } t_uart_output; 65 | -------------------------------------------------------------------------------- /cdl/inc/utils/clock_divider_modules.h: -------------------------------------------------------------------------------- 1 | include "types/clock_divider.h" 2 | extern module clock_divider( clock clk "Clock for the module", 3 | input bit reset_n "Active low reset", 4 | input t_clock_divider_control divider_control "Controls for any clock divider", 5 | output t_clock_divider_output divider_output "Clock divider output state, all clocked" 6 | ) 7 | { 8 | timing to rising clock clk divider_control; 9 | timing from rising clock clk divider_output; 10 | } 11 | -------------------------------------------------------------------------------- /cdl/inc/utils/jtag_modules.h: -------------------------------------------------------------------------------- 1 | include "types/apb.h" 2 | include "types/jtag.h" 3 | extern module jtag_tap( clock jtag_tck, 4 | input bit reset_n, 5 | input t_jtag jtag, 6 | output bit tdo, 7 | 8 | output bit[5]ir, 9 | output t_jtag_action dr_action, 10 | output bit[50]dr_in, 11 | input bit[50]dr_tdi_mask, 12 | input bit[50]dr_out 13 | ) 14 | { 15 | timing to rising clock jtag_tck jtag, dr_tdi_mask, dr_out; 16 | timing from rising clock jtag_tck tdo, ir, dr_action, dr_in; 17 | } 18 | 19 | extern module jtag_apb( clock jtag_tck, 20 | input bit reset_n, 21 | 22 | input bit[5]ir, 23 | input t_jtag_action dr_action, 24 | input bit[50]dr_in, 25 | output bit[50]dr_tdi_mask, 26 | output bit[50]dr_out, 27 | 28 | clock apb_clock, 29 | output t_apb_request apb_request, 30 | input t_apb_response apb_response 31 | ) 32 | { 33 | timing to rising clock jtag_tck ir, dr_action, dr_in; 34 | timing from rising clock jtag_tck dr_tdi_mask, dr_out; 35 | timing from rising clock apb_clock apb_request; 36 | timing to rising clock apb_clock apb_response; 37 | timing comb input dr_in, dr_action, ir; 38 | timing comb output dr_out, dr_tdi_mask; 39 | } 40 | -------------------------------------------------------------------------------- /cdl/inc/video/teletext_modules.h: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file teletext.h 15 | * @brief Teletext types header file 16 | * 17 | * 18 | */ 19 | /*a Includes */ 20 | include "types/teletext.h" 21 | 22 | /*a Modules */ 23 | /*m teletext */ 24 | extern module teletext( clock clk "Character clock", 25 | input bit reset_n, 26 | input t_teletext_character character "Parallel character data in, with valid signal", 27 | input t_teletext_timings timings "Timings for the scanline, row, etc", 28 | output t_teletext_rom_access rom_access "Teletext ROM access", 29 | input bit[45] rom_data "Teletext ROM data, valid in cycle after rom_access", 30 | output t_teletext_pixels pixels "Output pixels, two clock ticks delayed from clk in" 31 | ) 32 | { 33 | timing to rising clock clk character, timings; 34 | timing from rising clock clk rom_access; 35 | timing to rising clock clk rom_data; 36 | timing from rising clock clk pixels; 37 | } 38 | -------------------------------------------------------------------------------- /cdl/led/src/led_seven_segment.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * 15 | * @file led_seven_segment.cdl 16 | * @brief Simple module to support 7-segment hex display 17 | * 18 | * CDL module to map a hex digit to 7-segment display LED outputs 'a' 19 | * to 'g'. 20 | */ 21 | 22 | /*a Includes */ 23 | include "types/led.h" 24 | 25 | /*a Module */ 26 | module led_seven_segment( input bit[4] hex "Hexadecimal to display on 7-segment LED", 27 | output bit[7] leds "1 for LED on, 0 for LED off, for segments a-g in bits 0-7" 28 | ) 29 | /*b Documentation */ 30 | """ 31 | Simple module to map a hex value to the LEDs required to make the 32 | appropriate symbol in a 7-segment display. 33 | 34 | The module combinatorially takes in a hex value, and drives out 7 LED 35 | values. 36 | """ 37 | { 38 | /*b Combinatorial map of the segment constants to an indexable array */ 39 | comb bit[16][7] segment_consts "Array to hold value from constants from leds.h"; 40 | 41 | /*b Decode hex to segments */ 42 | decode_logic """ 43 | Simply map input through constants provided by leds.h 44 | 45 | Segment [0] is taken from bit [hex] of the 16-bit 46 | led_seven_seg_hex_a constant, similarly for other segment 47 | bits. This means that there are 7 constants in leds.h which define 48 | the actual LED segments that light up for each input hex value. 49 | """: { 50 | segment_consts[0] = led_seven_seg_hex_a; 51 | segment_consts[1] = led_seven_seg_hex_b; 52 | segment_consts[2] = led_seven_seg_hex_c; 53 | segment_consts[3] = led_seven_seg_hex_d; 54 | segment_consts[4] = led_seven_seg_hex_e; 55 | segment_consts[5] = led_seven_seg_hex_f; 56 | segment_consts[6] = led_seven_seg_hex_g; 57 | leds = 0; 58 | for (i; 7) { 59 | leds[i] = segment_consts[i][hex]; 60 | } 61 | } 62 | } 63 | 64 | -------------------------------------------------------------------------------- /cdl/led/tb_src/tb_led_ws2812_chain.cdl: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file tb_6502.cdl 16 | * @brief Testbench for 6502 CDL source 17 | * 18 | * This is a simple testbench for the 6502 CDL model with SRAM, build 19 | * so that the 6502 instruction regressions can be run on the CDL 20 | * model. 21 | */ 22 | /*a Includes */ 23 | include "types/led.h" 24 | include "led/led_modules.h" 25 | 26 | /*a External modules */ 27 | extern module se_test_harness( clock clk, 28 | output bit[8] divider_400ns "clock divider value to provide for generating a pulse every 400ns based on clk", 29 | input t_led_ws2812_request led_request "LED data request", 30 | output t_led_ws2812_data led_data "LED data, for the requested led", 31 | input bit led_data_pin "Data in pin for LED chain" 32 | ) 33 | { 34 | timing to rising clock clk led_request, led_data_pin; 35 | timing from rising clock clk divider_400ns, led_data; 36 | } 37 | 38 | /*a Module */ 39 | module tb_led_ws2812_chain( clock clk, 40 | input bit reset_n 41 | ) 42 | { 43 | 44 | /*b Nets */ 45 | net bit[8] divider_400ns; 46 | net t_led_ws2812_request led_request; 47 | net t_led_ws2812_data led_data; 48 | net bit led_data_pin; 49 | 50 | /*b Instantiations */ 51 | instantiations: { 52 | se_test_harness th( clk <- clk, 53 | divider_400ns => divider_400ns, 54 | led_request <= led_request, 55 | led_data => led_data, 56 | led_data_pin <= led_data_pin ); 57 | 58 | led_ws2812_chain led_chain( clk <- clk, 59 | reset_n <= reset_n, 60 | divider_400ns <= divider_400ns, 61 | led_request => led_request, 62 | led_data <= led_data, 63 | led_chain => led_data_pin ); 64 | } 65 | 66 | /*b All done */ 67 | } 68 | -------------------------------------------------------------------------------- /cdl/microcomputers/picoriscv/tb_src/tb_picoriscv.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file tb_picoriscv.cdl 15 | * @brief Testbench for Pico-RISC-V microcomputer 16 | * 17 | */ 18 | 19 | /*a Includes 20 | */ 21 | include "picoriscv.h" 22 | 23 | /*a External modules */ 24 | extern module se_test_harness( clock clk, 25 | input t_apb_response apb_response, 26 | output t_apb_request apb_request 27 | ) 28 | { 29 | timing from rising clock clk apb_request; 30 | timing to rising clock clk apb_response; 31 | } 32 | 33 | 34 | /*a Module 35 | */ 36 | module tb_picoriscv( clock clk, 37 | input bit reset_n 38 | ) 39 | { 40 | 41 | /*b Instantiate Pico-RISC-V microcomputer 42 | */ 43 | net t_apb_request th_apb_request; 44 | net t_apb_response th_apb_response; 45 | net t_csr_request csr_request; 46 | net t_csr_response csr_response; 47 | comb t_prv_keyboard keyboard; 48 | riscv_instance: { 49 | keyboard = {*=0}; 50 | se_test_harness th( clk <- clk, 51 | apb_response <= th_apb_response, 52 | apb_request => th_apb_request ); 53 | 54 | csr_master_apb master( clk <- clk, 55 | reset_n <= reset_n, 56 | apb_request <= th_apb_request, 57 | apb_response => th_apb_response, 58 | csr_request => csr_request, 59 | csr_response <= csr_response ); 60 | 61 | picoriscv dut( clk <- clk, 62 | reset_n <= reset_n, 63 | video_clk <- clk, 64 | video_reset_n <= reset_n, 65 | //video_bus, 66 | keyboard <= keyboard, 67 | csr_request <= csr_request, 68 | csr_response => csr_response 69 | ); 70 | } 71 | } 72 | -------------------------------------------------------------------------------- /cdl/networking/tb_src/tb_8b10b.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file tb_8b10b.cdl 15 | * @brief Testbench for 8b10b encoder and decoder 16 | * 17 | */ 18 | /*a Includes */ 19 | include "types/encoding.h" 20 | include "networking/encoders.h" 21 | 22 | /*a External modules */ 23 | extern module se_test_harness( clock clk, 24 | output t_8b10b_symbol dec_symbol, 25 | output t_8b10b_enc_data enc_data, 26 | input t_8b10b_dec_data dec_data, 27 | input t_8b10b_symbol enc_symbol 28 | ) 29 | { 30 | timing to rising clock clk dec_data, enc_symbol; 31 | timing from rising clock clk dec_symbol, enc_data; 32 | } 33 | 34 | /*a Module */ 35 | module tb_8b10b( clock clk, 36 | input bit reset_n 37 | ) 38 | { 39 | /*b Nets */ 40 | default clock clk; 41 | default reset active_low reset_n; 42 | net t_8b10b_symbol dec_symbol; 43 | net t_8b10b_enc_data enc_data ; 44 | net t_8b10b_dec_data dec_data ; 45 | net t_8b10b_symbol enc_symbol; 46 | clocked t_8b10b_dec_data dec_data_r = {*=0} ; 47 | clocked t_8b10b_symbol enc_symbol_r = {*=0} ; 48 | 49 | /*b Instantiations */ 50 | instantiations: { 51 | encode_8b10b enc( enc_data <= enc_data, 52 | symbol => enc_symbol ); 53 | decode_8b10b dec( symbol <= dec_symbol, 54 | dec_data => dec_data); 55 | se_test_harness th( clk <- clk, 56 | enc_data => enc_data, 57 | dec_symbol => dec_symbol, 58 | enc_symbol <= enc_symbol_r, 59 | dec_data <= dec_data_r 60 | ); 61 | enc_symbol_r <= enc_symbol; 62 | dec_data_r <= dec_data; 63 | /*b All done */ 64 | } 65 | 66 | /*b All done */ 67 | } 68 | 69 | -------------------------------------------------------------------------------- /cdl/technology/src/tech_sync_bit.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file tech_sync_bit.cdl 15 | * @brief Model for a bit synchronizer 16 | * 17 | */ 18 | /*a Includes */ 19 | 20 | /*a Modules */ 21 | /*m tech_sync_bit */ 22 | module tech_sync_bit( clock clk "Clock to synchronize to", 23 | input bit reset_n "Active low reset", 24 | input bit d "Data in", 25 | output bit q "Data out" ) 26 | { 27 | clocked clock clk reset active_low reset_n bit q=0; 28 | clocked clock clk reset active_low reset_n bit s=0; 29 | logic: { s <= d; q <= s; } 30 | } 31 | 32 | -------------------------------------------------------------------------------- /cdl/technology/src/tech_sync_flop.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2019, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file tech_sync_flop.cdl 15 | * @brief Model for a synchronizer flop 16 | * 17 | */ 18 | /*a Includes */ 19 | 20 | /*a Module tech_sync_flop */ 21 | module tech_sync_flop( clock clk "Clock to synchronize to", 22 | input bit reset_n "Active low reset", 23 | input bit d "Data in", 24 | output bit q "Data out" ) 25 | { 26 | clocked clock clk reset active_low reset_n bit q=0; 27 | logic: { q <= d; } 28 | } 29 | -------------------------------------------------------------------------------- /cdl/utils/src/async_reduce2_4_28_l.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file async_reduce2_4_28_l 15 | * @brief A valid data shift register crossing clock domains 16 | * 17 | * Use of the generic_async_reduce module 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * dc:input_width=4 22 | * 23 | * dc:output_width=28 24 | * 25 | * dc:double_sr=1 26 | * 27 | * dc:shift_right=0 28 | * 29 | * rmn:generic_async_reduce=async_reduce2_4_28_l 30 | * 31 | */ 32 | /*a Module */ 33 | include "generic_async_reduce.cdl" 34 | -------------------------------------------------------------------------------- /cdl/utils/src/async_reduce2_4_28_r.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file async_reduce2_4_28_r 15 | * @brief A valid data shift register crossing clock domains 16 | * 17 | * Use of the generic_async_reduce module 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * dc:input_width=4 22 | * 23 | * dc:output_width=28 24 | * 25 | * dc:double_sr=1 26 | * 27 | * dc:shift_right=1 28 | * 29 | * rmn:generic_async_reduce=async_reduce2_4_28_r 30 | * 31 | */ 32 | /*a Module */ 33 | include "generic_async_reduce.cdl" 34 | -------------------------------------------------------------------------------- /cdl/utils/src/async_reduce_4_28_l.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file async_reduce_4_28_l 15 | * @brief A valid data shift register crossing clock domains 16 | * 17 | * Use of the generic_async_reduce module 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * dc:input_width=4 22 | * 23 | * dc:output_width=28 24 | * 25 | * dc:shift_right=0 26 | * 27 | * rmn:generic_async_reduce=async_reduce_4_28_l 28 | * 29 | */ 30 | /*a Module */ 31 | include "generic_async_reduce.cdl" 32 | -------------------------------------------------------------------------------- /cdl/utils/src/async_reduce_4_28_r.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file async_reduce_4_28_r 15 | * @brief A valid data shift register crossing clock domains 16 | * 17 | * Use of the generic_async_reduce module 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * dc:input_width=4 22 | * 23 | * dc:output_width=28 24 | * 25 | * dc:shift_right=1 26 | * 27 | * rmn:generic_async_reduce=async_reduce_4_28_r 28 | * 29 | */ 30 | /*a Module */ 31 | include "generic_async_reduce.cdl" 32 | -------------------------------------------------------------------------------- /cdl/utils/src/async_reduce_4_60_l.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file async_reduce_4_60_l 15 | * @brief A valid data shift register crossing clock domains 16 | * 17 | * Use of the generic_async_reduce module 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * dc:input_width=4 22 | * 23 | * dc:output_width=60 24 | * 25 | * dc:shift_right=0 26 | * 27 | * rmn:generic_async_reduce=async_reduce_4_60_l 28 | * 29 | */ 30 | /*a Module */ 31 | include "generic_async_reduce.cdl" 32 | -------------------------------------------------------------------------------- /cdl/utils/src/async_reduce_4_60_r.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file async_reduce_4_60_r 15 | * @brief A valid data shift register crossing clock domains 16 | * 17 | * Use of the generic_async_reduce module 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * dc:input_width=4 22 | * 23 | * dc:output_width=60 24 | * 25 | * dc:shift_right=1 26 | * 27 | * rmn:generic_async_reduce=async_reduce_4_60_r 28 | * 29 | */ 30 | /*a Module */ 31 | include "generic_async_reduce.cdl" 32 | -------------------------------------------------------------------------------- /cdl/utils/src/dprintf_2_fifo_4.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file teletext_dprintf_mux.cdl 15 | * @brief A valid/ack multiplexer to dprintf requests 16 | * 17 | * Use of the generic utility valid/ack multiplexer 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * rmt:gt_generic_valid_req=t_dprintf_req 22 | * 23 | * rmn:generic_valid_fifo=dprintf_4_fifo 24 | * 25 | * dc:fifo_depth=3 26 | * 27 | * The FIFO depth in the constant can be 1 less than the required size as the FIFO as an output register 28 | */ 29 | /*a Includes */ 30 | include "types/dprintf.h" 31 | 32 | /*a Module */ 33 | include "generic_valid_ack_fifo.cdl" 34 | -------------------------------------------------------------------------------- /cdl/utils/src/dprintf_2_mux.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file teletext_dprintf_mux.cdl 15 | * @brief A valid/ack multiplexer to dprintf requests 16 | * 17 | * Use of the generic utility valid/ack multiplexer 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * rmt:gt_generic_valid_req=t_dprintf_req 22 | * 23 | * rmn:generic_valid_ack_mux=teletext_dprintf_mux 24 | * 25 | */ 26 | /*a Includes */ 27 | include "types/dprintf.h" 28 | 29 | /*a Module */ 30 | include "generic_valid_ack_mux.cdl" 31 | -------------------------------------------------------------------------------- /cdl/utils/src/dprintf_4_async.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file teletext_dprintf_mux.cdl 15 | * @brief A valid/ack multiplexer to dprintf requests 16 | * 17 | * Use of the generic utility valid/ack multiplexer 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * rmt:gt_generic_valid_req=t_dprintf_req_4 22 | * 23 | * rmn:generic_valid_fifo=dprintf_4_fifo 24 | * 25 | * dc:fifo_depth=3 26 | * 27 | * The FIFO depth in the constant can be 1 less than the required size as the FIFO as an output register 28 | */ 29 | /*a Includes */ 30 | include "types/dprintf.h" 31 | 32 | /*a Module */ 33 | include "generic_valid_ack_async_slow.cdl" 34 | -------------------------------------------------------------------------------- /cdl/utils/src/dprintf_4_fifo_4.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file teletext_dprintf_mux.cdl 15 | * @brief A valid/ack multiplexer to dprintf requests 16 | * 17 | * Use of the generic utility valid/ack multiplexer 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * rmt:gt_generic_valid_req=t_dprintf_req_4 22 | * 23 | * rmn:generic_valid_fifo=dprintf_4_fifo 24 | * 25 | * dc:fifo_depth=3 26 | * 27 | * The FIFO depth in the constant can be 1 less than the required size as the FIFO as an output register 28 | */ 29 | /*a Includes */ 30 | include "types/dprintf.h" 31 | 32 | /*a Module */ 33 | include "generic_valid_ack_fifo.cdl" 34 | -------------------------------------------------------------------------------- /cdl/utils/src/dprintf_4_fifo_512.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2020, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file teletext_dprintf_mux.cdl 15 | * @brief A valid/ack multiplexer to dprintf requests 16 | * 17 | * Use of the generic utility valid/ack multiplexer 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * rmt:gt_generic_valid_req=t_dprintf_req_4 22 | * 23 | * rmn:generic_valid_fifo=dprintf_4_fifo 24 | * 25 | * dc:fifo_depth=3 26 | * 27 | * The FIFO depth in the constant can be 1 less than the required size as the FIFO as an output register 28 | */ 29 | /*a Includes */ 30 | include "types/dprintf.h" 31 | 32 | /*a Module */ 33 | include "generic_valid_ack_sram_fifo.cdl" 34 | -------------------------------------------------------------------------------- /cdl/utils/src/dprintf_4_mux.cdl: -------------------------------------------------------------------------------- 1 | /** @copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * @copyright 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * http://www.apache.org/licenses/LICENSE-2.0. 8 | * Unless required by applicable law or agreed to in writing, software 9 | * distributed under the License is distributed on an "AS IS" BASIS, 10 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11 | * See the License for the specific language governing permissions and 12 | * limitations under the License. 13 | * 14 | * @file teletext_dprintf_4_mux.cdl 15 | * @brief A valid/ack multiplexer to dprintf requests 16 | * 17 | * Use of the generic utility valid/ack multiplexer 18 | * 19 | * Needs to be built in CDL with the options: 20 | * 21 | * rmt:gt_generic_valid_req=t_dprintf_4_req 22 | * 23 | * rmn:generic_valid_ack_mux=teletext_dprintf_4_mux 24 | * 25 | */ 26 | /*a Includes */ 27 | include "types/dprintf.h" 28 | 29 | /*a Module */ 30 | include "generic_valid_ack_mux.cdl" 31 | -------------------------------------------------------------------------------- /cdl/video/tb_src/tb_framebuffer_teletext.cdl: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file tb_framebuffer_teletext.cdl 16 | * @brief Testbench for teletext framebuffer module 17 | * 18 | * This is a simple testbench for the teletext decoder. 19 | */ 20 | /*a Includes */ 21 | include "srams.h" 22 | include "types/teletext.h" 23 | include "video/framebuffer_modules.h" 24 | 25 | /*a External modules */ 26 | extern module se_test_harness( clock clk "Clock for CSR reads/writes", 27 | input bit reset_n, 28 | output t_sram_access_req display_sram_write, 29 | input t_video_bus video_bus, 30 | output t_csr_request csr_request, 31 | input t_csr_response csr_response 32 | ) 33 | { 34 | timing from rising clock clk display_sram_write; 35 | timing from rising clock clk csr_request; 36 | timing to rising clock clk csr_response; 37 | timing to rising clock clk video_bus; 38 | } 39 | 40 | 41 | /*a Module */ 42 | module tb_framebuffer_teletext( clock clk, 43 | input bit reset_n 44 | ) 45 | { 46 | 47 | /*b Nets */ 48 | net t_sram_access_req display_sram_write; 49 | net t_video_bus video_bus; 50 | net t_csr_request csr_request; 51 | net t_csr_response csr_response; 52 | 53 | /*b Instantiations */ 54 | instantiations: { 55 | se_test_harness th( clk <- clk, 56 | display_sram_write => display_sram_write, 57 | video_bus <= video_bus, 58 | csr_request => csr_request, 59 | csr_response <= csr_response 60 | ); 61 | 62 | framebuffer_teletext fb( csr_clk <- clk, 63 | sram_clk <- clk, 64 | video_clk <- clk, 65 | reset_n <= reset_n, 66 | display_sram_write <= display_sram_write, 67 | video_bus => video_bus, 68 | csr_select_in <= 4, 69 | csr_request <= csr_request, 70 | csr_response => csr_response 71 | ); 72 | } 73 | 74 | /*b All done */ 75 | } 76 | -------------------------------------------------------------------------------- /cmodel/inc/axi.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2018, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file axi.h 16 | * @brief AXI header file 17 | * 18 | */ 19 | 20 | /*a Wrapper */ 21 | #ifndef __INC_AXI 22 | #define __INC_AXI 23 | 24 | /*a Types */ 25 | /*t t_axi_burst */ 26 | typedef enum // 2 bits 27 | { 28 | axi_burst_fixed = 0, 29 | axi_burst_incr = 1, 30 | axi_burst_wrap = 2, 31 | axi_burst_reserved = 3, 32 | } t_axi_burst; 33 | 34 | /*t t_axi_size */ 35 | typedef enum // 3 bits 36 | { 37 | axi_size_1 = 0, 38 | axi_size_2 = 1, 39 | axi_size_4 = 2, 40 | axi_size_8 = 3, 41 | axi_size_16 = 4, 42 | axi_size_32 = 5, 43 | axi_size_64 = 6, 44 | axi_size_128 = 7, 45 | } t_axi_size; 46 | 47 | /*t t_axi_request */ 48 | /** 49 | * This structure is used to store read and write requests (ar/aw) 50 | */ 51 | typedef struct { 52 | int valid; 53 | int id; 54 | t_sl_uint64 addr; 55 | int len; 56 | int size; 57 | int burst; 58 | int lock; 59 | int cache; 60 | int prot; 61 | int qos; 62 | int region; 63 | int user; 64 | } t_axi_request; 65 | 66 | /*t t_axi_write_data */ 67 | /** 68 | * This structure is used to store write data 69 | */ 70 | typedef struct { 71 | int valid; 72 | int id; 73 | t_sl_uint64 data; 74 | int strb; 75 | int last; 76 | int user; 77 | } t_axi_write_data; 78 | 79 | /*t t_axi_write_response */ 80 | /** 81 | * This structure is used to store write responses 82 | */ 83 | typedef struct { 84 | int valid; 85 | int id; 86 | int resp; 87 | int user; 88 | } t_axi_write_response; 89 | 90 | /*t t_axi_read_response */ 91 | /** 92 | * This structure is used to store read response 93 | */ 94 | typedef struct { 95 | int valid; 96 | int id; 97 | t_sl_uint64 data; 98 | int resp; 99 | int last; 100 | int user; 101 | } t_axi_read_response; 102 | 103 | /*t t_axi4s32 */ 104 | typedef struct { 105 | t_sl_uint64 data; 106 | t_sl_uint64 strb; 107 | t_sl_uint64 keep; 108 | t_sl_uint64 last; 109 | t_sl_uint64 user; 110 | t_sl_uint64 id; 111 | t_sl_uint64 dest; 112 | } t_axi4s; 113 | 114 | /*a Wrapper */ 115 | #endif 116 | -------------------------------------------------------------------------------- /cmodel/inc/bbc_floppy_disk.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file bbc_floppy_disk.h 16 | * @brief BBC floppy disk model for use with bbc_floppy.cpp 17 | * 18 | * Header file for BBC floppy disk model. 19 | * 20 | */ 21 | 22 | /*a Wrapper */ 23 | #ifndef __INC_BBC_FLOPPY_DISK 24 | #define __INC_BBC_FLOPPY_DISK 25 | 26 | /*a Types */ 27 | /*t c_bbc_floppy_disk */ 28 | /** 29 | * This class was used to model a floppy disk before the floppy sram 30 | * drive model was created. 31 | */ 32 | class c_bbc_floppy_disk { 33 | public: 34 | c_bbc_floppy_disk(void); 35 | ~c_bbc_floppy_disk(void); 36 | int sector_bytes(int track, int sector); 37 | void empty_disk(void); 38 | int load_disk(const char *disk_filename, int disk_type, int write_protect); 39 | int format_disk(int max_tracks, int max_sectors_per_track, int bytes_per_track); 40 | int format_track(int track, struct t_track_data *track_data); 41 | void validate_track_sector(int *track, int *sector); 42 | int get_sector_id(int track, int sector, t_bbc_floppy_sector_id *sector_id); 43 | void write_sector_id(int track, int sector, t_bbc_floppy_sector_id *sector_id); /* Write the id of the current sector id to the data provided */ 44 | unsigned char *get_track_data(int track); 45 | unsigned char *get_sector_data(int track, int sector); 46 | int write_data(int track, int sector, const unsigned char *sector_data, int offset, int byte_count); 47 | int read_data(int track, int sector, unsigned char *sector_data, int offset, int byte_count); 48 | void step_track(int step_up); 49 | void next_sector(void); 50 | 51 | int verbose; 52 | int ready; // if 0, then the rest is invalid 53 | int write_protected; 54 | int max_tracks; 55 | int max_sectors_per_track; 56 | int number_of_tracks; 57 | int current_track; 58 | int current_sector; 59 | int sector_data_offset; 60 | struct t_track_data *tracks; 61 | unsigned char *disk_data; 62 | }; 63 | 64 | /*a Wrapper */ 65 | #endif 66 | 67 | /*a Editor preferences and notes 68 | mode: c *** 69 | c-basic-offset: 4 *** 70 | c-default-style: (quote ((c-mode . "k&r") (c++-mode . "k&r"))) *** 71 | outline-regexp: "/\\\*a\\\|[\t ]*\/\\\*[b-z][\t ]" *** 72 | */ 73 | -------------------------------------------------------------------------------- /cmodel/inc/bbc_shm.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file bbc_shm.h 16 | * @brief BBC shared memory class for use by shared memory users 17 | * 18 | * Header file for BBC shared memory class; this class is used by 19 | * shared memory applications such as the display viewer C model for 20 | * BBC simulations, and for the VNC server that allows VNC clients to 21 | * interact with the simulation. 22 | * 23 | */ 24 | 25 | /*a Wrapper */ 26 | #ifndef __INC_BBC_SHM 27 | #define __INC_BBC_SHM 28 | 29 | /*a Includes */ 30 | #include 31 | #include 32 | #include 33 | #include 34 | #include 35 | #include 36 | #include 37 | #include 38 | #include 39 | #include 40 | #include 41 | 42 | #ifndef SHM_HUGETLB 43 | #define SHM_HUGETLB 0 44 | #endif 45 | 46 | /*t c_bbc_shm */ 47 | /** 48 | * Class for creating and accessing a shared memory for use in 49 | * simulation and interaction with simulation. 50 | * 51 | * The 'server' creates a new instance with a specified data size, e.g.: 52 | * 53 | * shm = new c_bbc_shm("/tmp/bbc_shm.lock", 0xbbc, data_size); 54 | * 55 | * and other 'clients' use a data_size of 0. 56 | * 57 | * The returned class instance has a 'data' property that points to 58 | * the shared memory. 59 | * 60 | */ 61 | class c_bbc_shm { 62 | private: 63 | int shm_alloc(int byte_size); 64 | void close(void); 65 | /** Private shared memory lock filename **/ 66 | const char *shm_lock_filename; 67 | /** Private shared memory key **/ 68 | int shm_key; 69 | /** Private shared memory lock file, opened in shm_alloc, closed 70 | * in close **/ 71 | FILE *shm_lock_file; 72 | /** Private shared memory id **/ 73 | int shm_id; 74 | public: 75 | c_bbc_shm(const char *lock_filename, int key, int byte_size); 76 | ~c_bbc_shm(); 77 | /** Pointer to shared memory data **/ 78 | void *data; 79 | /** Size of allocated data **/ 80 | int byte_size; 81 | }; 82 | 83 | /*a Wrapper */ 84 | #endif 85 | 86 | /*a Editor preferences and notes 87 | mode: c *** 88 | c-basic-offset: 4 *** 89 | c-default-style: (quote ((c-mode . "k&r") (c++-mode . "k&r"))) *** 90 | outline-regexp: "/\\\*a\\\|[\t ]*\/\\\*[b-z][\t ]" *** 91 | */ 92 | -------------------------------------------------------------------------------- /cmodel/inc/ef_object.h: -------------------------------------------------------------------------------- 1 | #include "sl_exec_file.h" 2 | /*t t_ef_type */ 3 | typedef enum { 4 | ef_type_int, 5 | ef_type_int64, 6 | } t_ef_type; 7 | 8 | /*t t_ef_property */ 9 | typedef struct { 10 | const char *name; 11 | int bit_size; 12 | t_ef_type ef_type; 13 | int offset; 14 | } t_ef_property; 15 | 16 | extern void *ef_object_create( t_sl_exec_file_data *file_data, const char *name, void *owner, void *contents, t_ef_property *properties, t_sl_exec_file_method *additional_methods ); 17 | extern void *ef_object_owner(void *obj); 18 | extern void *ef_object_contents(void *obj); 19 | -------------------------------------------------------------------------------- /cmodel/inc/image_io.h: -------------------------------------------------------------------------------- 1 | /** Copyright (C) 2016-2017, Gavin J Stark. All rights reserved. 2 | * 3 | * Licensed under the Apache License, Version 2.0 (the "License"); 4 | * you may not use this file except in compliance with the License. 5 | * You may obtain a copy of the License at 6 | * 7 | * http://www.apache.org/licenses/LICENSE-2.0 8 | * 9 | * Unless required by applicable law or agreed to in writing, software 10 | * distributed under the License is distributed on an "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | * See the License for the specific language governing permissions and 13 | * limitations under the License. 14 | * 15 | * @file image_io.h 16 | * @brief Image input/output library header file 17 | * 18 | * Header file for simple image input and output, supporting PNG and 19 | * JPEG (using libpng and libjpeg). This supports both an image class, 20 | * and functions for just reading and writing image data. 21 | * 22 | */ 23 | 24 | /*a Wrapper */ 25 | #ifndef __INC_IMAGE_IO 26 | #define __INC_IMAGE_IO 27 | 28 | /*a Types */ 29 | /*t c_image_io */ 30 | /** 31 | * This class supports reading and writing images as either PNG or 32 | * JPEG files. 33 | */ 34 | class c_image_io 35 | { 36 | /** Private data is allocated by the class instance at 37 | * construction, if required; its contents are opaque **/ 38 | struct prvt_data *prvt; 39 | int read_init(FILE *f); 40 | int read_set_rgb8(void); 41 | int read_alloc(void); 42 | int read_image(void); 43 | void read_finalize(void); 44 | int write_init(FILE *f); 45 | int write_image(void); 46 | int write_finalize(void); 47 | void free_image_data(void); 48 | 49 | public: 50 | c_image_io(void); 51 | ~c_image_io(void); 52 | int jpeg_read(FILE *f); 53 | int png_read(FILE *f); 54 | int png_write(FILE *f); 55 | 56 | /** Pointer to the image data **/ 57 | unsigned char *image_data; 58 | /** Width of the image in pixels **/ 59 | unsigned int width; 60 | /** Height of the image in pixels **/ 61 | unsigned int height; 62 | /** Number of bytes per pixel **/ 63 | int byte_width; 64 | /** Number of bits per pixel **/ 65 | int bit_depth; 66 | /** Unclear what this is **/ 67 | int color_type; 68 | 69 | /** If set, then 'image_data' will be free'd when the class instance is destroyed **/ 70 | int free_image_data_on_destruction; 71 | }; 72 | 73 | /*a External functions */ 74 | extern int image_write_rgba(const char *filename, const unsigned char *image_data, int width, int height); 75 | extern unsigned char *image_read_rgba(const char *filename, int *width, int *height); 76 | 77 | /*a Wrapper */ 78 | #endif 79 | 80 | /*a Editor preferences and notes 81 | mode: c *** 82 | c-basic-offset: 4 *** 83 | c-default-style: (quote ((c-mode . "k&r") (c++-mode . "k&r"))) *** 84 | outline-regexp: "/\\\*a\\\|[\t ]*\/\\\*[b-z][\t ]" *** 85 | */ 86 | -------------------------------------------------------------------------------- /config.h.in: -------------------------------------------------------------------------------- 1 | #undef HAVE_NOWAY_H 2 | #undef HAVE_PNG_H 3 | #undef HAVE_STDIO_H 4 | #undef HAVE_STDLIB_H 5 | -------------------------------------------------------------------------------- /configure.ac: -------------------------------------------------------------------------------- 1 | AC_INIT([CDL hardware],[1.0]) 2 | AC_CHECK_HEADER([stdio.h], 3 | [AC_DEFINE([HAVE_STDIO_H], [1], 4 | [Define to 1 if you have ])], 5 | [AC_MSG_ERROR([Sorry...])]) 6 | 7 | AC_CONFIG_FILES([Makefile]) 8 | AC_CONFIG_HEADERS([config.h]) 9 | AC_CHECK_HEADERS([png.h]) 10 | AC_CHECK_HEADERS([noway.h]) 11 | AC_SEARCH_LIBS([png_get_io_ptr],[png],,[AC_MSG_ERROR([Sorry... no libpng])]) 12 | AC_SEARCH_LIBS([jpeg_CreateDecompress], [jpeg],,[AC_MSG_ERROR([Sorry... no libjpeg])]) 13 | AC_PATH_PROG([CYCLICITY],[bin/linux/cdl],[not_found]) 14 | AS_IF([test "$ac_cv_path_CYCLICITY" = "not_found"],[AC_MSG_ERROR(['cdl' not found - try using CYCLICITY=/path/to/cdl])]) 15 | AC_OUTPUT 16 | -------------------------------------------------------------------------------- /doc/Makefile: -------------------------------------------------------------------------------- 1 | DOCUMENTATION = $(SRC_ROOT)/doc 2 | DOXYGEN = DOCUMENTATION=$(DOCUMENTATION) SRC_ROOT=$(SRC_ROOT) doxygen 3 | SED = sed -i 4 | ifeq (${BUILD_ARCH},osx) 5 | SED = sed -i '' 6 | endif 7 | CDL_EXTERNAL_REF_SED_SCRIPT = '/\\chapter{Namespace Index}/d;/\\input{namespaces}/d;/\\input{.*cdl}/d;s/\\chapter{File Documentation}/\\chapter{Header Files}/;/\\chapter{Namespace Documentation}/d;/\\input{namespace.*}/d;' 8 | 9 | .PHONY:help_doc 10 | help: help_doc 11 | help_doc: 12 | @echo "doc/Makefile" 13 | @echo "============" 14 | @echo "" 15 | @echo "Documentation for making" 16 | @echo "" 17 | @echo "To make the documentation you need doxygen and pdflatex" 18 | @echo "sudo apt install texlive-latex-base texlive-latex-full texlive-latex-recommended texlive-latex-extra" 19 | @echo "" 20 | @echo "make clean_doc" 21 | @echo "make documentation" 22 | 23 | clean: clean_doc 24 | 25 | clean_doc: 26 | (cd $(DOCUMENTATION); rm -rf cdl_*latex cdl_*html dots/*dot) 27 | mkdir -p $(DOCUMENTATION)/cdl_external_latex 28 | mkdir -p $(DOCUMENTATION)/cdl_internal_latex 29 | mkdir -p $(DOCUMENTATION)/cdl_external_html 30 | mkdir -p $(DOCUMENTATION)/cdl_internal_html 31 | 32 | documentation: doxygen_cdl $(DOCUMENTATION)/cdl_external_latex/refman.pdf $(DOCUMENTATION)/cdl_internal_latex/refman.pdf 33 | 34 | .PHONY: doxygen_cdl 35 | # Must do documents twice to generate the dotfiles 36 | doxygen_cdl: 37 | (cd $(DOCUMENTATION); DOC_INTERNAL=yes DOC_TYPE=internal DOXYGEN_INPUTS=$(SRC_ROOT)/cdl $(DOXYGEN) $(DOCUMENTATION)/doxyfile.bbc_cdl) 38 | (cd $(DOCUMENTATION); DOC_INTERNAL=yes DOC_TYPE=internal DOXYGEN_INPUTS=$(SRC_ROOT)/cdl $(DOXYGEN) $(DOCUMENTATION)/doxyfile.bbc_cdl) 39 | (cd $(DOCUMENTATION); DOC_INTERNAL=no DOC_TYPE=external DOXYGEN_INPUTS=$(SRC_ROOT)/cdl $(DOXYGEN) $(DOCUMENTATION)/doxyfile.bbc_cdl) 40 | 41 | .PHONY: doxygen_cmodel 42 | doxygen_cmodel: 43 | (cd $(DOCUMENTATION); DOXYGEN_INPUTS=$(SRC_ROOT)/cmodel $(DOXYGEN) $(DOCUMENTATION)/doxyfile.bbc_cdl) 44 | 45 | .PHONY: doxygen_python 46 | doxygen_python: 47 | (cd $(DOCUMENTATION); DOXYGEN_INPUTS=$(SRC_ROOT)/python $(DOXYGEN) $(DOCUMENTATION)/doxyfile.bbc_cdl) 48 | 49 | $(DOCUMENTATION)/cdl_internal_latex/refman.pdf: doxygen_cdl 50 | (cd $(DOCUMENTATION)/cdl_internal_latex; rm -f tabu.sty ; ln -s ../tabu.sty . ; $(SED) '/\\chapter{Namespace Index}/d;/\\input{namespaces}/d' refman.tex ; $(MAKE) LATEX_CMD=../pdflatex_wrapper ) 51 | 52 | cdl_external_pdf: $(DOCUMENTATION)/cdl_external_latex/refman.pdf 53 | 54 | remake_cdl_external_pdf: 55 | rm $(DOCUMENTATION)/cdl_external_latex/refman.pdf 56 | $(MAKE) cdl_external_pdf 57 | 58 | $(DOCUMENTATION)/cdl_external_latex/refman.pdf: 59 | (cd $(DOCUMENTATION)/cdl_external_latex; rm -f tabu.sty ; ln -s ../tabu.sty . ; $(SED) $(CDL_EXTERNAL_REF_SED_SCRIPT) refman.tex ; $(MAKE) LATEX_CMD=../pdflatex_wrapper ) 60 | -------------------------------------------------------------------------------- /doc/dots/KeepMe: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/atthecodeface/cdl_hardware/7f7e7a5c4b0520a67d4d196f5907316a275a4496/doc/dots/KeepMe -------------------------------------------------------------------------------- /doc/doxyfile.bbc_cdl: -------------------------------------------------------------------------------- 1 | @INCLUDE = doxyfile.common 2 | PROJECT_NAME = "CDL Modules" 3 | 4 | # Want full path names relative to src_root... 5 | FULL_PATH_NAMES = YES 6 | STRIP_FROM_PATH = $(SRC_ROOT) 7 | #STRIP_FROM_INC_PATH = $(SRC_ROOT)/cdl/inc 8 | 9 | TAB_SIZE = 4 10 | OPTIMIZE_OUTPUT_FOR_C = YES 11 | EXTENSION_MAPPING = cdl=C 12 | # Apparently has no real effect 13 | INLINE_SIMPLE_STRUCTS = YES 14 | # Should have typedef_hides_struct as it CDL all structs must be typedefed - although this may be moot as CDL does not do struct { }; at all 15 | TYPEDEF_HIDES_STRUCT = YES 16 | 17 | EXTRACT_ANON_NSPACES = YES 18 | 19 | INPUT = $(DOXYGEN_INPUTS) 20 | INPUT_ENCODING = UTF-8 21 | FILE_PATTERNS = *.cdl *.h 22 | FILTER_PATTERNS = *.cdl=$(DOCUMENTATION)/filters/filter_cdl.py *.h=$(DOCUMENTATION)/filters/filter_cdl.py 23 | 24 | ENABLE_PREPROCESSING = YES 25 | MACRO_EXPANSION = NO 26 | EXPAND_ONLY_PREDEF = NO 27 | 28 | CLASS_GRAPH = NO 29 | COLLABORATION_GRAPH = NO 30 | GROUP_GRAPHS = NO 31 | INCLUDED_BY_GRAPH = NO 32 | CALL_GRAPH = NO 33 | CALLER_GRAPH = NO 34 | GRAPHICAL_HIERARCHY = NO 35 | DIRECTORY_GRAPH = NO 36 | 37 | # Seems to have no effect 38 | INCLUDE_GRAPH = YES 39 | SEARCH_INCLUDES = YES 40 | INCLUDE_PATH = $(SRC_ROOT)/cdl/inc 41 | INCLUDE_FILE_PATTERNS = *.h 42 | 43 | ENUM_VALUES_PER_LINE = 1 44 | SHOW_NAMESPACES = NO 45 | LAYOUT_FILE = layout_cdl_$(DOC_TYPE).xml 46 | INPUT += $(SRC_ROOT)/cdl/README.md 47 | USE_MDFILE_AS_MAINPAGE = $(SRC_ROOT)/cdl/README.md 48 | COLLABORATION_GRAPH = NO 49 | HTML_OUTPUT = cdl_$(DOC_TYPE)_html 50 | LATEX_OUTPUT = cdl_$(DOC_TYPE)_latex 51 | DOT_IMAGE_FORMAT = svg 52 | 53 | # Removing the source browser takes out 40% of the documentation 54 | SOURCE_BROWSER = $(DOC_INTERNAL) 55 | 56 | # Changing this had no effect 57 | #MAX_DOT_GRAPH_DEPTH = 100 58 | 59 | # Enable for internal docs 60 | INTERNAL_DOCS = $(DOC_INTERNAL) 61 | HIDE_IN_BODY_DOCS = NO 62 | 63 | ENABLE_PREPROCESSING = NO 64 | 65 | # For external documentation 66 | EXCLUDE_PATTERNS = */tb_*cdl 67 | 68 | # For external latex documentation 69 | -------------------------------------------------------------------------------- /doc/pdflatex_wrapper: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | (pdflatex $* || true) 3 | if egrep -s 'Error' refman.log; then echo "Error in running pdflatex on refman - see refman.log" && false; fi 4 | -------------------------------------------------------------------------------- /python/apb_riscv_start.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | import apb_rom 3 | 4 | # Before subsys_minimal 5 | apb_rv_sram = 0x00040000 6 | apb_rv_debug = 0x000b0000 7 | apb_uart = 0x00090000 8 | apb_dprintf_uart = 0x000a0000 9 | 10 | # After subsys_minimal 11 | apb_uart = 0x00090000 12 | apb_dprintf_uart = 0x000a0000 13 | apb_rv_sram = 0x00100000 14 | apb_rv_debug = 0x00110000 15 | 16 | apb_rv_sram_address = apb_rv_sram | 0x00 17 | apb_rv_sram_data = apb_rv_sram | 0x04 18 | apb_rv_sram_control = apb_rv_sram | 0x08 19 | 20 | apb_rv_debug_data0 = apb_rv_debug | 0x10 21 | apb_rv_debug_dmcontrol = apb_rv_debug | 0x40 22 | apb_rv_debug_abstract_cmd = apb_rv_debug | 0x5c 23 | 24 | apb_uart_brg = apb_uart | 4 25 | apb_uart_config = apb_uart | 8 26 | apb_uart_hr = apb_uart | 12 27 | apb_dprintf_uart_brg = apb_dprintf_uart | 4 28 | apb_dprintf_uart_config = apb_dprintf_uart | 8 29 | 30 | brg_config = 162 31 | 32 | program = {} 33 | program["code"] = [] 34 | program["code"] += [ 35 | (apb_rom.rom.op_set("address",apb_dprintf_uart_brg),), 36 | (apb_rom.rom.op_req("write_arg",brg_config),), 37 | ] 38 | program["code"] += [ (apb_rom.rom.op_set("address",apb_rv_sram_control),), 39 | (apb_rom.rom.op_req("write_arg",1),), # Enable clock on RISC-V 40 | (apb_rom.rom.op_set("address",apb_rv_debug_dmcontrol),), 41 | (apb_rom.rom.op_req("write_arg",1),), # select HART 0 enable debug 42 | (apb_rom.rom.op_set("address",apb_rv_debug_data0),), 43 | (apb_rom.rom.op_req("write_arg",0),), # Set data0 to 0 44 | (apb_rom.rom.op_set("address",apb_rv_debug_abstract_cmd),), 45 | (apb_rom.rom.op_req("write_arg",0),), # set program counter to data0 46 | (apb_rom.rom.op_set("address",apb_rv_debug_dmcontrol),), 47 | (apb_rom.rom.op_req("write_arg",(1<<30)|1),), # Resume hart 48 | ] 49 | program["code"] += [ 50 | (apb_rom.rom.op_finish(),), 51 | ] 52 | compilation = apb_rom.rom.compile_program(program) 53 | apb_rom.rom.mif_of_compilation(compilation) 54 | -------------------------------------------------------------------------------- /python/apb_speed_selection.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | import apb_rom 3 | csr_select = {} 4 | csr_select["clock_control"] = 0 5 | csr_select["bbc_display"] = 1 6 | clock_control = (csr_select["clock_control"]<<16)|0 7 | display_porches = (csr_select["bbc_display"]<<16)|2 8 | speeds = [0x0015, 0x0215, 0x0415, 0x0615, 0x0815, 0x0a15, 0x0c15, 0x0e15, 0x1015, 0x1215, 0x1415, 0x1515] 9 | 10 | porches = [(65536-170+16-3*i) | (((65536-68)<<16)) for i in range(16)] 11 | 12 | def set_speed(speed): 13 | return [(apb_rom.rom.op_set("address",clock_control),["speed%d:"%speed]), 14 | (apb_rom.rom.op_req("write_arg",speeds[speed]),), 15 | (apb_rom.rom.op_finish(),), 16 | ] + ([ (apb_rom.rom.op_finish(),), ]*1) 17 | def set_porch(porch): 18 | return [(apb_rom.rom.op_set("address",display_porches),["porches%d:"%porch]), 19 | (apb_rom.rom.op_req("write_arg",porches[porch]),), 20 | (apb_rom.rom.op_finish(),), 21 | ] + ([ (apb_rom.rom.op_finish(),), ]*1) 22 | program = {} 23 | program["code"] = [] 24 | for i in range(len(speeds)): 25 | program["code"] += set_speed(i) 26 | pass 27 | program["code"] += ([ (apb_rom.rom.op_finish(),), ]*4)*4 28 | for i in range(len(porches)): 29 | program["code"] += set_porch(i) 30 | pass 31 | compilation = apb_rom.rom.compile_program(program) 32 | 33 | for (a,d) in compilation["object"]: 34 | print "%02x: %010x"%(a,d) 35 | pass 36 | -------------------------------------------------------------------------------- /python/apb_uart_tx.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | import apb_rom 3 | 4 | apb_uart = 0x00090000 5 | apb_uart_brg = apb_uart | 4 6 | apb_uart_config = apb_uart | 8 7 | apb_uart_hr = apb_uart | 12 8 | apb_dprintf_uart = 0x000a0000 9 | apb_dprintf_uart_brg = apb_dprintf_uart | 4 10 | apb_dprintf_uart_config = apb_dprintf_uart | 8 11 | 12 | brg_config = 162 13 | delay = 1<<24 14 | # 1 out of 17 15 | # brg_config = 0x80010010 16 | # 3 adds of 16 and 16 subs of 3 gets back again 17 | # so cycle of 19 and 3 so 3 out of 19 18 | #brg_config = 0x80030010 19 | #brg_config = 1 20 | #delay = (brg_config+2)*6*10 21 | program = {} 22 | program["code"] = [] 23 | program["code"] += [ (apb_rom.rom.op_set("increment",4),), 24 | (apb_rom.rom.op_set("address",apb_uart_brg),), 25 | (apb_rom.rom.op_req("write_arg",brg_config),), 26 | (apb_rom.rom.op_set("address",apb_dprintf_uart_brg),), 27 | (apb_rom.rom.op_req("write_arg",brg_config),), 28 | (apb_rom.rom.op_set("address",apb_uart_hr),), 29 | (apb_rom.rom.op_set("accumulator",64),), 30 | (apb_rom.rom.op_req("write_acc",brg_config),("loop:",)), 31 | (apb_rom.rom.op_wait(delay),), 32 | (apb_rom.rom.op_req("read",brg_config),), 33 | (apb_rom.rom.op_alu("add",1),), 34 | (apb_rom.rom.op_branch("branch",0),("loop",)), 35 | ] 36 | program["code"] += [ 37 | (apb_rom.rom.op_finish(),), 38 | ] 39 | compilation = apb_rom.rom.compile_program(program) 40 | apb_rom.rom.mif_of_compilation(compilation) 41 | -------------------------------------------------------------------------------- /python/bbc.py: -------------------------------------------------------------------------------- 1 | from model6502 import c_6502 2 | from system6502 import c_memory 3 | class c_bbc(object): 4 | def __init__(self): 5 | self.cpu = c_6502() 6 | self.memory = c_memory() 7 | self.memory.load_binary(0xc000, file("../../BeebEm3/BeebFile/BBCINT/OS12.ROM","r")) 8 | self.memory.load_binary(0x8000, file("../../BeebEm3/BeebFile/BBCINT/BASIC2.ROM","r")) 9 | self.cpu.reset() 10 | pass 11 | def tick(self, n): 12 | for i in range(n): 13 | ts = self.cpu.tick_start() 14 | data_in = 0xff 15 | if ts["mem"] is not None: 16 | if ts["mem"][0] in ["read"]: 17 | data_in = self.memory.read(ts["mem"][1]) 18 | pass 19 | elif ts["mem"][0] in ["write"]: 20 | self.memory.write(ts["mem"][1], ts["mem"][2]) 21 | pass 22 | pass 23 | te = self.cpu.tick_end(data_in=data_in) 24 | print "%02x"%data_in, te 25 | print self.cpu 26 | pass 27 | pass 28 | 29 | if len(sys.argv)>=2 and sys.argv[1]=="bbc": 30 | bbc = c_bbc() 31 | bbc.tick(100000) 32 | die 33 | pass 34 | 35 | -------------------------------------------------------------------------------- /python/bbc_kbd.py: -------------------------------------------------------------------------------- 1 | bbc_key_map = { 2 | (0, 0):"Shift", 3 | (1, 0):"Ctrl", 4 | 5 | (0, 1):"Q", 6 | (1, 1):"3", # BBC 3# 7 | #(1, 1):"#", 8 | (2, 1):"4", # BBC 4$ 9 | #(2, 1):"$", 10 | (3, 1):"5", # BBC 5% 11 | #(3, 1):"%", 12 | (4, 1):"F4", 13 | (5, 1):"8", # BBC 8* 14 | #(5, 1):"*", 15 | (6, 1):"F7", 16 | (7, 1):"-", # =- 17 | #(7, 1):"_", # =- 18 | (8, 1):"~", # ~^ 19 | (9, 1):"Left Arrow", 20 | 21 | (0, 2):"F10", 22 | (1, 2):"W", 23 | (2, 2):"E", 24 | (3, 2):"T", 25 | (4, 2):"7", # BBC 7 ampersand? 26 | #(4, 2):"&", 27 | (5, 2):"I", 28 | (6, 2):"9", # BBC 9) 29 | #(6, 2):"(", 30 | (7, 2):"0", # BBC 0) 31 | #(7, 2):")", 32 | (8, 2):"_", 33 | #(8, 2):"", # BBC _pounds 34 | (9, 2):"Down Arrow", 35 | 36 | (0, 3):"1", 37 | #(0, 3):"!", 38 | (1, 3):"2", 39 | #(1, 3):"@", 40 | (2, 3):"D", 41 | (3, 3):"R", 42 | (4, 3):"6", # BBC 6& 43 | #(4, 3):"^", 44 | (5, 3):"U", 45 | (6, 3):"O", 46 | (7, 3):"P", 47 | (8, 3):"[", 48 | #(8, 3):"{", 49 | (9, 3):"Up Arrow", 50 | 51 | (0, 4):"Caps Lock", 52 | (1, 4):"A", 53 | (2, 4):"X", 54 | (3, 4):"F", 55 | (4, 4):"Y", 56 | (5, 4):"J", 57 | (6, 4):"K", 58 | (7, 4):"@", # BBC @ 59 | (8, 4):":", # BBC :* 60 | #(8, 4):"*", # BBC :* 61 | (9, 4):"Enter", # Return 62 | 63 | (0, 5):"Scroll Lock", #Shift lock 64 | (1, 5):"S", 65 | (2, 5):"C", 66 | (3, 5):"G", 67 | (4, 5):"H", 68 | (5, 5):"N", 69 | (6, 5):"L", 70 | (7, 5):";", # BBC +; 71 | #(7, 5):"+", 72 | (8, 5):"]", 73 | #(8, 5):"}", 74 | (9, 5):"Delete", 75 | 76 | (0, 6):"Tab", 77 | (1, 6):"Z", 78 | (2, 6):"Spacebar", 79 | (3, 6):"V", 80 | (4, 6):"B", 81 | (5, 6):"M", 82 | #(6, 6):"<", 83 | (6, 6):",", 84 | #(7, 6):">", 85 | (7, 6):".", 86 | #(8, 6):"?", 87 | (8, 6):"/", 88 | (9, 6):"Copy", 89 | 90 | (0, 7):"ESC", 91 | (1, 7):"F1", 92 | (2, 7):"F2", 93 | (3, 7):"F3", 94 | (4, 7):"F5", 95 | (5, 7):"F6", 96 | (6, 7):"F8", 97 | (7, 7):"F9", 98 | (8, 7):"\\", 99 | #(8, 7):"|", 100 | (9, 7):"Right Arrow", 101 | } 102 | 103 | bbc_code_of_key = {} 104 | for c,k in bbc_key_map.iteritems(): 105 | bbc_code_of_key[k]=c 106 | pass 107 | -------------------------------------------------------------------------------- /python/clock_timer.py: -------------------------------------------------------------------------------- 1 | def dda_of_ratio(r): 2 | if r is None: return (0,0) 3 | (n,d) = r 4 | dda_add = n-1 5 | dda_sub = d-2-dda_add 6 | return (dda_add, dda_sub) 7 | 8 | def find_closest_ratio(f, max): 9 | def ratio_compare(f, r): 10 | (n,d) = r 11 | diff = f*d - n 12 | if abs(diff)<1.0/max/3: return 0 13 | if diff<0: return -1 14 | return 1 15 | must_be_above = (0, 1) 16 | must_be_below = (1, 0) 17 | while True: 18 | ratio_to_test = (must_be_below[0] + must_be_above[0], 19 | must_be_below[1] + must_be_above[1]) 20 | (dda_add, dda_sub) = dda_of_ratio(ratio_to_test) 21 | if (dda_add>=max) or (dda_sub>=max): 22 | break 23 | c = ratio_compare(f,ratio_to_test) 24 | if (c==0): return ratio_to_test 25 | if (c==1): 26 | must_be_above = ratio_to_test 27 | pass 28 | else: 29 | must_be_below = ratio_to_test 30 | pass 31 | pass 32 | if must_be_above[0]==0: return None 33 | return must_be_above 34 | 35 | def clock_timer_adder_bonus(ns): 36 | ns_times_16 = (16.0*ns+1E-16) 37 | adder = int(ns_times_16) 38 | bonus = ns_times_16 - adder 39 | bonus = find_closest_ratio(bonus, 256) 40 | bonus = dda_of_ratio(bonus) 41 | adder = (adder/16, adder%16) 42 | #print "Adder and bonus for %f is %s, %s"%(ns, str(adder), str(bonus)) 43 | return (adder, bonus) 44 | 45 | def clock_timer_period(adder, bonus): 46 | ns_times_16 = adder[0]*16 + adder[1] 47 | if (bonus[0]==0) and (bonus[1]==0): 48 | bonus=0. 49 | else: 50 | bonus = (bonus[0]+1.) / (bonus[0] + bonus[1] + 2) 51 | pass 52 | return (ns_times_16 + bonus) / 16.0 53 | -------------------------------------------------------------------------------- /python/disk_to_mif.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | import sys 3 | disk_filename = sys.argv[1] 4 | a = open(disk_filename) 5 | num_tracks = 40 6 | sectors_per_track = 10 7 | address = 0 8 | r = "%04x: "%address 9 | while True: 10 | ch = a.read(4) 11 | if len(ch)==0: break 12 | r += "%02x%02x%02x%02x "%(ord(ch[3]),ord(ch[2]),ord(ch[1]),ord(ch[0])) 13 | address = address+1 14 | if (address%16)==0: 15 | print r 16 | r = "%04x: "%address 17 | pass 18 | if address>=0x7000: break 19 | pass 20 | address = 0x7000 21 | for track in range(num_tracks): 22 | for sector in range(sectors_per_track): 23 | r = "%04x: "%address 24 | r += "%08x" % ((track<<0) | (sector<<8) | (1<<16) | (0<<24)) # head 0, no errors etc 25 | print r 26 | address = address + 1 27 | pass 28 | pass 29 | -------------------------------------------------------------------------------- /python/dump_to_mif.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | import sys 3 | import dump 4 | dump_filename = sys.argv[1] 5 | base_address = int(sys.argv[2],0) 6 | if (len(sys.argv)>3): 7 | format = sys.argv[3] 8 | pass 9 | d = dump.c_dump() 10 | f = open(dump_filename) 11 | d.load(f, base_address) 12 | f.close() 13 | if format=="C": 14 | d.write_c_data(sys.stdout) 15 | else: 16 | d.write_mif(sys.stdout) 17 | -------------------------------------------------------------------------------- /python/ps2.py: -------------------------------------------------------------------------------- 1 | ps2_key_map = { 2 | 0x111:"Alt (right)", 3 | 0x114:"Ctrl (right)", 4 | 0x11F:"Windows (left)", 5 | 0x127:"Windows (right)", 6 | 0x12F:"Menus", 7 | 0x14A:"KP/", 8 | 0x15A:"KPEnter", 9 | 0x169:"End", 10 | 0x16B:"Left Arrow", 11 | 0x16C:"Home", 12 | 0x170:"Insert", 13 | 0x171:"Delete", 14 | 0x172:"Down Arrow", 15 | 0x174:"Right Arrow", 16 | 0x175:"Up Arrow", 17 | 0x17A:"Page Down", 18 | 0x17D:"Page Up", 19 | 20 | 0x01:"F9", 21 | 0x03:"F5", 22 | 0x04:"F3", 23 | 0x05:"F1", 24 | 0x06:"F2", 25 | 0x07:"F12", 26 | 0x09:"F10", 27 | 0x0A:"F8", 28 | 0x0B:"F6", 29 | 0x0C:"F4", 30 | 0x0D:"Tab", 31 | 0x0E:"`", 32 | 0x11:"Alt (left)", 33 | 0x12:"Shift", 34 | 0x14:"Ctrl", 35 | 0x15:"Q", 36 | 0x16:"1", 37 | 0x1A:"Z", 38 | 0x1B:"S", 39 | 0x1C:"A", 40 | 0x1D:"W", 41 | 0x1E:"2", 42 | 0x21:"C", 43 | 0x22:"X", 44 | 0x23:"D", 45 | 0x24:"E", 46 | 0x25:"4", 47 | 0x26:"3", 48 | 0x29:"Spacebar", 49 | 0x2A:"V", 50 | 0x2B:"F", 51 | 0x2C:"T", 52 | 0x2D:"R", 53 | 0x2E:"5", 54 | 0x31:"N", 55 | 0x32:"B", 56 | 0x33:"H", 57 | 0x34:"G", 58 | 0x35:"Y", 59 | 0x36:"6", 60 | 0x3A:"M", 61 | 0x3B:"J", 62 | 0x3C:"U", 63 | 0x3D:"7", 64 | 0x3E:"8", 65 | 0x41:",", 66 | 0x42:"K", 67 | 0x43:"I", 68 | 0x44:"O", 69 | 0x45:"0", 70 | 0x46:"9", 71 | 0x49:".", 72 | 0x4A:"/", 73 | 0x4B:"L", 74 | 0x4C:";", 75 | 0x4D:"P", 76 | 0x4E:"-", 77 | 0x52:"'", 78 | 0x54:"[", 79 | 0x55:"=", 80 | 0x58:"Caps Lock", 81 | 0x59:"RtShift", 82 | 0x5A:"Enter", 83 | 0x5B:"]", 84 | 0x5D:"\\", 85 | 0x66:"Backspace", 86 | 0x69:"KP1", 87 | 0x6B:"KP4", 88 | 0x6C:"KP7", 89 | 0x70:"KP0", 90 | 0x71:"KP.", 91 | 0x72:"KP2", 92 | 0x73:"KP5", 93 | 0x74:"KP6", 94 | 0x75:"KP8", 95 | 0x76:"ESC", 96 | 0x77:"Num Lock", 97 | 0x78:"F11", 98 | 0x79:"KP+", 99 | 0x7A:"KP3", 100 | 0x7B:"KP-", 101 | 0x7C:"KP*", 102 | 0x7D:"KP9", 103 | 0x7E:"Scroll Lock", 104 | 0x83:"F7", 105 | } 106 | ps2_code_of_key = {} 107 | for c,k in ps2_key_map.iteritems(): 108 | ps2_code_of_key[k]=c 109 | pass 110 | -------------------------------------------------------------------------------- /python/py_engine.py: -------------------------------------------------------------------------------- 1 | class exec_file: 2 | pass 3 | -------------------------------------------------------------------------------- /python/rom_to_mif.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | def convert_rom(rom_filename): 3 | in_file = open("roms/"+rom_filename) 4 | out_file = open("roms/"+rom_filename+".mif", "w") 5 | address = 0 6 | r = "%04x: "%address 7 | while True: 8 | ch = in_file.read(1) 9 | if len(ch)==0: break 10 | r += "%02x "%ord(ch) 11 | address = address+1 12 | if (address%32)==0: 13 | print >>out_file, r 14 | r = "%04x: "%address 15 | pass 16 | pass 17 | in_file.close() 18 | out_file.close() 19 | pass 20 | for rom_filename in ("basic2.rom", "dfs.rom", "os12.rom"): 21 | convert_rom(rom_filename) 22 | pass 23 | -------------------------------------------------------------------------------- /python/rv_flow.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | 3 | import csv 4 | 5 | import argparse 6 | 7 | parser = argparse.ArgumentParser(description='Display execution trace of RV simulation') 8 | parser.add_argument('--logfile', type=str, default='itrace.log', 9 | help='logfile to parse') 10 | parser.add_argument('--module', type=str, default="dut.trace", 11 | help='module to show trace of') 12 | 13 | args = parser.parse_args() 14 | 15 | csvfile = open("itrace.log", "rb") 16 | trace = csv.reader(csvfile, delimiter=',', quotechar='"') 17 | for row in trace: 18 | if (row[2]==args.module): 19 | if False: # branch + trap flow 20 | if (row[3] == '0'): #timestamp,id,dut.trace,0="PC",7,"pc","branch_taken","trap","ret","jalr","branch_target","instr" 21 | 22 | pc = int(row[5]) 23 | branch_taken = row[6] 24 | trap = row[7] 25 | ret = row[8] 26 | jalr = row[9] 27 | print "%08x %d %d %d %d"%(pc,branch_taken,trap,ret,jalr) 28 | pass 29 | pass 30 | else: # rfw retirement flow 31 | if (row[3] == '1') and (row[5] == '1'): #timestamp,id,dut.trace,1="retire",3,"rfw","rd","data" 32 | rfw_rd = row[6] 33 | rfw_data = row[7] 34 | print rfw_rd, rfw_data 35 | pass 36 | pass 37 | pass 38 | pass 39 | 40 | 41 | 42 | 43 | 44 | -------------------------------------------------------------------------------- /python/rv_rfw.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | 3 | import csv 4 | 5 | csvfile = open("itrace.log", "rb") 6 | trace = csv.reader(csvfile, delimiter=',', quotechar='"') 7 | for row in trace: 8 | if (row[3] == '1') and (row[2]=='dut.dut.trace'): 9 | rd = int(row[5],16) 10 | data = int(row[6],16) 11 | print "r%d <= %08x"%(rd, data) 12 | 13 | 14 | 15 | 16 | 17 | 18 | -------------------------------------------------------------------------------- /python/svg_loffice_extract_slide.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | # ../../../../python/svg_loffice_extract_slide.py 3 | # pandoc riscv_cpu_implementation.md --pdf-engine=pdflatex -o temp.pdf 4 | from xml.dom import minidom 5 | 6 | scale=0.02 7 | in_filename = "fred.svg" 8 | out_filename = "pipeline.svg" 9 | slide_id = "container-id1" 10 | 11 | doc = minidom.parse(in_filename) 12 | svg = doc.documentElement 13 | contents = [] 14 | for d in svg.getElementsByTagName("defs"): 15 | if d.getAttribute("class")=="ClipPathGroup": contents.append(d) 16 | pass 17 | for d in svg.getElementsByTagName("g"): 18 | if d.getAttribute("id")==slide_id: 19 | d.setAttribute("transform", "scale(%f)"%scale) 20 | contents.append(d) 21 | pass 22 | pass 23 | 24 | vb = svg.getAttribute("viewBox") 25 | vb_out="" 26 | for d in vb.split(): 27 | vb_out += "%f "%(int(d)*scale) 28 | pass 29 | svg.setAttribute("viewBox",vb_out) 30 | 31 | while svg.firstChild: 32 | svg.removeChild(svg.firstChild) 33 | pass 34 | 35 | for x in contents: 36 | svg.appendChild(x) 37 | 38 | 39 | out_file = open(out_filename,"w") 40 | out_file.write(doc.toxml("utf-8")) 41 | out_file.close() 42 | -------------------------------------------------------------------------------- /python/system6502.py: -------------------------------------------------------------------------------- 1 | #a Imports 2 | import re 3 | import sys, inspect 4 | from model6502 import c_6502 5 | 6 | #a Memory 7 | #c c_memory 8 | class c_memory(object): 9 | def __init__(self): 10 | self.data = bytearray(65536) 11 | self.data[0xfffc] = 0 12 | self.data[0xfffd] = 0 13 | n = 0 14 | n = self.add_code(n, (0xa9, 0x54) ) 15 | n = self.add_code(n, (0xa0, 0x18) ) 16 | n = self.add_code(n, (0xa2, 0x82) ) 17 | n = self.add_code(n, (0x69, 0x01) ) 18 | n = self.add_code(n, (0x8d, 0x12, 0x34) ) 19 | self.data[n] = 0x4c 20 | n+=1 21 | self.data[n] = 0x06 22 | n+=1 23 | self.data[n] = 0x00 24 | n+=1 25 | pass 26 | def load_binary(self, base_address, f): 27 | address = base_address 28 | while True: 29 | d = f.read(4096) 30 | if len(d)==0: break 31 | address = self.add_code(address, d) 32 | pass 33 | pass 34 | def add_code(self, address, data): 35 | for i in data: 36 | self.write(address,i) 37 | address += 1 38 | pass 39 | return address 40 | def read(self, address): 41 | return self.data[address] 42 | def write(self, address, data): 43 | self.data[address] = data 44 | pass 45 | def dump(self, address, length=256): 46 | while length>0: 47 | r = "%04x :"%address 48 | for i in range(min(length,16)): 49 | r += " %02x"%self.read(address+i) 50 | pass 51 | address += 16 52 | length -= 16 53 | print r 54 | pass 55 | pass 56 | 57 | #a System 58 | #c c_system 59 | class c_system(object): 60 | #f __init__ 61 | def __init__(self): 62 | self. cpu = c_6502() 63 | self.memory = c_memory() 64 | if False: 65 | self.memory.load_binary(0xc000, file("../../BeebEm3/BeebFile/BBCINT/OS12.ROM","r")) 66 | self.memory.load_binary(0x8000, file("../../BeebEm3/BeebFile/BBCINT/BASIC2.ROM","r")) 67 | pass 68 | self.cpu.reset() 69 | pass 70 | #f tick 71 | def tick(self, verbose=False): 72 | ts = self.cpu.tick_start() 73 | if verbose: 74 | print ts 75 | pass 76 | data_in = 0xff 77 | if ts["mem"] is not None: 78 | if ts["mem"][0] in ["read"]: 79 | data_in = self.memory.read(ts["mem"][1]) 80 | pass 81 | elif ts["mem"][0] in ["write"]: 82 | self.memory.write(ts["mem"][1], ts["mem"][2]) 83 | pass 84 | pass 85 | te = self.cpu.tick_end(data_in=data_in) 86 | if verbose: 87 | print "%02x"%data_in, te 88 | print self.cpu 89 | pass 90 | pass 91 | 92 | -------------------------------------------------------------------------------- /regress_all: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | #a Copyright 3 | # 4 | # This file 'model_list' copyright Gavin J Stark 2016, 2017 5 | # 6 | # Redistribution and use in source and binary forms, with or without 7 | # modification, are permitted provided that the following conditions are met: 8 | # 9 | # 1. Redistributions of source code must retain the above copyright notice, this 10 | # list of conditions and the following disclaimer. 11 | # 2. Redistributions in binary form must reproduce the above copyright notice, 12 | # this list of conditions and the following disclaimer in the documentation 13 | # and/or other materials provided with the distribution. 14 | # 15 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 16 | # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 | # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 | # DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 19 | # ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 | # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 | # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 22 | # ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 24 | # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 | # 26 | # @file regress_all 27 | # @brief Regression script to run regressions for testing CDL and BBC 28 | # 29 | # Simple file to import the regression directory, and run the 30 | # regression suite. 31 | # 32 | 33 | #a Imports 34 | import sys, os, unittest, traceback 35 | 36 | #a Find the tests 37 | print 38 | sys.path = [ os.path.abspath("build/osx"), 39 | os.path.abspath("build/linux"), 40 | os.path.abspath("python"), 41 | os.path.abspath(os.getcwd()), 42 | os.path.abspath(os.environ['CYCLICITY']), 43 | os.path.abspath(os.getcwd()+"/../cdl"), 44 | ] + sys.path[1:] 45 | 46 | #a Import the regression 47 | import regression 48 | 49 | #a Toplevel 50 | if __name__ == '__main__': 51 | unittest.main(defaultTest='regression.suite') 52 | 53 | -------------------------------------------------------------------------------- /regression/__init__.py: -------------------------------------------------------------------------------- 1 | import unittest, importlib, sys, os 2 | tests = [#"base6502", 3 | "leds", 4 | "teletext", 5 | "csrs", 6 | "apb", 7 | "axi", 8 | "de1_cl_hps", 9 | "vcu108", 10 | "utils", 11 | "riscv_minimal", 12 | "riscv_coproc", 13 | "crypt_kasumi", 14 | #"picoriscv", 15 | "input_devices", 16 | "de1_cl", 17 | "bbc_submodules", 18 | "jtag", 19 | "clocking", 20 | "ethernet", 21 | # clarvi 22 | ] 23 | if "BBC" in os.environ.keys(): 24 | tests = ["bbc", 25 | ] 26 | 27 | self = sys.modules[__name__] 28 | suite = unittest.TestSuite() 29 | for t in tests: 30 | mod_t = importlib.import_module(".."+t, "regression.blah") 31 | suite.addTest(unittest.TestLoader().loadTestsFromModule(mod_t)) 32 | pass 33 | -------------------------------------------------------------------------------- /regression/axi_mixin.py: -------------------------------------------------------------------------------- 1 | #a Useful functions 2 | def int_of_bits(bits): 3 | l = len(bits) 4 | m = 1<<(l-1) 5 | v = 0 6 | for b in bits: 7 | v = (v>>1) | (m*b) 8 | pass 9 | return v 10 | 11 | def bits_of_n(nbits, n): 12 | bits = [] 13 | for i in range(nbits): 14 | bits.append(n&1) 15 | n >>= 1 16 | pass 17 | return bits 18 | 19 | #a AXI mixin 20 | #c axi4s_mixin 21 | class axi4s_mixin: 22 | axi4s_properties = ["strb", "keep", "user", "id", "dest", "last", "data"] 23 | #f axi4s_init 24 | def axi4s_init(self): 25 | self.axi_bfm.axi4s("axi4s") 26 | self.axi4s.set("strb",0xf) 27 | self.axi4s.set("keep",0xf) 28 | self.axi4s.set("user",0) 29 | self.axi4s.set("id",0) 30 | self.axi4s.set("dest",0) 31 | self.axi4s.set("last",0) 32 | self.axi4s.set("data",0) 33 | pass 34 | #f axi4s_set_data 35 | def axi4s_set_data(self, obj, axi_data): 36 | for p in self.axi4s_properties: 37 | if p in axi_data: obj.set(p, axi_data[p]) 38 | pass 39 | pass 40 | #f axi4s_master_enqueue 41 | def axi4s_master_enqueue(self, axi_data): 42 | self.axi4s_set_data(self.axi4s, axi_data) 43 | self.axi4s.master_enqueue() 44 | pass 45 | 46 | -------------------------------------------------------------------------------- /regression/base6502_hw.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | #a Copyright 3 | # 4 | # This file 'base6502_hw' copyright Gavin J Stark 2016, 2017 5 | # 6 | # This program is free software; you can redistribute it and/or modify it under 7 | # the terms of the GNU General Public License as published by the Free Software 8 | # Foundation, version 2.0. 9 | # 10 | # This program is distributed in the hope that it will be useful, 11 | # but WITHOUT ANY WARRANTY; without even implied warranty of MERCHANTABILITY 12 | # or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 | # for more details. 14 | 15 | #a Imports 16 | import pycdl 17 | 18 | #c cdl_test_th 19 | class cdl_test_th(pycdl.th): 20 | def run(self): 21 | self.passtest(0,"") 22 | pass 23 | 24 | #c cdl_test 25 | class cdl_test(pycdl.hw): 26 | """ 27 | Simple instantiation of cdl/src/tb_6502 for testing 28 | """ 29 | wave_file = __name__+".vcd" 30 | wave_hierarchies = [] 31 | #f __init__ 32 | def __init__(self, sram_mif=""): 33 | 34 | system_clock = pycdl.clock(0, 5, 5) 35 | reset_n = pycdl.wire() 36 | 37 | self.reset_driver = pycdl.timed_assign( signal = reset_n, 38 | init_value = 0, 39 | wait = 33, 40 | later_value = 1 ) 41 | 42 | hw_forces = dict( ) 43 | hw_forces = { "imem.filename":sram_mif, 44 | "imem.verbose":0, 45 | } 46 | self.tb_6502 = pycdl.module("tb_6502", 47 | clocks = {"clk":system_clock, 48 | }, 49 | inputs = {"reset_n":reset_n, 50 | }, 51 | forces = hw_forces, 52 | ) 53 | self.th = cdl_test_th(clocks = {"clk":system_clock},inputs={},outputs={}) 54 | pycdl.hw.__init__(self, 55 | self.tb_6502, 56 | self.th, 57 | system_clock, 58 | self.reset_driver ) 59 | self.wave_hierarchies = [self.tb_6502] 60 | pass 61 | #f set_run_time 62 | def set_run_time(self, num_cycles): 63 | pass 64 | #f check_memory 65 | def check_memory(self, expected_memory_data): 66 | self.sim_msg = self.th.sim_message() 67 | for (a,ed) in expected_memory_data: 68 | self.sim_msg.send_value("tb_6502.imem",8,0,a) 69 | d = self.sim_msg.get_value(2) 70 | if (d!=ed): 71 | self.th.failtest(a,"Mismatch in data for %04x (got %02x expecte %02x)"%(a,d,ed)) 72 | pass 73 | pass 74 | pass 75 | 76 | -------------------------------------------------------------------------------- /regression/bbc_submodules2.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | #a Copyright 3 | # 4 | # This file 'bbc.py' copyright Gavin J Stark 2016 5 | # 6 | # This program is free software; you can redistribute it and/or modify it under 7 | # the terms of the GNU General Public License as published by the Free Software 8 | # Foundation, version 2.0. 9 | # 10 | # This program is distributed in the hope that it will be useful, 11 | # but WITHOUT ANY WARRANTY; without even implied warranty of MERCHANTABILITY 12 | # or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 | # for more details. 14 | 15 | #a Imports 16 | import sys, os, unittest 17 | import pycdl 18 | import bbc_submodules_hw 19 | 20 | #a Simulation test classes 21 | #c SimulationTestBase 22 | class SimulationTestBase(unittest.TestCase): 23 | def fred(self, hw, num_cycles, pass_fail=None): 24 | if "WAVES" in os.environ.keys(): 25 | waves = hw.waves() 26 | waves.reset() 27 | waves.open(hw.wave_file) 28 | waves.add_hierarchy(hw.wave_hierarchies) 29 | waves.enable() 30 | pass 31 | hw.reset() 32 | hw.set_run_time(num_cycles-100) 33 | hw.step(num_cycles) 34 | print "Stepped",num_cycles 35 | if pass_fail!=None: 36 | pass_fail() 37 | hw.step(1) 38 | pass 39 | return hw.passed() 40 | #f run_test 41 | def run_test(self, hw, num_cycles, **kwargs): 42 | test_passed = self.fred(hw=hw, num_cycles=num_cycles, **kwargs); 43 | self.assertTrue(test_passed) 44 | pass 45 | pass 46 | 47 | #a Crtc 6845 testing 48 | #c c_test_crtc6845 49 | class c_test_crtc6845(SimulationTestBase): 50 | #f test_init 51 | def test_init(self): 52 | hw = bbc_submodules_hw.hw_6845() 53 | self.run_test(hw, 2000000, pass_fail=lambda:hw.check_pass([])) 54 | pass 55 | #b All done 56 | 57 | #a FDC 8271 testing 58 | #c c_test_fdc8271 59 | class c_test_fdc8271(SimulationTestBase): 60 | #f test_init 61 | def test_init(self): 62 | hw = bbc_submodules_hw.hw_8271() 63 | self.run_test(hw, 5*1000*1000, pass_fail=lambda:hw.check_pass([])) 64 | pass 65 | #b All done 66 | -------------------------------------------------------------------------------- /roms/ps2_bbc_kbd.mif: -------------------------------------------------------------------------------- 1 | 01: 3f 2 | 03: 27 3 | 04: 1f 4 | 05: 0f 5 | 06: 17 6 | 09: 02 7 | 0a: 37 8 | 0b: 2f 9 | 0c: 21 10 | 0d: 06 11 | 0e: 41 12 | 12: 00 13 | 14: 08 14 | 15: 01 15 | 16: 03 16 | 1a: 0e 17 | 1b: 0d 18 | 1c: 0c 19 | 1d: 0a 20 | 1e: 0b 21 | 21: 15 22 | 22: 14 23 | 23: 13 24 | 24: 12 25 | 25: 11 26 | 26: 09 27 | 29: 16 28 | 2a: 1e 29 | 2b: 1c 30 | 2c: 1a 31 | 2d: 1b 32 | 2e: 19 33 | 31: 2d 34 | 32: 26 35 | 33: 25 36 | 34: 1d 37 | 35: 24 38 | 36: 23 39 | 3a: 2e 40 | 3b: 2c 41 | 3c: 2b 42 | 3d: 22 43 | 3e: 29 44 | 41: 36 45 | 42: 34 46 | 43: 2a 47 | 44: 33 48 | 45: 3a 49 | 46: 32 50 | 49: 3e 51 | 4a: 46 52 | 4b: 35 53 | 4c: 3d 54 | 4d: 3b 55 | 4e: 39 56 | 52: 44 57 | 54: 43 58 | 55: 42 59 | 58: 04 60 | 5a: 4c 61 | 5b: 45 62 | 5d: 47 63 | 66: 4d 64 | 76: 07 65 | 7e: 05 66 | 7f: 31 67 | eb: 49 68 | 91: 4e 69 | ec: 3c 70 | f2: 4a 71 | f4: 4f 72 | f5: 4b 73 | -------------------------------------------------------------------------------- /roms/src/apb_rom_riscv_start.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | import apb_rom 3 | import clock_divider 4 | from standard_apb_regs import * 5 | 6 | def program(defines): 7 | clk = apb_rom.get_define_int(defines,"clk",100) 8 | brg_config = clock_divider.config_for_frequency(f=0.1152*16, clk=clk, accuracy=0.005) 9 | 10 | program = {} 11 | program["code"] = [] 12 | program["code"] += [ 13 | (apb_rom.rom.op_set("address",apb_dprintf_uart_brg),), 14 | (apb_rom.rom.op_req("write_arg",brg_config),), 15 | #(apb_rom.rom.op_set("address",apb_uart_brg),), 16 | #(apb_rom.rom.op_req("write_arg",brg_config),), 17 | ] 18 | program["code"] += [ (apb_rom.rom.op_set("address",apb_rv_sram_control),), 19 | (apb_rom.rom.op_req("write_arg",1),), # Enable clock on RISC-V 20 | (apb_rom.rom.op_set("address",apb_rv_debug_dmcontrol),), 21 | (apb_rom.rom.op_req("write_arg",1),), # select HART 0 enable debug 22 | (apb_rom.rom.op_set("address",apb_rv_debug_data0),), 23 | (apb_rom.rom.op_req("write_arg",0),), # Set data0 to 0 24 | (apb_rom.rom.op_set("address",apb_rv_debug_abstract_cmd),), 25 | (apb_rom.rom.op_req("write_arg",0),), # set program counter to data0 26 | (apb_rom.rom.op_set("address",apb_rv_debug_dmcontrol),), 27 | (apb_rom.rom.op_req("write_arg",(1<<30)|1),), # Resume hart 28 | ] 29 | program["code"] += [ 30 | (apb_rom.rom.op_finish(),), 31 | ] 32 | return program 33 | -------------------------------------------------------------------------------- /roms/src/apb_rom_uart_tx.py: -------------------------------------------------------------------------------- 1 | import apb_rom 2 | import clock_divider 3 | from standard_apb_regs import * 4 | 5 | # 1 out of 17 6 | # brg_config = 0x80010010 7 | # 3 adds of 16 and 16 subs of 3 gets back again 8 | # so cycle of 19 and 3 so 3 out of 19 9 | #brg_config = 0x80030010 10 | #brg_config = 1 11 | #delay = (brg_config+2)*6*10 12 | 13 | def program(defines): 14 | clk = apb_rom.get_define_int(defines,"clk",100) 15 | brg_config = clock_divider.config_for_frequency(f=0.1152*16, clk=clk, accuracy=0.005) 16 | ns_per_clk = 1000. / clk 17 | delay = int(1000. * 1000. * 1000. / ns_per_clk) 18 | 19 | program = {} 20 | program["code"] = [] 21 | program["code"] += [ (apb_rom.rom.op_set("increment",4),), 22 | (apb_rom.rom.op_set("address",apb_uart_brg),), 23 | (apb_rom.rom.op_req("write_arg",brg_config),), 24 | (apb_rom.rom.op_set("address",apb_dprintf_uart_brg),), 25 | (apb_rom.rom.op_req("write_arg",brg_config),), 26 | (apb_rom.rom.op_set("address",apb_uart_hr),), 27 | (apb_rom.rom.op_set("accumulator",64),), 28 | (apb_rom.rom.op_req("write_acc",brg_config),("loop:",)), 29 | (apb_rom.rom.op_wait(delay),), 30 | (apb_rom.rom.op_req("read",brg_config),), 31 | (apb_rom.rom.op_alu("add",1),), 32 | (apb_rom.rom.op_branch("branch",0),("loop",)), 33 | ] 34 | program["code"] += [ 35 | (apb_rom.rom.op_finish(),), 36 | ] 37 | return program 38 | -------------------------------------------------------------------------------- /roms/src/clock_divider.py: -------------------------------------------------------------------------------- 1 | class diff: 2 | def __init__(self, add, sub): 3 | self.add=add 4 | self.sub=sub 5 | pass 6 | def value(self): 7 | return self.add / (self.add+self.sub+0.) 8 | def add_diff(self, other): 9 | return diff(self.add+other.add, self.sub+other.sub) 10 | def find_best_differential(target, max_add, max_subtract, accuracy=0.001): 11 | upper = diff(1,0) 12 | lower = diff(0,1) 13 | mid = diff(1,int(target-1)) 14 | while True: 15 | best_mid = mid 16 | error = mid.value()*target - 1 17 | if abs(error) < accuracy: break 18 | if error<0: # next step between mid and upper 19 | lower = mid 20 | mid = mid.add_diff(upper) 21 | pass 22 | else: # next step between mid and lower 23 | upper = mid 24 | mid = mid.add_diff(lower) 25 | pass 26 | if (mid.add > max_add) or (mid.sub > max_subtract): break 27 | pass 28 | mis = best_mid 29 | print "Best differential for",target,"of",mid.add, mid.sub, mid.value(), 1/mid.value() 30 | return (mid.add, mid.sub) 31 | 32 | def config_for_value(d, accuracy=0.00005): 33 | def get_err(add,sub): 34 | actual = (add+sub) / (add+0.) 35 | return abs(actual-d)/d 36 | d_int = int(d-1) 37 | err = get_err(1,d_int) 38 | if err> sys.stderr, "CS from GIT is ",cs_string 9 | pass 10 | return int(cs_string[:16],16) 11 | 12 | def dprintf_cs(cs): 13 | dprintf_data = [0]*8 14 | dprintf_data[0] = 0x48505320 15 | dprintf_data[1] = 0x46504741 16 | dprintf_data[2] = 0x0343533a # 03 -> green (teletext) 17 | dprintf_data[3] = 0x8f000000 | ((cs>>40)&0xffffff) 18 | dprintf_data[4] = (cs>> 8)&0xffffffff 19 | dprintf_data[5] = (((cs>> 0)&0xff) << 24) | 0xffffff 20 | dprintf_data[6] = 0xffffffff 21 | return dprintf_data 22 | 23 | -------------------------------------------------------------------------------- /scripts/bitbang.cfg: -------------------------------------------------------------------------------- 1 | interface remote_bitbang 2 | remote_bitbang_port 9999 3 | remote_bitbang_host 127.0.0.1 4 | 5 | set _CHIPNAME riscv 6 | jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0xabcde6e3 7 | #jtag newtap auto0 tap -irlen 5 -expected-id 0xabcde6e3 8 | 9 | set _TARGETNAME $_CHIPNAME.cpu 10 | # try one of arm7tdmi, arm9tdmi, arm920t, arm720t, arm966e, arm946e, arm926ejs, fa526, feroceon, dragonite, xscale, cortex_m, cortex_a, cortex_r4, arm11, ls1_sap, mips_m4k, avr, dsp563xx, dsp5680xx, testee, avr32_ap7k, hla_target, nds32_v2, nds32_v3, nds32_v3m, or1k, quark_x10xx, or quark_d20xx 11 | target create $_TARGETNAME riscv -chain-position $_TARGETNAME 12 | $_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1 13 | 14 | scan_chain 15 | 16 | # drscan tap_name [num_bits value]* ['-endstate' state_name] 17 | # Execute Data Register (DR) scan for one TAP. Other TAPs must be in 18 | # BYPASS mode. 19 | # irscan [tap_name instruction]* ['-endstate' state_name] 20 | # 21 | # Clear APB timer errors 22 | # irscan riscv.cpu 16 23 | # drscan riscv.cpu 32 0xffff0000 24 | # 25 | # Read APB timer 26 | # irscan riscv.cpu 17 27 | # drscan riscv.cpu 50 0x1 28 | # irscan riscv.cpu 17 29 | # drscan riscv.cpu 50 0x0 30 | proc apb_read_timer { } { 31 | irscan riscv.cpu 17 32 | drscan riscv.cpu 50 0x1 33 | irscan riscv.cpu 17 34 | drscan riscv.cpu 50 0x0 35 | } 36 | --------------------------------------------------------------------------------