├── .github └── ISSUE_TEMPLATE │ ├── bug_report.md │ └── feature_request.md ├── .gitignore ├── FreeMASTER_Prjct ├── BLDC_Ctrl_MBD.pmpx ├── FOC_Cctrl_MBD_Integration.pmpx ├── FOC_Ctrl_MBD.pmpx └── README.md ├── LICENSE ├── MBD_Models ├── BLDC_Ctrl_MBD │ ├── BLDC_Ctrl_MBD.slx │ └── struct_BLDC_Crtl.mat ├── FOC_Ctrl_MBD │ ├── FOC_Config.m │ ├── FOC_Ctrl_CodeModel.slx │ ├── FOC_Ctrl_MBD.slx │ ├── FOC_PIL_Algth_model.slx │ ├── FOC_PIL_Algth_top.slx │ ├── FOC_PIL_StateMch_model.slx │ ├── FOC_PIL_StateMch_top.slx │ ├── FOC_Sub_CoreAlgoithm.slx │ ├── FOC_Sub_StateMch.slx │ └── struct_FOC_Crtl.mat ├── FOC_basic │ ├── FOC_basic.m │ ├── FOC_basic1_OrientedCtrl.slx │ ├── FOC_basic2_VoltageCtrl.slx │ ├── FOC_basic3_CurrentCtrl.slx │ ├── FOC_basic4_CurrentCtrl_SVPWM.slx │ └── FOC_basic5_SpeedCtrl.slx └── README.md ├── README.md ├── Record_Pictures ├── BLDCctrl-FreeMstr-DutyWave.png ├── BLDCctrl-FreeMstr-HallWave.png ├── BLDCctrl-Model-overview.png ├── BLDC速度闭环跟踪.png ├── FOC-Algorithm-Overview.png ├── FOC-PIL-Overview.png ├── Flux无感位置观测.png ├── 三相占空比.png ├── 三相电流-带载.png ├── 三相电流-空载.png ├── 无感启动过程.png └── 无感速度闭环控制.png └── S32DS_Prjct ├── BLDC_Ctrl_MBD_DS ├── .cproject ├── .project ├── .settings │ ├── com.nxp.s32ds.cle.runtime.component.prefs │ ├── com.processorexpert.core.ide.newprojectwizard.prefs │ ├── org.eclipse.cdt.codan.core.prefs │ └── org.eclipse.cdt.core.prefs └── Project_Settings │ ├── Debugger │ └── BLDC_Ctrl_MBD_DS_Debug_FLASH_PNE.launch │ └── Linker_Files │ ├── S32K144_64_flash.ld │ └── S32K144_64_ram.ld ├── FOC_Ctrl_MBD_Integration ├── .cproject ├── .project ├── .settings │ ├── com.freescale.s32ds.cross.sdk.support.prefs │ ├── com.freescale.s32ds.cross.wizard.prefs │ ├── com.nxp.s32ds.cle.ide.sdk.attached.sdks.data.prefs │ ├── com.nxp.s32ds.cle.runtime.component.prefs │ ├── com.processorexpert.core.ide.newprojectwizard.prefs │ ├── org.eclipse.cdt.codan.core.prefs │ └── org.eclipse.cdt.core.prefs ├── Documentation │ ├── FOC_Ctrl_MBD_Integration.txt │ └── FOC_Ctrl_MBD_Integration_Settings.xml ├── Generated_Code │ ├── Cpu.c │ ├── Cpu.h │ ├── adConv1.c │ ├── adConv1.h │ ├── adConv2.c │ ├── adConv2.h │ ├── clockMan1.c │ ├── clockMan1.h │ ├── dmaController1.c │ ├── dmaController1.h │ ├── flexTimer_pwm1.c │ ├── flexTimer_pwm1.h │ ├── lpit1.c │ ├── lpit1.h │ ├── lpspiCom1.c │ ├── lpspiCom1.h │ ├── lpuart1.c │ ├── lpuart1.h │ ├── pdb1.c │ ├── pdb1.h │ ├── pdb2.c │ ├── pdb2.h │ ├── pin_mux.c │ ├── pin_mux.h │ ├── pwrMan1.c │ ├── pwrMan1.h │ ├── trgmux1.c │ └── trgmux1.h ├── ProcessorExpert.pe ├── Project_Settings │ ├── Debugger │ │ ├── FOC_Ctrl_MBD_Integration_Debug_FLASH_PNE.launch │ │ ├── FOC_Ctrl_MBD_Integration_Debug_RAM_PNE.launch │ │ ├── FOC_Ctrl_MBD_Integration_Release_FLASH_PNE.launch │ │ └── FOC_Ctrl_MBD_Integration_Release_RAM_PNE.launch │ ├── Linker_Files │ │ ├── S32K144_64_flash.ld │ │ └── S32K144_64_ram.ld │ └── Startup_Code │ │ └── startup_S32K144.S ├── SDK │ ├── platform │ │ ├── devices │ │ │ ├── S32K144 │ │ │ │ ├── include │ │ │ │ │ ├── S32K144.h │ │ │ │ │ └── S32K144_features.h │ │ │ │ └── startup │ │ │ │ │ ├── system_S32K144.c │ │ │ │ │ └── system_S32K144.h │ │ │ ├── callbacks.h │ │ │ ├── common │ │ │ │ └── s32_core_cm4.h │ │ │ ├── devassert.h │ │ │ ├── device_registers.h │ │ │ ├── startup.c │ │ │ ├── startup.h │ │ │ └── status.h │ │ └── drivers │ │ │ ├── inc │ │ │ ├── adc_driver.h │ │ │ ├── clock.h │ │ │ ├── clock_manager.h │ │ │ ├── edma_driver.h │ │ │ ├── ftm_common.h │ │ │ ├── ftm_pwm_driver.h │ │ │ ├── interrupt_manager.h │ │ │ ├── lpit_driver.h │ │ │ ├── lpspi_master_driver.h │ │ │ ├── lpspi_shared_function.h │ │ │ ├── lpspi_slave_driver.h │ │ │ ├── lpuart_driver.h │ │ │ ├── pdb_driver.h │ │ │ ├── pins_driver.h │ │ │ ├── power_manager.h │ │ │ └── trgmux_driver.h │ │ │ └── src │ │ │ ├── adc │ │ │ ├── adc_driver.c │ │ │ └── adc_hw_access.h │ │ │ ├── clock │ │ │ └── S32K1xx │ │ │ │ ├── clock_S32K1xx.c │ │ │ │ ├── clock_S32K1xx.h │ │ │ │ ├── pcc_hw_access.h │ │ │ │ ├── pmc_hw_access.h │ │ │ │ ├── scg_hw_access.h │ │ │ │ ├── sim_hw_access.h │ │ │ │ └── smc_hw_access.h │ │ │ ├── edma │ │ │ ├── edma_driver.c │ │ │ ├── edma_hw_access.c │ │ │ ├── edma_hw_access.h │ │ │ ├── edma_irq.c │ │ │ └── edma_irq.h │ │ │ ├── ftm │ │ │ ├── ftm_common.c │ │ │ ├── ftm_hw_access.c │ │ │ ├── ftm_hw_access.h │ │ │ └── ftm_pwm_driver.c │ │ │ ├── interrupt │ │ │ └── interrupt_manager.c │ │ │ ├── lpit │ │ │ ├── lpit_driver.c │ │ │ └── lpit_hw_access.h │ │ │ ├── lpspi │ │ │ ├── lpspi_hw_access.c │ │ │ ├── lpspi_hw_access.h │ │ │ ├── lpspi_irq.c │ │ │ ├── lpspi_master_driver.c │ │ │ ├── lpspi_shared_function.c │ │ │ └── lpspi_slave_driver.c │ │ │ ├── lpuart │ │ │ ├── lpuart_driver.c │ │ │ ├── lpuart_hw_access.c │ │ │ ├── lpuart_hw_access.h │ │ │ ├── lpuart_irq.c │ │ │ └── lpuart_irq.h │ │ │ ├── pdb │ │ │ ├── pdb_driver.c │ │ │ ├── pdb_hw_access.c │ │ │ └── pdb_hw_access.h │ │ │ ├── pins │ │ │ ├── pins_driver.c │ │ │ ├── pins_gpio_hw_access.h │ │ │ ├── pins_port_hw_access.c │ │ │ └── pins_port_hw_access.h │ │ │ ├── power │ │ │ ├── S32K1xx │ │ │ │ ├── power_manager_S32K1xx.c │ │ │ │ ├── power_manager_S32K1xx.h │ │ │ │ ├── power_rcm_hw_access.h │ │ │ │ ├── power_scg_hw_access.h │ │ │ │ ├── power_smc_hw_access.c │ │ │ │ └── power_smc_hw_access.h │ │ │ └── power_manager.c │ │ │ └── trgmux │ │ │ ├── trgmux_driver.c │ │ │ ├── trgmux_hw_access.c │ │ │ └── trgmux_hw_access.h │ └── rtos │ │ └── osif │ │ ├── osif.h │ │ └── osif_baremetal.c ├── Sources │ ├── GD3000 │ │ ├── aml │ │ │ ├── common_aml.h │ │ │ ├── gpio_aml.h │ │ │ ├── readme.txt │ │ │ ├── spi_aml │ │ │ │ ├── spi_aml.c │ │ │ │ └── spi_aml.h │ │ │ └── wait_aml │ │ │ │ ├── wait_aml.c │ │ │ │ └── wait_aml.h │ │ ├── gd3000_init.c │ │ ├── gd3000_init.h │ │ └── tpp │ │ │ ├── tpp.c │ │ │ ├── tpp.h │ │ │ └── tpp_mc33937.h │ ├── ISR.c │ ├── MCU_Init.c │ ├── MCU_Init.h │ └── main.c └── include │ └── freemaster_cfg.h └── README.md /.github/ISSUE_TEMPLATE/bug_report.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: Bug report 3 | about: Create a report to help us improve 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | 8 | --- 9 | 10 | **Describe the bug** 11 | A clear and concise description of what the bug is. 12 | 13 | **To Reproduce** 14 | Steps to reproduce the behavior: 15 | 1. Go to '...' 16 | 2. Click on '....' 17 | 3. Scroll down to '....' 18 | 4. See error 19 | 20 | **Expected behavior** 21 | A clear and concise description of what you expected to happen. 22 | 23 | **Screenshots** 24 | If applicable, add screenshots to help explain your problem. 25 | 26 | **Desktop (please complete the following information):** 27 | - OS: [e.g. iOS] 28 | - Browser [e.g. chrome, safari] 29 | - Version [e.g. 22] 30 | 31 | **Smartphone (please complete the following information):** 32 | - Device: [e.g. iPhone6] 33 | - OS: [e.g. iOS8.1] 34 | - Browser [e.g. stock browser, safari] 35 | - Version [e.g. 22] 36 | 37 | **Additional context** 38 | Add any other context about the problem here. 39 | -------------------------------------------------------------------------------- /.github/ISSUE_TEMPLATE/feature_request.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: Feature request 3 | about: Suggest an idea for this project 4 | title: '' 5 | labels: '' 6 | assignees: '' 7 | 8 | --- 9 | 10 | **Is your feature request related to a problem? Please describe.** 11 | A clear and concise description of what the problem is. Ex. I'm always frustrated when [...] 12 | 13 | **Describe the solution you'd like** 14 | A clear and concise description of what you want to happen. 15 | 16 | **Describe alternatives you've considered** 17 | A clear and concise description of any alternative solutions or features you've considered. 18 | 19 | **Additional context** 20 | Add any other context or screenshots about the feature request here. 21 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Prerequisites 2 | *.d 3 | 4 | # Object files 5 | *.o 6 | *.ko 7 | *.obj 8 | *.elf 9 | 10 | # Linker output 11 | *.ilk 12 | *.map 13 | *.exp 14 | 15 | # Precompiled Headers 16 | *.gch 17 | *.pch 18 | 19 | # Libraries 20 | *.lib 21 | *.a 22 | *.la 23 | *.lo 24 | 25 | # Shared objects (inc. Windows DLLs) 26 | *.dll 27 | *.so 28 | *.so.* 29 | *.dylib 30 | 31 | # Executables 32 | *.exe 33 | *.out 34 | *.app 35 | *.i*86 36 | *.x86_64 37 | *.hex 38 | 39 | # Debug files 40 | *.dSYM/ 41 | *.su 42 | *.idb 43 | *.pdb 44 | 45 | # Kernel Module Compile Results 46 | *.mod* 47 | *.cmd 48 | .tmp_versions/ 49 | modules.order 50 | Module.symvers 51 | Mkfile.old 52 | dkms.conf 53 | 54 | # MATLAB unused 55 | slprj 56 | TestFolder 57 | *.slxc 58 | *.mexw64 59 | *.autosave 60 | temp.slx 61 | *_mbd_rtw 62 | *_ert_rtw 63 | 64 | # S32DS unused 65 | Debug_FLASH 66 | Debug_RAM 67 | Release_FLASH 68 | Release_RAM 69 | *.g_c 70 | *.g_x 71 | language.settings.xml 72 | 73 | -------------------------------------------------------------------------------- /FreeMASTER_Prjct/README.md: -------------------------------------------------------------------------------- 1 | 2 | # FreeMASTER工程文件 3 | 4 | ## 文件描述 5 | 本目录下包含三个FreeMASTER工程文件，分别用于BLDC、FOC和FOC Integration三个电机控制软件的实时调试，可以实时查看电流、电压等信号量。 6 | 7 | *更多信息，请关注autoMBD公众号和知乎账号发布的文章。* -------------------------------------------------------------------------------- /MBD_Models/BLDC_Ctrl_MBD/BLDC_Ctrl_MBD.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/MBD_Models/BLDC_Ctrl_MBD/BLDC_Ctrl_MBD.slx -------------------------------------------------------------------------------- /MBD_Models/BLDC_Ctrl_MBD/struct_BLDC_Crtl.mat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/MBD_Models/BLDC_Ctrl_MBD/struct_BLDC_Crtl.mat -------------------------------------------------------------------------------- /MBD_Models/FOC_Ctrl_MBD/FOC_Config.m: -------------------------------------------------------------------------------- 1 | clear;clc; 2 | 3 | %% Load Structures 4 | load('struct_FOC_Crtl.mat'); 5 | 6 | %% Model parameters 7 | Ts = 0.0001; 8 | Tctr = 0.0000625; 9 | Ts_PIL = 0.0000125; 10 | Fpwm = 16000; 11 | Ts_simscape = 1/40000000; 12 | 13 | %% Motor parameters 14 | motor.DC = 12; % [V] 15 | motor.Rs = 0.56; % [ohm] 16 | motor.Ld = 0.000375; % [H] 17 | motor.Lq = 0.000435; % [H] 18 | motor.L0 = (motor.Ld + motor.Ld)/2; % [H] 19 | motor.Prs = 2; % [-] 20 | motor.Flux = 0.0039052261; % [Wb] 21 | motor.J = 0.12e-4; % [Kg.m^2] 22 | motor.B = 0.0005; % [N.m.s/rad] 23 | motor.Tf = 0; % [N.m] 24 | motor.Kt = 1.5*motor.Flux*motor.Prs; % Torque constant [N.m/A] 25 | motor.Ke = sqrt(3)*1000*motor.Prs*2*pi/60*motor.Flux; % Back-emf [V/krpm] 26 | 27 | %% Current Controller 28 | % D axis PI design 29 | innerPI.iD.f0 = 200; 30 | innerPI.iD.w0 = 2*pi*innerPI.iD.f0; 31 | innerPI.iD.ksi = 1; 32 | 33 | innerPI.iD.Continuous.Kp = 2*innerPI.iD.ksi*innerPI.iD.w0*motor.Ld - motor.Rs; 34 | innerPI.iD.Continuous.Ki = innerPI.iD.w0^2*motor.Ld; 35 | innerPI.iD.Continuous.Kzc = innerPI.iD.Continuous.Kp/innerPI.iD.Continuous.Ki; 36 | 37 | innerPI.iD.Discrete.Kp = 10; 38 | innerPI.iD.Discrete.Ki = 480; 39 | innerPI.iD.Discrete.KiTctr = innerPI.iD.Discrete.Ki*Tctr; 40 | 41 | % Q axis PI design 42 | innerPI.iQ.f0 = 200; 43 | innerPI.iQ.w0 = 2*pi*innerPI.iQ.f0; 44 | innerPI.iQ.ksi = 1; 45 | 46 | innerPI.iQ.Continuous.Kp = 2*innerPI.iQ.ksi*innerPI.iQ.w0*motor.Lq - motor.Rs; 47 | innerPI.iQ.Continuous.Ki = innerPI.iQ.w0^2*motor.Lq; 48 | innerPI.iQ.Continuous.Kzc = innerPI.iQ.Continuous.Kp/innerPI.iQ.Continuous.Ki; 49 | 50 | innerPI.iQ.Discrete.Kp = 10; 51 | innerPI.iQ.Discrete.Ki = 640; 52 | innerPI.iQ.Discrete.KiTctr = innerPI.iQ.Discrete.Ki*Tctr; 53 | 54 | %% Speed Controller 55 | outerPI.Spd.f0 = 4; 56 | outerPI.Spd.w0 = 2*pi*outerPI.Spd.f0; 57 | outerPI.Spd.ksi = 1; 58 | 59 | outerPI.Spd.Continuous.Kp = (2*outerPI.Spd.ksi*outerPI.Spd.w0*motor.J - motor.B)/motor.Kt; 60 | outerPI.Spd.Continuous.Ki = outerPI.Spd.w0^2*motor.J/motor.Kt; 61 | outerPI.Spd.Continuous.Kzc = outerPI.Spd.Continuous.Kp/outerPI.Spd.Continuous.Ki; 62 | 63 | outerPI.Spd.Discrete.Kp = 0.07; 64 | outerPI.Spd.Discrete.Ki = 0.32; 65 | outerPI.Spd.Discrete.KiTctr = outerPI.Spd.Discrete.Ki*Tctr; 66 | 67 | -------------------------------------------------------------------------------- /MBD_Models/FOC_Ctrl_MBD/FOC_Ctrl_CodeModel.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/MBD_Models/FOC_Ctrl_MBD/FOC_Ctrl_CodeModel.slx -------------------------------------------------------------------------------- /MBD_Models/FOC_Ctrl_MBD/FOC_Ctrl_MBD.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/MBD_Models/FOC_Ctrl_MBD/FOC_Ctrl_MBD.slx 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-------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/MBD_Models/FOC_Ctrl_MBD/FOC_Sub_StateMch.slx -------------------------------------------------------------------------------- /MBD_Models/FOC_Ctrl_MBD/struct_FOC_Crtl.mat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/MBD_Models/FOC_Ctrl_MBD/struct_FOC_Crtl.mat -------------------------------------------------------------------------------- /MBD_Models/FOC_basic/FOC_basic.m: -------------------------------------------------------------------------------- 1 | clear;clc; 2 | %% Model parameters 3 | Ts = 0.00001; 4 | 5 | %% Motor parameters 6 | motor.DC = 12; % [V] 7 | motor.Rs = 0.56; % [ohm] 8 | motor.Ld = 0.000375; % [H] 9 | motor.Lq = 0.000435; % [H] 10 | motor.L0 = (motor.Ld + motor.Ld)/2; % [H] 11 | motor.Prs = 2; % [-] 12 | motor.Flux = 0.0039052261; % [Wb] 13 | motor.J = 0.12e-4; % [Kg.m^2] 14 | motor.B = 0.0005; % [N.m.s/rad] 15 | motor.Tf = 0.001; % [N.m] 16 | motor.Kt = 1.5*motor.Flux*motor.Prs; % Torque constant [N.m/A] 17 | motor.Ke = sqrt(3)*1000*motor.Prs*2*pi/60*motor.Flux; % Back-emf [V/krpm] 18 | 19 | %% Current Controller 20 | % D axis PI design 21 | innerPI.iD.f0 = 200; 22 | innerPI.iD.w0 = 2*pi*innerPI.iD.f0; 23 | innerPI.iD.ksi = 1; 24 | 25 | innerPI.iD.Continuous.Kp = 2*innerPI.iD.ksi*innerPI.iD.w0*motor.Ld - motor.Rs; 26 | innerPI.iD.Continuous.Ki = innerPI.iD.w0^2*motor.Ld; 27 | innerPI.iD.Continuous.Kzc = innerPI.iD.Continuous.Kp/innerPI.iD.Continuous.Ki; 28 | 29 | % Q axis PI design 30 | innerPI.iQ.f0 = 200; 31 | innerPI.iQ.w0 = 2*pi*innerPI.iQ.f0; 32 | innerPI.iQ.ksi = 1; 33 | 34 | innerPI.iQ.Continuous.Kp = 2*innerPI.iQ.ksi*innerPI.iQ.w0*motor.Lq - motor.Rs; 35 | innerPI.iQ.Continuous.Ki = innerPI.iQ.w0^2*motor.Lq; 36 | innerPI.iQ.Continuous.Kzc = innerPI.iQ.Continuous.Kp/innerPI.iQ.Continuous.Ki; 37 | 38 | %% Speed Controller 39 | outerPI.Spd.f0 = 20; 40 | outerPI.Spd.w0 = 2*pi*outerPI.Spd.f0; 41 | outerPI.Spd.ksi = 1; 42 | 43 | outerPI.Spd.Continuous.Kp = (2*outerPI.Spd.ksi*outerPI.Spd.w0*motor.J - motor.B)/motor.Kt; 44 | outerPI.Spd.Continuous.Ki = outerPI.Spd.w0^2*motor.J/motor.Kt; 45 | outerPI.Spd.Continuous.Kzc = outerPI.Spd.Continuous.Kp/outerPI.Spd.Continuous.Ki; 46 | -------------------------------------------------------------------------------- /MBD_Models/FOC_basic/FOC_basic1_OrientedCtrl.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/MBD_Models/FOC_basic/FOC_basic1_OrientedCtrl.slx -------------------------------------------------------------------------------- /MBD_Models/FOC_basic/FOC_basic2_VoltageCtrl.slx: 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-------------------------------------------------------------------------------- /MBD_Models/FOC_basic/FOC_basic5_SpeedCtrl.slx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/MBD_Models/FOC_basic/FOC_basic5_SpeedCtrl.slx -------------------------------------------------------------------------------- /MBD_Models/README.md: -------------------------------------------------------------------------------- 1 | 2 | # MBD模型 3 | 4 | ## 文件描述 5 | 本目录下一共包含三个文件夹：**BLDC_Ctrl_MBD**和**FOC_Ctrl_MBD**目录下的模型是基于MBD的电机控制框架模型，实现了PIL、HIL测试和验证；**FOC_basic**目录下的是FOC算法的基本模型，供读者参考。 6 | 7 | *更多信息，请关注autoMBD公众号和知乎账号发布的文章。* -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | 2 | # autoMBD: Motor Control 3 | 4 | ## 项目描述 5 | AMBD-MC（autoMBD Motor Control project）是autoMBD的第一个开源项目，该项目基于MBD（Model-Based Design，基于模型的设计）实现电机控制框架。 6 | 7 | 仓库中包含BLDC/PMSM控制算法的MBD模型，分别实现了六步换相算法和矢量控制（FOC）算法。模型在NXP的电机开发套件平台上，实现了PIL（处理器在环）验证、HIL（硬件在环）验证。 8 | 9 | ## 仓库结构 10 | * FreeMASTER_Prjct/ 11 | * BLDC_Ctrl_MBD.pmpx 12 | * FOC_Cctrl_MBD_Integration.pmpx 13 | * FOC_Ctrl_MBD.pmpx 14 | * MBD_Models/ 15 | * BLDC_Ctrl_MBD/ 16 | * BLDC_Ctrl_MBD.slx 17 | * struct_BLDC_Crtl.mat 18 | * FOC_basic/ 19 | * FOC_basic.m 20 | * FOC_basic1_OrientedCtrl.slx 21 | * FOC_basic2_VoltageCtrl.slx 22 | * FOC_basic3_CurrentCtrl.slx 23 | * FOC_basic4_CurrentCtrl_SVPWM.slx 24 | * FOC_basic5_SpeedCtrl.slx 25 | * FOC_Ctrl_MBD/ 26 | * FOC_Config.m 27 | * FOC_Ctrl_CodeModel.slx 28 | * FOC_Ctrl_MBD.slx 29 | * FOC_PIL_Algth_model.slx 30 | * FOC_PIL_Algth_top.slx 31 | * FOC_PIL_StateMch_model.slx 32 | * FOC_PIL_StateMch_top.slx 33 | * FOC_Sub_CoreAlgoithm.slx 34 | * FOC_Sub_StateMch.slx 35 | * struct_FOC_Crtl.mat 36 | * Record_Pictures/ 37 | * S32DS_Prjct/ 38 | * BLDC_Ctrl_MBD_DS/ 39 | * FOC_Ctrl_MBD_Integration/ 40 | 41 | ## BLDC模型 42 | 基于MBD电机控制框架，实现了BLDC六步换相算法。 43 | * BLDC完整模型预览 44 | ![MBD-BLDC](Record_Pictures/BLDCctrl-Model-overview.png) 45 | * BLDC运行结果预览 46 | ![MBD-BLDC](Record_Pictures/BLDCctrl-FreeMstr-DutyWave.png) 47 | 48 | ## PMSM模型 49 | 基于MBD电机控制框架，实现了FOC无感算法。 50 | * FOC算法模型预览 51 | ![MBD-BLDC](Record_Pictures/FOC-Algorithm-Overview.png) 52 | * PIL测试模型预览 53 | ![MBD-BLDC](Record_Pictures/FOC-PIL-Overview.png) 54 | * 运行结果预览 55 | ![MBD-BLDC](Record_Pictures/三相电流-带载.png) 56 | -------------------------------------------------------------------------------- /Record_Pictures/BLDCctrl-FreeMstr-DutyWave.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/Record_Pictures/BLDCctrl-FreeMstr-DutyWave.png -------------------------------------------------------------------------------- /Record_Pictures/BLDCctrl-FreeMstr-HallWave.png: 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/Record_Pictures/FOC-Algorithm-Overview.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/Record_Pictures/FOC-Algorithm-Overview.png -------------------------------------------------------------------------------- /Record_Pictures/FOC-PIL-Overview.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/Record_Pictures/FOC-PIL-Overview.png -------------------------------------------------------------------------------- /Record_Pictures/Flux无感位置观测.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/Record_Pictures/Flux无感位置观测.png -------------------------------------------------------------------------------- /Record_Pictures/三相占空比.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/Record_Pictures/三相占空比.png -------------------------------------------------------------------------------- /Record_Pictures/三相电流-带载.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/Record_Pictures/三相电流-带载.png -------------------------------------------------------------------------------- /Record_Pictures/三相电流-空载.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/Record_Pictures/三相电流-空载.png -------------------------------------------------------------------------------- /Record_Pictures/无感启动过程.png: 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environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.exe.debug.863422777/PATH/delimiter=; 3 | environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.exe.debug.863422777/PATH/operation=prepend 4 | environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.exe.debug.863422777/PATH/value= 5 | environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.exe.debug.863422777/append=true 6 | environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.exe.debug.863422777/appendContributed=true 7 | environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.exe.debug.ram.583608019/PATH/delimiter=; 8 | environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.exe.debug.ram.583608019/PATH/operation=prepend 9 | environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.exe.debug.ram.583608019/PATH/value= 10 | environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.exe.debug.ram.583608019/append=true 11 | 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environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.exe.release.ram.305161552/append=true 21 | environment/project/com.nxp.s32ds.cle.arm.mbs.arm32.bare.exe.release.ram.305161552/appendContributed=true 22 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/Cpu.c: -------------------------------------------------------------------------------- 1 | /** ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : Cpu.c 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : S32K144_100 7 | ** Version : Component 01.197, Driver 01.00, CPU db: 3.00.000 8 | ** Datasheet : S32K14XRM Rev. 2, 02/2017 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Abstract : 12 | ** 13 | ** Settings : 14 | ** 15 | ** Contents : 16 | ** SystemInit - void SystemInit(void); 17 | ** SystemCoreClockUpdate - void SystemCoreClockUpdate(void); 18 | ** SystemSoftwareReset - void SystemSoftwareReset(void); 19 | ** 20 | ** (c) Freescale Semiconductor, Inc. 21 | ** 2004 All Rights Reserved 22 | ** 23 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 24 | ** Copyright 2016-2017 NXP 25 | ** All Rights Reserved. 26 | ** 27 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 28 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 29 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 37 | ** THE POSSIBILITY OF SUCH DAMAGE. 38 | ** ###################################################################*/ 39 | /*! 40 | ** @file Cpu.c 41 | ** @version 01.00 42 | ** @brief 43 | ** 44 | */ 45 | /*! 46 | ** @addtogroup Cpu_module Cpu module documentation 47 | ** @{ 48 | */ 49 | 50 | /* MODULE Cpu. */ 51 | 52 | /* {Default RTOS Adapter} No RTOS includes */ 53 | #include "Cpu.h" 54 | 55 | #ifdef __cplusplus 56 | extern "C" { 57 | #endif 58 | 59 | /* TBD Cpu configuration will be generated here. */ 60 | 61 | #ifdef __cplusplus 62 | } 63 | #endif 64 | 65 | /* END Cpu. */ 66 | 67 | /*! 68 | ** @} 69 | */ 70 | /* 71 | ** ################################################################### 72 | ** 73 | ** This file was created by Processor Expert 10.1 [05.21] 74 | ** for the Freescale S32K series of microcontrollers. 75 | ** 76 | ** ################################################################### 77 | */ 78 | 79 | 80 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/Cpu.h: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : Cpu.h 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : S32K144_100 7 | ** Version : Component 01.197, Driver 01.00, CPU db: 3.00.000 8 | ** Datasheet : S32K14XRM Rev. 2, 02/2017 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Abstract : 12 | ** 13 | ** Settings : 14 | ** 15 | ** Contents : 16 | ** SystemInit - void SystemInit(void); 17 | ** SystemCoreClockUpdate - void SystemCoreClockUpdate(void); 18 | ** SystemSoftwareReset - void SystemSoftwareReset(void); 19 | ** 20 | ** (c) Freescale Semiconductor, Inc. 21 | ** 2004 All Rights Reserved 22 | ** 23 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 24 | ** Copyright 2016-2017 NXP 25 | ** All Rights Reserved. 26 | ** 27 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 28 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 29 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 37 | ** THE POSSIBILITY OF SUCH DAMAGE. 38 | ** ###################################################################*/ 39 | /*! 40 | ** @file Cpu.h 41 | ** @version 01.00 42 | ** @brief 43 | ** 44 | */ 45 | /*! 46 | ** @addtogroup Cpu_module Cpu module documentation 47 | ** @{ 48 | */ 49 | 50 | #ifndef Cpu_H 51 | #define Cpu_H 52 | 53 | 54 | /* MODULE Cpu. */ 55 | 56 | 57 | /*Include shared modules, which are used for whole project*/ 58 | #include "device_registers.h" 59 | 60 | #include "interrupt_manager.h" 61 | #include "clock.h" 62 | #include "power_manager.h" 63 | #include "osif.h" 64 | #include "edma_driver.h" 65 | #include "lpuart_driver.h" 66 | #include "ftm_pwm_driver.h" 67 | #include "trgmux_driver.h" 68 | #include "pdb_driver.h" 69 | #include "adc_driver.h" 70 | #include "lpspi_master_driver.h" 71 | #include "lpspi_slave_driver.h" 72 | #include "lpspi_shared_function.h" 73 | #include "lpit_driver.h" 74 | #include "system_S32K144.h" 75 | 76 | /* Including needed modules to compile this module/procedure */ 77 | #include "clockMan1.h" 78 | #include "pwrMan1.h" 79 | #include "lpuart1.h" 80 | #include "flexTimer_pwm1.h" 81 | #include "trgmux1.h" 82 | #include "pdb1.h" 83 | #include "pdb2.h" 84 | #include "adConv1.h" 85 | #include "adConv2.h" 86 | #include "lpspiCom1.h" 87 | #include "lpit1.h" 88 | #include "pin_mux.h" 89 | #include "dmaController1.h" 90 | 91 | #ifdef __cplusplus 92 | extern "C" { 93 | #endif 94 | 95 | /* TBD Cpu configuration will be declared here. */ 96 | 97 | 98 | 99 | 100 | #ifdef __cplusplus 101 | } 102 | #endif 103 | 104 | /* END Cpu. */ 105 | 106 | #endif 107 | /* Cpu_H */ 108 | 109 | /*! 110 | ** @} 111 | */ 112 | /* 113 | ** ################################################################### 114 | ** 115 | ** This file was created by Processor Expert 10.1 [05.21] 116 | ** for the Freescale S32K series of microcontrollers. 117 | ** 118 | ** ################################################################### 119 | */ 120 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/adConv1.c: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : adConv1.c 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : adc 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** 12 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 13 | ** Copyright 2016-2017 NXP 14 | ** All Rights Reserved. 15 | ** 16 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 17 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 20 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 | ** THE POSSIBILITY OF SUCH DAMAGE. 27 | ** ###################################################################*/ 28 | /*! 29 | ** @file adConv1.c 30 | ** @version 01.00 31 | */ 32 | /*! 33 | ** @addtogroup adConv1_module adConv1 module documentation 34 | ** @{ 35 | */ 36 | 37 | /* MODULE adConv1. */ 38 | 39 | /** 40 | * @page misra_violations MISRA-C:2012 violations 41 | * 42 | * @section [global] 43 | * Violates MISRA 2012 Advisory Rule 8.7, External could be made static. 44 | * Function is defined for usage by application code. 45 | * 46 | */ 47 | #include "adConv1.h" 48 | 49 | /*! adConv1 configuration structure */ 50 | const adc_converter_config_t adConv1_ConvConfig0 = { 51 | .clockDivide = ADC_CLK_DIVIDE_1, 52 | .sampleTime = 12U, 53 | .resolution = ADC_RESOLUTION_12BIT, 54 | .inputClock = ADC_CLK_ALT_1, 55 | .trigger = ADC_TRIGGER_HARDWARE, 56 | .pretriggerSel = ADC_PRETRIGGER_SEL_PDB, 57 | .triggerSel = ADC_TRIGGER_SEL_PDB, 58 | .dmaEnable = false, 59 | .voltageRef = ADC_VOLTAGEREF_VREF, 60 | .continuousConvEnable = false, 61 | .supplyMonitoringEnable = false, 62 | }; 63 | 64 | const adc_chan_config_t adConv1_ChnConfig0 = { 65 | .interruptEnable = false, 66 | .channel = ADC_INPUTCHAN_VREFSH, 67 | }; 68 | 69 | const adc_chan_config_t adConv1_ChnConfig1 = { 70 | .interruptEnable = false, 71 | .channel = ADC_INPUTCHAN_EXT12, 72 | }; 73 | 74 | const adc_chan_config_t adConv1_ChnConfig2 = { 75 | .interruptEnable = false, 76 | .channel = ADC_INPUTCHAN_EXT4, 77 | }; 78 | 79 | const adc_chan_config_t adConv1_ChnConfig3 = { 80 | .interruptEnable = false, 81 | .channel = ADC_INPUTCHAN_TEMP, 82 | }; 83 | 84 | const adc_compare_config_t adConv1_HwCompConfig0 = { 85 | .compareEnable = false, 86 | .compareGreaterThanEnable = false, 87 | .compareRangeFuncEnable = false, 88 | .compVal1 = 0U, 89 | .compVal2 = 0U, 90 | }; 91 | 92 | const adc_average_config_t adConv1_HwAvgConfig0 = { 93 | .hwAvgEnable = false, 94 | .hwAverage = ADC_AVERAGE_4, 95 | }; 96 | 97 | 98 | /* END adConv1. */ 99 | /*! 100 | ** @} 101 | */ 102 | /* 103 | ** ################################################################### 104 | ** 105 | ** This file was created by Processor Expert 10.1 [05.21] 106 | ** for the Freescale S32K series of microcontrollers. 107 | ** 108 | ** ################################################################### 109 | */ 110 | 111 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/adConv1.h: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : adConv1.h 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : adc 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Contents : 12 | ** ADC_DRV_InitConverterStruct - void ADC_DRV_InitConverterStruct(adc_converter_config_t *const config); 13 | ** ADC_DRV_ConfigConverter - void ADC_DRV_ConfigConverter(const uint32_t instance,const... 14 | ** ADC_DRV_GetConverterConfig - void ADC_DRV_GetConverterConfig(const uint32_t... 15 | ** ADC_DRV_Reset - void ADC_DRV_Reset(const uint32_t instance); 16 | ** ADC_DRV_InitHwCompareStruct - void ADC_DRV_InitHwCompareStruct(adc_compare_config_t *const config); 17 | ** ADC_DRV_ConfigHwCompare - void ADC_DRV_ConfigHwCompare(const uint32_t instance,const... 18 | ** ADC_DRV_GetHwCompareConfig - void ADC_DRV_GetHwCompareConfig(const uint32_t instance,adc_compare_config_t... 19 | ** ADC_DRV_InitHwAverageStruct - void ADC_DRV_InitHwAverageStruct(adc_average_config_t *const config); 20 | ** ADC_DRV_ConfigHwAverage - void ADC_DRV_ConfigHwAverage(const uint32_t instance,const... 21 | ** ADC_DRV_GetHwAverageConfig - void ADC_DRV_GetHwAverageConfig(const uint32_t instance,adc_average_config_t... 22 | ** ADC_DRV_InitChanStruct - void ADC_DRV_InitChanStruct(adc_chan_config_t *const config); 23 | ** ADC_DRV_ConfigChan - void ADC_DRV_ConfigChan(const uint32_t instance,const uint8_t chanIndex,const... 24 | ** ADC_DRV_GetChanConfig - void ADC_DRV_GetChanConfig(const uint32_t instance,const uint8_t... 25 | ** ADC_DRV_SetSwPretrigger - void ADC_DRV_SetSwPretrigger(const uint32_t instance,const... 26 | ** ADC_DRV_WaitConvDone - void ADC_DRV_WaitConvDone(const uint32_t instance); 27 | ** ADC_DRV_GetConvCompleteFlag - bool ADC_DRV_GetConvCompleteFlag(const uint32_t instance,const uint8_t... 28 | ** ADC_DRV_GetChanResult - void ADC_DRV_GetChanResult(const uint32_t instance,const uint8_t... 29 | ** ADC_DRV_AutoCalibration - void ADC_DRV_AutoCalibration(const uint32_t instance); 30 | ** ADC_DRV_InitUserCalibrationStruct - void ADC_DRV_InitUserCalibrationStruct(adc_calibration_t *const config); 31 | ** ADC_DRV_ConfigUserCalibration - void ADC_DRV_ConfigUserCalibration(const uint32_t instance,const... 32 | ** ADC_DRV_GetUserCalibration - void ADC_DRV_GetUserCalibration(const uint32_t instance,adc_calibration_t... 33 | ** ADC_DRV_GetInterruptNumber - IRQn_Type ADC_DRV_GetInterruptNumber(const uint32_t instance); 34 | ** ADC_DRV_ClearLatchedTriggers - void ADC_DRV_ClearLatchedTriggers(const uint32_t instance,const... 35 | ** ADC_DRV_ClearTriggerErrors - void ADC_DRV_ClearTriggerErrors(const uint32_t instance); 36 | ** ADC_DRV_GetTriggerErrorFlags - uint32_t ADC_DRV_GetTriggerErrorFlags(const uint32_t instance); 37 | ** 38 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 39 | ** Copyright 2016-2017 NXP 40 | ** All Rights Reserved. 41 | ** 42 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 43 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 44 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 45 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 46 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 47 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 48 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 49 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 50 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 51 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 52 | ** THE POSSIBILITY OF SUCH DAMAGE. 53 | ** ###################################################################*/ 54 | /*! 55 | ** @file adConv1.h 56 | ** @version 01.00 57 | */ 58 | /*! 59 | ** @addtogroup adConv1_module adConv1 module documentation 60 | ** @{ 61 | */ 62 | #ifndef adConv1_H 63 | #define adConv1_H 64 | /* MODULE adConv1. */ 65 | 66 | /** 67 | * @page misra_violations MISRA-C:2012 violations 68 | * 69 | * @section [global] 70 | * Violates MISRA 2012 Advisory Rule 2.5, global macro not referenced 71 | * There are global macros defined to be used by the integrator and another one used as include guard. 72 | */ 73 | 74 | /* Include inherited beans */ 75 | #include "clockMan1.h" 76 | #include "Cpu.h" 77 | #include "adc_driver.h" 78 | 79 | /*! @brief Device instance number */ 80 | #define INST_ADCONV1 0U 81 | 82 | /*! @brief Configuration declaration */ 83 | extern const adc_converter_config_t adConv1_ConvConfig0; 84 | 85 | /*! @brief Configuration declaration */ 86 | extern const adc_chan_config_t adConv1_ChnConfig0; 87 | extern const adc_chan_config_t adConv1_ChnConfig1; 88 | extern const adc_chan_config_t adConv1_ChnConfig2; 89 | extern const adc_chan_config_t adConv1_ChnConfig3; 90 | 91 | /*! @brief Configuration declaration */ 92 | extern const adc_compare_config_t adConv1_HwCompConfig0; 93 | 94 | /*! @brief Configuration declaration */ 95 | extern const adc_average_config_t adConv1_HwAvgConfig0; 96 | 97 | #endif 98 | /* ifndef adConv1_H */ 99 | /*! 100 | ** @} 101 | */ 102 | /* 103 | ** ################################################################### 104 | ** 105 | ** This file was created by Processor Expert 10.1 [05.21] 106 | ** for the Freescale S32K series of microcontrollers. 107 | ** 108 | ** ################################################################### 109 | */ 110 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/adConv2.c: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : adConv2.c 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : adc 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** 12 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 13 | ** Copyright 2016-2017 NXP 14 | ** All Rights Reserved. 15 | ** 16 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 17 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 20 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 | ** THE POSSIBILITY OF SUCH DAMAGE. 27 | ** ###################################################################*/ 28 | /*! 29 | ** @file adConv2.c 30 | ** @version 01.00 31 | */ 32 | /*! 33 | ** @addtogroup adConv2_module adConv2 module documentation 34 | ** @{ 35 | */ 36 | 37 | /* MODULE adConv2. */ 38 | 39 | /** 40 | * @page misra_violations MISRA-C:2012 violations 41 | * 42 | * @section [global] 43 | * Violates MISRA 2012 Advisory Rule 8.7, External could be made static. 44 | * Function is defined for usage by application code. 45 | * 46 | */ 47 | #include "adConv2.h" 48 | 49 | /*! adConv2 configuration structure */ 50 | const adc_converter_config_t adConv2_ConvConfig0 = { 51 | .clockDivide = ADC_CLK_DIVIDE_1, 52 | .sampleTime = 12U, 53 | .resolution = ADC_RESOLUTION_12BIT, 54 | .inputClock = ADC_CLK_ALT_1, 55 | .trigger = ADC_TRIGGER_HARDWARE, 56 | .pretriggerSel = ADC_PRETRIGGER_SEL_PDB, 57 | .triggerSel = ADC_TRIGGER_SEL_PDB, 58 | .dmaEnable = false, 59 | .voltageRef = ADC_VOLTAGEREF_VREF, 60 | .continuousConvEnable = false, 61 | .supplyMonitoringEnable = false, 62 | }; 63 | 64 | const adc_chan_config_t adConv2_ChnConfig0 = { 65 | .interruptEnable = false, 66 | .channel = ADC_INPUTCHAN_VREFSL, 67 | }; 68 | 69 | const adc_chan_config_t adConv2_ChnConfig1 = { 70 | .interruptEnable = false, 71 | .channel = ADC_INPUTCHAN_EXT7, 72 | }; 73 | 74 | const adc_chan_config_t adConv2_ChnConfig2 = { 75 | .interruptEnable = false, 76 | .channel = ADC_INPUTCHAN_EXT15, 77 | }; 78 | 79 | const adc_chan_config_t adConv2_ChnConfig3 = { 80 | .interruptEnable = false, 81 | .channel = ADC_INPUTCHAN_EXT6, 82 | }; 83 | 84 | const adc_compare_config_t adConv2_HwCompConfig0 = { 85 | .compareEnable = false, 86 | .compareGreaterThanEnable = false, 87 | .compareRangeFuncEnable = false, 88 | .compVal1 = 0U, 89 | .compVal2 = 0U, 90 | }; 91 | 92 | const adc_average_config_t adConv2_HwAvgConfig0 = { 93 | .hwAvgEnable = false, 94 | .hwAverage = ADC_AVERAGE_4, 95 | }; 96 | 97 | 98 | /* END adConv2. */ 99 | /*! 100 | ** @} 101 | */ 102 | /* 103 | ** ################################################################### 104 | ** 105 | ** This file was created by Processor Expert 10.1 [05.21] 106 | ** for the Freescale S32K series of microcontrollers. 107 | ** 108 | ** ################################################################### 109 | */ 110 | 111 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/adConv2.h: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : adConv2.h 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : adc 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Contents : 12 | ** ADC_DRV_InitConverterStruct - void ADC_DRV_InitConverterStruct(adc_converter_config_t *const config); 13 | ** ADC_DRV_ConfigConverter - void ADC_DRV_ConfigConverter(const uint32_t instance,const... 14 | ** ADC_DRV_GetConverterConfig - void ADC_DRV_GetConverterConfig(const uint32_t... 15 | ** ADC_DRV_Reset - void ADC_DRV_Reset(const uint32_t instance); 16 | ** ADC_DRV_InitHwCompareStruct - void ADC_DRV_InitHwCompareStruct(adc_compare_config_t *const config); 17 | ** ADC_DRV_ConfigHwCompare - void ADC_DRV_ConfigHwCompare(const uint32_t instance,const... 18 | ** ADC_DRV_GetHwCompareConfig - void ADC_DRV_GetHwCompareConfig(const uint32_t instance,adc_compare_config_t... 19 | ** ADC_DRV_InitHwAverageStruct - void ADC_DRV_InitHwAverageStruct(adc_average_config_t *const config); 20 | ** ADC_DRV_ConfigHwAverage - void ADC_DRV_ConfigHwAverage(const uint32_t instance,const... 21 | ** ADC_DRV_GetHwAverageConfig - void ADC_DRV_GetHwAverageConfig(const uint32_t instance,adc_average_config_t... 22 | ** ADC_DRV_InitChanStruct - void ADC_DRV_InitChanStruct(adc_chan_config_t *const config); 23 | ** ADC_DRV_ConfigChan - void ADC_DRV_ConfigChan(const uint32_t instance,const uint8_t chanIndex,const... 24 | ** ADC_DRV_GetChanConfig - void ADC_DRV_GetChanConfig(const uint32_t instance,const uint8_t... 25 | ** ADC_DRV_SetSwPretrigger - void ADC_DRV_SetSwPretrigger(const uint32_t instance,const... 26 | ** ADC_DRV_WaitConvDone - void ADC_DRV_WaitConvDone(const uint32_t instance); 27 | ** ADC_DRV_GetConvCompleteFlag - bool ADC_DRV_GetConvCompleteFlag(const uint32_t instance,const uint8_t... 28 | ** ADC_DRV_GetChanResult - void ADC_DRV_GetChanResult(const uint32_t instance,const uint8_t... 29 | ** ADC_DRV_AutoCalibration - void ADC_DRV_AutoCalibration(const uint32_t instance); 30 | ** ADC_DRV_InitUserCalibrationStruct - void ADC_DRV_InitUserCalibrationStruct(adc_calibration_t *const config); 31 | ** ADC_DRV_ConfigUserCalibration - void ADC_DRV_ConfigUserCalibration(const uint32_t instance,const... 32 | ** ADC_DRV_GetUserCalibration - void ADC_DRV_GetUserCalibration(const uint32_t instance,adc_calibration_t... 33 | ** ADC_DRV_GetInterruptNumber - IRQn_Type ADC_DRV_GetInterruptNumber(const uint32_t instance); 34 | ** ADC_DRV_ClearLatchedTriggers - void ADC_DRV_ClearLatchedTriggers(const uint32_t instance,const... 35 | ** ADC_DRV_ClearTriggerErrors - void ADC_DRV_ClearTriggerErrors(const uint32_t instance); 36 | ** ADC_DRV_GetTriggerErrorFlags - uint32_t ADC_DRV_GetTriggerErrorFlags(const uint32_t instance); 37 | ** 38 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 39 | ** Copyright 2016-2017 NXP 40 | ** All Rights Reserved. 41 | ** 42 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 43 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 44 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 45 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 46 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 47 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 48 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 49 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 50 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 51 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 52 | ** THE POSSIBILITY OF SUCH DAMAGE. 53 | ** ###################################################################*/ 54 | /*! 55 | ** @file adConv2.h 56 | ** @version 01.00 57 | */ 58 | /*! 59 | ** @addtogroup adConv2_module adConv2 module documentation 60 | ** @{ 61 | */ 62 | #ifndef adConv2_H 63 | #define adConv2_H 64 | /* MODULE adConv2. */ 65 | 66 | /** 67 | * @page misra_violations MISRA-C:2012 violations 68 | * 69 | * @section [global] 70 | * Violates MISRA 2012 Advisory Rule 2.5, global macro not referenced 71 | * There are global macros defined to be used by the integrator and another one used as include guard. 72 | */ 73 | 74 | /* Include inherited beans */ 75 | #include "clockMan1.h" 76 | #include "Cpu.h" 77 | #include "adc_driver.h" 78 | 79 | /*! @brief Device instance number */ 80 | #define INST_ADCONV2 1U 81 | 82 | /*! @brief Configuration declaration */ 83 | extern const adc_converter_config_t adConv2_ConvConfig0; 84 | 85 | /*! @brief Configuration declaration */ 86 | extern const adc_chan_config_t adConv2_ChnConfig0; 87 | extern const adc_chan_config_t adConv2_ChnConfig1; 88 | extern const adc_chan_config_t adConv2_ChnConfig2; 89 | extern const adc_chan_config_t adConv2_ChnConfig3; 90 | 91 | /*! @brief Configuration declaration */ 92 | extern const adc_compare_config_t adConv2_HwCompConfig0; 93 | 94 | /*! @brief Configuration declaration */ 95 | extern const adc_average_config_t adConv2_HwAvgConfig0; 96 | 97 | #endif 98 | /* ifndef adConv2_H */ 99 | /*! 100 | ** @} 101 | */ 102 | /* 103 | ** ################################################################### 104 | ** 105 | ** This file was created by Processor Expert 10.1 [05.21] 106 | ** for the Freescale S32K series of microcontrollers. 107 | ** 108 | ** ################################################################### 109 | */ 110 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/clockMan1.h: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : clockMan1.h 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : clock_manager 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Contents : 12 | ** CLOCK_DRV_Init - status_t CLOCK_DRV_Init(clock_manager_user_config_t const * config); 13 | ** CLOCK_DRV_GetFreq - status_t CLOCK_DRV_GetFreq(clock_names_t clockName, uint32_t * frequency); 14 | ** CLOCK_DRV_SetModuleClock - void CLOCK_DRV_SetModuleClock(clock_names_t peripheralClock, const... 15 | ** CLOCK_DRV_SetSystemClock - status_t CLOCK_DRV_SetSystemClock(const pwr_modes_t * mode, const... 16 | ** CLOCK_DRV_GetSystemClockSource - void CLOCK_DRV_GetSystemClockSource(sys_clk_config_t *sysClkConfig); 17 | ** CLOCK_DRV_SetClockSource - status_t CLOCK_DRV_SetClockSource(clock_names_t clockSource, const... 18 | ** 19 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 20 | ** Copyright 2016-2017 NXP 21 | ** All Rights Reserved. 22 | ** 23 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 24 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 31 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 32 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 33 | ** THE POSSIBILITY OF SUCH DAMAGE. 34 | ** ###################################################################*/ 35 | /*! 36 | ** @file clockMan1.h 37 | ** @version 01.00 38 | */ 39 | /*! 40 | ** @addtogroup clockMan1_module clockMan1 module documentation 41 | ** @{ 42 | */ 43 | #ifndef clockMan1_H 44 | #define clockMan1_H 45 | /* MODULE clockMan1. */ 46 | 47 | #include 48 | #include 49 | 50 | /* Include inherited beans */ 51 | #include "Cpu.h" 52 | 53 | /** 54 | * @page misra_violations MISRA-C:2012 violations 55 | * 56 | * @section [global] 57 | * Violates MISRA 2012 Advisory Rule 2.5, Global macro not referenced. 58 | * Application or driver example may not use all symbols that are 59 | * generated by configurations generator. 60 | * 61 | * @section [global] 62 | * Violates MISRA 2012 Advisory Rule 8.11, When an array with external linkage 63 | * is declared, its size should be explicitly specified. 64 | * The number of configurations/callbacks can be zero. 65 | * On the other side C language forbids declaring array of size zero. 66 | * 67 | * @section [global] 68 | * Violates MISRA 2012 Advisory Rule 8.7, External variable could be made static. 69 | * The external variables will be used in other source files in application code. 70 | * 71 | */ 72 | 73 | /*! @brief User configuration structure 0 */ 74 | extern clock_manager_user_config_t clockMan1_InitConfig0; 75 | 76 | /*! @brief Count of user configuration structures */ 77 | #define CLOCK_MANAGER_CONFIG_CNT 1U 78 | 79 | /*! @brief Array of pointers to User configuration structures */ 80 | extern clock_manager_user_config_t const *g_clockManConfigsArr[]; 81 | 82 | /*! @brief User peripheral configuration structure 0 */ 83 | extern peripheral_clock_config_t peripheralClockConfig0[]; 84 | 85 | /*! @brief Count of peripheral clock user configurations */ 86 | #define NUM_OF_PERIPHERAL_CLOCKS_0 21U 87 | 88 | 89 | /*! @brief Count of user Callbacks */ 90 | #define CLOCK_MANAGER_CALLBACK_CNT 0U 91 | 92 | /*! @brief Array of User callbacks */ 93 | extern clock_manager_callback_user_config_t *g_clockManCallbacksArr[]; 94 | #endif 95 | /* ifndef clockMan1_H */ 96 | /*! 97 | ** @} 98 | */ 99 | /* 100 | ** ################################################################### 101 | ** 102 | ** This file was created by Processor Expert 10.1 [05.21] 103 | ** for the Freescale S32K series of microcontrollers. 104 | ** 105 | ** ################################################################### 106 | */ 107 | 108 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/dmaController1.c: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : dmaController1.c 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : edma 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** 12 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 13 | ** Copyright 2016-2017 NXP 14 | ** All Rights Reserved. 15 | ** 16 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 17 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 20 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 | ** THE POSSIBILITY OF SUCH DAMAGE. 27 | ** ###################################################################*/ 28 | /*! 29 | ** @file dmaController1.c 30 | ** @version 01.00 31 | */ 32 | /*! 33 | ** @addtogroup dmaController1_module dmaController1 module documentation 34 | ** @{ 35 | */ 36 | 37 | /* dmaController1. */ 38 | 39 | /* MODULE dmaController1. 40 | * 41 | * @page misra_violations MISRA-C:2012 violations 42 | * 43 | * @section [global] 44 | * Violates MISRA 2012 Advisory Rule 8.7, External variable could be made static. 45 | * The external variables will be used in other source files that user initialize 46 | * to use this module. 47 | */ 48 | 49 | #include "dmaController1.h" 50 | 51 | edma_state_t dmaController1_State; 52 | 53 | edma_chn_state_t dmaController1Chn0_State; 54 | 55 | edma_chn_state_t * const edmaChnStateArray[] = { 56 | &dmaController1Chn0_State 57 | }; 58 | 59 | edma_channel_config_t dmaController1Chn0_Config = { 60 | .channelPriority = EDMA_CHN_DEFAULT_PRIORITY, 61 | .virtChnConfig = EDMA_CHN0_NUMBER, 62 | .source = EDMA_REQ_DISABLED, 63 | .callback = NULL, 64 | .callbackParam = NULL, 65 | .enableTrigger = false 66 | }; 67 | const edma_channel_config_t * const edmaChnConfigArray[] = { 68 | &dmaController1Chn0_Config 69 | }; 70 | 71 | const edma_user_config_t dmaController1_InitConfig0 = { 72 | .chnArbitration = EDMA_ARBITRATION_FIXED_PRIORITY, 73 | .haltOnError = false 74 | }; 75 | 76 | /* END dmaController1. */ 77 | 78 | /*! 79 | ** @} 80 | */ 81 | /* 82 | ** ################################################################### 83 | ** 84 | ** This file was created by Processor Expert 10.1 [05.21] 85 | ** for the Freescale S32K series of microcontrollers. 86 | ** 87 | ** ################################################################### 88 | */ 89 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/flexTimer_pwm1.h: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : flexTimer_pwm1.h 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : ftm_pwm 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Contents : 12 | ** FTM_DRV_Init - status_t FTM_DRV_Init(uint32_t instance,const ftm_user_config_t * info,... 13 | ** FTM_DRV_Deinit - status_t FTM_DRV_Deinit(uint32_t instance); 14 | ** FTM_DRV_DeinitPwm - status_t FTM_DRV_DeinitPwm(uint32_t instance); 15 | ** FTM_DRV_InitPwm - status_t FTM_DRV_InitPwm(uint32_t instance,const ftm_pwm_param_t * param); 16 | ** FTM_DRV_UpdatePwmChannel - status_t FTM_DRV_UpdatePwmChannel(uint32_t instance,uint8_t channel,... 17 | ** FTM_DRV_FastUpdatePwmChannels - status_t FTM_DRV_FastUpdatePwmChannels(uint32_t instance, uint8_t... 18 | ** FTM_DRV_UpdatePwmPeriod - status_t FTM_DRV_UpdatePwmPeriod(uint32_t instance,uint8_t channel,... 19 | ** FTM_DRV_UpdatePwmPeriodDither - status_t FTM_DRV_UpdatePwmPeriodDither(uint32_t instance, uint8_t... 20 | ** FTM_DRV_UpdatePwmEdgeChannelDither - status_t FTM_DRV_UpdatePwmEdgeChannelDither(uint32_t instance, uint8_t... 21 | ** FTM_PWM_DRV_IrqHandler - void FTM_PWM_DRV_IrqHandler(uint32_t instance, uint32_t chnOutCtrlVal); 22 | ** FTM_DRV_MaskOutputChannels - status_t FTM_DRV_MaskOutputChannels(uint32_t instance, uint32_t channelsMask,... 23 | ** FTM_DRV_SetInitialCounterValue - status_t FTM_DRV_SetInitialCounterValue(uint32_t instance, uint16_t... 24 | ** FTM_DRV_SetHalfCycleReloadPoint - status_t FTM_DRV_SetHalfCycleReloadPoint(uint32_t instance, uint16_t... 25 | ** FTM_DRV_SetSoftOutChnValue - status_t FTM_DRV_SetSoftOutChnValue(uint32_t instance, uint8_t... 26 | ** FTM_DRV_SetSoftwareOutputChannelControl - status_t FTM_DRV_SetSoftwareOutputChannelControl(uint32_t instance, uint8_t... 27 | ** FTM_DRV_SetAllChnSoftwareOutputControl - status_t FTM_DRV_SetAllChnSoftwareOutputControl(uint32_t instance, uint8_t... 28 | ** FTM_DRV_SetInvertingControl - status_t FTM_DRV_SetInvertingControl(uint32_t instance, uint8_t... 29 | ** FTM_DRV_SetModuloCounterValue - status_t FTM_DRV_SetModuloCounterValue(uint32_t instance, uint16_t... 30 | ** FTM_DRV_SetSync - status_t FTM_DRV_SetSync(uint32_t instance, const ftm_pwm_sync_t *param); 31 | ** FTM_DRV_GetFrequency - uint32_t FTM_DRV_GetFrequency(uint32_t instance); 32 | ** FTM_DRV_ConvertFreqToPeriodTicks - uint16_t FTM_DRV_ConvertFreqToPeriodTicks(uint32_t instance,uint32_t... 33 | ** 34 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 35 | ** Copyright 2016-2017 NXP 36 | ** All Rights Reserved. 37 | ** 38 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 39 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 40 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 41 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 42 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 43 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 44 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 45 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 46 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 47 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 48 | ** THE POSSIBILITY OF SUCH DAMAGE. 49 | ** ###################################################################*/ 50 | /*! 51 | ** @file flexTimer_pwm1.h 52 | ** @version 01.00 53 | */ 54 | /*! 55 | ** @addtogroup flexTimer_pwm1_module flexTimer_pwm1 module documentation 56 | ** @{ 57 | */ 58 | #ifndef flexTimer_pwm1_H 59 | #define flexTimer_pwm1_H 60 | 61 | /* MODULE flexTimer_pwm1. 62 | * 63 | * @page misra_violations MISRA-C:2012 violations 64 | * 65 | * @section [global] 66 | * Violates MISRA 2012 Advisory Rule 2.5, Global macro not referenced. 67 | * The global macro will be used in function call of the module. 68 | */ 69 | 70 | /* Include inherited beans */ 71 | #include "clockMan1.h" 72 | #include "Cpu.h" 73 | /*! @brief Device instance number */ 74 | #define INST_FLEXTIMER_PWM1 3U 75 | 76 | 77 | /*fault configuration structure for FTM3*/ 78 | extern ftm_pwm_fault_param_t flexTimer_pwm1_FaultConfig; 79 | 80 | /* Channels configuration structure for flexTimer_pwm1* independent channels */ 81 | extern ftm_independent_ch_param_t flexTimer_pwm1_IndependentChannelsConfig[3]; 82 | 83 | 84 | /* PWM configuration for flexTimer_pwm1 */ 85 | extern ftm_pwm_param_t flexTimer_pwm1_PwmConfig; 86 | 87 | /* Global configuration of flexTimer_pwm1 */ 88 | extern ftm_user_config_t flexTimer_pwm1_InitConfig; 89 | 90 | #endif 91 | /* ifndef flexTimer_pwm1_H */ 92 | /*! 93 | ** @} 94 | */ 95 | /* 96 | ** ################################################################### 97 | ** 98 | ** This file was created by Processor Expert 10.1 [05.21] 99 | ** for the Freescale S32K series of microcontrollers. 100 | ** 101 | ** ################################################################### 102 | */ 103 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/lpit1.c: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : lpit1.c 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : lpit 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** 12 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 13 | ** Copyright 2016-2017 NXP 14 | ** All Rights Reserved. 15 | ** 16 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 17 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 20 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 | ** THE POSSIBILITY OF SUCH DAMAGE. 27 | ** ###################################################################*/ 28 | /*! 29 | ** @file lpit1.c 30 | ** @version 01.00 31 | */ 32 | /*! 33 | ** @addtogroup lpit1_module lpit1 module documentation 34 | ** @{ 35 | */ 36 | 37 | /* MODULE lpit1. 38 | * 39 | * @page misra_violations MISRA-C:2012 violations 40 | * 41 | * @section [global] 42 | * Violates MISRA 2012 Advisory Rule 8.7, External variable could be made static. 43 | * The external variables will be used in other source files in application code. 44 | */ 45 | 46 | #include "lpit1.h" 47 | 48 | /*! Global configuration of lpit1 */ 49 | const lpit_user_config_t lpit1_InitConfig = 50 | { 51 | .enableRunInDebug = false, /*!< true: LPIT run in debug mode; false: LPIT stop in debug mode */ 52 | .enableRunInDoze = false /*!< true: LPIT run in doze mode; false: LPIT stop in doze mode */ 53 | }; 54 | 55 | /*! User channel configuration 0 */ 56 | lpit_user_channel_config_t lpit1_ChnConfig0 = 57 | { 58 | .timerMode = LPIT_PERIODIC_COUNTER, 59 | .periodUnits = LPIT_PERIOD_UNITS_MICROSECONDS, 60 | .period = 48000U, 61 | .triggerSource = LPIT_TRIGGER_SOURCE_EXTERNAL, 62 | .triggerSelect = 0U, 63 | .enableReloadOnTrigger = false, 64 | .enableStopOnInterrupt = false, 65 | .enableStartOnTrigger = false, 66 | .chainChannel = false, 67 | .isInterruptEnabled = true 68 | }; 69 | /* END lpit1. */ 70 | /*! 71 | ** @} 72 | */ 73 | /* 74 | ** ################################################################### 75 | ** 76 | ** This file was created by Processor Expert 10.1 [05.21] 77 | ** for the Freescale S32K series of microcontrollers. 78 | ** 79 | ** ################################################################### 80 | */ 81 | 82 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/lpit1.h: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : lpit1.h 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : lpit 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Contents : 12 | ** LPIT_DRV_GetDefaultConfig - void LPIT_DRV_GetDefaultConfig(lpit_user_config_t * const config); 13 | ** LPIT_DRV_GetDefaultChanConfig - void LPIT_DRV_GetDefaultChanConfig(lpit_user_channel_config_t * const config); 14 | ** LPIT_DRV_Init - void LPIT_DRV_Init(uint32_t instance, const lpit_user_config_t *userConfig); 15 | ** LPIT_DRV_Deinit - void LPIT_DRV_Deinit(uint32_t instance); 16 | ** LPIT_DRV_InitChannel - status_t LPIT_DRV_InitChannel(uint32_t instance, uint32_t channel, const... 17 | ** LPIT_DRV_StartTimerChannels - void LPIT_DRV_StartTimerChannels(uint32_t instance, uint32_t mask); 18 | ** LPIT_DRV_StopTimerChannels - void LPIT_DRV_StopTimerChannels(uint32_t instance, uint32_t mask); 19 | ** LPIT_DRV_SetTimerPeriodByUs - status_t LPIT_DRV_SetTimerPeriodByUs(uint32_t instance, uint32_t channel,... 20 | ** LPIT_DRV_SetTimerPeriodInDual16ModeByUs - status_t LPIT_DRV_SetTimerPeriodInDual16ModeByUs(uint32_t instance, uint32_t... 21 | ** LPIT_DRV_GetTimerPeriodByUs - uint64_t LPIT_DRV_GetTimerPeriodByUs(uint32_t instance, uint32_t channel); 22 | ** LPIT_DRV_GetCurrentTimerUs - uint64_t LPIT_DRV_GetCurrentTimerUs(uint32_t instance, uint32_t channel); 23 | ** LPIT_DRV_SetTimerPeriodByCount - void LPIT_DRV_SetTimerPeriodByCount(uint32_t instance, uint32_t channel,... 24 | ** LPIT_DRV_SetTimerPeriodInDual16ModeByCount - void LPIT_DRV_SetTimerPeriodInDual16ModeByCount(uint32_t instance, uint32_t... 25 | ** LPIT_DRV_GetTimerPeriodByCount - uint32_t LPIT_DRV_GetTimerPeriodByCount(uint32_t instance, uint32_t channel); 26 | ** LPIT_DRV_GetCurrentTimerCount - uint32_t LPIT_DRV_GetCurrentTimerCount(uint32_t instance, uint32_t channel); 27 | ** LPIT_DRV_EnableTimerChannelInterrupt - void LPIT_DRV_EnableTimerChannelInterrupt(uint32_t instance, uint32_t mask); 28 | ** LPIT_DRV_DisableTimerChannelInterrupt - void LPIT_DRV_DisableTimerChannelInterrupt(uint32_t instance, uint32_t mask); 29 | ** LPIT_DRV_GetInterruptFlagTimerChannels - uint32_t LPIT_DRV_GetInterruptFlagTimerChannels(uint32_t instance, uint32_t... 30 | ** LPIT_DRV_ClearInterruptFlagTimerChannels - void LPIT_DRV_ClearInterruptFlagTimerChannels(uint32_t instance, uint32_t mask); 31 | ** 32 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 33 | ** Copyright 2016-2017 NXP 34 | ** All Rights Reserved. 35 | ** 36 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 37 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 38 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 39 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 40 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 41 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 42 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 43 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 44 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 45 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 46 | ** THE POSSIBILITY OF SUCH DAMAGE. 47 | ** ###################################################################*/ 48 | /*! 49 | ** @file lpit1.h 50 | ** @version 01.00 51 | */ 52 | /*! 53 | ** @addtogroup lpit1_module lpit1 module documentation 54 | ** @{ 55 | */ 56 | #ifndef lpit1_H 57 | #define lpit1_H 58 | 59 | /* MODULE lpit1. 60 | * 61 | * @page misra_violations MISRA-C:2012 violations 62 | * 63 | * @section [global] 64 | * Violates MISRA 2012 Advisory Rule 2.5, Global macro not referenced. 65 | * The global macro will be used in function call of the module. 66 | */ 67 | 68 | /* Include inherited beans */ 69 | #include "clockMan1.h" 70 | #include "Cpu.h" 71 | 72 | /*! Device instance number */ 73 | #define INST_LPIT1 (0U) 74 | 75 | /*! Global configuration of lpit1 */ 76 | extern const lpit_user_config_t lpit1_InitConfig; 77 | /*! User channel configuration 0 */ 78 | extern lpit_user_channel_config_t lpit1_ChnConfig0; 79 | 80 | #endif 81 | /* END lpit1 */ 82 | /*! 83 | ** @} 84 | */ 85 | /* 86 | ** ################################################################### 87 | ** 88 | ** This file was created by Processor Expert 10.1 [05.21] 89 | ** for the Freescale S32K series of microcontrollers. 90 | ** 91 | ** ################################################################### 92 | */ 93 | 94 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/lpspiCom1.c: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : lpspiCom1.c 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : lpspi 7 | ** Version : Component 1.0.0, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** 12 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 13 | ** Copyright 2016-2017 NXP 14 | ** All Rights Reserved. 15 | ** 16 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 17 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 20 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 | ** THE POSSIBILITY OF SUCH DAMAGE. 27 | ** ###################################################################*/ 28 | /*! 29 | ** @file lpspiCom1.c 30 | ** @version 01.00 31 | */ 32 | /*! 33 | ** @addtogroup lpspiCom1_module lpspiCom1 module documentation 34 | ** @{ 35 | */ 36 | 37 | /* lpspiCom1. */ 38 | /* MODULE lpspiCom1. 39 | * 40 | * @page misra_violations MISRA-C:2012 violations 41 | * 42 | * @section [global] 43 | * Violates MISRA 2012 Advisory Rule 8.7, External variable could be made static. 44 | * The external variable will be used in other source file that user initialize 45 | * to use this module. 46 | */ 47 | #include "lpspiCom1.h" 48 | 49 | /*! @brief State structure for LPSPI0 */ 50 | lpspi_state_t lpspiCom1State; 51 | 52 | 53 | 54 | 55 | /* END lpspiCom1. */ 56 | 57 | /*! 58 | ** @} 59 | */ 60 | /* 61 | ** ################################################################### 62 | ** 63 | ** This file was created by Processor Expert 10.1 [05.21] 64 | ** for the Freescale S32K series of microcontrollers. 65 | ** 66 | ** ################################################################### 67 | */ 68 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/lpspiCom1.h: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : lpspiCom1.h 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : lpspi 7 | ** Version : Component 1.0.0, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Contents : 12 | ** LPSPI_DRV_MasterGetDefaultConfig - void LPSPI_DRV_MasterGetDefaultConfig(lpspi_master_config_t * spiConfig); 13 | ** LPSPI_DRV_MasterInit - status_t LPSPI_DRV_MasterInit(uint32_t instance,lpspi_state_t *... 14 | ** LPSPI_DRV_MasterDeinit - status_t LPSPI_DRV_MasterDeinit(uint32_t instance); 15 | ** LPSPI_DRV_MasterSetDelay - status_t LPSPI_DRV_MasterSetDelay(uint32_t instance,uint32_t... 16 | ** LPSPI_DRV_MasterConfigureBus - status_t LPSPI_DRV_MasterConfigureBus(uint32_t instance,const... 17 | ** LPSPI_DRV_SetPcs - status_t LPSPI_DRV_SetPcs(uint32_t instance,lpspi_which_pcs_t... 18 | ** LPSPI_DRV_MasterTransferBlocking - status_t LPSPI_DRV_MasterTransferBlocking(uint32_t instance,const uint8_t *... 19 | ** LPSPI_DRV_MasterTransfer - status_t LPSPI_DRV_MasterTransfer(uint32_t instance,const uint8_t *... 20 | ** LPSPI_DRV_MasterGetTransferStatus - status_t LPSPI_DRV_MasterGetTransferStatus(uint32_t instance,uint32_t *... 21 | ** LPSPI_DRV_MasterAbortTransfer - status_t LPSPI_DRV_MasterAbortTransfer(uint32_t instance); 22 | ** LPSPI_DRV_SlaveGetDefaultConfig - void LPSPI_DRV_SlaveGetDefaultConfig(lpspi_slave_config_t * spiConfig); 23 | ** LPSPI_DRV_SlaveDeinit - status_t LPSPI_DRV_SlaveDeinit(uint32_t instance); 24 | ** LPSPI_DRV_SlaveTransferBlocking - status_t LPSPI_DRV_SlaveTransferBlocking(uint32_t instance,const uint8_t *... 25 | ** LPSPI_DRV_SlaveTransfer - status_t LPSPI_DRV_SlaveTransfer(uint32_t instance,const uint8_t *... 26 | ** LPSPI_DRV_SlaveAbortTransfer - status_t LPSPI_DRV_SlaveAbortTransfer(uint32_t instance); 27 | ** LPSPI_DRV_SlaveGetTransferStatus - status_t LPSPI_DRV_SlaveGetTransferStatus(uint32_t instance,uint32_t *... 28 | ** 29 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 30 | ** Copyright 2016-2017 NXP 31 | ** All Rights Reserved. 32 | ** 33 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 34 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 35 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 36 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 37 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 38 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 39 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 40 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 41 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 42 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 43 | ** THE POSSIBILITY OF SUCH DAMAGE. 44 | ** ###################################################################*/ 45 | /*! 46 | ** @file lpspiCom1.h 47 | ** @version 01.00 48 | */ 49 | /*! 50 | ** @addtogroup lpspiCom1_module lpspiCom1 module documentation 51 | ** @{ 52 | */ 53 | #ifndef lpspiCom1_H 54 | #define lpspiCom1_H 55 | /* MODULE lpspiCom1. */ 56 | 57 | /* MODULE lpspiCom1. 58 | * 59 | * @page misra_violations MISRA-C:2012 violations 60 | * 61 | * @section [global] 62 | * Violates MISRA 2012 Advisory Rule 8.7, External variable could be made static. 63 | * The external variable will be used in other source file that user initialize 64 | * to use this module. 65 | * 66 | * @section [global] 67 | * Violates MISRA 2012 Advisory Rule 2.5, Global macro not referenced. 68 | * The global macro will be used in function call of the module. 69 | */ 70 | 71 | /* Include inherited beans */ 72 | #include "clockMan1.h" 73 | #include "dmaController1.h" 74 | #include "Cpu.h" 75 | 76 | 77 | /*! @brief Device instance number */ 78 | #define LPSPICOM1 (0U) 79 | /*! @brief State structure for LPSPI0 */ 80 | extern lpspi_state_t lpspiCom1State; 81 | 82 | 83 | #endif 84 | /* ifndef __lpspiCom1_H */ 85 | /*! 86 | ** @} 87 | */ 88 | /* 89 | ** ################################################################### 90 | ** 91 | ** This file was created by Processor Expert 10.1 [05.21] 92 | ** for the Freescale S32K series of microcontrollers. 93 | ** 94 | ** ################################################################### 95 | */ 96 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/lpuart1.c: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : lpuart1.c 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : lpuart 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Abstract : 12 | ** 13 | ** 14 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 15 | ** Copyright 2016-2017 NXP 16 | ** All Rights Reserved. 17 | ** 18 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 19 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 22 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 27 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 | ** THE POSSIBILITY OF SUCH DAMAGE. 29 | ** ###################################################################*/ 30 | /*! 31 | ** @file lpuart1.c 32 | ** @version 01.00 33 | ** @brief 34 | ** 35 | */ 36 | /*! 37 | ** @addtogroup lpuart1_module lpuart1 module documentation 38 | ** @{ 39 | */ 40 | 41 | /* MODULE lpuart1 42 | * 43 | * @page misra_violations MISRA-C:2012 violations 44 | * 45 | * @section [global] 46 | * Violates MISRA 2012 Advisory Rule 8.7, External could be made static. 47 | * Structure is defined for usage by application code. 48 | */ 49 | 50 | #include "lpuart1.h" 51 | 52 | /*! lpuart1 configuration structure */ 53 | const lpuart_user_config_t lpuart1_InitConfig0 = { 54 | .transferType = LPUART_USING_INTERRUPTS, 55 | .baudRate = 115200U, 56 | .parityMode = LPUART_PARITY_DISABLED, 57 | .stopBitCount = LPUART_ONE_STOP_BIT, 58 | .bitCountPerChar = LPUART_8_BITS_PER_CHAR, 59 | .rxDMAChannel = 0U, 60 | .txDMAChannel = 0U, 61 | }; 62 | 63 | 64 | /*! Driver state structure */ 65 | lpuart_state_t lpuart1_State; 66 | 67 | /* END lpuart1. */ 68 | /*! 69 | ** @} 70 | */ 71 | /* 72 | ** ################################################################### 73 | ** 74 | ** This file was created by Processor Expert 10.1 [05.21] 75 | ** for the Freescale S32K series of microcontrollers. 76 | ** 77 | ** ################################################################### 78 | */ 79 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/lpuart1.h: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : lpuart1.h 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : lpuart 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Abstract : 12 | ** 13 | ** Contents : 14 | ** LPUART_DRV_GetDefaultConfig - void LPUART_DRV_GetDefaultConfig(lpuart_user_config_t * lpuartUserConfig); 15 | ** LPUART_DRV_Init - status_t LPUART_DRV_Init(uint32 instance,lpuart_state_t *... 16 | ** LPUART_DRV_Deinit - status_t LPUART_DRV_Deinit(uint32 instance); 17 | ** LPUART_DRV_InstallRxCallback - uart_callback_t LPUART_DRV_InstallRxCallback(uint32 instance,uart_callback_t... 18 | ** LPUART_DRV_InstallTxCallback - uart_callback_t LPUART_DRV_InstallTxCallback(uint32 instance,uart_callback_t... 19 | ** LPUART_DRV_SendDataBlocking - status_t LPUART_DRV_SendDataBlocking(uint32 instance,const uint8 *... 20 | ** LPUART_DRV_SendDataPolling - status_t LPUART_DRV_SendDataPolling(uint32 instance,const uint8 *... 21 | ** LPUART_DRV_SendData - status_t LPUART_DRV_SendData(uint32 instance,const uint8 * txBuff,uint32... 22 | ** LPUART_DRV_GetTransmitStatus - status_t LPUART_DRV_GetTransmitStatus(uint32 instance,uint32 * bytesRemaining); 23 | ** LPUART_DRV_AbortSendingData - status_t LPUART_DRV_AbortSendingData(uint32 instance); 24 | ** LPUART_DRV_ReceiveDataBlocking - status_t LPUART_DRV_ReceiveDataBlocking(uint32 instance,uint8 * rxBuff,uint32... 25 | ** LPUART_DRV_ReceiveDataPolling - status_t LPUART_DRV_ReceiveDataPolling(uint32 instance,uint8 * rxBuff,uint32... 26 | ** LPUART_DRV_ReceiveData - status_t LPUART_DRV_ReceiveData(uint32 instance,uint8 * rxBuff,uint32 rxSize); 27 | ** LPUART_DRV_GetReceiveStatus - status_t LPUART_DRV_GetReceiveStatus(uint32 instance,uint32 * bytesRemaining); 28 | ** LPUART_DRV_AbortReceivingData - status_t LPUART_DRV_AbortReceivingData(uint32 instance); 29 | ** LPUART_DRV_SetBaudRate - status_t LPUART_DRV_SetBaudRate(uint32_t instance,uint32_t desiredBaudRate); 30 | ** LPUART_DRV_GetBaudRate - void LPUART_DRV_GetBaudRate(uint32_t instance, uint32_t * configuredBaudRate); 31 | ** LPUART_DRV_SetTxBuffer - status_t LPUART_DRV_SetTxBuffer(uint32 instance,const uint8 * txBuff,uint32... 32 | ** LPUART_DRV_SetRxBuffer - status_t LPUART_DRV_SetRxBuffer(uint32 instance,uint8 * rxBuff,uint32 rxSize); 33 | ** 34 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 35 | ** Copyright 2016-2017 NXP 36 | ** All Rights Reserved. 37 | ** 38 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 39 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 40 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 41 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 42 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 43 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 44 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 45 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 46 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 47 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 48 | ** THE POSSIBILITY OF SUCH DAMAGE. 49 | ** ###################################################################*/ 50 | /*! 51 | ** @file lpuart1.h 52 | ** @version 01.00 53 | ** @brief 54 | ** 55 | */ 56 | /*! 57 | ** @addtogroup lpuart1_module lpuart1 module documentation 58 | ** @{ 59 | */ 60 | 61 | /* MODULE lpuart1 62 | * 63 | * @page misra_violations MISRA-C:2012 violations 64 | * 65 | * @section [global] 66 | * Violates MISRA 2012 Advisory Rule 2.5, Global macro not referenced. 67 | * The macros are defined to be used by application code. 68 | */ 69 | 70 | #ifndef lpuart1_H 71 | #define lpuart1_H 72 | 73 | /* Include inherited beans */ 74 | #include "clockMan1.h" 75 | #include "dmaController1.h" 76 | #include "Cpu.h" 77 | 78 | /*! @brief Device instance number */ 79 | #define INST_LPUART1 (1U) 80 | 81 | /*! Driver state structure */ 82 | extern lpuart_state_t lpuart1_State; 83 | 84 | /*! @brief Configuration declaration */ 85 | extern const lpuart_user_config_t lpuart1_InitConfig0; 86 | 87 | #endif /* ifndef lpuart1_H */ 88 | /*! 89 | ** @} 90 | */ 91 | /* 92 | ** ################################################################### 93 | ** 94 | ** This file was created by Processor Expert 10.1 [05.21] 95 | ** for the Freescale S32K series of microcontrollers. 96 | ** 97 | ** ################################################################### 98 | */ 99 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/pdb1.c: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : pdb1.c 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : pdb 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** 12 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 13 | ** Copyright 2016-2017 NXP 14 | ** All Rights Reserved. 15 | ** 16 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 17 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 20 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 | ** THE POSSIBILITY OF SUCH DAMAGE. 27 | ** ###################################################################*/ 28 | /*! 29 | ** @file pdb1.c 30 | ** @version 01.00 31 | */ 32 | /*! 33 | ** @addtogroup pdb1_module pdb1 module documentation 34 | ** @{ 35 | */ 36 | 37 | /* MODULE pdb1. 38 | * 39 | * @page misra_violations MISRA-C:2012 violations 40 | * 41 | * @section [global] 42 | * Violates MISRA 2012 Advisory Rule 8.7, External variable could be made static. 43 | * The external variables will be used in other source files that user initialize 44 | * to use this module. 45 | */ 46 | 47 | #include "pdb1.h" 48 | 49 | const pdb_adc_pretrigger_config_t pdb1_AdcTrigInitConfig0 = { 50 | .adcPreTriggerIdx = 0U, 51 | .preTriggerEnable = true, 52 | .preTriggerOutputEnable = true, 53 | .preTriggerBackToBackEnable = false, 54 | }; 55 | 56 | const pdb_adc_pretrigger_config_t pdb1_AdcTrigInitConfig1 = { 57 | .adcPreTriggerIdx = 1U, 58 | .preTriggerEnable = true, 59 | .preTriggerOutputEnable = true, 60 | .preTriggerBackToBackEnable = false, 61 | }; 62 | 63 | const pdb_adc_pretrigger_config_t pdb1_AdcTrigInitConfig2 = { 64 | .adcPreTriggerIdx = 2U, 65 | .preTriggerEnable = true, 66 | .preTriggerOutputEnable = true, 67 | .preTriggerBackToBackEnable = false, 68 | }; 69 | 70 | const pdb_adc_pretrigger_config_t pdb1_AdcTrigInitConfig3 = { 71 | .adcPreTriggerIdx = 3U, 72 | .preTriggerEnable = true, 73 | .preTriggerOutputEnable = true, 74 | .preTriggerBackToBackEnable = false, 75 | }; 76 | 77 | const pdb_timer_config_t pdb1_InitConfig0 = { 78 | .loadValueMode = PDB_LOAD_VAL_IMMEDIATELY, 79 | .seqErrIntEnable = true, 80 | .clkPreDiv = PDB_CLK_PREDIV_BY_1, 81 | .clkPreMultFactor = PDB_CLK_PREMULT_FACT_AS_1, 82 | .triggerInput = PDB_TRIGGER_IN0, 83 | .continuousModeEnable = false, 84 | .dmaEnable = false, 85 | .intEnable = false, 86 | .instanceBackToBackEnable = false, 87 | }; 88 | 89 | 90 | /* END pdb1. */ 91 | 92 | /*! 93 | ** @} 94 | */ 95 | /* 96 | ** ################################################################### 97 | ** 98 | ** This file was created by Processor Expert 10.1 [05.21] 99 | ** for the Freescale S32K series of microcontrollers. 100 | ** 101 | ** ################################################################### 102 | */ 103 | 104 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/pdb1.h: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : pdb1.h 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : pdb 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Contents : 12 | ** PDB_DRV_Init - void PDB_DRV_Init(const uint32_t instance, const pdb_timer_config_t *... 13 | ** PDB_DRV_Deinit - void PDB_DRV_Deinit(const uint32_t instance); 14 | ** PDB_DRV_GetDefaultConfig - void PDB_DRV_GetDefaultConfig(pdb_timer_config_t * const config); 15 | ** PDB_DRV_Enable - void PDB_DRV_Enable(const uint32_t instance); 16 | ** PDB_DRV_Disable - void PDB_DRV_Disable(const uint32_t instance); 17 | ** PDB_DRV_SoftTriggerCmd - void PDB_DRV_SoftTriggerCmd(const uint32_t instance); 18 | ** PDB_DRV_GetTimerValue - uint32_t PDB_DRV_GetTimerValue(const uint32_t instance); 19 | ** PDB_DRV_GetTimerIntFlag - bool PDB_DRV_GetTimerIntFlag(const uint32_t instance); 20 | ** PDB_DRV_ClearTimerIntFlag - void PDB_DRV_ClearTimerIntFlag(const uint32_t instance); 21 | ** PDB_DRV_LoadValuesCmd - void PDB_DRV_LoadValuesCmd(const uint32_t instance); 22 | ** PDB_DRV_SetTimerModulusValue - void PDB_DRV_SetTimerModulusValue(const uint32_t instance, const uint32_t... 23 | ** PDB_DRV_SetValueForTimerInterrupt - void PDB_DRV_SetValueForTimerInterrupt(const uint32_t instance, const... 24 | ** PDB_DRV_ConfigAdcPreTrigger - void PDB_DRV_ConfigAdcPreTrigger(const uint32_t instance, const uint32_t chn,... 25 | ** PDB_DRV_GetAdcPreTriggerFlags - uint32_t PDB_DRV_GetAdcPreTriggerFlags(const uint32_t instance, const... 26 | ** PDB_DRV_ClearAdcPreTriggerFlags - void PDB_DRV_ClearAdcPreTriggerFlags(const uint32_t instance, const uint32_t... 27 | ** PDB_DRV_GetAdcPreTriggerSeqErrFlags - uint32_t PDB_DRV_GetAdcPreTriggerSeqErrFlags(const uint32_t instance, const... 28 | ** PDB_DRV_ClearAdcPreTriggerSeqErrFlags - void PDB_DRV_ClearAdcPreTriggerSeqErrFlags(const uint32_t instance, const... 29 | ** PDB_DRV_SetAdcPreTriggerDelayValue - void PDB_DRV_SetAdcPreTriggerDelayValue(const uint32_t instance, const... 30 | ** PDB_DRV_SetCmpPulseOutEnable - void PDB_DRV_SetCmpPulseOutEnable(const uint32_t instance, const uint32_t... 31 | ** PDB_DRV_SetCmpPulseOutDelayForHigh - void PDB_DRV_SetCmpPulseOutDelayForHigh(const uint32_t instance, const... 32 | ** PDB_DRV_SetCmpPulseOutDelayForLow - void PDB_DRV_SetCmpPulseOutDelayForLow(const uint32_t instance, const... 33 | ** 34 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 35 | ** Copyright 2016-2017 NXP 36 | ** All Rights Reserved. 37 | ** 38 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 39 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 40 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 41 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 42 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 43 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 44 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 45 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 46 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 47 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 48 | ** THE POSSIBILITY OF SUCH DAMAGE. 49 | ** ###################################################################*/ 50 | /*! 51 | ** @file pdb1.h 52 | ** @version 01.00 53 | */ 54 | /*! 55 | ** @addtogroup pdb1_module pdb1 module documentation 56 | ** @{ 57 | */ 58 | #ifndef pdb1_H 59 | #define pdb1_H 60 | /* MODULE pdb1. */ 61 | 62 | /** 63 | * @page misra_violations MISRA-C:2012 violations 64 | * 65 | * @section [global] 66 | * Violates MISRA 2012 Advisory Rule 2.5, global macro not referenced 67 | * There are global macros defined to be used by the integrator and another one used as include guard. 68 | */ 69 | 70 | /* Include inherited beans */ 71 | #include "Cpu.h" 72 | 73 | /*! @brief Device instance number */ 74 | #define INST_PDB1 (0U) 75 | 76 | /*! @brief ADC pre-trigger configuration declaration */ 77 | extern const pdb_adc_pretrigger_config_t pdb1_AdcTrigInitConfig0; 78 | extern const pdb_adc_pretrigger_config_t pdb1_AdcTrigInitConfig1; 79 | extern const pdb_adc_pretrigger_config_t pdb1_AdcTrigInitConfig2; 80 | extern const pdb_adc_pretrigger_config_t pdb1_AdcTrigInitConfig3; 81 | 82 | /*! @brief PDB timer init config declaration */ 83 | extern const pdb_timer_config_t pdb1_InitConfig0; 84 | 85 | 86 | #endif 87 | /* ifndef pdb1_H */ 88 | /*! 89 | ** @} 90 | */ 91 | /* 92 | ** ################################################################### 93 | ** 94 | ** This file was created by Processor Expert 10.1 [05.21] 95 | ** for the Freescale S32K series of microcontrollers. 96 | ** 97 | ** ################################################################### 98 | */ 99 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/pdb2.c: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : pdb2.c 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : pdb 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** 12 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 13 | ** Copyright 2016-2017 NXP 14 | ** All Rights Reserved. 15 | ** 16 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 17 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 20 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 | ** THE POSSIBILITY OF SUCH DAMAGE. 27 | ** ###################################################################*/ 28 | /*! 29 | ** @file pdb2.c 30 | ** @version 01.00 31 | */ 32 | /*! 33 | ** @addtogroup pdb2_module pdb2 module documentation 34 | ** @{ 35 | */ 36 | 37 | /* MODULE pdb2. 38 | * 39 | * @page misra_violations MISRA-C:2012 violations 40 | * 41 | * @section [global] 42 | * Violates MISRA 2012 Advisory Rule 8.7, External variable could be made static. 43 | * The external variables will be used in other source files that user initialize 44 | * to use this module. 45 | */ 46 | 47 | #include "pdb2.h" 48 | 49 | const pdb_adc_pretrigger_config_t pdb2_AdcTrigInitConfig0 = { 50 | .adcPreTriggerIdx = 0U, 51 | .preTriggerEnable = true, 52 | .preTriggerOutputEnable = true, 53 | .preTriggerBackToBackEnable = false, 54 | }; 55 | 56 | const pdb_adc_pretrigger_config_t pdb2_AdcTrigInitConfig1 = { 57 | .adcPreTriggerIdx = 1U, 58 | .preTriggerEnable = true, 59 | .preTriggerOutputEnable = true, 60 | .preTriggerBackToBackEnable = false, 61 | }; 62 | 63 | const pdb_adc_pretrigger_config_t pdb2_AdcTrigInitConfig2 = { 64 | .adcPreTriggerIdx = 2U, 65 | .preTriggerEnable = true, 66 | .preTriggerOutputEnable = true, 67 | .preTriggerBackToBackEnable = false, 68 | }; 69 | 70 | const pdb_adc_pretrigger_config_t pdb2_AdcTrigInitConfig3 = { 71 | .adcPreTriggerIdx = 3U, 72 | .preTriggerEnable = true, 73 | .preTriggerOutputEnable = true, 74 | .preTriggerBackToBackEnable = false, 75 | }; 76 | 77 | const pdb_timer_config_t pdb2_InitConfig0 = { 78 | .loadValueMode = PDB_LOAD_VAL_IMMEDIATELY, 79 | .seqErrIntEnable = true, 80 | .clkPreDiv = PDB_CLK_PREDIV_BY_1, 81 | .clkPreMultFactor = PDB_CLK_PREMULT_FACT_AS_1, 82 | .triggerInput = PDB_TRIGGER_IN0, 83 | .continuousModeEnable = false, 84 | .dmaEnable = false, 85 | .intEnable = true, 86 | .instanceBackToBackEnable = false, 87 | }; 88 | 89 | 90 | /* END pdb2. */ 91 | 92 | /*! 93 | ** @} 94 | */ 95 | /* 96 | ** ################################################################### 97 | ** 98 | ** This file was created by Processor Expert 10.1 [05.21] 99 | ** for the Freescale S32K series of microcontrollers. 100 | ** 101 | ** ################################################################### 102 | */ 103 | 104 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/pdb2.h: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : pdb2.h 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : pdb 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Contents : 12 | ** PDB_DRV_Init - void PDB_DRV_Init(const uint32_t instance, const pdb_timer_config_t *... 13 | ** PDB_DRV_Deinit - void PDB_DRV_Deinit(const uint32_t instance); 14 | ** PDB_DRV_GetDefaultConfig - void PDB_DRV_GetDefaultConfig(pdb_timer_config_t * const config); 15 | ** PDB_DRV_Enable - void PDB_DRV_Enable(const uint32_t instance); 16 | ** PDB_DRV_Disable - void PDB_DRV_Disable(const uint32_t instance); 17 | ** PDB_DRV_SoftTriggerCmd - void PDB_DRV_SoftTriggerCmd(const uint32_t instance); 18 | ** PDB_DRV_GetTimerValue - uint32_t PDB_DRV_GetTimerValue(const uint32_t instance); 19 | ** PDB_DRV_GetTimerIntFlag - bool PDB_DRV_GetTimerIntFlag(const uint32_t instance); 20 | ** PDB_DRV_ClearTimerIntFlag - void PDB_DRV_ClearTimerIntFlag(const uint32_t instance); 21 | ** PDB_DRV_LoadValuesCmd - void PDB_DRV_LoadValuesCmd(const uint32_t instance); 22 | ** PDB_DRV_SetTimerModulusValue - void PDB_DRV_SetTimerModulusValue(const uint32_t instance, const uint32_t... 23 | ** PDB_DRV_SetValueForTimerInterrupt - void PDB_DRV_SetValueForTimerInterrupt(const uint32_t instance, const... 24 | ** PDB_DRV_ConfigAdcPreTrigger - void PDB_DRV_ConfigAdcPreTrigger(const uint32_t instance, const uint32_t chn,... 25 | ** PDB_DRV_GetAdcPreTriggerFlags - uint32_t PDB_DRV_GetAdcPreTriggerFlags(const uint32_t instance, const... 26 | ** PDB_DRV_ClearAdcPreTriggerFlags - void PDB_DRV_ClearAdcPreTriggerFlags(const uint32_t instance, const uint32_t... 27 | ** PDB_DRV_GetAdcPreTriggerSeqErrFlags - uint32_t PDB_DRV_GetAdcPreTriggerSeqErrFlags(const uint32_t instance, const... 28 | ** PDB_DRV_ClearAdcPreTriggerSeqErrFlags - void PDB_DRV_ClearAdcPreTriggerSeqErrFlags(const uint32_t instance, const... 29 | ** PDB_DRV_SetAdcPreTriggerDelayValue - void PDB_DRV_SetAdcPreTriggerDelayValue(const uint32_t instance, const... 30 | ** PDB_DRV_SetCmpPulseOutEnable - void PDB_DRV_SetCmpPulseOutEnable(const uint32_t instance, const uint32_t... 31 | ** PDB_DRV_SetCmpPulseOutDelayForHigh - void PDB_DRV_SetCmpPulseOutDelayForHigh(const uint32_t instance, const... 32 | ** PDB_DRV_SetCmpPulseOutDelayForLow - void PDB_DRV_SetCmpPulseOutDelayForLow(const uint32_t instance, const... 33 | ** 34 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 35 | ** Copyright 2016-2017 NXP 36 | ** All Rights Reserved. 37 | ** 38 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 39 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 40 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 41 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 42 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 43 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 44 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 45 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 46 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 47 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 48 | ** THE POSSIBILITY OF SUCH DAMAGE. 49 | ** ###################################################################*/ 50 | /*! 51 | ** @file pdb2.h 52 | ** @version 01.00 53 | */ 54 | /*! 55 | ** @addtogroup pdb2_module pdb2 module documentation 56 | ** @{ 57 | */ 58 | #ifndef pdb2_H 59 | #define pdb2_H 60 | /* MODULE pdb2. */ 61 | 62 | /** 63 | * @page misra_violations MISRA-C:2012 violations 64 | * 65 | * @section [global] 66 | * Violates MISRA 2012 Advisory Rule 2.5, global macro not referenced 67 | * There are global macros defined to be used by the integrator and another one used as include guard. 68 | */ 69 | 70 | /* Include inherited beans */ 71 | #include "Cpu.h" 72 | 73 | /*! @brief Device instance number */ 74 | #define INST_PDB2 (1U) 75 | 76 | /*! @brief ADC pre-trigger configuration declaration */ 77 | extern const pdb_adc_pretrigger_config_t pdb2_AdcTrigInitConfig0; 78 | extern const pdb_adc_pretrigger_config_t pdb2_AdcTrigInitConfig1; 79 | extern const pdb_adc_pretrigger_config_t pdb2_AdcTrigInitConfig2; 80 | extern const pdb_adc_pretrigger_config_t pdb2_AdcTrigInitConfig3; 81 | 82 | /*! @brief PDB timer init config declaration */ 83 | extern const pdb_timer_config_t pdb2_InitConfig0; 84 | 85 | 86 | #endif 87 | /* ifndef pdb2_H */ 88 | /*! 89 | ** @} 90 | */ 91 | /* 92 | ** ################################################################### 93 | ** 94 | ** This file was created by Processor Expert 10.1 [05.21] 95 | ** for the Freescale S32K series of microcontrollers. 96 | ** 97 | ** ################################################################### 98 | */ 99 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/pwrMan1.c: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : pwrMan1.c 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : power_manager 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** 12 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 13 | ** Copyright 2016-2017 NXP 14 | ** All Rights Reserved. 15 | ** 16 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 17 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 20 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 | ** THE POSSIBILITY OF SUCH DAMAGE. 27 | ** ###################################################################*/ 28 | /*! 29 | ** @file pwrMan1.c 30 | ** @version 01.00 31 | */ 32 | /*! 33 | ** @addtogroup pwrMan1_module pwrMan1 module documentation 34 | ** @{ 35 | */ 36 | /* pwrMan1. */ 37 | 38 | /* MODULE pwrMan1. 39 | * 40 | * @page misra_violations MISRA-C:2012 violations 41 | * 42 | * @section [global] 43 | * Violates MISRA 2012 Advisory Rule 8.7, External variable could be made static. 44 | * The external variables will be used in other source files that user initialize 45 | * to use this module. 46 | */ 47 | #include "pwrMan1.h" 48 | #include 49 | 50 | /* ************************************************************************* 51 | * Configuration structure for Power Manager Configuration 0 52 | * ************************************************************************* */ 53 | /*! @brief User Configuration structure power_managerCfg_0 */ 54 | power_manager_user_config_t pwrMan1_InitConfig0 = { 55 | .powerMode = POWER_MANAGER_RUN, /*!< Power manager mode */ 56 | .sleepOnExitValue = false, /*!< Sleep on exit value */ 57 | }; 58 | /* ************************************************************************* 59 | * Configuration structure for Power Manager Configuration 1 60 | * ************************************************************************* */ 61 | /*! @brief User Configuration structure power_managerCfg_1 */ 62 | power_manager_user_config_t pwrMan1_InitConfig1 = { 63 | .powerMode = POWER_MANAGER_HSRUN, /*!< Power manager mode */ 64 | .sleepOnExitValue = false, /*!< Sleep on exit value */ 65 | }; 66 | 67 | /*! @brief Array of pointers to User configuration structures */ 68 | power_manager_user_config_t * powerConfigsArr[] = { 69 | &pwrMan1_InitConfig0, 70 | &pwrMan1_InitConfig1 71 | }; 72 | /*! @brief Array of pointers to User defined Callbacks configuration structures */ 73 | power_manager_callback_user_config_t * powerStaticCallbacksConfigsArr[] = {(void *)0}; 74 | 75 | 76 | /* END pwrMan1. */ 77 | /*! 78 | ** @} 79 | */ 80 | /* 81 | ** ################################################################### 82 | ** 83 | ** This file was created by Processor Expert 10.1 [05.21] 84 | ** for the Freescale S32K series of microcontrollers. 85 | ** 86 | ** ################################################################### 87 | */ 88 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/pwrMan1.h: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : pwrMan1.h 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : power_manager 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Contents : 12 | ** POWER_SYS_Init - status_t POWER_SYS_Init(power_manager_user_config_t *(*)... 13 | ** POWER_SYS_Deinit - status_t POWER_SYS_Deinit(void); 14 | ** POWER_SYS_SetMode - status_t POWER_SYS_SetMode(uint8_t powerModeIndex,power_manager_policy_t... 15 | ** POWER_SYS_GetLastMode - status_t POWER_SYS_GetLastMode(uint8_t* powerModeIndexPtr); 16 | ** POWER_SYS_GetLastModeConfig - status_t POWER_SYS_GetLastModeConfig(power_manager_user_config_t**... 17 | ** POWER_SYS_GetCurrentMode - power_manager_modes_t POWER_SYS_GetCurrentMode(void); 18 | ** POWER_SYS_GetErrorCallbackIndex - uint8_t POWER_SYS_GetErrorCallbackIndex(void); 19 | ** POWER_SYS_GetErrorCallback - power_manager_callback_user_config_t* POWER_SYS_GetErrorCallback(void); 20 | ** POWER_SYS_GetDefaultConfig - void POWER_SYS_GetDefaultConfig(power_manager_user_config_t * const config); 21 | ** POWER_SYS_GetResetSrcStatusCmd - bool POWER_SYS_GetResetSrcStatusCmd(const RCM_Type * const baseAddr , const... 22 | ** 23 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 24 | ** Copyright 2016-2017 NXP 25 | ** All Rights Reserved. 26 | ** 27 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 28 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 29 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 37 | ** THE POSSIBILITY OF SUCH DAMAGE. 38 | ** ###################################################################*/ 39 | /*! 40 | ** @file pwrMan1.h 41 | ** @version 01.00 42 | */ 43 | /*! 44 | ** @addtogroup pwrMan1_module pwrMan1 module documentation 45 | ** @{ 46 | */ 47 | #ifndef pwrMan1_H 48 | #define pwrMan1_H 49 | /* MODULE pwrMan1. */ 50 | /* Include inherited beans */ 51 | #include "clockMan1.h" 52 | #include "Cpu.h" 53 | #include "power_manager.h" 54 | 55 | /** 56 | * @page misra_violations MISRA-C:2012 violations 57 | * 58 | * @section [global] 59 | * Violates MISRA 2012 Advisory Rule 8.11, When an array with external linkage 60 | * is declared, its size should be explicitly specified. 61 | * The number of configurations/callbacks can be zero. 62 | * On the other side C language forbids declaring array of size zero. 63 | * 64 | * @section [global] 65 | * Violates MISRA 2012 Advisory Rule 2.5, Global macro not referenced. 66 | * Application or driver example may not use all symbols that are 67 | * generated by configurations generator. 68 | */ 69 | 70 | 71 | /*! @brief User configuration structure 0 */ 72 | extern power_manager_user_config_t pwrMan1_InitConfig0; 73 | /*! @brief User configuration structure 1 */ 74 | extern power_manager_user_config_t pwrMan1_InitConfig1; 75 | /*! @brief Count of user configuration structures */ 76 | #define POWER_MANAGER_CONFIG_CNT 2U 77 | /*! @brief Array of pointers to User configuration structures */ 78 | extern power_manager_user_config_t * powerConfigsArr[]; 79 | /*! @brief Count of user Callbacks */ 80 | #define POWER_MANAGER_CALLBACK_CNT 0U 81 | 82 | /*! @brief Array of pointers to User defined static Callbacks configuration structures */ 83 | extern power_manager_callback_user_config_t * powerStaticCallbacksConfigsArr[]; 84 | 85 | 86 | #endif 87 | /* ifndef pwrMan1_H */ 88 | /*! 89 | ** @} 90 | */ 91 | /* 92 | ** ################################################################### 93 | ** 94 | ** This file was created by Processor Expert 10.1 [05.21] 95 | ** for the Freescale S32K series of microcontrollers. 96 | ** 97 | ** ################################################################### 98 | */ 99 | 100 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/trgmux1.c: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : trgmux1.c 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : trgmux 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** 12 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 13 | ** Copyright 2016-2017 NXP 14 | ** All Rights Reserved. 15 | ** 16 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 17 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 20 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 | ** THE POSSIBILITY OF SUCH DAMAGE. 27 | ** ###################################################################*/ 28 | /*! 29 | ** @file trgmux1.c 30 | ** @version 01.00 31 | */ 32 | /*! 33 | ** @addtogroup trgmux1_module trgmux1 module documentation 34 | ** @{ 35 | */ 36 | 37 | /* MODULE trgmux1. */ 38 | 39 | /** 40 | * @page misra_violations MISRA-C:2012 violations 41 | * 42 | * @section [global] 43 | * Violates MISRA 2012 Advisory Rule 8.7, External variable could be made static. 44 | * The external variables will be used in other source files, with the same initialized values. 45 | */ 46 | 47 | #include "trgmux1.h" 48 | 49 | const trgmux_inout_mapping_config_t trgmux1_InOutMappingConfig0[2] = 50 | { 51 | {TRGMUX_TRIG_SOURCE_FTM3_INIT_TRIG, TRGMUX_TARGET_MODULE_PDB0_TRG_IN, false}, 52 | {TRGMUX_TRIG_SOURCE_FTM3_INIT_TRIG, TRGMUX_TARGET_MODULE_PDB1_TRG_IN, false}, 53 | }; 54 | 55 | 56 | 57 | /*! trgmux1 configuration structure */ 58 | const trgmux_user_config_t trgmux1_InitConfig0 = { 59 | .numInOutMappingConfigs = 2, 60 | .inOutMappingConfig = trgmux1_InOutMappingConfig0, 61 | }; 62 | 63 | /* END trgmux1. */ 64 | /*! 65 | ** @} 66 | */ 67 | /* 68 | ** ################################################################### 69 | ** 70 | ** This file was created by Processor Expert 10.1 [05.21] 71 | ** for the Freescale S32K series of microcontrollers. 72 | ** 73 | ** ################################################################### 74 | */ 75 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Generated_Code/trgmux1.h: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** This component module is generated by Processor Expert. Do not modify it. 3 | ** Filename : trgmux1.h 4 | ** Project : FOC_Ctrl_MBD_Integration 5 | ** Processor : S32K144_100 6 | ** Component : trgmux 7 | ** Version : Component SDK_S32K1xx_15, Driver 01.00, CPU db: 3.00.000 8 | ** Repository : SDK_S32K1xx_15 9 | ** Compiler : GNU C Compiler 10 | ** Date/Time : 2021-12-23, 22:54, # CodeGen: 0 11 | ** Contents : 12 | ** TRGMUX_DRV_Init - status_t TRGMUX_DRV_Init(const uint32_t instance, const trgmux_user_config_t... 13 | ** TRGMUX_DRV_Deinit - status_t TRGMUX_DRV_Deinit(const uint32_t instance); 14 | ** TRGMUX_DRV_SetTrigSourceForTargetModule - status_t TRGMUX_DRV_SetTrigSourceForTargetModule(const uint32_t instance,... 15 | ** TRGMUX_DRV_GetTrigSourceForTargetModule - trgmux_trigger_source_t TRGMUX_DRV_GetTrigSourceForTargetModule(const... 16 | ** TRGMUX_DRV_SetLockForTargetModule - void TRGMUX_DRV_SetLockForTargetModule(const uint32_t instance, const... 17 | ** TRGMUX_DRV_GetLockForTargetModule - bool TRGMUX_DRV_GetLockForTargetModule(const uint32_t instance, const... 18 | ** TRGMUX_DRV_GenSWTrigger - void TRGMUX_DRV_GenSWTrigger(const uint32_t instance); 19 | ** 20 | ** Copyright 1997 - 2015 Freescale Semiconductor, Inc. 21 | ** Copyright 2016-2017 NXP 22 | ** All Rights Reserved. 23 | ** 24 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 25 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 28 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 32 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 33 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 | ** THE POSSIBILITY OF SUCH DAMAGE. 35 | ** ###################################################################*/ 36 | /*! 37 | ** @file trgmux1.h 38 | ** @version 01.00 39 | */ 40 | /*! 41 | ** @addtogroup trgmux1_module trgmux1 module documentation 42 | ** @{ 43 | */ 44 | 45 | #ifndef trgmux1_H 46 | #define trgmux1_H 47 | /* MODULE trgmux1. */ 48 | 49 | /** 50 | * @page misra_violations MISRA-C:2012 violations 51 | * 52 | * @section [global] 53 | * Violates MISRA 2012 Advisory Rule 2.5, global macro not referenced 54 | * There are global macros defined to be used by the integrator and another one used as include guard. 55 | */ 56 | 57 | /* Include inherited beans */ 58 | #include "Cpu.h" 59 | 60 | 61 | /*! @brief Device instance number */ 62 | #define INST_TRGMUX1 (0U) 63 | 64 | 65 | /*! @brief Declaration of InOut Mapping configuration */ 66 | extern const trgmux_inout_mapping_config_t trgmux1_InOutMappingConfig0[2]; 67 | 68 | /*! @brief Configuration declaration */ 69 | extern const trgmux_user_config_t trgmux1_InitConfig0; 70 | 71 | 72 | #endif /* trgmux1_H */ 73 | /*! 74 | ** @} 75 | */ 76 | /* 77 | ** ################################################################### 78 | ** 79 | ** This file was created by Processor Expert 10.1 [05.21] 80 | ** for the Freescale S32K series of microcontrollers. 81 | ** 82 | ** ################################################################### 83 | */ 84 | 85 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Project_Settings/Linker_Files/S32K144_64_ram.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ** ################################################################### 3 | ** Processor: S32K144 with 64 KB SRAM 4 | ** Compiler: GNU C Compiler 5 | ** 6 | ** Abstract: 7 | ** Linker file for the GNU C Compiler 8 | ** 9 | ** Copyright (c) 2015-2016 Freescale Semiconductor, Inc. 10 | ** Copyright 2017-2018 NXP 11 | ** All rights reserved. 12 | ** 13 | ** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 14 | ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 | ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 | ** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 17 | ** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 18 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 19 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 | ** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 21 | ** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 22 | ** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 23 | ** THE POSSIBILITY OF SUCH DAMAGE. 24 | ** 25 | ** http: www.freescale.com 26 | ** mail: support@freescale.com 27 | ** 28 | ** ################################################################### 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x00000400; 35 | STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x00000400; 36 | 37 | /* Specify the memory areas */ 38 | MEMORY 39 | { 40 | /* SRAM_L */ 41 | m_interrupts (RX) : ORIGIN = 0x1FFF8000, LENGTH = 0x00000400 42 | m_text (RX) : ORIGIN = 0x1FFF8400, LENGTH = 0x00007C00 43 | 44 | /* SRAM_U */ 45 | m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00007000 46 | } 47 | 48 | /* Define output sections */ 49 | SECTIONS 50 | { 51 | /* The startup code goes first into internal RAM */ 52 | .interrupts : 53 | { 54 | __VECTOR_TABLE = .; 55 | __interrupts_start__ = .; 56 | . = ALIGN(4); 57 | KEEP(*(.isr_vector)) /* Startup code */ 58 | __interrupts_end__ = .; 59 | . = ALIGN(4); 60 | } > m_interrupts 61 | 62 | __VECTOR_RAM = __VECTOR_TABLE; 63 | __RAM_VECTOR_TABLE_SIZE = 0x0; 64 | 65 | /* The program code and other data goes into internal RAM */ 66 | .text : 67 | { 68 | . = ALIGN(4); 69 | *(.text) /* .text sections (code) */ 70 | *(.text*) /* .text* sections (code) */ 71 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 72 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 73 | *(.init) /* section used in crti.o files */ 74 | *(.fini) /* section used in crti.o files */ 75 | *(.eh_frame) /* section used in crtbegin.o files */ 76 | . = ALIGN(4); 77 | } > m_text 78 | 79 | /* Section used by the libgcc.a library for fvp4 */ 80 | .ARM : 81 | { 82 | __exidx_start = .; 83 | *(.ARM.exidx*) 84 | __exidx_end = .; 85 | } > m_text 86 | 87 | /* Section for storing functions that needs to execute from RAM */ 88 | .code_ram : 89 | { 90 | . = ALIGN(4); 91 | __CODE_RAM = .; 92 | __code_ram_start__ = .; 93 | *(.code_ram) /* Custom section for storing code in RAM */ 94 | __CODE_ROM = .; /* Symbol is used by start-up for data initialization. */ 95 | __CODE_END = .; /* No copy */ 96 | __code_ram_end__ = .; 97 | . = ALIGN(4); 98 | } > m_text 99 | 100 | __etext = .; /* Define a global symbol at end of code. */ 101 | __DATA_ROM = .; /* Symbol is used by startup for data initialization. */ 102 | __DATA_END = __DATA_ROM; /* No copy */ 103 | 104 | /* Custom Section Block that can be used to place data at absolute address. */ 105 | /* Use __attribute__((section (".customSection"))) to place data here. */ 106 | .customSectionBlock ORIGIN(m_data) : 107 | { 108 | __customSection_start__ = .; 109 | KEEP(*(.customSection)) /* Keep section even if not referenced. */ 110 | __customSection_end__ = .; 111 | __CUSTOM_ROM = .; 112 | __CUSTOM_END = .; 113 | } > m_data 114 | 115 | .data : 116 | { 117 | . = ALIGN(4); 118 | __DATA_RAM = .; 119 | __data_start__ = .; /* Create a global symbol at data start. */ 120 | *(.data) /* .data sections */ 121 | *(.data*) /* .data* sections */ 122 | . = ALIGN(4); 123 | __data_end__ = .; /* Define a global symbol at data end. */ 124 | } > m_data 125 | 126 | /* Uninitialized data section. */ 127 | .bss : 128 | { 129 | /* This is used by the startup in order to initialize the .bss section. */ 130 | . = ALIGN(4); 131 | __BSS_START = .; 132 | __bss_start__ = .; 133 | *(.bss) 134 | *(.bss*) 135 | *(COMMON) 136 | . = ALIGN(4); 137 | __bss_end__ = .; 138 | __BSS_END = .; 139 | } > m_data 140 | 141 | /* Put heap section after the program data */ 142 | .heap : 143 | { 144 | . = ALIGN(8); 145 | __end__ = .; 146 | __heap_start__ = .; 147 | PROVIDE(end = .); 148 | PROVIDE(_end = .); 149 | PROVIDE(__end = .); 150 | __HeapBase = .; 151 | . += HEAP_SIZE; 152 | __HeapLimit = .; 153 | __heap_limit = .; 154 | __heap_end__ = .; 155 | } > m_data 156 | 157 | /* Initializes stack on the end of block */ 158 | __StackTop = ORIGIN(m_data) + LENGTH(m_data); 159 | __StackLimit = __StackTop - STACK_SIZE; 160 | PROVIDE(__stack = __StackTop); 161 | 162 | .stack __StackLimit : 163 | { 164 | . = ALIGN(8); 165 | __stack_start__ = .; 166 | . += STACK_SIZE; 167 | __stack_end__ = .; 168 | } > m_data 169 | 170 | .ARM.attributes 0 : { *(.ARM.attributes) } 171 | 172 | ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") 173 | 174 | /DISCARD/ : { 175 | *(.FlashConfig) 176 | } 177 | } 178 | 179 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/devices/S32K144/startup/system_S32K144.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2015 Freescale Semiconductor, Inc. 3 | * Copyright 2016-2017 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | 19 | 20 | /*! @addtogroup soc_support_S32K144*/ 21 | /*! @{*/ 22 | 23 | /*! 24 | * @file system_S32K144.h 25 | * @brief Device specific configuration file for S32K144 26 | */ 27 | 28 | #ifndef SYSTEM_S32K144_H_ 29 | #define SYSTEM_S32K144_H_ /**< Symbol preventing repeated inclusion */ 30 | 31 | #include 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /****************************************************************************** 38 | * CPU Settings. 39 | *****************************************************************************/ 40 | 41 | /* Watchdog disable */ 42 | #ifndef DISABLE_WDOG 43 | #define DISABLE_WDOG 1 44 | #endif 45 | 46 | /* Cache enablement */ 47 | #ifndef ICACHE_ENABLE 48 | #define ICACHE_ENABLE 0 49 | #endif 50 | 51 | /* Value of the external crystal or oscillator clock frequency in Hz */ 52 | #ifndef CPU_XTAL_CLK_HZ 53 | #define CPU_XTAL_CLK_HZ 8000000u 54 | #endif 55 | 56 | /* Value of the fast internal oscillator clock frequency in Hz */ 57 | #ifndef CPU_INT_FAST_CLK_HZ 58 | #define CPU_INT_FAST_CLK_HZ 48000000u 59 | #endif 60 | 61 | /* Default System clock value */ 62 | #ifndef DEFAULT_SYSTEM_CLOCK 63 | #define DEFAULT_SYSTEM_CLOCK 48000000u 64 | #endif 65 | 66 | /** 67 | * @brief System clock frequency (core clock) 68 | * 69 | * The system clock frequency supplied to the SysTick timer and the processor 70 | * core clock. This variable can be used by the user application to setup the 71 | * SysTick timer or configure other parameters. It may also be used by debugger to 72 | * query the frequency of the debug timer or configure the trace clock speed 73 | * SystemCoreClock is initialized with a correct predefined value. 74 | */ 75 | extern uint32_t SystemCoreClock; 76 | 77 | /** 78 | * @brief Setup the SoC. 79 | * 80 | * This function disables the watchdog, enables FPU. 81 | * if the corresponding feature macro is enabled. 82 | * SystemInit is called from startup_device file. 83 | */ 84 | void SystemInit(void); 85 | 86 | /** 87 | * @brief Updates the SystemCoreClock variable. 88 | * 89 | * It must be called whenever the core clock is changed during program 90 | * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates 91 | * the current core clock. 92 | * This function must be called when user does not want to use clock manager component. 93 | * If clock manager is used, the CLOCK_SYS_GetFreq function must be used with CORE_CLOCK 94 | * parameter. 95 | * 96 | */ 97 | void SystemCoreClockUpdate(void); 98 | 99 | /** 100 | * @brief Initiates a system reset. 101 | * 102 | * This function is used to initiate a system reset 103 | */ 104 | void SystemSoftwareReset(void); 105 | 106 | #ifdef __cplusplus 107 | } 108 | #endif 109 | 110 | /*! @}*/ 111 | #endif /* #if !defined(SYSTEM_S32K144_H_) */ 112 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/devices/devassert.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. 3 | * Copyright 2016-2017 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | 19 | #ifndef DEVASSERT_H 20 | #define DEVASSERT_H 21 | 22 | #include 23 | 24 | /** 25 | * @page misra_violations MISRA-C:2012 violations 26 | * 27 | * @section [global] 28 | * Violates MISRA 2012 Advisory Rule 2.5, global macro not referenced. 29 | * The macro is defined to be used by drivers to validate input parameters and can be disabled. 30 | * 31 | * @section [global] 32 | * Violates MISRA 2012 Advisory Directive 4.9, Function-like macro defined. 33 | * The macros are used to validate input parameters to driver functions. 34 | * 35 | */ 36 | 37 | /** 38 | \page Error_detection_and_reporting Error detection and reporting 39 | 40 | S32 SDK drivers can use a mechanism to validate data coming from upper software layers (application code) by performing 41 | a number of checks on input parameters' range or other invariants that can be statically checked (not dependent on 42 | runtime conditions). A failed validation is indicative of a software bug in application code, therefore it is important 43 | to use this mechanism during development. 44 | 45 | The validation is performed by using DEV_ASSERT macro. 46 | A default implementation of this macro is provided in this file. However, application developers can provide their own 47 | implementation in a custom file. This requires defining the CUSTOM_DEVASSERT symbol with the specific file name in the 48 | project configuration (for example: -DCUSTOM_DEVASSERT="custom_devassert.h") 49 | 50 | The default implementation accommodates two behaviors, based on DEV_ERROR_DETECT symbol: 51 | - When DEV_ERROR_DETECT symbol is defined in the project configuration (for example: -DDEV_ERROR_DETECT), the validation 52 | performed by the DEV_ASSERT macro is enabled, and a failed validation triggers a software breakpoint and further execution is 53 | prevented (application spins in an infinite loop) 54 | This configuration is recommended for development environments, as it prevents further execution and allows investigating 55 | potential problems from the point of error detection. 56 | - When DEV_ERROR_DETECT symbol is not defined, the DEV_ASSERT macro is implemented as no-op, therefore disabling all validations. 57 | This configuration can be used to eliminate the overhead of development-time checks. 58 | 59 | It is the application developer's responsibility to decide the error detection strategy for production code: one can opt to 60 | disable development-time checking altogether (by not defining DEV_ERROR_DETECT symbol), or one can opt to keep the checks 61 | in place and implement a recovery mechanism in case of a failed validation, by defining CUSTOM_DEVASSERT to point 62 | to the file containing the custom implementation. 63 | */ 64 | 65 | #if defined (CUSTOM_DEVASSERT) 66 | /* If the CUSTOM_DEVASSERT symbol is defined, then add the custom implementation */ 67 | #include CUSTOM_DEVASSERT 68 | #elif defined (DEV_ERROR_DETECT) 69 | /* Implement default assert macro */ 70 | static inline void DevAssert(volatile bool x) 71 | { 72 | if(x) { } else { BKPT_ASM; for(;;) {} } 73 | } 74 | #define DEV_ASSERT(x) DevAssert(x) 75 | #else 76 | /* Assert macro does nothing */ 77 | #define DEV_ASSERT(x) ((void)0) 78 | #endif 79 | 80 | #endif /* DEVASSERT_H */ 81 | 82 | /******************************************************************************* 83 | * EOF 84 | ******************************************************************************/ 85 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/devices/startup.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. 3 | * Copyright 2016-2017 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | 19 | #ifndef STARTUP_H 20 | #define STARTUP_H 21 | 22 | #include 23 | #include "device_registers.h" 24 | /** 25 | * @page misra_violations MISRA-C:2012 violations 26 | * 27 | * @section [global] 28 | * Violates MISRA 2012 Advisory Rule 2.5, Local macro not referenced. 29 | * The defined macro is used as include guard. 30 | * 31 | * @section [global] 32 | * Violates MISRA 2012 Advisory Rule 8.9, An object should be defined at block 33 | * scope if its identifier only appears in a single function. 34 | * All variables with this problem are defined in the linker files. 35 | * 36 | */ 37 | 38 | /******************************************************************************* 39 | * API 40 | ******************************************************************************/ 41 | 42 | /*! 43 | * @brief define symbols that specific start and end addres of some basic sections. 44 | */ 45 | #if (defined(S32K14x_SERIES) || defined(S32K11x_SERIES) || defined(S32V234_SERIES) || defined(MPC574x_SERIES) || defined(S32R_SERIES) || defined(S32MTV_SERIES) || defined(SJA1110_SERIES)) 46 | #if (defined(__ICCARM__)) 47 | #define INTERRUPTS_SECTION_START __section_begin(".intvec") 48 | #define INTERRUPTS_SECTION_END __section_end(".intvec") 49 | #define BSS_SECTION_START __section_begin(".bss") 50 | #define BSS_SECTION_END __section_end(".bss") 51 | #define DATA_SECTION_START __section_begin(".data") 52 | #define DATA_SECTION_END __section_end(".data") 53 | #define CUSTOMSECTION_SECTION_START __section_begin(".customSection") 54 | #define CUSTOMSECTION_SECTION_END __section_end(".customSection") 55 | #define CODE_RAM_SECTION_START __section_begin("__CODE_RAM") 56 | #define CODE_RAM_SECTION_END __section_end("__CODE_RAM") 57 | #define DATA_INIT_SECTION_START __section_begin(".data_init") 58 | #define DATA_INIT_SECTION_END __section_end(".data_init") 59 | #define CODE_ROM_SECTION_START __section_begin("__CODE_ROM") 60 | #define CODE_ROM_SECTION_END __section_end("__CODE_ROM") 61 | 62 | #elif (defined(__ARMCC_VERSION)) 63 | #define INTERRUPTS_SECTION_START (uint8_t *)__VECTOR_ROM_START 64 | #define INTERRUPTS_SECTION_END (uint8_t *)__VECTOR_ROM_END 65 | #define BSS_SECTION_START (uint8_t *)__BSS_START 66 | #define BSS_SECTION_END (uint8_t *)__BSS_END 67 | #define DATA_SECTION_START (uint8_t *)__DATA_RAM_START 68 | #define DATA_SECTION_END (uint8_t *)__DATA_RAM_END 69 | #define CUSTOMSECTION_SECTION_START (uint8_t *)__CUSTOM_SECTION_START 70 | #define CUSTOMSECTION_SECTION_END (uint8_t *)__CUSTOM_SECTION_END 71 | #define CODE_RAM_SECTION_START (uint8_t *)__CODE_RAM_START 72 | #define CODE_RAM_SECTION_END (uint8_t *)__CODE_RAM_END 73 | 74 | extern uint32_t __VECTOR_ROM_START; 75 | extern uint32_t __VECTOR_ROM_END; 76 | extern uint32_t __BSS_START; 77 | extern uint32_t __BSS_END; 78 | extern uint32_t __DATA_RAM_START; 79 | extern uint32_t __DATA_RAM_END; 80 | extern uint32_t __CUSTOM_SECTION_START; 81 | extern uint32_t __CUSTOM_SECTION_END; 82 | extern uint32_t __CODE_RAM_START; 83 | extern uint32_t __CODE_RAM_END; 84 | #else 85 | #define INTERRUPTS_SECTION_START (uint8_t *)&__interrupts_start__ 86 | #define INTERRUPTS_SECTION_END (uint8_t *)&__interrupts_end__ 87 | #define BSS_SECTION_START (uint8_t *)&__bss_start__ 88 | #define BSS_SECTION_END (uint8_t *)&__bss_end__ 89 | #define DATA_SECTION_START (uint8_t *)&__data_start__ 90 | #define DATA_SECTION_END (uint8_t *)&__data_end__ 91 | #define CUSTOMSECTION_SECTION_START (uint8_t *)&__customSection_start__ 92 | #define CUSTOMSECTION_SECTION_END (uint8_t *)&__customSection_end__ 93 | #define CODE_RAM_SECTION_START (uint8_t *)&__code_ram_start__ 94 | #define CODE_RAM_SECTION_END (uint8_t *)&__code_ram_end__ 95 | 96 | extern uint32_t __interrupts_start__; 97 | extern uint32_t __interrupts_end__; 98 | extern uint32_t __bss_start__; 99 | extern uint32_t __bss_end__; 100 | extern uint32_t __data_start__; 101 | extern uint32_t __data_end__; 102 | extern uint32_t __customSection_start__; 103 | extern uint32_t __customSection_end__; 104 | extern uint32_t __code_ram_start__; 105 | extern uint32_t __code_ram_end__; 106 | #endif 107 | #endif 108 | 109 | #if (defined(__ICCARM__)) 110 | #pragma section = ".data" 111 | #pragma section = ".data_init" 112 | #pragma section = ".bss" 113 | #pragma section = ".intvec" 114 | #pragma section = ".customSection" 115 | #pragma section = ".customSection_init" 116 | #pragma section = "__CODE_RAM" 117 | #pragma section = "__CODE_ROM" 118 | #endif 119 | 120 | /*! 121 | * @brief Make necessary initializations for RAM. 122 | * 123 | * - Copy initialized data from ROM to RAM. 124 | * - Clear the zero-initialized data section. 125 | * - Copy the vector table from ROM to RAM. This could be an option. 126 | */ 127 | void init_data_bss(void); 128 | 129 | #endif /* STARTUP_H*/ 130 | /******************************************************************************* 131 | * EOF 132 | ******************************************************************************/ 133 | 134 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/drivers/inc/clock.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc. 3 | * Copyright 2016-2017 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | 19 | #if !defined(CLOCK_H) 20 | #define CLOCK_H 21 | 22 | #include "device_registers.h" 23 | #include "status.h" 24 | 25 | /* 26 | * Include the cpu specific clock API header files. 27 | */ 28 | 29 | #if (defined(S32K14x_SERIES) || defined(S32K11x_SERIES)) 30 | /* S32K144 Clock System Level API header file */ 31 | #include "../src/clock/S32K1xx/clock_S32K1xx.h" 32 | #elif (defined(S32MTV_SERIES)) 33 | /* S32MTV Clock System Level API header file */ 34 | #include "../src/clock/S32Mxx/clock_S32Mxx.h" 35 | #elif (defined(MPC5777C_SERIES)) 36 | /* MPC5777C Clock System Level API header file */ 37 | #include "../src/clock/MPC5777C/clock_MPC5777C.c" 38 | #elif (defined(MPC574x_SERIES) || defined(S32R_SERIES)) 39 | /* MPC574x Clock System Level API header file */ 40 | #include "../src/clock/MPC57xx/clock_MPC57xx.h" 41 | #elif (defined(S32S247_SERIES)) 42 | /* S32S247 Clock System Level API header file */ 43 | #include "../src/clock/S32Sxx/clock_S32Sxx.h" 44 | #elif (defined(SJA1110_SERIES)) 45 | /* SJA1110 Clock System Level API header file */ 46 | #include "../src/clock/SJA1110x/clock_SJA1110x.h" 47 | #elif (defined(S32V234_SERIES)) 48 | /* S32Vxx Clock System Level API header file */ 49 | #include "../src/clock/S32Vxx/clock_S32Vxx.h" 50 | #else 51 | #error "No valid CPU defined!" 52 | #endif 53 | 54 | /*! 55 | * @file clock.h 56 | */ 57 | 58 | /*! @addtogroup clock*/ 59 | /*! @{*/ 60 | 61 | /******************************************************************************* 62 | * Definitions 63 | ******************************************************************************/ 64 | 65 | 66 | #if defined(__cplusplus) 67 | extern "C" { 68 | #endif /* __cplusplus*/ 69 | 70 | /******************************************************************************* 71 | * API 72 | ******************************************************************************/ 73 | 74 | /*! 75 | * @name Dynamic clock setting 76 | * @{ 77 | */ 78 | 79 | /******************************************************************************* 80 | * API 81 | ******************************************************************************/ 82 | 83 | /*! 84 | * @brief Gets the clock frequency for a specific clock name. 85 | * 86 | * This function checks the current clock configurations and then calculates 87 | * the clock frequency for a specific clock name defined in clock_names_t. 88 | * Clock modules must be properly configured before using this function. 89 | * See features.h for supported clock names for different chip families. 90 | * The returned value is in Hertz. If it cannot find the clock name 91 | * or the name is not supported for a specific chip family, it returns an 92 | * STATUS_UNSUPPORTED. If frequency is required for a peripheral and the 93 | * module is not clocked, then STATUS_MCU_GATED_OFF status is returned. 94 | * Frequency is returned if a valid address is provided. If frequency is 95 | * required for a peripheral that doesn't support protocol clock, the zero 96 | * value is provided. 97 | * 98 | * @param[in] clockName Clock names defined in clock_names_t 99 | * @param[out] frequency Returned clock frequency value in Hertz 100 | * @return status Error code defined in status_t 101 | */ 102 | status_t CLOCK_DRV_GetFreq(clock_names_t clockName, 103 | uint32_t *frequency); 104 | 105 | 106 | /*! 107 | * @brief Set clock configuration according to pre-defined structure. 108 | * 109 | * This function sets system to target clock configuration; It sets the 110 | * clock modules registers for clock mode change. 111 | * 112 | * @param[in] config Pointer to configuration structure. 113 | * 114 | * @return Error code. 115 | * 116 | * @note If external clock is used in the target mode, please make sure it is 117 | * enabled, for example, if the external oscillator is used, please setup correctly. 118 | * 119 | * @note If the configuration structure is NULL, the function will set a default 120 | * configuration for clock. 121 | */ 122 | status_t CLOCK_DRV_Init(clock_user_config_t const * config); 123 | 124 | /*! @} */ 125 | 126 | 127 | #if defined(__cplusplus) 128 | } 129 | #endif /* __cplusplus*/ 130 | 131 | /*! @}*/ 132 | 133 | #endif /* CLOCK_H */ 134 | /******************************************************************************* 135 | * EOF 136 | ******************************************************************************/ 137 | 138 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/drivers/inc/clock_manager.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc. 3 | * Copyright 2016-2018 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | #if !defined(CLOCK_MANAGER_H) 19 | #define CLOCK_MANAGER_H 20 | #include "clock.h" 21 | /*! 22 | * @file clock_manager.h 23 | * 24 | * @page misra_violations MISRA-C:2012 violations 25 | * 26 | * @section [global] 27 | * Violates MISRA 2012 Advisory Rule 2.5, Global macro not referenced. 28 | * This header file is included by application only. It was created 29 | * for backward compatibility reasons. 30 | */ 31 | #endif /* CLOCK_MANAGER_H */ 32 | /******************************************************************************* 33 | * EOF 34 | ******************************************************************************/ 35 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/drivers/src/clock/S32K1xx/pmc_hw_access.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. 3 | * Copyright 2016 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | 19 | #if !defined(PMC_HW_ACCESS_H) 20 | #define PMC_HW_ACCESS_H 21 | 22 | #include "device_registers.h" 23 | #include 24 | #include 25 | 26 | /*! 27 | * @file pmc_hw_access.h 28 | * 29 | * @page misra_violations MISRA-C:2012 violations 30 | * 31 | */ 32 | 33 | /*! 34 | * @ingroup pmc_hw_access 35 | * @defgroup pmc_hw_access 36 | * @{ 37 | */ 38 | 39 | 40 | #if defined(__cplusplus) 41 | extern "C" { 42 | #endif /* __cplusplus*/ 43 | 44 | 45 | /*! 46 | * @brief Enables/Disables the Low Power Oscillator. 47 | * 48 | * This function enables/disables the Low Power Oscillator. 49 | * 50 | * @param[in] baseAddr Base address for current PMC instance. 51 | * @param[in] enable enable/disable the Low Power Oscillator. 52 | */ 53 | static inline void PMC_SetLpoMode(PMC_Type* const baseAddr, const bool enable) 54 | { 55 | uint8_t regValue = baseAddr->REGSC; 56 | regValue &= (uint8_t)(~(PMC_REGSC_LPODIS_MASK)); 57 | regValue |= (uint8_t)PMC_REGSC_LPODIS(enable?0U:1U); 58 | baseAddr->REGSC = regValue; 59 | } 60 | 61 | /*! 62 | * @brief Gets the Low Power Oscillator status. 63 | * 64 | * This function gets the Low Power Oscillator status. 65 | * 66 | * @param[in] baseAddr Base address for current PMC instance. 67 | * @return value LPO status 68 | * false - LPO is disabled 69 | * true - LPO is enabled 70 | */ 71 | static inline bool PMC_GetLpoMode(const PMC_Type * const baseAddr) 72 | { 73 | uint8_t regValue = baseAddr->REGSC; 74 | regValue = (uint8_t)((regValue & PMC_REGSC_LPODIS_MASK) >> PMC_REGSC_LPODIS_SHIFT); 75 | return (regValue == 0U) ? true : false; 76 | } 77 | 78 | 79 | /*! 80 | * @brief Low Power Oscillator Trimming Value 81 | * 82 | * This function sets the trimming value for the low power oscillator 83 | * 84 | * @param[in] baseAddr Base address for current PMC instance. 85 | * @param[in] value Trimming value 86 | */ 87 | static inline void PMC_SetLpoTrimValue(PMC_Type* const baseAddr, const int8_t decimalValue) 88 | { 89 | int8_t decValue = decimalValue; 90 | uint8_t lpotrim, trimval, regValue; 91 | 92 | if (decValue < 0) 93 | { 94 | lpotrim = ((uint8_t)1U) << (PMC_LPOTRIM_LPOTRIM_WIDTH); 95 | decValue = (int8_t)(decValue + (int8_t)(lpotrim)); 96 | } 97 | trimval = (uint8_t)decValue; 98 | 99 | DEV_ASSERT(trimval <= (1U << PMC_LPOTRIM_LPOTRIM_WIDTH)); 100 | 101 | regValue = baseAddr->LPOTRIM; 102 | regValue &= (uint8_t)(~(PMC_LPOTRIM_LPOTRIM_MASK)); 103 | regValue |= (uint8_t)PMC_LPOTRIM_LPOTRIM(trimval); 104 | baseAddr->LPOTRIM = regValue; 105 | } 106 | 107 | 108 | #if defined(__cplusplus) 109 | } 110 | #endif /* __cplusplus*/ 111 | 112 | 113 | /*! @}*/ 114 | 115 | #endif /* PMC_HW_ACCESS_H */ 116 | /******************************************************************************* 117 | * EOF 118 | ******************************************************************************/ 119 | 120 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/drivers/src/clock/S32K1xx/smc_hw_access.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. 3 | * Copyright 2016 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | 19 | #if !defined(SMC_HW_ACCESS_H) 20 | #define SMC_HW_ACCESS_H 21 | 22 | #include "device_registers.h" 23 | #include 24 | #include 25 | 26 | /*! 27 | * @file smc_hw_access.h 28 | * 29 | * @page misra_violations MISRA-C:2012 violations 30 | * 31 | */ 32 | 33 | /*! 34 | * @ingroup smc_hw_access 35 | * @defgroup smc_hw_access 36 | * @{ 37 | */ 38 | 39 | 40 | #if defined(__cplusplus) 41 | extern "C" { 42 | #endif /* __cplusplus*/ 43 | 44 | 45 | /*! 46 | * @brief Gets the current running power mode. 47 | * 48 | * This function returns the current running power mode. 49 | * 50 | * @param[in] baseAddr Base address for current SMC instance. 51 | * @return stat Current power mode stat 52 | */ 53 | static inline uint32_t SMC_GetCurrentRunningMode(const SMC_Type* const baseAddr) 54 | { 55 | return (baseAddr->PMSTAT & SMC_PMSTAT_PMSTAT_MASK) >> SMC_PMSTAT_PMSTAT_SHIFT; 56 | } 57 | 58 | 59 | #if defined(__cplusplus) 60 | } 61 | #endif /* __cplusplus*/ 62 | 63 | 64 | /*! @}*/ 65 | 66 | #endif /* SMC_HW_ACCESS_H */ 67 | /******************************************************************************* 68 | * EOF 69 | ******************************************************************************/ 70 | 71 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/drivers/src/edma/edma_irq.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 - 2016, Freescale Semiconductor, Inc. 3 | * Copyright 2016 - 2018 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | 19 | /*! 20 | * @file edma_irq.h 21 | */ 22 | 23 | #include "edma_hw_access.h" 24 | 25 | /*! @brief DMA channel interrupt handler, implemented in driver c file. */ 26 | void EDMA_DRV_IRQHandler(uint8_t virtualChannel); 27 | #ifdef FEATURE_DMA_HAS_ERROR_IRQ 28 | /*! @brief DMA error interrupt handler, implemented in driver c file. */ 29 | void EDMA_DRV_ErrorIRQHandler(uint8_t virtualChannel); 30 | #endif 31 | 32 | /******************************************************************************* 33 | * EOF 34 | ******************************************************************************/ 35 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/drivers/src/lpspi/lpspi_irq.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2015-2016, Freescale Semiconductor, Inc. 3 | * Copyright 2016 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | 19 | 20 | /*! 21 | * @lpspi_irq.c 22 | * 23 | * @page misra_violations MISRA-C:2012 violations 24 | * 25 | * @section [global] 26 | * Violates MISRA 2012 Required Rule 5.1, Object/function previously declared. 27 | * This requirement is fulfilled since the function is declared as external in and only in 28 | * one configuration C file. 29 | * 30 | * @section [global] 31 | * Violates MISRA 2012 Required Rule 5.2, identifier clash 32 | * The supported compilers use more than 31 significant characters for identifiers. 33 | * 34 | * @section [global] 35 | * Violates MISRA 2012 Required Rule 5.4, identifier clash 36 | * The supported compilers use more than 31 significant characters for identifiers. 37 | * 38 | * @section [global] 39 | * Violates MISRA 2012 Required Rule 5.5, identifier clash 40 | * The supported compilers use more than 31 significant characters for identifiers. 41 | * 42 | * @section [global] 43 | * Violates MISRA 2012 Required Rule 8.4, A compatible declaration shall be 44 | * visible when an object or function with external linkage is defined. 45 | * 46 | * @section [global] 47 | * Violates MISRA 2012 Advisory Rule 8.7, External could be made static. 48 | * Function is defined for usage by IRQs handlers and can't be defined as static 49 | * 50 | */ 51 | 52 | #include 53 | #include 54 | #include "device_registers.h" 55 | #include "lpspi_shared_function.h" 56 | 57 | 58 | /*! 59 | * @addtogroup lpspi_driver Low Power Serial Peripheral Interface (LPSPI) 60 | * @{ 61 | */ 62 | 63 | /******************************************************************************* 64 | * Variables 65 | ******************************************************************************/ 66 | 67 | /******************************************************************************* 68 | * Code 69 | ******************************************************************************/ 70 | 71 | #if (LPSPI_INSTANCE_COUNT == 1U) 72 | /*! 73 | * @brief This function is the implementation of LPSPI0 handler named in startup code. 74 | * 75 | * It passes the instance to the shared LPSPI IRQ handler. 76 | */ 77 | void LPSPI0_IRQHandler(void); 78 | 79 | void LPSPI0_IRQHandler(void) 80 | { 81 | LPSPI_DRV_IRQHandler(0U); 82 | } 83 | 84 | #elif (LPSPI_INSTANCE_COUNT == 2U) 85 | /*! 86 | * @brief This function is the implementation of LPSPI0 handler named in startup code. 87 | * 88 | * It passes the instance to the shared LPSPI IRQ handler. 89 | */ 90 | void LPSPI0_IRQHandler(void); 91 | 92 | void LPSPI0_IRQHandler(void) 93 | { 94 | LPSPI_DRV_IRQHandler(0U); 95 | } 96 | 97 | /*! 98 | * @brief This function is the implementation of LPSPI1 handler named in startup code. 99 | * 100 | * It passes the instance to the shared LPSPI IRQ handler. 101 | */ 102 | void LPSPI1_IRQHandler(void); 103 | 104 | void LPSPI1_IRQHandler(void) 105 | { 106 | LPSPI_DRV_IRQHandler(1U); 107 | } 108 | 109 | #else 110 | 111 | /*! 112 | * @brief This function is the implementation of LPSPI0 handler named in startup code. 113 | * 114 | * It passes the instance to the shared LPSPI IRQ handler. 115 | */ 116 | void LPSPI0_IRQHandler(void); 117 | 118 | void LPSPI0_IRQHandler(void) 119 | { 120 | LPSPI_DRV_IRQHandler(0U); 121 | } 122 | 123 | /*! 124 | * @brief This function is the implementation of LPSPI1 handler named in startup code. 125 | * 126 | * It passes the instance to the shared LPSPI IRQ handler. 127 | */ 128 | void LPSPI1_IRQHandler(void); 129 | 130 | void LPSPI1_IRQHandler(void) 131 | { 132 | LPSPI_DRV_IRQHandler(1U); 133 | } 134 | 135 | /*! 136 | * @brief This function is the implementation of LPSPI2 handler named in startup code. 137 | * 138 | * It passes the instance to the shared LPSPI IRQ handler. 139 | */ 140 | void LPSPI2_IRQHandler(void); 141 | 142 | void LPSPI2_IRQHandler(void) 143 | { 144 | LPSPI_DRV_IRQHandler(2U); 145 | } 146 | 147 | #endif 148 | 149 | /*! @} */ 150 | 151 | /******************************************************************************* 152 | * EOF 153 | ******************************************************************************/ 154 | 155 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/drivers/src/lpuart/lpuart_irq.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. 3 | * Copyright 2016-2017 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | 19 | /*! 20 | * @file lpuart_irq.c 21 | * 22 | * @page misra_violations MISRA-C:2012 violations 23 | * 24 | * @section [global] 25 | * Violates MISRA 2012 Advisory Rule 8.7, Function not defined with external linkage. 26 | * The functions are not defined static because they are referenced in .s startup files. 27 | * 28 | * @section [global] 29 | * Violates MISRA 2012 Advisory Rule 8.9, Could define variable at block scope 30 | * The variable is used in driver c file, so it must remain global. 31 | */ 32 | 33 | #include "lpuart_irq.h" 34 | 35 | /******************************************************************************* 36 | * Code 37 | ******************************************************************************/ 38 | 39 | #if (LPUART_INSTANCE_COUNT > 0U) 40 | /* Implementation of LPUART0 handler named in startup code. */ 41 | void LPUART0_IrqHandler(void) 42 | { 43 | LPUART_DRV_IRQHandler(0); 44 | } 45 | #endif 46 | 47 | #if (LPUART_INSTANCE_COUNT > 1U) 48 | /* Implementation of LPUART1 handler named in startup code. */ 49 | void LPUART1_IrqHandler(void) 50 | { 51 | LPUART_DRV_IRQHandler(1); 52 | } 53 | #endif 54 | 55 | #if (LPUART_INSTANCE_COUNT > 2U) 56 | /* Implementation of LPUART2 handler named in startup code. */ 57 | void LPUART2_IrqHandler(void) 58 | { 59 | LPUART_DRV_IRQHandler(2); 60 | } 61 | #endif 62 | 63 | #if (LPUART_INSTANCE_COUNT > 3U) 64 | /* Implementation of LPUART3 handler named in startup code. */ 65 | void LPUART3_IrqHandler(void) 66 | { 67 | LPUART_DRV_IRQHandler(3); 68 | } 69 | #endif 70 | 71 | /* Array storing references to LPUART irq handlers */ 72 | isr_t g_lpuartIsr[LPUART_INSTANCE_COUNT] = 73 | { 74 | #if (LPUART_INSTANCE_COUNT > 0U) 75 | LPUART0_IrqHandler, 76 | #endif 77 | #if (LPUART_INSTANCE_COUNT > 1U) 78 | LPUART1_IrqHandler, 79 | #endif 80 | #if (LPUART_INSTANCE_COUNT > 2U) 81 | LPUART2_IrqHandler, 82 | #endif 83 | #if (LPUART_INSTANCE_COUNT > 3U) 84 | LPUART3_IrqHandler, 85 | #endif 86 | }; 87 | 88 | /******************************************************************************* 89 | * EOF 90 | ******************************************************************************/ 91 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/drivers/src/lpuart/lpuart_irq.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. 3 | * Copyright 2016-2017 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | 19 | #ifndef LPUART_IRQ_H__ 20 | #define LPUART_IRQ_H__ 21 | 22 | #include "device_registers.h" 23 | #include "interrupt_manager.h" 24 | 25 | /******************************************************************************* 26 | * Prototypes 27 | ******************************************************************************/ 28 | void LPUART_DRV_IRQHandler(uint32_t instance); 29 | 30 | /******************************************************************************* 31 | * Default interrupt handlers signatures 32 | ******************************************************************************/ 33 | 34 | #if (LPUART_INSTANCE_COUNT > 0U) 35 | /*! @brief LPUART0 interrupt handler. */ 36 | void LPUART0_IrqHandler(void); 37 | #endif 38 | 39 | #if (LPUART_INSTANCE_COUNT > 1U) 40 | /*! @brief LPUART1 interrupt handler. */ 41 | void LPUART1_IrqHandler(void); 42 | #endif 43 | 44 | #if (LPUART_INSTANCE_COUNT > 2U) 45 | /*! @brief LPUART2 interrupt handler. */ 46 | void LPUART2_IrqHandler(void); 47 | #endif 48 | 49 | #if (LPUART_INSTANCE_COUNT > 3U) 50 | /*! @brief LPUART3 interrupt handler. */ 51 | void LPUART3_IrqHandler(void); 52 | #endif 53 | 54 | /*! Array storing references to LPUART irq handlers */ 55 | extern isr_t g_lpuartIsr[LPUART_INSTANCE_COUNT]; 56 | 57 | #endif /* LPUART_IRQ_H__ */ 58 | /******************************************************************************* 59 | * EOF 60 | ******************************************************************************/ 61 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/drivers/src/power/S32K1xx/power_rcm_hw_access.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc. 3 | * Copyright 2016-2018 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | 19 | #ifndef POWER_RCM_HW_ACCESS_H 20 | #define POWER_RCM_HW_ACCESS_H 21 | 22 | #include "device_registers.h" 23 | #include "power_manager_S32K1xx.h" 24 | 25 | /*! @file power_rcm_hw_access.h */ 26 | 27 | /*! 28 | * @ingroup power_rcm_hw_access 29 | * @defgroup power_rcm_hw_access 30 | * @{ 31 | */ 32 | 33 | /******************************************************************************* 34 | * Definitions 35 | ******************************************************************************/ 36 | 37 | /******************************************************************************* 38 | * API 39 | ******************************************************************************/ 40 | #if defined(__cplusplus) 41 | extern "C" { 42 | #endif /* __cplusplus*/ 43 | 44 | /*! @name Reset Control Module APIs*/ 45 | /*@{*/ 46 | 47 | static inline bool RCM_GetSrcStatusCmd(const RCM_Type * const baseAddr, 48 | const rcm_source_names_t srcName) 49 | { 50 | bool retValue; 51 | uint32_t regValue = (uint32_t)baseAddr->SRS; 52 | 53 | DEV_ASSERT(srcName < RCM_SRC_NAME_MAX); 54 | 55 | switch (srcName) 56 | { 57 | case RCM_LOW_VOLT_DETECT: /* low voltage detect reset */ 58 | regValue = (regValue & RCM_SRS_LVD_MASK) >> RCM_SRS_LVD_SHIFT; 59 | break; 60 | case RCM_LOSS_OF_CLK: /* loss of clock reset */ 61 | regValue = (regValue & RCM_SRS_LOC_MASK) >> RCM_SRS_LOC_SHIFT; 62 | break; 63 | case RCM_LOSS_OF_LOCK: /* loss of lock reset */ 64 | regValue = (regValue & RCM_SRS_LOL_MASK) >> RCM_SRS_LOL_SHIFT; 65 | break; 66 | #if FEATURE_RCM_HAS_CMU_LOSS_OF_CLOCK /*!< CMU Loss of lock reset */ 67 | case RCM_CMU_LOC: 68 | regValue = (regValue & RCM_SRS_CMU_LOC_MASK) >> RCM_SRS_CMU_LOC_SHIFT; 69 | break; 70 | #endif 71 | case RCM_WATCH_DOG: /* watch dog reset */ 72 | regValue = (regValue & RCM_SRS_WDOG_MASK) >> RCM_SRS_WDOG_SHIFT; 73 | break; 74 | case RCM_EXTERNAL_PIN: /* external pin reset */ 75 | regValue = (regValue & RCM_SRS_PIN_MASK) >> RCM_SRS_PIN_SHIFT; 76 | break; 77 | case RCM_POWER_ON: /* power on reset */ 78 | regValue = (regValue & RCM_SRS_POR_MASK) >> RCM_SRS_POR_SHIFT; 79 | break; 80 | case RCM_SJTAG: /* JTAG generated reset */ 81 | regValue = (regValue & RCM_SSRS_SJTAG_MASK) >> RCM_SSRS_SJTAG_SHIFT; 82 | break; 83 | case RCM_CORE_LOCKUP: /* core lockup reset */ 84 | regValue = (regValue & RCM_SRS_LOCKUP_MASK) >> RCM_SRS_LOCKUP_SHIFT; 85 | break; 86 | case RCM_SOFTWARE: /* software reset */ 87 | regValue = (regValue & RCM_SRS_SW_MASK) >> RCM_SRS_SW_SHIFT; 88 | break; 89 | case RCM_SMDM_AP: /* MDM-AP system reset */ 90 | regValue = (regValue & RCM_SSRS_SMDM_AP_MASK) >> RCM_SSRS_SMDM_AP_SHIFT; 91 | break; 92 | case RCM_STOP_MODE_ACK_ERR: /* stop mode ack error reset */ 93 | regValue = (regValue & RCM_SRS_SACKERR_MASK) >> RCM_SRS_SACKERR_SHIFT; 94 | break; 95 | default: 96 | /* invalid command */ 97 | regValue = 0U; 98 | break; 99 | } 100 | 101 | retValue = (regValue == 0UL) ? false : true; 102 | 103 | return retValue; 104 | } 105 | 106 | /*@}*/ 107 | 108 | #if defined(__cplusplus) 109 | } 110 | #endif /* __cplusplus*/ 111 | 112 | /*! @}*/ 113 | 114 | #endif /* POWER_RCM_HW_ACCESS_H */ 115 | /******************************************************************************* 116 | * EOF 117 | ******************************************************************************/ 118 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/drivers/src/power/S32K1xx/power_scg_hw_access.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2018 NXP 3 | * All rights reserved. 4 | * 5 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 6 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 7 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 8 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 9 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 10 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 11 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 12 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 13 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 14 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 15 | * THE POSSIBILITY OF SUCH DAMAGE. 16 | */ 17 | 18 | #ifndef POWER_SCG_HW_ACCESS_H 19 | #define POWER_SCG_HW_ACCESS_H 20 | 21 | #include "device_registers.h" 22 | 23 | /*! 24 | * @file power_scg_hw_access.h 25 | * 26 | * @page misra_violations MISRA-C:2012 violations 27 | * 28 | * @section [global] 29 | * Violates MISRA 2012 Required Rule 11.6, A cast shall not be performed 30 | * between pointer to void and an arithmetic type. 31 | * The address of hardware modules is provided as integer so 32 | * it needs to be cast to pointer. 33 | * 34 | * @section [global] 35 | * Violates MISRA 2012 Advisory Rule 11.4, A conversion should not be performed 36 | * between a pointer to object and an integer type. 37 | * The address of hardware modules is provided as integer so 38 | * a conversion between a pointer and an integer has to be performed 39 | */ 40 | 41 | /*! 42 | * power_scg_hw_access 43 | * @{ 44 | */ 45 | 46 | /******************************************************************************* 47 | * API 48 | ******************************************************************************/ 49 | 50 | #if defined(__cplusplus) 51 | extern "C" { 52 | #endif /* __cplusplus*/ 53 | 54 | #if FEATURE_HAS_SPLL_CLK 55 | /*! 56 | * @brief Set the SPLL clock source was enabled or disabled 57 | * 58 | * This function sets SPLL clock source enable or disabled. 59 | * This one is used in the switching very low power mode sequence. 60 | * 61 | * @param[in] enable This variable select the SPLL available or not. 62 | */ 63 | static inline void SCG_SetEnableSPLL(bool enable) 64 | { 65 | uint32_t regValue = SCG->SPLLCSR; 66 | regValue &= ~SCG_SPLLCSR_SPLLEN_MASK; 67 | if (enable == true) 68 | { 69 | regValue |= SCG_SPLLCSR_SPLLEN(1U); 70 | } 71 | else 72 | { 73 | regValue |= SCG_SPLLCSR_SPLLEN(0U); 74 | } 75 | SCG->SPLLCSR = regValue; 76 | } 77 | 78 | /*! 79 | * @brief Get status of SPLL clock source was enabled or disabled 80 | * 81 | * This function gets SPLL clock source enable or disabled. 82 | * This one is used in the switching very low power mode sequence. 83 | * 84 | * @return true : SPLL enabled 85 | false : SPLL disable 86 | */ 87 | static inline bool SCG_GetEnableSPLL(void) 88 | { 89 | uint32_t regValue = SCG->SPLLCSR; 90 | regValue = (regValue & SCG_SPLLCSR_SPLLEN_MASK) >> SCG_SPLLCSR_SPLLEN_SHIFT; 91 | 92 | return (regValue == 0U) ? false : true; 93 | } 94 | 95 | /*! 96 | * @brief Check clock source in HSRUN mode 97 | * 98 | * This function checks SPLL as source in HSRUN mode. 99 | * This one is used in the switching very low power mode sequence. 100 | * 101 | * @return true : SPLL is clock source in HSRUN. 102 | false : SPLL is not clock source in HSRUN. 103 | */ 104 | static inline bool SCG_GetHsrunSelectSPLL(void) 105 | { 106 | uint32_t regValue = SCG->HCCR; 107 | regValue = (regValue & SCG_HCCR_SCS_MASK) >> SCG_HCCR_SCS_SHIFT; 108 | 109 | return (regValue == FEATURE_SCG_SPLL_VALUE) ? true : false; 110 | } 111 | 112 | #endif 113 | 114 | /*! 115 | * @brief Set the FIRC clock source was enabled or disabled 116 | * 117 | * This function sets FIRC clock source enable or disabled. 118 | * This one is used in the switching very low power mode sequence. 119 | * 120 | * @param[in] enable This variable select the FIRC available or not. 121 | */ 122 | static inline void SCG_SetEnableFIRC(bool enable) 123 | { 124 | uint32_t regValue = SCG->FIRCCSR; 125 | regValue &= ~SCG_FIRCCSR_FIRCEN_MASK; 126 | if (enable == true) 127 | { 128 | regValue |= SCG_FIRCCSR_FIRCEN(1U); 129 | } 130 | else 131 | { 132 | regValue |= SCG_FIRCCSR_FIRCEN(0U); 133 | } 134 | SCG->FIRCCSR = regValue; 135 | } 136 | 137 | /*! 138 | * @brief Get status of FIRC clock source was enabled or disabled 139 | * 140 | * This function gets FIRC clock source enable or disabled. 141 | * This one is used in the switching very low power mode sequence. 142 | * 143 | * @return true : FIRC enabled 144 | false : FIRC disable 145 | */ 146 | static inline bool SCG_GetEnableFIRC(void) 147 | { 148 | uint32_t regValue = SCG->FIRCCSR; 149 | regValue = (regValue & SCG_FIRCCSR_FIRCEN_MASK) >> SCG_FIRCCSR_FIRCEN_SHIFT; 150 | 151 | return (regValue == 0U) ? false : true; 152 | } 153 | 154 | /*! 155 | * @brief Set the SOSC clock source was enabled or disabled 156 | * 157 | * This function sets SOSC clock source enable or disabled. 158 | * This one is used in the switching very low power mode sequence. 159 | * 160 | * @param[in] enable This variable select the SOSC available or not. 161 | */ 162 | static inline void SCG_SetEnableSOSC(bool enable) 163 | { 164 | uint32_t regValue = SCG->SOSCCSR; 165 | regValue &= ~SCG_SOSCCSR_SOSCEN_MASK; 166 | if (enable == true) 167 | { 168 | regValue |= SCG_SOSCCSR_SOSCEN(1U); 169 | } 170 | else 171 | { 172 | regValue |= SCG_SOSCCSR_SOSCEN(0U); 173 | } 174 | SCG->SOSCCSR = regValue; 175 | } 176 | 177 | /*! 178 | * @brief Get status of SOSC clock source was enabled or disabled 179 | * 180 | * This function gets SOSC clock source enable or disabled. 181 | * This one is used in the switching very low power mode sequence. 182 | * 183 | * @return true : SOSC enabled 184 | false : SOSC disable 185 | */ 186 | static inline bool SCG_GetEnableSOSC(void) 187 | { 188 | uint32_t regValue = SCG->SOSCCSR; 189 | regValue = (regValue & SCG_SOSCCSR_SOSCEN_MASK) >> SCG_SOSCCSR_SOSCEN_SHIFT; 190 | 191 | return (regValue == 0U) ? false : true; 192 | } 193 | 194 | /*@}*/ 195 | 196 | #if defined(__cplusplus) 197 | } 198 | #endif /* __cplusplus*/ 199 | 200 | /*! @}*/ 201 | 202 | #endif /* POWER_SCG_HW_ACCESS_H */ 203 | /******************************************************************************* 204 | * EOF 205 | ******************************************************************************/ 206 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/platform/drivers/src/trgmux/trgmux_hw_access.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright 2017 NXP. 3 | * All rights reserved. 4 | * 5 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 6 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 7 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 8 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 9 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 10 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 11 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 12 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 13 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 14 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 15 | * THE POSSIBILITY OF SUCH DAMAGE. 16 | */ 17 | 18 | #ifndef TRGMUX_HW_ACCESS_H 19 | #define TRGMUX_HW_ACCESS_H 20 | 21 | /*! @file trgmux_hw_access.h */ 22 | 23 | #include "trgmux_driver.h" 24 | 25 | /*! 26 | * trgmux_hw_access TRGMUX Hardware Access 27 | * @details This section describes the programming interface of the TRGMUX Hardware Access. 28 | * @{ 29 | */ 30 | 31 | /******************************************************************************* 32 | * Definitions 33 | *******************************************************************************/ 34 | 35 | /******************************************************************************* 36 | * API 37 | *******************************************************************************/ 38 | 39 | #if defined(__cplusplus) 40 | extern "C" { 41 | #endif 42 | 43 | /*! 44 | * @brief Restore the TRGMUX module to reset value. 45 | * 46 | * This function restores the TRGMUX module to reset value. 47 | * 48 | * @param[in] base The TRGMUX peripheral base address 49 | * @return Execution status: 50 | * STATUS_SUCCESS 51 | * STATUS_ERROR If at least one of the target module register is locked. 52 | */ 53 | status_t TRGMUX_Init(TRGMUX_Type * const base); 54 | 55 | /*! 56 | * @brief Configures a source trigger for a target module. 57 | * 58 | * This function configures a TRGMUX link between a source trigger and a target module, 59 | * if the requested target module is not locked. 60 | * 61 | * @param[in] base The TRGMUX peripheral base address 62 | * @param[in] triggerSource One of the values in the trgmux_trigger_source_t enumeration 63 | * @param[in] targetModule One of the values in the trgmux_target_module_t enumeration 64 | */ 65 | void TRGMUX_SetTrigSourceForTargetModule(TRGMUX_Type * const base, 66 | const trgmux_trigger_source_t triggerSource, 67 | const trgmux_target_module_t targetModule); 68 | 69 | /*! 70 | * @brief Get the source trigger configured for a target module. 71 | * 72 | * This function returns the TRGMUX source trigger linked to a selected target module. 73 | * 74 | * @param[in] base The TRGMUX peripheral base address 75 | * @param[in] targetModule One of the values in the trgmux_target_module_t enumeration 76 | * @return Enum value corresponding to the trigger source configured for the given target module 77 | */ 78 | trgmux_trigger_source_t TRGMUX_GetTrigSourceForTargetModule(const TRGMUX_Type * const base, 79 | const trgmux_target_module_t targetModule); 80 | 81 | /*! 82 | * @brief Lock the TRGMUX register of a target module. 83 | * 84 | * This function sets the LK bit of the TRGMUX register corresponding to 85 | * the selected target module. Please note that some TRGMUX registers can contain up to 4 86 | * SEL bitfields, meaning that these registers can be used to configure up to 4 target 87 | * modules independently. Because the LK bit is only one per register, the configuration 88 | * of all target modules referred from that register will be locked. 89 | * 90 | * @param[in] base The TRGMUX peripheral base address 91 | * @param[in] targetModule One of the values in the trgmux_target_module_t enumeration 92 | */ 93 | void TRGMUX_SetLockForTargetModule(TRGMUX_Type * const base, 94 | const trgmux_target_module_t targetModule); 95 | 96 | /*! 97 | * @brief Get the Lock bit status of the TRGMUX register of a target module. 98 | * 99 | * This function gets the value of the LK bit from the TRGMUX register corresponding to 100 | * the selected target module. 101 | * 102 | * @param[in] base The TRGMUX peripheral base address 103 | * @param[in] targetModule One of the values in the trgmux_target_module_t enumeration 104 | * @return true or false depending on the state of the LK bit 105 | */ 106 | bool TRGMUX_GetLockForTargetModule(const TRGMUX_Type * const base, 107 | const trgmux_target_module_t targetModule); 108 | 109 | #if defined(__cplusplus) 110 | } 111 | #endif 112 | 113 | /*! @} */ 114 | 115 | #endif /* TRGMUX_HW_ACCESS_H */ 116 | /******************************************************************************* 117 | * EOF 118 | *******************************************************************************/ 119 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/SDK/rtos/osif/osif.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2016, Freescale Semiconductor, Inc. 3 | * Copyright 2016-2018 NXP 4 | * All rights reserved. 5 | * 6 | * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR 7 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 9 | * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 10 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 11 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 12 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 13 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 14 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 15 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 16 | * THE POSSIBILITY OF SUCH DAMAGE. 17 | */ 18 | 19 | #ifndef OSIF_H 20 | #define OSIF_H 21 | 22 | #include 23 | 24 | /** 25 | * @page misra_violations MISRA-C:2012 violations 26 | * 27 | * @section [global] 28 | * Violates MISRA 2012 Advisory Rule 2.5, Global macro not referenced. 29 | * The macro defines a value that will be interpreted as an infinite timeout. 30 | * 31 | */ 32 | 33 | /*! @file */ 34 | 35 | /*! 36 | * @addtogroup osif 37 | * @{ 38 | */ 39 | 40 | /******************************************************************************* 41 | * Definitions 42 | ******************************************************************************/ 43 | 44 | /*! @cond DRIVER_INTERNAL_USE_ONLY */ 45 | 46 | #ifdef USING_OS_FREERTOS 47 | /* FreeRTOS implementation */ 48 | #include "FreeRTOS.h" 49 | #include "semphr.h" 50 | 51 | #if configSUPPORT_STATIC_ALLOCATION == 1 52 | typedef struct { 53 | SemaphoreHandle_t handle; 54 | StaticSemaphore_t buffer; 55 | } semaphore_t; 56 | 57 | typedef semaphore_t mutex_t; 58 | #else /* configSUPPORT_STATIC_ALLOCATION == 0, it's dynamic allocation */ 59 | /*! @brief Type for a mutex. */ 60 | typedef SemaphoreHandle_t mutex_t; 61 | /*! @brief Type for a semaphore. */ 62 | typedef SemaphoreHandle_t semaphore_t; 63 | #endif /* configSUPPORT_STATIC_ALLOCATION == 1 */ 64 | #else 65 | /* Bare-metal implementation */ 66 | /*! @brief Type for a mutex. */ 67 | typedef uint8_t mutex_t; 68 | /*! @brief Type for a semaphore. */ 69 | typedef volatile uint8_t semaphore_t; 70 | #endif /* ifdef USING_OS_FREERTOS */ 71 | 72 | /*! @endcond */ 73 | 74 | #define OSIF_WAIT_FOREVER 0xFFFFFFFFu 75 | 76 | #include "status.h" 77 | 78 | /******************************************************************************* 79 | * API 80 | ******************************************************************************/ 81 | 82 | #if defined (__cplusplus) 83 | extern "C" { 84 | #endif 85 | 86 | /*! 87 | * @brief Delays execution for a number of milliseconds. 88 | * 89 | * @param[in] delay Time delay in milliseconds. 90 | */ 91 | void OSIF_TimeDelay(const uint32_t delay); 92 | 93 | /*! 94 | * @brief Returns the number of miliseconds elapsed since starting the internal timer 95 | * or starting the scheduler. 96 | * 97 | * @return the number of miliseconds elapsed 98 | */ 99 | uint32_t OSIF_GetMilliseconds(void); 100 | 101 | /*! 102 | * @brief Waits for a mutex and locks it. 103 | * 104 | * @param[in] pMutex reference to the mutex object 105 | * @param[in] timeout time-out value in milliseconds 106 | * @return One of the possible status codes: 107 | * - STATUS_SUCCESS: mutex lock operation success 108 | * - STATUS_ERROR: mutex already owned by current thread 109 | * - STATUS_TIMEOUT: mutex lock operation timed out 110 | * 111 | */ 112 | status_t OSIF_MutexLock(const mutex_t * const pMutex, 113 | const uint32_t timeout); 114 | 115 | /*! 116 | * @brief Unlocks a previously locked mutex. 117 | * 118 | * @param[in] pMutex reference to the mutex object 119 | * @return One of the possible status codes: 120 | * - STATUS_SUCCESS: mutex unlock operation success 121 | * - STATUS_ERROR: mutex unlock failed 122 | */ 123 | status_t OSIF_MutexUnlock(const mutex_t * const pMutex); 124 | 125 | 126 | /*! 127 | * @brief Create an unlocked mutex. 128 | * 129 | * @param[in] pMutex reference to the mutex object 130 | * @return One of the possible status codes: 131 | * - STATUS_SUCCESS: mutex created 132 | * - STATUS_ERROR: mutex could not be created 133 | */ 134 | status_t OSIF_MutexCreate(mutex_t * const pMutex); 135 | 136 | /*! 137 | * @brief Destroys a previously created mutex. 138 | * 139 | * @param[in] pMutex reference to the mutex object 140 | * @return One of the possible status codes: 141 | * - STATUS_SUCCESS: mutex destroyed 142 | */ 143 | status_t OSIF_MutexDestroy(const mutex_t * const pMutex); 144 | 145 | 146 | /*! 147 | * @brief Decrement a semaphore with timeout. 148 | * 149 | * @param[in] pSem reference to the semaphore object 150 | * @param[in] timeout time-out value in milliseconds 151 | * @return One of the possible status codes: 152 | * - STATUS_SUCCESS: semaphore wait operation success 153 | * - STATUS_TIMEOUT: semaphore wait timed out 154 | */ 155 | status_t OSIF_SemaWait(semaphore_t * const pSem, 156 | const uint32_t timeout); 157 | 158 | 159 | /*! 160 | * @brief Increment a semaphore 161 | * 162 | * @param[in] pSem reference to the semaphore object 163 | * @return One of the possible status codes: 164 | * - STATUS_SUCCESS: semaphore post operation success 165 | * - STATUS_ERROR: semaphore could not be incremented 166 | */ 167 | status_t OSIF_SemaPost(semaphore_t * const pSem); 168 | 169 | 170 | /*! 171 | * @brief Creates a semaphore with a given value. 172 | * 173 | * @param[in] pSem reference to the semaphore object 174 | * @param[in] initValue initial value of the semaphore 175 | * @return One of the possible status codes: 176 | * - STATUS_SUCCESS: semaphore created 177 | * - STATUS_ERROR: semaphore could not be created 178 | */ 179 | status_t OSIF_SemaCreate(semaphore_t * const pSem, 180 | const uint8_t initValue); 181 | 182 | 183 | /*! 184 | * @brief Destroys a previously created semaphore. 185 | * 186 | * @param[in] pSem reference to the semaphore object 187 | * @return One of the possible status codes: 188 | * - STATUS_SUCCESS: semaphore destroyed 189 | */ 190 | status_t OSIF_SemaDestroy(const semaphore_t * const pSem); 191 | 192 | /*! @}*/ 193 | #if defined (__cplusplus) 194 | } 195 | #endif 196 | 197 | /*! @}*/ 198 | 199 | #endif /* OSIF_H */ 200 | /******************************************************************************* 201 | * EOF 202 | ******************************************************************************/ 203 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Sources/GD3000/aml/readme.txt: -------------------------------------------------------------------------------- 1 | AML 2 | ================================================================================ 3 | Analog middleware layer is designed to improve compatibility between KSDK2.0 4 | and S32 SDK mainly by using the same function prototypes. This layer 5 | automatically distinguishes which type of peripheral is used (for example FTM 6 | or TPM as a timer and SPI, DSPI or LPSPI as type of SPI). This layer supports 7 | main functionality of pheripherals only. There can be implemented support 8 | for additional custom peripherals and for custom MCUs using same prototypes. 9 | 10 | Versions 11 | ================================================================================ 12 | Version 1.3 13 | S32_SDK API was changed (1.0.0). Changes were implemented to aml. 14 | SDK32 migrate to global status_t. AML status_t must be replace by aml_status_t. 15 | It was done using: 16 | #define status_t aml_status_t 17 | typedef int32_t status_t; 18 | Type used for all status and error return values. This code is 19 | taken from SDK 2.0. File common_aml.h define value for aml_status_t. 20 | This status is returned from AML but SDK32 driver returns status_t 21 | from status.h file. AML need to be compatible with older existing drivers. 22 | Be careful if use status from AML or SDK32 driver directly. 23 | AML SPI: Bit count per frame was inserted into (both master and slave) AML SPI 24 | configuration structures. For S32K, interrupts were set as transfer type. 25 | TMR_AML_Init: Fixed issue with FTM initialization if there 26 | is no channel for allocation. 27 | TMR_AML_ResetTimer: Fixed issue with FTM, which did not leave this function. 28 | 29 | Version 1.2 30 | Added fixed TMR_AML_Init: Fixed issue with initialization timer if there 31 | is no channel for allocation with some devices 32 | (KL25 call assert if there was 0 channels). Problem is solved. 33 | 34 | Version 1.1 35 | Added new implemented feature: 36 | Wait 37 | 38 | Version 1.0 (initial). 39 | Implemented pheripherals: 40 | Timer - TPM, FTM 41 | SPI - SPI, DSPI 42 | ADC 43 | GPIO 44 | I2C -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Sources/GD3000/aml/wait_aml/wait_aml.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 - 2018, NXP Semiconductors, Inc. 3 | * All rights reserved. 4 | * 5 | * Redistribution and use in source and binary forms, with or without modification, 6 | * are permitted provided that the following conditions are met: 7 | * 8 | * o Redistributions of source code must retain the above copyright notice, this list 9 | * of conditions and the following disclaimer. 10 | * 11 | * o Redistributions in binary form must reproduce the above copyright notice, this 12 | * list of conditions and the following disclaimer in the documentation and/or 13 | * other materials provided with the distribution. 14 | * 15 | * o Neither the name of NXP Semiconductors, Inc. nor the names of its 16 | * contributors may be used to endorse or promote products derived from this 17 | * software without specific prior written permission. 18 | * 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 | */ 30 | 31 | /* 32 | * File: wait_aml.c 33 | * 34 | * This driver creates abstraction for WAIT functions for SDK S32 and SDK 2.0. 35 | */ 36 | 37 | /******************************************************************************* 38 | * Includes 39 | ******************************************************************************/ 40 | #include "wait_aml.h" 41 | 42 | /******************************************************************************* 43 | * Code 44 | ******************************************************************************/ 45 | 46 | /*FUNCTION********************************************************************** 47 | * 48 | * Function Name : WAIT_AML_GetSysFreq 49 | * Description : Get system core frequency in ticks 50 | * 51 | *END**************************************************************************/ 52 | inline uint32_t WAIT_AML_GetSysFreq( void ) 53 | { 54 | uint32_t freq; 55 | CLOCK_SYS_GetFreq(CORE_CLK, &freq); 56 | return freq; 57 | } 58 | 59 | /*FUNCTION********************************************************************** 60 | * 61 | * Function Name : WAIT_AML_WaitCycles 62 | * Description : Waits for specified amount of cycles which is given by 32bit 63 | * value range. Assumption for this function is that target 64 | * architecture is using 32bit general purpose registers. 65 | * 66 | *END**************************************************************************/ 67 | void WAIT_AML_WaitCycles(uint32_t cycles) 68 | { 69 | /* Advance to next multiple of 4. Value 0x04U ensures that the number 70 | * is not zero. */ 71 | cycles = (cycles & 0xFFFFFFFCU) | 0x04U; 72 | 73 | WAIT_AML_WAIT_FOR_MUL4_CYCLES(cycles); 74 | } 75 | 76 | /*FUNCTION********************************************************************** 77 | * 78 | * Function Name : WAIT_AML_WaitSec 79 | * Description : Waits for specified amount of seconds. 80 | * 81 | *END**************************************************************************/ 82 | void WAIT_AML_WaitSec(uint16_t delay) 83 | { 84 | for (; delay > 0U; delay--) { 85 | WAIT_AML_WaitMs(1000U); 86 | } 87 | } 88 | 89 | /*FUNCTION********************************************************************** 90 | * 91 | * Function Name : WAIT_AML_WaitMs 92 | * Description : Waits for specified amount of milliseconds. 93 | * 94 | *END**************************************************************************/ 95 | void WAIT_AML_WaitMs(uint16_t delay) 96 | { 97 | uint32_t cycles = (uint32_t) WAIT_AML_GET_CYCLES_FOR_MS(delay, WAIT_AML_SYSTEM_CLOCK_FREQ ); 98 | 99 | /* Advance to multiple of 4. */ 100 | cycles = cycles & 0xFFFFFFFCU; 101 | 102 | for (; delay > 0U; delay--) { 103 | WAIT_AML_WAIT_FOR_MUL4_CYCLES(cycles); 104 | } 105 | } 106 | 107 | /*FUNCTION********************************************************************** 108 | * 109 | * Function Name : WAIT_AML_WaitUs 110 | * Description : Waits for specified amount of microseconds. 111 | * 112 | *END**************************************************************************/ 113 | void WAIT_AML_WaitUs(uint16_t delay) 114 | { 115 | uint32_t cycles = (uint32_t) WAIT_AML_GET_CYCLES_FOR_US(delay, WAIT_AML_SYSTEM_CLOCK_FREQ ); 116 | 117 | /* Advance to next multiple of 4. Value 0x04U ensures that the number 118 | * is not zero. */ 119 | cycles = (cycles & 0xFFFFFFFCU) | 0x04U; 120 | WAIT_AML_WAIT_FOR_MUL4_CYCLES(cycles); 121 | } 122 | 123 | 124 | 125 | /******************************************************************************* 126 | * EOF 127 | ******************************************************************************/ 128 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Sources/GD3000/aml/wait_aml/wait_aml.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2013 - 2018, NXP Semiconductors, Inc. 3 | * All rights reserved. 4 | * 5 | * Redistribution and use in source and binary forms, with or without modification, 6 | * are permitted provided that the following conditions are met: 7 | * 8 | * o Redistributions of source code must retain the above copyright notice, this list 9 | * of conditions and the following disclaimer. 10 | * 11 | * o Redistributions in binary form must reproduce the above copyright notice, this 12 | * list of conditions and the following disclaimer in the documentation and/or 13 | * other materials provided with the distribution. 14 | * 15 | * o Neither the name of NXP Semiconductors, Inc. nor the names of its 16 | * contributors may be used to endorse or promote products derived from this 17 | * software without specific prior written permission. 18 | * 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 | */ 30 | 31 | /*! 32 | * @file wait_aml.h 33 | * 34 | * This driver creates abstraction for WAIT functions for SDK S32 and SDK 2.0. 35 | */ 36 | 37 | #ifndef SOURCE_WAIT_AML_H_ 38 | #define SOURCE_WAIT_AML_H_ 39 | 40 | /******************************************************************************* 41 | * Includes 42 | ******************************************************************************/ 43 | #include 44 | #include "../common_aml.h" 45 | 46 | #if (SDK_VERSION == SDK_2_0) 47 | #include "fsl_clock.h" 48 | #elif (SDK_VERSION == SDK_S32) 49 | #include "device_registers.h" 50 | #include "clock_manager.h" 51 | #endif 52 | 53 | /******************************************************************************* 54 | * Definitions 55 | ******************************************************************************/ 56 | /*! 57 | * @addtogroup macro_group 58 | * @{ 59 | */ 60 | #if (SDK_VERSION == SDK_2_0) 61 | #define WAIT_AML_SYSTEM_CLOCK_FREQ (CLOCK_GetCoreSysClkFreq()) 62 | #elif (SDK_VERSION == SDK_S32) 63 | #define WAIT_AML_SYSTEM_CLOCK_FREQ (WAIT_AML_GetSysFreq()) 64 | #endif 65 | 66 | #define WAIT_AML_GET_CYCLES_FOR_MS(ms, freq) (((freq) / 1000U) * (ms)) /*!< Gets needed cycles for specified delay in milliseconds, calculation is based on core clock frequency. */ 67 | #define WAIT_AML_GET_CYCLES_FOR_US(us, freq) (((freq) / 1000U) * (us) / 1000U) /*!< Gets needed cycles for specified delay in microseconds, calculation is based on core clock frequency. */ 68 | #define WAIT_AML_GET_CYCLES_FOR_NS(ns, freq) (((freq) / 1000000U) * (ns) / 1000U) /*!< Gets needed cycles for specified delay in nanoseconds, calculation is based on core clock frequency. */ 69 | /*! @} */ 70 | 71 | #if defined(__thumb__) && !defined(__thumb2__) /* Thumb instruction set only */ 72 | /*! 73 | * @brief Waits for exact number of cycles which can be expressed as multiple of 4. 74 | * 75 | * MOV - 1 cycle 76 | * SUB - 1 cycle 77 | * BNE - 1 cycle or 2 cycles if jump is realized 78 | * 79 | * Output list (empty) - which registers are output and how to map them to C code. 80 | * Input list (Cycles) - which registers are input and how to map them to C code. 81 | * Clobber list (r0, r1, cc) - which registers might have changed during 82 | * execution of asm code (compiler will have to reload them). 83 | * 84 | * @param Cycles | Number of cycles to wait. 85 | */ 86 | #define WAIT_AML_WAIT_FOR_MUL4_CYCLES(cycles) \ 87 | __asm( \ 88 | "mov r0, %[cycles] \n\t" \ 89 | "0: \n\t" \ 90 | "sub r0, #4 \n\t" \ 91 | "nop \n\t" \ 92 | "bne 0b \n\t" \ 93 | : \ 94 | : [cycles] "r" (cycles) \ 95 | : "r0", "r1", "cc" \ 96 | ) 97 | 98 | #else /* Thumb2 or A32 instruction set */ 99 | 100 | /*! 101 | * @brief Waits for exact number of cycles which can be expressed as multiple of 4. 102 | * 103 | * @param Cycles | Number of cycles to wait. 104 | */ 105 | #define WAIT_AML_WAIT_FOR_MUL4_CYCLES(cycles) \ 106 | __asm( \ 107 | "movs r0, %[cycles] \n" \ 108 | "0: \n" \ 109 | "subs r0, r0, #4 \n" \ 110 | "nop \n\t" \ 111 | "bne 0b \n" \ 112 | : \ 113 | : [cycles] "r" (cycles) \ 114 | : "r0", "r1", "cc" \ 115 | ) 116 | 117 | #endif 118 | 119 | /******************************************************************************* 120 | * API 121 | ******************************************************************************/ 122 | /*! 123 | * @addtogroup function_group 124 | * @{ 125 | */ 126 | /*! 127 | * @brief Waits for specified amount of cycles which is given by 32bit 128 | * value range. Assumption for this function is that target 129 | * architecture is using 32bit general purpose registers. 130 | * 131 | * @param cycles - Number of cycles to wait. 132 | */ 133 | void WAIT_AML_WaitCycles(uint32_t cycles); 134 | 135 | /*! 136 | * @brief Waits for specified amount of seconds. 137 | * 138 | * @param delay - Number of seconds to wait. 139 | */ 140 | void WAIT_AML_WaitSec(uint16_t delay); 141 | 142 | /*! 143 | * @brief Waits for specified amount of milliseconds. 144 | * 145 | * @param delay - Number of milliseconds to wait. 146 | */ 147 | void WAIT_AML_WaitMs(uint16_t delay); 148 | 149 | /*! 150 | * @brief Waits for specified amount of microseconds. 151 | * 152 | * @param delay - Number of microseconds to wait. 153 | */ 154 | void WAIT_AML_WaitUs(uint16_t delay); 155 | /*! @} */ 156 | 157 | /*! 158 | * @brief Returns the core clock system value in ticks. 159 | */ 160 | uint32_t WAIT_AML_GetSysFreq( void ); 161 | 162 | #endif /* SOURCE_WAIT_AML_H_ */ 163 | /******************************************************************************* 164 | * EOF 165 | ******************************************************************************/ 166 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Sources/GD3000/gd3000_init.c: -------------------------------------------------------------------------------- 1 | /******************************************************************************* 2 | * 3 | * Copyright 2006-2015 Freescale Semiconductor, Inc. 4 | * Copyright 2016-2017 NXP 5 | * 6 | ****************************************************************************//*! 7 | * 8 | * @file gd3000_init.c 9 | * 10 | * @date March-28-2017 11 | * 12 | * @brief MC34GD3000 Initialization 13 | * 14 | *******************************************************************************/ 15 | /******************************************************************************* 16 | * Includes 17 | *******************************************************************************/ 18 | #include "gd3000_init.h" 19 | 20 | tpp_drv_config_t tppDrvConfig; 21 | 22 | /******************************************************************************* 23 | * 24 | * Function: void GD3000_Init(void) 25 | * 26 | * Description: This function initialize MC34GD3000 MOSFET pre-driver. 27 | * MC34GD3000 SW driver uses S32K144 LPSPI0 module as a communication 28 | * interface to configure MC34GD3000 operation mode and to track MC34GD3000 29 | * Status0/Status1 registers. 30 | * 31 | *******************************************************************************/ 32 | void GD3000_Init(void) 33 | { 34 | /* GD3000 pin configuration - EN1:PTA2 EN2:PTA2 & RST:PTA3 */ 35 | tppDrvConfig.en1PinIndex = 2U; 36 | tppDrvConfig.en1PinInstance = instanceA; 37 | tppDrvConfig.en2PinIndex = 2U; 38 | tppDrvConfig.en2PinInstance = instanceA; 39 | tppDrvConfig.rstPinIndex = 3U; 40 | tppDrvConfig.rstPinInstance = instanceA; 41 | 42 | /* GD3000 device configuration */ 43 | tppDrvConfig.deviceConfig.deadtime = INIT_DEADTIME; 44 | tppDrvConfig.deviceConfig.intMask0 = INIT_INTERRUPTS0; 45 | tppDrvConfig.deviceConfig.intMask1 = INIT_INTERRUPTS1; 46 | tppDrvConfig.deviceConfig.modeMask = INIT_MODE; 47 | 48 | tppDrvConfig.deviceConfig.statusRegister[0U] = 0U; 49 | tppDrvConfig.deviceConfig.statusRegister[1U] = 0U; 50 | tppDrvConfig.deviceConfig.statusRegister[2U] = 0U; 51 | tppDrvConfig.deviceConfig.statusRegister[3U] = 0U; 52 | 53 | tppDrvConfig.csPinIndex = 5U; 54 | tppDrvConfig.csPinInstance = instanceB; 55 | tppDrvConfig.spiInstance = 0; 56 | tppDrvConfig.spiTppConfig.baudRateHz = LPSPI_FREQ; 57 | tppDrvConfig.spiTppConfig.sourceClockHz = 48000000U; 58 | 59 | TPP_ConfigureGpio(&tppDrvConfig); 60 | TPP_ConfigureSpi(&tppDrvConfig, NULL); 61 | TPP_Init(&tppDrvConfig, tppModeEnable); 62 | } 63 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Sources/GD3000/gd3000_init.h: -------------------------------------------------------------------------------- 1 | /******************************************************************************* 2 | * 3 | * Copyright 2006-2015 Freescale Semiconductor, Inc. 4 | * Copyright 2016-2017 NXP 5 | * 6 | ****************************************************************************//*! 7 | * 8 | * @file gd3000_init.h 9 | * 10 | * @date March-28-2017 11 | * 12 | * @brief MC34GD3000 Initialization 13 | * 14 | *******************************************************************************/ 15 | #ifndef GD3000_GD3000_INIT_H_ 16 | #define GD3000_GD3000_INIT_H_ 17 | /******************************************************************************* 18 | * Includes 19 | *******************************************************************************/ 20 | #include "aml/common_aml.h" 21 | #include "aml/gpio_aml.h" 22 | #include "tpp/tpp.h" 23 | 24 | /******************************************************************************* 25 | * Constants and macros 26 | *******************************************************************************/ 27 | /* Frequency of SPI communication with device in Hz. */ 28 | #define LPSPI_FREQ 2000000 29 | /* Device interrupt masks set by MASK0 and MASK1 commands. */ 30 | #define INIT_INTERRUPTS0 (TPP_MASK0_OT_INT_ENABLED | TPP_MASK0_DES_INT_ENABLED | \ 31 | TPP_MASK0_UV_INT_ENABLED | TPP_MASK0_OC_INT_ENABLED) 32 | #define INIT_INTERRUPTS1 (TPP_MASK1_PHS_INT_ENABLED | TPP_MASK1_FRM_INT_ENABLED | \ 33 | TPP_MASK1_WRT_INT_ENABLED | TPP_MASK1_RST_INT_ENABLED) 34 | /* Device configuration set by Mode command. */ 35 | #define INIT_MODE (TPP_MODE_DESF_DISABLED | TPP_MODE_FULL_ENABLED | TPP_MODE_LOCK_ENABLED) 36 | /* Dead time of device in nanoseconds. */ 37 | #define INIT_DEADTIME 500 38 | 39 | extern tpp_drv_config_t tppDrvConfig; 40 | 41 | /******************************************************************************* 42 | * Global function prototypes 43 | *******************************************************************************/ 44 | void GD3000_Init(void); 45 | 46 | 47 | #endif /* GD3000_GD3000_INIT_H_ */ 48 | -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Sources/ISR.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/S32DS_Prjct/FOC_Ctrl_MBD_Integration/Sources/ISR.c -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Sources/MCU_Init.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/S32DS_Prjct/FOC_Ctrl_MBD_Integration/Sources/MCU_Init.c -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Sources/MCU_Init.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/autoMBD/AMBD-MC/01478c0e3ded977299de80c80ae399f9d47dbb97/S32DS_Prjct/FOC_Ctrl_MBD_Integration/Sources/MCU_Init.h -------------------------------------------------------------------------------- /S32DS_Prjct/FOC_Ctrl_MBD_Integration/Sources/main.c: -------------------------------------------------------------------------------- 1 | /* ################################################################### 2 | ** Filename : main.c 3 | ** Processor : S32K1xx 4 | ** Abstract : 5 | ** Main module. 6 | ** This module contains user's application code. 7 | ** Settings : 8 | ** Contents : 9 | ** No public methods 10 | ** 11 | ** ###################################################################*/ 12 | /*! 13 | ** @file main.c 14 | ** @version 01.00 15 | ** @brief 16 | ** Main module. 17 | ** This module contains user's application code. 18 | */ 19 | /*! 20 | ** @addtogroup main_module main module documentation 21 | ** @{ 22 | */ 23 | /* MODULE main */ 24 | 25 | 26 | /* Including necessary module. Cpu.h contains other modules needed for compiling.*/ 27 | #include "MCU_Init.h" 28 | #include "gd3000_init.h" 29 | #include "FOC_Ctrl_CodeModel.h" /* Model's header file */ 30 | #include "freemaster.h" 31 | 32 | volatile int exit_code = 0; 33 | volatile uint32_t mainCnt; 34 | 35 | /* User includes (#include below this line is not maintained by Processor Expert) */ 36 | 37 | /*! 38 | \brief The main function for the project. 39 | \details The startup initialization sequence is the following: 40 | * - startup asm routine 41 | * - main() 42 | */ 43 | int main(void) 44 | { 45 | /* Write your local variable definition here */ 46 | mainCnt = 0; 47 | 48 | /*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/ 49 | #ifdef PEX_RTOS_INIT 50 | PEX_RTOS_INIT(); /* Initialization of the selected RTOS. Macro is defined by the RTOS component. */ 51 | #endif 52 | /*** End of Processor Expert internal initialization. ***/ 53 | 54 | /* Low level driver initialization */ 55 | MCU_Init(); 56 | GD3000_Init(); 57 | FMSTR_Init(); 58 | 59 | /* Initialize model */ 60 | FOC_Ctrl_CodeModel_initialize(); 61 | 62 | MCU_Start(); 63 | 64 | /* Forever loop */ 65 | while(1) 66 | { 67 | FMSTR_Poll(); 68 | mainCnt++; 69 | } 70 | 71 | /*** Don't write any code pass this line, or it will be deleted during code generation. ***/ 72 | /*** RTOS startup code. Macro PEX_RTOS_START is defined by the RTOS component. DON'T MODIFY THIS CODE!!! ***/ 73 | #ifdef PEX_RTOS_START 74 | PEX_RTOS_START(); /* Startup of the selected RTOS. Macro is defined by the RTOS component. */ 75 | #endif 76 | /*** End of RTOS startup code. ***/ 77 | /*** Processor Expert end of main routine. DON'T MODIFY THIS CODE!!! ***/ 78 | for(;;) { 79 | if(exit_code != 0) { 80 | break; 81 | } 82 | } 83 | return exit_code; 84 | /*** Processor Expert end of main routine. DON'T WRITE CODE BELOW!!! ***/ 85 | } /*** End of main routine. DO NOT MODIFY THIS TEXT!!! ***/ 86 | 87 | /* END main */ 88 | /*! 89 | ** @} 90 | */ 91 | /* 92 | ** ################################################################### 93 | ** 94 | ** This file was created by Processor Expert 10.1 [05.21] 95 | ** for the NXP S32K series of microcontrollers. 96 | ** 97 | ** ################################################################### 98 | */ 99 | -------------------------------------------------------------------------------- /S32DS_Prjct/README.md: -------------------------------------------------------------------------------- 1 | 2 | # S32DS工程文件 3 | 4 | ## 文件描述 5 | MBD模型生成的代码可以使用S32DS（集成开发工具）进行编译、下载和调试，比Simulink中更加灵活，功能性更加强大。 6 | 7 | 本文件夹中包含两个S32DS工程文件，分别用于BLDC模型生和FOC算法模型。这两个DS工程已经链接到MBD模型生成的代码，在S32DS v2.2中，可以通过Import的方式直接导入使用。 8 | 9 | *更多信息，请关注autoMBD公众号和知乎账号发布的文章。* --------------------------------------------------------------------------------