├── .gitignore
├── EDUReViver.sln
├── EDUReViver.suo
├── EDUReViver
├── EDUReViver.manifest
├── EDUReViver.vcxproj
├── EDUReViver.vcxproj.filters
├── EDUReViver_vc14.vcxproj
├── EDUReViver_vc14.vcxproj.filters
├── addon_func.cpp
├── addon_func.h
├── aes.c
├── configstore.cpp
├── configstore.h
├── crypto.h
├── httpclient.cpp
├── httpclient.h
├── include
│ ├── capstone
│ │ ├── arm.h
│ │ ├── arm64.h
│ │ ├── capstone.h
│ │ ├── evm.h
│ │ ├── m680x.h
│ │ ├── m68k.h
│ │ ├── mips.h
│ │ ├── platform.h
│ │ ├── ppc.h
│ │ ├── sparc.h
│ │ ├── systemz.h
│ │ ├── tms320c64x.h
│ │ ├── x86.h
│ │ └── xcore.h
│ ├── platform.h
│ ├── vc2008
│ │ └── stdint.h
│ └── windowsce
│ │ ├── intrin.h
│ │ └── stdint.h
├── lib
│ ├── capstone.lib
│ ├── capstone_dll.lib
│ └── capstone_dll_d.lib
├── main.cpp
├── packages.config
├── targetver.h
├── usbconn.cpp
├── usbconn.h
└── usbtypes.h
├── EDUReViver_vc14.sln
├── Payloads
├── Compile.md
├── blinky.c
├── revive.c
├── revive1.c
├── swd.c
├── to10.c
├── to11.c
└── to12.c
├── README.md
└── Target
└── VS2010
├── Release
├── Readme_cn.txt
├── Readme_en.txt
└── firmwarecfgs.lst
└── ReleaseXP
└── capstone.dll
/.gitignore:
--------------------------------------------------------------------------------
1 | bin/
2 | tmp/
3 | debug/
4 | release/
5 | Deleted/
6 | Shipping/
7 | __MACOSX/
8 | ipch/
9 | objfre_wxp_x86/
10 | Target/
11 | .vs/
12 | packages/
13 | .DS_Store
14 | thumb.db
15 | BuildLog.htm
16 | *.user
17 | *.pro.user*
18 | *.sdf
19 | *.opensdf
20 | *.txt
21 | *.exe
22 | buildfre_wxp_x86.*
--------------------------------------------------------------------------------
/EDUReViver.sln:
--------------------------------------------------------------------------------
1 |
2 | Microsoft Visual Studio Solution File, Format Version 11.00
3 | # Visual Studio 2010
4 | Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "EDUReViver", "EDUReViver\EDUReViver.vcxproj", "{F9C11080-C18C-4D6D-AC7F-5A5A53FDF613}"
5 | EndProject
6 | Global
7 | GlobalSection(SolutionConfigurationPlatforms) = preSolution
8 | Debug|Win32 = Debug|Win32
9 | Release|Win32 = Release|Win32
10 | ReleaseCURL|Win32 = ReleaseCURL|Win32
11 | ReleaseXP|Win32 = ReleaseXP|Win32
12 | EndGlobalSection
13 | GlobalSection(ProjectConfigurationPlatforms) = postSolution
14 | {F9C11080-C18C-4D6D-AC7F-5A5A53FDF613}.Debug|Win32.ActiveCfg = Debug|Win32
15 | {F9C11080-C18C-4D6D-AC7F-5A5A53FDF613}.Debug|Win32.Build.0 = Debug|Win32
16 | {F9C11080-C18C-4D6D-AC7F-5A5A53FDF613}.Release|Win32.ActiveCfg = Release|Win32
17 | {F9C11080-C18C-4D6D-AC7F-5A5A53FDF613}.Release|Win32.Build.0 = Release|Win32
18 | {F9C11080-C18C-4D6D-AC7F-5A5A53FDF613}.ReleaseCURL|Win32.ActiveCfg = ReleaseCURL|Win32
19 | {F9C11080-C18C-4D6D-AC7F-5A5A53FDF613}.ReleaseCURL|Win32.Build.0 = ReleaseCURL|Win32
20 | {F9C11080-C18C-4D6D-AC7F-5A5A53FDF613}.ReleaseXP|Win32.ActiveCfg = ReleaseXP|Win32
21 | {F9C11080-C18C-4D6D-AC7F-5A5A53FDF613}.ReleaseXP|Win32.Build.0 = ReleaseXP|Win32
22 | EndGlobalSection
23 | GlobalSection(SolutionProperties) = preSolution
24 | HideSolutionNode = FALSE
25 | EndGlobalSection
26 | EndGlobal
27 |
--------------------------------------------------------------------------------
/EDUReViver.suo:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/banxian/EDUReviver/31db6c94b3389f7d790c86210de409ab918215c4/EDUReViver.suo
--------------------------------------------------------------------------------
/EDUReViver/EDUReViver.manifest:
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191 |
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/EDUReViver/addon_func.cpp:
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1 | #include
2 | #include
3 | #include
4 | #include
5 | #include
6 | #include
7 | #include
8 | #ifdef _WIN32
9 | #define WIN32_LEAN_AND_MEAN
10 | #include
11 | #endif
12 | #include "addon_func.h"
13 |
14 |
15 | unsigned char Nibble2Hex(unsigned char num) {
16 | if (num < 10) {
17 | return num + '0';
18 | } else {
19 | return num + '7';
20 | }
21 | }
22 |
23 | unsigned char Hex2Nibble(unsigned char chr) {
24 | if (chr >= 'a') {
25 | chr -= 0x20;
26 | }
27 | if (chr < 'A') {
28 | return chr - '0';
29 | } else {
30 | return chr - '7';
31 | }
32 | }
33 |
34 | //00004000: 00 00 00 00 00 00 00 00 02 00 BF D7 04 00 00 00 | ................
35 | //012345678 0 0 0 345 0 0 90 2 78
36 | void quickdump(unsigned int addr, const unsigned char *data, unsigned int amount)
37 | {
38 | char line[78];
39 | const unsigned char* ptr = data;
40 | int fullline = amount / 16;
41 | int rowcount = fullline;
42 | int last = amount % 16;
43 | if (last) {
44 | rowcount++;
45 | }
46 | line[8] = ':';
47 | line[9] = ' ';
48 | line[34] = ' ';
49 | line[59] = '|';
50 | line[60] = ' ';
51 | line[77] = 0;
52 | for (int y = 0; y < rowcount; y++) {
53 | unsigned vaddr = ptr - data + addr;
54 | for (int i = 8; i; i--) {
55 | line[i - 1] = Nibble2Hex(vaddr & 0xF);
56 | vaddr >>= 4;
57 | }
58 | unsigned pos = 10;
59 | int w = (!last || y != rowcount - 1) ? 16 : last;
60 | for (int x = 0; x < w; x++, ptr++) {
61 | unsigned char c = *ptr;
62 | if (c == 0) {
63 | *(unsigned short*)&line[pos] = 0x3030; // '00';
64 | pos += 2;
65 | } else if (c == 0xFF) {
66 | *(unsigned short*)&line[pos] = 0x4646; // 'FF';
67 | pos += 2;
68 | } else {
69 | line[pos++] = Nibble2Hex(c >> 4);
70 | line[pos++] = Nibble2Hex(c & 0xF);
71 | }
72 | line[pos++] = ' ';
73 | if (x == 7) {
74 | pos++;
75 | }
76 | line[61 + x] = (c >= ' ' && c <= '~') ? c : '.';
77 | }
78 | if (w != 16) {
79 | while (pos < 59) {
80 | line[pos++] = ' ';
81 | }
82 | line[61 + last] = 0;
83 | }
84 | puts(line);
85 | //fwrite((const unsigned char*)line, 1, w == 16 ? 78 : (61 + last + 1), glogfile);
86 | }
87 | }
88 |
89 | int readallcontent(const wchar_t* path, void** outptr)
90 | {
91 | struct _stat64 st;
92 | if (_wstat64(path, &st) == -1 || st.st_size == 0) {
93 | return -1;
94 | }
95 | int fd = _wopen(path, O_RDONLY | O_BINARY, 0); // O_BINARY not available in OSX
96 | if (fd == -1) {
97 | return -1;
98 | }
99 | void* newmem = malloc((size_t)st.st_size); // TODO: PAE
100 | int readed = _read(fd, newmem, (size_t)st.st_size);
101 | _close(fd);
102 | *outptr = newmem;
103 | return readed;
104 | }
105 |
106 | int readpartcontent(const wchar_t* path, void** outptr, unsigned long long offset, unsigned size)
107 | {
108 | struct _stat64 st;
109 | if (_wstat64(path, &st) == -1 || st.st_size == 0) {
110 | return -1;
111 | }
112 | int fd = _wopen(path, O_RDONLY | O_BINARY, 0); // O_BINARY not available in OSX
113 | if (fd == -1) {
114 | return -1;
115 | }
116 | void* newmem = malloc(size);
117 | if (offset) {
118 | _lseek(fd, offset, SEEK_SET);
119 | }
120 | int readed = _read(fd, newmem, size);
121 | _close(fd);
122 | *outptr = newmem;
123 | return readed;
124 | }
125 |
126 | int savetofile(const wchar_t* path, void* data, size_t len)
127 | {
128 | int fd = _wopen(path, O_CREAT | O_RDWR | O_BINARY, S_IREAD | S_IWRITE);
129 | if (fd == -1) {
130 | printf("errno: %d, msg: %s\n", errno, strerror(errno));
131 | return -1;
132 | }
133 | int writed = _write(fd, data, len);
134 | _close(fd);
135 | return writed;
136 | }
137 |
138 | bool ishex(char c)
139 | {
140 | if (c >= '0' && c <= '9')
141 | return true;
142 |
143 | if (c >= 'A' && c <= 'F')
144 | return true;
145 |
146 | if (c >= 'a' && c <= 'f')
147 | return true;
148 | return false;
149 | }
150 |
151 | void trimstr(char* str)
152 | {
153 | // Left
154 | char* curpos = str;
155 | while (*curpos) {
156 | char c1 = *curpos;
157 | // [ ][ ]a
158 | if (c1 != ' ' && c1 != '\t') {
159 | memmove(str, curpos, strlen(curpos) + 1);
160 | break;
161 | }
162 | curpos++;
163 | }
164 | // Right
165 | curpos = str + strlen(str) - 1;
166 | while (*curpos) {
167 | char c1 = *curpos;
168 | // b[ ][ ]
169 | if (c1 != ' ' && c1 != '\t') {
170 | *(curpos + 1) = 0;
171 | break;
172 | }
173 | curpos--;
174 | }
175 | }
176 |
177 | bool setwin32filetime(const char* path, unsigned long long filetime)
178 | {
179 | #ifdef _WIN32
180 | HANDLE hFile = CreateFileA(path, FILE_WRITE_ATTRIBUTES, FILE_SHARE_READ, NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL);
181 | if (hFile == INVALID_HANDLE_VALUE) {
182 | return false;
183 | }
184 | bool ok = SetFileTime(hFile, NULL, NULL, (FILETIME*)&filetime);
185 | CloseHandle(hFile);
186 | return ok;
187 | #endif
188 | }
189 |
190 | int errprintf(__in_z __format_string const char * _Format, ...) {
191 | HANDLE hCon = GetStdHandle(STD_OUTPUT_HANDLE);
192 | CONSOLE_SCREEN_BUFFER_INFO info;
193 | GetConsoleScreenBufferInfo(hCon, &info);
194 | SetConsoleTextAttribute(hCon, FOREGROUND_RED);
195 | va_list va;
196 | va_start(va, _Format);
197 | int len = vfprintf(stderr, _Format, va);
198 | va_end(va);
199 | SetConsoleTextAttribute(hCon, info.wAttributes);
200 |
201 | return len;
202 | }
203 |
204 | bool fileexists(const char* path)
205 | {
206 | WIN32_FIND_DATAA ffd;
207 | HANDLE find = FindFirstFileA(path, &ffd);
208 | if (find != INVALID_HANDLE_VALUE) {
209 | CloseHandle(find);
210 | return (ffd.dwFileAttributes & FILE_ATTRIBUTE_DIRECTORY) == 0;
211 | }
212 | return false;
213 | }
214 |
--------------------------------------------------------------------------------
/EDUReViver/addon_func.h:
--------------------------------------------------------------------------------
1 | #ifndef _ADDON_FUNC_H
2 | #define _ADDON_FUNC_H
3 |
4 | #include
5 |
6 | #ifdef __cplusplus
7 | extern "C" {
8 | #endif
9 |
10 | unsigned char Nibble2Hex(unsigned char num);
11 | unsigned char Hex2Nibble(unsigned char chr);
12 |
13 | void quickdump(unsigned int addr, const unsigned char *data, unsigned int amount);
14 | int readallcontent(const wchar_t* path, void** outptr);
15 | int readpartcontent(const wchar_t* path, void** outptr, unsigned long long offset, unsigned size);
16 | int savetofile(const wchar_t* path, void* data, size_t len);
17 |
18 | bool ishex(char c);
19 | void trimstr(char* str);
20 |
21 | bool setwin32filetime(const char* path, unsigned long long filetime);
22 | int errprintf(__in_z __format_string const char * _Format, ...);
23 | bool fileexists(const char* path);
24 |
25 | #ifdef __cplusplus
26 | };
27 | #endif
28 |
29 | #endif
--------------------------------------------------------------------------------
/EDUReViver/aes.c:
--------------------------------------------------------------------------------
1 | /*
2 | * Copyright (c) 2007-2016, Cameron Rich
3 | *
4 | * All rights reserved.
5 | *
6 | * Redistribution and use in source and binary forms, with or without
7 | * modification, are permitted provided that the following conditions are met:
8 | *
9 | * * Redistributions of source code must retain the above copyright notice,
10 | * this list of conditions and the following disclaimer.
11 | * * Redistributions in binary form must reproduce the above copyright notice,
12 | * this list of conditions and the following disclaimer in the documentation
13 | * and/or other materials provided with the distribution.
14 | * * Neither the name of the axTLS project nor the names of its contributors
15 | * may be used to endorse or promote products derived from this software
16 | * without specific prior written permission.
17 | *
18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
22 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
23 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
24 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
25 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
26 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
27 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 | */
30 |
31 | /**
32 | * AES implementation - this is a small code version. There are much faster
33 | * versions around but they are much larger in size (i.e. they use large
34 | * submix tables).
35 | */
36 |
37 | #include
38 | #include
39 | #include "crypto.h"
40 |
41 | #define rot1(x) (((x) << 24) | ((x) >> 8))
42 | #define rot2(x) (((x) << 16) | ((x) >> 16))
43 | #define rot3(x) (((x) << 8) | ((x) >> 24))
44 |
45 | /*
46 | * This cute trick does 4 'mul by two' at once. Stolen from
47 | * Dr B. R. Gladman but I'm sure the u-(u>>7) is
48 | * a standard graphics trick
49 | * The key to this is that we need to xor with 0x1b if the top bit is set.
50 | * a 1xxx xxxx 0xxx 0xxx First we mask the 7bit,
51 | * b 1000 0000 0000 0000 then we shift right by 7 putting the 7bit in 0bit,
52 | * c 0000 0001 0000 0000 we then subtract (c) from (b)
53 | * d 0111 1111 0000 0000 and now we and with our mask
54 | * e 0001 1011 0000 0000
55 | */
56 | #define mt 0x80808080
57 | #define ml 0x7f7f7f7f
58 | #define mh 0xfefefefe
59 | #define mm 0x1b1b1b1b
60 | #define mul2(x,t) ((t)=((x)&mt), \
61 | ((((x)+(x))&mh)^(((t)-((t)>>7))&mm)))
62 |
63 | #define inv_mix_col(x,f2,f4,f8,f9) (\
64 | (f2)=mul2(x,f2), \
65 | (f4)=mul2(f2,f4), \
66 | (f8)=mul2(f4,f8), \
67 | (f9)=(x)^(f8), \
68 | (f8)=((f2)^(f4)^(f8)), \
69 | (f2)^=(f9), \
70 | (f4)^=(f9), \
71 | (f8)^=rot3(f2), \
72 | (f8)^=rot2(f4), \
73 | (f8)^rot1(f9))
74 |
75 | /*
76 | * AES S-box
77 | */
78 | static const uint8_t aes_sbox[256] =
79 | {
80 | 0x63,0x7C,0x77,0x7B,0xF2,0x6B,0x6F,0xC5,
81 | 0x30,0x01,0x67,0x2B,0xFE,0xD7,0xAB,0x76,
82 | 0xCA,0x82,0xC9,0x7D,0xFA,0x59,0x47,0xF0,
83 | 0xAD,0xD4,0xA2,0xAF,0x9C,0xA4,0x72,0xC0,
84 | 0xB7,0xFD,0x93,0x26,0x36,0x3F,0xF7,0xCC,
85 | 0x34,0xA5,0xE5,0xF1,0x71,0xD8,0x31,0x15,
86 | 0x04,0xC7,0x23,0xC3,0x18,0x96,0x05,0x9A,
87 | 0x07,0x12,0x80,0xE2,0xEB,0x27,0xB2,0x75,
88 | 0x09,0x83,0x2C,0x1A,0x1B,0x6E,0x5A,0xA0,
89 | 0x52,0x3B,0xD6,0xB3,0x29,0xE3,0x2F,0x84,
90 | 0x53,0xD1,0x00,0xED,0x20,0xFC,0xB1,0x5B,
91 | 0x6A,0xCB,0xBE,0x39,0x4A,0x4C,0x58,0xCF,
92 | 0xD0,0xEF,0xAA,0xFB,0x43,0x4D,0x33,0x85,
93 | 0x45,0xF9,0x02,0x7F,0x50,0x3C,0x9F,0xA8,
94 | 0x51,0xA3,0x40,0x8F,0x92,0x9D,0x38,0xF5,
95 | 0xBC,0xB6,0xDA,0x21,0x10,0xFF,0xF3,0xD2,
96 | 0xCD,0x0C,0x13,0xEC,0x5F,0x97,0x44,0x17,
97 | 0xC4,0xA7,0x7E,0x3D,0x64,0x5D,0x19,0x73,
98 | 0x60,0x81,0x4F,0xDC,0x22,0x2A,0x90,0x88,
99 | 0x46,0xEE,0xB8,0x14,0xDE,0x5E,0x0B,0xDB,
100 | 0xE0,0x32,0x3A,0x0A,0x49,0x06,0x24,0x5C,
101 | 0xC2,0xD3,0xAC,0x62,0x91,0x95,0xE4,0x79,
102 | 0xE7,0xC8,0x37,0x6D,0x8D,0xD5,0x4E,0xA9,
103 | 0x6C,0x56,0xF4,0xEA,0x65,0x7A,0xAE,0x08,
104 | 0xBA,0x78,0x25,0x2E,0x1C,0xA6,0xB4,0xC6,
105 | 0xE8,0xDD,0x74,0x1F,0x4B,0xBD,0x8B,0x8A,
106 | 0x70,0x3E,0xB5,0x66,0x48,0x03,0xF6,0x0E,
107 | 0x61,0x35,0x57,0xB9,0x86,0xC1,0x1D,0x9E,
108 | 0xE1,0xF8,0x98,0x11,0x69,0xD9,0x8E,0x94,
109 | 0x9B,0x1E,0x87,0xE9,0xCE,0x55,0x28,0xDF,
110 | 0x8C,0xA1,0x89,0x0D,0xBF,0xE6,0x42,0x68,
111 | 0x41,0x99,0x2D,0x0F,0xB0,0x54,0xBB,0x16,
112 | };
113 |
114 | /*
115 | * AES is-box
116 | */
117 | static const uint8_t aes_isbox[256] =
118 | {
119 | 0x52,0x09,0x6a,0xd5,0x30,0x36,0xa5,0x38,
120 | 0xbf,0x40,0xa3,0x9e,0x81,0xf3,0xd7,0xfb,
121 | 0x7c,0xe3,0x39,0x82,0x9b,0x2f,0xff,0x87,
122 | 0x34,0x8e,0x43,0x44,0xc4,0xde,0xe9,0xcb,
123 | 0x54,0x7b,0x94,0x32,0xa6,0xc2,0x23,0x3d,
124 | 0xee,0x4c,0x95,0x0b,0x42,0xfa,0xc3,0x4e,
125 | 0x08,0x2e,0xa1,0x66,0x28,0xd9,0x24,0xb2,
126 | 0x76,0x5b,0xa2,0x49,0x6d,0x8b,0xd1,0x25,
127 | 0x72,0xf8,0xf6,0x64,0x86,0x68,0x98,0x16,
128 | 0xd4,0xa4,0x5c,0xcc,0x5d,0x65,0xb6,0x92,
129 | 0x6c,0x70,0x48,0x50,0xfd,0xed,0xb9,0xda,
130 | 0x5e,0x15,0x46,0x57,0xa7,0x8d,0x9d,0x84,
131 | 0x90,0xd8,0xab,0x00,0x8c,0xbc,0xd3,0x0a,
132 | 0xf7,0xe4,0x58,0x05,0xb8,0xb3,0x45,0x06,
133 | 0xd0,0x2c,0x1e,0x8f,0xca,0x3f,0x0f,0x02,
134 | 0xc1,0xaf,0xbd,0x03,0x01,0x13,0x8a,0x6b,
135 | 0x3a,0x91,0x11,0x41,0x4f,0x67,0xdc,0xea,
136 | 0x97,0xf2,0xcf,0xce,0xf0,0xb4,0xe6,0x73,
137 | 0x96,0xac,0x74,0x22,0xe7,0xad,0x35,0x85,
138 | 0xe2,0xf9,0x37,0xe8,0x1c,0x75,0xdf,0x6e,
139 | 0x47,0xf1,0x1a,0x71,0x1d,0x29,0xc5,0x89,
140 | 0x6f,0xb7,0x62,0x0e,0xaa,0x18,0xbe,0x1b,
141 | 0xfc,0x56,0x3e,0x4b,0xc6,0xd2,0x79,0x20,
142 | 0x9a,0xdb,0xc0,0xfe,0x78,0xcd,0x5a,0xf4,
143 | 0x1f,0xdd,0xa8,0x33,0x88,0x07,0xc7,0x31,
144 | 0xb1,0x12,0x10,0x59,0x27,0x80,0xec,0x5f,
145 | 0x60,0x51,0x7f,0xa9,0x19,0xb5,0x4a,0x0d,
146 | 0x2d,0xe5,0x7a,0x9f,0x93,0xc9,0x9c,0xef,
147 | 0xa0,0xe0,0x3b,0x4d,0xae,0x2a,0xf5,0xb0,
148 | 0xc8,0xeb,0xbb,0x3c,0x83,0x53,0x99,0x61,
149 | 0x17,0x2b,0x04,0x7e,0xba,0x77,0xd6,0x26,
150 | 0xe1,0x69,0x14,0x63,0x55,0x21,0x0c,0x7d
151 | };
152 |
153 | static const unsigned char Rcon[30]=
154 | {
155 | 0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,
156 | 0x1b,0x36,0x6c,0xd8,0xab,0x4d,0x9a,0x2f,
157 | 0x5e,0xbc,0x63,0xc6,0x97,0x35,0x6a,0xd4,
158 | 0xb3,0x7d,0xfa,0xef,0xc5,0x91,
159 | };
160 |
161 | /* ----- static functions ----- */
162 | static void AES_encrypt(const AES_CTX *ctx, uint32_t *data);
163 | static void AES_decrypt(const AES_CTX *ctx, uint32_t *data);
164 |
165 | /* Perform doubling in Galois Field GF(2^8) using the irreducible polynomial
166 | x^8+x^4+x^3+x+1 */
167 | static unsigned char AES_xtime(uint32_t x)
168 | {
169 | return (x&0x80) ? (x<<1)^0x1b : x<<1;
170 | }
171 |
172 | /**
173 | * Set up AES with the key/iv and cipher size.
174 | */
175 | void AES_set_key(AES_CTX *ctx, const uint8_t *key,
176 | const uint8_t *iv, AES_MODE mode)
177 | {
178 | int i, ii;
179 | uint32_t *W, tmp, tmp2;
180 | const unsigned char *ip;
181 | int words;
182 |
183 | switch (mode)
184 | {
185 | case AES_MODE_128:
186 | i = 10;
187 | words = 4;
188 | break;
189 |
190 | case AES_MODE_256:
191 | i = 14;
192 | words = 8;
193 | break;
194 |
195 | default: /* fail silently */
196 | return;
197 | }
198 |
199 | ctx->rounds = i;
200 | ctx->key_size = words;
201 | W = ctx->ks;
202 | for (i = 0; i < words; i+=2)
203 | {
204 | W[i+0]= ((uint32_t)key[ 0]<<24)|
205 | ((uint32_t)key[ 1]<<16)|
206 | ((uint32_t)key[ 2]<< 8)|
207 | ((uint32_t)key[ 3] );
208 | W[i+1]= ((uint32_t)key[ 4]<<24)|
209 | ((uint32_t)key[ 5]<<16)|
210 | ((uint32_t)key[ 6]<< 8)|
211 | ((uint32_t)key[ 7] );
212 | key += 8;
213 | }
214 |
215 | ip = Rcon;
216 | ii = 4 * (ctx->rounds+1);
217 | for (i = words; i> 8)&0xff]<<16;
225 | tmp2|=(uint32_t)aes_sbox[(tmp>>16)&0xff]<<24;
226 | tmp2|=(uint32_t)aes_sbox[(tmp>>24) ];
227 | tmp=tmp2^(((unsigned int)*ip)<<24);
228 | ip++;
229 | }
230 |
231 | if ((words == 8) && ((i % words) == 4))
232 | {
233 | tmp2 =(uint32_t)aes_sbox[(tmp )&0xff] ;
234 | tmp2|=(uint32_t)aes_sbox[(tmp>> 8)&0xff]<< 8;
235 | tmp2|=(uint32_t)aes_sbox[(tmp>>16)&0xff]<<16;
236 | tmp2|=(uint32_t)aes_sbox[(tmp>>24) ]<<24;
237 | tmp=tmp2;
238 | }
239 |
240 | W[i]=W[i-words]^tmp;
241 | }
242 |
243 | /* copy the iv across */
244 | memcpy(ctx->iv, iv, 16);
245 | }
246 |
247 | /**
248 | * Change a key for decryption.
249 | */
250 | void AES_convert_key(AES_CTX *ctx)
251 | {
252 | int i;
253 | uint32_t *k,w,t1,t2,t3,t4;
254 |
255 | k = ctx->ks;
256 | k += 4;
257 |
258 | for (i= ctx->rounds*4; i > 4; i--)
259 | {
260 | w= *k;
261 | w = inv_mix_col(w,t1,t2,t3,t4);
262 | *k++ =w;
263 | }
264 | }
265 |
266 | /**
267 | * Encrypt a byte sequence (with a block size 16) using the AES cipher.
268 | */
269 | void AES_cbc_encrypt(AES_CTX *ctx, const uint8_t *msg, uint8_t *out, int length)
270 | {
271 | int i;
272 | uint32_t tin[4], tout[4], iv[4];
273 |
274 | memcpy(iv, ctx->iv, AES_IV_SIZE);
275 | for (i = 0; i < 4; i++)
276 | tout[i] = _byteswap_ulong(iv[i]);
277 |
278 | for (length -= AES_BLOCKSIZE; length >= 0; length -= AES_BLOCKSIZE)
279 | {
280 | uint32_t msg_32[4];
281 | uint32_t out_32[4];
282 | memcpy(msg_32, msg, AES_BLOCKSIZE);
283 | msg += AES_BLOCKSIZE;
284 |
285 | for (i = 0; i < 4; i++)
286 | tin[i] = _byteswap_ulong(msg_32[i])^tout[i];
287 |
288 | AES_encrypt(ctx, tin);
289 |
290 | for (i = 0; i < 4; i++)
291 | {
292 | tout[i] = tin[i];
293 | out_32[i] = _byteswap_ulong(tout[i]);
294 | }
295 |
296 | memcpy(out, out_32, AES_BLOCKSIZE);
297 | out += AES_BLOCKSIZE;
298 | }
299 |
300 | for (i = 0; i < 4; i++)
301 | iv[i] = _byteswap_ulong(tout[i]);
302 | memcpy(ctx->iv, iv, AES_IV_SIZE);
303 | }
304 |
305 | /**
306 | * Decrypt a byte sequence (with a block size 16) using the AES cipher.
307 | */
308 | void AES_cbc_decrypt(AES_CTX *ctx, const uint8_t *msg, uint8_t *out, int length)
309 | {
310 | int i;
311 | uint32_t tin[4], xor[4], tout[4], data[4], iv[4];
312 |
313 | memcpy(iv, ctx->iv, AES_IV_SIZE);
314 | for (i = 0; i < 4; i++)
315 | xor[i] = _byteswap_ulong(iv[i]);
316 |
317 | for (length -= 16; length >= 0; length -= 16)
318 | {
319 | uint32_t msg_32[4];
320 | uint32_t out_32[4];
321 | memcpy(msg_32, msg, AES_BLOCKSIZE);
322 | msg += AES_BLOCKSIZE;
323 |
324 | for (i = 0; i < 4; i++)
325 | {
326 | tin[i] = _byteswap_ulong(msg_32[i]);
327 | data[i] = tin[i];
328 | }
329 |
330 | AES_decrypt(ctx, data);
331 |
332 | for (i = 0; i < 4; i++)
333 | {
334 | tout[i] = data[i]^xor[i];
335 | xor[i] = tin[i];
336 | out_32[i] = _byteswap_ulong(tout[i]);
337 | }
338 |
339 | memcpy(out, out_32, AES_BLOCKSIZE);
340 | out += AES_BLOCKSIZE;
341 | }
342 |
343 | for (i = 0; i < 4; i++)
344 | iv[i] = _byteswap_ulong(xor[i]);
345 | memcpy(ctx->iv, iv, AES_IV_SIZE);
346 | }
347 |
348 | /**
349 | * Encrypt a single block (16 bytes) of data
350 | */
351 | static void AES_encrypt(const AES_CTX *ctx, uint32_t *data)
352 | {
353 | /* To make this code smaller, generate the sbox entries on the fly.
354 | * This will have a really heavy effect upon performance.
355 | */
356 | uint32_t tmp[4];
357 | uint32_t tmp1, old_a0, a0, a1, a2, a3, row;
358 | int curr_rnd;
359 | int rounds = ctx->rounds;
360 | const uint32_t *k = ctx->ks;
361 |
362 | /* Pre-round key addition */
363 | for (row = 0; row < 4; row++)
364 | data[row] ^= *(k++);
365 |
366 | /* Encrypt one block. */
367 | for (curr_rnd = 0; curr_rnd < rounds; curr_rnd++)
368 | {
369 | /* Perform ByteSub and ShiftRow operations together */
370 | for (row = 0; row < 4; row++)
371 | {
372 | a0 = (uint32_t)aes_sbox[(data[row%4]>>24)&0xFF];
373 | a1 = (uint32_t)aes_sbox[(data[(row+1)%4]>>16)&0xFF];
374 | a2 = (uint32_t)aes_sbox[(data[(row+2)%4]>>8)&0xFF];
375 | a3 = (uint32_t)aes_sbox[(data[(row+3)%4])&0xFF];
376 |
377 | /* Perform MixColumn iff not last round */
378 | if (curr_rnd < (rounds - 1))
379 | {
380 | tmp1 = a0 ^ a1 ^ a2 ^ a3;
381 | old_a0 = a0;
382 | a0 ^= tmp1 ^ AES_xtime(a0 ^ a1);
383 | a1 ^= tmp1 ^ AES_xtime(a1 ^ a2);
384 | a2 ^= tmp1 ^ AES_xtime(a2 ^ a3);
385 | a3 ^= tmp1 ^ AES_xtime(a3 ^ old_a0);
386 | }
387 |
388 | tmp[row] = ((a0 << 24) | (a1 << 16) | (a2 << 8) | a3);
389 | }
390 |
391 | /* KeyAddition - note that it is vital that this loop is separate from
392 | the MixColumn operation, which must be atomic...*/
393 | for (row = 0; row < 4; row++)
394 | data[row] = tmp[row] ^ *(k++);
395 | }
396 | }
397 |
398 | /**
399 | * Decrypt a single block (16 bytes) of data
400 | */
401 | static void AES_decrypt(const AES_CTX *ctx, uint32_t *data)
402 | {
403 | uint32_t tmp[4];
404 | uint32_t xt0,xt1,xt2,xt3,xt4,xt5,xt6;
405 | uint32_t a0, a1, a2, a3, row;
406 | int curr_rnd;
407 | int rounds = ctx->rounds;
408 | const uint32_t *k = ctx->ks + ((rounds+1)*4);
409 |
410 | /* pre-round key addition */
411 | for (row=4; row > 0;row--)
412 | data[row-1] ^= *(--k);
413 |
414 | /* Decrypt one block */
415 | for (curr_rnd = 0; curr_rnd < rounds; curr_rnd++)
416 | {
417 | /* Perform ByteSub and ShiftRow operations together */
418 | for (row = 4; row > 0; row--)
419 | {
420 | a0 = aes_isbox[(data[(row+3)%4]>>24)&0xFF];
421 | a1 = aes_isbox[(data[(row+2)%4]>>16)&0xFF];
422 | a2 = aes_isbox[(data[(row+1)%4]>>8)&0xFF];
423 | a3 = aes_isbox[(data[row%4])&0xFF];
424 |
425 | /* Perform MixColumn iff not last round */
426 | if (curr_rnd<(rounds-1))
427 | {
428 | /* The MDS cofefficients (0x09, 0x0B, 0x0D, 0x0E)
429 | are quite large compared to encryption; this
430 | operation slows decryption down noticeably. */
431 | xt0 = AES_xtime(a0^a1);
432 | xt1 = AES_xtime(a1^a2);
433 | xt2 = AES_xtime(a2^a3);
434 | xt3 = AES_xtime(a3^a0);
435 | xt4 = AES_xtime(xt0^xt1);
436 | xt5 = AES_xtime(xt1^xt2);
437 | xt6 = AES_xtime(xt4^xt5);
438 |
439 | xt0 ^= a1^a2^a3^xt4^xt6;
440 | xt1 ^= a0^a2^a3^xt5^xt6;
441 | xt2 ^= a0^a1^a3^xt4^xt6;
442 | xt3 ^= a0^a1^a2^xt5^xt6;
443 | tmp[row-1] = ((xt0<<24)|(xt1<<16)|(xt2<<8)|xt3);
444 | }
445 | else
446 | tmp[row-1] = ((a0<<24)|(a1<<16)|(a2<<8)|a3);
447 | }
448 |
449 | for (row = 4; row > 0; row--)
450 | data[row-1] = tmp[row-1] ^ *(--k);
451 | }
452 | }
453 |
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/EDUReViver/crypto.h:
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1 | /*
2 | * Copyright (c) 2007-2016, Cameron Rich
3 | *
4 | * All rights reserved.
5 | *
6 | * Redistribution and use in source and binary forms, with or without
7 | * modification, are permitted provided that the following conditions are met:
8 | *
9 | * * Redistributions of source code must retain the above copyright notice,
10 | * this list of conditions and the following disclaimer.
11 | * * Redistributions in binary form must reproduce the above copyright notice,
12 | * this list of conditions and the following disclaimer in the documentation
13 | * and/or other materials provided with the distribution.
14 | * * Neither the name of the axTLS project nor the names of its contributors
15 | * may be used to endorse or promote products derived from this software
16 | * without specific prior written permission.
17 | *
18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
22 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
23 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
24 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
25 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
26 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
27 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 | */
30 |
31 | /**
32 | * @file crypto.h
33 | */
34 |
35 | #ifndef HEADER_CRYPTO_H
36 | #define HEADER_CRYPTO_H
37 |
38 | #ifdef __cplusplus
39 | extern "C" {
40 | #endif
41 |
42 | #include
43 |
44 | #ifndef STDCALL
45 | #define STDCALL
46 | #endif
47 | #ifndef EXP_FUNC
48 | #define EXP_FUNC
49 | #endif
50 |
51 |
52 | /* enable features based on a 'super-set' capbaility. */
53 | #if defined(CONFIG_SSL_FULL_MODE)
54 | #define CONFIG_SSL_ENABLE_CLIENT
55 | #define CONFIG_SSL_CERT_VERIFICATION
56 | #elif defined(CONFIG_SSL_ENABLE_CLIENT)
57 | #define CONFIG_SSL_CERT_VERIFICATION
58 | #endif
59 |
60 | /**************************************************************************
61 | * AES declarations
62 | **************************************************************************/
63 |
64 | #define AES_MAXROUNDS 14
65 | #define AES_BLOCKSIZE 16
66 | #define AES_IV_SIZE 16
67 |
68 | typedef struct aes_key_st
69 | {
70 | uint16_t rounds;
71 | uint16_t key_size;
72 | uint32_t ks[(AES_MAXROUNDS+1)*8];
73 | uint8_t iv[AES_IV_SIZE];
74 | } AES_CTX;
75 |
76 | typedef enum
77 | {
78 | AES_MODE_128,
79 | AES_MODE_256
80 | } AES_MODE;
81 |
82 | void AES_set_key(AES_CTX *ctx, const uint8_t *key,
83 | const uint8_t *iv, AES_MODE mode);
84 | void AES_cbc_encrypt(AES_CTX *ctx, const uint8_t *msg,
85 | uint8_t *out, int length);
86 | void AES_cbc_decrypt(AES_CTX *ks, const uint8_t *in, uint8_t *out, int length);
87 | void AES_convert_key(AES_CTX *ctx);
88 |
89 | #ifdef __cplusplus
90 | }
91 | #endif
92 |
93 | #endif
94 |
--------------------------------------------------------------------------------
/EDUReViver/httpclient.cpp:
--------------------------------------------------------------------------------
1 | #include "targetver.h"
2 | #define WIN32_LEAN_AND_MEAN
3 | #include
4 | #include
5 | #include
6 | #include
7 | #include
8 | #include
9 | #ifdef USECURL
10 | #include
11 | #include
12 | #include
13 | #include
14 | #endif
15 | #include "httpclient.h"
16 | #include "addon_func.h"
17 |
18 |
19 | #ifdef _DEBUG
20 | #define apphost "localhost"
21 | #else
22 | #define apphost "azsd.net"
23 | #endif
24 |
25 | char* encode_query_string(const char* query)
26 | {
27 | if (!query) {
28 | return 0;
29 | }
30 | DWORD required = strlen(query) * 3;
31 | char* encoded = (char*)malloc(required);
32 | //InternetCanonicalizeUrlA(query, encoded, &required, ICU_ENCODE_SPACES_ONLY);
33 | if (UrlEscapeA(query, encoded, &required, URL_ESCAPE_SPACES_ONLY) == S_OK) {
34 | return encoded;
35 | } else if (required) {
36 | encoded = (char*)realloc(encoded, required);
37 | if (UrlEscapeA(query, encoded, &required, URL_ESCAPE_SPACES_ONLY) == S_OK) {
38 | return encoded;
39 | } else {
40 | free(encoded);
41 | return 0;
42 | }
43 | }
44 | return 0;
45 | }
46 |
47 | #ifdef USECURL
48 | //typedef std::vector bytevec;
49 | struct bytebuf {
50 | uint8_t* data;
51 | size_t size;
52 | bytebuf() : data(nullptr), size (0){
53 |
54 | }
55 | };
56 |
57 | size_t write_cb(char *in, size_t size, size_t nmemb, bytebuf*out)
58 | {
59 | size_t r = size * nmemb;
60 | //out->insert(out->end(), in, in + r);
61 | if (out->size == 0) {
62 | out->data = (uint8_t*)malloc(r);
63 | } else {
64 | out->data = (uint8_t*)realloc(out->data, out->size + r);
65 | }
66 | memcpy(&out->data[out->size], in, r);
67 | out->size += r;
68 | return r;
69 | }
70 |
71 | bool download_file(const char* url, const char* path)
72 | {
73 | bool result = false;
74 | if (CURL* curl = curl_easy_init()) {
75 | curl_easy_setopt(curl, CURLOPT_URL, url);
76 | bytebuf buff;
77 | curl_easy_setopt(curl, CURLOPT_WRITEDATA, &buff);
78 | curl_easy_setopt(curl, CURLOPT_WRITEFUNCTION, write_cb);
79 | curl_easy_setopt(curl, CURLOPT_FILETIME, 1L);
80 | curl_easy_setopt(curl, CURLOPT_SSL_VERIFYPEER, 0L);
81 | //curl_easy_setopt(curl, CURLOPT_PROXY, "http://localhost:8802");
82 | CURLcode res = curl_easy_perform(curl);
83 | if (res == CURLE_OK) {
84 | if (buff.size) {
85 | int fd = _open(path, O_CREAT | O_RDWR | O_BINARY, S_IREAD | S_IWRITE);
86 | if (fd != -1) {
87 | result = _write(fd, buff.data, buff.size) == buff.size;
88 | _close(fd);
89 | long filetime;
90 | if((curl_easy_getinfo(curl, CURLINFO_FILETIME, &filetime) == CURLE_OK) && (filetime >= 0)) {
91 | printf("filetime: %08X\n", filetime);
92 | LONGLONG time_value = Int32x32To64(filetime, 10000000) + 116444736000000000;
93 | setwin32filetime(path, time_value);
94 | }
95 | }
96 | } else {
97 | fprintf(stderr, "download file %s error!\n", path);
98 | }
99 | } else {
100 | fprintf(stderr, "curl_easy_perform failed %d in download file: %s\n", res, curl_easy_strerror(res));
101 | }
102 | if (buff.data) {
103 | free(buff.data);
104 | }
105 | curl_easy_cleanup(curl);
106 | }
107 | return result;
108 | }
109 |
110 | int request_payload_online(int sn, const char* hash, const char* signature, const char* payloadname, const char* payloadopt, char** reply, size_t* replylen)
111 | {
112 | int retcode = 0;
113 | curl_global_init(CURL_GLOBAL_ALL);
114 | if (CURL* curl = curl_easy_init()) {
115 | payloadname = encode_query_string(payloadname);
116 | payloadopt = encode_query_string(payloadopt);
117 | size_t reqlen = 128 + strlen(hash) + strlen(signature) + (payloadname?strlen(payloadname):0) + (payloadopt?strlen(payloadopt):0);
118 | char* req = (char*)malloc(reqlen);
119 | reqlen = sprintf_s(req, reqlen, "sn=%d&hash=%s&signature=%s&payload=%s&opt=%s", sn, hash, signature, payloadname?payloadname:"", payloadopt?payloadopt:"");
120 | if (payloadname) {
121 | free((void*)payloadname);
122 | }
123 | if (payloadopt) {
124 | free((void*)payloadopt);
125 | }
126 | curl_easy_setopt(curl, CURLOPT_URL, "https://"apphost"/jlink/payload2.php");
127 | if (fileexists("curl-ca-bundle.crt")) {
128 | curl_easy_setopt(curl, CURLOPT_CAINFO, "curl-ca-bundle.crt");
129 | } else if (fileexists("ca-bundle.crt") || download_file("https://curl.se/ca/cacert.pem", "ca-bundle.crt")) {
130 | curl_easy_setopt(curl, CURLOPT_CAINFO, "ca-bundle.crt");
131 | } else {
132 | #ifdef _DEBUG
133 | curl_easy_setopt(curl, CURLOPT_SSL_VERIFYPEER, 0L);
134 | #else
135 | fprintf(stderr, "Can't set ca-bundle, you may failed curl_easy_perform.\n");
136 | #endif
137 | }
138 | #ifdef _DEBUG
139 | curl_easy_setopt(curl, CURLOPT_SSL_VERIFYHOST, 0L);
140 | #endif
141 | curl_easy_setopt(curl, CURLOPT_POSTFIELDS, req);
142 | bytebuf buff;
143 | curl_easy_setopt(curl, CURLOPT_WRITEDATA, &buff);
144 | curl_easy_setopt(curl, CURLOPT_WRITEFUNCTION, write_cb);
145 | //curl_easy_setopt(curl, CURLOPT_PROXY, "http://localhost:8802");
146 | char agent[64];
147 | DWORD dwVersion = GetVersion();
148 | sprintf_s(agent, sizeof(agent), "EDUReViver/0.3.7 (Windows NT %d.%d)", (UCHAR)dwVersion, (UCHAR)(dwVersion >> 8));
149 | curl_easy_setopt(curl, CURLOPT_USERAGENT, agent);
150 | CURLcode res = curl_easy_perform(curl);
151 | free(req);
152 | if (res == CURLE_OK) {
153 | //#ifdef _DEBUG
154 | quickdump(0, buff.data, buff.size);
155 | fwrite(buff.data, buff.size, 1, stdout);
156 | //#endif
157 | if (buff.size) {
158 | *reply = (char*)malloc(buff.size);
159 | memcpy(*reply, buff.data, buff.size);
160 | *replylen = buff.size;
161 | }
162 | } else {
163 | fprintf(stderr, "curl_easy_perform failed %d: %s\n", res, curl_easy_strerror(res));
164 | }
165 | curl_easy_cleanup(curl);
166 | }
167 | curl_global_cleanup();
168 | return retcode;
169 | }
170 | #else
171 |
172 | bool os_is_reactos()
173 | {
174 | bool found = false;
175 | DWORD infosize = GetFileVersionInfoSizeA("schannel.dll", NULL);
176 | void* info = malloc(infosize);
177 | if (GetFileVersionInfoA("schannel.dll", 0, infosize, info)) {
178 | struct LANGANDCODEPAGE {
179 | WORD wLanguage;
180 | WORD wCodePage;
181 | } *lpTranslate;
182 | UINT cbTranslate;
183 | VerQueryValueA(info, "\\VarFileInfo\\Translation", (LPVOID*)&lpTranslate, &cbTranslate);
184 | for( UINT i=0; i < (cbTranslate/sizeof(struct LANGANDCODEPAGE)); i++ ) {
185 | char path[100];
186 | sprintf_s(path, "\\StringFileInfo\\%04x%04x\\ProductName", lpTranslate[i].wLanguage, lpTranslate[i].wCodePage);
187 | char* name;
188 | UINT namelen;
189 | if (VerQueryValueA(info, path, (LPVOID*)&name, &namelen)) {
190 | //quickdump((size_t)name, (uint8_t*)name, namelen);
191 | if (strncmp("ReactOS", name, strlen("ReactOS")) == 0) {
192 | found = true;
193 | break;
194 | }
195 | }
196 | }
197 | }
198 | free(info);
199 | return found;
200 | }
201 |
202 | bool os_have_sni()
203 | {
204 | if (os_is_reactos()) {
205 | printf("Found ReactOS.\n");
206 | return true;
207 | }
208 | // TODO: check SChannel Version
209 | OSVERSIONINFOEXA osvi;
210 | osvi.dwOSVersionInfoSize = sizeof(OSVERSIONINFOEX);
211 | osvi.dwMajorVersion = 6;
212 | DWORDLONG conditionmask = 0;
213 | VER_SET_CONDITION( conditionmask, VER_MAJORVERSION, VER_GREATER_EQUAL );
214 | return !!VerifyVersionInfoA(&osvi, VER_MAJORVERSION, conditionmask);
215 | }
216 |
217 | int request_payload_online(int sn, const char* hash, const char* signature, const char* payloadname, const char* payloadopt, char** reply, size_t* replylen)
218 | {
219 | int retcode = 0;
220 | char agent[64];
221 | DWORD dwVersion = GetVersion();
222 | sprintf_s(agent, sizeof(agent), "EDUReViver/0.3.9 (Windows NT %d.%d)", (UCHAR)dwVersion, (UCHAR)(dwVersion >> 8));
223 | HINTERNET internet = InternetOpenA(agent, 0, 0, 0, 0);
224 | if (internet) {
225 | bool havesni = os_have_sni();
226 | if (HINTERNET connect = InternetConnectA(internet, apphost, havesni?INTERNET_DEFAULT_HTTPS_PORT:INTERNET_DEFAULT_HTTP_PORT, NULL, NULL, INTERNET_SERVICE_HTTP, 0, 0)) {
227 | DWORD flags = INTERNET_FLAG_RELOAD | INTERNET_FLAG_NO_CACHE_WRITE | INTERNET_FLAG_KEEP_CONNECTION;
228 | if (havesni) {
229 | flags |= INTERNET_FLAG_SECURE;
230 | }
231 | if (HINTERNET request = HttpOpenRequestA(connect, "POST", "jlink/payload2.php", NULL, NULL, NULL, flags, 0)) {
232 | payloadname = encode_query_string(payloadname);
233 | payloadopt = encode_query_string(payloadopt);
234 | size_t reqlen = 128 + strlen(hash) + strlen(signature) + (payloadname?strlen(payloadname):0) + (payloadopt?strlen(payloadopt):0);
235 | char* req = (char*)malloc(reqlen);
236 | reqlen = sprintf_s(req, reqlen, "sn=%d&hash=%s&signature=%s&payload=%s&opt=%s", sn, hash, signature, payloadname?payloadname:"", payloadopt?payloadopt:"");
237 | if (payloadname) {
238 | free((void*)payloadname);
239 | }
240 | if (payloadopt) {
241 | free((void*)payloadopt);
242 | }
243 | if (HttpSendRequestA(request, "Content-Type: application/x-www-form-urlencoded\r\n", -1, req, reqlen)) {
244 | DWORD statuscode = 0; // HTTP_STATUS_OK
245 | DWORD statuscodesize = sizeof(statuscode);
246 | if (HttpQueryInfoA(request, HTTP_QUERY_FLAG_NUMBER | HTTP_QUERY_STATUS_CODE, &statuscode, &statuscodesize, 0) && statuscode == HTTP_STATUS_OK) {
247 | size_t resppos = 0;
248 | DWORD readed;
249 | char localbuf[0x1000];
250 | for (;;) {
251 | if (InternetReadFile(request, localbuf, sizeof(localbuf), &readed)) {
252 | if (readed) {
253 | #ifdef _DEBUG
254 | quickdump(0, (uint8_t*)localbuf, readed);
255 | #endif
256 | if (resppos == 0) {
257 | *reply = (char*)malloc(readed);
258 | } else {
259 | *reply = (char*)realloc(*reply, resppos + readed);
260 | }
261 | memcpy((*reply) + resppos, localbuf, readed);
262 | resppos += readed;
263 | } else {
264 | *replylen = resppos;
265 | break;
266 | }
267 | }
268 | }
269 | } else if (statuscode == HTTP_STATUS_OK) {
270 | errprintf("Error %u in HttpQueryInfo.\n", GetLastError());
271 | retcode = -5;
272 | } else {
273 | errprintf("HTTP error %u by HttpQueryInfo.\n", statuscode);
274 | }
275 | } else {
276 | errprintf("Error %u in HttpOpenRequest.\n", GetLastError());
277 | retcode = -4;
278 | }
279 | free(req);
280 | InternetCloseHandle(request);
281 | } else {
282 | retcode = -3;
283 | }
284 | InternetCloseHandle(connect);
285 | } else {
286 | retcode = -2;
287 | }
288 | InternetCloseHandle(internet);
289 | } else {
290 | retcode = -1;
291 | }
292 | return retcode;
293 | }
294 | #endif
--------------------------------------------------------------------------------
/EDUReViver/httpclient.h:
--------------------------------------------------------------------------------
1 | #include
2 |
3 | int request_payload_online(int sn, const char* hash, const char* signature, const char* payloadname, const char* payloadopt, char** reply, size_t* replylen);
--------------------------------------------------------------------------------
/EDUReViver/include/capstone/evm.h:
--------------------------------------------------------------------------------
1 | #ifndef CAPSTONE_EVM_H
2 | #define CAPSTONE_EVM_H
3 |
4 | /* Capstone Disassembly Engine */
5 | /* By Nguyen Anh Quynh , 2013-2018 */
6 |
7 | #ifdef __cplusplus
8 | extern "C" {
9 | #endif
10 |
11 | #include "platform.h"
12 |
13 | #ifdef _MSC_VER
14 | #pragma warning(disable:4201)
15 | #endif
16 |
17 | /// Instruction structure
18 | typedef struct cs_evm {
19 | unsigned char pop; ///< number of items popped from the stack
20 | unsigned char push; ///< number of items pushed into the stack
21 | unsigned int fee; ///< gas fee for the instruction
22 | } cs_evm;
23 |
24 | /// EVM instruction
25 | typedef enum evm_insn {
26 | EVM_INS_STOP = 0,
27 | EVM_INS_ADD = 1,
28 | EVM_INS_MUL = 2,
29 | EVM_INS_SUB = 3,
30 | EVM_INS_DIV = 4,
31 | EVM_INS_SDIV = 5,
32 | EVM_INS_MOD = 6,
33 | EVM_INS_SMOD = 7,
34 | EVM_INS_ADDMOD = 8,
35 | EVM_INS_MULMOD = 9,
36 | EVM_INS_EXP = 10,
37 | EVM_INS_SIGNEXTEND = 11,
38 | EVM_INS_LT = 16,
39 | EVM_INS_GT = 17,
40 | EVM_INS_SLT = 18,
41 | EVM_INS_SGT = 19,
42 | EVM_INS_EQ = 20,
43 | EVM_INS_ISZERO = 21,
44 | EVM_INS_AND = 22,
45 | EVM_INS_OR = 23,
46 | EVM_INS_XOR = 24,
47 | EVM_INS_NOT = 25,
48 | EVM_INS_BYTE = 26,
49 | EVM_INS_SHA3 = 32,
50 | EVM_INS_ADDRESS = 48,
51 | EVM_INS_BALANCE = 49,
52 | EVM_INS_ORIGIN = 50,
53 | EVM_INS_CALLER = 51,
54 | EVM_INS_CALLVALUE = 52,
55 | EVM_INS_CALLDATALOAD = 53,
56 | EVM_INS_CALLDATASIZE = 54,
57 | EVM_INS_CALLDATACOPY = 55,
58 | EVM_INS_CODESIZE = 56,
59 | EVM_INS_CODECOPY = 57,
60 | EVM_INS_GASPRICE = 58,
61 | EVM_INS_EXTCODESIZE = 59,
62 | EVM_INS_EXTCODECOPY = 60,
63 | EVM_INS_RETURNDATASIZE = 61,
64 | EVM_INS_RETURNDATACOPY = 62,
65 | EVM_INS_BLOCKHASH = 64,
66 | EVM_INS_COINBASE = 65,
67 | EVM_INS_TIMESTAMP = 66,
68 | EVM_INS_NUMBER = 67,
69 | EVM_INS_DIFFICULTY = 68,
70 | EVM_INS_GASLIMIT = 69,
71 | EVM_INS_POP = 80,
72 | EVM_INS_MLOAD = 81,
73 | EVM_INS_MSTORE = 82,
74 | EVM_INS_MSTORE8 = 83,
75 | EVM_INS_SLOAD = 84,
76 | EVM_INS_SSTORE = 85,
77 | EVM_INS_JUMP = 86,
78 | EVM_INS_JUMPI = 87,
79 | EVM_INS_PC = 88,
80 | EVM_INS_MSIZE = 89,
81 | EVM_INS_GAS = 90,
82 | EVM_INS_JUMPDEST = 91,
83 | EVM_INS_PUSH1 = 96,
84 | EVM_INS_PUSH2 = 97,
85 | EVM_INS_PUSH3 = 98,
86 | EVM_INS_PUSH4 = 99,
87 | EVM_INS_PUSH5 = 100,
88 | EVM_INS_PUSH6 = 101,
89 | EVM_INS_PUSH7 = 102,
90 | EVM_INS_PUSH8 = 103,
91 | EVM_INS_PUSH9 = 104,
92 | EVM_INS_PUSH10 = 105,
93 | EVM_INS_PUSH11 = 106,
94 | EVM_INS_PUSH12 = 107,
95 | EVM_INS_PUSH13 = 108,
96 | EVM_INS_PUSH14 = 109,
97 | EVM_INS_PUSH15 = 110,
98 | EVM_INS_PUSH16 = 111,
99 | EVM_INS_PUSH17 = 112,
100 | EVM_INS_PUSH18 = 113,
101 | EVM_INS_PUSH19 = 114,
102 | EVM_INS_PUSH20 = 115,
103 | EVM_INS_PUSH21 = 116,
104 | EVM_INS_PUSH22 = 117,
105 | EVM_INS_PUSH23 = 118,
106 | EVM_INS_PUSH24 = 119,
107 | EVM_INS_PUSH25 = 120,
108 | EVM_INS_PUSH26 = 121,
109 | EVM_INS_PUSH27 = 122,
110 | EVM_INS_PUSH28 = 123,
111 | EVM_INS_PUSH29 = 124,
112 | EVM_INS_PUSH30 = 125,
113 | EVM_INS_PUSH31 = 126,
114 | EVM_INS_PUSH32 = 127,
115 | EVM_INS_DUP1 = 128,
116 | EVM_INS_DUP2 = 129,
117 | EVM_INS_DUP3 = 130,
118 | EVM_INS_DUP4 = 131,
119 | EVM_INS_DUP5 = 132,
120 | EVM_INS_DUP6 = 133,
121 | EVM_INS_DUP7 = 134,
122 | EVM_INS_DUP8 = 135,
123 | EVM_INS_DUP9 = 136,
124 | EVM_INS_DUP10 = 137,
125 | EVM_INS_DUP11 = 138,
126 | EVM_INS_DUP12 = 139,
127 | EVM_INS_DUP13 = 140,
128 | EVM_INS_DUP14 = 141,
129 | EVM_INS_DUP15 = 142,
130 | EVM_INS_DUP16 = 143,
131 | EVM_INS_SWAP1 = 144,
132 | EVM_INS_SWAP2 = 145,
133 | EVM_INS_SWAP3 = 146,
134 | EVM_INS_SWAP4 = 147,
135 | EVM_INS_SWAP5 = 148,
136 | EVM_INS_SWAP6 = 149,
137 | EVM_INS_SWAP7 = 150,
138 | EVM_INS_SWAP8 = 151,
139 | EVM_INS_SWAP9 = 152,
140 | EVM_INS_SWAP10 = 153,
141 | EVM_INS_SWAP11 = 154,
142 | EVM_INS_SWAP12 = 155,
143 | EVM_INS_SWAP13 = 156,
144 | EVM_INS_SWAP14 = 157,
145 | EVM_INS_SWAP15 = 158,
146 | EVM_INS_SWAP16 = 159,
147 | EVM_INS_LOG0 = 160,
148 | EVM_INS_LOG1 = 161,
149 | EVM_INS_LOG2 = 162,
150 | EVM_INS_LOG3 = 163,
151 | EVM_INS_LOG4 = 164,
152 | EVM_INS_CREATE = 240,
153 | EVM_INS_CALL = 241,
154 | EVM_INS_CALLCODE = 242,
155 | EVM_INS_RETURN = 243,
156 | EVM_INS_DELEGATECALL = 244,
157 | EVM_INS_CALLBLACKBOX = 245,
158 | EVM_INS_STATICCALL = 250,
159 | EVM_INS_REVERT = 253,
160 | EVM_INS_SUICIDE = 255,
161 |
162 | EVM_INS_INVALID = 512,
163 | EVM_INS_ENDING, // <-- mark the end of the list of instructions
164 | } evm_insn;
165 |
166 | /// Group of EVM instructions
167 | typedef enum evm_insn_group {
168 | EVM_GRP_INVALID = 0, ///< = CS_GRP_INVALID
169 |
170 | EVM_GRP_JUMP, ///< all jump instructions
171 |
172 | EVM_GRP_MATH = 8, ///< math instructions
173 | EVM_GRP_STACK_WRITE, ///< instructions write to stack
174 | EVM_GRP_STACK_READ, ///< instructions read from stack
175 | EVM_GRP_MEM_WRITE, ///< instructions write to memory
176 | EVM_GRP_MEM_READ, ///< instructions read from memory
177 | EVM_GRP_STORE_WRITE, ///< instructions write to storage
178 | EVM_GRP_STORE_READ, ///< instructions read from storage
179 | EVM_GRP_HALT, ///< instructions halt execution
180 |
181 | EVM_GRP_ENDING, ///< <-- mark the end of the list of groups
182 | } evm_insn_group;
183 |
184 | #ifdef __cplusplus
185 | }
186 | #endif
187 |
188 | #endif
189 |
--------------------------------------------------------------------------------
/EDUReViver/include/capstone/m680x.h:
--------------------------------------------------------------------------------
1 | #ifndef CAPSTONE_M680X_H
2 | #define CAPSTONE_M680X_H
3 |
4 | /* Capstone Disassembly Engine */
5 | /* M680X Backend by Wolfgang Schwotzer 2017 */
6 |
7 | #ifdef __cplusplus
8 | extern "C" {
9 | #endif
10 |
11 | #include "platform.h"
12 |
13 | #ifdef _MSC_VER
14 | #pragma warning(disable:4201)
15 | #endif
16 |
17 | #define M680X_OPERAND_COUNT 9
18 |
19 | /// M680X registers and special registers
20 | typedef enum m680x_reg {
21 | M680X_REG_INVALID = 0,
22 |
23 | M680X_REG_A, ///< M6800/1/2/3/9, HD6301/9
24 | M680X_REG_B, ///< M6800/1/2/3/9, HD6301/9
25 | M680X_REG_E, ///< HD6309
26 | M680X_REG_F, ///< HD6309
27 | M680X_REG_0, ///< HD6309
28 |
29 | M680X_REG_D, ///< M6801/3/9, HD6301/9
30 | M680X_REG_W, ///< HD6309
31 |
32 | M680X_REG_CC, ///< M6800/1/2/3/9, M6301/9
33 | M680X_REG_DP, ///< M6809/M6309
34 | M680X_REG_MD, ///< M6309
35 |
36 | M680X_REG_HX, ///< M6808
37 | M680X_REG_H, ///< M6808
38 | M680X_REG_X, ///< M6800/1/2/3/9, M6301/9
39 | M680X_REG_Y, ///< M6809/M6309
40 | M680X_REG_S, ///< M6809/M6309
41 | M680X_REG_U, ///< M6809/M6309
42 | M680X_REG_V, ///< M6309
43 |
44 | M680X_REG_Q, ///< M6309
45 |
46 | M680X_REG_PC, ///< M6800/1/2/3/9, M6301/9
47 |
48 | M680X_REG_TMP2, ///< CPU12
49 | M680X_REG_TMP3, ///< CPU12
50 |
51 | M680X_REG_ENDING, ///< <-- mark the end of the list of registers
52 | } m680x_reg;
53 |
54 | /// Operand type for instruction's operands
55 | typedef enum m680x_op_type {
56 | M680X_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
57 | M680X_OP_REGISTER, ///< = Register operand.
58 | M680X_OP_IMMEDIATE, ///< = Immediate operand.
59 | M680X_OP_INDEXED, ///< = Indexed addressing operand.
60 | M680X_OP_EXTENDED, ///< = Extended addressing operand.
61 | M680X_OP_DIRECT, ///< = Direct addressing operand.
62 | M680X_OP_RELATIVE, ///< = Relative addressing operand.
63 | M680X_OP_CONSTANT, ///< = constant operand (Displayed as number only).
64 | ///< Used e.g. for a bit index or page number.
65 | } m680x_op_type;
66 |
67 | // Supported bit values for mem.idx.offset_bits
68 | #define M680X_OFFSET_NONE 0
69 | #define M680X_OFFSET_BITS_5 5
70 | #define M680X_OFFSET_BITS_8 8
71 | #define M680X_OFFSET_BITS_9 9
72 | #define M680X_OFFSET_BITS_16 16
73 |
74 | // Supported bit flags for mem.idx.flags
75 | // These flags can be combined
76 | #define M680X_IDX_INDIRECT 1
77 | #define M680X_IDX_NO_COMMA 2
78 | #define M680X_IDX_POST_INC_DEC 4
79 |
80 | /// Instruction's operand referring to indexed addressing
81 | typedef struct m680x_op_idx {
82 | m680x_reg base_reg; ///< base register (or M680X_REG_INVALID if
83 | ///< irrelevant)
84 | m680x_reg offset_reg; ///< offset register (or M680X_REG_INVALID if
85 | ///< irrelevant)
86 | int16_t offset; ///< 5-,8- or 16-bit offset. See also offset_bits.
87 | uint16_t offset_addr; ///< = offset addr. if base_reg == M680X_REG_PC.
88 | ///< calculated as offset + PC
89 | uint8_t offset_bits; ///< offset width in bits for indexed addressing
90 | int8_t inc_dec; ///< inc. or dec. value:
91 | ///< 0: no inc-/decrement
92 | ///< 1 .. 8: increment by 1 .. 8
93 | ///< -1 .. -8: decrement by 1 .. 8
94 | ///< if flag M680X_IDX_POST_INC_DEC set it is post
95 | ///< inc-/decrement otherwise pre inc-/decrement
96 | uint8_t flags; ///< 8-bit flags (see above)
97 | } m680x_op_idx;
98 |
99 | /// Instruction's memory operand referring to relative addressing (Bcc/LBcc)
100 | typedef struct m680x_op_rel {
101 | uint16_t address; ///< The absolute address.
102 | ///< calculated as PC + offset. PC is the first
103 | ///< address after the instruction.
104 | int16_t offset; ///< the offset/displacement value
105 | } m680x_op_rel;
106 |
107 | /// Instruction's operand referring to extended addressing
108 | typedef struct m680x_op_ext {
109 | uint16_t address; ///< The absolute address
110 | bool indirect; ///< true if extended indirect addressing
111 | } m680x_op_ext;
112 |
113 | /// Instruction operand
114 | typedef struct cs_m680x_op {
115 | m680x_op_type type;
116 | union {
117 | int32_t imm; ///< immediate value for IMM operand
118 | m680x_reg reg; ///< register value for REG operand
119 | m680x_op_idx idx; ///< Indexed addressing operand
120 | m680x_op_rel rel; ///< Relative address. operand (Bcc/LBcc)
121 | m680x_op_ext ext; ///< Extended address
122 | uint8_t direct_addr; ///< Direct address (lower 8-bit)
123 | uint8_t const_val; ///< constant value (bit index, page nr.)
124 | };
125 | uint8_t size; ///< size of this operand (in bytes)
126 | /// How is this operand accessed? (READ, WRITE or READ|WRITE)
127 | /// This field is combined of cs_ac_type.
128 | /// NOTE: this field is irrelevant if engine is compiled in DIET
129 | uint8_t access;
130 | } cs_m680x_op;
131 |
132 | /// Group of M680X instructions
133 | typedef enum m680x_group_type {
134 | M680X_GRP_INVALID = 0, /// = CS_GRP_INVALID
135 | // Generic groups
136 | // all jump instructions (conditional+direct+indirect jumps)
137 | M680X_GRP_JUMP, ///< = CS_GRP_JUMP
138 | // all call instructions
139 | M680X_GRP_CALL, ///< = CS_GRP_CALL
140 | // all return instructions
141 | M680X_GRP_RET, ///< = CS_GRP_RET
142 | // all interrupt instructions (int+syscall)
143 | M680X_GRP_INT, ///< = CS_GRP_INT
144 | // all interrupt return instructions
145 | M680X_GRP_IRET, ///< = CS_GRP_IRET
146 | // all privileged instructions
147 | M680X_GRP_PRIV, ///< = CS_GRP_PRIVILEDGE; not used
148 | // all relative branching instructions
149 | M680X_GRP_BRAREL, ///< = CS_GRP_BRANCH_RELATIVE
150 |
151 | // Architecture-specific groups
152 | M680X_GRP_ENDING, // <-- mark the end of the list of groups
153 | } m680x_group_type;
154 |
155 | // M680X instruction flags:
156 |
157 | /// The first (register) operand is part of the
158 | /// instruction mnemonic
159 | #define M680X_FIRST_OP_IN_MNEM 1
160 | /// The second (register) operand is part of the
161 | /// instruction mnemonic
162 | #define M680X_SECOND_OP_IN_MNEM 2
163 |
164 | /// The M680X instruction and it's operands
165 | typedef struct cs_m680x {
166 | uint8_t flags; ///< See: M680X instruction flags
167 | uint8_t op_count; ///< number of operands for the instruction or 0
168 | cs_m680x_op operands[M680X_OPERAND_COUNT]; ///< operands for this insn.
169 | } cs_m680x;
170 |
171 | /// M680X instruction IDs
172 | typedef enum m680x_insn {
173 | M680X_INS_INVLD = 0,
174 | M680X_INS_ABA, ///< M6800/1/2/3
175 | M680X_INS_ABX,
176 | M680X_INS_ABY,
177 | M680X_INS_ADC,
178 | M680X_INS_ADCA,
179 | M680X_INS_ADCB,
180 | M680X_INS_ADCD,
181 | M680X_INS_ADCR,
182 | M680X_INS_ADD,
183 | M680X_INS_ADDA,
184 | M680X_INS_ADDB,
185 | M680X_INS_ADDD,
186 | M680X_INS_ADDE,
187 | M680X_INS_ADDF,
188 | M680X_INS_ADDR,
189 | M680X_INS_ADDW,
190 | M680X_INS_AIM,
191 | M680X_INS_AIS,
192 | M680X_INS_AIX,
193 | M680X_INS_AND,
194 | M680X_INS_ANDA,
195 | M680X_INS_ANDB,
196 | M680X_INS_ANDCC,
197 | M680X_INS_ANDD,
198 | M680X_INS_ANDR,
199 | M680X_INS_ASL,
200 | M680X_INS_ASLA,
201 | M680X_INS_ASLB,
202 | M680X_INS_ASLD, ///< or LSLD
203 | M680X_INS_ASR,
204 | M680X_INS_ASRA,
205 | M680X_INS_ASRB,
206 | M680X_INS_ASRD,
207 | M680X_INS_ASRX,
208 | M680X_INS_BAND,
209 | M680X_INS_BCC, ///< or BHS
210 | M680X_INS_BCLR,
211 | M680X_INS_BCS, ///< or BLO
212 | M680X_INS_BEOR,
213 | M680X_INS_BEQ,
214 | M680X_INS_BGE,
215 | M680X_INS_BGND,
216 | M680X_INS_BGT,
217 | M680X_INS_BHCC,
218 | M680X_INS_BHCS,
219 | M680X_INS_BHI,
220 | M680X_INS_BIAND,
221 | M680X_INS_BIEOR,
222 | M680X_INS_BIH,
223 | M680X_INS_BIL,
224 | M680X_INS_BIOR,
225 | M680X_INS_BIT,
226 | M680X_INS_BITA,
227 | M680X_INS_BITB,
228 | M680X_INS_BITD,
229 | M680X_INS_BITMD,
230 | M680X_INS_BLE,
231 | M680X_INS_BLS,
232 | M680X_INS_BLT,
233 | M680X_INS_BMC,
234 | M680X_INS_BMI,
235 | M680X_INS_BMS,
236 | M680X_INS_BNE,
237 | M680X_INS_BOR,
238 | M680X_INS_BPL,
239 | M680X_INS_BRCLR,
240 | M680X_INS_BRSET,
241 | M680X_INS_BRA,
242 | M680X_INS_BRN,
243 | M680X_INS_BSET,
244 | M680X_INS_BSR,
245 | M680X_INS_BVC,
246 | M680X_INS_BVS,
247 | M680X_INS_CALL,
248 | M680X_INS_CBA, ///< M6800/1/2/3
249 | M680X_INS_CBEQ,
250 | M680X_INS_CBEQA,
251 | M680X_INS_CBEQX,
252 | M680X_INS_CLC, ///< M6800/1/2/3
253 | M680X_INS_CLI, ///< M6800/1/2/3
254 | M680X_INS_CLR,
255 | M680X_INS_CLRA,
256 | M680X_INS_CLRB,
257 | M680X_INS_CLRD,
258 | M680X_INS_CLRE,
259 | M680X_INS_CLRF,
260 | M680X_INS_CLRH,
261 | M680X_INS_CLRW,
262 | M680X_INS_CLRX,
263 | M680X_INS_CLV, ///< M6800/1/2/3
264 | M680X_INS_CMP,
265 | M680X_INS_CMPA,
266 | M680X_INS_CMPB,
267 | M680X_INS_CMPD,
268 | M680X_INS_CMPE,
269 | M680X_INS_CMPF,
270 | M680X_INS_CMPR,
271 | M680X_INS_CMPS,
272 | M680X_INS_CMPU,
273 | M680X_INS_CMPW,
274 | M680X_INS_CMPX,
275 | M680X_INS_CMPY,
276 | M680X_INS_COM,
277 | M680X_INS_COMA,
278 | M680X_INS_COMB,
279 | M680X_INS_COMD,
280 | M680X_INS_COME,
281 | M680X_INS_COMF,
282 | M680X_INS_COMW,
283 | M680X_INS_COMX,
284 | M680X_INS_CPD,
285 | M680X_INS_CPHX,
286 | M680X_INS_CPS,
287 | M680X_INS_CPX, ///< M6800/1/2/3
288 | M680X_INS_CPY,
289 | M680X_INS_CWAI,
290 | M680X_INS_DAA,
291 | M680X_INS_DBEQ,
292 | M680X_INS_DBNE,
293 | M680X_INS_DBNZ,
294 | M680X_INS_DBNZA,
295 | M680X_INS_DBNZX,
296 | M680X_INS_DEC,
297 | M680X_INS_DECA,
298 | M680X_INS_DECB,
299 | M680X_INS_DECD,
300 | M680X_INS_DECE,
301 | M680X_INS_DECF,
302 | M680X_INS_DECW,
303 | M680X_INS_DECX,
304 | M680X_INS_DES, ///< M6800/1/2/3
305 | M680X_INS_DEX, ///< M6800/1/2/3
306 | M680X_INS_DEY,
307 | M680X_INS_DIV,
308 | M680X_INS_DIVD,
309 | M680X_INS_DIVQ,
310 | M680X_INS_EDIV,
311 | M680X_INS_EDIVS,
312 | M680X_INS_EIM,
313 | M680X_INS_EMACS,
314 | M680X_INS_EMAXD,
315 | M680X_INS_EMAXM,
316 | M680X_INS_EMIND,
317 | M680X_INS_EMINM,
318 | M680X_INS_EMUL,
319 | M680X_INS_EMULS,
320 | M680X_INS_EOR,
321 | M680X_INS_EORA,
322 | M680X_INS_EORB,
323 | M680X_INS_EORD,
324 | M680X_INS_EORR,
325 | M680X_INS_ETBL,
326 | M680X_INS_EXG,
327 | M680X_INS_FDIV,
328 | M680X_INS_IBEQ,
329 | M680X_INS_IBNE,
330 | M680X_INS_IDIV,
331 | M680X_INS_IDIVS,
332 | M680X_INS_ILLGL,
333 | M680X_INS_INC,
334 | M680X_INS_INCA,
335 | M680X_INS_INCB,
336 | M680X_INS_INCD,
337 | M680X_INS_INCE,
338 | M680X_INS_INCF,
339 | M680X_INS_INCW,
340 | M680X_INS_INCX,
341 | M680X_INS_INS, ///< M6800/1/2/3
342 | M680X_INS_INX, ///< M6800/1/2/3
343 | M680X_INS_INY,
344 | M680X_INS_JMP,
345 | M680X_INS_JSR,
346 | M680X_INS_LBCC, ///< or LBHS
347 | M680X_INS_LBCS, ///< or LBLO
348 | M680X_INS_LBEQ,
349 | M680X_INS_LBGE,
350 | M680X_INS_LBGT,
351 | M680X_INS_LBHI,
352 | M680X_INS_LBLE,
353 | M680X_INS_LBLS,
354 | M680X_INS_LBLT,
355 | M680X_INS_LBMI,
356 | M680X_INS_LBNE,
357 | M680X_INS_LBPL,
358 | M680X_INS_LBRA,
359 | M680X_INS_LBRN,
360 | M680X_INS_LBSR,
361 | M680X_INS_LBVC,
362 | M680X_INS_LBVS,
363 | M680X_INS_LDA,
364 | M680X_INS_LDAA, ///< M6800/1/2/3
365 | M680X_INS_LDAB, ///< M6800/1/2/3
366 | M680X_INS_LDB,
367 | M680X_INS_LDBT,
368 | M680X_INS_LDD,
369 | M680X_INS_LDE,
370 | M680X_INS_LDF,
371 | M680X_INS_LDHX,
372 | M680X_INS_LDMD,
373 | M680X_INS_LDQ,
374 | M680X_INS_LDS,
375 | M680X_INS_LDU,
376 | M680X_INS_LDW,
377 | M680X_INS_LDX,
378 | M680X_INS_LDY,
379 | M680X_INS_LEAS,
380 | M680X_INS_LEAU,
381 | M680X_INS_LEAX,
382 | M680X_INS_LEAY,
383 | M680X_INS_LSL,
384 | M680X_INS_LSLA,
385 | M680X_INS_LSLB,
386 | M680X_INS_LSLD,
387 | M680X_INS_LSLX,
388 | M680X_INS_LSR,
389 | M680X_INS_LSRA,
390 | M680X_INS_LSRB,
391 | M680X_INS_LSRD, ///< or ASRD
392 | M680X_INS_LSRW,
393 | M680X_INS_LSRX,
394 | M680X_INS_MAXA,
395 | M680X_INS_MAXM,
396 | M680X_INS_MEM,
397 | M680X_INS_MINA,
398 | M680X_INS_MINM,
399 | M680X_INS_MOV,
400 | M680X_INS_MOVB,
401 | M680X_INS_MOVW,
402 | M680X_INS_MUL,
403 | M680X_INS_MULD,
404 | M680X_INS_NEG,
405 | M680X_INS_NEGA,
406 | M680X_INS_NEGB,
407 | M680X_INS_NEGD,
408 | M680X_INS_NEGX,
409 | M680X_INS_NOP,
410 | M680X_INS_NSA,
411 | M680X_INS_OIM,
412 | M680X_INS_ORA,
413 | M680X_INS_ORAA, ///< M6800/1/2/3
414 | M680X_INS_ORAB, ///< M6800/1/2/3
415 | M680X_INS_ORB,
416 | M680X_INS_ORCC,
417 | M680X_INS_ORD,
418 | M680X_INS_ORR,
419 | M680X_INS_PSHA, ///< M6800/1/2/3
420 | M680X_INS_PSHB, ///< M6800/1/2/3
421 | M680X_INS_PSHC,
422 | M680X_INS_PSHD,
423 | M680X_INS_PSHH,
424 | M680X_INS_PSHS,
425 | M680X_INS_PSHSW,
426 | M680X_INS_PSHU,
427 | M680X_INS_PSHUW,
428 | M680X_INS_PSHX, ///< M6800/1/2/3
429 | M680X_INS_PSHY,
430 | M680X_INS_PULA, ///< M6800/1/2/3
431 | M680X_INS_PULB, ///< M6800/1/2/3
432 | M680X_INS_PULC,
433 | M680X_INS_PULD,
434 | M680X_INS_PULH,
435 | M680X_INS_PULS,
436 | M680X_INS_PULSW,
437 | M680X_INS_PULU,
438 | M680X_INS_PULUW,
439 | M680X_INS_PULX, ///< M6800/1/2/3
440 | M680X_INS_PULY,
441 | M680X_INS_REV,
442 | M680X_INS_REVW,
443 | M680X_INS_ROL,
444 | M680X_INS_ROLA,
445 | M680X_INS_ROLB,
446 | M680X_INS_ROLD,
447 | M680X_INS_ROLW,
448 | M680X_INS_ROLX,
449 | M680X_INS_ROR,
450 | M680X_INS_RORA,
451 | M680X_INS_RORB,
452 | M680X_INS_RORD,
453 | M680X_INS_RORW,
454 | M680X_INS_RORX,
455 | M680X_INS_RSP,
456 | M680X_INS_RTC,
457 | M680X_INS_RTI,
458 | M680X_INS_RTS,
459 | M680X_INS_SBA, ///< M6800/1/2/3
460 | M680X_INS_SBC,
461 | M680X_INS_SBCA,
462 | M680X_INS_SBCB,
463 | M680X_INS_SBCD,
464 | M680X_INS_SBCR,
465 | M680X_INS_SEC,
466 | M680X_INS_SEI,
467 | M680X_INS_SEV,
468 | M680X_INS_SEX,
469 | M680X_INS_SEXW,
470 | M680X_INS_SLP,
471 | M680X_INS_STA,
472 | M680X_INS_STAA, ///< M6800/1/2/3
473 | M680X_INS_STAB, ///< M6800/1/2/3
474 | M680X_INS_STB,
475 | M680X_INS_STBT,
476 | M680X_INS_STD,
477 | M680X_INS_STE,
478 | M680X_INS_STF,
479 | M680X_INS_STOP,
480 | M680X_INS_STHX,
481 | M680X_INS_STQ,
482 | M680X_INS_STS,
483 | M680X_INS_STU,
484 | M680X_INS_STW,
485 | M680X_INS_STX,
486 | M680X_INS_STY,
487 | M680X_INS_SUB,
488 | M680X_INS_SUBA,
489 | M680X_INS_SUBB,
490 | M680X_INS_SUBD,
491 | M680X_INS_SUBE,
492 | M680X_INS_SUBF,
493 | M680X_INS_SUBR,
494 | M680X_INS_SUBW,
495 | M680X_INS_SWI,
496 | M680X_INS_SWI2,
497 | M680X_INS_SWI3,
498 | M680X_INS_SYNC,
499 | M680X_INS_TAB, ///< M6800/1/2/3
500 | M680X_INS_TAP, ///< M6800/1/2/3
501 | M680X_INS_TAX,
502 | M680X_INS_TBA, ///< M6800/1/2/3
503 | M680X_INS_TBEQ,
504 | M680X_INS_TBL,
505 | M680X_INS_TBNE,
506 | M680X_INS_TEST,
507 | M680X_INS_TFM,
508 | M680X_INS_TFR,
509 | M680X_INS_TIM,
510 | M680X_INS_TPA, ///< M6800/1/2/3
511 | M680X_INS_TST,
512 | M680X_INS_TSTA,
513 | M680X_INS_TSTB,
514 | M680X_INS_TSTD,
515 | M680X_INS_TSTE,
516 | M680X_INS_TSTF,
517 | M680X_INS_TSTW,
518 | M680X_INS_TSTX,
519 | M680X_INS_TSX, ///< M6800/1/2/3
520 | M680X_INS_TSY,
521 | M680X_INS_TXA,
522 | M680X_INS_TXS, ///< M6800/1/2/3
523 | M680X_INS_TYS,
524 | M680X_INS_WAI, ///< M6800/1/2/3
525 | M680X_INS_WAIT,
526 | M680X_INS_WAV,
527 | M680X_INS_WAVR,
528 | M680X_INS_XGDX, ///< HD6301
529 | M680X_INS_XGDY,
530 | M680X_INS_ENDING, // <-- mark the end of the list of instructions
531 | } m680x_insn;
532 |
533 | #ifdef __cplusplus
534 | }
535 | #endif
536 |
537 | #endif
538 |
--------------------------------------------------------------------------------
/EDUReViver/include/capstone/m68k.h:
--------------------------------------------------------------------------------
1 | #ifndef CAPSTONE_M68K_H
2 | #define CAPSTONE_M68K_H
3 |
4 | /* Capstone Disassembly Engine */
5 | /* By Daniel Collin , 2015-2016 */
6 |
7 | #ifdef __cplusplus
8 | extern "C" {
9 | #endif
10 |
11 | #include "platform.h"
12 |
13 | #ifdef _MSC_VER
14 | #pragma warning(disable:4201)
15 | #endif
16 |
17 | #define M68K_OPERAND_COUNT 4
18 |
19 | /// M68K registers and special registers
20 | typedef enum m68k_reg {
21 | M68K_REG_INVALID = 0,
22 |
23 | M68K_REG_D0,
24 | M68K_REG_D1,
25 | M68K_REG_D2,
26 | M68K_REG_D3,
27 | M68K_REG_D4,
28 | M68K_REG_D5,
29 | M68K_REG_D6,
30 | M68K_REG_D7,
31 |
32 | M68K_REG_A0,
33 | M68K_REG_A1,
34 | M68K_REG_A2,
35 | M68K_REG_A3,
36 | M68K_REG_A4,
37 | M68K_REG_A5,
38 | M68K_REG_A6,
39 | M68K_REG_A7,
40 |
41 | M68K_REG_FP0,
42 | M68K_REG_FP1,
43 | M68K_REG_FP2,
44 | M68K_REG_FP3,
45 | M68K_REG_FP4,
46 | M68K_REG_FP5,
47 | M68K_REG_FP6,
48 | M68K_REG_FP7,
49 |
50 | M68K_REG_PC,
51 |
52 | M68K_REG_SR,
53 | M68K_REG_CCR,
54 | M68K_REG_SFC,
55 | M68K_REG_DFC,
56 | M68K_REG_USP,
57 | M68K_REG_VBR,
58 | M68K_REG_CACR,
59 | M68K_REG_CAAR,
60 | M68K_REG_MSP,
61 | M68K_REG_ISP,
62 | M68K_REG_TC,
63 | M68K_REG_ITT0,
64 | M68K_REG_ITT1,
65 | M68K_REG_DTT0,
66 | M68K_REG_DTT1,
67 | M68K_REG_MMUSR,
68 | M68K_REG_URP,
69 | M68K_REG_SRP,
70 |
71 | M68K_REG_FPCR,
72 | M68K_REG_FPSR,
73 | M68K_REG_FPIAR,
74 |
75 | M68K_REG_ENDING, // <-- mark the end of the list of registers
76 | } m68k_reg;
77 |
78 | /// M68K Addressing Modes
79 | typedef enum m68k_address_mode {
80 | M68K_AM_NONE = 0, ///< No address mode.
81 |
82 | M68K_AM_REG_DIRECT_DATA, ///< Register Direct - Data
83 | M68K_AM_REG_DIRECT_ADDR, ///< Register Direct - Address
84 |
85 | M68K_AM_REGI_ADDR, ///< Register Indirect - Address
86 | M68K_AM_REGI_ADDR_POST_INC, ///< Register Indirect - Address with Postincrement
87 | M68K_AM_REGI_ADDR_PRE_DEC, ///< Register Indirect - Address with Predecrement
88 | M68K_AM_REGI_ADDR_DISP, ///< Register Indirect - Address with Displacement
89 |
90 | M68K_AM_AREGI_INDEX_8_BIT_DISP, ///< Address Register Indirect With Index- 8-bit displacement
91 | M68K_AM_AREGI_INDEX_BASE_DISP, ///< Address Register Indirect With Index- Base displacement
92 |
93 | M68K_AM_MEMI_POST_INDEX, ///< Memory indirect - Postindex
94 | M68K_AM_MEMI_PRE_INDEX, ///< Memory indirect - Preindex
95 |
96 | M68K_AM_PCI_DISP, ///< Program Counter Indirect - with Displacement
97 |
98 | M68K_AM_PCI_INDEX_8_BIT_DISP, ///< Program Counter Indirect with Index - with 8-Bit Displacement
99 | M68K_AM_PCI_INDEX_BASE_DISP, ///< Program Counter Indirect with Index - with Base Displacement
100 |
101 | M68K_AM_PC_MEMI_POST_INDEX, ///< Program Counter Memory Indirect - Postindexed
102 | M68K_AM_PC_MEMI_PRE_INDEX, ///< Program Counter Memory Indirect - Preindexed
103 |
104 | M68K_AM_ABSOLUTE_DATA_SHORT, ///< Absolute Data Addressing - Short
105 | M68K_AM_ABSOLUTE_DATA_LONG, ///< Absolute Data Addressing - Long
106 | M68K_AM_IMMEDIATE, ///< Immediate value
107 |
108 | M68K_AM_BRANCH_DISPLACEMENT, ///< Address as displacement from (PC+2) used by branches
109 | } m68k_address_mode;
110 |
111 | /// Operand type for instruction's operands
112 | typedef enum m68k_op_type {
113 | M68K_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
114 | M68K_OP_REG, ///< = CS_OP_REG (Register operand).
115 | M68K_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
116 | M68K_OP_MEM, ///< = CS_OP_MEM (Memory operand).
117 | M68K_OP_FP_SINGLE, ///< single precision Floating-Point operand
118 | M68K_OP_FP_DOUBLE, ///< double precision Floating-Point operand
119 | M68K_OP_REG_BITS, ///< Register bits move
120 | M68K_OP_REG_PAIR, ///< Register pair in the same op (upper 4 bits for first reg, lower for second)
121 | M68K_OP_BR_DISP, ///< Branch displacement
122 | } m68k_op_type;
123 |
124 | /// Instruction's operand referring to memory
125 | /// This is associated with M68K_OP_MEM operand type above
126 | typedef struct m68k_op_mem {
127 | m68k_reg base_reg; ///< base register (or M68K_REG_INVALID if irrelevant)
128 | m68k_reg index_reg; ///< index register (or M68K_REG_INVALID if irrelevant)
129 | m68k_reg in_base_reg; ///< indirect base register (or M68K_REG_INVALID if irrelevant)
130 | uint32_t in_disp; ///< indirect displacement
131 | uint32_t out_disp; ///< other displacement
132 | int16_t disp; ///< displacement value
133 | uint8_t scale; ///< scale for index register
134 | uint8_t bitfield; ///< set to true if the two values below should be used
135 | uint8_t width; ///< used for bf* instructions
136 | uint8_t offset; ///< used for bf* instructions
137 | uint8_t index_size; ///< 0 = w, 1 = l
138 | } m68k_op_mem;
139 |
140 | /// Operand type for instruction's operands
141 | typedef enum m68k_op_br_disp_size {
142 | M68K_OP_BR_DISP_SIZE_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
143 | M68K_OP_BR_DISP_SIZE_BYTE = 1, ///< signed 8-bit displacement
144 | M68K_OP_BR_DISP_SIZE_WORD = 2, ///< signed 16-bit displacement
145 | M68K_OP_BR_DISP_SIZE_LONG = 4, ///< signed 32-bit displacement
146 | } m68k_op_br_disp_size;
147 |
148 | typedef struct m68k_op_br_disp {
149 | int32_t disp; ///< displacement value
150 | uint8_t disp_size; ///< Size from m68k_op_br_disp_size type above
151 | } m68k_op_br_disp;
152 |
153 | /// Instruction operand
154 | typedef struct cs_m68k_op {
155 | union {
156 | uint64_t imm; ///< immediate value for IMM operand
157 | double dimm; ///< double imm
158 | float simm; ///< float imm
159 | m68k_reg reg; ///< register value for REG operand
160 | struct { ///< register pair in one operand
161 | m68k_reg reg_0;
162 | m68k_reg reg_1;
163 | } reg_pair;
164 | };
165 |
166 | m68k_op_mem mem; ///< data when operand is targeting memory
167 | m68k_op_br_disp br_disp; ///< data when operand is a branch displacement
168 | uint32_t register_bits; ///< register bits for movem etc. (always in d0-d7, a0-a7, fp0 - fp7 order)
169 | m68k_op_type type;
170 | m68k_address_mode address_mode; ///< M68K addressing mode for this op
171 | } cs_m68k_op;
172 |
173 | /// Operation size of the CPU instructions
174 | typedef enum m68k_cpu_size {
175 | M68K_CPU_SIZE_NONE = 0, ///< unsized or unspecified
176 | M68K_CPU_SIZE_BYTE = 1, ///< 1 byte in size
177 | M68K_CPU_SIZE_WORD = 2, ///< 2 bytes in size
178 | M68K_CPU_SIZE_LONG = 4, ///< 4 bytes in size
179 | } m68k_cpu_size;
180 |
181 | /// Operation size of the FPU instructions (Notice that FPU instruction can also use CPU sizes if needed)
182 | typedef enum m68k_fpu_size {
183 | M68K_FPU_SIZE_NONE = 0, ///< unsized like fsave/frestore
184 | M68K_FPU_SIZE_SINGLE = 4, ///< 4 byte in size (single float)
185 | M68K_FPU_SIZE_DOUBLE = 8, ///< 8 byte in size (double)
186 | M68K_FPU_SIZE_EXTENDED = 12, ///< 12 byte in size (extended real format)
187 | } m68k_fpu_size;
188 |
189 | /// Type of size that is being used for the current instruction
190 | typedef enum m68k_size_type {
191 | M68K_SIZE_TYPE_INVALID = 0,
192 |
193 | M68K_SIZE_TYPE_CPU,
194 | M68K_SIZE_TYPE_FPU,
195 | } m68k_size_type;
196 |
197 | /// Operation size of the current instruction (NOT the actually size of instruction)
198 | typedef struct m68k_op_size {
199 | m68k_size_type type;
200 | union {
201 | m68k_cpu_size cpu_size;
202 | m68k_fpu_size fpu_size;
203 | };
204 | } m68k_op_size;
205 |
206 | /// The M68K instruction and it's operands
207 | typedef struct cs_m68k {
208 | // Number of operands of this instruction or 0 when instruction has no operand.
209 | cs_m68k_op operands[M68K_OPERAND_COUNT]; ///< operands for this instruction.
210 | m68k_op_size op_size; ///< size of data operand works on in bytes (.b, .w, .l, etc)
211 | uint8_t op_count; ///< number of operands for the instruction
212 | } cs_m68k;
213 |
214 | /// M68K instruction
215 | typedef enum m68k_insn {
216 | M68K_INS_INVALID = 0,
217 |
218 | M68K_INS_ABCD,
219 | M68K_INS_ADD,
220 | M68K_INS_ADDA,
221 | M68K_INS_ADDI,
222 | M68K_INS_ADDQ,
223 | M68K_INS_ADDX,
224 | M68K_INS_AND,
225 | M68K_INS_ANDI,
226 | M68K_INS_ASL,
227 | M68K_INS_ASR,
228 | M68K_INS_BHS,
229 | M68K_INS_BLO,
230 | M68K_INS_BHI,
231 | M68K_INS_BLS,
232 | M68K_INS_BCC,
233 | M68K_INS_BCS,
234 | M68K_INS_BNE,
235 | M68K_INS_BEQ,
236 | M68K_INS_BVC,
237 | M68K_INS_BVS,
238 | M68K_INS_BPL,
239 | M68K_INS_BMI,
240 | M68K_INS_BGE,
241 | M68K_INS_BLT,
242 | M68K_INS_BGT,
243 | M68K_INS_BLE,
244 | M68K_INS_BRA,
245 | M68K_INS_BSR,
246 | M68K_INS_BCHG,
247 | M68K_INS_BCLR,
248 | M68K_INS_BSET,
249 | M68K_INS_BTST,
250 | M68K_INS_BFCHG,
251 | M68K_INS_BFCLR,
252 | M68K_INS_BFEXTS,
253 | M68K_INS_BFEXTU,
254 | M68K_INS_BFFFO,
255 | M68K_INS_BFINS,
256 | M68K_INS_BFSET,
257 | M68K_INS_BFTST,
258 | M68K_INS_BKPT,
259 | M68K_INS_CALLM,
260 | M68K_INS_CAS,
261 | M68K_INS_CAS2,
262 | M68K_INS_CHK,
263 | M68K_INS_CHK2,
264 | M68K_INS_CLR,
265 | M68K_INS_CMP,
266 | M68K_INS_CMPA,
267 | M68K_INS_CMPI,
268 | M68K_INS_CMPM,
269 | M68K_INS_CMP2,
270 | M68K_INS_CINVL,
271 | M68K_INS_CINVP,
272 | M68K_INS_CINVA,
273 | M68K_INS_CPUSHL,
274 | M68K_INS_CPUSHP,
275 | M68K_INS_CPUSHA,
276 | M68K_INS_DBT,
277 | M68K_INS_DBF,
278 | M68K_INS_DBHI,
279 | M68K_INS_DBLS,
280 | M68K_INS_DBCC,
281 | M68K_INS_DBCS,
282 | M68K_INS_DBNE,
283 | M68K_INS_DBEQ,
284 | M68K_INS_DBVC,
285 | M68K_INS_DBVS,
286 | M68K_INS_DBPL,
287 | M68K_INS_DBMI,
288 | M68K_INS_DBGE,
289 | M68K_INS_DBLT,
290 | M68K_INS_DBGT,
291 | M68K_INS_DBLE,
292 | M68K_INS_DBRA,
293 | M68K_INS_DIVS,
294 | M68K_INS_DIVSL,
295 | M68K_INS_DIVU,
296 | M68K_INS_DIVUL,
297 | M68K_INS_EOR,
298 | M68K_INS_EORI,
299 | M68K_INS_EXG,
300 | M68K_INS_EXT,
301 | M68K_INS_EXTB,
302 | M68K_INS_FABS,
303 | M68K_INS_FSABS,
304 | M68K_INS_FDABS,
305 | M68K_INS_FACOS,
306 | M68K_INS_FADD,
307 | M68K_INS_FSADD,
308 | M68K_INS_FDADD,
309 | M68K_INS_FASIN,
310 | M68K_INS_FATAN,
311 | M68K_INS_FATANH,
312 | M68K_INS_FBF,
313 | M68K_INS_FBEQ,
314 | M68K_INS_FBOGT,
315 | M68K_INS_FBOGE,
316 | M68K_INS_FBOLT,
317 | M68K_INS_FBOLE,
318 | M68K_INS_FBOGL,
319 | M68K_INS_FBOR,
320 | M68K_INS_FBUN,
321 | M68K_INS_FBUEQ,
322 | M68K_INS_FBUGT,
323 | M68K_INS_FBUGE,
324 | M68K_INS_FBULT,
325 | M68K_INS_FBULE,
326 | M68K_INS_FBNE,
327 | M68K_INS_FBT,
328 | M68K_INS_FBSF,
329 | M68K_INS_FBSEQ,
330 | M68K_INS_FBGT,
331 | M68K_INS_FBGE,
332 | M68K_INS_FBLT,
333 | M68K_INS_FBLE,
334 | M68K_INS_FBGL,
335 | M68K_INS_FBGLE,
336 | M68K_INS_FBNGLE,
337 | M68K_INS_FBNGL,
338 | M68K_INS_FBNLE,
339 | M68K_INS_FBNLT,
340 | M68K_INS_FBNGE,
341 | M68K_INS_FBNGT,
342 | M68K_INS_FBSNE,
343 | M68K_INS_FBST,
344 | M68K_INS_FCMP,
345 | M68K_INS_FCOS,
346 | M68K_INS_FCOSH,
347 | M68K_INS_FDBF,
348 | M68K_INS_FDBEQ,
349 | M68K_INS_FDBOGT,
350 | M68K_INS_FDBOGE,
351 | M68K_INS_FDBOLT,
352 | M68K_INS_FDBOLE,
353 | M68K_INS_FDBOGL,
354 | M68K_INS_FDBOR,
355 | M68K_INS_FDBUN,
356 | M68K_INS_FDBUEQ,
357 | M68K_INS_FDBUGT,
358 | M68K_INS_FDBUGE,
359 | M68K_INS_FDBULT,
360 | M68K_INS_FDBULE,
361 | M68K_INS_FDBNE,
362 | M68K_INS_FDBT,
363 | M68K_INS_FDBSF,
364 | M68K_INS_FDBSEQ,
365 | M68K_INS_FDBGT,
366 | M68K_INS_FDBGE,
367 | M68K_INS_FDBLT,
368 | M68K_INS_FDBLE,
369 | M68K_INS_FDBGL,
370 | M68K_INS_FDBGLE,
371 | M68K_INS_FDBNGLE,
372 | M68K_INS_FDBNGL,
373 | M68K_INS_FDBNLE,
374 | M68K_INS_FDBNLT,
375 | M68K_INS_FDBNGE,
376 | M68K_INS_FDBNGT,
377 | M68K_INS_FDBSNE,
378 | M68K_INS_FDBST,
379 | M68K_INS_FDIV,
380 | M68K_INS_FSDIV,
381 | M68K_INS_FDDIV,
382 | M68K_INS_FETOX,
383 | M68K_INS_FETOXM1,
384 | M68K_INS_FGETEXP,
385 | M68K_INS_FGETMAN,
386 | M68K_INS_FINT,
387 | M68K_INS_FINTRZ,
388 | M68K_INS_FLOG10,
389 | M68K_INS_FLOG2,
390 | M68K_INS_FLOGN,
391 | M68K_INS_FLOGNP1,
392 | M68K_INS_FMOD,
393 | M68K_INS_FMOVE,
394 | M68K_INS_FSMOVE,
395 | M68K_INS_FDMOVE,
396 | M68K_INS_FMOVECR,
397 | M68K_INS_FMOVEM,
398 | M68K_INS_FMUL,
399 | M68K_INS_FSMUL,
400 | M68K_INS_FDMUL,
401 | M68K_INS_FNEG,
402 | M68K_INS_FSNEG,
403 | M68K_INS_FDNEG,
404 | M68K_INS_FNOP,
405 | M68K_INS_FREM,
406 | M68K_INS_FRESTORE,
407 | M68K_INS_FSAVE,
408 | M68K_INS_FSCALE,
409 | M68K_INS_FSGLDIV,
410 | M68K_INS_FSGLMUL,
411 | M68K_INS_FSIN,
412 | M68K_INS_FSINCOS,
413 | M68K_INS_FSINH,
414 | M68K_INS_FSQRT,
415 | M68K_INS_FSSQRT,
416 | M68K_INS_FDSQRT,
417 | M68K_INS_FSF,
418 | M68K_INS_FSBEQ,
419 | M68K_INS_FSOGT,
420 | M68K_INS_FSOGE,
421 | M68K_INS_FSOLT,
422 | M68K_INS_FSOLE,
423 | M68K_INS_FSOGL,
424 | M68K_INS_FSOR,
425 | M68K_INS_FSUN,
426 | M68K_INS_FSUEQ,
427 | M68K_INS_FSUGT,
428 | M68K_INS_FSUGE,
429 | M68K_INS_FSULT,
430 | M68K_INS_FSULE,
431 | M68K_INS_FSNE,
432 | M68K_INS_FST,
433 | M68K_INS_FSSF,
434 | M68K_INS_FSSEQ,
435 | M68K_INS_FSGT,
436 | M68K_INS_FSGE,
437 | M68K_INS_FSLT,
438 | M68K_INS_FSLE,
439 | M68K_INS_FSGL,
440 | M68K_INS_FSGLE,
441 | M68K_INS_FSNGLE,
442 | M68K_INS_FSNGL,
443 | M68K_INS_FSNLE,
444 | M68K_INS_FSNLT,
445 | M68K_INS_FSNGE,
446 | M68K_INS_FSNGT,
447 | M68K_INS_FSSNE,
448 | M68K_INS_FSST,
449 | M68K_INS_FSUB,
450 | M68K_INS_FSSUB,
451 | M68K_INS_FDSUB,
452 | M68K_INS_FTAN,
453 | M68K_INS_FTANH,
454 | M68K_INS_FTENTOX,
455 | M68K_INS_FTRAPF,
456 | M68K_INS_FTRAPEQ,
457 | M68K_INS_FTRAPOGT,
458 | M68K_INS_FTRAPOGE,
459 | M68K_INS_FTRAPOLT,
460 | M68K_INS_FTRAPOLE,
461 | M68K_INS_FTRAPOGL,
462 | M68K_INS_FTRAPOR,
463 | M68K_INS_FTRAPUN,
464 | M68K_INS_FTRAPUEQ,
465 | M68K_INS_FTRAPUGT,
466 | M68K_INS_FTRAPUGE,
467 | M68K_INS_FTRAPULT,
468 | M68K_INS_FTRAPULE,
469 | M68K_INS_FTRAPNE,
470 | M68K_INS_FTRAPT,
471 | M68K_INS_FTRAPSF,
472 | M68K_INS_FTRAPSEQ,
473 | M68K_INS_FTRAPGT,
474 | M68K_INS_FTRAPGE,
475 | M68K_INS_FTRAPLT,
476 | M68K_INS_FTRAPLE,
477 | M68K_INS_FTRAPGL,
478 | M68K_INS_FTRAPGLE,
479 | M68K_INS_FTRAPNGLE,
480 | M68K_INS_FTRAPNGL,
481 | M68K_INS_FTRAPNLE,
482 | M68K_INS_FTRAPNLT,
483 | M68K_INS_FTRAPNGE,
484 | M68K_INS_FTRAPNGT,
485 | M68K_INS_FTRAPSNE,
486 | M68K_INS_FTRAPST,
487 | M68K_INS_FTST,
488 | M68K_INS_FTWOTOX,
489 | M68K_INS_HALT,
490 | M68K_INS_ILLEGAL,
491 | M68K_INS_JMP,
492 | M68K_INS_JSR,
493 | M68K_INS_LEA,
494 | M68K_INS_LINK,
495 | M68K_INS_LPSTOP,
496 | M68K_INS_LSL,
497 | M68K_INS_LSR,
498 | M68K_INS_MOVE,
499 | M68K_INS_MOVEA,
500 | M68K_INS_MOVEC,
501 | M68K_INS_MOVEM,
502 | M68K_INS_MOVEP,
503 | M68K_INS_MOVEQ,
504 | M68K_INS_MOVES,
505 | M68K_INS_MOVE16,
506 | M68K_INS_MULS,
507 | M68K_INS_MULU,
508 | M68K_INS_NBCD,
509 | M68K_INS_NEG,
510 | M68K_INS_NEGX,
511 | M68K_INS_NOP,
512 | M68K_INS_NOT,
513 | M68K_INS_OR,
514 | M68K_INS_ORI,
515 | M68K_INS_PACK,
516 | M68K_INS_PEA,
517 | M68K_INS_PFLUSH,
518 | M68K_INS_PFLUSHA,
519 | M68K_INS_PFLUSHAN,
520 | M68K_INS_PFLUSHN,
521 | M68K_INS_PLOADR,
522 | M68K_INS_PLOADW,
523 | M68K_INS_PLPAR,
524 | M68K_INS_PLPAW,
525 | M68K_INS_PMOVE,
526 | M68K_INS_PMOVEFD,
527 | M68K_INS_PTESTR,
528 | M68K_INS_PTESTW,
529 | M68K_INS_PULSE,
530 | M68K_INS_REMS,
531 | M68K_INS_REMU,
532 | M68K_INS_RESET,
533 | M68K_INS_ROL,
534 | M68K_INS_ROR,
535 | M68K_INS_ROXL,
536 | M68K_INS_ROXR,
537 | M68K_INS_RTD,
538 | M68K_INS_RTE,
539 | M68K_INS_RTM,
540 | M68K_INS_RTR,
541 | M68K_INS_RTS,
542 | M68K_INS_SBCD,
543 | M68K_INS_ST,
544 | M68K_INS_SF,
545 | M68K_INS_SHI,
546 | M68K_INS_SLS,
547 | M68K_INS_SCC,
548 | M68K_INS_SHS,
549 | M68K_INS_SCS,
550 | M68K_INS_SLO,
551 | M68K_INS_SNE,
552 | M68K_INS_SEQ,
553 | M68K_INS_SVC,
554 | M68K_INS_SVS,
555 | M68K_INS_SPL,
556 | M68K_INS_SMI,
557 | M68K_INS_SGE,
558 | M68K_INS_SLT,
559 | M68K_INS_SGT,
560 | M68K_INS_SLE,
561 | M68K_INS_STOP,
562 | M68K_INS_SUB,
563 | M68K_INS_SUBA,
564 | M68K_INS_SUBI,
565 | M68K_INS_SUBQ,
566 | M68K_INS_SUBX,
567 | M68K_INS_SWAP,
568 | M68K_INS_TAS,
569 | M68K_INS_TRAP,
570 | M68K_INS_TRAPV,
571 | M68K_INS_TRAPT,
572 | M68K_INS_TRAPF,
573 | M68K_INS_TRAPHI,
574 | M68K_INS_TRAPLS,
575 | M68K_INS_TRAPCC,
576 | M68K_INS_TRAPHS,
577 | M68K_INS_TRAPCS,
578 | M68K_INS_TRAPLO,
579 | M68K_INS_TRAPNE,
580 | M68K_INS_TRAPEQ,
581 | M68K_INS_TRAPVC,
582 | M68K_INS_TRAPVS,
583 | M68K_INS_TRAPPL,
584 | M68K_INS_TRAPMI,
585 | M68K_INS_TRAPGE,
586 | M68K_INS_TRAPLT,
587 | M68K_INS_TRAPGT,
588 | M68K_INS_TRAPLE,
589 | M68K_INS_TST,
590 | M68K_INS_UNLK,
591 | M68K_INS_UNPK,
592 | M68K_INS_ENDING, // <-- mark the end of the list of instructions
593 | } m68k_insn;
594 |
595 | /// Group of M68K instructions
596 | typedef enum m68k_group_type {
597 | M68K_GRP_INVALID = 0, ///< CS_GRUP_INVALID
598 | M68K_GRP_JUMP, ///< = CS_GRP_JUMP
599 | M68K_GRP_RET = 3, ///< = CS_GRP_RET
600 | M68K_GRP_IRET = 5, ///< = CS_GRP_IRET
601 | M68K_GRP_BRANCH_RELATIVE = 7, ///< = CS_GRP_BRANCH_RELATIVE
602 |
603 | M68K_GRP_ENDING,// <-- mark the end of the list of groups
604 | } m68k_group_type;
605 |
606 | #ifdef __cplusplus
607 | }
608 | #endif
609 |
610 | #endif
611 |
--------------------------------------------------------------------------------
/EDUReViver/include/capstone/platform.h:
--------------------------------------------------------------------------------
1 | /* Capstone Disassembly Engine */
2 | /* By Axel Souchet & Nguyen Anh Quynh, 2014 */
3 |
4 | #ifndef CAPSTONE_PLATFORM_H
5 | #define CAPSTONE_PLATFORM_H
6 |
7 |
8 | // handle C99 issue (for pre-2013 VisualStudio)
9 | #if !defined(__CYGWIN__) && !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64))
10 | // MSVC
11 |
12 | // stdbool.h
13 | #if (_MSC_VER < 1800) || defined(_KERNEL_MODE)
14 | // this system does not have stdbool.h
15 | #ifndef __cplusplus
16 | typedef unsigned char bool;
17 | #define false 0
18 | #define true 1
19 | #endif // __cplusplus
20 |
21 | #else
22 | // VisualStudio 2013+ -> C99 is supported
23 | #include
24 | #endif // (_MSC_VER < 1800) || defined(_KERNEL_MODE)
25 |
26 | #else
27 | // not MSVC -> C99 is supported
28 | #include
29 | #endif // !defined(__CYGWIN__) && !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64))
30 |
31 |
32 | // handle inttypes.h / stdint.h compatibility
33 | #if defined(_WIN32_WCE) && (_WIN32_WCE < 0x800)
34 | #include "windowsce/stdint.h"
35 | #endif // defined(_WIN32_WCE) && (_WIN32_WCE < 0x800)
36 |
37 | #if defined(CAPSTONE_HAS_OSXKERNEL) || (defined(_MSC_VER) && (_MSC_VER <= 1700 || defined(_KERNEL_MODE)))
38 | // this system does not have inttypes.h
39 |
40 | #if defined(_MSC_VER) && (_MSC_VER <= 1600 || defined(_KERNEL_MODE))
41 | // this system does not have stdint.h
42 | typedef signed char int8_t;
43 | typedef signed short int16_t;
44 | typedef signed int int32_t;
45 | typedef unsigned char uint8_t;
46 | typedef unsigned short uint16_t;
47 | typedef unsigned int uint32_t;
48 | typedef signed long long int64_t;
49 | typedef unsigned long long uint64_t;
50 | #endif // defined(_MSC_VER) && (_MSC_VER <= 1600 || defined(_KERNEL_MODE))
51 |
52 | #if defined(_MSC_VER) && (_MSC_VER < 1600 || defined(_KERNEL_MODE))
53 | #define INT8_MIN (-127i8 - 1)
54 | #define INT16_MIN (-32767i16 - 1)
55 | #define INT32_MIN (-2147483647i32 - 1)
56 | #define INT64_MIN (-9223372036854775807i64 - 1)
57 | #define INT8_MAX 127i8
58 | #define INT16_MAX 32767i16
59 | #define INT32_MAX 2147483647i32
60 | #define INT64_MAX 9223372036854775807i64
61 | #define UINT8_MAX 0xffui8
62 | #define UINT16_MAX 0xffffui16
63 | #define UINT32_MAX 0xffffffffui32
64 | #define UINT64_MAX 0xffffffffffffffffui64
65 | #endif // defined(_MSC_VER) && (_MSC_VER < 1600 || defined(_KERNEL_MODE))
66 |
67 | #ifdef CAPSTONE_HAS_OSXKERNEL
68 | // this system has stdint.h
69 | #include
70 | #endif
71 |
72 | #define __PRI_8_LENGTH_MODIFIER__ "hh"
73 | #define __PRI_64_LENGTH_MODIFIER__ "ll"
74 |
75 | #define PRId8 __PRI_8_LENGTH_MODIFIER__ "d"
76 | #define PRIi8 __PRI_8_LENGTH_MODIFIER__ "i"
77 | #define PRIo8 __PRI_8_LENGTH_MODIFIER__ "o"
78 | #define PRIu8 __PRI_8_LENGTH_MODIFIER__ "u"
79 | #define PRIx8 __PRI_8_LENGTH_MODIFIER__ "x"
80 | #define PRIX8 __PRI_8_LENGTH_MODIFIER__ "X"
81 |
82 | #define PRId16 "hd"
83 | #define PRIi16 "hi"
84 | #define PRIo16 "ho"
85 | #define PRIu16 "hu"
86 | #define PRIx16 "hx"
87 | #define PRIX16 "hX"
88 |
89 | #if defined(_MSC_VER) && _MSC_VER <= 1700
90 | #define PRId32 "ld"
91 | #define PRIi32 "li"
92 | #define PRIo32 "lo"
93 | #define PRIu32 "lu"
94 | #define PRIx32 "lx"
95 | #define PRIX32 "lX"
96 | #else // OSX
97 | #define PRId32 "d"
98 | #define PRIi32 "i"
99 | #define PRIo32 "o"
100 | #define PRIu32 "u"
101 | #define PRIx32 "x"
102 | #define PRIX32 "X"
103 | #endif // defined(_MSC_VER) && _MSC_VER <= 1700
104 |
105 | #if defined(_MSC_VER) && _MSC_VER <= 1700
106 | // redefine functions from inttypes.h used in cstool
107 | #define strtoull _strtoui64
108 | #endif
109 |
110 | #define PRId64 __PRI_64_LENGTH_MODIFIER__ "d"
111 | #define PRIi64 __PRI_64_LENGTH_MODIFIER__ "i"
112 | #define PRIo64 __PRI_64_LENGTH_MODIFIER__ "o"
113 | #define PRIu64 __PRI_64_LENGTH_MODIFIER__ "u"
114 | #define PRIx64 __PRI_64_LENGTH_MODIFIER__ "x"
115 | #define PRIX64 __PRI_64_LENGTH_MODIFIER__ "X"
116 |
117 | #else
118 | // this system has inttypes.h by default
119 | #include
120 | #endif // defined(CAPSTONE_HAS_OSXKERNEL) || (defined(_MSC_VER) && (_MSC_VER <= 1700 || defined(_KERNEL_MODE)))
121 |
122 | #endif
123 |
--------------------------------------------------------------------------------
/EDUReViver/include/capstone/sparc.h:
--------------------------------------------------------------------------------
1 | #ifndef CAPSTONE_SPARC_H
2 | #define CAPSTONE_SPARC_H
3 |
4 | /* Capstone Disassembly Engine */
5 | /* By Nguyen Anh Quynh , 2014-2015 */
6 |
7 | #ifdef __cplusplus
8 | extern "C" {
9 | #endif
10 |
11 | #include "platform.h"
12 |
13 | // GCC SPARC toolchain has a default macro called "sparc" which breaks
14 | // compilation
15 | #undef sparc
16 |
17 | #ifdef _MSC_VER
18 | #pragma warning(disable:4201)
19 | #endif
20 |
21 | /// Enums corresponding to Sparc condition codes, both icc's and fcc's.
22 | typedef enum sparc_cc {
23 | SPARC_CC_INVALID = 0, ///< invalid CC (default)
24 | // Integer condition codes
25 | SPARC_CC_ICC_A = 8+256, ///< Always
26 | SPARC_CC_ICC_N = 0+256, ///< Never
27 | SPARC_CC_ICC_NE = 9+256, ///< Not Equal
28 | SPARC_CC_ICC_E = 1+256, ///< Equal
29 | SPARC_CC_ICC_G = 10+256, ///< Greater
30 | SPARC_CC_ICC_LE = 2+256, ///< Less or Equal
31 | SPARC_CC_ICC_GE = 11+256, ///< Greater or Equal
32 | SPARC_CC_ICC_L = 3+256, ///< Less
33 | SPARC_CC_ICC_GU = 12+256, ///< Greater Unsigned
34 | SPARC_CC_ICC_LEU = 4+256, ///< Less or Equal Unsigned
35 | SPARC_CC_ICC_CC = 13+256, ///< Carry Clear/Great or Equal Unsigned
36 | SPARC_CC_ICC_CS = 5+256, ///< Carry Set/Less Unsigned
37 | SPARC_CC_ICC_POS = 14+256, ///< Positive
38 | SPARC_CC_ICC_NEG = 6+256, ///< Negative
39 | SPARC_CC_ICC_VC = 15+256, ///< Overflow Clear
40 | SPARC_CC_ICC_VS = 7+256, ///< Overflow Set
41 |
42 | // Floating condition codes
43 | SPARC_CC_FCC_A = 8+16+256, ///< Always
44 | SPARC_CC_FCC_N = 0+16+256, ///< Never
45 | SPARC_CC_FCC_U = 7+16+256, ///< Unordered
46 | SPARC_CC_FCC_G = 6+16+256, ///< Greater
47 | SPARC_CC_FCC_UG = 5+16+256, ///< Unordered or Greater
48 | SPARC_CC_FCC_L = 4+16+256, ///< Less
49 | SPARC_CC_FCC_UL = 3+16+256, ///< Unordered or Less
50 | SPARC_CC_FCC_LG = 2+16+256, ///< Less or Greater
51 | SPARC_CC_FCC_NE = 1+16+256, ///< Not Equal
52 | SPARC_CC_FCC_E = 9+16+256, ///< Equal
53 | SPARC_CC_FCC_UE = 10+16+256, ///< Unordered or Equal
54 | SPARC_CC_FCC_GE = 11+16+256, ///< Greater or Equal
55 | SPARC_CC_FCC_UGE = 12+16+256, ///< Unordered or Greater or Equal
56 | SPARC_CC_FCC_LE = 13+16+256, ///< Less or Equal
57 | SPARC_CC_FCC_ULE = 14+16+256, ///< Unordered or Less or Equal
58 | SPARC_CC_FCC_O = 15+16+256, ///< Ordered
59 | } sparc_cc;
60 |
61 | /// Branch hint
62 | typedef enum sparc_hint {
63 | SPARC_HINT_INVALID = 0, ///< no hint
64 | SPARC_HINT_A = 1 << 0, ///< annul delay slot instruction
65 | SPARC_HINT_PT = 1 << 1, ///< branch taken
66 | SPARC_HINT_PN = 1 << 2, ///< branch NOT taken
67 | } sparc_hint;
68 |
69 | /// Operand type for instruction's operands
70 | typedef enum sparc_op_type {
71 | SPARC_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
72 | SPARC_OP_REG, ///< = CS_OP_REG (Register operand).
73 | SPARC_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
74 | SPARC_OP_MEM, ///< = CS_OP_MEM (Memory operand).
75 | } sparc_op_type;
76 |
77 | /// SPARC registers
78 | typedef enum sparc_reg {
79 | SPARC_REG_INVALID = 0,
80 |
81 | SPARC_REG_F0,
82 | SPARC_REG_F1,
83 | SPARC_REG_F2,
84 | SPARC_REG_F3,
85 | SPARC_REG_F4,
86 | SPARC_REG_F5,
87 | SPARC_REG_F6,
88 | SPARC_REG_F7,
89 | SPARC_REG_F8,
90 | SPARC_REG_F9,
91 | SPARC_REG_F10,
92 | SPARC_REG_F11,
93 | SPARC_REG_F12,
94 | SPARC_REG_F13,
95 | SPARC_REG_F14,
96 | SPARC_REG_F15,
97 | SPARC_REG_F16,
98 | SPARC_REG_F17,
99 | SPARC_REG_F18,
100 | SPARC_REG_F19,
101 | SPARC_REG_F20,
102 | SPARC_REG_F21,
103 | SPARC_REG_F22,
104 | SPARC_REG_F23,
105 | SPARC_REG_F24,
106 | SPARC_REG_F25,
107 | SPARC_REG_F26,
108 | SPARC_REG_F27,
109 | SPARC_REG_F28,
110 | SPARC_REG_F29,
111 | SPARC_REG_F30,
112 | SPARC_REG_F31,
113 | SPARC_REG_F32,
114 | SPARC_REG_F34,
115 | SPARC_REG_F36,
116 | SPARC_REG_F38,
117 | SPARC_REG_F40,
118 | SPARC_REG_F42,
119 | SPARC_REG_F44,
120 | SPARC_REG_F46,
121 | SPARC_REG_F48,
122 | SPARC_REG_F50,
123 | SPARC_REG_F52,
124 | SPARC_REG_F54,
125 | SPARC_REG_F56,
126 | SPARC_REG_F58,
127 | SPARC_REG_F60,
128 | SPARC_REG_F62,
129 | SPARC_REG_FCC0, // Floating condition codes
130 | SPARC_REG_FCC1,
131 | SPARC_REG_FCC2,
132 | SPARC_REG_FCC3,
133 | SPARC_REG_FP,
134 | SPARC_REG_G0,
135 | SPARC_REG_G1,
136 | SPARC_REG_G2,
137 | SPARC_REG_G3,
138 | SPARC_REG_G4,
139 | SPARC_REG_G5,
140 | SPARC_REG_G6,
141 | SPARC_REG_G7,
142 | SPARC_REG_I0,
143 | SPARC_REG_I1,
144 | SPARC_REG_I2,
145 | SPARC_REG_I3,
146 | SPARC_REG_I4,
147 | SPARC_REG_I5,
148 | SPARC_REG_I7,
149 | SPARC_REG_ICC, // Integer condition codes
150 | SPARC_REG_L0,
151 | SPARC_REG_L1,
152 | SPARC_REG_L2,
153 | SPARC_REG_L3,
154 | SPARC_REG_L4,
155 | SPARC_REG_L5,
156 | SPARC_REG_L6,
157 | SPARC_REG_L7,
158 | SPARC_REG_O0,
159 | SPARC_REG_O1,
160 | SPARC_REG_O2,
161 | SPARC_REG_O3,
162 | SPARC_REG_O4,
163 | SPARC_REG_O5,
164 | SPARC_REG_O7,
165 | SPARC_REG_SP,
166 | SPARC_REG_Y,
167 |
168 | // special register
169 | SPARC_REG_XCC,
170 |
171 | SPARC_REG_ENDING, // <-- mark the end of the list of registers
172 |
173 | // extras
174 | SPARC_REG_O6 = SPARC_REG_SP,
175 | SPARC_REG_I6 = SPARC_REG_FP,
176 | } sparc_reg;
177 |
178 | /// Instruction's operand referring to memory
179 | /// This is associated with SPARC_OP_MEM operand type above
180 | typedef struct sparc_op_mem {
181 | uint8_t base; ///< base register, can be safely interpreted as
182 | ///< a value of type `sparc_reg`, but it is only
183 | ///< one byte wide
184 | uint8_t index; ///< index register, same conditions apply here
185 | int32_t disp; ///< displacement/offset value
186 | } sparc_op_mem;
187 |
188 | /// Instruction operand
189 | typedef struct cs_sparc_op {
190 | sparc_op_type type; ///< operand type
191 | union {
192 | sparc_reg reg; ///< register value for REG operand
193 | int64_t imm; ///< immediate value for IMM operand
194 | sparc_op_mem mem; ///< base/disp value for MEM operand
195 | };
196 | } cs_sparc_op;
197 |
198 | /// Instruction structure
199 | typedef struct cs_sparc {
200 | sparc_cc cc; ///< code condition for this insn
201 | sparc_hint hint; ///< branch hint: encoding as bitwise OR of sparc_hint.
202 | /// Number of operands of this instruction,
203 | /// or 0 when instruction has no operand.
204 | uint8_t op_count;
205 | cs_sparc_op operands[4]; ///< operands for this instruction.
206 | } cs_sparc;
207 |
208 | /// SPARC instruction
209 | typedef enum sparc_insn {
210 | SPARC_INS_INVALID = 0,
211 |
212 | SPARC_INS_ADDCC,
213 | SPARC_INS_ADDX,
214 | SPARC_INS_ADDXCC,
215 | SPARC_INS_ADDXC,
216 | SPARC_INS_ADDXCCC,
217 | SPARC_INS_ADD,
218 | SPARC_INS_ALIGNADDR,
219 | SPARC_INS_ALIGNADDRL,
220 | SPARC_INS_ANDCC,
221 | SPARC_INS_ANDNCC,
222 | SPARC_INS_ANDN,
223 | SPARC_INS_AND,
224 | SPARC_INS_ARRAY16,
225 | SPARC_INS_ARRAY32,
226 | SPARC_INS_ARRAY8,
227 | SPARC_INS_B,
228 | SPARC_INS_JMP,
229 | SPARC_INS_BMASK,
230 | SPARC_INS_FB,
231 | SPARC_INS_BRGEZ,
232 | SPARC_INS_BRGZ,
233 | SPARC_INS_BRLEZ,
234 | SPARC_INS_BRLZ,
235 | SPARC_INS_BRNZ,
236 | SPARC_INS_BRZ,
237 | SPARC_INS_BSHUFFLE,
238 | SPARC_INS_CALL,
239 | SPARC_INS_CASX,
240 | SPARC_INS_CAS,
241 | SPARC_INS_CMASK16,
242 | SPARC_INS_CMASK32,
243 | SPARC_INS_CMASK8,
244 | SPARC_INS_CMP,
245 | SPARC_INS_EDGE16,
246 | SPARC_INS_EDGE16L,
247 | SPARC_INS_EDGE16LN,
248 | SPARC_INS_EDGE16N,
249 | SPARC_INS_EDGE32,
250 | SPARC_INS_EDGE32L,
251 | SPARC_INS_EDGE32LN,
252 | SPARC_INS_EDGE32N,
253 | SPARC_INS_EDGE8,
254 | SPARC_INS_EDGE8L,
255 | SPARC_INS_EDGE8LN,
256 | SPARC_INS_EDGE8N,
257 | SPARC_INS_FABSD,
258 | SPARC_INS_FABSQ,
259 | SPARC_INS_FABSS,
260 | SPARC_INS_FADDD,
261 | SPARC_INS_FADDQ,
262 | SPARC_INS_FADDS,
263 | SPARC_INS_FALIGNDATA,
264 | SPARC_INS_FAND,
265 | SPARC_INS_FANDNOT1,
266 | SPARC_INS_FANDNOT1S,
267 | SPARC_INS_FANDNOT2,
268 | SPARC_INS_FANDNOT2S,
269 | SPARC_INS_FANDS,
270 | SPARC_INS_FCHKSM16,
271 | SPARC_INS_FCMPD,
272 | SPARC_INS_FCMPEQ16,
273 | SPARC_INS_FCMPEQ32,
274 | SPARC_INS_FCMPGT16,
275 | SPARC_INS_FCMPGT32,
276 | SPARC_INS_FCMPLE16,
277 | SPARC_INS_FCMPLE32,
278 | SPARC_INS_FCMPNE16,
279 | SPARC_INS_FCMPNE32,
280 | SPARC_INS_FCMPQ,
281 | SPARC_INS_FCMPS,
282 | SPARC_INS_FDIVD,
283 | SPARC_INS_FDIVQ,
284 | SPARC_INS_FDIVS,
285 | SPARC_INS_FDMULQ,
286 | SPARC_INS_FDTOI,
287 | SPARC_INS_FDTOQ,
288 | SPARC_INS_FDTOS,
289 | SPARC_INS_FDTOX,
290 | SPARC_INS_FEXPAND,
291 | SPARC_INS_FHADDD,
292 | SPARC_INS_FHADDS,
293 | SPARC_INS_FHSUBD,
294 | SPARC_INS_FHSUBS,
295 | SPARC_INS_FITOD,
296 | SPARC_INS_FITOQ,
297 | SPARC_INS_FITOS,
298 | SPARC_INS_FLCMPD,
299 | SPARC_INS_FLCMPS,
300 | SPARC_INS_FLUSHW,
301 | SPARC_INS_FMEAN16,
302 | SPARC_INS_FMOVD,
303 | SPARC_INS_FMOVQ,
304 | SPARC_INS_FMOVRDGEZ,
305 | SPARC_INS_FMOVRQGEZ,
306 | SPARC_INS_FMOVRSGEZ,
307 | SPARC_INS_FMOVRDGZ,
308 | SPARC_INS_FMOVRQGZ,
309 | SPARC_INS_FMOVRSGZ,
310 | SPARC_INS_FMOVRDLEZ,
311 | SPARC_INS_FMOVRQLEZ,
312 | SPARC_INS_FMOVRSLEZ,
313 | SPARC_INS_FMOVRDLZ,
314 | SPARC_INS_FMOVRQLZ,
315 | SPARC_INS_FMOVRSLZ,
316 | SPARC_INS_FMOVRDNZ,
317 | SPARC_INS_FMOVRQNZ,
318 | SPARC_INS_FMOVRSNZ,
319 | SPARC_INS_FMOVRDZ,
320 | SPARC_INS_FMOVRQZ,
321 | SPARC_INS_FMOVRSZ,
322 | SPARC_INS_FMOVS,
323 | SPARC_INS_FMUL8SUX16,
324 | SPARC_INS_FMUL8ULX16,
325 | SPARC_INS_FMUL8X16,
326 | SPARC_INS_FMUL8X16AL,
327 | SPARC_INS_FMUL8X16AU,
328 | SPARC_INS_FMULD,
329 | SPARC_INS_FMULD8SUX16,
330 | SPARC_INS_FMULD8ULX16,
331 | SPARC_INS_FMULQ,
332 | SPARC_INS_FMULS,
333 | SPARC_INS_FNADDD,
334 | SPARC_INS_FNADDS,
335 | SPARC_INS_FNAND,
336 | SPARC_INS_FNANDS,
337 | SPARC_INS_FNEGD,
338 | SPARC_INS_FNEGQ,
339 | SPARC_INS_FNEGS,
340 | SPARC_INS_FNHADDD,
341 | SPARC_INS_FNHADDS,
342 | SPARC_INS_FNOR,
343 | SPARC_INS_FNORS,
344 | SPARC_INS_FNOT1,
345 | SPARC_INS_FNOT1S,
346 | SPARC_INS_FNOT2,
347 | SPARC_INS_FNOT2S,
348 | SPARC_INS_FONE,
349 | SPARC_INS_FONES,
350 | SPARC_INS_FOR,
351 | SPARC_INS_FORNOT1,
352 | SPARC_INS_FORNOT1S,
353 | SPARC_INS_FORNOT2,
354 | SPARC_INS_FORNOT2S,
355 | SPARC_INS_FORS,
356 | SPARC_INS_FPACK16,
357 | SPARC_INS_FPACK32,
358 | SPARC_INS_FPACKFIX,
359 | SPARC_INS_FPADD16,
360 | SPARC_INS_FPADD16S,
361 | SPARC_INS_FPADD32,
362 | SPARC_INS_FPADD32S,
363 | SPARC_INS_FPADD64,
364 | SPARC_INS_FPMERGE,
365 | SPARC_INS_FPSUB16,
366 | SPARC_INS_FPSUB16S,
367 | SPARC_INS_FPSUB32,
368 | SPARC_INS_FPSUB32S,
369 | SPARC_INS_FQTOD,
370 | SPARC_INS_FQTOI,
371 | SPARC_INS_FQTOS,
372 | SPARC_INS_FQTOX,
373 | SPARC_INS_FSLAS16,
374 | SPARC_INS_FSLAS32,
375 | SPARC_INS_FSLL16,
376 | SPARC_INS_FSLL32,
377 | SPARC_INS_FSMULD,
378 | SPARC_INS_FSQRTD,
379 | SPARC_INS_FSQRTQ,
380 | SPARC_INS_FSQRTS,
381 | SPARC_INS_FSRA16,
382 | SPARC_INS_FSRA32,
383 | SPARC_INS_FSRC1,
384 | SPARC_INS_FSRC1S,
385 | SPARC_INS_FSRC2,
386 | SPARC_INS_FSRC2S,
387 | SPARC_INS_FSRL16,
388 | SPARC_INS_FSRL32,
389 | SPARC_INS_FSTOD,
390 | SPARC_INS_FSTOI,
391 | SPARC_INS_FSTOQ,
392 | SPARC_INS_FSTOX,
393 | SPARC_INS_FSUBD,
394 | SPARC_INS_FSUBQ,
395 | SPARC_INS_FSUBS,
396 | SPARC_INS_FXNOR,
397 | SPARC_INS_FXNORS,
398 | SPARC_INS_FXOR,
399 | SPARC_INS_FXORS,
400 | SPARC_INS_FXTOD,
401 | SPARC_INS_FXTOQ,
402 | SPARC_INS_FXTOS,
403 | SPARC_INS_FZERO,
404 | SPARC_INS_FZEROS,
405 | SPARC_INS_JMPL,
406 | SPARC_INS_LDD,
407 | SPARC_INS_LD,
408 | SPARC_INS_LDQ,
409 | SPARC_INS_LDSB,
410 | SPARC_INS_LDSH,
411 | SPARC_INS_LDSW,
412 | SPARC_INS_LDUB,
413 | SPARC_INS_LDUH,
414 | SPARC_INS_LDX,
415 | SPARC_INS_LZCNT,
416 | SPARC_INS_MEMBAR,
417 | SPARC_INS_MOVDTOX,
418 | SPARC_INS_MOV,
419 | SPARC_INS_MOVRGEZ,
420 | SPARC_INS_MOVRGZ,
421 | SPARC_INS_MOVRLEZ,
422 | SPARC_INS_MOVRLZ,
423 | SPARC_INS_MOVRNZ,
424 | SPARC_INS_MOVRZ,
425 | SPARC_INS_MOVSTOSW,
426 | SPARC_INS_MOVSTOUW,
427 | SPARC_INS_MULX,
428 | SPARC_INS_NOP,
429 | SPARC_INS_ORCC,
430 | SPARC_INS_ORNCC,
431 | SPARC_INS_ORN,
432 | SPARC_INS_OR,
433 | SPARC_INS_PDIST,
434 | SPARC_INS_PDISTN,
435 | SPARC_INS_POPC,
436 | SPARC_INS_RD,
437 | SPARC_INS_RESTORE,
438 | SPARC_INS_RETT,
439 | SPARC_INS_SAVE,
440 | SPARC_INS_SDIVCC,
441 | SPARC_INS_SDIVX,
442 | SPARC_INS_SDIV,
443 | SPARC_INS_SETHI,
444 | SPARC_INS_SHUTDOWN,
445 | SPARC_INS_SIAM,
446 | SPARC_INS_SLLX,
447 | SPARC_INS_SLL,
448 | SPARC_INS_SMULCC,
449 | SPARC_INS_SMUL,
450 | SPARC_INS_SRAX,
451 | SPARC_INS_SRA,
452 | SPARC_INS_SRLX,
453 | SPARC_INS_SRL,
454 | SPARC_INS_STBAR,
455 | SPARC_INS_STB,
456 | SPARC_INS_STD,
457 | SPARC_INS_ST,
458 | SPARC_INS_STH,
459 | SPARC_INS_STQ,
460 | SPARC_INS_STX,
461 | SPARC_INS_SUBCC,
462 | SPARC_INS_SUBX,
463 | SPARC_INS_SUBXCC,
464 | SPARC_INS_SUB,
465 | SPARC_INS_SWAP,
466 | SPARC_INS_TADDCCTV,
467 | SPARC_INS_TADDCC,
468 | SPARC_INS_T,
469 | SPARC_INS_TSUBCCTV,
470 | SPARC_INS_TSUBCC,
471 | SPARC_INS_UDIVCC,
472 | SPARC_INS_UDIVX,
473 | SPARC_INS_UDIV,
474 | SPARC_INS_UMULCC,
475 | SPARC_INS_UMULXHI,
476 | SPARC_INS_UMUL,
477 | SPARC_INS_UNIMP,
478 | SPARC_INS_FCMPED,
479 | SPARC_INS_FCMPEQ,
480 | SPARC_INS_FCMPES,
481 | SPARC_INS_WR,
482 | SPARC_INS_XMULX,
483 | SPARC_INS_XMULXHI,
484 | SPARC_INS_XNORCC,
485 | SPARC_INS_XNOR,
486 | SPARC_INS_XORCC,
487 | SPARC_INS_XOR,
488 |
489 | // alias instructions
490 | SPARC_INS_RET,
491 | SPARC_INS_RETL,
492 |
493 | SPARC_INS_ENDING, // <-- mark the end of the list of instructions
494 | } sparc_insn;
495 |
496 | /// Group of SPARC instructions
497 | typedef enum sparc_insn_group {
498 | SPARC_GRP_INVALID = 0, ///< = CS_GRP_INVALID
499 |
500 | // Generic groups
501 | // all jump instructions (conditional+direct+indirect jumps)
502 | SPARC_GRP_JUMP, ///< = CS_GRP_JUMP
503 |
504 | // Architecture-specific groups
505 | SPARC_GRP_HARDQUAD = 128,
506 | SPARC_GRP_V9,
507 | SPARC_GRP_VIS,
508 | SPARC_GRP_VIS2,
509 | SPARC_GRP_VIS3,
510 | SPARC_GRP_32BIT,
511 | SPARC_GRP_64BIT,
512 |
513 | SPARC_GRP_ENDING, // <-- mark the end of the list of groups
514 | } sparc_insn_group;
515 |
516 | #ifdef __cplusplus
517 | }
518 | #endif
519 |
520 | #endif
521 |
--------------------------------------------------------------------------------
/EDUReViver/include/capstone/systemz.h:
--------------------------------------------------------------------------------
1 | #ifndef CAPSTONE_SYSTEMZ_H
2 | #define CAPSTONE_SYSTEMZ_H
3 |
4 | /* Capstone Disassembly Engine */
5 | /* By Nguyen Anh Quynh , 2014-2015 */
6 |
7 | #ifdef __cplusplus
8 | extern "C" {
9 | #endif
10 |
11 | #include "platform.h"
12 |
13 | #ifdef _MSC_VER
14 | #pragma warning(disable:4201)
15 | #endif
16 |
17 | /// Enums corresponding to SystemZ condition codes
18 | typedef enum sysz_cc {
19 | SYSZ_CC_INVALID = 0, ///< invalid CC (default)
20 |
21 | SYSZ_CC_O,
22 | SYSZ_CC_H,
23 | SYSZ_CC_NLE,
24 | SYSZ_CC_L,
25 | SYSZ_CC_NHE,
26 | SYSZ_CC_LH,
27 | SYSZ_CC_NE,
28 | SYSZ_CC_E,
29 | SYSZ_CC_NLH,
30 | SYSZ_CC_HE,
31 | SYSZ_CC_NL,
32 | SYSZ_CC_LE,
33 | SYSZ_CC_NH,
34 | SYSZ_CC_NO,
35 | } sysz_cc;
36 |
37 | /// Operand type for instruction's operands
38 | typedef enum sysz_op_type {
39 | SYSZ_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
40 | SYSZ_OP_REG, ///< = CS_OP_REG (Register operand).
41 | SYSZ_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
42 | SYSZ_OP_MEM, ///< = CS_OP_MEM (Memory operand).
43 | SYSZ_OP_ACREG = 64, ///< Access register operand.
44 | } sysz_op_type;
45 |
46 | /// SystemZ registers
47 | typedef enum sysz_reg {
48 | SYSZ_REG_INVALID = 0,
49 |
50 | SYSZ_REG_0,
51 | SYSZ_REG_1,
52 | SYSZ_REG_2,
53 | SYSZ_REG_3,
54 | SYSZ_REG_4,
55 | SYSZ_REG_5,
56 | SYSZ_REG_6,
57 | SYSZ_REG_7,
58 | SYSZ_REG_8,
59 | SYSZ_REG_9,
60 | SYSZ_REG_10,
61 | SYSZ_REG_11,
62 | SYSZ_REG_12,
63 | SYSZ_REG_13,
64 | SYSZ_REG_14,
65 | SYSZ_REG_15,
66 | SYSZ_REG_CC,
67 | SYSZ_REG_F0,
68 | SYSZ_REG_F1,
69 | SYSZ_REG_F2,
70 | SYSZ_REG_F3,
71 | SYSZ_REG_F4,
72 | SYSZ_REG_F5,
73 | SYSZ_REG_F6,
74 | SYSZ_REG_F7,
75 | SYSZ_REG_F8,
76 | SYSZ_REG_F9,
77 | SYSZ_REG_F10,
78 | SYSZ_REG_F11,
79 | SYSZ_REG_F12,
80 | SYSZ_REG_F13,
81 | SYSZ_REG_F14,
82 | SYSZ_REG_F15,
83 |
84 | SYSZ_REG_R0L,
85 |
86 | SYSZ_REG_ENDING,
87 | } sysz_reg;
88 |
89 | /// Instruction's operand referring to memory
90 | /// This is associated with SYSZ_OP_MEM operand type above
91 | typedef struct sysz_op_mem {
92 | uint8_t base; ///< base register, can be safely interpreted as
93 | ///< a value of type `sysz_reg`, but it is only
94 | ///< one byte wide
95 | uint8_t index; ///< index register, same conditions apply here
96 | uint64_t length; ///< BDLAddr operand
97 | int64_t disp; ///< displacement/offset value
98 | } sysz_op_mem;
99 |
100 | /// Instruction operand
101 | typedef struct cs_sysz_op {
102 | sysz_op_type type; ///< operand type
103 | union {
104 | sysz_reg reg; ///< register value for REG operand
105 | int64_t imm; ///< immediate value for IMM operand
106 | sysz_op_mem mem; ///< base/disp value for MEM operand
107 | };
108 | } cs_sysz_op;
109 |
110 | // Instruction structure
111 | typedef struct cs_sysz {
112 | sysz_cc cc; ///< Code condition
113 | /// Number of operands of this instruction,
114 | /// or 0 when instruction has no operand.
115 | uint8_t op_count;
116 | cs_sysz_op operands[6]; ///< operands for this instruction.
117 | } cs_sysz;
118 |
119 | /// SystemZ instruction
120 | typedef enum sysz_insn {
121 | SYSZ_INS_INVALID = 0,
122 |
123 | SYSZ_INS_A,
124 | SYSZ_INS_ADB,
125 | SYSZ_INS_ADBR,
126 | SYSZ_INS_AEB,
127 | SYSZ_INS_AEBR,
128 | SYSZ_INS_AFI,
129 | SYSZ_INS_AG,
130 | SYSZ_INS_AGF,
131 | SYSZ_INS_AGFI,
132 | SYSZ_INS_AGFR,
133 | SYSZ_INS_AGHI,
134 | SYSZ_INS_AGHIK,
135 | SYSZ_INS_AGR,
136 | SYSZ_INS_AGRK,
137 | SYSZ_INS_AGSI,
138 | SYSZ_INS_AH,
139 | SYSZ_INS_AHI,
140 | SYSZ_INS_AHIK,
141 | SYSZ_INS_AHY,
142 | SYSZ_INS_AIH,
143 | SYSZ_INS_AL,
144 | SYSZ_INS_ALC,
145 | SYSZ_INS_ALCG,
146 | SYSZ_INS_ALCGR,
147 | SYSZ_INS_ALCR,
148 | SYSZ_INS_ALFI,
149 | SYSZ_INS_ALG,
150 | SYSZ_INS_ALGF,
151 | SYSZ_INS_ALGFI,
152 | SYSZ_INS_ALGFR,
153 | SYSZ_INS_ALGHSIK,
154 | SYSZ_INS_ALGR,
155 | SYSZ_INS_ALGRK,
156 | SYSZ_INS_ALHSIK,
157 | SYSZ_INS_ALR,
158 | SYSZ_INS_ALRK,
159 | SYSZ_INS_ALY,
160 | SYSZ_INS_AR,
161 | SYSZ_INS_ARK,
162 | SYSZ_INS_ASI,
163 | SYSZ_INS_AXBR,
164 | SYSZ_INS_AY,
165 | SYSZ_INS_BCR,
166 | SYSZ_INS_BRC,
167 | SYSZ_INS_BRCL,
168 | SYSZ_INS_CGIJ,
169 | SYSZ_INS_CGRJ,
170 | SYSZ_INS_CIJ,
171 | SYSZ_INS_CLGIJ,
172 | SYSZ_INS_CLGRJ,
173 | SYSZ_INS_CLIJ,
174 | SYSZ_INS_CLRJ,
175 | SYSZ_INS_CRJ,
176 | SYSZ_INS_BER,
177 | SYSZ_INS_JE,
178 | SYSZ_INS_JGE,
179 | SYSZ_INS_LOCE,
180 | SYSZ_INS_LOCGE,
181 | SYSZ_INS_LOCGRE,
182 | SYSZ_INS_LOCRE,
183 | SYSZ_INS_STOCE,
184 | SYSZ_INS_STOCGE,
185 | SYSZ_INS_BHR,
186 | SYSZ_INS_BHER,
187 | SYSZ_INS_JHE,
188 | SYSZ_INS_JGHE,
189 | SYSZ_INS_LOCHE,
190 | SYSZ_INS_LOCGHE,
191 | SYSZ_INS_LOCGRHE,
192 | SYSZ_INS_LOCRHE,
193 | SYSZ_INS_STOCHE,
194 | SYSZ_INS_STOCGHE,
195 | SYSZ_INS_JH,
196 | SYSZ_INS_JGH,
197 | SYSZ_INS_LOCH,
198 | SYSZ_INS_LOCGH,
199 | SYSZ_INS_LOCGRH,
200 | SYSZ_INS_LOCRH,
201 | SYSZ_INS_STOCH,
202 | SYSZ_INS_STOCGH,
203 | SYSZ_INS_CGIJNLH,
204 | SYSZ_INS_CGRJNLH,
205 | SYSZ_INS_CIJNLH,
206 | SYSZ_INS_CLGIJNLH,
207 | SYSZ_INS_CLGRJNLH,
208 | SYSZ_INS_CLIJNLH,
209 | SYSZ_INS_CLRJNLH,
210 | SYSZ_INS_CRJNLH,
211 | SYSZ_INS_CGIJE,
212 | SYSZ_INS_CGRJE,
213 | SYSZ_INS_CIJE,
214 | SYSZ_INS_CLGIJE,
215 | SYSZ_INS_CLGRJE,
216 | SYSZ_INS_CLIJE,
217 | SYSZ_INS_CLRJE,
218 | SYSZ_INS_CRJE,
219 | SYSZ_INS_CGIJNLE,
220 | SYSZ_INS_CGRJNLE,
221 | SYSZ_INS_CIJNLE,
222 | SYSZ_INS_CLGIJNLE,
223 | SYSZ_INS_CLGRJNLE,
224 | SYSZ_INS_CLIJNLE,
225 | SYSZ_INS_CLRJNLE,
226 | SYSZ_INS_CRJNLE,
227 | SYSZ_INS_CGIJH,
228 | SYSZ_INS_CGRJH,
229 | SYSZ_INS_CIJH,
230 | SYSZ_INS_CLGIJH,
231 | SYSZ_INS_CLGRJH,
232 | SYSZ_INS_CLIJH,
233 | SYSZ_INS_CLRJH,
234 | SYSZ_INS_CRJH,
235 | SYSZ_INS_CGIJNL,
236 | SYSZ_INS_CGRJNL,
237 | SYSZ_INS_CIJNL,
238 | SYSZ_INS_CLGIJNL,
239 | SYSZ_INS_CLGRJNL,
240 | SYSZ_INS_CLIJNL,
241 | SYSZ_INS_CLRJNL,
242 | SYSZ_INS_CRJNL,
243 | SYSZ_INS_CGIJHE,
244 | SYSZ_INS_CGRJHE,
245 | SYSZ_INS_CIJHE,
246 | SYSZ_INS_CLGIJHE,
247 | SYSZ_INS_CLGRJHE,
248 | SYSZ_INS_CLIJHE,
249 | SYSZ_INS_CLRJHE,
250 | SYSZ_INS_CRJHE,
251 | SYSZ_INS_CGIJNHE,
252 | SYSZ_INS_CGRJNHE,
253 | SYSZ_INS_CIJNHE,
254 | SYSZ_INS_CLGIJNHE,
255 | SYSZ_INS_CLGRJNHE,
256 | SYSZ_INS_CLIJNHE,
257 | SYSZ_INS_CLRJNHE,
258 | SYSZ_INS_CRJNHE,
259 | SYSZ_INS_CGIJL,
260 | SYSZ_INS_CGRJL,
261 | SYSZ_INS_CIJL,
262 | SYSZ_INS_CLGIJL,
263 | SYSZ_INS_CLGRJL,
264 | SYSZ_INS_CLIJL,
265 | SYSZ_INS_CLRJL,
266 | SYSZ_INS_CRJL,
267 | SYSZ_INS_CGIJNH,
268 | SYSZ_INS_CGRJNH,
269 | SYSZ_INS_CIJNH,
270 | SYSZ_INS_CLGIJNH,
271 | SYSZ_INS_CLGRJNH,
272 | SYSZ_INS_CLIJNH,
273 | SYSZ_INS_CLRJNH,
274 | SYSZ_INS_CRJNH,
275 | SYSZ_INS_CGIJLE,
276 | SYSZ_INS_CGRJLE,
277 | SYSZ_INS_CIJLE,
278 | SYSZ_INS_CLGIJLE,
279 | SYSZ_INS_CLGRJLE,
280 | SYSZ_INS_CLIJLE,
281 | SYSZ_INS_CLRJLE,
282 | SYSZ_INS_CRJLE,
283 | SYSZ_INS_CGIJNE,
284 | SYSZ_INS_CGRJNE,
285 | SYSZ_INS_CIJNE,
286 | SYSZ_INS_CLGIJNE,
287 | SYSZ_INS_CLGRJNE,
288 | SYSZ_INS_CLIJNE,
289 | SYSZ_INS_CLRJNE,
290 | SYSZ_INS_CRJNE,
291 | SYSZ_INS_CGIJLH,
292 | SYSZ_INS_CGRJLH,
293 | SYSZ_INS_CIJLH,
294 | SYSZ_INS_CLGIJLH,
295 | SYSZ_INS_CLGRJLH,
296 | SYSZ_INS_CLIJLH,
297 | SYSZ_INS_CLRJLH,
298 | SYSZ_INS_CRJLH,
299 | SYSZ_INS_BLR,
300 | SYSZ_INS_BLER,
301 | SYSZ_INS_JLE,
302 | SYSZ_INS_JGLE,
303 | SYSZ_INS_LOCLE,
304 | SYSZ_INS_LOCGLE,
305 | SYSZ_INS_LOCGRLE,
306 | SYSZ_INS_LOCRLE,
307 | SYSZ_INS_STOCLE,
308 | SYSZ_INS_STOCGLE,
309 | SYSZ_INS_BLHR,
310 | SYSZ_INS_JLH,
311 | SYSZ_INS_JGLH,
312 | SYSZ_INS_LOCLH,
313 | SYSZ_INS_LOCGLH,
314 | SYSZ_INS_LOCGRLH,
315 | SYSZ_INS_LOCRLH,
316 | SYSZ_INS_STOCLH,
317 | SYSZ_INS_STOCGLH,
318 | SYSZ_INS_JL,
319 | SYSZ_INS_JGL,
320 | SYSZ_INS_LOCL,
321 | SYSZ_INS_LOCGL,
322 | SYSZ_INS_LOCGRL,
323 | SYSZ_INS_LOCRL,
324 | SYSZ_INS_LOC,
325 | SYSZ_INS_LOCG,
326 | SYSZ_INS_LOCGR,
327 | SYSZ_INS_LOCR,
328 | SYSZ_INS_STOCL,
329 | SYSZ_INS_STOCGL,
330 | SYSZ_INS_BNER,
331 | SYSZ_INS_JNE,
332 | SYSZ_INS_JGNE,
333 | SYSZ_INS_LOCNE,
334 | SYSZ_INS_LOCGNE,
335 | SYSZ_INS_LOCGRNE,
336 | SYSZ_INS_LOCRNE,
337 | SYSZ_INS_STOCNE,
338 | SYSZ_INS_STOCGNE,
339 | SYSZ_INS_BNHR,
340 | SYSZ_INS_BNHER,
341 | SYSZ_INS_JNHE,
342 | SYSZ_INS_JGNHE,
343 | SYSZ_INS_LOCNHE,
344 | SYSZ_INS_LOCGNHE,
345 | SYSZ_INS_LOCGRNHE,
346 | SYSZ_INS_LOCRNHE,
347 | SYSZ_INS_STOCNHE,
348 | SYSZ_INS_STOCGNHE,
349 | SYSZ_INS_JNH,
350 | SYSZ_INS_JGNH,
351 | SYSZ_INS_LOCNH,
352 | SYSZ_INS_LOCGNH,
353 | SYSZ_INS_LOCGRNH,
354 | SYSZ_INS_LOCRNH,
355 | SYSZ_INS_STOCNH,
356 | SYSZ_INS_STOCGNH,
357 | SYSZ_INS_BNLR,
358 | SYSZ_INS_BNLER,
359 | SYSZ_INS_JNLE,
360 | SYSZ_INS_JGNLE,
361 | SYSZ_INS_LOCNLE,
362 | SYSZ_INS_LOCGNLE,
363 | SYSZ_INS_LOCGRNLE,
364 | SYSZ_INS_LOCRNLE,
365 | SYSZ_INS_STOCNLE,
366 | SYSZ_INS_STOCGNLE,
367 | SYSZ_INS_BNLHR,
368 | SYSZ_INS_JNLH,
369 | SYSZ_INS_JGNLH,
370 | SYSZ_INS_LOCNLH,
371 | SYSZ_INS_LOCGNLH,
372 | SYSZ_INS_LOCGRNLH,
373 | SYSZ_INS_LOCRNLH,
374 | SYSZ_INS_STOCNLH,
375 | SYSZ_INS_STOCGNLH,
376 | SYSZ_INS_JNL,
377 | SYSZ_INS_JGNL,
378 | SYSZ_INS_LOCNL,
379 | SYSZ_INS_LOCGNL,
380 | SYSZ_INS_LOCGRNL,
381 | SYSZ_INS_LOCRNL,
382 | SYSZ_INS_STOCNL,
383 | SYSZ_INS_STOCGNL,
384 | SYSZ_INS_BNOR,
385 | SYSZ_INS_JNO,
386 | SYSZ_INS_JGNO,
387 | SYSZ_INS_LOCNO,
388 | SYSZ_INS_LOCGNO,
389 | SYSZ_INS_LOCGRNO,
390 | SYSZ_INS_LOCRNO,
391 | SYSZ_INS_STOCNO,
392 | SYSZ_INS_STOCGNO,
393 | SYSZ_INS_BOR,
394 | SYSZ_INS_JO,
395 | SYSZ_INS_JGO,
396 | SYSZ_INS_LOCO,
397 | SYSZ_INS_LOCGO,
398 | SYSZ_INS_LOCGRO,
399 | SYSZ_INS_LOCRO,
400 | SYSZ_INS_STOCO,
401 | SYSZ_INS_STOCGO,
402 | SYSZ_INS_STOC,
403 | SYSZ_INS_STOCG,
404 | SYSZ_INS_BASR,
405 | SYSZ_INS_BR,
406 | SYSZ_INS_BRAS,
407 | SYSZ_INS_BRASL,
408 | SYSZ_INS_J,
409 | SYSZ_INS_JG,
410 | SYSZ_INS_BRCT,
411 | SYSZ_INS_BRCTG,
412 | SYSZ_INS_C,
413 | SYSZ_INS_CDB,
414 | SYSZ_INS_CDBR,
415 | SYSZ_INS_CDFBR,
416 | SYSZ_INS_CDGBR,
417 | SYSZ_INS_CDLFBR,
418 | SYSZ_INS_CDLGBR,
419 | SYSZ_INS_CEB,
420 | SYSZ_INS_CEBR,
421 | SYSZ_INS_CEFBR,
422 | SYSZ_INS_CEGBR,
423 | SYSZ_INS_CELFBR,
424 | SYSZ_INS_CELGBR,
425 | SYSZ_INS_CFDBR,
426 | SYSZ_INS_CFEBR,
427 | SYSZ_INS_CFI,
428 | SYSZ_INS_CFXBR,
429 | SYSZ_INS_CG,
430 | SYSZ_INS_CGDBR,
431 | SYSZ_INS_CGEBR,
432 | SYSZ_INS_CGF,
433 | SYSZ_INS_CGFI,
434 | SYSZ_INS_CGFR,
435 | SYSZ_INS_CGFRL,
436 | SYSZ_INS_CGH,
437 | SYSZ_INS_CGHI,
438 | SYSZ_INS_CGHRL,
439 | SYSZ_INS_CGHSI,
440 | SYSZ_INS_CGR,
441 | SYSZ_INS_CGRL,
442 | SYSZ_INS_CGXBR,
443 | SYSZ_INS_CH,
444 | SYSZ_INS_CHF,
445 | SYSZ_INS_CHHSI,
446 | SYSZ_INS_CHI,
447 | SYSZ_INS_CHRL,
448 | SYSZ_INS_CHSI,
449 | SYSZ_INS_CHY,
450 | SYSZ_INS_CIH,
451 | SYSZ_INS_CL,
452 | SYSZ_INS_CLC,
453 | SYSZ_INS_CLFDBR,
454 | SYSZ_INS_CLFEBR,
455 | SYSZ_INS_CLFHSI,
456 | SYSZ_INS_CLFI,
457 | SYSZ_INS_CLFXBR,
458 | SYSZ_INS_CLG,
459 | SYSZ_INS_CLGDBR,
460 | SYSZ_INS_CLGEBR,
461 | SYSZ_INS_CLGF,
462 | SYSZ_INS_CLGFI,
463 | SYSZ_INS_CLGFR,
464 | SYSZ_INS_CLGFRL,
465 | SYSZ_INS_CLGHRL,
466 | SYSZ_INS_CLGHSI,
467 | SYSZ_INS_CLGR,
468 | SYSZ_INS_CLGRL,
469 | SYSZ_INS_CLGXBR,
470 | SYSZ_INS_CLHF,
471 | SYSZ_INS_CLHHSI,
472 | SYSZ_INS_CLHRL,
473 | SYSZ_INS_CLI,
474 | SYSZ_INS_CLIH,
475 | SYSZ_INS_CLIY,
476 | SYSZ_INS_CLR,
477 | SYSZ_INS_CLRL,
478 | SYSZ_INS_CLST,
479 | SYSZ_INS_CLY,
480 | SYSZ_INS_CPSDR,
481 | SYSZ_INS_CR,
482 | SYSZ_INS_CRL,
483 | SYSZ_INS_CS,
484 | SYSZ_INS_CSG,
485 | SYSZ_INS_CSY,
486 | SYSZ_INS_CXBR,
487 | SYSZ_INS_CXFBR,
488 | SYSZ_INS_CXGBR,
489 | SYSZ_INS_CXLFBR,
490 | SYSZ_INS_CXLGBR,
491 | SYSZ_INS_CY,
492 | SYSZ_INS_DDB,
493 | SYSZ_INS_DDBR,
494 | SYSZ_INS_DEB,
495 | SYSZ_INS_DEBR,
496 | SYSZ_INS_DL,
497 | SYSZ_INS_DLG,
498 | SYSZ_INS_DLGR,
499 | SYSZ_INS_DLR,
500 | SYSZ_INS_DSG,
501 | SYSZ_INS_DSGF,
502 | SYSZ_INS_DSGFR,
503 | SYSZ_INS_DSGR,
504 | SYSZ_INS_DXBR,
505 | SYSZ_INS_EAR,
506 | SYSZ_INS_FIDBR,
507 | SYSZ_INS_FIDBRA,
508 | SYSZ_INS_FIEBR,
509 | SYSZ_INS_FIEBRA,
510 | SYSZ_INS_FIXBR,
511 | SYSZ_INS_FIXBRA,
512 | SYSZ_INS_FLOGR,
513 | SYSZ_INS_IC,
514 | SYSZ_INS_ICY,
515 | SYSZ_INS_IIHF,
516 | SYSZ_INS_IIHH,
517 | SYSZ_INS_IIHL,
518 | SYSZ_INS_IILF,
519 | SYSZ_INS_IILH,
520 | SYSZ_INS_IILL,
521 | SYSZ_INS_IPM,
522 | SYSZ_INS_L,
523 | SYSZ_INS_LA,
524 | SYSZ_INS_LAA,
525 | SYSZ_INS_LAAG,
526 | SYSZ_INS_LAAL,
527 | SYSZ_INS_LAALG,
528 | SYSZ_INS_LAN,
529 | SYSZ_INS_LANG,
530 | SYSZ_INS_LAO,
531 | SYSZ_INS_LAOG,
532 | SYSZ_INS_LARL,
533 | SYSZ_INS_LAX,
534 | SYSZ_INS_LAXG,
535 | SYSZ_INS_LAY,
536 | SYSZ_INS_LB,
537 | SYSZ_INS_LBH,
538 | SYSZ_INS_LBR,
539 | SYSZ_INS_LCDBR,
540 | SYSZ_INS_LCEBR,
541 | SYSZ_INS_LCGFR,
542 | SYSZ_INS_LCGR,
543 | SYSZ_INS_LCR,
544 | SYSZ_INS_LCXBR,
545 | SYSZ_INS_LD,
546 | SYSZ_INS_LDEB,
547 | SYSZ_INS_LDEBR,
548 | SYSZ_INS_LDGR,
549 | SYSZ_INS_LDR,
550 | SYSZ_INS_LDXBR,
551 | SYSZ_INS_LDXBRA,
552 | SYSZ_INS_LDY,
553 | SYSZ_INS_LE,
554 | SYSZ_INS_LEDBR,
555 | SYSZ_INS_LEDBRA,
556 | SYSZ_INS_LER,
557 | SYSZ_INS_LEXBR,
558 | SYSZ_INS_LEXBRA,
559 | SYSZ_INS_LEY,
560 | SYSZ_INS_LFH,
561 | SYSZ_INS_LG,
562 | SYSZ_INS_LGB,
563 | SYSZ_INS_LGBR,
564 | SYSZ_INS_LGDR,
565 | SYSZ_INS_LGF,
566 | SYSZ_INS_LGFI,
567 | SYSZ_INS_LGFR,
568 | SYSZ_INS_LGFRL,
569 | SYSZ_INS_LGH,
570 | SYSZ_INS_LGHI,
571 | SYSZ_INS_LGHR,
572 | SYSZ_INS_LGHRL,
573 | SYSZ_INS_LGR,
574 | SYSZ_INS_LGRL,
575 | SYSZ_INS_LH,
576 | SYSZ_INS_LHH,
577 | SYSZ_INS_LHI,
578 | SYSZ_INS_LHR,
579 | SYSZ_INS_LHRL,
580 | SYSZ_INS_LHY,
581 | SYSZ_INS_LLC,
582 | SYSZ_INS_LLCH,
583 | SYSZ_INS_LLCR,
584 | SYSZ_INS_LLGC,
585 | SYSZ_INS_LLGCR,
586 | SYSZ_INS_LLGF,
587 | SYSZ_INS_LLGFR,
588 | SYSZ_INS_LLGFRL,
589 | SYSZ_INS_LLGH,
590 | SYSZ_INS_LLGHR,
591 | SYSZ_INS_LLGHRL,
592 | SYSZ_INS_LLH,
593 | SYSZ_INS_LLHH,
594 | SYSZ_INS_LLHR,
595 | SYSZ_INS_LLHRL,
596 | SYSZ_INS_LLIHF,
597 | SYSZ_INS_LLIHH,
598 | SYSZ_INS_LLIHL,
599 | SYSZ_INS_LLILF,
600 | SYSZ_INS_LLILH,
601 | SYSZ_INS_LLILL,
602 | SYSZ_INS_LMG,
603 | SYSZ_INS_LNDBR,
604 | SYSZ_INS_LNEBR,
605 | SYSZ_INS_LNGFR,
606 | SYSZ_INS_LNGR,
607 | SYSZ_INS_LNR,
608 | SYSZ_INS_LNXBR,
609 | SYSZ_INS_LPDBR,
610 | SYSZ_INS_LPEBR,
611 | SYSZ_INS_LPGFR,
612 | SYSZ_INS_LPGR,
613 | SYSZ_INS_LPR,
614 | SYSZ_INS_LPXBR,
615 | SYSZ_INS_LR,
616 | SYSZ_INS_LRL,
617 | SYSZ_INS_LRV,
618 | SYSZ_INS_LRVG,
619 | SYSZ_INS_LRVGR,
620 | SYSZ_INS_LRVR,
621 | SYSZ_INS_LT,
622 | SYSZ_INS_LTDBR,
623 | SYSZ_INS_LTEBR,
624 | SYSZ_INS_LTG,
625 | SYSZ_INS_LTGF,
626 | SYSZ_INS_LTGFR,
627 | SYSZ_INS_LTGR,
628 | SYSZ_INS_LTR,
629 | SYSZ_INS_LTXBR,
630 | SYSZ_INS_LXDB,
631 | SYSZ_INS_LXDBR,
632 | SYSZ_INS_LXEB,
633 | SYSZ_INS_LXEBR,
634 | SYSZ_INS_LXR,
635 | SYSZ_INS_LY,
636 | SYSZ_INS_LZDR,
637 | SYSZ_INS_LZER,
638 | SYSZ_INS_LZXR,
639 | SYSZ_INS_MADB,
640 | SYSZ_INS_MADBR,
641 | SYSZ_INS_MAEB,
642 | SYSZ_INS_MAEBR,
643 | SYSZ_INS_MDB,
644 | SYSZ_INS_MDBR,
645 | SYSZ_INS_MDEB,
646 | SYSZ_INS_MDEBR,
647 | SYSZ_INS_MEEB,
648 | SYSZ_INS_MEEBR,
649 | SYSZ_INS_MGHI,
650 | SYSZ_INS_MH,
651 | SYSZ_INS_MHI,
652 | SYSZ_INS_MHY,
653 | SYSZ_INS_MLG,
654 | SYSZ_INS_MLGR,
655 | SYSZ_INS_MS,
656 | SYSZ_INS_MSDB,
657 | SYSZ_INS_MSDBR,
658 | SYSZ_INS_MSEB,
659 | SYSZ_INS_MSEBR,
660 | SYSZ_INS_MSFI,
661 | SYSZ_INS_MSG,
662 | SYSZ_INS_MSGF,
663 | SYSZ_INS_MSGFI,
664 | SYSZ_INS_MSGFR,
665 | SYSZ_INS_MSGR,
666 | SYSZ_INS_MSR,
667 | SYSZ_INS_MSY,
668 | SYSZ_INS_MVC,
669 | SYSZ_INS_MVGHI,
670 | SYSZ_INS_MVHHI,
671 | SYSZ_INS_MVHI,
672 | SYSZ_INS_MVI,
673 | SYSZ_INS_MVIY,
674 | SYSZ_INS_MVST,
675 | SYSZ_INS_MXBR,
676 | SYSZ_INS_MXDB,
677 | SYSZ_INS_MXDBR,
678 | SYSZ_INS_N,
679 | SYSZ_INS_NC,
680 | SYSZ_INS_NG,
681 | SYSZ_INS_NGR,
682 | SYSZ_INS_NGRK,
683 | SYSZ_INS_NI,
684 | SYSZ_INS_NIHF,
685 | SYSZ_INS_NIHH,
686 | SYSZ_INS_NIHL,
687 | SYSZ_INS_NILF,
688 | SYSZ_INS_NILH,
689 | SYSZ_INS_NILL,
690 | SYSZ_INS_NIY,
691 | SYSZ_INS_NR,
692 | SYSZ_INS_NRK,
693 | SYSZ_INS_NY,
694 | SYSZ_INS_O,
695 | SYSZ_INS_OC,
696 | SYSZ_INS_OG,
697 | SYSZ_INS_OGR,
698 | SYSZ_INS_OGRK,
699 | SYSZ_INS_OI,
700 | SYSZ_INS_OIHF,
701 | SYSZ_INS_OIHH,
702 | SYSZ_INS_OIHL,
703 | SYSZ_INS_OILF,
704 | SYSZ_INS_OILH,
705 | SYSZ_INS_OILL,
706 | SYSZ_INS_OIY,
707 | SYSZ_INS_OR,
708 | SYSZ_INS_ORK,
709 | SYSZ_INS_OY,
710 | SYSZ_INS_PFD,
711 | SYSZ_INS_PFDRL,
712 | SYSZ_INS_RISBG,
713 | SYSZ_INS_RISBHG,
714 | SYSZ_INS_RISBLG,
715 | SYSZ_INS_RLL,
716 | SYSZ_INS_RLLG,
717 | SYSZ_INS_RNSBG,
718 | SYSZ_INS_ROSBG,
719 | SYSZ_INS_RXSBG,
720 | SYSZ_INS_S,
721 | SYSZ_INS_SDB,
722 | SYSZ_INS_SDBR,
723 | SYSZ_INS_SEB,
724 | SYSZ_INS_SEBR,
725 | SYSZ_INS_SG,
726 | SYSZ_INS_SGF,
727 | SYSZ_INS_SGFR,
728 | SYSZ_INS_SGR,
729 | SYSZ_INS_SGRK,
730 | SYSZ_INS_SH,
731 | SYSZ_INS_SHY,
732 | SYSZ_INS_SL,
733 | SYSZ_INS_SLB,
734 | SYSZ_INS_SLBG,
735 | SYSZ_INS_SLBR,
736 | SYSZ_INS_SLFI,
737 | SYSZ_INS_SLG,
738 | SYSZ_INS_SLBGR,
739 | SYSZ_INS_SLGF,
740 | SYSZ_INS_SLGFI,
741 | SYSZ_INS_SLGFR,
742 | SYSZ_INS_SLGR,
743 | SYSZ_INS_SLGRK,
744 | SYSZ_INS_SLL,
745 | SYSZ_INS_SLLG,
746 | SYSZ_INS_SLLK,
747 | SYSZ_INS_SLR,
748 | SYSZ_INS_SLRK,
749 | SYSZ_INS_SLY,
750 | SYSZ_INS_SQDB,
751 | SYSZ_INS_SQDBR,
752 | SYSZ_INS_SQEB,
753 | SYSZ_INS_SQEBR,
754 | SYSZ_INS_SQXBR,
755 | SYSZ_INS_SR,
756 | SYSZ_INS_SRA,
757 | SYSZ_INS_SRAG,
758 | SYSZ_INS_SRAK,
759 | SYSZ_INS_SRK,
760 | SYSZ_INS_SRL,
761 | SYSZ_INS_SRLG,
762 | SYSZ_INS_SRLK,
763 | SYSZ_INS_SRST,
764 | SYSZ_INS_ST,
765 | SYSZ_INS_STC,
766 | SYSZ_INS_STCH,
767 | SYSZ_INS_STCY,
768 | SYSZ_INS_STD,
769 | SYSZ_INS_STDY,
770 | SYSZ_INS_STE,
771 | SYSZ_INS_STEY,
772 | SYSZ_INS_STFH,
773 | SYSZ_INS_STG,
774 | SYSZ_INS_STGRL,
775 | SYSZ_INS_STH,
776 | SYSZ_INS_STHH,
777 | SYSZ_INS_STHRL,
778 | SYSZ_INS_STHY,
779 | SYSZ_INS_STMG,
780 | SYSZ_INS_STRL,
781 | SYSZ_INS_STRV,
782 | SYSZ_INS_STRVG,
783 | SYSZ_INS_STY,
784 | SYSZ_INS_SXBR,
785 | SYSZ_INS_SY,
786 | SYSZ_INS_TM,
787 | SYSZ_INS_TMHH,
788 | SYSZ_INS_TMHL,
789 | SYSZ_INS_TMLH,
790 | SYSZ_INS_TMLL,
791 | SYSZ_INS_TMY,
792 | SYSZ_INS_X,
793 | SYSZ_INS_XC,
794 | SYSZ_INS_XG,
795 | SYSZ_INS_XGR,
796 | SYSZ_INS_XGRK,
797 | SYSZ_INS_XI,
798 | SYSZ_INS_XIHF,
799 | SYSZ_INS_XILF,
800 | SYSZ_INS_XIY,
801 | SYSZ_INS_XR,
802 | SYSZ_INS_XRK,
803 | SYSZ_INS_XY,
804 |
805 | SYSZ_INS_ENDING, // <-- mark the end of the list of instructions
806 | } sysz_insn;
807 |
808 | /// Group of SystemZ instructions
809 | typedef enum sysz_insn_group {
810 | SYSZ_GRP_INVALID = 0, ///< = CS_GRP_INVALID
811 |
812 | // Generic groups
813 | // all jump instructions (conditional+direct+indirect jumps)
814 | SYSZ_GRP_JUMP, ///< = CS_GRP_JUMP
815 |
816 | // Architecture-specific groups
817 | SYSZ_GRP_DISTINCTOPS = 128,
818 | SYSZ_GRP_FPEXTENSION,
819 | SYSZ_GRP_HIGHWORD,
820 | SYSZ_GRP_INTERLOCKEDACCESS1,
821 | SYSZ_GRP_LOADSTOREONCOND,
822 |
823 | SYSZ_GRP_ENDING, // <-- mark the end of the list of groups
824 | } sysz_insn_group;
825 |
826 | #ifdef __cplusplus
827 | }
828 | #endif
829 |
830 | #endif
831 |
--------------------------------------------------------------------------------
/EDUReViver/include/capstone/tms320c64x.h:
--------------------------------------------------------------------------------
1 | /* Capstone Disassembly Engine */
2 | /* TMS320C64x Backend by Fotis Loukos 2016 */
3 |
4 | #ifndef CAPSTONE_TMS320C64X_H
5 | #define CAPSTONE_TMS320C64X_H
6 |
7 | #ifdef __cplusplus
8 | extern "C" {
9 | #endif
10 |
11 | #include
12 | #include "platform.h"
13 |
14 | #ifdef _MSC_VER
15 | #pragma warning(disable:4201)
16 | #endif
17 |
18 | typedef enum tms320c64x_op_type {
19 | TMS320C64X_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
20 | TMS320C64X_OP_REG, ///< = CS_OP_REG (Register operand).
21 | TMS320C64X_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
22 | TMS320C64X_OP_MEM, ///< = CS_OP_MEM (Memory operand).
23 | TMS320C64X_OP_REGPAIR = 64, ///< Register pair for double word ops
24 | } tms320c64x_op_type;
25 |
26 | typedef enum tms320c64x_mem_disp {
27 | TMS320C64X_MEM_DISP_INVALID = 0,
28 | TMS320C64X_MEM_DISP_CONSTANT,
29 | TMS320C64X_MEM_DISP_REGISTER,
30 | } tms320c64x_mem_disp;
31 |
32 | typedef enum tms320c64x_mem_dir {
33 | TMS320C64X_MEM_DIR_INVALID = 0,
34 | TMS320C64X_MEM_DIR_FW,
35 | TMS320C64X_MEM_DIR_BW,
36 | } tms320c64x_mem_dir;
37 |
38 | typedef enum tms320c64x_mem_mod {
39 | TMS320C64X_MEM_MOD_INVALID = 0,
40 | TMS320C64X_MEM_MOD_NO,
41 | TMS320C64X_MEM_MOD_PRE,
42 | TMS320C64X_MEM_MOD_POST,
43 | } tms320c64x_mem_mod;
44 |
45 | typedef struct tms320c64x_op_mem {
46 | unsigned int base; ///< base register
47 | unsigned int disp; ///< displacement/offset value
48 | unsigned int unit; ///< unit of base and offset register
49 | unsigned int scaled; ///< offset scaled
50 | unsigned int disptype; ///< displacement type
51 | unsigned int direction; ///< direction
52 | unsigned int modify; ///< modification
53 | } tms320c64x_op_mem;
54 |
55 | typedef struct cs_tms320c64x_op {
56 | tms320c64x_op_type type; ///< operand type
57 | union {
58 | unsigned int reg; ///< register value for REG operand or first register for REGPAIR operand
59 | int32_t imm; ///< immediate value for IMM operand
60 | tms320c64x_op_mem mem; ///< base/disp value for MEM operand
61 | };
62 | } cs_tms320c64x_op;
63 |
64 | typedef struct cs_tms320c64x {
65 | uint8_t op_count;
66 | cs_tms320c64x_op operands[8]; ///< operands for this instruction.
67 | struct {
68 | unsigned int reg;
69 | unsigned int zero;
70 | } condition;
71 | struct {
72 | unsigned int unit;
73 | unsigned int side;
74 | unsigned int crosspath;
75 | } funit;
76 | unsigned int parallel;
77 | } cs_tms320c64x;
78 |
79 | typedef enum tms320c64x_reg {
80 | TMS320C64X_REG_INVALID = 0,
81 |
82 | TMS320C64X_REG_AMR,
83 | TMS320C64X_REG_CSR,
84 | TMS320C64X_REG_DIER,
85 | TMS320C64X_REG_DNUM,
86 | TMS320C64X_REG_ECR,
87 | TMS320C64X_REG_GFPGFR,
88 | TMS320C64X_REG_GPLYA,
89 | TMS320C64X_REG_GPLYB,
90 | TMS320C64X_REG_ICR,
91 | TMS320C64X_REG_IER,
92 | TMS320C64X_REG_IERR,
93 | TMS320C64X_REG_ILC,
94 | TMS320C64X_REG_IRP,
95 | TMS320C64X_REG_ISR,
96 | TMS320C64X_REG_ISTP,
97 | TMS320C64X_REG_ITSR,
98 | TMS320C64X_REG_NRP,
99 | TMS320C64X_REG_NTSR,
100 | TMS320C64X_REG_REP,
101 | TMS320C64X_REG_RILC,
102 | TMS320C64X_REG_SSR,
103 | TMS320C64X_REG_TSCH,
104 | TMS320C64X_REG_TSCL,
105 | TMS320C64X_REG_TSR,
106 | TMS320C64X_REG_A0,
107 | TMS320C64X_REG_A1,
108 | TMS320C64X_REG_A2,
109 | TMS320C64X_REG_A3,
110 | TMS320C64X_REG_A4,
111 | TMS320C64X_REG_A5,
112 | TMS320C64X_REG_A6,
113 | TMS320C64X_REG_A7,
114 | TMS320C64X_REG_A8,
115 | TMS320C64X_REG_A9,
116 | TMS320C64X_REG_A10,
117 | TMS320C64X_REG_A11,
118 | TMS320C64X_REG_A12,
119 | TMS320C64X_REG_A13,
120 | TMS320C64X_REG_A14,
121 | TMS320C64X_REG_A15,
122 | TMS320C64X_REG_A16,
123 | TMS320C64X_REG_A17,
124 | TMS320C64X_REG_A18,
125 | TMS320C64X_REG_A19,
126 | TMS320C64X_REG_A20,
127 | TMS320C64X_REG_A21,
128 | TMS320C64X_REG_A22,
129 | TMS320C64X_REG_A23,
130 | TMS320C64X_REG_A24,
131 | TMS320C64X_REG_A25,
132 | TMS320C64X_REG_A26,
133 | TMS320C64X_REG_A27,
134 | TMS320C64X_REG_A28,
135 | TMS320C64X_REG_A29,
136 | TMS320C64X_REG_A30,
137 | TMS320C64X_REG_A31,
138 | TMS320C64X_REG_B0,
139 | TMS320C64X_REG_B1,
140 | TMS320C64X_REG_B2,
141 | TMS320C64X_REG_B3,
142 | TMS320C64X_REG_B4,
143 | TMS320C64X_REG_B5,
144 | TMS320C64X_REG_B6,
145 | TMS320C64X_REG_B7,
146 | TMS320C64X_REG_B8,
147 | TMS320C64X_REG_B9,
148 | TMS320C64X_REG_B10,
149 | TMS320C64X_REG_B11,
150 | TMS320C64X_REG_B12,
151 | TMS320C64X_REG_B13,
152 | TMS320C64X_REG_B14,
153 | TMS320C64X_REG_B15,
154 | TMS320C64X_REG_B16,
155 | TMS320C64X_REG_B17,
156 | TMS320C64X_REG_B18,
157 | TMS320C64X_REG_B19,
158 | TMS320C64X_REG_B20,
159 | TMS320C64X_REG_B21,
160 | TMS320C64X_REG_B22,
161 | TMS320C64X_REG_B23,
162 | TMS320C64X_REG_B24,
163 | TMS320C64X_REG_B25,
164 | TMS320C64X_REG_B26,
165 | TMS320C64X_REG_B27,
166 | TMS320C64X_REG_B28,
167 | TMS320C64X_REG_B29,
168 | TMS320C64X_REG_B30,
169 | TMS320C64X_REG_B31,
170 | TMS320C64X_REG_PCE1,
171 |
172 | TMS320C64X_REG_ENDING, // <-- mark the end of the list of registers
173 |
174 | // Alias registers
175 | TMS320C64X_REG_EFR = TMS320C64X_REG_ECR,
176 | TMS320C64X_REG_IFR = TMS320C64X_REG_ISR,
177 | } tms320c64x_reg;
178 |
179 | typedef enum tms320c64x_insn {
180 | TMS320C64X_INS_INVALID = 0,
181 |
182 | TMS320C64X_INS_ABS,
183 | TMS320C64X_INS_ABS2,
184 | TMS320C64X_INS_ADD,
185 | TMS320C64X_INS_ADD2,
186 | TMS320C64X_INS_ADD4,
187 | TMS320C64X_INS_ADDAB,
188 | TMS320C64X_INS_ADDAD,
189 | TMS320C64X_INS_ADDAH,
190 | TMS320C64X_INS_ADDAW,
191 | TMS320C64X_INS_ADDK,
192 | TMS320C64X_INS_ADDKPC,
193 | TMS320C64X_INS_ADDU,
194 | TMS320C64X_INS_AND,
195 | TMS320C64X_INS_ANDN,
196 | TMS320C64X_INS_AVG2,
197 | TMS320C64X_INS_AVGU4,
198 | TMS320C64X_INS_B,
199 | TMS320C64X_INS_BDEC,
200 | TMS320C64X_INS_BITC4,
201 | TMS320C64X_INS_BNOP,
202 | TMS320C64X_INS_BPOS,
203 | TMS320C64X_INS_CLR,
204 | TMS320C64X_INS_CMPEQ,
205 | TMS320C64X_INS_CMPEQ2,
206 | TMS320C64X_INS_CMPEQ4,
207 | TMS320C64X_INS_CMPGT,
208 | TMS320C64X_INS_CMPGT2,
209 | TMS320C64X_INS_CMPGTU4,
210 | TMS320C64X_INS_CMPLT,
211 | TMS320C64X_INS_CMPLTU,
212 | TMS320C64X_INS_DEAL,
213 | TMS320C64X_INS_DOTP2,
214 | TMS320C64X_INS_DOTPN2,
215 | TMS320C64X_INS_DOTPNRSU2,
216 | TMS320C64X_INS_DOTPRSU2,
217 | TMS320C64X_INS_DOTPSU4,
218 | TMS320C64X_INS_DOTPU4,
219 | TMS320C64X_INS_EXT,
220 | TMS320C64X_INS_EXTU,
221 | TMS320C64X_INS_GMPGTU,
222 | TMS320C64X_INS_GMPY4,
223 | TMS320C64X_INS_LDB,
224 | TMS320C64X_INS_LDBU,
225 | TMS320C64X_INS_LDDW,
226 | TMS320C64X_INS_LDH,
227 | TMS320C64X_INS_LDHU,
228 | TMS320C64X_INS_LDNDW,
229 | TMS320C64X_INS_LDNW,
230 | TMS320C64X_INS_LDW,
231 | TMS320C64X_INS_LMBD,
232 | TMS320C64X_INS_MAX2,
233 | TMS320C64X_INS_MAXU4,
234 | TMS320C64X_INS_MIN2,
235 | TMS320C64X_INS_MINU4,
236 | TMS320C64X_INS_MPY,
237 | TMS320C64X_INS_MPY2,
238 | TMS320C64X_INS_MPYH,
239 | TMS320C64X_INS_MPYHI,
240 | TMS320C64X_INS_MPYHIR,
241 | TMS320C64X_INS_MPYHL,
242 | TMS320C64X_INS_MPYHLU,
243 | TMS320C64X_INS_MPYHSLU,
244 | TMS320C64X_INS_MPYHSU,
245 | TMS320C64X_INS_MPYHU,
246 | TMS320C64X_INS_MPYHULS,
247 | TMS320C64X_INS_MPYHUS,
248 | TMS320C64X_INS_MPYLH,
249 | TMS320C64X_INS_MPYLHU,
250 | TMS320C64X_INS_MPYLI,
251 | TMS320C64X_INS_MPYLIR,
252 | TMS320C64X_INS_MPYLSHU,
253 | TMS320C64X_INS_MPYLUHS,
254 | TMS320C64X_INS_MPYSU,
255 | TMS320C64X_INS_MPYSU4,
256 | TMS320C64X_INS_MPYU,
257 | TMS320C64X_INS_MPYU4,
258 | TMS320C64X_INS_MPYUS,
259 | TMS320C64X_INS_MVC,
260 | TMS320C64X_INS_MVD,
261 | TMS320C64X_INS_MVK,
262 | TMS320C64X_INS_MVKL,
263 | TMS320C64X_INS_MVKLH,
264 | TMS320C64X_INS_NOP,
265 | TMS320C64X_INS_NORM,
266 | TMS320C64X_INS_OR,
267 | TMS320C64X_INS_PACK2,
268 | TMS320C64X_INS_PACKH2,
269 | TMS320C64X_INS_PACKH4,
270 | TMS320C64X_INS_PACKHL2,
271 | TMS320C64X_INS_PACKL4,
272 | TMS320C64X_INS_PACKLH2,
273 | TMS320C64X_INS_ROTL,
274 | TMS320C64X_INS_SADD,
275 | TMS320C64X_INS_SADD2,
276 | TMS320C64X_INS_SADDU4,
277 | TMS320C64X_INS_SADDUS2,
278 | TMS320C64X_INS_SAT,
279 | TMS320C64X_INS_SET,
280 | TMS320C64X_INS_SHFL,
281 | TMS320C64X_INS_SHL,
282 | TMS320C64X_INS_SHLMB,
283 | TMS320C64X_INS_SHR,
284 | TMS320C64X_INS_SHR2,
285 | TMS320C64X_INS_SHRMB,
286 | TMS320C64X_INS_SHRU,
287 | TMS320C64X_INS_SHRU2,
288 | TMS320C64X_INS_SMPY,
289 | TMS320C64X_INS_SMPY2,
290 | TMS320C64X_INS_SMPYH,
291 | TMS320C64X_INS_SMPYHL,
292 | TMS320C64X_INS_SMPYLH,
293 | TMS320C64X_INS_SPACK2,
294 | TMS320C64X_INS_SPACKU4,
295 | TMS320C64X_INS_SSHL,
296 | TMS320C64X_INS_SSHVL,
297 | TMS320C64X_INS_SSHVR,
298 | TMS320C64X_INS_SSUB,
299 | TMS320C64X_INS_STB,
300 | TMS320C64X_INS_STDW,
301 | TMS320C64X_INS_STH,
302 | TMS320C64X_INS_STNDW,
303 | TMS320C64X_INS_STNW,
304 | TMS320C64X_INS_STW,
305 | TMS320C64X_INS_SUB,
306 | TMS320C64X_INS_SUB2,
307 | TMS320C64X_INS_SUB4,
308 | TMS320C64X_INS_SUBAB,
309 | TMS320C64X_INS_SUBABS4,
310 | TMS320C64X_INS_SUBAH,
311 | TMS320C64X_INS_SUBAW,
312 | TMS320C64X_INS_SUBC,
313 | TMS320C64X_INS_SUBU,
314 | TMS320C64X_INS_SWAP4,
315 | TMS320C64X_INS_UNPKHU4,
316 | TMS320C64X_INS_UNPKLU4,
317 | TMS320C64X_INS_XOR,
318 | TMS320C64X_INS_XPND2,
319 | TMS320C64X_INS_XPND4,
320 | // Aliases
321 | TMS320C64X_INS_IDLE,
322 | TMS320C64X_INS_MV,
323 | TMS320C64X_INS_NEG,
324 | TMS320C64X_INS_NOT,
325 | TMS320C64X_INS_SWAP2,
326 | TMS320C64X_INS_ZERO,
327 |
328 | TMS320C64X_INS_ENDING, // <-- mark the end of the list of instructions
329 | } tms320c64x_insn;
330 |
331 | typedef enum tms320c64x_insn_group {
332 | TMS320C64X_GRP_INVALID = 0, ///< = CS_GRP_INVALID
333 |
334 | TMS320C64X_GRP_JUMP, ///< = CS_GRP_JUMP
335 |
336 | TMS320C64X_GRP_FUNIT_D = 128,
337 | TMS320C64X_GRP_FUNIT_L,
338 | TMS320C64X_GRP_FUNIT_M,
339 | TMS320C64X_GRP_FUNIT_S,
340 | TMS320C64X_GRP_FUNIT_NO,
341 |
342 | TMS320C64X_GRP_ENDING, // <-- mark the end of the list of groups
343 | } tms320c64x_insn_group;
344 |
345 | typedef enum tms320c64x_funit {
346 | TMS320C64X_FUNIT_INVALID = 0,
347 | TMS320C64X_FUNIT_D,
348 | TMS320C64X_FUNIT_L,
349 | TMS320C64X_FUNIT_M,
350 | TMS320C64X_FUNIT_S,
351 | TMS320C64X_FUNIT_NO
352 | } tms320c64x_funit;
353 |
354 | #ifdef __cplusplus
355 | }
356 | #endif
357 |
358 | #endif
359 |
360 |
--------------------------------------------------------------------------------
/EDUReViver/include/capstone/xcore.h:
--------------------------------------------------------------------------------
1 | #ifndef CAPSTONE_XCORE_H
2 | #define CAPSTONE_XCORE_H
3 |
4 | /* Capstone Disassembly Engine */
5 | /* By Nguyen Anh Quynh , 2014-2015 */
6 |
7 | #ifdef __cplusplus
8 | extern "C" {
9 | #endif
10 |
11 | #include "platform.h"
12 |
13 | #ifdef _MSC_VER
14 | #pragma warning(disable:4201)
15 | #endif
16 |
17 | /// Operand type for instruction's operands
18 | typedef enum xcore_op_type {
19 | XCORE_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
20 | XCORE_OP_REG, ///< = CS_OP_REG (Register operand).
21 | XCORE_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
22 | XCORE_OP_MEM, ///< = CS_OP_MEM (Memory operand).
23 | } xcore_op_type;
24 |
25 | /// XCore registers
26 | typedef enum xcore_reg {
27 | XCORE_REG_INVALID = 0,
28 |
29 | XCORE_REG_CP,
30 | XCORE_REG_DP,
31 | XCORE_REG_LR,
32 | XCORE_REG_SP,
33 | XCORE_REG_R0,
34 | XCORE_REG_R1,
35 | XCORE_REG_R2,
36 | XCORE_REG_R3,
37 | XCORE_REG_R4,
38 | XCORE_REG_R5,
39 | XCORE_REG_R6,
40 | XCORE_REG_R7,
41 | XCORE_REG_R8,
42 | XCORE_REG_R9,
43 | XCORE_REG_R10,
44 | XCORE_REG_R11,
45 |
46 | // pseudo registers
47 | XCORE_REG_PC, ///< pc
48 |
49 | // internal thread registers
50 | // see The-XMOS-XS1-Architecture(X7879A).pdf
51 | XCORE_REG_SCP, ///< save pc
52 | XCORE_REG_SSR, //< save status
53 | XCORE_REG_ET, //< exception type
54 | XCORE_REG_ED, //< exception data
55 | XCORE_REG_SED, //< save exception data
56 | XCORE_REG_KEP, //< kernel entry pointer
57 | XCORE_REG_KSP, //< kernel stack pointer
58 | XCORE_REG_ID, //< thread ID
59 |
60 | XCORE_REG_ENDING, // <-- mark the end of the list of registers
61 | } xcore_reg;
62 |
63 | /// Instruction's operand referring to memory
64 | /// This is associated with XCORE_OP_MEM operand type above
65 | typedef struct xcore_op_mem {
66 | uint8_t base; ///< base register, can be safely interpreted as
67 | ///< a value of type `xcore_reg`, but it is only
68 | ///< one byte wide
69 | uint8_t index; ///< index register, same conditions apply here
70 | int32_t disp; ///< displacement/offset value
71 | int direct; ///< +1: forward, -1: backward
72 | } xcore_op_mem;
73 |
74 | /// Instruction operand
75 | typedef struct cs_xcore_op {
76 | xcore_op_type type; ///< operand type
77 | union {
78 | xcore_reg reg; ///< register value for REG operand
79 | int32_t imm; ///< immediate value for IMM operand
80 | xcore_op_mem mem; ///< base/disp value for MEM operand
81 | };
82 | } cs_xcore_op;
83 |
84 | /// Instruction structure
85 | typedef struct cs_xcore {
86 | /// Number of operands of this instruction,
87 | /// or 0 when instruction has no operand.
88 | uint8_t op_count;
89 | cs_xcore_op operands[8]; ///< operands for this instruction.
90 | } cs_xcore;
91 |
92 | /// XCore instruction
93 | typedef enum xcore_insn {
94 | XCORE_INS_INVALID = 0,
95 |
96 | XCORE_INS_ADD,
97 | XCORE_INS_ANDNOT,
98 | XCORE_INS_AND,
99 | XCORE_INS_ASHR,
100 | XCORE_INS_BAU,
101 | XCORE_INS_BITREV,
102 | XCORE_INS_BLA,
103 | XCORE_INS_BLAT,
104 | XCORE_INS_BL,
105 | XCORE_INS_BF,
106 | XCORE_INS_BT,
107 | XCORE_INS_BU,
108 | XCORE_INS_BRU,
109 | XCORE_INS_BYTEREV,
110 | XCORE_INS_CHKCT,
111 | XCORE_INS_CLRE,
112 | XCORE_INS_CLRPT,
113 | XCORE_INS_CLRSR,
114 | XCORE_INS_CLZ,
115 | XCORE_INS_CRC8,
116 | XCORE_INS_CRC32,
117 | XCORE_INS_DCALL,
118 | XCORE_INS_DENTSP,
119 | XCORE_INS_DGETREG,
120 | XCORE_INS_DIVS,
121 | XCORE_INS_DIVU,
122 | XCORE_INS_DRESTSP,
123 | XCORE_INS_DRET,
124 | XCORE_INS_ECALLF,
125 | XCORE_INS_ECALLT,
126 | XCORE_INS_EDU,
127 | XCORE_INS_EEF,
128 | XCORE_INS_EET,
129 | XCORE_INS_EEU,
130 | XCORE_INS_ENDIN,
131 | XCORE_INS_ENTSP,
132 | XCORE_INS_EQ,
133 | XCORE_INS_EXTDP,
134 | XCORE_INS_EXTSP,
135 | XCORE_INS_FREER,
136 | XCORE_INS_FREET,
137 | XCORE_INS_GETD,
138 | XCORE_INS_GET,
139 | XCORE_INS_GETN,
140 | XCORE_INS_GETR,
141 | XCORE_INS_GETSR,
142 | XCORE_INS_GETST,
143 | XCORE_INS_GETTS,
144 | XCORE_INS_INCT,
145 | XCORE_INS_INIT,
146 | XCORE_INS_INPW,
147 | XCORE_INS_INSHR,
148 | XCORE_INS_INT,
149 | XCORE_INS_IN,
150 | XCORE_INS_KCALL,
151 | XCORE_INS_KENTSP,
152 | XCORE_INS_KRESTSP,
153 | XCORE_INS_KRET,
154 | XCORE_INS_LADD,
155 | XCORE_INS_LD16S,
156 | XCORE_INS_LD8U,
157 | XCORE_INS_LDA16,
158 | XCORE_INS_LDAP,
159 | XCORE_INS_LDAW,
160 | XCORE_INS_LDC,
161 | XCORE_INS_LDW,
162 | XCORE_INS_LDIVU,
163 | XCORE_INS_LMUL,
164 | XCORE_INS_LSS,
165 | XCORE_INS_LSUB,
166 | XCORE_INS_LSU,
167 | XCORE_INS_MACCS,
168 | XCORE_INS_MACCU,
169 | XCORE_INS_MJOIN,
170 | XCORE_INS_MKMSK,
171 | XCORE_INS_MSYNC,
172 | XCORE_INS_MUL,
173 | XCORE_INS_NEG,
174 | XCORE_INS_NOT,
175 | XCORE_INS_OR,
176 | XCORE_INS_OUTCT,
177 | XCORE_INS_OUTPW,
178 | XCORE_INS_OUTSHR,
179 | XCORE_INS_OUTT,
180 | XCORE_INS_OUT,
181 | XCORE_INS_PEEK,
182 | XCORE_INS_REMS,
183 | XCORE_INS_REMU,
184 | XCORE_INS_RETSP,
185 | XCORE_INS_SETCLK,
186 | XCORE_INS_SET,
187 | XCORE_INS_SETC,
188 | XCORE_INS_SETD,
189 | XCORE_INS_SETEV,
190 | XCORE_INS_SETN,
191 | XCORE_INS_SETPSC,
192 | XCORE_INS_SETPT,
193 | XCORE_INS_SETRDY,
194 | XCORE_INS_SETSR,
195 | XCORE_INS_SETTW,
196 | XCORE_INS_SETV,
197 | XCORE_INS_SEXT,
198 | XCORE_INS_SHL,
199 | XCORE_INS_SHR,
200 | XCORE_INS_SSYNC,
201 | XCORE_INS_ST16,
202 | XCORE_INS_ST8,
203 | XCORE_INS_STW,
204 | XCORE_INS_SUB,
205 | XCORE_INS_SYNCR,
206 | XCORE_INS_TESTCT,
207 | XCORE_INS_TESTLCL,
208 | XCORE_INS_TESTWCT,
209 | XCORE_INS_TSETMR,
210 | XCORE_INS_START,
211 | XCORE_INS_WAITEF,
212 | XCORE_INS_WAITET,
213 | XCORE_INS_WAITEU,
214 | XCORE_INS_XOR,
215 | XCORE_INS_ZEXT,
216 |
217 | XCORE_INS_ENDING, // <-- mark the end of the list of instructions
218 | } xcore_insn;
219 |
220 | /// Group of XCore instructions
221 | typedef enum xcore_insn_group {
222 | XCORE_GRP_INVALID = 0, ///< = CS_GRP_INVALID
223 |
224 | // Generic groups
225 | // all jump instructions (conditional+direct+indirect jumps)
226 | XCORE_GRP_JUMP, ///< = CS_GRP_JUMP
227 |
228 | XCORE_GRP_ENDING, // <-- mark the end of the list of groups
229 | } xcore_insn_group;
230 |
231 | #ifdef __cplusplus
232 | }
233 | #endif
234 |
235 | #endif
236 |
--------------------------------------------------------------------------------
/EDUReViver/include/platform.h:
--------------------------------------------------------------------------------
1 | /* Capstone Disassembly Engine */
2 | /* By Axel Souchet & Nguyen Anh Quynh, 2014 */
3 |
4 | #ifndef CAPSTONE_PLATFORM_H
5 | #define CAPSTONE_PLATFORM_H
6 |
7 | // handle C99 issue (for pre-2013 VisualStudio)
8 | #if !defined(__CYGWIN__) && !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64))
9 | // MSVC
10 |
11 | // stdbool.h
12 | #if (_MSC_VER < 1800) || defined(_KERNEL_MODE)
13 | // this system does not have stdbool.h
14 | #ifndef __cplusplus
15 | typedef unsigned char bool;
16 | #define false 0
17 | #define true 1
18 | #endif
19 |
20 | #else
21 | // VisualStudio 2013+ -> C99 is supported
22 | #include
23 | #endif
24 |
25 | #else
26 | // not MSVC -> C99 is supported
27 | #include
28 | #endif
29 |
30 |
31 | // handle C99 issue (for pre-2013 VisualStudio)
32 | #if defined(CAPSTONE_HAS_OSXKERNEL) || (defined(_MSC_VER) && (_MSC_VER <= 1700 || defined(_KERNEL_MODE)))
33 | // this system does not have inttypes.h
34 |
35 | #if defined(_MSC_VER) && (_MSC_VER < 1600 || defined(_KERNEL_MODE))
36 | // this system does not have stdint.h
37 | typedef signed char int8_t;
38 | typedef signed short int16_t;
39 | typedef signed int int32_t;
40 | typedef unsigned char uint8_t;
41 | typedef unsigned short uint16_t;
42 | typedef unsigned int uint32_t;
43 | typedef signed long long int64_t;
44 | typedef unsigned long long uint64_t;
45 |
46 | #define INT8_MIN (-127i8 - 1)
47 | #define INT16_MIN (-32767i16 - 1)
48 | #define INT32_MIN (-2147483647i32 - 1)
49 | #define INT64_MIN (-9223372036854775807i64 - 1)
50 | #define INT8_MAX 127i8
51 | #define INT16_MAX 32767i16
52 | #define INT32_MAX 2147483647i32
53 | #define INT64_MAX 9223372036854775807i64
54 | #define UINT8_MAX 0xffui8
55 | #define UINT16_MAX 0xffffui16
56 | #define UINT32_MAX 0xffffffffui32
57 | #define UINT64_MAX 0xffffffffffffffffui64
58 | #endif
59 |
60 | #define __PRI_8_LENGTH_MODIFIER__ "hh"
61 | #define __PRI_64_LENGTH_MODIFIER__ "ll"
62 |
63 | #define PRId8 __PRI_8_LENGTH_MODIFIER__ "d"
64 | #define PRIi8 __PRI_8_LENGTH_MODIFIER__ "i"
65 | #define PRIo8 __PRI_8_LENGTH_MODIFIER__ "o"
66 | #define PRIu8 __PRI_8_LENGTH_MODIFIER__ "u"
67 | #define PRIx8 __PRI_8_LENGTH_MODIFIER__ "x"
68 | #define PRIX8 __PRI_8_LENGTH_MODIFIER__ "X"
69 |
70 | #define PRId16 "hd"
71 | #define PRIi16 "hi"
72 | #define PRIo16 "ho"
73 | #define PRIu16 "hu"
74 | #define PRIx16 "hx"
75 | #define PRIX16 "hX"
76 |
77 | #if defined(_MSC_VER) && _MSC_VER <= 1700
78 | #define PRId32 "ld"
79 | #define PRIi32 "li"
80 | #define PRIo32 "lo"
81 | #define PRIu32 "lu"
82 | #define PRIx32 "lx"
83 | #define PRIX32 "lX"
84 | #else // OSX
85 | #define PRId32 "d"
86 | #define PRIi32 "i"
87 | #define PRIo32 "o"
88 | #define PRIu32 "u"
89 | #define PRIx32 "x"
90 | #define PRIX32 "X"
91 | #endif
92 |
93 | #if defined(_MSC_VER) && _MSC_VER <= 1700
94 | // redefine functions from inttypes.h used in cstool
95 | #define strtoull _strtoui64
96 | #endif
97 |
98 | #define PRId64 __PRI_64_LENGTH_MODIFIER__ "d"
99 | #define PRIi64 __PRI_64_LENGTH_MODIFIER__ "i"
100 | #define PRIo64 __PRI_64_LENGTH_MODIFIER__ "o"
101 | #define PRIu64 __PRI_64_LENGTH_MODIFIER__ "u"
102 | #define PRIx64 __PRI_64_LENGTH_MODIFIER__ "x"
103 | #define PRIX64 __PRI_64_LENGTH_MODIFIER__ "X"
104 |
105 | #else
106 | // this system has inttypes.h by default
107 | #include
108 | #endif
109 |
110 | #endif
111 |
--------------------------------------------------------------------------------
/EDUReViver/include/vc2008/stdint.h:
--------------------------------------------------------------------------------
1 | /* ISO C9x 7.18 Integer types
2 | * Based on ISO/IEC SC22/WG14 9899 Committee draft (SC22 N2794)
3 | *
4 | * THIS SOFTWARE IS NOT COPYRIGHTED
5 | *
6 | * Contributor: Danny Smith
7 | *
8 | * This source code is offered for use in the public domain. You may
9 | * use, modify or distribute it freely.
10 | *
11 | * This code is distributed in the hope that it will be useful but
12 | * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
13 | * DISCLAIMED. This includes but is not limited to warranties of
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
15 | *
16 | * Date: 2000-12-02
17 | *
18 | * mwb: This was modified in the following ways:
19 | *
20 | * - make it compatible with Visual C++ 6 (which uses
21 | * non-standard keywords and suffixes for 64-bit types)
22 | * - some environments need stddef.h included (for wchar stuff?)
23 | * - handle the fact that Microsoft's limits.h header defines
24 | * SIZE_MAX
25 | * - make corrections for SIZE_MAX, INTPTR_MIN, INTPTR_MAX, UINTPTR_MAX,
26 | * PTRDIFF_MIN, PTRDIFF_MAX, SIG_ATOMIC_MIN, and SIG_ATOMIC_MAX
27 | * to be 64-bit aware.
28 | */
29 |
30 |
31 | #ifndef _STDINT_H
32 | #define _STDINT_H
33 | #define __need_wint_t
34 | #define __need_wchar_t
35 | #include
36 | #include
37 |
38 | #if _MSC_VER && (_MSC_VER < 1300)
39 | /* using MSVC 6 or earlier - no "long long" type, but might have _int64 type */
40 | #define __STDINT_LONGLONG __int64
41 | #define __STDINT_LONGLONG_SUFFIX i64
42 | #else
43 | #define __STDINT_LONGLONG long long
44 | #define __STDINT_LONGLONG_SUFFIX LL
45 | #endif
46 |
47 | #if !defined( PASTE)
48 | #define PASTE2( x, y) x##y
49 | #define PASTE( x, y) PASTE2( x, y)
50 | #endif /* PASTE */
51 |
52 |
53 | /* 7.18.1.1 Exact-width integer types */
54 | typedef signed char int8_t;
55 | typedef unsigned char uint8_t;
56 | typedef short int16_t;
57 | typedef unsigned short uint16_t;
58 | typedef int int32_t;
59 | typedef unsigned uint32_t;
60 | typedef __STDINT_LONGLONG int64_t;
61 | typedef unsigned __STDINT_LONGLONG uint64_t;
62 |
63 | /* 7.18.1.2 Minimum-width integer types */
64 | typedef signed char int_least8_t;
65 | typedef unsigned char uint_least8_t;
66 | typedef short int_least16_t;
67 | typedef unsigned short uint_least16_t;
68 | typedef int int_least32_t;
69 | typedef unsigned uint_least32_t;
70 | typedef __STDINT_LONGLONG int_least64_t;
71 | typedef unsigned __STDINT_LONGLONG uint_least64_t;
72 |
73 | /* 7.18.1.3 Fastest minimum-width integer types
74 | * Not actually guaranteed to be fastest for all purposes
75 | * Here we use the exact-width types for 8 and 16-bit ints.
76 | */
77 | typedef char int_fast8_t;
78 | typedef unsigned char uint_fast8_t;
79 | typedef short int_fast16_t;
80 | typedef unsigned short uint_fast16_t;
81 | typedef int int_fast32_t;
82 | typedef unsigned int uint_fast32_t;
83 | typedef __STDINT_LONGLONG int_fast64_t;
84 | typedef unsigned __STDINT_LONGLONG uint_fast64_t;
85 |
86 | /* 7.18.1.4 Integer types capable of holding object pointers */
87 | #ifndef _INTPTR_T_DEFINED
88 | #define _INTPTR_T_DEFINED
89 | #ifdef _WIN64
90 | typedef __STDINT_LONGLONG intptr_t
91 | #else
92 | typedef int intptr_t;
93 | #endif /* _WIN64 */
94 | #endif /* _INTPTR_T_DEFINED */
95 |
96 | #ifndef _UINTPTR_T_DEFINED
97 | #define _UINTPTR_T_DEFINED
98 | #ifdef _WIN64
99 | typedef unsigned __STDINT_LONGLONG uintptr_t
100 | #else
101 | typedef unsigned int uintptr_t;
102 | #endif /* _WIN64 */
103 | #endif /* _UINTPTR_T_DEFINED */
104 |
105 | /* 7.18.1.5 Greatest-width integer types */
106 | typedef __STDINT_LONGLONG intmax_t;
107 | typedef unsigned __STDINT_LONGLONG uintmax_t;
108 |
109 | /* 7.18.2 Limits of specified-width integer types */
110 | #if !defined ( __cplusplus) || defined (__STDC_LIMIT_MACROS)
111 |
112 | /* 7.18.2.1 Limits of exact-width integer types */
113 | #define INT8_MIN (-128)
114 | #define INT16_MIN (-32768)
115 | #define INT32_MIN (-2147483647 - 1)
116 | #define INT64_MIN (PASTE( -9223372036854775807, __STDINT_LONGLONG_SUFFIX) - 1)
117 |
118 | #define INT8_MAX 127
119 | #define INT16_MAX 32767
120 | #define INT32_MAX 2147483647
121 | #define INT64_MAX (PASTE( 9223372036854775807, __STDINT_LONGLONG_SUFFIX))
122 |
123 | #define UINT8_MAX 0xff /* 255U */
124 | #define UINT16_MAX 0xffff /* 65535U */
125 | #define UINT32_MAX 0xffffffff /* 4294967295U */
126 | #define UINT64_MAX (PASTE( 0xffffffffffffffffU, __STDINT_LONGLONG_SUFFIX)) /* 18446744073709551615ULL */
127 |
128 | /* 7.18.2.2 Limits of minimum-width integer types */
129 | #define INT_LEAST8_MIN INT8_MIN
130 | #define INT_LEAST16_MIN INT16_MIN
131 | #define INT_LEAST32_MIN INT32_MIN
132 | #define INT_LEAST64_MIN INT64_MIN
133 |
134 | #define INT_LEAST8_MAX INT8_MAX
135 | #define INT_LEAST16_MAX INT16_MAX
136 | #define INT_LEAST32_MAX INT32_MAX
137 | #define INT_LEAST64_MAX INT64_MAX
138 |
139 | #define UINT_LEAST8_MAX UINT8_MAX
140 | #define UINT_LEAST16_MAX UINT16_MAX
141 | #define UINT_LEAST32_MAX UINT32_MAX
142 | #define UINT_LEAST64_MAX UINT64_MAX
143 |
144 | /* 7.18.2.3 Limits of fastest minimum-width integer types */
145 | #define INT_FAST8_MIN INT8_MIN
146 | #define INT_FAST16_MIN INT16_MIN
147 | #define INT_FAST32_MIN INT32_MIN
148 | #define INT_FAST64_MIN INT64_MIN
149 |
150 | #define INT_FAST8_MAX INT8_MAX
151 | #define INT_FAST16_MAX INT16_MAX
152 | #define INT_FAST32_MAX INT32_MAX
153 | #define INT_FAST64_MAX INT64_MAX
154 |
155 | #define UINT_FAST8_MAX UINT8_MAX
156 | #define UINT_FAST16_MAX UINT16_MAX
157 | #define UINT_FAST32_MAX UINT32_MAX
158 | #define UINT_FAST64_MAX UINT64_MAX
159 |
160 | /* 7.18.2.4 Limits of integer types capable of holding
161 | object pointers */
162 | #ifdef _WIN64
163 | #define INTPTR_MIN INT64_MIN
164 | #define INTPTR_MAX INT64_MAX
165 | #define UINTPTR_MAX UINT64_MAX
166 | #else
167 | #define INTPTR_MIN INT32_MIN
168 | #define INTPTR_MAX INT32_MAX
169 | #define UINTPTR_MAX UINT32_MAX
170 | #endif /* _WIN64 */
171 |
172 | /* 7.18.2.5 Limits of greatest-width integer types */
173 | #define INTMAX_MIN INT64_MIN
174 | #define INTMAX_MAX INT64_MAX
175 | #define UINTMAX_MAX UINT64_MAX
176 |
177 | /* 7.18.3 Limits of other integer types */
178 | #define PTRDIFF_MIN INTPTR_MIN
179 | #define PTRDIFF_MAX INTPTR_MAX
180 |
181 | #define SIG_ATOMIC_MIN INTPTR_MIN
182 | #define SIG_ATOMIC_MAX INTPTR_MAX
183 |
184 | /* we need to check for SIZE_MAX already defined because MS defines it in limits.h */
185 | #ifndef SIZE_MAX
186 | #define SIZE_MAX UINTPTR_MAX
187 | #endif
188 |
189 | #ifndef WCHAR_MIN /* also in wchar.h */
190 | #define WCHAR_MIN 0
191 | #define WCHAR_MAX ((wchar_t)-1) /* UINT16_MAX */
192 | #endif
193 |
194 | /*
195 | * wint_t is unsigned short for compatibility with MS runtime
196 | */
197 | #define WINT_MIN 0
198 | #define WINT_MAX ((wint_t)-1) /* UINT16_MAX */
199 |
200 | #endif /* !defined ( __cplusplus) || defined __STDC_LIMIT_MACROS */
201 |
202 |
203 | /* 7.18.4 Macros for integer constants */
204 | #if !defined ( __cplusplus) || defined (__STDC_CONSTANT_MACROS)
205 |
206 | /* 7.18.4.1 Macros for minimum-width integer constants
207 |
208 | Accoding to Douglas Gwyn :
209 | "This spec was changed in ISO/IEC 9899:1999 TC1; in ISO/IEC
210 | 9899:1999 as initially published, the expansion was required
211 | to be an integer constant of precisely matching type, which
212 | is impossible to accomplish for the shorter types on most
213 | platforms, because C99 provides no standard way to designate
214 | an integer constant with width less than that of type int.
215 | TC1 changed this to require just an integer constant
216 | *expression* with *promoted* type."
217 | */
218 |
219 | #define INT8_C(val) ((int8_t) + (val))
220 | #define UINT8_C(val) ((uint8_t) + (val##U))
221 | #define INT16_C(val) ((int16_t) + (val))
222 | #define UINT16_C(val) ((uint16_t) + (val##U))
223 |
224 | #define INT32_C(val) val##L
225 | #define UINT32_C(val) val##UL
226 | #define INT64_C(val) (PASTE( val, __STDINT_LONGLONG_SUFFIX))
227 | #define UINT64_C(val)(PASTE( PASTE( val, U), __STDINT_LONGLONG_SUFFIX))
228 |
229 | /* 7.18.4.2 Macros for greatest-width integer constants */
230 | #define INTMAX_C(val) INT64_C(val)
231 | #define UINTMAX_C(val) UINT64_C(val)
232 |
233 | #endif /* !defined ( __cplusplus) || defined __STDC_CONSTANT_MACROS */
234 |
235 | #endif
--------------------------------------------------------------------------------
/EDUReViver/include/windowsce/intrin.h:
--------------------------------------------------------------------------------
1 |
2 | #if defined(_MSC_VER) && defined(_WIN32_WCE) && (_WIN32_WCE < 0x800) && !defined(__INTRIN_H_) && !defined(_INTRIN)
3 | #define _STDINT
4 |
5 | #ifdef _M_ARM
6 | #include
7 | #if (_WIN32_WCE >= 0x700) && defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__)
8 | #include
9 | #endif
10 | #endif // _M_ARM
11 |
12 | #endif
13 |
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/EDUReViver/include/windowsce/stdint.h:
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1 |
2 | #if defined(_MSC_VER) && defined(_WIN32_WCE) && (_WIN32_WCE < 0x800) && !defined(_STDINT_H_) && !defined(_STDINT)
3 | #define _STDINT
4 |
5 | typedef __int8
6 | int8_t,
7 | int_least8_t;
8 |
9 | typedef __int16
10 | int16_t,
11 | int_least16_t;
12 |
13 | typedef __int32
14 | int32_t,
15 | int_least32_t,
16 | int_fast8_t,
17 | int_fast16_t,
18 | int_fast32_t;
19 |
20 | typedef __int64
21 | int64_t,
22 | intmax_t,
23 | int_least64_t,
24 | int_fast64_t;
25 |
26 | typedef unsigned __int8
27 | uint8_t,
28 | uint_least8_t;
29 |
30 | typedef unsigned __int16
31 | uint16_t,
32 | uint_least16_t;
33 |
34 | typedef unsigned __int32
35 | uint32_t,
36 | uint_least32_t,
37 | uint_fast8_t,
38 | uint_fast16_t,
39 | uint_fast32_t;
40 |
41 | typedef unsigned __int64
42 | uint64_t,
43 | uintmax_t,
44 | uint_least64_t,
45 | uint_fast64_t;
46 |
47 | #ifndef _INTPTR_T_DEFINED
48 | #define _INTPTR_T_DEFINED
49 | typedef __int32 intptr_t;
50 | #endif
51 |
52 | #ifndef _UINTPTR_T_DEFINED
53 | #define _UINTPTR_T_DEFINED
54 | typedef unsigned __int32 uintptr_t;
55 | #endif
56 |
57 | #define INT8_MIN (-127i8 - 1)
58 | #define INT16_MIN (-32767i16 - 1)
59 | #define INT32_MIN (-2147483647i32 - 1)
60 | #define INT64_MIN (-9223372036854775807i64 - 1)
61 | #define INT8_MAX 127i8
62 | #define INT16_MAX 32767i16
63 | #define INT32_MAX 2147483647i32
64 | #define INT64_MAX 9223372036854775807i64
65 | #define UINT8_MAX 0xffui8
66 | #define UINT16_MAX 0xffffui16
67 | #define UINT32_MAX 0xffffffffui32
68 | #define UINT64_MAX 0xffffffffffffffffui64
69 |
70 | #define INT_LEAST8_MIN INT8_MIN
71 | #define INT_LEAST16_MIN INT16_MIN
72 | #define INT_LEAST32_MIN INT32_MIN
73 | #define INT_LEAST64_MIN INT64_MIN
74 | #define INT_LEAST8_MAX INT8_MAX
75 | #define INT_LEAST16_MAX INT16_MAX
76 | #define INT_LEAST32_MAX INT32_MAX
77 | #define INT_LEAST64_MAX INT64_MAX
78 | #define UINT_LEAST8_MAX UINT8_MAX
79 | #define UINT_LEAST16_MAX UINT16_MAX
80 | #define UINT_LEAST32_MAX UINT32_MAX
81 | #define UINT_LEAST64_MAX UINT64_MAX
82 |
83 | #define INT_FAST8_MIN INT8_MIN
84 | #define INT_FAST16_MIN INT32_MIN
85 | #define INT_FAST32_MIN INT32_MIN
86 | #define INT_FAST64_MIN INT64_MIN
87 | #define INT_FAST8_MAX INT8_MAX
88 | #define INT_FAST16_MAX INT32_MAX
89 | #define INT_FAST32_MAX INT32_MAX
90 | #define INT_FAST64_MAX INT64_MAX
91 | #define UINT_FAST8_MAX UINT8_MAX
92 | #define UINT_FAST16_MAX UINT32_MAX
93 | #define UINT_FAST32_MAX UINT32_MAX
94 | #define UINT_FAST64_MAX UINT64_MAX
95 |
96 | #define INTPTR_MIN INT32_MIN
97 | #define INTPTR_MAX INT32_MAX
98 | #define UINTPTR_MAX UINT32_MAX
99 |
100 | #define INTMAX_MIN INT64_MIN
101 | #define INTMAX_MAX INT64_MAX
102 | #define UINTMAX_MAX UINT64_MAX
103 |
104 | #define PTRDIFF_MIN INTPTR_MIN
105 | #define PTRDIFF_MAX INTPTR_MAX
106 |
107 | #ifndef SIZE_MAX
108 | #define SIZE_MAX UINTPTR_MAX
109 | #endif
110 |
111 | #define SIG_ATOMIC_MIN INT32_MIN
112 | #define SIG_ATOMIC_MAX INT32_MAX
113 |
114 | #define WCHAR_MIN 0x0000
115 | #define WCHAR_MAX 0xffff
116 |
117 | #define WINT_MIN 0x0000
118 | #define WINT_MAX 0xffff
119 |
120 | #define INT8_C(x) (x)
121 | #define INT16_C(x) (x)
122 | #define INT32_C(x) (x)
123 | #define INT64_C(x) (x ## LL)
124 |
125 | #define UINT8_C(x) (x)
126 | #define UINT16_C(x) (x)
127 | #define UINT32_C(x) (x ## U)
128 | #define UINT64_C(x) (x ## ULL)
129 |
130 | #define INTMAX_C(x) INT64_C(x)
131 | #define UINTMAX_C(x) UINT64_C(x)
132 |
133 | #endif
134 |
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/EDUReViver/lib/capstone.lib:
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https://raw.githubusercontent.com/banxian/EDUReviver/31db6c94b3389f7d790c86210de409ab918215c4/EDUReViver/lib/capstone.lib
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/EDUReViver/lib/capstone_dll.lib:
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https://raw.githubusercontent.com/banxian/EDUReviver/31db6c94b3389f7d790c86210de409ab918215c4/EDUReViver/lib/capstone_dll.lib
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/EDUReViver/lib/capstone_dll_d.lib:
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https://raw.githubusercontent.com/banxian/EDUReviver/31db6c94b3389f7d790c86210de409ab918215c4/EDUReViver/lib/capstone_dll_d.lib
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/EDUReViver/packages.config:
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1 |
2 |
3 |
4 |
5 |
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/EDUReViver/targetver.h:
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1 | #pragma once
2 |
3 | // The following macros define the minimum required platform. The minimum required platform
4 | // is the earliest version of Windows, Internet Explorer etc. that has the necessary features to run
5 | // your application. The macros work by enabling all features available on platform versions up to and
6 | // including the version specified.
7 |
8 | // Modify the following defines if you have to target a platform prior to the ones specified below.
9 | // Refer to MSDN for the latest info on corresponding values for different platforms.
10 | #ifndef WINVER // Specifies that the minimum required platform is Windows Vista.
11 | #define WINVER 0x0600 // Change this to the appropriate value to target other versions of Windows.
12 | #endif
13 |
14 | #ifndef _WIN32_WINNT // Specifies that the minimum required platform is Windows Vista.
15 | #define _WIN32_WINNT 0x0600 // Change this to the appropriate value to target other versions of Windows.
16 | #endif
17 |
18 | #ifndef _WIN32_WINDOWS // Specifies that the minimum required platform is Windows 98.
19 | #define _WIN32_WINDOWS 0x0410 // Change this to the appropriate value to target Windows Me or later.
20 | #endif
21 |
22 | #ifndef _WIN32_IE // Specifies that the minimum required platform is Internet Explorer 7.0.
23 | #define _WIN32_IE 0x0700 // Change this to the appropriate value to target other versions of IE.
24 | #endif
25 |
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/EDUReViver/usbconn.h:
--------------------------------------------------------------------------------
1 | #ifndef _USB_CONN_H
2 | #define _USB_CONN_H
3 |
4 | #define WIN32_LEAN_AND_MEAN
5 | #include
6 | #include
7 | #include
8 | #include