├── Design.v ├── README.md ├── Testbench.v ├── transcript └── values.xlsx /Design.v: -------------------------------------------------------------------------------- 1 | module Modulator_Assemblage(out,Din,Mod,Freq,clk); 2 | input Din; //Input Data stream 3 | input [1:0]Freq,Mod; //Freq selects frequency range of output modulated wave, Mod selects type of modulation 4 | input clk; 5 | output [15:0] out; //output modulated signal 6 | 7 | 8 | wire [5:0]clk_; 9 | wire CLK; 10 | wire [15:0] w1,w2,w3,w4; //w1-BPSK Modulated Signal, w2-QPSK Modulated Signal, w3-FSK Modulated Signal, w4-ASK Modulated Signal 11 | 12 | counter CLK_divide(clk_,clk); //clk_[0]=clk/2 clk_[1]=clk/4 clk_[2]=clk/8 <= in terms of frequencies 13 | mux_4w mux_1(CLK,clk,clk_[0],clk_[1],clk_[2],Freq); //Selects clock of appropriate frequency based on input Freq 14 | 15 | FSK fsk(w1,Din,CLK); //FSK Modulator 16 | ASK ask(w2,Din,CLK); //ASK Modulator 17 | BPSK bpsk(w3,Din,CLK); //BPSK Modulator 18 | QPSK qpsk(w4,Din,CLK,clk_[5]); //QPSK Modulator 19 | 20 | 21 | mux_16_4w mux_16_4w_1(out,w1,w2,w3,w4,Mod); //Selects appropriate modulation based on input Mod 22 | 23 | endmodule 24 | 25 | module QPSK(out,Din,clk,pulse); //QPSK Modulator 26 | input Din,clk,pulse; //pulse varies in every 64ps 27 | output [15:0]out; 28 | 29 | wire [5:0]r; 30 | reg [5:0]t; 31 | reg [1:0]s; //stores 2-bit symbol 32 | reg q1,q2; 33 | 34 | initial 35 | begin 36 | t=0; 37 | end 38 | always@(posedge clk) 39 | begin 40 | t=t+1; 41 | end 42 | always@(negedge pulse) //symbol is obtained on negative edge of pulse 43 | begin 44 | s[1]=q2; 45 | s[0]=q1; 46 | if(s==2'b01) 47 | t=t+16; 48 | else if(s==2'b10) 49 | t=t+32; 50 | else if(s==2'b11) 51 | t=t+48; 52 | end 53 | always@(pulse) 54 | begin 55 | if(pulse==0) //pulse=0 value stored in q1 56 | q1=Din; 57 | else 58 | q2=Din; //pulse=1 value stored in q2 59 | end 60 | andgat and_1[5:0](r,6'b111111,t); 61 | sine_wave_generator SWG_1(out,r); 62 | endmodule 63 | 64 | module ASK(out,Din,clk); //ASK Modulator 65 | input Din,clk; //Din=input data stream 66 | output [15:0] out; //Modulated signal 67 | 68 | wire [15:0] wave,HA_wave; //wave-normal amplitude sinusoidal wave, HA_wave-High amplitude sinusoidal wave 69 | wire [5:0]t; //t - running variable(0->63) that selects appropriate sine value from sine wave generator 70 | 71 | counter count_1(t,clk); //t counts 0->63 based on clk 72 | sine_wave_generator SWG(wave,t); //wave=sine value corresponding to t 73 | mult_16 mult_1(HA_wave,wave,16'b0000000000001010); //HA_wave=10xwave 74 | mux_16 mux_1(out,16'b00010011100010000,HA_wave,Din); //Din=1 => High amplitude , Din=0 => Zero amplitude 75 | endmodule 76 | 77 | module FSK(out,Din,clk); //FSK Modulator 78 | input Din,clk; //Din=input data stream 79 | output [15:0] out; //Modulated signal 80 | 81 | wire clk_b2,clk_b4,CLK; 82 | wire [5:0]t; 83 | 84 | T_FF tff_1(clk_b2,1'b1,clk); //clk_b2=clk/2 85 | T_FF tff_2(clk_b4,1'b1,clk_b2); //clk_b4=clk_b2/2=clk/4 86 | 87 | mux mux_1(CLK,clk_b4,clk,Din); //Din=1 => CLK=clk , Din=0 => CLK=clk_b4 88 | counter count_1(t,CLK); //t counts 0->63 based on CLK 89 | sine_wave_generator SWG(out,t); //out=sine value corresponding to t 90 | endmodule 91 | 92 | module BPSK(out,Din,clk); //BPSK Modulator 93 | input Din,clk; //Din=input data stream 94 | output [15:0] out; //Modulated signal 95 | 96 | wire [15:0]wave,wave_Pi; //wave_Pi=sinusoidal wave with a phase diff of Pi 97 | wire [5:0]t; 98 | 99 | counter count_1(t,clk); //t counts 0->63 based on CLK 100 | sine_wave_generator SWG(wave,t); //Generate sinusoidal wave in accordance to t 101 | sine_wave_Pi_shift SWG_1(wave_Pi,t); //Generate sinusoidal wave with a Pi phase diff 102 | mux_16 mux_1(out,wave_Pi,wave,Din); //Din=1 => phase diff=0 , Din=0 => phase diff=180 degreee 103 | endmodule 104 | 105 | 106 | module demux(o1,o2,i,s); //1x2 DEMUX 107 | 108 | input i,s; 109 | output o1,o2; 110 | wire x,s_,w1,w2,w3,w4; 111 | 112 | not(s_,s); 113 | and(w1,s_,i); 114 | and(w2,s,i); 115 | and(w3,s,x); 116 | and(w4,s_,x); 117 | or(o1,w1,w3); 118 | or(o2,w2,w4); 119 | endmodule 120 | 121 | module mux(o,i1,i2,s); //2x1 MUX 122 | input i1,i2,s; 123 | output o; 124 | wire x1,x2,sc; 125 | not(sc,s); 126 | and(x1,i1,sc); 127 | and(x2,i2,s); 128 | or(o,x1,x2); 129 | endmodule 130 | 131 | module mux_4w(o,i1,i2,i3,i4,s); //4x1 MUX 132 | input i1,i2,i3,i4; 133 | input [1:0]s; 134 | output o; 135 | wire w1,w2; 136 | 137 | mux mux_1(w1,i1,i2,s[0]); 138 | mux mux_2(w2,i3,i4,s[0]); 139 | mux mux_3(o,w1,w2,s[1]); 140 | endmodule 141 | 142 | module mux_16(o,i1,i2,s); //2x1 MUX with 16-bit I/O 143 | input [15:0]i1,i2; 144 | input s; 145 | output [15:0]o; 146 | mux mux_1[15:0](o,i1,i2,s); 147 | endmodule 148 | 149 | module mux_16_4w(o,i1,i2,i3,i4,s); //4x1 MUX with 16-bit I/O 150 | input [15:0]i1,i2,i3,i4; 151 | input [1:0]s; 152 | output [15:0]o; 153 | wire [15:0]w1,w2; 154 | 155 | mux_16 mux_1(w1,i1,i2,s[0]); 156 | mux_16 mux_2(w2,i3,i4,s[0]); 157 | mux_16 mux_3(o,w1,w2,s[1]); 158 | endmodule 159 | 160 | module mux_16_8w(o,i1,i2,i3,i4,i5,i6,i7,i8,s); //8x1 MUX with 16-bit I/O 161 | input [15:0]i1,i2,i3,i4,i5,i6,i7,i8; 162 | input [2:0]s; 163 | output [15:0]o; 164 | wire [15:0]x1,x2,x3,x4; 165 | wire [15:0]y1,y2; 166 | 167 | mux_16 mux_16_1(x1,i1,i2,s[0]); 168 | mux_16 mux_16_2(x2,i3,i4,s[0]); 169 | mux_16 mux_16_3(x3,i5,i6,s[0]); 170 | mux_16 mux_16_4(x4,i7,i8,s[0]); 171 | 172 | mux_16 mux_16_5(y1,x1,x2,s[1]); 173 | mux_16 mux_16_6(y2,x3,x4,s[1]); 174 | 175 | mux_16 mux_16_7(o,y1,y2,s[2]); 176 | 177 | endmodule 178 | 179 | /* 64x1 MUX with 16-bit I/O */ 180 | 181 | module mux_16_64w(o,i1,i2,i3,i4,i5,i6,i7,i8,i9,i10,i11,i12,i13,i14,i15,i16,i17,i18,i19,i20,i21,i22,i23,i24,i25,i26,i27,i28,i29,i30,i31,i32,i33,i34,i35,i36,i37,i38,i39,i40,i41,i42,i43,i44,i45,i46,i47,i48,i49,i50,i51,i52,i53,i54,i55,i56,i57,i58,i59,i60,i61,i62,i63,i64,s); 182 | input [15:0]i1,i2,i3,i4,i5,i6,i7,i8,i9,i10,i11,i12,i13,i14,i15,i16,i17,i18,i19,i20,i21,i22,i23,i24,i25,i26,i27,i28,i29,i30,i31,i32,i33,i34,i35,i36,i37,i38,i39,i40,i41,i42,i43,i44,i45,i46,i47,i48,i49,i50,i51,i52,i53,i54,i55,i56,i57,i58,i59,i60,i61,i62,i63,i64; 183 | input [5:0]s; 184 | output [15:0]o; 185 | wire [15:0]x1,x2,x3,x4,x5,x6,x7,x8; 186 | 187 | mux_16_8w mux_16_8w_1(x1,i1,i2,i3,i4,i5,i6,i7,i8,s[2:0]); 188 | mux_16_8w mux_16_8w_2(x2,i9,i10,i11,i12,i13,i14,i15,i16,s[2:0]); 189 | mux_16_8w mux_16_8w_3(x3,i17,i18,i19,i20,i21,i22,i23,i24,s[2:0]); 190 | mux_16_8w mux_16_8w_4(x4,i25,i26,i27,i28,i29,i30,i31,i32,s[2:0]); 191 | mux_16_8w mux_16_8w_5(x5,i33,i34,i35,i36,i37,i38,i39,i40,s[2:0]); 192 | mux_16_8w mux_16_8w_6(x6,i41,i42,i43,i44,i45,i46,i47,i48,s[2:0]); 193 | mux_16_8w mux_16_8w_7(x7,i49,i50,i51,i52,i53,i54,i55,i56,s[2:0]); 194 | mux_16_8w mux_16_8w_8(x8,i57,i58,i59,i60,i61,i62,i63,i64,s[2:0]); 195 | 196 | mux_16_8w mux_16_8w_9(o,x1,x2,x3,x4,x5,x6,x7,x8,s[5:3]); 197 | endmodule 198 | 199 | 200 | module T_FF(q,t,clk); //T-FlipFlop 201 | input t,clk; 202 | output q; 203 | reg q; 204 | initial 205 | begin 206 | q=0; 207 | end 208 | always @(posedge clk) 209 | begin 210 | if(t==1) 211 | q=~q; 212 | end 213 | endmodule 214 | 215 | module counter(out,clk); //counter that counts from 0 to 63 (6-bit) 216 | input clk; 217 | output [5:0]out; 218 | wire [5:0]out_; 219 | T_FF tff_1(out_[0],1'b1,clk); 220 | T_FF tff_2(out_[1],1'b1,out_[0]); 221 | T_FF tff_3(out_[2],1'b1,out_[1]); 222 | T_FF tff_4(out_[3],1'b1,out_[2]); 223 | T_FF tff_5(out_[4],1'b1,out_[3]); 224 | T_FF tff_6(out_[5],1'b1,out_[4]); 225 | not(out[0],out_[0]); 226 | not(out[1],out_[1]); 227 | not(out[2],out_[2]); 228 | not(out[3],out_[3]); 229 | not(out[4],out_[4]); 230 | not(out[5],out_[5]); 231 | endmodule 232 | 233 | /*Sine Wave generator SWG(o,t)=> o=1000*sin(t*360/64)+1000 */ 234 | module sine_wave_generator(o,t); 235 | input [5:0]t; 236 | output [15:0]o; 237 | reg [15:0] i1,i2,i3,i4,i5,i6,i7,i8,i9,i10,i11,i12,i13,i14,i15,i16,i17,i18,i19,i20,i21,i22,i23,i24,i25,i26,i27,i28,i29,i30,i31,i32,i33,i34,i35,i36,i37,i38,i39,i40,i41,i42,i43,i44,i45,i46,i47,i48,i49,i50,i51,i52,i53,i54,i55,i56,i57,i58,i59,i60,i61,i62,i63,i64; 238 | mux_16_64w mux_1(o,i1,i2,i3,i4,i5,i6,i7,i8,i9,i10,i11,i12,i13,i14,i15,i16,i17,i18,i19,i20,i21,i22,i23,i24,i25,i26,i27,i28,i29,i30,i31,i32,i33,i34,i35,i36,i37,i38,i39,i40,i41,i42,i43,i44,i45,i46,i47,i48,i49,i50,i51,i52,i53,i54,i55,i56,i57,i58,i59,i60,i61,i62,i63,i64,t); 239 | initial 240 | begin 241 | i1=1000; //1000*sin(t*360/64)+1000 values recorded in order 242 | i2=1098; 243 | i3=1195; 244 | i4=1290; 245 | i5=1383; 246 | i6=1471; 247 | i7=1556; 248 | i8=1634; 249 | i9=1707; 250 | i10=1773; 251 | i11=1831; 252 | i12=1882; 253 | i13=1924; 254 | i14=1957; 255 | i15=1981; 256 | i16=1995; 257 | i17=2000; 258 | i18=1995; 259 | i19=1981; 260 | i20=1957; 261 | i21=1924; 262 | i22=1882; 263 | i23=1831; 264 | i24=1773; 265 | i25=1707; 266 | i26=1634; 267 | i27=1556; 268 | i28=1471; 269 | i29=1383; 270 | i30=1290; 271 | i31=1195; 272 | i32=1098; 273 | i33=1000; 274 | i34=902; 275 | i35=805; 276 | i36=710; 277 | i37=617; 278 | i38=529; 279 | i39=444; 280 | i40=366; 281 | i41=293; 282 | i42=227; 283 | i43=169; 284 | i44=118; 285 | i45=76; 286 | i46=43; 287 | i47=19; 288 | i48=5; 289 | i49=0; 290 | i50=5; 291 | i51=19; 292 | i52=43; 293 | i53=76; 294 | i54=118; 295 | i55=169; 296 | i56=227; 297 | i57=293; 298 | i58=366; 299 | i59=444; 300 | i60=529; 301 | i61=617; 302 | i62=710; 303 | i63=805; 304 | i64=902; 305 | end 306 | endmodule 307 | 308 | module sine_wave_Pi_shift(o,t); //SWG generating sinusoidal wave with phase diff of Pi 309 | input [5:0]t; 310 | output [15:0]o; 311 | wire [5:0]t_; 312 | wire c; 313 | adder_6b add_1(t_,c,t,6'b100000); //t_=t+32 314 | sine_wave_generator SWG(o,t_); 315 | endmodule 316 | 317 | module adder_6b(s,c,a,b); //6-bit Adder 318 | input [5:0]a,b; //input 6-bit Nos 319 | output [5:0]s; //6-bit sum 320 | output c; 321 | wire c1,c2,c3,c4,c5; 322 | half_adder HA_1(s[0],c1,a[0],b[0]); 323 | full_adder FA_1(s[1],c2,a[1],b[1],c1); 324 | full_adder FA_2(s[2],c3,a[2],b[2],c2); 325 | full_adder FA_3(s[3],c4,a[3],b[3],c3); 326 | full_adder FA_4(s[4],c5,a[4],b[4],c4); 327 | full_adder FA_5(s[5],c,a[5],b[5],c5); 328 | endmodule 329 | 330 | module half_adder(s,c,i1,i2); //Half_Adder 331 | input i1,i2; 332 | output s,c; 333 | xor(s,i1,i2); 334 | and(c,i1,i2); 335 | endmodule 336 | 337 | module full_adder(s,c,i1,i2,cin); //Full_Adder 338 | input i1,i2,cin; 339 | output s,c; 340 | wire s1,c1,c2; 341 | half_adder HF_1(s1,c1,i1,i2); 342 | half_adder HF_2(s,c2,s1,cin); 343 | or(c,c1,c2); 344 | endmodule 345 | 346 | 347 | 348 | /* Gate Level Multiplicator */ 349 | 350 | module mult_16(prod,a,b); 351 | input [15:0]a,b; 352 | output [15:0] prod; 353 | 354 | wire [31:0]p; //Contains pruduct in 32bits 355 | 356 | wire [31:0]w0,w1,w2,w3,w4,w5,w6,w7,w8,w9,w10,w11,w12,w13,w14,w15; //To store 16 product terms 357 | wire [31:0]s0,s1,s2,s3,s4,s5,s6,s7; 358 | wire [31:0]x0,x1,x2,x3; 359 | wire [31:0]y0,y1; 360 | 361 | 362 | andgat and_0[15:0](w0[31:16],16'b0,16'b0); //setting initial 16 bits of w0,which are not required to zero 363 | 364 | andgat and_1[14:0](w1[31:17],15'b0,15'b0); //setting initial 15 bits and last 1 bit of w1,which are not required to zero 365 | andgat and_1_1(w1[0],1'b0,1'b0); 366 | 367 | andgat and_2[13:0](w2[31:18],14'b0,14'b0); //setting initial 14 bits and last 2 bits of w2,which are not required to zero 368 | andgat and_2_1[1:0](w2[1:0],2'b0,2'b0); 369 | 370 | andgat and_3[12:0](w3[31:19],13'b0,13'b0); //setting initial 13 bits and last 3 bits of w3,which are not required to zero 371 | andgat and_3_1[2:0](w3[2:0],3'b0,3'b0); 372 | 373 | andgat and_4[11:0](w4[31:20],12'b0,12'b0); //setting initial 12 bits and last 4 bits of w4,which are not required to zero 374 | andgat and_4_1[3:0](w4[3:0],4'b0,4'b0); 375 | 376 | andgat and_5[10:0](w5[31:21],11'b0,11'b0); //setting initial 11 bits and last 5 bits of w5,which are not required to zero 377 | andgat and_5_1[4:0](w5[4:0],5'b0,5'b0); 378 | 379 | andgat and_6[9:0](w6[31:22],10'b0,10'b0); //setting initial 10 bits and last 6 bits of w6,which are not required to zero 380 | andgat and_6_1[5:0](w6[5:0],6'b0,6'b0); 381 | 382 | andgat and_7[8:0](w7[31:23],9'b0,9'b0); //setting initial 9 bits and last 7 bits of w7,which are not required to zero 383 | andgat and_7_1[6:0](w7[6:0],7'b0,7'b0); 384 | 385 | andgat and_8[7:0](w8[31:24],8'b0,8'b0); //setting initial 8 bits and last 8 bits of w8,which are not required to zero 386 | andgat and_8_1[7:0](w8[7:0],8'b0,8'b0); 387 | 388 | andgat and_9[6:0](w9[31:25],7'b0,7'b0); //setting initial 7 bits and last 9 bits of w9,which are not required to zero 389 | andgat and_9_1[8:0](w9[8:0],9'b0,9'b0); 390 | 391 | andgat and_10[5:0](w10[31:26],6'b0,6'b0); //setting initial 6 bits and last 10 bits of w10,which are not required to zero 392 | andgat and_10_1[9:0](w10[9:0],10'b0,10'b0); 393 | 394 | andgat and_11[4:0](w11[31:27],5'b0,5'b0); //setting initial 5 bits and last 11 bits of w11,which are not required to zero 395 | andgat and_11_1[10:0](w11[10:0],11'b0,11'b0); 396 | 397 | andgat and_12[3:0](w12[31:28],4'b0,4'b0); //setting initial 4 bits and last 12 bits of w12,which are not required to zero 398 | andgat and_12_1[11:0](w12[11:0],12'b0,12'b0); 399 | 400 | andgat and_13[2:0](w13[31:29],3'b0,3'b0); //setting initial 3 bits and last 13 bits of w13,which are not required to zero 401 | andgat and_13_1[12:0](w13[12:0],13'b0,13'b0); 402 | 403 | andgat and_14[1:0](w14[31:30],2'b0,2'b0); //setting initial 2 bits and last 14 bits of w14,which are not required to zero 404 | andgat and_14_1[13:0](w14[13:0],14'b0,14'b0); 405 | 406 | andgat and_15(w15[31],1'b0,1'b0); //setting initial 1 bit and last 15 bits of w15,which are not required to zero 407 | andgat and_15_1[14:0](w15[14:0],15'b0,15'b0); 408 | 409 | 410 | mux_16 mux_0(w0[15:0],16'b0,a,b[0]); //a multiplied with each b[i] and product stored in corresponding wi's 411 | mux_16 mux_1(w1[16:1],16'b0,a,b[1]); 412 | mux_16 mux_2(w2[17:2],16'b0,a,b[2]); 413 | mux_16 mux_3(w3[18:3],16'b0,a,b[3]); 414 | 415 | mux_16 mux_4(w4[19:4],16'b0,a,b[4]); 416 | mux_16 mux_5(w5[20:5],16'b0,a,b[5]); 417 | mux_16 mux_6(w6[21:6],16'b0,a,b[6]); 418 | mux_16 mux_7(w7[22:7],16'b0,a,b[7]); 419 | 420 | mux_16 mux_8(w8[23:8],16'b0,a,b[8]); 421 | mux_16 mux_9(w9[24:9],16'b0,a,b[9]); 422 | mux_16 mux_10(w10[25:10],16'b0,a,b[10]); 423 | mux_16 mux_11(w11[26:11],16'b0,a,b[11]); 424 | 425 | mux_16 mux_12(w12[27:12],16'b0,a,b[12]); 426 | mux_16 mux_13(w13[28:13],16'b0,a,b[13]); 427 | mux_16 mux_14(w14[29:14],16'b0,a,b[14]); 428 | mux_16 mux_15(w15[30:15],16'b0,a,b[15]); 429 | 430 | adder_32b add_0(s0,w0,w1); //all wi's are added together to obtain the product 431 | adder_32b add_1(s1,w2,w3); 432 | adder_32b add_2(s2,w4,w5); 433 | adder_32b add_3(s3,w6,w7); 434 | adder_32b add_4(s4,w8,w9); 435 | adder_32b add_5(s5,w10,w11); 436 | adder_32b add_6(s6,w12,w13); 437 | adder_32b add_7(s7,w14,w15); 438 | 439 | adder_32b add_8(x0,s0,s1); 440 | adder_32b add_9(x1,s2,s3); 441 | adder_32b add_10(x2,s4,s5); 442 | adder_32b add_11(x3,s6,s7); 443 | 444 | adder_32b add_12(y0,x0,x1); 445 | adder_32b add_13(y1,x2,x3); 446 | 447 | adder_32b add_14(p,y0,y1); 448 | 449 | andgat and_32_to_16[15:0](prod,p[15:0],16'b1111111111111111); 450 | 451 | endmodule 452 | 453 | 454 | module adder_4b(s,c,i1,i2); //4-bit Adder 455 | input [3:0]i1,i2; 456 | output [3:0]s; 457 | output c; 458 | wire c1,c2,c3; 459 | half_adder half_adder_1(s[0],c1,i1[0],i2[0]); 460 | full_adder full_adder_1(s[1],c2,i1[1],i2[1],c1); 461 | full_adder full_adder_2(s[2],c3,i1[2],i2[2],c2); 462 | full_adder full_adder_3(s[3],c,i1[3],i2[3],c3); 463 | endmodule 464 | 465 | module full_adder_4b(s,c,i1,i2,cin); //4-bit Adder with Carry in 466 | input [3:0]i1,i2; 467 | input cin; 468 | output [3:0]s; 469 | output c; 470 | wire c1,c2,c3; 471 | full_adder full_adder_1(s[0],c1,i1[0],i2[0],cin); 472 | full_adder full_adder_2(s[1],c2,i1[1],i2[1],c1); 473 | full_adder full_adder_3(s[2],c3,i1[2],i2[2],c2); 474 | full_adder full_adder_4(s[3],c,i1[3],i2[3],c3); 475 | endmodule 476 | 477 | module adder_16b(s,c,i1,i2); //16-bit Adder 478 | input [15:0]i1,i2; 479 | output [15:0]s; 480 | output c; 481 | wire c1,c2,c3; 482 | adder_4b adder_4b_1(s[3:0],c1,i1[3:0],i2[3:0]); 483 | full_adder_4b full_adder_4b_1(s[7:4],c2,i1[7:4],i2[7:4],c1); 484 | full_adder_4b full_adder_4b_2(s[11:8],c3,i1[11:8],i2[11:8],c2); 485 | full_adder_4b full_adder_4b_3(s[15:12],c,i1[15:12],i2[15:12],c3); 486 | endmodule 487 | 488 | module adder_32b(s,i1,i2); //32-bit Adder 489 | input [31:0]i1,i2; 490 | output [31:0]s; 491 | wire c; 492 | wire c1,c2,c3,c4,c5,c6,c7; 493 | adder_4b adder_4b_1(s[3:0],c1,i1[3:0],i2[3:0]); 494 | full_adder_4b full_adder_4b_1(s[7:4],c2,i1[7:4],i2[7:4],c1); 495 | full_adder_4b full_adder_4b_2(s[11:8],c3,i1[11:8],i2[11:8],c2); 496 | full_adder_4b full_adder_4b_3(s[15:12],c4,i1[15:12],i2[15:12],c3); 497 | 498 | full_adder_4b full_adder_4b_4(s[19:16],c5,i1[19:16],i2[19:16],c4); 499 | full_adder_4b full_adder_4b_5(s[23:20],c6,i1[23:20],i2[23:20],c5); 500 | full_adder_4b full_adder_4b_6(s[27:24],c7,i1[27:24],i2[27:24],c6); 501 | full_adder_4b full_adder_4b_7(s[31:28],c,i1[31:28],i2[31:28],c7); 502 | endmodule 503 | 504 | module andgat(o,a,b); //andgate using nand gate 505 | input a,b; 506 | output o; 507 | wire x; 508 | nand(x,a,b); 509 | nand(o,x,x); 510 | endmodule 511 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Modulator-Verilog- 2 | Implementation of BPSK QPSK ASK and FSK using verilog 3 | -------------------------------------------------------------------------------- /Testbench.v: -------------------------------------------------------------------------------- 1 | module TB_Modulator_Assemblage; 2 | reg Din; 3 | reg [1:0]Freq,Mod; 4 | reg clk; 5 | wire [15:0] out; 6 | 7 | Modulator_Assemblage Modulate(out,Din,Mod,Freq,clk); 8 | 9 | initial 10 | begin 11 | $monitor("out=%d Din=%d Mod=%d Freq=%d clk=%b",out,Din,Mod,Freq,clk); 12 | clk=0;Din=0; 13 | Mod=2'b00; //FSK 14 | Freq=2'b00; 15 | #512 Din=1; 16 | #512 Din=0; 17 | Freq=2'b01; 18 | #512 Din=1; 19 | #512 Din=0; 20 | Freq=2'b10; 21 | #512 Din=1; 22 | #512 Din=0; 23 | Freq=2'b11; 24 | #512 Din=1; 25 | #512 Din=0; 26 | Mod=2'b01; //ASK 27 | Freq=2'b00; 28 | #512 Din=1; 29 | #512 Din=0; 30 | Freq=2'b01; 31 | #512 Din=1; 32 | #512 Din=0; 33 | Freq=2'b10; 34 | #512 Din=1; 35 | #512 Din=0; 36 | Freq=2'b11; 37 | #512 Din=1; 38 | #512 Din=0; 39 | 40 | Mod=2'b10; //BPSK 41 | Freq=2'b00; 42 | #512 Din=1; 43 | #512 Din=0; 44 | Freq=2'b01; 45 | #512 Din=1; 46 | #512 Din=0; 47 | Freq=2'b10; 48 | #512 Din=1; 49 | #512 Din=0; 50 | Freq=2'b11; 51 | #512 Din=1; 52 | #512 Din=0; 53 | Mod=2'b11; //QPSK 54 | Freq=2'b00; 55 | #64 Din=1; 56 | #64 Din=0; 57 | #512 Din=1; 58 | #512 Din=0; 59 | #64 Din=0; 60 | #64 Din=0; 61 | #64 Din=0; 62 | #64 Din=1; 63 | #64 Din=1; 64 | #64 Din=0; 65 | #64 Din=1; 66 | #64 Din=0; 67 | Freq=2'b01; 68 | #64 Din=1; 69 | #64 Din=0; 70 | #512 Din=1; 71 | #512 Din=0; 72 | #64 Din=0; 73 | #64 Din=0; 74 | #64 Din=0; 75 | #64 Din=1; 76 | #64 Din=1; 77 | #64 Din=0; 78 | #64 Din=1; 79 | #64 Din=0; 80 | Freq=2'b10; 81 | #64 Din=1; 82 | #64 Din=0; 83 | #512 Din=1; 84 | #512 Din=0; 85 | #64 Din=0; 86 | #64 Din=0; 87 | #64 Din=0; 88 | #64 Din=1; 89 | #64 Din=1; 90 | #64 Din=0; 91 | #64 Din=1; 92 | #64 Din=0; 93 | Freq=2'b11; 94 | #64 Din=1; 95 | #64 Din=0; 96 | #512 Din=1; 97 | #512 Din=0; 98 | #64 Din=0; 99 | #64 Din=0; 100 | #64 Din=0; 101 | #64 Din=1; 102 | #64 Din=1; 103 | #64 Din=0; 104 | #64 Din=1; 105 | #64 Din=0; 106 | end 107 | always 108 | begin 109 | #1 clk=~clk; 110 | end 111 | endmodule 112 | 113 | module TB_QPSK; 114 | reg Din,clk,pulse; 115 | wire [15:0] out; 116 | QPSK qpsk_1(out,Din,clk,pulse); 117 | initial 118 | begin 119 | $monitor("pulse=%b Din=%b out=%d",pulse,Din,out); 120 | clk=0;Din=0;pulse=0; 121 | end 122 | always 123 | begin 124 | #4 clk=~clk; 125 | end 126 | always 127 | begin 128 | #32 pulse=~pulse; 129 | end 130 | always 131 | begin 132 | #32 Din=1; 133 | #32 Din=0; 134 | #32 Din=1; 135 | #128 Din=0; 136 | #32 Din=1; 137 | #32 Din=0; 138 | #64 Din=1; 139 | #96 Din=0; 140 | end 141 | endmodule 142 | 143 | module TB_ASK; 144 | reg Din,clk; 145 | wire [15:0] out; 146 | ASK ask_1(out,Din,clk); 147 | initial 148 | begin 149 | $monitor("Din=%b out=%d",Din,out); 150 | clk=0;Din=0; 151 | end 152 | always 153 | begin 154 | #1 clk=~clk; 155 | end 156 | always 157 | begin 158 | #16 Din=~Din; 159 | end 160 | endmodule 161 | 162 | module TB_FSK; 163 | reg Din,clk; 164 | wire [15:0] out; 165 | FSK fsk_1(out,Din,clk); 166 | initial 167 | begin 168 | $monitor("Din=%b out=%d",Din,out); 169 | clk=0;Din=0; 170 | end 171 | always 172 | begin 173 | #1 clk=~clk; 174 | end 175 | always 176 | begin 177 | #16 Din=~Din; 178 | end 179 | endmodule 180 | 181 | module TB_BPSK; 182 | reg Din,clk; 183 | wire [15:0] out; 184 | BPSK bpsk_1(out,Din,clk); 185 | initial 186 | begin 187 | $monitor("Din=%b out=%d",Din,out); 188 | clk=0;Din=0; 189 | end 190 | always 191 | begin 192 | #1 clk=~clk; 193 | end 194 | always 195 | begin 196 | #16 Din=~Din; 197 | end 198 | endmodule 199 | 200 | 201 | module TB_multiplier; 202 | reg [15:0]a,b; 203 | wire [31:0]p; 204 | 205 | mult_16 mult_1(p,a,b); 206 | initial 207 | begin 208 | $monitor("a=%d b=%d p=%d",a,b,p); 209 | #10 a=1423; b=3; 210 | #10 a=3; b=3; 211 | #10 a=23; b=3; 212 | #10 a=20001; b=3; 213 | end 214 | endmodule 215 | 216 | module TB_wave; 217 | reg clk; 218 | wire [15:0]o; 219 | wave_generator wave_1(o,clk); 220 | initial 221 | begin 222 | $monitor("o=%d",o); 223 | clk=0; 224 | end 225 | always 226 | begin 227 | #1 clk=~clk; 228 | end 229 | endmodule 230 | 231 | module TB_CWG; 232 | reg [5:0]t; 233 | wire [15:0]o; 234 | cosine_wave_generator CWG(o,t); 235 | integer i; 236 | initial 237 | begin 238 | $monitor("o=%d",o); 239 | #5 t=0; 240 | for(i=0;i<64;i=i+1) 241 | begin 242 | #5 t=i; 243 | end 244 | end 245 | endmodule 246 | 247 | module TB_SWG; 248 | reg [5:0]t; 249 | wire [15:0]o; 250 | sine_wave_generator SWG(o,t); 251 | integer i; 252 | initial 253 | begin 254 | $monitor("o=%d",o); 255 | #5 t=0; 256 | for(i=0;i<64;i=i+1) 257 | begin 258 | #5 t=i; 259 | end 260 | end 261 | endmodule 262 | 263 | 264 | module TB_counter; 265 | reg clk; 266 | wire [5:0]o; 267 | counter count_1(o,clk); 268 | initial 269 | begin 270 | 271 | clk=0; 272 | end 273 | always 274 | begin 275 | $monitor("o=%d",o); 276 | #2 clk=~clk; 277 | end 278 | endmodule 279 | 280 | module TB_TFF; 281 | reg t,clk; 282 | wire q; 283 | T_FF TFF_1(q,t,clk); 284 | initial 285 | begin 286 | t=1;clk=0; 287 | end 288 | always 289 | begin 290 | #2 clk=~clk; 291 | end 292 | endmodule 293 | 294 | module TB_Adder; 295 | reg [5:0]i1,i2; 296 | wire [5:0]s; 297 | wire c; 298 | adder_6b Add_1(s,c,i1,i2); 299 | initial 300 | begin 301 | $monitor("i1=%d i2=%d s=%d c=%b",i1,i2,s,c); 302 | #10 i1=0;i2=16; 303 | #10 i1=8;i2=12; 304 | #10 i1=60;i2=20; 305 | #10 i1=0;i2=16; 306 | #10 i1=1;i2=16; 307 | #10 i1=2;i2=16; 308 | #10 i1=3;i2=16; 309 | #10 i1=4;i2=16; 310 | #10 i1=5;i2=16; 311 | #10 i1=64;i2=16; 312 | #10 i1=63;i2=16; 313 | end 314 | endmodule 315 | 316 | module TB_mux; 317 | reg [31:0]i1,i2,i3,i4,i5,i6,i7,i8,i9,i10,i11,i12,i13,i14,i15,i16,i17,i18,i19,i20,i21,i22,i23,i24,i25,i26,i27,i28,i29,i30,i31,i32,i33,i34,i35,i36,i37,i38,i39,i40,i41,i42,i43,i44,i45,i46,i47,i48,i49,i50,i51,i52,i53,i54,i55,i56,i57,i58,i59,i60,i61,i62,i63,i64; 318 | reg [5:0]s; 319 | wire [31:0]o; 320 | mux_32_64w mux_32_64w_1(o,i1,i2,i3,i4,i5,i6,i7,i8,i9,i10,i11,i12,i13,i14,i15,i16,i17,i18,i19,i20,i21,i22,i23,i24,i25,i26,i27,i28,i29,i30,i31,i32,i33,i34,i35,i36,i37,i38,i39,i40,i41,i42,i43,i44,i45,i46,i47,i48,i49,i50,i51,i52,i53,i54,i55,i56,i57,i58,i59,i60,i61,i62,i63,i64,s); 321 | integer i; 322 | initial 323 | begin 324 | $monitor("s=%d o=%d",s,o); 325 | #1 i1=1;i2=2;i3=3;i4=4;i5=5;i6=6;i7=7;i8=8; 326 | i9=9;i10=10;i11=11;i12=12;i13=13;i14=14;i15=15;i16=16; 327 | i17=17;i18=18;i19=19;i20=20;i21=21;i22=22;i23=23;i24=24; 328 | i25=25;i26=26;i27=27;i28=28;i29=29;i30=30;i31=31;i32=32; 329 | i33=33;i34=34;i35=35;i36=36;i37=37;i38=38;i39=39;i40=40; 330 | i41=41;i42=42;i43=43;i44=44;i45=45;i46=46;i47=47;i48=48; 331 | i49=49;i50=50;i51=51;i52=52;i53=53;i54=54;i55=55;i56=56; 332 | i57=57;i58=58;i59=59;i60=60;i61=61;i62=62;i63=63;i64=64; 333 | for(i=0;i<64;i=i+1) 334 | #10 s=i; 335 | end 336 | endmodule 337 | 338 | module TB_demux; 339 | reg i,s; 340 | wire o1,o2; 341 | demux DMX(o1,o2,i,s); 342 | initial 343 | begin 344 | s=0; 345 | i=1; 346 | #20 i=0; 347 | #20 s=1; 348 | i=1; 349 | #20 i=0; 350 | end 351 | endmodule -------------------------------------------------------------------------------- /transcript: -------------------------------------------------------------------------------- 1 | # Compile of Design.v was successful with warnings. 2 | # Compile of Testbench.v was successful. 3 | # 2 compiles, 0 failed with no errors. 4 | vsim -gui work.TB_Modulator_Assemblage 5 | # vsim -gui work.TB_Modulator_Assemblage 6 | # Start time: 10:42:42 on Nov 28,2019 7 | # Loading work.TB_Modulator_Assemblage 8 | # Loading work.Modulator_Assemblage 9 | # Loading work.counter 10 | # Loading work.T_FF 11 | # Loading work.mux_4w 12 | # Loading work.mux 13 | # Loading work.FSK 14 | # Loading work.sine_wave_generator 15 | # Loading work.mux_16_64w 16 | # Loading work.mux_16_8w 17 | # Loading work.mux_16 18 | # Loading work.ASK 19 | # Loading work.mult_16 20 | # Loading work.andgat 21 | # Loading work.adder_32b 22 | # Loading work.adder_4b 23 | # Loading work.half_adder 24 | # Loading work.full_adder 25 | # Loading work.full_adder_4b 26 | # Loading work.BPSK 27 | # Loading work.sine_wave_Pi_shift 28 | # Loading work.adder_6b 29 | # Loading work.QPSK 30 | # Loading work.mux_16_4w 31 | # ** Warning: Design size of 7651 instances exceeds ModelSim - Intel FPGA Starter Edition recommended capacity. 32 | # This may because you are loading cell libraries which are not recommended with 33 | # the ModelSim - Intel FPGA Edition. Expect performance to be adversely affected. 34 | # WARNING: No extended dataflow license exists 35 | add wave -position insertpoint \ 36 | sim:/TB_Modulator_Assemblage/clk \ 37 | sim:/TB_Modulator_Assemblage/Din \ 38 | sim:/TB_Modulator_Assemblage/Freq \ 39 | sim:/TB_Modulator_Assemblage/Mod \ 40 | sim:/TB_Modulator_Assemblage/out 41 | # ** Warning: (vsim-WLF-5000) WLF file currently in use: vsim.wlf 42 | # File in use by: J Hostname: LAPTOP-CC4UDENV ProcessID: 32604 43 | # Attempting to use alternate WLF file "./wlfttk3rhf". 44 | # ** Warning: (vsim-WLF-5001) Could not open WLF file: vsim.wlf 45 | # Using alternate file: ./wlfttk3rhf 46 | run 47 | # out= 902 Din=0 Mod=0 Freq=0 clk=0 48 | # out= 1000 Din=0 Mod=0 Freq=0 clk=1 49 | # out= 1000 Din=0 Mod=0 Freq=0 clk=0 50 | # out= 1000 Din=0 Mod=0 Freq=0 clk=1 51 | # out= 1000 Din=0 Mod=0 Freq=0 clk=0 52 | # out= 1000 Din=0 Mod=0 Freq=0 clk=1 53 | # out= 1000 Din=0 Mod=0 Freq=0 clk=0 54 | # out= 1000 Din=0 Mod=0 Freq=0 clk=1 55 | # out= 1000 Din=0 Mod=0 Freq=0 clk=0 56 | # out= 1098 Din=0 Mod=0 Freq=0 clk=1 57 | # out= 1098 Din=0 Mod=0 Freq=0 clk=0 58 | # out= 1098 Din=0 Mod=0 Freq=0 clk=1 59 | # out= 1098 Din=0 Mod=0 Freq=0 clk=0 60 | # out= 1098 Din=0 Mod=0 Freq=0 clk=1 61 | # out= 1098 Din=0 Mod=0 Freq=0 clk=0 62 | # out= 1098 Din=0 Mod=0 Freq=0 clk=1 63 | # out= 1098 Din=0 Mod=0 Freq=0 clk=0 64 | # out= 1195 Din=0 Mod=0 Freq=0 clk=1 65 | # out= 1195 Din=0 Mod=0 Freq=0 clk=0 66 | # out= 1195 Din=0 Mod=0 Freq=0 clk=1 67 | # out= 1195 Din=0 Mod=0 Freq=0 clk=0 68 | # out= 1195 Din=0 Mod=0 Freq=0 clk=1 69 | # out= 1195 Din=0 Mod=0 Freq=0 clk=0 70 | # out= 1195 Din=0 Mod=0 Freq=0 clk=1 71 | # out= 1195 Din=0 Mod=0 Freq=0 clk=0 72 | # out= 1290 Din=0 Mod=0 Freq=0 clk=1 73 | # out= 1290 Din=0 Mod=0 Freq=0 clk=0 74 | # out= 1290 Din=0 Mod=0 Freq=0 clk=1 75 | # out= 1290 Din=0 Mod=0 Freq=0 clk=0 76 | # out= 1290 Din=0 Mod=0 Freq=0 clk=1 77 | # out= 1290 Din=0 Mod=0 Freq=0 clk=0 78 | # out= 1290 Din=0 Mod=0 Freq=0 clk=1 79 | # out= 1290 Din=0 Mod=0 Freq=0 clk=0 80 | # out= 1383 Din=0 Mod=0 Freq=0 clk=1 81 | # out= 1383 Din=0 Mod=0 Freq=0 clk=0 82 | # out= 1383 Din=0 Mod=0 Freq=0 clk=1 83 | # out= 1383 Din=0 Mod=0 Freq=0 clk=0 84 | # out= 1383 Din=0 Mod=0 Freq=0 clk=1 85 | # out= 1383 Din=0 Mod=0 Freq=0 clk=0 86 | # out= 1383 Din=0 Mod=0 Freq=0 clk=1 87 | # out= 1383 Din=0 Mod=0 Freq=0 clk=0 88 | # out= 1471 Din=0 Mod=0 Freq=0 clk=1 89 | # out= 1471 Din=0 Mod=0 Freq=0 clk=0 90 | # out= 1471 Din=0 Mod=0 Freq=0 clk=1 91 | # out= 1471 Din=0 Mod=0 Freq=0 clk=0 92 | # out= 1471 Din=0 Mod=0 Freq=0 clk=1 93 | # out= 1471 Din=0 Mod=0 Freq=0 clk=0 94 | # out= 1471 Din=0 Mod=0 Freq=0 clk=1 95 | # out= 1471 Din=0 Mod=0 Freq=0 clk=0 96 | # out= 1556 Din=0 Mod=0 Freq=0 clk=1 97 | # out= 1556 Din=0 Mod=0 Freq=0 clk=0 98 | # out= 1556 Din=0 Mod=0 Freq=0 clk=1 99 | # out= 1556 Din=0 Mod=0 Freq=0 clk=0 100 | # out= 1556 Din=0 Mod=0 Freq=0 clk=1 101 | # out= 1556 Din=0 Mod=0 Freq=0 clk=0 102 | # out= 1556 Din=0 Mod=0 Freq=0 clk=1 103 | # out= 1556 Din=0 Mod=0 Freq=0 clk=0 104 | # out= 1634 Din=0 Mod=0 Freq=0 clk=1 105 | # out= 1634 Din=0 Mod=0 Freq=0 clk=0 106 | # out= 1634 Din=0 Mod=0 Freq=0 clk=1 107 | # out= 1634 Din=0 Mod=0 Freq=0 clk=0 108 | # out= 1634 Din=0 Mod=0 Freq=0 clk=1 109 | # out= 1634 Din=0 Mod=0 Freq=0 clk=0 110 | # out= 1634 Din=0 Mod=0 Freq=0 clk=1 111 | # out= 1634 Din=0 Mod=0 Freq=0 clk=0 112 | # out= 1707 Din=0 Mod=0 Freq=0 clk=1 113 | # out= 1707 Din=0 Mod=0 Freq=0 clk=0 114 | # out= 1707 Din=0 Mod=0 Freq=0 clk=1 115 | # out= 1707 Din=0 Mod=0 Freq=0 clk=0 116 | # out= 1707 Din=0 Mod=0 Freq=0 clk=1 117 | # out= 1707 Din=0 Mod=0 Freq=0 clk=0 118 | # out= 1707 Din=0 Mod=0 Freq=0 clk=1 119 | # out= 1707 Din=0 Mod=0 Freq=0 clk=0 120 | # out= 1773 Din=0 Mod=0 Freq=0 clk=1 121 | # out= 1773 Din=0 Mod=0 Freq=0 clk=0 122 | # out= 1773 Din=0 Mod=0 Freq=0 clk=1 123 | # out= 1773 Din=0 Mod=0 Freq=0 clk=0 124 | # out= 1773 Din=0 Mod=0 Freq=0 clk=1 125 | # out= 1773 Din=0 Mod=0 Freq=0 clk=0 126 | # out= 1773 Din=0 Mod=0 Freq=0 clk=1 127 | # out= 1773 Din=0 Mod=0 Freq=0 clk=0 128 | # out= 1831 Din=0 Mod=0 Freq=0 clk=1 129 | # out= 1831 Din=0 Mod=0 Freq=0 clk=0 130 | # out= 1831 Din=0 Mod=0 Freq=0 clk=1 131 | # out= 1831 Din=0 Mod=0 Freq=0 clk=0 132 | # out= 1831 Din=0 Mod=0 Freq=0 clk=1 133 | # out= 1831 Din=0 Mod=0 Freq=0 clk=0 134 | # out= 1831 Din=0 Mod=0 Freq=0 clk=1 135 | # out= 1831 Din=0 Mod=0 Freq=0 clk=0 136 | # out= 1882 Din=0 Mod=0 Freq=0 clk=1 137 | # out= 1882 Din=0 Mod=0 Freq=0 clk=0 138 | # out= 1882 Din=0 Mod=0 Freq=0 clk=1 139 | # out= 1882 Din=0 Mod=0 Freq=0 clk=0 140 | # out= 1882 Din=0 Mod=0 Freq=0 clk=1 141 | # out= 1882 Din=0 Mod=0 Freq=0 clk=0 142 | # out= 1882 Din=0 Mod=0 Freq=0 clk=1 143 | # out= 1882 Din=0 Mod=0 Freq=0 clk=0 144 | # out= 1924 Din=0 Mod=0 Freq=0 clk=1 145 | # out= 1924 Din=0 Mod=0 Freq=0 clk=0 146 | # out= 1924 Din=0 Mod=0 Freq=0 clk=1 147 | # out= 1924 Din=0 Mod=0 Freq=0 clk=0 148 | # out= 1924 Din=0 Mod=0 Freq=0 clk=1 149 | # out= 1924 Din=0 Mod=0 Freq=0 clk=0 150 | # out= 1924 Din=0 Mod=0 Freq=0 clk=1 151 | # out= 1924 Din=0 Mod=0 Freq=0 clk=0 152 | # out= 1957 Din=0 Mod=0 Freq=0 clk=1 153 | # out= 1957 Din=0 Mod=0 Freq=0 clk=0 154 | # out= 1957 Din=0 Mod=0 Freq=0 clk=1 155 | # out= 1957 Din=0 Mod=0 Freq=0 clk=0 156 | # out= 1957 Din=0 Mod=0 Freq=0 clk=1 157 | # out= 1957 Din=0 Mod=0 Freq=0 clk=0 158 | # out= 1957 Din=0 Mod=0 Freq=0 clk=1 159 | # out= 1957 Din=0 Mod=0 Freq=0 clk=0 160 | # out= 1981 Din=0 Mod=0 Freq=0 clk=1 161 | # out= 1981 Din=0 Mod=0 Freq=0 clk=0 162 | # out= 1981 Din=0 Mod=0 Freq=0 clk=1 163 | # out= 1981 Din=0 Mod=0 Freq=0 clk=0 164 | # out= 1981 Din=0 Mod=0 Freq=0 clk=1 165 | # out= 1981 Din=0 Mod=0 Freq=0 clk=0 166 | # out= 1981 Din=0 Mod=0 Freq=0 clk=1 167 | # out= 1981 Din=0 Mod=0 Freq=0 clk=0 168 | # out= 1995 Din=0 Mod=0 Freq=0 clk=1 169 | # out= 1995 Din=0 Mod=0 Freq=0 clk=0 170 | # out= 1995 Din=0 Mod=0 Freq=0 clk=1 171 | # out= 1995 Din=0 Mod=0 Freq=0 clk=0 172 | # out= 1995 Din=0 Mod=0 Freq=0 clk=1 173 | # out= 1995 Din=0 Mod=0 Freq=0 clk=0 174 | # out= 1995 Din=0 Mod=0 Freq=0 clk=1 175 | # out= 1995 Din=0 Mod=0 Freq=0 clk=0 176 | # out= 2000 Din=0 Mod=0 Freq=0 clk=1 177 | # out= 2000 Din=0 Mod=0 Freq=0 clk=0 178 | # out= 2000 Din=0 Mod=0 Freq=0 clk=1 179 | # out= 2000 Din=0 Mod=0 Freq=0 clk=0 180 | # out= 2000 Din=0 Mod=0 Freq=0 clk=1 181 | # out= 2000 Din=0 Mod=0 Freq=0 clk=0 182 | # out= 2000 Din=0 Mod=0 Freq=0 clk=1 183 | # out= 2000 Din=0 Mod=0 Freq=0 clk=0 184 | # out= 1995 Din=0 Mod=0 Freq=0 clk=1 185 | # out= 1995 Din=0 Mod=0 Freq=0 clk=0 186 | # out= 1995 Din=0 Mod=0 Freq=0 clk=1 187 | # out= 1995 Din=0 Mod=0 Freq=0 clk=0 188 | # out= 1995 Din=0 Mod=0 Freq=0 clk=1 189 | # out= 1995 Din=0 Mod=0 Freq=0 clk=0 190 | # out= 1995 Din=0 Mod=0 Freq=0 clk=1 191 | # out= 1995 Din=0 Mod=0 Freq=0 clk=0 192 | # out= 1981 Din=0 Mod=0 Freq=0 clk=1 193 | # out= 1981 Din=0 Mod=0 Freq=0 clk=0 194 | # out= 1981 Din=0 Mod=0 Freq=0 clk=1 195 | # out= 1981 Din=0 Mod=0 Freq=0 clk=0 196 | # out= 1981 Din=0 Mod=0 Freq=0 clk=1 197 | # out= 1981 Din=0 Mod=0 Freq=0 clk=0 198 | # out= 1981 Din=0 Mod=0 Freq=0 clk=1 199 | # out= 1981 Din=0 Mod=0 Freq=0 clk=0 200 | # out= 1957 Din=0 Mod=0 Freq=0 clk=1 201 | # out= 1957 Din=0 Mod=0 Freq=0 clk=0 202 | # out= 1957 Din=0 Mod=0 Freq=0 clk=1 203 | # out= 1957 Din=0 Mod=0 Freq=0 clk=0 204 | # out= 1957 Din=0 Mod=0 Freq=0 clk=1 205 | # out= 1957 Din=0 Mod=0 Freq=0 clk=0 206 | # out= 1957 Din=0 Mod=0 Freq=0 clk=1 207 | # out= 1957 Din=0 Mod=0 Freq=0 clk=0 208 | # out= 1924 Din=0 Mod=0 Freq=0 clk=1 209 | # out= 1924 Din=0 Mod=0 Freq=0 clk=0 210 | # out= 1924 Din=0 Mod=0 Freq=0 clk=1 211 | # out= 1924 Din=0 Mod=0 Freq=0 clk=0 212 | # out= 1924 Din=0 Mod=0 Freq=0 clk=1 213 | # out= 1924 Din=0 Mod=0 Freq=0 clk=0 214 | # out= 1924 Din=0 Mod=0 Freq=0 clk=1 215 | # out= 1924 Din=0 Mod=0 Freq=0 clk=0 216 | # out= 1882 Din=0 Mod=0 Freq=0 clk=1 217 | # out= 1882 Din=0 Mod=0 Freq=0 clk=0 218 | # out= 1882 Din=0 Mod=0 Freq=0 clk=1 219 | # out= 1882 Din=0 Mod=0 Freq=0 clk=0 220 | # out= 1882 Din=0 Mod=0 Freq=0 clk=1 221 | # out= 1882 Din=0 Mod=0 Freq=0 clk=0 222 | # out= 1882 Din=0 Mod=0 Freq=0 clk=1 223 | # out= 1882 Din=0 Mod=0 Freq=0 clk=0 224 | # out= 1831 Din=0 Mod=0 Freq=0 clk=1 225 | # out= 1831 Din=0 Mod=0 Freq=0 clk=0 226 | # out= 1831 Din=0 Mod=0 Freq=0 clk=1 227 | # out= 1831 Din=0 Mod=0 Freq=0 clk=0 228 | # out= 1831 Din=0 Mod=0 Freq=0 clk=1 229 | # out= 1831 Din=0 Mod=0 Freq=0 clk=0 230 | # out= 1831 Din=0 Mod=0 Freq=0 clk=1 231 | # out= 1831 Din=0 Mod=0 Freq=0 clk=0 232 | # out= 1773 Din=0 Mod=0 Freq=0 clk=1 233 | # out= 1773 Din=0 Mod=0 Freq=0 clk=0 234 | # out= 1773 Din=0 Mod=0 Freq=0 clk=1 235 | # out= 1773 Din=0 Mod=0 Freq=0 clk=0 236 | # out= 1773 Din=0 Mod=0 Freq=0 clk=1 237 | # out= 1773 Din=0 Mod=0 Freq=0 clk=0 238 | # out= 1773 Din=0 Mod=0 Freq=0 clk=1 239 | # out= 1773 Din=0 Mod=0 Freq=0 clk=0 240 | # out= 1707 Din=0 Mod=0 Freq=0 clk=1 241 | # out= 1707 Din=0 Mod=0 Freq=0 clk=0 242 | # out= 1707 Din=0 Mod=0 Freq=0 clk=1 243 | # out= 1707 Din=0 Mod=0 Freq=0 clk=0 244 | # out= 1707 Din=0 Mod=0 Freq=0 clk=1 245 | # out= 1707 Din=0 Mod=0 Freq=0 clk=0 246 | # out= 1707 Din=0 Mod=0 Freq=0 clk=1 247 | # out= 1707 Din=0 Mod=0 Freq=0 clk=0 248 | # out= 1634 Din=0 Mod=0 Freq=0 clk=1 249 | # out= 1634 Din=0 Mod=0 Freq=0 clk=0 250 | # out= 1634 Din=0 Mod=0 Freq=0 clk=1 251 | # out= 1634 Din=0 Mod=0 Freq=0 clk=0 252 | # out= 1634 Din=0 Mod=0 Freq=0 clk=1 253 | # out= 1634 Din=0 Mod=0 Freq=0 clk=0 254 | # out= 1634 Din=0 Mod=0 Freq=0 clk=1 255 | # out= 1634 Din=0 Mod=0 Freq=0 clk=0 256 | # out= 1556 Din=0 Mod=0 Freq=0 clk=1 257 | # out= 1556 Din=0 Mod=0 Freq=0 clk=0 258 | # out= 1556 Din=0 Mod=0 Freq=0 clk=1 259 | # out= 1556 Din=0 Mod=0 Freq=0 clk=0 260 | # out= 1556 Din=0 Mod=0 Freq=0 clk=1 261 | # out= 1556 Din=0 Mod=0 Freq=0 clk=0 262 | # out= 1556 Din=0 Mod=0 Freq=0 clk=1 263 | # out= 1556 Din=0 Mod=0 Freq=0 clk=0 264 | # out= 1471 Din=0 Mod=0 Freq=0 clk=1 265 | # out= 1471 Din=0 Mod=0 Freq=0 clk=0 266 | # out= 1471 Din=0 Mod=0 Freq=0 clk=1 267 | # out= 1471 Din=0 Mod=0 Freq=0 clk=0 268 | # out= 1471 Din=0 Mod=0 Freq=0 clk=1 269 | # out= 1471 Din=0 Mod=0 Freq=0 clk=0 270 | # out= 1471 Din=0 Mod=0 Freq=0 clk=1 271 | # out= 1471 Din=0 Mod=0 Freq=0 clk=0 272 | # out= 1383 Din=0 Mod=0 Freq=0 clk=1 273 | # out= 1383 Din=0 Mod=0 Freq=0 clk=0 274 | # out= 1383 Din=0 Mod=0 Freq=0 clk=1 275 | # out= 1383 Din=0 Mod=0 Freq=0 clk=0 276 | # out= 1383 Din=0 Mod=0 Freq=0 clk=1 277 | # out= 1383 Din=0 Mod=0 Freq=0 clk=0 278 | # out= 1383 Din=0 Mod=0 Freq=0 clk=1 279 | # out= 1383 Din=0 Mod=0 Freq=0 clk=0 280 | # out= 1290 Din=0 Mod=0 Freq=0 clk=1 281 | # out= 1290 Din=0 Mod=0 Freq=0 clk=0 282 | # out= 1290 Din=0 Mod=0 Freq=0 clk=1 283 | # out= 1290 Din=0 Mod=0 Freq=0 clk=0 284 | # out= 1290 Din=0 Mod=0 Freq=0 clk=1 285 | # out= 1290 Din=0 Mod=0 Freq=0 clk=0 286 | # out= 1290 Din=0 Mod=0 Freq=0 clk=1 287 | # out= 1290 Din=0 Mod=0 Freq=0 clk=0 288 | # out= 1195 Din=0 Mod=0 Freq=0 clk=1 289 | # out= 1195 Din=0 Mod=0 Freq=0 clk=0 290 | # out= 1195 Din=0 Mod=0 Freq=0 clk=1 291 | # out= 1195 Din=0 Mod=0 Freq=0 clk=0 292 | # out= 1195 Din=0 Mod=0 Freq=0 clk=1 293 | # out= 1195 Din=0 Mod=0 Freq=0 clk=0 294 | # out= 1195 Din=0 Mod=0 Freq=0 clk=1 295 | # out= 1195 Din=0 Mod=0 Freq=0 clk=0 296 | # out= 1098 Din=0 Mod=0 Freq=0 clk=1 297 | # out= 1098 Din=0 Mod=0 Freq=0 clk=0 298 | # out= 1098 Din=0 Mod=0 Freq=0 clk=1 299 | # out= 1098 Din=0 Mod=0 Freq=0 clk=0 300 | # out= 1098 Din=0 Mod=0 Freq=0 clk=1 301 | # out= 1098 Din=0 Mod=0 Freq=0 clk=0 302 | # out= 1098 Din=0 Mod=0 Freq=0 clk=1 303 | # out= 1098 Din=0 Mod=0 Freq=0 clk=0 304 | # out= 1000 Din=0 Mod=0 Freq=0 clk=1 305 | # out= 1000 Din=0 Mod=0 Freq=0 clk=0 306 | # out= 1000 Din=0 Mod=0 Freq=0 clk=1 307 | # out= 1000 Din=0 Mod=0 Freq=0 clk=0 308 | # out= 1000 Din=0 Mod=0 Freq=0 clk=1 309 | # out= 1000 Din=0 Mod=0 Freq=0 clk=0 310 | # out= 1000 Din=0 Mod=0 Freq=0 clk=1 311 | # out= 1000 Din=0 Mod=0 Freq=0 clk=0 312 | # out= 902 Din=0 Mod=0 Freq=0 clk=1 313 | # out= 902 Din=0 Mod=0 Freq=0 clk=0 314 | # out= 902 Din=0 Mod=0 Freq=0 clk=1 315 | # out= 902 Din=0 Mod=0 Freq=0 clk=0 316 | # out= 902 Din=0 Mod=0 Freq=0 clk=1 317 | # out= 902 Din=0 Mod=0 Freq=0 clk=0 318 | # out= 902 Din=0 Mod=0 Freq=0 clk=1 319 | # out= 902 Din=0 Mod=0 Freq=0 clk=0 320 | # out= 805 Din=0 Mod=0 Freq=0 clk=1 321 | # out= 805 Din=0 Mod=0 Freq=0 clk=0 322 | # out= 805 Din=0 Mod=0 Freq=0 clk=1 323 | # out= 805 Din=0 Mod=0 Freq=0 clk=0 324 | # out= 805 Din=0 Mod=0 Freq=0 clk=1 325 | # out= 805 Din=0 Mod=0 Freq=0 clk=0 326 | # out= 805 Din=0 Mod=0 Freq=0 clk=1 327 | # out= 805 Din=0 Mod=0 Freq=0 clk=0 328 | # out= 710 Din=0 Mod=0 Freq=0 clk=1 329 | # out= 710 Din=0 Mod=0 Freq=0 clk=0 330 | # out= 710 Din=0 Mod=0 Freq=0 clk=1 331 | # out= 710 Din=0 Mod=0 Freq=0 clk=0 332 | # out= 710 Din=0 Mod=0 Freq=0 clk=1 333 | # out= 710 Din=0 Mod=0 Freq=0 clk=0 334 | # out= 710 Din=0 Mod=0 Freq=0 clk=1 335 | # out= 710 Din=0 Mod=0 Freq=0 clk=0 336 | # out= 617 Din=0 Mod=0 Freq=0 clk=1 337 | # out= 617 Din=0 Mod=0 Freq=0 clk=0 338 | # out= 617 Din=0 Mod=0 Freq=0 clk=1 339 | # out= 617 Din=0 Mod=0 Freq=0 clk=0 340 | # out= 617 Din=0 Mod=0 Freq=0 clk=1 341 | # out= 617 Din=0 Mod=0 Freq=0 clk=0 342 | # out= 617 Din=0 Mod=0 Freq=0 clk=1 343 | # out= 617 Din=0 Mod=0 Freq=0 clk=0 344 | # out= 529 Din=0 Mod=0 Freq=0 clk=1 345 | # out= 529 Din=0 Mod=0 Freq=0 clk=0 346 | # out= 529 Din=0 Mod=0 Freq=0 clk=1 347 | # out= 529 Din=0 Mod=0 Freq=0 clk=0 348 | # out= 529 Din=0 Mod=0 Freq=0 clk=1 349 | # out= 529 Din=0 Mod=0 Freq=0 clk=0 350 | # out= 529 Din=0 Mod=0 Freq=0 clk=1 351 | # out= 529 Din=0 Mod=0 Freq=0 clk=0 352 | # out= 444 Din=0 Mod=0 Freq=0 clk=1 353 | # out= 444 Din=0 Mod=0 Freq=0 clk=0 354 | # out= 444 Din=0 Mod=0 Freq=0 clk=1 355 | # out= 444 Din=0 Mod=0 Freq=0 clk=0 356 | # out= 444 Din=0 Mod=0 Freq=0 clk=1 357 | # out= 444 Din=0 Mod=0 Freq=0 clk=0 358 | # out= 444 Din=0 Mod=0 Freq=0 clk=1 359 | # out= 444 Din=0 Mod=0 Freq=0 clk=0 360 | # out= 366 Din=0 Mod=0 Freq=0 clk=1 361 | # out= 366 Din=0 Mod=0 Freq=0 clk=0 362 | # out= 366 Din=0 Mod=0 Freq=0 clk=1 363 | # out= 366 Din=0 Mod=0 Freq=0 clk=0 364 | # out= 366 Din=0 Mod=0 Freq=0 clk=1 365 | # out= 366 Din=0 Mod=0 Freq=0 clk=0 366 | # out= 366 Din=0 Mod=0 Freq=0 clk=1 367 | # out= 366 Din=0 Mod=0 Freq=0 clk=0 368 | # out= 293 Din=0 Mod=0 Freq=0 clk=1 369 | # out= 293 Din=0 Mod=0 Freq=0 clk=0 370 | # out= 293 Din=0 Mod=0 Freq=0 clk=1 371 | # out= 293 Din=0 Mod=0 Freq=0 clk=0 372 | # out= 293 Din=0 Mod=0 Freq=0 clk=1 373 | # out= 293 Din=0 Mod=0 Freq=0 clk=0 374 | # out= 293 Din=0 Mod=0 Freq=0 clk=1 375 | # out= 293 Din=0 Mod=0 Freq=0 clk=0 376 | # out= 227 Din=0 Mod=0 Freq=0 clk=1 377 | # out= 227 Din=0 Mod=0 Freq=0 clk=0 378 | # out= 227 Din=0 Mod=0 Freq=0 clk=1 379 | # out= 227 Din=0 Mod=0 Freq=0 clk=0 380 | # out= 227 Din=0 Mod=0 Freq=0 clk=1 381 | # out= 227 Din=0 Mod=0 Freq=0 clk=0 382 | # out= 227 Din=0 Mod=0 Freq=0 clk=1 383 | # out= 227 Din=0 Mod=0 Freq=0 clk=0 384 | # out= 169 Din=0 Mod=0 Freq=0 clk=1 385 | # out= 169 Din=0 Mod=0 Freq=0 clk=0 386 | # out= 169 Din=0 Mod=0 Freq=0 clk=1 387 | # out= 169 Din=0 Mod=0 Freq=0 clk=0 388 | # out= 169 Din=0 Mod=0 Freq=0 clk=1 389 | # out= 169 Din=0 Mod=0 Freq=0 clk=0 390 | # out= 169 Din=0 Mod=0 Freq=0 clk=1 391 | # out= 169 Din=0 Mod=0 Freq=0 clk=0 392 | # out= 118 Din=0 Mod=0 Freq=0 clk=1 393 | # out= 118 Din=0 Mod=0 Freq=0 clk=0 394 | # out= 118 Din=0 Mod=0 Freq=0 clk=1 395 | # out= 118 Din=0 Mod=0 Freq=0 clk=0 396 | # out= 118 Din=0 Mod=0 Freq=0 clk=1 397 | # out= 118 Din=0 Mod=0 Freq=0 clk=0 398 | # out= 118 Din=0 Mod=0 Freq=0 clk=1 399 | # out= 118 Din=0 Mod=0 Freq=0 clk=0 400 | # out= 76 Din=0 Mod=0 Freq=0 clk=1 401 | # out= 76 Din=0 Mod=0 Freq=0 clk=0 402 | # out= 76 Din=0 Mod=0 Freq=0 clk=1 403 | # out= 76 Din=0 Mod=0 Freq=0 clk=0 404 | # out= 76 Din=0 Mod=0 Freq=0 clk=1 405 | # out= 76 Din=0 Mod=0 Freq=0 clk=0 406 | # out= 76 Din=0 Mod=0 Freq=0 clk=1 407 | # out= 76 Din=0 Mod=0 Freq=0 clk=0 408 | # out= 43 Din=0 Mod=0 Freq=0 clk=1 409 | # out= 43 Din=0 Mod=0 Freq=0 clk=0 410 | # out= 43 Din=0 Mod=0 Freq=0 clk=1 411 | # out= 43 Din=0 Mod=0 Freq=0 clk=0 412 | # out= 43 Din=0 Mod=0 Freq=0 clk=1 413 | # out= 43 Din=0 Mod=0 Freq=0 clk=0 414 | # out= 43 Din=0 Mod=0 Freq=0 clk=1 415 | # out= 43 Din=0 Mod=0 Freq=0 clk=0 416 | # out= 19 Din=0 Mod=0 Freq=0 clk=1 417 | # out= 19 Din=0 Mod=0 Freq=0 clk=0 418 | # out= 19 Din=0 Mod=0 Freq=0 clk=1 419 | # out= 19 Din=0 Mod=0 Freq=0 clk=0 420 | # out= 19 Din=0 Mod=0 Freq=0 clk=1 421 | # out= 19 Din=0 Mod=0 Freq=0 clk=0 422 | # out= 19 Din=0 Mod=0 Freq=0 clk=1 423 | # out= 19 Din=0 Mod=0 Freq=0 clk=0 424 | # out= 5 Din=0 Mod=0 Freq=0 clk=1 425 | # out= 5 Din=0 Mod=0 Freq=0 clk=0 426 | # out= 5 Din=0 Mod=0 Freq=0 clk=1 427 | # out= 5 Din=0 Mod=0 Freq=0 clk=0 428 | # out= 5 Din=0 Mod=0 Freq=0 clk=1 429 | # out= 5 Din=0 Mod=0 Freq=0 clk=0 430 | # out= 5 Din=0 Mod=0 Freq=0 clk=1 431 | # out= 5 Din=0 Mod=0 Freq=0 clk=0 432 | # out= 0 Din=0 Mod=0 Freq=0 clk=1 433 | # out= 0 Din=0 Mod=0 Freq=0 clk=0 434 | # out= 0 Din=0 Mod=0 Freq=0 clk=1 435 | # out= 0 Din=0 Mod=0 Freq=0 clk=0 436 | # out= 0 Din=0 Mod=0 Freq=0 clk=1 437 | # out= 0 Din=0 Mod=0 Freq=0 clk=0 438 | # out= 0 Din=0 Mod=0 Freq=0 clk=1 439 | # out= 0 Din=0 Mod=0 Freq=0 clk=0 440 | # out= 5 Din=0 Mod=0 Freq=0 clk=1 441 | # out= 5 Din=0 Mod=0 Freq=0 clk=0 442 | # out= 5 Din=0 Mod=0 Freq=0 clk=1 443 | # out= 5 Din=0 Mod=0 Freq=0 clk=0 444 | # out= 5 Din=0 Mod=0 Freq=0 clk=1 445 | # out= 5 Din=0 Mod=0 Freq=0 clk=0 446 | # out= 5 Din=0 Mod=0 Freq=0 clk=1 447 | # out= 5 Din=0 Mod=0 Freq=0 clk=0 448 | # out= 19 Din=0 Mod=0 Freq=0 clk=1 449 | # out= 19 Din=0 Mod=0 Freq=0 clk=0 450 | # out= 19 Din=0 Mod=0 Freq=0 clk=1 451 | # out= 19 Din=0 Mod=0 Freq=0 clk=0 452 | # out= 19 Din=0 Mod=0 Freq=0 clk=1 453 | # out= 19 Din=0 Mod=0 Freq=0 clk=0 454 | # out= 19 Din=0 Mod=0 Freq=0 clk=1 455 | # out= 19 Din=0 Mod=0 Freq=0 clk=0 456 | # out= 43 Din=0 Mod=0 Freq=0 clk=1 457 | # out= 43 Din=0 Mod=0 Freq=0 clk=0 458 | # out= 43 Din=0 Mod=0 Freq=0 clk=1 459 | # out= 43 Din=0 Mod=0 Freq=0 clk=0 460 | # out= 43 Din=0 Mod=0 Freq=0 clk=1 461 | # out= 43 Din=0 Mod=0 Freq=0 clk=0 462 | # out= 43 Din=0 Mod=0 Freq=0 clk=1 463 | # out= 43 Din=0 Mod=0 Freq=0 clk=0 464 | # out= 76 Din=0 Mod=0 Freq=0 clk=1 465 | # out= 76 Din=0 Mod=0 Freq=0 clk=0 466 | # out= 76 Din=0 Mod=0 Freq=0 clk=1 467 | # out= 76 Din=0 Mod=0 Freq=0 clk=0 468 | # out= 76 Din=0 Mod=0 Freq=0 clk=1 469 | # out= 76 Din=0 Mod=0 Freq=0 clk=0 470 | # out= 76 Din=0 Mod=0 Freq=0 clk=1 471 | # out= 76 Din=0 Mod=0 Freq=0 clk=0 472 | # out= 118 Din=0 Mod=0 Freq=0 clk=1 473 | # out= 118 Din=0 Mod=0 Freq=0 clk=0 474 | # out= 118 Din=0 Mod=0 Freq=0 clk=1 475 | # out= 118 Din=0 Mod=0 Freq=0 clk=0 476 | # out= 118 Din=0 Mod=0 Freq=0 clk=1 477 | # out= 118 Din=0 Mod=0 Freq=0 clk=0 478 | # out= 118 Din=0 Mod=0 Freq=0 clk=1 479 | # out= 118 Din=0 Mod=0 Freq=0 clk=0 480 | # out= 169 Din=0 Mod=0 Freq=0 clk=1 481 | # out= 169 Din=0 Mod=0 Freq=0 clk=0 482 | # out= 169 Din=0 Mod=0 Freq=0 clk=1 483 | # out= 169 Din=0 Mod=0 Freq=0 clk=0 484 | # out= 169 Din=0 Mod=0 Freq=0 clk=1 485 | # out= 169 Din=0 Mod=0 Freq=0 clk=0 486 | # out= 169 Din=0 Mod=0 Freq=0 clk=1 487 | # out= 169 Din=0 Mod=0 Freq=0 clk=0 488 | # out= 227 Din=0 Mod=0 Freq=0 clk=1 489 | # out= 227 Din=0 Mod=0 Freq=0 clk=0 490 | # out= 227 Din=0 Mod=0 Freq=0 clk=1 491 | # out= 227 Din=0 Mod=0 Freq=0 clk=0 492 | # out= 227 Din=0 Mod=0 Freq=0 clk=1 493 | # out= 227 Din=0 Mod=0 Freq=0 clk=0 494 | # out= 227 Din=0 Mod=0 Freq=0 clk=1 495 | # out= 227 Din=0 Mod=0 Freq=0 clk=0 496 | # out= 293 Din=0 Mod=0 Freq=0 clk=1 497 | # out= 293 Din=0 Mod=0 Freq=0 clk=0 498 | # out= 293 Din=0 Mod=0 Freq=0 clk=1 499 | # out= 293 Din=0 Mod=0 Freq=0 clk=0 500 | # out= 293 Din=0 Mod=0 Freq=0 clk=1 501 | # out= 293 Din=0 Mod=0 Freq=0 clk=0 502 | # out= 293 Din=0 Mod=0 Freq=0 clk=1 503 | # out= 293 Din=0 Mod=0 Freq=0 clk=0 504 | # out= 366 Din=0 Mod=0 Freq=0 clk=1 505 | # out= 366 Din=0 Mod=0 Freq=0 clk=0 506 | # out= 366 Din=0 Mod=0 Freq=0 clk=1 507 | # out= 366 Din=0 Mod=0 Freq=0 clk=0 508 | # out= 366 Din=0 Mod=0 Freq=0 clk=1 509 | # out= 366 Din=0 Mod=0 Freq=0 clk=0 510 | # out= 366 Din=0 Mod=0 Freq=0 clk=1 511 | # out= 366 Din=0 Mod=0 Freq=0 clk=0 512 | # out= 444 Din=0 Mod=0 Freq=0 clk=1 513 | # out= 444 Din=0 Mod=0 Freq=0 clk=0 514 | # out= 444 Din=0 Mod=0 Freq=0 clk=1 515 | # out= 444 Din=0 Mod=0 Freq=0 clk=0 516 | # out= 444 Din=0 Mod=0 Freq=0 clk=1 517 | # out= 444 Din=0 Mod=0 Freq=0 clk=0 518 | # out= 444 Din=0 Mod=0 Freq=0 clk=1 519 | # out= 444 Din=0 Mod=0 Freq=0 clk=0 520 | # out= 529 Din=0 Mod=0 Freq=0 clk=1 521 | # out= 529 Din=0 Mod=0 Freq=0 clk=0 522 | # out= 529 Din=0 Mod=0 Freq=0 clk=1 523 | # out= 529 Din=0 Mod=0 Freq=0 clk=0 524 | # out= 529 Din=0 Mod=0 Freq=0 clk=1 525 | # out= 529 Din=0 Mod=0 Freq=0 clk=0 526 | # out= 529 Din=0 Mod=0 Freq=0 clk=1 527 | # out= 529 Din=0 Mod=0 Freq=0 clk=0 528 | # out= 617 Din=0 Mod=0 Freq=0 clk=1 529 | # out= 617 Din=0 Mod=0 Freq=0 clk=0 530 | # out= 617 Din=0 Mod=0 Freq=0 clk=1 531 | # out= 617 Din=0 Mod=0 Freq=0 clk=0 532 | # out= 617 Din=0 Mod=0 Freq=0 clk=1 533 | # out= 617 Din=0 Mod=0 Freq=0 clk=0 534 | # out= 617 Din=0 Mod=0 Freq=0 clk=1 535 | # out= 617 Din=0 Mod=0 Freq=0 clk=0 536 | # out= 710 Din=0 Mod=0 Freq=0 clk=1 537 | # out= 710 Din=0 Mod=0 Freq=0 clk=0 538 | # out= 710 Din=0 Mod=0 Freq=0 clk=1 539 | # out= 710 Din=0 Mod=0 Freq=0 clk=0 540 | # out= 710 Din=0 Mod=0 Freq=0 clk=1 541 | # out= 710 Din=0 Mod=0 Freq=0 clk=0 542 | # out= 710 Din=0 Mod=0 Freq=0 clk=1 543 | # out= 710 Din=0 Mod=0 Freq=0 clk=0 544 | # out= 805 Din=0 Mod=0 Freq=0 clk=1 545 | # out= 805 Din=0 Mod=0 Freq=0 clk=0 546 | # out= 805 Din=0 Mod=0 Freq=0 clk=1 547 | # out= 805 Din=0 Mod=0 Freq=0 clk=0 548 | # out= 805 Din=0 Mod=0 Freq=0 clk=1 549 | # out= 805 Din=0 Mod=0 Freq=0 clk=0 550 | # out= 805 Din=0 Mod=0 Freq=0 clk=1 551 | # out= 805 Din=0 Mod=0 Freq=0 clk=0 552 | # out= 902 Din=0 Mod=0 Freq=0 clk=1 553 | # out= 902 Din=0 Mod=0 Freq=0 clk=0 554 | # out= 902 Din=0 Mod=0 Freq=0 clk=1 555 | # out= 902 Din=0 Mod=0 Freq=0 clk=0 556 | # out= 902 Din=0 Mod=0 Freq=0 clk=1 557 | # out= 902 Din=0 Mod=0 Freq=0 clk=0 558 | # out= 902 Din=0 Mod=0 Freq=0 clk=1 559 | # out= 1000 Din=1 Mod=0 Freq=0 clk=0 560 | # out= 1098 Din=1 Mod=0 Freq=0 clk=1 561 | # out= 1098 Din=1 Mod=0 Freq=0 clk=0 562 | # out= 1195 Din=1 Mod=0 Freq=0 clk=1 563 | # out= 1195 Din=1 Mod=0 Freq=0 clk=0 564 | # out= 1290 Din=1 Mod=0 Freq=0 clk=1 565 | # out= 1290 Din=1 Mod=0 Freq=0 clk=0 566 | # out= 1383 Din=1 Mod=0 Freq=0 clk=1 567 | # out= 1383 Din=1 Mod=0 Freq=0 clk=0 568 | # out= 1471 Din=1 Mod=0 Freq=0 clk=1 569 | # out= 1471 Din=1 Mod=0 Freq=0 clk=0 570 | # out= 1556 Din=1 Mod=0 Freq=0 clk=1 571 | # out= 1556 Din=1 Mod=0 Freq=0 clk=0 572 | # out= 1634 Din=1 Mod=0 Freq=0 clk=1 573 | # out= 1634 Din=1 Mod=0 Freq=0 clk=0 574 | # out= 1707 Din=1 Mod=0 Freq=0 clk=1 575 | # out= 1707 Din=1 Mod=0 Freq=0 clk=0 576 | # out= 1773 Din=1 Mod=0 Freq=0 clk=1 577 | # out= 1773 Din=1 Mod=0 Freq=0 clk=0 578 | # out= 1831 Din=1 Mod=0 Freq=0 clk=1 579 | # out= 1831 Din=1 Mod=0 Freq=0 clk=0 580 | # out= 1882 Din=1 Mod=0 Freq=0 clk=1 581 | # out= 1882 Din=1 Mod=0 Freq=0 clk=0 582 | # out= 1924 Din=1 Mod=0 Freq=0 clk=1 583 | # out= 1924 Din=1 Mod=0 Freq=0 clk=0 584 | # out= 1957 Din=1 Mod=0 Freq=0 clk=1 585 | # out= 1957 Din=1 Mod=0 Freq=0 clk=0 586 | # out= 1981 Din=1 Mod=0 Freq=0 clk=1 587 | # out= 1981 Din=1 Mod=0 Freq=0 clk=0 588 | # out= 1995 Din=1 Mod=0 Freq=0 clk=1 589 | # out= 1995 Din=1 Mod=0 Freq=0 clk=0 590 | # out= 2000 Din=1 Mod=0 Freq=0 clk=1 591 | # out= 2000 Din=1 Mod=0 Freq=0 clk=0 592 | # out= 1995 Din=1 Mod=0 Freq=0 clk=1 593 | # out= 1995 Din=1 Mod=0 Freq=0 clk=0 594 | # out= 1981 Din=1 Mod=0 Freq=0 clk=1 595 | # out= 1981 Din=1 Mod=0 Freq=0 clk=0 596 | # out= 1957 Din=1 Mod=0 Freq=0 clk=1 597 | # out= 1957 Din=1 Mod=0 Freq=0 clk=0 598 | # out= 1924 Din=1 Mod=0 Freq=0 clk=1 599 | # out= 1924 Din=1 Mod=0 Freq=0 clk=0 600 | # out= 1882 Din=1 Mod=0 Freq=0 clk=1 601 | # out= 1882 Din=1 Mod=0 Freq=0 clk=0 602 | # out= 1831 Din=1 Mod=0 Freq=0 clk=1 603 | # out= 1831 Din=1 Mod=0 Freq=0 clk=0 604 | # out= 1773 Din=1 Mod=0 Freq=0 clk=1 605 | # out= 1773 Din=1 Mod=0 Freq=0 clk=0 606 | # out= 1707 Din=1 Mod=0 Freq=0 clk=1 607 | # out= 1707 Din=1 Mod=0 Freq=0 clk=0 608 | # out= 1634 Din=1 Mod=0 Freq=0 clk=1 609 | # out= 1634 Din=1 Mod=0 Freq=0 clk=0 610 | # out= 1556 Din=1 Mod=0 Freq=0 clk=1 611 | # out= 1556 Din=1 Mod=0 Freq=0 clk=0 612 | # out= 1471 Din=1 Mod=0 Freq=0 clk=1 613 | # out= 1471 Din=1 Mod=0 Freq=0 clk=0 614 | # out= 1383 Din=1 Mod=0 Freq=0 clk=1 615 | # out= 1383 Din=1 Mod=0 Freq=0 clk=0 616 | # out= 1290 Din=1 Mod=0 Freq=0 clk=1 617 | # out= 1290 Din=1 Mod=0 Freq=0 clk=0 618 | # out= 1195 Din=1 Mod=0 Freq=0 clk=1 619 | # out= 1195 Din=1 Mod=0 Freq=0 clk=0 620 | # out= 1098 Din=1 Mod=0 Freq=0 clk=1 621 | # out= 1098 Din=1 Mod=0 Freq=0 clk=0 622 | # out= 1000 Din=1 Mod=0 Freq=0 clk=1 623 | # out= 1000 Din=1 Mod=0 Freq=0 clk=0 624 | # out= 902 Din=1 Mod=0 Freq=0 clk=1 625 | # out= 902 Din=1 Mod=0 Freq=0 clk=0 626 | # out= 805 Din=1 Mod=0 Freq=0 clk=1 627 | # out= 805 Din=1 Mod=0 Freq=0 clk=0 628 | # out= 710 Din=1 Mod=0 Freq=0 clk=1 629 | # out= 710 Din=1 Mod=0 Freq=0 clk=0 630 | # out= 617 Din=1 Mod=0 Freq=0 clk=1 631 | # out= 617 Din=1 Mod=0 Freq=0 clk=0 632 | # out= 529 Din=1 Mod=0 Freq=0 clk=1 633 | # out= 529 Din=1 Mod=0 Freq=0 clk=0 634 | # out= 444 Din=1 Mod=0 Freq=0 clk=1 635 | # out= 444 Din=1 Mod=0 Freq=0 clk=0 636 | # out= 366 Din=1 Mod=0 Freq=0 clk=1 637 | # out= 366 Din=1 Mod=0 Freq=0 clk=0 638 | # out= 293 Din=1 Mod=0 Freq=0 clk=1 639 | # out= 293 Din=1 Mod=0 Freq=0 clk=0 640 | # out= 227 Din=1 Mod=0 Freq=0 clk=1 641 | # out= 227 Din=1 Mod=0 Freq=0 clk=0 642 | # out= 169 Din=1 Mod=0 Freq=0 clk=1 643 | # out= 169 Din=1 Mod=0 Freq=0 clk=0 644 | # out= 118 Din=1 Mod=0 Freq=0 clk=1 645 | # out= 118 Din=1 Mod=0 Freq=0 clk=0 646 | # out= 76 Din=1 Mod=0 Freq=0 clk=1 647 | # out= 76 Din=1 Mod=0 Freq=0 clk=0 648 | # out= 43 Din=1 Mod=0 Freq=0 clk=1 649 | # out= 43 Din=1 Mod=0 Freq=0 clk=0 650 | # out= 19 Din=1 Mod=0 Freq=0 clk=1 651 | # out= 19 Din=1 Mod=0 Freq=0 clk=0 652 | # out= 5 Din=1 Mod=0 Freq=0 clk=1 653 | # out= 5 Din=1 Mod=0 Freq=0 clk=0 654 | # out= 0 Din=1 Mod=0 Freq=0 clk=1 655 | # out= 0 Din=1 Mod=0 Freq=0 clk=0 656 | # out= 5 Din=1 Mod=0 Freq=0 clk=1 657 | # out= 5 Din=1 Mod=0 Freq=0 clk=0 658 | # out= 19 Din=1 Mod=0 Freq=0 clk=1 659 | # out= 19 Din=1 Mod=0 Freq=0 clk=0 660 | # out= 43 Din=1 Mod=0 Freq=0 clk=1 661 | # out= 43 Din=1 Mod=0 Freq=0 clk=0 662 | # out= 76 Din=1 Mod=0 Freq=0 clk=1 663 | # out= 76 Din=1 Mod=0 Freq=0 clk=0 664 | # out= 118 Din=1 Mod=0 Freq=0 clk=1 665 | # out= 118 Din=1 Mod=0 Freq=0 clk=0 666 | # out= 169 Din=1 Mod=0 Freq=0 clk=1 667 | # out= 169 Din=1 Mod=0 Freq=0 clk=0 668 | # out= 227 Din=1 Mod=0 Freq=0 clk=1 669 | # out= 227 Din=1 Mod=0 Freq=0 clk=0 670 | # out= 293 Din=1 Mod=0 Freq=0 clk=1 671 | # out= 293 Din=1 Mod=0 Freq=0 clk=0 672 | # out= 366 Din=1 Mod=0 Freq=0 clk=1 673 | # out= 366 Din=1 Mod=0 Freq=0 clk=0 674 | # out= 444 Din=1 Mod=0 Freq=0 clk=1 675 | # out= 444 Din=1 Mod=0 Freq=0 clk=0 676 | # out= 529 Din=1 Mod=0 Freq=0 clk=1 677 | # out= 529 Din=1 Mod=0 Freq=0 clk=0 678 | # out= 617 Din=1 Mod=0 Freq=0 clk=1 679 | # out= 617 Din=1 Mod=0 Freq=0 clk=0 680 | # out= 710 Din=1 Mod=0 Freq=0 clk=1 681 | # out= 710 Din=1 Mod=0 Freq=0 clk=0 682 | # out= 805 Din=1 Mod=0 Freq=0 clk=1 683 | # out= 805 Din=1 Mod=0 Freq=0 clk=0 684 | # out= 902 Din=1 Mod=0 Freq=0 clk=1 685 | # out= 902 Din=1 Mod=0 Freq=0 clk=0 686 | # out= 1000 Din=1 Mod=0 Freq=0 clk=1 687 | # out= 1000 Din=1 Mod=0 Freq=0 clk=0 688 | # out= 1098 Din=1 Mod=0 Freq=0 clk=1 689 | # out= 1098 Din=1 Mod=0 Freq=0 clk=0 690 | # out= 1195 Din=1 Mod=0 Freq=0 clk=1 691 | # out= 1195 Din=1 Mod=0 Freq=0 clk=0 692 | # out= 1290 Din=1 Mod=0 Freq=0 clk=1 693 | # out= 1290 Din=1 Mod=0 Freq=0 clk=0 694 | # out= 1383 Din=1 Mod=0 Freq=0 clk=1 695 | # out= 1383 Din=1 Mod=0 Freq=0 clk=0 696 | # out= 1471 Din=1 Mod=0 Freq=0 clk=1 697 | # out= 1471 Din=1 Mod=0 Freq=0 clk=0 698 | # out= 1556 Din=1 Mod=0 Freq=0 clk=1 699 | # out= 1556 Din=1 Mod=0 Freq=0 clk=0 700 | # out= 1634 Din=1 Mod=0 Freq=0 clk=1 701 | # out= 1634 Din=1 Mod=0 Freq=0 clk=0 702 | # out= 1707 Din=1 Mod=0 Freq=0 clk=1 703 | # out= 1707 Din=1 Mod=0 Freq=0 clk=0 704 | # out= 1773 Din=1 Mod=0 Freq=0 clk=1 705 | # out= 1773 Din=1 Mod=0 Freq=0 clk=0 706 | # out= 1831 Din=1 Mod=0 Freq=0 clk=1 707 | # out= 1831 Din=1 Mod=0 Freq=0 clk=0 708 | # out= 1882 Din=1 Mod=0 Freq=0 clk=1 709 | # out= 1882 Din=1 Mod=0 Freq=0 clk=0 710 | # out= 1924 Din=1 Mod=0 Freq=0 clk=1 711 | # out= 1924 Din=1 Mod=0 Freq=0 clk=0 712 | # out= 1957 Din=1 Mod=0 Freq=0 clk=1 713 | # out= 1957 Din=1 Mod=0 Freq=0 clk=0 714 | # out= 1981 Din=1 Mod=0 Freq=0 clk=1 715 | # out= 1981 Din=1 Mod=0 Freq=0 clk=0 716 | # out= 1995 Din=1 Mod=0 Freq=0 clk=1 717 | # out= 1995 Din=1 Mod=0 Freq=0 clk=0 718 | # out= 2000 Din=1 Mod=0 Freq=0 clk=1 719 | # out= 2000 Din=1 Mod=0 Freq=0 clk=0 720 | # out= 1995 Din=1 Mod=0 Freq=0 clk=1 721 | # out= 1995 Din=1 Mod=0 Freq=0 clk=0 722 | # out= 1981 Din=1 Mod=0 Freq=0 clk=1 723 | # out= 1981 Din=1 Mod=0 Freq=0 clk=0 724 | # out= 1957 Din=1 Mod=0 Freq=0 clk=1 725 | # out= 1957 Din=1 Mod=0 Freq=0 clk=0 726 | # out= 1924 Din=1 Mod=0 Freq=0 clk=1 727 | # out= 1924 Din=1 Mod=0 Freq=0 clk=0 728 | # out= 1882 Din=1 Mod=0 Freq=0 clk=1 729 | # out= 1882 Din=1 Mod=0 Freq=0 clk=0 730 | # out= 1831 Din=1 Mod=0 Freq=0 clk=1 731 | # out= 1831 Din=1 Mod=0 Freq=0 clk=0 732 | # out= 1773 Din=1 Mod=0 Freq=0 clk=1 733 | # out= 1773 Din=1 Mod=0 Freq=0 clk=0 734 | # out= 1707 Din=1 Mod=0 Freq=0 clk=1 735 | # out= 1707 Din=1 Mod=0 Freq=0 clk=0 736 | # out= 1634 Din=1 Mod=0 Freq=0 clk=1 737 | # out= 1634 Din=1 Mod=0 Freq=0 clk=0 738 | # out= 1556 Din=1 Mod=0 Freq=0 clk=1 739 | # out= 1556 Din=1 Mod=0 Freq=0 clk=0 740 | # out= 1471 Din=1 Mod=0 Freq=0 clk=1 741 | # out= 1471 Din=1 Mod=0 Freq=0 clk=0 742 | # out= 1383 Din=1 Mod=0 Freq=0 clk=1 743 | # out= 1383 Din=1 Mod=0 Freq=0 clk=0 744 | # out= 1290 Din=1 Mod=0 Freq=0 clk=1 745 | # out= 1290 Din=1 Mod=0 Freq=0 clk=0 746 | # out= 1195 Din=1 Mod=0 Freq=0 clk=1 747 | # out= 1195 Din=1 Mod=0 Freq=0 clk=0 748 | # out= 1098 Din=1 Mod=0 Freq=0 clk=1 749 | # out= 1098 Din=1 Mod=0 Freq=0 clk=0 750 | # out= 1000 Din=1 Mod=0 Freq=0 clk=1 751 | # out= 1000 Din=1 Mod=0 Freq=0 clk=0 752 | # out= 902 Din=1 Mod=0 Freq=0 clk=1 753 | # out= 902 Din=1 Mod=0 Freq=0 clk=0 754 | # out= 805 Din=1 Mod=0 Freq=0 clk=1 755 | # out= 805 Din=1 Mod=0 Freq=0 clk=0 756 | # out= 710 Din=1 Mod=0 Freq=0 clk=1 757 | # out= 710 Din=1 Mod=0 Freq=0 clk=0 758 | # out= 617 Din=1 Mod=0 Freq=0 clk=1 759 | # out= 617 Din=1 Mod=0 Freq=0 clk=0 760 | # out= 529 Din=1 Mod=0 Freq=0 clk=1 761 | # out= 529 Din=1 Mod=0 Freq=0 clk=0 762 | # out= 444 Din=1 Mod=0 Freq=0 clk=1 763 | # out= 444 Din=1 Mod=0 Freq=0 clk=0 764 | # out= 366 Din=1 Mod=0 Freq=0 clk=1 765 | # out= 366 Din=1 Mod=0 Freq=0 clk=0 766 | # out= 293 Din=1 Mod=0 Freq=0 clk=1 767 | # out= 293 Din=1 Mod=0 Freq=0 clk=0 768 | # out= 227 Din=1 Mod=0 Freq=0 clk=1 769 | # out= 227 Din=1 Mod=0 Freq=0 clk=0 770 | # out= 169 Din=1 Mod=0 Freq=0 clk=1 771 | # out= 169 Din=1 Mod=0 Freq=0 clk=0 772 | # out= 118 Din=1 Mod=0 Freq=0 clk=1 773 | # out= 118 Din=1 Mod=0 Freq=0 clk=0 774 | # out= 76 Din=1 Mod=0 Freq=0 clk=1 775 | # out= 76 Din=1 Mod=0 Freq=0 clk=0 776 | # out= 43 Din=1 Mod=0 Freq=0 clk=1 777 | # out= 43 Din=1 Mod=0 Freq=0 clk=0 778 | # out= 19 Din=1 Mod=0 Freq=0 clk=1 779 | # out= 19 Din=1 Mod=0 Freq=0 clk=0 780 | # out= 5 Din=1 Mod=0 Freq=0 clk=1 781 | # out= 5 Din=1 Mod=0 Freq=0 clk=0 782 | # out= 0 Din=1 Mod=0 Freq=0 clk=1 783 | # out= 0 Din=1 Mod=0 Freq=0 clk=0 784 | # out= 5 Din=1 Mod=0 Freq=0 clk=1 785 | # out= 5 Din=1 Mod=0 Freq=0 clk=0 786 | # out= 19 Din=1 Mod=0 Freq=0 clk=1 787 | # out= 19 Din=1 Mod=0 Freq=0 clk=0 788 | # out= 43 Din=1 Mod=0 Freq=0 clk=1 789 | # out= 43 Din=1 Mod=0 Freq=0 clk=0 790 | # out= 76 Din=1 Mod=0 Freq=0 clk=1 791 | # out= 76 Din=1 Mod=0 Freq=0 clk=0 792 | # out= 118 Din=1 Mod=0 Freq=0 clk=1 793 | # out= 118 Din=1 Mod=0 Freq=0 clk=0 794 | # out= 169 Din=1 Mod=0 Freq=0 clk=1 795 | # out= 169 Din=1 Mod=0 Freq=0 clk=0 796 | # out= 227 Din=1 Mod=0 Freq=0 clk=1 797 | # out= 227 Din=1 Mod=0 Freq=0 clk=0 798 | # out= 293 Din=1 Mod=0 Freq=0 clk=1 799 | # out= 293 Din=1 Mod=0 Freq=0 clk=0 800 | # out= 366 Din=1 Mod=0 Freq=0 clk=1 801 | # out= 366 Din=1 Mod=0 Freq=0 clk=0 802 | # out= 444 Din=1 Mod=0 Freq=0 clk=1 803 | # out= 444 Din=1 Mod=0 Freq=0 clk=0 804 | # out= 529 Din=1 Mod=0 Freq=0 clk=1 805 | # out= 529 Din=1 Mod=0 Freq=0 clk=0 806 | # out= 617 Din=1 Mod=0 Freq=0 clk=1 807 | # out= 617 Din=1 Mod=0 Freq=0 clk=0 808 | # out= 710 Din=1 Mod=0 Freq=0 clk=1 809 | # out= 710 Din=1 Mod=0 Freq=0 clk=0 810 | # out= 805 Din=1 Mod=0 Freq=0 clk=1 811 | # out= 805 Din=1 Mod=0 Freq=0 clk=0 812 | # out= 902 Din=1 Mod=0 Freq=0 clk=1 813 | # out= 902 Din=1 Mod=0 Freq=0 clk=0 814 | # out= 1000 Din=1 Mod=0 Freq=0 clk=1 815 | # out= 1000 Din=1 Mod=0 Freq=0 clk=0 816 | # out= 1098 Din=1 Mod=0 Freq=0 clk=1 817 | # out= 1098 Din=1 Mod=0 Freq=0 clk=0 818 | # out= 1195 Din=1 Mod=0 Freq=0 clk=1 819 | # out= 1195 Din=1 Mod=0 Freq=0 clk=0 820 | # out= 1290 Din=1 Mod=0 Freq=0 clk=1 821 | # out= 1290 Din=1 Mod=0 Freq=0 clk=0 822 | # out= 1383 Din=1 Mod=0 Freq=0 clk=1 823 | # out= 1383 Din=1 Mod=0 Freq=0 clk=0 824 | # out= 1471 Din=1 Mod=0 Freq=0 clk=1 825 | # out= 1471 Din=1 Mod=0 Freq=0 clk=0 826 | # out= 1556 Din=1 Mod=0 Freq=0 clk=1 827 | # out= 1556 Din=1 Mod=0 Freq=0 clk=0 828 | # out= 1634 Din=1 Mod=0 Freq=0 clk=1 829 | # out= 1634 Din=1 Mod=0 Freq=0 clk=0 830 | # out= 1707 Din=1 Mod=0 Freq=0 clk=1 831 | # out= 1707 Din=1 Mod=0 Freq=0 clk=0 832 | # out= 1773 Din=1 Mod=0 Freq=0 clk=1 833 | # out= 1773 Din=1 Mod=0 Freq=0 clk=0 834 | # out= 1831 Din=1 Mod=0 Freq=0 clk=1 835 | # out= 1831 Din=1 Mod=0 Freq=0 clk=0 836 | # out= 1882 Din=1 Mod=0 Freq=0 clk=1 837 | # out= 1882 Din=1 Mod=0 Freq=0 clk=0 838 | # out= 1924 Din=1 Mod=0 Freq=0 clk=1 839 | # out= 1924 Din=1 Mod=0 Freq=0 clk=0 840 | # out= 1957 Din=1 Mod=0 Freq=0 clk=1 841 | # out= 1957 Din=1 Mod=0 Freq=0 clk=0 842 | # out= 1981 Din=1 Mod=0 Freq=0 clk=1 843 | # out= 1981 Din=1 Mod=0 Freq=0 clk=0 844 | # out= 1995 Din=1 Mod=0 Freq=0 clk=1 845 | # out= 1995 Din=1 Mod=0 Freq=0 clk=0 846 | # out= 2000 Din=1 Mod=0 Freq=0 clk=1 847 | # out= 2000 Din=1 Mod=0 Freq=0 clk=0 848 | # out= 1995 Din=1 Mod=0 Freq=0 clk=1 849 | # out= 1995 Din=1 Mod=0 Freq=0 clk=0 850 | # out= 1981 Din=1 Mod=0 Freq=0 clk=1 851 | # out= 1981 Din=1 Mod=0 Freq=0 clk=0 852 | # out= 1957 Din=1 Mod=0 Freq=0 clk=1 853 | # out= 1957 Din=1 Mod=0 Freq=0 clk=0 854 | # out= 1924 Din=1 Mod=0 Freq=0 clk=1 855 | # out= 1924 Din=1 Mod=0 Freq=0 clk=0 856 | # out= 1882 Din=1 Mod=0 Freq=0 clk=1 857 | # out= 1882 Din=1 Mod=0 Freq=0 clk=0 858 | # out= 1831 Din=1 Mod=0 Freq=0 clk=1 859 | # out= 1831 Din=1 Mod=0 Freq=0 clk=0 860 | # out= 1773 Din=1 Mod=0 Freq=0 clk=1 861 | # out= 1773 Din=1 Mod=0 Freq=0 clk=0 862 | # out= 1707 Din=1 Mod=0 Freq=0 clk=1 863 | # out= 1707 Din=1 Mod=0 Freq=0 clk=0 864 | # out= 1634 Din=1 Mod=0 Freq=0 clk=1 865 | # out= 1634 Din=1 Mod=0 Freq=0 clk=0 866 | # out= 1556 Din=1 Mod=0 Freq=0 clk=1 867 | # out= 1556 Din=1 Mod=0 Freq=0 clk=0 868 | # out= 1471 Din=1 Mod=0 Freq=0 clk=1 869 | # out= 1471 Din=1 Mod=0 Freq=0 clk=0 870 | # out= 1383 Din=1 Mod=0 Freq=0 clk=1 871 | # out= 1383 Din=1 Mod=0 Freq=0 clk=0 872 | # out= 1290 Din=1 Mod=0 Freq=0 clk=1 873 | # out= 1290 Din=1 Mod=0 Freq=0 clk=0 874 | # out= 1195 Din=1 Mod=0 Freq=0 clk=1 875 | # out= 1195 Din=1 Mod=0 Freq=0 clk=0 876 | # out= 1098 Din=1 Mod=0 Freq=0 clk=1 877 | # out= 1098 Din=1 Mod=0 Freq=0 clk=0 878 | # out= 1000 Din=1 Mod=0 Freq=0 clk=1 879 | # out= 1000 Din=1 Mod=0 Freq=0 clk=0 880 | # out= 902 Din=1 Mod=0 Freq=0 clk=1 881 | # out= 902 Din=1 Mod=0 Freq=0 clk=0 882 | # out= 805 Din=1 Mod=0 Freq=0 clk=1 883 | # out= 805 Din=1 Mod=0 Freq=0 clk=0 884 | # out= 710 Din=1 Mod=0 Freq=0 clk=1 885 | # out= 710 Din=1 Mod=0 Freq=0 clk=0 886 | # out= 617 Din=1 Mod=0 Freq=0 clk=1 887 | # out= 617 Din=1 Mod=0 Freq=0 clk=0 888 | # out= 529 Din=1 Mod=0 Freq=0 clk=1 889 | # out= 529 Din=1 Mod=0 Freq=0 clk=0 890 | # out= 444 Din=1 Mod=0 Freq=0 clk=1 891 | # out= 444 Din=1 Mod=0 Freq=0 clk=0 892 | # out= 366 Din=1 Mod=0 Freq=0 clk=1 893 | # out= 366 Din=1 Mod=0 Freq=0 clk=0 894 | # out= 293 Din=1 Mod=0 Freq=0 clk=1 895 | # out= 293 Din=1 Mod=0 Freq=0 clk=0 896 | # out= 227 Din=1 Mod=0 Freq=0 clk=1 897 | # out= 227 Din=1 Mod=0 Freq=0 clk=0 898 | # out= 169 Din=1 Mod=0 Freq=0 clk=1 899 | # out= 169 Din=1 Mod=0 Freq=0 clk=0 900 | # out= 118 Din=1 Mod=0 Freq=0 clk=1 901 | # out= 118 Din=1 Mod=0 Freq=0 clk=0 902 | # out= 76 Din=1 Mod=0 Freq=0 clk=1 903 | # out= 76 Din=1 Mod=0 Freq=0 clk=0 904 | # out= 43 Din=1 Mod=0 Freq=0 clk=1 905 | # out= 43 Din=1 Mod=0 Freq=0 clk=0 906 | # out= 19 Din=1 Mod=0 Freq=0 clk=1 907 | # out= 19 Din=1 Mod=0 Freq=0 clk=0 908 | # out= 5 Din=1 Mod=0 Freq=0 clk=1 909 | # out= 5 Din=1 Mod=0 Freq=0 clk=0 910 | # out= 0 Din=1 Mod=0 Freq=0 clk=1 911 | # out= 0 Din=1 Mod=0 Freq=0 clk=0 912 | # out= 5 Din=1 Mod=0 Freq=0 clk=1 913 | # out= 5 Din=1 Mod=0 Freq=0 clk=0 914 | # out= 19 Din=1 Mod=0 Freq=0 clk=1 915 | # out= 19 Din=1 Mod=0 Freq=0 clk=0 916 | # out= 43 Din=1 Mod=0 Freq=0 clk=1 917 | # out= 43 Din=1 Mod=0 Freq=0 clk=0 918 | # out= 76 Din=1 Mod=0 Freq=0 clk=1 919 | # out= 76 Din=1 Mod=0 Freq=0 clk=0 920 | # out= 118 Din=1 Mod=0 Freq=0 clk=1 921 | # out= 118 Din=1 Mod=0 Freq=0 clk=0 922 | # out= 169 Din=1 Mod=0 Freq=0 clk=1 923 | # out= 169 Din=1 Mod=0 Freq=0 clk=0 924 | # out= 227 Din=1 Mod=0 Freq=0 clk=1 925 | # out= 227 Din=1 Mod=0 Freq=0 clk=0 926 | # out= 293 Din=1 Mod=0 Freq=0 clk=1 927 | # out= 293 Din=1 Mod=0 Freq=0 clk=0 928 | # out= 366 Din=1 Mod=0 Freq=0 clk=1 929 | # out= 366 Din=1 Mod=0 Freq=0 clk=0 930 | # out= 444 Din=1 Mod=0 Freq=0 clk=1 931 | # out= 444 Din=1 Mod=0 Freq=0 clk=0 932 | # out= 529 Din=1 Mod=0 Freq=0 clk=1 933 | # out= 529 Din=1 Mod=0 Freq=0 clk=0 934 | # out= 617 Din=1 Mod=0 Freq=0 clk=1 935 | # out= 617 Din=1 Mod=0 Freq=0 clk=0 936 | # out= 710 Din=1 Mod=0 Freq=0 clk=1 937 | # out= 710 Din=1 Mod=0 Freq=0 clk=0 938 | # out= 805 Din=1 Mod=0 Freq=0 clk=1 939 | # out= 805 Din=1 Mod=0 Freq=0 clk=0 940 | # out= 902 Din=1 Mod=0 Freq=0 clk=1 941 | # out= 902 Din=1 Mod=0 Freq=0 clk=0 942 | # out= 1000 Din=1 Mod=0 Freq=0 clk=1 943 | # out= 1000 Din=1 Mod=0 Freq=0 clk=0 944 | # out= 1098 Din=1 Mod=0 Freq=0 clk=1 945 | # out= 1098 Din=1 Mod=0 Freq=0 clk=0 946 | # out= 1195 Din=1 Mod=0 Freq=0 clk=1 947 | # out= 1195 Din=1 Mod=0 Freq=0 clk=0 948 | # out= 1290 Din=1 Mod=0 Freq=0 clk=1 949 | # out= 1290 Din=1 Mod=0 Freq=0 clk=0 950 | # out= 1383 Din=1 Mod=0 Freq=0 clk=1 951 | # out= 1383 Din=1 Mod=0 Freq=0 clk=0 952 | # out= 1471 Din=1 Mod=0 Freq=0 clk=1 953 | # out= 1471 Din=1 Mod=0 Freq=0 clk=0 954 | # out= 1556 Din=1 Mod=0 Freq=0 clk=1 955 | # out= 1556 Din=1 Mod=0 Freq=0 clk=0 956 | # out= 1634 Din=1 Mod=0 Freq=0 clk=1 957 | # out= 1634 Din=1 Mod=0 Freq=0 clk=0 958 | # out= 1707 Din=1 Mod=0 Freq=0 clk=1 959 | # out= 1707 Din=1 Mod=0 Freq=0 clk=0 960 | # out= 1773 Din=1 Mod=0 Freq=0 clk=1 961 | # out= 1773 Din=1 Mod=0 Freq=0 clk=0 962 | # out= 1831 Din=1 Mod=0 Freq=0 clk=1 963 | # out= 1831 Din=1 Mod=0 Freq=0 clk=0 964 | # out= 1882 Din=1 Mod=0 Freq=0 clk=1 965 | # out= 1882 Din=1 Mod=0 Freq=0 clk=0 966 | # out= 1924 Din=1 Mod=0 Freq=0 clk=1 967 | # out= 1924 Din=1 Mod=0 Freq=0 clk=0 968 | # out= 1957 Din=1 Mod=0 Freq=0 clk=1 969 | # out= 1957 Din=1 Mod=0 Freq=0 clk=0 970 | # out= 1981 Din=1 Mod=0 Freq=0 clk=1 971 | # out= 1981 Din=1 Mod=0 Freq=0 clk=0 972 | # out= 1995 Din=1 Mod=0 Freq=0 clk=1 973 | # out= 1995 Din=1 Mod=0 Freq=0 clk=0 974 | # out= 2000 Din=1 Mod=0 Freq=0 clk=1 975 | # out= 2000 Din=1 Mod=0 Freq=0 clk=0 976 | # out= 1995 Din=1 Mod=0 Freq=0 clk=1 977 | # out= 1995 Din=1 Mod=0 Freq=0 clk=0 978 | # out= 1981 Din=1 Mod=0 Freq=0 clk=1 979 | # out= 1981 Din=1 Mod=0 Freq=0 clk=0 980 | # out= 1957 Din=1 Mod=0 Freq=0 clk=1 981 | # out= 1957 Din=1 Mod=0 Freq=0 clk=0 982 | # out= 1924 Din=1 Mod=0 Freq=0 clk=1 983 | # out= 1924 Din=1 Mod=0 Freq=0 clk=0 984 | # out= 1882 Din=1 Mod=0 Freq=0 clk=1 985 | # out= 1882 Din=1 Mod=0 Freq=0 clk=0 986 | # out= 1831 Din=1 Mod=0 Freq=0 clk=1 987 | # out= 1831 Din=1 Mod=0 Freq=0 clk=0 988 | # out= 1773 Din=1 Mod=0 Freq=0 clk=1 989 | # out= 1773 Din=1 Mod=0 Freq=0 clk=0 990 | # out= 1707 Din=1 Mod=0 Freq=0 clk=1 991 | # out= 1707 Din=1 Mod=0 Freq=0 clk=0 992 | # out= 1634 Din=1 Mod=0 Freq=0 clk=1 993 | # out= 1634 Din=1 Mod=0 Freq=0 clk=0 994 | # out= 1556 Din=1 Mod=0 Freq=0 clk=1 995 | # out= 1556 Din=1 Mod=0 Freq=0 clk=0 996 | # out= 1471 Din=1 Mod=0 Freq=0 clk=1 997 | # out= 1471 Din=1 Mod=0 Freq=0 clk=0 998 | # out= 1383 Din=1 Mod=0 Freq=0 clk=1 999 | # out= 1383 Din=1 Mod=0 Freq=0 clk=0 1000 | # out= 1290 Din=1 Mod=0 Freq=0 clk=1 1001 | # out= 1290 Din=1 Mod=0 Freq=0 clk=0 1002 | # out= 1195 Din=1 Mod=0 Freq=0 clk=1 1003 | # out= 1195 Din=1 Mod=0 Freq=0 clk=0 1004 | # out= 1098 Din=1 Mod=0 Freq=0 clk=1 1005 | # out= 1098 Din=1 Mod=0 Freq=0 clk=0 1006 | # out= 1000 Din=1 Mod=0 Freq=0 clk=1 1007 | # out= 1000 Din=1 Mod=0 Freq=0 clk=0 1008 | # out= 902 Din=1 Mod=0 Freq=0 clk=1 1009 | # out= 902 Din=1 Mod=0 Freq=0 clk=0 1010 | # out= 805 Din=1 Mod=0 Freq=0 clk=1 1011 | # out= 805 Din=1 Mod=0 Freq=0 clk=0 1012 | # out= 710 Din=1 Mod=0 Freq=0 clk=1 1013 | # out= 710 Din=1 Mod=0 Freq=0 clk=0 1014 | # out= 617 Din=1 Mod=0 Freq=0 clk=1 1015 | # out= 617 Din=1 Mod=0 Freq=0 clk=0 1016 | # out= 529 Din=1 Mod=0 Freq=0 clk=1 1017 | # out= 529 Din=1 Mod=0 Freq=0 clk=0 1018 | # out= 444 Din=1 Mod=0 Freq=0 clk=1 1019 | # out= 444 Din=1 Mod=0 Freq=0 clk=0 1020 | # out= 366 Din=1 Mod=0 Freq=0 clk=1 1021 | # out= 366 Din=1 Mod=0 Freq=0 clk=0 1022 | # out= 293 Din=1 Mod=0 Freq=0 clk=1 1023 | # out= 293 Din=1 Mod=0 Freq=0 clk=0 1024 | # out= 227 Din=1 Mod=0 Freq=0 clk=1 1025 | # out= 227 Din=1 Mod=0 Freq=0 clk=0 1026 | # out= 169 Din=1 Mod=0 Freq=0 clk=1 1027 | # out= 169 Din=1 Mod=0 Freq=0 clk=0 1028 | # out= 118 Din=1 Mod=0 Freq=0 clk=1 1029 | # out= 118 Din=1 Mod=0 Freq=0 clk=0 1030 | # out= 76 Din=1 Mod=0 Freq=0 clk=1 1031 | # out= 76 Din=1 Mod=0 Freq=0 clk=0 1032 | # out= 43 Din=1 Mod=0 Freq=0 clk=1 1033 | # out= 43 Din=1 Mod=0 Freq=0 clk=0 1034 | # out= 19 Din=1 Mod=0 Freq=0 clk=1 1035 | # out= 19 Din=1 Mod=0 Freq=0 clk=0 1036 | # out= 5 Din=1 Mod=0 Freq=0 clk=1 1037 | # out= 5 Din=1 Mod=0 Freq=0 clk=0 1038 | # out= 0 Din=1 Mod=0 Freq=0 clk=1 1039 | # out= 0 Din=1 Mod=0 Freq=0 clk=0 1040 | # out= 5 Din=1 Mod=0 Freq=0 clk=1 1041 | # out= 5 Din=1 Mod=0 Freq=0 clk=0 1042 | # out= 19 Din=1 Mod=0 Freq=0 clk=1 1043 | # out= 19 Din=1 Mod=0 Freq=0 clk=0 1044 | # out= 43 Din=1 Mod=0 Freq=0 clk=1 1045 | # out= 43 Din=1 Mod=0 Freq=0 clk=0 1046 | # out= 76 Din=1 Mod=0 Freq=0 clk=1 1047 | # out= 76 Din=1 Mod=0 Freq=0 clk=0 1048 | # out= 118 Din=1 Mod=0 Freq=0 clk=1 1049 | # out= 118 Din=1 Mod=0 Freq=0 clk=0 1050 | # out= 169 Din=1 Mod=0 Freq=0 clk=1 1051 | # out= 169 Din=1 Mod=0 Freq=0 clk=0 1052 | # out= 227 Din=1 Mod=0 Freq=0 clk=1 1053 | # out= 227 Din=1 Mod=0 Freq=0 clk=0 1054 | # out= 293 Din=1 Mod=0 Freq=0 clk=1 1055 | # out= 293 Din=1 Mod=0 Freq=0 clk=0 1056 | # out= 366 Din=1 Mod=0 Freq=0 clk=1 1057 | # out= 366 Din=1 Mod=0 Freq=0 clk=0 1058 | # out= 444 Din=1 Mod=0 Freq=0 clk=1 1059 | # out= 444 Din=1 Mod=0 Freq=0 clk=0 1060 | # out= 529 Din=1 Mod=0 Freq=0 clk=1 1061 | # out= 529 Din=1 Mod=0 Freq=0 clk=0 1062 | # out= 617 Din=1 Mod=0 Freq=0 clk=1 1063 | # out= 617 Din=1 Mod=0 Freq=0 clk=0 1064 | # out= 710 Din=1 Mod=0 Freq=0 clk=1 1065 | # out= 710 Din=1 Mod=0 Freq=0 clk=0 1066 | # out= 805 Din=1 Mod=0 Freq=0 clk=1 1067 | # out= 805 Din=1 Mod=0 Freq=0 clk=0 1068 | # out= 902 Din=1 Mod=0 Freq=0 clk=1 1069 | # out= 902 Din=1 Mod=0 Freq=0 clk=0 1070 | # out= 1000 Din=1 Mod=0 Freq=0 clk=1 1071 | # End time: 11:29:48 on Nov 28,2019, Elapsed time: 0:47:06 1072 | # Errors: 0, Warnings: 4 1073 | -------------------------------------------------------------------------------- /values.xlsx: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/basil2000/Modulator-Verilog-/a6f52b01dc4249a9566fe0f716f9bd2fa4c1b06c/values.xlsx --------------------------------------------------------------------------------