├── .gitignore
├── 3dsunbrick.sh
├── LICENSE
├── MMC_SEQUENCE.txt
├── README.md
├── RPU_guide.txt
├── defines.h
├── main.c
└── util.h
/.gitignore:
--------------------------------------------------------------------------------
1 | # Object files
2 | *.o
3 | *.ko
4 |
5 | # Libraries
6 | *.lib
7 | *.a
8 |
9 | # Shared objects (inc. Windows DLLs)
10 | *.dll
11 | *.so
12 | *.so.*
13 | *.dylib
14 |
15 | # Executables
16 | *.exe
17 | *.out
18 | *.app
19 |
20 | rpu
21 |
--------------------------------------------------------------------------------
/3dsunbrick.sh:
--------------------------------------------------------------------------------
1 | #!/bin/bash
2 |
3 | rm rpu 2>/dev/null
4 |
5 | gcc -std=c99 main.c -o rpu
6 |
7 | clear
8 |
9 | stdbuf -e0 -o0 ./rpu | tee /boot/RPU_log.txt
10 |
11 |
12 |
13 |
--------------------------------------------------------------------------------
/LICENSE:
--------------------------------------------------------------------------------
1 | GNU GENERAL PUBLIC LICENSE
2 | Version 2, June 1991
3 |
4 | Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
5 | 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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340 |
--------------------------------------------------------------------------------
/MMC_SEQUENCE.txt:
--------------------------------------------------------------------------------
1 | CMD0 till idle
2 |
3 | CMD1(0x0) -> OCR
4 |
5 | CMD1(OCR) untill ready
6 |
7 | CMD2 -> CID
8 |
9 | CMD3(RCA<<16)
10 |
11 | CMD9(RCA<<16) -> CSD
12 |
13 | CMD7(RCA<<16)
14 |
15 | CMD13(RCA<<16)
16 |
17 |
18 |
19 |
--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
1 | RPU
2 | ===
3 |
4 | Raspberry Pi based 3DS unbricker
5 |
6 |
7 | This tool is erotic cartoon ware.
8 |
9 | If you like it please send one erotic cartoon picture to rpu.bkifft.gbatemp@gmail.com (even if you draw one in paint yourself, everyone likes to draw the cock and balls).
10 |
11 | WARNING: Do not run this tool with a kernel that has the MMC/SD subsystem enabled!
12 | (The supplied linux image has those drivers disabled. Also the tool should refuse to run if those drivers are loaded.)
13 |
14 |
15 |
16 | This tool can be used to unbrick a launcher.dat bricked 3DS.
17 |
18 | WARNING: It seems that as of 2015-12-04 whoever is responsible for GW launcher.dat based bricks changed the MMC lock key. Therefore it's now impossible to unlock without a good NAND dump (at least for now, perhaps forever)!
19 |
20 | Check RPU_guide.txt for requirements and instructions.
21 |
22 | Para visitar el tutorial en Español pulsa el siguiente enlace (Traducido por egarrote): http://www.elotrolado.net/hilo_tutorial-reparar-bricks-con-raspberry-pi-y-backup-de-la-nand_1979374
23 |
24 | Per leggere la guida in italiano (traduzione by StandardBus) visita http://www.moddingstudio.com/content.php?1697-Guida-al-recupero-dei-3DS-brickati-(Gateway-brick)
25 |
26 | Deutsche Version dieses Guides (übersetzt von didi) auf http://www.psxtools.de/thread.php?threadid=61918
27 |
28 |
29 |
--------------------------------------------------------------------------------
/RPU_guide.txt:
--------------------------------------------------------------------------------
1 | WARNING: It seems that as of 2015-12-04 whoever is responsible for GW launcher.dat based bricks changed the MMC lock key. Therefore it's now impossible to unlock without a good NAND dump (at least for now, perhaps forever)!
2 |
3 | [This guide like the whole project is released under the GPL. If you want to translate it or write your own guide feel free to do so and please send me a link to it so i can add it here.]
4 |
5 | Para visitar el tutorial en Español pulsa el siguiente enlace (Traducido por egarrote): http://www.elotrolado.net/hilo_tutorial-reparar-bricks-con-raspberry-pi-y-backup-de-la-nand_1979374
6 |
7 | Per leggere la guida in italiano (traduzione by StandardBus) visita http://www.moddingstudio.com/content.php?1697-Guida-al-recupero-dei-3DS-brickati-(Gateway-brick)
8 |
9 | Deutsche Version dieses Guides (übersetzt von didi) auf http://www.psxtools.de/thread.php?threadid=61918
10 |
11 |
12 | RPU: Raspberry Pi based 3DS unbricker
13 |
14 | This tool is erotic cartoon ware.
15 |
16 | If you like it please send one erotic cartoon picture to rpu.bkifft.gbatemp@gmail.com (even if you draw one in paint yourself, everyone likes to draw the cock and balls).
17 |
18 |
19 |
20 | Even though this tool already unbricked 3DSes successfully (thirty-ish that i know of and counting) use it at your own risk.
21 |
22 |
23 | Bill of materials:
24 |
25 | -a launcher.dat bricked 3DS with the NAND dump HW mod as described in http://gbatemp.net/threads/nand-flash-dump-3ds-xl.350668/ or http://gbatemp.net/threads/nand-flash-dump-3ds.353263/
26 |
27 | -a Raspberry Pi
28 |
29 | -a way to power the Pi (microUSB plug, either by using an adaptor cable or a smartphone charger)
30 |
31 | -a SD card >= 2GB
32 |
33 | -an USB stick >= 2GB
34 |
35 | -mini linux image https://drive.google.com/file/d/0B4Gv-RnAT-F_THRPT21NWjNWVXc (based on SpillPassPi http://www.spillmonkey.com/?page_id=5)
36 |
37 | -ability to connect the Pi to your ethernet network (for online acces and ssh)
38 |
39 |
40 |
41 | If you can't/won't connect the Pi to the network you also need:
42 |
43 | -update file from https://github.com/bkifft/RPU/archive/master.zip
44 |
45 | -USB Keyboard
46 |
47 | -if you've got a Pi with only one USB port an USB hub (preferably powered)
48 |
49 | -HDMI cable and HDMI capable TV/monitor
50 |
51 |
52 |
53 | Instructions:
54 |
55 | 1) Extract the linux image.
56 |
57 | 2) Write the image to the SD card and the USB stick (using win32diskimager for example).
58 |
59 | 3a) When you use ethernet: check the network settings in the file "interfaces" on the FAT partititon (the one shown on windows) of the USB stick and tweak it to your needs, it's preset to IP 192.168.1.244 and gateway 192.168.1.1.
60 |
61 | 3b) When you dont use ethernet: rename the update zip file you downloaded earlier to RPU.zip (capital letters do matter) and put it on the USB stick FAT partititon.
62 |
63 | 4) Plug the SD card and the USB stick into the Pi (doesn't matter which USB port if you've got 2 or use an USB hub).
64 |
65 | 5) Plug in the other stuff (ethernet or HDMI and USB keyboard) then power it up by plugging in the microUSB.
66 |
67 | 6) Wait untill it booted (about one minute), if you have hooked it up via HDMI you will see the progress on the screen.
68 |
69 | 7a) If you are using it via ethernet: ssh into it (you can use putty for that if you are on windows).
70 |
71 | 8) Log in using root as username and password.
72 |
73 | 10) Type in 3dsunbrick and press enter. (If you are sure that you are already on the latest version you can skip the update check with 3dsunbrick NOUPDATE)
74 |
75 | 11) Wait for the tool to update itself and to load.
76 |
77 | 12) Read the text on the screen.
78 |
79 | 13) Remove the SD card.
80 |
81 | 14) Plug in the SDmod card connected to your 3DS and turn the 3DS on.
82 |
83 | 15) Press s and enter. The tool will try to connect to the 3DS and read it's status. If it shows an error message there are problems with your HW mod or you get interference. Try detaching the charger from your 3DS and powering the Pi from a filtered and stabilized power source (like powering it from an USB port using an USB/microUSB cable).
84 |
85 | 16) If it reports the MMC to be locked (in other words: it was able to connect to the 3DS and your brick is launcher.dat related) press u and enter.
86 |
87 | 17) Unless the tool reported an error you should now have an unbricked 3DS.
88 |
89 | 18) Don't forget to send an erotic cartoon picture to rpu.bkifft.gbatemp@gmail.com and enjoy your unbricked 3DS.
90 |
91 |
92 |
93 |
94 |
95 |
96 |
97 |
98 |
--------------------------------------------------------------------------------
/defines.h:
--------------------------------------------------------------------------------
1 | //based on https://github.com/jncronin/rpi-boot/blob/master/emmc.c by John Cronin
2 | //tweaked to be run from userland by bkifft @GBAtemp
3 |
4 | /*
5 | * Copyright (C) 2013 by John Cronin
6 | *
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy
8 | * of this software and associated documentation files (the "Software"), to deal
9 | * in the Software without restriction, including without limitation the rights
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 | * copies of the Software, and to permit persons to whom the Software is
12 | * furnished to do so, subject to the following conditions:
13 |
14 | * The above copyright notice and this permission notice shall be included in
15 | * all copies or substantial portions of the Software.
16 |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 | * THE SOFTWARE.
24 | */
25 |
26 | #ifndef _DEFINES_H
27 | #define _DEFINES_H
28 | #pragma once
29 |
30 |
31 | // SD Clock Frequencies (in Hz)
32 | #define SD_CLOCK_ID 400000
33 | #define SD_CLOCK_NORMAL 25000000
34 | #define SD_CLOCK_HIGH 50000000
35 | #define SD_CLOCK_100 100000000
36 | #define SD_CLOCK_208 208000000
37 |
38 |
39 | //emmc register base and offsets
40 | #define EMMC_BASE (void*)emmc
41 | #define BCM2708_PERI_BASE 0x20000000
42 | #define GPIO_OFFSET 0x200000
43 | #define EMMC_OFFSET 0x300000
44 | #define EMMC_ARG2 0
45 | #define EMMC_BLKSIZECNT 4
46 | #define EMMC_ARG1 8
47 | #define EMMC_CMDTM 0xC
48 | #define EMMC_RESP0 0x10
49 | #define EMMC_RESP1 0x14
50 | #define EMMC_RESP2 0x18
51 | #define EMMC_RESP3 0x1C
52 | #define EMMC_DATA 0x20
53 | #define EMMC_STATUS 0x24
54 | #define EMMC_CONTROL0 0x28
55 | #define EMMC_CONTROL1 0x2C
56 | #define EMMC_INTERRUPT 0x30
57 | #define EMMC_IRPT_MASK 0x34
58 | #define EMMC_IRPT_EN 0x38
59 | #define EMMC_CONTROL2 0x3C
60 | #define EMMC_CAPABILITIES_0 0x40
61 | #define EMMC_CAPABILITIES_1 0x44
62 | #define EMMC_FORCE_IRPT 0x50
63 | #define EMMC_BOOT_TIMEOUT 0x70
64 | #define EMMC_DBG_SEL 0x74
65 | #define EMMC_EXRDFIFO_CFG 0x80
66 | #define EMMC_EXRDFIFO_EN 0x84
67 | #define EMMC_TUNE_STEP 0x88
68 | #define EMMC_TUNE_STEPS_STD 0x8C
69 | #define EMMC_TUNE_STEPS_DDR 0x90
70 | #define EMMC_SPI_INT_SPT 0xF0
71 | #define EMMC_SLOTISR_VER 0xFC
72 |
73 | #define SD_CMD_INDEX(a) ((a) << 24)
74 | #define SD_CMD_TYPE_NORMAL 0x0
75 | #define SD_CMD_TYPE_SUSPEND (1 << 22)
76 | #define SD_CMD_TYPE_RESUME (2 << 22)
77 | #define SD_CMD_TYPE_ABORT (3 << 22)
78 | #define SD_CMD_TYPE_MASK (3 << 22)
79 | #define SD_CMD_ISDATA (1 << 21)
80 | #define SD_CMD_IXCHK_EN (1 << 20)
81 | #define SD_CMD_CRCCHK_EN (1 << 19)
82 | #define SD_CMD_RSPNS_TYPE_NONE 0 // For no response
83 | #define SD_CMD_RSPNS_TYPE_136 (1 << 16) // For response R2 (with CRC), R3,4 (no CRC)
84 | #define SD_CMD_RSPNS_TYPE_48 (2 << 16) // For responses R1, R5, R6, R7 (with CRC)
85 | #define SD_CMD_RSPNS_TYPE_48B (3 << 16) // For responses R1b, R5b (with CRC)
86 | #define SD_CMD_RSPNS_TYPE_MASK (3 << 16)
87 | #define SD_CMD_MULTI_BLOCK (1 << 5)
88 | #define SD_CMD_DAT_DIR_HC 0
89 | #define SD_CMD_DAT_DIR_CH (1 << 4)
90 | #define SD_CMD_AUTO_CMD_EN_NONE 0
91 | #define SD_CMD_AUTO_CMD_EN_CMD12 (1 << 2)
92 | #define SD_CMD_AUTO_CMD_EN_CMD23 (2 << 2)
93 | #define SD_CMD_BLKCNT_EN (1 << 1)
94 | #define SD_CMD_DMA 1
95 |
96 | #define SD_ERR_CMD_TIMEOUT 0
97 | #define SD_ERR_CMD_CRC 1
98 | #define SD_ERR_CMD_END_BIT 2
99 | #define SD_ERR_CMD_INDEX 3
100 | #define SD_ERR_DATA_TIMEOUT 4
101 | #define SD_ERR_DATA_CRC 5
102 | #define SD_ERR_DATA_END_BIT 6
103 | #define SD_ERR_CURRENT_LIMIT 7
104 | #define SD_ERR_AUTO_CMD12 8
105 | #define SD_ERR_ADMA 9
106 | #define SD_ERR_TUNING 10
107 | #define SD_ERR_RSVD 11
108 |
109 | #define SD_ERR_MASK_CMD_TIMEOUT (1 << (16 + SD_ERR_CMD_TIMEOUT))
110 | #define SD_ERR_MASK_CMD_CRC (1 << (16 + SD_ERR_CMD_CRC))
111 | #define SD_ERR_MASK_CMD_END_BIT (1 << (16 + SD_ERR_CMD_END_BIT))
112 | #define SD_ERR_MASK_CMD_INDEX (1 << (16 + SD_ERR_CMD_INDEX))
113 | #define SD_ERR_MASK_DATA_TIMEOUT (1 << (16 + SD_ERR_CMD_TIMEOUT))
114 | #define SD_ERR_MASK_DATA_CRC (1 << (16 + SD_ERR_CMD_CRC))
115 | #define SD_ERR_MASK_DATA_END_BIT (1 << (16 + SD_ERR_CMD_END_BIT))
116 | #define SD_ERR_MASK_CURRENT_LIMIT (1 << (16 + SD_ERR_CMD_CURRENT_LIMIT))
117 | #define SD_ERR_MASK_AUTO_CMD12 (1 << (16 + SD_ERR_CMD_AUTO_CMD12))
118 | #define SD_ERR_MASK_ADMA (1 << (16 + SD_ERR_CMD_ADMA))
119 | #define SD_ERR_MASK_TUNING (1 << (16 + SD_ERR_CMD_TUNING))
120 |
121 | #define SD_COMMAND_COMPLETE 1
122 | #define SD_TRANSFER_COMPLETE (1 << 1)
123 | #define SD_BLOCK_GAP_EVENT (1 << 2)
124 | #define SD_DMA_INTERRUPT (1 << 3)
125 | #define SD_BUFFER_WRITE_READY (1 << 4)
126 | #define SD_BUFFER_READ_READY (1 << 5)
127 | #define SD_CARD_INSERTION (1 << 6)
128 | #define SD_CARD_REMOVAL (1 << 7)
129 | #define SD_CARD_INTERRUPT (1 << 8)
130 |
131 | #define SD_RESP_NONE SD_CMD_RSPNS_TYPE_NONE
132 | #define SD_RESP_R1 (SD_CMD_RSPNS_TYPE_48 | SD_CMD_CRCCHK_EN)
133 | #define SD_RESP_R1b (SD_CMD_RSPNS_TYPE_48B | SD_CMD_CRCCHK_EN)
134 | #define SD_RESP_R2 (SD_CMD_RSPNS_TYPE_136 | SD_CMD_CRCCHK_EN)
135 | #define SD_RESP_R3 SD_CMD_RSPNS_TYPE_48
136 | #define SD_RESP_R4 SD_CMD_RSPNS_TYPE_136
137 | #define SD_RESP_R5 (SD_CMD_RSPNS_TYPE_48 | SD_CMD_CRCCHK_EN)
138 | #define SD_RESP_R5b (SD_CMD_RSPNS_TYPE_48B | SD_CMD_CRCCHK_EN)
139 | #define SD_RESP_R6 (SD_CMD_RSPNS_TYPE_48 | SD_CMD_CRCCHK_EN)
140 | #define SD_RESP_R7 (SD_CMD_RSPNS_TYPE_48 | SD_CMD_CRCCHK_EN)
141 |
142 | #define SD_DATA_READ (SD_CMD_ISDATA | SD_CMD_DAT_DIR_CH)
143 | #define SD_DATA_WRITE (SD_CMD_ISDATA | SD_CMD_DAT_DIR_HC)
144 |
145 | #define SD_CMD_RESERVED(a) 0xffffffff
146 |
147 | #define SUCCESS(a) (a->last_cmd_success)
148 | #define FAIL(a) (a->last_cmd_success == 0)
149 | #define TIMEOUT(a) (FAIL(a) && (a->last_error == 0))
150 | #define CMD_TIMEOUT(a) (FAIL(a) && (a->last_error & (1 << 16)))
151 | #define CMD_CRC(a) (FAIL(a) && (a->last_error & (1 << 17)))
152 | #define CMD_END_BIT(a) (FAIL(a) && (a->last_error & (1 << 18)))
153 | #define CMD_INDEX(a) (FAIL(a) && (a->last_error & (1 << 19)))
154 | #define DATA_TIMEOUT(a) (FAIL(a) && (a->last_error & (1 << 20)))
155 | #define DATA_CRC(a) (FAIL(a) && (a->last_error & (1 << 21)))
156 | #define DATA_END_BIT(a) (FAIL(a) && (a->last_error & (1 << 22)))
157 | #define CURRENT_LIMIT(a) (FAIL(a) && (a->last_error & (1 << 23)))
158 | #define ACMD12_ERROR(a) (FAIL(a) && (a->last_error & (1 << 24)))
159 | #define ADMA_ERROR(a) (FAIL(a) && (a->last_error & (1 << 25)))
160 | #define TUNING_ERROR(a) (FAIL(a) && (a->last_error & (1 << 26)))
161 |
162 | #define SD_VER_UNKNOWN 0
163 | #define SD_VER_1 1
164 | #define SD_VER_1_1 2
165 | #define SD_VER_2 3
166 | #define SD_VER_3 4
167 | #define SD_VER_4 5
168 |
169 |
170 | static char driver_name[] = "emmc";
171 | static char device_name[] = "emmc0"; // We use a single device name as there is only
172 | // one card slot in the RPi
173 |
174 | static uint32_t hci_ver = 0;
175 | static uint32_t capabilities_0 = 0;
176 | static uint32_t capabilities_1 = 0;
177 |
178 | struct sd_scr
179 | {
180 | uint32_t scr[2];
181 | uint32_t sd_bus_widths;
182 | int sd_version;
183 | };
184 |
185 | struct emmc_block_dev;
186 |
187 | struct block_device
188 | {
189 | char *driver_name;
190 | char *device_name;
191 | uint8_t *device_id;
192 | size_t dev_id_len;
193 |
194 | int supports_multiple_block_read;
195 | int supports_multiple_block_write;
196 |
197 | int (*read) (struct emmc_block_dev * dev, uint8_t * buf, size_t buf_size,
198 | uint32_t block_num, char spi);
199 | int (*write) (struct block_device * dev, uint8_t * buf, size_t buf_size,
200 | uint32_t block_num, char spi);
201 | size_t block_size;
202 | size_t num_blocks;
203 |
204 | // struct fs *fs;
205 | };
206 |
207 | struct emmc_block_dev
208 | {
209 | struct block_device bd;
210 | uint32_t card_supports_sdhc;
211 | uint32_t card_supports_18v;
212 | uint32_t card_ocr;
213 | uint32_t card_rca;
214 | uint32_t last_interrupt;
215 | uint32_t last_error;
216 |
217 | struct sd_scr *scr;
218 |
219 | int failed_voltage_switch;
220 |
221 | uint32_t last_cmd_reg;
222 | uint32_t last_cmd;
223 | uint32_t last_cmd_success;
224 | uint32_t last_r0;
225 | uint32_t last_r1;
226 | uint32_t last_r2;
227 | uint32_t last_r3;
228 |
229 | void *buf;
230 | int blocks_to_transfer;
231 | size_t block_size;
232 | int use_sdma;
233 | int card_removal;
234 | uint32_t base_clock;
235 | };
236 |
237 | static uint32_t sd_commands[] = {
238 | SD_CMD_INDEX (0),
239 | SD_CMD_INDEX (1) | SD_RESP_R3,
240 | SD_CMD_INDEX (2) | SD_RESP_R2,
241 | SD_CMD_INDEX (3) | SD_RESP_R6,
242 | SD_CMD_INDEX (4),
243 | SD_CMD_INDEX (5) | SD_RESP_R4,
244 | SD_CMD_INDEX (6) | SD_RESP_R1,
245 | SD_CMD_INDEX (7) | SD_RESP_R1b,
246 | SD_CMD_INDEX (8) | SD_RESP_R1 | SD_DATA_READ, //SD_RESP_R7,
247 | SD_CMD_INDEX (9) | SD_RESP_R2,
248 | SD_CMD_INDEX (10) | SD_RESP_R2,
249 | SD_CMD_INDEX (11) | SD_RESP_R1,
250 | SD_CMD_INDEX (12) | SD_RESP_R1b | SD_CMD_TYPE_ABORT,
251 | SD_CMD_INDEX (13) | SD_RESP_R1,
252 | SD_CMD_RESERVED (14),
253 | SD_CMD_INDEX (15),
254 | SD_CMD_INDEX (16) | SD_RESP_R1,
255 | SD_CMD_INDEX (17) | SD_RESP_R1 | SD_DATA_READ,
256 | SD_CMD_INDEX (18) | SD_RESP_R1 | SD_DATA_READ | SD_CMD_MULTI_BLOCK |
257 | SD_CMD_BLKCNT_EN,
258 | SD_CMD_INDEX (19) | SD_RESP_R1 | SD_DATA_READ,
259 | SD_CMD_INDEX (20) | SD_RESP_R1b,
260 | SD_CMD_RESERVED (21),
261 | SD_CMD_RESERVED (22),
262 | SD_CMD_INDEX (23) | SD_RESP_R1,
263 | SD_CMD_INDEX (24) | SD_RESP_R1 | SD_DATA_WRITE,
264 | SD_CMD_INDEX (25) | SD_RESP_R1 | SD_DATA_WRITE | SD_CMD_MULTI_BLOCK |
265 | SD_CMD_BLKCNT_EN,
266 | SD_CMD_RESERVED (26),
267 | SD_CMD_INDEX (27) | SD_RESP_R1 | SD_DATA_WRITE,
268 | SD_CMD_INDEX (28) | SD_RESP_R1b,
269 | SD_CMD_INDEX (29) | SD_RESP_R1b,
270 | SD_CMD_INDEX (30) | SD_RESP_R1 | SD_DATA_READ,
271 | SD_CMD_RESERVED (31),
272 | SD_CMD_INDEX (32) | SD_RESP_R1,
273 | SD_CMD_INDEX (33) | SD_RESP_R1,
274 | SD_CMD_RESERVED (34),
275 | SD_CMD_RESERVED (35),
276 | SD_CMD_RESERVED (36),
277 | SD_CMD_RESERVED (37),
278 | SD_CMD_INDEX (38) | SD_RESP_R1b,
279 | SD_CMD_RESERVED (39),
280 | SD_CMD_RESERVED (40),
281 | SD_CMD_RESERVED (41),
282 | SD_CMD_INDEX (42) | SD_RESP_R1 | SD_DATA_WRITE,
283 | SD_CMD_RESERVED (43),
284 | SD_CMD_RESERVED (44),
285 | SD_CMD_RESERVED (45),
286 | SD_CMD_RESERVED (46),
287 | SD_CMD_RESERVED (47),
288 | SD_CMD_RESERVED (48),
289 | SD_CMD_RESERVED (49),
290 | SD_CMD_RESERVED (50),
291 | SD_CMD_RESERVED (51),
292 | SD_CMD_RESERVED (52),
293 | SD_CMD_RESERVED (53),
294 | SD_CMD_RESERVED (54),
295 | SD_CMD_INDEX (55) | SD_RESP_R1,
296 | SD_CMD_INDEX (56) | SD_RESP_R1 | SD_CMD_ISDATA,
297 | SD_CMD_RESERVED (57),
298 | SD_CMD_RESERVED (58),
299 | SD_CMD_RESERVED (59),
300 | SD_CMD_RESERVED (60),
301 | SD_CMD_RESERVED (61),
302 | SD_CMD_RESERVED (62),
303 | SD_CMD_RESERVED (63)
304 | };
305 |
306 | static uint32_t sd_acommands[] = {
307 | SD_CMD_RESERVED (0),
308 | SD_CMD_RESERVED (1),
309 | SD_CMD_RESERVED (2),
310 | SD_CMD_RESERVED (3),
311 | SD_CMD_RESERVED (4),
312 | SD_CMD_RESERVED (5),
313 | SD_CMD_INDEX (6) | SD_RESP_R1,
314 | SD_CMD_RESERVED (7),
315 | SD_CMD_RESERVED (8),
316 | SD_CMD_RESERVED (9),
317 | SD_CMD_RESERVED (10),
318 | SD_CMD_RESERVED (11),
319 | SD_CMD_RESERVED (12),
320 | SD_CMD_INDEX (13) | SD_RESP_R1,
321 | SD_CMD_RESERVED (14),
322 | SD_CMD_RESERVED (15),
323 | SD_CMD_RESERVED (16),
324 | SD_CMD_RESERVED (17),
325 | SD_CMD_RESERVED (18),
326 | SD_CMD_RESERVED (19),
327 | SD_CMD_RESERVED (20),
328 | SD_CMD_RESERVED (21),
329 | SD_CMD_INDEX (22) | SD_RESP_R1 | SD_DATA_READ,
330 | SD_CMD_INDEX (23) | SD_RESP_R1,
331 | SD_CMD_RESERVED (24),
332 | SD_CMD_RESERVED (25),
333 | SD_CMD_RESERVED (26),
334 | SD_CMD_RESERVED (27),
335 | SD_CMD_RESERVED (28),
336 | SD_CMD_RESERVED (29),
337 | SD_CMD_RESERVED (30),
338 | SD_CMD_RESERVED (31),
339 | SD_CMD_RESERVED (32),
340 | SD_CMD_RESERVED (33),
341 | SD_CMD_RESERVED (34),
342 | SD_CMD_RESERVED (35),
343 | SD_CMD_RESERVED (36),
344 | SD_CMD_RESERVED (37),
345 | SD_CMD_RESERVED (38),
346 | SD_CMD_RESERVED (39),
347 | SD_CMD_RESERVED (40),
348 | SD_CMD_INDEX (41) | SD_RESP_R3,
349 | SD_CMD_INDEX (42) | SD_RESP_R1,
350 | SD_CMD_RESERVED (43),
351 | SD_CMD_RESERVED (44),
352 | SD_CMD_RESERVED (45),
353 | SD_CMD_RESERVED (46),
354 | SD_CMD_RESERVED (47),
355 | SD_CMD_RESERVED (48),
356 | SD_CMD_RESERVED (49),
357 | SD_CMD_RESERVED (50),
358 | SD_CMD_INDEX (51) | SD_RESP_R1 | SD_DATA_READ,
359 | SD_CMD_RESERVED (52),
360 | SD_CMD_RESERVED (53),
361 | SD_CMD_RESERVED (54),
362 | SD_CMD_RESERVED (55),
363 | SD_CMD_RESERVED (56),
364 | SD_CMD_RESERVED (57),
365 | SD_CMD_RESERVED (58),
366 | SD_CMD_RESERVED (59),
367 | SD_CMD_RESERVED (60),
368 | SD_CMD_RESERVED (61),
369 | SD_CMD_RESERVED (62),
370 | SD_CMD_RESERVED (63)
371 | };
372 |
373 | // The actual command indices
374 | #define GO_IDLE_STATE 0
375 | #define SEND_OP_COND 1
376 | #define ALL_SEND_CID 2
377 | #define SEND_RELATIVE_ADDR 3
378 | #define SET_DSR 4
379 | #define IO_SET_OP_COND 5
380 | #define SWITCH_FUNC 6
381 | #define SELECT_CARD 7
382 | #define DESELECT_CARD 7
383 | #define SELECT_DESELECT_CARD 7
384 | #define SEND_EXT_CSD 8
385 | #define SEND_CSD 9
386 | #define SEND_CID 10
387 | #define VOLTAGE_SWITCH 11
388 | #define STOP_TRANSMISSION 12
389 | #define SEND_STATUS 13
390 | #define GO_INACTIVE_STATE 15
391 | #define SET_BLOCKLEN 16
392 | #define READ_SINGLE_BLOCK 17
393 | #define READ_MULTIPLE_BLOCK 18
394 | #define SEND_TUNING_BLOCK 19
395 | #define SPEED_CLASS_CONTROL 20
396 | #define SET_BLOCK_COUNT 23
397 | #define WRITE_BLOCK 24
398 | #define WRITE_MULTIPLE_BLOCK 25
399 | #define PROGRAM_CSD 27
400 | #define SET_WRITE_PROT 28
401 | #define CLR_WRITE_PROT 29
402 | #define SEND_WRITE_PROT 30
403 | #define ERASE_WR_BLK_START 32
404 | #define ERASE_WR_BLK_END 33
405 | #define ERASE 38
406 | #define LOCK_UNLOCK 42
407 | #define APP_CMD 55
408 | #define GEN_CMD 56
409 |
410 | #define IS_APP_CMD 0x80000000
411 | #define ACMD(a) (a | IS_APP_CMD)
412 | #define SET_BUS_WIDTH (6 | IS_APP_CMD)
413 | #define SD_STATUS (13 | IS_APP_CMD)
414 | #define SEND_NUM_WR_BLOCKS (22 | IS_APP_CMD)
415 | #define SET_WR_BLK_ERASE_COUNT (23 | IS_APP_CMD)
416 | #define SD_SEND_OP_COND (41 | IS_APP_CMD)
417 | #define SET_CLR_CARD_DETECT (42 | IS_APP_CMD)
418 | #define SEND_SCR (51 | IS_APP_CMD)
419 |
420 | #define SD_RESET_CMD (1 << 25)
421 | #define SD_RESET_DAT (1 << 26)
422 | #define SD_RESET_ALL (1 << 24)
423 |
424 | #define SD_GET_CLOCK_DIVIDER_FAIL 0xffffffff
425 |
426 |
427 | #endif //_DEFINES_H
428 |
--------------------------------------------------------------------------------
/main.c:
--------------------------------------------------------------------------------
1 | //based on https://github.com/jncronin/rpi-boot/blob/master/emmc.c by John Cronin
2 | //tweaked to be run from userland by bkifft @GBAtemp
3 |
4 | /*
5 | * Copyright (C) 2013 by John Cronin
6 | *
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy
8 | * of this software and associated documentation files (the "Software"), to deal
9 | * in the Software without restriction, including without limitation the rights
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 | * copies of the Software, and to permit persons to whom the Software is
12 | * furnished to do so, subject to the following conditions:
13 |
14 | * The above copyright notice and this permission notice shall be included in
15 | * all copies or substantial portions of the Software.
16 |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 | * THE SOFTWARE.
24 | */
25 |
26 | #define DEBUG
27 |
28 | #define _BSD_SOURCE //ugly hack but the rewrite follows (nned to replace usleep() with the imho way less handy nanosleep()
29 |
30 | #include
31 | #include
32 | #include
33 | #include
34 | #include
35 | #include
36 | #include
37 | #include
38 | #include
39 | #include
40 | #include
41 | #include
42 | #include
43 | #include
44 |
45 | #include "defines.h" //contains all the adresses, offsets, command structures and bitmasks
46 | #include "util.h"
47 |
48 | #define TIMEOUT_WAIT(stop_if_true, usec) \
49 | do { \
50 | uint32_t count = 0; \
51 | do \
52 | { \
53 | ++count; \
54 | usleep(1000); \
55 | if(stop_if_true) \
56 | break; \
57 | } while(count< (usec/1000)); \
58 | } while(0);
59 |
60 | #define BLOCKSIZE (0x1000000)
61 | #define CHECKBIT(x, y) ((x & (1 << y)) != 0) ? 1 : 0
62 | #define INP_GPIO(g) *(gpio + ((g)/10)) &= ~(7<<(((g)%10)*3))
63 | #define OUT_GPIO(g) *(gpio + ((g)/10)) |= (1<<(((g)%10)*3))
64 | #define SET_GPIO_ALT(g,a) *(gpio + (((g)/10))) |= (((a)<=3?(a) + 4:(a)==4?3:2)<<(((g)%10)*3))
65 | #define GPIO_SET *(gpio + 7)
66 | #define GPIO_CLR *(gpio + 10)
67 | #define GPIO_READ(g) *(gpio + 13) &= (1<<(g))
68 |
69 | typedef uint32_t useconds_t; //more ugly hacks
70 | uint32_t *emmc;
71 |
72 |
73 | static int sd_ensure_data_mode (struct emmc_block_dev *edev, char spi);
74 |
75 |
76 | void
77 | print_arg1_reg (uint32_t * emmc)
78 | {
79 | uint32_t arg1 = *(emmc + EMMC_ARG1 / 4); //div 4 as the offsets are in bytes
80 | printf ("ARG1:-----------------------------------------\n");
81 | printf ("ARG1: %#08X\n", arg1);
82 | }
83 |
84 | void
85 | print_resp1_reg (uint32_t * emmc)
86 | {
87 | uint32_t resp1 = *(emmc + EMMC_RESP1 / 4); //div 4 as the offsets are in bytes
88 | printf ("RESP1:-----------------------------------------\n");
89 | printf ("RESP1: %#08X\n", resp1);
90 | }
91 |
92 | void
93 | print_resp2_reg (uint32_t * emmc)
94 | {
95 | uint32_t resp2 = *(emmc + EMMC_RESP2 / 4); //div 4 as the offsets are in bytes
96 | printf ("RESP2:-----------------------------------------\n");
97 | printf ("RESP2: %#08X\n", resp2);
98 | }
99 |
100 |
101 | void
102 | print_resp3_reg (uint32_t * emmc)
103 | {
104 | uint32_t resp3 = *(emmc + EMMC_RESP3 / 4); //div 4 as the offsets are in bytes
105 | printf ("RESP1:-----------------------------------------\n");
106 | printf ("RESP1: %#08X\n", resp3);
107 | }
108 |
109 | void
110 | print_cmdtm_reg (uint32_t * emmc)
111 | {
112 | uint32_t cmdtm = *(emmc + EMMC_CMDTM / 4); //div 4 as the offsets are in bytes
113 | printf ("CMDTM:-----------------------------------------\n");
114 | printf ("CMD_INDEX: %i\n", ((cmdtm & 0x3F000000) >> 24));
115 | printf ("CMD_TYPE: %i%i\n", CHECKBIT (cmdtm, 23),
116 | CHECKBIT (cmdtm, 22));
117 | printf ("CMD_ISDATA: %i\n", CHECKBIT (cmdtm, 21));
118 | printf ("CMD_IXCHK_EN: %i\n", CHECKBIT (cmdtm, 20));
119 | printf ("CMD_CRCCHK_EN: %i\n", CHECKBIT (cmdtm, 19));
120 | printf ("CMD_RSPNS_TYPE: %i%i\n", CHECKBIT (cmdtm, 17),
121 | CHECKBIT (cmdtm, 16));
122 | printf ("TM_MULTI_BLOCK: %i\n", CHECKBIT (cmdtm, 5));
123 | printf ("TM_DAT_DIR: %i\n", CHECKBIT (cmdtm, 4));
124 | printf ("TM_AUTO_CMD_EN: %i%i\n", CHECKBIT (cmdtm, 3),
125 | CHECKBIT (cmdtm, 2));
126 | printf ("TM_BLKCNT_T: %i\n", CHECKBIT (cmdtm, 1));
127 |
128 |
129 | }
130 |
131 | void
132 | print_control0_reg (uint32_t * emmc)
133 | {
134 | uint32_t ctrl0 = (*(emmc + EMMC_CONTROL0 / 4)); //div 4 as the offsets are in bytes
135 | printf ("CONTROL0:--------------------------------------\n");
136 | printf ("ALT_BOOT_EN: %i\n", CHECKBIT (ctrl0, 22));
137 | printf ("BOOT_EN: %i\n", CHECKBIT (ctrl0, 21));
138 | printf ("SPI_MODE: %i\n", CHECKBIT (ctrl0, 20));
139 | printf ("GAP_IEN: %i\n", CHECKBIT (ctrl0, 19));
140 | printf ("READWAIT_EN: %i\n", CHECKBIT (ctrl0, 18));
141 | printf ("GAP_RESTART: %i\n", CHECKBIT (ctrl0, 17));
142 | printf ("GAP_STOP: %i\n", CHECKBIT (ctrl0, 16));
143 | printf ("HCTL_8BIT: %i\n", CHECKBIT (ctrl0, 5));
144 | printf ("HCTL_HS_EN: %i\n", CHECKBIT (ctrl0, 2));
145 | printf ("HCTL_DWIDTH: %i\n", CHECKBIT (ctrl0, 1));
146 | }
147 |
148 | void
149 | print_control1_reg (uint32_t * emmc)
150 | {
151 | uint32_t ctrl1 = (*(emmc + EMMC_CONTROL1 / 4)); //div 4 as the offsets are in bytes
152 | printf ("CONTROL1:--------------------------------------\n");
153 | printf ("SRST_DATA: %i\n", CHECKBIT (ctrl1, 26));
154 | printf ("SRST_CMD: %i\n", CHECKBIT (ctrl1, 25));
155 | printf ("SRST_HC: %i\n", CHECKBIT (ctrl1, 24));
156 | printf ("DATA_TOUNIT: %i\n", ((ctrl1 & 0x0F0000) >> 16));
157 | printf ("CLK_FREQ8: %i\n", ((ctrl1 & 0xFF00) >> 8)); //FIXME: should be combined with next value
158 | printf ("CLK_FREQ_MS2: %i\n", ((ctrl1 & 0xC0) >> 6));
159 | printf ("CLK_GENSEL: %i\n", CHECKBIT (ctrl1, 5));
160 | printf ("CLK_EN: %i\n", CHECKBIT (ctrl1, 2));
161 | printf ("CLK_STABLE: %i\n", CHECKBIT (ctrl1, 1));
162 | printf ("CLK_INTLEN: %i\n", CHECKBIT (ctrl1, 0));
163 | }
164 |
165 | void
166 | print_control2_reg (uint32_t * emmc)
167 | {
168 | uint32_t ctrl2 = (*(emmc + EMMC_CONTROL1 / 4)); //div 4 as the offsets are in bytes
169 | printf ("CONTROL2:--------------------------------------\n");
170 | printf ("TUNED: %i\n", CHECKBIT (ctrl2, 23));
171 | printf ("TUNEON: %i\n", CHECKBIT (ctrl2, 22));
172 | printf ("UHSMODE: %i%i%i\n", CHECKBIT (ctrl2, 18),
173 | CHECKBIT (ctrl2, 17), CHECKBIT (ctrl2, 16));
174 | printf ("NOTC12_ERR : %i\n", CHECKBIT (ctrl2, 7));
175 | printf ("ACBAD_ERR: %i\n", CHECKBIT (ctrl2, 4)); //FIXME: should be combined with next value
176 | printf ("ACEND_ERR: %i\n", CHECKBIT (ctrl2, 3));
177 | printf ("ACCRC_ERR %i\n", CHECKBIT (ctrl2, 2));
178 | printf ("ACTO_ERR: %i\n", CHECKBIT (ctrl2, 1));
179 | printf ("ACNOX_ERR: %i\n", CHECKBIT (ctrl2, 0));
180 | }
181 |
182 | void
183 | print_blksizecnt_reg (uint32_t * emmc)
184 | {
185 | uint32_t blksizecnt = (*(emmc + EMMC_BLKSIZECNT / 4)); //div 4 as the offsets are in bytes
186 | printf ("BLK_CNT: %i\n", ((blksizecnt & 0xFFFF0000) >> 16));
187 | printf ("BLKSIZE: %i\n", (blksizecnt & 0x1FF));
188 |
189 | }
190 |
191 | void
192 | print_response_reg (uint32_t * emmc)
193 | {
194 | printf ("RESPONSE:-----------------------------------\n");
195 | printf ("RESP3: 0x%08X\n", *(emmc + EMMC_RESP3 / 4));
196 | printf ("RESP2: 0x%08X\n", *(emmc + EMMC_RESP2 / 4));
197 | printf ("RESP1: 0x%08X\n", *(emmc + EMMC_RESP1 / 4));
198 | printf ("RESP0: 0x%08X\n", *(emmc + EMMC_RESP0 / 4));
199 | }
200 |
201 | void
202 | clear_response_reg (uint32_t * emmc)
203 | {
204 | *(emmc + EMMC_RESP0 / 4) = 0x0; //clear the response
205 | *(emmc + EMMC_RESP1 / 4) = 0x0; //"
206 | *(emmc + EMMC_RESP2 / 4) = 0x0; //"
207 | *(emmc + EMMC_RESP3 / 4) = 0x0; //"
208 | }
209 |
210 |
211 | void
212 | print_status_reg (uint32_t * emmc)
213 | {
214 | uint32_t stat = (*(emmc + EMMC_STATUS / 4)); //div 4 as the offsets are in bytes
215 | printf ("STATUS:--------------------------------------\n");
216 | printf ("DAT7: %i\n", CHECKBIT (stat, 28));
217 | printf ("DAT6: %i\n", CHECKBIT (stat, 27));
218 | printf ("DAT5: %i\n", CHECKBIT (stat, 26));
219 | printf ("DAT4: %i\n", CHECKBIT (stat, 25));
220 | printf ("CMD_LEVEL: %i\n", CHECKBIT (stat, 24));
221 |
222 | printf ("DAT3: %i\n", CHECKBIT (stat, 23));
223 | printf ("DAT2: %i\n", CHECKBIT (stat, 22));
224 | printf ("DAT1: %i\n", CHECKBIT (stat, 21));
225 | printf ("DAT0: %i\n", CHECKBIT (stat, 20));
226 | printf ("ALT_DAT_RDY: %i\n", CHECKBIT (stat, 11));
227 | printf ("R_TRAN: %i\n", CHECKBIT (stat, 9));
228 | printf ("W_TRAN: %i\n", CHECKBIT (stat, 8));
229 |
230 | printf ("D_ACT: %i\n", CHECKBIT (stat, 2));
231 | printf ("D_INH: %i\n", CHECKBIT (stat, 1));
232 | printf ("CMD_INH: %i\n", CHECKBIT (stat, 0));
233 |
234 | }
235 |
236 |
237 | void
238 | print_interrupt_reg (uint32_t * emmc)
239 | {
240 | uint32_t interrupt = (*(emmc + EMMC_INTERRUPT / 4)); //div 4 as the offsets are in bytes
241 | printf ("INTERRUPT:--------------------------------------\n");
242 | printf ("ACMD_ERR: %i\n", CHECKBIT (interrupt, 24));
243 | printf ("DEND_ERR: %i\n", CHECKBIT (interrupt, 22));
244 | printf ("DCRC_ERR: %i\n", CHECKBIT (interrupt, 21));
245 | printf ("DTO_ERR: %i\n", CHECKBIT (interrupt, 20));
246 | printf ("CBAD_ERR: %i\n", CHECKBIT (interrupt, 19));
247 | printf ("CEND_ERR: %i\n", CHECKBIT (interrupt, 18));
248 | printf ("CCRC_ERR: %i\n", CHECKBIT (interrupt, 17));
249 | printf ("CTO_ERR: %i\n", CHECKBIT (interrupt, 16));
250 | printf ("ERR: %i\n", CHECKBIT (interrupt, 15));
251 | printf ("ENDBOOT: %i\n", CHECKBIT (interrupt, 14));
252 | printf ("BOOTACK: %i\n", CHECKBIT (interrupt, 13));
253 | printf ("RETUNE: %i\n", CHECKBIT (interrupt, 12));
254 | printf ("CARD: %i\n", CHECKBIT (interrupt, 8));
255 | printf ("READ_RDY: %i\n", CHECKBIT (interrupt, 5));
256 | printf ("WRITE_RDY: %i\n", CHECKBIT (interrupt, 4));
257 | printf ("BLOCK_GATE: %i\n", CHECKBIT (interrupt, 2));
258 | printf ("DATA_DONE: %i\n", CHECKBIT (interrupt, 1));
259 | printf ("CMD_DONE: %i\n", CHECKBIT (interrupt, 0));
260 | }
261 |
262 | static char *sd_versions[] = { "unknown", "1.0 and 1.01", "1.10",
263 | "2.00", "3.0x", "4.xx"
264 | };
265 |
266 | void
267 | mmio_write (void *reg, uint32_t data)
268 | {
269 |
270 | *(volatile uint32_t *) (reg) = data;
271 |
272 | }
273 |
274 | uint32_t
275 | mmio_read (void *reg)
276 | {
277 |
278 | return *(volatile uint32_t *) (reg);
279 |
280 | }
281 |
282 | static void
283 | sd_power_off ()
284 | {
285 | /* Power off the SD card */
286 | uint32_t control0 = mmio_read (EMMC_BASE + EMMC_CONTROL0);
287 | control0 &= ~(1 << 8); // Set SD Bus Power bit off in Power Control Register
288 | mmio_write (EMMC_BASE + EMMC_CONTROL0, control0);
289 | }
290 |
291 | static void
292 | spi_mode_on ()
293 | {
294 | uint32_t control0 = mmio_read (EMMC_BASE + EMMC_CONTROL0);
295 | control0 &= 1 << 20; // spi bit
296 | mmio_write (EMMC_BASE + EMMC_CONTROL0, control0);
297 | printf ("SPI %s\n", (CHECKBIT (control0, 20) == 1) ? "on" : "off");
298 | }
299 |
300 | static uint32_t
301 | sd_get_base_clock_hz ()
302 | {
303 | return 250000000;
304 | }
305 |
306 | static int
307 | bcm_2708_power_off ()
308 | {
309 | return -1;
310 | }
311 |
312 | static int
313 | bcm_2708_power_on ()
314 | {
315 | return -1;
316 | }
317 |
318 | static int
319 | bcm_2708_power_cycle ()
320 | {
321 | if (bcm_2708_power_off () < 0)
322 | return -1;
323 |
324 | usleep (5000);
325 |
326 | return bcm_2708_power_on ();
327 | }
328 |
329 | static uint32_t
330 | sd_get_clock_divider (uint32_t base_clock, uint32_t target_rate)
331 | {
332 | // TODO: implement use of preset value registers
333 |
334 | uint32_t targetted_divisor = 0;
335 | if (target_rate > base_clock)
336 | targetted_divisor = 1;
337 | else
338 | {
339 | targetted_divisor = base_clock / target_rate;
340 | uint32_t mod = base_clock % target_rate;
341 | if (mod)
342 | targetted_divisor--;
343 | }
344 |
345 | // Decide on the clock mode to use
346 |
347 | // Currently only 10-bit divided clock mode is supported
348 |
349 | if (1) //was a check for host controller interface version
350 | {
351 | // HCI version 3 or greater supports 10-bit divided clock mode
352 | // This requires a power-of-two divider
353 |
354 | // Find the first bit set
355 | int divisor = -1;
356 | for (int first_bit = 31; first_bit >= 0; first_bit--)
357 | {
358 | uint32_t bit_test = (1 << first_bit);
359 | if (targetted_divisor & bit_test)
360 | {
361 | divisor = first_bit;
362 | targetted_divisor &= ~bit_test;
363 | if (targetted_divisor)
364 | {
365 | // The divisor is not a power-of-two, increase it
366 | divisor++;
367 | }
368 | break;
369 | }
370 | }
371 |
372 | if (divisor == -1)
373 | divisor = 31;
374 | if (divisor >= 32)
375 | divisor = 31;
376 |
377 | if (divisor != 0)
378 | divisor = (1 << (divisor - 1));
379 |
380 | if (divisor >= 0x400)
381 | divisor = 0x3ff;
382 |
383 | uint32_t freq_select = divisor & 0xff;
384 | uint32_t upper_bits = (divisor >> 8) & 0x3;
385 | uint32_t ret = (freq_select << 8) | (upper_bits << 6) | (0 << 5);
386 |
387 | int denominator = 1;
388 | if (divisor != 0)
389 | denominator = divisor * 2;
390 | int actual_clock = base_clock / denominator;
391 | #ifdef DEBUG
392 | printf ("EMMC: base_clock: %i, target_rate: %i, divisor: %08x, "
393 | "actual_clock: %i, ret: %08x\n", base_clock, target_rate,
394 | divisor, actual_clock, ret);
395 | #endif
396 |
397 | return ret;
398 |
399 | }
400 | else
401 | {
402 | printf ("EMMC: unsupported host version\n");
403 | return SD_GET_CLOCK_DIVIDER_FAIL;
404 | }
405 |
406 | }
407 |
408 | // Switch the clock rate whilst running
409 | static int
410 | sd_switch_clock_rate (uint32_t base_clock, uint32_t target_rate)
411 | {
412 | // Decide on an appropriate divider
413 | uint32_t divider = sd_get_clock_divider (base_clock, target_rate);
414 | if (divider == SD_GET_CLOCK_DIVIDER_FAIL)
415 | {
416 | printf ("EMMC: couldn't get a valid divider for target rate %i Hz\n",
417 | target_rate);
418 | return -1;
419 | }
420 |
421 | // Wait for the command inhibit (CMD and DAT) bits to clear
422 | while (mmio_read (EMMC_BASE + EMMC_STATUS) & 0x3)
423 | usleep (1000);
424 |
425 | // Set the SD clock off
426 | uint32_t control1 = mmio_read (EMMC_BASE + EMMC_CONTROL1);
427 | control1 &= ~(1 << 2);
428 | mmio_write (EMMC_BASE + EMMC_CONTROL1, control1);
429 | usleep (2000);
430 |
431 | // Write the new divider
432 | control1 &= ~0xffe0; // Clear old setting + clock generator select
433 | control1 |= divider;
434 | mmio_write (EMMC_BASE + EMMC_CONTROL1, control1);
435 | usleep (2000);
436 |
437 | // Enable the SD clock
438 | control1 |= (1 << 2);
439 | mmio_write (EMMC_BASE + EMMC_CONTROL1, control1);
440 | usleep (2000);
441 | #ifdef DEBUG
442 | printf ("EMMC: successfully set clock rate to %i Hz\n", target_rate);
443 | #endif
444 | return 0;
445 | }
446 |
447 | // Reset the CMD line
448 | static int
449 | sd_reset_cmd ()
450 | {
451 | uint32_t control1 = mmio_read (EMMC_BASE + EMMC_CONTROL1);
452 | control1 |= SD_RESET_CMD;
453 | mmio_write (EMMC_BASE + EMMC_CONTROL1, control1);
454 | TIMEOUT_WAIT ((mmio_read (EMMC_BASE + EMMC_CONTROL1) & SD_RESET_CMD) == 0,
455 | 1000000);
456 | if ((mmio_read (EMMC_BASE + EMMC_CONTROL1) & SD_RESET_CMD) != 0)
457 | {
458 | printf ("EMMC: CMD line did not reset properly\n");
459 | return -1;
460 | }
461 | return 0;
462 | }
463 |
464 | // Reset the CMD line
465 | static int
466 | sd_reset_dat ()
467 | {
468 | uint32_t control1 = mmio_read (EMMC_BASE + EMMC_CONTROL1);
469 | control1 |= SD_RESET_DAT;
470 | mmio_write (EMMC_BASE + EMMC_CONTROL1, control1);
471 | TIMEOUT_WAIT ((mmio_read (EMMC_BASE + EMMC_CONTROL1) & SD_RESET_DAT) == 0,
472 | 1000000);
473 | if ((mmio_read (EMMC_BASE + EMMC_CONTROL1) & SD_RESET_DAT) != 0)
474 | {
475 | printf ("EMMC: DAT line did not reset properly\n");
476 | return -1;
477 | }
478 | return 0;
479 | }
480 |
481 | /////////////////////////////////////////////////////////////////////////////////////////////////
482 | /////////////////////////////////////////////////////////////////////////////////////////////////
483 | /////////////////////////////////////////////////////////////////////////////////////////////////
484 | /////////////////////////////////////////////////////////////////////////////////////////////////
485 | static void
486 | sd_issue_command_int (struct emmc_block_dev *dev, uint32_t cmd_reg,
487 | uint32_t argument, useconds_t timeout)
488 | {
489 | dev->last_cmd_reg = cmd_reg;
490 | dev->last_cmd_success = 0;
491 |
492 | // This is as per HCSS 3.7.1.1/3.7.2.2
493 |
494 | // Check Command Inhibit
495 | while (mmio_read (EMMC_BASE + EMMC_STATUS) & 0x1)
496 | usleep (1000);
497 |
498 | // Is the command with busy?
499 | if ((cmd_reg & SD_CMD_RSPNS_TYPE_MASK) == SD_CMD_RSPNS_TYPE_48B)
500 | {
501 | // With busy
502 |
503 | // Is is an abort command?
504 | if ((cmd_reg & SD_CMD_TYPE_MASK) != SD_CMD_TYPE_ABORT)
505 | {
506 | // Not an abort command
507 |
508 | // Wait for the data line to be free
509 | while (mmio_read (EMMC_BASE + EMMC_STATUS) & 0x2)
510 | usleep (1000);
511 | }
512 | }
513 |
514 | // Set block size and block count
515 | // For now, block size = 512 bytes, block count = 1,
516 | if (dev->blocks_to_transfer > 0xffff)
517 | {
518 | printf ("SD_send_int: blocks_to_transfer too great (%i)\n",
519 | dev->blocks_to_transfer);
520 | dev->last_cmd_success = 0;
521 | return;
522 | }
523 | uint32_t blksizecnt = dev->block_size | (dev->blocks_to_transfer << 16);
524 | mmio_write (EMMC_BASE + EMMC_BLKSIZECNT, blksizecnt);
525 |
526 | // Set argument 1 reg
527 | mmio_write (EMMC_BASE + EMMC_ARG1, argument);
528 |
529 | // Set command reg
530 | mmio_write (EMMC_BASE + EMMC_CMDTM, cmd_reg);
531 |
532 | usleep (2000);
533 |
534 | // Wait for command complete interrupt
535 | TIMEOUT_WAIT (mmio_read (EMMC_BASE + EMMC_INTERRUPT) & 0x8001, timeout);
536 | uint32_t irpts = mmio_read (EMMC_BASE + EMMC_INTERRUPT);
537 |
538 |
539 |
540 | // Test for errors
541 | if ((irpts & 0xffff0001) != 0x1)
542 | {
543 |
544 | printf
545 | ("SD_send_int: error occured whilst waiting for command complete interrupt\n");
546 | print_interrupt_reg (emmc);
547 | dev->last_error = irpts & 0xffff0000;
548 | dev->last_interrupt = irpts;
549 | return;
550 | }
551 |
552 | // Clear command complete status
553 | mmio_write (EMMC_BASE + EMMC_INTERRUPT, 0xffff0001);
554 | usleep (2000);
555 |
556 | // Get response data
557 | switch (cmd_reg & SD_CMD_RSPNS_TYPE_MASK)
558 | {
559 | case SD_CMD_RSPNS_TYPE_48:
560 | case SD_CMD_RSPNS_TYPE_48B:
561 | dev->last_r0 = mmio_read (EMMC_BASE + EMMC_RESP0);
562 | break;
563 |
564 | case SD_CMD_RSPNS_TYPE_136:
565 | dev->last_r0 = mmio_read (EMMC_BASE + EMMC_RESP0);
566 | dev->last_r1 = mmio_read (EMMC_BASE + EMMC_RESP1);
567 | dev->last_r2 = mmio_read (EMMC_BASE + EMMC_RESP2);
568 | dev->last_r3 = mmio_read (EMMC_BASE + EMMC_RESP3);
569 | break;
570 | }
571 |
572 | // If with data, wait for the appropriate interrupt
573 | if ((cmd_reg & SD_CMD_ISDATA))
574 | {
575 | uint32_t wr_irpt;
576 | int is_write = 0;
577 | if (cmd_reg & SD_CMD_DAT_DIR_CH)
578 | wr_irpt = (1 << 5); // read
579 | else
580 | {
581 | is_write = 1;
582 | wr_irpt = (1 << 4); // write
583 | }
584 |
585 | int cur_block = 0;
586 | uint32_t *cur_buf_addr = (uint32_t *) dev->buf;
587 | while (cur_block < dev->blocks_to_transfer)
588 | {
589 |
590 | if (dev->blocks_to_transfer > 1)
591 | printf
592 | ("SD_send_int: multi block transfer, awaiting block %i ready\n",
593 | cur_block);
594 |
595 | TIMEOUT_WAIT (mmio_read (EMMC_BASE + EMMC_INTERRUPT) &
596 | (wr_irpt | 0x8000), timeout);
597 | irpts = mmio_read (EMMC_BASE + EMMC_INTERRUPT);
598 | mmio_write (EMMC_BASE + EMMC_INTERRUPT, 0xffff0000 | wr_irpt);
599 |
600 | if ((irpts & (0xffff0000 | wr_irpt)) != wr_irpt)
601 | {
602 |
603 | printf
604 | ("SD_send_int: error occured whilst waiting for data ready interrupt\n");
605 |
606 | dev->last_error = irpts & 0xffff0000;
607 | dev->last_interrupt = irpts;
608 | return;
609 | }
610 |
611 | // Transfer the block
612 | size_t cur_byte_no = 0;
613 | while (cur_byte_no < dev->block_size)
614 | {
615 | if (is_write)
616 | {
617 | uint32_t data = read_word ((uint8_t *) cur_buf_addr, 0);
618 | mmio_write (EMMC_BASE + EMMC_DATA, data);
619 | }
620 | else
621 | {
622 | uint32_t data = mmio_read (EMMC_BASE + EMMC_DATA);
623 | write_word (data, (uint8_t *) cur_buf_addr, 0);
624 | }
625 | cur_byte_no += 4;
626 | cur_buf_addr++;
627 | }
628 | #ifdef DEBUG
629 | printf ("SD_send_int: block %i transfer complete\n", cur_block);
630 | #endif
631 |
632 | cur_block++;
633 | }
634 | }
635 |
636 | // Wait for transfer complete (set if read/write transfer or with busy)
637 | if ((((cmd_reg & SD_CMD_RSPNS_TYPE_MASK) == SD_CMD_RSPNS_TYPE_48B) ||
638 | (cmd_reg & SD_CMD_ISDATA)))
639 | {
640 | // First check command inhibit (DAT) is not already 0
641 | if ((mmio_read (EMMC_BASE + EMMC_STATUS) & 0x2) == 0)
642 | mmio_write (EMMC_BASE + EMMC_INTERRUPT, 0xffff0002);
643 | else
644 | {
645 | TIMEOUT_WAIT (mmio_read (EMMC_BASE + EMMC_INTERRUPT) & 0x8002,
646 | timeout);
647 | irpts = mmio_read (EMMC_BASE + EMMC_INTERRUPT);
648 | mmio_write (EMMC_BASE + EMMC_INTERRUPT, 0xffff0002);
649 |
650 | // Handle the case where both data timeout and transfer complete
651 | // are set - transfer complete overrides data timeout: HCSS 2.2.17
652 | if (((irpts & 0xffff0002) != 0x2)
653 | && ((irpts & 0xffff0002) != 0x100002))
654 | {
655 |
656 | printf
657 | ("SD_send_int: error occured whilst waiting for transfer complete interrupt\n");
658 |
659 | dev->last_error = irpts & 0xffff0000;
660 | dev->last_interrupt = irpts;
661 | return;
662 | }
663 | mmio_write (EMMC_BASE + EMMC_INTERRUPT, 0xffff0002);
664 | }
665 | }
666 |
667 | // Return success
668 | dev->last_cmd_success = 1;
669 | }
670 |
671 | static void
672 | sd_handle_card_interrupt (struct emmc_block_dev *dev)
673 | {
674 | // Handle a card interrupt
675 |
676 |
677 | uint32_t status = mmio_read (EMMC_BASE + EMMC_STATUS);
678 |
679 | #ifdef DEBUG
680 | printf ("SD_handle_intr: card interrupt\n");
681 | printf ("SD_handle_intr: controller status: %08x\n", status);
682 | #endif
683 |
684 | // Get the card status
685 | if (dev->card_rca)
686 | {
687 | sd_issue_command_int (dev, sd_commands[SEND_STATUS],
688 | dev->card_rca << 16, 500000);
689 | if (FAIL (dev))
690 | {
691 |
692 | printf ("SD_handle_intr: unable to get card status\n");
693 |
694 | }
695 | else
696 | {
697 | #ifdef DEBUG
698 | printf ("SD_handle_intr: card status: %08x\n", dev->last_r0);
699 | #endif
700 | }
701 | }
702 | else
703 | {
704 |
705 | printf ("SD_handle_intr: no card currently selected\n");
706 |
707 | }
708 | }
709 |
710 | static void
711 | sd_handle_interrupts (struct emmc_block_dev *dev)
712 | {
713 | uint32_t irpts = mmio_read (EMMC_BASE + EMMC_INTERRUPT);
714 | uint32_t reset_mask = 0;
715 |
716 | if (irpts & SD_COMMAND_COMPLETE)
717 | {
718 |
719 | printf ("SD_interrupt: spurious command complete interrupt\n");
720 |
721 | reset_mask |= SD_COMMAND_COMPLETE;
722 | }
723 |
724 | if (irpts & SD_TRANSFER_COMPLETE)
725 | {
726 |
727 | printf ("SD_interrupt: spurious transfer complete interrupt\n");
728 |
729 | reset_mask |= SD_TRANSFER_COMPLETE;
730 | }
731 |
732 | if (irpts & SD_BLOCK_GAP_EVENT)
733 | {
734 |
735 | printf ("SD_interrupt: spurious block gap event interrupt\n");
736 |
737 | reset_mask |= SD_BLOCK_GAP_EVENT;
738 | }
739 |
740 | if (irpts & SD_DMA_INTERRUPT)
741 | {
742 |
743 | printf ("SD_interrupt: spurious DMA interrupt\n");
744 |
745 | reset_mask |= SD_DMA_INTERRUPT;
746 | }
747 |
748 | if (irpts & SD_BUFFER_WRITE_READY)
749 | {
750 |
751 | printf ("SD_interrupt: spurious buffer write ready interrupt\n");
752 |
753 | reset_mask |= SD_BUFFER_WRITE_READY;
754 | sd_reset_dat ();
755 | }
756 |
757 | if (irpts & SD_BUFFER_READ_READY)
758 | {
759 |
760 | printf ("SD_interrupt: spurious buffer read ready interrupt\n");
761 |
762 | reset_mask |= SD_BUFFER_READ_READY;
763 | sd_reset_dat ();
764 | }
765 |
766 | if (irpts & SD_CARD_INSERTION)
767 | {
768 |
769 | printf ("SD_interrupt: card insertion detected\n");
770 |
771 | reset_mask |= SD_CARD_INSERTION;
772 | }
773 |
774 | if (irpts & SD_CARD_REMOVAL)
775 | {
776 |
777 | printf ("SD_interrupt: card removal detected\n");
778 |
779 | reset_mask |= SD_CARD_REMOVAL;
780 | dev->card_removal = 1;
781 | }
782 |
783 | if (irpts & SD_CARD_INTERRUPT)
784 | {
785 |
786 | printf ("SD_interrupt: card interrupt detected\n");
787 |
788 | sd_handle_card_interrupt (dev);
789 | reset_mask |= SD_CARD_INTERRUPT;
790 | }
791 |
792 | if (irpts & 0x8000)
793 | {
794 |
795 | printf ("SD_interrupt: spurious error interrupt: %08x\n", irpts);
796 |
797 | reset_mask |= 0xffff0000;
798 | }
799 |
800 | mmio_write (EMMC_BASE + EMMC_INTERRUPT, reset_mask);
801 | }
802 |
803 |
804 | static void
805 | sd_issue_command (struct emmc_block_dev *dev, uint32_t command,
806 | uint32_t argument, useconds_t timeout)
807 | {
808 | // First, handle any pending interrupts
809 | sd_handle_interrupts (dev);
810 |
811 | // Stop the command issue if it was the card remove interrupt that was
812 | // handled
813 | if (dev->card_removal)
814 | {
815 | dev->last_cmd_success = 0;
816 | return;
817 | }
818 |
819 | // Now run the appropriate commands by calling sd_issue_command_int()
820 | if (command & IS_APP_CMD)
821 | {
822 | command &= 0xff;
823 | #ifdef DEBUG
824 | printf ("sd_issue_command: issuing command ACMD%i\n", command);
825 | #endif
826 |
827 | if (sd_acommands[command] == SD_CMD_RESERVED (0))
828 | {
829 | printf ("sd_issue_command: invalid command ACMD%i\n", command);
830 | dev->last_cmd_success = 0;
831 | return;
832 | }
833 | dev->last_cmd = APP_CMD;
834 |
835 | uint32_t rca = 0;
836 | if (dev->card_rca)
837 | rca = dev->card_rca << 16;
838 | sd_issue_command_int (dev, sd_commands[APP_CMD], rca, timeout);
839 | if (dev->last_cmd_success)
840 | {
841 | dev->last_cmd = command | IS_APP_CMD;
842 | sd_issue_command_int (dev, sd_acommands[command], argument,
843 | timeout);
844 | }
845 | }
846 | else
847 | {
848 | #ifdef DEBUG
849 | printf ("sd_issue_command: issuing command CMD%i\n", command);
850 | #endif
851 |
852 | if (sd_commands[command] == SD_CMD_RESERVED (0))
853 | {
854 | printf ("sd_issue_command:: invalid command CMD%i\n", command);
855 | dev->last_cmd_success = 0;
856 | return;
857 | }
858 |
859 | dev->last_cmd = command;
860 | sd_issue_command_int (dev, sd_commands[command], argument, timeout);
861 | }
862 | }
863 |
864 |
865 | ///////////////////////////////////////////////////////////////////////////////////////////////////////
866 | ///////////////////////////////////////////////////////////////////////////////////////////////////////
867 | ///////////////////////////////////////////////////////////////////////////////////////////////////////
868 | ///////////////////////////////////////////////////////////////////////////////////////////////////////
869 | int
870 | sd_card_init (struct emmc_block_dev *emmc_dev, char mode, int variant)
871 | {
872 | // Check the sanity of the sd_commands and sd_acommands structures
873 | if (sizeof (sd_commands) != (64 * sizeof (uint32_t)))
874 | {
875 | printf ("EMMC: fatal error, sd_commands of incorrect size: %i"
876 | " expected %i\n", sizeof (sd_commands), 64 * sizeof (uint32_t));
877 | return -1;
878 | }
879 | if (sizeof (sd_acommands) != (64 * sizeof (uint32_t)))
880 | {
881 | printf ("EMMC: fatal error, sd_acommands of incorrect size: %i"
882 | " expected %i\n", sizeof (sd_acommands),
883 | 64 * sizeof (uint32_t));
884 | return -1;
885 | }
886 |
887 | uint32_t controller_block_size;
888 |
889 | ////////////////////////////////////////////////////////////////////////////////////////////////////////
890 | //host init
891 |
892 | // Reset the controller
893 |
894 | printf ("EMMC: resetting controller\n");
895 |
896 | uint32_t control1 = mmio_read (EMMC_BASE + EMMC_CONTROL1);
897 | control1 |= (1 << 24);
898 | // Disable clock
899 | control1 &= ~(1 << 2);
900 | control1 &= ~(1 << 0);
901 | mmio_write (EMMC_BASE + EMMC_CONTROL1, control1);
902 | TIMEOUT_WAIT ((mmio_read (EMMC_BASE + EMMC_CONTROL1) & (0x7 << 24)) == 0,
903 | 1000000);
904 | if ((mmio_read (EMMC_BASE + EMMC_CONTROL1) & (0x7 << 24)) != 0)
905 | {
906 | printf ("EMMC: controller did not reset properly\n");
907 | return -1;
908 | }
909 | #ifdef DEBUG
910 | printf ("EMMC: control0: %08x, control1: %08x, control2: %08x\n",
911 | mmio_read (EMMC_BASE + EMMC_CONTROL0),
912 | mmio_read (EMMC_BASE + EMMC_CONTROL1),
913 | mmio_read (EMMC_BASE + EMMC_CONTROL2));
914 | #endif
915 |
916 | // Read the capabilities registers
917 | capabilities_0 = mmio_read (EMMC_BASE + EMMC_CAPABILITIES_0);
918 | capabilities_1 = mmio_read (EMMC_BASE + EMMC_CAPABILITIES_1);
919 | #ifdef DEBUG
920 | printf ("EMMC: capabilities: %08x%08x\n", capabilities_1, capabilities_0);
921 | #endif
922 |
923 | // Check for a valid card
924 | #ifdef DEBUG
925 | printf ("EMMC: checking for an inserted card\n");
926 | #endif
927 | TIMEOUT_WAIT (mmio_read (EMMC_BASE + EMMC_STATUS) & (1 << 16), 500000);
928 | uint32_t status_reg = mmio_read (EMMC_BASE + EMMC_STATUS);
929 | if ((status_reg & (1 << 16)) == 0)
930 | {
931 | printf ("EMMC: no card inserted\n");
932 | return -1;
933 | }
934 | #ifdef DEBUG
935 | printf ("EMMC: status: %08x\n", status_reg);
936 | #endif
937 |
938 | // Clear control2
939 | mmio_write (EMMC_BASE + EMMC_CONTROL2, 0);
940 |
941 | // Get the base clock rate
942 | uint32_t base_clock = sd_get_base_clock_hz ();
943 | if (base_clock == 0)
944 | {
945 | printf ("EMMC: assuming clock rate to be 100MHz\n");
946 | base_clock = 100000000;
947 | }
948 |
949 | // Set clock rate to something slow
950 | #ifdef DEBUG
951 | printf ("EMMC: setting clock rate\n");
952 | #endif
953 | control1 = mmio_read (EMMC_BASE + EMMC_CONTROL1);
954 | control1 |= 1; // enable clock
955 |
956 | // Set to identification frequency (400 kHz)
957 | uint32_t f_id = 0x3ff; //fix for crc failure when using strange cable, max divider == minimum clock rate //sd_get_clock_divider (base_clock, SD_CLOCK_ID);
958 | if (f_id == SD_GET_CLOCK_DIVIDER_FAIL)
959 | {
960 | printf ("EMMC: unable to get a valid clock divider for ID frequency\n");
961 | return -1;
962 | }
963 | control1 |= f_id;
964 |
965 | control1 |= (15 << 16); //(7 << 16); // data timeout = TMCLK * 2^10 //HAIL MARRY
966 | mmio_write (EMMC_BASE + EMMC_CONTROL1, control1);
967 | TIMEOUT_WAIT (mmio_read (EMMC_BASE + EMMC_CONTROL1) & 0x2, 0x1000000);
968 | if ((mmio_read (EMMC_BASE + EMMC_CONTROL1) & 0x2) == 0)
969 | {
970 | printf ("EMMC: controller's clock did not stabilise within 1 second\n");
971 | return -1;
972 | }
973 | #ifdef DEBUG
974 | printf ("EMMC: control0: %08x, control1: %08x\n",
975 | mmio_read (EMMC_BASE + EMMC_CONTROL0),
976 | mmio_read (EMMC_BASE + EMMC_CONTROL1));
977 | #endif
978 |
979 | // Enable the SD clock
980 | #ifdef DEBUG
981 | printf ("EMMC: enabling SD clock\n");
982 | #endif
983 | usleep (2000);
984 | control1 = mmio_read (EMMC_BASE + EMMC_CONTROL1);
985 | control1 |= 4;
986 | mmio_write (EMMC_BASE + EMMC_CONTROL1, control1);
987 | usleep (2000);
988 |
989 | // Mask off sending interrupts to the ARM, we'll poll the interrrupt register ourselves
990 | mmio_write (EMMC_BASE + EMMC_IRPT_EN, 0);
991 | // Reset interrupts
992 | mmio_write (EMMC_BASE + EMMC_INTERRUPT, 0xffffffff);
993 | // Have all interrupts sent to the INTERRUPT register
994 | uint32_t irpt_mask = 0xffffffff & (~SD_CARD_INTERRUPT);
995 |
996 | irpt_mask |= SD_CARD_INTERRUPT;
997 |
998 | mmio_write (EMMC_BASE + EMMC_IRPT_MASK, irpt_mask);
999 |
1000 | usleep (2000);
1001 |
1002 |
1003 |
1004 | // Prepare the device structure
1005 | struct emmc_block_dev *ret;
1006 | ret = emmc_dev;
1007 |
1008 | memset (ret, 0, sizeof (struct emmc_block_dev));
1009 |
1010 |
1011 | ret->bd.block_size = 1;
1012 |
1013 |
1014 |
1015 | ret->base_clock = base_clock;
1016 |
1017 |
1018 |
1019 |
1020 | /////////////////////////////////////////////////////////////////////////////////////////////////
1021 | ////MMC init
1022 |
1023 |
1024 | printf ("CMD0: idle\n");
1025 | // Send CMD0 to the card (reset to idle state)
1026 | sd_issue_command (ret, GO_IDLE_STATE, 0, 500000); //"3 2 1 everyone is fast asleep now"
1027 | //print_response_reg(emmc);
1028 | if (FAIL (ret))
1029 | {
1030 | printf ("SD_init: no CMD0 response\n");
1031 | print_response_reg (emmc);
1032 | return -1;
1033 | }
1034 |
1035 | printf ("CMD1(0) : init and querry OCR\n");
1036 | // Send CMD1
1037 | sd_issue_command (ret, SEND_OP_COND, 0x0, 1000000); //"anybody there?"
1038 | uint32_t voltage_range_response = ret->last_r0;
1039 | if (FAIL (ret))
1040 | {
1041 | printf ("SD_init: no CMD1 (0) response\n");
1042 | print_response_reg (emmc);
1043 | return -1;
1044 | }
1045 |
1046 | usleep (1000000);
1047 | uint32_t counter = 0;
1048 | printf ("CMD1(0x%08X) : repeat untill ready\n", voltage_range_response);
1049 | while ((counter < 23) && (CHECKBIT (ret->last_r0, 31)) == 0)
1050 | {
1051 | sd_issue_command (ret, SEND_OP_COND, voltage_range_response, 1000000); //"sure, we can handle that voltage spec. no probs"
1052 | counter++;
1053 | #ifdef DEBUG
1054 | printf ("iteration %i\n", counter);
1055 | #endif
1056 | usleep (1000000);
1057 | if (FAIL (ret))
1058 | {
1059 | print_response_reg (emmc);
1060 | printf ("SD_init: no CMD1 (0) response\n");
1061 | return -1;
1062 | }
1063 |
1064 | }
1065 |
1066 |
1067 | printf ("CMD2: CID and id mode\n");
1068 | // Send CMD2 to get the cards CID
1069 | sd_issue_command (ret, ALL_SEND_CID, 0, 500000); //"everyone, shout your CID. the one who shouts loudest gets activated"
1070 | if (FAIL (ret))
1071 | {
1072 | printf ("SD_init: error sending ALL_SEND_CID\n");
1073 | return -1;
1074 | }
1075 | uint32_t card_cid_0 = ret->last_r0;
1076 | uint32_t card_cid_1 = ret->last_r1;
1077 | uint32_t card_cid_2 = ret->last_r2;
1078 | uint32_t card_cid_3 = ret->last_r3;
1079 |
1080 |
1081 | printf
1082 | ("\nWarning! The CID is an unique serialnumber which might be traceable. Do not publish it in any way!\n");
1083 | printf ("\tCID: %08X%08X%08X%08X\n\n", card_cid_3, card_cid_2, card_cid_1,
1084 | card_cid_0);
1085 |
1086 | uint32_t *dev_id = (uint32_t *) malloc (4 * sizeof (uint32_t));
1087 | dev_id[3] = card_cid_3;
1088 | dev_id[2] = card_cid_2;
1089 | dev_id[1] = card_cid_1;
1090 | dev_id[0] = card_cid_0;
1091 |
1092 | ret->bd.device_id = (uint8_t *) dev_id;
1093 | ret->bd.dev_id_len = 4 * sizeof (uint32_t);
1094 |
1095 | ret->card_rca = 0xBEEF;
1096 |
1097 | printf ("CMD3: assign RCA and standby mode\n");
1098 | // Send CMD3 to assign rca andenter the data state
1099 | sd_issue_command (ret, SEND_RELATIVE_ADDR, ret->card_rca << 16, 500000); //"you there who shouted loudest! from now on i'll call you beef!"
1100 |
1101 | if (FAIL (ret))
1102 | {
1103 | printf ("SD_init: error sending SEND_RELATIVE_ADDR\n");
1104 | print_response_reg (emmc);
1105 | return -1;
1106 | }
1107 |
1108 | uint32_t cmd3_resp = ret->last_r0;
1109 |
1110 | #ifdef DEBUG
1111 | printf ("SD_init: CMD3 response: %08x\n", cmd3_resp);
1112 | #endif
1113 |
1114 |
1115 | uint32_t crc_error = (cmd3_resp >> 15) & 0x1;
1116 | uint32_t illegal_cmd = (cmd3_resp >> 14) & 0x1;
1117 | uint32_t error = (cmd3_resp >> 13) & 0x1;
1118 | uint32_t status = (cmd3_resp >> 9) & 0xf;
1119 | uint32_t ready = (cmd3_resp >> 8) & 0x1;
1120 |
1121 | if (crc_error)
1122 | {
1123 | printf ("SD_init: CRC error\n");
1124 | free (dev_id);
1125 | return -1;
1126 | }
1127 |
1128 | if (illegal_cmd)
1129 | {
1130 | printf ("SD_init: illegal command\n");
1131 | free (dev_id);
1132 | return -1;
1133 | }
1134 |
1135 | if (error)
1136 | {
1137 | printf ("SD_init: generic error\n");
1138 | free (dev_id);
1139 | return -1;
1140 | }
1141 |
1142 | if (!ready)
1143 | {
1144 | printf ("SD_init: not ready for data\n");
1145 | free (dev_id);
1146 | return -1;
1147 | }
1148 |
1149 | #ifdef DEBUG
1150 | printf ("SD_init: RCA: %04x\n", ret->card_rca);
1151 | #endif
1152 |
1153 | // Send CMD9 to get the cards CSD
1154 | printf ("CMD9: get CSD\n");
1155 | sd_issue_command (ret, SEND_CSD, ret->card_rca << 16, 500000); //"hey beef, tell me more about you"
1156 |
1157 | if (FAIL (ret))
1158 | {
1159 | printf ("SD_init: error sending SEND_CSD\n");
1160 | print_response_reg (emmc);
1161 | return -1;
1162 | }
1163 | uint32_t card_csd_0 = ret->last_r0;
1164 | uint32_t card_csd_1 = ret->last_r1;
1165 | uint32_t card_csd_2 = ret->last_r2;
1166 | uint32_t card_csd_3 = ret->last_r3;
1167 |
1168 | uint32_t *dev_csd = (uint32_t *) malloc (5 * sizeof (uint32_t)); //extra space on the end
1169 | dev_csd[4] = 0;
1170 | dev_csd[3] = byte_swap(card_csd_0);
1171 | dev_csd[2] = byte_swap(card_csd_1);
1172 | dev_csd[1] = byte_swap(card_csd_2);
1173 | dev_csd[0] = byte_swap(card_csd_3);
1174 |
1175 | printf ("\n\tCSD: %08X%08X%08X%08X\n\n", card_csd_3, card_csd_2, card_csd_1,
1176 | card_csd_0);
1177 |
1178 |
1179 |
1180 | // Now select the card (toggles it to transfer state)
1181 | printf ("CMD7: switch to transfer mode\n");
1182 | sd_issue_command (ret, SELECT_CARD, ret->card_rca << 16, 500000); //"ok beef, get ready to rumble"
1183 |
1184 | if (FAIL (ret))
1185 | {
1186 | printf ("SD_init: error sending CMD7\n");
1187 | print_response_reg (emmc);
1188 | return -1;
1189 | }
1190 |
1191 | uint32_t cmd7_resp = ret->last_r0;
1192 | status = (cmd7_resp >> 9) & 0xf;
1193 |
1194 | if ((status != 3) && (status != 4))
1195 | {
1196 | printf ("SD_init: invalid status (%i)\n", status);
1197 | print_response_reg (emmc);
1198 | free (dev_id);
1199 | return -1;
1200 | }
1201 |
1202 |
1203 | printf ("CMD13: get status register\n");
1204 | sd_issue_command (ret, SEND_STATUS, ret->card_rca << 16, 500000); //"beef, what are you up to right now"
1205 |
1206 | if (FAIL (ret))
1207 | {
1208 | printf ("SD_init: error sending CMD13\n");
1209 | print_response_reg (emmc);
1210 | return -1;
1211 | }
1212 |
1213 | printf ("MMC status: 0x%08X\n", ret->last_r0);
1214 | printf ("\n\tMMC is %slocked.\n\n",
1215 | (CHECKBIT (ret->last_r0, 25) == 1) ? "" : "not ");
1216 |
1217 |
1218 |
1219 | dev_csd = (uint32_t*)(((uint8_t*)dev_csd) + 1);//yeah, now it makes sense. i've got no clue why this happens, though -.- also i isued scheme for about five years, so i like brackets more then operator precedence
1220 |
1221 | /*
1222 | printf("DEBUG: CSD: ");
1223 | for (int i = 0; i<16;++i) printf("%02X", ((uint8_t*)dev_csd)[i]);
1224 | printf("\n");
1225 |
1226 | printf("DEBUG: CID: ");
1227 | for (int i = 0; i<16;++i) printf("%02X", ((uint8_t*)dev_id)[i]);
1228 | printf("\n");
1229 | */
1230 |
1231 | ////////////////////////////////////////////////////////////////////////////////////////
1232 | //force erase
1233 |
1234 |
1235 |
1236 | if (('F' == mode) && (CHECKBIT (ret->last_r0, 25) == 1))
1237 | {
1238 |
1239 | // CMD16: block length 1
1240 | printf ("CMD16: setting blocklength to 1\n");
1241 | sd_issue_command (ret, SET_BLOCKLEN, 1, 500000); //"beef, if i give you extra commands after an instruction they will only contain one word"
1242 |
1243 | if (FAIL (ret))
1244 | {
1245 | print_response_reg (emmc);
1246 | printf ("SD_init: error sending SET_BLOCKLEN\n");
1247 | return -1;
1248 | }
1249 |
1250 | ret->block_size = 1;
1251 | controller_block_size = mmio_read (EMMC_BASE + EMMC_BLKSIZECNT);
1252 | controller_block_size &= (~0xfff);
1253 | controller_block_size |= 0x1;
1254 | mmio_write (EMMC_BASE + EMMC_BLKSIZECNT, controller_block_size);
1255 |
1256 |
1257 | uint8_t force_erase_payload[513];
1258 | memset (force_erase_payload, 0, 513);
1259 | force_erase_payload[0] = 0b00001000;
1260 |
1261 | ret->buf = &force_erase_payload;
1262 | ret->blocks_to_transfer = 1;
1263 |
1264 | printf ("CMD42: force erase\n");
1265 | int retry_count = 0;
1266 | int max_retries = 1;
1267 | while (retry_count < max_retries)
1268 | {
1269 |
1270 | sd_issue_command (ret, LOCK_UNLOCK, ret->card_rca << 16, 180000000); //"beef, forget everything you know, you are no longer protected"
1271 |
1272 | if (SUCCESS (ret))
1273 | break;
1274 | else
1275 | {
1276 | printf ("SD_init: error sending CMD%i, ", LOCK_UNLOCK);
1277 | printf ("error = %08x. ", ret->last_error);
1278 | retry_count++;
1279 | if (retry_count < max_retries)
1280 | printf ("Retrying...\n");
1281 | else
1282 | printf ("Giving up.\n");
1283 | }
1284 | }
1285 | if (retry_count == max_retries)
1286 | {
1287 | ret->card_rca = 0;
1288 | return -1;
1289 | }
1290 |
1291 | printf ("CMD13: get status register\n");
1292 | sd_issue_command (ret, SEND_STATUS, ret->card_rca << 16, 500000); //"beef, what are you up to right now"
1293 |
1294 | if (FAIL (ret))
1295 | {
1296 | printf ("SD_init: error sending CMD13\n");
1297 | print_response_reg (emmc);
1298 | return -1;
1299 | }
1300 |
1301 | printf ("MMC status: 0x%08X\n", ret->last_r0);
1302 | printf ("\n\tMMC is %slocked.\n\n",
1303 | (CHECKBIT (ret->last_r0, 25) == 1) ? "" : "not ");
1304 | }
1305 |
1306 | ///////////////////////////////////////////////////////////////////////////////////////////
1307 | //lock
1308 |
1309 | if ('L' == mode)
1310 | {
1311 | int retry_count = 0;
1312 | int max_retries = 1;
1313 |
1314 | // printf("locking only in the debug version\n");
1315 | // return -1;
1316 |
1317 | // CMD16: block length 16
1318 | printf ("CMD16: setting blocklength to 16\n");
1319 | sd_issue_command (ret, SET_BLOCKLEN, 16, 500000); //"beef, if i give you extra commands after an instruction they will contain three words"
1320 |
1321 | if (FAIL (ret))
1322 | {
1323 | print_response_reg (emmc);
1324 | printf ("SD_init: error sending SET_BLOCKLEN\n");
1325 | return -1;
1326 | }
1327 |
1328 | ret->block_size = 16;
1329 | controller_block_size = mmio_read (EMMC_BASE + EMMC_BLKSIZECNT);
1330 | controller_block_size &= (~0xfff);
1331 | controller_block_size |= 16;
1332 | mmio_write (EMMC_BASE + EMMC_BLKSIZECNT, controller_block_size);
1333 |
1334 |
1335 | ///////////////////////WP on
1336 | ret->blocks_to_transfer = 1;
1337 | ret->buf = (uint8_t *)dev_csd;
1338 |
1339 | ((uint8_t *) ret->buf)[14] |= 0x10; //bit twelve counted from the right and 0
1340 |
1341 | if(((uint8_t *) ret->buf)[14] & 0x20 != 0){
1342 | printf("perm write protect would be set. bailing out\n");
1343 | return -1;
1344 | }
1345 | /*
1346 | printf("DEBUG: CSD with temp write set: ");
1347 | for (int i = 0; i<16;++i) printf("%02X", ((uint8_t*)dev_csd)[i]);
1348 | printf("\n");*/
1349 |
1350 |
1351 | printf ("CMD27: write CSD\n");
1352 | retry_count = 0;
1353 | max_retries = 1;
1354 | while (retry_count < max_retries)
1355 | {
1356 |
1357 | sd_issue_command (ret, PROGRAM_CSD, ret->card_rca << 16, 180000000); //"beef, accept this new CSD"
1358 |
1359 | if (SUCCESS (ret))
1360 | break;
1361 | else
1362 | {
1363 | printf ("SD_init: error sending CMD%i, ", PROGRAM_CSD);
1364 | printf ("error = %08x. ", ret->last_error);
1365 | retry_count++;
1366 | if (retry_count < max_retries)
1367 | printf ("Retrying...\n");
1368 | else
1369 | printf ("Giving up.\n");
1370 | }
1371 | }
1372 | if (retry_count == max_retries)
1373 | {
1374 | ret->card_rca = 0;
1375 | return -1;
1376 | }
1377 | //print_response_reg (emmc);
1378 |
1379 |
1380 |
1381 |
1382 | ///////////////////lock
1383 |
1384 |
1385 | ret->buf = (uint8_t *) dev_id;
1386 | uint32_t key[4];
1387 | key[0] = 0x17C6987E;
1388 | key[1] = 0x4401EDDE;
1389 | key[2] = 0x371AC568;
1390 | key[3] = 0x65FFB562;
1391 |
1392 | for (int i = 0; i <= 3; ++i)
1393 | key[i] = byte_swap (key[i]);
1394 |
1395 |
1396 |
1397 | ((uint32_t *) ret->buf)[0] ^= key[0];
1398 | ((uint32_t *) ret->buf)[1] ^= key[1];
1399 | ((uint32_t *) ret->buf)[2] ^= key[2];
1400 | ((uint32_t *) ret->buf)[3] ^= key[3];
1401 |
1402 | ((uint8_t *) ret->buf)[0] = 0b00000101; //set password and lock
1403 | ((uint8_t *) ret->buf)[1] = 14; //14 byte password
1404 |
1405 | ret->blocks_to_transfer = 1;
1406 |
1407 | printf ("CMD42: set pw and lock\n");
1408 | retry_count = 0;
1409 | max_retries = 1;
1410 | while (retry_count < max_retries)
1411 | {
1412 |
1413 | sd_issue_command (ret, LOCK_UNLOCK, ret->card_rca << 16, 180000000); //"beef, take this password and be locked now"
1414 |
1415 | if (SUCCESS (ret))
1416 | break;
1417 | else
1418 | {
1419 | printf ("SD_init: error sending CMD%i, ", LOCK_UNLOCK);
1420 | printf ("error = %08x. ", ret->last_error);
1421 | retry_count++;
1422 | if (retry_count < max_retries)
1423 | printf ("Retrying...\n");
1424 | else
1425 | printf ("Giving up.\n");
1426 | }
1427 | }
1428 | if (retry_count == max_retries)
1429 | {
1430 | ret->card_rca = 0;
1431 | return -1;
1432 | }
1433 | printf ("CMD13: get status register\n");
1434 | sd_issue_command (ret, SEND_STATUS, ret->card_rca << 16, 500000); //"beef, what are you up to right now"
1435 |
1436 | if (FAIL (ret))
1437 | {
1438 | printf ("SD_init: error sending CMD13\n");
1439 | print_response_reg (emmc);
1440 | return -1;
1441 | }
1442 |
1443 | printf ("MMC status: 0x%08X\n", ret->last_r0);
1444 | printf ("\n\tMMC is %slocked.\n\n",
1445 | (CHECKBIT (ret->last_r0, 25) == 1) ? "" : "not ");
1446 |
1447 |
1448 | }
1449 | ///////////////////////////////////////////////////////////////////////////////////////////
1450 | //unlock
1451 |
1452 | if ('U' == mode)
1453 | {
1454 |
1455 | // CMD16: block length 16
1456 | printf ("CMD16: setting blocklength to 16\n");
1457 | sd_issue_command (ret, SET_BLOCKLEN, 16, 500000); //"beef, if i give you extra commands after an instruction they will contain sixteen words"
1458 |
1459 | if (FAIL (ret))
1460 | {
1461 | print_response_reg (emmc);
1462 | printf ("SD_init: error sending SET_BLOCKLEN\n");
1463 | return -1;
1464 | }
1465 |
1466 | ret->block_size = 16;
1467 | controller_block_size = mmio_read (EMMC_BASE + EMMC_BLKSIZECNT);
1468 | controller_block_size &= (~0xfff);
1469 | controller_block_size |= 16;
1470 | mmio_write (EMMC_BASE + EMMC_BLKSIZECNT, controller_block_size);
1471 |
1472 |
1473 | /////////unlock
1474 |
1475 | ret->buf = (uint8_t *) dev_id;
1476 |
1477 | uint32_t key[4];
1478 | key[0] = 0x17C6987E;
1479 | key[1] = 0x4401EDDE;
1480 | key[2] = 0x371AC568;
1481 | key[3] = 0x65FFB562;
1482 |
1483 | for (int i = 0; i <= 3; ++i)
1484 | key[i] = byte_swap (key[i]); //byteorder is fun fun fun, in the sun sun sun
1485 |
1486 | ((uint32_t *) ret->buf)[0] ^= key[0];
1487 | ((uint32_t *) ret->buf)[1] ^= key[1];
1488 | ((uint32_t *) ret->buf)[2] ^= key[2];
1489 | ((uint32_t *) ret->buf)[3] ^= key[3];
1490 |
1491 | ((uint8_t *) ret->buf)[0] = 0b00000010; //remove password
1492 | ((uint8_t *) ret->buf)[1] = 14; //14 byte password
1493 |
1494 | /*printf("DEBUG: unlock payload: ");
1495 | for (int i = 0; i<16;++i) printf("%02X", ((uint8_t*)ret->buf)[i]);
1496 | printf("\n");
1497 | */
1498 |
1499 | ret->blocks_to_transfer = 1;
1500 |
1501 | printf ("CMD42: unlock and clear password\n");
1502 | int retry_count = 0;
1503 | int max_retries = 1;
1504 | while (retry_count < max_retries)
1505 | {
1506 |
1507 | sd_issue_command (ret, LOCK_UNLOCK, ret->card_rca << 16, 180000000); //"beef, heres the password, if its right unlock and forget the password"
1508 |
1509 | if (SUCCESS (ret))
1510 | break;
1511 | else
1512 | {
1513 | printf ("SD_init: error sending CMD%i, ", LOCK_UNLOCK);
1514 | printf ("error = %08x. ", ret->last_error);
1515 | retry_count++;
1516 | if (retry_count < max_retries)
1517 | printf ("Retrying...\n");
1518 | else
1519 | printf ("Giving up.\n");
1520 | }
1521 | }
1522 | if (retry_count == max_retries)
1523 | {
1524 | ret->card_rca = 0;
1525 | return -1;
1526 | }
1527 |
1528 | ///////////////////////WP off
1529 | ret->blocks_to_transfer = 1;
1530 | ret->buf = (uint8_t *)dev_csd;
1531 |
1532 | ((uint8_t *) ret->buf)[14] &= ~(0x10); //bit twelve counted from the right and 0
1533 |
1534 |
1535 | if(((uint8_t *) ret->buf)[14] & 0x20 != 0){
1536 | printf("perm write protect would be set. bailing out\n");
1537 | return -1;
1538 | }
1539 | /*printf("DEBUG: CSD with temp write prot unset: ");
1540 | for (int i = 0; i<16;++i) printf("%02X", ((uint8_t*)dev_csd)[i]);
1541 | printf("\n");*/
1542 |
1543 |
1544 | printf ("CMD27: write CSD\n");
1545 | retry_count = 0;
1546 | max_retries = 1;
1547 | while (retry_count < max_retries)
1548 | {
1549 |
1550 | sd_issue_command (ret, PROGRAM_CSD, ret->card_rca << 16, 180000000); //"beef, accept this new CSD"
1551 |
1552 | if (SUCCESS (ret))
1553 | break;
1554 | else
1555 | {
1556 | printf ("SD_init: error sending CMD%i, ", PROGRAM_CSD);
1557 | printf ("error = %08x. ", ret->last_error);
1558 | retry_count++;
1559 | if (retry_count < max_retries)
1560 | printf ("Retrying...\n");
1561 | else
1562 | printf ("Giving up.\n");
1563 | }
1564 | }
1565 | if (retry_count == max_retries)
1566 | {
1567 | ret->card_rca = 0;
1568 | return -1;
1569 | }
1570 | //print_response_reg (emmc);
1571 |
1572 | printf ("CMD13: get status register\n");
1573 | sd_issue_command (ret, SEND_STATUS, ret->card_rca << 16, 500000); //"beef, what are you up to right now"
1574 |
1575 | if (FAIL (ret))
1576 | {
1577 | printf ("SD_init: error sending CMD13\n");
1578 | print_response_reg (emmc);
1579 | return -1;
1580 | }
1581 |
1582 | printf ("MMC status: 0x%08X\n", ret->last_r0);
1583 | printf ("\n\tMMC is %slocked.\n\n",
1584 | (CHECKBIT (ret->last_r0, 25) == 1) ? "" : "not ");
1585 |
1586 |
1587 |
1588 | }
1589 |
1590 | ///////////////////////////////////////////////////////////////////////////////////////////
1591 | //remove_writeprotect //ugly hack for spacejump
1592 |
1593 | if ('R' == mode)
1594 | {
1595 |
1596 | // CMD16: block length 16
1597 | printf ("CMD16: setting blocklength to 16\n");
1598 | sd_issue_command (ret, SET_BLOCKLEN, 16, 500000); //"beef, if i give you extra commands after an instruction they will contain sixteen words"
1599 |
1600 | if (FAIL (ret))
1601 | {
1602 | print_response_reg (emmc);
1603 | printf ("SD_init: error sending SET_BLOCKLEN\n");
1604 | return -1;
1605 | }
1606 |
1607 | ret->block_size = 16;
1608 | controller_block_size = mmio_read (EMMC_BASE + EMMC_BLKSIZECNT);
1609 | controller_block_size &= (~0xfff);
1610 | controller_block_size |= 16;
1611 | mmio_write (EMMC_BASE + EMMC_BLKSIZECNT, controller_block_size);
1612 |
1613 |
1614 |
1615 | ///////////////////////WP off
1616 | ret->blocks_to_transfer = 1;
1617 | ret->buf = (uint8_t *)dev_csd;
1618 |
1619 | ((uint8_t *) ret->buf)[14] &= ~(0x10); //bit twelve counted from the right and 0
1620 |
1621 |
1622 | if(((uint8_t *) ret->buf)[14] & 0x20 != 0){
1623 | printf("perm write protect would be set. bailing out\n");
1624 | return -1;
1625 | }
1626 | /*printf("DEBUG: CSD with temp write prot unset: ");
1627 | for (int i = 0; i<16;++i) printf("%02X", ((uint8_t*)dev_csd)[i]);
1628 | printf("\n");*/
1629 |
1630 |
1631 | printf ("CMD27: write CSD\n");
1632 | int retry_count = 0;
1633 | int max_retries = 1;
1634 | while (retry_count < max_retries)
1635 | {
1636 |
1637 | sd_issue_command (ret, PROGRAM_CSD, ret->card_rca << 16, 180000000); //"beef, accept this new CSD"
1638 |
1639 | if (SUCCESS (ret))
1640 | break;
1641 | else
1642 | {
1643 | printf ("SD_init: error sending CMD%i, ", PROGRAM_CSD);
1644 | printf ("error = %08x. ", ret->last_error);
1645 | retry_count++;
1646 | if (retry_count < max_retries)
1647 | printf ("Retrying...\n");
1648 | else
1649 | printf ("Giving up.\n");
1650 | }
1651 | }
1652 | if (retry_count == max_retries)
1653 | {
1654 | ret->card_rca = 0;
1655 | return -1;
1656 | }
1657 | //print_response_reg (emmc);
1658 |
1659 | printf ("CMD13: get status register\n");
1660 | sd_issue_command (ret, SEND_STATUS, ret->card_rca << 16, 500000); //"beef, what are you up to right now"
1661 |
1662 | if (FAIL (ret))
1663 | {
1664 | printf ("SD_init: error sending CMD13\n");
1665 | print_response_reg (emmc);
1666 | return -1;
1667 | }
1668 |
1669 | printf ("MMC status: 0x%08X\n", ret->last_r0);
1670 | printf ("\n\tMMC is %slocked.\n\n",
1671 | (CHECKBIT (ret->last_r0, 25) == 1) ? "" : "not ");
1672 |
1673 |
1674 |
1675 | }
1676 |
1677 | // Reset interrupt register
1678 | mmio_write (EMMC_BASE + EMMC_INTERRUPT, 0xffffffff);
1679 |
1680 | emmc_dev = ret;
1681 |
1682 | return 0;
1683 | }
1684 |
1685 |
1686 |
1687 | static int
1688 | sd_ensure_data_mode (struct emmc_block_dev *edev, char spi)
1689 | {
1690 | if (edev->card_rca == 0)
1691 | {
1692 | // Try again to initialise the card
1693 | int ret = sd_card_init (edev, spi, 0);
1694 | if (ret != 0)
1695 | return ret;
1696 | }
1697 |
1698 | printf
1699 | ("SD: ensure_data_mode() obtaining status register for card_rca %08x: ",
1700 | edev->card_rca);
1701 |
1702 | sd_issue_command (edev, SEND_STATUS, edev->card_rca << 16, 500000);
1703 | if (FAIL (edev))
1704 | {
1705 | printf ("SD: ensure_data_mode() error sending CMD13\n");
1706 | edev->card_rca = 0;
1707 | return -1;
1708 | }
1709 |
1710 | uint32_t status = edev->last_r0;
1711 | uint32_t cur_state = (status >> 9) & 0xf;
1712 |
1713 | printf ("status %i\n", cur_state);
1714 |
1715 | if (cur_state == 3)
1716 | {
1717 | // Currently in the stand-by state - select it
1718 | sd_issue_command (edev, SELECT_CARD, edev->card_rca << 16, 500000);
1719 | if (FAIL (edev))
1720 | {
1721 | printf ("SD: ensure_data_mode() no response from CMD17\n");
1722 | edev->card_rca = 0;
1723 | return -1;
1724 | }
1725 | }
1726 | else if (cur_state == 5)
1727 | {
1728 | // In the data transfer state - cancel the transmission
1729 | sd_issue_command (edev, STOP_TRANSMISSION, 0, 500000);
1730 | if (FAIL (edev))
1731 | {
1732 | printf ("SD: ensure_data_mode() no response from CMD12\n");
1733 | edev->card_rca = 0;
1734 | return -1;
1735 | }
1736 |
1737 | // Reset the data circuit
1738 | sd_reset_dat ();
1739 | }
1740 | else if (cur_state != 4)
1741 | {
1742 | // Not in the transfer state - re-initialise
1743 | int ret = sd_card_init (edev, spi, 0);
1744 | if (ret != 0)
1745 | return ret;
1746 | }
1747 |
1748 | // Check again that we're now in the correct mode
1749 | if (cur_state != 4)
1750 | {
1751 |
1752 | printf ("SD: ensure_data_mode() rechecking status: ");
1753 | sd_issue_command (edev, SEND_STATUS, edev->card_rca << 16, 500000);
1754 | if (FAIL (edev))
1755 | {
1756 | printf ("SD: ensure_data_mode() no response from CMD13\n");
1757 | edev->card_rca = 0;
1758 | return -1;
1759 | }
1760 | status = edev->last_r0;
1761 | cur_state = (status >> 9) & 0xf;
1762 |
1763 |
1764 | printf ("%i\n", cur_state);
1765 |
1766 |
1767 | if (cur_state != 4)
1768 | {
1769 | printf ("SD: unable to initialise SD card to "
1770 | "data mode (state %i)\n", cur_state);
1771 | edev->card_rca = 0;
1772 | return -1;
1773 | }
1774 | }
1775 |
1776 | return 0;
1777 | }
1778 |
1779 | static int
1780 | sd_do_data_command (struct emmc_block_dev *edev, int is_write, uint8_t * buf,
1781 | size_t buf_size, uint32_t block_no)
1782 | {
1783 |
1784 |
1785 | // This is as per HCSS 3.7.2.1
1786 | if (buf_size < edev->block_size)
1787 | {
1788 | printf ("SD: do_data_command() called with buffer size (%i) less than "
1789 | "block size (%i)\n", buf_size, edev->block_size);
1790 | return -1;
1791 | }
1792 |
1793 | edev->blocks_to_transfer = buf_size / edev->block_size;
1794 | if (buf_size % edev->block_size)
1795 | {
1796 | printf ("SD: do_data_command() called with buffer size (%i) not an "
1797 | "exact multiple of block size (%i)\n", buf_size,
1798 | edev->block_size);
1799 | return -1;
1800 | }
1801 | edev->buf = buf;
1802 |
1803 | // Decide on the command to use
1804 | int command;
1805 | if (is_write)
1806 | {
1807 | if (edev->blocks_to_transfer > 1)
1808 | command = WRITE_MULTIPLE_BLOCK;
1809 | else
1810 | command = WRITE_BLOCK;
1811 | }
1812 | else
1813 | {
1814 | if (edev->blocks_to_transfer > 1)
1815 | command = READ_MULTIPLE_BLOCK;
1816 | else
1817 | command = READ_SINGLE_BLOCK;
1818 | }
1819 |
1820 | int retry_count = 0;
1821 | int max_retries = 3;
1822 | while (retry_count < max_retries)
1823 | {
1824 |
1825 | sd_issue_command (edev, command, block_no, 5000000);
1826 |
1827 | if (SUCCESS (edev))
1828 | break;
1829 | else
1830 | {
1831 | printf ("SD: error sending CMD%i, ", command);
1832 | printf ("error = %08x. ", edev->last_error);
1833 | retry_count++;
1834 | if (retry_count < max_retries)
1835 | printf ("Retrying...\n");
1836 | else
1837 | printf ("Giving up.\n");
1838 | }
1839 | }
1840 | if (retry_count == max_retries)
1841 | {
1842 | edev->card_rca = 0;
1843 | return -1;
1844 | }
1845 |
1846 | return 0;
1847 | }
1848 |
1849 |
1850 | void
1851 | view_register (uint32_t * emmc)
1852 | {
1853 | char in;
1854 |
1855 | while (toupper (in) != 'Q')
1856 | {
1857 |
1858 | printf
1859 | ("(C)MDTM | (A)RG1 | (R)esponse | (S)tatus | (I)nterrupt | Control(0-2) | (Q)uit\n");
1860 |
1861 | scanf (" %c", &in);
1862 | printf ("\n");
1863 |
1864 | switch (toupper (in))
1865 | {
1866 | case 'C':
1867 | print_cmdtm_reg (emmc);
1868 | continue;
1869 | case 'A':
1870 | print_arg1_reg (emmc);
1871 | continue;
1872 | case 'R':
1873 | print_response_reg (emmc);
1874 | continue;
1875 | case 'S':
1876 | print_status_reg (emmc);
1877 | continue;
1878 | case 'I':
1879 | print_interrupt_reg (emmc);
1880 | continue;
1881 | case '0':
1882 | print_control0_reg (emmc);
1883 | continue;
1884 | case '1':
1885 | print_control1_reg (emmc);
1886 | continue;
1887 | case '2':
1888 | print_control2_reg (emmc);
1889 | continue;
1890 | case 'Q':
1891 | break;
1892 | default:
1893 | continue;
1894 | }
1895 | }
1896 |
1897 |
1898 | }
1899 |
1900 |
1901 | void
1902 | force_erase (struct emmc_block_dev *emmc_dev)
1903 | {
1904 | printf
1905 | ("WARNING: This will permanently erase the (e)MMC aka. NAND!\n\nContinue only if you do have a NAND dump of your 3DS!\n\n Enter H (big h) to continue.\n");
1906 | char in;
1907 | scanf (" %c", &in);
1908 | if ('H' == in)
1909 | sd_card_init (emmc_dev, 'F', 0);
1910 | return;
1911 | }
1912 |
1913 | void
1914 | lock (struct emmc_block_dev *emmc_dev)
1915 | {
1916 | printf
1917 | ("WARNING: This will lock the (e)MMC!\n\n Enter H (big h) to continue.\n");
1918 | char in;
1919 | scanf (" %c", &in);
1920 | if ('H' == in)
1921 | sd_card_init (emmc_dev, 'L', 0);
1922 | return;
1923 | }
1924 |
1925 | void
1926 | unlock (struct emmc_block_dev *emmc_dev)
1927 | {
1928 | sd_card_init (emmc_dev, 'U', 0);
1929 | return;
1930 | }
1931 |
1932 | void
1933 | removeprotect (struct emmc_block_dev *emmc_dev)
1934 | {
1935 | sd_card_init (emmc_dev, 'R', 0);
1936 | return;
1937 | }
1938 |
1939 |
1940 | void
1941 | dedication ()
1942 | {
1943 | printf
1944 | ("You might ask: \"bkifft, why the fuck are you dedicating this tool to the user crazyace2011?\" \n\n");
1945 | printf
1946 | ("Easy: this shithead gave me the spite fuelled energy to write it.\n\n");
1947 | printf
1948 | ("Quotes from http://gbatemp.net/threads/has-anyone-with-a-brick-been-able-to-recover.360647/:\n\n\"im trying to understand something everyone is spitting out information that they truly don't know. the emmc is wiped or locked the nand is wiped out. no one has the hardware to know 100% but everyone is talking like they know if you knew you would have a way of fixing not just talking about whats wrong. people are just claiming to know what is wrong when they don't have the equipment back up the theory.\"\n\n");
1949 | printf
1950 | ("\"im not saying you per say im just saying that everyone is talking like they are Einstein and know what is going on. who's to say that something is blocking the emmc controller not the emmc controller itself I don't know what it could be but im not throwing out stuff. im not ranting that you are doing it. its just people say something tech about the insides of a 3ds but the thing is no one know whats going on inside the 3ds and what the brick code actually did to the unit. yes we know that the system isn't responding to the nand that was installed by Nintendo but we don't know exactly what the gateway brick code did.\"\n\n");
1951 | printf
1952 | ("\"I already said that I don't know how but you smart ass people think you know but honestly you don't know shit about it either. no one said you had to answer to my comment so stfu and ignore my post\"\n\n");
1953 | printf
1954 | ("\"like we need more pointless 3ds brick threads real mature. must be a bunch of little kids that think they know everything. typical\"\n\n");
1955 | printf
1956 | ("Quote from http://www.maxconsole.com/maxcon_forums/threads/280010-Update-on-RMAing-my-3DS?p=1671397#post1671397:\n\n\"im on gbatemp and there is a bunch of little kids that think they know everything and every theory. its like when a child tells a parent I know I know I know gets annoying\"\n");
1957 | printf
1958 | ("\n\nAnyway, true shoutout to my man inian who played my brick guinea pig and all the fellas who gave constructive feedback on the \"Has anyone with a brick been able to recover\" thread, you know who you are.\n\n");
1959 | printf ("Big thanks to the anonymous donor for the Vernam cipher key.\n\n");
1960 | }
1961 |
1962 |
1963 | int
1964 | main ()
1965 | {
1966 |
1967 |
1968 |
1969 | int fd;
1970 | uint32_t *gpio;
1971 | void *peri_base;
1972 | int i;
1973 | int counter;
1974 | int cmd;
1975 | uint32_t arg;
1976 | char in;
1977 |
1978 |
1979 |
1980 | fd = open ("/dev/mem", O_RDWR | O_SYNC);
1981 | if (0 > fd)
1982 | {
1983 | perror ("Error opening /dev/mem");
1984 | printf
1985 | ("This tool needs super user rights. Run it as user root or use sudo\n");
1986 | exit (EXIT_FAILURE);
1987 | }
1988 |
1989 | if ((opendir ("/sys/bus/mmc/")) || (ENOENT != errno))
1990 | {
1991 | printf
1992 | ("It seems the MMC/SD drivers are loaded. Please boot a kernel without them.\n");
1993 | exit (EXIT_FAILURE);
1994 | }
1995 |
1996 |
1997 |
1998 | printf ("\e[1;1H\e[2J");
1999 | printf("\n\nNew enhanced formula: true unbrick instead of a force erase. (May contain nuts or GW secret keys.)\n");
2000 | printf
2001 | ("\n Dedicated to crazyace2011 @GBAtemp (crazyace @maxconsole)\n");
2002 | printf
2003 | (" and every other elderly person who can count to potato.\n\n");
2004 | printf ("\nThis tool is erotic cartoon ware.\n");
2005 | printf
2006 | ("If you like it please send one erotic cartoon picture to \nrpu.bkifft.gbatemp@gmail.com (even if you draw one in paint yourself, everyone likes to draw the cock and balls).\n");
2007 |
2008 | printf ("\nA statement from our sponsor (who gave me the Unlock key):\n");
2009 | printf
2010 | ("\"If you are reading this your 3DS has most likely been bricked by a Virus called Gateway 3DS.\n");
2011 | printf ("If so return it and get a refund immediately.\n");
2012 | printf
2013 | ("Because what they have done is they made a soft-mod for the 3DS but then decided\n");
2014 | printf ("that they would earn more money if they added their own AP.\n");
2015 | printf
2016 | ("They also added a lot of obfuscation (to prevent pirates from pirating their card and software),\n");
2017 | printf
2018 | ("which most likely also is the reason why some versions are not stable (and the brick code is triggered).\n");
2019 | printf
2020 | ("And as you already see on your 3DS they added brick code in the 2.0_2b Version.\n");
2021 | printf
2022 | ("This brick code is not even written correctly (else this unbricker wouldn't work).\n");
2023 | printf ("So they even failed at programming brick code.\n");
2024 | printf ("\nTo sum it all up you bought a badly programmed Virus.\n");
2025 | printf
2026 | ("\nBuy your games, don't pirate them. You see what happens when you pirate.\n");
2027 | printf ("I hope you learned from your mistake.\"\n");
2028 | printf
2029 | ("\n\n\n\nWARNING: Do not run this tool with a kernel that has the MMC/SD subsystem enabled!\n");
2030 | printf
2031 | ("\(The Mini Linux Image comes without them and the tool should refuse to run if the drivers are loaded)\n");
2032 |
2033 | printf ("\nWill continue in 10 seconds.\n");
2034 |
2035 | sleep (10);
2036 |
2037 |
2038 |
2039 | peri_base =
2040 | mmap (NULL, BLOCKSIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd,
2041 | BCM2708_PERI_BASE);
2042 |
2043 | if ((void *) -1 == peri_base)
2044 | {
2045 | perror ("Error while mapping");
2046 | exit (EXIT_FAILURE);
2047 | }
2048 |
2049 |
2050 |
2051 | emmc = peri_base + EMMC_OFFSET;
2052 | gpio = peri_base + GPIO_OFFSET;
2053 |
2054 |
2055 | struct emmc_block_dev emmc_device;
2056 |
2057 |
2058 |
2059 | in = '\0';
2060 |
2061 | while (toupper (in) != 'Q')
2062 | {
2063 |
2064 | //printf ("\n(D)edication | (S)afe run (Querry only) | (U)nlock (Safe) | (L)ock (Dangerous!) | (F)orce erase (Dangerous!) | (Q)uit\n");
2065 |
2066 | printf
2067 | ("\n(D)edication | (S)afe run (Querry only) | (U)nbrick (Safe) | (Q)uit\n");
2068 |
2069 |
2070 | scanf (" %c", &in);
2071 | printf ("\n");
2072 |
2073 | switch (toupper (in))
2074 | {
2075 | case 'S':
2076 | sd_card_init (&emmc_device, '0', 0);;
2077 | continue;
2078 | case 'F':
2079 | force_erase (&emmc_device);
2080 | continue;
2081 | case 'L':
2082 | lock (&emmc_device);
2083 | continue;
2084 |
2085 | case 'U':
2086 | unlock (&emmc_device);
2087 | continue;
2088 | case 'R':
2089 | removeprotect (&emmc_device);
2090 | continue;
2091 | case 'V':
2092 | view_register (emmc);
2093 | continue;
2094 | case 'D':
2095 | dedication ();
2096 | continue;
2097 | case 'Q':
2098 | break;
2099 | default:
2100 | continue;
2101 | }
2102 | }
2103 |
2104 |
2105 |
2106 |
2107 | printf ("\n");
2108 | if (0 > munmap (peri_base, BLOCKSIZE))
2109 | {
2110 | perror ("munmap failed:");
2111 | exit (EXIT_FAILURE);
2112 | }
2113 | }
2114 |
--------------------------------------------------------------------------------
/util.h:
--------------------------------------------------------------------------------
1 | /* Copyright (C) 2013 by John Cronin
2 | *
3 | * Permission is hereby granted, free of charge, to any person obtaining a copy
4 | * of this software and associated documentation files (the "Software"), to deal
5 | * in the Software without restriction, including without limitation the rights
6 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 | * copies of the Software, and to permit persons to whom the Software is
8 | * furnished to do so, subject to the following conditions:
9 |
10 | * The above copyright notice and this permission notice shall be included in
11 | * all copies or substantial portions of the Software.
12 |
13 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19 | * THE SOFTWARE.
20 | */
21 |
22 | #ifndef UTIL_H
23 | #define UTIL_H
24 |
25 | #include
26 | #include
27 |
28 | #define CRC7_POLY 0x89
29 |
30 |
31 | uint8_t crctable[256];
32 |
33 | static void
34 | GenerateCRCTable ()
35 | {
36 | int i, j;
37 |
38 | // generate a table value for all 256 possible byte values
39 | for (i = 0; i < 256; i++)
40 | {
41 | crctable[i] = (i & 0x80) ? i ^ CRC7_POLY : i;
42 | for (j = 1; j < 8; j++)
43 | {
44 | crctable[i] <<= 1;
45 | if (crctable[i] & 0x80)
46 | crctable[i] ^= CRC7_POLY;
47 | }
48 | }
49 | }
50 |
51 | static uint8_t
52 | AddByteToCRC (uint8_t crc, uint8_t b)
53 | {
54 | return crctable[(crc << 1) ^ b];
55 | }
56 |
57 | // Support for unaligned data access
58 | static inline void
59 | write_word (uint32_t val, uint8_t * buf, int offset)
60 | {
61 |
buf[offset + 0] = val & 0xff;
62 |
buf[offset + 1] = (val >> 8) & 0xff;
63 |
buf[offset + 2] = (val >> 16) & 0xff;
64 |
buf[offset + 3] = (val >> 24) & 0xff;
65 |
}
static inline void
66 |
67 | write_halfword (uint16_t val, uint8_t * buf, int offset)
68 | {
69 |
buf[offset + 0] = val & 0xff;
70 |
buf[offset + 1] = (val >> 8) & 0xff;
71 |
}
static inline void
72 |
73 | write_byte (uint8_t byte, uint8_t * buf, int offset)
74 | {
75 |
buf[offset] = byte;
76 |
}
static inline uint32_t
77 |
78 | read_word (uint8_t * buf, int offset)
79 | {
80 | uint32_t b0 = buf[offset + 0] & 0xff;
81 | uint32_t b1 = buf[offset + 1] & 0xff;
82 | uint32_t b2 = buf[offset + 2] & 0xff;
83 | uint32_t b3 = buf[offset + 3] & 0xff;
84 |
85 | return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
86 | }
87 |
88 | static inline uint16_t
89 | read_halfword (uint8_t * buf, int offset)
90 | {
91 | uint16_t b0 = buf[offset + 0] & 0xff;
92 | uint16_t b1 = buf[offset + 1] & 0xff;
93 |
94 | return b0 | (b1 << 8);
95 | }
96 |
97 | static inline uint8_t
98 | read_byte (uint8_t * buf, int offset)
99 | {
100 | return buf[offset];
101 | }
102 |
103 |
104 | uint8_t
105 | reverse_bitorder (uint8_t b)
106 | {
107 | b = (b & 0xF0) >> 4 | (b & 0x0F) << 4;
108 | b = (b & 0xCC) >> 2 | (b & 0x33) << 2;
109 | b = (b & 0xAA) >> 1 | (b & 0x55) << 1;
110 | return b;
111 | }
112 |
113 |
114 | uintptr_t alloc_buf (size_t size);
115 |
116 | // Support for BE to LE conversion
117 | #ifdef __GNUC__
118 | #define byte_swap __builtin_bswap32
119 | #else
120 | static inline uint32_t
121 | byte_swap (uint32_t in)
122 | {
123 | uint32_t b0 = in & 0xff;
124 | uint32_t b1 = (in >> 8) & 0xff;
125 | uint32_t b2 = (in >> 16) & 0xff;
126 | uint32_t b3 = (in >> 24) & 0xff;
127 | uint32_t ret = (b0 << 24) | (b1 << 16) | (b2 << 8) | b3;
128 | return ret;
129 | }
130 | #endif // __GNUC__
131 |
132 |
133 |
134 | #endif
135 |
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