├── .gitignore ├── .travis.yml ├── LICENSE ├── README.md ├── benchmark.nix ├── build.nix ├── ci.nix ├── flake-compat.nix ├── flake.lock ├── flake.nix ├── plot.nix ├── run.nix ├── scripts ├── plot └── run └── src ├── Makefile ├── dt.hpp ├── entry.asm ├── io.cpp ├── io.hpp ├── main.cpp ├── msr.hpp ├── selectors.hpp ├── standalone.lds ├── start.asm ├── types.hpp └── x86-instructions.hpp /.gitignore: -------------------------------------------------------------------------------- 1 | /result 2 | /result-* 3 | *.o 4 | *.elf* 5 | -------------------------------------------------------------------------------- /.travis.yml: -------------------------------------------------------------------------------- 1 | dist: bionic 2 | language: cpp 3 | compiler: gcc 4 | addons: 5 | apt: 6 | update: true 7 | 8 | before_install: 9 | - sudo add-apt-repository -y ppa:jonathonf/tup 10 | - sudo add-apt-repository -y ppa:jacob/virtualisation 11 | - sudo apt-get update -q 12 | - sudo apt-get install -y tup qemu-system-x86 nasm g++ python3-matplotlib 13 | 14 | script: 15 | - tup 16 | - cat measurements.csv 17 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | GNU AFFERO GENERAL PUBLIC LICENSE 2 | Version 3, 19 November 2007 3 | 4 | Copyright (C) 2007 Free Software Foundation, Inc. 5 | Everyone is permitted to copy and distribute verbatim copies 6 | of this license document, but changing it is not allowed. 7 | 8 | Preamble 9 | 10 | The GNU Affero General Public License is a free, copyleft license for 11 | software and other kinds of works, specifically designed to ensure 12 | cooperation with the community in the case of network server software. 13 | 14 | The licenses for most software and other practical works are designed 15 | to take away your freedom to share and change the works. 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Interpretation of Sections 15 and 16. 611 | 612 | If the disclaimer of warranty and limitation of liability provided 613 | above cannot be given local legal effect according to their terms, 614 | reviewing courts shall apply local law that most closely approximates 615 | an absolute waiver of all civil liability in connection with the 616 | Program, unless a warranty or assumption of liability accompanies a 617 | copy of the Program in return for a fee. 618 | 619 | END OF TERMS AND CONDITIONS 620 | 621 | How to Apply These Terms to Your New Programs 622 | 623 | If you develop a new program, and you want it to be of the greatest 624 | possible use to the public, the best way to achieve this is to make it 625 | free software which everyone can redistribute and change under these terms. 626 | 627 | To do so, attach the following notices to the program. It is safest 628 | to attach them to the start of each source file to most effectively 629 | state the exclusion of warranty; and each file should have at least 630 | the "copyright" line and a pointer to where the full notice is found. 631 | 632 | 633 | Copyright (C) 634 | 635 | This program is free software: you can redistribute it and/or modify 636 | it under the terms of the GNU Affero General Public License as published 637 | by the Free Software Foundation, either version 3 of the License, or 638 | (at your option) any later version. 639 | 640 | This program is distributed in the hope that it will be useful, 641 | but WITHOUT ANY WARRANTY; without even the implied warranty of 642 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 643 | GNU Affero General Public License for more details. 644 | 645 | You should have received a copy of the GNU Affero General Public License 646 | along with this program. If not, see . 647 | 648 | Also add information on how to contact you by electronic and paper mail. 649 | 650 | If your software can interact with users remotely through a computer 651 | network, you should also make sure that it provides a way for users to 652 | get its source. For example, if your program is a web application, its 653 | interface could display a "Source" link that leads users to an archive 654 | of the code. There are many ways you could offer source, and different 655 | solutions will be better for different programs; see section 13 for the 656 | specific requirements. 657 | 658 | You should also get your employer (if you work as a programmer) or school, 659 | if any, to sign a "copyright disclaimer" for the program, if necessary. 660 | For more information on this, and how to apply and follow the GNU AGPL, see 661 | . 662 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | [![Build Status](https://travis-ci.org/blitz/kernel_entry_benchmark.svg?branch=master)](https://travis-ci.org/blitz/kernel_entry_benchmark) 2 | ![GitHub](https://img.shields.io/github/license/blitz/kernel_entry_benchmark.svg?color=green) 3 | 4 | # Kernel Entry Microbenchmarks 5 | 6 | Find the full description in my blog post about [x86 system call 7 | mechanisms](https://x86.lol/generic/2019/07/04/kernel-entry.html) over on 8 | [x86.lol](https://x86.lol/). 9 | 10 | This repository contains x86 kernel entry benchmarks for: 11 | 12 | - interrupt gates, 13 | - call gates, 14 | - `sysenter`/`sysexit`, 15 | - `syscall`/`sysret`. 16 | 17 | ## Building with Nix (Recommended) 18 | 19 | If you have [Nix](https://nixos.org/), you can build the measurement 20 | kernel like this: 21 | 22 | ```sh 23 | % nix-build ./ci.nix -A defaultPackage 24 | ``` 25 | 26 | The kernel will then be `result` in the current directory. 27 | 28 | If you have Nix with 29 | [Flakes](https://nixos.wiki/wiki/Flakes#Non-NixOS) (still not enabled 30 | by default), this can be shortened to: 31 | 32 | ```sh 33 | % nix build 34 | ``` 35 | 36 | ## Building without Nix 37 | 38 | For building and running without Nix you need: 39 | 40 | - gcc >= 7.x 41 | - make 42 | 43 | Then you can just invoke make to build the kernel: 44 | 45 | ```sh 46 | % make -C src 47 | ``` 48 | 49 | Then you can find the kernel as `src/kernel_entry_benchmark.elf32`. 50 | 51 | Whether this works is up to your system. Only the Nix build is tested. 52 | 53 | ## Running Benchmarks 54 | 55 | The tiny benchmark kernel assumes that it runs on Qemu and can use the 56 | Qemu debug console. You can run it as a Multiboot-compatible kernel: 57 | 58 | ```sh 59 | % qemu-system-x86_64 -kernel result -debugcon stdio -no-reboot -enable-kvm 60 | Interrupt Gate,610 61 | Call Gate,473 62 | Syscall,99 63 | ``` 64 | 65 | The output is in CSV format. The first column is the kernel entry 66 | method and the second is the length of a roundtrip to the kernel using 67 | this method in cycles. 68 | 69 | I leave implementing serial output and running it on real hardware as 70 | an exercise to the reader. 71 | 72 | **Note:** Only Intel CPUs work currently. There seems to be an issue 73 | on AMD CPUs that currently limit this benchmark from running there. 74 | -------------------------------------------------------------------------------- /benchmark.nix: -------------------------------------------------------------------------------- 1 | { runCommand, benchmark-run, benchmark-plot }: 2 | runCommand "benchmark-result" { 3 | nativeBuildInputs = [ benchmark-run benchmark-plot ]; 4 | requiredSystemFeatures = [ "kvm" ]; 5 | } '' 6 | 7 | echo $PATH 8 | mkdir -p $out 9 | benchmark-run | tee $out/benchmark.csv 10 | 11 | if [ -z "$(cat $out/benchmark.csv)" ]; then 12 | echo "VM produced no output?" 13 | exit 1 14 | fi 15 | 16 | cat $out/benchmark.csv | benchmark-plot $out/benchmark.png 17 | '' 18 | -------------------------------------------------------------------------------- /build.nix: -------------------------------------------------------------------------------- 1 | { stdenv, gnumake, nasm }: 2 | 3 | stdenv.mkDerivation { 4 | name = "kernel-entry-benchmark"; 5 | src = ./src; 6 | nativeBuildInputs = [ gnumake nasm ]; 7 | 8 | installPhase = '' 9 | runHook preInstall 10 | 11 | install -m 444 kernel_entry_benchmark.elf32 $out 12 | 13 | runHook postInstall 14 | ''; 15 | } 16 | -------------------------------------------------------------------------------- /ci.nix: -------------------------------------------------------------------------------- 1 | (import ./flake-compat.nix).defaultNix.ciNix 2 | 3 | -------------------------------------------------------------------------------- /flake-compat.nix: -------------------------------------------------------------------------------- 1 | let 2 | lock = builtins.fromJSON (builtins.readFile ./flake.lock); 3 | inherit (lock.nodes.flake-compat.locked) owner repo rev narHash; 4 | flake-compat = builtins.fetchTarball { 5 | url = "https://github.com/${owner}/${repo}/archive/${rev}.tar.gz"; 6 | sha256 = narHash; 7 | }; 8 | in 9 | import flake-compat { src = ./.; } 10 | -------------------------------------------------------------------------------- /flake.lock: -------------------------------------------------------------------------------- 1 | { 2 | "nodes": { 3 | "flake-compat": { 4 | "flake": false, 5 | "locked": { 6 | "lastModified": 1641205782, 7 | "narHash": "sha256-4jY7RCWUoZ9cKD8co0/4tFARpWB+57+r1bLLvXNJliY=", 8 | "owner": "edolstra", 9 | "repo": "flake-compat", 10 | "rev": "b7547d3eed6f32d06102ead8991ec52ab0a4f1a7", 11 | "type": "github" 12 | }, 13 | "original": { 14 | "owner": "edolstra", 15 | "repo": "flake-compat", 16 | "type": "github" 17 | } 18 | }, 19 | "flake-compat-ci": { 20 | "locked": { 21 | "lastModified": 1641672839, 22 | "narHash": "sha256-Bdwv+DKeEMlRNPDpZxSz0sSrqQBvdKO5fZ8LmvrgCOU=", 23 | "owner": "hercules-ci", 24 | "repo": "flake-compat-ci", 25 | "rev": "e832114bc18376c0f3fa13c19bf5ff253cc6570a", 26 | "type": "github" 27 | }, 28 | "original": { 29 | "owner": "hercules-ci", 30 | "repo": "flake-compat-ci", 31 | "type": "github" 32 | } 33 | }, 34 | "nixpkgs": { 35 | "locked": { 36 | "lastModified": 1645010845, 37 | "narHash": "sha256-hO9X4PvxkSLMQnGGB7tOrKPwufhLMiNQMNXNwzLqneo=", 38 | "owner": "NixOS", 39 | "repo": "nixpkgs", 40 | "rev": "2128d0aa28edef51fd8fef38b132ffc0155595df", 41 | "type": "github" 42 | }, 43 | "original": { 44 | "owner": "NixOS", 45 | "ref": "nixos-21.11", 46 | "repo": "nixpkgs", 47 | "type": "github" 48 | } 49 | }, 50 | "root": { 51 | "inputs": { 52 | "flake-compat": "flake-compat", 53 | "flake-compat-ci": "flake-compat-ci", 54 | "nixpkgs": "nixpkgs" 55 | } 56 | } 57 | }, 58 | "root": "root", 59 | "version": 7 60 | } 61 | -------------------------------------------------------------------------------- /flake.nix: -------------------------------------------------------------------------------- 1 | { 2 | description = "A very basic flake"; 3 | 4 | inputs = { 5 | nixpkgs.url = "github:NixOS/nixpkgs/nixos-21.11"; 6 | flake-compat = { 7 | url = "github:edolstra/flake-compat"; 8 | flake = false; 9 | }; 10 | flake-compat-ci.url = "github:hercules-ci/flake-compat-ci"; 11 | }; 12 | 13 | outputs = { self, nixpkgs, flake-compat, flake-compat-ci }: { 14 | 15 | packages.x86_64-linux = 16 | let 17 | callPackage = nixpkgs.legacyPackages.x86_64-linux.callPackage; 18 | in rec { 19 | kernel-entry-benchmark = callPackage ./build.nix {}; 20 | 21 | benchmark-plot = callPackage ./plot.nix {}; 22 | benchmark-run = callPackage ./run.nix { 23 | inherit kernel-entry-benchmark; 24 | }; 25 | 26 | benchmark-results = callPackage ./benchmark.nix { 27 | inherit benchmark-run benchmark-plot; 28 | }; 29 | }; 30 | 31 | defaultPackage.x86_64-linux = self.packages.x86_64-linux.kernel-entry-benchmark; 32 | 33 | # For Hercules CI, which doesn't natively support flakes (yet). 34 | ciNix = flake-compat-ci.lib.recurseIntoFlakeWith { 35 | flake = self; 36 | 37 | # Optional. Systems for which to perform CI. 38 | systems = [ "x86_64-linux" ]; 39 | }; 40 | }; 41 | } 42 | -------------------------------------------------------------------------------- /plot.nix: -------------------------------------------------------------------------------- 1 | { stdenvNoCC, python3, lib, makeWrapper }: 2 | 3 | stdenvNoCC.mkDerivation { 4 | name = "benchmark-run"; 5 | 6 | src = ./scripts; 7 | 8 | nativeBuildInputs = [ makeWrapper ]; 9 | buildInputs = [ (python3.withPackages (ps: [ ps.matplotlib ])) ]; 10 | 11 | dontConfigure = true; 12 | dontBuild = true; 13 | 14 | installPhase = '' 15 | runHook preInstall 16 | 17 | mkdir -p $out/bin 18 | 19 | patchShebangs plot 20 | install -m 0755 plot $out/bin/benchmark-plot 21 | 22 | runHook postInstall 23 | ''; 24 | } 25 | -------------------------------------------------------------------------------- /run.nix: -------------------------------------------------------------------------------- 1 | { stdenvNoCC, qemu, util-linux, lib, makeWrapper 2 | , kernel-entry-benchmark }: 3 | 4 | stdenvNoCC.mkDerivation { 5 | name = "benchmark-run"; 6 | 7 | src = ./scripts; 8 | 9 | nativeBuildInputs = [ makeWrapper ]; 10 | buildInputs = [ qemu ]; 11 | 12 | dontConfigure = true; 13 | dontBuild = true; 14 | 15 | installPhase = '' 16 | runHook preInstall 17 | 18 | mkdir -p $out/bin 19 | 20 | patchShebangs run 21 | install -m 0755 run $out/bin/benchmark-run 22 | wrapProgram $out/bin/benchmark-run --prefix PATH : ${lib.makeBinPath [ qemu util-linux ]} \ 23 | --add-flags '${kernel-entry-benchmark}' 24 | 25 | runHook postInstall 26 | ''; 27 | } 28 | -------------------------------------------------------------------------------- /scripts/plot: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | 3 | # Plot a CSV file with label value pairs. 4 | 5 | import csv 6 | import sys 7 | 8 | import matplotlib 9 | matplotlib.use('Agg') # Otherwise, we crash without $DISPLAY set 10 | 11 | import matplotlib.pyplot as plt; plt.rcdefaults() 12 | import numpy as np 13 | import matplotlib.pyplot as plt 14 | 15 | output_file = sys.argv[1] 16 | 17 | reader = csv.reader(sys.stdin) 18 | 19 | labels = [] 20 | values = [] 21 | 22 | for row in reader: 23 | # Ignore comments 24 | if row[0].startswith('#'): 25 | continue 26 | 27 | labels.append(row[0]) 28 | values.append(int(row[1])) 29 | 30 | y_pos = np.arange(len(labels)) 31 | 32 | plt.bar(y_pos, values, align='center', alpha=0.5) 33 | plt.xticks(y_pos, labels) 34 | plt.ylabel('Cycles') 35 | plt.title('System call roundtrip') 36 | 37 | plt.savefig(output_file) 38 | 39 | -------------------------------------------------------------------------------- /scripts/run: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | 3 | set -e -u 4 | 5 | if [ $# -lt 1 ]; then 6 | echo "Usage: $0 boot-target" 7 | exit 1 8 | fi 9 | 10 | KERNEL=$1 11 | 12 | if [ -r /dev/kvm ]; then 13 | QEMUARGS="-machine q35,accel=kvm" 14 | echo "Using KVM." > /dev/stderr 15 | else 16 | QEMUARGS="-machine q35,accel=tcg" 17 | echo "No KVM available." > /dev/stderr 18 | fi 19 | 20 | # Pin to one processor to get more stable numbers. 21 | exec taskset -c $(($(nproc) - 1)) \ 22 | qemu-system-x86_64 -cpu qemu64 -net none \ 23 | $QEMUARGS \ 24 | -display none -smp 1 -no-reboot -vga none -debugcon stdio -kernel "$KERNEL" -s 25 | -------------------------------------------------------------------------------- /src/Makefile: -------------------------------------------------------------------------------- 1 | NASM ?= nasm 2 | 3 | DEPDIR := .deps 4 | DEPFLAGS = -MT $@ -MMD -MP -MF $(DEPDIR)/$*.d 5 | 6 | ASFLAGS += -g -f elf64 -F dwarf 7 | 8 | CPPFLAGS = -nostdinc -I. 9 | 10 | CXXFLAGS += -g -O2 -march=x86-64 -mtune=broadwell -std=c++20 -Wall -nostdinc++ 11 | CXXFLAGS += -mno-red-zone 12 | 13 | # Newer compilers can do -mgeneral-regs-only, but for old ones we have to do: 14 | CXXFLAGS += -mno-mmx -mno-sse -mno-sse2 -mno-avx -mno-avx2 15 | 16 | CXXFLAGS += -ffreestanding -fno-asynchronous-unwind-tables -fno-threadsafe-statics -fno-rtti -fno-exceptions 17 | CXXFLAGS += -fno-PIC -fno-stack-protector 18 | 19 | LDFLAGS = -static -no-pie -g -nostdlib -Wl,--build-id=none -Wl,-n -Wl,-T 20 | 21 | OBJS := entry.o io.o main.o start.o 22 | 23 | kernel_entry_benchmark.elf32: kernel_entry_benchmark.elf64 24 | $(OBJCOPY) -O elf32-i386 $< $@ 25 | $(STRIP) $@ 26 | 27 | kernel_entry_benchmark.elf64: standalone.lds $(OBJS) 28 | $(CXX) $(CXXFLAGS) $(CFLAGS) $(LDFLAGS) $^ -o $@ 29 | 30 | .PHONY: clean 31 | clean: 32 | rm -f $(OBJS) kernel_entry_benchmark.elf64 33 | 34 | %.o : %.cpp $(DEPDIR)/%.d | $(DEPDIR) 35 | $(CXX) -c $(DEPFLAGS) $(CXXFLAGS) $(CFLAGS) $(CPPFLAGS) $< -o $@ 36 | 37 | %.o : %.asm 38 | $(NASM) $(ASFLAGS) $< -o $@ 39 | 40 | $(DEPDIR): ; @mkdir -p $@ 41 | 42 | DEPFILES := $(SRCS:%.c=$(DEPDIR)/%.d) 43 | $(DEPFILES): 44 | include $(wildcard $(DEPFILES)) 45 | -------------------------------------------------------------------------------- /src/dt.hpp: -------------------------------------------------------------------------------- 1 | // x86_64 CPU data structures and helper functions 2 | 3 | #pragma once 4 | 5 | #include "types.hpp" 6 | #include "x86-instructions.hpp" 7 | 8 | // Task State Segment 9 | struct tss { 10 | uint32_t reserved0 = 0; 11 | uint64_t rsp[3] {}; 12 | uint32_t reserved1 = 0; 13 | uint32_t reserved2 = 0; 14 | uint64_t ist[7] {}; 15 | uint32_t reserved3 = 0; 16 | uint32_t reserved4 = 0; 17 | uint16_t reserved5 = 0; 18 | uint16_t iopb_offset = 0; 19 | } __packed; 20 | 21 | // A descriptor for the Global Descriptor Table 22 | struct gdt_desc { 23 | uint16_t limit_lo = 0; 24 | uint16_t base_lo = 0; 25 | uint8_t base_mid = 0; 26 | uint8_t type_dpl = 0; 27 | uint8_t limit_flags = 0; 28 | uint8_t base_hi = 0; 29 | 30 | constexpr gdt_desc() = default; 31 | 32 | constexpr void set_base(uint64_t base) 33 | { 34 | base_lo = base & 0xFFFF; 35 | base_mid = (base >> 16) & 0xFF; 36 | base_hi = (base >> 24) & 0xFF; 37 | } 38 | 39 | static gdt_desc tss_desc(tss const *base) 40 | { 41 | gdt_desc t; 42 | 43 | static_assert(sizeof(tss) < 0x10000U, "TSS size broken"); 44 | 45 | t.limit_lo = sizeof(tss) & 0xFFFF; 46 | t.type_dpl = 0b10001001; 47 | t.set_base((uintptr_t)base); 48 | return t; 49 | } 50 | 51 | static gdt_desc tss_desc_hi(tss const *base) 52 | { 53 | union bare_access { 54 | gdt_desc t; 55 | uint32_t dword[2]; 56 | 57 | bare_access() {} 58 | } b; 59 | 60 | b.dword[0] = reinterpret_cast(base) >> 32; 61 | b.dword[1] = 0; 62 | 63 | return b.t; 64 | } 65 | 66 | static gdt_desc call_gate(uint16_t sel_, uint64_t offset_, uint8_t dpl) 67 | { 68 | gdt_desc i; 69 | 70 | i.limit_lo = offset_ & 0xFFFF; 71 | i.base_lo = sel_; 72 | i.type_dpl = 0b10001100 | (dpl << 5); 73 | 74 | i.limit_flags = (offset_ >> 16) & 0xFF; 75 | i.base_hi = (offset_ >> 24) & 0xFF; 76 | 77 | return i; 78 | } 79 | 80 | static gdt_desc call_gate_hi(uint64_t offset_) 81 | { 82 | gdt_desc i; 83 | 84 | union bare_access { 85 | gdt_desc t; 86 | uint32_t dword[2]; 87 | 88 | bare_access() {} 89 | } b; 90 | 91 | b.dword[0] = offset_ >> 32; 92 | b.dword[1] = 0; 93 | 94 | return b.t; 95 | } 96 | 97 | constexpr static gdt_desc kern_code_desc() 98 | { 99 | gdt_desc t; 100 | t.type_dpl = 0b10011011; 101 | t.limit_flags = 0b10100000; 102 | return t; 103 | } 104 | 105 | constexpr static gdt_desc kern_data_desc() 106 | { 107 | gdt_desc t; 108 | t.type_dpl = 0b10010011; 109 | t.limit_flags = 0b10100000; 110 | return t; 111 | } 112 | 113 | constexpr static gdt_desc user_code_desc() 114 | { 115 | gdt_desc t; 116 | t.type_dpl = 0b11111011; 117 | t.limit_flags = 0b10100000; 118 | return t; 119 | } 120 | 121 | constexpr static gdt_desc user_data_desc() 122 | { 123 | gdt_desc t; 124 | t.type_dpl = 0b11110011; 125 | t.limit_flags = 0b10100000; 126 | return t; 127 | } 128 | }; 129 | 130 | static_assert(sizeof(gdt_desc) == 8, "GDT structure broken"); 131 | 132 | // Interrupt descriptor table descriptor 133 | struct idt_desc { 134 | uint16_t offset_lo = 0; 135 | uint16_t selector = 0; 136 | uint16_t flags = 0; 137 | uint16_t offset_hi = 0; 138 | uint32_t offset_hi2 = 0; 139 | uint32_t reserved = 0; 140 | 141 | idt_desc() = default; 142 | 143 | void set_offset(uint64_t offset_) 144 | { 145 | offset_lo = offset_ & 0xFFFF; 146 | offset_hi = (offset_ >> 16) & 0xFFFF; 147 | offset_hi2 = offset_ >> 32; 148 | } 149 | 150 | static idt_desc interrupt_gate(uint16_t sel_, uint64_t offset_, uint8_t ist, uint8_t dpl) 151 | { 152 | idt_desc i; 153 | i.set_offset(offset_); 154 | i.selector = sel_; 155 | i.flags = ist | (14 /* type */ << 8) | (dpl << 13) | (1 << 15 /* Present */); 156 | return i; 157 | } 158 | }; 159 | 160 | // Descriptor table register (GDTR/LDTR) 161 | template 162 | struct dtr { 163 | uint16_t length; 164 | DESC const *descp; 165 | 166 | template 167 | dtr(DESC const (&descp_)[N]) 168 | : length(N * sizeof(DESC) - 1), 169 | descp(descp_) 170 | {} 171 | } __packed; 172 | 173 | inline void lidt(dtr const &idtr) 174 | { 175 | asm volatile ("lidt %0" :: "m" (idtr)); 176 | } 177 | 178 | inline void lgdt(dtr const &gdtr) 179 | { 180 | asm volatile ("lgdt %0" :: "m" (gdtr)); 181 | } 182 | 183 | inline void ltr(uint16_t selector) 184 | { 185 | asm volatile ("ltr %0" :: "r" ((uint16_t)selector)); 186 | } 187 | -------------------------------------------------------------------------------- /src/entry.asm: -------------------------------------------------------------------------------- 1 | ; -*- Mode: nasm -*- 2 | 3 | extern call_gate_entry, int_gate_entry, syscall_entry, sysenter_entry 4 | extern kern_stack_end 5 | 6 | global asm_call_gate_entry, asm_int_gate_entry, asm_syscall_entry, asm_sysenter_entry 7 | 8 | section .text.asm_call_gate_entry 9 | 10 | align 16 11 | asm_call_gate_entry: 12 | o64 retf 13 | 14 | align 16 15 | asm_int_gate_entry: 16 | iretq 17 | 18 | align 16 19 | asm_syscall_entry: 20 | ; The hardware sets RIP and clobbers RCX/R11. 21 | o64 sysret 22 | 23 | align 16 24 | asm_sysenter_entry: 25 | ; Hardware sets RIP and RSP. Userspace has to give us RIP and userspace 26 | ; RSP to jump back via RDX/RCX. 27 | o64 sysexit 28 | -------------------------------------------------------------------------------- /src/io.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | 4 | void putc(char c) 5 | { 6 | outbi<0xe9>(c); 7 | } 8 | 9 | void put(const char *str) 10 | { 11 | // Qemu debugcon 12 | for (;*str != 0; str++) 13 | putc(*str); 14 | } 15 | 16 | void put(uint64_t v) 17 | { 18 | char digits[32] {}; 19 | 20 | // Points at last character. We have to keep a '\0' at the end. 21 | char *cur = &digits[31]; 22 | 23 | do { 24 | *(--cur) = v % 10 + '0'; 25 | v = v / 10; 26 | } while (v); 27 | 28 | put(cur); 29 | } 30 | 31 | const char *hex(uint64_t v) 32 | { 33 | bool skip_leading_zeroes = true; 34 | static char digits[2 /* 0x */ + 16 /* hex digits */ + 1 /* \0 */]; 35 | char *cur = &digits[0]; 36 | 37 | *(cur++) = '0'; 38 | *(cur++) = 'x'; 39 | 40 | for (int i = sizeof(v)*8 - 4; i >= 0; i -= 4) { 41 | int nibble = (v >> i) & 0xF; 42 | 43 | // Don't print leading zeroes. 44 | if (nibble == 0 and i != 0 and skip_leading_zeroes) 45 | continue; 46 | else 47 | skip_leading_zeroes = false; 48 | 49 | *(cur++) = nibble + (nibble < 0xa ? '0' : 'a' - 0xa); 50 | } 51 | 52 | *(cur++) = 0; 53 | return &digits[0]; 54 | } 55 | -------------------------------------------------------------------------------- /src/io.hpp: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "types.hpp" 4 | 5 | void putc(char c); 6 | 7 | void put(const char *str); 8 | void put(uint64_t v); 9 | 10 | // The returned pointer is only valid till the next call to hex(). 11 | const char *hex(uint64_t v); 12 | 13 | template 14 | void format(T first) 15 | { 16 | put(first); 17 | } 18 | 19 | template 20 | void format(T first, R... rest) 21 | { 22 | format(first); 23 | format(rest...); 24 | } 25 | -------------------------------------------------------------------------------- /src/main.cpp: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | 7 | extern "C" void asm_call_gate_entry(); 8 | extern "C" void asm_int_gate_entry(); 9 | extern "C" void asm_syscall_entry(); 10 | extern "C" void asm_sysenter_entry(); 11 | extern "C" char kern_stack_end[]; 12 | 13 | extern "C" [[noreturn]] void main(); 14 | extern "C" void call_gate_entry(); 15 | 16 | extern "C" gdt_desc gdt[]; 17 | 18 | 19 | alignas(64) char user_stack[128]; 20 | 21 | gdt_desc gdt[] { 22 | {}, 23 | gdt_desc::kern_code_desc(), 24 | gdt_desc::kern_data_desc(), 25 | gdt_desc::user_code_desc(), 26 | gdt_desc::user_data_desc(), 27 | gdt_desc::user_code_desc(), // Duplicated because of syscall/sysret selector requirements 28 | 29 | // TSS placeholders 30 | {}, {}, 31 | 32 | // Call gate placeholders 33 | {}, {}, 34 | }; 35 | 36 | tss tss; 37 | 38 | static const uint8_t INT_GATE_VECTOR {32}; 39 | 40 | static idt_desc idt[256]; 41 | 42 | [[noreturn]] static void exit_via_retf(uint64_t user_rip) 43 | { 44 | asm volatile ("push %[user_ss]\n" 45 | "push %[user_rsp]\n" 46 | "push %[user_cs]\n" 47 | "push %[user_rip]\n" 48 | // Address width for far ret is 32-bit even in 64-bit mode. 49 | "rex.W lret\n" 50 | : 51 | : [user_ss] "ri" (static_cast(ring3_data_selector)), 52 | [user_rsp] "ri" (reinterpret_cast(user_stack) + sizeof(user_stack)), 53 | [user_cs] "ri" (static_cast(ring3_code_selector)), 54 | [user_rip] "ri" (user_rip)); 55 | 56 | __builtin_unreachable(); 57 | } 58 | 59 | static void do_gate_call() 60 | { 61 | struct farp { 62 | uint32_t offset; 63 | uint16_t sel; 64 | } __packed; 65 | 66 | static const farp gate { 0, ring3_call_selector }; 67 | // Adding a rex.W prefix to the far call, makes the far pointer have 68 | // a 64-bit offset on Intel, but has no effect on AMD. 69 | asm volatile ("lcall *%[far_ptr]\n" :: [far_ptr] "m" (gate)); 70 | } 71 | 72 | static void do_int() 73 | { 74 | asm volatile ("int %[vec]\n" :: [vec] "i" (INT_GATE_VECTOR)); 75 | } 76 | 77 | static void do_syscall() 78 | { 79 | asm volatile ("syscall\n" ::: "rcx", "r11"); 80 | } 81 | 82 | static void do_sysenter() 83 | { 84 | asm volatile ("mov %%rsp, %%rcx\n" 85 | "lea 1f(%%rip), %%rdx\n" 86 | "sysenter\n" 87 | "1: \n" 88 | ::: "rcx", "rdx"); 89 | } 90 | 91 | static void measure(const char *name, void (*fn)()) 92 | { 93 | const int measure_rounds = 128 * 1024; 94 | const int warmup_rounds = 32 * 1024; 95 | 96 | for (int warm_up = warmup_rounds; warm_up != 0; warm_up--) { 97 | fn(); 98 | } 99 | 100 | uint64_t start = rdtsc(); 101 | for (int rounds = measure_rounds; rounds != 0; rounds--) { 102 | fn(); 103 | } 104 | uint64_t end = rdtsc(); 105 | 106 | format(name, ",", (end - start) / measure_rounds, "\n"); 107 | } 108 | 109 | [[noreturn]] static void user_measure() 110 | { 111 | measure("Interrupt Gate", [] () { do_int(); }); 112 | measure("Call Gate", [] () { do_gate_call(); }); 113 | measure("Syscall", [] () { do_syscall(); }); 114 | 115 | // This only works on Intel. 116 | if (is_vendor_intel(query_cpuid(0))) { 117 | measure("Sysenter", [] () { do_sysenter(); }); 118 | } else { 119 | format("# Only Intel supports sysenter in Long Mode, skipping.\n"); 120 | } 121 | 122 | // We're done. 123 | outbi<0x64>(0xFE); // PCI reset on qemu 124 | cli_hlt(); // This will triple fault 125 | __builtin_unreachable(); 126 | } 127 | 128 | static void allow_user_io() 129 | { 130 | // Set IOPL to 3. 131 | asm volatile ("pushfq\n" 132 | "or %0, (%%rsp)\n" 133 | "popfq\n" 134 | : 135 | : "r" (3 << 12)); 136 | } 137 | 138 | static void init_syscall() 139 | { 140 | wrmsr(IA32_LSTAR, reinterpret_cast(asm_syscall_entry)); 141 | 142 | static_assert(ring0_code_selector + 0x8 == ring0_data_selector, 143 | "Ring0 code and data selectors do not match SYSRET layout"); 144 | 145 | static_assert(ring3_data_selector + 0x8 == ring3_code_selector, 146 | "Ring0 code and data selectors do not match SYSRET layout"); 147 | 148 | wrmsr(IA32_STAR, ((uint64_t)ring0_code_selector << 32) | (uint64_t)(ring3_code_selector - 0x10) << 48); 149 | wrmsr(IA32_FMASK, 0x700); // Clear TF/DF/IF on system call entry 150 | } 151 | 152 | static void init_sysenter() 153 | { 154 | static_assert(ring0_code_selector + 0x8 == ring0_data_selector, 155 | "Ring0 code and data selectors do not match SYSCALL layout"); 156 | 157 | static_assert(ring0_code_selector + 0x10 + 3 == ring3_code_selector_sysenter, 158 | "Ring0 code and ring3 code selectors do not match SYSCALL layout"); 159 | 160 | static_assert(ring0_code_selector + 0x18 + 3 == ring3_data_selector, 161 | "Ring0 code and ring3 data selectors do not match SYSCALL layout"); 162 | 163 | wrmsr(IA32_SYSENTER_CS, ring0_code_selector); 164 | wrmsr(IA32_SYSENTER_ESP, reinterpret_cast(kern_stack_end)); 165 | wrmsr(IA32_SYSENTER_EIP, reinterpret_cast(asm_sysenter_entry)); 166 | } 167 | 168 | void main() 169 | { 170 | // Finishing GDT with entries that cannot be constructed without runtime code. 171 | gdt[array_size(gdt) - 4] = gdt_desc::tss_desc(&tss); 172 | gdt[array_size(gdt) - 3] = gdt_desc::tss_desc_hi(&tss); 173 | 174 | gdt[array_size(gdt) - 2] = gdt_desc::call_gate(ring0_code_selector, reinterpret_cast(&asm_call_gate_entry), 3); 175 | gdt[array_size(gdt) - 1] = gdt_desc::call_gate_hi(reinterpret_cast(&asm_call_gate_entry)); 176 | 177 | tss.rsp[0] = reinterpret_cast(kern_stack_end); 178 | ltr(ring0_tss_selector); 179 | 180 | // Prepare interrupt and call gate entry points 181 | idt[INT_GATE_VECTOR] = idt_desc::interrupt_gate(ring0_code_selector, reinterpret_cast(&asm_int_gate_entry), 0, 3); 182 | lidt(idt); 183 | 184 | allow_user_io(); 185 | init_syscall(); 186 | init_sysenter(); 187 | 188 | exit_via_retf(reinterpret_cast(&user_measure)); 189 | 190 | cli_hlt(); 191 | } 192 | -------------------------------------------------------------------------------- /src/msr.hpp: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "types.hpp" 4 | 5 | enum : uint32_t { 6 | IA32_SYSENTER_CS = 0x174U, 7 | IA32_SYSENTER_ESP = 0x175U, 8 | IA32_SYSENTER_EIP = 0x176U, 9 | IA32_STAR = 0xC0000081U, 10 | IA32_LSTAR = 0xC0000082U, 11 | IA32_FMASK = 0xC0000084U, 12 | IA32_FS_BASE = 0xC0000100U, 13 | }; 14 | -------------------------------------------------------------------------------- /src/selectors.hpp: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "types.hpp" 4 | 5 | const uint16_t ring0_code_selector = 0x8; 6 | const uint16_t ring0_data_selector = 0x10; 7 | const uint16_t ring3_code_selector_sysenter = 0x1b; 8 | const uint16_t ring3_data_selector = 0x23; 9 | const uint16_t ring3_code_selector = 0x2b; 10 | const uint16_t ring0_tss_selector = 0x30; 11 | const uint16_t ring3_call_selector = 0x43; 12 | 13 | inline bool is_cpl0_selector(uint16_t sel) 14 | { 15 | return (sel & 0x3) == 0; 16 | } 17 | -------------------------------------------------------------------------------- /src/standalone.lds: -------------------------------------------------------------------------------- 1 | OUTPUT_FORMAT("elf64-x86-64") 2 | OUTPUT_ARCH("i386:x86-64") 3 | ENTRY(_start) 4 | EXTERN(_start) 5 | 6 | PHDRS { 7 | lo_rwx PT_LOAD FILEHDR PHDRS FLAGS (7); /* RWX */ 8 | } 9 | 10 | SECTIONS 11 | { 12 | ENTRY(_start) 13 | 14 | /* 2 MB */ 15 | .text (0x200000 + SIZEOF_HEADERS) : 16 | { 17 | *(.text.init) 18 | *(.text .text.*) 19 | } : lo_rwx 20 | 21 | .data : 22 | { 23 | . = ALIGN(8); 24 | _init_array_start = .; 25 | KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*))) 26 | KEEP(*(.init_array)) 27 | _init_array_end = .; 28 | *(.rodata .rodata.*); 29 | *(.data .data.*); 30 | } : lo_rwx 31 | 32 | .bss : 33 | { 34 | *(.bss .bss.*); 35 | } : lo_rwx 36 | 37 | /DISCARD/ : 38 | { 39 | *(.comment) 40 | *(.eh_frame) 41 | *(.note.*) 42 | } 43 | } 44 | -------------------------------------------------------------------------------- /src/start.asm: -------------------------------------------------------------------------------- 1 | ; -*- Mode: nasm -*- 2 | 3 | extern _init_array_start, _init_array_end 4 | extern main 5 | extern gdt 6 | 7 | %define PAGE_SIZE 4096 8 | %define PTE_P (1 << 0) 9 | %define PTE_W (1 << 1) 10 | %define PTE_U (1 << 2) 11 | %define PTE_A (1 << 5) 12 | %define PTE_D (1 << 6) 13 | %define PTE_PS (1 << 7) 14 | %define PTE_G (1 << 8) 15 | 16 | %define PTE_DEFAULT (PTE_P | PTE_W | PTE_U | PTE_A | PTE_D) 17 | 18 | %define IA32_EFER 0xC0000080 19 | %define IA32_EFER_SCE (1 << 0) 20 | %define IA32_EFER_LME (1 << 8) 21 | %define IA32_EFER_NXE (1 << 11) 22 | 23 | %define CR0_PE (1 << 0) 24 | %define CR0_MP (1 << 1) 25 | %define CR0_TS (1 << 3) 26 | %define CR0_NE (1 << 5) 27 | %define CR0_WP (1 << 16) 28 | %define CR0_PG (1 << 31) 29 | 30 | %define CR4_PAE (1 << 5) 31 | %define CR4_PGE (1 << 7) 32 | 33 | %define RING0_CODE_SELECTOR 0x08 34 | %define RING0_DATA_SELECTOR 0x10 35 | %define GDT_SIZE 0x50 36 | 37 | section .text.init progbits alloc exec nowrite 38 | bits 32 39 | 40 | _mbheader: 41 | align 4 42 | dd 1BADB002h ; magic 43 | dd 3h ; features 44 | dd -(3h + 1BADB002h) ; checksum 45 | 46 | _gdtp: 47 | dw GDT_SIZE - 1 48 | dd gdt 49 | 50 | global _start 51 | _start: 52 | ; Construct 1:1 2MB mapping at 2MB 53 | mov dword [ptab_pml4], ptab_pdpt + PTE_DEFAULT ; PTE_G is reserved in PML4 on AMD. 54 | mov dword [ptab_pdpt], ptab_pd + PTE_DEFAULT 55 | mov dword [ptab_pd + 8], (1 << 21) | PTE_DEFAULT | PTE_PS | PTE_G 56 | 57 | ; Load 64-bit GDT 58 | lgdt [_gdtp] 59 | 60 | ; Load page table 61 | mov eax, ptab_pml4 62 | mov cr3, eax 63 | 64 | ; Long mode initialization. See Intel SDM Vol. 3 Chapter 9.8.5. 65 | mov eax, CR4_PAE | CR4_PGE 66 | mov cr4, eax 67 | 68 | xor edx, edx 69 | mov eax, IA32_EFER_LME | IA32_EFER_NXE | IA32_EFER_SCE 70 | mov ecx, IA32_EFER 71 | wrmsr 72 | 73 | ; Enable paging and thus Long Mode. 74 | mov eax, cr0 75 | or eax, CR0_PG 76 | mov cr0, eax 77 | 78 | jmp RING0_CODE_SELECTOR:_start_long 79 | 80 | section .text.longinit 81 | bits 64 82 | _start_long: 83 | 84 | mov eax, RING0_DATA_SELECTOR 85 | mov ss, eax 86 | mov ds, eax 87 | mov es, eax 88 | mov fs, eax 89 | mov gs, eax 90 | 91 | lea rsp, [rel kern_stack_end] 92 | 93 | mov rbx, _init_array_start 94 | mov rbp, _init_array_end 95 | 96 | next_constructor: 97 | cmp rbx, rbp 98 | je done_with_contructors 99 | call [rbx] 100 | lea rbx, [rbx + 8] 101 | jmp next_constructor 102 | 103 | done_with_contructors: 104 | call main 105 | ud2 106 | 107 | section .bss 108 | global kern_stack_end 109 | align PAGE_SIZE 110 | kern_stack: 111 | resb PAGE_SIZE 112 | kern_stack_end: 113 | 114 | ptab_pml4: 115 | resb PAGE_SIZE 116 | ptab_pdpt: 117 | resb PAGE_SIZE 118 | ptab_pd: 119 | resb PAGE_SIZE 120 | -------------------------------------------------------------------------------- /src/types.hpp: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | using uint8_t = unsigned char; 4 | using uint16_t = unsigned short; 5 | using uint32_t = unsigned; 6 | using uint64_t = unsigned long long; 7 | 8 | #ifdef __x86_64__ 9 | using size_t = unsigned long; 10 | #elif defined(__i386__) 11 | using size_t = unsigned int; 12 | #else 13 | # error Unknown platform 14 | #endif 15 | 16 | using uintptr_t = unsigned long; 17 | 18 | #define __packed __attribute__((packed)) 19 | 20 | inline bool likely(bool b) { return __builtin_expect(b, 1); } 21 | inline bool unlikely(bool b) { return __builtin_expect(b, 0); } 22 | 23 | template 24 | constexpr size_t array_size(T(&)[SIZE]) { return SIZE; } 25 | 26 | #define offsetof(type, member) __builtin_offsetof (type, member) 27 | 28 | inline void *operator new(size_t, void *p) { return p; } 29 | -------------------------------------------------------------------------------- /src/x86-instructions.hpp: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "types.hpp" 4 | 5 | // Wait forever. 6 | [[noreturn]] inline void cli_hlt() 7 | { 8 | while (true) 9 | asm volatile ("cli ; hlt"); 10 | } 11 | 12 | // Immediate 8-bit OUT operation 13 | template 14 | inline void outbi(uint8_t data) 15 | { 16 | static_assert(PORT >= 0 and PORT < 0x100, "Port is out of range"); 17 | asm volatile ("outb %%al, %0" :: "N" (PORT), "a" (data)); 18 | } 19 | 20 | inline void outl(uint16_t port, uint32_t value) 21 | { 22 | asm volatile ("outl %0, %1" :: "a" (value), "d" (port)); 23 | } 24 | 25 | inline uint32_t inl(uint16_t port) 26 | { 27 | uint32_t v; 28 | asm volatile ("inl %1, %0" : "=a" (v) : "d" (port)); 29 | return v; 30 | } 31 | 32 | inline uint64_t get_cr2() 33 | { 34 | uint64_t v; 35 | asm volatile ("mov %%cr2, %0" : "=r" (v)); 36 | return v; 37 | } 38 | 39 | inline void wrmsr(uint32_t sel, uint64_t val) 40 | { 41 | asm volatile ("wrmsr" 42 | : 43 | : "c" (sel), 44 | "a" ((uint32_t)val), 45 | "d" ((uint32_t)(val >> 32))); 46 | } 47 | 48 | inline uint64_t rdmsr(uint32_t sel) 49 | { 50 | uint32_t lo, hi; 51 | asm volatile ("rdmsr" : "=d" (hi), "=a" (lo) : "c" (sel)); 52 | return (uint64_t)hi << 32 | lo; 53 | } 54 | 55 | inline uint64_t rdtsc() 56 | { 57 | uint32_t lo, hi; 58 | asm volatile ("rdtsc" : "=d" (hi), "=a" (lo)); 59 | return (uint64_t)hi << 32 | lo; 60 | } 61 | 62 | inline void pause() 63 | { 64 | asm volatile ("pause"); 65 | } 66 | 67 | // FPU handling 68 | 69 | enum : uint64_t { 70 | XCR0_FPU = 1UL << 0, 71 | XCR0_SSE = 1UL << 1, 72 | XCR0_AVX = 1UL << 2, 73 | }; 74 | 75 | inline void set_xcr0(uint64_t v) 76 | { 77 | asm volatile ("xsetbv" :: "d" ((uint32_t)(v >> 32)), "a" ((uint32_t)v), "c" (0)); 78 | } 79 | 80 | inline uint64_t get_xcr0() 81 | { 82 | uint32_t lo, hi; 83 | asm volatile ("xgetbv" : "=d" (hi), "=a" (lo) : "c" (0)); 84 | return (uint64_t)hi << 32 | lo; 85 | } 86 | 87 | // CPUID 88 | 89 | struct cpuid_result { 90 | uint32_t eax; 91 | uint32_t ecx; 92 | uint32_t edx; 93 | uint32_t ebx; 94 | }; 95 | 96 | inline cpuid_result query_cpuid(uint32_t eax, uint32_t ecx = 0) 97 | { 98 | cpuid_result res; 99 | 100 | asm ("cpuid" 101 | : "=a" (res.eax), "=c" (res.ecx), "=d" (res.edx), "=b" (res.ebx) 102 | : "a" (eax), "c" (ecx)); 103 | 104 | return res; 105 | } 106 | 107 | inline bool is_vendor_intel(cpuid_result const &res) 108 | { 109 | return 110 | res.ebx == 0x756e6547 && 111 | res.ecx == 0x6c65746e && 112 | res.edx == 0x49656e69; 113 | } 114 | 115 | inline bool is_vendor_amd(cpuid_result const &res) 116 | { 117 | return 118 | res.ebx == 0x68747541 && 119 | res.ecx == 0x444d4163 && 120 | res.edx == 0x69746e65; 121 | } 122 | --------------------------------------------------------------------------------