├── ground
├── Makefile
├── esc32.h
├── esc32Cal.cc
├── loader.c
├── serial.c
├── serial.h
├── stmbootloader.c
└── stmbootloader.h
└── onboard
├── ESC32.hzp
├── Makefile
├── adc.c
├── adc.h
├── binary.c
├── binary.h
├── buildnum.h
├── can.c
├── can.h
├── cli.c
├── cli.h
├── config.c
├── config.h
├── core_cm3.h
├── digital.c
├── digital.h
├── esc32_motor_db.xml
├── fet.c
├── fet.h
├── getbuildnum.c
├── getbuildnum.h
├── incbuild.js
├── main.c
├── main.h
├── misc.c
├── misc.h
├── ow.c
├── ow.h
├── pwm.c
├── pwm.h
├── rcc.c
├── rcc.h
├── run.c
├── run.h
├── serial.c
├── serial.h
├── stm32f10x.h
├── stm32f10x_adc.c
├── stm32f10x_adc.h
├── stm32f10x_can.c
├── stm32f10x_can.h
├── stm32f10x_conf.h
├── stm32f10x_dbgmcu.c
├── stm32f10x_dbgmcu.h
├── stm32f10x_dma.c
├── stm32f10x_dma.h
├── stm32f10x_exti.c
├── stm32f10x_exti.h
├── stm32f10x_flash.c
├── stm32f10x_flash.h
├── stm32f10x_gpio.c
├── stm32f10x_gpio.h
├── stm32f10x_iwdg.c
├── stm32f10x_iwdg.h
├── stm32f10x_pwr.c
├── stm32f10x_pwr.h
├── stm32f10x_rcc.c
├── stm32f10x_rcc.h
├── stm32f10x_tim.c
├── stm32f10x_tim.h
├── stm32f10x_usart.c
├── stm32f10x_usart.h
├── system_stm32f10x.c
├── timer.c
├── timer.h
├── xxhash.c
└── xxhash.h
/ground/Makefile:
--------------------------------------------------------------------------------
1 | # This file is part of AutoQuad.
2 | #
3 | # AutoQuad is free software: you can redistribute it and/or modify
4 | # it under the terms of the GNU General Public License as published by
5 | # the Free Software Foundation, either version 3 of the License, or
6 | # (at your option) any later version.
7 | #
8 | # AutoQuad is distributed in the hope that it will be useful,
9 | # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 | # GNU General Public License for more details.
12 | # You should have received a copy of the GNU General Public License
13 | # along with AutoQuad. If not, see .
14 | #
15 | # Copyright © 2011, 2012 Bill Nesbitt
16 |
17 | CC = g++
18 | CFLAGS = -g -O3
19 | LDFLAGS =
20 |
21 | ALL_CFLAGS = $(CFLAGS)
22 |
23 | all: loader esc32Cal
24 |
25 | loader: loader.o serial.o stmbootloader.o
26 | $(CC) -o loader $(ALL_CFLAGS) loader.o serial.o stmbootloader.o
27 |
28 | esc32Cal: esc32Cal.o serial.o
29 | $(CC) -o esc32Cal $(ALL_CFLAGS) esc32Cal.o serial.o -L/opt/local/lib -lplplotd -lpthread
30 |
31 | loader.o: loader.c serial.h stmbootloader.h
32 | $(CC) -c $(ALL_CFLAGS) loader.c
33 |
34 | stmbootloader.o: stmbootloader.c stmbootloader.h serial.o
35 | $(CC) -c $(ALL_CFLAGS) stmbootloader.c
36 |
37 | serial.o: serial.c serial.h
38 | $(CC) -c $(ALL_CFLAGS) serial.c
39 |
40 | esc32Cal.o: esc32Cal.cc esc32.h
41 | $(CC) -c $(ALL_CFLAGS) esc32Cal.cc -I/opt/local/include -I/usr/local/include/eigen3
42 |
43 | clean:
44 | rm -f loader esc32Cal *.o
45 |
--------------------------------------------------------------------------------
/ground/esc32.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011-2014 Bill Nesbitt
17 | */
18 |
19 | #define DEFAULT_PORT "/dev/cu.usbserial-FTELPQ1S"
20 | #define DEFAULT_BAUD 230400
21 |
22 | enum binaryCommands {
23 | BINARY_COMMAND_NOP = 0,
24 | BINARY_COMMAND_ARM,
25 | BINARY_COMMAND_CLI,
26 | BINARY_COMMAND_CONFIG,
27 | BINARY_COMMAND_DISARM,
28 | BINARY_COMMAND_DUTY,
29 | BINARY_COMMAND_PWM,
30 | BINARY_COMMAND_RPM,
31 | BINARY_COMMAND_SET,
32 | BINARY_COMMAND_START,
33 | BINARY_COMMAND_STATUS,
34 | BINARY_COMMAND_STOP,
35 | BINARY_COMMAND_TELEM_RATE,
36 | BINARY_COMMAND_VERSION,
37 | BINARY_COMMAND_TELEM_VALUE,
38 | BINARY_COMMAND_GET_PARAM_ID,
39 | BINARY_COMMAND_ACK = 250,
40 | BINARY_COMMAND_NACK
41 | };
42 |
43 | enum binaryValues {
44 | BINARY_VALUE_NONE = 0,
45 | BINARY_VALUE_AMPS,
46 | BINARY_VALUE_VOLTS_BAT,
47 | BINARY_VALUE_VOLTS_MOTOR,
48 | BINARY_VALUE_RPM,
49 | BINARY_VALUE_DUTY,
50 | BINARY_VALUE_COMM_PERIOD,
51 | BINARY_VALUE_BAD_DETECTS,
52 | BINARY_VALUE_ADC_WINDOW,
53 | BINARY_VALUE_IDLE_PERCENT,
54 | BINARY_VALUE_STATE,
55 | BINARY_VALUE_AVGA,
56 | BINARY_VALUE_AVGB,
57 | BINARY_VALUE_AVGC,
58 | BINARY_VALUE_AVGCOMP,
59 | BINARY_VALUE_FETSTEP,
60 | BINARY_VALUE_NUM
61 | };
62 |
63 | enum configParameters {
64 | CONFIG_VERSION = 0,
65 | STARTUP_MODE,
66 | BAUD_RATE,
67 | PTERM,
68 | ITERM,
69 | FF1TERM,
70 | FF2TERM,
71 | CL1TERM,
72 | CL2TERM,
73 | CL3TERM,
74 | CL4TERM,
75 | CL5TERM,
76 | SHUNT_RESISTANCE,
77 | MIN_PERIOD,
78 | MAX_PERIOD,
79 | BLANKING_MICROS,
80 | ADVANCE,
81 | START_VOLTAGE,
82 | GOOD_DETECTS_START,
83 | BAD_DETECTS_DISARM,
84 | MAX_CURRENT,
85 | SWITCH_FREQ,
86 | MOTOR_POLES,
87 | PWM_MIN_PERIOD,
88 | PWM_MAX_PERIOD,
89 | PWM_MIN_VALUE,
90 | PWM_LO_VALUE,
91 | PWM_HI_VALUE,
92 | PWM_MAX_VALUE,
93 | PWM_MIN_START,
94 | PWM_RPM_SCALE,
95 | FET_BRAKING,
96 | PNFAC,
97 | INFAC,
98 | THR1TERM,
99 | THR2TERM,
100 | START_ALIGN_TIME,
101 | START_ALIGN_VOLTAGE,
102 | START_STEPS_NUM,
103 | START_STEPS_PERIOD,
104 | START_STEPS_ACCEL,
105 | PWM_LOWPASS,
106 | RPM_MEAS_LP,
107 | SERVO_DUTY,
108 | SERVO_P,
109 | SERVO_D,
110 | SERVO_MAX_RATE,
111 | SERVO_SCALE,
112 | ESC_ID,
113 | DIRECTION,
114 | CONFIG_NUM_PARAMS
115 | };
116 |
--------------------------------------------------------------------------------
/ground/loader.c:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad.
3 |
4 | AutoQuad is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad. If not, see .
15 |
16 | Copyright © 2011, 2012 Bill Nesbitt
17 | */
18 |
19 | #include "serial.h"
20 | #include "stmbootloader.h"
21 | #include
22 | #include
23 | #include
24 | #include
25 | #include
26 | #include
27 | #include
28 |
29 | #define DEFAULT_PORT "/dev/ttyUSB0"
30 | #define DEFAULT_BAUD 115200
31 | #define FIRMWARE_FILENAME "STM32.hex"
32 |
33 | serialStruct_t *s;
34 |
35 | char port[256];
36 | unsigned int baud;
37 | unsigned char overrideParity;
38 | unsigned char cont;
39 | char firmFile[256];
40 |
41 | void loaderUsage(void) {
42 | fprintf(stderr, "usage: loader <-h> <-p device_file> <-b baud_rate> <-f firmware_file> <-o>\n");
43 | }
44 |
45 | unsigned int loaderOptions(int argc, char **argv) {
46 | int ch;
47 |
48 | strncpy(port, DEFAULT_PORT, sizeof(port));
49 | baud = DEFAULT_BAUD;
50 | overrideParity = 0;
51 | strncpy(firmFile, FIRMWARE_FILENAME, sizeof(firmFile));
52 |
53 | /* options descriptor */
54 | static struct option longopts[] = {
55 | { "help", required_argument, NULL, 'h' },
56 | { "port", required_argument, NULL, 'p' },
57 | { "baud", required_argument, NULL, 's' },
58 | { "firm_file", required_argument, NULL, 'f' },
59 | { "cont", no_argument, NULL, 'c' },
60 | { "overide_party",no_argument, NULL, 'o' },
61 | { NULL, 0, NULL, 0 }
62 | };
63 |
64 | while ((ch = getopt_long(argc, argv, "hp:b:f:co", longopts, NULL)) != -1)
65 | switch (ch) {
66 | case 'h':
67 | loaderUsage();
68 | exit(0);
69 | break;
70 | case 'p':
71 | strncpy(port, optarg, sizeof(port));
72 | break;
73 | case 'b':
74 | baud = atoi(optarg);
75 | break;
76 | case 'f':
77 | strncpy(firmFile, optarg, sizeof(firmFile));
78 | break;
79 | case 'c':
80 | cont = 1;
81 | break;
82 | case 'o':
83 | overrideParity = 1;
84 | break;
85 | default:
86 | loaderUsage();
87 | return 0;
88 | }
89 | argc -= optind;
90 | argv += optind;
91 |
92 | return 1;
93 | }
94 |
95 | int main(int argc, char **argv) {
96 | FILE *fw;
97 |
98 | // init
99 | if (!loaderOptions(argc, argv)) {
100 | fprintf(stderr, "Init failed, aborting\n");
101 | return 0;
102 | }
103 |
104 | if ((s = initSerial(port, baud, 0)) == 0) {
105 | printf("Cannot open port '%s', aborting.\n", port);
106 | return 0;
107 | }
108 |
109 | fw = fopen(firmFile, "r");
110 | if (!fw) {
111 | printf("Cannot open firmware file '%s', aborting.\n", firmFile);
112 | return 0;
113 | }
114 | else {
115 | printf("Upgrading STM on port %s from %s...\n", port, firmFile);
116 | stmLoader(s, fw, overrideParity, cont);
117 | }
118 |
119 | return 1;
120 | }
121 |
--------------------------------------------------------------------------------
/ground/serial.c:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad.
3 |
4 | AutoQuad is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad. If not, see .
15 |
16 | Copyright © 2011, 2012 Bill Nesbitt
17 | */
18 |
19 | #ifndef _GNU_SOURCE
20 | #define _GNU_SOURCE
21 | #endif
22 |
23 | #include "serial.h"
24 | #include
25 | #include
26 | #include
27 | #include
28 | #include
29 | #include
30 | #include
31 |
32 | serialStruct_t *initSerial(const char *port, unsigned int baud, char ctsRts) {
33 | serialStruct_t *s;
34 | struct termios options;
35 | unsigned int brate;
36 |
37 | s = (serialStruct_t *)calloc(1, sizeof(serialStruct_t));
38 |
39 | s->fd = open(port, O_RDWR | O_NOCTTY | O_NDELAY);
40 |
41 | if (s->fd == -1) {
42 | free(s);
43 | return 0;
44 | }
45 |
46 | fcntl(s->fd, F_SETFL, 0); // clear all flags on descriptor, enable direct I/O
47 |
48 | // bzero(&options, sizeof(options));
49 | // memset(&options, 0, sizeof(options));
50 | tcgetattr(s->fd, &options);
51 |
52 | #ifdef B921600
53 | switch (baud) {
54 | case 9600:
55 | brate = B9600;
56 | break;
57 | case 19200:
58 | brate = B19200;
59 | break;
60 | case 38400:
61 | brate = B38400;
62 | break;
63 | case 57600:
64 | brate = B57600;
65 | break;
66 | case 115200:
67 | brate = B115200;
68 | break;
69 | case 230400:
70 | brate = B230400;
71 | break;
72 | case 460800:
73 | brate = B460800;
74 | break;
75 | case 921600:
76 | brate = B921600;
77 | break;
78 | default:
79 | brate = B115200;
80 | break;
81 | }
82 | options.c_cflag = brate;
83 | #else // APPLE
84 | cfsetispeed(&options, baud);
85 | cfsetospeed(&options, baud);
86 | #endif
87 |
88 | options.c_cflag |= CRTSCTS | CS8 | CLOCAL | CREAD;
89 | options.c_iflag = IGNPAR;
90 | options.c_iflag &= (~(IXON|IXOFF|IXANY)); // turn off software flow control
91 | options.c_oflag = 0;
92 |
93 | /* set input mode (non-canonical, no echo,...) */
94 | options.c_lflag = 0;
95 |
96 | options.c_cc[VTIME] = 0; /* inter-character timer unused */
97 | options.c_cc[VMIN] = 1; /* blocking read until 1 chars received */
98 |
99 | #ifdef CCTS_OFLOW
100 | options.c_cflag |= CCTS_OFLOW;
101 | #endif
102 |
103 | if (!ctsRts)
104 | options.c_cflag &= ~(CRTSCTS); // turn off hardware flow control
105 |
106 | // set the new port options
107 | tcsetattr(s->fd, TCSANOW, &options);
108 |
109 | return s;
110 | }
111 |
112 | void serialFree(serialStruct_t *s) {
113 | if (s) {
114 | if (s->fd)
115 | close(s->fd);
116 | free (s);
117 | }
118 | }
119 |
120 | void serialNoParity(serialStruct_t *s) {
121 | struct termios options;
122 |
123 | tcgetattr(s->fd, &options); // read serial port options
124 |
125 | options.c_cflag &= ~(PARENB | CSTOPB);
126 |
127 | tcsetattr(s->fd, TCSANOW, &options);
128 | }
129 |
130 | void serialEvenParity(serialStruct_t *s) {
131 | struct termios options;
132 |
133 | tcgetattr(s->fd, &options); // read serial port options
134 |
135 | options.c_cflag |= (PARENB);
136 | options.c_cflag &= ~(PARODD | CSTOPB);
137 |
138 | tcsetattr(s->fd, TCSANOW, &options);
139 | }
140 |
141 | void serialWriteChar(serialStruct_t *s, unsigned char c) {
142 | char ret;
143 |
144 | ret = write(s->fd, &c, 1);
145 | }
146 |
147 | void serialWrite(serialStruct_t *s, char *str, unsigned int len) {
148 | char ret;
149 |
150 | ret = write(s->fd, str, len);
151 | }
152 |
153 | void serialPrint(serialStruct_t *s, char *str) {
154 | serialWrite(s, str, strlen(str));
155 | }
156 |
157 | unsigned char serialAvailable(serialStruct_t *s) {
158 | fd_set fdSet;
159 | struct timeval timeout;
160 |
161 | FD_ZERO(&fdSet);
162 | FD_SET(s->fd, &fdSet);
163 | memset((char *)&timeout, 0, sizeof(timeout));
164 |
165 | if (select(s->fd+1, &fdSet, 0, 0, &timeout) == 1)
166 | return 1;
167 | else
168 | return 0;
169 | }
170 |
171 | void serialFlush(serialStruct_t *s) {
172 | while (serialAvailable(s))
173 | serialRead(s);
174 | }
175 |
176 | unsigned char serialRead(serialStruct_t *s) {
177 | char ret;
178 | unsigned char c;
179 |
180 | ret = read(s->fd, &c, 1);
181 |
182 | return c;
183 | }
184 |
--------------------------------------------------------------------------------
/ground/serial.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad.
3 |
4 | AutoQuad is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad. If not, see .
15 |
16 | Copyright © 2011, 2012 Bill Nesbitt
17 | */
18 |
19 | #ifndef _serial_h
20 | #define _serial_h
21 |
22 | #define INPUT_BUFFER_SIZE 1024
23 |
24 | typedef struct {
25 | int fd;
26 | } serialStruct_t;
27 |
28 | #ifdef __cplusplus
29 | extern "C" {
30 | #endif
31 |
32 | extern serialStruct_t *initSerial(const char *port, unsigned int baud, char ctsRts);
33 | extern void serialWriteChar(serialStruct_t *s, unsigned char c);
34 | extern void serialWrite(serialStruct_t *s, char *str, unsigned int len);
35 | extern void serialPrint(serialStruct_t *s, char *str);
36 | extern unsigned char serialAvailable(serialStruct_t *s);
37 | extern void serialFlush(serialStruct_t *s);
38 | extern unsigned char serialRead(serialStruct_t *s);
39 | extern void serialEvenParity(serialStruct_t *s);
40 | extern void serialNoParity(serialStruct_t *s);
41 | extern void serialFree(serialStruct_t *s);
42 |
43 | #ifdef __cplusplus
44 | }
45 | #endif
46 |
47 | #endif
48 |
--------------------------------------------------------------------------------
/ground/stmbootloader.c:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad.
3 |
4 | AutoQuad is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad. If not, see .
15 |
16 | Copyright © 2011, 2012 Bill Nesbitt
17 | */
18 |
19 | #ifndef _GNU_SOURCE
20 | #define _GNU_SOURCE
21 | #endif
22 |
23 | #include "serial.h"
24 | #include
25 | #include
26 | #include
27 | #include
28 |
29 | #define STM_RETRIES_SHORT 1000
30 | #define STM_RETRIES_LONG 5000
31 |
32 | unsigned char getResults[11];
33 |
34 | unsigned char stmHexToChar(const char *hex) {
35 | char hex1, hex2;
36 | unsigned char nibble1, nibble2;
37 |
38 | // force data to upper case
39 | hex1 = toupper(hex[0]);
40 | hex2 = toupper(hex[1]);
41 |
42 | nibble1 = hex1 - ((hex1 < 65) ? 48 : 55);
43 | nibble2 = hex2 - ((hex2 < 65) ? 48 : 55);
44 |
45 | return (nibble1 << 4 | nibble2);
46 | }
47 |
48 |
49 | unsigned char stmWaitAck(serialStruct_t *s, int retries) {
50 | unsigned char c;
51 | unsigned int i;
52 |
53 | for (i = 0; i < retries; i++) {
54 | if (serialAvailable(s)) {
55 | c = serialRead(s);
56 | if (c == 0x79) {
57 | // putchar('+'); fflush(stdout);
58 | return 1;
59 | }
60 | if (c == 0x1f) {
61 | putchar('-'); fflush(stdout);
62 | return 0;
63 | }
64 | else {
65 | printf("?%02x?", c); fflush(stdout);
66 | return 0;
67 | }
68 | }
69 | usleep(1000);
70 | }
71 |
72 | return 0;
73 | }
74 |
75 | unsigned char stmWriteString(serialStruct_t *s, const char *hex) {
76 | unsigned char c;
77 | unsigned char ck;
78 | unsigned char i;
79 |
80 | ck = 0;
81 | i = 0;
82 | while (*hex) {
83 | c = stmHexToChar(hex);
84 | serialWrite(s, (char *)&c, 1);
85 | ck ^= c;
86 | hex += 2;
87 | i++;
88 | }
89 | if (i == 1)
90 | ck = 0xff ^ c;
91 |
92 | // send checksum
93 | serialWrite(s, (char *)&ck, 1);
94 |
95 | return stmWaitAck(s, STM_RETRIES_LONG);
96 | }
97 |
98 | int stmWriteLen(serialStruct_t *s, char *data, int len, unsigned char ck) {
99 | unsigned char c;
100 | int i;
101 |
102 | for (i = 0; i < len; i++) {
103 | c = data[i];
104 | ck ^= c;
105 | serialWrite(s, (char *)&c, 1);
106 | }
107 | serialWrite(s, (char *)&ck, 1);
108 |
109 | return stmWaitAck(s, STM_RETRIES_LONG);
110 | }
111 |
112 | void stmSendData(serialStruct_t *s, unsigned int addr, char *buf, int len) {
113 | unsigned char c;
114 | unsigned char ck;
115 | unsigned char a[4];
116 |
117 | printf("Writing address %x for %d bytes\n", addr, len);
118 |
119 | sendRetry:
120 |
121 | do {
122 | c = getResults[5];
123 | serialWrite(s, (char *)&c, 1);
124 | c = 0xff ^ c;
125 | serialWrite(s, (char *)&c, 1);
126 | } while (!stmWaitAck(s, STM_RETRIES_LONG));
127 |
128 | // send address
129 | // reverse byte order
130 | a[0] = *(((unsigned char *)&addr)+3);
131 | a[1] = *(((unsigned char *)&addr)+2);
132 | a[2] = *(((unsigned char *)&addr)+1);
133 | a[3] = *(((unsigned char *)&addr)+0);
134 | if (!stmWriteLen(s, (char *)&a, 4, 0)) {
135 | printf("Address error\n");
136 | goto sendRetry;
137 | }
138 |
139 | // send len
140 | ck = 0;
141 | c = len - 1;
142 | serialWrite(s, (char *)&c, 1);
143 | ck ^= c;
144 |
145 | // send data
146 | if (!stmWriteLen(s, buf, len, ck)) {
147 | printf("Data error\n");
148 | goto sendRetry;
149 | }
150 | }
151 |
152 | void stmWriteBuffer(serialStruct_t *s, char *msb, char *lsb, char *len, char *data) {
153 | static unsigned char buf[256];
154 | static unsigned int startAddr = 0;
155 | static unsigned int length = 0;
156 | unsigned int newAddr;
157 | int offset;
158 | int n;
159 | int i;
160 |
161 | // flush if called with 0 address
162 | if (msb == 0 && lsb == 0 && startAddr) {
163 | stmSendData(s, startAddr, (char *)buf, length);
164 | startAddr = 0;
165 | length = 0;
166 | return;
167 | }
168 |
169 | n = stmHexToChar(len);
170 |
171 | newAddr = stmHexToChar(&msb[0])<<24 | stmHexToChar(&msb[2])<<16 | stmHexToChar(&lsb[0])<<8 | stmHexToChar(&lsb[2]);
172 |
173 | // is this new data within our current block?
174 | if (newAddr != (startAddr+length) || (newAddr+n) > (startAddr+256)) {
175 | // flush
176 | if (startAddr)
177 | stmSendData(s, startAddr, (char *)buf, length);
178 |
179 | // clear buffer
180 | memset(buf, 0xff, 256);
181 |
182 | startAddr = newAddr;
183 | length = 0;
184 | }
185 |
186 | offset = newAddr - startAddr;
187 |
188 | for (i = 0; i < n; i++)
189 | buf[offset+i] = stmHexToChar(&data[i*2]);
190 |
191 | length = offset + n;
192 | }
193 |
194 | // interpret Intel Hex file
195 | char *stmHexLoader(serialStruct_t *s, FILE *fp) {
196 | char hexByteCount[3], hexAddressLSB[5], hexRecordType[3], hexData[128];
197 | char addressMSB[5];
198 | static char addressJump[9];
199 |
200 | memset(addressJump, 0, sizeof(addressJump));
201 | memset(addressMSB, 0, sizeof(addressMSB));
202 |
203 | while (fscanf(fp, ":%2s%4s%2s%s\n", hexByteCount, hexAddressLSB, hexRecordType, hexData) != EOF) {
204 | unsigned int byteCount, addressLSB, recordType;
205 |
206 | recordType = stmHexToChar(hexRecordType);
207 | hexData[stmHexToChar(hexByteCount) * 2] = 0; // terminate at CHKSUM
208 |
209 | switch (recordType) {
210 | case 0x00:
211 | stmWriteBuffer(s, addressMSB, hexAddressLSB, hexByteCount, hexData);
212 | break;
213 | case 0x01:
214 | // EOF
215 | return addressJump;
216 | break;
217 | case 0x04:
218 | // MSB of destination 32 bit address
219 | strncpy(addressMSB, hexData, 4);
220 | break;
221 | case 0x05:
222 | // flush
223 | stmWriteBuffer(s, 0, 0, 0, 0);
224 | // 32 bit address to run after load
225 | strncpy(addressJump, hexData, 8);
226 | break;
227 | }
228 | }
229 |
230 | // flush
231 | stmWriteBuffer(s, 0, 0, 0, 0);
232 |
233 | return 0;
234 | }
235 |
236 | void stmLoader(serialStruct_t *s, FILE *fp, unsigned char overrideParity, unsigned char cont) {
237 | char c;
238 | unsigned char b1, b2, b3;
239 | unsigned char i, n;
240 | char *jumpAddress;
241 |
242 | // turn on parity generation
243 | if (!overrideParity)
244 | serialEvenParity(s);
245 |
246 | top:
247 |
248 | // only if not continuing previous session
249 | if (!cont) {
250 | printf("Place STM in bootloader mode and press any key >");
251 | getchar();
252 | printf("\n");
253 |
254 | serialFlush(s);
255 |
256 | // poke the MCU
257 | do {
258 | printf("p"); fflush(stdout);
259 | c = 0x7f;
260 | serialWrite(s, &c, 1);
261 | } while (!stmWaitAck(s, STM_RETRIES_SHORT));
262 | printf("STM bootloader alive...\n");
263 | }
264 |
265 | // send GET command
266 | do {
267 | c = 0x00;
268 | serialWrite(s, &c, 1);
269 | c = 0xff;
270 | serialWrite(s, &c, 1);
271 | } while (!stmWaitAck(s, STM_RETRIES_LONG));
272 |
273 | b1 = serialRead(s); // number of bytes
274 | b2 = serialRead(s); // bootloader version
275 | printf("STM Bootloader version: %d.%d\n", (b2 & 0xf0) >> 4, (b2 & 0x0f));
276 |
277 | printf("Getting %d commands.\n", b1);
278 | for (i = 0; i < b1; i++)
279 | getResults[i] = serialRead(s);
280 |
281 | stmWaitAck(s, STM_RETRIES_LONG);
282 | printf("Commands received.\n");
283 |
284 | // send GET ID command
285 | printf("Getting ID\n");
286 | do {
287 | c = getResults[2];
288 | serialWrite(s, &c, 1);
289 | c = 0xff ^ c;
290 | serialWrite(s, &c, 1);
291 | } while (!stmWaitAck(s, STM_RETRIES_LONG));
292 |
293 | n = serialRead(s);
294 | printf("STM Device ID: 0x");
295 | for (i = 0; i <= n; i++)
296 | printf("%02x", serialRead(s));
297 | stmWaitAck(s, STM_RETRIES_LONG);
298 | printf("\n");
299 |
300 | /*
301 | // Enable ROP
302 | printf("Sending enable ROP\n");
303 | c = getResults[9];
304 | serialWrite(s, &c, 1);
305 | c = 0xff ^ c;
306 | serialWrite(s, &c, 1);
307 |
308 | if (!stmWaitAck(s, STM_RETRIES_LONG))
309 | printf("ROP already active\n");
310 | else if (!stmWaitAck(s, STM_RETRIES_LONG))
311 | printf("Enable ROP failed\n");
312 | else
313 | goto top;
314 | */
315 |
316 | flash_size:
317 |
318 | // read Flash size
319 | c = getResults[3];
320 | serialWrite(s, &c, 1);
321 | c = 0xff ^ c;
322 | serialWrite(s, &c, 1);
323 |
324 | // if read not allowed, unprotect (which also erases)
325 | if (!stmWaitAck(s, STM_RETRIES_LONG)) {
326 | printf("ROP unprotect\n");
327 |
328 | // unprotect command
329 | c = getResults[10];
330 | serialWrite(s, &c, 1);
331 | c = 0xff ^ c;
332 | serialWrite(s, &c, 1);
333 | stmWaitAck(s, STM_RETRIES_LONG);
334 |
335 | // wait for results
336 | if (stmWaitAck(s, STM_RETRIES_LONG))
337 | goto top;
338 | }
339 |
340 | // send address
341 | if (!stmWriteString(s, "1FFFF7E0"))
342 | goto flash_size;
343 |
344 | // send # bytes (N-1 = 1)
345 | if (!stmWriteString(s, "01"))
346 | goto flash_size;
347 |
348 | b1 = serialRead(s);
349 | b2 = serialRead(s);
350 | printf("STM Flash Size: %dKB\n", b2<<8 | b1);
351 |
352 | // erase flash
353 | erase_flash:
354 | printf("Global flash erase [command 0x%x]...", getResults[6]); fflush(stdout);
355 | do {
356 | c = getResults[6];
357 | serialWrite(s, &c, 1);
358 | c = 0xff ^ c;
359 | serialWrite(s, &c, 1);
360 | } while (!stmWaitAck(s, STM_RETRIES_LONG));
361 |
362 | // global erase
363 | if (getResults[6] == 0x44) {
364 | // mass erase
365 | if (!stmWriteString(s, "FFFF"))
366 | goto erase_flash;
367 | }
368 | else {
369 | c = 0xff;
370 | serialWrite(s, &c, 1);
371 | c = 0x00;
372 | serialWrite(s, &c, 1);
373 |
374 | if (!stmWaitAck(s, STM_RETRIES_LONG))
375 | goto erase_flash;
376 | }
377 |
378 | printf("Done.\n");
379 |
380 | // upload hex file
381 | printf("Flashing device...\n");
382 | jumpAddress = stmHexLoader(s, fp);
383 | if (jumpAddress) {
384 | printf("\nFlash complete, restarting.\n");
385 |
386 | go:
387 | // send GO command
388 | do {
389 | c = getResults[4];
390 | serialWrite(s, &c, 1);
391 | c = 0xff ^ c;
392 | serialWrite(s, &c, 1);
393 | } while (!stmWaitAck(s, STM_RETRIES_LONG));
394 |
395 | // send address
396 | if (!stmWriteString(s, jumpAddress))
397 | goto go;
398 | }
399 | else {
400 | printf("\nFlash complete.\n");
401 | }
402 | }
403 |
--------------------------------------------------------------------------------
/ground/stmbootloader.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad.
3 |
4 | AutoQuad is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad. If not, see .
15 |
16 | Copyright © 2011, 2012 Bill Nesbitt
17 | */
18 |
19 | #ifndef _stmbootloader_h
20 | #define _stmbootloader_h
21 |
22 | #include
23 | #include "serial.h"
24 |
25 | extern void stmLoader(serialStruct_t *s, FILE *fp, unsigned char overrideParity, unsigned char cont);
26 |
27 | #endif
28 |
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/onboard/ESC32.hzp:
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/onboard/Makefile:
--------------------------------------------------------------------------------
1 | # Makefile for ESC32 firmware
2 | #
3 | # ! Use of this makefile requires setup of a compatible development environment.
4 | # ! For latest development recommendations, check here: http://autoquad.org/wiki/wiki/development/
5 | # ! This file is ignored when building with CrossWorks Studio.
6 | #
7 | # All paths are relative to Makefile location. Possible make targets:
8 | # all build firmware .elf and .hex binaries
9 | # flash attempt to build ../ground/loader and flash firmware to board (linux only)
10 | # pack create .zip archive of generated .hex file (requires GNU zip)
11 | # clean delete all built objects (not binaries or archives)
12 | # clean-bin delete all binaries created in build folder (*.elf, *.bin, *.hex)
13 | # clean-pack delete all archives in build folder (*.zip)
14 | # clean-all run all the above clean* steps.
15 | #
16 | # Read comments below under "External libraries required by ESC32" for dependency details.
17 | #
18 | # Build from inside an svn repo folder because 'svnversion' command is used to retrieve the latest revision number.
19 | #
20 | # Usage examples:
21 | # make all # default Release type builds .hex and .elf binaries
22 | # make all BUILD_TYPE=Debug # build with compiler debugging flags/options enabled
23 | # make all BUILD_TYPE=test INCR_BUILDNUM=0 # build a release version in a folder named "test", don't increment the buildnumber
24 | #
25 | # Windows needs some core GNU tools in your %PATH% (probably same place your "make" is).
26 | # Required: gawk, mv, echo, rm
27 | # Optional: mkdir (auto-create build folders), zip (to compress hex files using make pack)
28 | # Also see EXE_MKDIR variable below -- due to a naming conflict with the Windows "mkdir", you may need to specify a full path for it.
29 | # Recommend GnuWin32 CoreUtils http://gnuwin32.sourceforge.net/packages/coreutils.htm
30 | #
31 |
32 | # Include user-specific settings file, if any, in regular Makefile format.
33 | # This file can set any default variable values you wish to override (all defaults are listed below).
34 | # The .user file is not included with the source code distribution, so it will not be overwritten.
35 | -include Makefile.user
36 |
37 | # Defaults - modify here, on command line, or in Makefile.user
38 | #
39 | # Output folder name; Use 'Debug' to set debug compiler options;
40 | BUILD_TYPE ?= Release
41 | # Path to source files - no trailing slash
42 | SRC_PATH ?= .
43 | # Increment build number? (0|1) This is automatically disabled for debug builds.
44 | INCR_BUILDNUM ?= 1
45 | # Produced binaries file name prefix (version/revision/build/hardware info will be automatically appended)
46 | BIN_NAME ?= esc32
47 | # Build debug version? (0|1; true by default if build_type contains the word "debug")
48 | ifeq ($(findstring Debug, $(BUILD_TYPE)), Debug)
49 | DEBUG_BUILD ?= 1
50 | else
51 | DEBUG_BUILD ?= 0
52 | endif
53 | # Flashing interface (Linux only)
54 | USB_DEVICE ?= /dev/ttyUSB0
55 |
56 | # You may also use BIN_SUFFIX to append text
57 | # to generated bin file name after version string;
58 | # BIN_SUFFIX =
59 |
60 |
61 | # System-specific folder paths
62 | #
63 | # compiler base path
64 | CC_PATH ?= /usr/share/crossworks_for_arm_2.3
65 | #CC_PATH ?= C:/devel/gcc/crossworks_for_arm_2.3
66 |
67 | # shell commands
68 | EXE_AWK ?= gawk
69 | EXE_MKDIR ?= mkdir
70 | #EXE_MKDIR = C:/cygwin/bin/mkdir
71 | EXE_ZIP ?= zip
72 | # file extention for compressed files (gz for gzip, etc)
73 | ZIP_EXT ?= zip
74 |
75 | # Path to stm32 includes
76 | AQLIB_PATH ?= ..
77 | #AQLIB_PATH = C:/devel/AQ/lib
78 |
79 | # Where to put the built objects and binaries.
80 | # A sub-folder is created along this path, named as the BUILD_TYPE.
81 | #BUILD_PATH ?= .
82 | BUILD_PATH ?= ../build
83 |
84 | # Add preprocessor definitions here
85 | CC_VARS ?=
86 |
87 |
88 | # defaults end
89 |
90 | #
91 | ## probably don't need to change anything below here ##
92 | #
93 |
94 | # build/object directory
95 | OBJ_PATH = $(BUILD_PATH)/$(BUILD_TYPE)/obj
96 | # bin file(s) output path
97 | BIN_PATH = $(BUILD_PATH)/$(BUILD_TYPE)
98 |
99 | # command to execute (later, if necessary) for increasing build number in buildnum.h
100 | CMD_BUILDNUMBER = $(shell $(EXE_AWK) '$$2 ~ /BUILDNUMBER/{ $$NF=$$NF+1 } 1' $(SRC_PATH)/buildnum.h > $(SRC_PATH)/tmp_buildnum.h && mv $(SRC_PATH)/tmp_buildnum.h $(SRC_PATH)/buildnum.h)
101 |
102 | # get current revision and build numbers
103 | FW_VER := $(shell $(EXE_AWK) 'BEGIN { FS = "[ \"]+" }$$2 ~ /VERSION/{print $$3}' $(SRC_PATH)/main.h)
104 | REV_NUM := $(shell svnversion)
105 | BUILD_NUM := $(shell $(EXE_AWK) '$$2 ~ /BUILDNUMBER/{print $$NF}' $(SRC_PATH)/buildnum.h)
106 | ifeq ($(INCR_BUILDNUM), 1)
107 | BUILD_NUM := $(shell echo $$[$(BUILD_NUM)+1])
108 | endif
109 |
110 | # Resulting bin file names before extension
111 | ifeq ($(DEBUG_BUILD), 1)
112 | # debug build gets a consistent name to simplify dev setup
113 | BIN_NAME := $(BIN_NAME)-debug
114 | INCR_BUILDNUM = 0
115 | else
116 | BIN_NAME := $(BIN_NAME)v$(FW_VER).r$(REV_NUM).b$(BUILD_NUM)
117 | ifdef BIN_SUFFIX
118 | BIN_NAME := $(BIN_NAME)-$(BIN_SUFFIX)
119 | endif
120 | endif
121 |
122 | # Compiler-specific paths
123 | CC_BIN_PATH = $(CC_PATH)/gcc/arm-unknown-elf/bin
124 | CC_LIB_PATH = $(CC_PATH)/lib
125 | CC_INC_PATH = $(CC_PATH)/include
126 | CC = $(CC_BIN_PATH)/cc1
127 | AS = $(CC_BIN_PATH)/as
128 | LD = $(CC_BIN_PATH)/ld
129 | OBJCP = $(CC_BIN_PATH)/objcopy
130 |
131 | #
132 | ## External libraries required by ESC32
133 | #
134 | # Files from Crossworks SMT32 package: esc32.ld (renamed from STM32f4.ld), STM32F10X_MD.vec, STM32_Startup.s, thumb_crt0.s, & the /include folder
135 | STMLIB_PATH = $(AQLIB_PATH)/STM32
136 |
137 | # all include flags for the compiler
138 | CC_INCLUDES := -I$(SRC_PATH) -I$(STMLIB_PATH)/include -I$(CC_INC_PATH)
139 |
140 | # compiler flags
141 | CC_OPTS = -mcpu=cortex-m3 -mthumb -mlittle-endian -mfpu=vfp -mfloat-abi=soft -nostdinc -Wall -std=c99 \
142 | -fno-dwarf2-cfi-asm -fno-builtin -ffunction-sections -fdata-sections -fno-common -fmessage-length=0 -quiet -MD $(basename $@).d -MQ $@
143 |
144 | # macro definitions to pass via compiler command line
145 | #
146 | CC_VARS += -D__CROSSWORKS_ARM -D__ARM_ARCH_7M__ -D__TARGET_PROCESSOR=STM32F103CB -D__TARGET_MD= -DSTM32F10X_MD= -D__THUMB -DUSE_STDPERIPH_DRIVER
147 |
148 |
149 | # Additional target(s) to build based on conditionals
150 | #
151 | EXTRA_TARGETS =
152 | ifeq ($(INCR_BUILDNUM), 1)
153 | EXTRA_TARGETS = BUILDNUMBER
154 | endif
155 |
156 | # build type flags/defs (debug vs. release)
157 | # (exclude STARTUP_FROM_RESET in debug builds if using Rowley debugger)
158 | ifeq ($(DEBUG_BUILD), 1)
159 | BT_CFLAGS = -DDEBUG -DSTARTUP_FROM_RESET -DUSE_FULL_ASSERT -O1 -ggdb -g2
160 | else
161 | BT_CFLAGS = -DNDEBUG -DSTARTUP_FROM_RESET -g1 -O2
162 | endif
163 |
164 |
165 | # all compiler options
166 | CFLAGS = $(CC_OPTS) $(CC_INCLUDES) $(CC_VARS) $(BT_CFLAGS)
167 |
168 | # assembler options
169 | AS_OPTS = --traditional-format -mcpu=cortex-m3 -mthumb -EL -mfpu=vfp -mfloat-abi=soft
170 |
171 | # linker (ld) options
172 | LINKER_OPTS = -ereset_handler --omagic -defsym=__do_debug_operation=__do_debug_operation_mempoll -u__do_debug_operation_mempoll -defsym=__vfprintf=__vfprintf_double_long_long -u__vfprintf_double_long_long \
173 | -defsym=__vfscanf=__vfscanf_double_long_long -u__vfscanf_double_long_long --fatal-warnings -EL --gc-sections -T$(STMLIB_PATH)/ESC32.ld -Map $(OBJ_PATH)/ESC32.map -u_vectors
174 |
175 | # eabi linker libs
176 | # ! These are proprietary Rowley libraries, approved for personal use with the AQ project (see http://forum.autoquad.org/viewtopic.php?f=31&t=44&start=50#p8476 )
177 | EXTRA_LIB_FILES = libcm_v7m_t_le.a libm_v7m_t_le.a libc_v7m_t_le.a libcpp_v7m_t_le.a libdebugio_v7m_t_le.a libc_targetio_impl_v7m_t_le.a libc_user_libc_v7m_t_le.a
178 |
179 | EXTRA_LIBS := $(addprefix $(CC_LIB_PATH)/, $(EXTRA_LIB_FILES))
180 |
181 |
182 | # ESC32 code objects to create (correspond to .c source to compile)
183 | ESC32_OBJS := main.o fet.o digital.o rcc.o adc.o serial.o pwm.o timer.o run.o cli.o config.o binary.o ow.o can.o getbuildnum.o xxhash.o
184 |
185 | # STM32 related including preprocessor and startup
186 | STM32_SYS_OBJ_FILES = STM32_Startup.o thumb_crt0.o misc.o stm32f10x_gpio.o stm32f10x_rcc.o system_stm32f10x.o stm32f10x_tim.o stm32f10x_dbgmcu.o \
187 | stm32f10x_adc.o stm32f10x_dma.o stm32f10x_usart.o stm32f10x_exti.o stm32f10x_pwr.o stm32f10x_flash.o stm32f10x_iwdg.o stm32f10x_can.o
188 |
189 |
190 | ## assemble object lists
191 | STM32_SYS_OBJS := $(STM32_SYS_OBJ_FILES)
192 | STM32_OBJ_TARGET := $(OBJ_PATH)
193 |
194 | # all objects
195 | C_OBJECTS := $(addprefix $(OBJ_PATH)/, $(ESC32_OBJS) $(STM32_SYS_OBJS))
196 |
197 | # dependency files generated by previous make runs
198 | DEPS := $(C_OBJECTS:.o=.d)
199 |
200 |
201 | #
202 | ## Target definitions
203 | #
204 |
205 | .PHONY: all clean-all clean clean-bin clean-pack pack CREATE_BUILD_FOLDER BUILDNUMBER
206 |
207 | all: CREATE_BUILD_FOLDER $(EXTRA_TARGETS) $(BIN_PATH)/$(BIN_NAME).hex
208 |
209 | clean-all: clean clean-bin clean-pack
210 |
211 | clean:
212 | rm -fr $(OBJ_PATH)
213 |
214 | clean-bin:
215 | -rm -f $(BIN_PATH)/*.elf
216 | -rm -f $(BIN_PATH)/*.bin
217 | -rm -f $(BIN_PATH)/*.hex
218 |
219 | clean-pack:
220 | -rm -f $(BIN_PATH)/*.$(ZIP_EXT)
221 |
222 | pack:
223 | @echo "Compressing binaries... "
224 | $(EXE_ZIP) $(BIN_PATH)/$(BIN_NAME).hex.$(ZIP_EXT) $(BIN_PATH)/$(BIN_NAME).hex
225 |
226 | # include auto-generated depenency targets
227 | -include $(DEPS)
228 |
229 | $(OBJ_PATH)/%.o: $(SRC_PATH)/%.c
230 | @echo "## Compiling $< -> $@ ##"
231 | $(CC) $(CFLAGS) $< -o $(basename $@).lst
232 | @echo "## Assembling --> $@ ##"
233 | $(AS) $(AS_OPTS) $(basename $@).lst -o $@
234 | @rm -f $(basename $@).lst
235 |
236 | $(STM32_OBJ_TARGET)/STM32_Startup.o $(STM32_OBJ_TARGET)/thumb_crt0.o: $(STM32_OBJ_TARGET)/%.o: $(STMLIB_PATH)/%.s
237 | @echo "## Compiling $< -> $@ ##"
238 | $(CC) $(CFLAGS) -E -lang-asm $< -o $(basename $@).lst
239 | @echo "## Assembling --> $@ ##"
240 | $(AS) $(AS_OPTS) -gdwarf-2 $(basename $@).lst -o $@
241 | @rm -f $(basename $@).lst
242 |
243 | $(BIN_PATH)/$(BIN_NAME).elf: $(C_OBJECTS)
244 | @echo "## Linking --> $@ ##"
245 | $(LD) -X $(LINKER_OPTS) -o $@ --start-group $(C_OBJECTS) $(EXTRA_LIBS) --end-group
246 |
247 | $(BIN_PATH)/$(BIN_NAME).bin: $(BIN_PATH)/$(BIN_NAME).elf
248 | @echo "## Objcopy $< --> $@ ##"
249 | $(OBJCP) -O binary $< $@
250 |
251 | $(BIN_PATH)/$(BIN_NAME).hex: $(BIN_PATH)/$(BIN_NAME).elf
252 | @echo "## Objcopy $< --> $@ ##"
253 | $(OBJCP) -O ihex $< $@
254 |
255 | CREATE_BUILD_FOLDER :
256 | @echo "Attempting to create build folders..."
257 | $(EXE_MKDIR) -p $(OBJ_PATH)
258 |
259 | BUILDNUMBER :
260 | @echo "Incrementing Build Number"
261 | $(CMD_BUILDNUMBER)
262 |
263 | ## Flash-Loader (Linux only) ##
264 | ## Requires AQ ground tools sources ##
265 | $(SRC_PATH)/../ground/loader: $(SRC_PATH)/../ground/loader.c
266 | (cd $(SRC_PATH)/../ground/ && make loader)
267 |
268 | flash: $(SRC_PATH)/../ground/loader
269 | $(SRC_PATH)/../ground/loader -p $(USB_DEVICE) -b 115200 -f $(BIN_PATH)/$(BIN_NAME).hex
270 |
--------------------------------------------------------------------------------
/onboard/adc.c:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012, 2013 Bill Nesbitt
17 | */
18 |
19 | #include "main.h"
20 | #include "adc.h"
21 | #include "fet.h"
22 | #include "run.h"
23 | #include "digital.h"
24 | #include "timer.h"
25 | #include "config.h"
26 | #include "stm32f10x_adc.h"
27 | #include "stm32f10x_dma.h"
28 | #include "misc.h"
29 |
30 | #ifdef ADC_FAST_SAMPLE
31 | uint32_t adcRawData[ADC_CHANNELS*4];
32 | #else
33 | uint32_t adcRawData[ADC_CHANNELS*2];
34 | #endif
35 |
36 | float adcToAmps;
37 | int16_t adcAdvance;
38 | int32_t adcblankingMicros;
39 | int32_t adcMaxPeriod;
40 | int32_t adcMinPeriod;
41 |
42 | int16_t histIndex;
43 | int16_t histSize;
44 | uint16_t histA[ADC_HIST_SIZE];
45 | uint16_t histB[ADC_HIST_SIZE];
46 | uint16_t histC[ADC_HIST_SIZE];
47 |
48 | uint32_t avgA, avgB, avgC;
49 | int32_t adcAmpsOffset;
50 | volatile int32_t adcAvgAmps;
51 | volatile int32_t adcMaxAmps;
52 | volatile int32_t adcAvgVolts;
53 |
54 | uint8_t adcStateA, adcStateB, adcStateC;
55 |
56 | volatile uint32_t detectedCrossing;
57 | volatile uint32_t crossingPeriod;
58 | volatile int32_t adcCrossingPeriod;
59 | uint32_t nextCrossingDetect;
60 | uint32_t numLoops;
61 |
62 | void adcCalibrateADC(ADC_TypeDef *ADCx) {
63 | // Enable ADC reset calibration register
64 | ADC_ResetCalibration(ADCx);
65 |
66 | // Check the end of ADC reset calibration register
67 | while(ADC_GetResetCalibrationStatus(ADCx))
68 | ;
69 |
70 | // Start ADC calibration
71 | ADC_StartCalibration(ADCx);
72 |
73 | // Check the end of ADC calibration
74 | while(ADC_GetCalibrationStatus(ADCx))
75 | ;
76 | }
77 |
78 | void adcInit(void) {
79 | ADC_InitTypeDef ADC_InitStructure;
80 | DMA_InitTypeDef DMA_InitStructure;
81 | NVIC_InitTypeDef NVIC_InitStructure;
82 | int i;
83 |
84 | adcSetConstants();
85 | histSize = ADC_HIST_SIZE;
86 |
87 | // Use STM32's Dual Regular Simultaneous Mode capable of ~ 1.7M samples per second
88 |
89 | // NOTE: assume that RCC code has already placed all pins into Analog In mode during startup
90 |
91 | // DMA1 channel1 configuration (ADC1)
92 | DMA_DeInit(DMA1_Channel1);
93 | DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADC1 + 0x4c;
94 | DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&adcRawData[0];
95 | DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
96 | DMA_InitStructure.DMA_BufferSize = sizeof(adcRawData)/4;
97 | DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
98 | DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
99 | DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
100 | DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
101 | DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
102 | DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
103 | DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
104 | DMA_Init(DMA1_Channel1, &DMA_InitStructure);
105 |
106 | DMA_ITConfig(DMA1_Channel1, DMA_IT_TC | DMA_IT_HT, ENABLE);
107 | DMA_ClearITPendingBit(DMA1_IT_GL1 | DMA1_IT_TC1 | DMA1_IT_HT1);
108 |
109 | DMA_Cmd(DMA1_Channel1, ENABLE);
110 |
111 | // Enable the DMA1_Channel1 global Interrupt
112 | NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel1_IRQn;
113 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
114 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
115 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
116 | NVIC_Init(&NVIC_InitStructure);
117 |
118 | // ADC1 configuration
119 | // ADC_InitStructure.ADC_Mode = ADC_Mode_RegSimult;
120 | ADC_InitStructure.ADC_Mode = ADC_Mode_RegInjecSimult;
121 | ADC_InitStructure.ADC_ScanConvMode = ENABLE;
122 | ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;
123 | ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
124 | ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
125 | ADC_InitStructure.ADC_NbrOfChannel = sizeof(adcRawData)/4;
126 | ADC_Init(ADC1, &ADC_InitStructure);
127 |
128 | #ifdef ADC_FAST_SAMPLE
129 | ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 1, ADC_SAMPLE_TIME); // SENSE_CURRENT
130 | ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 2, ADC_SAMPLE_TIME); // SENSE_CURRENT
131 | ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 3, ADC_SAMPLE_TIME); // SENSE_B
132 | ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 4, ADC_SAMPLE_TIME); // SENSE_B
133 | ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 5, ADC_SAMPLE_TIME); // SENSE_VIN
134 | ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 6, ADC_SAMPLE_TIME); // SENSE_VIN
135 | ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 7, ADC_SAMPLE_TIME); // SENSE_B
136 | ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 8, ADC_SAMPLE_TIME); // SENSE_B
137 | #else
138 | ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 1, ADC_SAMPLE_TIME); // SENSE_CURRENT
139 | ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 2, ADC_SAMPLE_TIME); // SENSE_B
140 | ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 3, ADC_SAMPLE_TIME); // SENSE_VIN
141 | ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 4, ADC_SAMPLE_TIME); // SENSE_B
142 | #endif
143 | ADC_DMACmd(ADC1, ENABLE);
144 |
145 | // ADC2 configuration
146 | // ADC_InitStructure.ADC_Mode = ADC_Mode_RegSimult;
147 | ADC_InitStructure.ADC_Mode = ADC_Mode_RegInjecSimult;
148 | ADC_InitStructure.ADC_ScanConvMode = ENABLE;
149 | ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;
150 | ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
151 | ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
152 | ADC_InitStructure.ADC_NbrOfChannel = sizeof(adcRawData)/4;
153 | ADC_Init(ADC2, &ADC_InitStructure);
154 |
155 | #ifdef ADC_FAST_SAMPLE
156 | ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SAMPLE_TIME); // SENSE_A
157 | ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 2, ADC_SAMPLE_TIME); // SENSE_A
158 | ADC_RegularChannelConfig(ADC2, ADC_Channel_3, 3, ADC_SAMPLE_TIME); // SENSE_C
159 | ADC_RegularChannelConfig(ADC2, ADC_Channel_3, 4, ADC_SAMPLE_TIME); // SENSE_C
160 | ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 5, ADC_SAMPLE_TIME); // SENSE_A
161 | ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 6, ADC_SAMPLE_TIME); // SENSE_A
162 | ADC_RegularChannelConfig(ADC2, ADC_Channel_3, 7, ADC_SAMPLE_TIME); // SENSE_C
163 | ADC_RegularChannelConfig(ADC2, ADC_Channel_3, 8, ADC_SAMPLE_TIME); // SENSE_C
164 | #else
165 | ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SAMPLE_TIME); // SENSE_A
166 | ADC_RegularChannelConfig(ADC2, ADC_Channel_3, 2, ADC_SAMPLE_TIME); // SENSE_C
167 | ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 3, ADC_SAMPLE_TIME); // SENSE_A
168 | ADC_RegularChannelConfig(ADC2, ADC_Channel_3, 4, ADC_SAMPLE_TIME); // SENSE_C
169 | #endif
170 |
171 | ADC_ExternalTrigConvCmd(ADC2, ENABLE);
172 |
173 | // enable and calibrate
174 | ADC_Cmd(ADC1, ENABLE);
175 | adcCalibrateADC(ADC1);
176 |
177 | ADC_Cmd(ADC2, ENABLE);
178 | adcCalibrateADC(ADC2);
179 |
180 | nextCrossingDetect = adcMaxPeriod;
181 |
182 | // setup injection sequence
183 | ADC_InjectedSequencerLengthConfig(ADC1, 1);
184 | ADC_InjectedSequencerLengthConfig(ADC2, 1);
185 | ADC_InjectedChannelConfig(ADC1, ADC_Channel_5, 1, ADC_SAMPLE_TIME);
186 | ADC_InjectedChannelConfig(ADC2, ADC_Channel_4, 1, ADC_SAMPLE_TIME);
187 | ADC_ExternalTrigInjectedConvCmd(ADC1, ENABLE);
188 | ADC_ExternalTrigInjectedConvCmd(ADC2, ENABLE);
189 | ADC_ExternalTrigInjectedConvConfig(ADC1, ADC_ExternalTrigInjecConv_None);
190 | ADC_ExternalTrigInjectedConvConfig(ADC2, ADC_ExternalTrigInjecConv_None);
191 |
192 | // Start ADC1 / ADC2 Conversions
193 | ADC_SoftwareStartConvCmd(ADC1, ENABLE);
194 | }
195 |
196 | void adcSetCrossingPeriod(int32_t crossPer) {
197 | adcCrossingPeriod = crossPer<<15;
198 | crossingPeriod = crossPer;
199 | }
200 |
201 | static inline void adcGrowHist(void) {
202 | register int i;
203 |
204 | avgA += histA[histIndex];
205 | avgB += histB[histIndex];
206 | avgC += histC[histIndex];
207 |
208 | for (i = histSize; i > histIndex; i--) {
209 | histA[i] = histA[i-1];
210 | histB[i] = histB[i-1];
211 | histC[i] = histC[i-1];
212 | }
213 |
214 | histSize++;
215 | }
216 |
217 | static inline void adcShrinkHist(void) {
218 | register int i;
219 |
220 | for (i = histIndex; i < histSize-1; i++) {
221 | histA[i] = histA[i+1];
222 | histB[i] = histB[i+1];
223 | histC[i] = histC[i+1];
224 | }
225 |
226 | histSize--;
227 |
228 | if (histIndex == histSize)
229 | histIndex = 0;
230 |
231 | avgA -= histA[histIndex];
232 | avgB -= histB[histIndex];
233 | avgC -= histC[histIndex];
234 | }
235 |
236 | static inline void adcEvaluateHistSize(void) {
237 | int16_t sizeNeeded;
238 |
239 | // sizeNeeded = crossingPeriod/16/TIMER_MULT;
240 | // sizeNeeded = crossingPeriod/20/TIMER_MULT;
241 | // sizeNeeded = crossingPeriod/24/TIMER_MULT;
242 | sizeNeeded = crossingPeriod/32/TIMER_MULT;
243 |
244 | if (sizeNeeded > (histSize+1) && histSize < ADC_HIST_SIZE)
245 | adcGrowHist();
246 | else if (sizeNeeded < (histSize-1) && sizeNeeded > 1)
247 | adcShrinkHist();
248 | }
249 |
250 | #pragma GCC optimize ("-O1")
251 | void DMA1_Channel1_IRQHandler(void) {
252 | register uint16_t *raw = (uint16_t *)adcRawData;
253 | register uint32_t valA, valB, valC, valCOMP;
254 | int ampsFlag = 0;
255 | uint32_t currentMicros;
256 |
257 | __asm volatile ("cpsid i");
258 | currentMicros = timerGetMicros();
259 | __asm volatile ("cpsie i");
260 |
261 | #ifdef ADC_FAST_SAMPLE
262 | if ((DMA1->ISR & DMA1_FLAG_TC1) != RESET) {
263 | raw += (ADC_CHANNELS * 4); // 4 16bit words each
264 | adcAvgVolts -= (adcAvgVolts - (int32_t)((raw[0]+raw[2])<<(ADC_VOLTS_PRECISION-1)))>>6;
265 | }
266 | else {
267 | adcAvgAmps -= (adcAvgAmps - (int32_t)((raw[0]+raw[2])<<(ADC_AMPS_PRECISION-1)))>>6;
268 | }
269 | #else
270 | if ((DMA1->ISR & DMA1_FLAG_TC1) != RESET) {
271 | raw += (ADC_CHANNELS * 2); // 2 16bit words each
272 | adcAvgVolts -= (adcAvgVolts - (int32_t)(raw[0]<>6;
273 | }
274 | else {
275 | adcAvgAmps -= (adcAvgAmps - (int32_t)(raw[0]<>6;
276 | }
277 | #endif
278 |
279 | DMA1->IFCR = DMA1_IT_GL1 | DMA1_IT_TC1 | DMA1_IT_HT1;
280 |
281 | if (runMode == SERVO_MODE)
282 | return;
283 |
284 | // blanking time after commutation
285 | if (!fetCommutationMicros || ((currentMicros >= fetCommutationMicros) ? (currentMicros - fetCommutationMicros) : (TIMER_MASK - fetCommutationMicros + currentMicros)) > adcblankingMicros) {
286 | #ifdef ADC_FAST_SAMPLE
287 | histA[histIndex] = valA = (raw[1]+raw[3]);
288 | histB[histIndex] = valB = (raw[4]+raw[6]);
289 | histC[histIndex] = valC = (raw[5]+raw[7]);
290 | #else
291 | histA[histIndex] = valA = raw[1];
292 | histB[histIndex] = valB = raw[2];
293 | histC[histIndex] = valC = raw[3];
294 | #endif
295 | histIndex = (histIndex + 1) % histSize;
296 |
297 | avgA += valA - histA[histIndex];
298 | avgB += valB - histB[histIndex];
299 | avgC += valC - histC[histIndex];
300 |
301 | if ((avgA+avgB+avgC)/histSize > (ADC_MIN_COMP*3) && state != ESC_STATE_DISARMED) {
302 | register int32_t periodMicros;
303 |
304 | periodMicros = (currentMicros >= detectedCrossing) ? (currentMicros - detectedCrossing) : (TIMER_MASK - detectedCrossing + currentMicros);
305 |
306 | if (periodMicros > nextCrossingDetect) {
307 | register int8_t nextStep = 0;
308 |
309 | if (!adcStateA && avgA >= (avgB+avgC)>>1) {
310 | adcStateA = 1;
311 | if (fetStepDir > 0)
312 | nextStep = 6;
313 | else
314 | nextStep = 1;
315 | }
316 | else if (adcStateA && avgA <= (avgB+avgC)>>1) {
317 | adcStateA = 0;
318 | if (fetStepDir > 0)
319 | nextStep = 3;
320 | else
321 | nextStep = 4;
322 | }
323 | else if (!adcStateB && avgB >= (avgA+avgC)>>1) {
324 | adcStateB = 1;
325 | if (fetStepDir > 0)
326 | nextStep = 4;
327 | else
328 | nextStep = 5;
329 | }
330 | else if (adcStateB && avgB <= (avgA+avgC)>>1) {
331 | adcStateB = 0;
332 | if (fetStepDir > 0)
333 | nextStep = 1;
334 | else
335 | nextStep = 2;
336 | }
337 | else if (!adcStateC && avgC >= (avgA+avgB)>>1) {
338 | adcStateC = 1;
339 | if (fetStepDir > 0)
340 | nextStep = 2;
341 | else
342 | nextStep = 3;
343 | }
344 | else if (adcStateC && avgC <= (avgA+avgB)>>1) {
345 | adcStateC = 0;
346 | if (fetStepDir > 0)
347 | nextStep = 5;
348 | else
349 | nextStep = 6;
350 | }
351 |
352 | if (nextStep && periodMicros > adcMinPeriod) {
353 | if (periodMicros > adcMaxPeriod)
354 | periodMicros = adcMaxPeriod;
355 |
356 | // crossingPeriod = (crossingPeriod*3 + periodMicros)/4;
357 | // crossingPeriod = (crossingPeriod*5 + periodMicros)/6;
358 | adcCrossingPeriod += ((periodMicros<<15) - adcCrossingPeriod)>>3;
359 | crossingPeriod = adcCrossingPeriod>>15;
360 | // adcCrossingPeriod += ((periodMicros<<15) - adcCrossingPeriod)>>4;
361 | // crossingPeriod = adcCrossingPeriod>>15;
362 | // crossingPeriod = (crossingPeriod*7 + periodMicros)/8;
363 | // crossingPeriod = (crossingPeriod*15 + periodMicros)/16;
364 |
365 | // schedule next commutation
366 | fetStep = nextStep;
367 | fetCommutationMicros = 0;
368 | timerSetAlarm1(crossingPeriod/2 - (ADC_DETECTION_TIME*(histSize+2))/2 - ADC_COMMUTATION_ADVANCE, fetCommutate, crossingPeriod);
369 |
370 | // record crossing time
371 | detectedCrossing = currentMicros;
372 |
373 | // resize history based on period
374 | adcEvaluateHistSize();
375 |
376 | // calculate next crossing detection time
377 | // nextCrossingDetect = crossingPeriod*2/3;
378 | nextCrossingDetect = crossingPeriod*3/4;
379 | // nextCrossingDetect = crossingPeriod*6/8;
380 |
381 | // record highest current draw for this run
382 | if (adcAvgAmps > adcMaxAmps)
383 | adcMaxAmps = adcAvgAmps;
384 | }
385 | }
386 | }
387 | }
388 | }
389 |
390 | // start injected conversion of current sensor
391 | int32_t adcGetInstantCurrent(void) {
392 | ADC_ClearFlag(ADC1, ADC_FLAG_JEOC);
393 | ADC_SoftwareStartInjectedConvCmd(ADC1, ENABLE);
394 | while (ADC_GetFlagStatus(ADC1, ADC_FLAG_JEOC) != SET)
395 | ;
396 | return (int32_t)ADC_GetInjectedConversionValue(ADC1, ADC_InjectedChannel_1);
397 | }
398 |
399 | void adcSetConstants(void) {
400 | float shuntResistance = p[SHUNT_RESISTANCE];
401 | float advance = p[ADVANCE];
402 | float blankingMicros = p[BLANKING_MICROS];
403 | float minPeriod = p[MIN_PERIOD];
404 | float maxPeriod = p[MAX_PERIOD];
405 |
406 | // bounds checking
407 | if (shuntResistance > ADC_MAX_SHUNT)
408 | shuntResistance = ADC_MAX_SHUNT;
409 | else if (shuntResistance < ADC_MIN_SHUNT)
410 | shuntResistance = ADC_MIN_SHUNT;
411 |
412 | if (advance > ADC_MAX_ADVANCE)
413 | advance = ADC_MAX_ADVANCE;
414 | else if (advance < ADC_MIN_ADVANCE)
415 | advance = ADC_MIN_ADVANCE;
416 |
417 | if (blankingMicros > ADC_MAX_BLANKING_MICROS)
418 | blankingMicros = ADC_MAX_BLANKING_MICROS;
419 | else if (blankingMicros < ADC_MIN_BLANKING_MICROS)
420 | blankingMicros = ADC_MIN_BLANKING_MICROS;
421 |
422 | if (minPeriod > ADC_MAX_MIN_PERIOD)
423 | minPeriod = ADC_MAX_MIN_PERIOD;
424 | else if (minPeriod < ADC_MIN_MIN_PERIOD)
425 | minPeriod = ADC_MIN_MIN_PERIOD;
426 |
427 | if (maxPeriod > ADC_MAX_MAX_PERIOD)
428 | maxPeriod = ADC_MAX_MAX_PERIOD;
429 | else if (maxPeriod < ADC_MIN_MAX_PERIOD)
430 | maxPeriod = ADC_MIN_MAX_PERIOD;
431 |
432 | adcToAmps = ((ADC_TO_VOLTAGE / ((1<<(ADC_AMPS_PRECISION))+1)) / (ADC_SHUNT_GAIN * shuntResistance / 1000.0f));
433 | adcAdvance = 100.0f / (advance * (50.0f / 30.0f));
434 | adcblankingMicros = blankingMicros * TIMER_MULT;
435 | adcMinPeriod = minPeriod * TIMER_MULT;
436 | adcMaxPeriod = maxPeriod * TIMER_MULT;
437 |
438 | p[SHUNT_RESISTANCE] = shuntResistance;
439 | p[ADVANCE] = advance;
440 | p[BLANKING_MICROS] = blankingMicros;
441 | p[MIN_PERIOD] = minPeriod;
442 | p[MAX_PERIOD] = maxPeriod;
443 | }
444 |
--------------------------------------------------------------------------------
/onboard/adc.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012, 2013 Bill Nesbitt
17 | */
18 |
19 | #ifndef _ADC_H
20 | #define _ADC_H
21 |
22 | #include "timer.h"
23 | #include "stm32f10x_adc.h"
24 |
25 | #define ADC_FAST_SAMPLE
26 |
27 | #ifdef ADC_FAST_SAMPLE
28 | #define ADC_SAMPLE_TIME ADC_SampleTime_7Cycles5
29 | #define ADC_DETECTION_TIME (uint16_t)((7.5+12.5)*4*TIMER_MULT/12) // 4 ADC groups w/7.5 clk sample @ 12Mhz ADC clock (in us)
30 | #else
31 | #define ADC_SAMPLE_TIME ADC_SampleTime_28Cycles5
32 | #define ADC_DETECTION_TIME (uint16_t)((28.5+12.5)*2*TIMER_MULT/12) // 2 ADC groups w/28.5 clk sample @ 12Mhz ADC clock (in us)
33 | #endif // ADC_FAST_SAMPLE
34 |
35 | #define ADC_CHANNELS 2
36 | #define ADC_CLOCK RCC_PCLK2_Div6 // 12Mhz
37 |
38 | #define ADC_REF_VOLTAGE 3.3f
39 | #define ADC_TO_VOLTAGE (ADC_REF_VOLTAGE / (1<<12)) // 12 bit ADC resolution
40 |
41 | #define ADC_AMPS_PRECISION 16
42 | #define ADC_SHUNT_GAIN 50.9f
43 |
44 | #define ADC_VOLTS_PRECISION 16
45 | #define ADC_VOLTS_SLOPE ((10.0f + 1.5f) / 1.5f) // Rtop = 10K, Rbot = 1.5K
46 | #define ADC_TO_VOLTS (ADC_TO_VOLTAGE * ADC_VOLTS_SLOPE / ((1<<(ADC_VOLTS_PRECISION))+1))
47 |
48 | #define ADC_MIN_SHUNT 0.05 // milli Ohms
49 | #define ADC_MAX_SHUNT 1.0 // milli Ohms
50 | #define ADC_MIN_ADVANCE 0.1 // electrical degrees
51 | #define ADC_MAX_ADVANCE 30.0 // electrical degrees
52 | #define ADC_MIN_BLANKING_MICROS 0 // us
53 | #define ADC_MAX_BLANKING_MICROS 100 // us
54 | #define ADC_MIN_MIN_PERIOD 20 // us
55 | #define ADC_MAX_MIN_PERIOD 500 // us
56 | #define ADC_MIN_MAX_PERIOD 1000 // us
57 | #define ADC_MAX_MAX_PERIOD 20000 // us
58 |
59 | #define ADC_HIST_SIZE 64
60 | #ifdef ADC_FAST_SAMPLE
61 | #define ADC_MIN_COMP 30
62 | #else
63 | #define ADC_MIN_COMP 15
64 | #endif
65 | #define ADC_CROSSING_TIMEOUT (250000*TIMER_MULT)
66 |
67 | //#define ADC_COMMUTATION_ADVANCE (0) // 0 deg
68 | //#define ADC_COMMUTATION_ADVANCE (crossingPeriod/16) // 3.75 deg
69 | //#define ADC_COMMUTATION_ADVANCE (crossingPeriod/8) // 7.5 deg
70 | //#define ADC_COMMUTATION_ADVANCE (crossingPeriod/4) // 15 deg
71 | //#define ADC_COMMUTATION_ADVANCE (crossingPeriod/2) // 30 deg
72 | #define ADC_COMMUTATION_ADVANCE (crossingPeriod/adcAdvance) // variable
73 |
74 | extern float adcToAmps;
75 | extern int16_t adcAdvance;
76 | extern int32_t adcblankingMicros;
77 | extern int32_t adcMaxPeriod;
78 | extern int32_t adcMinPeriod;
79 | extern int32_t adcAmpsOffset;
80 | extern volatile int32_t adcAvgAmps;
81 | extern volatile int32_t adcMaxAmps;
82 | extern volatile int32_t adcAvgVolts;
83 | extern int16_t histSize;
84 | extern uint32_t avgA, avgB, avgC;
85 | extern volatile uint32_t detectedCrossing;
86 | extern volatile uint32_t crossingPeriod;
87 | extern volatile int32_t adcCrossingPeriod;
88 |
89 | extern void adcInit(void);
90 | extern void adcSetConstants(void);
91 | extern void adcSetCrossingPeriod(int32_t crossPer);
92 | extern int32_t adcGetInstantCurrent(void);
93 |
94 | #endif
95 |
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/onboard/binary.c:
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https://raw.githubusercontent.com/bn999/esc32/bde2b333530e894c92ece2a92454ee13c96a544c/onboard/binary.c
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/onboard/binary.h:
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https://raw.githubusercontent.com/bn999/esc32/bde2b333530e894c92ece2a92454ee13c96a544c/onboard/binary.h
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/onboard/buildnum.h:
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1 | #define BUILDNUMBER 6185
2 |
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/onboard/can.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright � 2011-2014 Bill Nesbitt
17 | */
18 |
19 | #ifndef _can_h
20 | #define _can_h
21 |
22 | #include "stm32f10x_can.h"
23 |
24 | #define CAN_CAN CAN1
25 | #define CAN_PORT GPIOA
26 | #define CAN_RX_PIN GPIO_Pin_11
27 | #define CAN_TX_PIN GPIO_Pin_12
28 |
29 | #define CAN_UUID 0x1FFFF7E8
30 |
31 | #define CAN_TIMEOUT (200000*TIMER_MULT) // 0.2 secs
32 |
33 | // Logical Communications Channel
34 | // 2 bits [28:27]
35 | #define CAN_LCC_MASK ((uint32_t)0x3<<30)
36 | #define CAN_LCC_EXCEPTION ((uint32_t)0x0<<30)
37 | #define CAN_LCC_HIGH ((uint32_t)0x1<<30)
38 | #define CAN_LCC_NORMAL ((uint32_t)0x2<<30)
39 | #define CAN_LCC_INFO ((uint32_t)0x3<<30)
40 |
41 | // Target Type
42 | // 1 bit [26:26]
43 | #define CAN_TT_MASK ((uint32_t)0x1<<29)
44 | #define CAN_TT_GROUP ((uint32_t)0x0<<29)
45 | #define CAN_TT_NODE ((uint32_t)0x1<<29)
46 |
47 | // Function ID
48 | // 4 bits [25:22]
49 | #define CAN_FID_MASK ((uint32_t)0xf<<25)
50 | #define CAN_FID_RESET_BUS ((uint32_t)0x0<<25)
51 | #define CAN_FID_ACK ((uint32_t)0x1<<25)
52 | #define CAN_FID_NACK ((uint32_t)0x2<<25)
53 | #define CAN_FID_CMD ((uint32_t)0x3<<25)
54 | #define CAN_FID_GET ((uint32_t)0x4<<25)
55 | #define CAN_FID_SET ((uint32_t)0x5<<25)
56 | #define CAN_FID_REPLY ((uint32_t)0x6<<25)
57 | #define CAN_FID_REQ_ADDR ((uint32_t)0x7<<25)
58 | #define CAN_FID_GRANT_ADDR ((uint32_t)0x8<<25)
59 | #define CAN_FID_ERROR ((uint32_t)0x9<<25)
60 | #define CAN_FID_PING ((uint32_t)0xa<<25)
61 | #define CAN_FID_TELEM ((uint32_t)0xb<<25)
62 |
63 | // Data Object Code
64 | // 6 bits [21:16]
65 | #define CAN_DOC_MASK ((uint32_t)0x3f<<19)
66 |
67 | // Source ID
68 | // 5 bits [15:11]
69 | #define CAN_SID_MASK ((uint32_t)0x1f<<14)
70 |
71 | // Target ID
72 | // 5 bits [10:6]
73 | #define CAN_TID_MASK ((uint32_t)0x1f<<9)
74 |
75 | // Sequence ID
76 | // 6 bits [5:0]
77 | #define CAN_SEQ_MASK ((uint32_t)0x3f<<3)
78 |
79 | // types
80 | enum {
81 | CAN_TYPE_ESC = 1,
82 | CAN_TYPE_SERVO,
83 | CAN_TYPE_SENSOR,
84 | CAN_TYPE_SWITCH,
85 | CAN_TYPE_OSD,
86 | CAN_TYPE_UART,
87 | CAN_TYPE_HUB,
88 | CAN_TYPE_NUM
89 | };
90 |
91 | // commands
92 | enum {
93 | CAN_CMD_DISARM = 1,
94 | CAN_CMD_ARM,
95 | CAN_CMD_START,
96 | CAN_CMD_STOP,
97 | CAN_CMD_SETPOINT10,
98 | CAN_CMD_SETPOINT12,
99 | CAN_CMD_SETPOINT16,
100 | CAN_CMD_RPM,
101 | CAN_CMD_CFG_READ,
102 | CAN_CMD_CFG_WRITE,
103 | CAN_CMD_CFG_DEFAULT,
104 | CAN_CMD_TELEM_RATE,
105 | CAN_CMD_TELEM_VALUE,
106 | CAN_CMD_BEEP,
107 | CAN_CMD_POS,
108 | CAN_CMD_USER_DEFINED,
109 | CAN_CMD_RESET,
110 | CAN_CMD_STREAM,
111 | CAN_CMD_ON,
112 | CAN_CMD_OFF
113 | };
114 |
115 | // data types
116 | enum {
117 | CAN_DATA_GROUP = 1,
118 | CAN_DATA_TYPE,
119 | CAN_DATA_ID,
120 | CAN_DATA_INPUT_MODE,
121 | CAN_DATA_RUN_MODE,
122 | CAN_DATA_STATE,
123 | CAN_DATA_PARAM_ID,
124 | CAN_DATA_TELEM,
125 | CAN_DATA_VERSION,
126 | CAN_DATA_VALUE,
127 | CAN_DATA_PARAM_NAME1,
128 | CAN_DATA_PARAM_NAME2
129 | };
130 |
131 | // telemetry values
132 | enum {
133 | CAN_TELEM_NONE = 0,
134 | CAN_TELEM_STATUS,
135 | CAN_TELEM_STATE,
136 | CAN_TELEM_TEMP,
137 | CAN_TELEM_VIN,
138 | CAN_TELEM_AMPS,
139 | CAN_TELEM_RPM,
140 | CAN_TELEM_ERRORS,
141 | CAN_TELEM_NUM
142 | };
143 |
144 | typedef struct {
145 | uint32_t id;
146 | uint32_t *data;
147 | uint8_t sid;
148 | uint8_t tid;
149 | uint8_t seq;
150 | uint8_t doc;
151 | } canPacket_t;
152 |
153 | typedef struct {
154 | unsigned int value1 : 10;
155 | unsigned int value2 : 10;
156 | unsigned int value3 : 10;
157 | unsigned int value4 : 10;
158 | unsigned int value5 : 10;
159 | unsigned int value6 : 10;
160 | unsigned int unused : 4;
161 | } __attribute__((packed)) canGroup10_t;
162 |
163 | typedef struct {
164 | unsigned int value1 : 12;
165 | unsigned int value2 : 12;
166 | unsigned int value3 : 12;
167 | unsigned int value4 : 12;
168 | unsigned int value5 : 12;
169 | unsigned int unused : 4;
170 | } __attribute__((packed)) canGroup12_t;
171 |
172 | typedef struct {
173 | uint16_t value1;
174 | uint16_t value2;
175 | uint16_t value3;
176 | uint16_t value4;
177 | } __attribute__((packed)) canGroup16_t;
178 |
179 | typedef struct {
180 | unsigned int state : 3;
181 | unsigned int vin : 12; // x 100
182 | unsigned int amps : 14; // x 100
183 | unsigned int rpm : 15;
184 | unsigned int duty : 8; // x (255/100)
185 | unsigned int errors : 9;
186 | unsigned int errCode : 3;
187 | } __attribute__((packed)) esc32CanStatus_t;
188 |
189 | typedef struct {
190 | uint32_t validMicros;
191 | uint32_t uuid;
192 | uint32_t mailboxFull;
193 | uint32_t packetsReceived;
194 | uint8_t paramName[16];
195 | uint16_t telemRate;
196 | uint8_t telemValues[CAN_TELEM_NUM];
197 | uint8_t networkId;
198 | uint8_t groupId;
199 | uint8_t subGroupId;
200 | uint8_t seqId;
201 | } canDataStruct_t;
202 |
203 | extern canDataStruct_t canData;
204 |
205 | extern void canInit(void);
206 | extern void canProcess(void);
207 | extern void canSetConstants(void);
208 |
209 | #endif
210 |
--------------------------------------------------------------------------------
/onboard/cli.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012, 2013 Bill Nesbitt
17 | */
18 |
19 | #ifndef _CLI_H
20 | #define _CLI_H
21 |
22 | #define CLI_INTR 3 // interrupt
23 | #define CLI_BELL 7 // bell
24 | #define CLI_TAB 9 // tab
25 | #define CLI_BS 127 // backspace
26 |
27 | typedef struct {
28 | char *name;
29 | char *params;
30 | void (*cmdFunc)(void *cmd, char *cmdLine);
31 | } cliCommand_t;
32 |
33 | extern char version[16];
34 |
35 | extern void cliInit(void);
36 | extern void cliCheck(void);
37 | extern void cliFuncArm(void *cmd, char *cmdLine);
38 | extern void cliFuncBeep(void *cmd, char *cmdLine);
39 | extern void cliFuncBinary(void *cmd, char *cmdLine);
40 | extern void cliFuncBoot(void *cmd, char *cmdLine);
41 | extern void cliFuncConfig(void *cmd, char *cmdLine);
42 | extern void cliFuncDisarm(void *cmd, char *cmdLine);
43 | extern void cliFuncDuty(void *cmd, char *cmdLine);
44 | extern void cliFuncHelp(void *cmd, char *cmdLine);
45 | extern void cliFuncInput(void *cmd, char *cmdLine);
46 | extern void cliFuncMode(void *cmd, char *cmdLine);
47 | extern void cliFuncPos(void *cmd, char *cmdLine);
48 | extern void cliFuncPwm(void *cmd, char *cmdLine);
49 | extern void cliFuncRpm(void *cmd, char *cmdLine);
50 | extern void cliFuncSet(void *cmd, char *cmdLine);
51 | extern void cliFuncStart(void *cmd, char *cmdLine);
52 | extern void cliFuncStatus(void *cmd, char *cmdLine);
53 | extern void cliFuncStop(void *cmd, char *cmdLine);
54 | extern void cliFuncTelemetry(void *cmd, char *cmdLine);
55 | extern void cliFuncVer(void *cmd, char *cmdLine);
56 |
57 | #endif
58 |
--------------------------------------------------------------------------------
/onboard/config.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/bn999/esc32/bde2b333530e894c92ece2a92454ee13c96a544c/onboard/config.c
--------------------------------------------------------------------------------
/onboard/config.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012, 2013 Bill Nesbitt
17 | */
18 |
19 | #ifndef _CONFIG_H
20 | #define _CONFIG_H
21 |
22 | #define DEFAULT_CONFIG_VERSION 2.01f
23 | #define DEFAULT_STARTUP_MODE 0.0f
24 | #define DEFAULT_BAUD_RATE 230400
25 | #define DEFAULT_ESC_ID 0
26 |
27 | #define DEFAULT_PTERM 0.25f
28 | #define DEFAULT_PNFAC 10.0f
29 | #define DEFAULT_ITERM 0.0006f
30 | #define DEFAULT_INFAC 0.15f
31 |
32 | #define DEFAULT_FF1TERM 0.0f
33 | #define DEFAULT_FF2TERM 0.0f
34 |
35 | #define DEFAULT_CL1TERM 0.0f
36 | #define DEFAULT_CL2TERM 0.0f
37 | #define DEFAULT_CL3TERM 0.0f
38 | #define DEFAULT_CL4TERM 0.0f
39 | #define DEFAULT_CL5TERM 0.0f
40 |
41 | #define DEFAULT_THR1TERM 0.0f
42 | #define DEFAULT_THR2TERM 1.0f
43 |
44 | #define DEFAULT_SHUNT_RESISTANCE 0.5f // milli Ohms
45 | #define DEFAULT_MIN_PERIOD 50.0f // us
46 | #define DEFAULT_MAX_PERIOD 12000.0f // us
47 | #define DEFAULT_BLANKING_MICROS 30.0f // us
48 | #define DEFAULT_ADVANCE 10.0f // electrical degrees
49 | #define DEFAULT_START_VOLTAGE 1.1f // voltage used to start motor
50 | #define DEFAULT_START_ALIGN_TIME 600 // ms to align rotor in known position
51 | #define DEFAULT_START_ALIGN_VOLTAGE 0.9f // max voltage during align (around 0.8 * START_VOLTAGE)
52 | #define DEFAULT_START_STEPS_NUM 0.0f // steps without commutation
53 | #define DEFAULT_START_STEPS_PERIOD 16000 // us betweet steps
54 | #define DEFAULT_START_STEPS_ACCEL 0.0f // us each following step will be shorter (acceleration)
55 | #define DEFAULT_GOOD_DETECTS_START 75.0f // after which will go into RUNNING mode
56 | #define DEFAULT_BAD_DETECTS_DISARM 48.0f // after which will go into DISARMED mode
57 | #define DEFAULT_MAX_CURRENT 20.0f // amps
58 | #define DEFAULT_SWITCH_FREQ 20.0f // output PWM frequency in KHz
59 | #define DEFAULT_MOTOR_POLES 14.0f
60 |
61 | #define DEFAULT_PWM_MIN_PERIOD 2200 // minimum valid period
62 | #define DEFAULT_PWM_MAX_PERIOD 25000 // maximum valid period
63 |
64 | #define DEFAULT_PWM_MIN_VALUE 750 // minimum to consider pulse a valid signal
65 | #define DEFAULT_PWM_LO_VALUE 1000 // lowest running value
66 | #define DEFAULT_PWM_HI_VALUE 1950 // highest running value
67 | #define DEFAULT_PWM_MAX_VALUE 2250 // maximum to consider pulse a valid signal
68 | #define DEFAULT_PWM_MIN_START 1100 // minimum value required to start
69 |
70 | #define DEFAULT_PWM_LOWPASS 0.0f // lowpass on PWM input values (0 = none, 10 = heavy, no upper limit)
71 | #define DEFAULT_RPM_MEAS_LP 0.5f // lowpass measured RPM values for closed loop control (0 = none, 0.99 = max, >=1 not allowed)
72 |
73 | #define DEFAULT_PWM_RPM_SCALE 6500 // RPM equivalent of maximum PWM IN in CLOSED_LOOP mode
74 |
75 | #define DEFAULT_FET_BRAKING 0
76 |
77 | #define DEFAULT_SERVO_DUTY 16.0f // %
78 | #define DEFAULT_SERVO_P 0.05f
79 | #define DEFAULT_SERVO_D 0.0f
80 | #define DEFAULT_SERVO_MAX_RATE 1000.0f // deg/s
81 | #define DEFAULT_SERVO_SCALE 360.0f // deg
82 | #define DEFAULT_DIRECTION 1.0f // 1 == forward, -1 == reverse
83 |
84 | #define FLASH_PAGE_SIZE ((uint16_t)0x400)
85 | #define FLASH_WRITE_ADDR (0x08000000 + (uint32_t)FLASH_PAGE_SIZE * 63) // use the last KB for storage
86 |
87 | enum configParameters {
88 | CONFIG_VERSION = 0,
89 | STARTUP_MODE,
90 | BAUD_RATE,
91 | PTERM,
92 | ITERM,
93 | FF1TERM,
94 | FF2TERM,
95 | CL1TERM,
96 | CL2TERM,
97 | CL3TERM,
98 | CL4TERM,
99 | CL5TERM,
100 | SHUNT_RESISTANCE,
101 | MIN_PERIOD,
102 | MAX_PERIOD,
103 | BLANKING_MICROS,
104 | ADVANCE,
105 | START_VOLTAGE,
106 | GOOD_DETECTS_START,
107 | BAD_DETECTS_DISARM,
108 | MAX_CURRENT,
109 | SWITCH_FREQ,
110 | MOTOR_POLES,
111 | PWM_MIN_PERIOD,
112 | PWM_MAX_PERIOD,
113 | PWM_MIN_VALUE,
114 | PWM_LO_VALUE,
115 | PWM_HI_VALUE,
116 | PWM_MAX_VALUE,
117 | PWM_MIN_START,
118 | PWM_RPM_SCALE,
119 | FET_BRAKING,
120 | PNFAC,
121 | INFAC,
122 | THR1TERM,
123 | THR2TERM,
124 | START_ALIGN_TIME,
125 | START_ALIGN_VOLTAGE,
126 | START_STEPS_NUM,
127 | START_STEPS_PERIOD,
128 | START_STEPS_ACCEL,
129 | PWM_LOWPASS,
130 | RPM_MEAS_LP,
131 | SERVO_DUTY,
132 | SERVO_P,
133 | SERVO_D,
134 | SERVO_MAX_RATE,
135 | SERVO_SCALE,
136 | ESC_ID,
137 | DIRECTION,
138 | CONFIG_NUM_PARAMS
139 | };
140 |
141 | extern float p[CONFIG_NUM_PARAMS];
142 | extern const char *configParameterStrings[];
143 | extern const char *configFormatStrings[];
144 |
145 | extern void configInit(void);
146 | extern int configSetParam(char *param, float value);
147 | extern int configSetParamByID(int i, float value);
148 | extern int configGetId(char *param);
149 | extern float configGetParam(char *param);
150 | extern void configLoadDefault(void);
151 | extern void configReadFlash(void);
152 | extern int configWriteFlash(void);
153 |
154 | #endif
155 |
--------------------------------------------------------------------------------
/onboard/digital.c:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012 Bill Nesbitt
17 | */
18 |
19 | #include "digital.h"
20 | #include
21 |
22 | digitalPin *digitalInit(GPIO_TypeDef* port, const uint16_t pin) {
23 | digitalPin *p;
24 | uint16_t clock;
25 | GPIO_InitTypeDef GPIO_InitStructure;
26 |
27 | p = (digitalPin *)calloc(1, sizeof(digitalPin));
28 | p->port = port;
29 | p->pin = pin;
30 |
31 | digitalLo(p);
32 |
33 | GPIO_InitStructure.GPIO_Pin = pin;
34 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
35 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
36 | GPIO_Init(port, &GPIO_InitStructure);
37 |
38 | return p;
39 | }
40 |
41 | void digitalTogg(digitalPin *p) {
42 | if (digitalGet(p)) {
43 | digitalLo(p);
44 | }
45 | else {
46 | digitalHi(p);
47 | }
48 | }
49 |
--------------------------------------------------------------------------------
/onboard/digital.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012 Bill Nesbitt
17 | */
18 |
19 | #ifndef _DIGITAL_H
20 | #define _DIGITAL_H
21 |
22 | #include "stm32f10x_gpio.h"
23 |
24 | typedef struct {
25 | GPIO_TypeDef* port;
26 | uint16_t pin;
27 | } digitalPin;
28 |
29 | #define digitalHi(p) { p->port->BSRR = p->pin; }
30 | #define digitalLo(p) { p->port->BRR = p->pin; }
31 | #define digitalGet(p) ((p->port->ODR & p->pin) != 0)
32 |
33 | extern digitalPin *digitalInit(GPIO_TypeDef* port, const uint16_t pin);
34 | extern void digitalTogg(digitalPin *p);
35 |
36 | #endif
37 |
--------------------------------------------------------------------------------
/onboard/esc32_motor_db.xml:
--------------------------------------------------------------------------------
1 |
2 |
3 |
4 |
5 |
6 |
7 | 35.0
8 | +8.772974e-08
9 | +1.195871e-03
10 | -2.534735e-01
11 | +1.213829e-03
12 | +6.616300e-02
13 | -5.980994e-05
14 | +5.675677e-01
15 |
16 |
17 |
18 |
19 | 15.0
20 | 6500
21 | +7.23870e-08
22 | +1.40690e-03
23 | -3.05210e-01
24 | +1.54300e-03
25 | -1.42560e-02
26 | -9.82150e-05
27 | +1.49340e+00
28 |
29 |
30 |
31 |
32 |
33 |
34 | 10.0
35 | +1.019580e-07
36 | +2.137348e-03
37 | +3.114897e-01
38 | +1.840782e-03
39 | -7.671915e-02
40 | -5.943240e-05
41 | +1.566824e+00
42 |
43 |
44 | 10.0
45 | +1.460333e-07
46 | +2.027514e-03
47 | +4.384707e-01
48 | +1.895964e-03
49 | +2.488202e-01
50 | -7.540044e-05
51 | +8.006618e-01
52 |
53 |
54 |
55 |
56 | 6.0
57 | 12
58 | +2.136259e-08
59 | +7.304788e-04
60 | +2.173815e-01
61 | +7.996285e-04
62 | +8.779305e-02
63 | -4.019083e-05
64 | +8.509188e-01
65 |
66 |
67 |
68 |
69 |
70 |
71 | 20.0
72 | 5500
73 | +1.998525e-07
74 | +9.514660e-04
75 | -2.301245e-02
76 | +1.381919e-03
77 | +2.570513e-01
78 | -1.064467e-04
79 | +5.656897e-01
80 |
81 |
82 | 20.0
83 | 7500
84 | +1.028551e-07
85 | +9.977381e-04
86 | -8.272934e-01
87 | +1.385665e-03
88 | +1.335600e-01
89 | -9.868111e-05
90 | +1.173475e+00
91 |
92 |
93 | 20.0
94 | 8125
95 | +7.562404e-08
96 | +1.116254e-03
97 | -7.778534e-01
98 | +1.385586e-03
99 | +1.559464e-01
100 | -9.598113e-05
101 | +1.091966e+00
102 |
103 |
104 |
105 |
106 |
107 |
108 | 20000
109 | 200
110 | 100
111 | 17
112 | 10.0
113 | 5000
114 | +9.449307e-08
115 | +2.556443e-03
116 | +1.353720e-01
117 | +2.302556e-03
118 | -2.770898e-01
119 | +1.107677e-05
120 | +2.404868e+00
121 |
122 |
123 | 20000
124 | 200
125 | 100
126 | 17
127 | 15.0
128 | 4250
129 | +2.165036e-07
130 | +2.485475e-03
131 | +1.403958e-01
132 | +2.495625e-03
133 | -5.423037e-02
134 | -7.705004e-05
135 | +1.808430e+00
136 |
137 |
138 |
139 |
140 |
141 |
142 | 10.0
143 | 4200
144 | +1.663210e-07
145 | +3.019136e-03
146 | +4.023476e-01
147 | +2.972955e-03
148 | +3.942016e-01
149 | -2.607788e-04
150 | +1.195345e+00
151 |
152 |
153 |
154 |
155 |
156 |
157 | 10.0
158 | 6600
159 | +7.758036e-08
160 | +1.346518e-03
161 | +1.185998e-01
162 | +1.101180e-03
163 | +1.036849e-02
164 | -2.339198e-05
165 | +1.565325e+00
166 |
167 |
168 | 10.0
169 | 6600
170 | +6.602521e-08
171 | +1.307364e-03
172 | +1.083585e-01
173 | +1.118480e-03
174 | +2.000165e-02
175 | -1.675907e-05
176 | +1.547213e+00
177 |
178 |
179 |
180 |
181 | 20.0
182 | 7000
183 | +7.301604e-08
184 | +1.667140e-03
185 | +4.536045e-02
186 | +1.691868e-03
187 | -2.397337e-03
188 | +1.556321e-05
189 | +9.611021e-01
190 |
191 |
192 |
193 |
194 | 10.0
195 | 6200
196 | 100
197 | 14000
198 | 25
199 | +9.734515e-08
200 | +1.589849e-03
201 | +2.300860e-01
202 | +1.581854e-03
203 | +5.800640e-02
204 | -3.426343e-05
205 | +1.271708e+00
206 |
207 |
208 | 10.0
209 | 6100
210 | 100
211 | 14000
212 | 25
213 | +1.183632e-07
214 | +1.477731e-03
215 | +1.261536e-01
216 | +1.579525e-03
217 | +5.392267e-02
218 | -2.659491e-05
219 | +1.263762e+00
220 |
221 |
222 | 10.0
223 | 7950
224 | 100
225 | 14000
226 | 25
227 | +3.678492e-08
228 | +1.656601e-03
229 | +3.146093e-01
230 | +1.472405e-03
231 | +1.595022e-02
232 | +2.831727e-05
233 | +1.038860e+00
234 |
235 |
236 |
237 |
238 | 10
239 | 25.0
240 | 7500
241 | +8.498902e-08
242 | +1.126556e-03
243 | +2.040018e-01
244 | +1.129195e-03
245 | +3.933982e-02
246 | -5.343935e-06
247 | +6.620063e-01
248 |
249 |
250 | 18
251 | 23.0
252 | 7000
253 | +7.512378e-08
254 | +1.121156e-03
255 | -1.413776e-01
256 | +1.055844e-03
257 | +1.053012e-02
258 | -8.059445e-06
259 | +9.456392e-01
260 |
261 |
262 |
263 |
264 | 10.0
265 | 16000.0
266 | 4350
267 | +1.190631e-07
268 | +2.687355e-03
269 | +5.183657e-01
270 | +2.347639e-03
271 | -8.685792e-02
272 | -1.931206e-05
273 | +1.930235e+00
274 |
275 |
276 |
277 |
278 | 22
279 | 12
280 | 7000
281 | +4.924490e-08
282 | +1.373310e-03
283 | +2.400780e-01
284 | +1.383540e-03
285 | +6.149200e-02
286 | -4.208620e-05
287 | +6.567950e-01
288 |
289 |
290 |
291 |
292 | 15
293 | 20
294 | 7200
295 | +5.250750e-08
296 | +1.124310e-03
297 | +1.049690e-01
298 | +1.158580e-03
299 | -1.348010e-02
300 | -5.932490e-05
301 | +1.367210e-00
302 |
303 |
304 |
305 |
306 | 15
307 | 14
308 | 9200
309 | +3.295050e-08
310 | +1.273700e-03
311 | -2.297530e-01
312 | +1.258860e-03
313 | -1.458170e-02
314 | -5.223090e-05
315 | +1.782100e+00
316 |
317 |
318 | 15
319 | 13
320 | 8500
321 | +4.700510e-08
322 | +1.294790e-03
323 | -1.230870e-01
324 | +1.209810e-03
325 | -1.980290e-02
326 | -3.493110e-05
327 | +1.714650e+00
328 |
329 |
330 |
331 |
332 |
333 |
334 | 7
335 | 12
336 | 7200
337 | +8.082689e-08
338 | +1.005266e-03
339 | +5.575571e-01
340 | +8.891050e-04
341 | +8.414046e-03
342 | +6.982315e-05
343 | +1.649058e+00
344 |
345 |
346 |
347 |
348 | 12
349 | 8300
350 | +5.692156e-08
351 | +9.534656e-04
352 | +5.448056e-01
353 | +8.343962e-04
354 | +6.809063e-02
355 | +4.156192e-05
356 | +1.031123e+00
357 |
358 |
359 |
360 |
361 |
--------------------------------------------------------------------------------
/onboard/fet.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012, 2013 Bill Nesbitt
17 | */
18 |
19 | #ifndef _FET_H
20 | #define _FET_H
21 |
22 | #include "stm32f10x_gpio.h"
23 |
24 | #define FET_A_L_PORT GPIOA
25 | #define FET_B_L_PORT GPIOB
26 | #define FET_C_L_PORT GPIOB
27 | #define FET_A_H_PORT GPIOB
28 | #define FET_B_H_PORT GPIOB
29 | #define FET_C_H_PORT GPIOB
30 |
31 | #define FET_A_L_PIN GPIO_Pin_7
32 | #define FET_B_L_PIN GPIO_Pin_0
33 | #define FET_C_L_PIN GPIO_Pin_1
34 | #define FET_A_H_PIN GPIO_Pin_6
35 | #define FET_B_H_PIN GPIO_Pin_7
36 | #define FET_C_H_PIN GPIO_Pin_8
37 |
38 | #define AL_ON FET_A_L_PIN
39 | #define BL_ON FET_B_L_PIN
40 | #define CL_ON FET_C_L_PIN
41 | #define AL_OFF (FET_A_L_PIN<<16)
42 | #define BL_OFF (FET_B_L_PIN<<16)
43 | #define CL_OFF (FET_C_L_PIN<<16)
44 |
45 | #define AH_ON FET_A_H_PIN
46 | #define BH_ON FET_B_H_PIN
47 | #define CH_ON FET_C_H_PIN
48 | #define AH_OFF (FET_A_H_PIN<<16)
49 | #define BH_OFF (FET_B_H_PIN<<16)
50 | #define CH_OFF (FET_C_H_PIN<<16)
51 |
52 |
53 | #define FET_A_L_OFF FET_A_L_PORT->BSRR = AL_OFF
54 | #define FET_B_L_OFF FET_B_L_PORT->BSRR = BL_OFF
55 | #define FET_C_L_OFF FET_C_L_PORT->BSRR = CL_OFF
56 |
57 | #define FET_A_H_OFF FET_A_H_PORT->BSRR = AH_OFF
58 | #define FET_B_H_OFF FET_B_H_PORT->BSRR = BH_OFF
59 | #define FET_C_H_OFF FET_C_H_PORT->BSRR = CH_OFF
60 |
61 | #define FET_A_L_ON FET_A_L_PORT->BSRR = AL_ON
62 | #define FET_B_L_ON FET_B_L_PORT->BSRR = BL_ON
63 | #define FET_C_L_ON FET_C_L_PORT->BSRR = CL_ON
64 |
65 | #define FET_A_H_ON FET_A_H_PORT->BSRR = AH_ON
66 | #define FET_B_H_ON FET_B_H_PORT->BSRR = BH_ON
67 | #define FET_C_H_ON FET_C_H_PORT->BSRR = CH_ON
68 |
69 | // bit band address turn switch on or off PWM output
70 | // HI side
71 | #define AH_BITBAND ((uint32_t *)(0x42000000 + (0x10C00*32) + (27*4)))
72 | #define BH_BITBAND ((uint32_t *)(0x42000000 + (0x10C00*32) + (31*4)))
73 | #define CH_BITBAND ((uint32_t *)(0x42000000 + (0x10C04*32) + (3*4)))
74 | // LO side
75 | #define AL_BITBAND ((uint32_t *)(0x42000000 + (0x10800*32) + (31*4)))
76 | #define BL_BITBAND ((uint32_t *)(0x42000000 + (0x10C00*32) + (3*4)))
77 | #define CL_BITBAND ((uint32_t *)(0x42000000 + (0x10C00*32) + (7*4)))
78 |
79 | #define FET_MASTER_TIMER TIM3
80 | #define FET_MASTER_DBGMCU_STOP DBGMCU_TIM3_STOP
81 |
82 | #define FET_H_TIMER TIM4
83 | #define FET_H_TIMER_REMAP
84 | #define FET_H_TIMER_MASTER TIM_TS_ITR2 // TIM3
85 | #define FET_DBGMCU_STOP DBGMCU_TIM4_STOP
86 | #define FET_AHB_FREQ (SystemCoreClock/2) // 36Mhz
87 |
88 | // HI side timer channels
89 | #define FET_A_H_CHANNEL CCR1
90 | #define FET_B_H_CHANNEL CCR2
91 | #define FET_C_H_CHANNEL CCR3
92 |
93 | // LO side timer channels
94 | #define FET_A_L_CHANNEL CCR2
95 | #define FET_B_L_CHANNEL CCR3
96 | #define FET_C_L_CHANNEL CCR4
97 |
98 | // Servo stuff
99 | #define FET_DEADTIME 18 // 36Mhz clock ticks
100 | #define FET_SERVO_RESOLUTION 1024
101 | #ifndef M_PI
102 | #define M_PI 3.14159265f
103 | #endif
104 |
105 | #define FET_MIN_SWITCH_FREQ 4 // KHz
106 | #define FET_MAX_SWITCH_FREQ 64 // KHz
107 | #define FET_MIN_START_VOLTAGE 0.1 // %
108 | #define FET_MAX_START_VOLTAGE 3.0 // %
109 | #define FET_MIN_START_DETECTS 1
110 | #define FET_MAX_START_DETECTS 512
111 | #define FET_MIN_DISARM_DETECTS 1
112 | #define FET_MAX_DISARM_DETECTS 512
113 | #define FET_MIN_LIMIT_STEP 0.1 // %
114 | #define FET_MAX_LIMIT_STEP 100.0 // %
115 |
116 | #define FET_PANIC { \
117 | *AH_BITBAND = 0; \
118 | *BH_BITBAND = 0; \
119 | *CH_BITBAND = 0; \
120 | FET_A_L_PORT->BSRR = AL_OFF; \
121 | FET_B_L_PORT->BSRR = BL_OFF; \
122 | FET_C_L_PORT->BSRR = CL_OFF; \
123 | }
124 |
125 | enum fetSelfTestResults {
126 | FET_TEST_NOT_RUN = 0,
127 | FET_TEST_PASSED,
128 | FET_TEST_A_LO_FAIL,
129 | FET_TEST_B_LO_FAIL,
130 | FET_TEST_C_LO_FAIL,
131 | FET_TEST_A_HI_FAIL,
132 | FET_TEST_B_HI_FAIL,
133 | FET_TEST_C_HI_FAIL
134 | };
135 |
136 | extern int32_t fetSwitchFreq;
137 | extern int32_t fetStartDuty;
138 | extern int16_t fetStartDetects;
139 | extern int16_t fetDisarmDetects;
140 |
141 | extern volatile uint8_t fetStep;
142 | extern volatile int8_t fetNextStep;
143 | extern volatile uint32_t fetBadDetects;
144 | extern volatile uint32_t fetGoodDetects;
145 | extern volatile uint32_t fetTotalBadDetects;
146 | extern int32_t fetActualDutyCycle;
147 | extern volatile int32_t fetDutyCycle;
148 | extern int32_t fetPeriod;
149 | extern volatile uint32_t fetCommutationMicros;
150 | extern int8_t fetBrakingEnabled;
151 | extern int8_t fetBraking;
152 | extern int8_t fetStepDir;
153 | extern float servoAngle;
154 |
155 | extern void fetInit(void);
156 | extern uint8_t fetSelfTest(void);
157 | extern void fetBeep(uint16_t freq, uint16_t duration);
158 | extern void fetCommutate(int unused);
159 | extern void fetSetStep(int n);
160 | extern void fetSetDutyCycle(int32_t dutyCycle);
161 | extern void motorStartSeqInit (void);
162 | extern void motorStartSeq (int period);
163 | extern void fetStartCommutation(uint8_t startStep);
164 | extern void fetSetConstants(void);
165 | extern void fetSetBraking(int8_t value);
166 | extern void _fetSetDutyCycle(int32_t dutyCycle);
167 | extern void fetSetAngleFromPwm(int32_t pwm);
168 | extern void fetSetAngle(float angle);
169 | extern void fetUpdateServo(void);
170 |
171 | #endif
172 |
--------------------------------------------------------------------------------
/onboard/getbuildnum.c:
--------------------------------------------------------------------------------
1 | #include "getbuildnum.h"
2 | #include "buildnum.h"
3 |
4 | unsigned getBuildNumber() {
5 | return BUILDNUMBER;
6 | }
--------------------------------------------------------------------------------
/onboard/getbuildnum.h:
--------------------------------------------------------------------------------
1 | #ifndef GETBUILDNUM_H
2 | #define GETBUILDNUM_H
3 |
4 | extern unsigned getBuildNumber();
5 |
6 | #endif
--------------------------------------------------------------------------------
/onboard/incbuild.js:
--------------------------------------------------------------------------------
1 | function incbuild() {
2 | var file = "buildnum.h";
3 | var text = "#define BUILDNUMBER ";
4 | var s = CWSys.readStringFromFile(file);
5 | var n;
6 | if (s == undefined)
7 | n = 1;
8 | else
9 | n = eval(s.substring(text.length)) + 1;
10 | CWSys.writeStringToFile(file, text + n);
11 | }
12 |
--------------------------------------------------------------------------------
/onboard/main.c:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012, 2013 Bill Nesbitt
17 | */
18 |
19 | #include "main.h"
20 | #include "rcc.h"
21 | #include "config.h"
22 | #include "timer.h"
23 | #include "fet.h"
24 | #include "serial.h"
25 | #include "pwm.h"
26 | #include "adc.h"
27 | #include "run.h"
28 | #include "cli.h"
29 | #include "binary.h"
30 | #include "ow.h"
31 | #include "can.h"
32 |
33 | digitalPin *errorLed, *statusLed;
34 | #ifdef ESC_DEBUG
35 | digitalPin *tp;
36 | #endif
37 |
38 | volatile uint32_t minCycles, idleCounter, totalCycles;
39 | volatile uint8_t state, inputMode;
40 |
41 | char buf[64];
42 |
43 | void main(void) {
44 | rccInit();
45 |
46 | statusLed = digitalInit(GPIO_STATUS_LED_PORT, GPIO_STATUS_LED_PIN);
47 | errorLed = digitalInit(GPIO_ERROR_LED_PORT, GPIO_ERROR_LED_PIN);
48 | #ifdef ESC_DEBUG
49 | tp = digitalInit(GPIO_TP_PORT, GPIO_TP_PIN);
50 | digitalLo(tp);
51 | #endif
52 |
53 | timerInit();
54 | configInit();
55 | adcInit();
56 | fetInit();
57 | serialInit();
58 | canInit();
59 | runInit();
60 | cliInit();
61 | owInit();
62 |
63 | runDisarm(REASON_STARTUP);
64 | inputMode = ESC_INPUT_PWM;
65 |
66 | fetSetDutyCycle(0);
67 | fetBeep(200, 100);
68 | fetBeep(300, 100);
69 | fetBeep(400, 100);
70 | fetBeep(500, 100);
71 | fetBeep(400, 100);
72 | fetBeep(300, 100);
73 | fetBeep(200, 100);
74 |
75 | pwmInit();
76 |
77 | digitalHi(statusLed);
78 | digitalHi(errorLed);
79 |
80 | // self calibrating idle timer loop
81 | {
82 | uint32_t lastRunCount;
83 | uint32_t thisCycles, lastCycles;
84 | volatile uint32_t cycles;
85 | volatile uint32_t *DWT_CYCCNT = (uint32_t *)0xE0001004;
86 | volatile uint32_t *DWT_CONTROL = (uint32_t *)0xE0001000;
87 | volatile uint32_t *SCB_DEMCR = (uint32_t *)0xE000EDFC;
88 |
89 | *SCB_DEMCR = *SCB_DEMCR | 0x01000000;
90 | *DWT_CONTROL = *DWT_CONTROL | 1; // enable the counter
91 |
92 | minCycles = 0xffff;
93 | while (1) {
94 | idleCounter++;
95 |
96 | if (runCount != lastRunCount && !(runCount % (RUN_FREQ / 1000))) {
97 | if (commandMode == CLI_MODE)
98 | cliCheck();
99 | else
100 | binaryCheck();
101 | lastRunCount = runCount;
102 | }
103 |
104 | thisCycles = *DWT_CYCCNT;
105 | cycles = thisCycles - lastCycles;
106 | lastCycles = thisCycles;
107 |
108 | // record shortest number of instructions for loop
109 | totalCycles += cycles;
110 | if (cycles < minCycles)
111 | minCycles = cycles;
112 | }
113 | }
114 | }
115 |
116 | #ifdef USE_FULL_ASSERT
117 | void assert_failed(uint8_t* file, uint32_t line) {
118 | /* User can add his own implementation to report the file name and line number,
119 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
120 |
121 | while (1) {
122 | NOP;
123 | }
124 | }
125 | #endif
126 |
127 | void HardFault_Handler(void) {
128 | FET_PANIC;
129 | while (1)
130 | ;
131 | }
132 |
133 | void MemManage_Handler(void) {
134 | FET_PANIC;
135 | while (1)
136 | ;
137 | }
138 |
139 | void BusFault_Handler(void) {
140 | FET_PANIC;
141 | while (1)
142 | ;
143 | }
144 |
145 | void UsageFault_Handler(void) {
146 | FET_PANIC;
147 | while (1)
148 | ;
149 | }
150 |
151 | void reset_wait(void) {
152 | FET_PANIC;
153 | while (1)
154 | ;
155 | }
156 |
157 |
158 |
--------------------------------------------------------------------------------
/onboard/main.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012, 2013 Bill Nesbitt
17 | */
18 |
19 | #ifndef _MAIN_H
20 | #define _MAIN_H
21 |
22 | #define VERSION "2.1.0"
23 |
24 | #include "digital.h"
25 |
26 | #define ESC_DEBUG // uncomment to include debugging code
27 |
28 | #define GPIO_ERROR_LED_PORT GPIOB
29 | #define GPIO_ERROR_LED_PIN GPIO_Pin_4
30 | #define GPIO_STATUS_LED_PORT GPIOB
31 | #define GPIO_STATUS_LED_PIN GPIO_Pin_3
32 | #define GPIO_TP_PORT GPIOB
33 | #define GPIO_TP_PIN GPIO_Pin_15
34 |
35 | #define NOP {__asm volatile ("nop\n\t");}
36 | #define NOPS_4 {NOP; NOP; NOP; NOP;}
37 |
38 | enum escStates {
39 | ESC_STATE_DISARMED = 0,
40 | ESC_STATE_STOPPED,
41 | ESC_STATE_NOCOMM,
42 | ESC_STATE_STARTING,
43 | ESC_STATE_RUNNING
44 | };
45 |
46 | enum escInputModes {
47 | ESC_INPUT_PWM = 0,
48 | ESC_INPUT_UART,
49 | ESC_INPUT_I2C,
50 | ESC_INPUT_CAN,
51 | ESC_INPUT_OW,
52 | ESC_INPUT_MAX
53 | };
54 |
55 | enum escDisarmReasons {
56 | REASON_STARTUP = 0,
57 | REASON_BAD_DETECTS,
58 | REASON_CROSSING_TIMEOUT,
59 | REASON_PWM_TIMEOUT,
60 | REASON_LOW_VOLTAGE,
61 | REASON_CLI_USER,
62 | REASON_BINARY_USER,
63 | REASON_CAN_USER,
64 | REASON_CAN_TIMEOUT
65 | };
66 |
67 | extern digitalPin *errorLed, *statusLed, *tp;
68 | extern volatile uint32_t minCycles, idleCounter, totalCycles;
69 | extern volatile uint8_t state, inputMode;
70 |
71 | extern void escRun(void);
72 |
73 | #endif
74 |
--------------------------------------------------------------------------------
/onboard/misc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file misc.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the miscellaneous firmware functions (add-on
8 | * to CMSIS functions).
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Includes ------------------------------------------------------------------*/
24 | #include "misc.h"
25 |
26 | /** @addtogroup STM32F10x_StdPeriph_Driver
27 | * @{
28 | */
29 |
30 | /** @defgroup MISC
31 | * @brief MISC driver modules
32 | * @{
33 | */
34 |
35 | /** @defgroup MISC_Private_TypesDefinitions
36 | * @{
37 | */
38 |
39 | /**
40 | * @}
41 | */
42 |
43 | /** @defgroup MISC_Private_Defines
44 | * @{
45 | */
46 |
47 | #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
48 | /**
49 | * @}
50 | */
51 |
52 | /** @defgroup MISC_Private_Macros
53 | * @{
54 | */
55 |
56 | /**
57 | * @}
58 | */
59 |
60 | /** @defgroup MISC_Private_Variables
61 | * @{
62 | */
63 |
64 | /**
65 | * @}
66 | */
67 |
68 | /** @defgroup MISC_Private_FunctionPrototypes
69 | * @{
70 | */
71 |
72 | /**
73 | * @}
74 | */
75 |
76 | /** @defgroup MISC_Private_Functions
77 | * @{
78 | */
79 |
80 | /**
81 | * @brief Configures the priority grouping: pre-emption priority and subpriority.
82 | * @param NVIC_PriorityGroup: specifies the priority grouping bits length.
83 | * This parameter can be one of the following values:
84 | * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
85 | * 4 bits for subpriority
86 | * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
87 | * 3 bits for subpriority
88 | * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
89 | * 2 bits for subpriority
90 | * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
91 | * 1 bits for subpriority
92 | * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
93 | * 0 bits for subpriority
94 | * @retval None
95 | */
96 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
97 | {
98 | /* Check the parameters */
99 | assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
100 |
101 | /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
102 | SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
103 | }
104 |
105 | /**
106 | * @brief Initializes the NVIC peripheral according to the specified
107 | * parameters in the NVIC_InitStruct.
108 | * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
109 | * the configuration information for the specified NVIC peripheral.
110 | * @retval None
111 | */
112 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
113 | {
114 | uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
115 |
116 | /* Check the parameters */
117 | assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
118 | assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
119 | assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
120 |
121 | if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
122 | {
123 | /* Compute the Corresponding IRQ Priority --------------------------------*/
124 | tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
125 | tmppre = (0x4 - tmppriority);
126 | tmpsub = tmpsub >> tmppriority;
127 |
128 | tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
129 | tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
130 | tmppriority = tmppriority << 0x04;
131 |
132 | NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
133 |
134 | /* Enable the Selected IRQ Channels --------------------------------------*/
135 | NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
136 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
137 | }
138 | else
139 | {
140 | /* Disable the Selected IRQ Channels -------------------------------------*/
141 | NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
142 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
143 | }
144 | }
145 |
146 | /**
147 | * @brief Sets the vector table location and Offset.
148 | * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
149 | * This parameter can be one of the following values:
150 | * @arg NVIC_VectTab_RAM
151 | * @arg NVIC_VectTab_FLASH
152 | * @param Offset: Vector Table base offset field. This value must be a multiple
153 | * of 0x200.
154 | * @retval None
155 | */
156 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
157 | {
158 | /* Check the parameters */
159 | assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
160 | assert_param(IS_NVIC_OFFSET(Offset));
161 |
162 | SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
163 | }
164 |
165 | /**
166 | * @brief Selects the condition for the system to enter low power mode.
167 | * @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
168 | * This parameter can be one of the following values:
169 | * @arg NVIC_LP_SEVONPEND
170 | * @arg NVIC_LP_SLEEPDEEP
171 | * @arg NVIC_LP_SLEEPONEXIT
172 | * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
173 | * @retval None
174 | */
175 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
176 | {
177 | /* Check the parameters */
178 | assert_param(IS_NVIC_LP(LowPowerMode));
179 | assert_param(IS_FUNCTIONAL_STATE(NewState));
180 |
181 | if (NewState != DISABLE)
182 | {
183 | SCB->SCR |= LowPowerMode;
184 | }
185 | else
186 | {
187 | SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
188 | }
189 | }
190 |
191 | /**
192 | * @brief Configures the SysTick clock source.
193 | * @param SysTick_CLKSource: specifies the SysTick clock source.
194 | * This parameter can be one of the following values:
195 | * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
196 | * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
197 | * @retval None
198 | */
199 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
200 | {
201 | /* Check the parameters */
202 | assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
203 | if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
204 | {
205 | SysTick->CTRL |= SysTick_CLKSource_HCLK;
206 | }
207 | else
208 | {
209 | SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
210 | }
211 | }
212 |
213 | /**
214 | * @}
215 | */
216 |
217 | /**
218 | * @}
219 | */
220 |
221 | /**
222 | * @}
223 | */
224 |
225 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
226 |
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/onboard/misc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file misc.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the miscellaneous
8 | * firmware library functions (add-on to CMSIS functions).
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __MISC_H
25 | #define __MISC_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup MISC
39 | * @{
40 | */
41 |
42 | /** @defgroup MISC_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @brief NVIC Init Structure definition
48 | */
49 |
50 | typedef struct
51 | {
52 | uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
53 | This parameter can be a value of @ref IRQn_Type
54 | (For the complete STM32 Devices IRQ Channels list, please
55 | refer to stm32f10x.h file) */
56 |
57 | uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel
58 | specified in NVIC_IRQChannel. This parameter can be a value
59 | between 0 and 15 as described in the table @ref NVIC_Priority_Table */
60 |
61 | uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified
62 | in NVIC_IRQChannel. This parameter can be a value
63 | between 0 and 15 as described in the table @ref NVIC_Priority_Table */
64 |
65 | FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
66 | will be enabled or disabled.
67 | This parameter can be set either to ENABLE or DISABLE */
68 | } NVIC_InitTypeDef;
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /** @defgroup NVIC_Priority_Table
75 | * @{
76 | */
77 |
78 | /**
79 | @code
80 | The table below gives the allowed values of the pre-emption priority and subpriority according
81 | to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
82 | ============================================================================================================================
83 | NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
84 | ============================================================================================================================
85 | NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority
86 | | | | 4 bits for subpriority
87 | ----------------------------------------------------------------------------------------------------------------------------
88 | NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority
89 | | | | 3 bits for subpriority
90 | ----------------------------------------------------------------------------------------------------------------------------
91 | NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
92 | | | | 2 bits for subpriority
93 | ----------------------------------------------------------------------------------------------------------------------------
94 | NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
95 | | | | 1 bits for subpriority
96 | ----------------------------------------------------------------------------------------------------------------------------
97 | NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority
98 | | | | 0 bits for subpriority
99 | ============================================================================================================================
100 | @endcode
101 | */
102 |
103 | /**
104 | * @}
105 | */
106 |
107 | /** @defgroup MISC_Exported_Constants
108 | * @{
109 | */
110 |
111 | /** @defgroup Vector_Table_Base
112 | * @{
113 | */
114 |
115 | #define NVIC_VectTab_RAM ((uint32_t)0x20000000)
116 | #define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
117 | #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
118 | ((VECTTAB) == NVIC_VectTab_FLASH))
119 | /**
120 | * @}
121 | */
122 |
123 | /** @defgroup System_Low_Power
124 | * @{
125 | */
126 |
127 | #define NVIC_LP_SEVONPEND ((uint8_t)0x10)
128 | #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
129 | #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
130 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
131 | ((LP) == NVIC_LP_SLEEPDEEP) || \
132 | ((LP) == NVIC_LP_SLEEPONEXIT))
133 | /**
134 | * @}
135 | */
136 |
137 | /** @defgroup Preemption_Priority_Group
138 | * @{
139 | */
140 |
141 | #define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
142 | 4 bits for subpriority */
143 | #define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
144 | 3 bits for subpriority */
145 | #define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
146 | 2 bits for subpriority */
147 | #define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
148 | 1 bits for subpriority */
149 | #define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
150 | 0 bits for subpriority */
151 |
152 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
153 | ((GROUP) == NVIC_PriorityGroup_1) || \
154 | ((GROUP) == NVIC_PriorityGroup_2) || \
155 | ((GROUP) == NVIC_PriorityGroup_3) || \
156 | ((GROUP) == NVIC_PriorityGroup_4))
157 |
158 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
159 |
160 | #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
161 |
162 | #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF)
163 |
164 | /**
165 | * @}
166 | */
167 |
168 | /** @defgroup SysTick_clock_source
169 | * @{
170 | */
171 |
172 | #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
173 | #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
174 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
175 | ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
176 | /**
177 | * @}
178 | */
179 |
180 | /**
181 | * @}
182 | */
183 |
184 | /** @defgroup MISC_Exported_Macros
185 | * @{
186 | */
187 |
188 | /**
189 | * @}
190 | */
191 |
192 | /** @defgroup MISC_Exported_Functions
193 | * @{
194 | */
195 |
196 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
197 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
198 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
199 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
200 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
201 |
202 | #ifdef __cplusplus
203 | }
204 | #endif
205 |
206 | #endif /* __MISC_H */
207 |
208 | /**
209 | * @}
210 | */
211 |
212 | /**
213 | * @}
214 | */
215 |
216 | /**
217 | * @}
218 | */
219 |
220 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
221 |
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/onboard/ow.c:
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https://raw.githubusercontent.com/bn999/esc32/bde2b333530e894c92ece2a92454ee13c96a544c/onboard/ow.c
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/onboard/ow.h:
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https://raw.githubusercontent.com/bn999/esc32/bde2b333530e894c92ece2a92454ee13c96a544c/onboard/ow.h
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/onboard/pwm.c:
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1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012 Bill Nesbitt
17 | */
18 |
19 | #include "pwm.h"
20 | #include "timer.h"
21 | #include "run.h"
22 | #include "main.h"
23 | #include "ow.h"
24 | #include "stm32f10x_gpio.h"
25 | #include "stm32f10x_tim.h"
26 | #include "misc.h"
27 |
28 | int16_t pwmMinPeriod;
29 | int16_t pwmMaxPeriod;
30 | int16_t pwmMinValue;
31 | int16_t pwmLoValue;
32 | int16_t pwmHiValue;
33 | int16_t pwmMaxValue;
34 | int16_t pwmMinStart;
35 | volatile uint32_t pwmValidMicros;
36 |
37 | inline void pwmIsrAllOff(void) {
38 | PWM_TIM->DIER &= (uint16_t)~(TIM_IT_CC1 | TIM_IT_CC2);
39 | }
40 |
41 | inline void pwmIsrAllOn(void) {
42 | PWM_TIM->CCR1;
43 | PWM_TIM->CCR2;
44 | PWM_TIM->DIER |= (TIM_IT_CC1 | TIM_IT_CC2);
45 | }
46 |
47 | inline void pwmIsrRunOn(void) {
48 | uint16_t dier = PWM_TIM->DIER;
49 |
50 | dier &= (uint16_t)~(TIM_IT_CC1 | TIM_IT_CC2);
51 | dier |= TIM_IT_CC2;
52 |
53 | PWM_TIM->CCR1;
54 | PWM_TIM->CCR2;
55 | PWM_TIM->DIER = dier;
56 | }
57 |
58 | void pwmInit(void) {
59 | GPIO_InitTypeDef GPIO_InitStructure;
60 | NVIC_InitTypeDef NVIC_InitStructure;
61 | TIM_ICInitTypeDef TIM_ICInitStructure;
62 | TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
63 |
64 | pwmSetConstants();
65 |
66 | // TIM1 channel 1 pin (PA.08) configuration
67 | GPIO_InitStructure.GPIO_Pin = PWM_PIN;
68 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
69 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
70 | GPIO_Init(PWM_PORT, &GPIO_InitStructure);
71 |
72 | // Enable the TIM1 global Interrupt
73 | NVIC_InitStructure.NVIC_IRQChannel = PWM_IRQ;
74 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
75 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
76 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
77 | NVIC_Init(&NVIC_InitStructure);
78 |
79 | TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
80 | TIM_TimeBaseStructure.TIM_Prescaler = (PWM_CLK_DIVISOR-1);
81 | TIM_TimeBaseStructure.TIM_Period = 0xffff;
82 | TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
83 | TIM_TimeBaseInit(PWM_TIM, &TIM_TimeBaseStructure);
84 |
85 | TIM_ICInitStructure.TIM_Channel = PWM_CHANNEL;
86 | TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
87 | TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;
88 | TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;
89 | TIM_ICInitStructure.TIM_ICFilter = 0x08;
90 | TIM_PWMIConfig(PWM_TIM, &TIM_ICInitStructure);
91 |
92 | // Select the TIM Input Trigger: TI1FP1
93 | TIM_SelectInputTrigger(PWM_TIM, TIM_TS_TI1FP1);
94 |
95 | // Select the slave Mode: Reset Mode
96 | TIM_SelectSlaveMode(PWM_TIM, TIM_SlaveMode_Reset);
97 |
98 | // Enable the Master/Slave Mode
99 | TIM_SelectMasterSlaveMode(PWM_TIM, TIM_MasterSlaveMode_Enable);
100 |
101 | // TIM enable counter
102 | TIM_Cmd(PWM_TIM, ENABLE);
103 |
104 | pwmIsrAllOn();
105 | }
106 |
107 | void PWM_IRQ_HANDLER(void) {
108 | uint16_t pwmValue;
109 | uint16_t periodValue;
110 | uint8_t edge;
111 |
112 | edge = !(PWM_TIM->SR & TIM_IT_CC2);
113 |
114 | periodValue = PWM_TIM->CCR1;
115 | pwmValue = PWM_TIM->CCR2;
116 |
117 | // is this an OW reset pulse?
118 | if (state == ESC_STATE_DISARMED && edge == 1 && (periodValue - pwmValue) > OW_RESET_MIN && (periodValue - pwmValue) < OW_RESET_MAX) {
119 | owReset();
120 | }
121 | // look for good RC PWM input
122 | else if (inputMode == ESC_INPUT_PWM && periodValue >= pwmMinPeriod && periodValue <= pwmMaxPeriod && pwmValue >= pwmMinValue && pwmValue <= pwmMaxValue) {
123 | if (edge == 0) {
124 | pwmValidMicros = timerMicros;
125 | runNewInput(pwmValue);
126 | }
127 | }
128 | // otherwise if already in OW mode, pass control to OW
129 | else if (inputMode == ESC_INPUT_OW) {
130 | owEdgeDetect(edge);
131 | }
132 | }
133 |
134 | void pwmSetConstants(void) {
135 | float rpmScale = p[PWM_RPM_SCALE];
136 |
137 | pwmMinPeriod = p[PWM_MIN_PERIOD] = (int)p[PWM_MIN_PERIOD];
138 | pwmMaxPeriod = p[PWM_MAX_PERIOD] = (int)p[PWM_MAX_PERIOD];
139 | pwmMinValue = p[PWM_MIN_VALUE] = (int)p[PWM_MIN_VALUE];
140 | pwmLoValue = p[PWM_LO_VALUE] = (int)p[PWM_LO_VALUE];
141 | pwmHiValue = p[PWM_HI_VALUE] = (int)p[PWM_HI_VALUE];
142 | pwmMaxValue = p[PWM_MAX_VALUE] = (int)p[PWM_MAX_VALUE];
143 | pwmMinStart = p[PWM_MIN_START] = (int)p[PWM_MIN_START];
144 |
145 | if (rpmScale < PWM_RPM_SCALE_MIN)
146 | rpmScale = PWM_RPM_SCALE_MIN;
147 | else if (rpmScale > PWM_RPM_SCALE_MAX)
148 | rpmScale = PWM_RPM_SCALE_MAX;
149 |
150 | p[PWM_RPM_SCALE] = rpmScale;
151 | }
--------------------------------------------------------------------------------
/onboard/pwm.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012 Bill Nesbitt
17 | */
18 |
19 | #ifndef _PWM_H
20 | #define _PWM_H
21 |
22 | #include "config.h"
23 | #include "stm32f10x_tim.h"
24 |
25 | #define PWM_PORT GPIOA
26 | #define PWM_PIN GPIO_Pin_8
27 |
28 | #define PWM_OUTPUT {PWM_PORT->CRH = (PWM_PORT->CRH & ~0x0f) | 0x03;}
29 | #define PWM_INPUT {PWM_PORT->CRH = (PWM_PORT->CRH & ~0x0f) | 0x04;}
30 | #define PWM_SAMPLE_LEVEL ((PWM_PORT->IDR & (0x01<<8))>>8)
31 |
32 | #define PWM_TIM TIM1
33 | #define PWM_CHANNEL TIM_Channel_1
34 | #define PWM_IRQ TIM1_CC_IRQn
35 | #define PWM_IRQ_HANDLER TIM1_CC_IRQHandler
36 | #define PWM_CLK_DIVISOR 72
37 |
38 | #define PWM_TIMEOUT (200000*TIMER_MULT) // micros that the last received PWM signal is valid for (0.2 seconds)
39 |
40 | #define PWM_RPM_SCALE_MIN 1000.0f
41 | #define PWM_RPM_SCALE_MAX 20000.0f
42 |
43 | extern int16_t pwmMinPeriod;
44 | extern int16_t pwmMaxPeriod;
45 | extern int16_t pwmMinValue;
46 | extern int16_t pwmLoValue;
47 | extern int16_t pwmHiValue;
48 | extern int16_t pwmMaxValue;
49 | extern int16_t pwmMinStart;
50 | extern volatile uint32_t pwmValidMicros;
51 | extern volatile uint16_t pwmValue;
52 |
53 | extern void pwmInit(void);
54 | extern void pwmSetConstants(void);
55 | extern void pwmIsrAllOff(void);
56 | extern void pwmIsrAllOn(void);
57 | extern void pwmIsrRunOn(void);
58 |
59 | #endif
60 |
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/onboard/rcc.c:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012, 2013 Bill Nesbitt
17 | */
18 |
19 | #include "rcc.h"
20 | #include "adc.h"
21 | #include "main.h"
22 | #include "digital.h"
23 | #include "stm32f10x_rcc.h"
24 |
25 | uint32_t rccReadBkpDr(void) {
26 | return *((uint16_t *)BKP_BASE + 0x04) | *((uint16_t *)BKP_BASE + 0x08)<<16;
27 | }
28 |
29 | void rccWriteBkpDr(uint32_t value) {
30 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
31 | PWR->CR |= PWR_CR_DBP;
32 |
33 | *((uint16_t *)BKP_BASE + 0x04) = value & 0xffff;
34 | *((uint16_t *)BKP_BASE + 0x08) = (value & 0xffff0000)>>16;
35 | }
36 |
37 | void rccBootLoader(void) {
38 | // check for magic cookie
39 | if (rccReadBkpDr() == 0xDECEA5ED) {
40 | digitalPin *statusLed, *errorLed;
41 |
42 | rccWriteBkpDr(0); // reset flag
43 |
44 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE);
45 | GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
46 |
47 | statusLed = digitalInit(GPIO_STATUS_LED_PORT, GPIO_STATUS_LED_PIN);
48 | digitalLo(statusLed);
49 | errorLed = digitalInit(GPIO_ERROR_LED_PORT, GPIO_ERROR_LED_PIN);
50 | digitalLo(errorLed);
51 |
52 | // jump to boot loader ROM
53 | __asm volatile ("LDR R0, =0x1FFFF000\n"
54 | "LDR SP,[R0, #0]\n"
55 | "LDR R0,[R0, #4]\n"
56 | "BX R0\n");
57 | }
58 | }
59 |
60 | void rccReset(void) {
61 | // set magic cookie
62 | rccWriteBkpDr(0xDECEA5ED);
63 |
64 | // Generate system reset
65 | SCB->AIRCR = AIRCR_VECTKEY_MASK | (uint32_t)0x04;
66 | }
67 |
68 | void rccInit(void) {
69 | GPIO_InitTypeDef GPIO_InitStructure;
70 |
71 | rccBootLoader();
72 |
73 | // turn on fault interrupts
74 | SCB->SHCSR |= (0x01<SHCSR |= (0x01<SHCSR |= (0x01<.
15 |
16 | Copyright © 2011, 2012 Bill Nesbitt
17 | */
18 |
19 | #ifndef _RCC_H
20 | #define _RCC_H
21 |
22 | #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
23 |
24 | extern void rccInit(void);
25 | extern void rccReset(void);
26 |
27 | #endif
28 |
--------------------------------------------------------------------------------
/onboard/run.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012, 2013 Bill Nesbitt
17 | */
18 |
19 | #ifndef _RUN_H
20 | #define _RUN_H
21 |
22 | #include "misc.h"
23 |
24 | #define RUN_FREQ 2000 // Hz
25 | #define RUN_ARM_COUNT 20 // number of valid PWM signals seen before arming
26 | #define RUN_MIN_MAX_CURRENT 0.0 // Amps
27 | #define RUN_MAX_MAX_CURRENT 75.0 // Amps
28 |
29 | //#define RUN_ENABLE_IWDG
30 | #define RUN_LSI_FREQ 40000 // 40 KHz LSI for IWDG
31 |
32 | enum runCommandModes {
33 | CLI_MODE = 0,
34 | BINARY_MODE
35 | };
36 |
37 | enum runModes {
38 | OPEN_LOOP = 0,
39 | CLOSED_LOOP_RPM,
40 | CLOSED_LOOP_THRUST,
41 | SERVO_MODE,
42 | NUM_RUN_MODES
43 | };
44 |
45 | extern volatile uint32_t runCount;
46 | extern float idlePercent;
47 | extern float avgAmps, maxAmps;
48 | extern float avgVolts;
49 | extern float rpm;
50 | extern float targetRpm;
51 | extern float runRPMFactor;
52 | extern uint8_t disarmReason;
53 | extern uint8_t commandMode;
54 | extern uint8_t escId;
55 | volatile extern uint8_t runMode;
56 |
57 | extern void runInit(void);
58 | extern void runNewInput(uint16_t setpoint);
59 | extern void runDisarm(int reason);
60 | extern void runArm(void);
61 | extern void runStart(void);
62 | extern void runStop(void);
63 | extern uint8_t runDuty(float duty);
64 | extern void runRpmPIDReset(void);
65 | extern void runSetConstants(void);
66 | extern uint16_t runIWDGInit(int ms);
67 | extern void runFeedIWDG(void);
68 | extern void runSetpoint(uint16_t val);
69 |
70 | #endif
71 |
--------------------------------------------------------------------------------
/onboard/serial.c:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012 Bill Nesbitt
17 | */
18 |
19 | #include "serial.h"
20 | #include "config.h"
21 | #include "stm32f10x_dma.h"
22 | #include "misc.h"
23 | #include
24 | #include
25 |
26 | serialPort_t serialPort;
27 |
28 | void serialStartTxDMA() {
29 | serialPort_t *s = &serialPort;
30 |
31 | SERIAL_TX_DMA->CMAR = (uint32_t)&s->txBuf[s->txTail];
32 | if (s->txHead > s->txTail) {
33 | SERIAL_TX_DMA->CNDTR = s->txHead - s->txTail;
34 | s->txTail = s->txHead;
35 | }
36 | else {
37 | SERIAL_TX_DMA->CNDTR = SERIAL_TX_BUFSIZE - s->txTail;
38 | s->txTail = 0;
39 | }
40 |
41 | DMA_Cmd(SERIAL_TX_DMA, ENABLE);
42 | }
43 |
44 | void serialWrite(int ch) {
45 | serialPort_t *s = &serialPort;
46 |
47 | s->txBuf[s->txHead] = ch;
48 | s->txHead = (s->txHead + 1) % SERIAL_TX_BUFSIZE;
49 |
50 | if (!(SERIAL_TX_DMA->CCR & 1))
51 | serialStartTxDMA();
52 | }
53 |
54 | unsigned char serialAvailable() {
55 | return (SERIAL_RX_DMA->CNDTR != serialPort.rxPos);
56 | }
57 |
58 | // only call after a affirmative return from serialAvailable()
59 | int serialRead() {
60 | serialPort_t *s = &serialPort;
61 | int ch;
62 |
63 | ch = s->rxBuf[SERIAL_RX_BUFSIZE - s->rxPos];
64 | if (--s->rxPos == 0)
65 | s->rxPos = SERIAL_RX_BUFSIZE;
66 |
67 | return ch;
68 | }
69 |
70 | void serialPrint(const char *str) {
71 | while (*str)
72 | serialWrite(*(str++));
73 | }
74 |
75 | void serialOpenPort(int baud) {
76 | USART_InitTypeDef USART_InitStructure;
77 |
78 | USART_InitStructure.USART_BaudRate = baud;
79 | USART_InitStructure.USART_WordLength = USART_WordLength_8b;
80 | USART_InitStructure.USART_StopBits = USART_StopBits_1;
81 | USART_InitStructure.USART_Parity = USART_Parity_No;
82 | USART_InitStructure.USART_HardwareFlowControl = SERIAL_FLOW_CONTROL;
83 | USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
84 | USART_Init(SERIAL_UART, &USART_InitStructure);
85 | }
86 |
87 | void serialInit(void) {
88 | GPIO_InitTypeDef GPIO_InitStructure;
89 | DMA_InitTypeDef DMA_InitStructure;
90 | NVIC_InitTypeDef NVIC_InitStructure;
91 | serialPort_t *s = &serialPort;
92 |
93 | DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
94 | DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
95 | DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
96 | DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
97 | DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
98 | DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
99 |
100 | // alternate function push-pull
101 | GPIO_InitStructure.GPIO_Pin = SERIAL_UART_TX_PIN;
102 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
103 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
104 | GPIO_Init(SERIAL_UART_PORT, &GPIO_InitStructure);
105 |
106 | // input floating w/ pull ups
107 | GPIO_InitStructure.GPIO_Pin = SERIAL_UART_RX_PIN;
108 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
109 | GPIO_Init(SERIAL_UART_PORT, &GPIO_InitStructure);
110 |
111 | // Enable the DMA1_Channel4 global Interrupt
112 | NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel4_IRQn;
113 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
114 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
115 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
116 | NVIC_Init(&NVIC_InitStructure);
117 |
118 | s->rxHead = s->rxTail = 0;
119 | s->txHead = s->txTail = 0;
120 |
121 | serialOpenPort(p[BAUD_RATE]);
122 |
123 | // Configure DMA for rx
124 | DMA_DeInit(SERIAL_RX_DMA);
125 | DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SERIAL_UART + 0x04;
126 | DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)s->rxBuf;
127 | DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
128 | DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
129 | DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
130 | DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
131 | DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
132 | DMA_InitStructure.DMA_BufferSize = SERIAL_RX_BUFSIZE;
133 | DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
134 | DMA_Init(SERIAL_RX_DMA, &DMA_InitStructure);
135 |
136 | DMA_Cmd(SERIAL_RX_DMA, ENABLE);
137 |
138 | USART_DMACmd(SERIAL_UART, USART_DMAReq_Rx, ENABLE);
139 | s->rxPos = DMA_GetCurrDataCounter(SERIAL_RX_DMA);
140 |
141 | // Configure DMA for tx
142 | DMA_DeInit(SERIAL_TX_DMA);
143 | DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SERIAL_UART + 0x04;
144 | DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
145 | DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
146 | DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
147 | DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
148 | DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
149 | DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
150 | DMA_Init(SERIAL_TX_DMA, &DMA_InitStructure);
151 | DMA_ITConfig(SERIAL_TX_DMA, DMA_IT_TC, ENABLE);
152 | SERIAL_TX_DMA->CNDTR = 0;
153 |
154 | USART_DMACmd(SERIAL_UART, USART_DMAReq_Tx, ENABLE);
155 |
156 | USART_Cmd(SERIAL_UART, ENABLE);
157 | }
158 |
159 | // USART tx DMA IRQ
160 | void DMA1_Channel4_IRQHandler(void) {
161 | DMA_ClearITPendingBit(DMA1_IT_TC4);
162 | DMA_Cmd(SERIAL_TX_DMA, DISABLE);
163 |
164 | if (serialPort.txHead != serialPort.txTail)
165 | serialStartTxDMA();
166 | }
167 |
168 | void serialSetConstants(void) {
169 | p[BAUD_RATE] = (int)p[BAUD_RATE];
170 |
171 | if (p[BAUD_RATE] < SERIAL_MIN_BAUD)
172 | p[BAUD_RATE] = SERIAL_MIN_BAUD;
173 | else if (p[BAUD_RATE] > SERIAL_MAX_BAUD)
174 | p[BAUD_RATE] = SERIAL_MAX_BAUD;
175 |
176 | serialOpenPort(p[BAUD_RATE]);
177 | }
--------------------------------------------------------------------------------
/onboard/serial.h:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012, 2013 Bill Nesbitt
17 | */
18 |
19 | #ifndef _SERIAL_H
20 | #define _SERIAL_H
21 |
22 | #include "stm32f10x_usart.h"
23 |
24 | #define SERIAL_UART USART1
25 | #define SERIAL_FLOW_CONTROL USART_HardwareFlowControl_None
26 | #define SERIAL_UART_PORT GPIOA
27 | #define SERIAL_UART_TX_PIN GPIO_Pin_9
28 | #define SERIAL_UART_RX_PIN GPIO_Pin_10
29 | //#define SERIAL_UART_CTS_PIN GPIO_Pin_11
30 | //#define SERIAL_UART_RTS_PIN GPIO_Pin_12
31 | #define SERIAL_TX_DMA DMA1_Channel4
32 | #define SERIAL_RX_DMA DMA1_Channel5
33 |
34 | #define SERIAL_MIN_BAUD 9600
35 | #define SERIAL_MAX_BAUD 921600
36 |
37 | #define SERIAL_TX_BUFSIZE 4096
38 | #define SERIAL_RX_BUFSIZE 256
39 |
40 | typedef struct {
41 | volatile unsigned char txBuf[SERIAL_TX_BUFSIZE];
42 | unsigned int txHead, txTail;
43 | volatile unsigned char rxBuf[SERIAL_RX_BUFSIZE];
44 | volatile unsigned int rxHead, rxTail;
45 | unsigned int rxPos;
46 | } serialPort_t;
47 |
48 | extern void serialInit(void);
49 | extern void serialWrite(int ch);
50 | extern void serialPrint(const char *str);
51 | extern unsigned char serialAvailable();
52 | extern int serialRead();
53 | extern void serialSetConstants(void);
54 |
55 |
56 | #endif
57 |
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/onboard/stm32f10x.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/bn999/esc32/bde2b333530e894c92ece2a92454ee13c96a544c/onboard/stm32f10x.h
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/onboard/stm32f10x_conf.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 08-April-2011
7 | * @brief Library configuration file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F10x_CONF_H
24 | #define __STM32F10x_CONF_H
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | /* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */
28 | //#include "stm32f10x_adc.h"
29 | //#include "stm32f10x_bkp.h"
30 | //#include "stm32f10x_can.h"
31 | //#include "stm32f10x_cec.h"
32 | //#include "stm32f10x_crc.h"
33 | //#include "stm32f10x_dac.h"
34 | //#include "stm32f10x_dbgmcu.h"
35 | //#include "stm32f10x_dma.h"
36 | //#include "stm32f10x_exti.h"
37 | //#include "stm32f10x_flash.h"
38 | //#include "stm32f10x_fsmc.h"
39 | #include "stm32f10x_gpio.h"
40 | //#include "stm32f10x_i2c.h"
41 | //#include "stm32f10x_iwdg.h"
42 | //#include "stm32f10x_pwr.h"
43 | //#include "stm32f10x_rcc.h"
44 | //#include "stm32f10x_rtc.h"
45 | //#include "stm32f10x_sdio.h"
46 | //#include "stm32f10x_spi.h"
47 | //#include "stm32f10x_tim.h"
48 | //#include "stm32f10x_usart.h"
49 | //#include "stm32f10x_wwdg.h"
50 | //#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
51 |
52 | /* Exported types ------------------------------------------------------------*/
53 | /* Exported constants --------------------------------------------------------*/
54 | /* Uncomment the line below to expanse the "assert_param" macro in the
55 | Standard Peripheral Library drivers code */
56 | #define USE_FULL_ASSERT 1
57 |
58 | /* Exported macro ------------------------------------------------------------*/
59 | #ifdef USE_FULL_ASSERT
60 |
61 | /**
62 | * @brief The assert_param macro is used for function's parameters check.
63 | * @param expr: If expr is false, it calls assert_failed function which reports
64 | * the name of the source file and the source line number of the call
65 | * that failed. If expr is true, it returns no value.
66 | * @retval None
67 | */
68 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
69 | /* Exported functions ------------------------------------------------------- */
70 | void assert_failed(uint8_t* file, uint32_t line);
71 | #else
72 | #define assert_param(expr) ((void)0)
73 | #endif /* USE_FULL_ASSERT */
74 |
75 | #endif /* __STM32F10x_CONF_H */
76 |
77 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
78 |
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/onboard/stm32f10x_dbgmcu.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_dbgmcu.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the DBGMCU firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_dbgmcu.h"
24 |
25 | /** @addtogroup STM32F10x_StdPeriph_Driver
26 | * @{
27 | */
28 |
29 | /** @defgroup DBGMCU
30 | * @brief DBGMCU driver modules
31 | * @{
32 | */
33 |
34 | /** @defgroup DBGMCU_Private_TypesDefinitions
35 | * @{
36 | */
37 |
38 | /**
39 | * @}
40 | */
41 |
42 | /** @defgroup DBGMCU_Private_Defines
43 | * @{
44 | */
45 |
46 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
47 | /**
48 | * @}
49 | */
50 |
51 | /** @defgroup DBGMCU_Private_Macros
52 | * @{
53 | */
54 |
55 | /**
56 | * @}
57 | */
58 |
59 | /** @defgroup DBGMCU_Private_Variables
60 | * @{
61 | */
62 |
63 | /**
64 | * @}
65 | */
66 |
67 | /** @defgroup DBGMCU_Private_FunctionPrototypes
68 | * @{
69 | */
70 |
71 | /**
72 | * @}
73 | */
74 |
75 | /** @defgroup DBGMCU_Private_Functions
76 | * @{
77 | */
78 |
79 | /**
80 | * @brief Returns the device revision identifier.
81 | * @param None
82 | * @retval Device revision identifier
83 | */
84 | uint32_t DBGMCU_GetREVID(void)
85 | {
86 | return(DBGMCU->IDCODE >> 16);
87 | }
88 |
89 | /**
90 | * @brief Returns the device identifier.
91 | * @param None
92 | * @retval Device identifier
93 | */
94 | uint32_t DBGMCU_GetDEVID(void)
95 | {
96 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK);
97 | }
98 |
99 | /**
100 | * @brief Configures the specified peripheral and low power mode behavior
101 | * when the MCU under Debug mode.
102 | * @param DBGMCU_Periph: specifies the peripheral and low power mode.
103 | * This parameter can be any combination of the following values:
104 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode
105 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode
106 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
107 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted
108 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
109 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted
110 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted
111 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted
112 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted
113 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted
114 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted
115 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted
116 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted
117 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted
118 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted
119 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted
120 | * @arg DBGMCU_CAN2_STOP: Debug CAN2 stopped when Core is halted
121 | * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted
122 | * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted
123 | * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted
124 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted
125 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted
126 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted
127 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted
128 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted
129 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted
130 | * @param NewState: new state of the specified peripheral in Debug mode.
131 | * This parameter can be: ENABLE or DISABLE.
132 | * @retval None
133 | */
134 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
135 | {
136 | /* Check the parameters */
137 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
138 | assert_param(IS_FUNCTIONAL_STATE(NewState));
139 |
140 | if (NewState != DISABLE)
141 | {
142 | DBGMCU->CR |= DBGMCU_Periph;
143 | }
144 | else
145 | {
146 | DBGMCU->CR &= ~DBGMCU_Periph;
147 | }
148 | }
149 |
150 | /**
151 | * @}
152 | */
153 |
154 | /**
155 | * @}
156 | */
157 |
158 | /**
159 | * @}
160 | */
161 |
162 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
163 |
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/onboard/stm32f10x_dbgmcu.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_dbgmcu.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the DBGMCU
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_DBGMCU_H
25 | #define __STM32F10x_DBGMCU_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup DBGMCU
39 | * @{
40 | */
41 |
42 | /** @defgroup DBGMCU_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup DBGMCU_Exported_Constants
51 | * @{
52 | */
53 |
54 | #define DBGMCU_SLEEP ((uint32_t)0x00000001)
55 | #define DBGMCU_STOP ((uint32_t)0x00000002)
56 | #define DBGMCU_STANDBY ((uint32_t)0x00000004)
57 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00000100)
58 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000200)
59 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000400)
60 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000800)
61 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00001000)
62 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00002000)
63 | #define DBGMCU_CAN1_STOP ((uint32_t)0x00004000)
64 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000)
65 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000)
66 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00020000)
67 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00040000)
68 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00080000)
69 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00100000)
70 | #define DBGMCU_CAN2_STOP ((uint32_t)0x00200000)
71 | #define DBGMCU_TIM15_STOP ((uint32_t)0x00400000)
72 | #define DBGMCU_TIM16_STOP ((uint32_t)0x00800000)
73 | #define DBGMCU_TIM17_STOP ((uint32_t)0x01000000)
74 | #define DBGMCU_TIM12_STOP ((uint32_t)0x02000000)
75 | #define DBGMCU_TIM13_STOP ((uint32_t)0x04000000)
76 | #define DBGMCU_TIM14_STOP ((uint32_t)0x08000000)
77 | #define DBGMCU_TIM9_STOP ((uint32_t)0x10000000)
78 | #define DBGMCU_TIM10_STOP ((uint32_t)0x20000000)
79 | #define DBGMCU_TIM11_STOP ((uint32_t)0x40000000)
80 |
81 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00))
82 | /**
83 | * @}
84 | */
85 |
86 | /** @defgroup DBGMCU_Exported_Macros
87 | * @{
88 | */
89 |
90 | /**
91 | * @}
92 | */
93 |
94 | /** @defgroup DBGMCU_Exported_Functions
95 | * @{
96 | */
97 |
98 | uint32_t DBGMCU_GetREVID(void);
99 | uint32_t DBGMCU_GetDEVID(void);
100 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
101 |
102 | #ifdef __cplusplus
103 | }
104 | #endif
105 |
106 | #endif /* __STM32F10x_DBGMCU_H */
107 | /**
108 | * @}
109 | */
110 |
111 | /**
112 | * @}
113 | */
114 |
115 | /**
116 | * @}
117 | */
118 |
119 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
120 |
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/onboard/stm32f10x_exti.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_exti.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the EXTI firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_exti.h"
24 |
25 | /** @addtogroup STM32F10x_StdPeriph_Driver
26 | * @{
27 | */
28 |
29 | /** @defgroup EXTI
30 | * @brief EXTI driver modules
31 | * @{
32 | */
33 |
34 | /** @defgroup EXTI_Private_TypesDefinitions
35 | * @{
36 | */
37 |
38 | /**
39 | * @}
40 | */
41 |
42 | /** @defgroup EXTI_Private_Defines
43 | * @{
44 | */
45 |
46 | #define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */
47 |
48 | /**
49 | * @}
50 | */
51 |
52 | /** @defgroup EXTI_Private_Macros
53 | * @{
54 | */
55 |
56 | /**
57 | * @}
58 | */
59 |
60 | /** @defgroup EXTI_Private_Variables
61 | * @{
62 | */
63 |
64 | /**
65 | * @}
66 | */
67 |
68 | /** @defgroup EXTI_Private_FunctionPrototypes
69 | * @{
70 | */
71 |
72 | /**
73 | * @}
74 | */
75 |
76 | /** @defgroup EXTI_Private_Functions
77 | * @{
78 | */
79 |
80 | /**
81 | * @brief Deinitializes the EXTI peripheral registers to their default reset values.
82 | * @param None
83 | * @retval None
84 | */
85 | void EXTI_DeInit(void)
86 | {
87 | EXTI->IMR = 0x00000000;
88 | EXTI->EMR = 0x00000000;
89 | EXTI->RTSR = 0x00000000;
90 | EXTI->FTSR = 0x00000000;
91 | EXTI->PR = 0x000FFFFF;
92 | }
93 |
94 | /**
95 | * @brief Initializes the EXTI peripheral according to the specified
96 | * parameters in the EXTI_InitStruct.
97 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure
98 | * that contains the configuration information for the EXTI peripheral.
99 | * @retval None
100 | */
101 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct)
102 | {
103 | uint32_t tmp = 0;
104 |
105 | /* Check the parameters */
106 | assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode));
107 | assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger));
108 | assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line));
109 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd));
110 |
111 | tmp = (uint32_t)EXTI_BASE;
112 |
113 | if (EXTI_InitStruct->EXTI_LineCmd != DISABLE)
114 | {
115 | /* Clear EXTI line configuration */
116 | EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line;
117 | EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line;
118 |
119 | tmp += EXTI_InitStruct->EXTI_Mode;
120 |
121 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
122 |
123 | /* Clear Rising Falling edge configuration */
124 | EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line;
125 | EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line;
126 |
127 | /* Select the trigger for the selected external interrupts */
128 | if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling)
129 | {
130 | /* Rising Falling edge */
131 | EXTI->RTSR |= EXTI_InitStruct->EXTI_Line;
132 | EXTI->FTSR |= EXTI_InitStruct->EXTI_Line;
133 | }
134 | else
135 | {
136 | tmp = (uint32_t)EXTI_BASE;
137 | tmp += EXTI_InitStruct->EXTI_Trigger;
138 |
139 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
140 | }
141 | }
142 | else
143 | {
144 | tmp += EXTI_InitStruct->EXTI_Mode;
145 |
146 | /* Disable the selected external lines */
147 | *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line;
148 | }
149 | }
150 |
151 | /**
152 | * @brief Fills each EXTI_InitStruct member with its reset value.
153 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will
154 | * be initialized.
155 | * @retval None
156 | */
157 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct)
158 | {
159 | EXTI_InitStruct->EXTI_Line = EXTI_LINENONE;
160 | EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt;
161 | EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling;
162 | EXTI_InitStruct->EXTI_LineCmd = DISABLE;
163 | }
164 |
165 | /**
166 | * @brief Generates a Software interrupt.
167 | * @param EXTI_Line: specifies the EXTI lines to be enabled or disabled.
168 | * This parameter can be any combination of EXTI_Linex where x can be (0..19).
169 | * @retval None
170 | */
171 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
172 | {
173 | /* Check the parameters */
174 | assert_param(IS_EXTI_LINE(EXTI_Line));
175 |
176 | EXTI->SWIER |= EXTI_Line;
177 | }
178 |
179 | /**
180 | * @brief Checks whether the specified EXTI line flag is set or not.
181 | * @param EXTI_Line: specifies the EXTI line flag to check.
182 | * This parameter can be:
183 | * @arg EXTI_Linex: External interrupt line x where x(0..19)
184 | * @retval The new state of EXTI_Line (SET or RESET).
185 | */
186 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
187 | {
188 | FlagStatus bitstatus = RESET;
189 | /* Check the parameters */
190 | assert_param(IS_GET_EXTI_LINE(EXTI_Line));
191 |
192 | if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
193 | {
194 | bitstatus = SET;
195 | }
196 | else
197 | {
198 | bitstatus = RESET;
199 | }
200 | return bitstatus;
201 | }
202 |
203 | /**
204 | * @brief Clears the EXTI's line pending flags.
205 | * @param EXTI_Line: specifies the EXTI lines flags to clear.
206 | * This parameter can be any combination of EXTI_Linex where x can be (0..19).
207 | * @retval None
208 | */
209 | void EXTI_ClearFlag(uint32_t EXTI_Line)
210 | {
211 | /* Check the parameters */
212 | assert_param(IS_EXTI_LINE(EXTI_Line));
213 |
214 | EXTI->PR = EXTI_Line;
215 | }
216 |
217 | /**
218 | * @brief Checks whether the specified EXTI line is asserted or not.
219 | * @param EXTI_Line: specifies the EXTI line to check.
220 | * This parameter can be:
221 | * @arg EXTI_Linex: External interrupt line x where x(0..19)
222 | * @retval The new state of EXTI_Line (SET or RESET).
223 | */
224 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
225 | {
226 | ITStatus bitstatus = RESET;
227 | uint32_t enablestatus = 0;
228 | /* Check the parameters */
229 | assert_param(IS_GET_EXTI_LINE(EXTI_Line));
230 |
231 | enablestatus = EXTI->IMR & EXTI_Line;
232 | if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
233 | {
234 | bitstatus = SET;
235 | }
236 | else
237 | {
238 | bitstatus = RESET;
239 | }
240 | return bitstatus;
241 | }
242 |
243 | /**
244 | * @brief Clears the EXTI's line pending bits.
245 | * @param EXTI_Line: specifies the EXTI lines to clear.
246 | * This parameter can be any combination of EXTI_Linex where x can be (0..19).
247 | * @retval None
248 | */
249 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line)
250 | {
251 | /* Check the parameters */
252 | assert_param(IS_EXTI_LINE(EXTI_Line));
253 |
254 | EXTI->PR = EXTI_Line;
255 | }
256 |
257 | /**
258 | * @}
259 | */
260 |
261 | /**
262 | * @}
263 | */
264 |
265 | /**
266 | * @}
267 | */
268 |
269 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
270 |
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/onboard/stm32f10x_exti.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_exti.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the EXTI firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_EXTI_H
25 | #define __STM32F10x_EXTI_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup EXTI
39 | * @{
40 | */
41 |
42 | /** @defgroup EXTI_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @brief EXTI mode enumeration
48 | */
49 |
50 | typedef enum
51 | {
52 | EXTI_Mode_Interrupt = 0x00,
53 | EXTI_Mode_Event = 0x04
54 | }EXTIMode_TypeDef;
55 |
56 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
57 |
58 | /**
59 | * @brief EXTI Trigger enumeration
60 | */
61 |
62 | typedef enum
63 | {
64 | EXTI_Trigger_Rising = 0x08,
65 | EXTI_Trigger_Falling = 0x0C,
66 | EXTI_Trigger_Rising_Falling = 0x10
67 | }EXTITrigger_TypeDef;
68 |
69 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
70 | ((TRIGGER) == EXTI_Trigger_Falling) || \
71 | ((TRIGGER) == EXTI_Trigger_Rising_Falling))
72 | /**
73 | * @brief EXTI Init Structure definition
74 | */
75 |
76 | typedef struct
77 | {
78 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled.
79 | This parameter can be any combination of @ref EXTI_Lines */
80 |
81 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines.
82 | This parameter can be a value of @ref EXTIMode_TypeDef */
83 |
84 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
85 | This parameter can be a value of @ref EXTIMode_TypeDef */
86 |
87 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines.
88 | This parameter can be set either to ENABLE or DISABLE */
89 | }EXTI_InitTypeDef;
90 |
91 | /**
92 | * @}
93 | */
94 |
95 | /** @defgroup EXTI_Exported_Constants
96 | * @{
97 | */
98 |
99 | /** @defgroup EXTI_Lines
100 | * @{
101 | */
102 |
103 | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */
104 | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */
105 | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */
106 | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */
107 | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */
108 | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */
109 | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */
110 | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */
111 | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */
112 | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */
113 | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */
114 | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */
115 | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */
116 | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */
117 | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */
118 | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */
119 | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */
120 | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */
121 | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS
122 | Wakeup from suspend event */
123 | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
124 |
125 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00))
126 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
127 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
128 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
129 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
130 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
131 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
132 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
133 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
134 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
135 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19))
136 |
137 |
138 | /**
139 | * @}
140 | */
141 |
142 | /**
143 | * @}
144 | */
145 |
146 | /** @defgroup EXTI_Exported_Macros
147 | * @{
148 | */
149 |
150 | /**
151 | * @}
152 | */
153 |
154 | /** @defgroup EXTI_Exported_Functions
155 | * @{
156 | */
157 |
158 | void EXTI_DeInit(void);
159 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
160 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
161 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
162 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
163 | void EXTI_ClearFlag(uint32_t EXTI_Line);
164 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
165 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
166 |
167 | #ifdef __cplusplus
168 | }
169 | #endif
170 |
171 | #endif /* __STM32F10x_EXTI_H */
172 | /**
173 | * @}
174 | */
175 |
176 | /**
177 | * @}
178 | */
179 |
180 | /**
181 | * @}
182 | */
183 |
184 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
185 |
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/onboard/stm32f10x_flash.c:
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https://raw.githubusercontent.com/bn999/esc32/bde2b333530e894c92ece2a92454ee13c96a544c/onboard/stm32f10x_flash.c
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/onboard/stm32f10x_iwdg.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_iwdg.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the IWDG firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_iwdg.h"
24 |
25 | /** @addtogroup STM32F10x_StdPeriph_Driver
26 | * @{
27 | */
28 |
29 | /** @defgroup IWDG
30 | * @brief IWDG driver modules
31 | * @{
32 | */
33 |
34 | /** @defgroup IWDG_Private_TypesDefinitions
35 | * @{
36 | */
37 |
38 | /**
39 | * @}
40 | */
41 |
42 | /** @defgroup IWDG_Private_Defines
43 | * @{
44 | */
45 |
46 | /* ---------------------- IWDG registers bit mask ----------------------------*/
47 |
48 | /* KR register bit mask */
49 | #define KR_KEY_Reload ((uint16_t)0xAAAA)
50 | #define KR_KEY_Enable ((uint16_t)0xCCCC)
51 |
52 | /**
53 | * @}
54 | */
55 |
56 | /** @defgroup IWDG_Private_Macros
57 | * @{
58 | */
59 |
60 | /**
61 | * @}
62 | */
63 |
64 | /** @defgroup IWDG_Private_Variables
65 | * @{
66 | */
67 |
68 | /**
69 | * @}
70 | */
71 |
72 | /** @defgroup IWDG_Private_FunctionPrototypes
73 | * @{
74 | */
75 |
76 | /**
77 | * @}
78 | */
79 |
80 | /** @defgroup IWDG_Private_Functions
81 | * @{
82 | */
83 |
84 | /**
85 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
86 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
87 | * This parameter can be one of the following values:
88 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
89 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
90 | * @retval None
91 | */
92 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
93 | {
94 | /* Check the parameters */
95 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
96 | IWDG->KR = IWDG_WriteAccess;
97 | }
98 |
99 | /**
100 | * @brief Sets IWDG Prescaler value.
101 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value.
102 | * This parameter can be one of the following values:
103 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4
104 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8
105 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16
106 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32
107 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64
108 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128
109 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256
110 | * @retval None
111 | */
112 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
113 | {
114 | /* Check the parameters */
115 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
116 | IWDG->PR = IWDG_Prescaler;
117 | }
118 |
119 | /**
120 | * @brief Sets IWDG Reload value.
121 | * @param Reload: specifies the IWDG Reload value.
122 | * This parameter must be a number between 0 and 0x0FFF.
123 | * @retval None
124 | */
125 | void IWDG_SetReload(uint16_t Reload)
126 | {
127 | /* Check the parameters */
128 | assert_param(IS_IWDG_RELOAD(Reload));
129 | IWDG->RLR = Reload;
130 | }
131 |
132 | /**
133 | * @brief Reloads IWDG counter with value defined in the reload register
134 | * (write access to IWDG_PR and IWDG_RLR registers disabled).
135 | * @param None
136 | * @retval None
137 | */
138 | void IWDG_ReloadCounter(void)
139 | {
140 | IWDG->KR = KR_KEY_Reload;
141 | }
142 |
143 | /**
144 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
145 | * @param None
146 | * @retval None
147 | */
148 | void IWDG_Enable(void)
149 | {
150 | IWDG->KR = KR_KEY_Enable;
151 | }
152 |
153 | /**
154 | * @brief Checks whether the specified IWDG flag is set or not.
155 | * @param IWDG_FLAG: specifies the flag to check.
156 | * This parameter can be one of the following values:
157 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going
158 | * @arg IWDG_FLAG_RVU: Reload Value Update on going
159 | * @retval The new state of IWDG_FLAG (SET or RESET).
160 | */
161 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
162 | {
163 | FlagStatus bitstatus = RESET;
164 | /* Check the parameters */
165 | assert_param(IS_IWDG_FLAG(IWDG_FLAG));
166 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
167 | {
168 | bitstatus = SET;
169 | }
170 | else
171 | {
172 | bitstatus = RESET;
173 | }
174 | /* Return the flag status */
175 | return bitstatus;
176 | }
177 |
178 | /**
179 | * @}
180 | */
181 |
182 | /**
183 | * @}
184 | */
185 |
186 | /**
187 | * @}
188 | */
189 |
190 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
191 |
--------------------------------------------------------------------------------
/onboard/stm32f10x_iwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_iwdg.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the IWDG
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_IWDG_H
25 | #define __STM32F10x_IWDG_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup IWDG
39 | * @{
40 | */
41 |
42 | /** @defgroup IWDG_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup IWDG_Exported_Constants
51 | * @{
52 | */
53 |
54 | /** @defgroup IWDG_WriteAccess
55 | * @{
56 | */
57 |
58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
61 | ((ACCESS) == IWDG_WriteAccess_Disable))
62 | /**
63 | * @}
64 | */
65 |
66 | /** @defgroup IWDG_prescaler
67 | * @{
68 | */
69 |
70 | #define IWDG_Prescaler_4 ((uint8_t)0x00)
71 | #define IWDG_Prescaler_8 ((uint8_t)0x01)
72 | #define IWDG_Prescaler_16 ((uint8_t)0x02)
73 | #define IWDG_Prescaler_32 ((uint8_t)0x03)
74 | #define IWDG_Prescaler_64 ((uint8_t)0x04)
75 | #define IWDG_Prescaler_128 ((uint8_t)0x05)
76 | #define IWDG_Prescaler_256 ((uint8_t)0x06)
77 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
78 | ((PRESCALER) == IWDG_Prescaler_8) || \
79 | ((PRESCALER) == IWDG_Prescaler_16) || \
80 | ((PRESCALER) == IWDG_Prescaler_32) || \
81 | ((PRESCALER) == IWDG_Prescaler_64) || \
82 | ((PRESCALER) == IWDG_Prescaler_128)|| \
83 | ((PRESCALER) == IWDG_Prescaler_256))
84 | /**
85 | * @}
86 | */
87 |
88 | /** @defgroup IWDG_Flag
89 | * @{
90 | */
91 |
92 | #define IWDG_FLAG_PVU ((uint16_t)0x0001)
93 | #define IWDG_FLAG_RVU ((uint16_t)0x0002)
94 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
95 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
96 | /**
97 | * @}
98 | */
99 |
100 | /**
101 | * @}
102 | */
103 |
104 | /** @defgroup IWDG_Exported_Macros
105 | * @{
106 | */
107 |
108 | /**
109 | * @}
110 | */
111 |
112 | /** @defgroup IWDG_Exported_Functions
113 | * @{
114 | */
115 |
116 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
117 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
118 | void IWDG_SetReload(uint16_t Reload);
119 | void IWDG_ReloadCounter(void);
120 | void IWDG_Enable(void);
121 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
122 |
123 | #ifdef __cplusplus
124 | }
125 | #endif
126 |
127 | #endif /* __STM32F10x_IWDG_H */
128 | /**
129 | * @}
130 | */
131 |
132 | /**
133 | * @}
134 | */
135 |
136 | /**
137 | * @}
138 | */
139 |
140 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
141 |
--------------------------------------------------------------------------------
/onboard/stm32f10x_pwr.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_pwr.c
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file provides all the PWR firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 | *
18 | * © COPYRIGHT 2011 STMicroelectronics
19 | ******************************************************************************
20 | */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "stm32f10x_pwr.h"
24 | #include "stm32f10x_rcc.h"
25 |
26 | /** @addtogroup STM32F10x_StdPeriph_Driver
27 | * @{
28 | */
29 |
30 | /** @defgroup PWR
31 | * @brief PWR driver modules
32 | * @{
33 | */
34 |
35 | /** @defgroup PWR_Private_TypesDefinitions
36 | * @{
37 | */
38 |
39 | /**
40 | * @}
41 | */
42 |
43 | /** @defgroup PWR_Private_Defines
44 | * @{
45 | */
46 |
47 | /* --------- PWR registers bit address in the alias region ---------- */
48 | #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
49 |
50 | /* --- CR Register ---*/
51 |
52 | /* Alias word address of DBP bit */
53 | #define CR_OFFSET (PWR_OFFSET + 0x00)
54 | #define DBP_BitNumber 0x08
55 | #define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
56 |
57 | /* Alias word address of PVDE bit */
58 | #define PVDE_BitNumber 0x04
59 | #define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
60 |
61 | /* --- CSR Register ---*/
62 |
63 | /* Alias word address of EWUP bit */
64 | #define CSR_OFFSET (PWR_OFFSET + 0x04)
65 | #define EWUP_BitNumber 0x08
66 | #define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
67 |
68 | /* ------------------ PWR registers bit mask ------------------------ */
69 |
70 | /* CR register bit mask */
71 | #define CR_DS_MASK ((uint32_t)0xFFFFFFFC)
72 | #define CR_PLS_MASK ((uint32_t)0xFFFFFF1F)
73 |
74 |
75 | /**
76 | * @}
77 | */
78 |
79 | /** @defgroup PWR_Private_Macros
80 | * @{
81 | */
82 |
83 | /**
84 | * @}
85 | */
86 |
87 | /** @defgroup PWR_Private_Variables
88 | * @{
89 | */
90 |
91 | /**
92 | * @}
93 | */
94 |
95 | /** @defgroup PWR_Private_FunctionPrototypes
96 | * @{
97 | */
98 |
99 | /**
100 | * @}
101 | */
102 |
103 | /** @defgroup PWR_Private_Functions
104 | * @{
105 | */
106 |
107 | /**
108 | * @brief Deinitializes the PWR peripheral registers to their default reset values.
109 | * @param None
110 | * @retval None
111 | */
112 | void PWR_DeInit(void)
113 | {
114 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
115 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
116 | }
117 |
118 | /**
119 | * @brief Enables or disables access to the RTC and backup registers.
120 | * @param NewState: new state of the access to the RTC and backup registers.
121 | * This parameter can be: ENABLE or DISABLE.
122 | * @retval None
123 | */
124 | void PWR_BackupAccessCmd(FunctionalState NewState)
125 | {
126 | /* Check the parameters */
127 | assert_param(IS_FUNCTIONAL_STATE(NewState));
128 | *(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState;
129 | }
130 |
131 | /**
132 | * @brief Enables or disables the Power Voltage Detector(PVD).
133 | * @param NewState: new state of the PVD.
134 | * This parameter can be: ENABLE or DISABLE.
135 | * @retval None
136 | */
137 | void PWR_PVDCmd(FunctionalState NewState)
138 | {
139 | /* Check the parameters */
140 | assert_param(IS_FUNCTIONAL_STATE(NewState));
141 | *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState;
142 | }
143 |
144 | /**
145 | * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
146 | * @param PWR_PVDLevel: specifies the PVD detection level
147 | * This parameter can be one of the following values:
148 | * @arg PWR_PVDLevel_2V2: PVD detection level set to 2.2V
149 | * @arg PWR_PVDLevel_2V3: PVD detection level set to 2.3V
150 | * @arg PWR_PVDLevel_2V4: PVD detection level set to 2.4V
151 | * @arg PWR_PVDLevel_2V5: PVD detection level set to 2.5V
152 | * @arg PWR_PVDLevel_2V6: PVD detection level set to 2.6V
153 | * @arg PWR_PVDLevel_2V7: PVD detection level set to 2.7V
154 | * @arg PWR_PVDLevel_2V8: PVD detection level set to 2.8V
155 | * @arg PWR_PVDLevel_2V9: PVD detection level set to 2.9V
156 | * @retval None
157 | */
158 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
159 | {
160 | uint32_t tmpreg = 0;
161 | /* Check the parameters */
162 | assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
163 | tmpreg = PWR->CR;
164 | /* Clear PLS[7:5] bits */
165 | tmpreg &= CR_PLS_MASK;
166 | /* Set PLS[7:5] bits according to PWR_PVDLevel value */
167 | tmpreg |= PWR_PVDLevel;
168 | /* Store the new value */
169 | PWR->CR = tmpreg;
170 | }
171 |
172 | /**
173 | * @brief Enables or disables the WakeUp Pin functionality.
174 | * @param NewState: new state of the WakeUp Pin functionality.
175 | * This parameter can be: ENABLE or DISABLE.
176 | * @retval None
177 | */
178 | void PWR_WakeUpPinCmd(FunctionalState NewState)
179 | {
180 | /* Check the parameters */
181 | assert_param(IS_FUNCTIONAL_STATE(NewState));
182 | *(__IO uint32_t *) CSR_EWUP_BB = (uint32_t)NewState;
183 | }
184 |
185 | /**
186 | * @brief Enters STOP mode.
187 | * @param PWR_Regulator: specifies the regulator state in STOP mode.
188 | * This parameter can be one of the following values:
189 | * @arg PWR_Regulator_ON: STOP mode with regulator ON
190 | * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
191 | * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
192 | * This parameter can be one of the following values:
193 | * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
194 | * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
195 | * @retval None
196 | */
197 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
198 | {
199 | uint32_t tmpreg = 0;
200 | /* Check the parameters */
201 | assert_param(IS_PWR_REGULATOR(PWR_Regulator));
202 | assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
203 |
204 | /* Select the regulator state in STOP mode ---------------------------------*/
205 | tmpreg = PWR->CR;
206 | /* Clear PDDS and LPDS bits */
207 | tmpreg &= CR_DS_MASK;
208 | /* Set LPDS bit according to PWR_Regulator value */
209 | tmpreg |= PWR_Regulator;
210 | /* Store the new value */
211 | PWR->CR = tmpreg;
212 | /* Set SLEEPDEEP bit of Cortex System Control Register */
213 | SCB->SCR |= SCB_SCR_SLEEPDEEP;
214 |
215 | /* Select STOP mode entry --------------------------------------------------*/
216 | if(PWR_STOPEntry == PWR_STOPEntry_WFI)
217 | {
218 | /* Request Wait For Interrupt */
219 | __WFI();
220 | }
221 | else
222 | {
223 | /* Request Wait For Event */
224 | __WFE();
225 | }
226 |
227 | /* Reset SLEEPDEEP bit of Cortex System Control Register */
228 | SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP);
229 | }
230 |
231 | /**
232 | * @brief Enters STANDBY mode.
233 | * @param None
234 | * @retval None
235 | */
236 | void PWR_EnterSTANDBYMode(void)
237 | {
238 | /* Clear Wake-up flag */
239 | PWR->CR |= PWR_CR_CWUF;
240 | /* Select STANDBY mode */
241 | PWR->CR |= PWR_CR_PDDS;
242 | /* Set SLEEPDEEP bit of Cortex System Control Register */
243 | SCB->SCR |= SCB_SCR_SLEEPDEEP;
244 | /* This option is used to ensure that store operations are completed */
245 | #if defined ( __CC_ARM )
246 | __force_stores();
247 | #endif
248 | /* Request Wait For Interrupt */
249 | __WFI();
250 | }
251 |
252 | /**
253 | * @brief Checks whether the specified PWR flag is set or not.
254 | * @param PWR_FLAG: specifies the flag to check.
255 | * This parameter can be one of the following values:
256 | * @arg PWR_FLAG_WU: Wake Up flag
257 | * @arg PWR_FLAG_SB: StandBy flag
258 | * @arg PWR_FLAG_PVDO: PVD Output
259 | * @retval The new state of PWR_FLAG (SET or RESET).
260 | */
261 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
262 | {
263 | FlagStatus bitstatus = RESET;
264 | /* Check the parameters */
265 | assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
266 |
267 | if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
268 | {
269 | bitstatus = SET;
270 | }
271 | else
272 | {
273 | bitstatus = RESET;
274 | }
275 | /* Return the flag status */
276 | return bitstatus;
277 | }
278 |
279 | /**
280 | * @brief Clears the PWR's pending flags.
281 | * @param PWR_FLAG: specifies the flag to clear.
282 | * This parameter can be one of the following values:
283 | * @arg PWR_FLAG_WU: Wake Up flag
284 | * @arg PWR_FLAG_SB: StandBy flag
285 | * @retval None
286 | */
287 | void PWR_ClearFlag(uint32_t PWR_FLAG)
288 | {
289 | /* Check the parameters */
290 | assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
291 |
292 | PWR->CR |= PWR_FLAG << 2;
293 | }
294 |
295 | /**
296 | * @}
297 | */
298 |
299 | /**
300 | * @}
301 | */
302 |
303 | /**
304 | * @}
305 | */
306 |
307 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
308 |
--------------------------------------------------------------------------------
/onboard/stm32f10x_pwr.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f10x_pwr.h
4 | * @author MCD Application Team
5 | * @version V3.5.0
6 | * @date 11-March-2011
7 | * @brief This file contains all the functions prototypes for the PWR firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 | *
19 | * © COPYRIGHT 2011 STMicroelectronics
20 | ******************************************************************************
21 | */
22 |
23 | /* Define to prevent recursive inclusion -------------------------------------*/
24 | #ifndef __STM32F10x_PWR_H
25 | #define __STM32F10x_PWR_H
26 |
27 | #ifdef __cplusplus
28 | extern "C" {
29 | #endif
30 |
31 | /* Includes ------------------------------------------------------------------*/
32 | #include "stm32f10x.h"
33 |
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
35 | * @{
36 | */
37 |
38 | /** @addtogroup PWR
39 | * @{
40 | */
41 |
42 | /** @defgroup PWR_Exported_Types
43 | * @{
44 | */
45 |
46 | /**
47 | * @}
48 | */
49 |
50 | /** @defgroup PWR_Exported_Constants
51 | * @{
52 | */
53 |
54 | /** @defgroup PVD_detection_level
55 | * @{
56 | */
57 |
58 | #define PWR_PVDLevel_2V2 ((uint32_t)0x00000000)
59 | #define PWR_PVDLevel_2V3 ((uint32_t)0x00000020)
60 | #define PWR_PVDLevel_2V4 ((uint32_t)0x00000040)
61 | #define PWR_PVDLevel_2V5 ((uint32_t)0x00000060)
62 | #define PWR_PVDLevel_2V6 ((uint32_t)0x00000080)
63 | #define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0)
64 | #define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0)
65 | #define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0)
66 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \
67 | ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \
68 | ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \
69 | ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9))
70 | /**
71 | * @}
72 | */
73 |
74 | /** @defgroup Regulator_state_is_STOP_mode
75 | * @{
76 | */
77 |
78 | #define PWR_Regulator_ON ((uint32_t)0x00000000)
79 | #define PWR_Regulator_LowPower ((uint32_t)0x00000001)
80 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
81 | ((REGULATOR) == PWR_Regulator_LowPower))
82 | /**
83 | * @}
84 | */
85 |
86 | /** @defgroup STOP_mode_entry
87 | * @{
88 | */
89 |
90 | #define PWR_STOPEntry_WFI ((uint8_t)0x01)
91 | #define PWR_STOPEntry_WFE ((uint8_t)0x02)
92 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
93 |
94 | /**
95 | * @}
96 | */
97 |
98 | /** @defgroup PWR_Flag
99 | * @{
100 | */
101 |
102 | #define PWR_FLAG_WU ((uint32_t)0x00000001)
103 | #define PWR_FLAG_SB ((uint32_t)0x00000002)
104 | #define PWR_FLAG_PVDO ((uint32_t)0x00000004)
105 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
106 | ((FLAG) == PWR_FLAG_PVDO))
107 |
108 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
109 | /**
110 | * @}
111 | */
112 |
113 | /**
114 | * @}
115 | */
116 |
117 | /** @defgroup PWR_Exported_Macros
118 | * @{
119 | */
120 |
121 | /**
122 | * @}
123 | */
124 |
125 | /** @defgroup PWR_Exported_Functions
126 | * @{
127 | */
128 |
129 | void PWR_DeInit(void);
130 | void PWR_BackupAccessCmd(FunctionalState NewState);
131 | void PWR_PVDCmd(FunctionalState NewState);
132 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
133 | void PWR_WakeUpPinCmd(FunctionalState NewState);
134 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
135 | void PWR_EnterSTANDBYMode(void);
136 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
137 | void PWR_ClearFlag(uint32_t PWR_FLAG);
138 |
139 | #ifdef __cplusplus
140 | }
141 | #endif
142 |
143 | #endif /* __STM32F10x_PWR_H */
144 | /**
145 | * @}
146 | */
147 |
148 | /**
149 | * @}
150 | */
151 |
152 | /**
153 | * @}
154 | */
155 |
156 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
157 |
--------------------------------------------------------------------------------
/onboard/stm32f10x_usart.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/bn999/esc32/bde2b333530e894c92ece2a92454ee13c96a544c/onboard/stm32f10x_usart.c
--------------------------------------------------------------------------------
/onboard/timer.c:
--------------------------------------------------------------------------------
1 | /*
2 | This file is part of AutoQuad ESC32.
3 |
4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify
5 | it under the terms of the GNU General Public License as published by
6 | the Free Software Foundation, either version 3 of the License, or
7 | (at your option) any later version.
8 |
9 | AutoQuad ESC32 is distributed in the hope that it will be useful,
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 | GNU General Public License for more details.
13 | You should have received a copy of the GNU General Public License
14 | along with AutoQuad ESC32. If not, see .
15 |
16 | Copyright © 2011, 2012, 2013 Bill Nesbitt
17 | */
18 |
19 | #include "timer.h"
20 | #include "stm32f10x_tim.h"
21 | #include "misc.h"
22 |
23 | timerStruct_t timerData;
24 | volatile uint32_t timerMicros;
25 |
26 | // must be called at least once every 65536 ticks in order for this strategy to work
27 | // TODO - consider interrupt interference
28 | uint32_t timerGetMicros(void) {
29 | static uint16_t timerLast;
30 | static uint16_t hiBits;
31 | register uint16_t tmp;
32 |
33 | tmp = TIMER_TIM->CNT;
34 |
35 | if (tmp < timerLast)
36 | hiBits++;
37 |
38 | timerLast = tmp;
39 |
40 | timerMicros = (hiBits<<16 | tmp) & TIMER_MASK;
41 |
42 | return timerMicros;
43 | }
44 |
45 | void timerDelay(uint16_t us) {
46 | uint16_t cnt = TIMER_TIM->CNT;
47 | uint16_t targetTimerVal = cnt + us*TIMER_MULT;
48 |
49 | if (targetTimerVal < cnt)
50 | // wait till timer rolls over
51 | while (TIMER_TIM->CNT > targetTimerVal)
52 | ;
53 |
54 | while (TIMER_TIM->CNT < targetTimerVal)
55 | ;
56 | }
57 |
58 | void timerCancelAlarm1(void) {
59 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC1;
60 | TIM_ClearITPendingBit(TIMER_TIM, TIM_IT_CC1);
61 | }
62 |
63 | void timerCancelAlarm2(void) {
64 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC2;
65 | TIM_ClearITPendingBit(TIMER_TIM, TIM_IT_CC2);
66 | }
67 |
68 | void timerCancelAlarm3(void) {
69 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC3;
70 | TIM_ClearITPendingBit(TIMER_TIM, TIM_IT_CC3);
71 | }
72 |
73 | uint8_t timerAlarmActive3(void) {
74 | return (TIMER_TIM->DIER & TIM_IT_CC3);
75 | }
76 |
77 | // Create a timer
78 | void timerInit(void) {
79 | NVIC_InitTypeDef NVIC_InitStructure;
80 | TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
81 | TIM_OCInitTypeDef TIM_OCInitStructure;
82 |
83 | // Enable the TIMER_TIM global Interrupt
84 | NVIC_InitStructure.NVIC_IRQChannel = TIMER_IRQ_CH;
85 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
86 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
87 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
88 | NVIC_Init(&NVIC_InitStructure);
89 |
90 | // Time base configuration
91 | TIM_TimeBaseStructure.TIM_Prescaler = (72/TIMER_MULT) - 1;
92 | TIM_TimeBaseStructure.TIM_Period = 0xFFFF;
93 | TIM_TimeBaseStructure.TIM_ClockDivision = 0;
94 | TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
95 | TIM_TimeBaseInit(TIMER_TIM, &TIM_TimeBaseStructure);
96 |
97 | timerCancelAlarm1();
98 | timerCancelAlarm2();
99 | timerCancelAlarm3();
100 |
101 | // Output Compare for alarm
102 | TIM_OCStructInit(&TIM_OCInitStructure);
103 | TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Inactive;
104 | TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
105 | TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
106 |
107 | TIM_OC1Init(TIMER_TIM, &TIM_OCInitStructure);
108 | TIM_OC1PreloadConfig(TIMER_TIM, TIM_OCPreload_Disable);
109 |
110 | TIM_OC2Init(TIMER_TIM, &TIM_OCInitStructure);
111 | TIM_OC2PreloadConfig(TIMER_TIM, TIM_OCPreload_Disable);
112 |
113 | TIM_OC3Init(TIMER_TIM, &TIM_OCInitStructure);
114 | TIM_OC3PreloadConfig(TIMER_TIM, TIM_OCPreload_Disable);
115 |
116 | TIM_ARRPreloadConfig(TIMER_TIM, ENABLE);
117 |
118 | // go...
119 | TIM_Cmd(TIMER_TIM, ENABLE);
120 | }
121 |
122 | // TODO: worry about 32 bit rollover
123 | void timerSetAlarm1(int32_t ticks, timerCallback_t *callback, int parameter) {
124 | // do it now
125 | if (ticks <= TIMER_MULT) {
126 | // Disable the Interrupt
127 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC1;
128 |
129 | callback(parameter);
130 | }
131 | // otherwise, schedule it
132 | else {
133 | timerData.alarm1Callback = callback;
134 | timerData.alarm1Parameter = parameter;
135 |
136 | TIMER_TIM->CCR1 = TIMER_TIM->CNT + ticks;
137 | TIMER_TIM->SR = (uint16_t)~TIM_IT_CC1;
138 |
139 | TIMER_TIM->DIER |= TIM_IT_CC1;
140 | }
141 | }
142 |
143 | void timerSetAlarm2(int32_t ticks, timerCallback_t *callback, int parameter) {
144 | // do it now
145 | if (ticks <= TIMER_MULT) {
146 | // Disable the Interrupt
147 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC2;
148 |
149 | callback(parameter);
150 | }
151 | // otherwise, schedule it
152 | else {
153 | timerData.alarm2Callback = callback;
154 | timerData.alarm2Parameter = parameter;
155 |
156 | TIMER_TIM->CCR2 = TIMER_TIM->CNT + ticks;
157 | TIMER_TIM->SR = (uint16_t)~TIM_IT_CC2;
158 | TIMER_TIM->DIER |= TIM_IT_CC2;
159 | }
160 | }
161 |
162 | void timerSetAlarm3(int32_t ticks, timerCallback_t *callback, int parameter) {
163 | // do it now
164 | if (ticks <= TIMER_MULT) {
165 | // Disable the Interrupt
166 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC3;
167 |
168 | callback(parameter);
169 | }
170 | // otherwise, schedule it
171 | else {
172 | timerData.alarm3Callback = callback;
173 | timerData.alarm3Parameter = parameter;
174 |
175 | TIMER_TIM->CCR3 = TIMER_TIM->CNT + ticks;
176 | TIMER_TIM->SR = (uint16_t)~TIM_IT_CC3;
177 | TIMER_TIM->DIER |= TIM_IT_CC3;
178 | }
179 | }
180 |
181 | void TIMER_ISR(void) {
182 | if (TIM_GetITStatus(TIMER_TIM, TIM_IT_CC1) != RESET) {
183 | TIMER_TIM->SR = (uint16_t)~TIM_IT_CC1;
184 |
185 | // Disable the Interrupt
186 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC1;
187 |
188 | timerData.alarm1Callback(timerData.alarm1Parameter);
189 | }
190 | else if (TIM_GetITStatus(TIMER_TIM, TIM_IT_CC2) != RESET) {
191 | TIMER_TIM->SR = (uint16_t)~TIM_IT_CC2;
192 |
193 | // Disable the Interrupt
194 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC2;
195 |
196 | timerData.alarm2Callback(timerData.alarm2Parameter);
197 | }
198 | else if (TIM_GetITStatus(TIMER_TIM, TIM_IT_CC3) != RESET) {
199 | TIMER_TIM->SR = (uint16_t)~TIM_IT_CC3;
200 |
201 | // Disable the Interrupt
202 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC3;
203 |
204 | timerData.alarm3Callback(timerData.alarm3Parameter);
205 | }
206 | }
207 |
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https://raw.githubusercontent.com/bn999/esc32/bde2b333530e894c92ece2a92454ee13c96a544c/onboard/timer.h
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/onboard/xxhash.h:
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1 | /*
2 | xxHash - Fast Hash algorithm
3 | Header File
4 | Copyright (C) 2012-2013, Yann Collet.
5 | BSD 2-Clause License (http://www.opensource.org/licenses/bsd-license.php)
6 |
7 | Redistribution and use in source and binary forms, with or without
8 | modification, are permitted provided that the following conditions are
9 | met:
10 |
11 | * Redistributions of source code must retain the above copyright
12 | notice, this list of conditions and the following disclaimer.
13 | * Redistributions in binary form must reproduce the above
14 | copyright notice, this list of conditions and the following disclaimer
15 | in the documentation and/or other materials provided with the
16 | distribution.
17 |
18 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 |
30 | You can contact the author at :
31 | - xxHash source repository : http://code.google.com/p/xxhash/
32 | */
33 |
34 | /* Notice extracted from xxHash homepage :
35 |
36 | xxHash is an extremely fast Hash algorithm, running at RAM speed limits.
37 | It also successfully passes all tests from the SMHasher suite.
38 |
39 | Comparison (single thread, Windows Seven 32 bits, using SMHasher on a Core 2 Duo @3GHz)
40 |
41 | Name Speed Q.Score Author
42 | xxHash 5.4 GB/s 10
43 | CrapWow 3.2 GB/s 2 Andrew
44 | MumurHash 3a 2.7 GB/s 10 Austin Appleby
45 | SpookyHash 2.0 GB/s 10 Bob Jenkins
46 | SBox 1.4 GB/s 9 Bret Mulvey
47 | Lookup3 1.2 GB/s 9 Bob Jenkins
48 | SuperFastHash 1.2 GB/s 1 Paul Hsieh
49 | CityHash64 1.05 GB/s 10 Pike & Alakuijala
50 | FNV 0.55 GB/s 5 Fowler, Noll, Vo
51 | CRC32 0.43 GB/s 9
52 | MD5-32 0.33 GB/s 10 Ronald L. Rivest
53 | SHA1-32 0.28 GB/s 10
54 |
55 | Q.Score is a measure of quality of the hash function.
56 | It depends on successfully passing SMHasher test set.
57 | 10 is a perfect score.
58 | */
59 |
60 | #pragma once
61 |
62 | #if defined (__cplusplus)
63 | extern "C" {
64 | #endif
65 |
66 |
67 | //**************************************
68 | // Basic Types
69 | //**************************************
70 | #if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L // C99
71 | # include
72 | typedef uint8_t BYTE;
73 | typedef uint16_t U16;
74 | typedef uint32_t U32;
75 | typedef int32_t S32;
76 | typedef uint64_t U64;
77 | #else
78 | typedef unsigned char BYTE;
79 | typedef unsigned short U16;
80 | typedef unsigned int U32;
81 | typedef signed int S32;
82 | typedef unsigned long long U64;
83 | #endif
84 |
85 |
86 | //****************************
87 | // Type
88 | //****************************
89 | typedef enum { XXH_OK=0, XXH_ERROR } XXH_errorcode;
90 |
91 |
92 |
93 | //****************************
94 | // Simple Hash Functions
95 | //****************************
96 |
97 | U32 XXH32 (const void* input, int len, U32 seed);
98 |
99 | /*
100 | XXH32() :
101 | Calculate the 32-bits hash of sequence of length "len" stored at memory address "input".
102 | The memory between input & input+len must be valid (allocated and read-accessible).
103 | "seed" can be used to alter the result predictably.
104 | This function successfully passes all SMHasher tests.
105 | Speed on Core 2 Duo @ 3 GHz (single thread, SMHasher benchmark) : 5.4 GB/s
106 | Note that "len" is type "int", which means it is limited to 2^31-1.
107 | If your data is larger, use the advanced functions below.
108 | */
109 |
110 |
111 |
112 | //****************************
113 | // Advanced Hash Functions
114 | //****************************
115 |
116 | void* XXH32_init (U32 seed);
117 | XXH_errorcode XXH32_update (void* state, const void* input, int len);
118 | U32 XXH32_digest (void* state);
119 |
120 | /*
121 | These functions calculate the xxhash of an input provided in several small packets,
122 | as opposed to an input provided as a single block.
123 |
124 | It must be started with :
125 | void* XXH32_init()
126 | The function returns a pointer which holds the state of calculation.
127 |
128 | This pointer must be provided as "void* state" parameter for XXH32_update().
129 | XXH32_update() can be called as many times as necessary.
130 | The user must provide a valid (allocated) input.
131 | The function returns an error code, with 0 meaning OK, and any other value meaning there is an error.
132 | Note that "len" is type "int", which means it is limited to 2^31-1.
133 | If your data is larger, it is recommended to chunk your data into blocks
134 | of size for example 2^30 (1GB) to avoid any "int" overflow issue.
135 |
136 | Finally, you can end the calculation anytime, by using XXH32_digest().
137 | This function returns the final 32-bits hash.
138 | You must provide the same "void* state" parameter created by XXH32_init().
139 | Memory will be freed by XXH32_digest().
140 | */
141 |
142 |
143 | int XXH32_sizeofState();
144 | XXH_errorcode XXH32_resetState(void* state, U32 seed);
145 |
146 | #define XXH32_SIZEOFSTATE 48
147 | typedef struct { long long ll[(XXH32_SIZEOFSTATE+(sizeof(long long)-1))/sizeof(long long)]; } XXH32_stateSpace_t;
148 | /*
149 | These functions allow user application to make its own allocation for state.
150 |
151 | XXH32_sizeofState() is used to know how much space must be allocated for the xxHash 32-bits state.
152 | Note that the state must be aligned to access 'long long' fields. Memory must be allocated and referenced by a pointer.
153 | This pointer must then be provided as 'state' into XXH32_resetState(), which initializes the state.
154 |
155 | For static allocation purposes (such as allocation on stack, or freestanding systems without malloc()),
156 | use the structure XXH32_stateSpace_t, which will ensure that memory space is large enough and correctly aligned to access 'long long' fields.
157 | */
158 |
159 |
160 | U32 XXH32_intermediateDigest (void* state);
161 | /*
162 | This function does the same as XXH32_digest(), generating a 32-bit hash,
163 | but preserve memory context.
164 | This way, it becomes possible to generate intermediate hashes, and then continue feeding data with XXH32_update().
165 | To free memory context, use XXH32_digest(), or free().
166 | */
167 |
168 |
169 |
170 | //****************************
171 | // Deprecated function names
172 | //****************************
173 | // The following translations are provided to ease code transition
174 | // You are encouraged to no longer this function names
175 | #define XXH32_feed XXH32_update
176 | #define XXH32_result XXH32_digest
177 | #define XXH32_getIntermediateResult XXH32_intermediateDigest
178 |
179 |
180 |
181 | #if defined (__cplusplus)
182 | }
183 | #endif
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