├── .gitignore ├── AUTHORS ├── Android.mk ├── COPYING ├── ChangeLog ├── Makefile.am ├── NEWS ├── README ├── autogen.sh ├── configure.ac ├── dat ├── Android.mk ├── devregs_imx51.dat ├── devregs_imx53.dat ├── devregs_imx6dls.dat ├── devregs_imx6q.dat ├── devregs_imx7d.dat ├── devregs_imx8mm.dat └── devregs_imx8mq.dat ├── scripts └── parse_trm_to_devregs.py └── src ├── Android.mk ├── Makefile.am └── devregs.cpp /.gitignore: -------------------------------------------------------------------------------- 1 | INSTALL 2 | Makefile.in 3 | aclocal.m4 4 | autom4te.cache/ 5 | configure 6 | depcomp 7 | install-sh 8 | missing 9 | src/Makefile.in 10 | src/devregs.o 11 | src/devregs 12 | Makefile 13 | config.guess 14 | config.log 15 | config.status 16 | config.sub 17 | src/.deps/ 18 | src/Makefile 19 | -------------------------------------------------------------------------------- /AUTHORS: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/boundarydevices/devregs/dcc3e3f26d3d867d5297a104dc32bd99f5e6fa71/AUTHORS -------------------------------------------------------------------------------- /Android.mk: -------------------------------------------------------------------------------- 1 | # Copyright (C) 2009 The Android Open Source Project 2 | # 3 | # Licensed under the Apache License, Version 2.0 (the "License"); 4 | # you may not use this file except in compliance with the License. 5 | # You may obtain a copy of the License at 6 | # 7 | # http://www.apache.org/licenses/LICENSE-2.0 8 | # 9 | # Unless required by applicable law or agreed to in writing, software 10 | # distributed under the License is distributed on an "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | # See the License for the specific language governing permissions and 13 | # limitations under the License. 14 | # 15 | # Build control file for Bionic's test programs 16 | # define the BIONIC_TESTS environment variable to build the test programs 17 | # 18 | LOCAL_PATH := $(call my-dir) 19 | 20 | include $(call all-makefiles-under,$(LOCAL_PATH)) 21 | -------------------------------------------------------------------------------- /COPYING: -------------------------------------------------------------------------------- 1 | ======================================================================= 2 | 3 | GNU GENERAL PUBLIC LICENSE 4 | Version 2, June 1991 5 | 6 | Copyright (C) 1989, 1991 Free Software Foundation, Inc. 7 | 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 8 | Everyone is permitted to copy and distribute verbatim copies 9 | of this license document, but changing it is not allowed. 10 | 11 | Preamble 12 | 13 | The licenses for most software are designed to take away your 14 | freedom to share and change it. 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-------------------------------------------------------------------------------- /Makefile.am: -------------------------------------------------------------------------------- 1 | SUBDIRS = src 2 | EXTRA_DIST = autogen.sh 3 | -------------------------------------------------------------------------------- /NEWS: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/boundarydevices/devregs/dcc3e3f26d3d867d5297a104dc32bd99f5e6fa71/NEWS -------------------------------------------------------------------------------- /README: -------------------------------------------------------------------------------- 1 | devregs is a program designed to allow access to device registers through 2 | /dev/mem. 3 | 4 | Refer to the sketchy notes in this blog post for details: 5 | http://boundarydevices.com/i-mx5x-device-register-access/ 6 | -------------------------------------------------------------------------------- /autogen.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | autoreconf --force --install 3 | -------------------------------------------------------------------------------- /configure.ac: -------------------------------------------------------------------------------- 1 | dnl Process this file with autoconf to produce a configure script. 2 | AC_INIT(devregs, 1.0, info@boundarydevices.com) 3 | AC_CONFIG_SRCDIR(src/devregs.cpp) 4 | 5 | AM_INIT_AUTOMAKE 6 | 7 | AC_PROG_CXX 8 | 9 | AC_OUTPUT(Makefile src/Makefile) 10 | -------------------------------------------------------------------------------- /dat/Android.mk: -------------------------------------------------------------------------------- 1 | LOCAL_PATH:= $(call my-dir) 2 | include $(CLEAR_VARS) 3 | LOCAL_MODULE_TAGS := eng 4 | LOCAL_MODULE_CLASS := ETC 5 | LOCAL_MODULE:=devregs_imx6q.dat 6 | LOCAL_MODULE_PATH := $(TARGET_OUT)/etc 7 | LOCAL_SRC_FILES=$(LOCAL_MODULE) 8 | include $(BUILD_PREBUILT) 9 | 10 | include $(CLEAR_VARS) 11 | LOCAL_MODULE_TAGS := eng 12 | LOCAL_MODULE_CLASS := ETC 13 | LOCAL_MODULE:=devregs_imx6dls.dat 14 | LOCAL_MODULE_PATH := $(TARGET_OUT)/etc 15 | LOCAL_SRC_FILES=$(LOCAL_MODULE) 16 | include $(BUILD_PREBUILT) 17 | 18 | -------------------------------------------------------------------------------- /dat/devregs_imx6dls.dat: -------------------------------------------------------------------------------- 1 | /iomux_pad 2 | :HYS:16 3 | :PUS:15-14 4 | :PUE:13 5 | :PKE:12 6 | :ODE:11 7 | :SPEED:7-6 8 | :DSE:5-3 9 | :SRE:0 10 | 11 | BOOTROM_BASE 0x00000000 # 0001_6FFF 92KB Boot ROM (ROMCP) 12 | BOOTROM_PROT_BASE 0x00017000 # 0001_7FFF 4KB Boot ROM - Protected 4KB area 13 | CAAM_BASE 0x00100000 # 0010_3FFF 16KB CAAM (16K secure RAM) 14 | APBH_BASE 0x00110000 # 0011_7FFF 32KB APBH DMA 15 | HDMI_BASE 0x00120000 # 0012_8FFF 36KB HDMI 16 | DTCP_BASE 0x00138000 # 0013_BFFF 16KB DTCP 17 | GPU_2D_BASE 0x00134000 # 0013_7FFF 16KB GPU 2D 18 | GPU_3D_BASE 0x00130000 # 0013_3FFF 16KB GPU 3D 19 | GPV2_BASE 0x00200000 # 002F_FFFF 1MB gpv_2 PL301 configuration port 20 | GPV3_BASE 0x00300000 # 003F_FFFF 1MB gpv_3 PL301 configuration port 21 | MISC_PER_BASE 0x00400000 # 007F_FFFF Misc peripherals: Boot ROM, OCRAM (Total: 8MB) 4MB Reserved 22 | GPV4_BASE 0x00800000 # 008F_FFFF GPV_4 1MB gpv_0 PL301 "fast3" configuration port 23 | OCRAM_BASE 0x00900000 # 0091_FFFF OCRAM 128KB 24 | OCRAM_ALIAS_BASE 0x00920000 # 0097_FFFF OCRAM 0.75MB OCRAM Aliased 25 | SCU_BASE 0x00A00000 # 00A0_1FFF 8KB SCU 26 | ARM_PER_BASE 0x00A02000 # 00A0_2FFF ARM Peripherals (Only visible to ARM cores) 4KB PL310 (L2 Cache controller) 27 | GPV0_BASE 0x00B00000 # 00BF_FFFF GPV_0 1MB gpv_0 PL301 configuration port 28 | GPV1_BASE 0x00C00000 # 00CF_FFFF GPV_1 1MB gpv_1 PL301 configuration port 29 | PCIE_BASE 0x01000000 # 01FF_BFFF 16368KB PCIe 30 | PCIE_REGS_BASE 0x01FFC000 # 01FF_FFFF PCIe 16KB PCIe Registers 31 | AIPS1_BASE 0x02000000 # 020F_FFFF 1MB Peripheral IPs via AIPS-1 - See the AIPS map in Table 2-2. 32 | AIPS2_BASE 0x02100000 # 021F_FFFF 1MB Peripheral IPs via AIPS-2 - See the AIPS map in Table 2-3. 33 | HSI_BASE 0x02208000 # 0220_BFFF 16KB HSI 34 | IPU1_BASE 0x02600000 # 029F_FFFF 4MB IPU-1 35 | WEIM_BASE 0x08000000 # 0FFF_FFFF Periph 2 128MB WEIM - CS0 (NOR/SRAM) 36 | 37 | HDMI_DESIGN_ID 0x00120000.b 38 | HDMI_REVISION_ID 0x00120001.b 39 | HDMI_PRODUCT_ID0 0x00120002.b 40 | HDMI_PRODUCT_ID1 0x00120003.b 41 | HDMI_CONFIG0_ID 0x00120004.b 42 | HDMI_CONFIG1_ID 0x00120005.b 43 | HDMI_CONFIG2_ID 0x00120006.b 44 | HDMI_CONFIG3_ID 0x00120007.b 45 | HDMI_IH_FC_STAT0 0x00120100.b 46 | HDMI_IH_FC_STAT1 0x00120101.b 47 | HDMI_IH_FC_STAT2 0x00120102.b 48 | HDMI_IH_AS_STAT0 0x00120103.b 49 | HDMI_IH_PHY_STAT0 0x00120104.b 50 | HDMI_IH_I2CM_STAT0 0x00120105.b 51 | HDMI_IH_CEC_STAT0 0x00120106.b 52 | HDMI_IH_VP_STAT0 0x00120107.b 53 | HDMI_IH_I2CMPHY_STAT0 0x00120108.b 54 | HDMI_IH_AHBDMAAUD_STAT0 0x00120109.b 55 | HDMI_IH_MUTE_FC_STAT0 0x00120180.b 56 | HDMI_IH_MUTE_FC_STAT1 0x00120181.b 57 | HDMI_IH_MUTE_FC_STAT2 0x00120182.b 58 | HDMI_IH_MUTE_AS_STAT0 0x00120183.b 59 | HDMI_IH_MUTE_PHY_STAT0 0x00120184.b 60 | HDMI_IH_MUTE_I2CM_STAT0 0x00120185.b 61 | HDMI_IH_MUTE_CEC_STAT0 0x00120186.b 62 | HDMI_IH_MUTE_VP_STAT0 0x00120187.b 63 | HDMI_IH_MUTE_I2CMPHY_STAT0 0x00120188.b 64 | HDMI_IH_MUTE_AHBDMAAUD_STAT0 0x00120189.b 65 | HDMI_IH_MUTE 0x001201FF.b 66 | HDMI_TX_INVID0 0x00120200.b 67 | HDMI_TX_INSTUFFING 0x00120201.b 68 | HDMI_TX_GYDATA0 0x00120202.b 69 | HDMI_TX_GYDATA1 0x00120203.b 70 | HDMI_TX_RCRDATA0 0x00120204.b 71 | HDMI_TX_RCRDATA1 0x00120205.b 72 | HDMI_TX_BCBDATA0 0x00120206.b 73 | HDMI_TX_BCBDATA1 0x00120207.b 74 | HDMI_VP_STATUS 0x00120800.b 75 | HDMI_VP_PR_CD 0x00120801.b 76 | HDMI_VP_STUFF 0x00120802.b 77 | HDMI_VP_REMAP 0x00120803.b 78 | HDMI_VP_CONF 0x00120804.b 79 | HDMI_VP_STAT 0x00120805.b 80 | HDMI_VP_INT 0x00120806.b 81 | HDMI_VP_MASK 0x00120807.b 82 | HDMI_VP_POL 0x00120808.b 83 | HDMI_FC_INVIDCONF 0x00121000.b 84 | HDMI_FC_INHACTIV0 0x00121001.b 85 | HDMI_FC_INHACTIV1 0x00121002.b 86 | HDMI_FC_INHBLANK0 0x00121003.b 87 | HDMI_FC_INHBLANK1 0x00121004.b 88 | HDMI_FC_INVACTIV0 0x00121005.b 89 | HDMI_FC_INVACTIV1 0x00121006.b 90 | HDMI_FC_INVBLANK 0x00121007.b 91 | HDMI_FC_HSYNCINDELAY0 0x00121008.b 92 | HDMI_FC_HSYNCINDELAY1 0x00121009.b 93 | HDMI_FC_HSYNCINWIDTH0 0x0012100A.b 94 | HDMI_FC_HSYNCINWIDTH1 0x0012100B.b 95 | HDMI_FC_VSYNCINDELAY 0x0012100C.b 96 | HDMI_FC_VSYNCINWIDTH 0x0012100D.b 97 | HDMI_FC_INFREQ0 0x0012100E.b 98 | HDMI_FC_INFREQ1 0x0012100F.b 99 | HDMI_FC_INFREQ2 0x00121010.b 100 | HDMI_FC_CTRLDUR 0x00121011.b 101 | HDMI_FC_EXCTRLDUR 0x00121012.b 102 | HDMI_FC_EXCTRLSPAC 0x00121013.b 103 | HDMI_FC_CH0PREAM 0x00121014.b 104 | HDMI_FC_CH1PREAM 0x00121015.b 105 | HDMI_FC_CH2PREAM 0x00121016.b 106 | HDMI_FC_AVICONF3 0x00121017.b 107 | HDMI_FC_GCP 0x00121018.b 108 | HDMI_FC_AVICONF0 0x00121019.b 109 | HDMI_FC_AVICONF1 0x0012101A.b 110 | HDMI_FC_AVICONF2 0x0012101B.b 111 | HDMI_FC_AVIVID 0x0012101C.b 112 | HDMI_FC_AVIETB0 0x0012101D.b 113 | HDMI_FC_AVIETB1 0x0012101E.b 114 | HDMI_FC_AVISBB0 0x0012101F.b 115 | HDMI_FC_AVISBB1 0x00121020.b 116 | HDMI_FC_AVIELB0 0x00121021.b 117 | HDMI_FC_AVIELB1 0x00121022.b 118 | HDMI_FC_AVISRB0 0x00121023.b 119 | HDMI_FC_AVISRB1 0x00121024.b 120 | HDMI_FC_AUDICONF0 0x00121025.b 121 | HDMI_FC_AUDICONF1 0x00121026.b 122 | HDMI_FC_AUDICONF2 0x00121027.b 123 | HDMI_FC_AUDICONF3 0x00121028.b 124 | HDMI_FC_VSDIEEEID0 0x00121029.b 125 | HDMI_FC_VSDSIZE 0x0012102A.b 126 | HDMI_FC_VSDIEEEID1 0x00121030.b 127 | HDMI_FC_VSDIEEEID2 0x00121031.b 128 | HDMI_FC_VSDPAYLOAD0 0x00121032.b 129 | HDMI_FC_VSDPAYLOAD1 0x00121033.b 130 | HDMI_FC_VSDPAYLOAD2 0x00121034.b 131 | HDMI_FC_VSDPAYLOAD3 0x00121035.b 132 | HDMI_FC_VSDPAYLOAD4 0x00121036.b 133 | HDMI_FC_VSDPAYLOAD5 0x00121037.b 134 | HDMI_FC_VSDPAYLOAD6 0x00121038.b 135 | HDMI_FC_VSDPAYLOAD7 0x00121039.b 136 | HDMI_FC_VSDPAYLOAD8 0x0012103A.b 137 | HDMI_FC_VSDPAYLOAD9 0x0012103B.b 138 | HDMI_FC_VSDPAYLOAD10 0x0012103C.b 139 | HDMI_FC_VSDPAYLOAD11 0x0012103D.b 140 | HDMI_FC_VSDPAYLOAD12 0x0012103E.b 141 | HDMI_FC_VSDPAYLOAD13 0x0012103F.b 142 | HDMI_FC_VSDPAYLOAD14 0x00121040.b 143 | HDMI_FC_VSDPAYLOAD15 0x00121041.b 144 | HDMI_FC_VSDPAYLOAD16 0x00121042.b 145 | HDMI_FC_VSDPAYLOAD17 0x00121043.b 146 | HDMI_FC_VSDPAYLOAD18 0x00121044.b 147 | HDMI_FC_VSDPAYLOAD19 0x00121045.b 148 | HDMI_FC_VSDPAYLOAD20 0x00121046.b 149 | HDMI_FC_VSDPAYLOAD21 0x00121047.b 150 | HDMI_FC_VSDPAYLOAD22 0x00121048.b 151 | HDMI_FC_VSDPAYLOAD23 0x00121049.b 152 | HDMI_FC_SPDVENDORNAME0 0x0012104A.b 153 | HDMI_FC_SPDPRODUCTNAME0 0x00121052.b 154 | HDMI_FC_SPDDEVICEINF 0x00121062.b 155 | HDMI_FC_AUDSCONF 0x00121063.b 156 | HDMI_FC_AUDSSTAT 0x00121064.b 157 | HDMI_FC_AUDSV 0x00121065.b 158 | HDMI_FC_AUDSU 0x00121066.b 159 | HDMI_FC_AUDSCHNLS0 0x00121067.b 160 | HDMI_FC_AUDSCHNLS1 0x00121068.b 161 | HDMI_FC_AUDSCHNLS2 0x00121069.b 162 | HDMI_FC_AUDSCHNLS3 0x0012106A.b 163 | HDMI_FC_AUDSCHNLS4 0x0012106B.b 164 | HDMI_FC_AUDSCHNLS5 0x0012106C.b 165 | HDMI_FC_AUDSCHNLS6 0x0012106D.b 166 | HDMI_FC_AUDSCHNLS7 0x0012106E.b 167 | HDMI_FC_AUDSCHNLS8 0x0012106F.b 168 | HDMI_FC_CTRLQHIGH 0x00121073.b 169 | HDMI_FC_CTRLQLOW 0x00121074.b 170 | HDMI_FC_ACP0 0x00121075.b 171 | HDMI_FC_ACP1 0x00121091.b 172 | HDMI_FC_ISCR1_0 0x00121092.b 173 | HDMI_FC_ISCR1_1 0x00121093.b 174 | HDMI_FC_ISCR2_0 0x001210A3.b 175 | HDMI_FC_DATAUTO0 0x001210B3.b 176 | HDMI_FC_DATAUTO1 0x001210B4.b 177 | HDMI_FC_DATAUTO2 0x001210B5.b 178 | HDMI_FC_DATMAN 0x001210B6.b 179 | HDMI_FC_DATAUTO3 0x001210B7.b 180 | HDMI_FC_RDRB0 0x001210B8.b 181 | HDMI_FC_RDRB1 0x001210B9.b 182 | HDMI_FC_RDRB2 0x001210BA.b 183 | HDMI_FC_RDRB3 0x001210BB.b 184 | HDMI_FC_RDRB4 0x001210BC.b 185 | HDMI_FC_RDRB5 0x001210BD.b 186 | HDMI_FC_RDRB6 0x001210BE.b 187 | HDMI_FC_RDRB7 0x001210BF.b 188 | HDMI_FC_STAT0 0x001210D0.b 189 | HDMI_FC_INT0 0x001210D1.b 190 | HDMI_FC_MASK0 0x001210D2.b 191 | HDMI_FC_POL0 0x001210D3.b 192 | HDMI_FC_STAT1 0x001210D4.b 193 | HDMI_FC_INT1 0x001210D5.b 194 | HDMI_FC_MASK1 0x001210D6.b 195 | HDMI_FC_POL1 0x001210D7.b 196 | HDMI_FC_STAT2 0x001210D8.b 197 | HDMI_FC_INT2 0x001210D9.b 198 | HDMI_FC_MASK2 0x001210DA.b 199 | HDMI_FC_POL2 0x001210DB.b 200 | HDMI_FC_PRCONF 0x001210E0.b 201 | HDMI_FC_GMD_STAT 0x00121100.b 202 | HDMI_FC_GMD_EN 0x00121101.b 203 | HDMI_FC_GMD_UP 0x00121102.b 204 | HDMI_FC_GMD_CONF 0x00121103.b 205 | HDMI_FC_GMD_HB 0x00121104.b 206 | HDMI_FC_GMD_PB0 0x00121105.b 207 | HDMI_FC_GMD_PB1 0x00121106.b 208 | HDMI_FC_GMD_PB2 0x00121107.b 209 | HDMI_FC_GMD_PB3 0x00121108.b 210 | HDMI_FC_GMD_PB4 0x00121109.b 211 | HDMI_FC_GMD_PB5 0x0012110A.b 212 | HDMI_FC_GMD_PB6 0x0012110B.b 213 | HDMI_FC_GMD_PB7 0x0012110C.b 214 | HDMI_FC_GMD_PB8 0x0012110D.b 215 | HDMI_FC_GMD_PB9 0x0012110E.b 216 | HDMI_FC_GMD_PB10 0x0012110F.b 217 | HDMI_FC_GMD_PB11 0x00121110.b 218 | HDMI_FC_GMD_PB12 0x00121111.b 219 | HDMI_FC_GMD_PB13 0x00121112.b 220 | HDMI_FC_GMD_PB14 0x00121113.b 221 | HDMI_FC_GMD_PB15 0x00121114.b 222 | HDMI_FC_GMD_PB16 0x00121115.b 223 | HDMI_FC_GMD_PB17 0x00121116.b 224 | HDMI_FC_GMD_PB18 0x00121117.b 225 | HDMI_FC_GMD_PB19 0x00121118.b 226 | HDMI_FC_GMD_PB20 0x00121119.b 227 | HDMI_FC_GMD_PB21 0x0012111A.b 228 | HDMI_FC_GMD_PB22 0x0012111B.b 229 | HDMI_FC_GMD_PB23 0x0012111C.b 230 | HDMI_FC_GMD_PB24 0x0012111D.b 231 | HDMI_FC_GMD_PB25 0x0012111E.b 232 | HDMI_FC_GMD_PB26 0x0012111F.b 233 | HDMI_FC_GMD_PB27 0x00121120.b 234 | HDMI_FC_DBGFORCE 0x00121200.b 235 | HDMI_FC_DBGAUD0CH0 0x00121201.b 236 | HDMI_FC_DBGAUD1CH0 0x00121202.b 237 | HDMI_FC_DBGAUD2CH0 0x00121203.b 238 | HDMI_FC_DBGAUD0CH1 0x00121204.b 239 | HDMI_FC_DBGAUD1CH1 0x00121205.b 240 | HDMI_FC_DBGAUD2CH1 0x00121206.b 241 | HDMI_FC_DBGAUD0CH2 0x00121207.b 242 | HDMI_FC_DBGAUD1CH2 0x00121208.b 243 | HDMI_FC_DBGAUD2CH2 0x00121209.b 244 | HDMI_FC_DBGAUD0CH3 0x0012120A.b 245 | HDMI_FC_DBGAUD1CH3 0x0012120B.b 246 | HDMI_FC_DBGAUD2CH3 0x0012120C.b 247 | HDMI_FC_DBGAUD0CH4 0x0012120D.b 248 | HDMI_FC_DBGAUD1CH4 0x0012120E.b 249 | HDMI_FC_DBGAUD2CH4 0x0012120F.b 250 | HDMI_FC_DBGAUD0CH5 0x00121210.b 251 | HDMI_FC_DBGAUD1CH5 0x00121211.b 252 | HDMI_FC_DBGAUD2CH5 0x00121212.b 253 | HDMI_FC_DBGAUD0CH6 0x00121213.b 254 | HDMI_FC_DBGAUD1CH6 0x00121214.b 255 | HDMI_FC_DBGAUD2CH6 0x00121215.b 256 | HDMI_FC_DBGAUD0CH7 0x00121216.b 257 | HDMI_FC_DBGAUD1CH7 0x00121217.b 258 | HDMI_FC_DBGAUD2CH7 0x00121218.b 259 | HDMI_FC_DBGTMDS0 0x00121219.b 260 | HDMI_FC_DBGTMDS1 0x0012121A.b 261 | HDMI_FC_DBGTMDS2 0x0012121B.b 262 | HDMI_PHY_CONF0 0x00123000.b 263 | HDMI_PHY_TST0 0x00123001.b 264 | HDMI_PHY_TST1 0x00123002.b 265 | HDMI_PHY_TST2 0x00123003.b 266 | HDMI_PHY_STAT0 0x00123004.b 267 | HDMI_PHY_INT0 0x00123005.b 268 | HDMI_PHY_MASK0 0x00123006.b 269 | HDMI_PHY_POL0 0x00123007.b 270 | HDMI_PHY_I2CM_SLAVE_ADDR 0x00123020.b 271 | HDMI_PHY_I2CM_ADDRESS_ADDR 0x00123021.b 272 | HDMI_PHY_I2CM_DATAO_1_ADDR 0x00123022.b 273 | HDMI_PHY_I2CM_DATAO_0_ADDR 0x00123023.b 274 | HDMI_PHY_I2CM_DATAI_1_ADDR 0x00123024.b 275 | HDMI_PHY_I2CM_DATAI_0_ADDR 0x00123025.b 276 | HDMI_PHY_I2CM_OPERATION_ADDR 0x00123026.b 277 | HDMI_PHY_I2CM_INT_ADDR 0x00123027.b 278 | HDMI_PHY_I2CM_CTLINT_ADDR 0x00123028.b 279 | HDMI_PHY_I2CM_DIV_ADDR 0x00123029.b 280 | HDMI_PHY_I2CM_SOFTRSTZ_ADDR 0x0012302A.b 281 | HDMI_PHY_I2CM_SS_SCL_HCNT_1_ADDR 0x0012302B.b 282 | HDMI_PHY_I2CM_SS_SCL_HCNT_0_ADDR 0x0012302C.b 283 | HDMI_PHY_I2CM_SS_SCL_LCNT_1_ADDR 0x0012302D.b 284 | HDMI_PHY_I2CM_SS_SCL_LCNT_0_ADDR 0x0012302E.b 285 | HDMI_PHY_I2CM_FS_SCL_HCNT_1_ADDR 0x0012302F.b 286 | 287 | GPMI_HW_GPMI_COMPARE 0x00112010 288 | GPMI_HW_GPMI_ECCCOUNT 0x00112030 289 | GPMI_HW_GPMI_PAYLOAD 0x00112040 290 | GPMI_HW_GPMI_AUXILIARY 0x00112050 291 | GPMI_HW_GPMI_TIMING0 0x00112070 292 | GPMI_HW_GPMI_TIMING1 0x00112080 293 | GPMI_HW_GPMI_TIMING2 0x00112090 294 | GPMI_HW_GPMI_DATA 0x001120A0 295 | GPMI_HW_GPMI_STAT 0x001120B0 296 | GPMI_HW_GPMI_DEBUG 0x001120C0 297 | GPMI_HW_GPMI_VERSION 0x001120D0 298 | GPMI_HW_GPMI_DEBUG2 0x001120E0 299 | GPMI_HW_GPMI_DEBUG3 0x001120F0 300 | GPMI_HW_GPMI_READ_DDR_DLL_CTRL 0x00112100 301 | GPMI_HW_GPMI_WRITE_DDR_DLL_CTRL 0x00112110 302 | GPMI_HW_GPMI_READ_DDR_DLL_STS 0x00112120 303 | GPMI_HW_GPMI_WRITE_DDR_DLL_STS 0x00112130 304 | 305 | HW_BCH_CTRL 0x00114000 306 | HW_BCH_STATUS0 0x00114010 307 | HW_BCH_MODE 0x00114020 308 | HW_BCH_ENCODEPTR 0x00114030 309 | HW_BCH_DATAPTR 0x00114040 310 | HW_BCH_METAPTR 0x00114050 311 | HW_BCH_LAYOUTSELECT 0x00114070 312 | HW_BCH_FLASH0LAYOUT0 0x00114080 313 | HW_BCH_FLASH0LAYOUT1 0x00114090 314 | HW_BCH_FLASH1LAYOUT0 0x001140A0 315 | HW_BCH_FLASH1LAYOUT1 0x001140B0 316 | HW_BCH_FLASH2LAYOUT0 0x001140C0 317 | HW_BCH_FLASH2LAYOUT1 0x001140D0 318 | HW_BCH_FLASH3LAYOUT0 0x001140E0 319 | HW_BCH_FLASH3LAYOUT1 0x001140F0 320 | HW_BCH_DEBUG0 0x00114100 321 | HW_BCH_DBGKESREAD 0x00114110 322 | HW_BCH_DBGCSFEREAD 0x00114120 323 | HW_BCH_DBGSYNDGENREAD 0x00114130 324 | HW_BCH_DBGAHBMREAD 0x00114140 325 | HW_BCH_BLOCKNAME 0x00114150 326 | HW_BCH_VERSION 0x00114160 327 | 328 | SPDIF_SCR 0x02004000 329 | SPDIF_SRCD 0x02004004 330 | SPDIF_SRPC 0x02004008 331 | SPDIF_SIE 0x0200400C 332 | SPDIF_SIC 0x02004010 333 | SPDIF_SIS 0x02004010 334 | SPDIF_SRL 0x02004014 335 | SPDIF_SRR 0x02004018 336 | SPDIF_SRCSH 0x0200401C 337 | SPDIF_SRCSL 0x02004020 338 | SPDIF_SRU 0x02004024 339 | SPDIF_SRQ 0x02004028 340 | SPDIF_STL 0x0200402C 341 | SPDIF_STR 0x02004030 342 | SPDIF_STCSCH 0x02004034 343 | SPDIF_STCSCL 0x02004038 344 | SPDIF_SRFM 0x02004044 345 | SPDIF_STC 0x02004050 346 | 347 | ESAI_ETDR 0x02024000 348 | ESAI_ERDR 0x02024004 349 | ESAI_ECR 0x02024008 350 | ESAI_ESR 0x0202400C 351 | ESAI_TFCR 0x02024010 352 | ESAI_TFSR 0x02024014 353 | ESAI_RFCR 0x02024018 354 | ESAI_RFSR 0x0202401C 355 | ESAI_TSR 0x02024098 356 | ESAI_SAISR 0x020240CC 357 | ESAI_SAICR 0x020240D0 358 | ESAI_TCR 0x020240D4 359 | ESAI_TCCR 0x020240D8 360 | ESAI_RCR 0x020240DC 361 | ESAI_RCCR 0x020240E0 362 | ESAI_TSMA 0x020240E4 363 | ESAI_TSMB 0x020240E8 364 | ESAI_RSMA 0x020240EC 365 | ESAI_RSMB 0x020240F0 366 | ESAI_PRRC 0x020240F8 367 | ESAI_PCRC 0x020240FC 368 | 369 | ASRC_ASRCTR 0x02034000 370 | ASRC_ASRIER 0x02034004 371 | ASRC_ASRCNCR 0x0203400C 372 | ASRC_ASRCFG 0x02034010 373 | ASRC_ASRCSR 0x02034014 374 | ASRC_ASRCDR1 0x02034018 375 | ASRC_ASRCDR2 0x0203401C 376 | ASRC_ASRSTR 0x02034020 377 | ASRC_ASRTFR1 0x02034054 378 | ASRC_ASRCCR 0x0203405C 379 | ASRC_ASRIDRHA 0x02034080 380 | ASRC_ASRIDRLA 0x02034084 381 | ASRC_ASRIDRHB 0x02034088 382 | ASRC_ASRIDRLB 0x0203408C 383 | ASRC_ASRIDRHC 0x02034090 384 | ASRC_ASRIDRLC 0x02034094 385 | ASRC_ASR76K 0x02034098 386 | ASRC_ASR56K 0x0203409C 387 | ASRC_ASRMCRA 0x020340A0 388 | ASRC_ASRFSTA 0x020340A4 389 | ASRC_ASRMCRB 0x020340A8 390 | ASRC_ASRFSTB 0x020340AC 391 | ASRC_ASRMCRC 0x020340B0 392 | ASRC_ASRFSTC 0x020340B4 393 | 394 | VPU_CodeRun 0x02040000 395 | VPU_CodeDown 0x02040004 396 | VPU_HostIntReq 0x02040008 397 | VPU_BitIntClear 0x0204000C 398 | VPU_BitIntSts 0x02040010 399 | VPU_BitCurPc 0x02040018 400 | VPU_BitCodecBusy 0x02040020 401 | 402 | PWM1_PWMCR 0x02080000 403 | PWM1_PWMSR 0x02080004 404 | PWM1_PWMIR 0x02080008 405 | PWM1_PWMSAR 0x0208000C 406 | PWM1_PWMPR 0x02080010 407 | PWM1_PWMCNR 0x02080014 408 | PWM2_PWMCR 0x02084000 409 | PWM2_PWMSR 0x02084004 410 | PWM2_PWMIR 0x02084008 411 | PWM2_PWMSAR 0x0208400C 412 | PWM2_PWMPR 0x02084010 413 | PWM2_PWMCNR 0x02084014 414 | PWM3_PWMCR 0x02088000 415 | PWM3_PWMSR 0x02088004 416 | PWM3_PWMIR 0x02088008 417 | PWM3_PWMSAR 0x0208800C 418 | PWM3_PWMPR 0x02088010 419 | PWM3_PWMCNR 0x02088014 420 | PWM4_PWMCR 0x0208C000 421 | PWM4_PWMSR 0x0208C004 422 | PWM4_PWMIR 0x0208C008 423 | PWM4_PWMSAR 0x0208C00C 424 | PWM4_PWMPR 0x0208C010 425 | PWM4_PWMCNR 0x0208C014 426 | 427 | GPT_CR 0x02098000 428 | GPT_PR 0x02098004 429 | GPT_SR 0x02098008 430 | GPT_IR 0x0209800C 431 | GPT_OCR1 0x02098010 432 | GPT_OCR2 0x02098014 433 | GPT_OCR3 0x02098018 434 | GPT_ICR1 0x0209801C 435 | GPT_ICR2 0x02098020 436 | GPT_CNT 0x02098024 437 | 438 | GPIO1_DR 0x0209C000 439 | GPIO1_GDIR 0x0209C004 440 | GPIO1_PSR 0x0209C008 441 | GPIO1_ICR1 0x0209C00C 442 | GPIO1_ICR2 0x0209C010 443 | GPIO1_IMR 0x0209C014 444 | GPIO1_ISR 0x0209C018 445 | GPIO1_EDGE_SEL 0x0209C01C 446 | 447 | GPIO2_DR 0x020A0000 448 | GPIO2_GDIR 0x020A0004 449 | GPIO2_PSR 0x020A0008 450 | GPIO2_ICR1 0x020A000C 451 | GPIO2_ICR2 0x020A0010 452 | GPIO2_IMR 0x020A0014 453 | GPIO2_ISR 0x020A0018 454 | GPIO2_EDGE_SEL 0x020A001C 455 | 456 | GPIO3_DR 0x020A4000 457 | GPIO3_GDIR 0x020A4004 458 | GPIO3_PSR 0x020A4008 459 | GPIO3_ICR1 0x020A400C 460 | GPIO3_ICR2 0x020A4010 461 | GPIO3_IMR 0x020A4014 462 | GPIO3_ISR 0x020A4018 463 | GPIO3_EDGE_SEL 0x020A401C 464 | 465 | GPIO4_DR 0x020A8000 466 | GPIO4_GDIR 0x020A8004 467 | GPIO4_PSR 0x020A8008 468 | GPIO4_ICR1 0x020A800C 469 | GPIO4_ICR2 0x020A8010 470 | GPIO4_IMR 0x020A8014 471 | GPIO4_ISR 0x020A8018 472 | GPIO4_EDGE_SEL 0x020A801C 473 | 474 | GPIO5_DR 0x020AC000 475 | GPIO5_GDIR 0x020AC004 476 | GPIO5_PSR 0x020AC008 477 | GPIO5_ICR1 0x020AC00C 478 | GPIO5_ICR2 0x020AC010 479 | GPIO5_IMR 0x020AC014 480 | GPIO5_ISR 0x020AC018 481 | GPIO5_EDGE_SEL 0x020AC01C 482 | 483 | GPIO6_DR 0x020B0000 484 | GPIO6_GDIR 0x020B0004 485 | GPIO6_PSR 0x020B0008 486 | GPIO6_ICR1 0x020B000C 487 | GPIO6_ICR2 0x020B0010 488 | GPIO6_IMR 0x020B0014 489 | GPIO6_ISR 0x020B0018 490 | GPIO6_EDGE_SEL 0x020B001C 491 | 492 | GPIO7_DR 0x020B4000 493 | GPIO7_GDIR 0x020B4004 494 | GPIO7_PSR 0x020B4008 495 | GPIO7_ICR1 0x020B400C 496 | GPIO7_ICR2 0x020B4010 497 | GPIO7_IMR 0x020B4014 498 | GPIO7_ISR 0x020B4018 499 | GPIO7_EDGE_SEL 0x020B401C 500 | 501 | KPP_KPCR 0x020B8000.W 502 | KPP_KPSR 0x020B8002.W 503 | KPP_KDDR 0x020B8004.W 504 | KPP_KPDR 0x020B8006.W 505 | 506 | WDOG1_WCR 0x020BC000.W 507 | WDOG1_WSR 0x020BC002.W 508 | WDOG1_WRSR 0x020BC004.W 509 | WDOG1_WICR 0x020BC006.W 510 | WDOG1_WMCR 0x020BC008.W 511 | 512 | WDOG2_WCR 0x020C0000.W 513 | WDOG2_WSR 0x020C0002.W 514 | WDOG2_WRSR 0x020C0004.W 515 | WDOG2_WICR 0x020C0006.W 516 | WDOG2_WMCR 0x020C0008.W 517 | 518 | CCM_CCR 0x020C4000 519 | CCM_CCDR 0x020C4004 520 | CCM_CSR 0x020C4008 521 | CCM_CCSR 0x020C400C 522 | CCM_CACRR 0x020C4010 523 | CCM_CBCDR 0x020C4014 524 | CCM_CBCMR 0x020C4018 525 | CCM_CSCMR1 0x020C401C 526 | CCM_CSCMR2 0x020C4020 527 | CCM_CSCDR1 0x020C4024 528 | CCM_CS1CDR 0x020C4028 529 | CCM_CS2CDR 0x020C402C 530 | CCM_CDCDR 0x020C4030 531 | CCM_CHSCCDR 0x020C4034 532 | CCM_CSCDR2 0x020C4038 533 | CCM_CSCDR3 0x020C403C 534 | CCM_CDHIPR 0x020C4048 535 | CCM_CLPCR 0x020C4054 536 | CCM_CISR 0x020C4058 537 | CCM_CIMR 0x020C405C 538 | CCM_CCOSR 0x020C4060 539 | CCM_CGPR 0x020C4064 540 | CCM_CCGR0 0x020C4068 541 | CCM_CCGR1 0x020C406C 542 | CCM_CCGR2 0x020C4070 543 | CCM_CCGR3 0x020C4074 544 | CCM_CCGR4 0x020C4078 545 | CCM_CCGR5 0x020C407C 546 | CCM_CCGR6 0x020C4080 547 | CCM_CMEOR 0x020C4088 548 | 549 | CCM_ANALOG_PLL_ARM 0x020C8000 550 | CCM_ANALOG_PLL_ARM_SET 0x020C8004 551 | CCM_ANALOG_PLL_ARM_CLR 0x020C8008 552 | CCM_ANALOG_PLL_ARM_TOG 0x020C800C 553 | CCM_ANALOG_PLL_USB1 0x020C8010 554 | CCM_ANALOG_PLL_USB1_SET 0x020C8014 555 | CCM_ANALOG_PLL_USB1_CLR 0x020C8018 556 | CCM_ANALOG_PLL_USB1_TOG 0x020C801C 557 | CCM_ANALOG_PLL_USB2 0x020C8020 558 | CCM_ANALOG_PLL_USB2_SET 0x020C8024 559 | CCM_ANALOG_PLL_USB2_CLR 0x020C8028 560 | CCM_ANALOG_PLL_USB2_TOG 0x020C802C 561 | CCM_ANALOG_PLL_SYS 0x020C8030 562 | CCM_ANALOG_PLL_SYS_SET 0x020C8034 563 | CCM_ANALOG_PLL_SYS_CLR 0x020C8038 564 | CCM_ANALOG_PLL_SYS_TOG 0x020C803C 565 | CCM_ANALOG_PLL_SYS_SS 0x020C8040 566 | CCM_ANALOG_PLL_SYS_NUM 0x020C8050 567 | CCM_ANALOG_PLL_SYS_DENOM 0x020C8060 568 | CCM_ANALOG_PLL_AUDIO 0x020C8070 569 | CCM_ANALOG_PLL_AUDIO_SET 0x020C8074 570 | CCM_ANALOG_PLL_AUDIO_CLR 0x020C8078 571 | CCM_ANALOG_PLL_AUDIO_TOG 0x020C807C 572 | CCM_ANALOG_PLL_AUDIO_NUM 0x020C8080 573 | CCM_ANALOG_PLL_AUDIO_DENOM 0x020C8090 574 | CCM_ANALOG_PLL_VIDEO 0x020C80A0 575 | CCM_ANALOG_PLL_VIDEO_SET 0x020C80A4 576 | CCM_ANALOG_PLL_VIDEO_CLR 0x020C80A8 577 | CCM_ANALOG_PLL_VIDEO_TOG 0x020C80AC 578 | CCM_ANALOG_PLL_VIDEO_NUM 0x020C80B0 579 | CCM_ANALOG_PLL_VIDEO_DENOM 0x020C80C0 580 | CCM_ANALOG_PLL_MLB 0x020C80D0 581 | CCM_ANALOG_PLL_MLB_SET 0x020C80D4 582 | CCM_ANALOG_PLL_MLB_CLR 0x020C80D8 583 | CCM_ANALOG_PLL_MLB_TOG 0x020C80DC 584 | CCM_ANALOG_PLL_ENET 0x020C80E0 585 | CCM_ANALOG_PLL_ENET_SET 0x020C80E4 586 | CCM_ANALOG_PLL_ENET_CLR 0x020C80E8 587 | CCM_ANALOG_PLL_ENET_TOG 0x020C80EC 588 | CCM_ANALOG_PFD_480 0x020C80F0 589 | CCM_ANALOG_PFD_480_SET 0x020C80F4 590 | CCM_ANALOG_PFD_480_CLR 0x020C80F8 591 | CCM_ANALOG_PFD_480_TOG 0x020C80FC 592 | CCM_ANALOG_PFD_528 0x020C8100 593 | CCM_ANALOG_PFD_528_SET 0x020C8104 594 | CCM_ANALOG_PFD_528_CLR 0x020C8108 595 | CCM_ANALOG_PFD_528_TOG 0x020C810C 596 | CCM_ANALOG_MISC0 0x020C8150 597 | :CLKGATE_DELAY:28-26 598 | :CLKGATE_CTL:25 599 | :WBCP_VPW_THRESH:19-18 600 | :OSC_XTALOK_EN:17 601 | :OSC_XTALOK:16 602 | :OSC_I:15-14 603 | :STOP_MODE_CONFIG:12 604 | :REFTOP_VBGUP:7 605 | :REFTOP_VBGADJ:6-4 606 | :REFTOP_SELFBIASOFF:3 607 | :REFTOP_PWD:0 608 | CCM_ANALOG_MISC0_SET 0x020C8154 609 | CCM_ANALOG_MISC0_CLR 0x020C8158 610 | CCM_ANALOG_MISC0_TOG 0x020C815C 611 | CCM_ANALOG_MISC2 0x020C8170 612 | :video_div:31-30 613 | :REG2_STEP_TIME:29-28 614 | :REG1_STEP_TIME:27-26 615 | :REG0_STEP_TIME:25-24 616 | :REG2_OK:22 617 | :REG2_ENABLE_BO:21 618 | :REG2_BO_STATUS:19 619 | :REG2_BO_OFFSET:18-16 620 | :REG1_BO_ENABLE:13 621 | :REG1_BO_STATUS:11 622 | :REG1_BO_OFFSET:10-8 623 | :PLL3_DISABLE:7 624 | :REG0_BO_ENABLE:5 625 | :REG0_BO_STATUS:3 626 | :REG0_BO_OFFSET:2-0 627 | CCM_ANALOG_MISC2_SET 0x020C8174 628 | CCM_ANALOG_MISC2_CLR 0x020C8178 629 | CCM_ANALOG_MISC2_TOG 0x020C817C 630 | 631 | USBPHY1_PWD 0x020C9000 632 | USBPHY1_PWD_SET 0x020C9004 633 | USBPHY1_PWD_CLR 0x020C9008 634 | USBPHY1_PWD_TOG 0x020C900C 635 | USBPHY1_TX 0x020C9010 636 | USBPHY1_TX_SET 0x020C9014 637 | USBPHY1_TX_TOG 0x020C901C 638 | USBPHY1_RX 0x020C9020 639 | USBPHY1_RX_SET 0x020C9024 640 | USBPHY1_RX_CLR 0x020C9028 641 | USBPHY1_RX_TOG 0x020C902C 642 | USBPHY1_CTRL 0x020C9030 643 | USBPHY1_CTRL_SET 0x020C9034 644 | USBPHY1_CTRL_CLR 0x020C9038 645 | USBPHY1_CTRL_TOG 0x020C903C 646 | USBPHY1_STATUS 0x020C9040 647 | :RESUME_STATUS:10 648 | :OTGID_STATUS:8 649 | :DEVPLUGIN_STATUS:6 650 | :HOSTDISCONDETECT_STATUS:3 651 | USBPHY1_DEBUG 0x020C9050 652 | USBPHY1_DEBUG_SET 0x020C9054 653 | USBPHY1_DEBUG_CLR 0x020C9058 654 | USBPHY1_DEBUG_TOG 0x020C905C 655 | USBPHY1_DEBUG0_STATUS 0x020C9060 656 | USBPHY1_DEBUG1 0x020C9070 657 | USBPHY1_DEBUG1_SET 0x020C9074 658 | USBPHY1_DEBUG1_CLR 0x020C9078 659 | USBPHY1_DEBUG1_TOG 0x020C907C 660 | USBPHY1_VERSION 0x020C9080 661 | USBPHY2_PWD 0x020CA000 662 | USBPHY2_PWD_SET 0x020CA004 663 | USBPHY2_PWD_CLR 0x020CA008 664 | USBPHY2_PWD_TOG 0x020CA00C 665 | USBPHY2_TX 0x020CA010 666 | USBPHY2_TX_SET 0x020CA014 667 | USBPHY2_TX_CLR 0x020CA018 668 | USBPHY2_TX_TOG 0x020CA01C 669 | USBPHY2_RX 0x020CA020 670 | USBPHY2_RX_SET 0x020CA024 671 | USBPHY2_RX_CLR 0x020CA028 672 | USBPHY2_RX_TOG 0x020CA02C 673 | USBPHY2_CTRL 0x020CA030 674 | USBPHY2_CTRL_SET 0x020CA034 675 | USBPHY2_CTRL_CLR 0x020CA038 676 | USBPHY2_CTRL_TOG 0x020CA03C 677 | USBPHY2_STATUS 0x020CA040 678 | USBPHY2_DEBUG 0x020CA050 679 | USBPHY2_DEBUG_SET 0x020CA054 680 | USBPHY2_DEBUG_CLR 0x020CA058 681 | USBPHY2_DEBUG_TOG 0x020CA05C 682 | USBPHY2_DEBUG0_STATUS 0x020CA060 683 | USBPHY2_DEBUG1 0x020CA070 684 | USBPHY2_DEBUG1_SET 0x020CA074 685 | USBPHY2_DEBUG1_CLR 0x020CA078 686 | USBPHY2_DEBUG1_TOG 0x020CA07C 687 | USBPHY2_VERSION 0x020CA080 688 | 689 | USB_ANALOG_USB1_VBUS_DETECT 0x020C81A0 690 | USB_ANALOG_USB1_VBUS_DETECT_SET 0x020C81A4 691 | USB_ANALOG_USB1_VBUS_DETECT_CLR 0x020C81A8 692 | USB_ANALOG_USB1_VBUS_DETECT_TOG 0x020C81AC 693 | USB_ANALOG_USB1_CHRG_DETECT 0x020C81B0 694 | USB_ANALOG_USB1_CHRG_DETECT_SET 0x020C81B4 695 | USB_ANALOG_USB1_CHRG_DETECT_CLR 0x020C81B8 696 | USB_ANALOG_USB1_CHRG_DETECT_TOG 0x020C81BC 697 | USB_ANALOG_USB1_VBUS_DETECT_STAT 0x020C81C0 698 | USB_ANALOG_USB1_CHRG_DETECT_STAT 0x020C81D0 699 | USB_ANALOG_USB1_MISC 0x020C81F0 700 | USB_ANALOG_USB1_MISC_SET 0x020C81F4 701 | USB_ANALOG_USB1_MISC_CLR 0x020C81F8 702 | USB_ANALOG_USB1_MISC_TOG 0x020C81FC 703 | USB_ANALOG_USB2_VBUS_DETECT 0x020C8200 704 | USB_ANALOG_USB2_VBUS_DETECT_SET 0x020C8204 705 | USB_ANALOG_USB2_VBUS_DETECT_CLR 0x020C8208 706 | USB_ANALOG_USB2_VBUS_DETECT_TOG 0x020C820C 707 | USB_ANALOG_USB2_CHRG_DETECT 0x020C8210 708 | USB_ANALOG_USB2_CHRG_DETECT_SET 0x020C8214 709 | USB_ANALOG_USB2_CHRG_DETECT_CLR 0x020C8218 710 | USB_ANALOG_USB2_CHRG_DETECT_TOG 0x020C821C 711 | USB_ANALOG_USB2_VBUS_DETECT_STAT 0x020C8220 712 | USB_ANALOG_USB2_CHRG_DETECT_STAT 0x020C8230 713 | USB_ANALOG_USB2_MISC 0x020C8250 714 | USB_ANALOG_USB2_MISC_SET 0x020C8254 715 | USB_ANALOG_USB2_MISC_CLR 0x020C8258 716 | USB_ANALOG_USB2_MISC_TOG 0x020C825C 717 | USB_ANALOG_DIGPROG 0x020C8260 718 | 719 | 720 | SRC_SCR 0x020D8000 721 | SRC_SBMR1 0x020D8004 722 | SRC_SRSR 0x020D8008 723 | SRC_SISR 0x020D8014 724 | SRC_SIMR 0x020D8018 725 | SRC_SBMR2 0x020D801C 726 | SRC_GPR1 0x020D8020 727 | SRC_GPR2 0x020D8024 728 | SRC_GPR3 0x020D8028 729 | SRC_GPR4 0x020D802C 730 | SRC_GPR5 0x020D8030 731 | SRC_GPR6 0x020D8034 732 | SRC_GPR7 0x020D8038 733 | SRC_GPR8 0x020D803C 734 | SRC_GPR9 0x020D8040 735 | SRC_GPR10 0x020D8044 736 | 737 | MIPI_CSI_VERSION 0x021DC000 738 | MIPI_CSI_N_LANES 0x021DC004 739 | MIPI_CSI_PHY_SHUTDOWNZ 0x021DC008 740 | MIPI_CSI_DPHY_RSTZ 0x021DC00C 741 | MIPI_CSI_CSI2_RESETN 0x021DC010 742 | MIPI_CSI_PHY_STATE 0x021DC014 743 | MIPI_CSI_DATA_IDS_1 0x021DC018 744 | MIPI_CSI_DATA_IDS_2 0x021DC01C 745 | MIPI_CSI_ERR1 0x021DC020 746 | MIPI_CSI_ERR2 0x021DC024 747 | MIPI_CSI_MASK1 0x021DC028 748 | MIPI_CSI_MASK2 0x021DC02C 749 | MIPI_CSI_PHY_TST_CRTL0 0x021DC030 750 | MIPI_CSI_PHY_TST_CTRL1 0x021DC034 751 | 752 | MIPI_DSI_VERSION 0x021E0000 753 | MIPI_DSI_PWR_UP 0x021E0004 754 | MIPI_DSI_CLKMGR_CFG 0x021E0008 755 | MIPI_DSI_DPI_CFG 0x021E000C 756 | MIPI_DSI_DBI_CFG 0x021E0010 757 | MIPI_DSI_DBIS_CMDSIZE 0x021E0014 758 | MIPI_DSI_PCKHDL_CFG 0x021E0018 759 | MIPI_DSI_VID_MODE_CFG 0x021E001C 760 | MIPI_DSI_VID_PKT_CFG 0x021E0020 761 | MIPI_DSI_CMD_MODE_CFG 0x021E0024 762 | MIPI_DSI_TMR_LINE_CFG 0x021E0028 763 | MIPI_DSI_VTIMING_CFG 0x021E002C 764 | MIPI_DSI_PHY_TMR_CFG 0x021E0030 765 | MIPI_DSI_GEN_HDR 0x021E0034 766 | MIPI_DSI_GEN_PLD_DATA 0x021E0038 767 | MIPI_DSI_CMD_PKT_STATUS 0x021E003C 768 | MIPI_DSI_TO_CNT_CFG0 0x021E0040 769 | MIPI_DSI_ERROR_ST0 0x021E0044 770 | MIPI_DSI_ERROR_ST1 0x021E0048 771 | MIPI_DSI_ERROR_MSK0 0x021E004C 772 | MIPI_DSI_ERROR_MSK1 0x021E0050 773 | MIPI_DSI_PHY_RSTZ 0x021E0054 774 | MIPI_DSI_PHY_IF_CFG_ 0x021E0058 775 | MIPI_DSI_PHY_IF_CTRL 0x021E005C 776 | MIPI_DSI_PHY_STATUS 0x021E0060 777 | MIPI_DSI_PHY_TST_CTRL0 0x021E0064 778 | MIPI_DSI_PHY_TST_CTRL1 0x021E0068 779 | 780 | GPC_CNTR 0x020DC000 781 | GPC_PGR 0x020DC004 782 | GPC_IMR1 0x020DC008 783 | GPC_IMR2 0x020DC00C 784 | GPC_IMR3 0x020DC010 785 | GPC_IMR4 0x020DC014 786 | GPC_ISR1 0x020DC018 787 | GPC_ISR2 0x020DC01C 788 | GPC_ISR3 0x020DC020 789 | GPC_ISR4 0x020DC024 790 | 791 | PGC_GPU_CTRL 0x020DC260 792 | PGC_GPU_PUPSCR 0x020DC264 793 | PGC_GPU_PDNSCR 0x020DC268 794 | PGC_GPU_SR 0x020DC26C 795 | PGC_CPU_CTRL 0x020DC2A0 796 | PGC_CPU_PUPSCR 0x020DC2A4 797 | PGC_CPU_PDNSCR 0x020DC2A8 798 | PGC_CPU_SR 0x020DC2AC 799 | 800 | DVFSC_THRS 0x020DC180 801 | DVFSC_COUN 0x020DC184 802 | DVFSC_SIG1 0x020DC188 803 | DVFSC_DVFSSIG0 0x020DC18C 804 | DVFSC_DVFSGPC0 0x020DC190 805 | DVFSC_DVFSGPC1 0x020DC194 806 | DVFSC_DVFSGPBT 0x020DC198 807 | DVFSC_DVFSEMAC 0x020DC19C 808 | DVFSC_CNTR 0x020DC1A0 809 | DVFSC_DVFSLTR0_0 0x020DC1A4 810 | DVFSC_DVFSLTR0_1 0x020DC1A8 811 | DVFSC_DVFSLTR1_0 0x020DC1AC 812 | DVFSC_DVFSLTR1_1 0x020DC1B0 813 | DVFSC_DVFSPT0 0x020DC1B4 814 | DVFSC_DVFSPT1 0x020DC1B8 815 | DVFSC_DVFSPT2 0x020DC1BC 816 | DVFSC_DVFSPT3 0x020DC1C0 817 | 818 | IOMUXC_GPR0 0x020E0000 819 | IOMUXC_GPR1 0x020E0004 820 | IOMUXC_GPR2 0x020E0008 821 | :COUNTER_RESET_VAL:21-20 822 | :LVDS_CLK_SHIFT:18-16 823 | :DI1_VS_POLARITY:10 824 | :DI0_VS_POLARITY:9 825 | :BIT_MAPPING_CH1:8 826 | :DATA_WIDTH_CH1:7 827 | :BIT_MAPPING_CH0:6 828 | :DATA_WIDTH_CH0:5 829 | :SPLIT_MODE_EN:4 830 | :CH1_MODE:3-2 831 | :CH0_MODE:1-0 832 | IOMUXC_GPR3 0x020E000C 833 | IOMUXC_GPR4 0x020E0010 834 | IOMUXC_GPR5 0x020E0014 835 | IOMUXC_GPR6 0x020E0018 836 | IOMUXC_GPR7 0x020E001C 837 | IOMUXC_GPR8 0x020E0020 838 | IOMUXC_GPR9 0x020E0024 839 | IOMUXC_GPR10 0x020E0028 840 | IOMUXC_GPR11 0x020E002C 841 | IOMUXC_GPR12 0x020E0030 842 | IOMUXC_GPR13 0x020E0034 843 | IOMUXC_OBSERVE_MUX_0 0x020E0038 844 | IOMUXC_OBSERVE_MUX_1 0x020E003C 845 | IOMUXC_OBSERVE_MUX_2 0x020E0040 846 | IOMUXC_OBSERVE_MUX_3 0x020E0044 847 | IOMUXC_OBSERVE_MUX_4 0x020E0048 848 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA10 0x020E004C 849 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA11 0x020E0050 850 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA12 0x020E0054 851 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA13 0x020E0058 852 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA14 0x020E005C 853 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA15 0x020E0060 854 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA16 0x020E0064 855 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA17 0x020E0068 856 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA18 0x020E006C 857 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA19 0x020E0070 858 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA04 0x020E0074 859 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA05 0x020E0078 860 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA06 0x020E007C 861 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA07 0x020E0080 862 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA08 0x020E0084 863 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA09 0x020E0088 864 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA_EN 0x020E008C 865 | IOMUXC_SW_MUX_CTL_PAD_CSI0_HSYNC 0x020E0090 866 | IOMUXC_SW_MUX_CTL_PAD_CSI0_PIXCLK 0x020E0094 867 | IOMUXC_SW_MUX_CTL_PAD_CSI0_VSYNC 0x020E0098 868 | IOMUXC_SW_MUX_CTL_PAD_DI0_DISP_CLK 0x020E009C 869 | IOMUXC_SW_MUX_CTL_PAD_DI0_PIN15 0x020E00A0 870 | IOMUXC_SW_MUX_CTL_PAD_DI0_PIN02 0x020E00A4 871 | IOMUXC_SW_MUX_CTL_PAD_DI0_PIN03 0x020E00A8 872 | IOMUXC_SW_MUX_CTL_PAD_DI0_PIN04 0x020E00AC 873 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA00 0x020E00B0 874 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA01 0x020E00B4 875 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA10 0x020E00B8 876 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA11 0x020E00BC 877 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA12 0x020E00C0 878 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA13 0x020E00C4 879 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA14 0x020E00C8 880 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA15 0x020E00CC 881 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA16 0x020E00D0 882 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA17 0x020E00D4 883 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA18 0x020E00D8 884 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA19 0x020E00DC 885 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA02 0x020E00E0 886 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA20 0x020E00E4 887 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA21 0x020E00E8 888 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA22 0x020E00EC 889 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA23 0x020E00F0 890 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA03 0x020E00F4 891 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA04 0x020E00F8 892 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA05 0x020E00FC 893 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA06 0x020E0100 894 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA07 0x020E0104 895 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA08 0x020E0108 896 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA09 0x020E010C 897 | IOMUXC_SW_MUX_CTL_PAD_EIM_ADDR16 0x020E0110 898 | IOMUXC_SW_MUX_CTL_PAD_EIM_ADDR17 0x020E0114 899 | IOMUXC_SW_MUX_CTL_PAD_EIM_ADDR18 0x020E0118 900 | IOMUXC_SW_MUX_CTL_PAD_EIM_ADDR19 0x020E011C 901 | IOMUXC_SW_MUX_CTL_PAD_EIM_ADDR20 0x020E0120 902 | IOMUXC_SW_MUX_CTL_PAD_EIM_ADDR21 0x020E0124 903 | IOMUXC_SW_MUX_CTL_PAD_EIM_ADDR22 0x020E0128 904 | IOMUXC_SW_MUX_CTL_PAD_EIM_ADDR23 0x020E012C 905 | IOMUXC_SW_MUX_CTL_PAD_EIM_ADDR24 0x020E0130 906 | IOMUXC_SW_MUX_CTL_PAD_EIM_ADDR25 0x020E0134 907 | IOMUXC_SW_MUX_CTL_PAD_EIM_BCLK 0x020E0138 908 | IOMUXC_SW_MUX_CTL_PAD_EIM_CS0_B 0x020E013C 909 | IOMUXC_SW_MUX_CTL_PAD_EIM_CS1_B 0x020E0140 910 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA16 0x020E0144 911 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA17 0x020E0148 912 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18 0x020E014C 913 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA19 0x020E0150 914 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA20 0x020E0154 915 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA21 0x020E0158 916 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA22 0x020E015C 917 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA23 0x020E0160 918 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA24 0x020E0164 919 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA25 0x020E0168 920 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA26 0x020E016C 921 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA27 0x020E0170 922 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA28 0x020E0174 923 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA29 0x020E0178 924 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA30 0x020E017C 925 | IOMUXC_SW_MUX_CTL_PAD_EIM_DATA31 0x020E0180 926 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD00 0x020E0184 927 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD01 0x020E0188 928 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD10 0x020E018C 929 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD11 0x020E0190 930 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD12 0x020E0194 931 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD13 0x020E0198 932 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD14 0x020E019C 933 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD15 0x020E01A0 934 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD02 0x020E01A4 935 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD03 0x020E01A8 936 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD04 0x020E01AC 937 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD05 0x020E01B0 938 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD06 0x020E01B4 939 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD07 0x020E01B8 940 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD08 0x020E01BC 941 | IOMUXC_SW_MUX_CTL_PAD_EIM_AD09 0x020E01C0 942 | IOMUXC_SW_MUX_CTL_PAD_EIM_EB0_B 0x020E01C4 943 | IOMUXC_SW_MUX_CTL_PAD_EIM_EB1_B 0x020E01C8 944 | IOMUXC_SW_MUX_CTL_PAD_EIM_EB2_B 0x020E01CC 945 | IOMUXC_SW_MUX_CTL_PAD_EIM_EB3_B 0x020E01D0 946 | IOMUXC_SW_MUX_CTL_PAD_EIM_LBA_B 0x020E01D4 947 | IOMUXC_SW_MUX_CTL_PAD_EIM_OE_B 0x020E01D8 948 | IOMUXC_SW_MUX_CTL_PAD_EIM_RW 0x020E01DC 949 | IOMUXC_SW_MUX_CTL_PAD_EIM_WAIT_B 0x020E01E0 950 | IOMUXC_SW_MUX_CTL_PAD_ENET_CRS_DV 0x020E01E4 951 | IOMUXC_SW_MUX_CTL_PAD_ENET_MDC 0x020E01E8 952 | IOMUXC_SW_MUX_CTL_PAD_ENET_MDIO 0x020E01EC 953 | IOMUXC_SW_MUX_CTL_PAD_ENET_REF_CLK 0x020E01F0 954 | IOMUXC_SW_MUX_CTL_PAD_ENET_RX_ER 0x020E01F4 955 | IOMUXC_SW_MUX_CTL_PAD_ENET_RX_DATA0 0x020E01F8 956 | IOMUXC_SW_MUX_CTL_PAD_ENET_RX_DATA1 0x020E01FC 957 | IOMUXC_SW_MUX_CTL_PAD_ENET_TX_EN 0x020E0200 958 | IOMUXC_SW_MUX_CTL_PAD_ENET_TX_DATA0 0x020E0204 959 | IOMUXC_SW_MUX_CTL_PAD_ENET_TX_DATA1 0x020E0208 960 | IOMUXC_SW_MUX_CTL_PAD_GPIO00 0x020E020C 961 | IOMUXC_SW_MUX_CTL_PAD_GPIO01 0x020E0210 962 | IOMUXC_SW_MUX_CTL_PAD_GPIO16 0x020E0214 963 | IOMUXC_SW_MUX_CTL_PAD_GPIO17 0x020E0218 964 | IOMUXC_SW_MUX_CTL_PAD_GPIO18 0x020E021C 965 | IOMUXC_SW_MUX_CTL_PAD_GPIO19 0x020E0220 966 | IOMUXC_SW_MUX_CTL_PAD_GPIO02 0x020E0224 967 | IOMUXC_SW_MUX_CTL_PAD_GPIO03 0x020E0228 968 | IOMUXC_SW_MUX_CTL_PAD_GPIO04 0x020E022C 969 | IOMUXC_SW_MUX_CTL_PAD_GPIO05 0x020E0230 970 | IOMUXC_SW_MUX_CTL_PAD_GPIO06 0x020E0234 971 | IOMUXC_SW_MUX_CTL_PAD_GPIO07 0x020E0238 972 | IOMUXC_SW_MUX_CTL_PAD_GPIO08 0x020E023C 973 | IOMUXC_SW_MUX_CTL_PAD_GPIO09 0x020E0240 974 | IOMUXC_SW_MUX_CTL_PAD_KEY_COL0 0x020E0244 975 | IOMUXC_SW_MUX_CTL_PAD_KEY_COL1 0x020E0248 976 | IOMUXC_SW_MUX_CTL_PAD_KEY_COL2 0x020E024C 977 | IOMUXC_SW_MUX_CTL_PAD_KEY_COL3 0x020E0250 978 | IOMUXC_SW_MUX_CTL_PAD_KEY_COL4 0x020E0254 979 | IOMUXC_SW_MUX_CTL_PAD_KEY_ROW0 0x020E0258 980 | IOMUXC_SW_MUX_CTL_PAD_KEY_ROW1 0x020E025C 981 | IOMUXC_SW_MUX_CTL_PAD_KEY_ROW2 0x020E0260 982 | IOMUXC_SW_MUX_CTL_PAD_KEY_ROW3 0x020E0264 983 | IOMUXC_SW_MUX_CTL_PAD_KEY_ROW4 0x020E0268 984 | IOMUXC_SW_MUX_CTL_PAD_NAND_ALE 0x020E026C 985 | IOMUXC_SW_MUX_CTL_PAD_NAND_CLE 0x020E0270 986 | IOMUXC_SW_MUX_CTL_PAD_NAND_CS0_B 0x020E0274 987 | IOMUXC_SW_MUX_CTL_PAD_NAND_CS1_B 0x020E0278 988 | IOMUXC_SW_MUX_CTL_PAD_NAND_CS2_B 0x020E027C 989 | IOMUXC_SW_MUX_CTL_PAD_NAND_CS3_B 0x020E0280 990 | IOMUXC_SW_MUX_CTL_PAD_NAND_DATA00 0x020E0284 991 | IOMUXC_SW_MUX_CTL_PAD_NAND_DATA01 0x020E0288 992 | IOMUXC_SW_MUX_CTL_PAD_NAND_DATA02 0x020E028C 993 | IOMUXC_SW_MUX_CTL_PAD_NAND_DATA03 0x020E0290 994 | IOMUXC_SW_MUX_CTL_PAD_NAND_DATA04 0x020E0294 995 | IOMUXC_SW_MUX_CTL_PAD_NAND_DATA05 0x020E0298 996 | IOMUXC_SW_MUX_CTL_PAD_NAND_DATA06 0x020E029C 997 | IOMUXC_SW_MUX_CTL_PAD_NAND_DATA07 0x020E02A0 998 | IOMUXC_SW_MUX_CTL_PAD_NAND_READY_B 0x020E02A4 999 | IOMUXC_SW_MUX_CTL_PAD_NAND_WP_B 0x020E02A8 1000 | IOMUXC_SW_MUX_CTL_PAD_RGMII_RD0 0x020E02AC 1001 | IOMUXC_SW_MUX_CTL_PAD_RGMII_RD1 0x020E02B0 1002 | IOMUXC_SW_MUX_CTL_PAD_RGMII_RD2 0x020E02B4 1003 | IOMUXC_SW_MUX_CTL_PAD_RGMII_RD3 0x020E02B8 1004 | IOMUXC_SW_MUX_CTL_PAD_RGMII_RX_CTL 0x020E02BC 1005 | IOMUXC_SW_MUX_CTL_PAD_RGMII_RXC 0x020E02C0 1006 | IOMUXC_SW_MUX_CTL_PAD_RGMII_TD0 0x020E02C4 1007 | IOMUXC_SW_MUX_CTL_PAD_RGMII_TD1 0x020E02C8 1008 | IOMUXC_SW_MUX_CTL_PAD_RGMII_TD2 0x020E02CC 1009 | IOMUXC_SW_MUX_CTL_PAD_RGMII_TD3 0x020E02D0 1010 | IOMUXC_SW_MUX_CTL_PAD_RGMII_TX_CTL 0x020E02D4 1011 | IOMUXC_SW_MUX_CTL_PAD_RGMII_TXC 0x020E02D8 1012 | IOMUXC_SW_MUX_CTL_PAD_SD1_CLK 0x020E02DC 1013 | IOMUXC_SW_MUX_CTL_PAD_SD1_CMD 0x020E02E0 1014 | IOMUXC_SW_MUX_CTL_PAD_SD1_DATA0 0x020E02E4 1015 | IOMUXC_SW_MUX_CTL_PAD_SD1_DATA1 0x020E02E8 1016 | IOMUXC_SW_MUX_CTL_PAD_SD1_DATA2 0x020E02EC 1017 | IOMUXC_SW_MUX_CTL_PAD_SD1_DATA3 0x020E02F0 1018 | IOMUXC_SW_MUX_CTL_PAD_SD2_CLK 0x020E02F4 1019 | IOMUXC_SW_MUX_CTL_PAD_SD2_CMD 0x020E02F8 1020 | IOMUXC_SW_MUX_CTL_PAD_SD2_DATA0 0x020E02FC 1021 | IOMUXC_SW_MUX_CTL_PAD_SD2_DATA1 0x020E0300 1022 | IOMUXC_SW_MUX_CTL_PAD_SD2_DATA2 0x020E0304 1023 | IOMUXC_SW_MUX_CTL_PAD_SD2_DATA3 0x020E0308 1024 | IOMUXC_SW_MUX_CTL_PAD_SD3_CLK 0x020E030C 1025 | IOMUXC_SW_MUX_CTL_PAD_SD3_CMD 0x020E0310 1026 | IOMUXC_SW_MUX_CTL_PAD_SD3_DATA0 0x020E0314 1027 | IOMUXC_SW_MUX_CTL_PAD_SD3_DATA1 0x020E0318 1028 | IOMUXC_SW_MUX_CTL_PAD_SD3_DATA2 0x020E031C 1029 | IOMUXC_SW_MUX_CTL_PAD_SD3_DATA3 0x020E0320 1030 | IOMUXC_SW_MUX_CTL_PAD_SD3_DATA4 0x020E0324 1031 | IOMUXC_SW_MUX_CTL_PAD_SD3_DATA5 0x020E0328 1032 | IOMUXC_SW_MUX_CTL_PAD_SD3_DATA6 0x020E032C 1033 | IOMUXC_SW_MUX_CTL_PAD_SD3_DATA7 0x020E0330 1034 | IOMUXC_SW_MUX_CTL_PAD_SD3_RESET 0x020E0334 1035 | IOMUXC_SW_MUX_CTL_PAD_SD4_CLK 0x020E0338 1036 | IOMUXC_SW_MUX_CTL_PAD_SD4_CMD 0x020E033C 1037 | IOMUXC_SW_MUX_CTL_PAD_SD4_DATA0 0x020E0340 1038 | IOMUXC_SW_MUX_CTL_PAD_SD4_DATA1 0x020E0344 1039 | IOMUXC_SW_MUX_CTL_PAD_SD4_DATA2 0x020E0348 1040 | IOMUXC_SW_MUX_CTL_PAD_SD4_DATA3 0x020E034C 1041 | IOMUXC_SW_MUX_CTL_PAD_SD4_DATA4 0x020E0350 1042 | IOMUXC_SW_MUX_CTL_PAD_SD4_DATA5 0x020E0354 1043 | IOMUXC_SW_MUX_CTL_PAD_SD4_DATA6 0x020E0358 1044 | IOMUXC_SW_MUX_CTL_PAD_SD4_DATA7 0x020E035C 1045 | 1046 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA10 0x020E0360 1047 | :iomux_pad/ 1048 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA11 0x020E0364 1049 | :iomux_pad/ 1050 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA12 0x020E0368 1051 | :iomux_pad/ 1052 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA13 0x020E036C 1053 | :iomux_pad/ 1054 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA14 0x020E0370 1055 | :iomux_pad/ 1056 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA15 0x020E0374 1057 | :iomux_pad/ 1058 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA16 0x020E0378 1059 | :iomux_pad/ 1060 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA17 0x020E037C 1061 | :iomux_pad/ 1062 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA18 0x020E0380 1063 | :iomux_pad/ 1064 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA19 0x020E0384 1065 | :iomux_pad/ 1066 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA04 0x020E0388 1067 | :iomux_pad/ 1068 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA05 0x020E038C 1069 | :iomux_pad/ 1070 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA06 0x020E0390 1071 | :iomux_pad/ 1072 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA07 0x020E0394 1073 | :iomux_pad/ 1074 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA08 0x020E0398 1075 | :iomux_pad/ 1076 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA09 0x020E039C 1077 | :iomux_pad/ 1078 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA_EN 0x020E03A0 1079 | :iomux_pad/ 1080 | IOMUXC_SW_PAD_CTL_PAD_CSI0_HSYNC 0x020E03A4 1081 | :iomux_pad/ 1082 | IOMUXC_SW_PAD_CTL_PAD_CSI0_PIXCLK 0x020E03A8 1083 | :iomux_pad/ 1084 | IOMUXC_SW_PAD_CTL_PAD_CSI0_VSYNC 0x020E03AC 1085 | :iomux_pad/ 1086 | IOMUXC_SW_PAD_CTL_PAD_DI0_DISP_CLK 0x020E03B0 1087 | :iomux_pad/ 1088 | IOMUXC_SW_PAD_CTL_PAD_DI0_PIN15 0x020E03B4 1089 | :iomux_pad/ 1090 | IOMUXC_SW_PAD_CTL_PAD_DI0_PIN02 0x020E03B8 1091 | :iomux_pad/ 1092 | IOMUXC_SW_PAD_CTL_PAD_DI0_PIN03 0x020E03BC 1093 | :iomux_pad/ 1094 | IOMUXC_SW_PAD_CTL_PAD_DI0_PIN04 0x020E03C0 1095 | :iomux_pad/ 1096 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA00 0x020E03C4 1097 | :iomux_pad/ 1098 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA01 0x020E03C8 1099 | :iomux_pad/ 1100 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA10 0x020E03CC 1101 | :iomux_pad/ 1102 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA11 0x020E03D0 1103 | :iomux_pad/ 1104 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA12 0x020E03D4 1105 | :iomux_pad/ 1106 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA13 0x020E03D8 1107 | :iomux_pad/ 1108 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA14 0x020E03DC 1109 | :iomux_pad/ 1110 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA15 0x020E03E0 1111 | :iomux_pad/ 1112 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA16 0x020E03E4 1113 | :iomux_pad/ 1114 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA17 0x020E03E8 1115 | :iomux_pad/ 1116 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA18 0x020E03EC 1117 | :iomux_pad/ 1118 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA19 0x020E03F0 1119 | :iomux_pad/ 1120 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA02 0x020E03F4 1121 | :iomux_pad/ 1122 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA20 0x020E03F8 1123 | :iomux_pad/ 1124 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA21 0x020E03FC 1125 | :iomux_pad/ 1126 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA22 0x020E0400 1127 | :iomux_pad/ 1128 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA23 0x020E0404 1129 | :iomux_pad/ 1130 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA03 0x020E0408 1131 | :iomux_pad/ 1132 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA04 0x020E040C 1133 | :iomux_pad/ 1134 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA05 0x020E0410 1135 | :iomux_pad/ 1136 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA06 0x020E0414 1137 | :iomux_pad/ 1138 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA07 0x020E0418 1139 | :iomux_pad/ 1140 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA08 0x020E041C 1141 | :iomux_pad/ 1142 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DATA09 0x020E0420 1143 | :iomux_pad/ 1144 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR00 0x020E0424 1145 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR01 0x020E0428 1146 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR10 0x020E042C 1147 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR11 0x020E0430 1148 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR12 0x020E0434 1149 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR13 0x020E0438 1150 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR14 0x020E043C 1151 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR15 0x020E0440 1152 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR02 0x020E0444 1153 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR03 0x020E0448 1154 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR04 0x020E044C 1155 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR05 0x020E0450 1156 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR06 0x020E0454 1157 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR07 0x020E0458 1158 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR08 0x020E045C 1159 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR09 0x020E0460 1160 | IOMUXC_SW_PAD_CTL_PAD_DRAM_CAS_B 0x020E0464 1161 | IOMUXC_SW_PAD_CTL_PAD_DRAM_CS0_B 0x020E0468 1162 | IOMUXC_SW_PAD_CTL_PAD_DRAM_CS1_B 0x020E046C 1163 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM0 0x020E0470 1164 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM1 0x020E0474 1165 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM2 0x020E0478 1166 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM3 0x020E047C 1167 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM4 0x020E0480 1168 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM5 0x020E0484 1169 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM6 0x020E0488 1170 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM7 0x020E048C 1171 | IOMUXC_SW_PAD_CTL_PAD_DRAM_RAS_B 0x020E0490 1172 | IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET 0x020E0494 1173 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDBA0 0x020E0498 1174 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDBA1 0x020E049C 1175 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDBA2 0x020E04A0 1176 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCKE0 0x020E04A4 1177 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCKE1 0x020E04A8 1178 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK0_P 0x020E04AC 1179 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK1_P 0x020E04B0 1180 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ODT0 0x020E04B4 1181 | IOMUXC_SW_PAD_CTL_PAD_DRAM_ODT1 0x020E04B8 1182 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0_P 0x020E04BC 1183 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1_P 0x020E04C0 1184 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2_P 0x020E04C4 1185 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3_P 0x020E04C8 1186 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS4_P 0x020E04CC 1187 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS5_P 0x020E04D0 1188 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS6_P 0x020E04D4 1189 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS7_P 0x020E04D8 1190 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDWE_B 0x020E04DC 1191 | IOMUXC_SW_PAD_CTL_PAD_EIM_ADDR16 0x020E04E0 1192 | :iomux_pad/ 1193 | IOMUXC_SW_PAD_CTL_PAD_EIM_ADDR17 0x020E04E4 1194 | :iomux_pad/ 1195 | IOMUXC_SW_PAD_CTL_PAD_EIM_ADDR18 0x020E04E8 1196 | :iomux_pad/ 1197 | IOMUXC_SW_PAD_CTL_PAD_EIM_ADDR19 0x020E04EC 1198 | :iomux_pad/ 1199 | IOMUXC_SW_PAD_CTL_PAD_EIM_ADDR20 0x020E04F0 1200 | :iomux_pad/ 1201 | IOMUXC_SW_PAD_CTL_PAD_EIM_ADDR21 0x020E04F4 1202 | :iomux_pad/ 1203 | IOMUXC_SW_PAD_CTL_PAD_EIM_ADDR22 0x020E04F8 1204 | :iomux_pad/ 1205 | IOMUXC_SW_PAD_CTL_PAD_EIM_ADDR23 0x020E04FC 1206 | :iomux_pad/ 1207 | IOMUXC_SW_PAD_CTL_PAD_EIM_ADDR24 0x020E0500 1208 | :iomux_pad/ 1209 | IOMUXC_SW_PAD_CTL_PAD_EIM_ADDR25 0x020E0504 1210 | :iomux_pad/ 1211 | IOMUXC_SW_PAD_CTL_PAD_EIM_BCLK 0x020E0508 1212 | :iomux_pad/ 1213 | IOMUXC_SW_PAD_CTL_PAD_EIM_CS0_B 0x020E050C 1214 | :iomux_pad/ 1215 | IOMUXC_SW_PAD_CTL_PAD_EIM_CS1_B 0x020E0510 1216 | :iomux_pad/ 1217 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16 0x020E0514 1218 | :iomux_pad/ 1219 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17 0x020E0518 1220 | :iomux_pad/ 1221 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18 0x020E051C 1222 | :iomux_pad/ 1223 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19 0x020E0520 1224 | :iomux_pad/ 1225 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA20 0x020E0524 1226 | :iomux_pad/ 1227 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA21 0x020E0528 1228 | :iomux_pad/ 1229 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA22 0x020E052C 1230 | :iomux_pad/ 1231 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA23 0x020E0530 1232 | :iomux_pad/ 1233 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA24 0x020E0534 1234 | :iomux_pad/ 1235 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA25 0x020E0538 1236 | :iomux_pad/ 1237 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA26 0x020E053C 1238 | :iomux_pad/ 1239 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA27 0x020E0540 1240 | :iomux_pad/ 1241 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA28 0x020E0544 1242 | :iomux_pad/ 1243 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA29 0x020E0548 1244 | :iomux_pad/ 1245 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA30 0x020E054C 1246 | :iomux_pad/ 1247 | IOMUXC_SW_PAD_CTL_PAD_EIM_DATA31 0x020E0550 1248 | :iomux_pad/ 1249 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD00 0x020E0554 1250 | :iomux_pad/ 1251 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD01 0x020E0558 1252 | :iomux_pad/ 1253 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD10 0x020E055C 1254 | :iomux_pad/ 1255 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD11 0x020E0560 1256 | :iomux_pad/ 1257 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD12 0x020E0564 1258 | :iomux_pad/ 1259 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD13 0x020E0568 1260 | :iomux_pad/ 1261 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD14 0x020E056C 1262 | :iomux_pad/ 1263 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD15 0x020E0570 1264 | :iomux_pad/ 1265 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD02 0x020E0574 1266 | :iomux_pad/ 1267 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD03 0x020E0578 1268 | :iomux_pad/ 1269 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD04 0x020E057C 1270 | :iomux_pad/ 1271 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD05 0x020E0580 1272 | :iomux_pad/ 1273 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD06 0x020E0584 1274 | :iomux_pad/ 1275 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD07 0x020E0588 1276 | :iomux_pad/ 1277 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD08 0x020E058C 1278 | :iomux_pad/ 1279 | IOMUXC_SW_PAD_CTL_PAD_EIM_AD09 0x020E0590 1280 | :iomux_pad/ 1281 | IOMUXC_SW_PAD_CTL_PAD_EIM_EB0_B 0x020E0594 1282 | :iomux_pad/ 1283 | IOMUXC_SW_PAD_CTL_PAD_EIM_EB1_B 0x020E0598 1284 | :iomux_pad/ 1285 | IOMUXC_SW_PAD_CTL_PAD_EIM_EB2_B 0x020E059C 1286 | :iomux_pad/ 1287 | IOMUXC_SW_PAD_CTL_PAD_EIM_EB3_B 0x020E05A0 1288 | :iomux_pad/ 1289 | IOMUXC_SW_PAD_CTL_PAD_EIM_LBA_B 0x020E05A4 1290 | :iomux_pad/ 1291 | IOMUXC_SW_PAD_CTL_PAD_EIM_OE_B 0x020E05A8 1292 | :iomux_pad/ 1293 | IOMUXC_SW_PAD_CTL_PAD_EIM_RW 0x020E05AC 1294 | :iomux_pad/ 1295 | IOMUXC_SW_PAD_CTL_PAD_EIM_WAIT_B 0x020E05B0 1296 | :iomux_pad/ 1297 | IOMUXC_SW_PAD_CTL_PAD_ENET_CRS_DV 0x020E05B4 1298 | :iomux_pad/ 1299 | IOMUXC_SW_PAD_CTL_PAD_ENET_MDC 0x020E05B8 1300 | :iomux_pad/ 1301 | IOMUXC_SW_PAD_CTL_PAD_ENET_MDIO 0x020E05BC 1302 | :iomux_pad/ 1303 | IOMUXC_SW_PAD_CTL_PAD_ENET_REF_CLK 0x020E05C0 1304 | :iomux_pad/ 1305 | IOMUXC_SW_PAD_CTL_PAD_ENET_RX_ER 0x020E05C4 1306 | :iomux_pad/ 1307 | IOMUXC_SW_PAD_CTL_PAD_ENET_RX_DATA0 0x020E05C8 1308 | :iomux_pad/ 1309 | IOMUXC_SW_PAD_CTL_PAD_ENET_RX_DATA1 0x020E05CC 1310 | :iomux_pad/ 1311 | IOMUXC_SW_PAD_CTL_PAD_ENET_TX_EN 0x020E05D0 1312 | :iomux_pad/ 1313 | IOMUXC_SW_PAD_CTL_PAD_ENET_TX_DATA0 0x020E05D4 1314 | :iomux_pad/ 1315 | IOMUXC_SW_PAD_CTL_PAD_ENET_TX_DATA1 0x020E05D8 1316 | :iomux_pad/ 1317 | IOMUXC_SW_PAD_CTL_PAD_GPIO00 0x020E05DC 1318 | :iomux_pad/ 1319 | IOMUXC_SW_PAD_CTL_PAD_GPIO01 0x020E05E0 1320 | :iomux_pad/ 1321 | IOMUXC_SW_PAD_CTL_PAD_GPIO16 0x020E05E4 1322 | :iomux_pad/ 1323 | IOMUXC_SW_PAD_CTL_PAD_GPIO17 0x020E05E8 1324 | :iomux_pad/ 1325 | IOMUXC_SW_PAD_CTL_PAD_GPIO18 0x020E05EC 1326 | :iomux_pad/ 1327 | IOMUXC_SW_PAD_CTL_PAD_GPIO19 0x020E05F0 1328 | :iomux_pad/ 1329 | IOMUXC_SW_PAD_CTL_PAD_GPIO02 0x020E05F4 1330 | :iomux_pad/ 1331 | IOMUXC_SW_PAD_CTL_PAD_GPIO03 0x020E05F8 1332 | :iomux_pad/ 1333 | IOMUXC_SW_PAD_CTL_PAD_GPIO04 0x020E05FC 1334 | :iomux_pad/ 1335 | IOMUXC_SW_PAD_CTL_PAD_GPIO05 0x020E0600 1336 | :iomux_pad/ 1337 | IOMUXC_SW_PAD_CTL_PAD_GPIO06 0x020E0604 1338 | :iomux_pad/ 1339 | IOMUXC_SW_PAD_CTL_PAD_GPIO07 0x020E0608 1340 | :iomux_pad/ 1341 | IOMUXC_SW_PAD_CTL_PAD_GPIO08 0x020E060C 1342 | :iomux_pad/ 1343 | IOMUXC_SW_PAD_CTL_PAD_GPIO09 0x020E0610 1344 | :iomux_pad/ 1345 | IOMUXC_SW_PAD_CTL_PAD_JTAG_MOD 0x020E0614 1346 | :iomux_pad/ 1347 | IOMUXC_SW_PAD_CTL_PAD_JTAG_TCK 0x020E0618 1348 | :iomux_pad/ 1349 | IOMUXC_SW_PAD_CTL_PAD_JTAG_TDI 0x020E061C 1350 | :iomux_pad/ 1351 | IOMUXC_SW_PAD_CTL_PAD_JTAG_TDO 0x020E0620 1352 | :iomux_pad/ 1353 | IOMUXC_SW_PAD_CTL_PAD_JTAG_TMS 0x020E0624 1354 | :iomux_pad/ 1355 | IOMUXC_SW_PAD_CTL_PAD_JTAG_TRSTB 0x020E0628 1356 | :iomux_pad/ 1357 | IOMUXC_SW_PAD_CTL_PAD_KEY_COL0 0x020E062C 1358 | :iomux_pad/ 1359 | IOMUXC_SW_PAD_CTL_PAD_KEY_COL1 0x020E0630 1360 | :iomux_pad/ 1361 | IOMUXC_SW_PAD_CTL_PAD_KEY_COL2 0x020E0634 1362 | :iomux_pad/ 1363 | IOMUXC_SW_PAD_CTL_PAD_KEY_COL3 0x020E0638 1364 | :iomux_pad/ 1365 | IOMUXC_SW_PAD_CTL_PAD_KEY_COL4 0x020E063C 1366 | :iomux_pad/ 1367 | IOMUXC_SW_PAD_CTL_PAD_KEY_ROW0 0x020E0640 1368 | :iomux_pad/ 1369 | IOMUXC_SW_PAD_CTL_PAD_KEY_ROW1 0x020E0644 1370 | :iomux_pad/ 1371 | IOMUXC_SW_PAD_CTL_PAD_KEY_ROW2 0x020E0648 1372 | :iomux_pad/ 1373 | IOMUXC_SW_PAD_CTL_PAD_KEY_ROW3 0x020E064C 1374 | :iomux_pad/ 1375 | IOMUXC_SW_PAD_CTL_PAD_KEY_ROW4 0x020E0650 1376 | :iomux_pad/ 1377 | IOMUXC_SW_PAD_CTL_PAD_NAND_ALE 0x020E0654 1378 | :iomux_pad/ 1379 | IOMUXC_SW_PAD_CTL_PAD_NAND_CLE 0x020E0658 1380 | :iomux_pad/ 1381 | IOMUXC_SW_PAD_CTL_PAD_NAND_CS0_B 0x020E065C 1382 | :iomux_pad/ 1383 | IOMUXC_SW_PAD_CTL_PAD_NAND_CS1_B 0x020E0660 1384 | :iomux_pad/ 1385 | IOMUXC_SW_PAD_CTL_PAD_NAND_CS2_B 0x020E0664 1386 | :iomux_pad/ 1387 | IOMUXC_SW_PAD_CTL_PAD_NAND_CS3_B 0x020E0668 1388 | :iomux_pad/ 1389 | IOMUXC_SW_PAD_CTL_PAD_NAND_DATA00 0x020E066C 1390 | :iomux_pad/ 1391 | IOMUXC_SW_PAD_CTL_PAD_NAND_DATA01 0x020E0670 1392 | :iomux_pad/ 1393 | IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02 0x020E0674 1394 | :iomux_pad/ 1395 | IOMUXC_SW_PAD_CTL_PAD_NAND_DATA03 0x020E0678 1396 | :iomux_pad/ 1397 | IOMUXC_SW_PAD_CTL_PAD_NAND_DATA04 0x020E067C 1398 | :iomux_pad/ 1399 | IOMUXC_SW_PAD_CTL_PAD_NAND_DATA05 0x020E0680 1400 | :iomux_pad/ 1401 | IOMUXC_SW_PAD_CTL_PAD_NAND_DATA06 0x020E0684 1402 | :iomux_pad/ 1403 | IOMUXC_SW_PAD_CTL_PAD_NAND_DATA07 0x020E0688 1404 | :iomux_pad/ 1405 | IOMUXC_SW_PAD_CTL_PAD_NAND_READY_B 0x020E068C 1406 | :iomux_pad/ 1407 | IOMUXC_SW_PAD_CTL_PAD_NAND_WP_B 0x020E0690 1408 | :iomux_pad/ 1409 | IOMUXC_SW_PAD_CTL_PAD_RGMII_RD0 0x020E0694 1410 | :iomux_pad/ 1411 | IOMUXC_SW_PAD_CTL_PAD_RGMII_RD1 0x020E0698 1412 | :iomux_pad/ 1413 | IOMUXC_SW_PAD_CTL_PAD_RGMII_RD2 0x020E069C 1414 | :iomux_pad/ 1415 | IOMUXC_SW_PAD_CTL_PAD_RGMII_RD3 0x020E06A0 1416 | :iomux_pad/ 1417 | IOMUXC_SW_PAD_CTL_PAD_RGMII_RX_CTL 0x020E06A4 1418 | :iomux_pad/ 1419 | IOMUXC_SW_PAD_CTL_PAD_RGMII_RXC 0x020E06A8 1420 | :iomux_pad/ 1421 | IOMUXC_SW_PAD_CTL_PAD_RGMII_TD0 0x020E06AC 1422 | :iomux_pad/ 1423 | IOMUXC_SW_PAD_CTL_PAD_RGMII_TD1 0x020E06B0 1424 | :iomux_pad/ 1425 | IOMUXC_SW_PAD_CTL_PAD_RGMII_TD2 0x020E06B4 1426 | :iomux_pad/ 1427 | IOMUXC_SW_PAD_CTL_PAD_RGMII_TD3 0x020E06B8 1428 | :iomux_pad/ 1429 | IOMUXC_SW_PAD_CTL_PAD_RGMII_TX_CTL 0x020E06BC 1430 | :iomux_pad/ 1431 | IOMUXC_SW_PAD_CTL_PAD_RGMII_TXC 0x020E06C0 1432 | :iomux_pad/ 1433 | IOMUXC_SW_PAD_CTL_PAD_SD1_CLK 0x020E06C4 1434 | :iomux_pad/ 1435 | IOMUXC_SW_PAD_CTL_PAD_SD1_CMD 0x020E06C8 1436 | :iomux_pad/ 1437 | IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0 0x020E06CC 1438 | :iomux_pad/ 1439 | IOMUXC_SW_PAD_CTL_PAD_SD1_DATA1 0x020E06D0 1440 | :iomux_pad/ 1441 | IOMUXC_SW_PAD_CTL_PAD_SD1_DATA2 0x020E06D4 1442 | :iomux_pad/ 1443 | IOMUXC_SW_PAD_CTL_PAD_SD1_DATA3 0x020E06D8 1444 | :iomux_pad/ 1445 | IOMUXC_SW_PAD_CTL_PAD_SD2_CLK 0x020E06DC 1446 | :iomux_pad/ 1447 | IOMUXC_SW_PAD_CTL_PAD_SD2_CMD 0x020E06E0 1448 | :iomux_pad/ 1449 | IOMUXC_SW_PAD_CTL_PAD_SD2_DATA0 0x020E06E4 1450 | :iomux_pad/ 1451 | IOMUXC_SW_PAD_CTL_PAD_SD2_DATA1 0x020E06E8 1452 | :iomux_pad/ 1453 | IOMUXC_SW_PAD_CTL_PAD_SD2_DATA2 0x020E06EC 1454 | :iomux_pad/ 1455 | IOMUXC_SW_PAD_CTL_PAD_SD2_DATA3 0x020E06F0 1456 | :iomux_pad/ 1457 | IOMUXC_SW_PAD_CTL_PAD_SD3_CLK 0x020E06F4 1458 | :iomux_pad/ 1459 | IOMUXC_SW_PAD_CTL_PAD_SD3_CMD 0x020E06F8 1460 | :iomux_pad/ 1461 | IOMUXC_SW_PAD_CTL_PAD_SD3_DATA0 0x020E06FC 1462 | :iomux_pad/ 1463 | IOMUXC_SW_PAD_CTL_PAD_SD3_DATA1 0x020E0700 1464 | :iomux_pad/ 1465 | IOMUXC_SW_PAD_CTL_PAD_SD3_DATA2 0x020E0704 1466 | :iomux_pad/ 1467 | IOMUXC_SW_PAD_CTL_PAD_SD3_DATA3 0x020E0708 1468 | :iomux_pad/ 1469 | IOMUXC_SW_PAD_CTL_PAD_SD3_DATA4 0x020E070C 1470 | :iomux_pad/ 1471 | IOMUXC_SW_PAD_CTL_PAD_SD3_DATA5 0x020E0710 1472 | :iomux_pad/ 1473 | IOMUXC_SW_PAD_CTL_PAD_SD3_DATA6 0x020E0714 1474 | :iomux_pad/ 1475 | IOMUXC_SW_PAD_CTL_PAD_SD3_DATA7 0x020E0718 1476 | :iomux_pad/ 1477 | IOMUXC_SW_PAD_CTL_PAD_SD3_RESET 0x020E071C 1478 | :iomux_pad/ 1479 | IOMUXC_SW_PAD_CTL_PAD_SD4_CLK 0x020E0720 1480 | :iomux_pad/ 1481 | IOMUXC_SW_PAD_CTL_PAD_SD4_CMD 0x020E0724 1482 | :iomux_pad/ 1483 | IOMUXC_SW_PAD_CTL_PAD_SD4_DATA0 0x020E0728 1484 | :iomux_pad/ 1485 | IOMUXC_SW_PAD_CTL_PAD_SD4_DATA1 0x020E072C 1486 | :iomux_pad/ 1487 | IOMUXC_SW_PAD_CTL_PAD_SD4_DATA2 0x020E0730 1488 | :iomux_pad/ 1489 | IOMUXC_SW_PAD_CTL_PAD_SD4_DATA3 0x020E0734 1490 | :iomux_pad/ 1491 | IOMUXC_SW_PAD_CTL_PAD_SD4_DATA4 0x020E0738 1492 | :iomux_pad/ 1493 | IOMUXC_SW_PAD_CTL_PAD_SD4_DATA5 0x020E073C 1494 | :iomux_pad/ 1495 | IOMUXC_SW_PAD_CTL_PAD_SD4_DATA6 0x020E0740 1496 | :iomux_pad/ 1497 | IOMUXC_SW_PAD_CTL_PAD_SD4_DATA7 0x020E0744 1498 | :iomux_pad/ 1499 | IOMUXC_SW_PAD_CTL_GRP_B7DS 0x020E0748 1500 | IOMUXC_SW_PAD_CTL_GRP_ADDDS 0x020E074C 1501 | IOMUXC_SW_PAD_CTL_GRP_DDRMODE_CTL 0x020E0750 1502 | IOMUXC_SW_PAD_CTL_GRP_DDRPKE 0x020E0754 1503 | IOMUXC_SW_PAD_CTL_GRP_DDRPK 0x020E0758 1504 | IOMUXC_SW_PAD_CTL_GRP_DDRHYS 0x020E075C 1505 | IOMUXC_SW_PAD_CTL_GRP_DDRMODE 0x020E0760 1506 | IOMUXC_SW_PAD_CTL_GRP_B0DS 0x020E0764 1507 | IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII 0x020E0768 1508 | IOMUXC_SW_PAD_CTL_GRP_CTLDS 0x020E076C 1509 | IOMUXC_SW_PAD_CTL_GRP_B1DS 0x020E0770 1510 | IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE 0x020E0774 1511 | IOMUXC_SW_PAD_CTL_GRP_B2DS 0x020E0778 1512 | IOMUXC_SW_PAD_CTL_GRP_B3DS 0x020E077C 1513 | IOMUXC_SW_PAD_CTL_GRP_B4DS 0x020E0780 1514 | IOMUXC_SW_PAD_CTL_GRP_B5DS 0x020E0784 1515 | IOMUXC_SW_PAD_CTL_GRP_RGMII_TERM 0x020E0788 1516 | IOMUXC_SW_PAD_CTL_GRP_B6DS 0x020E078C 1517 | IOMUXC_ANALOG_USB_OTG_ID_SELECT_INPUT 0x020E0790 1518 | IOMUXC_ASRC_ASRCK_CLOCK_6_SELECT_INPUT 0x020E0794 1519 | IOMUXC_AUD4_INPUT_DA_AMX_SELECT_INPUT 0x020E0798 1520 | IOMUXC_AUD4_INPUT_DB_AMX_SELECT_INPUT 0x020E079C 1521 | IOMUXC_AUD4_INPUT_RXCLK_AMX_SELECT_INPUT 0x020E07A0 1522 | IOMUXC_AUD4_INPUT_RXFS_AMX_SELECT_INPUT 0x020E07A4 1523 | IOMUXC_AUD4_INPUT_TXCLK_AMX_SELECT_INPUT 0x020E07A8 1524 | IOMUXC_AUD4_INPUT_TXFS_AMX_SELECT_INPUT 0x020E07AC 1525 | IOMUXC_AUD5_INPUT_DA_AMX_SELECT_INPUT 0x020E07B0 1526 | IOMUXC_AUD5_INPUT_DB_AMX_SELECT_INPUT 0x020E07B4 1527 | IOMUXC_AUD5_INPUT_RXCLK_AMX_SELECT_INPUT 0x020E07B8 1528 | IOMUXC_AUD5_INPUT_RXFS_AMX_SELECT_INPUT 0x020E07BC 1529 | IOMUXC_AUD5_INPUT_TXCLK_AMX_SELECT_INPUT 0x020E07C0 1530 | IOMUXC_AUD5_INPUT_TXFS_AMX_SELECT_INPUT 0x020E07C4 1531 | IOMUXC_FLEXCAN1_RX_SELECT_INPUT 0x020E07C8 1532 | IOMUXC_FLEXCAN2_RX_SELECT_INPUT 0x020E07CC 1533 | IOMUXC_CCM_PMIC_READY_SELECT_INPUT 0x020E07D4 1534 | IOMUXC_ECSPI1_CSPI_CLK_IN_SELECT_INPUT 0x020E07D8 1535 | IOMUXC_ECSPI1_MISO_SELECT_INPUT 0x020E07DC 1536 | IOMUXC_ECSPI1_MOSI_SELECT_INPUT 0x020E07E0 1537 | IOMUXC_ECSPI1_SS0_SELECT_INPUT 0x020E07E4 1538 | IOMUXC_ECSPI1_SS1_SELECT_INPUT 0x020E07E8 1539 | IOMUXC_ECSPI1_SS2_SELECT_INPUT 0x020E07EC 1540 | IOMUXC_ECSPI1_SS3_SELECT_INPUT 0x020E07F0 1541 | IOMUXC_ECSPI2_CSPI_CLK_IN_SELECT_INPUT 0x020E07F4 1542 | IOMUXC_ECSPI2_MISO_SELECT_INPUT 0x020E07F8 1543 | IOMUXC_ECSPI2_MOSI_SELECT_INPUT 0x020E07FC 1544 | IOMUXC_ECSPI2_SS0_SELECT_INPUT 0x020E0800 1545 | IOMUXC_ECSPI2_SS1_SELECT_INPUT 0x020E0804 1546 | IOMUXC_ECSPI4_SS0_SELECT_INPUT 0x020E0808 1547 | IOMUXC_ENET_REF_CLK_SELECT_INPUT 0x020E080C 1548 | IOMUXC_ENET_MAC0_MDIO_SELECT_INPUT 0x020E0810 1549 | IOMUXC_ENET_MAC0_RX_CLK_SELECT_INPUT 0x020E0814 1550 | IOMUXC_ENET_MAC0_RX_DATA0_SELECT_INPUT 0x020E0818 1551 | IOMUXC_ENET_MAC0_RX_DATA1_SELECT_INPUT 0x020E081C 1552 | IOMUXC_ENET_MAC0_RX_DATA2_SELECT_INPUT 0x020E0820 1553 | IOMUXC_ENET_MAC0_RX_DATA3_SELECT_INPUT 0x020E0824 1554 | IOMUXC_ENET_MAC0_RX_EN_SELECT_INPUT 0x020E0828 1555 | IOMUXC_ESAI_RX_FS_SELECT_INPUT 0x020E082C 1556 | IOMUXC_ESAI_TX_FS_SELECT_INPUT 0x020E0830 1557 | IOMUXC_ESAI_RX_HF_CLK_SELECT_INPUT 0x020E0834 1558 | IOMUXC_ESAI_TX_HF_CLK_SELECT_INPUT 0x020E0838 1559 | IOMUXC_ESAI_RX_CLK_SELECT_INPUT 0x020E083C 1560 | IOMUXC_ESAI_TX_CLK_SELECT_INPUT 0x020E0840 1561 | IOMUXC_ESAI_SDO0_SELECT_INPUT 0x020E0844 1562 | IOMUXC_ESAI_SDO1_SELECT_INPUT 0x020E0848 1563 | IOMUXC_ESAI_SDO2_SDI3_SELECT_INPUT 0x020E084C 1564 | IOMUXC_ESAI_SDO3_SDI2_SELECT_INPUT 0x020E0850 1565 | IOMUXC_ESAI_SDO4_SDI1_SELECT_INPUT 0x020E0854 1566 | IOMUXC_ESAI_SDO5_SDI0_SELECT_INPUT 0x020E0858 1567 | IOMUXC_HDMI_ICECIN_SELECT_INPUT 0x020E085C 1568 | IOMUXC_HDMI_II2C_CLKIN_SELECT_INPUT 0x020E0860 1569 | IOMUXC_HDMI_II2C_DATAIN_SELECT_INPUT 0x020E0864 1570 | IOMUXC_I2C1_SCL_IN_SELECT_INPUT 0x020E0868 1571 | IOMUXC_I2C1_SDA_IN_SELECT_INPUT 0x020E086C 1572 | IOMUXC_I2C2_SCL_IN_SELECT_INPUT 0x020E0870 1573 | IOMUXC_I2C2_SDA_IN_SELECT_INPUT 0x020E0874 1574 | IOMUXC_I2C3_SCL_IN_SELECT_INPUT 0x020E0878 1575 | IOMUXC_I2C3_SDA_IN_SELECT_INPUT 0x020E087C 1576 | IOMUXC_I2C4_SCL_IN_SELECT_INPUT 0x020E0880 1577 | IOMUXC_I2C4_SDA_IN_SELECT_INPUT 0x020E0884 1578 | IOMUXC_IPU1_SENS1_DATA10_SELECT_INPUT 0x020E0888 1579 | IOMUXC_IPU1_SENS1_DATA11_SELECT_INPUT 0x020E088C 1580 | IOMUXC_IPU1_SENS1_DATA12_SELECT_INPUT 0x020E0890 1581 | IOMUXC_IPU1_SENS1_DATA13_SELECT_INPUT 0x020E0894 1582 | IOMUXC_IPU1_SENS1_DATA14_SELECT_INPUT 0x020E0898 1583 | IOMUXC_IPU1_SENS1_DATA15_SELECT_INPUT 0x020E089C 1584 | IOMUXC_IPU1_SENS1_DATA16_SELECT_INPUT 0x020E08A0 1585 | IOMUXC_IPU1_SENS1_DATA17_SELECT_INPUT 0x020E08A4 1586 | IOMUXC_IPU1_SENS1_DATA18_SELECT_INPUT 0x020E08A8 1587 | IOMUXC_IPU1_SENS1_DATA19_SELECT_INPUT 0x020E08AC 1588 | IOMUXC_IPU1_SENS1_DATA_EN_SELECT_INPUT 0x020E08B0 1589 | IOMUXC_IPU1_SENS1_HSYNC_SELECT_INPUT 0x020E08B4 1590 | IOMUXC_IPU1_SENS1_PIX_CLK_SELECT_INPUT 0x020E08B8 1591 | IOMUXC_IPU1_SENS1_VSYNC_SELECT_INPUT 0x020E08BC 1592 | IOMUXC_KEY_COL5_SELECT_INPUT 0x020E08C0 1593 | IOMUXC_KEY_COL6_SELECT_INPUT 0x020E08C4 1594 | IOMUXC_KEY_COL7_SELECT_INPUT 0x020E08C8 1595 | IOMUXC_KEY_ROW5_SELECT_INPUT 0x020E08CC 1596 | IOMUXC_KEY_ROW6_SELECT_INPUT 0x020E08D0 1597 | IOMUXC_KEY_ROW7_SELECT_INPUT 0x020E08D4 1598 | IOMUXC_MLB_MLB_CLK_IN_SELECT_INPUT 0x020E08DC 1599 | IOMUXC_MLB_MLB_DATA_IN_SELECT_INPUT 0x020E08E0 1600 | IOMUXC_MLB_MLB_SIG_IN_SELECT_INPUT 0x020E08E4 1601 | IOMUXC_SDMA_EVENTS14_SELECT_INPUT 0x020E08E8 1602 | IOMUXC_SDMA_EVENTS15_SELECT_INPUT 0x020E08EC 1603 | IOMUXC_SPDIF_SPDIF_IN1_SELECT_INPUT 0x020E08F0 1604 | IOMUXC_SPDIF_TX_CLK2_SELECT_INPUT 0x020E08F4 1605 | IOMUXC_UART1_UART_RTS_B_SELECT_INPUT 0x020E08F8 1606 | IOMUXC_UART1_UART_RX_DATA_SELECT_INPUT 0x020E08FC 1607 | IOMUXC_UART2_UART_RTS_B_SELECT_INPUT 0x020E0900 1608 | IOMUXC_UART2_UART_RX_DATA_SELECT_INPUT 0x020E0904 1609 | IOMUXC_UART3_UART_RTS_B_SELECT_INPUT 0x020E0908 1610 | IOMUXC_UART3_UART_RX_DATA_SELECT_INPUT 0x020E090C 1611 | IOMUXC_UART4_UART_RTS_B_SELECT_INPUT 0x020E0910 1612 | IOMUXC_UART4_UART_RX_DATA_SELECT_INPUT 0x020E0914 1613 | IOMUXC_UART5_UART_RTS_B_SELECT_INPUT 0x020E0918 1614 | IOMUXC_UART5_UART_RX_DATA_SELECT_INPUT 0x020E091C 1615 | IOMUXC_USB_OTG_OC_SELECT_INPUT 0x020E0920 1616 | IOMUXC_USB_H1_OC_SELECT_INPUT 0x020E0924 1617 | IOMUXC_USDHC1_CARD_CLK_IN_SELECT_INPUT 0x020E0928 1618 | IOMUXC_USDHC1_WP_ON_SELECT_INPUT 0x020E092C 1619 | IOMUXC_USDHC2_CARD_CLK_IN_SELECT_INPUT 0x020E0930 1620 | IOMUXC_USDHC3_CARD_CLK_IN_SELECT_INPUT 0x020E0934 1621 | IOMUXC_USDHC4_CARD_CLK_IN_SELECT_INPUT 0x020E0938 1622 | 1623 | DCIC1_DCICC 0x020E4000 1624 | DCIC1_DCICIC 0x020E4004 1625 | DCIC1_DCICS 0x020E4008 1626 | DCIC1_DCICRC 0x020E4010 1627 | DCIC1_DCICRS 0x020E4014 1628 | DCIC1_DCICRRS 0x020E4018 1629 | DCIC1_DCICRCS 0x020E401C 1630 | 1631 | DCIC2_DCICC 0x020E8000 1632 | DCIC2_DCICIC 0x020E8004 1633 | DCIC2_DCICS 0x020E8008 1634 | DCIC2_DCICRC 0x020E8010 1635 | DCIC2_DCICRS 0x020E8014 1636 | DCIC2_DCICRRS 0x020E8018 1637 | DCIC2_DCICRCS 0x020E801C 1638 | 1639 | SDMAARM_MC0PTR 0x020EC000 1640 | SDMAARM_INTR 0x020EC004 1641 | SDMAARM_STOP_STAT 0x020EC008 1642 | SDMAARM_HSTART 0x020EC00C 1643 | SDMAARM_EVTOVR 0x020EC010 1644 | SDMAARM_DSPOVR 0x020EC014 1645 | SDMAARM_HOSTOVR 0x020EC018 1646 | SDMAARM_EVTPEND 0x020EC01C 1647 | SDMAARM_RESET 0x020EC024 1648 | SDMAARM_EVTERR 0x020EC028 1649 | SDMAARM_INTRMASK 0x020EC02C 1650 | SDMAARM_PSW 0x020EC030 1651 | SDMAARM_EVTERRDBG 0x020EC034 1652 | SDMAARM_CONFIG 0x020EC038 1653 | SDMAARM_SDMA_LOCK 0x020EC03C 1654 | SDMAARM_ONCE_ENB 0x020EC040 1655 | SDMAARM_ONCE_DATA 0x020EC044 1656 | SDMAARM_ONCE_INSTR 0x020EC048 1657 | SDMAARM_ONCE_STAT 0x020EC04C 1658 | SDMAARM_ONCE_CMD 0x020EC050 1659 | SDMAARM_ILLINSTADDR 0x020EC058 1660 | SDMAARM_CHN0ADDR 0x020EC05C 1661 | SDMAARM_EVT_MIRROR 0x020EC060 1662 | SDMAARM_EVT_MIRROR2 0x020EC064 1663 | SDMAARM_XTRIG_CONF1 0x020EC070 1664 | SDMAARM_XTRIG_CONF2 0x020EC074 1665 | 1666 | USBNC_USB_OTG_CTRL 0x02184800 1667 | USBNC_USB_UH1_CTRL 0x02184804 1668 | USBNC_USB_UH2_CTRL 0x02184808 1669 | USBNC_USB_UH3_CTRL 0x0218480C 1670 | USBNC_USB_UH2_HSIC_CTRL 0x02184810 1671 | USBNC_USB_UH3_HSIC_CTRL 0x02184814 1672 | USBNC_USB_OTG_PHY_CTRL_0 0x02184818 1673 | USBNC_USB_UH1_PHY_CTRL_0 0x0218481C 1674 | 1675 | USBC_UOG_ID 0x02184000 1676 | USBC_UOG_HWGENERAL 0x02184004 1677 | USBC_UOG_HWHOST 0x02184008 1678 | USBC_UOG_HWDEVICE 0x0218400C 1679 | 1680 | USBC_UOG_DCIVERSION 0x02184120 1681 | USBC_UOG_DCCPARAMS 0x02184124 1682 | USBC_UOG_DEVICEADDR 0x02184154 1683 | USBC_UOG_ENDPTLISTADDR 0x02184158 1684 | USBC_UOG_ENDPTNAK 0x02184178 1685 | USBC_UOG_ENDPTNAKEN 0x0218417C 1686 | USBC_UOG_OTGSC 0x021841A4 1687 | USBC_UOG_ENDPTSETUPSTAT 0x021841AC 1688 | USBC_UOG_ENDPTPRIME 0x021841B0 1689 | USBC_UOG_ENDPTFLUSH 0x021841B4 1690 | USBC_UOG_ENDPTSTAT 0x021841B8 1691 | USBC_UOG_ENDPTCOMPLETE 0x021841BC 1692 | USBC_UOG_ENDPTCTRL0 0x021841C0 1693 | 1694 | 1695 | ENET_EIR 0x02188004 1696 | ENET_EIMR 0x02188008 1697 | ENET_RDAR 0x02188010 1698 | ENET_TDAR 0x02188014 1699 | ENET_ECR 0x02188024 1700 | ENET_MMFR 0x02188040 1701 | ENET_MSCR 0x02188044 1702 | ENET_MIBC 0x02188064 1703 | :DIS:31 1704 | :CLR:29 1705 | ENET_RCR 0x02188084 1706 | :GRS:31 1707 | :NLC:30 1708 | :MAX_FL:29-16 1709 | :CFEN:15 1710 | :CRCFWD:14 1711 | :PAUFWD:13 1712 | :PADEN:12 1713 | :RMII_10T:9 1714 | :RMII_MODE:8 1715 | :RGMII_EN:6 1716 | :FCE:5 1717 | :BC_REJ:4 1718 | :PROM:3 1719 | :MII_MODE:2 1720 | :DRT:1 1721 | :LOOP:0 1722 | ENET_TCR 0x021880C4 1723 | ENET_PALR 0x021880E4 1724 | ENET_PAUR 0x021880E8 1725 | ENET_OPD 0x021880EC 1726 | ENET_IAUR 0x02188118 1727 | ENET_IALR 0x0218811C 1728 | ENET_GAUR 0x02188120 1729 | ENET_GALR 0x02188124 1730 | ENET_TFWR 0x02188144 1731 | ENET_RDSR 0x02188180 1732 | ENET_TDSR 0x02188184 1733 | ENET_MRBR 0x02188188 1734 | ENET_RSFL 0x02188190 1735 | ENET_RSEM 0x02188194 1736 | ENET_RAEM 0x02188198 1737 | ENET_RAFL 0x0218819C 1738 | ENET_TSEM 0x021881A0 1739 | ENET_TAEM 0x021881A4 1740 | ENET_TAFL 0x021881A8 1741 | ENET_TIPG 0x021881AC 1742 | ENET_FTRL 0x021881B0 1743 | ENET_TACC 0x021881C0 1744 | ENET_RACC 0x021881C4 1745 | ENET_ATCR 0x02188400 1746 | ENET_ATVR 0x02188404 1747 | ENET_ATOFF 0x02188408 1748 | ENET_ATPER 0x0218840C 1749 | ENET_ATCOR 0x02188410 1750 | ENET_ATINC 0x02188414 1751 | ENET_ATSTMP 0x02188418 1752 | ENET_TGSR 0x02188604 1753 | ENET_TCSR0 0x02188608 1754 | ENET_TCCR0 0x0218860C 1755 | 1756 | ENET_RMON_T_DROP 0x02188200 1757 | ENET_RMON_T_PACKETS 0x02188204 1758 | ENET_RMON_T_BC_PKT 0x02188208 1759 | ENET_RMON_T_MC_PKT 0x0218820C 1760 | ENET_RMON_T_CRC_ALIGN 0x02188210 1761 | ENET_RMON_T_UNDERSIZE 0x02188214 1762 | ENET_RMON_T_OVERSIZE 0x02188218 1763 | ENET_RMON_T_FRAG 0x0218821C 1764 | ENET_RMON_T_JAB 0x02188220 1765 | ENET_RMON_T_COL 0x02188224 1766 | ENET_RMON_T_P64 0x02188228 1767 | ENET_RMON_T_P65TO127n 0x0218822C 1768 | ENET_RMON_T_P128TO255n 0x02188230 1769 | ENET_RMON_T_P256TO511 0x02188234 1770 | ENET_RMON_T_P512TO1023 0x02188238 1771 | ENET_RMON_T_P1024TO2047 0x0218823C 1772 | ENET_RMON_T_P_GTE2048 0x02188240 1773 | ENET_RMON_T_OCTETS 0x02188244 1774 | 1775 | ENET_IEEE_T_DROP 0x02188248 1776 | ENET_IEEE_T_FRAME_OK 0x0218824C 1777 | ENET_IEEE_T_1COL 0x02188250 1778 | ENET_IEEE_T_MCOL 0x02188254 1779 | ENET_IEEE_T_DEF 0x02188258 1780 | ENET_IEEE_T_LCOL 0x0218825C 1781 | ENET_IEEE_T_EXCOL 0x02188260 1782 | ENET_IEEE_T_MACERR 0x02188264 1783 | ENET_IEEE_T_CSERR 0x02188268 1784 | ENET_IEEE_T_SQE 0x0218826C 1785 | ENET_IEEE_T_FDXFC 0x02188270 1786 | ENET_IEEE_T_OCTETS_OK 0x02188274 1787 | 1788 | ENET_RMON_R_PACKETS 0x02188284 1789 | ENET_RMON_R_BC_PKT 0x02188288 1790 | ENET_RMON_R_MC_PKT 0x0218828C 1791 | ENET_RMON_R_CRC_ALIGN 0x02188290 1792 | ENET_RMON_R_UNDERSIZE 0x02188294 1793 | ENET_RMON_R_OVERSIZE 0x02188298 1794 | ENET_RMON_R_FRAG 0x0218829C 1795 | ENET_RMON_R_JAB 0x021882A0 1796 | ENET_RMON_R_RESVD_0 0x021882A4 1797 | ENET_RMON_R_P64 0x021882A8 1798 | ENET_RMON_R_P65TO127 0x021882AC 1799 | ENET_RMON_R_P128TO255 0x021882B0 1800 | ENET_RMON_R_P256TO511 0x021882B4 1801 | ENET_RMON_R_P512TO1023 0x021882B8 1802 | ENET_RMON_R_P1024TO2047 0x021882BC 1803 | ENET_RMON_R_P_GTE2048 0x021882C0 1804 | ENET_RMON_R_OCTETS 0x021882C4 1805 | 1806 | ENET_IEEE_R_DROP 0x021882C8 1807 | ENET_IEEE_R_FRAME_OK 0x021882CC 1808 | ENET_IEEE_R_CRC 0x021882D0 1809 | ENET_IEEE_R_ALIGN 0x021882D4 1810 | ENET_IEEE_R_MACERR 0x021882D8 1811 | ENET_IEEE_R_FDXFC 0x021882DC 1812 | ENET_IEEE_R_OCTETS_OK 0x021882E0 1813 | 1814 | MLB150_MLBC0 0x0218C000 1815 | MLB150_MLBPC0 0x0218C008 1816 | MLB150_MS0 0x0218C00C 1817 | MLB150_MS1 0x0218C014 1818 | MLB150_MSS 0x0218C020 1819 | MLB150_MSD 0x0218C024 1820 | MLB150_MIEN 0x0218C02C 1821 | MLB150_MLBPC2 0x0218C034 1822 | MLB150_MLBPC1 0x0218C038 1823 | MLB150_MLBC1 0x0218C03C 1824 | MLB150_HCTL 0x0218C080 1825 | MLB150_HCMR0 0x0218C088 1826 | MLB150_HCMR1 0x0218C08C 1827 | MLB150_HCER0 0x0218C090 1828 | MLB150_HCER1 0x0218C094 1829 | MLB150_HCBR0 0x0218C098 1830 | MLB150_HCBR1 0x0218C09C 1831 | MLB150_MDAT0 0x0218C0C0 1832 | MLB150_MDAT1 0x0218C0C4 1833 | MLB150_MDAT2 0x0218C0C8 1834 | MLB150_MDAT3 0x0218C0CC 1835 | MLB150_MDWE0 0x0218C0D0 1836 | MLB150_MDWE1 0x0218C0D4 1837 | MLB150_MDWE2 0x0218C0D8 1838 | MLB150_MDWE3 0x0218C0DC 1839 | MLB150_MCTL 0x0218C0E0 1840 | MLB150_MADR 0x0218C0E4 1841 | MLB150_ACTL 0x0218C3C0 1842 | MLB150_ACSR0 0x0218C3D0 1843 | MLB150_ACSR1 0x0218C3D4 1844 | MLB150_ACMR0 0x0218C3D8 1845 | MLB150_ACMR1 0x0218C3DC 1846 | 1847 | ROMC_ROMPATCHCNTL 0x021AC0F4 1848 | ROMC_ROMPATCHENH 0x021AC0F8 1849 | ROMC_ROMPATCHENL 0x021AC0FC 1850 | ROMC_ROMPATCHSR 0x021AC208 1851 | 1852 | EIM_CS0GCR1 0x021B8000 1853 | EIM_CS0GCR2 0x021B8004 1854 | EIM_CS0RCR1 0x021B8008 1855 | EIM_CS0RCR2 0x021B800C 1856 | EIM_CS0WCR1 0x021B8010 1857 | EIM_CS0WCR2 0x021B8014 1858 | EIM_CS1GCR1 0x021B8018 1859 | EIM_CS1GCR2 0x021B801C 1860 | EIM_CS1RCR1 0x021B8020 1861 | EIM_CS1RCR2 0x021B8024 1862 | EIM_CS1WCR1 0x021B8028 1863 | EIM_CS1WCR2 0x021B802C 1864 | EIM_CS2GCR1 0x021B8030 1865 | EIM_CS2GCR2 0x021B8034 1866 | EIM_CS2RCR1 0x021B8038 1867 | EIM_CS2RCR2 0x021B803C 1868 | EIM_CS2WCR1 0x021B8040 1869 | EIM_CS2WCR2 0x021B8044 1870 | EIM_CS3GCR1 0x021B8048 1871 | EIM_CS3GCR2 0x021B804C 1872 | EIM_CS3RCR1 0x021B8050 1873 | EIM_CS3RCR2 0x021B8054 1874 | EIM_CS3WCR1 0x021B8058 1875 | EIM_CS3WCR2 0x021B805C 1876 | EIM_CS4GCR1 0x021B8060 1877 | EIM_CS4GCR2 0x021B8064 1878 | EIM_CS4RCR1 0x021B8068 1879 | EIM_CS4RCR2 0x021B806C 1880 | EIM_CS4WCR1 0x021B8070 1881 | EIM_CS4WCR2 0x021B8074 1882 | EIM_CS5GCR1 0x021B8078 1883 | EIM_CS5GCR2 0x021B807C 1884 | EIM_CS5RCR1 0x021B8080 1885 | EIM_CS5RCR2 0x021B8084 1886 | EIM_CS5WCR1 0x021B8088 1887 | EIM_CS5WCR2 0x021B808C 1888 | EIM_WCR 0x021B8090 1889 | EIM_DCR 0x021B8094 1890 | EIM_DSR 0x021B8098 1891 | EIM_WIAR 0x021B809C 1892 | EIM_EAR 0x021B80A0 1893 | 1894 | AUDMUX_PTCR1 0x021D8000 1895 | AUDMUX_PDCR1 0x021D8004 1896 | AUDMUX_PTCR2 0x021D8008 1897 | AUDMUX_PDCR2 0x021D800C 1898 | AUDMUX_PTCR3 0x021D8010 1899 | AUDMUX_PDCR3 0x021D8014 1900 | AUDMUX_PDCR4 0x021D801C 1901 | AUDMUX_PDCR5 0x021D8024 1902 | AUDMUX_PDCR6 0x021D802C 1903 | AUDMUX_PDCR7 0x021D8034 1904 | 1905 | VDOA_VDOAC 0x021E4000 1906 | VDOA_VDOASRR 0x021E4004 1907 | VDOA_VDOAIE 0x021E4008 1908 | VDOA_VDOAIST 0x021E400C 1909 | VDOA_VDOAFP 0x021E4010 1910 | VDOA_VDOAIEBA 0x021E4014 1911 | VDOA_VDOASL 0x021E402C 1912 | VDOA_VDOAIUBO 0x021E4030 1913 | VDOA_VDOAVEBA 0x021E4034 1914 | VDOA_VDOAVUBO 0x021E4040 1915 | VDOA_VDOASR 0x021E4044 1916 | VDOA_VDOATD 0x021E4048 1917 | ENET_IEEE_R_DROP 0x021882C8 1918 | ENET_IEEE_R_FRAME_OK 0x021882CC 1919 | ENET_IEEE_R_CRC 0x021882D0 1920 | ENET_IEEE_R_ALIGN 0x021882D4 1921 | ENET_IEEE_R_MACERR 0x021882D8 1922 | ENET_IEEE_R_FDXFC 0x021882DC 1923 | ENET_IEEE_R_OCTETS_OK 0x021882E0 1924 | 1925 | -------------------------------------------------------------------------------- /dat/devregs_imx6q.dat: -------------------------------------------------------------------------------- 1 | /uart_urxd 2 | :CHARRDY:15 3 | :ERR:14 4 | :OVRRUN:13 5 | :FRMERR:12 6 | :BRK:11 7 | :PRERR:10 8 | :DATA:7-0 9 | /uart_ucr2 10 | :ESCI:15 11 | :IRTS:14 12 | :CTSC:13 13 | :CTS:12 14 | :ESCEN:11 15 | :RTEC:10-9 16 | :PREN:8 17 | :PROE:7 18 | :STPB:6 19 | :WS:5 20 | :RTSEN:4 21 | :ATEN:3 22 | :TXEN:2 23 | :RXEN:1 24 | :SRS:0 25 | /uart_usr1 26 | :PARITYERR:15 27 | :RTSS:14 28 | :TRDY:13 29 | :RTSD:12 30 | :ESCF:11 31 | :FRAMERR:10 32 | :RRDY:9 33 | :AGTIM:8 34 | :DTRD:7 35 | :RXDS:6 36 | :AIRINT:5 37 | :AWAKE:4 38 | /uart_ufcr 39 | :RXTL:5-0 40 | :DCEDTE:6 41 | :RFDIV:9-7 42 | :TXTL:15-10 43 | /iomux_pad 44 | :HYS:16 45 | :PUS:15-14 46 | :PUE:13 47 | :PKE:12 48 | :ODE:11 49 | :SPEED:7-6 50 | :DSE:5-3 51 | :SRE:0 52 | AIPS1_BASE 0x02000000 # 020F_FFFF 1MB Peripheral IPs via AIPS-1 - See the AIPS map in Table 2-2. 53 | AIPS2_BASE 0x02100000 # 021F_FFFF 1MB Peripheral IPs via AIPS-2 - See the AIPS map in Table 2-3. 54 | APBH_BASE 0x00110000 # 0011_7FFF 32KB APBH DMA 55 | ARM_PER_BASE 0x00A02000 # 00A0_2FFF ARM Peripherals (Only visible to ARM cores) 4KB PL310 (L2 Cache controller) 56 | BOOTROM_BASE 0x00000000 # 0001_6FFF 92KB Boot ROM (ROMCP) 57 | BOOTROM_PROT_BASE 0x00017000 # 0001_7FFF 4KB Boot ROM - Protected 4KB area 58 | CAAM_BASE 0x00100000 # 0010_3FFF 16KB CAAM (16K secure RAM) 59 | DTCP_BASE 0x00138000 # 0013_BFFF 16KB DTCP 60 | GPU_2D_BASE 0x00134000 # 0013_7FFF 16KB GPU 2D 61 | GPU_3D_BASE 0x00130000 # 0013_3FFF 16KB GPU 3D 62 | GPV0_BASE 0x00B00000 # 00BF_FFFF GPV_0 1MB gpv_0 PL301 configuration port 63 | GPV1_BASE 0x00C00000 # 00CF_FFFF GPV_1 1MB gpv_1 PL301 configuration port 64 | GPV2_BASE 0x00200000 # 002F_FFFF 1MB gpv_2 PL301 configuration port 65 | GPV3_BASE 0x00300000 # 003F_FFFF 1MB gpv_3 PL301 configuration port 66 | GPV4_BASE 0x00800000 # 008F_FFFF GPV_4 1MB gpv_0 PL301 "fast3" configuration port 67 | HDMI_BASE 0x00120000 # 0012_8FFF 36KB HDMI 68 | HSI_BASE 0x02208000 # 0220_BFFF 16KB HSI 69 | IPU1_BASE 0x02400000 # 027F_FFFF 4MB IPU-1 70 | IPU2_BASE 0x02800000 # 02BF_FFFF 4MB IPU-2 71 | MISC_PER_BASE 0x00400000 # 007F_FFFF Misc peripherals: Boot ROM, OCRAM (Total: 8MB) 4MB Reserved 72 | OCRAM_ALIAS_BASE 0x00940000 # 009F_FFFF OCRAM 0.75MB OCRAM Aliased 73 | OCRAM_BASE 0x00900000 # 0093_FFFF 0.25MB OCRAM 256KB 74 | OPENVG_BASE 0x02204000 # 0220_7FFF 16KB OpenVG 75 | PCIE_BASE 0x01000000 # 01FF_BFFF 16368KB PCIe 76 | PCIE_REGS_BASE 0x01FFC000 # 01FF_FFFF PCIe 16KB PCIe Registers 77 | SATA_BASE 0x02200000 # 0220_3FFF 16KB SATA 78 | SCU_BASE 0x00A00000 # 00A0_1FFF 8KB SCU 79 | WEIM_BASE 0x08000000 # 0FFF_FFFF Periph 2 128MB WEIM - CS0 (NOR/SRAM) 80 | HDMI_DESIGN_ID 0x00120000.b 81 | HDMI_REVISION_ID 0x00120001.b 82 | HDMI_PRODUCT_ID0 0x00120002.b 83 | HDMI_PRODUCT_ID1 0x00120003.b 84 | HDMI_CONFIG0_ID 0x00120004.b 85 | HDMI_CONFIG1_ID 0x00120005.b 86 | HDMI_CONFIG2_ID 0x00120006.b 87 | HDMI_CONFIG3_ID 0x00120007.b 88 | HDMI_IH_FC_STAT0 0x00120100.b 89 | HDMI_IH_FC_STAT1 0x00120101.b 90 | HDMI_IH_FC_STAT2 0x00120102.b 91 | HDMI_IH_AS_STAT0 0x00120103.b 92 | HDMI_IH_PHY_STAT0 0x00120104.b 93 | HDMI_IH_I2CM_STAT0 0x00120105.b 94 | HDMI_IH_CEC_STAT0 0x00120106.b 95 | HDMI_IH_VP_STAT0 0x00120107.b 96 | HDMI_IH_I2CMPHY_STAT0 0x00120108.b 97 | HDMI_IH_AHBDMAAUD_STAT0 0x00120109.b 98 | HDMI_IH_MUTE_FC_STAT0 0x00120180.b 99 | HDMI_IH_MUTE_FC_STAT1 0x00120181.b 100 | HDMI_IH_MUTE_FC_STAT2 0x00120182.b 101 | HDMI_IH_MUTE_AS_STAT0 0x00120183.b 102 | HDMI_IH_MUTE_PHY_STAT0 0x00120184.b 103 | HDMI_IH_MUTE_I2CM_STAT0 0x00120185.b 104 | HDMI_IH_MUTE_CEC_STAT0 0x00120186.b 105 | HDMI_IH_MUTE_VP_STAT0 0x00120187.b 106 | HDMI_IH_MUTE_I2CMPHY_STAT0 0x00120188.b 107 | HDMI_IH_MUTE_AHBDMAAUD_STAT0 0x00120189.b 108 | HDMI_IH_MUTE 0x001201FF.b 109 | HDMI_TX_INVID0 0x00120200.b 110 | HDMI_TX_INSTUFFING 0x00120201.b 111 | HDMI_TX_GYDATA0 0x00120202.b 112 | HDMI_TX_GYDATA1 0x00120203.b 113 | HDMI_TX_RCRDATA0 0x00120204.b 114 | HDMI_TX_RCRDATA1 0x00120205.b 115 | HDMI_TX_BCBDATA0 0x00120206.b 116 | HDMI_TX_BCBDATA1 0x00120207.b 117 | HDMI_VP_STATUS 0x00120800.b 118 | HDMI_VP_PR_CD 0x00120801.b 119 | HDMI_VP_STUFF 0x00120802.b 120 | HDMI_VP_REMAP 0x00120803.b 121 | HDMI_VP_CONF 0x00120804.b 122 | HDMI_VP_STAT 0x00120805.b 123 | HDMI_VP_INT 0x00120806.b 124 | HDMI_VP_MASK 0x00120807.b 125 | HDMI_VP_POL 0x00120808.b 126 | HDMI_FC_INVIDCONF 0x00121000.b 127 | HDMI_FC_INHACTIV0 0x00121001.b 128 | HDMI_FC_INHACTIV1 0x00121002.b 129 | HDMI_FC_INHBLANK0 0x00121003.b 130 | HDMI_FC_INHBLANK1 0x00121004.b 131 | HDMI_FC_INVACTIV0 0x00121005.b 132 | HDMI_FC_INVACTIV1 0x00121006.b 133 | HDMI_FC_INVBLANK 0x00121007.b 134 | HDMI_FC_HSYNCINDELAY0 0x00121008.b 135 | HDMI_FC_HSYNCINDELAY1 0x00121009.b 136 | HDMI_FC_HSYNCINWIDTH0 0x0012100A.b 137 | HDMI_FC_HSYNCINWIDTH1 0x0012100B.b 138 | HDMI_FC_VSYNCINDELAY 0x0012100C.b 139 | HDMI_FC_VSYNCINWIDTH 0x0012100D.b 140 | HDMI_FC_INFREQ0 0x0012100E.b 141 | HDMI_FC_INFREQ1 0x0012100F.b 142 | HDMI_FC_INFREQ2 0x00121010.b 143 | HDMI_FC_CTRLDUR 0x00121011.b 144 | HDMI_FC_EXCTRLDUR 0x00121012.b 145 | HDMI_FC_EXCTRLSPAC 0x00121013.b 146 | HDMI_FC_CH0PREAM 0x00121014.b 147 | HDMI_FC_CH1PREAM 0x00121015.b 148 | HDMI_FC_CH2PREAM 0x00121016.b 149 | HDMI_FC_AVICONF3 0x00121017.b 150 | HDMI_FC_GCP 0x00121018.b 151 | HDMI_FC_AVICONF0 0x00121019.b 152 | HDMI_FC_AVICONF1 0x0012101A.b 153 | HDMI_FC_AVICONF2 0x0012101B.b 154 | HDMI_FC_AVIVID 0x0012101C.b 155 | HDMI_FC_AVIETB0 0x0012101D.b 156 | HDMI_FC_AVIETB1 0x0012101E.b 157 | HDMI_FC_AVISBB0 0x0012101F.b 158 | HDMI_FC_AVISBB1 0x00121020.b 159 | HDMI_FC_AVIELB0 0x00121021.b 160 | HDMI_FC_AVIELB1 0x00121022.b 161 | HDMI_FC_AVISRB0 0x00121023.b 162 | HDMI_FC_AVISRB1 0x00121024.b 163 | HDMI_FC_AUDICONF0 0x00121025.b 164 | HDMI_FC_AUDICONF1 0x00121026.b 165 | HDMI_FC_AUDICONF2 0x00121027.b 166 | HDMI_FC_AUDICONF3 0x00121028.b 167 | HDMI_FC_VSDIEEEID0 0x00121029.b 168 | HDMI_FC_VSDSIZE 0x0012102A.b 169 | HDMI_FC_VSDIEEEID1 0x00121030.b 170 | HDMI_FC_VSDIEEEID2 0x00121031.b 171 | HDMI_FC_VSDPAYLOAD0 0x00121032.b 172 | HDMI_FC_VSDPAYLOAD1 0x00121033.b 173 | HDMI_FC_VSDPAYLOAD2 0x00121034.b 174 | HDMI_FC_VSDPAYLOAD3 0x00121035.b 175 | HDMI_FC_VSDPAYLOAD4 0x00121036.b 176 | HDMI_FC_VSDPAYLOAD5 0x00121037.b 177 | HDMI_FC_VSDPAYLOAD6 0x00121038.b 178 | HDMI_FC_VSDPAYLOAD7 0x00121039.b 179 | HDMI_FC_VSDPAYLOAD8 0x0012103A.b 180 | HDMI_FC_VSDPAYLOAD9 0x0012103B.b 181 | HDMI_FC_VSDPAYLOAD10 0x0012103C.b 182 | HDMI_FC_VSDPAYLOAD11 0x0012103D.b 183 | HDMI_FC_VSDPAYLOAD12 0x0012103E.b 184 | HDMI_FC_VSDPAYLOAD13 0x0012103F.b 185 | HDMI_FC_VSDPAYLOAD14 0x00121040.b 186 | HDMI_FC_VSDPAYLOAD15 0x00121041.b 187 | HDMI_FC_VSDPAYLOAD16 0x00121042.b 188 | HDMI_FC_VSDPAYLOAD17 0x00121043.b 189 | HDMI_FC_VSDPAYLOAD18 0x00121044.b 190 | HDMI_FC_VSDPAYLOAD19 0x00121045.b 191 | HDMI_FC_VSDPAYLOAD20 0x00121046.b 192 | HDMI_FC_VSDPAYLOAD21 0x00121047.b 193 | HDMI_FC_VSDPAYLOAD22 0x00121048.b 194 | HDMI_FC_VSDPAYLOAD23 0x00121049.b 195 | HDMI_FC_SPDVENDORNAME0 0x0012104A.b 196 | HDMI_FC_SPDPRODUCTNAME0 0x00121052.b 197 | HDMI_FC_SPDDEVICEINF 0x00121062.b 198 | HDMI_FC_AUDSCONF 0x00121063.b 199 | HDMI_FC_AUDSSTAT 0x00121064.b 200 | HDMI_FC_AUDSV 0x00121065.b 201 | HDMI_FC_AUDSU 0x00121066.b 202 | HDMI_FC_AUDSCHNLS0 0x00121067.b 203 | HDMI_FC_AUDSCHNLS1 0x00121068.b 204 | HDMI_FC_AUDSCHNLS2 0x00121069.b 205 | HDMI_FC_AUDSCHNLS3 0x0012106A.b 206 | HDMI_FC_AUDSCHNLS4 0x0012106B.b 207 | HDMI_FC_AUDSCHNLS5 0x0012106C.b 208 | HDMI_FC_AUDSCHNLS6 0x0012106D.b 209 | HDMI_FC_AUDSCHNLS7 0x0012106E.b 210 | HDMI_FC_AUDSCHNLS8 0x0012106F.b 211 | HDMI_FC_CTRLQHIGH 0x00121073.b 212 | HDMI_FC_CTRLQLOW 0x00121074.b 213 | HDMI_FC_ACP0 0x00121075.b 214 | HDMI_FC_ACP1 0x00121091.b 215 | HDMI_FC_ISCR1_0 0x00121092.b 216 | HDMI_FC_ISCR1_1 0x00121093.b 217 | HDMI_FC_ISCR2_0 0x001210A3.b 218 | HDMI_FC_DATAUTO0 0x001210B3.b 219 | HDMI_FC_DATAUTO1 0x001210B4.b 220 | HDMI_FC_DATAUTO2 0x001210B5.b 221 | HDMI_FC_DATMAN 0x001210B6.b 222 | HDMI_FC_DATAUTO3 0x001210B7.b 223 | HDMI_FC_RDRB0 0x001210B8.b 224 | HDMI_FC_RDRB1 0x001210B9.b 225 | HDMI_FC_RDRB2 0x001210BA.b 226 | HDMI_FC_RDRB3 0x001210BB.b 227 | HDMI_FC_RDRB4 0x001210BC.b 228 | HDMI_FC_RDRB5 0x001210BD.b 229 | HDMI_FC_RDRB6 0x001210BE.b 230 | HDMI_FC_RDRB7 0x001210BF.b 231 | HDMI_FC_STAT0 0x001210D0.b 232 | HDMI_FC_INT0 0x001210D1.b 233 | HDMI_FC_MASK0 0x001210D2.b 234 | HDMI_FC_POL0 0x001210D3.b 235 | HDMI_FC_STAT1 0x001210D4.b 236 | HDMI_FC_INT1 0x001210D5.b 237 | HDMI_FC_MASK1 0x001210D6.b 238 | HDMI_FC_POL1 0x001210D7.b 239 | HDMI_FC_STAT2 0x001210D8.b 240 | HDMI_FC_INT2 0x001210D9.b 241 | HDMI_FC_MASK2 0x001210DA.b 242 | HDMI_FC_POL2 0x001210DB.b 243 | HDMI_FC_PRCONF 0x001210E0.b 244 | HDMI_FC_GMD_STAT 0x00121100.b 245 | HDMI_FC_GMD_EN 0x00121101.b 246 | HDMI_FC_GMD_UP 0x00121102.b 247 | HDMI_FC_GMD_CONF 0x00121103.b 248 | HDMI_FC_GMD_HB 0x00121104.b 249 | HDMI_FC_GMD_PB0 0x00121105.b 250 | HDMI_FC_GMD_PB1 0x00121106.b 251 | HDMI_FC_GMD_PB2 0x00121107.b 252 | HDMI_FC_GMD_PB3 0x00121108.b 253 | HDMI_FC_GMD_PB4 0x00121109.b 254 | HDMI_FC_GMD_PB5 0x0012110A.b 255 | HDMI_FC_GMD_PB6 0x0012110B.b 256 | HDMI_FC_GMD_PB7 0x0012110C.b 257 | HDMI_FC_GMD_PB8 0x0012110D.b 258 | HDMI_FC_GMD_PB9 0x0012110E.b 259 | HDMI_FC_GMD_PB10 0x0012110F.b 260 | HDMI_FC_GMD_PB11 0x00121110.b 261 | HDMI_FC_GMD_PB12 0x00121111.b 262 | HDMI_FC_GMD_PB13 0x00121112.b 263 | HDMI_FC_GMD_PB14 0x00121113.b 264 | HDMI_FC_GMD_PB15 0x00121114.b 265 | HDMI_FC_GMD_PB16 0x00121115.b 266 | HDMI_FC_GMD_PB17 0x00121116.b 267 | HDMI_FC_GMD_PB18 0x00121117.b 268 | HDMI_FC_GMD_PB19 0x00121118.b 269 | HDMI_FC_GMD_PB20 0x00121119.b 270 | HDMI_FC_GMD_PB21 0x0012111A.b 271 | HDMI_FC_GMD_PB22 0x0012111B.b 272 | HDMI_FC_GMD_PB23 0x0012111C.b 273 | HDMI_FC_GMD_PB24 0x0012111D.b 274 | HDMI_FC_GMD_PB25 0x0012111E.b 275 | HDMI_FC_GMD_PB26 0x0012111F.b 276 | HDMI_FC_GMD_PB27 0x00121120.b 277 | HDMI_FC_DBGFORCE 0x00121200.b 278 | HDMI_FC_DBGAUD0CH0 0x00121201.b 279 | HDMI_FC_DBGAUD1CH0 0x00121202.b 280 | HDMI_FC_DBGAUD2CH0 0x00121203.b 281 | HDMI_FC_DBGAUD0CH1 0x00121204.b 282 | HDMI_FC_DBGAUD1CH1 0x00121205.b 283 | HDMI_FC_DBGAUD2CH1 0x00121206.b 284 | HDMI_FC_DBGAUD0CH2 0x00121207.b 285 | HDMI_FC_DBGAUD1CH2 0x00121208.b 286 | HDMI_FC_DBGAUD2CH2 0x00121209.b 287 | HDMI_FC_DBGAUD0CH3 0x0012120A.b 288 | HDMI_FC_DBGAUD1CH3 0x0012120B.b 289 | HDMI_FC_DBGAUD2CH3 0x0012120C.b 290 | HDMI_FC_DBGAUD0CH4 0x0012120D.b 291 | HDMI_FC_DBGAUD1CH4 0x0012120E.b 292 | HDMI_FC_DBGAUD2CH4 0x0012120F.b 293 | HDMI_FC_DBGAUD0CH5 0x00121210.b 294 | HDMI_FC_DBGAUD1CH5 0x00121211.b 295 | HDMI_FC_DBGAUD2CH5 0x00121212.b 296 | HDMI_FC_DBGAUD0CH6 0x00121213.b 297 | HDMI_FC_DBGAUD1CH6 0x00121214.b 298 | HDMI_FC_DBGAUD2CH6 0x00121215.b 299 | HDMI_FC_DBGAUD0CH7 0x00121216.b 300 | HDMI_FC_DBGAUD1CH7 0x00121217.b 301 | HDMI_FC_DBGAUD2CH7 0x00121218.b 302 | HDMI_FC_DBGTMDS0 0x00121219.b 303 | HDMI_FC_DBGTMDS1 0x0012121A.b 304 | HDMI_FC_DBGTMDS2 0x0012121B.b 305 | HDMI_PHY_CONF0 0x00123000.b 306 | HDMI_PHY_TST0 0x00123001.b 307 | HDMI_PHY_TST1 0x00123002.b 308 | HDMI_PHY_TST2 0x00123003.b 309 | HDMI_PHY_STAT0 0x00123004.b 310 | HDMI_PHY_INT0 0x00123005.b 311 | HDMI_PHY_MASK0 0x00123006.b 312 | HDMI_PHY_POL0 0x00123007.b 313 | HDMI_PHY_I2CM_SLAVE_ADDR 0x00123020.b 314 | HDMI_PHY_I2CM_ADDRESS_ADDR 0x00123021.b 315 | HDMI_PHY_I2CM_DATAO_1_ADDR 0x00123022.b 316 | HDMI_PHY_I2CM_DATAO_0_ADDR 0x00123023.b 317 | HDMI_PHY_I2CM_DATAI_1_ADDR 0x00123024.b 318 | HDMI_PHY_I2CM_DATAI_0_ADDR 0x00123025.b 319 | HDMI_PHY_I2CM_OPERATION_ADDR 0x00123026.b 320 | HDMI_PHY_I2CM_INT_ADDR 0x00123027.b 321 | HDMI_PHY_I2CM_CTLINT_ADDR 0x00123028.b 322 | HDMI_PHY_I2CM_DIV_ADDR 0x00123029.b 323 | HDMI_PHY_I2CM_SOFTRSTZ_ADDR 0x0012302A.b 324 | HDMI_PHY_I2CM_SS_SCL_HCNT_1_ADDR 0x0012302B.b 325 | HDMI_PHY_I2CM_SS_SCL_HCNT_0_ADDR 0x0012302C.b 326 | HDMI_PHY_I2CM_SS_SCL_LCNT_1_ADDR 0x0012302D.b 327 | HDMI_PHY_I2CM_SS_SCL_LCNT_0_ADDR 0x0012302E.b 328 | HDMI_PHY_I2CM_FS_SCL_HCNT_1_ADDR 0x0012302F.b 329 | GPMI_HW_GPMI_COMPARE 0x00112010 330 | GPMI_HW_GPMI_ECCCOUNT 0x00112030 331 | GPMI_HW_GPMI_PAYLOAD 0x00112040 332 | GPMI_HW_GPMI_AUXILIARY 0x00112050 333 | GPMI_HW_GPMI_TIMING0 0x00112070 334 | GPMI_HW_GPMI_TIMING1 0x00112080 335 | GPMI_HW_GPMI_TIMING2 0x00112090 336 | GPMI_HW_GPMI_DATA 0x001120A0 337 | GPMI_HW_GPMI_STAT 0x001120B0 338 | GPMI_HW_GPMI_DEBUG 0x001120C0 339 | GPMI_HW_GPMI_VERSION 0x001120D0 340 | GPMI_HW_GPMI_DEBUG2 0x001120E0 341 | GPMI_HW_GPMI_DEBUG3 0x001120F0 342 | GPMI_HW_GPMI_READ_DDR_DLL_CTRL 0x00112100 343 | GPMI_HW_GPMI_WRITE_DDR_DLL_CTRL 0x00112110 344 | GPMI_HW_GPMI_READ_DDR_DLL_STS 0x00112120 345 | GPMI_HW_GPMI_WRITE_DDR_DLL_STS 0x00112130 346 | HW_BCH_CTRL 0x00114000 347 | HW_BCH_STATUS0 0x00114010 348 | HW_BCH_MODE 0x00114020 349 | HW_BCH_ENCODEPTR 0x00114030 350 | HW_BCH_DATAPTR 0x00114040 351 | HW_BCH_METAPTR 0x00114050 352 | HW_BCH_LAYOUTSELECT 0x00114070 353 | HW_BCH_FLASH0LAYOUT0 0x00114080 354 | HW_BCH_FLASH0LAYOUT1 0x00114090 355 | HW_BCH_FLASH1LAYOUT0 0x001140A0 356 | HW_BCH_FLASH1LAYOUT1 0x001140B0 357 | HW_BCH_FLASH2LAYOUT0 0x001140C0 358 | HW_BCH_FLASH2LAYOUT1 0x001140D0 359 | HW_BCH_FLASH3LAYOUT0 0x001140E0 360 | HW_BCH_FLASH3LAYOUT1 0x001140F0 361 | HW_BCH_DEBUG0 0x00114100 362 | HW_BCH_DBGKESREAD 0x00114110 363 | HW_BCH_DBGCSFEREAD 0x00114120 364 | HW_BCH_DBGSYNDGENREAD 0x00114130 365 | HW_BCH_DBGAHBMREAD 0x00114140 366 | HW_BCH_BLOCKNAME 0x00114150 367 | HW_BCH_VERSION 0x00114160 368 | SPDIF_SCR 0x02004000 369 | SPDIF_SRCD 0x02004004 370 | SPDIF_SRPC 0x02004008 371 | SPDIF_SIE 0x0200400C 372 | SPDIF_SIC 0x02004010 373 | SPDIF_SIS 0x02004010 374 | SPDIF_SRL 0x02004014 375 | SPDIF_SRR 0x02004018 376 | SPDIF_SRCSH 0x0200401C 377 | SPDIF_SRCSL 0x02004020 378 | SPDIF_SRU 0x02004024 379 | SPDIF_SRQ 0x02004028 380 | SPDIF_STL 0x0200402C 381 | SPDIF_STR 0x02004030 382 | SPDIF_STCSCH 0x02004034 383 | SPDIF_STCSCL 0x02004038 384 | SPDIF_SRFM 0x02004044 385 | SPDIF_STC 0x02004050 386 | ESAI_ETDR 0x02024000 387 | ESAI_ERDR 0x02024004 388 | ESAI_ECR 0x02024008 389 | ESAI_ESR 0x0202400C 390 | ESAI_TFCR 0x02024010 391 | ESAI_TFSR 0x02024014 392 | ESAI_RFCR 0x02024018 393 | ESAI_RFSR 0x0202401C 394 | ESAI_TSR 0x02024098 395 | ESAI_SAISR 0x020240CC 396 | ESAI_SAICR 0x020240D0 397 | ESAI_TCR 0x020240D4 398 | ESAI_TCCR 0x020240D8 399 | ESAI_RCR 0x020240DC 400 | ESAI_RCCR 0x020240E0 401 | ESAI_TSMA 0x020240E4 402 | ESAI_TSMB 0x020240E8 403 | ESAI_RSMA 0x020240EC 404 | ESAI_RSMB 0x020240F0 405 | ESAI_PRRC 0x020240F8 406 | ESAI_PCRC 0x020240FC 407 | ASRC_ASRCTR 0x02034000 408 | ASRC_ASRIER 0x02034004 409 | ASRC_ASRCNCR 0x0203400C 410 | ASRC_ASRCFG 0x02034010 411 | ASRC_ASRCSR 0x02034014 412 | ASRC_ASRCDR1 0x02034018 413 | ASRC_ASRCDR2 0x0203401C 414 | ASRC_ASRSTR 0x02034020 415 | ASRC_ASRTFR1 0x02034054 416 | ASRC_ASRCCR 0x0203405C 417 | ASRC_ASRIDRHA 0x02034080 418 | ASRC_ASRIDRLA 0x02034084 419 | ASRC_ASRIDRHB 0x02034088 420 | ASRC_ASRIDRLB 0x0203408C 421 | ASRC_ASRIDRHC 0x02034090 422 | ASRC_ASRIDRLC 0x02034094 423 | ASRC_ASR76K 0x02034098 424 | ASRC_ASR56K 0x0203409C 425 | ASRC_ASRMCRA 0x020340A0 426 | ASRC_ASRFSTA 0x020340A4 427 | ASRC_ASRMCRB 0x020340A8 428 | ASRC_ASRFSTB 0x020340AC 429 | ASRC_ASRMCRC 0x020340B0 430 | ASRC_ASRFSTC 0x020340B4 431 | VPU_CodeRun 0x02040000 432 | VPU_CodeDown 0x02040004 433 | VPU_HostIntReq 0x02040008 434 | VPU_BitIntClear 0x0204000C 435 | VPU_BitIntSts 0x02040010 436 | VPU_BitCurPc 0x02040018 437 | VPU_BitCodecBusy 0x02040020 438 | PWM1_PWMCR 0x02080000 439 | PWM1_PWMSR 0x02080004 440 | PWM1_PWMIR 0x02080008 441 | PWM1_PWMSAR 0x0208000C 442 | PWM1_PWMPR 0x02080010 443 | PWM1_PWMCNR 0x02080014 444 | PWM2_PWMCR 0x02084000 445 | PWM2_PWMSR 0x02084004 446 | PWM2_PWMIR 0x02084008 447 | PWM2_PWMSAR 0x0208400C 448 | PWM2_PWMPR 0x02084010 449 | PWM2_PWMCNR 0x02084014 450 | PWM3_PWMCR 0x02088000 451 | PWM3_PWMSR 0x02088004 452 | PWM3_PWMIR 0x02088008 453 | PWM3_PWMSAR 0x0208800C 454 | PWM3_PWMPR 0x02088010 455 | PWM3_PWMCNR 0x02088014 456 | PWM4_PWMCR 0x0208C000 457 | PWM4_PWMSR 0x0208C004 458 | PWM4_PWMIR 0x0208C008 459 | PWM4_PWMSAR 0x0208C00C 460 | PWM4_PWMPR 0x0208C010 461 | PWM4_PWMCNR 0x0208C014 462 | GPT_CR 0x02098000 463 | GPT_PR 0x02098004 464 | GPT_SR 0x02098008 465 | GPT_IR 0x0209800C 466 | GPT_OCR1 0x02098010 467 | GPT_OCR2 0x02098014 468 | GPT_OCR3 0x02098018 469 | GPT_ICR1 0x0209801C 470 | GPT_ICR2 0x02098020 471 | GPT_CNT 0x02098024 472 | GPIO1_DR 0x0209C000 473 | GPIO1_GDIR 0x0209C004 474 | GPIO1_PSR 0x0209C008 475 | GPIO1_ICR1 0x0209C00C 476 | GPIO1_ICR2 0x0209C010 477 | GPIO1_IMR 0x0209C014 478 | GPIO1_ISR 0x0209C018 479 | GPIO1_EDGE_SEL 0x0209C01C 480 | GPIO2_DR 0x020A0000 481 | GPIO2_GDIR 0x020A0004 482 | GPIO2_PSR 0x020A0008 483 | GPIO2_ICR1 0x020A000C 484 | GPIO2_ICR2 0x020A0010 485 | GPIO2_IMR 0x020A0014 486 | GPIO2_ISR 0x020A0018 487 | GPIO2_EDGE_SEL 0x020A001C 488 | GPIO3_DR 0x020A4000 489 | GPIO3_GDIR 0x020A4004 490 | GPIO3_PSR 0x020A4008 491 | GPIO3_ICR1 0x020A400C 492 | GPIO3_ICR2 0x020A4010 493 | GPIO3_IMR 0x020A4014 494 | GPIO3_ISR 0x020A4018 495 | GPIO3_EDGE_SEL 0x020A401C 496 | GPIO4_DR 0x020A8000 497 | GPIO4_GDIR 0x020A8004 498 | GPIO4_PSR 0x020A8008 499 | GPIO4_ICR1 0x020A800C 500 | GPIO4_ICR2 0x020A8010 501 | GPIO4_IMR 0x020A8014 502 | GPIO4_ISR 0x020A8018 503 | GPIO4_EDGE_SEL 0x020A801C 504 | GPIO5_DR 0x020AC000 505 | GPIO5_GDIR 0x020AC004 506 | GPIO5_PSR 0x020AC008 507 | GPIO5_ICR1 0x020AC00C 508 | GPIO5_ICR2 0x020AC010 509 | GPIO5_IMR 0x020AC014 510 | GPIO5_ISR 0x020AC018 511 | GPIO5_EDGE_SEL 0x020AC01C 512 | GPIO6_DR 0x020B0000 513 | GPIO6_GDIR 0x020B0004 514 | GPIO6_PSR 0x020B0008 515 | GPIO6_ICR1 0x020B000C 516 | GPIO6_ICR2 0x020B0010 517 | GPIO6_IMR 0x020B0014 518 | GPIO6_ISR 0x020B0018 519 | GPIO6_EDGE_SEL 0x020B001C 520 | GPIO7_DR 0x020B4000 521 | GPIO7_GDIR 0x020B4004 522 | GPIO7_PSR 0x020B4008 523 | GPIO7_ICR1 0x020B400C 524 | GPIO7_ICR2 0x020B4010 525 | GPIO7_IMR 0x020B4014 526 | GPIO7_ISR 0x020B4018 527 | GPIO7_EDGE_SEL 0x020B401C 528 | KPP_KPCR 0x020B8000.W 529 | KPP_KPSR 0x020B8002.W 530 | KPP_KDDR 0x020B8004.W 531 | KPP_KPDR 0x020B8006.W 532 | WDOG_WCR 0x020BC000.W 533 | WDOG_WSR 0x020BC002.W 534 | WDOG_WRSR 0x020BC004.W 535 | WDOG_WICR 0x020BC006.W 536 | WDOG_WMCR 0x020BC008.W 537 | CCM_CCR 0x020C4000 538 | CCM_CCDR 0x020C4004 539 | CCM_CSR 0x020C4008 540 | CCM_CCSR 0x020C400C 541 | CCM_CACRR 0x020C4010 542 | CCM_CBCDR 0x020C4014 543 | CCM_CBCMR 0x020C4018 544 | CCM_CSCMR1 0x020C401C 545 | CCM_CSCMR2 0x020C4020 546 | CCM_CSCDR1 0x020C4024 547 | CCM_CS1CDR 0x020C4028 548 | CCM_CS2CDR 0x020C402C 549 | CCM_CDCDR 0x020C4030 550 | CCM_CHSCCDR 0x020C4034 551 | CCM_CSCDR2 0x020C4038 552 | CCM_CSCDR3 0x020C403C 553 | CCM_CSCDR4 0x020C4040 554 | CCM_CDHIPR 0x020C4048 555 | CCM_CDCR 0x020C404C 556 | CCM_CTOR 0x020C4050 557 | CCM_CLPCR 0x020C4054 558 | CCM_CISR 0x020C4058 559 | CCM_CIMR 0x020C405C 560 | CCM_CCOSR 0x020C4060 561 | CCM_CGPR 0x020C4064 562 | CCM_CCGR0 0x020C4068 563 | CCM_CCGR1 0x020C406C 564 | CCM_CCGR2 0x020C4070 565 | CCM_CCGR3 0x020C4074 566 | CCM_CCGR4 0x020C4078 567 | CCM_CCGR5 0x020C407C 568 | CCM_CCGR6 0x020C4080 569 | CCM_CCGR7 0x020C4084 570 | CCM_CMEOR 0x020C4088 571 | CCM_ANALOG_PLL_ARM 0x020c8000 572 | CCM_ANALOG_PLL_USB1 0x020c8010 573 | CCM_ANALOG_PLL_USB2 0x020c8020 574 | CCM_ANALOG_PLL_SYS 0x020c8030 575 | CCM_ANALOG_PLL_SYS_SS 0x020c8040 576 | CCM_ANALOG_PLL_SYS_NUM 0x020c8050 577 | CCM_ANALOG_PLL_SYS_DENOM 0x020c8060 578 | CCM_ANALOG_PLL_AUDIO 0x020c8070 579 | CCM_ANALOG_PLL_AUDIO_NUM 0x020c8080 580 | CCM_ANALOG_PLL_AUDIO_DENOM 0x020c8090 581 | CCM_ANALOG_PLL_VIDEO 0x020c80a0 582 | CCM_ANALOG_PLL_VIDEO_NUM 0x020c80b0 583 | CCM_ANALOG_PLL_VIDEO_DENOM 0x020c80c0 584 | CCM_ANALOG_PLL_MLB 0x020c80d0 585 | CCM_ANALOG_PLL_ENET 0x020c80e0 586 | CCM_ANALOG_PFD_480 0x020c80f0 587 | CCM_ANALOG_PFD_528 0x020c8100 588 | CCM_ANALOG_MISC0 0x020c8150 589 | CCM_ANALOG_MISC1 0x020c8160 590 | CCM_ANALOG_MISC2 0x020c8170 591 | 592 | XTALOSC24M_MISC0 0x020C8150 593 | :CLKGATE_DELAY:28-26 594 | :CLKGATE_CTL:25 595 | :WBCP_VPW_THRESH:19-18 596 | :OSC_XTALOK_EN:17 597 | :OSC_XTALOK:16 598 | :OSC_I:15-14 599 | :STOP_MODE_CONFIG:12 600 | :REFTOP_VBGUP:7 601 | :REFTOP_VBGADJ:6-4 602 | :REFTOP_SELFBIASOFF:3 603 | :REFTOP_PWD:0 604 | 605 | PMU_MISC2 0x020C8170 606 | :video_div:31-30 607 | :REG2_STEP_TIME:29-28 608 | :REG1_STEP_TIME:27-26 609 | :REG0_STEP_TIME:25-24 610 | :REG2_OK:22 611 | :REG2_ENABLE_BO:21 612 | :REG2_BO_STATUS:19 613 | :REG2_BO_OFFSET:18-16 614 | :REG1_BO_ENABLE:13 615 | :REG1_BO_STATUS:11 616 | :REG1_BO_OFFSET:10-8 617 | :PLL3_DISABLE:7 618 | :REG0_BO_ENABLE:5 619 | :REG0_BO_STATUS:3 620 | :REG0_BO_OFFSET:2-0 621 | USBPHY1_PWD 0x020C9000 622 | USBPHY1_PWD_SET 0x020C9004 623 | USBPHY1_PWD_CLR 0x020C9008 624 | USBPHY1_PWD_TOG 0x020C900C 625 | USBPHY1_TX 0x020C9010 626 | USBPHY1_TX_SET 0x020C9014 627 | USBPHY1_TX_TOG 0x020C901C 628 | USBPHY1_RX 0x020C9020 629 | USBPHY1_RX_SET 0x020C9024 630 | USBPHY1_RX_CLR 0x020C9028 631 | USBPHY1_RX_TOG 0x020C902C 632 | USBPHY1_CTRL 0x020C9030 633 | USBPHY1_CTRL_SET 0x020C9034 634 | USBPHY1_CTRL_CLR 0x020C9038 635 | USBPHY1_CTRL_TOG 0x020C903C 636 | USBPHY1_STATUS 0x020C9040 637 | :RESUME_STATUS:10 638 | :OTGID_STATUS:8 639 | :DEVPLUGIN_STATUS:6 640 | :HOSTDISCONDETECT_STATUS:3 641 | USBPHY1_DEBUG 0x020C9050 642 | USBPHY1_DEBUG_SET 0x020C9054 643 | USBPHY1_DEBUG_CLR 0x020C9058 644 | USBPHY1_DEBUG_TOG 0x020C905C 645 | USBPHY1_DEBUG0_STATUS 0x020C9060 646 | USBPHY1_DEBUG1 0x020C9070 647 | USBPHY1_DEBUG1_SET 0x020C9074 648 | USBPHY1_DEBUG1_CLR 0x020C9078 649 | USBPHY1_DEBUG1_TOG 0x020C907C 650 | USBPHY1_VERSION 0x020C9080 651 | USBPHY2_PWD 0x020CA000 652 | USBPHY2_PWD_SET 0x020CA004 653 | USBPHY2_PWD_CLR 0x020CA008 654 | USBPHY2_PWD_TOG 0x020CA00C 655 | USBPHY2_TX 0x020CA010 656 | USBPHY2_TX_SET 0x020CA014 657 | USBPHY2_TX_CLR 0x020CA018 658 | USBPHY2_TX_TOG 0x020CA01C 659 | USBPHY2_RX 0x020CA020 660 | USBPHY2_RX_SET 0x020CA024 661 | USBPHY2_RX_CLR 0x020CA028 662 | USBPHY2_RX_TOG 0x020CA02C 663 | USBPHY2_CTRL 0x020CA030 664 | USBPHY2_CTRL_SET 0x020CA034 665 | USBPHY2_CTRL_CLR 0x020CA038 666 | USBPHY2_CTRL_TOG 0x020CA03C 667 | USBPHY2_STATUS 0x020CA040 668 | USBPHY2_DEBUG 0x020CA050 669 | USBPHY2_DEBUG_SET 0x020CA054 670 | USBPHY2_DEBUG_CLR 0x020CA058 671 | USBPHY2_DEBUG_TOG 0x020CA05C 672 | USBPHY2_DEBUG0_STATUS 0x020CA060 673 | USBPHY2_DEBUG1 0x020CA070 674 | USBPHY2_DEBUG1_SET 0x020CA074 675 | USBPHY2_DEBUG1_CLR 0x020CA078 676 | USBPHY2_DEBUG1_TOG 0x020CA07C 677 | USBPHY2_VERSION 0x020CA080 678 | SRC_SCR 0x020D8000 679 | SRC_SBMR1 0x020D8004 680 | SRC_SRSR 0x020D8008 681 | SRC_SISR 0x020D8014 682 | SRC_SIMR 0x020D8018 683 | SRC_SBMR2 0x020D801C 684 | SRC_GPR1 0x020D8020 685 | SRC_GPR2 0x020D8024 686 | SRC_GPR3 0x020D8028 687 | SRC_GPR4 0x020D802C 688 | SRC_GPR5 0x020D8030 689 | SRC_GPR6 0x020D8034 690 | SRC_GPR7 0x020D8038 691 | SRC_GPR8 0x020D803C 692 | SRC_GPR9 0x020D8040 693 | SRC_GPR10 0x020D8044 694 | DVFSC_DVFSTHRS 0x020DC000 695 | GPC_CNTR 0x020DC000 696 | MIPI_CSI_VERSION 0x020DC000 697 | DVFSC_DVFSCOUN 0x020DC004 698 | GPC_PGR 0x020DC004 699 | MIPI_CSI_N_LANES 0x020DC004 700 | DVFSC_DVFSSIG1 0x020DC008 701 | GPC_IMR1 0x020DC008 702 | MIPI_CSI_PHY_SHUTDOWNZ 0x020DC008 703 | DVFSC_DVFSSIG0 0x020DC00C 704 | GPC_IMR2 0x020DC00C 705 | MIPI_CSI_DPHY_RSTZ 0x020DC00C 706 | DVFSC_DVFSGPC0 0x020DC010 707 | GPC_IMR3 0x020DC010 708 | MIPI_CSI_CSI2_RESETN 0x020DC010 709 | DVFSC_DVFSGPC1 0x020DC014 710 | GPC_IMR4 0x020DC014 711 | MIPI_CSI_PHY_STATE 0x020DC014 712 | DVFSC_DVFSGPBT 0x020DC018 713 | GPC_ISR1 0x020DC018 714 | MIPI_CSI_DATA_IDS_1 0x020DC018 715 | DVFSC_DVFSEMAC 0x020DC01C 716 | GPC_ISR2 0x020DC01C 717 | MIPI_CSI_DATA_IDS_2 0x020DC01C 718 | DVFSC_DVFSCNTR 0x020DC020 719 | GPC_ISR3 0x020DC020 720 | MIPI_CSI_ERR1 0x020DC020 721 | DVFSC_DVFSLTR0_0 0x020DC024 722 | GPC_ISR4 0x020DC024 723 | MIPI_CSI_ERR2 0x020DC024 724 | DVFSC_DVFSLTR0_1 0x020DC028 725 | MIPI_CSI_MASK1 0x020DC028 726 | DVFSC_DVFSLTR1_0 0x020DC02C 727 | MIPI_CSI_MASK2 0x020DC02C 728 | DVFSC_DVFSLTR1_1 0x020DC030 729 | MIPI_CSI_PHY_TST_CRTL0 0x020DC030 730 | DVFSC_DVFSPT0 0x020DC034 731 | MIPI_CSI_PHY_TST_CTRL1 0x020DC034 732 | DVFSC_DVFSPT1 0x020DC038 733 | DVFSC_DVFSPT2 0x020DC03C 734 | DVFSC_DVFSPT3 0x020DC040 735 | IOMUXC_GPR0 0x020E0000 736 | MIPI_DSI_VERSION 0x020E0000 737 | IOMUXC_GPR1 0x020E0004 738 | MIPI_DSI_PWR_UP 0x020E0004 739 | IOMUXC_GPR2 0x020E0008 740 | :COUNTER_RESET_VAL:21-20 741 | :LVDS_CLK_SHIFT:18-16 742 | :DI1_VS_POLARITY:10 743 | :DI0_VS_POLARITY:9 744 | :BIT_MAPPING_CH1:8 745 | :DATA_WIDTH_CH1:7 746 | :BIT_MAPPING_CH0:6 747 | :DATA_WIDTH_CH0:5 748 | :SPLIT_MODE_EN:4 749 | :CH1_MODE:3-2 750 | :CH0_MODE:1-0 751 | MIPI_DSI_CLKMGR_CFG 0x020E0008 752 | IOMUXC_GPR3 0x020E000C 753 | MIPI_DSI_DPI_CFG 0x020E000C 754 | IOMUXC_GPR4 0x020E0010 755 | MIPI_DSI_DBI_CFG 0x020E0010 756 | IOMUXC_GPR5 0x020E0014 757 | MIPI_DSI_DBIS_CMDSIZE 0x020E0014 758 | IOMUXC_GPR6 0x020E0018 759 | MIPI_DSI_PCKHDL_CFG 0x020E0018 760 | IOMUXC_GPR7 0x020E001C 761 | MIPI_DSI_VID_MODE_CFG 0x020E001C 762 | IOMUXC_GPR8 0x020E0020 763 | MIPI_DSI_VID_PKT_CFG 0x020E0020 764 | IOMUXC_GPR9 0x020E0024 765 | MIPI_DSI_CMD_MODE_CFG 0x020E0024 766 | IOMUXC_GPR10 0x020E0028 767 | MIPI_DSI_TMR_LINE_CFG 0x020E0028 768 | IOMUXC_GPR11 0x020E002C 769 | MIPI_DSI_VTIMING_CFG 0x020E002C 770 | IOMUXC_GPR12 0x020E0030 771 | MIPI_DSI_PHY_TMR_CFG 0x020E0030 772 | IOMUXC_GPR13 0x020E0034 773 | MIPI_DSI_GEN_HDR 0x020E0034 774 | IOMUXC_OBSERVE_MUX_0 0x020E0038 775 | MIPI_DSI_GEN_PLD_DATA 0x020E0038 776 | IOMUXC_OBSERVE_MUX_1 0x020E003C 777 | MIPI_DSI_CMD_PKT_STATUS 0x020E003C 778 | IOMUXC_OBSERVE_MUX_2 0x020E0040 779 | MIPI_DSI_TO_CNT_CFG0 0x020E0040 780 | IOMUXC_OBSERVE_MUX_3 0x020E0044 781 | MIPI_DSI_ERROR_ST0 0x020E0044 782 | IOMUXC_OBSERVE_MUX_4 0x020E0048 783 | MIPI_DSI_ERROR_ST1 0x020E0048 784 | IOMUXC_SW_MUX_CTL_PAD_SD2_DAT1 0x020E004C 785 | MIPI_DSI_ERROR_MSK0 0x020E004C 786 | IOMUXC_SW_MUX_CTL_PAD_SD2_DAT2 0x020E0050 787 | MIPI_DSI_ERROR_MSK1 0x020E0050 788 | IOMUXC_SW_MUX_CTL_PAD_SD2_DAT0 0x020E0054 789 | MIPI_DSI_PHY_RSTZ 0x020E0054 790 | IOMUXC_SW_MUX_CTL_PAD_RGMII_TXC 0x020E0058 791 | MIPI_DSI_PHY_IF_CFG_ 0x020E0058 792 | IOMUXC_SW_MUX_CTL_PAD_RGMII_TD0 0x020E005C 793 | MIPI_DSI_PHY_IF_CTRL 0x020E005C 794 | IOMUXC_SW_MUX_CTL_PAD_RGMII_TD1 0x020E0060 795 | MIPI_DSI_PHY_STATUS 0x020E0060 796 | IOMUXC_SW_MUX_CTL_PAD_RGMII_TD2 0x020E0064 797 | MIPI_DSI_PHY_TST_CTRL0 0x020E0064 798 | IOMUXC_SW_MUX_CTL_PAD_RGMII_TD3 0x020E0068 799 | MIPI_DSI_PHY_TST_CTRL1 0x020E0068 800 | IOMUXC_SW_MUX_CTL_PAD_RGMII_RX_CTL 0x020E006C 801 | IOMUXC_SW_MUX_CTL_PAD_RGMII_RD0 0x020E0070 802 | IOMUXC_SW_MUX_CTL_PAD_RGMII_TX_CTL 0x020E0074 803 | IOMUXC_SW_MUX_CTL_PAD_RGMII_RD1 0x020E0078 804 | IOMUXC_SW_MUX_CTL_PAD_RGMII_RD2 0x020E007C 805 | IOMUXC_SW_MUX_CTL_PAD_RGMII_RD3 0x020E0080 806 | IOMUXC_SW_MUX_CTL_PAD_RGMII_RXC 0x020E0084 807 | IOMUXC_SW_MUX_CTL_PAD_EIM_A25 0x020E0088 808 | IOMUXC_SW_MUX_CTL_PAD_EIM_EB2 0x020E008C 809 | IOMUXC_SW_MUX_CTL_PAD_EIM_D16 0x020E0090 810 | IOMUXC_SW_MUX_CTL_PAD_EIM_D17 0x020E0094 811 | IOMUXC_SW_MUX_CTL_PAD_EIM_D18 0x020E0098 812 | IOMUXC_SW_MUX_CTL_PAD_EIM_D19 0x020E009C 813 | IOMUXC_SW_MUX_CTL_PAD_EIM_D20 0x020E00A0 814 | IOMUXC_SW_MUX_CTL_PAD_EIM_D21 0x020E00A4 815 | IOMUXC_SW_MUX_CTL_PAD_EIM_D22 0x020E00A8 816 | IOMUXC_SW_MUX_CTL_PAD_EIM_D23 0x020E00AC 817 | IOMUXC_SW_MUX_CTL_PAD_EIM_EB3 0x020E00B0 818 | IOMUXC_SW_MUX_CTL_PAD_EIM_D24 0x020E00B4 819 | IOMUXC_SW_MUX_CTL_PAD_EIM_D25 0x020E00B8 820 | IOMUXC_SW_MUX_CTL_PAD_EIM_D26 0x020E00BC 821 | IOMUXC_SW_MUX_CTL_PAD_EIM_D27 0x020E00C0 822 | IOMUXC_SW_MUX_CTL_PAD_EIM_D28 0x020E00C4 823 | IOMUXC_SW_MUX_CTL_PAD_EIM_D29 0x020E00C8 824 | IOMUXC_SW_MUX_CTL_PAD_EIM_D30 0x020E00CC 825 | IOMUXC_SW_MUX_CTL_PAD_EIM_D31 0x020E00D0 826 | IOMUXC_SW_MUX_CTL_PAD_EIM_A24 0x020E00D4 827 | IOMUXC_SW_MUX_CTL_PAD_EIM_A23 0x020E00D8 828 | IOMUXC_SW_MUX_CTL_PAD_EIM_A22 0x020E00DC 829 | IOMUXC_SW_MUX_CTL_PAD_EIM_A21 0x020E00E0 830 | IOMUXC_SW_MUX_CTL_PAD_EIM_A20 0x020E00E4 831 | IOMUXC_SW_MUX_CTL_PAD_EIM_A19 0x020E00E8 832 | IOMUXC_SW_MUX_CTL_PAD_EIM_A18 0x020E00EC 833 | IOMUXC_SW_MUX_CTL_PAD_EIM_A17 0x020E00F0 834 | IOMUXC_SW_MUX_CTL_PAD_EIM_A16 0x020E00F4 835 | IOMUXC_SW_MUX_CTL_PAD_EIM_CS0 0x020E00F8 836 | IOMUXC_SW_MUX_CTL_PAD_EIM_CS1 0x020E00FC 837 | IOMUXC_SW_MUX_CTL_PAD_EIM_OE 0x020E0100 838 | IOMUXC_SW_MUX_CTL_PAD_EIM_RW 0x020E0104 839 | IOMUXC_SW_MUX_CTL_PAD_EIM_LBA 0x020E0108 840 | IOMUXC_SW_MUX_CTL_PAD_EIM_EB0 0x020E010C 841 | IOMUXC_SW_MUX_CTL_PAD_EIM_EB1 0x020E0110 842 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA0 0x020E0114 843 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA1 0x020E0118 844 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA2 0x020E011C 845 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA3 0x020E0120 846 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA4 0x020E0124 847 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA5 0x020E0128 848 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA6 0x020E012C 849 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA7 0x020E0130 850 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA8 0x020E0134 851 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA9 0x020E0138 852 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA10 0x020E013C 853 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA11 0x020E0140 854 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA12 0x020E0144 855 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA13 0x020E0148 856 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA14 0x020E014C 857 | IOMUXC_SW_MUX_CTL_PAD_EIM_DA15 0x020E0150 858 | IOMUXC_SW_MUX_CTL_PAD_EIM_WAIT 0x020E0154 859 | IOMUXC_SW_MUX_CTL_PAD_EIM_BCLK 0x020E0158 860 | IOMUXC_SW_MUX_CTL_PAD_DI0_DISP_CLK 0x020E015C 861 | IOMUXC_SW_MUX_CTL_PAD_DI0_PIN15 0x020E0160 862 | IOMUXC_SW_MUX_CTL_PAD_DI0_PIN2 0x020E0164 863 | IOMUXC_SW_MUX_CTL_PAD_DI0_PIN3 0x020E0168 864 | IOMUXC_SW_MUX_CTL_PAD_DI0_PIN4 0x020E016C 865 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT0 0x020E0170 866 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT1 0x020E0174 867 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT2 0x020E0178 868 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT3 0x020E017C 869 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT4 0x020E0180 870 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT5 0x020E0184 871 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT6 0x020E0188 872 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT7 0x020E018C 873 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT8 0x020E0190 874 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT9 0x020E0194 875 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT10 0x020E0198 876 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT11 0x020E019C 877 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT12 0x020E01A0 878 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT13 0x020E01A4 879 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT14 0x020E01A8 880 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT15 0x020E01AC 881 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT16 0x020E01B0 882 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT17 0x020E01B4 883 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT18 0x020E01B8 884 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT19 0x020E01BC 885 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT20 0x020E01C0 886 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT21 0x020E01C4 887 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT22 0x020E01C8 888 | IOMUXC_SW_MUX_CTL_PAD_DISP0_DAT23 0x020E01CC 889 | IOMUXC_SW_MUX_CTL_PAD_ENET_MDIO 0x020E01D0 890 | IOMUXC_SW_MUX_CTL_PAD_ENET_REF_CLK 0x020E01D4 891 | IOMUXC_SW_MUX_CTL_PAD_ENET_RX_ER 0x020E01D8 892 | IOMUXC_SW_MUX_CTL_PAD_ENET_CRS_DV 0x020E01DC 893 | IOMUXC_SW_MUX_CTL_PAD_ENET_RXD1 0x020E01E0 894 | IOMUXC_SW_MUX_CTL_PAD_ENET_RXD0 0x020E01E4 895 | IOMUXC_SW_MUX_CTL_PAD_ENET_TX_EN 0x020E01E8 896 | IOMUXC_SW_MUX_CTL_PAD_ENET_TXD1 0x020E01EC 897 | IOMUXC_SW_MUX_CTL_PAD_ENET_TXD0 0x020E01F0 898 | IOMUXC_SW_MUX_CTL_PAD_ENET_MDC 0x020E01F4 899 | IOMUXC_SW_MUX_CTL_PAD_KEY_COL0 0x020E01F8 900 | IOMUXC_SW_MUX_CTL_PAD_KEY_ROW0 0x020E01FC 901 | IOMUXC_SW_MUX_CTL_PAD_KEY_COL1 0x020E0200 902 | IOMUXC_SW_MUX_CTL_PAD_KEY_ROW1 0x020E0204 903 | IOMUXC_SW_MUX_CTL_PAD_KEY_COL2 0x020E0208 904 | IOMUXC_SW_MUX_CTL_PAD_KEY_ROW2 0x020E020C 905 | IOMUXC_SW_MUX_CTL_PAD_KEY_COL3 0x020E0210 906 | IOMUXC_SW_MUX_CTL_PAD_KEY_ROW3 0x020E0214 907 | IOMUXC_SW_MUX_CTL_PAD_KEY_COL4 0x020E0218 908 | IOMUXC_SW_MUX_CTL_PAD_KEY_ROW4 0x020E021C 909 | IOMUXC_SW_MUX_CTL_PAD_GPIO_0 0x020E0220 910 | IOMUXC_SW_MUX_CTL_PAD_GPIO_1 0x020E0224 911 | IOMUXC_SW_MUX_CTL_PAD_GPIO_9 0x020E0228 912 | IOMUXC_SW_MUX_CTL_PAD_GPIO_3 0x020E022C 913 | IOMUXC_SW_MUX_CTL_PAD_GPIO_6 0x020E0230 914 | IOMUXC_SW_MUX_CTL_PAD_GPIO_2 0x020E0234 915 | IOMUXC_SW_MUX_CTL_PAD_GPIO_4 0x020E0238 916 | IOMUXC_SW_MUX_CTL_PAD_GPIO_5 0x020E023C 917 | IOMUXC_SW_MUX_CTL_PAD_GPIO_7 0x020E0240 918 | IOMUXC_SW_MUX_CTL_PAD_GPIO_8 0x020E0244 919 | IOMUXC_SW_MUX_CTL_PAD_GPIO_16 0x020E0248 920 | IOMUXC_SW_MUX_CTL_PAD_GPIO_17 0x020E024C 921 | IOMUXC_SW_MUX_CTL_PAD_GPIO_18 0x020E0250 922 | IOMUXC_SW_MUX_CTL_PAD_GPIO_19 0x020E0254 923 | IOMUXC_SW_MUX_CTL_PAD_CSI0_PIXCLK 0x020E0258 924 | IOMUXC_SW_MUX_CTL_PAD_CSI0_MCLK 0x020E025C 925 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA_EN 0x020E0260 926 | IOMUXC_SW_MUX_CTL_PAD_CSI0_VSYNC 0x020E0264 927 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT4 0x020E0268 928 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT5 0x020E026C 929 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT6 0x020E0270 930 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT7 0x020E0274 931 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT8 0x020E0278 932 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT9 0x020E027C 933 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT10 0x020E0280 934 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT11 0x020E0284 935 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT12 0x020E0288 936 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT13 0x020E028C 937 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT14 0x020E0290 938 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT15 0x020E0294 939 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT16 0x020E0298 940 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT17 0x020E029C 941 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT18 0x020E02A0 942 | IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT19 0x020E02A4 943 | IOMUXC_SW_MUX_CTL_PAD_SD3_DAT7 0x020E02A8 944 | IOMUXC_SW_MUX_CTL_PAD_SD3_DAT6 0x020E02AC 945 | IOMUXC_SW_MUX_CTL_PAD_SD3_DAT5 0x020E02B0 946 | IOMUXC_SW_MUX_CTL_PAD_SD3_DAT4 0x020E02B4 947 | IOMUXC_SW_MUX_CTL_PAD_SD3_CMD 0x020E02B8 948 | IOMUXC_SW_MUX_CTL_PAD_SD3_CLK 0x020E02BC 949 | IOMUXC_SW_MUX_CTL_PAD_SD3_DAT0 0x020E02C0 950 | IOMUXC_SW_MUX_CTL_PAD_SD3_DAT1 0x020E02C4 951 | IOMUXC_SW_MUX_CTL_PAD_SD3_DAT2 0x020E02C8 952 | IOMUXC_SW_MUX_CTL_PAD_SD3_DAT3 0x020E02CC 953 | IOMUXC_SW_MUX_CTL_PAD_SD3_RST 0x020E02D0 954 | IOMUXC_SW_MUX_CTL_PAD_NANDF_CLE 0x020E02D4 955 | IOMUXC_SW_MUX_CTL_PAD_NANDF_ALE 0x020E02D8 956 | IOMUXC_SW_MUX_CTL_PAD_NANDF_WP_B 0x020E02DC 957 | IOMUXC_SW_MUX_CTL_PAD_NANDF_RB0 0x020E02E0 958 | IOMUXC_SW_MUX_CTL_PAD_NANDF_CS0 0x020E02E4 959 | IOMUXC_SW_MUX_CTL_PAD_NANDF_CS1 0x020E02E8 960 | IOMUXC_SW_MUX_CTL_PAD_NANDF_CS2 0x020E02EC 961 | IOMUXC_SW_MUX_CTL_PAD_NANDF_CS3 0x020E02F0 962 | IOMUXC_SW_MUX_CTL_PAD_SD4_CMD 0x020E02F4 963 | IOMUXC_SW_MUX_CTL_PAD_SD4_CLK 0x020E02F8 964 | IOMUXC_SW_MUX_CTL_PAD_NANDF_D0 0x020E02FC 965 | IOMUXC_SW_MUX_CTL_PAD_NANDF_D1 0x020E0300 966 | IOMUXC_SW_MUX_CTL_PAD_NANDF_D2 0x020E0304 967 | IOMUXC_SW_MUX_CTL_PAD_NANDF_D3 0x020E0308 968 | IOMUXC_SW_MUX_CTL_PAD_NANDF_D4 0x020E030C 969 | IOMUXC_SW_MUX_CTL_PAD_NANDF_D5 0x020E0310 970 | IOMUXC_SW_MUX_CTL_PAD_NANDF_D6 0x020E0314 971 | IOMUXC_SW_MUX_CTL_PAD_NANDF_D7 0x020E0318 972 | IOMUXC_SW_MUX_CTL_PAD_SD4_DAT0 0x020E031C 973 | IOMUXC_SW_MUX_CTL_PAD_SD4_DAT1 0x020E0320 974 | IOMUXC_SW_MUX_CTL_PAD_SD4_DAT2 0x020E0324 975 | IOMUXC_SW_MUX_CTL_PAD_SD4_DAT3 0x020E0328 976 | IOMUXC_SW_MUX_CTL_PAD_SD4_DAT4 0x020E032C 977 | IOMUXC_SW_MUX_CTL_PAD_SD4_DAT5 0x020E0330 978 | IOMUXC_SW_MUX_CTL_PAD_SD4_DAT6 0x020E0334 979 | IOMUXC_SW_MUX_CTL_PAD_SD4_DAT7 0x020E0338 980 | IOMUXC_SW_MUX_CTL_PAD_SD1_DAT1 0x020E033C 981 | IOMUXC_SW_MUX_CTL_PAD_SD1_DAT0 0x020E0340 982 | IOMUXC_SW_MUX_CTL_PAD_SD1_DAT3 0x020E0344 983 | IOMUXC_SW_MUX_CTL_PAD_SD1_CMD 0x020E0348 984 | IOMUXC_SW_MUX_CTL_PAD_SD1_DAT2 0x020E034C 985 | IOMUXC_SW_MUX_CTL_PAD_SD1_CLK 0x020E0350 986 | IOMUXC_SW_MUX_CTL_PAD_SD2_CLK 0x020E0354 987 | IOMUXC_SW_MUX_CTL_PAD_SD2_CMD 0x020E0358 988 | IOMUXC_SW_MUX_CTL_PAD_SD2_DAT3 0x020E035C 989 | IOMUXC_SW_PAD_CTL_PAD_SD2_DAT1 0x020E0360 990 | IOMUXC_SW_PAD_CTL_PAD_SD2_DAT2 0x020E0364 991 | IOMUXC_SW_PAD_CTL_PAD_SD2_DAT0 0x020E0368 992 | IOMUXC_SW_PAD_CTL_PAD_RGMII_TXC 0x020E036C 993 | IOMUXC_SW_PAD_CTL_PAD_RGMII_TD0 0x020E0370 994 | IOMUXC_SW_PAD_CTL_PAD_RGMII_TD1 0x020E0374 995 | IOMUXC_SW_PAD_CTL_PAD_RGMII_TD2 0x020E0378 996 | IOMUXC_SW_PAD_CTL_PAD_RGMII_TD3 0x020E037C 997 | IOMUXC_SW_PAD_CTL_PAD_RGMII_RX_CTL 0x020E0380 998 | IOMUXC_SW_PAD_CTL_PAD_RGMII_RD0 0x020E0384 999 | IOMUXC_SW_PAD_CTL_PAD_RGMII_TX_CTL 0x020E0388 1000 | IOMUXC_SW_PAD_CTL_PAD_RGMII_RD1 0x020E038C 1001 | IOMUXC_SW_PAD_CTL_PAD_RGMII_RD2 0x020E0390 1002 | IOMUXC_SW_PAD_CTL_PAD_RGMII_RD3 0x020E0394 1003 | IOMUXC_SW_PAD_CTL_PAD_RGMII_RXC 0x020E0398 1004 | IOMUXC_SW_PAD_CTL_PAD_EIM_A25 0x020E039C 1005 | IOMUXC_SW_PAD_CTL_PAD_EIM_EB2 0x020E03A0 1006 | IOMUXC_SW_PAD_CTL_PAD_EIM_D16 0x020E03A4 1007 | IOMUXC_SW_PAD_CTL_PAD_EIM_D17 0x020E03A8 1008 | IOMUXC_SW_PAD_CTL_PAD_EIM_D18 0x020E03AC 1009 | IOMUXC_SW_PAD_CTL_PAD_EIM_D19 0x020E03B0 1010 | IOMUXC_SW_PAD_CTL_PAD_EIM_D20 0x020E03B4 1011 | IOMUXC_SW_PAD_CTL_PAD_EIM_D21 0x020E03B8 1012 | IOMUXC_SW_PAD_CTL_PAD_EIM_D22 0x020E03BC 1013 | IOMUXC_SW_PAD_CTL_PAD_EIM_D23 0x020E03C0 1014 | IOMUXC_SW_PAD_CTL_PAD_EIM_EB3 0x020E03C4 1015 | IOMUXC_SW_PAD_CTL_PAD_EIM_D24 0x020E03C8 1016 | IOMUXC_SW_PAD_CTL_PAD_EIM_D25 0x020E03CC 1017 | IOMUXC_SW_PAD_CTL_PAD_EIM_D26 0x020E03D0 1018 | IOMUXC_SW_PAD_CTL_PAD_EIM_D27 0x020E03D4 1019 | IOMUXC_SW_PAD_CTL_PAD_EIM_D28 0x020E03D8 1020 | IOMUXC_SW_PAD_CTL_PAD_EIM_D29 0x020E03DC 1021 | IOMUXC_SW_PAD_CTL_PAD_EIM_D30 0x020E03E0 1022 | IOMUXC_SW_PAD_CTL_PAD_EIM_D31 0x020E03E4 1023 | IOMUXC_SW_PAD_CTL_PAD_EIM_A24 0x020E03E8 1024 | IOMUXC_SW_PAD_CTL_PAD_EIM_A23 0x020E03EC 1025 | IOMUXC_SW_PAD_CTL_PAD_EIM_A22 0x020E03F0 1026 | IOMUXC_SW_PAD_CTL_PAD_EIM_A21 0x020E03F4 1027 | IOMUXC_SW_PAD_CTL_PAD_EIM_A20 0x020E03F8 1028 | IOMUXC_SW_PAD_CTL_PAD_EIM_A19 0x020E03FC 1029 | IOMUXC_SW_PAD_CTL_PAD_EIM_A18 0x020E0400 1030 | IOMUXC_SW_PAD_CTL_PAD_EIM_A17 0x020E0404 1031 | IOMUXC_SW_PAD_CTL_PAD_EIM_A16 0x020E0408 1032 | IOMUXC_SW_PAD_CTL_PAD_EIM_CS0 0x020E040C 1033 | IOMUXC_SW_PAD_CTL_PAD_EIM_CS1 0x020E0410 1034 | IOMUXC_SW_PAD_CTL_PAD_EIM_OE 0x020E0414 1035 | IOMUXC_SW_PAD_CTL_PAD_EIM_RW 0x020E0418 1036 | IOMUXC_SW_PAD_CTL_PAD_EIM_LBA 0x020E041C 1037 | IOMUXC_SW_PAD_CTL_PAD_EIM_EB0 0x020E0420 1038 | IOMUXC_SW_PAD_CTL_PAD_EIM_EB1 0x020E0424 1039 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA0 0x020E0428 1040 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA1 0x020E042C 1041 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA2 0x020E0430 1042 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA3 0x020E0434 1043 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA4 0x020E0438 1044 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA5 0x020E043C 1045 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA6 0x020E0440 1046 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA7 0x020E0444 1047 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA8 0x020E0448 1048 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA9 0x020E044C 1049 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA10 0x020E0450 1050 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA11 0x020E0454 1051 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA12 0x020E0458 1052 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA13 0x020E045C 1053 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA14 0x020E0460 1054 | IOMUXC_SW_PAD_CTL_PAD_EIM_DA15 0x020E0464 1055 | IOMUXC_SW_PAD_CTL_PAD_EIM_WAIT 0x020E0468 1056 | IOMUXC_SW_PAD_CTL_PAD_EIM_BCLK 0x020E046C 1057 | IOMUXC_SW_PAD_CTL_PAD_DI0_DISP_CLK 0x020E0470 1058 | IOMUXC_SW_PAD_CTL_PAD_DI0_PIN15 0x020E0474 1059 | IOMUXC_SW_PAD_CTL_PAD_DI0_PIN2 0x020E0478 1060 | IOMUXC_SW_PAD_CTL_PAD_DI0_PIN3 0x020E047C 1061 | IOMUXC_SW_PAD_CTL_PAD_DI0_PIN4 0x020E0480 1062 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT0 0x020E0484 1063 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT1 0x020E0488 1064 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT2 0x020E048C 1065 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT3 0x020E0490 1066 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT4 0x020E0494 1067 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT5 0x020E0498 1068 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT6 0x020E049C 1069 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT7 0x020E04A0 1070 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT8 0x020E04A4 1071 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT9 0x020E04A8 1072 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT10 0x020E04AC 1073 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT11 0x020E04B0 1074 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT12 0x020E04B4 1075 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT13 0x020E04B8 1076 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT14 0x020E04BC 1077 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT15 0x020E04C0 1078 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT16 0x020E04C4 1079 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT17 0x020E04C8 1080 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT18 0x020E04CC 1081 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT19 0x020E04D0 1082 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT20 0x020E04D4 1083 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT21 0x020E04D8 1084 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT22 0x020E04DC 1085 | IOMUXC_SW_PAD_CTL_PAD_DISP0_DAT23 0x020E04E0 1086 | IOMUXC_SW_PAD_CTL_PAD_ENET_MDIO 0x020E04E4 1087 | IOMUXC_SW_PAD_CTL_PAD_ENET_REF_CLK 0x020E04E8 1088 | IOMUXC_SW_PAD_CTL_PAD_ENET_RX_ER 0x020E04EC 1089 | IOMUXC_SW_PAD_CTL_PAD_ENET_CRS_DV 0x020E04F0 1090 | IOMUXC_SW_PAD_CTL_PAD_ENET_RXD1 0x020E04F4 1091 | IOMUXC_SW_PAD_CTL_PAD_ENET_RXD0 0x020E04F8 1092 | IOMUXC_SW_PAD_CTL_PAD_ENET_TX_EN 0x020E04FC 1093 | IOMUXC_SW_PAD_CTL_PAD_ENET_TXD1 0x020E0500 1094 | IOMUXC_SW_PAD_CTL_PAD_ENET_TXD0 0x020E0504 1095 | IOMUXC_SW_PAD_CTL_PAD_ENET_MDC 0x020E0508 1096 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS5 0x020E050C 1097 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM5 0x020E0510 1098 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM4 0x020E0514 1099 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS4 0x020E0518 1100 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3 0x020E051C 1101 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM3 0x020E0520 1102 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2 0x020E0524 1103 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM2 0x020E0528 1104 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A0 0x020E052C 1105 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A1 0x020E0530 1106 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A2 0x020E0534 1107 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A3 0x020E0538 1108 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A4 0x020E053C 1109 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A5 0x020E0540 1110 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A6 0x020E0544 1111 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A7 0x020E0548 1112 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A8 0x020E054C 1113 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A9 0x020E0550 1114 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A10 0x020E0554 1115 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A11 0x020E0558 1116 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A12 0x020E055C 1117 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A13 0x020E0560 1118 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A14 0x020E0564 1119 | IOMUXC_SW_PAD_CTL_PAD_DRAM_A15 0x020E0568 1120 | IOMUXC_SW_PAD_CTL_PAD_DRAM_CAS 0x020E056C 1121 | IOMUXC_SW_PAD_CTL_PAD_DRAM_CS0 0x020E0570 1122 | IOMUXC_SW_PAD_CTL_PAD_DRAM_CS1 0x020E0574 1123 | IOMUXC_SW_PAD_CTL_PAD_DRAM_RAS 0x020E0578 1124 | IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET 0x020E057C 1125 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDBA0 0x020E0580 1126 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDBA1 0x020E0584 1127 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK_0 0x020E0588 1128 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDBA2 0x020E058C 1129 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCKE0 0x020E0590 1130 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK_1 0x020E0594 1131 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCKE1 0x020E0598 1132 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDODT0 0x020E059C 1133 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDODT1 0x020E05A0 1134 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDWE 0x020E05A4 1135 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0 0x020E05A8 1136 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM0 0x020E05AC 1137 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1 0x020E05B0 1138 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM1 0x020E05B4 1139 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS6 0x020E05B8 1140 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM6 0x020E05BC 1141 | IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS7 0x020E05C0 1142 | IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM7 0x020E05C4 1143 | IOMUXC_SW_PAD_CTL_PAD_KEY_COL0 0x020E05C8 1144 | IOMUXC_SW_PAD_CTL_PAD_KEY_ROW0 0x020E05CC 1145 | IOMUXC_SW_PAD_CTL_PAD_KEY_COL1 0x020E05D0 1146 | IOMUXC_SW_PAD_CTL_PAD_KEY_ROW1 0x020E05D4 1147 | IOMUXC_SW_PAD_CTL_PAD_KEY_COL2 0x020E05D8 1148 | IOMUXC_SW_PAD_CTL_PAD_KEY_ROW2 0x020E05DC 1149 | IOMUXC_SW_PAD_CTL_PAD_KEY_COL3 0x020E05E0 1150 | IOMUXC_SW_PAD_CTL_PAD_KEY_ROW3 0x020E05E4 1151 | IOMUXC_SW_PAD_CTL_PAD_KEY_COL4 0x020E05E8 1152 | IOMUXC_SW_PAD_CTL_PAD_KEY_ROW4 0x020E05EC 1153 | IOMUXC_SW_PAD_CTL_PAD_GPIO_0 0x020E05F0 1154 | IOMUXC_SW_PAD_CTL_PAD_GPIO_1 0x020E05F4 1155 | IOMUXC_SW_PAD_CTL_PAD_GPIO_9 0x020E05F8 1156 | IOMUXC_SW_PAD_CTL_PAD_GPIO_3 0x020E05FC 1157 | IOMUXC_SW_PAD_CTL_PAD_GPIO_6 0x020E0600 1158 | IOMUXC_SW_PAD_CTL_PAD_GPIO_2 0x020E0604 1159 | IOMUXC_SW_PAD_CTL_PAD_GPIO_4 0x020E0608 1160 | IOMUXC_SW_PAD_CTL_PAD_GPIO_5 0x020E060C 1161 | IOMUXC_SW_PAD_CTL_PAD_GPIO_7 0x020E0610 1162 | IOMUXC_SW_PAD_CTL_PAD_GPIO_8 0x020E0614 1163 | IOMUXC_SW_PAD_CTL_PAD_GPIO_16 0x020E0618 1164 | IOMUXC_SW_PAD_CTL_PAD_GPIO_17 0x020E061C 1165 | IOMUXC_SW_PAD_CTL_PAD_GPIO_18 0x020E0620 1166 | :iomux_pad/ 1167 | IOMUXC_SW_PAD_CTL_PAD_GPIO_19 0x020E0624 1168 | :iomux_pad/ 1169 | IOMUXC_SW_PAD_CTL_PAD_CSI0_PIXCLK 0x020E0628 1170 | IOMUXC_SW_PAD_CTL_PAD_CSI0_MCLK 0x020E062C 1171 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DATA_EN 0x020E0630 1172 | IOMUXC_SW_PAD_CTL_PAD_CSI0_VSYNC 0x020E0634 1173 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT4 0x020E0638 1174 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT5 0x020E063C 1175 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT6 0x020E0640 1176 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT7 0x020E0644 1177 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT8 0x020E0648 1178 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT9 0x020E064C 1179 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT10 0x020E0650 1180 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT11 0x020E0654 1181 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT12 0x020E0658 1182 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT13 0x020E065C 1183 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT14 0x020E0660 1184 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT15 0x020E0664 1185 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT16 0x020E0668 1186 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT17 0x020E066C 1187 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT18 0x020E0670 1188 | IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT19 0x020E0674 1189 | IOMUXC_SW_PAD_CTL_PAD_JTAG_TMS 0x020E0678 1190 | IOMUXC_SW_PAD_CTL_PAD_JTAG_MOD 0x020E067C 1191 | IOMUXC_SW_PAD_CTL_PAD_JTAG_TRSTB 0x020E0680 1192 | IOMUXC_SW_PAD_CTL_PAD_JTAG_TDI 0x020E0684 1193 | IOMUXC_SW_PAD_CTL_PAD_JTAG_TCK 0x020E0688 1194 | IOMUXC_SW_PAD_CTL_PAD_JTAG_TDO 0x020E068C 1195 | IOMUXC_SW_PAD_CTL_PAD_SD3_DAT7 0x020E0690 1196 | IOMUXC_SW_PAD_CTL_PAD_SD3_DAT6 0x020E0694 1197 | IOMUXC_SW_PAD_CTL_PAD_SD3_DAT5 0x020E0698 1198 | IOMUXC_SW_PAD_CTL_PAD_SD3_DAT4 0x020E069C 1199 | IOMUXC_SW_PAD_CTL_PAD_SD3_CMD 0x020E06A0 1200 | IOMUXC_SW_PAD_CTL_PAD_SD3_CLK 0x020E06A4 1201 | IOMUXC_SW_PAD_CTL_PAD_SD3_DAT0 0x020E06A8 1202 | IOMUXC_SW_PAD_CTL_PAD_SD3_DAT1 0x020E06AC 1203 | IOMUXC_SW_PAD_CTL_PAD_SD3_DAT2 0x020E06B0 1204 | IOMUXC_SW_PAD_CTL_PAD_SD3_DAT3 0x020E06B4 1205 | IOMUXC_SW_PAD_CTL_PAD_SD3_RST 0x020E06B8 1206 | IOMUXC_SW_PAD_CTL_PAD_NANDF_CLE 0x020E06BC 1207 | IOMUXC_SW_PAD_CTL_PAD_NANDF_ALE 0x020E06C0 1208 | IOMUXC_SW_PAD_CTL_PAD_NANDF_WP_B 0x020E06C4 1209 | IOMUXC_SW_PAD_CTL_PAD_NANDF_RB0 0x020E06C8 1210 | IOMUXC_SW_PAD_CTL_PAD_NANDF_CS0 0x020E06CC 1211 | IOMUXC_SW_PAD_CTL_PAD_NANDF_CS1 0x020E06D0 1212 | IOMUXC_SW_PAD_CTL_PAD_NANDF_CS2 0x020E06D4 1213 | IOMUXC_SW_PAD_CTL_PAD_NANDF_CS3 0x020E06D8 1214 | IOMUXC_SW_PAD_CTL_PAD_SD4_CMD 0x020E06DC 1215 | IOMUXC_SW_PAD_CTL_PAD_SD4_CLK 0x020E06E0 1216 | IOMUXC_SW_PAD_CTL_PAD_NANDF_D0 0x020E06E4 1217 | IOMUXC_SW_PAD_CTL_PAD_NANDF_D1 0x020E06E8 1218 | :iomux_pad/ 1219 | IOMUXC_SW_PAD_CTL_PAD_NANDF_D2 0x020E06EC 1220 | :iomux_pad/ 1221 | IOMUXC_SW_PAD_CTL_PAD_NANDF_D3 0x020E06F0 1222 | :iomux_pad/ 1223 | IOMUXC_SW_PAD_CTL_PAD_NANDF_D4 0x020E06F4 1224 | :iomux_pad/ 1225 | IOMUXC_SW_PAD_CTL_PAD_NANDF_D5 0x020E06F8 1226 | IOMUXC_SW_PAD_CTL_PAD_NANDF_D6 0x020E06FC 1227 | IOMUXC_SW_PAD_CTL_PAD_NANDF_D7 0x020E0700 1228 | IOMUXC_SW_PAD_CTL_PAD_SD4_DAT0 0x020E0704 1229 | IOMUXC_SW_PAD_CTL_PAD_SD4_DAT1 0x020E0708 1230 | IOMUXC_SW_PAD_CTL_PAD_SD4_DAT2 0x020E070C 1231 | IOMUXC_SW_PAD_CTL_PAD_SD4_DAT3 0x020E0710 1232 | IOMUXC_SW_PAD_CTL_PAD_SD4_DAT4 0x020E0714 1233 | IOMUXC_SW_PAD_CTL_PAD_SD4_DAT5 0x020E0718 1234 | IOMUXC_SW_PAD_CTL_PAD_SD4_DAT6 0x020E071C 1235 | IOMUXC_SW_PAD_CTL_PAD_SD4_DAT7 0x020E0720 1236 | IOMUXC_SW_PAD_CTL_PAD_SD1_DAT1 0x020E0724 1237 | IOMUXC_SW_PAD_CTL_PAD_SD1_DAT0 0x020E0728 1238 | IOMUXC_SW_PAD_CTL_PAD_SD1_DAT3 0x020E072C 1239 | IOMUXC_SW_PAD_CTL_PAD_SD1_CMD 0x020E0730 1240 | IOMUXC_SW_PAD_CTL_PAD_SD1_DAT2 0x020E0734 1241 | IOMUXC_SW_PAD_CTL_PAD_SD1_CLK 0x020E0738 1242 | IOMUXC_SW_PAD_CTL_PAD_SD2_CLK 0x020E073C 1243 | IOMUXC_SW_PAD_CTL_PAD_SD2_CMD 0x020E0740 1244 | IOMUXC_SW_PAD_CTL_PAD_SD2_DAT3 0x020E0744 1245 | IOMUXC_SW_PAD_CTL_GRP_B7DS 0x020E0748 1246 | IOMUXC_SW_PAD_CTL_GRP_ADDDS 0x020E074C 1247 | IOMUXC_SW_PAD_CTL_GRP_DDRMODE_CTL 0x020E0750 1248 | IOMUXC_SW_PAD_CTL_GRP_TERM_CTL0 0x020E0754 1249 | IOMUXC_SW_PAD_CTL_GRP_DDRPKE 0x020E0758 1250 | IOMUXC_SW_PAD_CTL_GRP_TERM_CTL1 0x020E075C 1251 | IOMUXC_SW_PAD_CTL_GRP_TERM_CTL2 0x020E0760 1252 | IOMUXC_SW_PAD_CTL_GRP_TERM_CTL3 0x020E0764 1253 | IOMUXC_SW_PAD_CTL_GRP_DDRPK 0x020E0768 1254 | IOMUXC_SW_PAD_CTL_GRP_TERM_CTL4 0x020E076C 1255 | IOMUXC_SW_PAD_CTL_GRP_DDRHYS 0x020E0770 1256 | IOMUXC_SW_PAD_CTL_GRP_DDRMODE 0x020E0774 1257 | IOMUXC_SW_PAD_CTL_GRP_TERM_CTL5 0x020E0778 1258 | IOMUXC_SW_PAD_CTL_GRP_TERM_CTL6 0x020E077C 1259 | IOMUXC_SW_PAD_CTL_GRP_TERM_CTL7 0x020E0780 1260 | IOMUXC_SW_PAD_CTL_GRP_B0DS 0x020E0784 1261 | IOMUXC_SW_PAD_CTL_GRP_B1DS 0x020E0788 1262 | IOMUXC_SW_PAD_CTL_GRP_CTLDS 0x020E078C 1263 | IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII 0x020E0790 1264 | IOMUXC_SW_PAD_CTL_GRP_B2DS 0x020E0794 1265 | IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE 0x020E0798 1266 | IOMUXC_SW_PAD_CTL_GRP_B3DS 0x020E079C 1267 | IOMUXC_SW_PAD_CTL_GRP_B4DS 0x020E07A0 1268 | IOMUXC_SW_PAD_CTL_GRP_B5DS 0x020E07A4 1269 | IOMUXC_SW_PAD_CTL_GRP_B6DS 0x020E07A8 1270 | IOMUXC_SW_PAD_CTL_GRP_RGMII_TERM 0x020E07AC 1271 | IOMUXC_ASRC_ASRCK_CLOCK_6_SELECT_INPUT 0x020E07B0 1272 | IOMUXC_AUDMUX_P4_INPUT_DA_AMX_SELECT_INPUT 0x020E07B4 1273 | IOMUXC_AUDMUX_P4_INPUT_DB_AMX_SELECT_INPUT 0x020E07B8 1274 | IOMUXC_AUDMUX_P4_INPUT_RXCLK_AMX_SELECT_INPUT 0x020E07BC 1275 | IOMUXC_AUDMUX_P4_INPUT_RXFS_AMX_SELECT_INPUT 0x020E07C0 1276 | IOMUXC_AUDMUX_P4_INPUT_TXCLK_AMX_SELECT_INPUT 0x020E07C4 1277 | IOMUXC_AUDMUX_P4_INPUT_TXFS_AMX_SELECT_INPUT 0x020E07C8 1278 | IOMUXC_AUDMUX_P5_INPUT_DA_AMX_SELECT_INPUT 0x020E07CC 1279 | IOMUXC_AUDMUX_P5_INPUT_DB_AMX_SELECT_INPUT 0x020E07D0 1280 | IOMUXC_AUDMUX_P5_INPUT_RXCLK_AMX_SELECT_INPUT 0x020E07D4 1281 | IOMUXC_AUDMUX_P5_INPUT_RXFS_AMX_SELECT_INPUT 0x020E07D8 1282 | IOMUXC_AUDMUX_P5_INPUT_TXCLK_AMX_SELECT_INPUT 0x020E07DC 1283 | IOMUXC_AUDMUX_P5_INPUT_TXFS_AMX_SELECT_INPUT 0x020E07E0 1284 | IOMUXC_CAN1_IPP_IND_CANRX_SELECT_INPUT 0x020E07E4 1285 | IOMUXC_CAN2_IPP_IND_CANRX_SELECT_INPUT 0x020E07E8 1286 | IOMUXC_CCM_IPP_DI1_CLK_SELECT_INPUT 0x020E07EC 1287 | IOMUXC_CCM_PMIC_VFUNCIONAL_READY_SELECT_INPUT 0x020E07F0 1288 | IOMUXC_ECSPI1_IPP_CSPI_CLK_IN_SELECT_INPUT 0x020E07F4 1289 | IOMUXC_ECSPI1_IPP_IND_MISO_SELECT_INPUT 0x020E07F8 1290 | IOMUXC_ECSPI1_IPP_IND_MOSI_SELECT_INPUT 0x020E07FC 1291 | IOMUXC_ECSPI1_IPP_IND_SS_B_0_SELECT_INPUT 0x020E0800 1292 | IOMUXC_ECSPI1_IPP_IND_SS_B_1_SELECT_INPUT 0x020E0804 1293 | IOMUXC_ECSPI1_IPP_IND_SS_B_2_SELECT_INPUT 0x020E0808 1294 | IOMUXC_ECSPI1_IPP_IND_SS_B_3_SELECT_INPUT 0x020E080C 1295 | IOMUXC_ECSPI2_IPP_CSPI_CLK_IN_SELECT_INPUT 0x020E0810 1296 | IOMUXC_ECSPI2_IPP_IND_MISO_SELECT_INPUT 0x020E0814 1297 | IOMUXC_ECSPI2_IPP_IND_MOSI_SELECT_INPUT 0x020E0818 1298 | IOMUXC_ECSPI2_IPP_IND_SS_B_0_SELECT_INPUT 0x020E081C 1299 | IOMUXC_ECSPI2_IPP_IND_SS_B_1_SELECT_INPUT 0x020E0820 1300 | IOMUXC_ECSPI4_IPP_IND_SS_B_0_SELECT_INPUT 0x020E0824 1301 | IOMUXC_ECSPI5_IPP_CSPI_CLK_IN_SELECT_INPUT 0x020E0828 1302 | IOMUXC_ECSPI5_IPP_IND_MISO_SELECT_INPUT 0x020E082C 1303 | IOMUXC_ECSPI5_IPP_IND_MOSI_SELECT_INPUT 0x020E0830 1304 | IOMUXC_ECSPI5_IPP_IND_SS_B_0_SELECT_INPUT 0x020E0834 1305 | IOMUXC_ECSPI5_IPP_IND_SS_B_1_SELECT_INPUT 0x020E0838 1306 | IOMUXC_ENET_IPG_CLK_RMII_SELECT_INPUT 0x020E083C 1307 | IOMUXC_ENET_IPP_IND_MAC0_MDIO_SELECT_INPUT 0x020E0840 1308 | IOMUXC_ENET_IPP_IND_MAC0_RXCLK_SELECT_INPUT 0x020E0844 1309 | IOMUXC_ENET_IPP_IND_MAC0_RXDATA_0_SELECT_INPUT 0x020E0848 1310 | IOMUXC_ENET_IPP_IND_MAC0_RXDATA_1_SELECT_INPUT 0x020E084C 1311 | IOMUXC_ENET_IPP_IND_MAC0_RXDATA_2_SELECT_INPUT 0x020E0850 1312 | IOMUXC_ENET_IPP_IND_MAC0_RXDATA_3_SELECT_INPUT 0x020E0854 1313 | IOMUXC_ENET_IPP_IND_MAC0_RXEN_SELECT_INPUT 0x020E0858 1314 | IOMUXC_ESAI1_IPP_IND_FSR_SELECT_INPUT 0x020E085C 1315 | IOMUXC_ESAI1_IPP_IND_FST_SELECT_INPUT 0x020E0860 1316 | IOMUXC_ESAI1_IPP_IND_HCKR_SELECT_INPUT 0x020E0864 1317 | IOMUXC_ESAI1_IPP_IND_HCKT_SELECT_INPUT 0x020E0868 1318 | IOMUXC_ESAI1_IPP_IND_SCKR_SELECT_INPUT 0x020E086C 1319 | IOMUXC_ESAI1_IPP_IND_SCKT_SELECT_INPUT 0x020E0870 1320 | IOMUXC_ESAI1_IPP_IND_SDO0_SELECT_INPUT 0x020E0874 1321 | IOMUXC_ESAI1_IPP_IND_SDO1_SELECT_INPUT 0x020E0878 1322 | IOMUXC_ESAI1_IPP_IND_SDO2_SDI3_SELECT_INPUT 0x020E087C 1323 | IOMUXC_ESAI1_IPP_IND_SDO3_SDI2_SELECT_INPUT 0x020E0880 1324 | IOMUXC_ESAI1_IPP_IND_SDO4_SDI1_SELECT_INPUT 0x020E0884 1325 | IOMUXC_ESAI1_IPP_IND_SDO5_SDI0_SELECT_INPUT 0x020E0888 1326 | IOMUXC_HDMI_TX_ICECIN_SELECT_INPUT 0x020E088C 1327 | IOMUXC_HDMI_TX_II2C_MSTH13TDDC_SCLIN_SELECT_INPUT 0x020E0890 1328 | IOMUXC_HDMI_TX_II2C_MSTH13TDDC_SDAIN_SELECT_INPUT 0x020E0894 1329 | IOMUXC_I2C1_IPP_SCL_IN_SELECT_INPUT 0x020E0898 1330 | IOMUXC_I2C1_IPP_SDA_IN_SELECT_INPUT 0x020E089C 1331 | IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT 0x020E08A0 1332 | IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT 0x020E08A4 1333 | IOMUXC_I2C3_IPP_SCL_IN_SELECT_INPUT 0x020E08A8 1334 | IOMUXC_I2C3_IPP_SDA_IN_SELECT_INPUT 0x020E08AC 1335 | IOMUXC_IPU2_IPP_IND_SENS1_DATA_10_SELECT_INPUT 0x020E08B0 1336 | IOMUXC_IPU2_IPP_IND_SENS1_DATA_11_SELECT_INPUT 0x020E08B4 1337 | IOMUXC_IPU2_IPP_IND_SENS1_DATA_12_SELECT_INPUT 0x020E08B8 1338 | IOMUXC_IPU2_IPP_IND_SENS1_DATA_13_SELECT_INPUT 0x020E08BC 1339 | IOMUXC_IPU2_IPP_IND_SENS1_DATA_14_SELECT_INPUT 0x020E08C0 1340 | IOMUXC_IPU2_IPP_IND_SENS1_DATA_15_SELECT_INPUT 0x020E08C4 1341 | IOMUXC_IPU2_IPP_IND_SENS1_DATA_16_SELECT_INPUT 0x020E08C8 1342 | IOMUXC_IPU2_IPP_IND_SENS1_DATA_17_SELECT_INPUT 0x020E08CC 1343 | IOMUXC_IPU2_IPP_IND_SENS1_DATA_18_SELECT_INPUT 0x020E08D0 1344 | IOMUXC_IPU2_IPP_IND_SENS1_DATA_19_SELECT_INPUT 0x020E08D4 1345 | IOMUXC_IPU2_IPP_IND_SENS1_DATA_EN_SELECT_INPUT 0x020E08D8 1346 | IOMUXC_IPU2_IPP_IND_SENS1_HSYNC_SELECT_INPUT 0x020E08DC 1347 | IOMUXC_IPU2_IPP_IND_SENS1_PIX_CLK_SELECT_INPUT 0x020E08E0 1348 | IOMUXC_IPU2_IPP_IND_SENS1_VSYNC_SELECT_INPUT 0x020E08E4 1349 | IOMUXC_KPP_IPP_IND_COL_5_SELECT_INPUT 0x020E08E8 1350 | IOMUXC_KPP_IPP_IND_COL_6_SELECT_INPUT 0x020E08EC 1351 | IOMUXC_KPP_IPP_IND_COL_7_SELECT_INPUT 0x020E08F0 1352 | IOMUXC_KPP_IPP_IND_ROW_5_SELECT_INPUT 0x020E08F4 1353 | IOMUXC_KPP_IPP_IND_ROW_6_SELECT_INPUT 0x020E08F8 1354 | IOMUXC_KPP_IPP_IND_ROW_7_SELECT_INPUT 0x020E08FC 1355 | IOMUXC_MLB_MLB_CLK_IN_SELECT_INPUT 0x020E0900 1356 | IOMUXC_MLB_MLB_DATA_IN_SELECT_INPUT 0x020E0904 1357 | IOMUXC_MLB_MLB_SIG_IN_SELECT_INPUT 0x020E0908 1358 | IOMUXC_SDMA_EVENTS_14_SELECT_INPUT 0x020E090C 1359 | IOMUXC_SDMA_EVENTS_15_SELECT_INPUT 0x020E0910 1360 | IOMUXC_SPDIF_SPDIF_IN1_SELECT_INPUT 0x020E0914 1361 | IOMUXC_SPDIF_TX_CLK2_SELECT_INPUT 0x020E0918 1362 | IOMUXC_UART1_IPP_UART_RTS_B_SELECT_INPUT 0x020E091C 1363 | IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT 0x020E0920 1364 | IOMUXC_UART2_IPP_UART_RTS_B_SELECT_INPUT 0x020E0924 1365 | IOMUXC_UART2_IPP_UART_RXD_MUX_SELECT_INPUT 0x020E0928 1366 | IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT 0x020E092C 1367 | IOMUXC_UART3_IPP_UART_RXD_MUX_SELECT_INPUT 0x020E0930 1368 | IOMUXC_UART4_IPP_UART_RTS_B_SELECT_INPUT 0x020E0934 1369 | IOMUXC_UART4_IPP_UART_RXD_MUX_SELECT_INPUT 0x020E0938 1370 | IOMUXC_UART5_IPP_UART_RTS_B_SELECT_INPUT 0x020E093C 1371 | IOMUXC_UART5_IPP_UART_RXD_MUX_SELECT_INPUT 0x020E0940 1372 | IOMUXC_USBOH3_IPP_IND_OTG_OC_SELECT_INPUT 0x020E0944 1373 | IOMUXC_USBOH3_IPP_IND_UH1_OC_SELECT_INPUT 0x020E0948 1374 | IOMUXC_USDHC1_IPP_WP_ON_SELECT_INPUT 0x020E094C 1375 | DCIC_DCICC 0x020E4000 1376 | DCIC_DCICIC 0x020E4004 1377 | DCIC_DCICS 0x020E4008 1378 | DCIC_DCICRC 0x020E4010 1379 | DCIC_DCICRS 0x020E4014 1380 | DCIC_DCICRRS 0x020E4018 1381 | DCIC_DCICRCS 0x020E401C 1382 | SDMAARM_MC0PTR 0x020EC000 1383 | SDMAARM_INTR 0x020EC004 1384 | SDMAARM_STOP_STAT 0x020EC008 1385 | SDMAARM_HSTART 0x020EC00C 1386 | SDMAARM_EVTOVR 0x020EC010 1387 | SDMAARM_DSPOVR 0x020EC014 1388 | SDMAARM_HOSTOVR 0x020EC018 1389 | SDMAARM_EVTPEND 0x020EC01C 1390 | SDMAARM_RESET 0x020EC024 1391 | SDMAARM_EVTERR 0x020EC028 1392 | SDMAARM_INTRMASK 0x020EC02C 1393 | SDMAARM_PSW 0x020EC030 1394 | SDMAARM_EVTERRDBG 0x020EC034 1395 | SDMAARM_CONFIG 0x020EC038 1396 | SDMAARM_SDMA_LOCK 0x020EC03C 1397 | SDMAARM_ONCE_ENB 0x020EC040 1398 | SDMAARM_ONCE_DATA 0x020EC044 1399 | SDMAARM_ONCE_INSTR 0x020EC048 1400 | SDMAARM_ONCE_STAT 0x020EC04C 1401 | SDMAARM_ONCE_CMD 0x020EC050 1402 | SDMAARM_ILLINSTADDR 0x020EC058 1403 | SDMAARM_CHN0ADDR 0x020EC05C 1404 | SDMAARM_EVT_MIRROR 0x020EC060 1405 | SDMAARM_EVT_MIRROR2 0x020EC064 1406 | SDMAARM_XTRIG_CONF1 0x020EC070 1407 | SDMAARM_XTRIG_CONF2 0x020EC074 1408 | USBC_UOG_HWDEVICE 0x0218400C 1409 | USBC_UOG_DCIVERSION 0x02184120 1410 | USBC_UOG_DCCPARAMS 0x02184124 1411 | USBC_UOG_DEVICEADDR 0x02184154 1412 | USBC_UOG_ENDPTLISTADDR 0x02184158 1413 | USBC_UOG_ENDPTNAK 0x02184178 1414 | USBC_UOG_ENDPTNAKEN 0x0218417C 1415 | USBC_UOG_OTGSC 0x021841A4 1416 | USBC_UOG_ENDPTSETUPSTAT 0x021841AC 1417 | USBC_UOG_ENDPTPRIME 0x021841B0 1418 | USBC_UOG_ENDPTFLUSH 0x021841B4 1419 | USBC_UOG_ENDPTSTAT 0x021841B8 1420 | USBC_UOG_ENDPTCOMPLETE 0x021841BC 1421 | USBC_UOG_ENDPTCTRL0 0x021841C0 1422 | USBNC_USB_OTG_CTRL 0x02184800 1423 | USBNC_USB_UH1_CTRL 0x02184804 1424 | USBNC_USB_UH2_CTRL 0x02184808 1425 | USBNC_USB_UH3_CTRL 0x0218480C 1426 | USBNC_USB_UH2_HSIC_CTRL 0x02184810 1427 | USBNC_USB_UH3_HSIC_CTRL 0x02184814 1428 | USBNC_USB_OTG_PHY_CTRL_0 0x02184818 1429 | USBNC_USB_UH1_PHY_CTRL_0 0x0218481C 1430 | USBNC_USB_UH2_HSIC_DLL_CFG1 0x02184820 1431 | USBNC_USB_UH2_HSIC_DLL_CFG2 0x02184824 1432 | USBNC_USB_UH2_HSIC_DLL_CFG3 0x02184828 1433 | USBNC_USB_UH3_HSIC_DLL_CFG1 0x02184830 1434 | USBNC_USB_UH3_HSIC_DLL_CFG2 0x02184834 1435 | USBNC_USB_UH3_HSIC_DLL_CFG3 0x02184838 1436 | ENET_EIR 0x02188004 1437 | :BABR:30 1438 | :BABT:29 1439 | :GRA:28 1440 | :TXF:27 1441 | :TXB:26 1442 | :RXF:25 1443 | :RXB:24 1444 | :MII:23 1445 | :EBERR:22 1446 | :LC:21 1447 | :RL:20 1448 | :UN:19 1449 | :PLR:18 1450 | :WAKEUP:17 1451 | :TS_AVAIL:16 1452 | :TS_TIMER:15 1453 | ENET_EIMR 0x02188008 1454 | :BABR:30 1455 | :BABT:29 1456 | :GRA:28 1457 | :TXF:27 1458 | :TXB:26 1459 | :RXF:25 1460 | :RXB:24 1461 | :MII:23 1462 | :EBERR:22 1463 | :LC:21 1464 | :RL:20 1465 | :UN:19 1466 | :PLR:18 1467 | :WAKEUP:17 1468 | :TS_AVAIL:16 1469 | :TS_TIMER:15 1470 | ENET_RDAR 0x02188010 1471 | :RDAR:24 1472 | ENET_TDAR 0x02188014 1473 | :TDAR:24 1474 | ENET_ECR 0x02188024 1475 | :DBSWP:8 1476 | :STOPEN:7 1477 | :DBGEN:6 1478 | :SPEED:5 1479 | :EN1588:4 1480 | :SLEEP:3 1481 | :MAGICEN:2 1482 | :ETHEREN:1 1483 | :RESET:0 1484 | ENET_MMFR 0x02188040 1485 | :ST:31-30 1486 | :OP:29-28 1487 | :PA:27-23 1488 | :RA:22-18 1489 | :TA:17-16 1490 | :DATA:15-0 1491 | ENET_MSCR 0x02188044 1492 | :HOLDTIME:10-8 1493 | :DIS_PRE:7 1494 | :MII_SPEED:6-1 1495 | ENET_MIBC 0x02188064 1496 | :DIS:31 1497 | :IDLE:30 1498 | :CLEAR:29 1499 | ENET_RCR 0x02188084 1500 | :GRS:31 1501 | :NLC:30 1502 | :MAX_FL:29-16 1503 | :CFEN:15 1504 | :CRCFWD:14 1505 | :PAUFWD:13 1506 | :PADEN:12 1507 | :RMII_10T:9 1508 | :RMII_MODE:8 1509 | :RGMII_EN:6 1510 | :FCE:5 1511 | :BC_REJ:4 1512 | :PROM:3 1513 | :MII_MODE:2 1514 | :DRT:1 1515 | :LOOP:0 1516 | ENET_TCR 0x021880C4 1517 | :CRCFWD:9 1518 | :ADDINS:8 1519 | :ADDSEL:7-5 1520 | :RFC_PAUSE:4 1521 | :TFC_PAUSE:3 1522 | :FDEN:2 1523 | :GTS:0 1524 | ENET_PALR 0x021880E4 1525 | ENET_PAUR 0x021880E8 1526 | :PADDR2:31-16 1527 | :TYPE:15-0 1528 | ENET_OPD 0x021880EC 1529 | :OPCODE:31-16 1530 | :PAUSE_DUR:15-0 1531 | ENET_IAUR 0x02188118 1532 | ENET_IALR 0x0218811C 1533 | ENET_GAUR 0x02188120 1534 | ENET_GALR 0x02188124 1535 | ENET_TFWR 0x02188144 1536 | :STRFWD:8 1537 | :TFWR:5-0 1538 | ENET_RDSR 0x02188180 1539 | :R_DES_START:31-3 1540 | ENET_TDSR 0x02188184 1541 | :X_DES_START:31-3 1542 | ENET_MRBR 0x02188188 1543 | :R_BUF_SIZE:13-4 1544 | ENET_RSFL 0x02188190 1545 | :RX_SECTION_FULL:8-0 1546 | ENET_RSEM 0x02188194 1547 | :RX_SECTION_EMPTY:8-0 1548 | ENET_RAEM 0x02188198 1549 | :RX_ALMOST_EMPTY:8-0 1550 | ENET_RAFL 0x0218819C 1551 | :RX_ALMOST_FULL:8-0 1552 | ENET_TSEM 0x021881A0 1553 | :TX_SECTION_EMPTY:8-0 1554 | ENET_TAEM 0x021881A4 1555 | :TX_ALMOST_EMPTY:8-0 1556 | ENET_TAFL 0x021881A8 1557 | :TX_ALMOST_FULL:8-0 1558 | ENET_TIPG 0x021881AC 1559 | :IPG:4-0 1560 | ENET_FTRL 0x021881B0 1561 | :TRUNC_FL:13-0 1562 | ENET_TACC 0x021881C0 1563 | :PROCHK:4 1564 | :IPCHK:3 1565 | :SHIFT16:0 1566 | ENET_RACC 0x021881C4 1567 | :SHIFT16:7 1568 | :LINEDIS:6 1569 | :PRODIS:2 1570 | :IPDIS:1 1571 | :PADREM:0 1572 | ENET_ATCR 0x02188400 1573 | :SLAVE:13 1574 | :CAPTURE:11 1575 | :RESTART:9 1576 | :PINPER:7 1577 | :PEREN:4 1578 | :OFFRST:3 1579 | :OFFEN:2 1580 | :EN:0 1581 | ENET_ATVR 0x02188404 1582 | ENET_ATOFF 0x02188408 1583 | ENET_ATPER 0x0218840C 1584 | ENET_ATCOR 0x02188410 1585 | :COR:30-0 1586 | ENET_ATINC 0x02188414 1587 | :INC_CORR:14-8 1588 | :INC:6-0 1589 | ENET_ATSTMP 0x02188418 1590 | ENET_TGSR 0x02188604 1591 | :TF3:3 1592 | :TF2:2 1593 | :TF1:1 1594 | :TF0:0 1595 | ENET_TCSR0 0x02188608 1596 | :TF:7 1597 | :TIE:6 1598 | :TMODE:5-2 1599 | :TDRE:0 1600 | ENET_TCCR0 0x0218860C 1601 | ENET_TCSR1 0x02188610 1602 | :TF:7 1603 | :TIE:6 1604 | :TMODE:5-2 1605 | :TDRE:0 1606 | ENET_TCCR1 0x02188614 1607 | ENET_TCSR2 0x02188618 1608 | :TF:7 1609 | :TIE:6 1610 | :TMODE:5-2 1611 | :TDRE:0 1612 | ENET_TCCR2 0x0218861C 1613 | ENET_TCSR3 0x02188620 1614 | :TF:7 1615 | :TIE:6 1616 | :TMODE:5-2 1617 | :TDRE:0 1618 | ENET_TCCR3 0x02188624 1619 | ENET_RMON_T_DROP 0x02188200 1620 | ENET_RMON_T_PACKETS 0x02188204 1621 | ENET_RMON_T_BC_PKT 0x02188208 1622 | ENET_RMON_T_MC_PKT 0x0218820C 1623 | ENET_RMON_T_CRC_ALIGN 0x02188210 1624 | ENET_RMON_T_UNDERSIZE 0x02188214 1625 | ENET_RMON_T_OVERSIZE 0x02188218 1626 | ENET_RMON_T_FRAG 0x0218821C 1627 | ENET_RMON_T_JAB 0x02188220 1628 | ENET_RMON_T_COL 0x02188224 1629 | ENET_RMON_T_P64 0x02188228 1630 | ENET_RMON_T_P65TO127n 0x0218822C 1631 | ENET_RMON_T_P128TO255n 0x02188230 1632 | ENET_RMON_T_P256TO511 0x02188234 1633 | ENET_RMON_T_P512TO1023 0x02188238 1634 | ENET_RMON_T_P1024TO2047 0x0218823C 1635 | ENET_RMON_T_P_GTE2048 0x02188240 1636 | ENET_RMON_T_OCTETS 0x02188244 1637 | ENET_IEEE_T_DROP 0x02188248 1638 | ENET_IEEE_T_FRAME_OK 0x0218824C 1639 | ENET_IEEE_T_1COL 0x02188250 1640 | ENET_IEEE_T_MCOL 0x02188254 1641 | ENET_IEEE_T_DEF 0x02188258 1642 | ENET_IEEE_T_LCOL 0x0218825C 1643 | ENET_IEEE_T_EXCOL 0x02188260 1644 | ENET_IEEE_T_MACERR 0x02188264 1645 | ENET_IEEE_T_CSERR 0x02188268 1646 | ENET_IEEE_T_SQE 0x0218826C 1647 | ENET_IEEE_T_FDXFC 0x02188270 1648 | ENET_IEEE_T_OCTETS_OK 0x02188274 1649 | ENET_RMON_R_PACKETS 0x02188284 1650 | ENET_RMON_R_BC_PKT 0x02188288 1651 | ENET_RMON_R_MC_PKT 0x0218828C 1652 | ENET_RMON_R_CRC_ALIGN 0x02188290 1653 | ENET_RMON_R_UNDERSIZE 0x02188294 1654 | ENET_RMON_R_OVERSIZE 0x02188298 1655 | ENET_RMON_R_FRAG 0x0218829C 1656 | ENET_RMON_R_JAB 0x021882A0 1657 | ENET_RMON_R_RESVD_0 0x021882A4 1658 | ENET_RMON_R_P64 0x021882A8 1659 | ENET_RMON_R_P65TO127 0x021882AC 1660 | ENET_RMON_R_P128TO255 0x021882B0 1661 | ENET_RMON_R_P256TO511 0x021882B4 1662 | ENET_RMON_R_P512TO1023 0x021882B8 1663 | ENET_RMON_R_P1024TO2047 0x021882BC 1664 | ENET_RMON_R_P_GTE2048 0x021882C0 1665 | ENET_RMON_R_OCTETS 0x021882C4 1666 | ENET_IEEE_R_DROP 0x021882C8 1667 | ENET_IEEE_R_FRAME_OK 0x021882CC 1668 | ENET_IEEE_R_CRC 0x021882D0 1669 | ENET_IEEE_R_ALIGN 0x021882D4 1670 | ENET_IEEE_R_MACERR 0x021882D8 1671 | ENET_IEEE_R_FDXFC 0x021882DC 1672 | ENET_IEEE_R_OCTETS_OK 0x021882E0 1673 | MLB150_MLBC0 0x0218C000 1674 | MLB150_MLBPC0 0x0218C008 1675 | MLB150_MS0 0x0218C00C 1676 | MLB150_MS1 0x0218C014 1677 | MLB150_MSS 0x0218C020 1678 | MLB150_MSD 0x0218C024 1679 | MLB150_MIEN 0x0218C02C 1680 | MLB150_MLBPC2 0x0218C034 1681 | MLB150_MLBPC1 0x0218C038 1682 | MLB150_MLBC1 0x0218C03C 1683 | MLB150_HCTL 0x0218C080 1684 | MLB150_HCMR0 0x0218C088 1685 | MLB150_HCMR1 0x0218C08C 1686 | MLB150_HCER0 0x0218C090 1687 | MLB150_HCER1 0x0218C094 1688 | MLB150_HCBR0 0x0218C098 1689 | MLB150_HCBR1 0x0218C09C 1690 | MLB150_MDAT0 0x0218C0C0 1691 | MLB150_MDAT1 0x0218C0C4 1692 | MLB150_MDAT2 0x0218C0C8 1693 | MLB150_MDAT3 0x0218C0CC 1694 | MLB150_MDWE0 0x0218C0D0 1695 | MLB150_MDWE1 0x0218C0D4 1696 | MLB150_MDWE2 0x0218C0D8 1697 | MLB150_MDWE3 0x0218C0DC 1698 | MLB150_MCTL 0x0218C0E0 1699 | MLB150_MADR 0x0218C0E4 1700 | MLB150_ACTL 0x0218C3C0 1701 | MLB150_ACSR0 0x0218C3D0 1702 | MLB150_ACSR1 0x0218C3D4 1703 | MLB150_ACMR0 0x0218C3D8 1704 | MLB150_ACMR1 0x0218C3DC 1705 | ROMC_ROMPATCHCNTL 0x021AC0F4 1706 | ROMC_ROMPATCHENH 0x021AC0F8 1707 | ROMC_ROMPATCHENL 0x021AC0FC 1708 | ROMC_ROMPATCHSR 0x021AC208 1709 | EIM_WCR 0x021BA090 1710 | EIM_WIAR 0x021BA094 1711 | EIM_EAR 0x021BA098 1712 | AUDMUX_PTCR1 0x021D8000 1713 | AUDMUX_PDCR1 0x021D8004 1714 | AUDMUX_PTCR2 0x021D8008 1715 | AUDMUX_PDCR2 0x021D800C 1716 | AUDMUX_PTCR3 0x021D8010 1717 | AUDMUX_PDCR3 0x021D8014 1718 | AUDMUX_PDCR4 0x021D801C 1719 | AUDMUX_PDCR5 0x021D8024 1720 | AUDMUX_PDCR6 0x021D802C 1721 | AUDMUX_PDCR7 0x021D8034 1722 | VDOA_VDOAC 0x021E4000 1723 | VDOA_VDOASRR 0x021E4004 1724 | VDOA_VDOAIE 0x021E4008 1725 | VDOA_VDOAIST 0x021E400C 1726 | VDOA_VDOAFP 0x021E4010 1727 | VDOA_VDOAIEBA 0x021E4014 1728 | VDOA_VDOASL 0x021E402C 1729 | VDOA_VDOAIUBO 0x021E4030 1730 | VDOA_VDOAVEBA 0x021E4034 1731 | VDOA_VDOAVUBO 0x021E4040 1732 | VDOA_VDOASR 0x021E4044 1733 | VDOA_VDOATD 0x021E4048 1734 | UART2_BASE 0x021E8000.w 1735 | UART1_BASE 0x02020000.w 1736 | UART1_URXD 0x02020000.W 1737 | :uart_urxd/ 1738 | UART1_UTXD 0x02020040.W 1739 | UART1_UCR1 0x02020080.W 1740 | :UART1_ADEN:15 1741 | :UART1_ADBR:14 1742 | :UART1_TRDYEN:13 1743 | :UART1_IDEN:12 1744 | :UART1_ICD:10-11 1745 | :UART1_RRDYEN:9 1746 | :UART1_RXDMAEN:8 1747 | :UART1_IREN:7 1748 | :UART1_TXMPTYEN:6 1749 | :UART1_RTSDEN:5 1750 | :UART1_SNDBRK:4 1751 | :UART1_TXDMAEN:3 1752 | :UART1_ATDMAEN:2 1753 | :UART1_DOZE:1 1754 | :UART1_UARTEN:0 1755 | UART1_UCR2 0x02020084.W 1756 | :uart_ucr2/ 1757 | UART1_UCR3 0x02020088.W 1758 | UART1_UCR4 0x0202008C.W 1759 | :UART1_CTSTL:10-15 1760 | :UART1_INVR:9 1761 | :UART1_ENIRI:8 1762 | :UART1_WKEN:7 1763 | :UART1_IDDMAEN:6 1764 | :UART1_IRSC:5 1765 | :UART1_LPBYP:4 1766 | :UART1_TCEN:3 1767 | :UART1_BKEN:2 1768 | :UART1_OREN:1 1769 | :UART1_DREN:0 1770 | UART1_UFCR 0x02020090.W 1771 | :uart_ufcr/ 1772 | UART1_USR1 0x02020094.W 1773 | :uart_usr1/ 1774 | UART1_USR2 0x02020098.W 1775 | UART1_UESC 0x0202009C.W 1776 | UART1_UTIM 0x020200A0.W 1777 | UART1_UBIR 0x020200A4.W 1778 | UART1_UBMR 0x020200A8.W 1779 | UART1_UBRC 0x020200AC.W 1780 | UART1_ONEMS 0x020200B0.W 1781 | UART1_UTS 0x020200B4.W 1782 | UART2_URXD 0x021E8000.W 1783 | :uart_urxd/ 1784 | UART2_UTXD 0x021E8040.W 1785 | UART2_UCR1 0x021E8080.W 1786 | :UART2_ADEN:15 1787 | :UART2_ADBR:14 1788 | :UART2_TRDYEN:13 1789 | :UART2_IDEN:12 1790 | :UART2_ICD:10-11 1791 | :UART2_RRDYEN:9 1792 | :UART2_RXDMAEN:8 1793 | :UART2_IREN:7 1794 | :UART2_TXMPTYEN:6 1795 | :UART2_RTSDEN:5 1796 | :UART2_SNDBRK:4 1797 | :UART2_TXDMAEN:3 1798 | :UART2_ATDMAEN:2 1799 | :UART2_DOZE:1 1800 | :UART2_UARTEN:0 1801 | UART2_UCR2 0x021E8084.W 1802 | :uart_ucr2/ 1803 | UART2_UCR3 0x021E8088.W 1804 | UART2_UCR4 0x021E808C.W 1805 | :UART2_CTSTL:10-15 1806 | :UART2_INVR:9 1807 | :UART2_ENIRI:8 1808 | :UART2_WKEN:7 1809 | :UART2_IDDMAEN:6 1810 | :UART2_IRSC:5 1811 | :UART2_LPBYP:4 1812 | :UART2_TCEN:3 1813 | :UART2_BKEN:2 1814 | :UART2_OREN:1 1815 | :UART2_DREN:0 1816 | UART2_UFCR 0x021E8090.W 1817 | :uart_ufcr/ 1818 | UART2_USR1 0x021E8094.W 1819 | :uart_usr1/ 1820 | UART2_USR2 0x021E8098.W 1821 | UART2_UESC 0x021E809C.W 1822 | UART2_UTIM 0x021E80A0.W 1823 | UART2_UBIR 0x021E80A4.W 1824 | UART2_UBMR 0x021E80A8.W 1825 | UART2_UBRC 0x021E80AC.W 1826 | UART2_ONEMS 0x021E80B0.W 1827 | UART2_UTS 0x021E80B4.W 1828 | UART3_BASE 0x021EC000.w 1829 | UART3_URXD 0x021EC000.W 1830 | :uart_urxd/ 1831 | UART3_UTXD 0x021EC040.W 1832 | UART3_UCR1 0x021EC080.W 1833 | :UART3_ADEN:15 1834 | :UART3_ADBR:14 1835 | :UART3_TRDYEN:13 1836 | :UART3_IDEN:12 1837 | :UART3_ICD:10-11 1838 | :UART3_RRDYEN:9 1839 | :UART3_RXDMAEN:8 1840 | :UART3_IREN:7 1841 | :UART3_TXMPTYEN:6 1842 | :UART3_RTSDEN:5 1843 | :UART3_SNDBRK:4 1844 | :UART3_TXDMAEN:3 1845 | :UART3_ATDMAEN:2 1846 | :UART3_DOZE:1 1847 | :UART3_UARTEN:0 1848 | UART3_UCR2 0x021EC084.W 1849 | :uart_ucr2/ 1850 | UART3_UCR3 0x021EC088.W 1851 | UART3_UCR4 0x021EC08C.W 1852 | :UART3_CTSTL:10-15 1853 | :UART3_INVR:9 1854 | :UART3_ENIRI:8 1855 | :UART3_WKEN:7 1856 | :UART3_IDDMAEN:6 1857 | :UART3_IRSC:5 1858 | :UART3_LPBYP:4 1859 | :UART3_TCEN:3 1860 | :UART3_BKEN:2 1861 | :UART3_OREN:1 1862 | :UART3_DREN:0 1863 | UART3_UFCR 0x021EC090.W 1864 | :uart_ufcr/ 1865 | UART3_USR1 0x021EC094.W 1866 | :uart_usr1/ 1867 | UART3_USR2 0x021EC098.W 1868 | UART3_UESC 0x021EC09C.W 1869 | UART3_UTIM 0x021EC0A0.W 1870 | UART3_UBIR 0x021EC0A4.W 1871 | UART3_UBMR 0x021EC0A8.W 1872 | UART3_UBRC 0x021EC0AC.W 1873 | UART3_ONEMS 0x021EC0B0.W 1874 | UART3_UTS 0x021EC0B4.W 1875 | /esai_ecr 1876 | :ZERO:31-20 1877 | :ETI:19 1878 | :ETO:18 1879 | :ERI:17 1880 | :ERO:16 1881 | :ZERO2:15-2 1882 | :ERST:1 1883 | :ESAIEN:0 1884 | ESAI_ECR 0x02024010 1885 | :esai_ecr/ 1886 | /esai_xfcr 1887 | :ZERO:31-20 1888 | :XIEN:19 1889 | :XWA:18-16 1890 | :XFWM:15-8 1891 | :XE5:7 1892 | :XE4:6 1893 | :XE3:5 1894 | :XE2:4 1895 | :XE1:3 1896 | :XE0:2 1897 | :XFR:1 1898 | :XFE:0 1899 | ESAI_TFCR 0x02024010 1900 | :esai_xfcr/ 1901 | ESAI_RFCR 0x02024018 1902 | :esai_xfcr/ 1903 | /esai_xccr 1904 | :ZERO:31-24 1905 | :XHCKD:23 1906 | :XFSD:22 1907 | :XCKD:21 1908 | :XHCKP:20 1909 | :XFSP:19 1910 | :XCKP:18 1911 | :XFP:17-14 1912 | :XDC:13-9 1913 | :XPSR:8 1914 | :XPM:7-0 1915 | ESAI_TCCR 0x020240d8 1916 | :esai_xccr/ 1917 | ESAI_RCCR 0x020240e0 1918 | :esai_xccr/ 1919 | /esai_saicr 1920 | :ZERO:31-9 1921 | :ALC:8 1922 | :TEBE:7 1923 | :SYN:6 1924 | :ZERO2:5-3 1925 | :OF2:2 1926 | :OF1:1 1927 | :OF0:0 1928 | ESAI_SAICR 0x020240d0 1929 | :esai_saicr/ 1930 | /esai_xcr 1931 | :ZERO:31-24 1932 | :XLIE:23 1933 | :XIE:22 1934 | :XEDIE:21 1935 | :XEIE:20 1936 | :XPR:19 1937 | :ZERO2:18 1938 | :PADC:17 1939 | :XFSR:16 1940 | :XFSL:15 1941 | :XSWS:14-10 1942 | :XMOD:9-8 1943 | :XWA:7 1944 | :XSHFD:6 1945 | :XE5:5 1946 | :XE4:4 1947 | :XE3:3 1948 | :XE2:2 1949 | :XE1:1 1950 | :XE0:0 1951 | ESAI_TCR 0x020240d4 1952 | :esai_xcr/ 1953 | ESAI_RCR 0x020240dc 1954 | :esai_xcr/ 1955 | /esai_prrc 1956 | :ZERO:31-12 1957 | :PDC:11-0 1958 | ESAI_PRRC 0x020240f8 1959 | :esai_prrc/ 1960 | /esai_pcrc 1961 | :ZERO:31-12 1962 | :PC:11-0 1963 | ESAI_PCRC 0x020240f8 1964 | :esai_pcrc/ 1965 | /ccm_cs1cdr 1966 | :ZERO:31-28 1967 | :ESAI_CLK_PODF:27-25 1968 | :SSI3_CLK_PRED:24-22 1969 | :SSI3_CLK_PODF:21-16 1970 | :ZERO2:15-12 1971 | :ESAI_CLK_PRED:11-9 1972 | :SSI1_CLK_PRED:8-6 1973 | :SSI1_CLK_PODF:5-0 1974 | CCM_CS1CDR 0x020c4028 1975 | :ccm_cs1cdr/ 1976 | /ccm_cscmr2 1977 | :ZERO:31-21 1978 | :ESAI_CLK_SEL:20-19 1979 | :ZERO2:18-12 1980 | :LDB_DI1_IPU_DIV:11 1981 | :LDB_DI0_IPU_DIV:10 1982 | :ZERO3:9-8 1983 | :CAN_CLK_PODF:7-2 1984 | :ZERO4:1-0 1985 | CCM_CSCMR2 0x020c4020 1986 | :ccm_cscmr2/ 1987 | /ecspix_conreg 1988 | :BURST_LENGTH:31-20 1989 | :CHANNEL_SELECT:19-18 1990 | :DRCTL:17-16 1991 | :PRE_DIVIDER:15-12 1992 | :POST_DIVIDER:11-8 1993 | :CHANNEL_MODE:7-4 1994 | :SMC:3 1995 | :XCH:2 1996 | :HT:1 1997 | :EN:0 1998 | ECSPI1_CONREG 0x02008008 1999 | :ecspix_conreg/ 2000 | ECSPI2_CONREG 0x0200C008 2001 | :ecspix_conreg/ 2002 | ECSPI3_CONREG 0x02010008 2003 | :ecspix_conreg/ 2004 | ECSPI4_CONREG 0x02014008 2005 | :ecspix_conreg/ 2006 | /ecspix_configreg 2007 | :RESERVED:31-29 2008 | :HT_LENGTH:28-24 2009 | :SCLK_CTL:23-20 2010 | :DATA_CTL:19-16 2011 | :SS_POL:15-12 2012 | :SS_CTL:11-8 2013 | :SCLK_POL:7-4 2014 | :SCLK_PHA:3-0 2015 | ECSPI1_CONFIGREG 0x0200800c 2016 | :ecspix_configreg/ 2017 | ECSPI2_CONFIGREG 0x0200C00c 2018 | :ecspix_configreg/ 2019 | ECSPI3_CONFIGREG 0x0201000c 2020 | :ecspix_configreg/ 2021 | ECSPI4_CONFIGREG 0x0201400c 2022 | :ecspix_configreg/ 2023 | 2024 | -------------------------------------------------------------------------------- /dat/devregs_imx7d.dat: -------------------------------------------------------------------------------- 1 | GPIO1_DR 0x30200000 2 | GPIO2_DR 0x30210000 3 | GPIO3_DR 0x30220000 4 | GPIO4_DR 0x30230000 5 | GPIO5_DR 0x30240000 6 | GPIO6_DR 0x30250000 7 | GPIO7_DR 0x30260000 8 | 9 | -------------------------------------------------------------------------------- /dat/devregs_imx8mm.dat: -------------------------------------------------------------------------------- 1 | GPIO1_DR 0x30200000 2 | GPIO2_DR 0x30210000 3 | GPIO3_DR 0x30220000 4 | GPIO4_DR 0x30230000 5 | GPIO5_DR 0x30240000 6 | # MIPI_DPHY_M_PLLPMS 0x0000 7 | # MIPI_DPHY_M_PLLCTL 0x0008 8 | # MIPI_DPHY_B_DPHYCTL 0x0010 9 | # MIPI_DPHY_M_DPHYCTL 0x0018 10 | # MIPI_DPHY_S_DPHYCTL 0x0020 11 | DSI_VERSION 0x32E10000 12 | DSI_STATUS 0x32E10004 13 | DSI_RGB_STATUS 0x32E10008 14 | DSI_SWRST 0x32E1000C 15 | DSI_CLKCTRL 0x32E10010 16 | DSI_TIMEOUT 0x32E10014 17 | DSI_CONFIG 0x32E10018 18 | DSI_ESCMODE 0x32E1001C 19 | DSI_MDRESOL 0x32E10020 20 | DSI_MVPORCH 0x32E10024 21 | DSI_MHPORCH 0x32E10028 22 | DSI_MSYNC 0x32E1002C 23 | DSI_SDRESOL 0x32E10030 24 | DSI_INTSRC 0x32E10034 25 | DSI_IMTMSK 0x32E10038 26 | DSI_FIFOTHLD 0x32E10048 27 | DSI_FIFOCTRL 0x32E1004C 28 | DSI_MEMACCHR 0x32E10050 29 | DSI_MULTI_PKT 0x32E10078 30 | DSI_PLLCTRL_1G 0x32E10090 31 | DSI_PLLCTRL 0x32E10094 32 | DSI_PLLCTRL1 0x32E10098 33 | DSI_PLLCTRL2 0x32E1009C 34 | DSI_PLLTMR 0x32E100A0 35 | DSI_PHYCTRL_B1 0x32E100A4 36 | DSI_PHYCTRL_B2 0x32E100A8 37 | DSI_PHYCTRL_M1 0x32E100AC 38 | DSI_PHYCTRL_M2 0x32E100B0 39 | DSI_PHYTIMING 0x32E100B4 40 | DSI_PHYTIMING1 0x32E100B8 41 | DSI_PHYTIMING2 0x32E100BC 42 | LCDIF_CTRL 0x32E00000 43 | LCDIF_CTRL1 0x32E00010 44 | LCDIF_CTRL2 0x32E00020 45 | LCDIF_TRANSFER_COUNT 0x32E00030 46 | LCDIF_CUR_BUF 0x32E00040 47 | LCDIF_NEXT_BUF 0x32E00050 48 | LCDIF_TIMING 0x32E00060 49 | LCDIF_VDCTRL0 0x32E00070 50 | LCDIF_VDCTRL1 0x32E00080 51 | LCDIF_VDCTRL2 0x32E00090 52 | LCDIF_VDCTRL3 0x32E000A0 53 | LCDIF_VDCTRL4 0x32E000B0 54 | LCDIF_DVICTRL0 0x32E000C0 55 | LCDIF_DVICTRL1 0x32E000D0 56 | LCDIF_DVICTRL2 0x32E000E0 57 | LCDIF_DVICTRL3 0x32E000F0 58 | LCDIF_DVICTRL4 0x32E00100 59 | LCDIF_CSC_COEFF0 0x32E00110 60 | LCDIF_CSC_COEFF1 0x32E00120 61 | LCDIF_CSC_COEFF2 0x32E00130 62 | LCDIF_CSC_COEFF3 0x32E00140 63 | LCDIF_CSC_COEFF4 0x32E00150 64 | LCDIF_CSC_OFFSET 0x32E00160 65 | LCDIF_CSC_LIMIT 0x32E00170 66 | LCDIF_BM_ERROR_STAT 0x32E00190 67 | LCDIF_CRC_STAT 0x32E001A0 68 | LCDIF_STAT 0x32E001B0 69 | LCDIF_THRES 0x32E00200 70 | LCDIF_AS_CTRL 0x32E00210 71 | LCDIF_AS_BUF 0x32E00220 72 | LCDIF_AS_NEXT_BUF 0x32E00230 73 | LCDIF_AS_CLRKEYLOW 0x32E00240 74 | LCDIF_AS_CLRKEYHIGH 0x32E00250 75 | LCDIF_SYNC_DELAY 0x32E00260 76 | LCDIF_PIGEONCTRL0 0x32E00380 77 | LCDIF_PIGEONCTRL1 0x32E00390 78 | LCDIF_PIGEONCTRL2 0x32E003A0 79 | LCDIF_PIGEON_0_0 0x32E00800 80 | LCDIF_PIGEON_0_1 0x32E00810 81 | LCDIF_PIGEON_0_2 0x32E00820 82 | LCDIF_PIGEON_1_0 0x32E00840 83 | LCDIF_PIGEON_1_1 0x32E00850 84 | LCDIF_PIGEON_1_2 0x32E00860 85 | LCDIF_PIGEON_2_0 0x32E00880 86 | LCDIF_PIGEON_2_1 0x32E00890 87 | LCDIF_PIGEON_2_2 0x32E008A0 88 | LCDIF_PIGEON_3_0 0x32E008C0 89 | LCDIF_PIGEON_3_1 0x32E008D0 90 | LCDIF_PIGEON_3_2 0x32E008E0 91 | LCDIF_PIGEON_4_0 0x32E00900 92 | LCDIF_PIGEON_4_1 0x32E00910 93 | LCDIF_PIGEON_4_2 0x32E00920 94 | LCDIF_PIGEON_5_0 0x32E00940 95 | LCDIF_PIGEON_5_1 0x32E00950 96 | LCDIF_PIGEON_5_2 0x32E00960 97 | LCDIF_PIGEON_6_0 0x32E00980 98 | LCDIF_PIGEON_6_1 0x32E00990 99 | LCDIF_PIGEON_6_2 0x32E009A0 100 | LCDIF_PIGEON_7_0 0x32E009C0 101 | LCDIF_PIGEON_7_1 0x32E009D0 102 | LCDIF_PIGEON_7_2 0x32E009E0 103 | LCDIF_PIGEON_8_0 0x32E00A00 104 | LCDIF_PIGEON_8_1 0x32E00A10 105 | LCDIF_PIGEON_8_2 0x32E00A20 106 | LCDIF_PIGEON_9_0 0x32E00A40 107 | LCDIF_PIGEON_9_1 0x32E00A50 108 | LCDIF_PIGEON_9_2 0x32E00A60 109 | LCDIF_PIGEON_10_0 0x32E00A80 110 | LCDIF_PIGEON_10_1 0x32E00A90 111 | LCDIF_PIGEON_10_2 0x32E00AA0 112 | LCDIF_PIGEON_11_0 0x32E00AC0 113 | LCDIF_PIGEON_11_1 0x32E00AD0 114 | LCDIF_PIGEON_11_2 0x32E00AE0 115 | 116 | CSI_CSICR1 0x32E20000 117 | :SWAP16_EN:31 118 | :EXT_VSYNC:30 119 | :EOF_INT_EN:29 120 | :PrP_IF_EN:28 121 | :VIDEO_MODE:27 122 | :COF_INT_EN:26 123 | :SF_OR_INTEN:25 124 | :RF_OR_INTEN:24 125 | :SFF_DMA_DONE_INTEN:22 126 | :STATFF_INTEN:21 127 | :FB2_DMA_DONE_INTEN:20 128 | :FB1_DMA_DONE_INTEN:19 129 | :RXFF_INTEN:18 130 | :SOF_POL:17 131 | :SOF_INTEN:16 132 | :HSYNC_POL:11 133 | :CCIR_EN:10 134 | :FCC:8 135 | :PACK_DIR:7 136 | :CLR_STATFIFO:6 137 | :CLR_RXFIFO:5 138 | :GCLK_MODE:4 139 | :INV_DATA:3 140 | :INV_PCLK:2 141 | :REDGE:1 142 | :PIXEL_BIT:0 143 | CSI_CSICR2 0x32E20004 144 | :DMA_BURST_TYPE_RFF:31-30 145 | :DMA_BURST_TYPE_SFF:29-28 146 | :DRM:26 147 | :AFS:25-24 148 | :SCE:23 149 | :BTS:20-19 150 | :LVRM:18-16 151 | :VSC:15-8 152 | :HSC:7-0 153 | CSI_CSICR3 0x32E20008 154 | :FRMCNT:31-16 155 | :FRMCNT_RST:15 156 | :DMA_REFLASH_RFF:14 157 | :DMA_REFLASH_SFF:13 158 | :DMA_REQ_EN_RFF:12 159 | :DMA_REQ_EN_SFF:11 160 | :STATFF_LEVEL:10-8 161 | :HRESP_ERR_EN:7 162 | :RxFF_LEVEL:6-4 163 | :TWO_8BIT_SENSOR:3 164 | :ZERO_PACK_EN:2 165 | :ECC_INT_EN:1 166 | :ECC_AUTO_EN:0 167 | CSI_CSISTATFIFO 0x32E2000C 168 | :STAT:31-0 169 | CSI_CSIRFIFO 0x32E20010 170 | :IMAGE:31-0 171 | CSI_CSIRXCNT 0x32E20014 172 | :RXCNT:21-0 173 | CSI_CSISR 0x32E20018 174 | :BASEADDR_CHHANGE_ERROR:28 175 | :DMA_FIELD0_DONE:27 176 | :DMA_FIELD1_DONE:26 177 | :SF_OR_INT:25 178 | :RF_OR_INT:24 179 | :DMA_TSF_DONE_SFF:22 180 | :STATFF_INT:21 181 | :DMA_TSF_DONE_FB2:20 182 | :DMA_TSF_DONE_FB1:19 183 | :RxFF_INT:18 184 | :EOF_INT:17 185 | :SOF_INT:16 186 | :F2_INT:15 187 | :F1_INT:14 188 | :COF_INT:13 189 | :HRESP_ERR_INT:7 190 | :ECC_INT:1 191 | :DRDY:0 192 | CSI_CSIDMASA_STATFIFO 0x32E20020 193 | :DMA_START_ADDR_SFF:31-2 194 | CSI_CSIDMATS_STATFIFO 0x32E20024 195 | :DMA_TSF_SIZE_SFF:31-0 196 | CSI_CSIDMASA_FB1 0x32E20028 197 | :DMA_START_ADDR_FB1:31-2 198 | CSI_CSIDMASA_FB2 0x32E2002C 199 | :DMA_START_ADDR_FB2:31-2 200 | CSI_CSIFBUF_PARA 0x32E20030 201 | :DEINTERLACE_STRIDE:31-16 202 | :FBUF_STRIDE:15-0 203 | CSI_CSIIMAG_PARA 0x32E20034 204 | :IMAGE_WIDTH:31-16 205 | :IMAGE_HEIGHT:15-0 206 | CSI_CSICR18 0x32E20048 207 | :CSI_ENABLE:31 208 | :MIPI_DATA_FORMAT:30-25 209 | :LINE_STRIDE_EN:24 210 | :DATA_FROM_MIPI:22 211 | :MIPI_YU_SWAP:21 212 | :MIPI_DOUBLE_CMPNT:20 213 | :MASK_OPTION:19-18 214 | :CSI_LCDIF_BUFFER_LINES:17-16 215 | :AHB_HPROT:15-12 216 | :RGB888A_FORMAT_SEL:10 217 | :BASEADDR_CHANGE_ERROR_IE:9 218 | :LAST_DMA_REQ_SEL:8 219 | :DMA_FIELD1_DONE_IE:7 220 | :FIELD0_DONE_IE:6 221 | :BASEADDR_SWITCH_SEL:5 222 | :BASEADDR_SWITCH_EN:4 223 | :PARALLEL24_EN:3 224 | :DEINTERLACE_EN:2 225 | 226 | MIPI_CSI_CSIS_COMMON_CTRL 0x32E30004 227 | :UPDATE_SHADOW:19-16 228 | :LANE_NUMBER:9-8 229 | :SW_RESET:1 230 | :CSI_EN:0 231 | MIPI_CSI_CSIS_CLOCK_CTRL 0x32E30008 232 | :CLKGATE_TRAIL:31-16 233 | :CLKGATE_EN:7-4 234 | MIPI_CSI_INTERRUPT_MASK_0 0x32E30010 235 | :MSK_FRAMESTART:27-24 236 | :MSK_FRAMEEND:23-20 237 | :MSK_ERR_SOT_HS:19-16 238 | :MSK_ERR_LOST_FS:15-12 239 | :MSK_ERR_LOST_FE:11-8 240 | :MSK_ERR_OVER:4 241 | :MSK_ERR_WRONG_CFG:3 242 | :MSK_ERR_ECC:2 243 | :MSK_ERR_CRC:1 244 | :MSK_ERR_ID:0 245 | MIPI_CSI_INTERRUPT_SOURCE_0 0x32E30014 246 | :FRAME_START:27-24 247 | :FRAME_END:23-20 248 | :ERR_SOT_HS:19-16 249 | :ERR_LOST_FS:15-12 250 | :ERR_LOST_FE:11-8 251 | :ERR_OVER:4 252 | :ERR_WRONG_CFG:3 253 | :ERR_ECC:2 254 | :ERR_CRC:1 255 | :ERR_ID:0 256 | MIPI_CSI_INTERRUPT_MASK_1 0x32E30018 257 | :MSK_LINE_END:3-0 258 | MIPI_CSI_INTERRUPT_SOURCE_1 0x32E3001C 259 | :LINE_END:3-0 260 | MIPI_CSI_DPHY_STATUS 0x32E30020 261 | :ULPSDAT:11-8 262 | :STOPSTATEDAT:7-4 263 | :ULPSCLK:1 264 | :STOPSTATECLK:0 265 | MIPI_CSI_DPHY_COMMON_CTRL 0x32E30024 266 | :HSSETTLE:31-24 267 | :S_CLKSETTLECTL:23-22 268 | :S_DPDN_SWAP_CLK:6 269 | :S_DPDN_SWAP_DAT:5 270 | :ENABLE_DAT:4-1 271 | :ENABLE_CLK:0 272 | MIPI_CSI_DPHY_MASTER_SLAVE_CTRL_LOW 0x32E30030 273 | :USER_DATA_PATTERN_LOW:31-30 274 | :BIAS_REF_VOLT:29-28 275 | :BGR_CHOPPER_FREQ:27 276 | :VREG12_EXTPWR_EN_CTL:26 277 | :REG_1P2_LVL_CTL:25-24 278 | :REG_1P2_LVL_SEL:23 279 | :LP_RX_HYS_LVL:22-21 280 | :VREF_SRC_SEL:20 281 | :LP_RX_VREF_LVL:19-18 282 | :LP_RX_PULSE_REJECT:17 283 | :MSTRCLK_LP_SLEW_RATE_DOWN:16-15 284 | :MSTRCLK_LP_SLEW_RATE_UP:14 285 | :LP_CD_HYS:13 286 | :BGR_CHOPPER_EN:12 287 | :ERRCONTENTION_LP_EN:11 288 | :TXTRIGGER_CLK_EN:10 289 | :B_DPHYCTRL:9-0 290 | MIPI_CSI_DPHY_MASTER_SLAVE_CTRL_HIGH 0x32E30034 291 | :MST_DATA3_TX_SLEW_DOWN:31-30 292 | :MST_DATA3_TX_SLEW_UP:29 293 | :MST_DATA2_TX_SLEW_DOWN:28-27 294 | :MST_DATA2_TX_SLEW_UP:26 295 | :MST_DATA1_TX_SLEW_DOWN:25-24 296 | :MST_DATA1_TX_SLEW_UP:23 297 | :MST_DATA0_TX_SLEW_DOWN:22-21 298 | :MST_DATA0_TX_SLEW_UP:20 299 | :LP_REG_VREF_SRC_SEL:14 300 | :RX_SKEW_CALIB_FIX_EN:13 301 | :DCC_DONE:11 302 | :BGR_VOLT_TUNE:9-8 303 | :HS_LOOPBACK_MODE_CTL:7-6 304 | :USER_DATA_PATTERN_HIGH:5-0 305 | MIPI_CSI_DPHY_SLAVE_CTRL_LOW 0x32E30038 306 | :DCC_STABLE:31 307 | :DCC_INIT_TOLERANCE:30-28 308 | :DCC_CCO_GAIN:17-16 309 | :ANA_TIMER_HYS:14-13 310 | :CLK_MISS_EN:12 311 | :CLOCK_LANE_CAP_TCLK_MISS:11-10 312 | :CLOCK_LANE_CAP_TCLK_SETTLE:9-8 313 | :HS_RX_TERMINATION_IMPEDENCE:7-6 314 | :DATA_LANE_HS_RX_DELAY:5-4 315 | :CLK_LANE_HS_RX_DELAY:3-2 316 | :HS_RX_BIAS:1-0 317 | MIPI_CSI_DPHY_SLAVE_CTRL_HIGH 0x32E3003C 318 | :RX_SKEW_CALIB_COMPARE_RUN_TIME:31-28 319 | :RX_SKEW_CALIB_COMPARE_WAIT_TIME:27-26 320 | :RX_SKEW_CALIB_FAIL_TOLERANCE:25-24 321 | :RX_SKEW_CALIB_PASS_MIN:21-16 322 | :RX_SKEW_CALIB_FAIL_MIN:13-8 323 | :RX_SKEW_CALIB_MAX:7-2 324 | :SKEW_CALIB_EN:1 325 | :DCC_EN:0 326 | /mipi_csi_isp_config 327 | :PIXEL_MODE:13-12 328 | :PARALLEL:11 329 | :RGB_SWAP:10 330 | :DATAFORMAT:7-2 331 | :VIRTUAL_CHANNEL:1-0 332 | /mipi_csi_isp_resolution 333 | :VRESOL:31-16 334 | :HRESOL:15-0 335 | MIPI_CSI_ISP_CONFIG_CH0 0x32E30040 336 | :mipi_csi_isp_config/ 337 | MIPI_CSI_ISP_RESOLUTION_CH0 0x32E30044 338 | :mipi_csi_isp_resolution/ 339 | MIPI_CSI_ISP_SYNC_CH0 0x32E30048 340 | :HSYNC_LINTV:23-18 341 | MIPI_CSI_ISP_CONFIG_CH1 0x32E30050 342 | :mipi_csi_isp_config/ 343 | MIPI_CSI_ISP_RESOLUTION_CH1 0x32E30054 344 | :mipi_csi_isp_resolution/ 345 | MIPI_CSI_ISP_SYNC_CH1 0x32E30058 346 | :HSYNC_LINTV:23-18 347 | MIPI_CSI_ISP_CONFIG_CH2 0x32E30060 348 | :mipi_csi_isp_config/ 349 | MIPI_CSI_ISP_RESOLUTION_CH2 0x32E30064 350 | :mipi_csi_isp_resolution/ 351 | MIPI_CSI_ISP_SYNC_CH2 0x32E30068 352 | :HSYNC_LINTV:23-18 353 | MIPI_CSI_ISP_CONFIG_CH3 0x32E30070 354 | :mipi_csi_isp_config/ 355 | MIPI_CSI_ISP_RESOLUTION_CH3 0x32E30074 356 | :mipi_csi_isp_resolution/ 357 | MIPI_CSI_ISP_SYNC_CH3 0x32E30078 358 | :HSYNC_LINTV:23-18 359 | MIPI_CSI_SHADOW_CONFIG_CH0 0x32E30080 360 | :mipi_csi_isp_config/ 361 | MIPI_CSI_SHADOW_RESOLUTION_CH0 0x32E30084 362 | :mipi_csi_isp_resolution/ 363 | MIPI_CSI_SHADOW_SYNC_CH0 0x32E30088 364 | :HSYNC_LINTV_SDW:23-18 365 | MIPI_CSI_SHADOW_CONFIG_CH1 0x32E30090 366 | :mipi_csi_isp_config/ 367 | MIPI_CSI_SHADOW_RESOLUTION_CH1 0x32E30094 368 | :mipi_csi_isp_resolution/ 369 | MIPI_CSI_SHADOW_SYNC_CH1 0x32E30098 370 | :HSYNC_LINTV_SDW:23-18 371 | MIPI_CSI_SHADOW_CONFIG_CH2 0x32E300A0 372 | :mipi_csi_isp_config/ 373 | MIPI_CSI_SHADOW_RESOLUTION_CH2 0x32E300A4 374 | :mipi_csi_isp_resolution/ 375 | MIPI_CSI_SHADOW_SYNC_CH2 0x32E300A8 376 | :HSYNC_LINTV_SDW:23-18 377 | MIPI_CSI_SHADOW_CONFIG_CH3 0x32E300B0 378 | :mipi_csi_isp_config/ 379 | MIPI_CSI_SHADOW_RESOLUTION_CH3 0x32E300B4 380 | :mipi_csi_isp_resolution/ 381 | MIPI_CSI_SHADOW_SYNC_CH3 0x32E300B8 382 | :HSYNC_LINTV_SDW:23-18 383 | MIPI_CSI_FRAME_COUNTER_CH0 0x32E30100 384 | :FRM_CNT:31-0 385 | MIPI_CSI_FRAME_COUNTER_CH1 0x32E30104 386 | :FRM_CNT:31-0 387 | MIPI_CSI_FRAME_COUNTER_CH2 0x32E30108 388 | :FRM_CNT:31-0 389 | MIPI_CSI_FRAME_COUNTER_CH3 0x32E3010C 390 | :FRM_CNT:31-0 391 | MIPI_CSI_LINE_INTERRUPT_RATIO_CH0 0x32E30110 392 | :LINE_INTR:31-0 393 | MIPI_CSI_LINE_INTERRUPT_RATIO_CH1 0x32E30114 394 | :LINE_INTR:31-0 395 | MIPI_CSI_LINE_INTERRUPT_RATIO_CH2 0x32E30118 396 | :LINE_INTR:31-0 397 | MIPI_CSI_LINE_INTERRUPT_RATIO_CH3 0x32E3011C 398 | :LINE_INTR:31-0 399 | 400 | -------------------------------------------------------------------------------- /dat/devregs_imx8mq.dat: -------------------------------------------------------------------------------- 1 | GPIO1_DR 0x30200000 2 | GPIO2_DR 0x30210000 3 | GPIO3_DR 0x30220000 4 | GPIO4_DR 0x30230000 5 | GPIO5_DR 0x30240000 6 | 7 | DSI_HOST_CFG_NUM_LANES 0x30A00000 8 | DSI_HOST_CFG_NONCONTINUOUS_CLK 0x30A00004 9 | DSI_HOST_CFG_T_PRE 0x30A00008 10 | DSI_HOST_CFG_T_POST 0x30A0000C 11 | DSI_HOST_CFG_TX_GAP 0x30A00010 12 | DSI_HOST_CFG_AUTOINSERT_EOTP 0x30A00014 13 | DSI_HOST_CFG_EXTRA_CMDS_AFTER_EOTP 0x30A00018 14 | DSI_HOST_CFG_HTX_TO_COUNT 0x30A0001C 15 | DSI_HOST_CFG_LRX_H_TO_COUNT 0x30A00020 16 | DSI_HOST_CFG_BTA_H_TO_COUNT 0x30A00024 17 | DSI_HOST_CFG_TWAKEUP 0x30A00028 18 | DSI_HOST_CFG_STATUS_OUT 0x30A0002C 19 | DSI_HOST_RX_ERROR_STATUS 0x30A00030 20 | DSI_HOST_CFG_DPI_PIXEL_PAYLOAD_SIZE 0x30A00200 21 | DSI_HOST_CFG_DPI_PIXEL_FIFO_SEND_LEVEL 0x30A00204 22 | DSI_HOST_CFG_DPI_INTERFACE_COLOR_CODING 0x30A00208 23 | DSI_HOST_CFG_DPI_PIXEL_FORMAT 0x30A0020C 24 | DSI_HOST_CFG_DPI_VSYNC_POLARITY 0x30A00210 25 | DSI_HOST_CFG_DPI_HSYNC_POLARITY 0x30A00214 26 | DSI_HOST_CFG_DPI_VIDEO_MODE 0x30A00218 27 | DSI_HOST_CFG_DPI_HFP 0x30A0021C 28 | DSI_HOST_CFG_DPI_HBP 0x30A00220 29 | DSI_HOST_CFG_DPI_HSA 0x30A00224 30 | DSI_HOST_CFG_DPI_ENABLE_MULT_PKTS 0x30A00228 31 | DSI_HOST_CFG_DPI_VBP 0x30A0022C 32 | DSI_HOST_CFG_DPI_VFP 0x30A00230 33 | DSI_HOST_CFG_DPI_BLLP_MODE 0x30A00234 34 | DSI_HOST_CFG_DPI_USE_NULL_PKT_BLLP 0x30A00238 35 | DSI_HOST_CFG_DPI_VACTIVE 0x30A0023C 36 | DSI_HOST_CFG_DPI_VC 0x30A00240 37 | DSI_HOST_TX_PAYLOAD 0x30A00280 38 | DSI_HOST_PKT_CONTROL 0x30A00284 39 | DSI_HOST_SEND_PACKET 0x30A00288 40 | DSI_HOST_PKT_STATUS 0x30A0028C 41 | DSI_HOST_PKT_FIFO_WR_LEVEL 0x30A00290 42 | DSI_HOST_PKT_FIFO_RD_LEVEL 0x30A00294 43 | DSI_HOST_PKT_RX_PAYLOAD 0x30A00298 44 | DSI_HOST_PKT_RX_PKT_HEADER 0x30A0029C 45 | DSI_HOST_IRQ_STATUS 0x30A002A0 46 | DSI_HOST_IRQ_STATUS2 0x30A002A4 47 | DSI_HOST_IRQ_MASK 0x30A002A8 48 | DSI_HOST_IRQ_MASK2 0x30A002AC 49 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_PD_DPHY 0x30A00300 50 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_M_PRG_HS_PREPARE 0x30A00304 51 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_MC_PRG_HS_PREPARE 0x30A00308 52 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_M_PRG_HS_ZERO 0x30A0030C 53 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_MC_PRG_HS_ZERO 0x30A00310 54 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_M_PRG_HS_TRAIL 0x30A00314 55 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_MC_PRG_HS_TRAIL 0x30A00318 56 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_PD_PLL 0x30A0031C 57 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_TST 0x30A00320 58 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_CN 0x30A00324 59 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_CM 0x30A00328 60 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_CO 0x30A0032C 61 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_LOCK 0x30A00330 62 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_LOCK_BYP 0x30A00334 63 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_RTERM_SEL 0x30A00338 64 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_AUTO_PD_EN 0x30A0033C 65 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_RXLPRP 0x30A00340 66 | DSI_HOST_FSL_IP1_DPHY_INTFC_DPHY_RXCDRP 0x30A00344 67 | 68 | LCDIF_CTRL 0x30320000 69 | LCDIF_CTRL1 0x30320010 70 | LCDIF_CTRL2 0x30320020 71 | LCDIF_TRANSFER_COUNT 0x30320030 72 | LCDIF_CUR_BUF 0x30320040 73 | LCDIF_NEXT_BUF 0x30320050 74 | LCDIF_TIMING 0x30320060 75 | LCDIF_VDCTRL0 0x30320070 76 | LCDIF_VDCTRL1 0x30320080 77 | LCDIF_VDCTRL2 0x30320090 78 | LCDIF_VDCTRL3 0x303200A0 79 | LCDIF_VDCTRL4 0x303200B0 80 | LCDIF_DVICTRL0 0x303200C0 81 | LCDIF_DVICTRL1 0x303200D0 82 | LCDIF_DVICTRL2 0x303200E0 83 | LCDIF_DVICTRL3 0x303200F0 84 | LCDIF_DVICTRL4 0x30320100 85 | LCDIF_CSC_COEFF0 0x30320110 86 | LCDIF_CSC_COEFF1 0x30320120 87 | LCDIF_CSC_COEFF2 0x30320130 88 | LCDIF_CSC_COEFF3 0x30320140 89 | LCDIF_CSC_COEFF4 0x30320150 90 | LCDIF_CSC_OFFSET 0x30320160 91 | LCDIF_CSC_LIMIT 0x30320170 92 | LCDIF_BM_ERROR_STAT 0x30320190 93 | LCDIF_CRC_STAT 0x303201A0 94 | LCDIF_STAT 0x303201B0 95 | LCDIF_THRES 0x30320200 96 | LCDIF_AS_CTRL 0x30320210 97 | LCDIF_AS_BUF 0x30320220 98 | LCDIF_AS_NEXT_BUF 0x30320230 99 | LCDIF_AS_CLRKEYLOW 0x30320240 100 | LCDIF_AS_CLRKEYHIGH 0x30320250 101 | LCDIF_SYNC_DELAY 0x30320260 102 | LCDIF_PIGEONCTRL0 0x30320380 103 | LCDIF_PIGEONCTRL1 0x30320390 104 | LCDIF_PIGEONCTRL2 0x303203A0 105 | LCDIF_PIGEON_0_0 0x30320800 106 | LCDIF_PIGEON_0_1 0x30320810 107 | LCDIF_PIGEON_0_2 0x30320820 108 | LCDIF_PIGEON_1_0 0x30320840 109 | LCDIF_PIGEON_1_1 0x30320850 110 | LCDIF_PIGEON_1_2 0x30320860 111 | LCDIF_PIGEON_2_0 0x30320880 112 | LCDIF_PIGEON_2_1 0x30320890 113 | LCDIF_PIGEON_2_2 0x303208A0 114 | LCDIF_PIGEON_3_0 0x303208C0 115 | LCDIF_PIGEON_3_1 0x303208D0 116 | LCDIF_PIGEON_3_2 0x303208E0 117 | LCDIF_PIGEON_4_0 0x30320900 118 | LCDIF_PIGEON_4_1 0x30320910 119 | LCDIF_PIGEON_4_2 0x30320920 120 | LCDIF_PIGEON_5_0 0x30320940 121 | LCDIF_PIGEON_5_1 0x30320950 122 | LCDIF_PIGEON_5_2 0x30320960 123 | LCDIF_PIGEON_6_0 0x30320980 124 | LCDIF_PIGEON_6_1 0x30320990 125 | LCDIF_PIGEON_6_2 0x303209A0 126 | LCDIF_PIGEON_7_0 0x303209C0 127 | LCDIF_PIGEON_7_1 0x303209D0 128 | LCDIF_PIGEON_7_2 0x303209E0 129 | LCDIF_PIGEON_8_0 0x30320A00 130 | LCDIF_PIGEON_8_1 0x30320A10 131 | LCDIF_PIGEON_8_2 0x30320A20 132 | LCDIF_PIGEON_9_0 0x30320A40 133 | LCDIF_PIGEON_9_1 0x30320A50 134 | LCDIF_PIGEON_9_2 0x30320A60 135 | LCDIF_PIGEON_10_0 0x30320A80 136 | LCDIF_PIGEON_10_1 0x30320A90 137 | LCDIF_PIGEON_10_2 0x30320AA0 138 | LCDIF_PIGEON_11_0 0x30320AC0 139 | LCDIF_PIGEON_11_1 0x30320AD0 140 | LCDIF_PIGEON_11_2 0x30320AE0 141 | -------------------------------------------------------------------------------- /scripts/parse_trm_to_devregs.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/python3 2 | """ 3 | Tries to parse pages of Technical Reference Manual to devregs format. 4 | """ 5 | import sys 6 | if sys.version_info < (3, 7): 7 | sys.exit("local python is too old\n") 8 | import argparse 9 | import logging 10 | import logging.handlers 11 | 12 | import popplerqt5 13 | from PyQt5 import QtCore 14 | import re 15 | from dataclasses import dataclass 16 | 17 | logger = logging.getLogger('parse_trm') 18 | log_h = logging.StreamHandler() 19 | log_h.setFormatter(logging.Formatter('[%(levelname)s](%(name)s): %(message)s')) 20 | logger.addHandler(log_h) 21 | 22 | argp = argparse.ArgumentParser() 23 | argp.add_argument('file', type=argparse.FileType('r'), help="TRM (PDF File)") 24 | argp.add_argument('start', type=int, help="First page in TRM to parse") 25 | argp.add_argument('end', type=int, help="Last page in TRM to parse") 26 | argp.add_argument('-v', '--verbose', action="count", help="loglevel") 27 | 28 | r_start = re.compile(r'\d+\.\d+\.\d+\.\d+\s+') 29 | r_name = re.compile(r'^.*?\((?P\w+)\)', re.M | re.S) 30 | r_adr = re.compile(r""" 31 | \n\s*Address:.*?=\s(?P....)_(?P....)h\n 32 | """, re.M | re.S | re.X) 33 | r_bitdescription = re.compile(r""" 34 | ^.*?Reset.*?(0|1).*?Field\s+Description 35 | """, re.M | re.S | re.X) 36 | r_pagebreak = re.compile(r""" 37 | (\s{14,}.*\n)? 38 | \s{20,}Table\scontinues\son\sthe\snext\spage.*\n 39 | \s{20,}.*\n 40 | .*NXP\sSemiconductors.*\n 41 | .*\n 42 | .*continued.*\n 43 | .*Field\s+Description 44 | """,re.X) 45 | r_field = re.compile(r""" 46 | \n\s{2,12} 47 | (?P\d+)(–(?P\d+)|\s).*(?=\n) 48 | """, re.M | re.X) 49 | r_fldname = re.compile(r""" 50 | \n\s{0,13} 51 | ( 52 | ((-)|(Reserved))| 53 | ((?!\d+)(?!Field)(?P\w+_(?=\s.*\n)))| 54 | ((?!\d+)(?!Field)(?P\w+)) 55 | ) 56 | """, re.M | re.X) 57 | 58 | def get_nextm(regexp, is_search=True): 59 | global m 60 | if is_search: 61 | tmp = regexp.search(chapter, m.end()) 62 | else: 63 | tmp = regexp.match(chapter, m.end()) 64 | if tmp: 65 | m = tmp 66 | return True 67 | else: 68 | return False 69 | 70 | def get_fldname(fieldname=str("")): 71 | if get_nextm(r_pagebreak, is_search=False): 72 | logger.debug("\t\tpagebreak") 73 | #logger.debug("matches: " + chapter[m.start():m.end()]) 74 | ret = get_nextm(r_fldname) 75 | if not ret == True: 76 | raise RuntimeError("cannot find fldname") 77 | if m.group("fldname_solo"): 78 | fieldname += m.group("fldname_solo") 79 | logger.debug("\t\tfieldname_solo: " + fieldname) 80 | return fieldname 81 | elif m.group("fldname_multi"): 82 | fieldname += m.group("fldname_multi") 83 | logger.debug("\t\tfieldname_multi: " + fieldname) 84 | return get_fldname(fieldname) 85 | else: 86 | logger.debug("\t\tfield: " + "--Reserved--") 87 | return False 88 | 89 | if __name__ == '__main__': 90 | args = argp.parse_args() 91 | 92 | if args.verbose: 93 | logger.setLevel(logging.DEBUG) 94 | 95 | d = popplerqt5.Poppler.Document.load(args.file.name) 96 | txt = "" 97 | for i in range(args.start - 1, args.end): 98 | txt = txt + d.page(i).text(QtCore.QRectF()) 99 | 100 | logger.debug("text from pdf: " + txt) 101 | 102 | # search n split chapters 103 | chapters = r_start.split(txt) 104 | chapters.pop(0) #drop garbage before first chapter 105 | 106 | for chapter in chapters: 107 | logger.debug("->chapter: " + chapter) 108 | 109 | # search register name 110 | m = r_name.match(chapter) 111 | if m == None: 112 | exit() 113 | regname = str(m.group("rname")) 114 | logger.debug("\tregister name: " + regname) 115 | 116 | # search register address 117 | if not get_nextm(r_adr): 118 | address = "FIXME" # can be defined like: "where i=0d to 3d" 119 | #raise RuntimeError("no address found") 120 | else: 121 | a1 = m.group("a1") 122 | a2 = m.group("a2") 123 | address = "0x" + str(a1) + str(a2) 124 | logger.debug("\taddress: " + address) 125 | logger.debug("") 126 | 127 | space = "\t" 128 | if len(regname) < 16: 129 | space += "\t" 130 | if len(regname) < 8: 131 | space += "\t" 132 | 133 | print(regname + space + address) 134 | 135 | # search bitdescription 136 | if not get_nextm(r_bitdescription): 137 | raise RuntimeError("no bitdescription found") 138 | 139 | # search bit number of field 140 | eb = None 141 | sb = None 142 | field = None 143 | while get_nextm(r_field): 144 | eb = m.group("endbit") 145 | sb = m.group("startbit") 146 | if sb is not None: 147 | field = eb + "-" + sb 148 | else: 149 | field = eb 150 | 151 | logger.debug("\t\tfield: " + field) 152 | 153 | # search its corresponding name 154 | fieldname = get_fldname() 155 | if fieldname: 156 | print("\t:" + fieldname + ":" + field) 157 | 158 | logger.debug("") 159 | 160 | # last name of bitfield can lack number of field 161 | if field is not None and "-0" in field or "0" is field: 162 | continue 163 | ending_fieldname = get_fldname() 164 | if not ending_fieldname: 165 | continue 166 | 167 | if sb is not None: 168 | field = str(int(sb) - 1) + "-" + "0" 169 | elif eb is not None: 170 | field = str(int(eb) - 1) + "-" + "0" 171 | elif sb is None and eb is None: 172 | field = "31" + "-" + "0" 173 | else: 174 | field = "0" 175 | 176 | if field: 177 | print("\t:" + ending_fieldname + ":" + field) 178 | 179 | -------------------------------------------------------------------------------- /src/Android.mk: -------------------------------------------------------------------------------- 1 | LOCAL_PATH:= $(call my-dir) 2 | include $(CLEAR_VARS) 3 | 4 | LOCAL_MODULE_TAGS := eng 5 | LOCAL_SRC_FILES:=devregs.cpp 6 | LOCAL_MODULE:=devregs 7 | LOCAL_CPPFLAGS += -DANDROID 8 | LOCAL_SHARED_LIBRARIES:=libutils libc libstdc++ 9 | LOCAL_C_INCLUDES += $(LOCAL_PATH) 10 | include $(BUILD_EXECUTABLE) 11 | 12 | 13 | -------------------------------------------------------------------------------- /src/Makefile.am: -------------------------------------------------------------------------------- 1 | bin_PROGRAMS = devregs 2 | devregs_SOURCES = devregs.cpp 3 | 4 | sysconf_DATA = $(top_srcdir)/dat/*.dat 5 | -------------------------------------------------------------------------------- /src/devregs.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * devregs - tool to display and modify a device's registers at runtime 3 | * 4 | * Use cases: 5 | * 6 | * devregs 7 | * - display all registers 8 | * 9 | * devregs register 10 | * - display all registers matching register (strcasestr) 11 | * 12 | * devregs register.field 13 | * - display all registers matching register (strcasestr) 14 | * - also break out specified field 15 | * 16 | * devregs register value 17 | * - set register to specified value (must match single register) 18 | * 19 | * devregs register.field value 20 | * - set register field to specified value (read/modify/write) 21 | * 22 | * Registers may be specified by name or 0xADDRESS. If specified by name, all 23 | * registers containing the pattern are considered. If multiple registers 24 | * match on a write request (2-parameter use cases), no write will be made. 25 | * 26 | * fields may be specified by name or bit numbers of the form "start[-end]" 27 | * 28 | * (c) Copyright 2010 by Boundary Devices under GPLv2 29 | * 30 | */ 31 | 32 | #include 33 | #include 34 | #include 35 | #include 36 | #include 37 | #include 38 | #include 39 | #include 40 | #include 41 | 42 | typedef off_t phys_addr_t; 43 | 44 | static bool word_access = false ; 45 | static int unsigned cpu_in_params = 0; 46 | static bool fancy_color_mode = false; 47 | static bool stdout_tty = isatty(STDOUT_FILENO); 48 | 49 | struct fieldDescription_t { 50 | char const *name ; 51 | unsigned startbit ; 52 | unsigned bitcount ; 53 | struct fieldDescription_t *next ; 54 | }; 55 | 56 | struct registerDescription_t { 57 | char const *name ; 58 | fieldDescription_t *fields ; 59 | }; 60 | 61 | struct reglist_t { 62 | phys_addr_t address ; 63 | unsigned width ; // # bytes in register 64 | struct registerDescription_t *reg ; 65 | struct fieldDescription_t *fields ; 66 | struct reglist_t *next ; 67 | }; 68 | 69 | struct fieldSet_t { 70 | char const *name ; 71 | struct fieldDescription_t *fields ; 72 | struct fieldSet_t *next ; 73 | }; 74 | 75 | static struct fieldSet_t *fieldsets = 0 ; 76 | 77 | /* 78 | * strips comments as well as skipping leading spaces 79 | */ 80 | char *skipSpaces(char *buf){ 81 | char *comment = strchr(buf,'#'); 82 | if (comment) 83 | *comment = '\0' ; 84 | comment = strstr(buf,"//"); 85 | if (comment) 86 | *comment = 0 ; 87 | while( *buf ){ 88 | if( isprint(*buf) && (' ' != *buf) ) 89 | break; 90 | buf++ ; 91 | } 92 | return buf ; 93 | } 94 | 95 | static void trimCtrl(char *buf){ 96 | char *tail = buf+strlen(buf); 97 | // trim trailing if needed 98 | while( tail > buf ){ 99 | --tail ; 100 | if( iscntrl(*tail) ){ 101 | *tail = '\0' ; 102 | } else 103 | break; 104 | } 105 | } 106 | 107 | static bool parseBits(char const *bitspec, unsigned &start, unsigned &count) 108 | { 109 | char *end ; 110 | unsigned startbit = strtoul(bitspec,&end,0); 111 | if( (31 >= startbit) 112 | && 113 | ( ('\0' == *end) 114 | || 115 | ('-' == *end) ) ){ 116 | unsigned endbit ; 117 | if( '-' == *end ){ 118 | endbit = strtoul(end+1,&end,0); 119 | if('\0' != *end){ 120 | endbit = ~startbit ; 121 | } 122 | } else { 123 | endbit = startbit ; 124 | } 125 | if(endbitname = fieldname ; 152 | f->startbit = start ; 153 | f->bitcount = count ; 154 | f->next = 0 ; 155 | return f ; 156 | } 157 | } else if( regs ){ 158 | struct fieldDescription_t *head = 0 ; 159 | struct fieldDescription_t *tail = 0 ; 160 | while( regs ){ 161 | if( regs->reg ){ 162 | struct fieldDescription_t *f = regs->reg->fields ; 163 | while( f ){ 164 | if( 0 == strcasecmp(f->name,fieldname) ){ 165 | struct fieldDescription_t *newf = new struct fieldDescription_t ; 166 | *newf = *f ; 167 | newf->next = 0 ; 168 | tail = newf ; 169 | if( 0 == head ) 170 | head = newf ; 171 | } 172 | f = f->next ; 173 | } 174 | } 175 | regs = regs->next ; 176 | } 177 | return head ; 178 | } else { 179 | fprintf(stderr, "Can't parse named fields without matching registers\n" ); 180 | } 181 | return 0 ; 182 | } 183 | 184 | /* 185 | * - Outer loop determines which type of line we're dealing with 186 | * based on the first character: 187 | * A-Za-z_ - Register: Name 0xADDRESS[.w|.l|.b] 188 | * : - Field :fieldname:startbit[-stopbit] 189 | * / - Field set /Fieldsetname 190 | * 191 | * state field is used to determine whether a field will be added to the 192 | * most recent register or fieldset. 193 | */ 194 | enum ftState { 195 | FT_UNKNOWN = -1, 196 | FT_REGISTER = 0, 197 | FT_FIELDSET = 1 198 | }; 199 | 200 | static char const *getDataPath(unsigned cpu) { 201 | switch (cpu & 0xff000) { 202 | case 0x63000: 203 | return "/etc/devregs_imx6q.dat" ; 204 | case 0x61000: 205 | return "/etc/devregs_imx6dls.dat" ; 206 | case 0x53000: 207 | return "/etc/devregs_imx53.dat" ; 208 | } 209 | switch (cpu) { 210 | case 0x10: 211 | return "/etc/devregs_imx6q.dat"; 212 | case 0x51: 213 | case 0x5: 214 | return "/etc/devregs_imx51.dat"; 215 | case 0x7: 216 | return "/etc/devregs_imx7d.dat"; 217 | case 0x81: 218 | return "/etc/devregs_imx8mq.dat"; 219 | case 0x82: 220 | return "/etc/devregs_imx8mm.dat"; 221 | default: 222 | printf("unsupported CPU type: %x\n", cpu); 223 | } 224 | return "/etc/devregs.dat" ; 225 | } 226 | 227 | static struct reglist_t const *registerDefs(unsigned cputype = 0){ 228 | static struct reglist_t *regs = 0 ; 229 | if( 0 == regs ){ 230 | struct reglist_t *head = 0, *tail = 0 ; 231 | const char *filename = getDataPath(cputype); 232 | FILE *fDefs = fopen(filename, "rt"); 233 | if( fDefs ){ 234 | enum ftState state = FT_UNKNOWN ; 235 | char inBuf[256]; 236 | int lineNum = 0 ; 237 | 238 | // printf("Using %s\n", filename); 239 | while( fgets(inBuf,sizeof(inBuf),fDefs) ){ 240 | lineNum++ ; 241 | // skip unprintables 242 | char *next = skipSpaces(inBuf); 243 | if( *next && ('#' != *next) ){ 244 | trimCtrl(next); 245 | } // not blank or comment 246 | if(isalpha(*next) || ('_' == *next)){ 247 | char *start = next++ ; 248 | while(isalnum(*next) || ('_' == *next)){ 249 | next++ ; 250 | } 251 | if(isspace(*next)){ 252 | char *end=next-1 ; 253 | next=skipSpaces(next); 254 | if(isxdigit(*next)){ 255 | char *addrEnd ; 256 | phys_addr_t addr = (phys_addr_t )strtoul(next,&addrEnd,16); 257 | unsigned width = 4 ; 258 | if( addrEnd && ('.' == *addrEnd) ){ 259 | char widthchar = tolower(addrEnd[1]); 260 | if('w' == widthchar) { 261 | width = 2 ; 262 | } else if( 'b' == widthchar) { 263 | width = 1 ; 264 | } else if( 'l' == widthchar) { 265 | width = 4 ; 266 | } 267 | else { 268 | fprintf(stderr, "Invalid width char %c on line number %u\n", widthchar, lineNum); 269 | continue; 270 | } 271 | addrEnd = addrEnd+2 ; 272 | } 273 | if( addrEnd && ('\0'==*addrEnd)){ 274 | unsigned namelen = end-start+1 ; 275 | char *name = (char *)malloc(namelen+1); 276 | memcpy(name,start,namelen); 277 | name[namelen] = '\0' ; 278 | struct reglist_t *newone = new reglist_t ; 279 | newone->address=addr ; 280 | newone->width = width ; 281 | newone->reg = new registerDescription_t ; 282 | newone->reg->name = name ; 283 | newone->reg->fields = newone->fields = 0 ; 284 | if(tail){ 285 | tail->next = newone ; 286 | } else 287 | head = newone ; 288 | tail = newone ; 289 | state = FT_REGISTER ; 290 | // printf( "%s: 0x%08lx, width %u\n", newone->reg->name, newone->address, newone->width); 291 | continue; 292 | } 293 | else 294 | fprintf(stderr, "expecting end of addr, not %c\n", addrEnd ? *addrEnd : '?' ); 295 | } 296 | else 297 | fprintf(stderr, "expecting hex digit, not %02x\n", (unsigned char)*next ); 298 | } 299 | fprintf(stderr, "%s: syntax error on line %u <%s>\n", filename, lineNum,next ); 300 | } else if((':' == *next) && (FT_UNKNOWN != state)) { 301 | next=skipSpaces(next+1); 302 | char *start = next++ ; 303 | while(isalnum(*next) || ('_' == *next)){ 304 | next++ ; 305 | } 306 | unsigned nameLen = next-start ; 307 | char *name = new char [nameLen+1]; 308 | memcpy(name,start,nameLen); 309 | name[nameLen] = 0 ; 310 | if( ':' == *next ){ 311 | struct fieldDescription_t *field = parseFields(tail,next+1); 312 | if(field){ 313 | field->name = name ; 314 | if (FT_REGISTER == state) { 315 | field->next = tail->fields ; 316 | tail->fields = field ; 317 | } else { 318 | field->next = fieldsets->fields ; 319 | fieldsets->fields = field ; 320 | } 321 | } else 322 | fprintf( stderr, "error parsing field at line %u\n", lineNum ); 323 | } else if (('/' == *next) && (FT_REGISTER == state)) { 324 | struct fieldSet_t const *fs = fieldsets ; 325 | while (fs) { 326 | if (0 == strcmp(fs->name,name)) 327 | break; 328 | fs = fs->next ; 329 | } 330 | if (fs) { 331 | if (tail->fields) { 332 | struct fieldDescription_t *back = tail->fields ; 333 | struct fieldDescription_t *front = back ; 334 | while(front) { 335 | back = front ; 336 | front = back->next ; 337 | } 338 | back->next = fs->fields ; 339 | } else 340 | tail->fields = fs->fields ; 341 | state = FT_UNKNOWN ; /* don't allow fields to be added */ 342 | } 343 | } else { 344 | fprintf( stderr, "missing field separator at line %u\n", lineNum ); 345 | } 346 | } else if ('/' == *next) { 347 | char *start = ++next ; 348 | while(isalnum(*next) || ('_' == *next)){ 349 | next++ ; 350 | } 351 | if ((start < next) && (isspace(*next) || ('\0'==*next))) { 352 | *next = '\0' ; 353 | struct fieldSet_t *fs = (struct fieldSet_t *)malloc(sizeof(struct fieldSet_t )); 354 | fs->name = strdup(start); 355 | fs->fields = 0 ; 356 | fs->next = fieldsets ; 357 | fieldsets = fs ; 358 | state = FT_FIELDSET ; 359 | } else 360 | fprintf(stderr,"Invalid fieldset name %s\n",start-1); 361 | } else if (*next && ('#' != *next)) { 362 | fprintf(stderr, "Unrecognized line <%s> at %u\n", next, lineNum ); 363 | } 364 | } 365 | fclose(fDefs); 366 | regs = head ; 367 | } else 368 | perror(filename); 369 | } 370 | return regs ; 371 | } 372 | 373 | static struct reglist_t const *parseRegisterSpec(char const *regname) 374 | { 375 | char const c = *regname ; 376 | 377 | if(isalpha(c) || ('_' == c)){ 378 | struct reglist_t *out = 0 ; 379 | struct reglist_t const *defs = registerDefs(); 380 | char *regPart = strdup(regname); 381 | char *fieldPart = strchr(regPart,'.'); 382 | bool widthspec = false ; 383 | unsigned fieldLen = 0 ; 384 | 385 | if (0 == fieldPart) { 386 | fieldPart = strchr(regPart,':'); 387 | widthspec = false ; 388 | } 389 | else 390 | widthspec = true ; 391 | if (fieldPart) { 392 | *fieldPart++ = '\0' ; 393 | fieldLen = strlen(fieldPart); 394 | } 395 | unsigned const nameLen = strlen(regname); 396 | while(defs){ 397 | if( 0 == strncasecmp(regPart,defs->reg->name,nameLen) ) { 398 | struct reglist_t *newOne = new struct reglist_t ; 399 | memcpy(newOne,defs,sizeof(*newOne)); 400 | if (fieldPart) { 401 | newOne->fields = 0 ; 402 | if (isdigit(*fieldPart)) { 403 | unsigned start, count ; 404 | if (parseBits(fieldPart,start,count)) { 405 | fieldDescription_t *newf = new struct fieldDescription_t ; 406 | newf->name = fieldPart ; 407 | newf->startbit = start ; 408 | newf->bitcount = count ; 409 | newf->next = 0 ; 410 | newOne->fields = newf ; 411 | } 412 | else 413 | return 0 ; 414 | } else { 415 | fieldDescription_t *rhs = defs->fields ; 416 | while (rhs) { 417 | if( 0 == strcasecmp(fieldPart,rhs->name) ) { 418 | fieldDescription_t *newf = new struct fieldDescription_t ; 419 | memcpy(newf,rhs,sizeof(*newf)); 420 | newf->next = newOne->fields ; 421 | newOne->fields = newf ; 422 | } 423 | rhs = rhs->next ; 424 | } 425 | } // search for named fields 426 | } // only copy specified field 427 | newOne->next = out ; 428 | out = newOne ; 429 | } 430 | defs = defs->next ; 431 | } 432 | free(regPart); 433 | return out ; 434 | } else if(isdigit(c)){ 435 | char *end ; 436 | phys_addr_t address = (phys_addr_t)strtoul(regname,&end,16); 437 | if( (0 == *end) || (':' == *end) || ('.' == *end) ){ 438 | struct fieldDescription_t *field = 0 ; 439 | unsigned start, count ; 440 | struct reglist_t *out = 0 ; 441 | struct reglist_t const *defs = registerDefs(); 442 | unsigned const nameLen = strlen(regname); 443 | while(defs){ 444 | if( defs->address == address ) { 445 | out = new struct reglist_t ; 446 | memcpy(out,defs,sizeof(*out)); 447 | out->next = 0 ; 448 | out->fields = field ; 449 | break; 450 | } 451 | defs = defs->next ; 452 | } 453 | 454 | if (':' == *end) { 455 | unsigned start, count ; 456 | if (parseBits(end+1,start,count)) { 457 | field = new struct fieldDescription_t ; 458 | field->name = end+1 ; 459 | field->startbit = start ; 460 | field->bitcount = count ; 461 | field->next = 0 ; 462 | } 463 | } 464 | struct fieldDescription_t *fields = 0 ; 465 | unsigned width = 4 ; 466 | if( '.' == *end ){ 467 | char widthchar=tolower(end[1]); 468 | if ('w' == widthchar) { 469 | width = 2 ; 470 | } else if ('b' == widthchar) { 471 | width = 1 ; 472 | } else if ('l' == widthchar) { 473 | width = 4 ; 474 | } else { 475 | fprintf( stderr, "Invalid width char <%c>\n", widthchar); 476 | } 477 | } 478 | if( 0 == out ){ 479 | out = new struct reglist_t ; 480 | out->address = address ; 481 | out->width = width ; 482 | out->reg = 0 ; 483 | out->fields = fields ; 484 | out->next = 0 ; 485 | } 486 | return out ; 487 | } else { 488 | fprintf( stderr, "Invalid register name or value '%s'. Use name or 0xHEX\n", regname ); 489 | } 490 | } else { 491 | fprintf( stderr, "Invalid register name or value '%s'. Use name or 0xHEX\n", regname ); 492 | } 493 | return 0 ; 494 | } 495 | 496 | static int getFd(void){ 497 | static int fd = -1 ; 498 | if( 0 > fd ){ 499 | fd = open("/dev/mem", O_RDWR | O_SYNC); 500 | if (fd<0) { 501 | perror("/dev/mem"); 502 | exit(1); 503 | } 504 | } 505 | return fd ; 506 | } 507 | 508 | #define MAP_SIZE 4096 509 | #define MAP_MASK ( MAP_SIZE - 1 ) 510 | 511 | static unsigned volatile *getReg(phys_addr_t addr){ 512 | static void *map = 0 ; 513 | static phys_addr_t prevPage = -1U ; 514 | unsigned offs = addr & MAP_MASK ; 515 | phys_addr_t page = addr - offs; 516 | if( page != prevPage ){ 517 | if( map ){ 518 | munmap(map,MAP_SIZE); 519 | } 520 | map = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, getFd(), page ); 521 | if( MAP_FAILED == map ){ 522 | perror("mmap"); 523 | exit(1); 524 | } 525 | prevPage = page ; 526 | } 527 | return (unsigned volatile *)((char *)map+offs); 528 | } 529 | 530 | static unsigned fieldVal(struct fieldDescription_t *f, unsigned v) 531 | { 532 | v >>= f->startbit ; 533 | v &= (1<bitcount)-1 ; 534 | return v ; 535 | } 536 | 537 | #define RED "\e[0;31m" 538 | #define GREEN "\e[1;32m" 539 | #define BLUE "\e[1;34m" 540 | #define YELLOW "\e[1;33m" 541 | #define CYAN "\e[0;36m" 542 | #define RST "\e[1;0m" 543 | #define COL(_color) (stdout_tty && fancy_color_mode ? _color : "") 544 | 545 | static void showReg(struct reglist_t const *reg) 546 | { 547 | unsigned rv ; 548 | unsigned volatile *regPtr = getReg(reg->address); 549 | if( 2 == reg->width ) { 550 | unsigned short volatile *p = (unsigned short volatile *)regPtr ; 551 | rv = *p ; 552 | printf( "%s:0x%08lx\t=0x%04x\n", reg->reg ? reg->reg->name : "", reg->address, rv ); 553 | } else if( 4 == reg->width ) { 554 | unsigned volatile *p = regPtr ; 555 | rv = *p ; 556 | printf( "%s:0x%08lx\t=0x%08x\n", reg->reg ? reg->reg->name : "", reg->address, rv ); 557 | } else if( 1 == reg->width ) { 558 | unsigned char volatile *p = (unsigned char volatile *)regPtr ; 559 | rv = *p ; 560 | printf( "%s:0x%08lx\t=0x%02x\n", reg->reg ? reg->reg->name : "", reg->address, rv ); 561 | } 562 | else { 563 | fprintf(stderr, "Unsupported width in register %s\n", reg->reg->name); 564 | return ; 565 | } 566 | fflush(stdout); 567 | struct fieldDescription_t *f = reg->fields ; 568 | while(f){ 569 | printf("\t%s%-16s%s", COL(CYAN), f->name, COL(RST)); 570 | printf("\t%s%2u-%2u%s", COL(BLUE), f->startbit, f->startbit+f->bitcount-1, COL(RST)); 571 | printf("\t=%s0x%x%s", fieldVal(f,rv) ? COL(YELLOW) : "", fieldVal(f,rv), COL(RST)); 572 | if (fancy_color_mode) { 573 | int len = f->bitcount; 574 | unsigned b = fieldVal(f,rv); 575 | printf("\t"); 576 | while (--len >= 0) { 577 | if ((b >> len) & 1) 578 | printf("%s%u%s", COL(GREEN), 1, COL(RST)); 579 | else 580 | printf("%s%u%s", COL(RED), 0, COL(RST)); 581 | } 582 | } 583 | printf("\n"); 584 | fflush(stdout); 585 | f=f->next ; 586 | } 587 | } 588 | 589 | static void putReg(struct reglist_t const *reg,unsigned value){ 590 | unsigned shift = 0 ; 591 | unsigned mask = 0xffffffff ; 592 | if (reg->fields) { 593 | // Only single field allowed 594 | if (0 == reg->fields->next) { 595 | shift = reg->fields->startbit ; 596 | mask = ((1<fields->bitcount)-1)<reg->name); 599 | return ; 600 | } 601 | } 602 | unsigned maxValue = mask >> shift ; 603 | if (value > maxValue) { 604 | fprintf(stderr, "Value 0x%x exceeds max 0x%x for register %s\n", value, maxValue, reg->reg->name); 605 | return ; 606 | } 607 | if( 1 == reg->width ){ 608 | unsigned char volatile * const rv = (unsigned char volatile *)getReg(reg->address); 609 | value = (*rv&~mask) | ((value<reg ? reg->reg->name : "", reg->address, *rv ); 611 | *rv = value ; 612 | } else if( 2 == reg->width ){ 613 | unsigned short volatile * const rv = (unsigned short volatile *)getReg(reg->address); 614 | value = (*rv&~mask) | ((value<reg ? reg->reg->name : "", reg->address, *rv ); 616 | *rv = value ; 617 | } else { 618 | unsigned volatile * const rv = getReg(reg->address); 619 | value = (*rv&~mask) | ((value<reg ? reg->reg->name : "", reg->address, *rv ); 621 | *rv = value ; 622 | } 623 | printf( "0x%08x\n", value ); 624 | } 625 | 626 | static void printUsage(void) { 627 | printf("Usage: devregs [-w] [-c CPUNAME]\n"); 628 | puts(" -w Using word access\n" 629 | " -f fancy color mode (-ff to force, for e.g. pipe to less -r)\n" 630 | " -c CPUNAME in case the revision is not readable in /proc/cpuinfo fixit manually with :\n" 631 | "\timx8mm\n" 632 | "\timx8mq\n" 633 | "\timx7d\n" 634 | "\timx6q\n" 635 | "\timx6dls\n" 636 | "\timx53\n" 637 | ); 638 | exit(1); 639 | } 640 | 641 | static void parseArgs( int &argc, char const **argv ) 642 | { 643 | int arg = 1; 644 | 645 | while (arg < argc) { 646 | char const *p = argv[arg]; 647 | if ('-' == *p++ ) { 648 | unsigned skip = 1; 649 | if ('w' == tolower(*p)) { 650 | word_access = true ; 651 | printf("Using word access\n" ); 652 | } else if ('f' == tolower(*p)) { 653 | fancy_color_mode = true ; 654 | printf("Using fancy color mode\n"); 655 | if(!strcmp(argv[arg], "-ff")) 656 | printf("Forcing fancy color mode\n"); 657 | stdout_tty = true; 658 | } else if ('c' == tolower(*p)) { 659 | p = argv[arg + skip]; 660 | if (!p){ 661 | fprintf(stderr,"Do not forget to specify CPUNAME\n"); 662 | printUsage(); 663 | } 664 | if(!strcmp(p, "imx6q")){ 665 | skip++; 666 | printf("Fixing cpu to %s\n","imx6q"); 667 | cpu_in_params = 0x63000; 668 | } else if(!strcmp(p, "imx6dls")) { 669 | skip++; 670 | printf("Fixing cpu to %s\n","imx6dls"); 671 | cpu_in_params = 0x61000; 672 | } else if(!strcmp(p, "imx53")) { 673 | skip++; 674 | printf("Fixing cpu to %s\n","imx53"); 675 | cpu_in_params = 0x53000; 676 | } else if(!strcmp(p, "imx7d")) { 677 | skip++; 678 | printf("Fixing cpu to %s\n","imx7d"); 679 | cpu_in_params = 0x7; 680 | } else if(!strcmp(p, "imx8mq")) { 681 | skip++; 682 | printf("Fixing cpu to %s\n","imx8mq"); 683 | cpu_in_params = 0x81; 684 | } else if(!strcmp(p, "imx8mm")) { 685 | skip++; 686 | printf("Fixing cpu to %s\n","imx8mm"); 687 | cpu_in_params = 0x82; 688 | } else { 689 | printf("Unable to interpret cpu name %s\n", p); 690 | printUsage(); 691 | } 692 | } else{ 693 | printf( "unknown option %s\n", p); 694 | printUsage(); 695 | } 696 | 697 | // pull from argument list 698 | argc -= skip; 699 | for (int j = arg; j < argc; j++) { 700 | argv[j] = argv[j + skip]; 701 | } 702 | continue; 703 | } 704 | arg++; 705 | } 706 | } 707 | 708 | 709 | static int get_rev(char * inBuf, const char* match, unsigned *pcpu) 710 | { 711 | int rc = -1; 712 | char *rev = strstr(inBuf, match); 713 | 714 | // printf("%s\n", inBuf); 715 | if (rev && (0 != (rev=strchr(rev, ':')))) { 716 | char *next = rev + 2; 717 | unsigned cpu = 0; 718 | while (isxdigit(*next)) { 719 | cpu <<= 4 ; 720 | unsigned char c = toupper(*next++); 721 | if (('0' <= c)&&('9' >= c)) { 722 | cpu |= (c-'0'); 723 | } else { 724 | cpu |= (10+(c-'A')); 725 | } 726 | } 727 | *pcpu = cpu; 728 | rc = 0; 729 | } 730 | return rc; 731 | } 732 | 733 | static int getcpu(unsigned &cpu, const char *path) { 734 | int processor_cnt = 0; 735 | cpu = 0 ; 736 | FILE *fIn = fopen(path, "r"); 737 | if (fIn) { 738 | char inBuf[512]; 739 | while (fgets(inBuf,sizeof(inBuf),fIn)) { 740 | if (strstr(inBuf, "i.MX7")) { 741 | cpu = 0x7; 742 | break; 743 | } 744 | if (strstr(inBuf, "i.MX51")) { 745 | cpu = 0x51; 746 | break; 747 | } 748 | if (strstr(inBuf, "i.MX8MQ")) { 749 | cpu = 0x81; 750 | break; 751 | } 752 | if (strstr(inBuf, "i.MX8MM")) { 753 | cpu = 0x82; 754 | break; 755 | } 756 | if (strstr(inBuf, "i.MX8MN")) { 757 | cpu = 0x82; 758 | break; 759 | } 760 | if (!get_rev(inBuf, "Revision", &cpu)) 761 | if (cpu != 0x10) 762 | break; 763 | if (!get_rev(inBuf, "revision", &cpu)) 764 | if ((cpu != 0x10) && (cpu != 5)) 765 | break; 766 | if (strstr(inBuf, "processor")) 767 | processor_cnt++; 768 | } 769 | fclose(fIn); 770 | } 771 | if ((cpu == 0x10) || !cpu) { 772 | if ((processor_cnt == 1) || (processor_cnt == 2)) 773 | cpu = 0x61000; 774 | else if (processor_cnt == 4) 775 | cpu = 0x63000; 776 | } 777 | return (0 != cpu); 778 | } 779 | 780 | int main(int argc, char const **argv) 781 | { 782 | unsigned cpu ; 783 | unsigned parse_arguments = 1; 784 | 785 | parseArgs(argc,argv); 786 | if (!cpu_in_params && !getcpu(cpu, "/sys/devices/soc0/soc_id") && 787 | !getcpu(cpu, "/proc/cpuinfo")) { 788 | fprintf(stderr, "Error reading CPU type\n"); 789 | fprintf(stderr, "Try to fixit using -c option\n"); 790 | return -1 ; 791 | } 792 | if (cpu_in_params) 793 | cpu = cpu_in_params; 794 | //printf( "CPU type is 0x%x\n", cpu); 795 | registerDefs(cpu); 796 | if( 1 == argc ){ 797 | struct reglist_t const *defs = registerDefs(); 798 | while(defs){ 799 | showReg(defs); 800 | defs = defs->next ; 801 | } 802 | } else { 803 | struct reglist_t const *regs = parseRegisterSpec(argv[parse_arguments]); 804 | if( regs ){ 805 | if( 2 == (argc-parse_arguments+1) ){ 806 | while( regs ){ 807 | showReg(regs); 808 | regs = regs->next ; 809 | } 810 | } else { 811 | char *end ; 812 | unsigned value = strtoul(argv[1+parse_arguments],&end,16); 813 | if( '\0' == *end ){ 814 | while( regs ){ 815 | showReg(regs); 816 | putReg(regs,value); 817 | regs = regs->next ; 818 | } 819 | } else 820 | fprintf( stderr, "Invalid value '%s', use hex\n", argv[1+parse_arguments] ); 821 | } 822 | } else 823 | fprintf (stderr, "Nothing matched %s\n", argv[parse_arguments]); 824 | } 825 | return 1; 826 | } 827 | --------------------------------------------------------------------------------