├── .gitattributes ├── .github └── workflows │ ├── kibot.yml │ └── pages.yml ├── .gitignore ├── LICENSE ├── LanguageCard.kibot.yaml ├── LanguageCard.kicad_pcb ├── LanguageCard.kicad_pro ├── LanguageCard.kicad_sch ├── LanguageCard.pdf ├── LanguageCard.png ├── README.md ├── bom ├── LanguageCard_0.html ├── LanguageCard_2.html ├── LanguageCard_3.html └── index.html ├── fp-lib-table ├── gerbers_3.zip ├── ibom.config.ini └── sym-lib-table /.gitattributes: -------------------------------------------------------------------------------- 1 | # Auto detect text files and perform LF normalization 2 | * text=auto 3 | -------------------------------------------------------------------------------- /.github/workflows/kibot.yml: -------------------------------------------------------------------------------- 1 | name: KiCad CI/CD 2 | 3 | on: 4 | workflow_dispatch: 5 | push: 6 | paths: 7 | - '**.sch' 8 | - '**.kicad_pcb' 9 | pull_request: 10 | paths: 11 | - '**.sch' 12 | - '**.kicad_pcb' 13 | 14 | jobs: 15 | LanguageCard: 16 | runs-on: ubuntu-latest 17 | 18 | steps: 19 | - name: Get repo 20 | uses: actions/checkout@v3 21 | with: 22 | # So we can run a diff between last 2 changes 23 | fetch-depth: '0' 24 | 25 | - name: Run KiBot 26 | uses: INTI-CMNB/KiBot@v2_k6 27 | with: 28 | config: LanguageCard.kibot.yaml 29 | schema: LanguageCard.kicad_sch 30 | board: LanguageCard.kicad_pcb 31 | 32 | - name: Upload results 33 | uses: actions/upload-artifact@v2 34 | with: 35 | name: Automatic_outputs 36 | path: Generated 37 | -------------------------------------------------------------------------------- /.github/workflows/pages.yml: -------------------------------------------------------------------------------- 1 | # Simple workflow for deploying static content to GitHub Pages 2 | name: Deploy static content to Pages 3 | 4 | on: 5 | # Runs on pushes targeting the default branch 6 | push: 7 | branches: ["main"] 8 | 9 | # Allows you to run this workflow manually from the Actions tab 10 | workflow_dispatch: 11 | 12 | # Sets permissions of the GITHUB_TOKEN to allow deployment to GitHub Pages 13 | permissions: 14 | contents: read 15 | pages: write 16 | id-token: write 17 | 18 | # Allow one concurrent deployment 19 | concurrency: 20 | group: "pages" 21 | cancel-in-progress: true 22 | 23 | jobs: 24 | # Single deploy job since we're just deploying 25 | deploy: 26 | environment: 27 | name: github-pages 28 | url: ${{ steps.deployment.outputs.page_url }} 29 | runs-on: ubuntu-latest 30 | steps: 31 | - name: Checkout 32 | uses: actions/checkout@v3 33 | - name: Setup Pages 34 | uses: actions/configure-pages@v1 35 | - name: Upload artifact 36 | uses: actions/upload-pages-artifact@v1 37 | with: 38 | # Upload entire repository 39 | path: '.' 40 | - name: Deploy to GitHub Pages 41 | id: deployment 42 | uses: actions/deploy-pages@main 43 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # For PCBs designed using KiCad: https://www.kicad.org/ 2 | # Format documentation: https://kicad.org/help/file-formats/ 3 | 4 | # Temporary files 5 | *.000 6 | *.bak 7 | *.bck 8 | *.kicad_pcb-bak 9 | *.kicad_sch-bak 10 | *-backups 11 | *.kicad_prl 12 | *.sch-bak 13 | *~ 14 | _autosave-* 15 | *.tmp 16 | *-save.pro 17 | *-save.kicad_pcb 18 | fp-info-cache 19 | 20 | # Netlist files (exported from Eeschema) 21 | *.net 22 | 23 | # Autorouter files (exported from Pcbnew) 24 | *.dsn 25 | *.ses 26 | 27 | # Exported BOM files 28 | *.xml 29 | *.csv 30 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | Apache License 2 | Version 2.0, January 2004 3 | http://www.apache.org/licenses/ 4 | 5 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION 6 | 7 | 1. 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-------------------------------------------------------------------------------- 1 | kibot: 2 | version: 1 3 | 4 | global: 5 | filters: 6 | - number: 1007 7 | - number: 1015 8 | - number: 58 9 | 10 | filters: 11 | - name: only_jlc_parts 12 | comment: Only parts with JLC (LCSC) code 13 | type: generic 14 | include_only: 15 | - column: LCSC# 16 | regex: ^C\d+ 17 | 18 | variants: 19 | - name: place_holder 20 | comment: Just a place holder for pre_transform filters 21 | type: kicost 22 | pre_transform: 23 | - _kicost_rename 24 | - _rot_footprint 25 | 26 | preflight: 27 | run_drc: true 28 | run_erc: true 29 | 30 | outputs: 31 | - name: basic_boardview 32 | comment: Board View export 33 | type: boardview 34 | dir: Assembly 35 | - name: generic_bom_html 36 | comment: Generic Bill of Materials in HTML format 37 | type: bom 38 | dir: BoM/Generic 39 | options: 40 | format: HTML 41 | count_smd_tht: true 42 | - name: generic_bom_csv 43 | comment: Generic Bill of Materials in CSV format 44 | type: bom 45 | dir: BoM/Generic 46 | options: 47 | format: CSV 48 | count_smd_tht: true 49 | - name: generic_bom_txt 50 | comment: Generic Bill of Materials in TXT format 51 | type: bom 52 | dir: BoM/Generic 53 | options: 54 | format: TXT 55 | count_smd_tht: true 56 | - name: generic_bom_tsv 57 | comment: Generic Bill of Materials in TSV format 58 | type: bom 59 | dir: BoM/Generic 60 | options: 61 | format: TSV 62 | count_smd_tht: true 63 | - name: generic_bom_xml 64 | comment: Generic Bill of Materials in XML format 65 | type: bom 66 | dir: BoM/Generic 67 | options: 68 | format: XML 69 | count_smd_tht: true 70 | - name: generic_bom_xlsx 71 | comment: Generic Bill of Materials in XLSX format 72 | type: bom 73 | dir: BoM/Generic 74 | options: 75 | format: XLSX 76 | count_smd_tht: true 77 | - name: positional_bom_html 78 | comment: Positional Bill of Materials in HTML format 79 | type: bom 80 | dir: BoM/Positional 81 | options: 82 | format: HTML 83 | columns: &id001 84 | - Row 85 | - Description 86 | - Part 87 | - Part Lib 88 | - References 89 | - Value 90 | - Footprint 91 | - Footprint Lib 92 | - Quantity Per PCB 93 | - Build Quantity 94 | - Status 95 | - Datasheet 96 | - Sheetpath 97 | - Source BoM 98 | - Footprint X 99 | - Footprint Y 100 | - Footprint Rot 101 | - Footprint Side 102 | - Footprint Type 103 | - Footprint Populate 104 | - Footprint X-Size 105 | - Footprint Y-Size 106 | count_smd_tht: true 107 | html: 108 | style: modern-red 109 | - name: positional_bom_xlsx 110 | comment: Positional Bill of Materials in XLSX format 111 | type: bom 112 | dir: BoM/Positional 113 | options: 114 | format: XLSX 115 | columns: *id001 116 | count_smd_tht: true 117 | xlsx: 118 | style: modern-red 119 | - name: costs_bom_xlsx 120 | comment: Costs Bill of Materials in XLSX format 121 | type: bom 122 | dir: BoM/Costs 123 | options: 124 | format: XLSX 125 | count_smd_tht: true 126 | xlsx: 127 | style: modern-green 128 | kicost: true 129 | specs: true 130 | variant: place_holder 131 | - name: macrofab_xyrs 132 | comment: Pick and place file, XYRS style 133 | type: bom 134 | options: 135 | variant: place_holder 136 | output: '%f_MacroFab.XYRS' 137 | units: mils 138 | group_fields: [] 139 | sort_style: ref 140 | use_aux_axis_as_origin: true 141 | ignore_dnf: false 142 | footprint_populate_values: 0,1 143 | footprint_type_values: 1,2,0 144 | csv: 145 | separator: "\t" 146 | hide_pcb_info: true 147 | hide_stats_info: true 148 | hide_header: true 149 | columns: 150 | - field: References 151 | name: Designator 152 | - field: Footprint X 153 | name: X-Loc 154 | - field: Footprint Y 155 | name: Y-Loc 156 | - field: Footprint Rot 157 | name: Rotation 158 | - field: Footprint Side 159 | name: Side 160 | - field: Footprint Type 161 | name: Type 162 | - field: Footprint X-Size 163 | name: X-Size 164 | - field: Footprint Y-Size 165 | name: Y-Size 166 | - field: Value 167 | - field: Footprint 168 | - field: Footprint Populate 169 | name: Populate 170 | dir: Position 171 | - name: basic_diff_pcb 172 | comment: PCB diff between the last two changes 173 | type: diff 174 | dir: diff 175 | layers: 176 | - layer: F.Cu 177 | suffix: F_Cu 178 | description: Front copper 179 | - layer: B.Cu 180 | suffix: B_Cu 181 | description: Bottom copper 182 | - layer: F.Silkscreen 183 | suffix: F_Silkscreen 184 | description: Front silkscreen (artwork) 185 | - layer: B.Mask 186 | suffix: B_Mask 187 | description: Bottom soldermask (negative) 188 | - layer: F.Mask 189 | suffix: F_Mask 190 | description: Front soldermask (negative) 191 | - layer: Edge.Cuts 192 | suffix: Edge_Cuts 193 | description: Board shape 194 | - layer: F.Courtyard 195 | suffix: F_Courtyard 196 | description: Front courtyard area 197 | - layer: F.Fab 198 | suffix: F_Fab 199 | description: Front documentation 200 | options: 201 | old: KIBOT_LAST-1 202 | old_type: git 203 | new: HEAD 204 | new_type: git 205 | cache_dir: /Users/bradleyb/Google Drive/workshop/Apple II/16k/LanguageCard/.cache 206 | add_link_id: true 207 | - name: basic_diff_sch 208 | comment: Schematic diff between the last two changes 209 | type: diff 210 | dir: diff 211 | options: 212 | old: KIBOT_LAST-1 213 | old_type: git 214 | new: HEAD 215 | new_type: git 216 | cache_dir: /Users/bradleyb/Google Drive/workshop/Apple II/16k/LanguageCard/.cache 217 | add_link_id: true 218 | pcb: false 219 | - name: basic_download_datasheets 220 | comment: Download the datasheets 221 | type: download_datasheets 222 | dir: Datasheets 223 | - name: basic_dxf 224 | comment: Individual layers in DXF format 225 | type: dxf 226 | dir: Individual_Layers/DXF 227 | layers: 228 | - layer: F.Cu 229 | suffix: F_Cu 230 | description: Front copper 231 | - layer: B.Cu 232 | suffix: B_Cu 233 | description: Bottom copper 234 | - layer: F.Silkscreen 235 | suffix: F_Silkscreen 236 | description: Front silkscreen (artwork) 237 | - layer: B.Mask 238 | suffix: B_Mask 239 | description: Bottom soldermask (negative) 240 | - layer: F.Mask 241 | suffix: F_Mask 242 | description: Front soldermask (negative) 243 | - layer: Edge.Cuts 244 | suffix: Edge_Cuts 245 | description: Board shape 246 | - layer: F.Courtyard 247 | suffix: F_Courtyard 248 | description: Front courtyard area 249 | - layer: F.Fab 250 | suffix: F_Fab 251 | description: Front documentation 252 | - name: basic_excellon 253 | comment: Drill files in EXCELLON format 254 | type: excellon 255 | dir: Gerbers_and_Drill 256 | options: 257 | map: pdf 258 | - name: basic_gencad 259 | comment: PCB in GenCAD format 260 | type: gencad 261 | dir: Export 262 | - name: basic_gerb_drill 263 | comment: Drill files in GERB_DRILL format 264 | type: gerb_drill 265 | dir: Gerbers_and_Drill 266 | options: 267 | map: gerber 268 | - name: gerber_modern 269 | comment: Gerbers in modern format, recommended by the standard 270 | type: gerber 271 | dir: Gerbers_and_Drill 272 | layers: 273 | - layer: F.Cu 274 | suffix: F_Cu 275 | description: Front copper 276 | - layer: B.Cu 277 | suffix: B_Cu 278 | description: Bottom copper 279 | - layer: F.Silkscreen 280 | suffix: F_Silkscreen 281 | description: Front silkscreen (artwork) 282 | - layer: B.Mask 283 | suffix: B_Mask 284 | description: Bottom soldermask (negative) 285 | - layer: F.Mask 286 | suffix: F_Mask 287 | description: Front soldermask (negative) 288 | - layer: Edge.Cuts 289 | suffix: Edge_Cuts 290 | description: Board shape 291 | - layer: F.Courtyard 292 | suffix: F_Courtyard 293 | description: Front courtyard area 294 | - layer: F.Fab 295 | suffix: F_Fab 296 | description: Front documentation 297 | - name: Elecrow_gerbers 298 | comment: Gerbers compatible with Elecrow 299 | type: gerber 300 | dir: Manufacturers/Elecrow 301 | options: 302 | exclude_edge_layer: true 303 | exclude_pads_from_silkscreen: true 304 | plot_sheet_reference: false 305 | plot_footprint_refs: true 306 | plot_footprint_values: true 307 | force_plot_invisible_refs_vals: false 308 | tent_vias: true 309 | use_protel_extensions: true 310 | create_gerber_job_file: false 311 | output: '%f.%x' 312 | gerber_precision: 4.6 313 | use_gerber_x2_attributes: false 314 | use_gerber_net_attributes: false 315 | disable_aperture_macros: true 316 | line_width: 0.1 317 | uppercase_extensions: true 318 | subtract_mask_from_silk: true 319 | inner_extension_pattern: .g%n 320 | edge_cut_extension: .gml 321 | layers: &id002 322 | - layer: F.Cu 323 | suffix: F_Cu 324 | description: Front copper 325 | - layer: B.Cu 326 | suffix: B_Cu 327 | description: Bottom copper 328 | - layer: F.Silkscreen 329 | suffix: F_Silkscreen 330 | description: Front silkscreen (artwork) 331 | - layer: B.Mask 332 | suffix: B_Mask 333 | description: Bottom soldermask (negative) 334 | - layer: F.Mask 335 | suffix: F_Mask 336 | description: Front soldermask (negative) 337 | - layer: Edge.Cuts 338 | suffix: Edge_Cuts 339 | description: Board shape 340 | - name: Elecrow_drill 341 | comment: Drill files compatible with Elecrow 342 | type: excellon 343 | dir: Manufacturers/Elecrow 344 | options: 345 | pth_and_npth_single_file: false 346 | pth_id: '' 347 | npth_id: -NPTH 348 | output: '%f%i.TXT' 349 | - name: Elecrow 350 | comment: ZIP file for Elecrow 351 | type: compress 352 | dir: Manufacturers 353 | options: 354 | files: 355 | - from_output: Elecrow_gerbers 356 | dest: / 357 | - from_output: Elecrow_drill 358 | dest: / 359 | - name: FusionPCB_gerbers 360 | comment: Gerbers compatible with FusionPCB 361 | type: gerber 362 | dir: Manufacturers/FusionPCB 363 | options: 364 | exclude_edge_layer: true 365 | exclude_pads_from_silkscreen: true 366 | plot_sheet_reference: false 367 | plot_footprint_refs: true 368 | plot_footprint_values: true 369 | force_plot_invisible_refs_vals: false 370 | tent_vias: true 371 | use_protel_extensions: true 372 | create_gerber_job_file: false 373 | output: '%f.%x' 374 | gerber_precision: 4.6 375 | use_gerber_x2_attributes: false 376 | use_gerber_net_attributes: false 377 | disable_aperture_macros: true 378 | line_width: 0.1 379 | uppercase_extensions: true 380 | subtract_mask_from_silk: false 381 | use_aux_axis_as_origin: true 382 | inner_extension_pattern: .gl%N 383 | edge_cut_extension: .gml 384 | layers: *id002 385 | - name: FusionPCB_drill 386 | comment: Drill files compatible with FusionPCB 387 | type: excellon 388 | dir: Manufacturers/FusionPCB 389 | options: 390 | pth_and_npth_single_file: true 391 | use_aux_axis_as_origin: true 392 | output: '%f.TXT' 393 | - name: FusionPCB 394 | comment: ZIP file for FusionPCB 395 | type: compress 396 | dir: Manufacturers 397 | options: 398 | files: 399 | - from_output: FusionPCB_gerbers 400 | dest: / 401 | - from_output: FusionPCB_drill 402 | dest: / 403 | - name: PCBWay_gerbers 404 | comment: Gerbers compatible with PCBWay 405 | type: gerber 406 | dir: Manufacturers/PCBWay 407 | options: 408 | exclude_edge_layer: true 409 | exclude_pads_from_silkscreen: true 410 | plot_sheet_reference: false 411 | plot_footprint_refs: true 412 | plot_footprint_values: true 413 | force_plot_invisible_refs_vals: false 414 | tent_vias: true 415 | use_protel_extensions: true 416 | create_gerber_job_file: false 417 | output: '%f.%x' 418 | gerber_precision: 4.6 419 | use_gerber_x2_attributes: false 420 | use_gerber_net_attributes: false 421 | disable_aperture_macros: true 422 | line_width: 0.1 423 | subtract_mask_from_silk: false 424 | inner_extension_pattern: .gl%N 425 | layers: *id002 426 | - name: PCBWay_drill 427 | comment: Drill files compatible with PCBWay 428 | type: excellon 429 | dir: Manufacturers/PCBWay 430 | options: 431 | metric_units: false 432 | minimal_header: true 433 | zeros_format: SUPPRESS_LEADING 434 | left_digits: 2 435 | right_digits: 4 436 | pth_and_npth_single_file: false 437 | pth_id: '' 438 | npth_id: -NPTH 439 | output: '%f%i.drl' 440 | - name: PCBWay 441 | comment: ZIP file for PCBWay 442 | type: compress 443 | dir: Manufacturers 444 | options: 445 | format: ZIP 446 | files: 447 | - from_output: PCBWay_gerbers 448 | dest: / 449 | - from_output: PCBWay_drill 450 | dest: / 451 | - name: JLCPCB_gerbers 452 | comment: Gerbers compatible with JLCPCB 453 | type: gerber 454 | dir: Manufacturers/JLCPCB 455 | options: 456 | exclude_edge_layer: true 457 | exclude_pads_from_silkscreen: true 458 | plot_sheet_reference: false 459 | plot_footprint_refs: true 460 | plot_footprint_values: false 461 | force_plot_invisible_refs_vals: false 462 | tent_vias: true 463 | use_protel_extensions: true 464 | create_gerber_job_file: false 465 | disable_aperture_macros: true 466 | gerber_precision: 4.6 467 | use_gerber_x2_attributes: false 468 | use_gerber_net_attributes: false 469 | line_width: 0.1 470 | subtract_mask_from_silk: true 471 | inner_extension_pattern: .gp%n 472 | layers: *id002 473 | - name: JLCPCB_drill 474 | comment: Drill files compatible with JLCPCB 475 | type: excellon 476 | dir: Manufacturers/JLCPCB 477 | options: 478 | pth_and_npth_single_file: false 479 | pth_id: -PTH 480 | npth_id: -NPTH 481 | metric_units: true 482 | map: gerber 483 | route_mode_for_oval_holes: false 484 | output: '%f%i.%x' 485 | - name: JLCPCB_position 486 | comment: Pick and place file, JLCPCB style 487 | type: position 488 | dir: Manufacturers/JLCPCB 489 | options: 490 | variant: place_holder 491 | output: '%f_cpl_jlc.%x' 492 | format: CSV 493 | units: millimeters 494 | separate_files_for_front_and_back: false 495 | only_smd: true 496 | columns: 497 | - id: Ref 498 | name: Designator 499 | - Val 500 | - Package 501 | - id: PosX 502 | name: Mid X 503 | - id: PosY 504 | name: Mid Y 505 | - id: Rot 506 | name: Rotation 507 | - id: Side 508 | name: Layer 509 | - name: JLCPCB_bom 510 | comment: BoM for JLCPCB 511 | type: bom 512 | dir: Manufacturers/JLCPCB 513 | options: 514 | output: '%f_%i_jlc.%x' 515 | exclude_filter: only_jlc_parts 516 | ref_separator: ',' 517 | columns: 518 | - field: Value 519 | name: Comment 520 | - field: References 521 | name: Designator 522 | - Footprint 523 | - field: LCSC# 524 | name: 'LCSC Part #' 525 | csv: 526 | hide_pcb_info: true 527 | hide_stats_info: true 528 | quote_all: true 529 | - name: JLCPCB 530 | comment: ZIP file for JLCPCB 531 | type: compress 532 | dir: Manufacturers 533 | options: 534 | files: 535 | - from_output: JLCPCB_gerbers 536 | dest: / 537 | - from_output: JLCPCB_drill 538 | dest: / 539 | - from_output: JLCPCB_position 540 | dest: / 541 | - from_output: JLCPCB_bom 542 | dest: / 543 | - name: basic_hpgl 544 | comment: Individual layers in HPGL format 545 | type: hpgl 546 | dir: Individual_Layers/HPGL 547 | layers: 548 | - layer: F.Cu 549 | suffix: F_Cu 550 | description: Front copper 551 | - layer: B.Cu 552 | suffix: B_Cu 553 | description: Bottom copper 554 | - layer: F.Silkscreen 555 | suffix: F_Silkscreen 556 | description: Front silkscreen (artwork) 557 | - layer: B.Mask 558 | suffix: B_Mask 559 | description: Bottom soldermask (negative) 560 | - layer: F.Mask 561 | suffix: F_Mask 562 | description: Front soldermask (negative) 563 | - layer: Edge.Cuts 564 | suffix: Edge_Cuts 565 | description: Board shape 566 | - layer: F.Courtyard 567 | suffix: F_Courtyard 568 | description: Front courtyard area 569 | - layer: F.Fab 570 | suffix: F_Fab 571 | description: Front documentation 572 | - name: basic_ibom 573 | comment: Interactive HTML BoM 574 | type: ibom 575 | dir: Assembly 576 | - name: basic_info 577 | comment: Information about the run 578 | type: info 579 | dir: . 580 | - name: basic_navigate_results 581 | comment: Web page to browse the results 582 | type: navigate_results 583 | dir: Browse 584 | options: 585 | link_from_root: index.html 586 | - name: classic_netlist 587 | comment: Schematic netlist in KiCad format 588 | type: netlist 589 | dir: Export 590 | - name: ipc_netlist 591 | comment: IPC-D-356 netlist for testing 592 | type: netlist 593 | dir: Export 594 | options: 595 | format: ipc 596 | - name: basic_pcb_print_pdf 597 | comment: PCB 598 | type: pcb_print 599 | dir: PCB/PDF 600 | options: 601 | format: PDF 602 | pages: 603 | - layers: 604 | - layer: F.Cu 605 | - layer: F.Mask 606 | color: '#14332440' 607 | - layer: F.Silkscreen 608 | - layer: Edge.Cuts 609 | sheet: Front copper 610 | - layers: 611 | - layer: B.Cu 612 | - layer: B.Mask 613 | color: '#14332440' 614 | - layer: Edge.Cuts 615 | mirror: true 616 | sheet: Bottom copper 617 | - layers: 618 | - layer: F.Courtyard 619 | - layer: Edge.Cuts 620 | sheet: Front courtyard area 621 | - layers: 622 | - layer: F.Fab 623 | - layer: Edge.Cuts 624 | sheet: Front documentation 625 | keep_temporal_files: true 626 | - name: basic_pcb_print_svg 627 | comment: PCB 628 | type: pcb_print 629 | dir: PCB/SVG 630 | options: 631 | format: SVG 632 | pages: 633 | - layers: 634 | - layer: F.Cu 635 | - layer: F.Mask 636 | color: '#14332440' 637 | - layer: F.Silkscreen 638 | - layer: Edge.Cuts 639 | sheet: Front copper 640 | - layers: 641 | - layer: B.Cu 642 | - layer: B.Mask 643 | color: '#14332440' 644 | - layer: Edge.Cuts 645 | mirror: true 646 | sheet: Bottom copper 647 | - layers: 648 | - layer: F.Courtyard 649 | - layer: Edge.Cuts 650 | sheet: Front courtyard area 651 | - layers: 652 | - layer: F.Fab 653 | - layer: Edge.Cuts 654 | sheet: Front documentation 655 | keep_temporal_files: true 656 | add_background: true 657 | - name: basic_pcb_print_png 658 | comment: PCB 659 | type: pcb_print 660 | dir: PCB/PNG 661 | options: 662 | format: PNG 663 | pages: 664 | - layers: 665 | - layer: F.Cu 666 | - layer: F.Mask 667 | color: '#14332440' 668 | - layer: F.Silkscreen 669 | - layer: Edge.Cuts 670 | sheet: Front copper 671 | - layers: 672 | - layer: B.Cu 673 | - layer: B.Mask 674 | color: '#14332440' 675 | - layer: Edge.Cuts 676 | mirror: true 677 | sheet: Bottom copper 678 | - layers: 679 | - layer: F.Courtyard 680 | - layer: Edge.Cuts 681 | sheet: Front courtyard area 682 | - layers: 683 | - layer: F.Fab 684 | - layer: Edge.Cuts 685 | sheet: Front documentation 686 | keep_temporal_files: true 687 | add_background: true 688 | - name: basic_pcb_print_eps 689 | comment: PCB 690 | type: pcb_print 691 | dir: PCB/EPS 692 | options: 693 | format: EPS 694 | pages: 695 | - layers: 696 | - layer: F.Cu 697 | - layer: F.Mask 698 | color: '#14332440' 699 | - layer: F.Silkscreen 700 | - layer: Edge.Cuts 701 | sheet: Front copper 702 | - layers: 703 | - layer: B.Cu 704 | - layer: B.Mask 705 | color: '#14332440' 706 | - layer: Edge.Cuts 707 | mirror: true 708 | sheet: Bottom copper 709 | - layers: 710 | - layer: F.Courtyard 711 | - layer: Edge.Cuts 712 | sheet: Front courtyard area 713 | - layers: 714 | - layer: F.Fab 715 | - layer: Edge.Cuts 716 | sheet: Front documentation 717 | keep_temporal_files: true 718 | - name: basic_pcb_print_ps 719 | comment: PCB 720 | type: pcb_print 721 | dir: PCB/PS 722 | options: 723 | format: PS 724 | pages: 725 | - layers: 726 | - layer: F.Cu 727 | - layer: F.Mask 728 | color: '#14332440' 729 | - layer: F.Silkscreen 730 | - layer: Edge.Cuts 731 | sheet: Front copper 732 | - layers: 733 | - layer: B.Cu 734 | - layer: B.Mask 735 | color: '#14332440' 736 | - layer: Edge.Cuts 737 | mirror: true 738 | sheet: Bottom copper 739 | - layers: 740 | - layer: F.Courtyard 741 | - layer: Edge.Cuts 742 | sheet: Front courtyard area 743 | - layers: 744 | - layer: F.Fab 745 | - layer: Edge.Cuts 746 | sheet: Front documentation 747 | keep_temporal_files: true 748 | - name: basic_pcbdraw_svg_jlcpcb_green_enig_top 749 | comment: PCB 2D render in SVG format, using jlcpcb-green-enig style 750 | type: pcbdraw 751 | dir: PCB/2D_render/jlcpcb_green_enig 752 | options: 753 | style: jlcpcb-green-enig 754 | format: svg 755 | - name: basic_pcbdraw_png_jlcpcb_green_enig_top 756 | comment: PCB 2D render in PNG format, using jlcpcb-green-enig style 757 | type: pcbdraw 758 | dir: PCB/2D_render/jlcpcb_green_enig 759 | options: 760 | style: jlcpcb-green-enig 761 | format: png 762 | - name: basic_pcbdraw_jpg_jlcpcb_green_enig_top 763 | comment: PCB 2D render in JPG format, using jlcpcb-green-enig style 764 | type: pcbdraw 765 | dir: PCB/2D_render/jlcpcb_green_enig 766 | options: 767 | style: jlcpcb-green-enig 768 | format: jpg 769 | - name: basic_pcbdraw_svg_set_blue_enig_top 770 | comment: PCB 2D render in SVG format, using set-blue-enig style 771 | type: pcbdraw 772 | dir: PCB/2D_render/set_blue_enig 773 | options: 774 | style: set-blue-enig 775 | format: svg 776 | - name: basic_pcbdraw_png_set_blue_enig_top 777 | comment: PCB 2D render in PNG format, using set-blue-enig style 778 | type: pcbdraw 779 | dir: PCB/2D_render/set_blue_enig 780 | options: 781 | style: set-blue-enig 782 | format: png 783 | - name: basic_pcbdraw_jpg_set_blue_enig_top 784 | comment: PCB 2D render in JPG format, using set-blue-enig style 785 | type: pcbdraw 786 | dir: PCB/2D_render/set_blue_enig 787 | options: 788 | style: set-blue-enig 789 | format: jpg 790 | - name: basic_pcbdraw_svg_set_red_hasl_top 791 | comment: PCB 2D render in SVG format, using set-red-hasl style 792 | type: pcbdraw 793 | dir: PCB/2D_render/set_red_hasl 794 | options: 795 | style: set-red-hasl 796 | format: svg 797 | - name: basic_pcbdraw_png_set_red_hasl_top 798 | comment: PCB 2D render in PNG format, using set-red-hasl style 799 | type: pcbdraw 800 | dir: PCB/2D_render/set_red_hasl 801 | options: 802 | style: set-red-hasl 803 | format: png 804 | - name: basic_pcbdraw_jpg_set_red_hasl_top 805 | comment: PCB 2D render in JPG format, using set-red-hasl style 806 | type: pcbdraw 807 | dir: PCB/2D_render/set_red_hasl 808 | options: 809 | style: set-red-hasl 810 | format: jpg 811 | - name: basic_pcbdraw_svg_jlcpcb_green_enig_bottom 812 | comment: PCB 2D render in SVG format, using jlcpcb-green-enig style 813 | type: pcbdraw 814 | dir: PCB/2D_render/jlcpcb_green_enig 815 | options: 816 | style: jlcpcb-green-enig 817 | format: svg 818 | bottom: true 819 | - name: basic_pcbdraw_png_jlcpcb_green_enig_bottom 820 | comment: PCB 2D render in PNG format, using jlcpcb-green-enig style 821 | type: pcbdraw 822 | dir: PCB/2D_render/jlcpcb_green_enig 823 | options: 824 | style: jlcpcb-green-enig 825 | format: png 826 | bottom: true 827 | - name: basic_pcbdraw_jpg_jlcpcb_green_enig_bottom 828 | comment: PCB 2D render in JPG format, using jlcpcb-green-enig style 829 | type: pcbdraw 830 | dir: PCB/2D_render/jlcpcb_green_enig 831 | options: 832 | style: jlcpcb-green-enig 833 | format: jpg 834 | bottom: true 835 | - name: basic_pcbdraw_svg_set_blue_enig_bottom 836 | comment: PCB 2D render in SVG format, using set-blue-enig style 837 | type: pcbdraw 838 | dir: PCB/2D_render/set_blue_enig 839 | options: 840 | style: set-blue-enig 841 | format: svg 842 | bottom: true 843 | - name: basic_pcbdraw_png_set_blue_enig_bottom 844 | comment: PCB 2D render in PNG format, using set-blue-enig style 845 | type: pcbdraw 846 | dir: PCB/2D_render/set_blue_enig 847 | options: 848 | style: set-blue-enig 849 | format: png 850 | bottom: true 851 | - name: basic_pcbdraw_jpg_set_blue_enig_bottom 852 | comment: PCB 2D render in JPG format, using set-blue-enig style 853 | type: pcbdraw 854 | dir: PCB/2D_render/set_blue_enig 855 | options: 856 | style: set-blue-enig 857 | format: jpg 858 | bottom: true 859 | - name: basic_pcbdraw_svg_set_red_hasl_bottom 860 | comment: PCB 2D render in SVG format, using set-red-hasl style 861 | type: pcbdraw 862 | dir: PCB/2D_render/set_red_hasl 863 | options: 864 | style: set-red-hasl 865 | format: svg 866 | bottom: true 867 | - name: basic_pcbdraw_png_set_red_hasl_bottom 868 | comment: PCB 2D render in PNG format, using set-red-hasl style 869 | type: pcbdraw 870 | dir: PCB/2D_render/set_red_hasl 871 | options: 872 | style: set-red-hasl 873 | format: png 874 | bottom: true 875 | - name: basic_pcbdraw_jpg_set_red_hasl_bottom 876 | comment: PCB 2D render in JPG format, using set-red-hasl style 877 | type: pcbdraw 878 | dir: PCB/2D_render/set_red_hasl 879 | options: 880 | style: set-red-hasl 881 | format: jpg 882 | bottom: true 883 | - name: basic_pdf 884 | comment: Individual layers in PDF format 885 | type: pdf 886 | dir: Individual_Layers/PDF 887 | layers: 888 | - layer: F.Cu 889 | suffix: F_Cu 890 | description: Front copper 891 | - layer: B.Cu 892 | suffix: B_Cu 893 | description: Bottom copper 894 | - layer: F.Silkscreen 895 | suffix: F_Silkscreen 896 | description: Front silkscreen (artwork) 897 | - layer: B.Mask 898 | suffix: B_Mask 899 | description: Bottom soldermask (negative) 900 | - layer: F.Mask 901 | suffix: F_Mask 902 | description: Front soldermask (negative) 903 | - layer: Edge.Cuts 904 | suffix: Edge_Cuts 905 | description: Board shape 906 | - layer: F.Courtyard 907 | suffix: F_Courtyard 908 | description: Front courtyard area 909 | - layer: F.Fab 910 | suffix: F_Fab 911 | description: Front documentation 912 | - name: basic_pdf_sch_print 913 | comment: Schematic in PDF format 914 | type: pdf_sch_print 915 | dir: Schematic 916 | - name: basic_position_ASCII 917 | comment: Components position for Pick & Place 918 | type: position 919 | dir: Position 920 | options: 921 | format: ASCII 922 | only_smd: false 923 | separate_files_for_front_and_back: false 924 | - name: basic_position_CSV 925 | comment: Components position for Pick & Place 926 | type: position 927 | dir: Position 928 | options: 929 | format: CSV 930 | only_smd: false 931 | separate_files_for_front_and_back: false 932 | - name: basic_ps 933 | comment: Individual layers in PS format 934 | type: ps 935 | dir: Individual_Layers/PS 936 | layers: 937 | - layer: F.Cu 938 | suffix: F_Cu 939 | description: Front copper 940 | - layer: B.Cu 941 | suffix: B_Cu 942 | description: Bottom copper 943 | - layer: F.Silkscreen 944 | suffix: F_Silkscreen 945 | description: Front silkscreen (artwork) 946 | - layer: B.Mask 947 | suffix: B_Mask 948 | description: Bottom soldermask (negative) 949 | - layer: F.Mask 950 | suffix: F_Mask 951 | description: Front soldermask (negative) 952 | - layer: Edge.Cuts 953 | suffix: Edge_Cuts 954 | description: Board shape 955 | - layer: F.Courtyard 956 | suffix: F_Courtyard 957 | description: Front courtyard area 958 | - layer: F.Fab 959 | suffix: F_Fab 960 | description: Front documentation 961 | - name: basic_qr_lib_example 962 | comment: QR code symbol and footprint example 963 | type: qr_lib 964 | dir: QR_libs 965 | options: 966 | qrs: 967 | - correction_level: medium 968 | name: QR_data 969 | pcb_negative: true 970 | - correction_level: medium 971 | name: QR_kibot 972 | text: https://github.com/INTI-CMNB/KiBot/ 973 | use_sch_dir: false 974 | - name: basic_render_3d_top 975 | comment: 3D view from top 976 | type: render_3d 977 | dir: 3D 978 | options: 979 | ray_tracing: true 980 | orthographic: true 981 | - name: basic_render_3d_30deg 982 | comment: 3D view from 30 degrees 983 | type: render_3d 984 | dir: 3D 985 | output_id: 30deg 986 | options: 987 | ray_tracing: true 988 | rotate_x: 3 989 | rotate_z: -2 990 | - name: basic_render_3d_bottom 991 | comment: 3D view from bottom 992 | type: render_3d 993 | dir: 3D 994 | options: 995 | ray_tracing: true 996 | orthographic: true 997 | view: bottom 998 | - name: report_simple 999 | comment: Simple design report 1000 | type: report 1001 | output_id: _simple 1002 | options: 1003 | template: simple_ASCII 1004 | - name: report_full 1005 | comment: Full design report 1006 | type: report 1007 | options: 1008 | template: full_SVG 1009 | - name: basic_step 1010 | comment: 3D model in STEP format 1011 | type: step 1012 | dir: 3D 1013 | - name: basic_svg 1014 | comment: Individual layers in SVG format 1015 | type: svg 1016 | dir: Individual_Layers/SVG 1017 | layers: 1018 | - layer: F.Cu 1019 | suffix: F_Cu 1020 | description: Front copper 1021 | - layer: B.Cu 1022 | suffix: B_Cu 1023 | description: Bottom copper 1024 | - layer: F.Silkscreen 1025 | suffix: F_Silkscreen 1026 | description: Front silkscreen (artwork) 1027 | - layer: B.Mask 1028 | suffix: B_Mask 1029 | description: Bottom soldermask (negative) 1030 | - layer: F.Mask 1031 | suffix: F_Mask 1032 | description: Front soldermask (negative) 1033 | - layer: Edge.Cuts 1034 | suffix: Edge_Cuts 1035 | description: Board shape 1036 | - layer: F.Courtyard 1037 | suffix: F_Courtyard 1038 | description: Front courtyard area 1039 | - layer: F.Fab 1040 | suffix: F_Fab 1041 | description: Front documentation 1042 | - name: basic_svg_sch_print 1043 | comment: Schematic in SVG format 1044 | type: svg_sch_print 1045 | dir: Schematic 1046 | -------------------------------------------------------------------------------- /LanguageCard.kicad_pro: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "3dviewports": [], 4 | "design_settings": { 5 | "defaults": { 6 | "board_outline_line_width": 0.15, 7 | "copper_line_width": 0.15, 8 | "copper_text_italic": false, 9 | "copper_text_size_h": 1.5, 10 | "copper_text_size_v": 1.5, 11 | "copper_text_thickness": 0.3, 12 | "copper_text_upright": false, 13 | "courtyard_line_width": 0.049999999999999996, 14 | "dimension_precision": 4, 15 | "dimension_units": 3, 16 | "dimensions": { 17 | "arrow_length": 1270000, 18 | "extension_offset": 500000, 19 | "keep_text_aligned": true, 20 | "suppress_zeroes": false, 21 | "text_position": 0, 22 | "units_format": 1 23 | }, 24 | "fab_line_width": 0.09999999999999999, 25 | "fab_text_italic": false, 26 | "fab_text_size_h": 1.0, 27 | "fab_text_size_v": 1.0, 28 | "fab_text_thickness": 0.15, 29 | "fab_text_upright": false, 30 | "other_line_width": 0.09999999999999999, 31 | "other_text_italic": false, 32 | "other_text_size_h": 1.0, 33 | "other_text_size_v": 1.0, 34 | "other_text_thickness": 0.15, 35 | "other_text_upright": false, 36 | "pads": { 37 | "drill": 0.8, 38 | "height": 1.6, 39 | "width": 1.6 40 | }, 41 | "silk_line_width": 0.15, 42 | "silk_text_italic": false, 43 | "silk_text_size_h": 0.6, 44 | "silk_text_size_v": 0.6, 45 | "silk_text_thickness": 0.09, 46 | "silk_text_upright": false, 47 | "zones": { 48 | "45_degree_only": true, 49 | "min_clearance": 0.0 50 | } 51 | }, 52 | "diff_pair_dimensions": [ 53 | { 54 | "gap": 0.0, 55 | "via_gap": 0.0, 56 | "width": 0.0 57 | } 58 | ], 59 | "drc_exclusions": [], 60 | "meta": { 61 | "filename": "board_design_settings.json", 62 | "version": 2 63 | }, 64 | "rule_severities": { 65 | "annular_width": "error", 66 | "clearance": "error", 67 | "connection_width": "warning", 68 | "copper_edge_clearance": "error", 69 | "copper_sliver": "warning", 70 | "courtyards_overlap": "ignore", 71 | "diff_pair_gap_out_of_range": "error", 72 | "diff_pair_uncoupled_length_too_long": "error", 73 | "drill_out_of_range": "error", 74 | "duplicate_footprints": "ignore", 75 | "extra_footprint": "ignore", 76 | "footprint": "error", 77 | "footprint_type_mismatch": "error", 78 | "hole_clearance": "error", 79 | "hole_near_hole": "error", 80 | "invalid_outline": "error", 81 | "isolated_copper": "warning", 82 | "item_on_disabled_layer": "error", 83 | "items_not_allowed": "error", 84 | "length_out_of_range": "error", 85 | "lib_footprint_issues": "ignore", 86 | "lib_footprint_mismatch": "ignore", 87 | "malformed_courtyard": "error", 88 | "microvia_drill_out_of_range": "error", 89 | "missing_courtyard": "ignore", 90 | "missing_footprint": "warning", 91 | "net_conflict": "ignore", 92 | "npth_inside_courtyard": "ignore", 93 | "padstack": "error", 94 | "pth_inside_courtyard": "ignore", 95 | "shorting_items": "error", 96 | "silk_edge_clearance": "ignore", 97 | "silk_over_copper": "ignore", 98 | "silk_overlap": "ignore", 99 | "skew_out_of_range": "error", 100 | "solder_mask_bridge": "ignore", 101 | "starved_thermal": "error", 102 | "text_height": "warning", 103 | "text_thickness": "warning", 104 | "through_hole_pad_without_hole": "error", 105 | "too_many_vias": "error", 106 | "track_dangling": "warning", 107 | "track_width": "error", 108 | "tracks_crossing": "error", 109 | "unconnected_items": "error", 110 | "unresolved_variable": "error", 111 | "via_dangling": "warning", 112 | "zones_intersect": "error" 113 | }, 114 | "rules": { 115 | "allow_blind_buried_vias": false, 116 | "allow_microvias": false, 117 | "max_error": 0.005, 118 | "min_clearance": 0.0, 119 | "min_connection": 0.0, 120 | "min_copper_edge_clearance": 0.049999999999999996, 121 | "min_hole_clearance": 0.0, 122 | "min_hole_to_hole": 0.25, 123 | "min_microvia_diameter": 0.19999999999999998, 124 | "min_microvia_drill": 0.09999999999999999, 125 | "min_resolved_spokes": 2, 126 | "min_silk_clearance": 0.0, 127 | "min_text_height": 0.7999999999999999, 128 | "min_text_thickness": 0.08, 129 | "min_through_hole_diameter": 0.19999999999999998, 130 | "min_track_width": 0.15, 131 | "min_via_annular_width": 0.049999999999999996, 132 | "min_via_diameter": 0.39999999999999997, 133 | "solder_mask_to_copper_clearance": 0.0, 134 | "use_height_for_length_calcs": true 135 | }, 136 | "teardrop_options": [ 137 | { 138 | "td_allow_use_two_tracks": true, 139 | "td_curve_segcount": 5, 140 | "td_on_pad_in_zone": true, 141 | "td_onpadsmd": true, 142 | "td_onroundshapesonly": false, 143 | "td_ontrackend": true, 144 | "td_onviapad": true 145 | } 146 | ], 147 | "teardrop_parameters": [ 148 | { 149 | "td_curve_segcount": 5, 150 | "td_height_ratio": 1.0, 151 | "td_length_ratio": 0.5, 152 | "td_maxheight": 2.0, 153 | "td_maxlen": 1.0, 154 | "td_target_name": "td_round_shape", 155 | "td_width_to_size_filter_ratio": 0.9 156 | }, 157 | { 158 | "td_curve_segcount": 5, 159 | "td_height_ratio": 1.0, 160 | "td_length_ratio": 1.0, 161 | "td_maxheight": 2.0, 162 | "td_maxlen": 1.0, 163 | "td_target_name": "td_rect_shape", 164 | "td_width_to_size_filter_ratio": 0.9 165 | }, 166 | { 167 | "td_curve_segcount": 5, 168 | "td_height_ratio": 1.0, 169 | "td_length_ratio": 0.5, 170 | "td_maxheight": 2.0, 171 | "td_maxlen": 1.0, 172 | "td_target_name": "td_track_end", 173 | "td_width_to_size_filter_ratio": 0.9 174 | } 175 | ], 176 | "track_widths": [ 177 | 0.0, 178 | 0.254, 179 | 0.396875, 180 | 0.635, 181 | 1.27, 182 | 1.5875, 183 | 3.175 184 | ], 185 | "via_dimensions": [ 186 | { 187 | "diameter": 0.0, 188 | "drill": 0.0 189 | }, 190 | { 191 | "diameter": 0.6, 192 | "drill": 0.3 193 | }, 194 | { 195 | "diameter": 0.8, 196 | "drill": 0.4 197 | } 198 | ], 199 | "zones_allow_external_fillets": false, 200 | "zones_use_no_outline": true 201 | }, 202 | "layer_presets": [], 203 | "viewports": [] 204 | }, 205 | "boards": [], 206 | "cvpcb": { 207 | "equivalence_files": [] 208 | }, 209 | "erc": { 210 | "erc_exclusions": [], 211 | "meta": { 212 | "version": 0 213 | }, 214 | "pin_map": [ 215 | [ 216 | 0, 217 | 0, 218 | 0, 219 | 0, 220 | 0, 221 | 0, 222 | 1, 223 | 0, 224 | 0, 225 | 0, 226 | 0, 227 | 2 228 | ], 229 | [ 230 | 0, 231 | 2, 232 | 0, 233 | 1, 234 | 0, 235 | 0, 236 | 1, 237 | 0, 238 | 2, 239 | 2, 240 | 2, 241 | 2 242 | ], 243 | [ 244 | 0, 245 | 0, 246 | 0, 247 | 0, 248 | 0, 249 | 0, 250 | 1, 251 | 0, 252 | 1, 253 | 0, 254 | 1, 255 | 2 256 | ], 257 | [ 258 | 0, 259 | 1, 260 | 0, 261 | 0, 262 | 0, 263 | 0, 264 | 1, 265 | 1, 266 | 2, 267 | 1, 268 | 1, 269 | 2 270 | ], 271 | [ 272 | 0, 273 | 0, 274 | 0, 275 | 0, 276 | 0, 277 | 0, 278 | 1, 279 | 0, 280 | 0, 281 | 0, 282 | 0, 283 | 2 284 | ], 285 | [ 286 | 0, 287 | 0, 288 | 0, 289 | 0, 290 | 0, 291 | 0, 292 | 0, 293 | 0, 294 | 0, 295 | 0, 296 | 0, 297 | 2 298 | ], 299 | [ 300 | 1, 301 | 1, 302 | 1, 303 | 1, 304 | 1, 305 | 0, 306 | 1, 307 | 1, 308 | 1, 309 | 1, 310 | 1, 311 | 2 312 | ], 313 | [ 314 | 0, 315 | 0, 316 | 0, 317 | 1, 318 | 0, 319 | 0, 320 | 1, 321 | 0, 322 | 0, 323 | 0, 324 | 0, 325 | 2 326 | ], 327 | [ 328 | 0, 329 | 2, 330 | 1, 331 | 2, 332 | 0, 333 | 0, 334 | 1, 335 | 0, 336 | 2, 337 | 2, 338 | 2, 339 | 2 340 | ], 341 | [ 342 | 0, 343 | 2, 344 | 0, 345 | 1, 346 | 0, 347 | 0, 348 | 1, 349 | 0, 350 | 2, 351 | 0, 352 | 0, 353 | 2 354 | ], 355 | [ 356 | 0, 357 | 2, 358 | 1, 359 | 1, 360 | 0, 361 | 0, 362 | 1, 363 | 0, 364 | 2, 365 | 0, 366 | 0, 367 | 2 368 | ], 369 | [ 370 | 2, 371 | 2, 372 | 2, 373 | 2, 374 | 2, 375 | 2, 376 | 2, 377 | 2, 378 | 2, 379 | 2, 380 | 2, 381 | 2 382 | ] 383 | ], 384 | "rule_severities": { 385 | "bus_definition_conflict": "error", 386 | "bus_entry_needed": "error", 387 | "bus_to_bus_conflict": "error", 388 | "bus_to_net_conflict": "error", 389 | "conflicting_netclasses": "error", 390 | "different_unit_footprint": "error", 391 | "different_unit_net": "error", 392 | "duplicate_reference": "error", 393 | "duplicate_sheet_names": "error", 394 | "endpoint_off_grid": "warning", 395 | "extra_units": "error", 396 | "global_label_dangling": "warning", 397 | "hier_label_mismatch": "error", 398 | "label_dangling": "error", 399 | "lib_symbol_issues": "warning", 400 | "missing_bidi_pin": "warning", 401 | "missing_input_pin": "warning", 402 | "missing_power_pin": "error", 403 | "missing_unit": "warning", 404 | "multiple_net_names": "warning", 405 | "net_not_bus_member": "warning", 406 | "no_connect_connected": "warning", 407 | "no_connect_dangling": "warning", 408 | "pin_not_connected": "error", 409 | "pin_not_driven": "error", 410 | "pin_to_pin": "warning", 411 | "power_pin_not_driven": "error", 412 | "similar_labels": "warning", 413 | "simulation_model_issue": "ignore", 414 | "unannotated": "error", 415 | "unit_value_mismatch": "error", 416 | "unresolved_variable": "error", 417 | "wire_dangling": "error" 418 | } 419 | }, 420 | "libraries": { 421 | "pinned_footprint_libs": [], 422 | "pinned_symbol_libs": [] 423 | }, 424 | "meta": { 425 | "filename": "LanguageCard.kicad_pro", 426 | "version": 1 427 | }, 428 | "net_settings": { 429 | "classes": [ 430 | { 431 | "bus_width": 12, 432 | "clearance": 0.2, 433 | "diff_pair_gap": 0.25, 434 | "diff_pair_via_gap": 0.25, 435 | "diff_pair_width": 0.2, 436 | "line_style": 0, 437 | "microvia_diameter": 0.3, 438 | "microvia_drill": 0.1, 439 | "name": "Default", 440 | "pcb_color": "rgba(0, 0, 0, 0.000)", 441 | "schematic_color": "rgba(0, 0, 0, 0.000)", 442 | "track_width": 0.254, 443 | "via_diameter": 1.016, 444 | "via_drill": 0.508, 445 | "wire_width": 6 446 | }, 447 | { 448 | "bus_width": 12, 449 | "clearance": 0.2, 450 | "diff_pair_gap": 0.25, 451 | "diff_pair_via_gap": 0.25, 452 | "diff_pair_width": 0.2, 453 | "line_style": 0, 454 | "microvia_diameter": 0.3, 455 | "microvia_drill": 0.1, 456 | "name": "Power", 457 | "pcb_color": "rgba(0, 0, 0, 0.000)", 458 | "schematic_color": "rgba(0, 0, 0, 0.000)", 459 | "track_width": 0.762, 460 | "via_diameter": 1.524, 461 | "via_drill": 0.762, 462 | "wire_width": 6 463 | } 464 | ], 465 | "meta": { 466 | "version": 3 467 | }, 468 | "net_colors": null, 469 | "netclass_assignments": null, 470 | "netclass_patterns": [] 471 | }, 472 | "pcbnew": { 473 | "last_paths": { 474 | "gencad": "", 475 | "idf": "", 476 | "netlist": "", 477 | "specctra_dsn": "myIz8dwf.dsn", 478 | "step": "", 479 | "vrml": "" 480 | }, 481 | "page_layout_descr_file": "" 482 | }, 483 | "schematic": { 484 | "annotate_start_num": 0, 485 | "drawing": { 486 | "dashed_lines_dash_length_ratio": 12.0, 487 | "dashed_lines_gap_length_ratio": 3.0, 488 | "default_bus_thickness": 12.0, 489 | "default_junction_size": 40.0, 490 | "default_line_thickness": 6.0, 491 | "default_text_size": 50.0, 492 | "default_wire_thickness": 6.0, 493 | "field_names": [], 494 | "intersheets_ref_own_page": false, 495 | "intersheets_ref_prefix": "", 496 | "intersheets_ref_short": false, 497 | "intersheets_ref_show": false, 498 | "intersheets_ref_suffix": "", 499 | "junction_size_choice": 3, 500 | "label_size_ratio": 0.3, 501 | "pin_symbol_size": 25.0, 502 | "text_offset_ratio": 0.3 503 | }, 504 | "legacy_lib_dir": "", 505 | "legacy_lib_list": [], 506 | "meta": { 507 | "version": 1 508 | }, 509 | "net_format_name": "", 510 | "ngspice": { 511 | "fix_include_paths": true, 512 | "fix_passive_vals": false, 513 | "meta": { 514 | "version": 0 515 | }, 516 | "model_mode": 0, 517 | "workbook_filename": "" 518 | }, 519 | "page_layout_descr_file": "", 520 | "plot_directory": "gerbers/", 521 | "spice_adjust_passive_values": false, 522 | "spice_current_sheet_as_root": false, 523 | "spice_external_command": "spice \"%I\"", 524 | "spice_model_current_sheet_as_root": true, 525 | "spice_save_all_currents": false, 526 | "spice_save_all_voltages": false, 527 | "subpart_first_id": 65, 528 | "subpart_id_separator": 0 529 | }, 530 | "sheets": [ 531 | [ 532 | "e35c56f9-4713-4571-acdb-6ae2f2073fad", 533 | "" 534 | ] 535 | ], 536 | "text_variables": {} 537 | } 538 | -------------------------------------------------------------------------------- /LanguageCard.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/btb/LanguageCard/57c97b9646fc364130468b129a2979a2509d343d/LanguageCard.pdf -------------------------------------------------------------------------------- /LanguageCard.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/btb/LanguageCard/57c97b9646fc364130468b129a2979a2509d343d/LanguageCard.png -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # LanguageCard 2 | An Apple II Language Card. Based on a design by [iz8dwf](https://youtu.be/1KPIAoO1dTU) 3 | 4 | [Interactive BOM](https://btb.github.io/LanguageCard/bom/LanguageCard_3.html) 5 | 6 | ![image info](LanguageCard.png) 7 | 8 | ## Description 9 | 10 | This is a simple "language card" for the Apple II and II+, which expands the system from 48K to 64K by means of 16K of RAM, switchable into the address space normally used by the system firmware. That's two banks of 4K in the D0-D8 space, and one bank of 8K in the E0-F8 space. The C0-C8 space is not touched. 11 | 12 | It uses static RAM so there is no need for the ribbon cable connecting it to the logic board that the original language cards had. 13 | 14 | Like the original language cards, it can also contain a chip that will be used to replace the F8 ROM on your logic board. Additionally, you can enable or disable this replacement ROM with a switch or jumpers. If configured correctly, you can put two different F8 ROM images on a single chip and switch back and forth between them. 15 | 16 | ## Build Notes 17 | 18 | ### R3, R4, R5 19 | 20 | Use higher resistance for high-efficiency LEDs, e.g. 3.3K 21 | 22 | ### U8 and U9 23 | 24 | Any narrow 8KBx8 static RAM can be used. ex: 5C6408, Cy7C185, TC5588 25 | 26 | ### U7 27 | 28 | Optional. 2K or larger (E)EPROM for overriding the logic board's F8 ROM. Enable using SW1 or JP1. 29 | 30 | ### SW1 31 | 32 | Optional Toggle switch. Miniature, Sub-miniature, or Ultra-miniature, right angle, SPDT. (Sub, Ultra-mini use JP1 pads) 33 | 34 | An SPST switch which only closes the outer two pin positions can also work if you short JP3. 35 | 36 | To switch between two different F8 ROM images on a single 4K or greater chip, short JP2 and use a DPDT switch instead - must be a three-position center OFF switch (ON-OFF-ON) in order to disable the card ROM and use the logic board F8 ROM. 37 | 38 | ### JP1 39 | 40 | Enable and select which F8 ROM to use (if not using SW1) 41 | 42 | | | | 43 | |-|-| 44 | |6|5| 45 | |4|3| 46 | |2|1| 47 | 48 | 49 | No Jumpers: Card ROM disabled 50 | 51 | #### Using a single ROM image: 52 | 53 | JP2 open, Jumper on pins 1,3 (lower right): Card ROM enabled 54 | 55 | #### Using two ROM images on a 4K or larger ROM: 56 | 57 | JP2 shorted, Jumper on pins 1,3 (lower right) and 2,4 (lower left): Upper ROM image enabled (A11 high) 58 | 59 | JP2 shorted, Jumper on pins 3,5 (upper right) and 4,6 (upper left): Lower ROM image enabled (A11 low) 60 | 61 | ### Solder Jumper JP2 62 | Short, and install DPDT switch (or use pair of jumpers as above) for ability to select two different F8 ROM images on a single (4K or larger) ROM. 63 | 64 | ### Solder Jumper JP3 65 | Short if using an SPST switch that only connects outer two pins 66 | -------------------------------------------------------------------------------- /fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | ) 3 | -------------------------------------------------------------------------------- /gerbers_3.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/btb/LanguageCard/57c97b9646fc364130468b129a2979a2509d343d/gerbers_3.zip -------------------------------------------------------------------------------- /ibom.config.ini: -------------------------------------------------------------------------------- 1 | [html_defaults] 2 | dark_mode=0 3 | show_pads=1 4 | show_fabrication=1 5 | show_silkscreen=1 6 | highlight_pin1=1 7 | redraw_on_drag=1 8 | board_rotation=0 9 | checkboxes=Sourced,Placed 10 | bom_view=left-right 11 | layer_view=FB 12 | compression=1 13 | open_browser=1 14 | [general] 15 | bom_dest_dir=bom 16 | bom_name_format=%f_%r 17 | component_sort_order=C,R,L,D,U,Y,X,F,SW,A,~,HS,CNN,J,P,NT,MH 18 | component_blacklist= 19 | blacklist_virtual=1 20 | blacklist_empty_val=0 21 | include_tracks=0 22 | include_nets=0 23 | [fields] 24 | show_fields=Value,Footprint 25 | group_fields=Value,Footprint 26 | normalize_field_case=0 27 | board_variant_field= 28 | board_variant_whitelist= 29 | board_variant_blacklist= 30 | dnp_field= 31 | -------------------------------------------------------------------------------- /sym-lib-table: -------------------------------------------------------------------------------- 1 | (sym_lib_table 2 | ) 3 | --------------------------------------------------------------------------------