├── .gitignore ├── FPGA-Wave-Generator.qpf ├── FPGA-Wave-Generator.qsf ├── README.md ├── ip ├── altpll │ ├── pll.ppf │ ├── pll.qip │ └── pll.v ├── lpm_add_sub │ ├── phase_adder.qip │ └── phase_adder.v └── rom_sin │ ├── rom_sin.qip │ └── rom_sin.v ├── src ├── toplevel.v └── waveform_controller.v └── waveform └── sin512.mif /.gitignore: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/.gitignore -------------------------------------------------------------------------------- /FPGA-Wave-Generator.qpf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/FPGA-Wave-Generator.qpf -------------------------------------------------------------------------------- /FPGA-Wave-Generator.qsf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/FPGA-Wave-Generator.qsf -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # FPGA-Wave-Generator 2 | 在Cyclone IV（EP4CE6F17C8）上实现的DDS信号发生器。 3 | 4 | 2017年全国大学生电子设计大赛北航第二轮选拔题目。 5 | -------------------------------------------------------------------------------- /ip/altpll/pll.ppf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/ip/altpll/pll.ppf -------------------------------------------------------------------------------- /ip/altpll/pll.qip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/ip/altpll/pll.qip -------------------------------------------------------------------------------- /ip/altpll/pll.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/ip/altpll/pll.v -------------------------------------------------------------------------------- /ip/lpm_add_sub/phase_adder.qip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/ip/lpm_add_sub/phase_adder.qip -------------------------------------------------------------------------------- /ip/lpm_add_sub/phase_adder.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/ip/lpm_add_sub/phase_adder.v -------------------------------------------------------------------------------- /ip/rom_sin/rom_sin.qip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/ip/rom_sin/rom_sin.qip -------------------------------------------------------------------------------- /ip/rom_sin/rom_sin.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/ip/rom_sin/rom_sin.v -------------------------------------------------------------------------------- /src/toplevel.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/src/toplevel.v -------------------------------------------------------------------------------- /src/waveform_controller.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/src/waveform_controller.v -------------------------------------------------------------------------------- /waveform/sin512.mif: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/buaa-ee/FPGA-Wave-Generator/HEAD/waveform/sin512.mif --------------------------------------------------------------------------------