├── .gitignore ├── .gitmodules ├── LICENSE ├── README.md ├── contrib ├── 10-butterstick-dfu.rules └── openocd │ └── butterstick.cfg ├── documentation ├── images │ ├── 800px │ │ ├── butterstick_r1d0_001.jpg │ │ ├── butterstick_r1d0_002.jpg │ │ ├── butterstick_r1d0_003.jpg │ │ ├── butterstick_r1d0_004.jpeg │ │ └── butterstick_r1d0_005.jpeg │ ├── butterstick_r1d0_001.jpeg │ ├── butterstick_r1d0_002.jpeg │ ├── butterstick_r1d0_003.jpeg │ ├── butterstick_r1d0_004.jpeg │ ├── butterstick_r1d0_005.jpeg │ └── butterstick_render_r1d0.png ├── repository-open-graph-template.png └── repository-open-graph-template.xcf ├── hardware ├── ButterStick_r0.1 │ ├── ButterStick-cache.lib │ ├── ButterStick.csv │ ├── ButterStick.kicad_pcb │ ├── ButterStick.pro │ ├── ButterStick.sch │ ├── SYZYGY_PORT0.sch │ ├── SYZYGY_PORT1.sch │ ├── SYZYGY_PORT2.sch │ ├── SmartVIO.sch │ ├── SyzygyStandard.sch │ ├── fileEthernet.sch │ ├── fileFPGA.sch │ ├── fileHyperRAM.sch │ ├── fileIO.sch │ ├── filePower.sch │ ├── fileSDMMC.sch │ ├── fp-info-cache │ ├── fp-lib-table │ ├── plot │ │ ├── ButterStick-Back.png │ │ ├── ButterStick-Front.png │ │ ├── ButterStick_20190319_234341.zip │ │ └── render_001.jpg │ └── sym-lib-table ├── ButterStick_r0.2 │ ├── ButterStick-cache.lib │ ├── ButterStick.kicad_pcb │ ├── ButterStick.pro │ ├── ButterStick.sch │ ├── PCBSpecs.sch │ ├── SYZYGY_PORT0.sch │ ├── SYZYGY_PORT1.sch │ ├── SYZYGY_PORT2.sch │ ├── SmartVIO.sch │ ├── SyzygyStandard.sch │ ├── TestPonts.sch │ ├── bom │ │ └── ibom.html │ ├── fileEthernet.sch │ ├── fileFPGA.sch │ ├── fileHyperRAM.sch │ ├── fileIO.sch │ ├── filePower.sch │ ├── fileSDMMC.sch │ ├── fp-info-cache │ ├── fp-lib-table │ ├── output │ │ ├── ButterStick.csv │ │ └── plot │ │ │ ├── ButterStick-Back.png │ │ │ ├── ButterStick-Front.png │ │ │ ├── ButterStick.pdf │ │ │ └── ButterStick_0.2_20190530_161756.zip │ └── sym-lib-table └── ButterStick_r1.0 │ ├── ButterStick-cache.lib │ ├── ButterStick.kicad_pcb │ ├── ButterStick.kicad_prl │ ├── ButterStick.kicad_pro │ ├── ButterStick.kicad_sch │ ├── DDR3L.kicad_sch │ ├── FPGA-5G.kicad_sch │ ├── FPGA-DDR3L.kicad_sch │ ├── FPGA-MISC.kicad_sch │ ├── FPGA-SYZGY0.kicad_sch │ ├── FPGA-SYZGY1.kicad_sch │ ├── IO-LEDS.kicad_sch │ ├── Production │ ├── ButterStick-r1.0-ibom.html │ ├── ButterStick-r1.0a-bom.csv │ ├── ButterStick-r1.0a-bottom-pos.csv │ ├── ButterStick-r1.0a-fab-notes.txt │ ├── ButterStick-r1.0a-sch.pdf │ ├── ButterStick-r1.0a-top-pos.csv │ ├── ButterStick_gerbers_2021-01-10_22-45-55.zip │ ├── ButterStick_r1.0_2up_stencil.zip │ └── ECN │ │ └── ECN_001 │ │ ├── ECN_001.md │ │ ├── ECN_001.pdf │ │ └── src │ │ ├── ecn_001_img0.png │ │ └── ecn_001_img1.png │ ├── README.md │ ├── Syzygy-TXR4.kicad_sch │ ├── SyzygyStandard.kicad_sch │ ├── TestPonts.kicad_sch │ ├── drc-rules │ ├── fileEthernet.kicad_sch │ ├── fileFPGA.kicad_sch │ ├── fileIO.kicad_sch │ ├── filePower.kicad_sch │ ├── fp-info-cache │ ├── fp-lib-table │ ├── memory-DDR3L.kicad_sch │ ├── sym-lib-table │ └── usb-phy.kicad_sch ├── lib ├── bus_aware_length_matching_verification.py └── ref │ ├── Butter_logo.png │ └── logo_name.kicad_mod └── mechanical └── case └── acrylic_plate ├── README.md ├── butterstick_acrylic_plate.dxf ├── butterstick_acrylic_plate.scad ├── butterstick_acrylic_plate_loaded.jpg └── butterstick_acrylic_plate_unloaded.jpg /.gitignore: -------------------------------------------------------------------------------- 1 | # For PCBs designed using KiCad: http://www.kicad-pcb.org/ 2 | 3 | # Temporary files 4 | *.000 5 | *.bak 6 | *.bck 7 | *.kicad_pcb-bak 8 | *.kicad_sch-bak 9 | *~ 10 | _autosave-* 11 | *.tmp 12 | 13 | # Netlist files (exported from Eeschema) 14 | *.net 15 | 16 | # Autorouter files (exported from Pcbnew) 17 | *.dsn 18 | *.ses 19 | 20 | # Exported BOM files 21 | *.xml 22 | # *.csv 23 | 24 | 25 | # Add Lattice Diamond ignores 26 | impl1 27 | syn_results 28 | archiv 29 | .recovery 30 | *_tcr.dir 31 | .*.ini 32 | *.asd 33 | *.asdb 34 | *.awb 35 | *.awc 36 | *.bak 37 | *.ccl 38 | #*.cfg 39 | *.cmd 40 | *.cst 41 | *.fdc 42 | # *.htm 43 | # *.html 44 | *.log 45 | *.ngd 46 | *.ngo 47 | *.tcl 48 | *.svf 49 | *.trc 50 | *.vhm 51 | *.xml 52 | # *.zip 53 | *~ 54 | 55 | build 56 | __pycache__ 57 | 58 | .vscode 59 | *.o 60 | *.d 61 | *.bin 62 | *.elf 63 | *.hex 64 | 65 | *.sch-bak -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "lib/gkl"] 2 | path = lib/gkl 3 | url = https://github.com/gregdavill/gsd-kicad-libs 4 | [submodule "lib/pkl"] 5 | path = lib/pkl 6 | url = https://github.com/esden/pretty-kicad-libs 7 | [submodule "lib/kicad-length-matching-checks"] 8 | path = lib/kicad-length-matching-checks 9 | url = https://github.com/mithro/kicad-length-matching-checks 10 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | CERN Open Hardware Licence v1.2 2 | 3 | Preamble 4 | 5 | Through this CERN Open Hardware Licence ("CERN OHL") version 1.2, CERN 6 | wishes to provide a tool to foster collaboration and sharing among 7 | hardware designers. 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Section 5 shall continue to apply. -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # ButterStick 2 | 3 | A compact Lattice ECP5 based development board with breakouts for lots of high-speed I/O and serdes. 4 | 5 | With onboard DDR3, High Speed USB and Ethernet. 6 | 7 | ## Latest Revision: 8 | * __Latest Release:__ [ButterStick r1.0](hardware/ButterStick_r1.0/) 9 | * Assembled PCBs available: [GroupGets](https://store.groupgets.com/products/butterstick-fpga-development-board) 10 | * Bare PCBs available: [Tindie](https://www.tindie.com/products/greeeg/butterstick-r10-bare-circuit-board) 11 | 12 | Previous Revisions: 13 | * [ButterStick r0.2](hardware/ButterStick_r0.2/) 14 | * [ButterStick r0.1](hardware/ButterStick_r0.1/) 15 | 16 | ![alt-text](documentation/images/800px/butterstick_r1d0_003.jpg "Populated ButterStick r1.0 board with Size Comparison") 17 | 18 | ## Hardware (r1.0) 19 | 20 | * ECP5 25F/45F/85F (BGA381 package) 21 | * USB 2.0 High Speed (480 Mbit/s) 22 | * Gigabit Ethernet 23 | * upto 8Gbit DDR3L RAM (dual rank) 24 | * 128Mbit QSPI FLASH Memory (Bitstream + User storage) 25 | * MicroSD socket (4 bit SD interface) 26 | * Onboard oscillators: 27 | * 30 MHz (ECP5's PLLs can create 60MHz,125MHz,etc.) 28 | * 25 MHz (RGMII PHY) 29 | * 0.1" pitch JTAG connector 30 | * 7x User RGB LEDs 31 | * 2x User Buttons 32 | * 2x Standard [SYZYGY compatible connectors](https://syzygyfpga.io/) 33 | * Adjustable VCCIO 1.2V-3.3V 34 | * Up to 32 single ended I/O 35 | * 10 differential pairs 36 | * Dedicated clock input pins 37 | * 1x Transceiver [SYZYGY compatible connector](https://syzygyfpga.io/) 38 | * Adjustable VCCIO 1.2V-3.3V 39 | * Up to 14 single ended I/O 40 | * 2x/4x Lanes TX (5 Gbps SERDES) 41 | * 2x/4x Lanes RX (5 Gbps SERDES) 42 | * 1x Reference clock input 43 | 44 | Board dimensions: 80mm x 49mm 45 | 46 | ### Variants 47 | 48 | The ButterStick can be configured in different variants, 49 | the part number defines which FPGA and DDR3 parts are installed. 50 | 51 | `ButterStick-r1.0-[Memory gigabits]-[FPGA density]` 52 | 53 | | | ButterStick-r1.0-2G-25F | ButterStick-r1.0-2G-85F | ButterStick-r1.0-8G-85F | 54 | |-------|-------------------------|-------------------------|-------------------------| 55 | | FPGA | LFE5UM5G-25F-8BG381C | LFE5UM5G-85F-8BG381C | LFE5UM5G-85F-8BG381C | 56 | | DDR3 | 2x MT41K64M16TW-107 | 2x MT41K64M16TW-107 | 2x MT41K256M16TW-107 | 57 | 58 | The 25F also has the following limitations on the ButterStick: 59 | * 25F Only provides 2x SERDES lanes. 60 | * 25F does not connect I/O pins S8/S9 on SYZYGY.C 61 | 62 | 63 | ![alt-text](documentation/images/800px/butterstick_r1d0_004.jpeg "Populated r1.0 board front") 64 | ![alt-text](documentation/images/800px/butterstick_r1d0_005.jpeg "Populated r1.0 board back") 65 | 66 | 67 | ## Licence 68 | 69 | * Hardware in this repository is licensed under CERN OHL v1.2 70 | 71 | ## Open Source Hardware 72 | This board is an OSHWA approved design: [AU000016](https://certification.oshwa.org/au000016.html) -------------------------------------------------------------------------------- /contrib/10-butterstick-dfu.rules: -------------------------------------------------------------------------------- 1 | ATTRS{idVendor}=="1209", ATTRS{idProduct}=="5af1", MODE="0666", GROUP="plugdev", TAG+="uaccess" 2 | -------------------------------------------------------------------------------- /contrib/openocd/butterstick.cfg: -------------------------------------------------------------------------------- 1 | # ButterStick-85F FPGA OpenOCD config 2 | 3 | adapter driver ftdi 4 | ftdi vid_pid 0x0403 0x6010 5 | # channel 1 does not have any functionality 6 | ftdi channel 0 7 | # just TCK TDI TDO TMS, no reset 8 | ftdi layout_init 0xfff8 0xfffb 9 | reset_config none 10 | 11 | # default speed 12 | adapter speed 5000 13 | 14 | # ECP5 device - LFE5UM5G-85 15 | jtag newtap ecp5 tap -irlen 8 -expected-id 0x81113043 16 | 17 | # Other JTAG IDs from the ECP5 line 18 | # "LFE5U-12" = 0x21111043 # Note: different ID to the LFE5U-25, but otherwise the same as the LFE5U-25 19 | # "LFE5U-25" = 0x41111043 20 | # "LFE5U-45" = 0x41112043 21 | # "LFE5U-85" = 0x41113043 22 | # "LFE5UM-25" = 0x01111043 23 | # "LFE5UM-45" = 0x01112043 24 | # "LFE5UM-85" = 0x01113043 25 | # "LFE5UM5G-25" = 0x81111043 26 | # "LFE5UM5G-45" = 0x81112043 27 | # "LFE5UM5G-85" = 0x81113043 -------------------------------------------------------------------------------- /documentation/images/800px/butterstick_r1d0_001.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/butterstick-fpga/butterstick-hardware/0694ddfa9824a07f0c6c6981186e45f80187659c/documentation/images/800px/butterstick_r1d0_001.jpg -------------------------------------------------------------------------------- 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| [pcbnew] 9 | version=1 10 | LastNetListRead= 11 | UseCmpFile=1 12 | PadDrill=0.600000000000 13 | PadDrillOvalY=0.600000000000 14 | PadSizeH=1.500000000000 15 | PadSizeV=1.500000000000 16 | PcbTextSizeV=1.500000000000 17 | PcbTextSizeH=1.500000000000 18 | PcbTextThickness=0.300000000000 19 | ModuleTextSizeV=1.000000000000 20 | ModuleTextSizeH=1.000000000000 21 | ModuleTextSizeThickness=0.150000000000 22 | SolderMaskClearance=0.000000000000 23 | SolderMaskMinWidth=0.000000000000 24 | DrawSegmentWidth=0.200000000000 25 | BoardOutlineThickness=0.100000000000 26 | ModuleOutlineThickness=0.150000000000 27 | [cvpcb] 28 | version=1 29 | NetIExt=net 30 | [eeschema] 31 | version=1 32 | LibDir= 33 | [eeschema/libraries] 34 | [schematic_editor] 35 | version=1 36 | PageLayoutDescrFile= 37 | PlotDirectoryName=plot/ 38 | SubpartIdSeparator=0 39 | SubpartFirstId=65 40 | NetFmtName=Pcbnew 41 | SpiceAjustPassiveValues=0 42 | LabSize=50 43 | ERC_TestSimilarLabels=1 44 | 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0 51 | QSPI_D3 52 | Text GLabel 9250 3600 2 60 Input ~ 0 53 | FPGA_RESET 54 | $Comp 55 | L gkl_time:TYETBCSANF-32.000000 X1 56 | U 1 1 5ABDAC6C 57 | P 5400 6000 58 | F 0 "X1" H 5650 6300 50 0000 L CNN 59 | F 1 "ASDMB" H 5650 6200 50 0000 L CNN 60 | F 2 "Oscillators:Oscillator_SMD_SeikoEpson_SG210-4pin_2.5x2.0mm" H 6100 5650 50 0001 C CNN 61 | F 3 "http://www.abracon.com/Oscillators/ASV.pdf" H 5300 6000 50 0001 C CNN 62 | F 4 " 1473-30509-1-ND " H -3000 150 50 0001 C CNN "SN-DK" 63 | F 5 "SIT8008BI-72-18N-25.000000G" H -3000 150 50 0001 C CNN "PN" 64 | F 6 "SiTIME" H 0 0 50 0001 C CNN "MFG" 65 | 1 5400 6000 66 | 1 0 0 -1 67 | $EndComp 68 | Wire Wire Line 69 | 6000 5950 6000 5550 70 | $Comp 71 | L Device:R R4 72 | U 1 1 5AC144E9 73 | P 9050 3350 74 | F 0 "R4" H 9120 3396 50 0000 L CNN 75 | F 1 "10k" H 9120 3305 50 0000 L CNN 76 | F 2 "pkl_dipol:R_0402" V 8980 3350 50 0001 C CNN 77 | F 3 "" H 9050 3350 50 0001 C CNN 78 | F 4 "P10KDECT-ND" H -1200 800 50 0001 C CNN "SN-DK" 79 | F 5 "RMCF0402FT10K0" H -1200 800 50 0001 C CNN "PN" 80 | F 6 "Stackpole Electronics Inc" H 0 0 50 0001 C CNN "Mfg" 81 | 1 9050 3350 82 | -1 0 0 -1 83 | $EndComp 84 | Wire Wire Line 85 | 9250 3600 9050 3600 86 | Wire Wire Line 87 | 9050 3500 9050 3600 88 | Connection ~ 9050 3600 89 | $Comp 90 | L gkl_power:+3V3 #PWR059 91 | U 1 1 5AC1A3A6 92 | P 9050 3100 93 | F 0 "#PWR059" H 9050 2950 50 0001 C CNN 94 | F 1 "+3V3" V 9054 3206 50 0000 L CNN 95 | F 2 "" H 9050 3100 50 0001 C CNN 96 | F 3 "" H 9050 3100 50 0001 C CNN 97 | 1 9050 3100 98 | -1 0 0 -1 99 | $EndComp 100 | Wire Wire Line 101 | 9050 3200 9050 3100 102 | $Comp 103 | L gkl_lattice:ECP5U25-BG381 U3 104 | U 1 1 5B09968A 105 | P 2300 1100 106 | F 0 "U3" H 3150 1250 60 0000 L CNN 107 | F 1 "ECP5U25" H 2500 1250 60 0000 L CNN 108 | F 2 "gkl_housings_bga:caBGA_381_17x17" H 2300 1100 50 0001 C CNN 109 | F 3 "" H 2300 1100 50 0001 C CNN 110 | F 4 " 220-2052-ND " H 400 250 50 0001 C CNN "SN-DK" 111 | F 5 "LFE5U-45F-8BG381C" H 400 250 50 0001 C CNN "PN" 112 | F 6 "Lattice" H 400 250 50 0001 C CNN "Mfg" 113 | 1 2300 1100 114 | -1 0 0 -1 115 | $EndComp 116 | $Comp 117 | L gkl_lattice:ECP5U25-BG381 U3 118 | U 6 1 5B09970F 119 | P 2250 4000 120 | F 0 "U3" H 3100 4150 60 0000 L CNN 121 | F 1 "ECP5U25" H 2450 4150 60 0000 L CNN 122 | F 2 "gkl_housings_bga:caBGA_381_17x17" H 2250 4000 50 0001 C CNN 123 | F 3 "" H 2250 4000 50 0001 C CNN 124 | F 4 " 220-2052-ND " H 350 -350 50 0001 C CNN "SN-DK" 125 | F 5 "LFE5U-45F-8BG381C" H 350 -350 50 0001 C CNN "PN" 126 | F 6 "Lattice" H 350 -350 50 0001 C CNN "Mfg" 127 | 6 2250 4000 128 | -1 0 0 -1 129 | $EndComp 130 | $Comp 131 | L gkl_lattice:ECP5U25-BG381 U3 132 | U 7 1 5B099944 133 | P 7950 1700 134 | F 0 "U3" H 9550 1900 60 0000 L CNN 135 | F 1 "ECP5U25" H 8150 1900 60 0000 L CNN 136 | F 2 "gkl_housings_bga:caBGA_381_17x17" H 7950 1700 50 0001 C CNN 137 | F 3 "" H 7950 1700 50 0001 C CNN 138 | F 4 " 220-2052-ND " H -1200 400 50 0001 C CNN "SN-DK" 139 | F 5 "LFE5U-45F-8BG381C" H -1200 400 50 0001 C CNN "PN" 140 | F 6 "Lattice" H -1200 400 50 0001 C CNN "Mfg" 141 | 7 7950 1700 142 | -1 0 0 -1 143 | $EndComp 144 | $Comp 145 | L gkl_lattice:ECP5U25-BG381 U3 146 | U 8 1 5B0999B9 147 | P 7700 6000 148 | F 0 "U3" H 8500 6200 60 0000 L CNN 149 | F 1 "ECP5U25" H 7900 6200 60 0000 L CNN 150 | F 2 "gkl_housings_bga:caBGA_381_17x17" H 7700 6000 50 0001 C CNN 151 | F 3 "" H 7700 6000 50 0001 C CNN 152 | F 4 " 220-2052-ND " H -2150 400 50 0001 C CNN "SN-DK" 153 | F 5 "LFE5U-45F-8BG381C" H -2150 400 50 0001 C CNN "PN" 154 | F 6 "Lattice" H -2150 400 50 0001 C CNN "Mfg" 155 | 8 7700 6000 156 | -1 0 0 1 157 | $EndComp 158 | $Comp 159 | L gkl_power:GND #PWR0104 160 | U 1 1 5B1207AF 161 | P 8800 2050 162 | F 0 "#PWR0104" H 8800 1800 50 0001 C CNN 163 | F 1 "GND" H 8803 1924 50 0000 C CNN 164 | F 2 "" H 8700 1700 50 0001 C CNN 165 | F 3 "" H 8800 2050 50 0001 C CNN 166 | 1 8800 2050 167 | 1 0 0 -1 168 | $EndComp 169 | Wire Wire Line 170 | 7950 3600 9050 3600 171 | $Comp 172 | L gkl_power:+1V8 #PWR0105 173 | U 1 1 5B19EB6D 174 | P 6000 5550 175 | F 0 "#PWR0105" H 6000 5400 50 0001 C CNN 176 | F 1 "+1V8" V 6004 5656 50 0000 L CNN 177 | F 2 "" H 6000 5550 50 0001 C CNN 178 | F 3 "" H 6000 5550 50 0001 C CNN 179 | 1 6000 5550 180 | 1 0 0 -1 181 | $EndComp 182 | Text Notes 6850 1300 0 80 ~ 0 183 | BANK 8 184 | $Comp 185 | L gkl_power:+3V3 #PWR0107 186 | U 1 1 5B1B6FEA 187 | P 8900 1900 188 | F 0 "#PWR0107" H 8900 1750 50 0001 C CNN 189 | F 1 "+3V3" V 8904 2006 50 0000 L CNN 190 | F 2 "" H 8900 1900 50 0001 C CNN 191 | F 3 "" H 8900 1900 50 0001 C CNN 192 | 1 8900 1900 193 | 0 1 -1 0 194 | $EndComp 195 | Text Notes 7000 1400 0 50 ~ 0 196 | 3V3 197 | Text Notes 6650 1100 0 100 ~ 0 198 | QSPI Config 199 | Text Notes 1100 2750 1 100 ~ 0 200 | LEDS/SDMMC\n 201 | Text GLabel 7950 2600 2 60 Input ~ 0 202 | FPGA_RESET 203 | Text GLabel 8150 4000 2 60 Input ~ 0 204 | JTAG_TMS 205 | Text GLabel 8150 3900 2 60 Input ~ 0 206 | JTAG_TDO 207 | Text GLabel 8150 3800 2 60 Input ~ 0 208 | JTAG_TDI 209 | Text GLabel 8150 3700 2 60 Input ~ 0 210 | JTAG_TCK 211 | Wire Wire Line 212 | 7950 3700 8150 3700 213 | Wire Wire Line 214 | 8150 3800 7950 3800 215 | Wire Wire Line 216 | 7950 3900 8150 3900 217 | Wire Wire Line 218 | 8150 4000 7950 4000 219 | $Comp 220 | L gkl_power:GND #PWR0119 221 | U 1 1 5B1085E7 222 | P 7800 6100 223 | F 0 "#PWR0119" H 7800 5850 50 0001 C CNN 224 | F 1 "GND" H 7803 5974 50 0000 C CNN 225 | F 2 "" H 7700 5750 50 0001 C CNN 226 | F 3 "" H 7800 6100 50 0001 C CNN 227 | 1 7800 6100 228 | -1 0 0 -1 229 | $EndComp 230 | Wire Wire Line 231 | 7800 6100 7800 6000 232 | Wire Wire Line 233 | 7800 6000 7700 6000 234 | $Comp 235 | L gkl_power:+1V1 #PWR0120 236 | U 1 1 5B108EEB 237 | P 8000 5100 238 | F 0 "#PWR0120" H 8000 4950 50 0001 C CNN 239 | F 1 "+1V1" V 8000 5300 50 0000 C CNN 240 | F 2 "" H 8000 5100 50 0001 C CNN 241 | F 3 "" H 8000 5100 50 0001 C CNN 242 | 1 8000 5100 243 | 0 1 -1 0 244 | $EndComp 245 | Wire Wire Line 246 | 8000 5100 7700 5100 247 | Text Notes 1200 900 0 50 ~ 0 248 | BANK0 - 3V3 249 | Text Notes 1200 3700 0 50 ~ 0 250 | BANK7 - 1V8 251 | Wire Wire Line 252 | 7950 1800 8800 1800 253 | Wire Wire Line 254 | 8800 1800 8800 2000 255 | Wire Wire Line 256 | 7950 1900 8900 1900 257 | Wire Wire Line 258 | 7950 2000 8800 2000 259 | Connection ~ 8800 2000 260 | Wire Wire Line 261 | 8800 2000 8800 2050 262 | Text GLabel 2250 4500 2 50 Input ~ 0 263 | ETH_MDC 264 | Text GLabel 2250 4400 2 50 Input ~ 0 265 | ETH_MDIO 266 | Text GLabel 2250 6000 2 50 Input ~ 0 267 | ETH_TXD0 268 | Text GLabel 2250 6100 2 50 Input ~ 0 269 | ETH_TXD1 270 | Text GLabel 2250 6200 2 50 Input ~ 0 271 | ETH_TXD2 272 | Text GLabel 2250 6300 2 50 Input ~ 0 273 | ETH_TXD3 274 | Text GLabel 2250 5900 2 50 Input ~ 0 275 | ETH_RXD0 276 | Text GLabel 2250 5600 2 50 Input ~ 0 277 | ETH_RXD1 278 | Text GLabel 2250 5800 2 50 Input ~ 0 279 | ETH_RXD2 280 | Text GLabel 2250 5700 2 50 Input ~ 0 281 | ETH_RXD3 282 | Text GLabel 2250 6900 2 50 Input ~ 0 283 | ETH_TX_CTRL 284 | Text GLabel 2250 7100 2 50 Input ~ 0 285 | ETH_TX_CLK 286 | Text GLabel 2250 6500 2 50 Input ~ 0 287 | ETH_RX_CTRL 288 | Text GLabel 2250 6800 2 50 Input ~ 0 289 | ETH_RX_CLK 290 | Text GLabel 2250 4200 2 50 Input ~ 0 291 | ETH_INT 292 | Text GLabel 2250 4100 2 50 Input ~ 0 293 | ETH_RST 294 | Text GLabel 2250 7000 2 50 Input ~ 0 295 | PCLKT7_0 296 | Wire Wire Line 297 | 7700 5200 7900 5200 298 | Wire Wire Line 299 | 7900 5200 7900 4950 300 | $Comp 301 | L gkl_power:+3V3 #PWR0106 302 | U 1 1 5C7C78F9 303 | P 7900 4950 304 | F 0 "#PWR0106" H 7900 4800 50 0001 C CNN 305 | F 1 "+3V3" V 7900 5150 50 0000 C CNN 306 | F 2 "" H 7900 4950 50 0001 C CNN 307 | F 3 "" H 7900 4950 50 0001 C CNN 308 | 1 7900 4950 309 | -1 0 0 -1 310 | $EndComp 311 | Wire Wire Line 312 | 6000 5950 5800 5950 313 | $Comp 314 | L gkl_power:GND #PWR0123 315 | U 1 1 5C7CB5AD 316 | P 4950 6150 317 | F 0 "#PWR0123" H 4950 5900 50 0001 C CNN 318 | F 1 "GND" H 4953 6024 50 0000 C CNN 319 | F 2 "" H 4850 5800 50 0001 C CNN 320 | F 3 "" H 4950 6150 50 0001 C CNN 321 | 1 4950 6150 322 | 1 0 0 -1 323 | $EndComp 324 | Wire Wire Line 325 | 4950 6150 4950 6050 326 | Wire Wire Line 327 | 4950 6050 5000 6050 328 | NoConn ~ 5000 5950 329 | Text HLabel 9300 5700 2 50 Input ~ 0 330 | PORT0_VCCIO 331 | Text HLabel 9300 5500 2 50 Input ~ 0 332 | PORT1_VCCIO 333 | Text HLabel 9300 5300 2 50 Input ~ 0 334 | PORT2_VCCIO 335 | $Comp 336 | L Device:R R29 337 | U 1 1 5C9CDF63 338 | P 8900 5300 339 | F 0 "R29" V 8800 5200 50 0000 C CNN 340 | F 1 "0R" V 8800 5400 50 0000 C CNN 341 | F 2 "pkl_dipol:R_0402" V 8830 5300 50 0001 C CNN 342 | F 3 "~" H 8900 5300 50 0001 C CNN 343 | F 4 "Stackpole Electronics Inc" H 0 0 50 0001 C CNN "Mfg" 344 | F 5 "RMCF0402ZT0R00" H 0 0 50 0001 C CNN "PN" 345 | 1 8900 5300 346 | 0 1 1 0 347 | $EndComp 348 | $Comp 349 | L Device:R R30 350 | U 1 1 5C9CE4FB 351 | P 8900 5500 352 | F 0 "R30" V 8800 5400 50 0000 C CNN 353 | F 1 "0R" V 8800 5600 50 0000 C CNN 354 | F 2 "pkl_dipol:R_0402" V 8830 5500 50 0001 C CNN 355 | F 3 "~" H 8900 5500 50 0001 C CNN 356 | F 4 "Stackpole Electronics Inc" H 0 0 50 0001 C CNN "Mfg" 357 | F 5 "RMCF0402ZT0R00" H 0 0 50 0001 C CNN "PN" 358 | 1 8900 5500 359 | 0 1 1 0 360 | $EndComp 361 | $Comp 362 | L Device:R R31 363 | U 1 1 5C9CEE6F 364 | P 8900 5700 365 | F 0 "R31" V 8800 5600 50 0000 C CNN 366 | F 1 "0R" V 8800 5800 50 0000 C CNN 367 | F 2 "pkl_dipol:R_0402" V 8830 5700 50 0001 C CNN 368 | F 3 "~" H 8900 5700 50 0001 C CNN 369 | F 4 "Stackpole Electronics Inc" H 0 0 50 0001 C CNN "Mfg" 370 | F 5 "RMCF0402ZT0R00" H 0 0 50 0001 C CNN "PN" 371 | 1 8900 5700 372 | 0 1 1 0 373 | $EndComp 374 | Wire Wire Line 375 | 8650 5400 8650 5300 376 | Wire Wire Line 377 | 8650 5300 8750 5300 378 | Wire Wire Line 379 | 7700 5400 8650 5400 380 | Wire Wire Line 381 | 7700 5500 8750 5500 382 | Wire Wire Line 383 | 8650 5600 8650 5700 384 | Wire Wire Line 385 | 8650 5700 8750 5700 386 | Wire Wire Line 387 | 7700 5600 8650 5600 388 | Text Label 7800 5400 0 50 ~ 0 389 | VCCIO6 390 | Text Label 7800 5500 0 50 ~ 0 391 | VCCIO3 392 | Text Label 7800 5600 0 50 ~ 0 393 | VCCIO2 394 | Text GLabel 5800 6050 2 60 Input ~ 0 395 | PCLKT1_0 396 | Text GLabel 2300 1800 2 60 Input ~ 0 397 | LED_GigE 398 | Text GLabel 2300 1900 2 60 Input ~ 0 399 | LED_SD 400 | Text GLabel 2300 2000 2 60 Input ~ 0 401 | LED_RAM0 402 | Text GLabel 2300 2100 2 60 Input ~ 0 403 | LED_RAM1 404 | Text GLabel 7950 2100 2 60 Input ~ 0 405 | LED_ECP5 406 | Text GLabel 2300 2300 2 60 Input ~ 0 407 | LED_ACT 408 | Wire Wire Line 409 | 9050 5300 9300 5300 410 | Wire Wire Line 411 | 9300 5500 9050 5500 412 | Wire Wire Line 413 | 9050 5700 9300 5700 414 | $Comp 415 | L Device:R R54 416 | U 1 1 5CCE2D75 417 | P 8900 5900 418 | F 0 "R54" V 8800 5800 50 0000 C CNN 419 | F 1 "0R" V 8800 6000 50 0000 C CNN 420 | F 2 "pkl_dipol:R_0402" V 8830 5900 50 0001 C CNN 421 | F 3 "~" H 8900 5900 50 0001 C CNN 422 | F 4 "Stackpole Electronics Inc" H 0 0 50 0001 C CNN "Mfg" 423 | F 5 "RMCF0402ZT0R00" H 0 0 50 0001 C CNN "PN" 424 | 1 8900 5900 425 | 0 1 1 0 426 | $EndComp 427 | Text Label 7800 5700 0 50 ~ 0 428 | VCCIO1 429 | Text Label 7800 5800 0 50 ~ 0 430 | VCCIO0 431 | Wire Wire Line 432 | 8550 5700 8550 5900 433 | Wire Wire Line 434 | 7700 5700 8550 5700 435 | Wire Wire Line 436 | 8550 5900 8750 5900 437 | Wire Wire Line 438 | 9050 5900 9350 5900 439 | $Comp 440 | L gkl_power:+1V8 #PWR0253 441 | U 1 1 5CCE482C 442 | P 9350 5900 443 | F 0 "#PWR0253" H 9350 5750 50 0001 C CNN 444 | F 1 "+1V8" V 9353 6006 50 0000 L CNN 445 | F 2 "" H 9350 5900 50 0001 C CNN 446 | F 3 "" H 9350 5900 50 0001 C CNN 447 | 1 9350 5900 448 | 0 1 1 0 449 | $EndComp 450 | Wire Wire Line 451 | 7700 5900 8000 5900 452 | Wire Wire Line 453 | 8000 5900 8000 6100 454 | Wire Wire Line 455 | 8450 5800 8450 6100 456 | Wire Wire Line 457 | 8450 6100 8750 6100 458 | Wire Wire Line 459 | 7700 5800 8450 5800 460 | $Comp 461 | L Device:R R55 462 | U 1 1 5CCE7F95 463 | P 8900 6100 464 | F 0 "R55" V 8800 6000 50 0000 C CNN 465 | F 1 "0R" V 8800 6200 50 0000 C CNN 466 | F 2 "pkl_dipol:R_0402" V 8830 6100 50 0001 C CNN 467 | F 3 "~" H 8900 6100 50 0001 C CNN 468 | F 4 "Stackpole Electronics Inc" H 0 0 50 0001 C CNN "Mfg" 469 | F 5 "RMCF0402ZT0R00" H 0 0 50 0001 C CNN "PN" 470 | 1 8900 6100 471 | 0 1 1 0 472 | $EndComp 473 | Wire Wire Line 474 | 9050 6100 9350 6100 475 | $Comp 476 | L gkl_power:+3V3 #PWR0254 477 | U 1 1 5CCEA489 478 | P 9350 6100 479 | F 0 "#PWR0254" H 9350 5950 50 0001 C CNN 480 | F 1 "+3V3" V 9353 6206 50 0000 L CNN 481 | F 2 "" H 9350 6100 50 0001 C CNN 482 | F 3 "" H 9350 6100 50 0001 C CNN 483 | 1 9350 6100 484 | 0 1 1 0 485 | $EndComp 486 | Text Label 7800 5300 0 50 ~ 0 487 | VCCIO7 488 | $Comp 489 | L Device:R R53 490 | U 1 1 5CCEB834 491 | P 8900 5100 492 | F 0 "R53" V 8800 5000 50 0000 C CNN 493 | F 1 "0R" V 8800 5200 50 0000 C CNN 494 | F 2 "pkl_dipol:R_0402" V 8830 5100 50 0001 C CNN 495 | F 3 "~" H 8900 5100 50 0001 C CNN 496 | F 4 "Stackpole Electronics Inc" H 0 0 50 0001 C CNN "Mfg" 497 | F 5 "RMCF0402ZT0R00" H 0 0 50 0001 C CNN "PN" 498 | 1 8900 5100 499 | 0 1 1 0 500 | $EndComp 501 | Wire Wire Line 502 | 8550 5100 8750 5100 503 | Wire Wire Line 504 | 9050 5100 9350 5100 505 | $Comp 506 | L gkl_power:+1V8 #PWR0255 507 | U 1 1 5CCEB83C 508 | P 9350 5100 509 | F 0 "#PWR0255" H 9350 4950 50 0001 C CNN 510 | F 1 "+1V8" V 9353 5206 50 0000 L CNN 511 | F 2 "" H 9350 5100 50 0001 C CNN 512 | F 3 "" H 9350 5100 50 0001 C CNN 513 | 1 9350 5100 514 | 0 1 1 0 515 | $EndComp 516 | Wire Wire Line 517 | 8550 5100 8550 5300 518 | Wire Wire Line 519 | 7700 5300 8550 5300 520 | Text GLabel 2300 1700 2 60 Input ~ 0 521 | SD_CD 522 | $EndSCHEMATC 523 | -------------------------------------------------------------------------------- /hardware/ButterStick_r0.1/fileHyperRAM.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | LIBS:ButterStick-cache 3 | EELAYER 29 0 4 | EELAYER END 5 | $Descr A4 11693 8268 6 | encoding utf-8 7 | Sheet 13 13 8 | Title "ButterStick" 9 | Date "2019-03-19" 10 | Rev "r0_1" 11 | Comp "GsD" 12 | Comment1 "" 13 | Comment2 "" 14 | Comment3 "" 15 | Comment4 "" 16 | $EndDescr 17 | Text GLabel 9050 2700 2 60 Input ~ 0 18 | HB0_RWDS 19 | Text GLabel 9050 2600 2 60 Input ~ 0 20 | HB0_CS# 21 | Text GLabel 9050 2500 2 60 Input ~ 0 22 | HB0_RESET# 23 | Text GLabel 7850 2000 0 60 Input ~ 0 24 | HB0_CK 25 | Text GLabel 7850 2100 0 60 Input ~ 0 26 | HB0_CK# 27 | $Comp 28 | L gkl_mem:S27KS0641 U4 29 | U 1 1 5ABD3939 30 | P 8450 2650 31 | F 0 "U4" H 8450 3590 60 0000 C CNN 32 | F 1 "IS66WVH16M8ALL" H 8450 3484 60 0000 C CNN 33 | F 2 "bosonFrameGrabber:BGA_24" H 8450 3600 60 0001 C CNN 34 | F 3 "" H 8450 3600 60 0001 C CNN 35 | F 4 "706-1548-ND" H 500 -1250 50 0001 C CNN "SN-DK" 36 | F 5 "IS66WVH16M8ALL-166B1LI" H 500 -1250 50 0001 C CNN "PN" 37 | F 6 "ISSI, Integrated Silicon Solution Inc" H 0 0 50 0001 C CNN "Mfg" 38 | 1 8450 2650 39 | 1 0 0 -1 40 | $EndComp 41 | $Comp 42 | L gkl_power:+1V8 #PWR038 43 | U 1 1 5ABB0386 44 | P 9150 1900 45 | F 0 "#PWR038" H 9150 1750 50 0001 C CNN 46 | F 1 "+1V8" H 9153 2051 50 0000 C CNN 47 | F 2 "" H 9150 1900 50 0001 C CNN 48 | F 3 "" H 9150 1900 50 0001 C CNN 49 | 1 9150 1900 50 | 1 0 0 -1 51 | $EndComp 52 | Wire Wire Line 53 | 9050 2000 9150 2000 54 | Wire Wire Line 55 | 9150 2000 9150 1900 56 | Wire Wire Line 57 | 9050 2300 9250 2300 58 | $Comp 59 | L gkl_power:GND #PWR040 60 | U 1 1 5ABB03DC 61 | P 9150 3450 62 | F 0 "#PWR040" H 9150 3200 50 0001 C CNN 63 | F 1 "GND" H 9153 3324 50 0000 C CNN 64 | F 2 "" H 9050 3100 50 0001 C CNN 65 | F 3 "" H 9150 3450 50 0001 C CNN 66 | 1 9150 3450 67 | 1 0 0 -1 68 | $EndComp 69 | Wire Wire Line 70 | 9050 3200 9150 3200 71 | Wire Wire Line 72 | 9150 3200 9150 3300 73 | Wire Wire Line 74 | 9050 3300 9150 3300 75 | Connection ~ 9150 3300 76 | $Comp 77 | L gkl_power:+1V8 #PWR041 78 | U 1 1 5ABB0494 79 | P 9250 2900 80 | F 0 "#PWR041" H 9250 2750 50 0001 C CNN 81 | F 1 "+1V8" V 9253 3006 50 0000 L CNN 82 | F 2 "" H 9250 2900 50 0001 C CNN 83 | F 3 "" H 9250 2900 50 0001 C CNN 84 | 1 9250 2900 85 | 0 1 1 0 86 | $EndComp 87 | Wire Wire Line 88 | 9250 2900 9150 2900 89 | Wire Wire Line 90 | 9050 3000 9150 3000 91 | Wire Wire Line 92 | 9150 3000 9150 2900 93 | Connection ~ 9150 2900 94 | $Comp 95 | L gkl_mem:AT25SF081 U6 96 | U 1 1 5ABD9FA9 97 | P 4000 6350 98 | F 0 "U6" H 4000 6791 60 0000 C CNN 99 | F 1 "S25FL127S" H 4000 6685 60 0000 C CNN 100 | F 2 "Package_SO:SOIJ-8_5.3x5.3mm_P1.27mm" H 4000 6800 60 0001 C CNN 101 | F 3 "" H 4000 6800 60 0001 C CNN 102 | F 4 "1092-1178-1-ND" H -150 2400 50 0001 C CNN "SN-DK" 103 | F 5 "S25FL127SABMFI101" H -150 2400 50 0001 C CNN "PN" 104 | F 6 "Cypress Semiconductor Corp" H 0 0 50 0001 C CNN "Mfg" 105 | 1 4000 6350 106 | 1 0 0 -1 107 | $EndComp 108 | $Comp 109 | L gkl_power:GND #PWR04 110 | U 1 1 5ABD9FB0 111 | P 3350 6600 112 | F 0 "#PWR04" H 3350 6350 50 0001 C CNN 113 | F 1 "GND" H 3353 6474 50 0000 C CNN 114 | F 2 "" H 3250 6250 50 0001 C CNN 115 | F 3 "" H 3350 6600 50 0001 C CNN 116 | 1 3350 6600 117 | 1 0 0 -1 118 | $EndComp 119 | $Comp 120 | L gkl_power:+3V3 #PWR05 121 | U 1 1 5ABD9FB6 122 | P 4650 6100 123 | F 0 "#PWR05" H 4650 5950 50 0001 C CNN 124 | F 1 "+3V3" V 4654 6206 50 0000 L CNN 125 | F 2 "" H 4650 6100 50 0001 C CNN 126 | F 3 "" H 4650 6100 50 0001 C CNN 127 | 1 4650 6100 128 | 1 0 0 -1 129 | $EndComp 130 | Text GLabel 3450 6200 0 60 Input ~ 0 131 | SPI_CONFIG_SS 132 | Text GLabel 4550 6400 2 60 Input ~ 0 133 | SPI_CONFIG_SCK 134 | Text GLabel 3450 6300 0 60 Input ~ 0 135 | SPI_CONFIG_MISO 136 | Text GLabel 4550 6500 2 60 Input ~ 0 137 | SPI_CONFIG_MOSI 138 | Wire Wire Line 139 | 4550 6200 4650 6200 140 | Wire Wire Line 141 | 4650 6200 4650 6100 142 | Wire Wire Line 143 | 3350 6600 3350 6500 144 | Wire Wire Line 145 | 3350 6500 3450 6500 146 | Text GLabel 4550 6300 2 60 Input ~ 0 147 | QSPI_D3 148 | Text GLabel 3450 6400 0 60 Input ~ 0 149 | QSPI_D2 150 | Wire Wire Line 151 | 9150 3300 9150 3450 152 | Wire Wire Line 153 | 9150 2900 9050 2900 154 | Text GLabel 7850 2600 0 50 Input ~ 0 155 | HB0_DQ0 156 | Text GLabel 7850 2700 0 50 Input ~ 0 157 | HB0_DQ1 158 | Text GLabel 7850 2800 0 50 Input ~ 0 159 | HB0_DQ2 160 | Text GLabel 7850 2900 0 50 Input ~ 0 161 | HB0_DQ3 162 | Text GLabel 7850 3000 0 50 Input ~ 0 163 | HB0_DQ4 164 | Text GLabel 7850 3100 0 50 Input ~ 0 165 | HB0_DQ5 166 | Text GLabel 7850 3200 0 50 Input ~ 0 167 | HB0_DQ6 168 | Text GLabel 7850 3300 0 50 Input ~ 0 169 | HB0_DQ7 170 | Text GLabel 9000 4650 2 60 Input ~ 0 171 | HB1_RWDS 172 | Text GLabel 9000 4550 2 60 Input ~ 0 173 | HB1_CS# 174 | Text GLabel 9000 4450 2 60 Input ~ 0 175 | HB1_RESET# 176 | Text GLabel 7800 3950 0 60 Input ~ 0 177 | HB1_CK 178 | Text GLabel 7800 4050 0 60 Input ~ 0 179 | HB1_CK# 180 | $Comp 181 | L gkl_mem:S27KS0641 U5 182 | U 1 1 5BA221BE 183 | P 8400 4600 184 | F 0 "U5" H 8400 5540 60 0000 C CNN 185 | F 1 "IS66WVH16M8ALL" H 8400 5434 60 0000 C CNN 186 | F 2 "bosonFrameGrabber:BGA_24" H 8400 5550 60 0001 C CNN 187 | F 3 "" H 8400 5550 60 0001 C CNN 188 | F 4 "706-1548-ND" H 450 700 50 0001 C CNN "SN-DK" 189 | F 5 "IS66WVH16M8ALL-166B1LI" H 450 700 50 0001 C CNN "PN" 190 | F 6 "ISSI, Integrated Silicon Solution Inc" H 0 0 50 0001 C CNN "Mfg" 191 | 1 8400 4600 192 | 1 0 0 -1 193 | $EndComp 194 | $Comp 195 | L gkl_power:+1V8 #PWR0126 196 | U 1 1 5BA221C4 197 | P 9100 3850 198 | F 0 "#PWR0126" H 9100 3700 50 0001 C CNN 199 | F 1 "+1V8" H 9103 4001 50 0000 C CNN 200 | F 2 "" H 9100 3850 50 0001 C CNN 201 | F 3 "" H 9100 3850 50 0001 C CNN 202 | 1 9100 3850 203 | 1 0 0 -1 204 | $EndComp 205 | Wire Wire Line 206 | 9000 3950 9100 3950 207 | Wire Wire Line 208 | 9100 3950 9100 3850 209 | $Comp 210 | L gkl_power:GND #PWR0127 211 | U 1 1 5BA221CC 212 | P 9200 4250 213 | F 0 "#PWR0127" H 9200 4000 50 0001 C CNN 214 | F 1 "GND" V 9204 4170 50 0000 R CNN 215 | F 2 "" H 9100 3900 50 0001 C CNN 216 | F 3 "" H 9200 4250 50 0001 C CNN 217 | 1 9200 4250 218 | 0 -1 -1 0 219 | $EndComp 220 | Wire Wire Line 221 | 9000 4250 9200 4250 222 | $Comp 223 | L gkl_power:GND #PWR0128 224 | U 1 1 5BA221D3 225 | P 9100 5400 226 | F 0 "#PWR0128" H 9100 5150 50 0001 C CNN 227 | F 1 "GND" H 9103 5274 50 0000 C CNN 228 | F 2 "" H 9000 5050 50 0001 C CNN 229 | F 3 "" H 9100 5400 50 0001 C CNN 230 | 1 9100 5400 231 | 1 0 0 -1 232 | $EndComp 233 | Wire Wire Line 234 | 9000 5150 9100 5150 235 | Wire Wire Line 236 | 9100 5150 9100 5250 237 | Wire Wire Line 238 | 9000 5250 9100 5250 239 | Connection ~ 9100 5250 240 | $Comp 241 | L gkl_power:+1V8 #PWR0129 242 | U 1 1 5BA221DD 243 | P 9200 4850 244 | F 0 "#PWR0129" H 9200 4700 50 0001 C CNN 245 | F 1 "+1V8" V 9203 4956 50 0000 L CNN 246 | F 2 "" H 9200 4850 50 0001 C CNN 247 | F 3 "" H 9200 4850 50 0001 C CNN 248 | 1 9200 4850 249 | 0 1 1 0 250 | $EndComp 251 | Wire Wire Line 252 | 9200 4850 9100 4850 253 | Wire Wire Line 254 | 9000 4950 9100 4950 255 | Wire Wire Line 256 | 9100 4950 9100 4850 257 | Connection ~ 9100 4850 258 | Wire Wire Line 259 | 9100 5250 9100 5400 260 | Wire Wire Line 261 | 9100 4850 9000 4850 262 | Text GLabel 7800 4550 0 50 Input ~ 0 263 | HB1_DQ0 264 | Text GLabel 7800 4650 0 50 Input ~ 0 265 | HB1_DQ1 266 | Text GLabel 7800 4750 0 50 Input ~ 0 267 | HB1_DQ2 268 | Text GLabel 7800 4850 0 50 Input ~ 0 269 | HB1_DQ3 270 | Text GLabel 7800 4950 0 50 Input ~ 0 271 | HB1_DQ4 272 | Text GLabel 7800 5050 0 50 Input ~ 0 273 | HB1_DQ5 274 | Text GLabel 7800 5150 0 50 Input ~ 0 275 | HB1_DQ6 276 | Text GLabel 7800 5250 0 50 Input ~ 0 277 | HB1_DQ7 278 | $Comp 279 | L gkl_power:GND #PWR0124 280 | U 1 1 5C7E74A0 281 | P 9250 2300 282 | F 0 "#PWR0124" H 9250 2050 50 0001 C CNN 283 | F 1 "GND" H 9253 2174 50 0000 C CNN 284 | F 2 "" H 9150 1950 50 0001 C CNN 285 | F 3 "" H 9250 2300 50 0001 C CNN 286 | 1 9250 2300 287 | 0 -1 -1 0 288 | $EndComp 289 | Text GLabel 4650 2650 2 60 Input ~ 0 290 | HB0_CS# 291 | Text GLabel 4650 3250 2 60 Input ~ 0 292 | HB0_RESET# 293 | Text GLabel 4650 3850 2 60 Input ~ 0 294 | HB0_CK 295 | Text GLabel 4650 3750 2 60 Input ~ 0 296 | HB0_CK# 297 | Text GLabel 4650 3150 2 60 Input ~ 0 298 | HB0_DQ0 299 | Text GLabel 4650 2950 2 60 Input ~ 0 300 | HB0_DQ1 301 | Text GLabel 4650 3350 2 60 Input ~ 0 302 | HB0_DQ2 303 | Text GLabel 4650 2750 2 60 Input ~ 0 304 | HB0_DQ3 305 | Text GLabel 4650 3550 2 60 Input ~ 0 306 | HB0_DQ4 307 | Text GLabel 4650 2850 2 60 Input ~ 0 308 | HB0_DQ5 309 | Text GLabel 4650 3050 2 60 Input ~ 0 310 | HB0_DQ6 311 | Text GLabel 4650 3650 2 60 Input ~ 0 312 | HB0_DQ7 313 | Text GLabel 4650 3450 2 60 Input ~ 0 314 | HB0_RWDS 315 | Text Notes 3450 3900 1 100 ~ 0 316 | HyperBus 317 | Text Notes 3600 1950 0 50 ~ 0 318 | BANK1 - 1V8 319 | Text GLabel 4650 4050 2 60 Input ~ 0 320 | HB1_CS# 321 | Text GLabel 4650 5250 2 60 Input ~ 0 322 | HB1_RESET# 323 | Text GLabel 4650 4250 2 60 Input ~ 0 324 | HB1_CK 325 | Text GLabel 4650 4150 2 60 Input ~ 0 326 | HB1_CK# 327 | Text GLabel 4650 4850 2 60 Input ~ 0 328 | HB1_DQ0 329 | Text GLabel 4650 4750 2 60 Input ~ 0 330 | HB1_DQ1 331 | Text GLabel 4650 4650 2 60 Input ~ 0 332 | HB1_DQ2 333 | Text GLabel 4650 5050 2 60 Input ~ 0 334 | HB1_DQ3 335 | Text GLabel 4650 5150 2 60 Input ~ 0 336 | HB1_DQ4 337 | Text GLabel 4650 4550 2 60 Input ~ 0 338 | HB1_DQ5 339 | Text GLabel 4650 4450 2 60 Input ~ 0 340 | HB1_DQ6 341 | Text GLabel 4650 4350 2 60 Input ~ 0 342 | HB1_DQ7 343 | Text GLabel 4650 4950 2 60 Input ~ 0 344 | HB1_RWDS 345 | Text GLabel 4650 2350 2 60 Input ~ 0 346 | PCLKT1_0 347 | Text GLabel 4650 2250 2 60 Input ~ 0 348 | PCLKC1_1 349 | Text GLabel 4650 2150 2 60 Input ~ 0 350 | PCLKT1_1 351 | $Comp 352 | L gkl_lattice:ECP5U25-BG381 U? 353 | U 2 1 5C97C904 354 | P 4650 2150 355 | AR Path="/5AB8ACB7/5C97C904" Ref="U?" Part="2" 356 | AR Path="/5ABD38F2/5C97C904" Ref="U3" Part="2" 357 | F 0 "U3" H 5550 2300 60 0000 L CNN 358 | F 1 "ECP5U25" H 4850 2300 60 0000 L CNN 359 | F 2 "gkl_housings_bga:caBGA_381_17x17" H 4650 2150 50 0001 C CNN 360 | F 3 "" H 4650 2150 50 0001 C CNN 361 | F 4 " 220-2052-ND " H 800 1300 50 0001 C CNN "SN-DK" 362 | F 5 "LFE5U-45F-8BG381C" H 800 1300 50 0001 C CNN "PN" 363 | F 6 "Lattice" H 800 1300 50 0001 C CNN "Mfg" 364 | 2 4650 2150 365 | -1 0 0 -1 366 | $EndComp 367 | $EndSCHEMATC 368 | -------------------------------------------------------------------------------- /hardware/ButterStick_r0.1/fileSDMMC.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | LIBS:ButterStick-cache 3 | EELAYER 26 0 4 | EELAYER END 5 | $Descr A4 11693 8268 6 | encoding utf-8 7 | Sheet 4 14 8 | Title "" 9 | Date "" 10 | Rev "" 11 | Comp "" 12 | Comment1 "" 13 | Comment2 "" 14 | Comment3 "" 15 | Comment4 "" 16 | $EndDescr 17 | $EndSCHEMATC 18 | -------------------------------------------------------------------------------- /hardware/ButterStick_r0.1/fp-info-cache: -------------------------------------------------------------------------------- 1 | 29480597923958 2 | pkl_dipol 3 | C_0201 4 | Capacitor SMD 0201, reflow soldering 5 | capacitor 0201 6 | 0 7 | 2 8 | 2 9 | pkl_dipol 10 | C_0402 11 | Capacitor SMD 0402, reflow soldering 12 | capacitor 0402 13 | 0 14 | 2 15 | 2 16 | pkl_dipol 17 | C_0603 18 | Capacitor SMD 0603, reflow soldering 19 | capacitor 0603 20 | 0 21 | 2 22 | 2 23 | pkl_dipol 24 | C_0805 25 | Capacitor SMD 0805, reflow soldering 26 | capacitor 0805 27 | 0 28 | 2 29 | 2 30 | pkl_dipol 31 | C_1206 32 | Capacitor SMD 1206, reflow soldering 33 | capacitor 1206 34 | 0 35 | 2 36 | 2 37 | pkl_dipol 38 | C_1218 39 | Capacitor SMD 1218, reflow soldering 40 | capacitor 1218 41 | 0 42 | 2 43 | 2 44 | pkl_dipol 45 | C_2010 46 | Capacitor SMD 2010, reflow soldering 47 | capacitor 2010 48 | 0 49 | 2 50 | 2 51 | pkl_dipol 52 | C_2512 53 | Capacitor SMD 2512, reflow soldering 54 | capacitor 2512 55 | 0 56 | 2 57 | 2 58 | pkl_dipol 59 | C_XH414HG-IV01E 60 | Super Capacitor SMD Coin IV01E, reflow soldering 61 | super capacitor IV01E 62 | 0 63 | 2 64 | 2 65 | pkl_dipol 66 | D_0402 67 | Diode SMD 0402, reflow soldering 68 | diode led 0402 69 | 0 70 | 2 71 | 2 72 | pkl_dipol 73 | D_0603 74 | Diode SMD 0603, reflow soldering 75 | diode led 0603 76 | 0 77 | 2 78 | 2 79 | pkl_dipol 80 | D_0603_Side 81 | Diode SMD 0603 Side 82 | diode led 0603 83 | 0 84 | 2 85 | 2 86 | pkl_dipol 87 | L_0402 88 | Inductor SMD 0402, reflow soldering 89 | inductor 0402 90 | 0 91 | 2 92 | 2 93 | pkl_dipol 94 | L_0603 95 | Inductor SMD 0603, reflow soldering 96 | inductor 0603 97 | 0 98 | 2 99 | 2 100 | pkl_dipol 101 | R_0402 102 | Resistor SMD 0402, reflow soldering 103 | resistor 0402 104 | 0 105 | 2 106 | 2 107 | pkl_dipol 108 | R_0603 109 | Resistor SMD 0603, reflow soldering 110 | resistor 0603 111 | 0 112 | 2 113 | 2 114 | pkl_dipol 115 | R_Array_Concave_4x0603 116 | Thick Film Chip Resistor Array, Wave soldering, Vishay CRA06P (see cra06p.pdf) 117 | resistor array 118 | 0 119 | 8 120 | 8 121 | pkl_dipol 122 | R_Array_Convex_4x0402 123 | Thick Film Chip Resistor Array, Wave soldering, Vishay CRA06P (see cra06p.pdf) 124 | resistor array 125 | 0 126 | 8 127 | 8 128 | pkl_dipol 129 | SC_1210 130 | Super Capacitor SMD 1210 131 | capacitor 1210 132 | 0 133 | 2 134 | 2 135 | -------------------------------------------------------------------------------- /hardware/ButterStick_r0.1/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name gkl_housings_qfn)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_housings_qfn.pretty)(options "")(descr "")) 3 | (lib (name gkl_housings_bga)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_housings_bga.pretty)(options "")(descr "")) 4 | (lib (name gkl_housings_son)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_housings_son.pretty)(options "")(descr "")) 5 | (lib (name gkl_housings_dfn)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_housings_dfn.pretty)(options "")(descr "")) 6 | (lib (name gkl_ublox)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_ublox.pretty)(options "")(descr "")) 7 | (lib (name gkl_antenna)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_antenna.pretty)(options "")(descr "")) 8 | (lib (name gkl_conn)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_conn.pretty)(options "")(descr "")) 9 | (lib (name gkl_logos)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_logos.pretty)(options "")(descr "")) 10 | (lib (name gkl_time)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_time.pretty)(options "")(descr "")) 11 | (lib (name gkl_led)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_led.pretty)(options "")(descr "")) 12 | (lib (name pkl_tag_connect)(type KiCad)(uri ${KIPRJMOD}/../../lib/pkl/pkl_tag_connect.pretty)(options "")(descr "")) 13 | (lib (name pkl_dipol)(type KiCad)(uri ${KIPRJMOD}/../../lib/pkl/pkl_dipol.pretty)(options "")(descr "")) 14 | (lib (name pkl_housings_sot)(type KiCad)(uri ${KIPRJMOD}/../../lib/pkl/pkl_housings_sot.pretty)(options "")(descr "")) 15 | ) 16 | -------------------------------------------------------------------------------- /hardware/ButterStick_r0.1/plot/ButterStick-Back.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/butterstick-fpga/butterstick-hardware/0694ddfa9824a07f0c6c6981186e45f80187659c/hardware/ButterStick_r0.1/plot/ButterStick-Back.png -------------------------------------------------------------------------------- /hardware/ButterStick_r0.1/plot/ButterStick-Front.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/butterstick-fpga/butterstick-hardware/0694ddfa9824a07f0c6c6981186e45f80187659c/hardware/ButterStick_r0.1/plot/ButterStick-Front.png -------------------------------------------------------------------------------- /hardware/ButterStick_r0.1/plot/ButterStick_20190319_234341.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/butterstick-fpga/butterstick-hardware/0694ddfa9824a07f0c6c6981186e45f80187659c/hardware/ButterStick_r0.1/plot/ButterStick_20190319_234341.zip -------------------------------------------------------------------------------- /hardware/ButterStick_r0.1/plot/render_001.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/butterstick-fpga/butterstick-hardware/0694ddfa9824a07f0c6c6981186e45f80187659c/hardware/ButterStick_r0.1/plot/render_001.jpg -------------------------------------------------------------------------------- /hardware/ButterStick_r0.1/sym-lib-table: -------------------------------------------------------------------------------- 1 | (sym_lib_table 2 | (lib (name power)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_power.lib)(options "")(descr "")) 3 | (lib (name gkl_rf)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_rf.lib)(options "")(descr "")) 4 | (lib (name gkl_microchip)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_microchip.lib)(options "")(descr "")) 5 | (lib (name gkl_pmic)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_pmic.lib)(options "")(descr "")) 6 | (lib (name gkl_mosfet)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_mosfet.lib)(options "")(descr "")) 7 | (lib (name gkl_mem)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_mem.lib)(options "")(descr "")) 8 | (lib (name gkl_time)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_time.lib)(options "")(descr "")) 9 | (lib (name gkl_misc)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_misc.lib)(options "")(descr "")) 10 | (lib (name gkl_lattice)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_lattice.lib)(options "")(descr "")) 11 | (lib (name gkl_power)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_power.lib)(options "")(descr "")) 12 | (lib (name pkl_tag_connect)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_tag_connect.lib)(options "")(descr "")) 13 | (lib (name pkl_silabs)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_silabs.lib)(options "")(descr "")) 14 | (lib (name pkl_sensor)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_sensor.lib)(options "")(descr "")) 15 | (lib (name pkl_power)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_power.lib)(options "")(descr "")) 16 | (lib (name pkl_misc)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_misc.lib)(options "")(descr "")) 17 | (lib (name pkl_memory)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_memory.lib)(options "")(descr "")) 18 | (lib (name pkl_maxim)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_maxim.lib)(options "")(descr "")) 19 | (lib (name pkl_logos)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_logos.lib)(options "")(descr "")) 20 | (lib (name pkl_linear)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_linear.lib)(options "")(descr "")) 21 | (lib (name pkl_device)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_device.lib)(options "")(descr "")) 22 | (lib (name pkl_conn)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_conn.lib)(options "")(descr "")) 23 | ) 24 | -------------------------------------------------------------------------------- /hardware/ButterStick_r0.2/ButterStick.pro: -------------------------------------------------------------------------------- 1 | update=Fri 31 May 2019 21:36:18 ACST 2 | version=1 3 | last_client=kicad 4 | [general] 5 | version=1 6 | RootSch= 7 | BoardNm= 8 | [cvpcb] 9 | version=1 10 | NetIExt=net 11 | [eeschema] 12 | version=1 13 | LibDir= 14 | [eeschema/libraries] 15 | [schematic_editor] 16 | version=1 17 | PageLayoutDescrFile= 18 | PlotDirectoryName=plot/ 19 | SubpartIdSeparator=0 20 | SubpartFirstId=65 21 | NetFmtName=Pcbnew 22 | SpiceAjustPassiveValues=0 23 | LabSize=50 24 | ERC_TestSimilarLabels=1 25 | [pcbnew] 26 | version=1 27 | PageLayoutDescrFile= 28 | LastNetListRead= 29 | CopperLayerCount=6 30 | BoardThickness=1.6 31 | AllowMicroVias=0 32 | AllowBlindVias=0 33 | RequireCourtyardDefinitions=0 34 | ProhibitOverlappingCourtyards=1 35 | MinTrackWidth=0.08889999999999999 36 | MinViaDiameter=0.45 37 | MinViaDrill=0.2 38 | MinMicroViaDiameter=0.2 39 | MinMicroViaDrill=0.09999999999999999 40 | MinHoleToHole=0.25 41 | TrackWidth1=0.1 42 | TrackWidth2=0.0889 43 | TrackWidth3=0.1 44 | TrackWidth4=0.10033 45 | TrackWidth5=0.1016 46 | TrackWidth6=0.10414 47 | TrackWidth7=0.12 48 | TrackWidth8=0.15 49 | TrackWidth9=0.2 50 | TrackWidth10=0.25 51 | TrackWidth11=0.254 52 | TrackWidth12=0.3 53 | TrackWidth13=0.4 54 | ViaDiameter1=0.45 55 | ViaDrill1=0.2 56 | ViaDiameter2=0.45 57 | ViaDrill2=0.2 58 | ViaDiameter3=0.53 59 | ViaDrill3=0.25 60 | dPairWidth1=0.1 61 | dPairGap1=0.1 62 | dPairViaGap1=0.25 63 | SilkLineWidth=0.15 64 | SilkTextSizeV=0 65 | SilkTextSizeH=0 66 | SilkTextSizeThickness=0 67 | SilkTextItalic=0 68 | SilkTextUpright=1 69 | CopperLineWidth=0.09999999999999999 70 | CopperTextSizeV=1.5 71 | CopperTextSizeH=1.5 72 | CopperTextThickness=0.3 73 | CopperTextItalic=0 74 | CopperTextUpright=1 75 | EdgeCutLineWidth=0.09999999999999999 76 | CourtyardLineWidth=0.05 77 | OthersLineWidth=0.15 78 | OthersTextSizeV=1 79 | OthersTextSizeH=1 80 | OthersTextSizeThickness=0.15 81 | OthersTextItalic=0 82 | OthersTextUpright=1 83 | SolderMaskClearance=0.035 84 | SolderMaskMinWidth=0.09999999999999999 85 | SolderPasteClearance=-0.035 86 | SolderPasteRatio=-0 87 | [pcbnew/Layer.In1.Cu] 88 | Name=In1.Cu 89 | Type=1 90 | [pcbnew/Layer.In3.Cu] 91 | Name=In3.Cu 92 | Type=1 93 | [pcbnew/Layer.In4.Cu] 94 | Name=In4.Cu 95 | Type=1 96 | [pcbnew/Netclasses] 97 | [pcbnew/Netclasses/1] 98 | Name=ETHERNET_LM0.125 99 | Clearance=0.08895 100 | TrackWidth=0.1 101 | ViaDiameter=0.45 102 | ViaDrill=0.2 103 | uViaDiameter=0.3 104 | uViaDrill=0.1 105 | dPairWidth=0.1 106 | dPairGap=0.08895 107 | dPairViaGap=0.25 108 | [pcbnew/Netclasses/2] 109 | Name=HYPERBUS_LM0.2 110 | Clearance=0.08895 111 | TrackWidth=0.1 112 | ViaDiameter=0.45 113 | ViaDrill=0.2 114 | uViaDiameter=0.3 115 | uViaDrill=0.1 116 | dPairWidth=0.1 117 | dPairGap=0.08895 118 | dPairViaGap=0.25 119 | [pcbnew/Netclasses/3] 120 | Name=SYZYGY_0_DP0.05/0.10 121 | Clearance=0.08895 122 | TrackWidth=0.1 123 | ViaDiameter=0.45 124 | ViaDrill=0.2 125 | uViaDiameter=0.3 126 | uViaDrill=0.1 127 | dPairWidth=0.1 128 | dPairGap=0.2032 129 | dPairViaGap=0.25 130 | [pcbnew/Netclasses/4] 131 | Name=SYZYGY_1_DP0.05/0.10 132 | Clearance=0.08895 133 | TrackWidth=0.1 134 | ViaDiameter=0.45 135 | ViaDrill=0.2 136 | uViaDiameter=0.3 137 | uViaDrill=0.1 138 | dPairWidth=0.1 139 | dPairGap=0.2032 140 | dPairViaGap=0.25 141 | [pcbnew/Netclasses/5] 142 | Name=SYZYGY_2_DP0.05/0.10 143 | Clearance=0.1 144 | TrackWidth=0.1 145 | ViaDiameter=0.45 146 | ViaDrill=0.2 147 | uViaDiameter=0.3 148 | uViaDrill=0.1 149 | dPairWidth=0.1 150 | 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Label 2750 4450 0 50 ~ 0 481 | SDA1 482 | $EndSCHEMATC 483 | -------------------------------------------------------------------------------- /hardware/ButterStick_r0.2/TestPonts.sch: -------------------------------------------------------------------------------- 1 | EESchema Schematic File Version 4 2 | LIBS:ButterStick-cache 3 | EELAYER 29 0 4 | EELAYER END 5 | $Descr A4 11693 8268 6 | encoding utf-8 7 | Sheet 15 15 8 | Title "ButterStick" 9 | Date "2019-06-14" 10 | Rev "r0.2" 11 | Comp "GsD" 12 | Comment1 "" 13 | Comment2 "" 14 | Comment3 "" 15 | Comment4 "" 16 | $EndDescr 17 | $Comp 18 | L Connector:TestPoint_Flag TP1 19 | U 1 1 5D128042 20 | P 2100 1400 21 | F 0 "TP1" H 2360 1494 50 0000 L CNN 22 | F 1 "SMD_TESTPONT" H 2360 1403 50 0000 L CNN 23 | F 2 "TestPoint:TestPoint_Pad_D1.0mm" H 2300 1400 50 0001 C CNN 24 | F 3 "~" H 2300 1400 50 0001 C CNN 25 | F 4 "DNP" H 2100 1400 50 0001 C CNN "PN" 26 | 1 2100 1400 27 | 1 0 0 -1 28 | $EndComp 29 | Text GLabel 1900 1400 0 50 Input ~ 0 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"")(descr "")) 7 | (lib (name gkl_antenna)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_antenna.pretty)(options "")(descr "")) 8 | (lib (name gkl_conn)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_conn.pretty)(options "")(descr "")) 9 | (lib (name gkl_logos)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_logos.pretty)(options "")(descr "")) 10 | (lib (name gkl_time)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_time.pretty)(options "")(descr "")) 11 | (lib (name gkl_led)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_led.pretty)(options "")(descr "")) 12 | (lib (name pkl_tag_connect)(type KiCad)(uri ${KIPRJMOD}/../../lib/pkl/pkl_tag_connect.pretty)(options "")(descr "")) 13 | (lib (name pkl_dipol)(type KiCad)(uri ${KIPRJMOD}/../../lib/pkl/pkl_dipol.pretty)(options "")(descr "")) 14 | (lib (name pkl_housings_sot)(type KiCad)(uri ${KIPRJMOD}/../../lib/pkl/pkl_housings_sot.pretty)(options "")(descr "")) 15 | ) 16 | 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| (lib (name gkl_rf)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_rf.lib)(options "")(descr "")) 4 | (lib (name gkl_microchip)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_microchip.lib)(options "")(descr "")) 5 | (lib (name gkl_pmic)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_pmic.lib)(options "")(descr "")) 6 | (lib (name gkl_mosfet)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_mosfet.lib)(options "")(descr "")) 7 | (lib (name gkl_mem)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_mem.lib)(options "")(descr "")) 8 | (lib (name gkl_time)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_time.lib)(options "")(descr "")) 9 | (lib (name gkl_misc)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_misc.lib)(options "")(descr "")) 10 | (lib (name gkl_lattice)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_lattice.lib)(options "")(descr "")) 11 | (lib (name gkl_power)(type Legacy)(uri ${KIPRJMOD}/../../lib/gkl/gkl_power.lib)(options "")(descr "")) 12 | (lib (name pkl_tag_connect)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_tag_connect.lib)(options "")(descr "")) 13 | (lib (name pkl_silabs)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_silabs.lib)(options "")(descr "")) 14 | (lib (name pkl_sensor)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_sensor.lib)(options "")(descr "")) 15 | (lib (name pkl_power)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_power.lib)(options "")(descr "")) 16 | (lib (name pkl_misc)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_misc.lib)(options "")(descr "")) 17 | (lib (name pkl_memory)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_memory.lib)(options "")(descr "")) 18 | (lib (name pkl_maxim)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_maxim.lib)(options "")(descr "")) 19 | (lib (name pkl_logos)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_logos.lib)(options "")(descr "")) 20 | (lib (name pkl_linear)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_linear.lib)(options "")(descr "")) 21 | (lib (name pkl_device)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_device.lib)(options "")(descr "")) 22 | (lib (name pkl_conn)(type Legacy)(uri ${KIPRJMOD}/../../lib/pkl/pkl_conn.lib)(options "")(descr "")) 23 | ) 24 | -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/ButterStick.kicad_prl: -------------------------------------------------------------------------------- 1 | { 2 | "active_layer": 0, 3 | "board": { 4 | "active_layer": 0, 5 | "active_layer_preset": "", 6 | "auto_track_width": true, 7 | "hidden_nets": [], 8 | "high_contrast_mode": 1, 9 | "net_color_mode": 1, 10 | "opacity": { 11 | "pads": 1.0, 12 | "tracks": 1.0, 13 | "vias": 1.0, 14 | "zones": 1.0 15 | }, 16 | "ratsnest_display_mode": 0, 17 | "selection_filter": { 18 | "dimensions": true, 19 | "footprints": true, 20 | "graphics": true, 21 | "keepouts": true, 22 | "lockedItems": true, 23 | "otherItems": true, 24 | "pads": true, 25 | "text": true, 26 | "tracks": true, 27 | "vias": true, 28 | "zones": true 29 | }, 30 | "visible_items": [ 31 | 0, 32 | 1, 33 | 2, 34 | 3, 35 | 4, 36 | 7, 37 | 8, 38 | 9, 39 | 10, 40 | 11, 41 | 13, 42 | 14, 43 | 15, 44 | 16, 45 | 19, 46 | 20, 47 | 21, 48 | 22, 49 | 23, 50 | 24, 51 | 25, 52 | 32, 53 | 33, 54 | 34, 55 | 35, 56 | 36, 57 | 37, 58 | 38 59 | ], 60 | "visible_layers": "003ffff_8000007f", 61 | "zone_display_mode": 1 62 | }, 63 | "hidden_nets": [], 64 | "meta": { 65 | "filename": "ButterStick.kicad_prl", 66 | "version": 3 67 | }, 68 | "project": { 69 | "files": [] 70 | } 71 | } 72 | -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/ButterStick.kicad_pro: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "design_settings": { 4 | "defaults": { 5 | "board_outline_line_width": 0.09999999999999999, 6 | "copper_line_width": 0.09999999999999999, 7 | "copper_text_italic": false, 8 | "copper_text_size_h": 1.5, 9 | "copper_text_size_v": 1.5, 10 | "copper_text_thickness": 0.3, 11 | "copper_text_upright": false, 12 | "courtyard_line_width": 0.049999999999999996, 13 | "dimension_precision": 1, 14 | "dimension_units": 0, 15 | "dimensions": { 16 | "arrow_length": 1270000, 17 | "extension_offset": 500000, 18 | "keep_text_aligned": true, 19 | "suppress_zeroes": false, 20 | "text_position": 0, 21 | "units_format": 1 22 | }, 23 | "fab_line_width": 0.09999999999999999, 24 | "fab_text_italic": false, 25 | "fab_text_size_h": 1.0, 26 | "fab_text_size_v": 1.0, 27 | "fab_text_thickness": 0.15, 28 | "fab_text_upright": false, 29 | "other_line_width": 0.09999999999999999, 30 | "other_text_italic": false, 31 | "other_text_size_h": 1.0, 32 | "other_text_size_v": 1.0, 33 | "other_text_thickness": 0.15, 34 | "other_text_upright": false, 35 | "pads": { 36 | "drill": 3.25, 37 | "height": 3.25, 38 | "width": 3.25 39 | }, 40 | "silk_line_width": 0.15, 41 | "silk_text_italic": false, 42 | "silk_text_size_h": 1.0, 43 | "silk_text_size_v": 1.0, 44 | "silk_text_thickness": 0.15, 45 | "silk_text_upright": false, 46 | "zones": { 47 | "45_degree_only": false, 48 | "min_clearance": 0.09999999999999999 49 | } 50 | }, 51 | "diff_pair_dimensions": [ 52 | { 53 | "gap": 0.0, 54 | "via_gap": 0.0, 55 | "width": 0.0 56 | } 57 | ], 58 | "drc_exclusions": [], 59 | "meta": { 60 | "version": 2 61 | }, 62 | "rule_severities": { 63 | "annular_width": "error", 64 | "clearance": "error", 65 | "copper_edge_clearance": "error", 66 | "courtyards_overlap": "warning", 67 | "diff_pair_gap_out_of_range": "error", 68 | "diff_pair_uncoupled_length_too_long": "error", 69 | "drill_out_of_range": "error", 70 | "duplicate_footprints": "warning", 71 | "extra_footprint": "warning", 72 | "footprint_type_mismatch": "error", 73 | "hole_clearance": "error", 74 | "hole_near_hole": "error", 75 | "invalid_outline": "error", 76 | "item_on_disabled_layer": "error", 77 | "items_not_allowed": "error", 78 | "length_out_of_range": "error", 79 | "malformed_courtyard": "error", 80 | "microvia_drill_out_of_range": "error", 81 | "missing_courtyard": "ignore", 82 | "missing_footprint": "warning", 83 | "net_conflict": "warning", 84 | "npth_inside_courtyard": "ignore", 85 | "padstack": "error", 86 | "pth_inside_courtyard": "ignore", 87 | "shorting_items": "error", 88 | "silk_over_copper": "error", 89 | "silk_overlap": "error", 90 | "skew_out_of_range": "error", 91 | "through_hole_pad_without_hole": "error", 92 | "too_many_vias": "error", 93 | "track_dangling": "warning", 94 | "track_width": "error", 95 | "tracks_crossing": "error", 96 | "unconnected_items": "error", 97 | "unresolved_variable": "error", 98 | "via_dangling": "warning", 99 | "zone_has_empty_net": "error", 100 | "zones_intersect": "error" 101 | }, 102 | "rules": { 103 | "allow_blind_buried_vias": true, 104 | "allow_microvias": true, 105 | "max_error": 0.005, 106 | "min_clearance": 0.08889999999999999, 107 | "min_copper_edge_clearance": 0.01, 108 | "min_hole_clearance": 0.0, 109 | "min_hole_to_hole": 0.25, 110 | "min_microvia_diameter": 0.19999999999999998, 111 | "min_microvia_drill": 0.09999999999999999, 112 | "min_silk_clearance": 0.0, 113 | "min_through_hole_diameter": 0.19999999999999998, 114 | "min_track_width": 0.08889999999999999, 115 | "min_via_annular_width": 0.049999999999999996, 116 | "min_via_annulus": 0.049999999999999996, 117 | "min_via_diameter": 0.39999999999999997, 118 | "use_height_for_length_calcs": true 119 | }, 120 | "track_widths": [ 121 | 0.25, 122 | 0.0889, 123 | 0.1, 124 | 0.10033, 125 | 0.1016, 126 | 0.10414, 127 | 0.12, 128 | 0.15, 129 | 0.2, 130 | 0.25, 131 | 0.3, 132 | 0.4 133 | ], 134 | "via_dimensions": [ 135 | { 136 | "diameter": 0.8, 137 | "drill": 0.4 138 | }, 139 | { 140 | "diameter": 0.4, 141 | "drill": 0.2 142 | }, 143 | { 144 | "diameter": 0.45, 145 | "drill": 0.2 146 | }, 147 | { 148 | "diameter": 0.53, 149 | "drill": 0.25 150 | } 151 | ], 152 | "zones_allow_external_fillets": false, 153 | "zones_use_no_outline": true 154 | }, 155 | "layer_presets": [] 156 | }, 157 | "boards": [], 158 | "cvpcb": { 159 | "equivalence_files": [] 160 | }, 161 | "erc": { 162 | "erc_exclusions": [], 163 | "meta": { 164 | "version": 0 165 | }, 166 | "pin_map": [ 167 | [ 168 | 0, 169 | 0, 170 | 0, 171 | 0, 172 | 0, 173 | 0, 174 | 1, 175 | 0, 176 | 0, 177 | 0, 178 | 0, 179 | 2 180 | ], 181 | [ 182 | 0, 183 | 2, 184 | 0, 185 | 1, 186 | 0, 187 | 0, 188 | 1, 189 | 0, 190 | 2, 191 | 2, 192 | 2, 193 | 2 194 | ], 195 | [ 196 | 0, 197 | 0, 198 | 0, 199 | 0, 200 | 0, 201 | 0, 202 | 1, 203 | 0, 204 | 1, 205 | 0, 206 | 1, 207 | 2 208 | ], 209 | [ 210 | 0, 211 | 1, 212 | 0, 213 | 0, 214 | 0, 215 | 0, 216 | 1, 217 | 1, 218 | 2, 219 | 1, 220 | 1, 221 | 2 222 | ], 223 | [ 224 | 0, 225 | 0, 226 | 0, 227 | 0, 228 | 0, 229 | 0, 230 | 1, 231 | 0, 232 | 0, 233 | 0, 234 | 0, 235 | 2 236 | ], 237 | [ 238 | 0, 239 | 0, 240 | 0, 241 | 0, 242 | 0, 243 | 0, 244 | 0, 245 | 0, 246 | 0, 247 | 0, 248 | 0, 249 | 2 250 | ], 251 | [ 252 | 1, 253 | 1, 254 | 1, 255 | 1, 256 | 1, 257 | 0, 258 | 1, 259 | 1, 260 | 1, 261 | 1, 262 | 1, 263 | 2 264 | ], 265 | [ 266 | 0, 267 | 0, 268 | 0, 269 | 1, 270 | 0, 271 | 0, 272 | 1, 273 | 0, 274 | 0, 275 | 0, 276 | 0, 277 | 2 278 | ], 279 | [ 280 | 0, 281 | 2, 282 | 1, 283 | 2, 284 | 0, 285 | 0, 286 | 1, 287 | 0, 288 | 2, 289 | 2, 290 | 2, 291 | 2 292 | ], 293 | [ 294 | 0, 295 | 2, 296 | 0, 297 | 1, 298 | 0, 299 | 0, 300 | 1, 301 | 0, 302 | 2, 303 | 0, 304 | 0, 305 | 2 306 | ], 307 | [ 308 | 0, 309 | 2, 310 | 1, 311 | 1, 312 | 0, 313 | 0, 314 | 1, 315 | 0, 316 | 2, 317 | 0, 318 | 0, 319 | 2 320 | ], 321 | [ 322 | 2, 323 | 2, 324 | 2, 325 | 2, 326 | 2, 327 | 2, 328 | 2, 329 | 2, 330 | 2, 331 | 2, 332 | 2, 333 | 2 334 | ] 335 | ], 336 | "rule_severities": { 337 | "bus_definition_conflict": "error", 338 | "bus_entry_needed": "error", 339 | "bus_label_syntax": "error", 340 | "bus_to_bus_conflict": "error", 341 | "bus_to_net_conflict": "error", 342 | "different_unit_footprint": "error", 343 | "different_unit_net": "error", 344 | "duplicate_reference": "error", 345 | "duplicate_sheet_names": "error", 346 | "extra_units": "error", 347 | "global_label_dangling": "error", 348 | "hier_label_mismatch": "error", 349 | "label_dangling": "error", 350 | "lib_symbol_issues": "warning", 351 | "multiple_net_names": "error", 352 | "net_not_bus_member": "error", 353 | "no_connect_connected": "error", 354 | "no_connect_dangling": "error", 355 | "pin_not_connected": "error", 356 | "pin_not_driven": "error", 357 | "pin_to_pin": "error", 358 | "power_pin_not_driven": "error", 359 | "similar_labels": "error", 360 | "unannotated": "error", 361 | "unit_value_mismatch": "error", 362 | "unresolved_variable": "error", 363 | "wire_dangling": "error" 364 | } 365 | }, 366 | "libraries": { 367 | "pinned_footprint_libs": [], 368 | "pinned_symbol_libs": [] 369 | }, 370 | "meta": { 371 | "filename": "ButterStick.kicad_pro", 372 | "version": 1 373 | }, 374 | "net_settings": { 375 | "classes": [ 376 | { 377 | "bus_width": 6.0, 378 | "clearance": 0.0889, 379 | "diff_pair_gap": 0.25, 380 | "diff_pair_via_gap": 0.25, 381 | "diff_pair_width": 0.2, 382 | "line_style": 0, 383 | "microvia_diameter": 0.3, 384 | "microvia_drill": 0.1, 385 | "name": "Default", 386 | "pcb_color": "rgba(0, 0, 0, 0.000)", 387 | "schematic_color": "rgba(0, 0, 0, 0.000)", 388 | "track_width": 0.25, 389 | "via_diameter": 0.8, 390 | "via_drill": 0.4, 391 | "wire_width": 6.0 392 | } 393 | ], 394 | "meta": { 395 | "version": 2 396 | }, 397 | "net_colors": null 398 | }, 399 | "pcbnew": { 400 | "last_paths": { 401 | "gencad": "", 402 | "idf": "", 403 | "netlist": "", 404 | "specctra_dsn": "ButterStick.dsn", 405 | "step": "ButterStick.step", 406 | "vmrl": "ButterStick.wrl", 407 | "vrml": "ButterStick.wrl" 408 | }, 409 | "page_layout_descr_file": "" 410 | }, 411 | "schematic": { 412 | "annotate_start_num": 0, 413 | "drawing": { 414 | "default_bus_thickness": 12.0, 415 | "default_junction_size": 40.0, 416 | "default_line_thickness": 6.0, 417 | "default_text_size": 50.0, 418 | "default_wire_thickness": 6.0, 419 | "field_names": [], 420 | "intersheets_ref_own_page": false, 421 | "intersheets_ref_prefix": "", 422 | "intersheets_ref_short": false, 423 | "intersheets_ref_show": false, 424 | "intersheets_ref_suffix": "", 425 | "junction_size_choice": 3, 426 | "label_size_ratio": 0.08, 427 | "pin_symbol_size": 25.0, 428 | "text_offset_ratio": 0.08 429 | }, 430 | "legacy_lib_dir": "", 431 | "legacy_lib_list": [], 432 | "meta": { 433 | "version": 1 434 | }, 435 | "net_format_name": "Pcbnew", 436 | "ngspice": { 437 | "fix_include_paths": true, 438 | "fix_passive_vals": false, 439 | "meta": { 440 | "version": 0 441 | }, 442 | "model_mode": 0, 443 | "workbook_filename": "" 444 | }, 445 | "page_layout_descr_file": "", 446 | "plot_directory": "Production/", 447 | "spice_adjust_passive_values": false, 448 | "spice_external_command": "spice \"%I\"", 449 | "subpart_first_id": 65, 450 | "subpart_id_separator": 0 451 | }, 452 | "sheets": [ 453 | [ 454 | "e63e39d7-6ac0-4ffd-8aa3-1841a4541b55", 455 | "" 456 | ], 457 | [ 458 | "7330da6e-779b-47e1-9f19-f2748ab2d0de", 459 | "USB-PHY" 460 | ], 461 | [ 462 | "8f8777ba-89bc-4499-bd4b-cc705875169a", 463 | "GIGABIT-0" 464 | ], 465 | [ 466 | "b1562ce7-230b-4ebc-b1fe-3f1f6b1116a2", 467 | "sheetIO" 468 | ], 469 | [ 470 | "e9da2530-7480-4a54-9270-e231ee404f91", 471 | "IO-LEDS" 472 | ], 473 | [ 474 | "143efee5-76ce-4cba-84a0-fbafa001f7dd", 475 | "FPGA-MISC" 476 | ], 477 | [ 478 | "a7f6503e-b9b1-41c4-ac57-101ceffc7fcf", 479 | "sheetFPGA" 480 | ], 481 | [ 482 | "dc960bdd-c4aa-462f-bd9c-0fa3eceead4a", 483 | "FPGA-DDR3L" 484 | ], 485 | [ 486 | "2f1910da-2fc7-4091-a23a-39e4aea531ec", 487 | "FPGA-SYZYGY0" 488 | ], 489 | [ 490 | "489eb976-0485-4c9b-bfa4-d45e3a2e9193", 491 | "FPGA-SYZYGY1" 492 | ], 493 | [ 494 | "e305807b-8c5d-4944-81e1-dba2062590e6", 495 | "FPGA-5G" 496 | ], 497 | [ 498 | "f9addc60-22bd-459e-944d-bb7e5f89424d", 499 | "sheetPower" 500 | ], 501 | [ 502 | "8c5c97be-ac2a-423b-b313-79cf2d3690d4", 503 | "Memory-DDR3L" 504 | ], 505 | [ 506 | "ab00729b-e68f-45fe-a8b8-66d90dcbc74c", 507 | "DDR3L1" 508 | ], 509 | [ 510 | "3fb004e8-3d03-4814-9e49-7690a14dd4d7", 511 | "DDR3L" 512 | ], 513 | [ 514 | "f499de26-e362-4144-b063-0a3987ad82af", 515 | "SYZYGY-0-STD" 516 | ], 517 | [ 518 | "357bf771-b16c-4f0a-af73-ab292e65f90c", 519 | "SYZYGY-1-STD" 520 | ], 521 | [ 522 | "c4946e89-4f01-488f-97cf-74ab48a51cbc", 523 | "SYZYGY-2-TXR4" 524 | ] 525 | ], 526 | "text_variables": {} 527 | } 528 | -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/Production/ButterStick-r1.0a-fab-notes.txt: -------------------------------------------------------------------------------- 1 | Part number: ButterStick-r1.0a 2 | 3 | General fabrication notes 4 | 5 | * Boards panelised in 2x1 pattern using tab/route. 6 | * Board material is S1000-2 7 | 8 | * Blue solder mask on both sides of board. 9 | * High DPI White LPI legend on both sides of board. 10 | * Pad finish is ENIG. 11 | 12 | * All 0.2mm vias capped/filled/plated over (Via in Pad). 13 | 14 | * Finished board thickness is 1.6 mm. 15 | 16 | * Place UL mark/date code/manufacture logo on legend on backside of board. 17 | 18 | Impedances 19 | 20 | Control to within 10%. 21 | Layer 1 microstrip (ref to layer 2) 22 | 89 μm trace / 161 μm space = 100 ohm differential 23 | 24 | Layer 3 microstrip (ref to layer 2/4) 25 | 89 μm trace / 161 μm space = 100 ohm differential 26 | 27 | Layer 6 microstrip (ref to layer 7/5) 28 | 89 μm trace / 161 μm space = 100 ohm differential 29 | 30 | Layer 8 microstrip (ref to layer 7) 31 | 89 μm trace / 161 μm space = 100 ohm differential 32 | 33 | Suggested stackup 34 | 1 35 μm (1 oz) copper Signal 35 | 0.075mm prepreg 36 | 2 35 μm (1 oz) copper Ground 37 | 0.130mm core 38 | 3 35 μm (1oz) copper Signal 39 | prepreg as needed for 1.6mm finished PCB thickness 40 | 4 35 μm (1 oz) copper Power 41 | core as needed for 1.6mm finished PCB 42 | 5 35 μm (1oz) copper Ground 43 | prepreg as needed for 1.6mm finished PCB thickness 44 | 6 35 μm (1 oz) copper Signal 45 | 0.130mm core/prepreg 46 | 7 35 μm (1 oz) copper Ground 47 | 0.075mm prepreg 48 | 8 35 μm (1 oz) copper Signal 49 | 50 | File naming 51 | ButterStick.gko Board outline 52 | ButterStick-PTH.drl Through-board plated holes 53 | ButterStick-NPTH.drl Through-board unplated holes 54 | ButterStick.gto Front silkscreen 55 | ButterStick.gts Front solder mask 56 | ButterStick.gtl Layer 1 copper (Front) 57 | ButterStick.g2 Layer 2 copper 58 | ButterStick.g3 Layer 3 copper 59 | ButterStick.g4 Layer 4 copper 60 | ButterStick.g5 Layer 5 copper 61 | ButterStick.g6 Layer 6 copper 62 | ButterStick.g7 Layer 7 copper 63 | ButterStick.gbl Layer 8 copper (Back) 64 | ButterStick.gbs Back solder mask 65 | ButterStick.gbo Back silkscreen 66 | 67 | ButterStick.gtp Top Paste 68 | ButterStick.gbp Bottom Paste 69 | 70 | -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/Production/ButterStick-r1.0a-sch.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/butterstick-fpga/butterstick-hardware/0694ddfa9824a07f0c6c6981186e45f80187659c/hardware/ButterStick_r1.0/Production/ButterStick-r1.0a-sch.pdf -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/Production/ButterStick-r1.0a-top-pos.csv: -------------------------------------------------------------------------------- 1 | Ref,Val,Package,PosX,PosY,Rot,Side 2 | "C1","0.1uF","C_0402_1005Metric",64.900000,-14.300000,180.000000,top 3 | "C2","1uF","C_0402_1005Metric",66.700000,-6.300000,0.000000,top 4 | "C3","1uF","C_0402_1005Metric",70.300000,-10.600000,0.000000,top 5 | "C10","10uF","C_0603_1608Metric",52.700000,-18.500000,-90.000000,top 6 | "C11","0.1uF","C_0402_1005Metric",56.550000,-13.600000,90.000000,top 7 | "C12","0.1uF","C_0402_1005Metric",59.050000,-13.650000,90.000000,top 8 | "C18","6.8pF","C_0402_1005Metric",53.800000,-25.050000,90.000000,top 9 | "C19","6.8pF","C_0402_1005Metric",52.800000,-25.050000,90.000000,top 10 | "C20","0.1uF","C_0402_1005Metric",12.150000,-28.150000,-90.000000,top 11 | "C52","0.1uF","C_0402_1005Metric",70.300000,-9.650000,0.000000,top 12 | "C64","0.1uF","C_0402_1005Metric",61.050000,-10.850000,180.000000,top 13 | "C65","10uF","C_0603_1608Metric",57.350000,-25.400000,0.000000,top 14 | "C66","0.1uF","C_0402_1005Metric",57.900000,-6.600000,0.000000,top 15 | "C67","0.1uF","C_0402_1005Metric",73.500000,-8.150000,0.000000,top 16 | "C69","10uF","C_0603_1608Metric",60.500000,-9.600000,180.000000,top 17 | "C70","0.1uF","C_0402_1005Metric",63.000000,-6.600000,180.000000,top 18 | "C72","10uF","C_0603_1608Metric",60.300000,-38.400000,-90.000000,top 19 | "C76","4.7uF","C_0402_1005Metric",57.865000,-33.735000,-90.000000,top 20 | "C77","4.7uF","C_0402_1005Metric",69.600000,-14.600000,180.000000,top 21 | "C79","6.8pF","C_0402_1005Metric",53.415000,-35.985000,0.000000,top 22 | "C80","6.8pF","C_0402_1005Metric",68.450000,-19.100000,0.000000,top 23 | "C83","10uF","C_0603_1608Metric",65.950000,-19.250000,180.000000,top 24 | "C85","1uF","C_0402_1005Metric",51.450000,-36.000000,180.000000,top 25 | "C98","0.1uF","C_0402_1005Metric",17.400000,-38.100000,0.000000,top 26 | "C99","0.1uF","C_0402_1005Metric",10.400000,-39.600000,180.000000,top 27 | "C100","6.8pF","C_0402_1005Metric",14.400000,-40.600000,180.000000,top 28 | "C101","10uF","C_0603_1608Metric",14.600000,-35.800000,0.000000,top 29 | "C102","0.1uF","C_0402_1005Metric",10.400000,-37.200000,-90.000000,top 30 | "C103","10uF","C_0603_1608Metric",17.500000,-36.100000,90.000000,top 31 | "C104","10uF","C_0603_1608Metric",10.200000,-34.000000,-90.000000,top 32 | "C105","0.1uF","C_0402_1005Metric",12.900000,-12.100000,-90.000000,top 33 | "C106","0.1uF","C_0402_1005Metric",9.850000,-11.550000,90.000000,top 34 | "C107","6.8pF","C_0402_1005Metric",9.850000,-7.650000,-90.000000,top 35 | "C108","10uF","C_0603_1608Metric",9.850000,-5.900000,180.000000,top 36 | "C109","0.1uF","C_0402_1005Metric",12.400000,-5.200000,0.000000,top 37 | "C110","10uF","C_0603_1608Metric",14.700000,-9.750000,90.000000,top 38 | "C111","10uF","C_0603_1608Metric",23.350000,-6.450000,90.000000,top 39 | "C112","0.1uF","C_0402_1005Metric",53.400000,-37.200000,0.000000,top 40 | "C113","0.1uF","C_0402_1005Metric",55.900000,-38.300000,0.000000,top 41 | "C114","6.8pF","C_0402_1005Metric",49.915000,-40.300000,0.000000,top 42 | "C115","10uF","C_0603_1608Metric",46.200000,-37.800000,90.000000,top 43 | "C116","0.1uF","C_0402_1005Metric",44.900000,-37.400000,90.000000,top 44 | "C117","10uF","C_0603_1608Metric",21.700000,-39.800000,90.000000,top 45 | "C118","10uF","C_0603_1608Metric",43.600000,-37.800000,90.000000,top 46 | "C148","0.1uF","C_0402_1005Metric",52.800000,-27.150000,90.000000,top 47 | "C165","150uF","CP_Elec_5x4.4",57.300000,-29.200000,180.000000,top 48 | "CON1","JD1_0001NL","MAGJACK",72.500000,-37.525000,90.000000,top 49 | "D1","RGB0404","0404LED_RGB",59.000000,-4.000000,0.000000,top 50 | "D2","RGB0404","0404LED_RGB",61.000000,-4.000000,0.000000,top 51 | "D3","RGB0404","0404LED_RGB",63.000000,-4.000000,0.000000,top 52 | "D4","RGB0404","0404LED_RGB",65.000000,-4.000000,0.000000,top 53 | "D5","RGB0404","0404LED_RGB",67.000000,-4.000000,0.000000,top 54 | "D6","RGB0404","0404LED_RGB",69.000000,-4.000000,0.000000,top 55 | "D7","RGB0404","0404LED_RGB",71.000000,-4.000000,0.000000,top 56 | "FB5","100R","L_0603_1608Metric",61.800000,-12.150000,0.000000,top 57 | "FB6","100R","L_0603_1608Metric",52.950000,-16.375000,0.000000,top 58 | "FB7","100R","L_0603_1608Metric",66.300000,-22.600000,0.000000,top 59 | "FID1","Fiducial","Fiducial_0.75mm_Mask1.5mm",7.000000,-47.000000,0.000000,top 60 | "FID2","Fiducial","Fiducial_0.75mm_Mask1.5mm",3.000000,-3.000000,0.000000,top 61 | "FID3","Fiducial","Fiducial_0.75mm_Mask1.5mm",62.000000,-47.000000,0.000000,top 62 | "G***","LOGO","logo_name",35.275000,-12.575000,0.000000,top 63 | "G***","LOGO","logo",53.000000,-10.600000,0.000000,top 64 | "G***","LOGO","syzygy_logo",30.000000,-10.325000,0.000000,top 65 | "G***","LOGO","syzygy_logo",10.500000,-19.800000,-90.000000,top 66 | "G***","LOGO","syzygy_logo",32.775000,-38.650000,0.000000,top 67 | "J1","USB_C_Receptacle_USB2.0","USB_C_Receptacle_HRO_TYPE-C-31-M-12",77.850000,-14.000000,90.000000,top 68 | "J3","SYZYGY-STD","SYZYGY_standard_carrier",5.000000,-24.500000,-90.000000,top 69 | "J4","SYZYGY-STD","SYZYGY_standard_carrier",35.500000,-5.000000,180.000000,top 70 | "J5","SYZYGY-TXR-4","SYZYGY_Transcieiver",37.000000,-44.000000,0.000000,top 71 | "J6","Conn_01x06_Male","PinHeader_1x06_P2.54mm_Vertical",21.000000,-34.050000,90.000000,top 72 | "J7","Conn_01x02_Male","PinHeader_1x02_P2.54mm_Vertical",76.050000,-21.350000,-90.000000,top 73 | "L4","2.2uH","L_0805_2012Metric",53.465000,-33.685000,-90.000000,top 74 | "L5","2.2uH","L_0805_2012Metric",66.520000,-16.770000,-90.000000,top 75 | "L7","2.2uH","L_0805_2012Metric",11.900000,-37.200000,90.000000,top 76 | "L8","2.2uH","L_0805_2012Metric",13.100000,-6.700000,180.000000,top 77 | "L9","2.2uH","L_0805_2012Metric",47.900000,-37.837500,-90.000000,top 78 | "LOGO1","Q_NMOS_GSD","gsd_logo_small",76.600000,-8.400000,0.000000,top 79 | "LOGO2","Logo_Open_Hardware_Small","oshw_small",40.250000,-38.300000,0.000000,top 80 | "R1","210k","R_0402_1005Metric",4.850000,-12.650000,180.000000,top 81 | "R2","84k5","R_0402_1005Metric",46.550000,-10.350000,90.000000,top 82 | "R3","49k9","R_0402_1005Metric",23.000000,-39.200000,90.000000,top 83 | "R4","8.06k","R_0402_1005Metric",70.300000,-7.750000,180.000000,top 84 | "R5","20K","R_0402_1005Metric",70.300000,-8.700000,0.000000,top 85 | "R30","12.1K","R_0402_1005Metric",55.100000,-25.050000,-90.000000,top 86 | "R31","220R","R_0402_1005Metric",64.300000,-22.365000,-90.000000,top 87 | "R32","220R","R_0402_1005Metric",66.550000,-21.300000,180.000000,top 88 | "R33","10K","R_0402_1005Metric",39.100000,-35.950000,0.000000,top 89 | "R34","10K","R_0402_1005Metric",41.200000,-35.950000,0.000000,top 90 | "R37","10K","R_0402_1005Metric",58.000000,-37.300000,0.000000,top 91 | "R40","10K","R_0402_1005Metric",58.550000,-38.800000,90.000000,top 92 | "R43","10K","R_0402_1005Metric",57.450000,-38.800000,90.000000,top 93 | "R45","4k7","R_0402_1005Metric",12.120000,-26.115000,-90.000000,top 94 | "R52","51R","R_0402_1005Metric",12.000000,-33.700000,90.000000,top 95 | "R53","10k","R_0402_1005Metric",58.300000,-9.750000,90.000000,top 96 | "R61","210k","R_0402_1005Metric",55.365000,-35.985000,180.000000,top 97 | "R62","47k","R_0402_1005Metric",57.315000,-35.985000,180.000000,top 98 | "R63","100k","R_0402_1005Metric",68.450000,-18.150000,180.000000,top 99 | "R64","100k","R_0402_1005Metric",70.400000,-18.150000,180.000000,top 100 | "R75","34.0K","R_0402_1005Metric",10.400000,-40.600000,180.000000,top 101 | "R76","10K","R_0402_1005Metric",17.400000,-39.100000,180.000000,top 102 | "R77","34.0K","R_0402_1005Metric",12.400000,-40.600000,180.000000,top 103 | "R78","53.6K","R_0402_1005Metric",14.400000,-39.600000,0.000000,top 104 | "R79","13.0K","R_0402_1005Metric",12.400000,-39.600000,0.000000,top 105 | "R80","34.0K","R_0402_1005Metric",10.850000,-13.500000,-90.000000,top 106 | "R81","10K","R_0402_1005Metric",11.900000,-12.100000,90.000000,top 107 | "R82","34.0K","R_0402_1005Metric",10.850000,-11.550000,-90.000000,top 108 | "R83","53.6K","R_0402_1005Metric",10.850000,-7.650000,90.000000,top 109 | "R84","13.0K","R_0402_1005Metric",10.850000,-9.600000,90.000000,top 110 | "R85","34.0K","R_0402_1005Metric",55.900000,-39.300000,0.000000,top 111 | "R86","10K","R_0402_1005Metric",53.400000,-38.200000,180.000000,top 112 | "R87","34.0K","R_0402_1005Metric",53.900000,-39.300000,0.000000,top 113 | "R88","53.6K","R_0402_1005Metric",49.915000,-39.300000,180.000000,top 114 | "R89","13.0K","R_0402_1005Metric",51.900000,-39.300000,180.000000,top 115 | "SW1","SW_Push","SW_SPST_PTS810",65.200000,-45.000000,90.000000,top 116 | "SW2","SW_Push","SW_SPST_PTS810",70.000000,-45.000000,90.000000,top 117 | "U1","USB3343","QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm",66.500000,-10.300000,0.000000,top 118 | "U2","KSZ9031","QFN-48-1EP_7x7mm_Pitch0.5mm",58.800000,-19.000000,90.000000,top 119 | "U3","PUSB3FR6","XSON7",60.200000,-7.100000,0.000000,top 120 | "U4","ECP5UM5G_85_CABGA381","caBGA_381_17x17",27.600000,-22.900000,0.000000,top 121 | "U5","W25Q128JVSIQ","SOIJ-8_5.3x5.3mm_P1.27mm",15.600000,-29.700000,90.000000,top 122 | "U8","TLV62569DRL","SOT-563",55.815000,-34.235000,180.000000,top 123 | "U9","TLV62569DRL","SOT-563",69.050000,-16.350000,180.000000,top 124 | "U11","MT41K64M16TW-107_J-TR","BGA-96_9.0x13.0mm_Layout2x3x16_P0.8mm",44.300000,-18.900000,90.000000,top 125 | "U12","MT41K64M16TW-107_J-TR","BGA-96_9.0x13.0mm_Layout2x3x16_P0.8mm",44.300000,-30.300000,90.000000,top 126 | "U13","TLV62569DRL","SOT-563",14.500000,-37.800000,180.000000,top 127 | "U14","TLV62569DRL","SOT-563",12.700000,-9.350000,90.000000,top 128 | "U15","TLV62569DRL","SOT-563",50.500000,-37.550000,180.000000,top 129 | "Y1","25MHz","Oscillator_SMD_SeikoEpson_SG210-4Pin_2.5x2.0mm",53.300000,-22.350000,-90.000000,top 130 | -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/Production/ButterStick_gerbers_2021-01-10_22-45-55.zip: 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Change Notice (ECN) 5 | 6 | ||| 7 | |-|-| 8 | **ECN Number** | 001 9 | **Origination Date** | Friday, 27th August, 2021 10 | **Originator of Change** | Gregory Davill 11 | **Project Name** | ButterStick r1.0 12 | **Type of Action** | Part Substitution 13 | **Reason for Change** | Remove difficult to source component from design 14 | 15 | 16 | ## Detailed description of changes 17 | 18 | ### Replace BOM item `U18` 19 | ||Mfg|Part| 20 | |-|-|-| 21 | **Old** | Texas Instruments| TPS2121RUXR 22 | **New** | YAGEO| RC0603JR-130RL 23 | 24 | ### Populate new part on PCB 25 | Install `U18` such that it shorts pins 1,2 and 7,8 of `U18` 26 | ![ecn_001_img0](src/ecn_001_img0.png){width=40%} ![ecn_001_img1](src/ecn_001_img1.png){width=40%} 27 | 28 | > Note CAD view is Top view (Through the PCB). Whereas render view is Bottom View. 29 | 30 | ## QC checks 31 | 32 | Skew of `U18` is acceptable, and expected. 33 | Acceptance criteria on soldering is that it's successfully soldered across pins 1,2 and 7,8 of `U18` -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/Production/ECN/ECN_001/ECN_001.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/butterstick-fpga/butterstick-hardware/0694ddfa9824a07f0c6c6981186e45f80187659c/hardware/ButterStick_r1.0/Production/ECN/ECN_001/ECN_001.pdf -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/Production/ECN/ECN_001/src/ecn_001_img0.png: -------------------------------------------------------------------------------- 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out on SYZYGY connectors. 8 | 9 | ## Hardware Overview 10 | * Lattice ECP5-45F/85F FPGA in BGA381 package 11 | * DDR3L Memory (dual rank) 12 | * USB-C USB2.0 connection 13 | * High-speed (480Mbit) ULPI PHY 14 | * Non-volatile Storage 15 | * 128Mbit QSPI FLASH Memory 16 | * MicroSD socket 17 | * 4bit SD interface (CK, CMD, DAT0-3) 18 | * Power supply 19 | * USB-C 5V input. 20 | * Aux 5V power input. 21 | * onboard oscillator 22 | * 60Mhz 23 | * 25MHz (RGMII PHY) 24 | * 0.1" JTAG connector 25 | * User I/O 26 | * 2x Button 27 | * 7x RGB LED 28 | * Board dimensions 29 | * Dimensions: 80mm x 49mm (Golden Ratio!) 30 | 31 | --- 32 | 33 | ## Licence 34 | 35 | * Hardware in this repository is licensed under CERN OHL v1.2 36 | 37 | ## Open Source Hardware 38 | This board is an OSHWA approved design: [AU000016](https://certification.oshwa.org/au000016.html) 39 | -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/TestPonts.kicad_sch: -------------------------------------------------------------------------------- 1 | (kicad_sch (version 20200618) (host eeschema "5.99.0-unknown-73168a9~101~ubuntu18.04.1") 2 | 3 | (page 1 19) 4 | 5 | (paper "A4") 6 | 7 | (title_block 8 | (title "ButterStick") 9 | (date "2019-06-14") 10 | (rev "r0.2") 11 | (company "GsD") 12 | ) 13 | 14 | (lib_symbols 15 | ) 16 | 17 | ) 18 | -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/drc-rules: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/butterstick-fpga/butterstick-hardware/0694ddfa9824a07f0c6c6981186e45f80187659c/hardware/ButterStick_r1.0/drc-rules -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/fp-info-cache: -------------------------------------------------------------------------------- 1 | 163701306397902 2 | gkl_antenna 3 | 0433AT62A0020 - 433MHz 25x5x1mm chip antenna 4 | 5 | 6 | 0 7 | 2 8 | 2 9 | gkl_antenna 10 | 0900AT43A0070 - 900MHz Wide band ISM Chip Antenna 11 | 12 | 13 | 0 14 | 3 15 | 2 16 | gkl_antenna 17 | GPS_ANT 18 | 19 | 20 | 0 21 | 1 22 | 1 23 | gkl_conn 24 | 10118194c_usb_microb 25 | 26 | 27 | 0 28 | 17 29 | 11 30 | gkl_conn 31 | 483930003_sd 32 | 33 | 34 | 0 35 | 13 36 | 10 37 | gkl_conn 38 | 5034801000 39 | 40 | 41 | 0 42 | 12 43 | 11 44 | gkl_conn 45 | 5034802000 46 | 47 | 48 | 0 49 | 22 50 | 21 51 | gkl_conn 52 | 5034802600 53 | 54 | 55 | 0 56 | 28 57 | 26 58 | gkl_conn 59 | BM02B-GHS-TBT 60 | 61 | 62 | 0 63 | 4 64 | 2 65 | gkl_conn 66 | DF12(3.0)-10DP-0.5V(86) 67 | 68 | 69 | 0 70 | 14 71 | 10 72 | gkl_conn 73 | DF12(3.0)-10DS-0.5V(86) 74 | 75 | 76 | 0 77 | 14 78 | 10 79 | gkl_conn 80 | DF12(3.0)-30DP-0.5V(86) 81 | 82 | 83 | 0 84 | 34 85 | 30 86 | gkl_conn 87 | DF40_80Pin_boson_edit 88 | 89 | 90 | 0 91 | 50 92 | 50 93 | gkl_conn 94 | FH12-20S-0.5SVA(54) 95 | 96 | 97 | 0 98 | 24 99 | 20 100 | gkl_conn 101 | FH12-24S-0.5SVA(54) 102 | 103 | 104 | 0 105 | 28 106 | 24 107 | gkl_conn 108 | FH19C_8 109 | 110 | 111 | 0 112 | 10 113 | 8 114 | gkl_conn 115 | FH28E-30S-0.5SH(05) 116 | 117 | 118 | 0 119 | 32 120 | 31 121 | gkl_conn 122 | FTSH-105-XX-X-DV 123 | 124 | 125 | 0 126 | 10 127 | 10 128 | gkl_conn 129 | Feather_PinHeader_1x12 130 | 131 | 132 | 0 133 | 12 134 | 12 135 | gkl_conn 136 | Feather_PinHeader_1x16 137 | 138 | 139 | 0 140 | 16 141 | 16 142 | gkl_conn 143 | JST_PH_B2B-PH-SM4-TB_1x02-1MP_P2.00mm_Vertical 144 | JST PH series connector, B2B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator 145 | connector JST PH side entry 146 | 0 147 | 4 148 | 3 149 | gkl_conn 150 | MAGJACK 151 | 152 | 153 | 0 154 | 18 155 | 15 156 | gkl_conn 157 | P-MUSBR-M1C1 158 | 159 | 160 | 0 161 | 40 162 | 31 163 | gkl_conn 164 | QSE-020-01-F-D-A 165 | 166 | 167 | 0 168 | 44 169 | 41 170 | gkl_conn 171 | QSH-040-01-L-D-DP-A 172 | 173 | 174 | 0 175 | 130 176 | 122 177 | gkl_conn 178 | QTE-020-01-F-D 179 | 180 | 181 | 0 182 | 44 183 | 40 184 | gkl_conn 185 | S2B-PH-SM4-TB 186 | 2-Pin JST PH Series Right-Angle Connector (+/- for batteries) 187 | 188 | 0 189 | 4 190 | 4 191 | gkl_conn 192 | SB02B-PASK-2 193 | 194 | 195 | 0 196 | 2 197 | 2 198 | gkl_conn 199 | SYZYGY_Transcieiver 200 | 201 | 202 | 0 203 | 46 204 | 41 205 | gkl_conn 206 | SYZYGY_standard_carrier 207 | 208 | 209 | 0 210 | 46 211 | 41 212 | gkl_conn 213 | SYZYGY_standard_pod 214 | 215 | 216 | 0 217 | 46 218 | 41 219 | gkl_conn 220 | TFC-105-WT 221 | 222 | 223 | 0 224 | 12 225 | 11 226 | gkl_conn 227 | TestPoint_Pad_D1.0mm 228 | SMD pad as test Point, diameter 1.0mm 229 | test point SMD pad 230 | 0 231 | 1 232 | 1 233 | gkl_conn 234 | XF2M-2415-1A 235 | 236 | 237 | 0 238 | 26 239 | 25 240 | gkl_conn 241 | micro_sd_1051620001 242 | 243 | 244 | 0 245 | 15 246 | 10 247 | gkl_conn 248 | molex_microsd_1040310811 249 | 250 | 251 | 0 252 | 14 253 | 11 254 | gkl_conn 255 | usb_minib_vertical 256 | 257 | 258 | 0 259 | 19 260 | 6 261 | gkl_conn 262 | usbc_vert_10132328 263 | 264 | 265 | 0 266 | 34 267 | 25 268 | gkl_housings_bga 269 | DSBGA-12_1.56x1.39mm_Layout3x4_P0.4mm 270 | DSBGA-12 http://www.ti.com/lit/ds/symlink/ina231.pdf 271 | 272 | 0 273 | 24 274 | 12 275 | gkl_housings_bga 276 | T-PBGA-24_6.0x8.0mm_Layout5x5_P1.0mm 277 | 278 | 279 | 0 280 | 24 281 | 24 282 | gkl_housings_bga 283 | TFBGA-64_6.0x6.0mm_Layout8x8_P0.65mm 284 | XFBGA-64, https://www.nxp.com/docs/en/package-information/SOT1555-1.pdf 285 | XFBGA-64 286 | 0 287 | 64 288 | 64 289 | gkl_housings_bga 290 | VFBGA-49 291 | 292 | 293 | 0 294 | 49 295 | 49 296 | gkl_housings_bga 297 | WLCSP-4_1.0x1.0mm_Layout2x2_P0.4mm 298 | 299 | 300 | 0 301 | 8 302 | 4 303 | gkl_housings_bga 304 | WLCSP-8 3X3_0.5 305 | 306 | 307 | 0 308 | 16 309 | 8 310 | gkl_housings_bga 311 | caBGA_381_17x17 312 | 313 | 314 | 0 315 | 381 316 | 381 317 | gkl_housings_bga 318 | csBGA-8 319 | 320 | 321 | 0 322 | 8 323 | 8 324 | gkl_housings_bga 325 | csBGA285 326 | 327 | 328 | 0 329 | 285 330 | 285 331 | gkl_housings_dfn 332 | AFS434S3-T 333 | 334 | 335 | 0 336 | 6 337 | 6 338 | gkl_housings_dfn 339 | CL-2025 340 | 341 | 342 | 0 343 | 9 344 | 9 345 | gkl_housings_dfn 346 | DFN-8-1EP_3x2mm_Pitch0.5mm 347 | 8-Lead Plastic Dual Flat, No Lead Package (MC) - 2x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) 348 | DFN 0.5 349 | 0 350 | 9 351 | 9 352 | gkl_housings_dfn 353 | DFN3X3_8L_EP2_P 354 | 355 | 356 | 0 357 | 12 358 | 6 359 | gkl_housings_dfn 360 | UMMP008Z2020 361 | 362 | 363 | 0 364 | 9 365 | 9 366 | gkl_housings_dfn 367 | WSON-10-1EP_2x2mm_P0.4mm 368 | 10-Lead Plastic WSON (2mm x 2mm) 0.40mm pitch 369 | WSON 10 0.4mm 370 | 0 371 | 16 372 | 11 373 | gkl_housings_qfn 374 | DFN1010B-6 (SOT1216) 375 | 376 | 377 | 0 378 | 6 379 | 6 380 | gkl_housings_qfn 381 | MOSFET_1.0x0.6mm 382 | 383 | 384 | 0 385 | 3 386 | 3 387 | gkl_housings_qfn 388 | QFN-12-1EP_3x3mm_P0.5mm_EP1.65x1.65mm 389 | QFN, 12 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_12_%2005-08-1855.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py 390 | QFN DFN_QFN 391 | 0 392 | 14 393 | 13 394 | gkl_housings_qfn 395 | VQFN-HR 396 | 397 | 398 | 0 399 | 16 400 | 12 401 | gkl_housings_son 402 | SAW-5 403 | 404 | 405 | 0 406 | 5 407 | 5 408 | gkl_housings_son 409 | X2SON_4_1.0x1.0mm 410 | 411 | 412 | 0 413 | 5 414 | 4 415 | gkl_housings_son 416 | XSON6 417 | 418 | 419 | 0 420 | 6 421 | 6 422 | gkl_housings_son 423 | XSON7 424 | 425 | 426 | 0 427 | 7 428 | 7 429 | gkl_led 430 | 0404LED_RGB 431 | 432 | 433 | 0 434 | 4 435 | 4 436 | gkl_led 437 | LED_0201 438 | Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf) 439 | capacitor 0402 440 | 0 441 | 2 442 | 2 443 | gkl_led 444 | led_rbag_2121_dense 445 | 446 | 447 | 0 448 | 4 449 | 4 450 | gkl_logos 451 | gsd_logo_small 452 | 453 | 454 | 0 455 | 0 456 | 0 457 | gkl_logos 458 | oshw_small 459 | 460 | 461 | 0 462 | 0 463 | 0 464 | gkl_time 465 | ABS05_32.768KHz Crystal 466 | 467 | 468 | 0 469 | 2 470 | 2 471 | gkl_time 472 | CDFN3225-4LD-PL-1 473 | 474 | 475 | 0 476 | 4 477 | 4 478 | gkl_time 479 | Oscilator_2.5x2.0 480 | 481 | 482 | 0 483 | 4 484 | 4 485 | gkl_ublox 486 | MAX_M8 487 | 488 | 489 | 0 490 | 18 491 | 18 492 | gkl_ublox 493 | NEO-M8 494 | 495 | 496 | 0 497 | 24 498 | 24 499 | pkl_dipol 500 | C_0201 501 | Capacitor SMD 0201, reflow soldering 502 | capacitor 0201 503 | 0 504 | 2 505 | 2 506 | pkl_dipol 507 | C_0402 508 | Capacitor SMD 0402, reflow soldering 509 | capacitor 0402 510 | 0 511 | 2 512 | 2 513 | pkl_dipol 514 | C_0603 515 | Capacitor SMD 0603, reflow soldering 516 | capacitor 0603 517 | 0 518 | 2 519 | 2 520 | pkl_dipol 521 | C_0805 522 | Capacitor SMD 0805, reflow soldering 523 | capacitor 0805 524 | 0 525 | 2 526 | 2 527 | pkl_dipol 528 | C_1206 529 | Capacitor SMD 1206, reflow soldering 530 | capacitor 1206 531 | 0 532 | 2 533 | 2 534 | pkl_dipol 535 | C_1218 536 | Capacitor SMD 1218, reflow soldering 537 | capacitor 1218 538 | 0 539 | 2 540 | 2 541 | pkl_dipol 542 | C_2010 543 | Capacitor SMD 2010, reflow soldering 544 | capacitor 2010 545 | 0 546 | 2 547 | 2 548 | pkl_dipol 549 | C_2512 550 | Capacitor SMD 2512, reflow soldering 551 | capacitor 2512 552 | 0 553 | 2 554 | 2 555 | pkl_dipol 556 | C_XH414HG-IV01E 557 | Super Capacitor SMD Coin IV01E, reflow soldering 558 | super capacitor IV01E 559 | 0 560 | 2 561 | 2 562 | pkl_dipol 563 | D_0402 564 | Diode SMD 0402, reflow soldering 565 | diode led 0402 566 | 0 567 | 2 568 | 2 569 | pkl_dipol 570 | D_0603 571 | Diode SMD 0603, reflow soldering 572 | diode led 0603 573 | 0 574 | 2 575 | 2 576 | pkl_dipol 577 | D_0603_Side 578 | Diode SMD 0603 Side 579 | diode led 0603 580 | 0 581 | 2 582 | 2 583 | pkl_dipol 584 | L_0402 585 | Inductor SMD 0402, reflow soldering 586 | inductor 0402 587 | 0 588 | 2 589 | 2 590 | pkl_dipol 591 | L_0603 592 | Inductor SMD 0603, reflow soldering 593 | inductor 0603 594 | 0 595 | 2 596 | 2 597 | pkl_dipol 598 | R_0402 599 | Resistor SMD 0402, reflow soldering 600 | resistor 0402 601 | 0 602 | 2 603 | 2 604 | pkl_dipol 605 | R_0603 606 | Resistor SMD 0603, reflow soldering 607 | resistor 0603 608 | 0 609 | 2 610 | 2 611 | pkl_dipol 612 | R_Array_Concave_4x0603 613 | Thick Film Chip Resistor Array, Wave soldering, Vishay CRA06P (see cra06p.pdf) 614 | resistor array 615 | 0 616 | 8 617 | 8 618 | pkl_dipol 619 | R_Array_Convex_4x0402 620 | Thick Film Chip Resistor Array, Wave soldering, Vishay CRA06P (see cra06p.pdf) 621 | resistor array 622 | 0 623 | 8 624 | 8 625 | pkl_dipol 626 | SC_1210 627 | Super Capacitor SMD 1210 628 | capacitor 1210 629 | 0 630 | 2 631 | 2 632 | pkl_housings_sot 633 | SOT-23-5 634 | 5-pin SOT23 package 635 | SOT-23-5 636 | 0 637 | 5 638 | 5 639 | pkl_housings_sot 640 | SOT-23-6 641 | 6-pin SOT23 package 642 | SOT-23-6 643 | 0 644 | 6 645 | 6 646 | pkl_housings_sot 647 | SOT-666 648 | Based on DiodesInc and NXP proposed footprints 649 | 650 | 0 651 | 6 652 | 6 653 | pkl_housings_sot 654 | SOT-833-1 655 | NXP SOT833-1 XSON8 footprint. 656 | 657 | 0 658 | 8 659 | 8 660 | pkl_housings_sot 661 | SOT-996-2 662 | NXP SOT996-2 XSON8 footprint. 663 | 664 | 0 665 | 8 666 | 8 667 | pkl_housings_sot 668 | SOT-1089 669 | NXP SOT1089 XSON8 footprint. 670 | 671 | 0 672 | 8 673 | 8 674 | pkl_housings_sot 675 | SOT353 676 | 5-pin SOT353 package 677 | SOT353 678 | 0 679 | 5 680 | 5 681 | pkl_tag_connect 682 | TC2030-NL_BIG 683 | Tag-Connect TC2030-NL footprint by carloscuev@gmail.com 684 | Tag-Connect TC2030-NL 685 | 0 686 | 6 687 | 6 688 | pkl_tag_connect 689 | TC2030-NL_SMALL 690 | Tag-Connect TC2030-NL footprint by carloscuev@gmail.com 691 | Tag-Connect TC2030-NL 692 | 0 693 | 6 694 | 6 695 | pkl_tag_connect 696 | TC2030_BIG 697 | Tag-Connect TC2030 footprint by carloscuev@gmail.com 698 | Tag-Connect TC2030 699 | 0 700 | 6 701 | 6 702 | pkl_tag_connect 703 | TC2030_SMALL 704 | Tag-Connect TC2030 footprint by carloscuev@gmail.com 705 | Tag-Connect TC2030 706 | 0 707 | 6 708 | 6 709 | pkl_tag_connect 710 | TC2050-NL_BIG 711 | Tag-Connect TC2050-NL footprint by carloscuev@gmail.com 712 | Tag-Connect TC2050-NL 713 | 0 714 | 10 715 | 10 716 | pkl_tag_connect 717 | TC2050-NL_SMALL 718 | Tag-Connect TC2050-NL footprint by carloscuev@gmail.com 719 | Tag-Connect TC2050-NL 720 | 0 721 | 10 722 | 10 723 | pkl_tag_connect 724 | TC2050_BIG 725 | Tag-Connect TC2050 footprint by carloscuev@gmail.com 726 | Tag-Connect TC2050 727 | 0 728 | 10 729 | 10 730 | pkl_tag_connect 731 | TC2050_SMALL 732 | Tag-Connect TC2050 footprint by carloscuev@gmail.com 733 | Tag-Connect TC2050 734 | 0 735 | 10 736 | 10 737 | -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (lib (name gkl_housings_qfn)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_housings_qfn.pretty)(options "")(descr "")) 3 | (lib (name gkl_housings_bga)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_housings_bga.pretty)(options "")(descr "")) 4 | (lib (name gkl_housings_son)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_housings_son.pretty)(options "")(descr "")) 5 | (lib (name gkl_housings_dfn)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_housings_dfn.pretty)(options "")(descr "")) 6 | (lib (name gkl_ublox)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_ublox.pretty)(options "")(descr "")) 7 | (lib (name gkl_antenna)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_antenna.pretty)(options "")(descr "")) 8 | (lib (name gkl_conn)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_conn.pretty)(options "")(descr "")) 9 | (lib (name gkl_logos)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_logos.pretty)(options "")(descr "")) 10 | (lib (name gkl_time)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_time.pretty)(options "")(descr "")) 11 | (lib (name gkl_led)(type KiCad)(uri ${KIPRJMOD}/../../lib/gkl/gkl_led.pretty)(options "")(descr "")) 12 | (lib (name pkl_tag_connect)(type KiCad)(uri ${KIPRJMOD}/../../lib/pkl/pkl_tag_connect.pretty)(options "")(descr "")) 13 | (lib (name pkl_dipol)(type KiCad)(uri ${KIPRJMOD}/../../lib/pkl/pkl_dipol.pretty)(options "")(descr "")) 14 | (lib (name pkl_housings_sot)(type KiCad)(uri ${KIPRJMOD}/../../lib/pkl/pkl_housings_sot.pretty)(options "")(descr "")) 15 | ) 16 | -------------------------------------------------------------------------------- /hardware/ButterStick_r1.0/sym-lib-table: -------------------------------------------------------------------------------- 1 | (sym_lib_table 2 | (lib (name "power")(type "Legacy")(uri "${KIPRJMOD}/../../lib/gkl/gkl_power.lib")(options "")(descr "")) 3 | (lib (name "gkl_rf")(type "Legacy")(uri "${KIPRJMOD}/../../lib/gkl/gkl_rf.lib")(options "")(descr "")) 4 | (lib (name "gkl_microchip")(type "Legacy")(uri "${KIPRJMOD}/../../lib/gkl/gkl_microchip.lib")(options "")(descr "")) 5 | (lib (name "gkl_pmic")(type "KiCad")(uri "${KIPRJMOD}/../../lib/gkl/gkl_pmic.kicad_sym")(options "")(descr "")) 6 | (lib (name "gkl_mosfet")(type "Legacy")(uri "${KIPRJMOD}/../../lib/gkl/gkl_mosfet.lib")(options "")(descr "")) 7 | (lib (name "gkl_mem")(type "Legacy")(uri "${KIPRJMOD}/../../lib/gkl/gkl_mem.lib")(options "")(descr "")) 8 | (lib (name "gkl_time")(type "Legacy")(uri "${KIPRJMOD}/../../lib/gkl/gkl_time.lib")(options "")(descr "")) 9 | (lib (name "gkl_misc")(type "Legacy")(uri "${KIPRJMOD}/../../lib/gkl/gkl_misc.lib")(options "")(descr "")) 10 | (lib (name "gkl_lattice")(type "Legacy")(uri "${KIPRJMOD}/../../lib/gkl/gkl_lattice.lib")(options "")(descr "")) 11 | (lib (name "gkl_power")(type "Legacy")(uri "${KIPRJMOD}/../../lib/gkl/gkl_power.lib")(options "")(descr "")) 12 | (lib (name "pkl_tag_connect")(type "Legacy")(uri "${KIPRJMOD}/../../lib/pkl/pkl_tag_connect.lib")(options "")(descr "")) 13 | (lib (name "pkl_silabs")(type "Legacy")(uri "${KIPRJMOD}/../../lib/pkl/pkl_silabs.lib")(options "")(descr "")) 14 | (lib (name "pkl_sensor")(type "Legacy")(uri "${KIPRJMOD}/../../lib/pkl/pkl_sensor.lib")(options "")(descr "")) 15 | (lib (name "pkl_power")(type "Legacy")(uri "${KIPRJMOD}/../../lib/pkl/pkl_power.lib")(options "")(descr "")) 16 | (lib (name "pkl_misc")(type "Legacy")(uri "${KIPRJMOD}/../../lib/pkl/pkl_misc.lib")(options "")(descr "")) 17 | (lib (name "pkl_memory")(type "Legacy")(uri "${KIPRJMOD}/../../lib/pkl/pkl_memory.lib")(options "")(descr "")) 18 | (lib (name "pkl_maxim")(type "Legacy")(uri "${KIPRJMOD}/../../lib/pkl/pkl_maxim.lib")(options "")(descr "")) 19 | (lib (name "pkl_logos")(type "Legacy")(uri "${KIPRJMOD}/../../lib/pkl/pkl_logos.lib")(options "")(descr "")) 20 | (lib (name "pkl_linear")(type "Legacy")(uri "${KIPRJMOD}/../../lib/pkl/pkl_linear.lib")(options "")(descr "")) 21 | (lib (name "pkl_device")(type "Legacy")(uri "${KIPRJMOD}/../../lib/pkl/pkl_device.lib")(options "")(descr "")) 22 | (lib (name "pkl_conn")(type "Legacy")(uri "${KIPRJMOD}/../../lib/pkl/pkl_conn.lib")(options "")(descr "")) 23 | (lib (name "ButterStick-rescue")(type "Legacy")(uri "${KIPRJMOD}/ButterStick-rescue.lib")(options "")(descr "")) 24 | (lib (name "ECP5UM5G-85Pinout")(type "Legacy")(uri "/home/greg/projects/ButterStick/lib/ECP5UM5G-85Pinout.lib")(options "")(descr "")) 25 | (lib (name "usb3343")(type "KiCad")(uri "/home/greg/Projects/OrangeCrab/lib/gkl/usb3343.kicad_sym")(options "")(descr "")) 26 | ) 27 | -------------------------------------------------------------------------------- /lib/ref/Butter_logo.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/butterstick-fpga/butterstick-hardware/0694ddfa9824a07f0c6c6981186e45f80187659c/lib/ref/Butter_logo.png -------------------------------------------------------------------------------- /mechanical/case/acrylic_plate/README.md: -------------------------------------------------------------------------------- 1 | # Acrylic Plate for Butterstick 2 | 3 | This is a basic acrylic plate for butterstick described in openscad. A dxf file is included for laser cutting. 4 | 5 | It was cut in 3mm acrylic. The hardware is all M3, the bolts are 12mm long, the spacers are 5mm high. 6 | 7 | Files are free to use in any form, no warranty is offered or implied. 8 | 9 | ![Loaded](butterstick_acrylic_plate_unloaded.jpg) 10 | 11 | ![Unloaded](butterstick_acrylic_plate_loaded.jpg) 12 | 13 | 14 | -------------------------------------------------------------------------------- /mechanical/case/acrylic_plate/butterstick_acrylic_plate.scad: -------------------------------------------------------------------------------- 1 | hole_diameter = 3.2; 2 | 3 | porta_left_hole_x = 112.5; 4 | porta_left_hole_y = 88.7; 5 | 6 | porta_right_hole_x = 112.5; 7 | porta_right_hole_y = 122.7; 8 | 9 | portb_left_hole_x = 160; 10 | portb_left_hole_y = 86.2; 11 | 12 | portb_right_hole_x = 126; 13 | portb_right_hole_y = 86.2; 14 | 15 | portc_left_hole_x = 125.59; 16 | portc_left_hole_y = 125.2; 17 | 18 | portc_right_hole_x = 163.41; 19 | portc_right_hole_y = 125.2; 20 | 21 | mount_hole_left_x = 183.5; 22 | mount_hole_left_y = 126.2; 23 | 24 | mount_hole_right_x = 183.5; 25 | mount_hole_right_y = 85.2; 26 | 27 | board_edge_min_x = 107.5; 28 | board_edge_min_y = 81.2; 29 | board_edge_max_x = 187.5; 30 | board_edge_max_y = 130.2; 31 | 32 | board_size_x = board_edge_max_x-board_edge_min_x; 33 | board_size_y = board_edge_max_y-board_edge_min_y; 34 | board_centre_x = board_edge_min_x + board_size_x/2; 35 | board_centre_y = board_edge_min_y + board_size_y/2; 36 | 37 | echo ("board size is ", board_size_x, " by ", board_size_y); 38 | echo ("board centre is ", board_centre_x, " & ", board_centre_y); 39 | 40 | margin=6; 41 | 42 | module hole(x,y) { 43 | echo (" hole at ", x, " by ", y); 44 | translate([x-board_centre_x, y-board_centre_y]) circle(d=hole_diameter, $fn=24); 45 | } 46 | 47 | difference() { 48 | hull() { 49 | translate([+board_size_x/2, +board_size_y/2]) circle(r=margin, $fn=24); 50 | translate([+board_size_x/2, -board_size_y/2]) circle(r=margin, $fn=24); 51 | translate([-board_size_x/2, +board_size_y/2]) circle(r=margin, $fn=24); 52 | translate([-board_size_x/2, -board_size_y/2]) circle(r=margin, $fn=24); 53 | } 54 | 55 | hole(porta_left_hole_x, porta_left_hole_y); 56 | hole(porta_right_hole_x, porta_right_hole_y); 57 | hole(portb_left_hole_x, portb_left_hole_y); 58 | hole(portb_right_hole_x, portb_right_hole_y); 59 | hole(portc_left_hole_x, portc_left_hole_y); 60 | hole(portc_right_hole_x, portc_right_hole_y); 61 | hole(mount_hole_left_x, mount_hole_left_y); 62 | hole(mount_hole_right_x, mount_hole_right_y); 63 | } 64 | 65 | 66 | -------------------------------------------------------------------------------- /mechanical/case/acrylic_plate/butterstick_acrylic_plate_loaded.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/butterstick-fpga/butterstick-hardware/0694ddfa9824a07f0c6c6981186e45f80187659c/mechanical/case/acrylic_plate/butterstick_acrylic_plate_loaded.jpg -------------------------------------------------------------------------------- /mechanical/case/acrylic_plate/butterstick_acrylic_plate_unloaded.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/butterstick-fpga/butterstick-hardware/0694ddfa9824a07f0c6c6981186e45f80187659c/mechanical/case/acrylic_plate/butterstick_acrylic_plate_unloaded.jpg --------------------------------------------------------------------------------