├── README.md ├── LICENSE ├── hdl ├── Flip_Flop_Symmetrical.vhd ├── Mux_4x1.vhd ├── Arbiter_Mutual_Order.vhd ├── Switch_Block_4x4.vhd ├── APUF.vhd ├── Decoder_24x5.vhd ├── Permutation.vhd ├── APUF_Mutual_Order.vhd ├── Arbiter.vhd └── APUF_Driver.vhd └── placement ├── create_placement.jl └── manual_placement.xdc /README.md: -------------------------------------------------------------------------------- 1 | # 4x4 APUF 2 | 3 | An FPGA Implementation of Arbiter PUF with 4x4 Switch Blocks. 4 | 5 | This repository is associated to the following Master's thesis: 6 | 7 | [Can Aknesil. "An FPGA Implementation of Arbiter PUF with 4x4 Switch 8 | Blocks". Master's Thesis, KTH (Royal Institute of Technology), 9 | Stockholm, 10 | Sweden. 2020.](https://www.canaknesil.com/docs/An_FPGA_Implementation_of_Arbiter_PUF_with_4x4_Switch_Blocks.pdf) 11 | 12 | Additional publication: 13 | 14 | [Elena Dubrova. "A Reconfigurable Arbiter PUF with 4 x 4 Switch 15 | Blocks". In: *2018 IEEE 48th International Symposium on 16 | Multiple-Valued Logic (ISMVL)*. Linz, 2018, pp. 31-37, doi: 17 | 10.1109/ISMVL.2018.00014.](https://ieeexplore.ieee.org/document/8416917) 18 | 19 | This FPGA design is compiled with Xilinx Vivado v2019.2.1 (64-bit) and 20 | implemented on Xilinx Artix-7 XC7A100T FPGA. 21 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2020 Can Aknesil 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /hdl/Flip_Flop_Symmetrical.vhd: -------------------------------------------------------------------------------- 1 | -- Copyright (c) 2020 Can Aknesil 2 | 3 | -- Permission is hereby granted, free of charge, to any person obtaining a copy 4 | -- of this software and associated documentation files (the "Software"), to deal 5 | -- in the Software without restriction, including without limitation the rights 6 | -- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | -- copies of the Software, and to permit persons to whom the Software is 8 | -- furnished to do so, subject to the following conditions: 9 | 10 | -- The above copyright notice and this permission notice shall be included in all 11 | -- copies or substantial portions of the Software. 12 | 13 | -- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | -- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | -- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | -- SOFTWARE. 20 | 21 | library IEEE; 22 | use IEEE.STD_LOGIC_1164.ALL; 23 | 24 | entity Flip_Flop_Symmetrical is port ( 25 | A: in std_logic; -- Acts like clock. 26 | B: in std_logic; 27 | Q: out std_logic); 28 | end Flip_Flop_Symmetrical; 29 | 30 | architecture Behavioral of Flip_Flop_Symmetrical is 31 | 32 | begin 33 | 34 | D_FLIP_FLOP: process(A) 35 | begin 36 | if (A = '1' and A'event) then 37 | Q <= B; 38 | end if; 39 | end process; 40 | 41 | end Behavioral; 42 | -------------------------------------------------------------------------------- /hdl/Mux_4x1.vhd: -------------------------------------------------------------------------------- 1 | -- Copyright (c) 2020 Can Aknesil 2 | 3 | -- Permission is hereby granted, free of charge, to any person obtaining a copy 4 | -- of this software and associated documentation files (the "Software"), to deal 5 | -- in the Software without restriction, including without limitation the rights 6 | -- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | -- copies of the Software, and to permit persons to whom the Software is 8 | -- furnished to do so, subject to the following conditions: 9 | 10 | -- The above copyright notice and this permission notice shall be included in all 11 | -- copies or substantial portions of the Software. 12 | 13 | -- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | -- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | -- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | -- SOFTWARE. 20 | 21 | library IEEE; 22 | use IEEE.STD_LOGIC_1164.ALL; 23 | 24 | entity Mux_4x1 is port ( 25 | A: in std_logic; 26 | B: in std_logic; 27 | C: in std_logic; 28 | D: in std_logic; 29 | Sel: in std_logic_vector(1 downto 0); 30 | Q: out std_logic 31 | ); 32 | end Mux_4x1; 33 | 34 | architecture Behavioral of Mux_4x1 is 35 | begin 36 | Q <= A when Sel = "00" else 37 | B when Sel = "01" else 38 | C when Sel = "10" else 39 | D when Sel = "11"; 40 | end Behavioral; 41 | -------------------------------------------------------------------------------- /hdl/Arbiter_Mutual_Order.vhd: -------------------------------------------------------------------------------- 1 | -- Copyright (c) 2020 Can Aknesil 2 | 3 | -- Permission is hereby granted, free of charge, to any person obtaining a copy 4 | -- of this software and associated documentation files (the "Software"), to deal 5 | -- in the Software without restriction, including without limitation the rights 6 | -- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | -- copies of the Software, and to permit persons to whom the Software is 8 | -- furnished to do so, subject to the following conditions: 9 | 10 | -- The above copyright notice and this permission notice shall be included in all 11 | -- copies or substantial portions of the Software. 12 | 13 | -- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | -- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | -- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | -- SOFTWARE. 20 | 21 | library IEEE; 22 | use IEEE.STD_LOGIC_1164.ALL; 23 | 24 | entity Arbiter_Mutual_Order is 25 | port ( 26 | permutation: in std_logic_vector(1 to 4); -- a1 to a4 in the paper 27 | mutual_order: out std_logic_vector(1 to 6)); 28 | 29 | attribute DONT_TOUCH: string; 30 | 31 | end Arbiter_Mutual_Order; 32 | 33 | architecture Behavioral of Arbiter_Mutual_Order is 34 | 35 | component Flip_Flop_Symmetrical is port ( 36 | A: in std_logic; 37 | B: in std_logic; 38 | Q: out std_logic); 39 | end component; 40 | attribute DONT_TOUCH of Flip_Flop_Symmetrical: component is "yes"; 41 | 42 | begin 43 | 44 | FF_2_1: Flip_Flop_Symmetrical port map ( 45 | A => permutation(2), B => permutation(1), Q => mutual_order(1)); 46 | -- Output is 1 if B comes first. 47 | FF_3_2: Flip_Flop_Symmetrical port map ( 48 | A => permutation(3), B => permutation(2), Q => mutual_order(2)); 49 | FF_4_3: Flip_Flop_Symmetrical port map ( 50 | A => permutation(4), B => permutation(3), Q => mutual_order(3)); 51 | FF_3_1: Flip_Flop_Symmetrical port map ( 52 | A => permutation(3), B => permutation(1), Q => mutual_order(4)); 53 | FF_4_2: Flip_Flop_Symmetrical port map ( 54 | A => permutation(4), B => permutation(2), Q => mutual_order(5)); 55 | FF_4_1: Flip_Flop_Symmetrical port map ( 56 | A => permutation(4), B => permutation(1), Q => mutual_order(6)); 57 | 58 | end Behavioral; 59 | -------------------------------------------------------------------------------- /hdl/Switch_Block_4x4.vhd: -------------------------------------------------------------------------------- 1 | -- Copyright (c) 2020 Can Aknesil 2 | 3 | -- Permission is hereby granted, free of charge, to any person obtaining a copy 4 | -- of this software and associated documentation files (the "Software"), to deal 5 | -- in the Software without restriction, including without limitation the rights 6 | -- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | -- copies of the Software, and to permit persons to whom the Software is 8 | -- furnished to do so, subject to the following conditions: 9 | 10 | -- The above copyright notice and this permission notice shall be included in all 11 | -- copies or substantial portions of the Software. 12 | 13 | -- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | -- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | -- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | -- SOFTWARE. 20 | 21 | library IEEE; 22 | use IEEE.STD_LOGIC_1164.ALL; 23 | 24 | entity Switch_Block_4x4 is 25 | port ( 26 | input: in std_logic_vector(0 to 3); 27 | challenge: in std_logic_vector(4 downto 0); 28 | output: out std_logic_vector(0 to 3)); 29 | 30 | attribute DONT_TOUCH: string; 31 | attribute DONT_TOUCH of Switch_Block_4x4: entity is "true|yes"; 32 | 33 | end Switch_Block_4x4; 34 | 35 | architecture Structural of Switch_Block_4x4 is 36 | 37 | component Mux_4x1 is port ( 38 | A: in std_logic; 39 | B: in std_logic; 40 | C: in std_logic; 41 | D: in std_logic; 42 | Sel: in std_logic_vector(1 downto 0); 43 | Q: out std_logic); 44 | end component; 45 | attribute DONT_TOUCH of Mux_4x1: component is "yes"; 46 | 47 | component Permutation is port ( 48 | Index: in std_logic_vector(4 downto 0); 49 | Permutation: out std_logic_vector(0 to 7)); 50 | end component; 51 | attribute DONT_TOUCH of Permutation: component is "yes"; 52 | 53 | signal mux_select: std_logic_vector(0 to 7); -- First two bits for mux 0, ... 54 | 55 | begin 56 | 57 | PERMUTATION_COMPONENT: Permutation port map ( 58 | Index => challenge, 59 | Permutation => mux_select); 60 | 61 | 62 | EQUAL_PATHS: for i in 0 to 3 generate 63 | EQUAL_PATH_MUX: Mux_4x1 port map ( 64 | A => input(0), 65 | B => input(1), 66 | C => input(2), 67 | D => input(3), 68 | Sel => mux_select(2*i to 2*i+1), 69 | Q => output(i)); 70 | end generate EQUAL_PATHS; 71 | 72 | end Structural; 73 | -------------------------------------------------------------------------------- /hdl/APUF.vhd: -------------------------------------------------------------------------------- 1 | -- Copyright (c) 2020 Can Aknesil 2 | 3 | -- Permission is hereby granted, free of charge, to any person obtaining a copy 4 | -- of this software and associated documentation files (the "Software"), to deal 5 | -- in the Software without restriction, including without limitation the rights 6 | -- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | -- copies of the Software, and to permit persons to whom the Software is 8 | -- furnished to do so, subject to the following conditions: 9 | 10 | -- The above copyright notice and this permission notice shall be included in all 11 | -- copies or substantial portions of the Software. 12 | 13 | -- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | -- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | -- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | -- SOFTWARE. 20 | 21 | library IEEE; 22 | use IEEE.STD_LOGIC_1164.ALL; 23 | 24 | entity APUF is 25 | generic (stage_n: integer := 2); 26 | port ( 27 | paths: in std_logic_vector(1 to 4); 28 | -- [4, 0] for switch block 0. 29 | challenge: in std_logic_vector(5 * stage_n - 1 downto 0); 30 | response: out std_logic_vector(4 downto 0)); 31 | end APUF; 32 | 33 | architecture Behavioral of APUF is 34 | 35 | component Switch_Block_4x4 is port ( 36 | input: in std_logic_vector(0 to 3); 37 | challenge: in std_logic_vector(4 downto 0); 38 | output: out std_logic_vector(0 to 3)); 39 | end component; 40 | 41 | component Arbiter is port ( 42 | permutation: in std_logic_vector(1 to 4); -- a1 to a4 in the paper 43 | order: out std_logic_vector(4 downto 0)); 44 | end component; 45 | 46 | type switch_block_io_array is array (0 to stage_n - 1) of std_logic_vector(1 to 4); 47 | signal switch_block_out: switch_block_io_array; 48 | 49 | begin 50 | 51 | assert (stage_n > 0) 52 | report "Number of stages must be positive in APUF must be positive." 53 | severity failure; 54 | 55 | FIRST_SWITCH_BLOCK: Switch_Block_4x4 port map ( 56 | input => paths, 57 | challenge => challenge(4 downto 0), 58 | output => switch_block_out(0)); 59 | 60 | SWITCH_BLOCKS: for i in 1 to stage_n - 1 generate 61 | SWITCH_BLOCK: Switch_Block_4x4 port map ( 62 | input => switch_block_out(i-1), 63 | challenge => challenge((i+1)*5 - 1 downto (i*5)), 64 | output => switch_block_out(i)); 65 | end generate SWITCH_BLOCKS; 66 | 67 | APUF_ARBITER: Arbiter port map ( 68 | permutation => switch_block_out(stage_n - 1), order => response); 69 | 70 | end Behavioral; 71 | -------------------------------------------------------------------------------- /hdl/Decoder_24x5.vhd: -------------------------------------------------------------------------------- 1 | -- Copyright (c) 2020 Can Aknesil 2 | 3 | -- Permission is hereby granted, free of charge, to any person obtaining a copy 4 | -- of this software and associated documentation files (the "Software"), to deal 5 | -- in the Software without restriction, including without limitation the rights 6 | -- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | -- copies of the Software, and to permit persons to whom the Software is 8 | -- furnished to do so, subject to the following conditions: 9 | 10 | -- The above copyright notice and this permission notice shall be included in all 11 | -- copies or substantial portions of the Software. 12 | 13 | -- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | -- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | -- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | -- SOFTWARE. 20 | 21 | library IEEE; 22 | use IEEE.STD_LOGIC_1164.ALL; 23 | use IEEE.STD_LOGIC_MISC.ALL; 24 | 25 | entity Decoder_24x5 is port ( 26 | one_hot_input: in std_logic_vector(1 to 24); 27 | output: out std_logic_vector(5 downto 1) 28 | ); 29 | end Decoder_24x5; 30 | 31 | architecture Behavioral of Decoder_24x5 is 32 | 33 | begin 34 | -- put not 35 | output(5) <= not or_reduce(one_hot_input(13 to 24)); 36 | 37 | output(4) <= not (or_reduce(one_hot_input(5 to 12)) or 38 | or_reduce(one_hot_input(21 to 24))); 39 | 40 | output(3) <= not (or_reduce(one_hot_input(1 to 4)) or 41 | or_reduce(one_hot_input(9 to 12)) or 42 | or_reduce(one_hot_input(17 to 20))); 43 | 44 | output(2) <= not (one_hot_input(3) or one_hot_input(4) or 45 | one_hot_input(7) or one_hot_input(8) or 46 | one_hot_input(11) or one_hot_input(12) or 47 | one_hot_input(15) or one_hot_input(16) or 48 | one_hot_input(19) or one_hot_input(20) or 49 | one_hot_input(23) or one_hot_input(24)); 50 | 51 | output(1) <= not (one_hot_input(2) or 52 | one_hot_input(4) or 53 | one_hot_input(6) or 54 | one_hot_input(8) or 55 | one_hot_input(10) or 56 | one_hot_input(12) or 57 | one_hot_input(14) or 58 | one_hot_input(16) or 59 | one_hot_input(18) or 60 | one_hot_input(20) or 61 | one_hot_input(22) or 62 | one_hot_input(24)); 63 | 64 | 65 | end Behavioral; 66 | -------------------------------------------------------------------------------- /hdl/Permutation.vhd: -------------------------------------------------------------------------------- 1 | -- Copyright (c) 2020 Can Aknesil 2 | 3 | -- Permission is hereby granted, free of charge, to any person obtaining a copy 4 | -- of this software and associated documentation files (the "Software"), to deal 5 | -- in the Software without restriction, including without limitation the rights 6 | -- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | -- copies of the Software, and to permit persons to whom the Software is 8 | -- furnished to do so, subject to the following conditions: 9 | 10 | -- The above copyright notice and this permission notice shall be included in all 11 | -- copies or substantial portions of the Software. 12 | 13 | -- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | -- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | -- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | -- SOFTWARE. 20 | 21 | library IEEE; 22 | use IEEE.STD_LOGIC_1164.ALL; 23 | 24 | entity Permutation is port ( 25 | Index: in std_logic_vector(4 downto 0); -- A number from [0, 23] 26 | Permutation: out std_logic_vector(0 to 7) -- (2 bits, 2 bits, 2 bits, 2 bits) 27 | ); 28 | end permutation; 29 | 30 | architecture Lexicographical of Permutation is 31 | begin 32 | 33 | with Index select 34 | Permutation <= B"00_01_10_11" when "00000", 35 | B"00_01_11_10" when "00001", 36 | B"00_10_01_11" when "00010", 37 | B"00_10_11_01" when "00011", 38 | B"00_11_01_10" when "00100", 39 | B"00_11_10_01" when "00101", 40 | B"01_00_10_11" when "00110", 41 | B"01_00_11_10" when "00111", 42 | B"01_10_00_11" when "01000", 43 | B"01_10_11_00" when "01001", 44 | B"01_11_00_10" when "01010", 45 | B"01_11_10_00" when "01011", 46 | B"10_00_01_11" when "01100", 47 | B"10_00_11_01" when "01101", 48 | B"10_01_00_11" when "01110", 49 | B"10_01_11_00" when "01111", 50 | B"10_11_00_01" when "10000", 51 | B"10_11_01_00" when "10001", 52 | B"11_00_01_10" when "10010", 53 | B"11_00_10_01" when "10011", 54 | B"11_01_00_10" when "10100", 55 | B"11_01_10_00" when "10101", 56 | B"11_10_00_01" when "10110", 57 | B"11_10_01_00" when "10111", 58 | B"00_00_00_00" when others; 59 | 60 | end Lexicographical; 61 | -------------------------------------------------------------------------------- /hdl/APUF_Mutual_Order.vhd: -------------------------------------------------------------------------------- 1 | -- Copyright (c) 2020 Can Aknesil 2 | 3 | -- Permission is hereby granted, free of charge, to any person obtaining a copy 4 | -- of this software and associated documentation files (the "Software"), to deal 5 | -- in the Software without restriction, including without limitation the rights 6 | -- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | -- copies of the Software, and to permit persons to whom the Software is 8 | -- furnished to do so, subject to the following conditions: 9 | 10 | -- The above copyright notice and this permission notice shall be included in all 11 | -- copies or substantial portions of the Software. 12 | 13 | -- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | -- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | -- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | -- SOFTWARE. 20 | 21 | library IEEE; 22 | use IEEE.STD_LOGIC_1164.ALL; 23 | 24 | entity APUF_Mutual_Order is 25 | generic (stage_n: integer := 2); 26 | port ( 27 | paths: in std_logic_vector(1 to 4); 28 | -- [4, 0] for switch block 0. 29 | challenge: in std_logic_vector(5 * stage_n - 1 downto 0); 30 | response_mutual_order: out std_logic_vector(1 to 6)); 31 | end APUF_Mutual_Order; 32 | 33 | architecture Behavioral of APUF_Mutual_Order is 34 | 35 | component Switch_Block_4x4 is port ( 36 | input: in std_logic_vector(0 to 3); 37 | challenge: in std_logic_vector(4 downto 0); 38 | output: out std_logic_vector(0 to 3)); 39 | end component; 40 | 41 | component Arbiter_Mutual_Order is port ( 42 | permutation: in std_logic_vector(1 to 4); -- a1 to a4 in the paper 43 | mutual_order: out std_logic_vector(1 to 6)); 44 | end component; 45 | 46 | type switch_block_io_array is array (0 to stage_n - 1) of std_logic_vector(1 to 4); 47 | signal switch_block_out: switch_block_io_array; 48 | 49 | begin 50 | 51 | assert (stage_n > 0) 52 | report "Number of stages must be positive in APUF must be positive." 53 | severity failure; 54 | 55 | FIRST_SWITCH_BLOCK: Switch_Block_4x4 port map ( 56 | input => paths, 57 | challenge => challenge(4 downto 0), 58 | output => switch_block_out(0)); 59 | 60 | SWITCH_BLOCKS: for i in 1 to stage_n - 1 generate 61 | SWITCH_BLOCK: Switch_Block_4x4 port map ( 62 | input => switch_block_out(i-1), 63 | challenge => challenge((i+1)*5 - 1 downto (i*5)), 64 | output => switch_block_out(i)); 65 | end generate SWITCH_BLOCKS; 66 | 67 | APUF_ARBITER: Arbiter_Mutual_Order port map ( 68 | permutation => switch_block_out(stage_n - 1), 69 | mutual_order => response_mutual_order); 70 | 71 | end Behavioral; 72 | -------------------------------------------------------------------------------- /placement/create_placement.jl: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2020 Can Aknesil 2 | 3 | # Permission is hereby granted, free of charge, to any person obtaining a copy 4 | # of this software and associated documentation files (the "Software"), to deal 5 | # in the Software without restriction, including without limitation the rights 6 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | # copies of the Software, and to permit persons to whom the Software is 8 | # furnished to do so, subject to the following conditions: 9 | 10 | # The above copyright notice and this permission notice shall be included in all 11 | # copies or substantial portions of the Software. 12 | 13 | # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | # SOFTWARE. 20 | 21 | function switch_block_constraint(i, X, Y) 22 | """ 23 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[$i].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 24 | set_property LOC SLICE_X$(X)Y$(Y) [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[$i].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 25 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[$i].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 26 | set_property LOC SLICE_X$(X)Y$(Y) [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[$i].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 27 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[$i].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 28 | set_property LOC SLICE_X$(X)Y$(Y) [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[$i].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 29 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[$i].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 30 | set_property LOC SLICE_X$(X)Y$(Y) [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[$i].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 31 | """ 32 | end 33 | 34 | function first_switch_block_constraint(X, Y) 35 | """ 36 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 37 | set_property LOC SLICE_X$(X)Y$(Y) [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 38 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 39 | set_property LOC SLICE_X$(X)Y$(Y) [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 40 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 41 | set_property LOC SLICE_X$(X)Y$(Y) [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 42 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 43 | set_property LOC SLICE_X$(X)Y$(Y) [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 44 | """ 45 | end 46 | 47 | Y = map(n->string(n), 23:-1:1) 48 | X = "66" 49 | I = map(n->string(n), 1:23) 50 | 51 | println(first_switch_block_constraint(X, "24")) 52 | 53 | for i in 1:23 54 | println(switch_block_constraint(I[i], X, Y[i])) 55 | end 56 | -------------------------------------------------------------------------------- /hdl/Arbiter.vhd: -------------------------------------------------------------------------------- 1 | -- Copyright (c) 2020 Can Aknesil 2 | 3 | -- Permission is hereby granted, free of charge, to any person obtaining a copy 4 | -- of this software and associated documentation files (the "Software"), to deal 5 | -- in the Software without restriction, including without limitation the rights 6 | -- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | -- copies of the Software, and to permit persons to whom the Software is 8 | -- furnished to do so, subject to the following conditions: 9 | 10 | -- The above copyright notice and this permission notice shall be included in all 11 | -- copies or substantial portions of the Software. 12 | 13 | -- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | -- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | -- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | -- SOFTWARE. 20 | 21 | library IEEE; 22 | use IEEE.STD_LOGIC_1164.ALL; 23 | 24 | entity Arbiter is 25 | port ( 26 | permutation: in std_logic_vector(1 to 4); -- a1 to a4 in the paper 27 | order: out std_logic_vector(4 downto 0)); 28 | 29 | attribute DONT_TOUCH: string; 30 | 31 | end Arbiter; 32 | 33 | architecture Behavioral of Arbiter is 34 | 35 | component Decoder_24x5 is port ( 36 | one_hot_input: in std_logic_vector(1 to 24); 37 | output: out std_logic_vector(1 to 5)); 38 | end component; 39 | attribute DONT_TOUCH of Decoder_24x5: component is "yes"; 40 | 41 | component Flip_Flop_Symmetrical is port ( 42 | A: in std_logic; 43 | B: in std_logic; 44 | Q: out std_logic); 45 | end component; 46 | attribute DONT_TOUCH of Flip_Flop_Symmetrical: component is "yes"; 47 | 48 | signal one_hot: std_logic_vector(23 downto 0); 49 | attribute DONT_TOUCH of one_hot: signal is "yes"; 50 | 51 | signal mutual_order: std_logic_vector(1 to 6); 52 | 53 | begin 54 | 55 | FF_2_1: Flip_Flop_Symmetrical port map ( 56 | A => permutation(2), B => permutation(1), Q => mutual_order(1)); 57 | -- Output is 1 if B comes first. 58 | FF_3_2: Flip_Flop_Symmetrical port map ( 59 | A => permutation(3), B => permutation(2), Q => mutual_order(2)); 60 | FF_4_3: Flip_Flop_Symmetrical port map ( 61 | A => permutation(4), B => permutation(3), Q => mutual_order(3)); 62 | FF_3_1: Flip_Flop_Symmetrical port map ( 63 | A => permutation(3), B => permutation(1), Q => mutual_order(4)); 64 | FF_4_2: Flip_Flop_Symmetrical port map ( 65 | A => permutation(4), B => permutation(2), Q => mutual_order(5)); 66 | FF_4_1: Flip_Flop_Symmetrical port map ( 67 | A => permutation(4), B => permutation(1), Q => mutual_order(6)); 68 | 69 | one_hot(0) <= mutual_order(1) and mutual_order(2) and mutual_order(3); 70 | one_hot(1) <= mutual_order(1) and mutual_order(5) and (not mutual_order(3)); 71 | one_hot(2) <= mutual_order(4) and (not mutual_order(2)) and mutual_order(5); 72 | one_hot(3) <= mutual_order(4) and mutual_order(3) and (not mutual_order(5)); 73 | one_hot(4) <= mutual_order(6) and (not mutual_order(5)) and mutual_order(2); 74 | one_hot(5) <= mutual_order(6) and (not mutual_order(3)) and (not mutual_order(2)); 75 | one_hot(6) <= (not mutual_order(1)) and mutual_order(4) and mutual_order(3); 76 | one_hot(7) <= (not mutual_order(1)) and mutual_order(6) and (not mutual_order(3)); 77 | one_hot(8) <= mutual_order(2) and (not mutual_order(4)) and mutual_order(6); 78 | one_hot(9) <= mutual_order(2) and mutual_order(3) and (not mutual_order(6)); 79 | one_hot(10) <= mutual_order(5) and (not mutual_order(6)) and mutual_order(4); 80 | one_hot(11) <= mutual_order(5) and (not mutual_order(3)) and (not mutual_order(4)); 81 | one_hot(12) <= (not mutual_order(4)) and mutual_order(1) and mutual_order(5); 82 | one_hot(13) <= (not mutual_order(4)) and mutual_order(6) and (not mutual_order(5)); 83 | one_hot(14) <= (not mutual_order(2)) and (not mutual_order(1)) and mutual_order(6); 84 | one_hot(15) <= (not mutual_order(2)) and mutual_order(5) and (not mutual_order(6)); 85 | one_hot(16) <= mutual_order(3) and (not mutual_order(6)) and mutual_order(1); 86 | one_hot(17) <= mutual_order(3) and (not mutual_order(5)) and (not mutual_order(1)); 87 | one_hot(18) <= (not mutual_order(6)) and mutual_order(1) and mutual_order(2); 88 | one_hot(19) <= (not mutual_order(6)) and mutual_order(4) and (not mutual_order(2)); 89 | one_hot(20) <= (not mutual_order(5)) and (not mutual_order(1)) and mutual_order(4); 90 | one_hot(21) <= (not mutual_order(5)) and mutual_order(2) and (not mutual_order(4)); 91 | one_hot(22) <= (not mutual_order(3)) and (not mutual_order(4)) and mutual_order(1); 92 | one_hot(23) <= (not mutual_order(3)) and (not mutual_order(2)) and (not mutual_order(1)); 93 | 94 | ONE_HOT_DECODER: Decoder_24x5 port map ( 95 | one_hot_input => one_hot, output => order); 96 | 97 | end Behavioral; 98 | -------------------------------------------------------------------------------- /hdl/APUF_Driver.vhd: -------------------------------------------------------------------------------- 1 | -- Copyright (c) 2020 Can Aknesil 2 | 3 | -- Permission is hereby granted, free of charge, to any person obtaining a copy 4 | -- of this software and associated documentation files (the "Software"), to deal 5 | -- in the Software without restriction, including without limitation the rights 6 | -- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | -- copies of the Software, and to permit persons to whom the Software is 8 | -- furnished to do so, subject to the following conditions: 9 | 10 | -- The above copyright notice and this permission notice shall be included in all 11 | -- copies or substantial portions of the Software. 12 | 13 | -- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | -- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | -- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | -- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | -- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | -- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | -- SOFTWARE. 20 | 21 | library IEEE; 22 | use IEEE.STD_LOGIC_1164.ALL; 23 | use IEEE.STD_LOGIC_UNSIGNED.ALL; 24 | 25 | entity APUF_Driver is 26 | port ( 27 | clk: in std_logic; 28 | reset: in std_logic; 29 | start: in std_logic; 30 | key: in std_logic_vector(127 downto 0); -- won't be used 31 | plaintext: in std_logic_vector(127 downto 0); 32 | ready: out std_logic; 33 | ciphertext: out std_logic_vector(127 downto 0); 34 | busy: out std_logic); 35 | 36 | attribute DONT_TOUCH: string; 37 | attribute DONT_TOUCH of APUF_Driver: entity is "true|yes"; -- For better schematics view 38 | 39 | end APUF_Driver; 40 | 41 | architecture Behavioral of APUF_Driver is 42 | 43 | component APUF_Mutual_Order is 44 | generic (stage_n: integer); 45 | port ( 46 | paths: in std_logic_vector(1 to 4); 47 | -- [4, 0] for switch block 0. 48 | challenge: in std_logic_vector(5 * stage_n - 1 downto 0); 49 | response_mutual_order: out std_logic_vector(1 to 6)); 50 | end component; 51 | 52 | -- APUF component connections 53 | signal apuf_pulse: std_logic; 54 | signal apuf_paths: std_logic_vector(0 to 3); 55 | signal apuf_response: std_logic_vector(4 downto 0); 56 | signal apuf_response_mutual_order: std_logic_vector(1 to 6); 57 | 58 | signal apuf_response_mutual_order_reg: std_logic_vector(1 to 6); 59 | signal apuf_response_enable: std_logic; 60 | signal apuf_challenge_enable: std_logic; 61 | 62 | constant stage_n: integer := 24; 63 | signal apuf_challenge: std_logic_vector(5*stage_n - 1 downto 0); 64 | 65 | -- FSM 66 | type state_type is (READY_S, SET_CHALLENGE_S, PULSE_UP_S, PULSE_DOWN_S); 67 | signal state, next_state: state_type; 68 | 69 | begin 70 | 71 | APUF_TEST_UNIT: APUF_Mutual_Order 72 | generic map (stage_n => stage_n) 73 | port map ( 74 | paths => apuf_paths, 75 | challenge => apuf_challenge, 76 | response_mutual_order => apuf_response_mutual_order); 77 | 78 | PULSE_FORK: for i in 0 to 3 generate 79 | apuf_paths(i) <= apuf_pulse; 80 | end generate PULSE_FORK; 81 | 82 | ciphertext(13 downto 6) <= "01010101"; -- signiture 83 | ciphertext(5 downto 0) <= apuf_response_mutual_order_reg; 84 | ciphertext(127 downto 14) <= (others => '0'); 85 | 86 | 87 | challenge_registers: process(clk, apuf_challenge_enable) 88 | begin 89 | if (clk'event and clk = '1') then 90 | if (apuf_challenge_enable = '1') then 91 | apuf_challenge <= plaintext(5*stage_n - 1 downto 0); 92 | else 93 | apuf_challenge <= apuf_challenge; 94 | end if; 95 | end if; 96 | end process challenge_registers; 97 | 98 | response_registers: process(clk, apuf_response_enable) 99 | begin 100 | if (clk'event and clk = '1') then 101 | if (apuf_response_enable = '1') then 102 | apuf_response_mutual_order_reg <= apuf_response_mutual_order; 103 | else 104 | apuf_response_mutual_order_reg <= apuf_response_mutual_order_reg; 105 | end if; 106 | end if; 107 | end process response_registers; 108 | 109 | -- FSM 110 | fsm_logic: process(state, start) 111 | begin 112 | next_state <= state; -- To prevent latches 113 | apuf_response_enable <= '0'; 114 | apuf_challenge_enable <= '0'; 115 | case state is 116 | when READY_S => 117 | apuf_pulse <= '0'; 118 | busy <= '0'; 119 | ready <= '1'; 120 | if (start = '1') then 121 | next_state <= SET_CHALLENGE_S; 122 | apuf_challenge_enable <= '1'; 123 | end if; 124 | when SET_CHALLENGE_S => 125 | apuf_pulse <= '0'; 126 | busy <= '1'; 127 | ready <= '0'; 128 | next_state <= PULSE_UP_S; 129 | when PULSE_UP_S => 130 | apuf_pulse <= '1'; 131 | busy <= '1'; 132 | ready <= '0'; 133 | apuf_response_enable <= '1'; 134 | next_state <= PULSE_DOWN_S; 135 | when PULSE_DOWN_S => 136 | apuf_pulse <= '0'; 137 | busy <= '1'; 138 | ready <= '0'; 139 | next_state <= READY_S; 140 | end case; 141 | end process fsm_logic; 142 | 143 | state_register: process(reset, clk) 144 | begin 145 | if (reset = '1') then 146 | state <= READY_S; 147 | elsif (clk'event and clk = '1') then 148 | state <= next_state; 149 | end if; 150 | end process state_register; 151 | 152 | end Behavioral; 153 | 154 | -------------------------------------------------------------------------------- /placement/manual_placement.xdc: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2020 Can Aknesil 2 | # 3 | # Permission is hereby granted, free of charge, to any person obtaining a copy 4 | # of this software and associated documentation files (the "Software"), to deal 5 | # in the Software without restriction, including without limitation the rights 6 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 | # copies of the Software, and to permit persons to whom the Software is 8 | # furnished to do so, subject to the following conditions: 9 | # 10 | # The above copyright notice and this permission notice shall be included in all 11 | # copies or substantial portions of the Software. 12 | # 13 | # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 | # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 19 | # SOFTWARE. 20 | 21 | 22 | # This is not a complete Xilinx constraints file. 23 | # Content of this file is generated via create_placement.jl Julia script. 24 | 25 | 26 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 27 | set_property LOC SLICE_X66Y24 [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 28 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 29 | set_property LOC SLICE_X66Y24 [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 30 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 31 | set_property LOC SLICE_X66Y24 [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 32 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 33 | set_property LOC SLICE_X66Y24 [get_cells {apuf_driver/APUF_TEST_UNIT/FIRST_SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 34 | 35 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[1].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 36 | set_property LOC SLICE_X66Y23 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[1].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 37 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[1].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 38 | set_property LOC SLICE_X66Y23 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[1].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 39 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[1].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 40 | set_property LOC SLICE_X66Y23 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[1].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 41 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[1].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 42 | set_property LOC SLICE_X66Y23 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[1].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 43 | 44 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[2].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 45 | set_property LOC SLICE_X66Y22 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[2].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 46 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[2].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 47 | set_property LOC SLICE_X66Y22 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[2].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 48 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[2].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 49 | set_property LOC SLICE_X66Y22 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[2].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 50 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[2].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 51 | set_property LOC SLICE_X66Y22 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[2].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 52 | 53 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[3].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 54 | set_property LOC SLICE_X66Y21 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[3].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 55 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[3].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 56 | set_property LOC SLICE_X66Y21 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[3].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 57 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[3].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 58 | set_property LOC SLICE_X66Y21 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[3].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 59 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[3].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 60 | set_property LOC SLICE_X66Y21 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[3].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 61 | 62 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[4].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 63 | set_property LOC SLICE_X66Y20 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[4].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 64 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[4].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 65 | set_property LOC SLICE_X66Y20 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[4].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 66 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[4].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 67 | set_property LOC SLICE_X66Y20 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[4].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 68 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[4].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 69 | set_property LOC SLICE_X66Y20 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[4].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 70 | 71 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[5].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 72 | set_property LOC SLICE_X66Y19 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[5].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 73 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[5].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 74 | set_property LOC SLICE_X66Y19 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[5].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 75 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[5].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 76 | set_property LOC SLICE_X66Y19 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[5].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 77 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[5].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 78 | set_property LOC SLICE_X66Y19 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[5].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 79 | 80 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[6].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 81 | set_property LOC SLICE_X66Y18 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[6].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 82 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[6].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 83 | set_property LOC SLICE_X66Y18 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[6].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 84 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[6].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 85 | set_property LOC SLICE_X66Y18 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[6].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 86 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[6].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 87 | set_property LOC SLICE_X66Y18 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[6].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 88 | 89 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[7].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 90 | set_property LOC SLICE_X66Y17 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[7].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 91 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[7].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 92 | set_property LOC SLICE_X66Y17 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[7].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 93 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[7].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 94 | set_property LOC SLICE_X66Y17 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[7].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 95 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[7].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 96 | set_property LOC SLICE_X66Y17 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[7].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 97 | 98 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[8].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 99 | set_property LOC SLICE_X66Y16 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[8].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 100 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[8].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 101 | set_property LOC SLICE_X66Y16 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[8].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 102 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[8].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 103 | set_property LOC SLICE_X66Y16 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[8].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 104 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[8].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 105 | set_property LOC SLICE_X66Y16 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[8].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 106 | 107 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[9].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 108 | set_property LOC SLICE_X66Y15 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[9].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 109 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[9].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 110 | set_property LOC SLICE_X66Y15 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[9].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 111 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[9].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 112 | set_property LOC SLICE_X66Y15 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[9].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 113 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[9].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 114 | set_property LOC SLICE_X66Y15 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[9].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 115 | 116 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[10].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 117 | set_property LOC SLICE_X66Y14 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[10].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 118 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[10].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 119 | set_property LOC SLICE_X66Y14 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[10].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 120 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[10].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 121 | set_property LOC SLICE_X66Y14 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[10].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 122 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[10].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 123 | set_property LOC SLICE_X66Y14 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[10].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 124 | 125 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[11].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 126 | set_property LOC SLICE_X66Y13 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[11].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 127 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[11].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 128 | set_property LOC SLICE_X66Y13 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[11].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 129 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[11].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 130 | set_property LOC SLICE_X66Y13 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[11].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 131 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[11].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 132 | set_property LOC SLICE_X66Y13 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[11].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 133 | 134 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[12].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 135 | set_property LOC SLICE_X66Y12 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[12].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 136 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[12].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 137 | set_property LOC SLICE_X66Y12 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[12].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 138 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[12].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 139 | set_property LOC SLICE_X66Y12 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[12].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 140 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[12].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 141 | set_property LOC SLICE_X66Y12 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[12].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 142 | 143 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[13].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 144 | set_property LOC SLICE_X66Y11 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[13].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 145 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[13].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 146 | set_property LOC SLICE_X66Y11 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[13].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 147 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[13].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 148 | set_property LOC SLICE_X66Y11 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[13].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 149 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[13].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 150 | set_property LOC SLICE_X66Y11 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[13].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 151 | 152 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[14].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 153 | set_property LOC SLICE_X66Y10 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[14].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 154 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[14].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 155 | set_property LOC SLICE_X66Y10 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[14].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 156 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[14].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 157 | set_property LOC SLICE_X66Y10 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[14].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 158 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[14].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 159 | set_property LOC SLICE_X66Y10 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[14].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 160 | 161 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[15].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 162 | set_property LOC SLICE_X66Y9 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[15].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 163 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[15].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 164 | set_property LOC SLICE_X66Y9 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[15].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 165 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[15].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 166 | set_property LOC SLICE_X66Y9 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[15].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 167 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[15].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 168 | set_property LOC SLICE_X66Y9 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[15].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 169 | 170 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[16].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 171 | set_property LOC SLICE_X66Y8 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[16].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 172 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[16].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 173 | set_property LOC SLICE_X66Y8 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[16].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 174 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[16].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 175 | set_property LOC SLICE_X66Y8 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[16].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 176 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[16].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 177 | set_property LOC SLICE_X66Y8 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[16].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 178 | 179 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[17].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 180 | set_property LOC SLICE_X66Y7 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[17].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 181 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[17].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 182 | set_property LOC SLICE_X66Y7 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[17].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 183 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[17].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 184 | set_property LOC SLICE_X66Y7 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[17].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 185 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[17].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 186 | set_property LOC SLICE_X66Y7 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[17].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 187 | 188 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[18].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 189 | set_property LOC SLICE_X66Y6 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[18].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 190 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[18].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 191 | set_property LOC SLICE_X66Y6 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[18].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 192 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[18].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 193 | set_property LOC SLICE_X66Y6 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[18].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 194 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[18].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 195 | set_property LOC SLICE_X66Y6 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[18].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 196 | 197 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[19].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 198 | set_property LOC SLICE_X66Y5 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[19].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 199 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[19].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 200 | set_property LOC SLICE_X66Y5 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[19].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 201 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[19].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 202 | set_property LOC SLICE_X66Y5 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[19].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 203 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[19].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 204 | set_property LOC SLICE_X66Y5 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[19].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 205 | 206 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[20].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 207 | set_property LOC SLICE_X66Y4 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[20].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 208 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[20].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 209 | set_property LOC SLICE_X66Y4 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[20].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 210 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[20].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 211 | set_property LOC SLICE_X66Y4 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[20].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 212 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[20].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 213 | set_property LOC SLICE_X66Y4 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[20].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 214 | 215 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[21].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 216 | set_property LOC SLICE_X66Y3 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[21].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 217 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[21].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 218 | set_property LOC SLICE_X66Y3 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[21].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 219 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[21].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 220 | set_property LOC SLICE_X66Y3 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[21].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 221 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[21].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 222 | set_property LOC SLICE_X66Y3 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[21].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 223 | 224 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[22].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 225 | set_property LOC SLICE_X66Y2 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[22].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 226 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[22].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 227 | set_property LOC SLICE_X66Y2 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[22].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 228 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[22].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 229 | set_property LOC SLICE_X66Y2 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[22].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 230 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[22].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 231 | set_property LOC SLICE_X66Y2 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[22].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 232 | 233 | set_property BEL D6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[23].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 234 | set_property LOC SLICE_X66Y1 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[23].SWITCH_BLOCK/EQUAL_PATHS[0].EQUAL_PATH_MUX/Q_INST_0}] 235 | set_property BEL C6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[23].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 236 | set_property LOC SLICE_X66Y1 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[23].SWITCH_BLOCK/EQUAL_PATHS[1].EQUAL_PATH_MUX/Q_INST_0}] 237 | set_property BEL B6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[23].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 238 | set_property LOC SLICE_X66Y1 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[23].SWITCH_BLOCK/EQUAL_PATHS[2].EQUAL_PATH_MUX/Q_INST_0}] 239 | set_property BEL A6LUT [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[23].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 240 | set_property LOC SLICE_X66Y1 [get_cells {apuf_driver/APUF_TEST_UNIT/SWITCH_BLOCKS[23].SWITCH_BLOCK/EQUAL_PATHS[3].EQUAL_PATH_MUX/Q_INST_0}] 241 | 242 | 243 | set_property BEL D5FF [get_cells apuf_driver/APUF_TEST_UNIT/APUF_ARBITER/FF_2_1/Q_reg] 244 | set_property LOC SLICE_X69Y0 [get_cells apuf_driver/APUF_TEST_UNIT/APUF_ARBITER/FF_2_1/Q_reg] 245 | 246 | set_property BEL D5FF [get_cells apuf_driver/APUF_TEST_UNIT/APUF_ARBITER/FF_3_1/Q_reg] 247 | set_property LOC SLICE_X67Y0 [get_cells apuf_driver/APUF_TEST_UNIT/APUF_ARBITER/FF_3_1/Q_reg] 248 | set_property BEL DFF [get_cells apuf_driver/APUF_TEST_UNIT/APUF_ARBITER/FF_3_2/Q_reg] 249 | set_property LOC SLICE_X67Y0 [get_cells apuf_driver/APUF_TEST_UNIT/APUF_ARBITER/FF_3_2/Q_reg] 250 | set_property BEL D5FF [get_cells apuf_driver/APUF_TEST_UNIT/APUF_ARBITER/FF_4_1/Q_reg] 251 | set_property LOC SLICE_X66Y0 [get_cells apuf_driver/APUF_TEST_UNIT/APUF_ARBITER/FF_4_1/Q_reg] 252 | set_property BEL DFF [get_cells apuf_driver/APUF_TEST_UNIT/APUF_ARBITER/FF_4_2/Q_reg] 253 | set_property LOC SLICE_X66Y0 [get_cells apuf_driver/APUF_TEST_UNIT/APUF_ARBITER/FF_4_2/Q_reg] 254 | set_property BEL C5FF [get_cells apuf_driver/APUF_TEST_UNIT/APUF_ARBITER/FF_4_3/Q_reg] 255 | set_property LOC SLICE_X66Y0 [get_cells apuf_driver/APUF_TEST_UNIT/APUF_ARBITER/FF_4_3/Q_reg] 256 | 257 | 258 | --------------------------------------------------------------------------------