├── arm_chainloader ├── drivers │ ├── cprman.cc │ ├── uart.c │ ├── fatfs │ │ ├── option │ │ │ ├── unicode.c │ │ │ └── syscall.c │ │ ├── 00readme.txt │ │ ├── integer.h │ │ └── diskio.h │ ├── mailbox.hpp │ ├── block_device.hpp │ ├── mailbox.cc │ └── libfdt │ │ ├── fdt_empty_tree.c │ │ ├── fdt_addresses.c │ │ ├── fdt_strerror.c │ │ ├── libfdt_internal.h │ │ ├── fdt.h │ │ ├── libfdt_env.h │ │ └── fdt_wip.c ├── lib_armv6 │ ├── arm_locore.s │ ├── arm_strlen.s │ ├── string_misc.c │ ├── arm_memcmp.s │ └── arm_bzero.s ├── memory_map.h ├── linker.lds ├── chainloader.h ├── main.c ├── trap.cc ├── Makefile ├── start.s └── loader.cc ├── broadcom └── bcm2708_chip │ ├── flow_config.tcl │ ├── h264.h │ ├── isp.h │ ├── nexus_uba.h │ ├── dpi.h │ ├── apb_arbiter_control.h │ ├── perfmon.h │ ├── README.txt │ ├── rnghw.h │ ├── rng.h │ ├── cdp.h │ ├── tectl_a0.h │ ├── timer.h │ ├── cryptohw.h │ ├── tectl.h │ ├── ccp2tx_a0.h │ ├── otp.h │ ├── peri_image_arb_ctrl.h │ ├── i2c0.h │ ├── i2c1.h │ ├── i2c2.h │ ├── hdcp.h │ ├── cpg.h │ ├── jpeg_top.h │ ├── rng_a0.h │ ├── pixel_valve0.h │ ├── pixel_valve1.h │ ├── pixel_valve2.h │ ├── fpga_microblaze.h │ ├── cpi.h │ ├── sdc_dq_front.h │ ├── sdc_addr_front.h │ ├── vpu_arb_ctrl.h │ ├── tempsens.h │ └── clkman_image.h ├── vc4_include ├── hardware.h ├── cpu.h ├── vc4_types.h ├── pcb.h └── exception.h ├── lib ├── stdarg.h ├── tlsf │ ├── target.h │ └── tlsf.h ├── memcpy.c ├── panic.h ├── runtime.h ├── udelay.c ├── xprintf.h ├── panic.c └── cxx_runtime.cc ├── AUTHORS.md ├── drivers ├── BCM2708ClockDomains.hpp ├── BCM2708Gpio.cc ├── BCM2708Gpio.hpp ├── BCM2708PowerManagement.hpp ├── IODevice.hpp ├── IODevice.cc ├── BCM2708ClockDomains.cc └── BCM2708UsbPhy.cc ├── CONTRIBUTING.md ├── style.sh ├── linker.lds ├── tools └── wslstage.py ├── BCM2708PlatformStartup.cc ├── arm_monitor.c ├── Makefile ├── hardware.h ├── trap.c ├── README.md ├── start.s └── romstage.c /arm_chainloader/drivers/cprman.cc: -------------------------------------------------------------------------------- 1 | -------------------------------------------------------------------------------- /arm_chainloader/lib_armv6/arm_locore.s: -------------------------------------------------------------------------------- 1 | .text 2 | .align 2 3 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/flow_config.tcl: -------------------------------------------------------------------------------- 1 | enable_flow create_regs 2 | 3 | -------------------------------------------------------------------------------- /vc4_include/hardware.h: -------------------------------------------------------------------------------- 1 | /* glue */ 2 | #pragma once 3 | #include "../hardware.h" -------------------------------------------------------------------------------- /lib/stdarg.h: -------------------------------------------------------------------------------- 1 | 2 | 3 | #pragma once 4 | 5 | typedef __builtin_va_list va_list; 6 | 7 | #define va_start(v,l) __builtin_va_start(v,l) 8 | #define va_arg(v,l) __builtin_va_arg(v,l) 9 | #define va_end(v) __builtin_va_end(v) -------------------------------------------------------------------------------- /AUTHORS.md: -------------------------------------------------------------------------------- 1 | Authors of the `rpi-open-firmware` project are listed below, for purposes of determing copyright. Please keep sorted. 2 | 3 | --- 4 | 5 | * Alex Badea 6 | * Alyssa Rosenzweig 7 | * Kristina Brooks 8 | -------------------------------------------------------------------------------- /vc4_include/cpu.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include 4 | 5 | static inline void __attribute__((noreturn)) hang_cpu() { 6 | /* disable interrupts */ 7 | __asm__ __volatile__ ("di"); 8 | 9 | /* loop */ 10 | for (;;) { 11 | __asm__ __volatile__ ("nop"); 12 | } 13 | } -------------------------------------------------------------------------------- /arm_chainloader/drivers/uart.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | 4 | #define UART_DR (UART_BASE+0x00) 5 | #define UART_FR (UART_BASE+0x18) 6 | 7 | void uart_putc(unsigned int ch) 8 | { 9 | while(mmio_read32(UART_FR) & 0x20); 10 | mmio_write32(UART_DR, ch); 11 | } 12 | -------------------------------------------------------------------------------- /lib/tlsf/target.h: -------------------------------------------------------------------------------- 1 | #ifndef _TARGET_H_ 2 | #define _TARGET_H_ 3 | 4 | #include 5 | 6 | #define TLSF_MLOCK_T pthread_mutex_t 7 | #define TLSF_CREATE_LOCK(l) pthread_mutex_init (l, NULL) 8 | #define TLSF_DESTROY_LOCK(l) pthread_mutex_destroy(l) 9 | #define TLSF_ACQUIRE_LOCK(l) pthread_mutex_lock(l) 10 | #define TLSF_RELEASE_LOCK(l) pthread_mutex_unlock(l) 11 | 12 | #endif 13 | -------------------------------------------------------------------------------- /arm_chainloader/memory_map.h: -------------------------------------------------------------------------------- 1 | /* 2 | [ CODE ][ STACK ][ HEAP ] 3 | */ 4 | 5 | #pragma once 6 | 7 | #define MEM_CODE_END 0x20000 8 | 9 | #define MEM_STACK_SIZE 0x4000 10 | #define MEM_STACK_END (MEM_CODE_END + MEM_STACK_SIZE) 11 | 12 | #define MEM_HEAP_START MEM_STACK_END 13 | #define MEM_HEAP_SIZE 0x100000 14 | #define MEM_HEAP_END (MEM_HEAP_START + MEM_HEAP_SIZE) 15 | 16 | #define MEM_USABLE_START MEM_HEAP_END -------------------------------------------------------------------------------- /vc4_include/vc4_types.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include 4 | 5 | typedef unsigned long long u64; 6 | typedef unsigned int u32; 7 | typedef unsigned short u16; 8 | typedef unsigned char u8; 9 | 10 | #ifndef __cplusplus 11 | typedef int bool; 12 | #define true 1 13 | #define false 0 14 | #endif 15 | 16 | #define ALWAYS_INLINE __attribute__((always_inline)) inline 17 | 18 | #define _OPEN_SOURCE 19 | 20 | -------------------------------------------------------------------------------- /drivers/BCM2708ClockDomains.hpp: -------------------------------------------------------------------------------- 1 | /* 2 | * VideoCore4_Drivers 3 | * Copyright (c) 2017 Kristina Brooks 4 | * 5 | * PLL VCOs and their channels. 6 | */ 7 | 8 | #pragma once 9 | #include 10 | 11 | struct BCM2708VCO : IODevice { 12 | volatile uint32_t* dig; 13 | volatile uint32_t* ana; 14 | volatile uint32_t* ctrl; 15 | volatile uint32_t* cmPllCtrl; 16 | 17 | void setDigValues(); 18 | void dumpDigValues(); 19 | }; -------------------------------------------------------------------------------- /lib/memcpy.c: -------------------------------------------------------------------------------- 1 | 2 | 3 | void *__memcpy(void *_dst, const void *_src, unsigned len) 4 | { 5 | unsigned char *dst = _dst; 6 | const unsigned char *src = _src; 7 | while(len-- > 0) { 8 | *dst++ = *src++; 9 | } 10 | return _dst; 11 | } 12 | 13 | void * 14 | memset(void *s, int c, unsigned int n) 15 | { 16 | char *s1 = s; 17 | if (n>0) { 18 | n++; 19 | while (--n > 0) { 20 | *s1++ = c; 21 | } 22 | } 23 | return s; 24 | } -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/h264.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define H264_BASE 0x7f000000 3 | #define H264_APB_ID 0x68323634 4 | #define H264_RC HW_REGISTER_RW( 0x7f000000 ) 5 | #define H264_RC_MASK 0xffffffff 6 | #define H264_RC_WIDTH 32 7 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/isp.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define ISP_BASE 0x7ea00000 3 | #define ISP_APB_ID 0x20697370 4 | #define ISP_RC HW_REGISTER_RW( 0x7ea00000 ) 5 | #define ISP_RC_MASK 0xffffffff 6 | #define ISP_RC_WIDTH 32 7 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/nexus_uba.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define NU_BASE 0x7e008000 3 | #define NU_HOSTIO_OF HW_REGISTER_RW( 0x7e008000 ) 4 | #define NU_HOSTIO_OF_MASK 0xffffffff 5 | #define NU_HOSTIO_OF_WIDTH 32 6 | #define NU_HOSTIO_OF_RESET 0000000000 7 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/fatfs/option/unicode.c: -------------------------------------------------------------------------------- 1 | #include "../ff.h" 2 | 3 | #if _USE_LFN != 0 4 | 5 | #if _CODE_PAGE == 932 /* Japanese Shift_JIS */ 6 | #include "cc932.c" 7 | #elif _CODE_PAGE == 936 /* Simplified Chinese GBK */ 8 | #include "cc936.c" 9 | #elif _CODE_PAGE == 949 /* Korean */ 10 | #include "cc949.c" 11 | #elif _CODE_PAGE == 950 /* Traditional Chinese Big5 */ 12 | #include "cc950.c" 13 | #else /* Single Byte Character-Set */ 14 | #include "ccsbcs.c" 15 | #endif 16 | 17 | #endif 18 | -------------------------------------------------------------------------------- /CONTRIBUTING.md: -------------------------------------------------------------------------------- 1 | So you'd like to contribute to `rpi-open-firmware`? 2 | 3 | First things first, please come on IRC before starting anything. While not strictly a rule, this prevents duplicate work. When you are ready after that, we accept pull requests over Github, or if you prefer you can email a patch or link to one over IRC. 4 | 5 | A few notes on style: 6 | 7 | * Contributors should use hard tabs. 8 | * C++ is the preferred language for high-level code. 9 | * Generally follow conventions of similar code in the project. 10 | -------------------------------------------------------------------------------- /drivers/BCM2708Gpio.cc: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | void BCM2708Gpio::setFunction(uint32_t pin_num, BCM2708PinmuxSetting function) { 4 | uint32_t* fsel = reinterpret_cast( 5 | reinterpret_cast(&GP_FSEL0) + (0x4 * (pin_num/10)) 6 | ); 7 | uint32_t pin_shift = (pin_num % 10) * 3; 8 | 9 | *fsel = (*fsel & (0x7 << pin_shift)) | function; 10 | } 11 | 12 | void BCM2708Gpio::init() { 13 | setTag('GPIO'); 14 | } 15 | 16 | IODriverCreateSingletonInstance(BCM2708Gpio); -------------------------------------------------------------------------------- /style.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | 3 | # runs astyle on our code to conform to project standards 4 | # contributors should run this prior to PRs 5 | 6 | # a handful of subprojects (BCM headers, libfdt, etc.) are included in-tree 7 | # to avoid create merge conflicts when pulling upstream, only style our code 8 | FILES="*.c *.cc *.h arm_chainloader/*.c arm_chainloader/*.cc arm_chainloader/*.h arm_chainloader/drivers/*.cc arm_chainloader/drivers/*.hpp" 9 | 10 | # run astyle with tabs and attached braces 11 | astyle --style=attach --indent=tab $FILES 12 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/dpi.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define DPI_BASE 0x7e208000 3 | #define DPI_APB_ID 0x44504920 4 | #define DPI_C HW_REGISTER_RW( 0x7e208000 ) 5 | #define DPI_C_MASK 0x0000ffff 6 | #define DPI_C_WIDTH 16 7 | #define DPI_C_RESET 0x00003000 8 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/apb_arbiter_control.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define ACR_BASE 0x7e80a000 3 | #define ACR_APB_ID 0x61726272 4 | #define ACR_control HW_REGISTER_RW( 0x7e80a000 ) 5 | #define ACR_control_MASK 0x0000ffff 6 | #define ACR_control_WIDTH 16 7 | #define ACR_control_RESET 0000000000 8 | -------------------------------------------------------------------------------- /lib/panic.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #ifdef __cplusplus 4 | extern "C" { 5 | #endif 6 | 7 | extern void panic(const char* fmt, ...) 8 | __attribute__((noreturn)) 9 | __attribute__ ((format (printf, 1, 2))); 10 | 11 | #define panic_plain(ex, ...) \ 12 | (panic)(ex, ## __VA_ARGS__) 13 | #define __STRINGIFY(x) #x 14 | #define LINE_NUMBER(x) __STRINGIFY(x) 15 | #define PANIC_LOCATION __FILE__ ":" LINE_NUMBER(__LINE__) 16 | #define panic(ex, ...) \ 17 | (panic)(# ex "@" PANIC_LOCATION, ## __VA_ARGS__) 18 | 19 | #define assert(x) if (!(x)) { panic("assertion '%s' failed", #x); } 20 | 21 | #ifdef __cplusplus 22 | } 23 | #endif -------------------------------------------------------------------------------- /drivers/BCM2708Gpio.hpp: -------------------------------------------------------------------------------- 1 | /* 2 | * VideoCore4_Drivers 3 | * Copyright (c) 2017 Authors of rpi-open-firmware 4 | * 5 | * USB PHY initialization driver. 6 | */ 7 | 8 | #include 9 | 10 | enum BCM2708PinmuxSetting { 11 | kBCM2708PinmuxIn = 0, 12 | kBCM2708PinmuxOut = 1, 13 | kBCM2708Pinmux_ALT5 = 2, 14 | kBCM2708Pinmux_ALT4 = 3, 15 | kBCM2708Pinmux_ALT0 = 4, 16 | kBCM2708Pinmux_ALT1 = 5, 17 | kBCM2708Pinmux_ALT2 = 6, 18 | kBCM2708Pinmux_ALT3 = 7 19 | }; 20 | 21 | struct BCM2708Gpio : IODevice { 22 | IODriverConstructor(BCM2708Gpio); 23 | 24 | void setFunction(uint32_t pin, BCM2708PinmuxSetting function); 25 | virtual void init(); 26 | }; -------------------------------------------------------------------------------- /linker.lds: -------------------------------------------------------------------------------- 1 | SECTIONS 2 | { 3 | . = 0x0; 4 | 5 | _text = .; 6 | 7 | .text : { 8 | *(.text) 9 | *(.text.*) 10 | *(.gnu.warning) 11 | } 12 | 13 | _etext = .; 14 | 15 | .rodata : { *(.rodata) *(.rodata.*) } 16 | . = ALIGN(4096); 17 | _erodata = .; 18 | 19 | . = ALIGN(32 / 8); 20 | 21 | PROVIDE (__init_array_start = .); 22 | .init_array : { 23 | *(.init_array) 24 | *(.init_array.*) 25 | *(.ctors) 26 | *(.ctors.*) 27 | } 28 | PROVIDE (__init_array_end = .); 29 | 30 | .data : { /* Data */ 31 | *(.data) 32 | } 33 | 34 | .bss : { 35 | _edata = .; 36 | __bss_start = .; 37 | *(.bss) 38 | } 39 | 40 | . = ALIGN(32 / 8); 41 | _end = . ; 42 | } -------------------------------------------------------------------------------- /arm_chainloader/linker.lds: -------------------------------------------------------------------------------- 1 | SECTIONS 2 | { 3 | . = 0x0; 4 | 5 | _text = .; 6 | 7 | .text : { 8 | *(.text) 9 | *(.text.*) 10 | *(.gnu.warning) 11 | } 12 | 13 | _etext = .; 14 | 15 | .rodata : { *(.rodata) *(.rodata.*) } 16 | . = ALIGN(4096); 17 | _erodata = .; 18 | 19 | . = ALIGN(32 / 8); 20 | 21 | PROVIDE (__init_array_start = .); 22 | .init_array : { 23 | *(.init_array) 24 | *(.init_array.*) 25 | } 26 | PROVIDE (__init_array_end = .); 27 | 28 | .data : { /* Data */ 29 | *(.data) 30 | } 31 | 32 | .bss : { 33 | _edata = .; 34 | __bss_start = .; 35 | *(.bss) 36 | } 37 | 38 | . = ALIGN(32 / 8); 39 | _end = . ; 40 | } -------------------------------------------------------------------------------- /drivers/BCM2708PowerManagement.hpp: -------------------------------------------------------------------------------- 1 | /* 2 | * VideoCore4_Drivers 3 | * Copyright (c) 2017 Kristina Brooks 4 | * 5 | * BCM2708 power management driver. 6 | */ 7 | 8 | #pragma once 9 | #include 10 | 11 | enum cpr_power_result_t { 12 | kCprSuccess = 0, 13 | kCprPowOkTimeout, 14 | kCprMrDoneTimeout, 15 | kCprOscCountTimeout 16 | }; 17 | 18 | enum cpr_power_domain_t { 19 | kCprPowerDomainImage = 0, 20 | kCprPowerDomainARM, 21 | kCprPowerDomainUSB, 22 | kCprPowerDomainVPU1, 23 | 24 | kCprPowerDomain_MAX 25 | }; 26 | 27 | struct PowerManagementDomain : IODevice { 28 | static PowerManagementDomain* getDeviceForDomain(cpr_power_domain_t domain); 29 | virtual void setReset() = 0; 30 | }; -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/perfmon.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define PRM_BASE 0x7e20d000 3 | #define PRM_CS HW_REGISTER_RW( 0x7e20d000 ) 4 | #define PRM_CS_MASK 0xffffffff 5 | #define PRM_CS_WIDTH 32 6 | #define PRM_CV HW_REGISTER_RW( 0x7e20d004 ) 7 | #define PRM_CV_MASK 0xffffffff 8 | #define PRM_CV_WIDTH 32 9 | #define PRM_SCC HW_REGISTER_RW( 0x7e20d008 ) 10 | #define PRM_SCC_MASK 0xffffffff 11 | #define PRM_SCC_WIDTH 32 12 | -------------------------------------------------------------------------------- /tools/wslstage.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | # Copyright (c) 2017 Kristina Brooks 3 | 4 | # !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! 5 | # ! DO NOT CHANGE OR REMOVE THIS FILE ! 6 | # !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! 7 | 8 | import subprocess 9 | import os 10 | from StringIO import StringIO 11 | 12 | disk_name = 'F' 13 | disk_ready = False 14 | wmic_output = os.popen('wcmd wmic logicaldisk get caption, filesystem') 15 | 16 | for line in wmic_output: 17 | if '%s:' % disk_name in line and 'FAT' in line: 18 | disk_ready = True 19 | 20 | if disk_ready: 21 | print('Windows disk %s:\\ is ready!' % disk_name) 22 | print('Copying bootcode.bin to %s:\\ ...\n' % disk_name) 23 | 24 | os.system('''wcmd xcopy /s /y "C:\\Users\\k\\VC4_Firmware\\rpi-open-firmware\\build\\bootcode.bin" "''' + disk_name + ''':\\bootcode.bin"''') 25 | else: 26 | print('Windows disk %s:\\ is not ready!' % disk_name) 27 | 28 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/fatfs/00readme.txt: -------------------------------------------------------------------------------- 1 | FatFs Module Source Files R0.12 2 | 3 | 4 | FILES 5 | 6 | 00readme.txt This file. 7 | history.txt Revision history. 8 | ffconf.h Configuration file for FatFs module. 9 | ff.h Common include file for FatFs and application module. 10 | ff.c FatFs module. 11 | diskio.h Common include file for FatFs and disk I/O module. 12 | diskio.c An example of glue function to attach existing disk I/O module to FatFs. 13 | integer.h Integer type definitions for FatFs. 14 | option Optional external functions. 15 | 16 | 17 | Low level disk I/O module is not included in this archive because the FatFs 18 | module is only a generic file system layer and not depend on any specific 19 | storage device. You have to provide a low level disk I/O module that written 20 | to control the target storage device. 21 | 22 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/fatfs/integer.h: -------------------------------------------------------------------------------- 1 | /*-------------------------------------------*/ 2 | /* Integer type definitions for FatFs module */ 3 | /*-------------------------------------------*/ 4 | 5 | #ifndef _FF_INTEGER 6 | #define _FF_INTEGER 7 | 8 | #ifdef _WIN32 /* FatFs development platform */ 9 | 10 | #include 11 | #include 12 | typedef unsigned __int64 QWORD; 13 | 14 | 15 | #else /* Embedded platform */ 16 | 17 | /* These types MUST be 16-bit or 32-bit */ 18 | typedef int INT; 19 | typedef unsigned int UINT; 20 | 21 | /* This type MUST be 8-bit */ 22 | typedef unsigned char BYTE; 23 | 24 | /* These types MUST be 16-bit */ 25 | typedef short SHORT; 26 | typedef unsigned short WORD; 27 | typedef unsigned short WCHAR; 28 | 29 | /* These types MUST be 32-bit */ 30 | typedef long LONG; 31 | typedef unsigned long DWORD; 32 | 33 | /* This type MUST be 64-bit (Remove this for C89 compatibility) */ 34 | typedef unsigned long long QWORD; 35 | 36 | #endif 37 | 38 | #endif 39 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/mailbox.hpp: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | Mailbox driver. 17 | 18 | =============================================================================*/ 19 | 20 | #pragma once 21 | 22 | #include 23 | 24 | struct Bcm2708Mailbox { 25 | Bcm2708Mailbox(); 26 | bool write_word(uint32_t data, int timeout = 10000); 27 | }; 28 | 29 | extern Bcm2708Mailbox g_Mailbox; -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/README.txt: -------------------------------------------------------------------------------- 1 | This dir contains all the register map files for the design 2 | The bulk of it is created with the create_regs script (run create_regs) which 3 | parses the *_regs files in the hdl dirs and creates the individual files 4 | 5 | The top level file is chip/hdl/bcm2708_regs.tcl which defines the contents 6 | and off sets of the chip level memory map. 7 | 8 | Create regs then searches the dir tree for each object mentioned in bcm2708_regs.tcl 9 | and locates its "object_regs.tcl" file 10 | 11 | It then generates all the .h .inc ... files. 12 | 13 | These are then all lumped together in a register_map.h register_map.inc etc file 14 | 15 | 16 | 17 | The general procedure to modify this is 18 | 19 | 20 | 21 | check out all of chip/verification/code/vcinclude 22 | run create_regs in this dir 23 | revert all unchanged files in vcinclude 24 | check the modified ones and checkl them in if they are ok. 25 | 26 | 27 | Note: 28 | If create regs cant find a _regs.tcl file it will crash 29 | If it finds two files with the same name it will crash 30 | -------------------------------------------------------------------------------- /lib/runtime.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include 4 | #include 5 | #include 6 | 7 | #include 8 | #include 9 | 10 | #ifdef __arm__ 11 | #define HAS_DYNAMIC_ALLOCATIONS 12 | #endif 13 | 14 | #ifdef HAS_DYNAMIC_ALLOCATIONS 15 | #include 16 | #endif 17 | 18 | #ifdef __VIDEOCORE4__ 19 | #include 20 | #endif 21 | 22 | #ifdef __cplusplus 23 | extern "C" { 24 | #endif 25 | 26 | #define RegToRef(x) reinterpret_cast(&x) 27 | 28 | extern void udelay(uint32_t time); 29 | extern void __cxx_init(); 30 | 31 | #ifdef __VIDEOCORE4__ 32 | extern void *__memcpy(void *_dst, const void *_src, unsigned len); 33 | #define memcpy(d,s,l) __memcpy(d,s,l) 34 | #endif 35 | 36 | #define bcopy(s,d,l) memcpy(d,s,l) 37 | 38 | #ifndef HAS_DYNAMIC_ALLOCATIONS 39 | static inline void* malloc(size_t size) { panic("malloc: dynamic allocations not supported on this configuration"); } 40 | static inline void free(void* obj) { panic("free: dynamic allocations not supported on this configuration"); } 41 | #endif 42 | 43 | #ifdef __cplusplus 44 | } 45 | #endif 46 | -------------------------------------------------------------------------------- /lib/udelay.c: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | Simple timer based delay routine. 17 | 18 | =============================================================================*/ 19 | 20 | #include 21 | #include 22 | 23 | void udelay(uint32_t t) { 24 | uint32_t tv = ST_CLO; 25 | for (;;) { 26 | /* nop still takes a cycle i think? */ 27 | __asm__ __volatile__ ("nop" :::); 28 | if ((ST_CLO - tv) > t) 29 | return; 30 | } 31 | } -------------------------------------------------------------------------------- /lib/xprintf.h: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------*/ 2 | /* Universal string handler for user console interface (C)ChaN, 2011 */ 3 | /*------------------------------------------------------------------------*/ 4 | 5 | #ifdef __arm__ 6 | #include 7 | #else 8 | #include "stdarg.h" 9 | #endif 10 | 11 | 12 | #ifndef _STRFUNC 13 | #define _STRFUNC 14 | 15 | #define _USE_XFUNC_OUT 1 /* 1: Use output functions */ 16 | #define _CR_CRLF 1 /* 1: Convert \n ==> \r\n in the output char */ 17 | 18 | #ifdef __cplusplus 19 | extern "C" { 20 | #endif 21 | 22 | int putchar (int c); 23 | int puts (const char* str); 24 | int printf (const char* fmt, ...) __attribute__ ((format (printf, 1, 2))); 25 | void put_dump (const void* buff, unsigned long addr, int len, int width); 26 | 27 | 28 | int vprintf ( 29 | const char* fmt, /* Pointer to the format string */ 30 | va_list arp /* Pointer to arguments */ 31 | ); 32 | 33 | #define DW_CHAR sizeof(char) 34 | #define DW_SHORT sizeof(short) 35 | #define DW_LONG sizeof(long) 36 | 37 | #ifdef __cplusplus 38 | } 39 | #endif 40 | 41 | #endif 42 | -------------------------------------------------------------------------------- /BCM2708PlatformStartup.cc: -------------------------------------------------------------------------------- 1 | /* 2 | * VideoCore4_Drivers 3 | * Copyright (c) 2017 Kristina Brooks 4 | * 5 | * BCM2708 power management driver. 6 | */ 7 | 8 | #include 9 | #include 10 | 11 | static IODevice* startDeviceByTag(uint32_t tag) { 12 | IODevice* dev = IODevice::findByTag(tag); 13 | 14 | if (!dev) { 15 | panic("unable to find device with tag 0x%X in the registry", tag); 16 | } 17 | 18 | dev->start(); 19 | return dev; 20 | } 21 | 22 | extern "C" void PEStartPlatform() { 23 | IODevice* imagePm = PowerManagementDomain::getDeviceForDomain(kCprPowerDomainImage); 24 | assert(imagePm); 25 | IODevice* usbPm = PowerManagementDomain::getDeviceForDomain(kCprPowerDomainUSB); 26 | assert(usbPm); 27 | 28 | /* 29 | * All devices in the IMAGE domain have to be disabled before 30 | * starting the domain itself. 31 | */ 32 | usbPm->stop(); 33 | /* Bring up IMAGE power domain */ 34 | imagePm->start(); 35 | /* Now we can re-enable USB power domain */ 36 | usbPm->start(); 37 | 38 | /* Start USB PHY */ 39 | startDeviceByTag('USBP'); 40 | 41 | /* Start ARM */ 42 | startDeviceByTag('ARMC'); 43 | } 44 | -------------------------------------------------------------------------------- /drivers/IODevice.hpp: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include 4 | #include 5 | 6 | enum IODeviceState { 7 | kIODeviceUninitialized, 8 | kIODeviceStarted, 9 | kIODeviceStopped 10 | }; 11 | 12 | struct IODevice { 13 | const char* driverName; 14 | IODeviceState deviceState; 15 | uint32_t tag; 16 | 17 | IODevice(); 18 | 19 | void driverLog(const char* fnName, const char* fmt, ...); 20 | void registerDriver(); 21 | 22 | void inline setName(const char* name) { 23 | driverName = name; 24 | } 25 | 26 | void inline setTag(uint32_t tag) { 27 | this->tag = tag; 28 | } 29 | 30 | virtual void start(); 31 | virtual void stop(); 32 | virtual void init(); 33 | 34 | void _afterInit(); 35 | void _beforeInit(); 36 | 37 | virtual inline IODeviceState getDeviceState() { 38 | return deviceState; 39 | } 40 | 41 | static IODevice* findByTag(uint32_t tag); 42 | }; 43 | 44 | #define IODriverLog(fmt, ...) driverLog(__FUNCTION__, fmt, ##__VA_ARGS__) 45 | #define IODriverCreateSingletonInstance(clazz) static clazz __IODriver_static_ ## clazz {} 46 | #define IODriverConstructor(clazz) inline clazz() { _beforeInit(); driverName = #clazz; init(); _afterInit(); } -------------------------------------------------------------------------------- /lib/panic.c: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | Panic routine. 17 | 18 | =============================================================================*/ 19 | 20 | #include 21 | 22 | #if defined(__VIDEOCORE4__) 23 | #include 24 | #else 25 | #include 26 | #endif 27 | 28 | #undef panic 29 | 30 | void panic(const char* fmt, ...) { 31 | printf("panic(): "); 32 | 33 | va_list arp; 34 | 35 | va_start(arp, fmt); 36 | vprintf(fmt, arp); 37 | va_end(arp); 38 | 39 | putchar('\n'); 40 | 41 | hang_cpu(); 42 | } -------------------------------------------------------------------------------- /drivers/IODevice.cc: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | static IODevice* g_DeviceRegistry[32] = { 0 }; 4 | static unsigned int g_NewDriverIndex = 0; 5 | 6 | IODevice::IODevice() { 7 | 8 | } 9 | 10 | void IODevice::_beforeInit() { 11 | tag = 0; 12 | deviceState = kIODeviceUninitialized; 13 | } 14 | 15 | void IODevice::_afterInit() { 16 | assert(driverName); 17 | if (tag) 18 | registerDriver(); 19 | } 20 | 21 | void IODevice::registerDriver() { 22 | g_DeviceRegistry[g_NewDriverIndex++] = this; 23 | IODriverLog("driver registered on platform IO plane"); 24 | } 25 | 26 | void IODevice::driverLog(const char* fnName, const char* fmt, ...) 27 | { 28 | va_list va; 29 | 30 | printf("%s::%s(): ", driverName, fnName); 31 | va_start(va, fmt); 32 | vprintf(fmt, va); 33 | va_end(va); 34 | printf("\n"); 35 | } 36 | 37 | IODevice* IODevice::findByTag(uint32_t tag) { 38 | for (int i = 0; i < (sizeof(g_DeviceRegistry) / sizeof(void*)); i++) { 39 | IODevice* dev = g_DeviceRegistry[i]; 40 | if (dev && dev->tag == tag) { 41 | return dev; 42 | } 43 | } 44 | 45 | return nullptr; 46 | } 47 | 48 | void IODevice::start() { 49 | deviceState = kIODeviceStarted; 50 | } 51 | 52 | void IODevice::stop() { 53 | deviceState = kIODeviceStopped; 54 | } 55 | 56 | void IODevice::init() { 57 | panic("IODevice objects have to override init()"); 58 | } 59 | 60 | 61 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/block_device.hpp: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | Block device. 17 | 18 | =============================================================================*/ 19 | 20 | struct BlockDevice { 21 | unsigned int block_size; 22 | 23 | template 24 | inline bool read_block(uint32_t sector, T* dest_buffer) { 25 | read_block(sector, reinterpret_cast(dest_buffer)); 26 | } 27 | 28 | inline unsigned int get_block_size() { 29 | return block_size; 30 | } 31 | 32 | virtual bool read_block(uint32_t sector, uint32_t* buf) = 0; 33 | 34 | /* called to stop the block device */ 35 | virtual void stop() {} 36 | }; 37 | 38 | extern BlockDevice* get_sdhost_device(); -------------------------------------------------------------------------------- /arm_monitor.c: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | First stage monitor. 17 | 18 | =============================================================================*/ 19 | 20 | #include 21 | #include "hardware.h" 22 | 23 | /* 24 | * called from sleh_irq (trap.c) 25 | */ 26 | void arm_monitor_interrupt() { 27 | printf("VPU MBOX rcv: 0x%X, cnf 0x%X\n", 28 | ARM_1_MAIL1_RD, 29 | ARM_1_MAIL1_CNF); 30 | } 31 | 32 | void monitor_start() { 33 | printf("Starting IPC monitor ...\n"); 34 | 35 | /* enable IRQ */ 36 | ARM_1_MAIL1_CNF = ARM_MC_IHAVEDATAIRQEN; 37 | 38 | for(;;) { 39 | __asm__ __volatile__ ("sleep" :::); 40 | printf("sleep interrupted!\n"); 41 | } 42 | } 43 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/rnghw.h: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (c) 2007 Broadcom Europe Limited. All rights reserved. 3 | 4 | Project : BCM2707 5 | Module : RNG hardware header 6 | File : $RCSfile: rnghw.h,v $ 7 | Revision : $Revision: 1.2 $ 8 | 9 | FILE DESCRIPTION 10 | Definition of bits within RNG hardware registers. 11 | =============================================================================*/ 12 | 13 | 14 | 15 | #ifndef RNGHW_H 16 | #define RNGHW_H 17 | 18 | #define RNG_READFIELD(_w,_f) (((unsigned long)(_w) / _f) & (_f##_MASK)) 19 | 20 | enum 21 | { 22 | RNG_CTRL_RBG_2X = (1 << 1), 23 | RNG_CTRL_RBG_EN = (1 << 0), 24 | 25 | RNG_STATUS_WARM_CNT = (1 << 0), 26 | RNG_STATUS_WARM_CNT_MASK = 0xfffff, 27 | RNG_STATUS_VAL = (1 << 24), 28 | RNG_STATUS_VAL_MASK = 0xff, 29 | 30 | RNG_FF_THRESHOLD_MAX = 0x04, 31 | 32 | // BCM2707_B0: 33 | // RNG interrupt no longer uses Crypto local interrupt register 34 | // It is connected to interrupt bit 52 : ISRC1_0 bit 52-32=20 (0x0100000) 35 | // Mask has 6 IRQ/reg => floor(52/8)=6 Bits = 16:19 36 | 37 | RNG_INT_MASK_ENABLE = (1 << 16), 38 | RNG_INT_MASK_DISABLE = (0 << 16), 39 | 40 | RNG_SIMCTRL_DEBUG = (1 << 0), 41 | RNG_SIMCTRL_SECURE = (1 << 1) 42 | }; 43 | 44 | #endif 45 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/rng.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define RNG_BASE 0x7e104000 3 | #define RNG_APB_ID 0x20726e67 4 | #define RNG_CTRL HW_REGISTER_RW( 0x7e104000 ) 5 | #define RNG_CTRL_MASK 0xffffffff 6 | #define RNG_CTRL_WIDTH 32 7 | #define RNG_STATUS HW_REGISTER_RW( 0x7e104004 ) 8 | #define RNG_STATUS_MASK 0xffffffff 9 | #define RNG_STATUS_WIDTH 32 10 | #define RNG_DATA HW_REGISTER_RW( 0x7e104008 ) 11 | #define RNG_DATA_MASK 0xffffffff 12 | #define RNG_DATA_WIDTH 32 13 | #define RNG_FF_THRESHOLD HW_REGISTER_RW( 0x7e10400c ) 14 | #define RNG_FF_THRESHOLD_MASK 0xffffffff 15 | #define RNG_FF_THRESHOLD_WIDTH 32 16 | #define RNG_INT_MASK HW_REGISTER_RW( 0x7e104010 ) 17 | #define RNG_INT_MASK_MASK 0xffffffff 18 | #define RNG_INT_MASK_WIDTH 32 19 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/cdp.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define CD_BASE 0x1820b000 3 | #define CD_APB_ID 0x43445000 4 | #define CD_CS HW_REGISTER_RW( 0x1820b000 ) 5 | #define CD_CS__MASK 0xffffffff 6 | #define CD_CS__WIDTH 32 7 | #define CD_CS__RESET 0000000000 8 | #define CD_CS__MSB 31 9 | #define CD_CS__LSB 0 10 | #define CD_PHYADJ HW_REGISTER_RW( 0x1820b004 ) 11 | #define CD_PHYADJ__MASK 0x0000ffff 12 | #define CD_PHYADJ__WIDTH 16 13 | #define CD_PHYADJ__MSB 15 14 | #define CD_PHYADJ__LSB 0 15 | #define CD_PHYDAT HW_REGISTER_RO( 0x1820b008 ) 16 | #define CD_PHYDAT__MASK 0xffffffff 17 | #define CD_PHYDAT__WIDTH 32 18 | #define CD_PHYDAT__MSB 31 19 | #define CD_PHYDAT__LSB 0 20 | -------------------------------------------------------------------------------- /vc4_include/pcb.h: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | Process control block. 17 | 18 | =============================================================================*/ 19 | 20 | #pragma once 21 | 22 | #include 23 | 24 | typedef struct { 25 | uint32_t r23; 26 | uint32_t r22; 27 | uint32_t r21; 28 | uint32_t r20; 29 | uint32_t r19; 30 | uint32_t r18; 31 | uint32_t r17; 32 | uint32_t r16; 33 | uint32_t r15; 34 | uint32_t r14; 35 | uint32_t r13; 36 | uint32_t r12; 37 | uint32_t r11; 38 | uint32_t r10; 39 | uint32_t r9; 40 | uint32_t r8; 41 | uint32_t r7; 42 | uint32_t r6; 43 | 44 | uint32_t r5; 45 | uint32_t r4; 46 | uint32_t r3; 47 | uint32_t r2; 48 | uint32_t r1; 49 | uint32_t r0; 50 | 51 | uint32_t lr; 52 | 53 | uint32_t sr; 54 | uint32_t pc; 55 | } vc4_saved_state_t; -------------------------------------------------------------------------------- /arm_chainloader/chainloader.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include 4 | #include 5 | #include 6 | #include 7 | 8 | #ifdef __cplusplus 9 | extern "C" { 10 | #endif 11 | 12 | static inline void __attribute__((noreturn)) hang_cpu() { 13 | __asm__ __volatile__ ( 14 | "wfi\n" 15 | ); 16 | 17 | /* in case the above fails */ 18 | for (;;) { 19 | __asm__ __volatile__ ("nop\nnop\nnop\nnop\nnop\nnop"); 20 | } 21 | } 22 | 23 | #define STATIC_INIT_PRIORITY(x) __attribute__((init_priority(x))) 24 | 25 | #define STATIC_CPRMAN_DRIVER STATIC_INIT_PRIORITY(101) 26 | #define STATIC_DRIVER STATIC_INIT_PRIORITY(200) 27 | #define STATIC_FILESYSTEM STATIC_INIT_PRIORITY(300) 28 | #define STATIC_APP STATIC_INIT_PRIORITY(600) 29 | 30 | #define mfence() __sync_synchronize() 31 | 32 | #define NBBY 8 33 | 34 | #define __BIT(__n) \ 35 | (((uintmax_t)(__n) >= NBBY * sizeof(uintmax_t)) ? 0 : \ 36 | ((uintmax_t)1 << (uintmax_t)((__n) & (NBBY * sizeof(uintmax_t) - 1)))) 37 | 38 | static inline uint32_t arm_get_cpsr() { 39 | uint32_t r; 40 | __asm__ volatile("mrs %0, cpsr\n" : "=r" (r) :: "memory"); 41 | return r; 42 | } 43 | 44 | #define ARM32_MODE_MASK 0x1f 45 | #define ARM32_USR 0x10 46 | #define ARM32_FIQ 0x11 47 | #define ARM32_IRQ 0x12 48 | #define ARM32_SVC 0x13 49 | #define ARM32_MON 0x16 50 | #define ARM32_ABT 0x17 51 | #define ARM32_HYP 0x1a 52 | #define ARM32_UND 0x1b 53 | #define ARM32_SYS 0x1f 54 | 55 | #ifdef __cplusplus 56 | } 57 | #endif 58 | 59 | -------------------------------------------------------------------------------- /lib/tlsf/tlsf.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Two Levels Segregate Fit memory allocator (TLSF) 3 | * Version 2.4.6 4 | * 5 | * Written by Miguel Masmano Tello 6 | * 7 | * Thanks to Ismael Ripoll for his suggestions and reviews 8 | * 9 | * Copyright (C) 2008, 2007, 2006, 2005, 2004 10 | * 11 | * This code is released using a dual license strategy: GPL/LGPL 12 | * You can choose the licence that better fits your requirements. 13 | * 14 | * Released under the terms of the GNU General Public License Version 2.0 15 | * Released under the terms of the GNU Lesser General Public License Version 2.1 16 | * 17 | */ 18 | 19 | #ifndef _TLSF_H_ 20 | #define _TLSF_H_ 21 | 22 | #include 23 | 24 | #define tlsf_malloc malloc 25 | #define tlsf_free free 26 | #define tlsf_realloc realloc 27 | #define tlsf_calloc calloc 28 | 29 | #ifdef __cplusplus 30 | extern "C" { 31 | #endif 32 | 33 | extern size_t init_memory_pool(size_t, void *); 34 | extern size_t get_used_size(void *); 35 | extern size_t get_max_size(void *); 36 | extern void destroy_memory_pool(void *); 37 | extern size_t add_new_area(void *, size_t, void *); 38 | extern void *malloc_ex(size_t, void *); 39 | extern void free_ex(void *, void *); 40 | extern void *realloc_ex(void *, size_t, void *); 41 | extern void *calloc_ex(size_t, size_t, void *); 42 | 43 | extern void *tlsf_malloc(size_t size); 44 | extern void tlsf_free(void *ptr); 45 | extern void *tlsf_realloc(void *ptr, size_t size); 46 | extern void *tlsf_calloc(size_t nelem, size_t elem_size); 47 | 48 | #ifdef __cplusplus 49 | } 50 | #endif 51 | 52 | #endif 53 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/mailbox.cc: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | Mailbox driver. 17 | 18 | =============================================================================*/ 19 | 20 | #include "mailbox.hpp" 21 | #include 22 | 23 | #define logf(fmt, ...) printf("[MBOX:%s]: " fmt, __FUNCTION__, ##__VA_ARGS__); 24 | 25 | template 26 | static bool wait_for_mask(T& reg, uint32_t mask, bool is_set, int timeout) { 27 | while ((reg & mask) == (is_set ? 0 : mask)) { 28 | if (timeout == 0) 29 | return false; 30 | timeout--; 31 | udelay(1); 32 | } 33 | 34 | return true; 35 | } 36 | 37 | Bcm2708Mailbox::Bcm2708Mailbox() { 38 | 39 | } 40 | 41 | bool Bcm2708Mailbox::write_word(uint32_t data, int timeout) { 42 | if (!wait_for_mask(ARM_0_MAIL1_STA, ARM_MS_FULL, false, timeout)) { 43 | logf("mailbox write timed out after %dus (STA=0x%X)\n", timeout, ARM_0_MAIL1_STA); 44 | return false; 45 | } 46 | 47 | ARM_0_MAIL1_WRT = data; 48 | return true; 49 | } 50 | 51 | Bcm2708Mailbox STATIC_DRIVER g_Mailbox {}; -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/tectl_a0.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define TE_BASE 0x7e20e000 3 | #define TE_APB_ID 0x00746563 4 | #define TE_0C HW_REGISTER_RW( 0x7e20e000 ) 5 | #define TE_0C_MASK 0xffffffff 6 | #define TE_0C_WIDTH 32 7 | #define TE_0VSWIDTH HW_REGISTER_RW( 0x7e20e004 ) 8 | #define TE_0VSWIDTH_MASK 0xffffffff 9 | #define TE_0VSWIDTH_WIDTH 32 10 | #define TE_1C HW_REGISTER_RW( 0x7e20e008 ) 11 | #define TE_1C_MASK 0xffffffff 12 | #define TE_1C_WIDTH 32 13 | #define TE_1VSWIDTH HW_REGISTER_RW( 0x7e20e00c ) 14 | #define TE_1VSWIDTH_MASK 0xffffffff 15 | #define TE_1VSWIDTH_WIDTH 32 16 | #define TE_2C HW_REGISTER_RW( 0x7e20e010 ) 17 | #define TE_2C_MASK 0xffffffff 18 | #define TE_2C_WIDTH 32 19 | #define TE_2VSWIDTH HW_REGISTER_RW( 0x7e20e014 ) 20 | #define TE_2VSWIDTH_MASK 0xffffffff 21 | #define TE_2VSWIDTH_WIDTH 32 22 | -------------------------------------------------------------------------------- /arm_chainloader/main.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | 6 | extern uintptr_t* _end; 7 | 8 | #define logf(fmt, ...) printf("[BRINGUP:%s]: " fmt, __FUNCTION__, ##__VA_ARGS__); 9 | 10 | static void heap_init() { 11 | void* start_of_heap = (void*)MEM_HEAP_START; 12 | size_t hs = MEM_HEAP_SIZE; 13 | 14 | logf("Initializing heap at 0x%x with size 0x%x\n", start_of_heap, hs); 15 | 16 | init_memory_pool(hs, start_of_heap); 17 | } 18 | 19 | static const char* get_execution_mode_name() { 20 | uint32_t cpsr = arm_get_cpsr() & ARM32_MODE_MASK; 21 | 22 | switch (cpsr) { 23 | case ARM32_USR: 24 | return "User"; 25 | case ARM32_FIQ: 26 | return "FIQ"; 27 | case ARM32_IRQ: 28 | return "IRQ"; 29 | case ARM32_SVC: 30 | return "Supervisor"; 31 | case ARM32_MON: 32 | return "Secure Monitor"; 33 | case ARM32_ABT: 34 | return "Abort"; 35 | case ARM32_UND: 36 | return "Undefined Instruction"; 37 | case ARM32_HYP: 38 | return "Hypervisor"; 39 | case ARM32_SYS: 40 | return "System"; 41 | default: 42 | return "Unknown Mode"; 43 | } 44 | } 45 | 46 | void main(bool security_supported) { 47 | /* wait for peripheral access */ 48 | while(ARM_ID != ARM_IDVAL); 49 | udelay(500); 50 | 51 | logf("Started on ARM, continuing boot from here ...\n"); 52 | 53 | logf("Firmware data: SDRAM_SIZE=%d, VPU_CPUID=0x%X\n", 54 | g_FirmwareData.sdram_size, 55 | g_FirmwareData.vpu_cpuid); 56 | 57 | if (security_supported) { 58 | logf("Security extensions are supported!\n"); 59 | } 60 | 61 | logf("Execution mode: %s\n", get_execution_mode_name()); 62 | 63 | heap_init(); 64 | 65 | /* c++ runtime */ 66 | __cxx_init(); 67 | 68 | panic("Nothing else to do!"); 69 | } 70 | -------------------------------------------------------------------------------- /vc4_include/exception.h: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | VideoCore4 exceptions. 17 | 18 | This file in the public release documents all exception names: 19 | brcm_usrlib\dag\vmcsx\vcfw\rtos\none\rtos_none.c 20 | 21 | =============================================================================*/ 22 | 23 | #pragma once 24 | 25 | #define VC4_EXC_ZERO 0 26 | #define VC4_EXC_MISALIGNED 1 27 | #define VC4_EXC_DIVIDE_BY_ZERO 2 28 | #define VC4_EXC_UNDEF 3 29 | #define VC4_EXC_FORBIDDEN 4 30 | #define VC4_EXC_ILLEGAL_MEM 5 31 | #define VC4_EXC_BUS_ERROR 6 32 | #define VC4_EXC_FPE 7 33 | #define VC4_EXC_ISP 8 34 | #define VC4_EXC_DUMMY 9 35 | #define VC4_EXC_ICACHE 10 36 | #define VC4_EXC_VEC_CORE 11 37 | #define VC4_EXC_L2_ALIAS 12 38 | #define VC4_EXC_BKPT 13 39 | 40 | #define VC4_EXC_NAMES \ 41 | "Zero", \ 42 | "Misaligned", \ 43 | "Division by zero", \ 44 | "Undefined instruction", \ 45 | "Forbidden instruction", \ 46 | "Illegal memory", \ 47 | "Bus error", \ 48 | "Floating point exception", \ 49 | "ISP", \ 50 | "Dummy", \ 51 | "ICache", \ 52 | "Vector core exception", \ 53 | "Bad L2 alias", \ 54 | "Breakpoint" 55 | -------------------------------------------------------------------------------- /lib/cxx_runtime.cc: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | Crappy C++ runtime. 17 | 18 | =============================================================================*/ 19 | 20 | #include 21 | #include 22 | #include 23 | 24 | extern uintptr_t* __init_array_start; 25 | extern uintptr_t* __init_array_end; 26 | 27 | void* operator new[] (size_t sz) { 28 | return malloc(sz); 29 | } 30 | 31 | void* operator new (size_t sz) { 32 | return malloc(sz); 33 | } 34 | 35 | void operator delete (void* ptr) { 36 | free(ptr); 37 | } 38 | 39 | void operator delete[] (void* ptr) { 40 | free(ptr); 41 | } 42 | 43 | extern "C" void __cxa_pure_virtual() { 44 | panic("__cxa_pure_virtual!"); 45 | } 46 | 47 | void __cxx_init() { 48 | unsigned ctor_count = (unsigned)(&__init_array_end - &__init_array_start); 49 | void (*static_ctor)(); 50 | 51 | printf("__cxx_init: calling %d static constructors (0x%X - 0x%X) ...\n", ctor_count, &__init_array_start, &__init_array_end); 52 | 53 | for (unsigned i = 0; i < ctor_count; i++) { 54 | uintptr_t* ptr = (((uintptr_t*)&__init_array_start) + i); 55 | static_ctor = reinterpret_cast(*ptr); 56 | static_ctor(); 57 | } 58 | } -------------------------------------------------------------------------------- /arm_chainloader/trap.cc: -------------------------------------------------------------------------------- 1 | /* 2 | * trap.cc 3 | * Copyright (c) 2017 Kristina Brooks 4 | * 5 | * ARM trap handling code. 6 | */ 7 | 8 | #include 9 | 10 | struct arm_saved_state { 11 | uint32_t r[13]; /* General purpose register r0-r12 */ 12 | uint32_t sp; /* Stack pointer r13 */ 13 | uint32_t lr; /* Link register r14 */ 14 | uint32_t pc; /* Program counter r15 */ 15 | uint32_t cpsr; /* Current program status register */ 16 | uint32_t fsr; /* Fault status */ 17 | uint32_t far; /* Virtual Fault Address */ 18 | uint32_t exception; /* exception number */ 19 | }; 20 | typedef struct arm_saved_state arm_saved_state_t; 21 | 22 | #define REGISTER_FORMAT_STRING(prefix) \ 23 | prefix " r0: 0x%08x r1: 0x%08x r2: 0x%08x r3: 0x%08x\n" \ 24 | prefix " r4: 0x%08x r5: 0x%08x r6: 0x%08x r7: 0x%08x\n" \ 25 | prefix " r8: 0x%08x r9: 0x%08x r10: 0x%08x r11: 0x%08x\n" \ 26 | prefix " r12: 0x%08x sp: 0x%08x lr: 0x%08x pc: 0x%08x\n" \ 27 | prefix "cpsr: 0x%08x\n" 28 | 29 | #define REGISTER_PRINTF_LIST(regs) regs->r[0], regs->r[1], regs->r[2], regs->r[3],\ 30 | regs->r[4], regs->r[5], regs->r[6], regs->r[7], \ 31 | regs->r[8], regs->r[9], regs->r[10], regs->r[11], \ 32 | regs->r[12], regs->sp, regs->lr, regs->pc, regs->cpsr 33 | 34 | extern "C" void fatal_exception(arm_saved_state_t* regs, const char* fmt, ...) 35 | { 36 | va_list va; 37 | 38 | printf("Fatal Exception: "); 39 | va_start(va, fmt); 40 | vprintf(fmt, va); 41 | va_end(va); 42 | printf("\n"); 43 | 44 | printf("ARM registers: \n"); 45 | printf(REGISTER_FORMAT_STRING(" "), REGISTER_PRINTF_LIST(regs)); 46 | 47 | panic("Fatal CPU exception!"); 48 | } 49 | 50 | extern "C" void sleh_undef(arm_saved_state_t* regs) { 51 | fatal_exception(regs, "Undefined instruction"); 52 | } 53 | 54 | extern "C" void sleh_prefabt(arm_saved_state_t* regs) { 55 | fatal_exception(regs, "Prefetch abort"); 56 | } 57 | 58 | extern "C" void sleh_dataabt(arm_saved_state_t* regs) { 59 | fatal_exception(regs, "Data abort"); 60 | } 61 | extern "C" void sleh_addrexc(arm_saved_state_t* regs) { 62 | fatal_exception(regs, "Address exception"); 63 | } 64 | 65 | extern "C" void sleh_irq(arm_saved_state_t* regs) { 66 | fatal_exception(regs, "IRQ"); 67 | } 68 | 69 | extern "C" void sleh_fiq(arm_saved_state_t* regs) { 70 | fatal_exception(regs, "FIQ"); 71 | } -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/timer.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define ST_BASE 0x7e003000 3 | #define ST_CS HW_REGISTER_RW( 0x7e003000 ) 4 | #define ST_CS_MASK 0xffffffff 5 | #define ST_CS_WIDTH 32 6 | #define ST_CS_RESET 0000000000 7 | #if defined(__CC_ARM) 8 | #define ST_CLO vcos_getmicrosecs() 9 | #else 10 | #define ST_CLO HW_REGISTER_RO( 0x7e003004 ) 11 | #endif 12 | #define ST_CLO_MASK 0xffffffff 13 | #define ST_CLO_WIDTH 32 14 | #define ST_CHI HW_REGISTER_RO( 0x7e003008 ) 15 | #define ST_CHI_MASK 0xffffffff 16 | #define ST_CHI_WIDTH 32 17 | #define ST_C0 HW_REGISTER_RW( 0x7e00300c ) 18 | #define ST_C0_MASK 0xffffffff 19 | #define ST_C0_WIDTH 32 20 | #define ST_C0_RESET 0000000000 21 | #define ST_C1 HW_REGISTER_RW( 0x7e003010 ) 22 | #define ST_C1_MASK 0xffffffff 23 | #define ST_C1_WIDTH 32 24 | #define ST_C1_RESET 0000000000 25 | #define ST_C2 HW_REGISTER_RW( 0x7e003014 ) 26 | #define ST_C2_MASK 0xffffffff 27 | #define ST_C2_WIDTH 32 28 | #define ST_C2_RESET 0000000000 29 | #define ST_C3 HW_REGISTER_RW( 0x7e003018 ) 30 | #define ST_C3_MASK 0xffffffff 31 | #define ST_C3_WIDTH 32 32 | #define ST_C3_RESET 0000000000 33 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/cryptohw.h: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (c) 2007 Broadcom Europe Limited. All rights reserved. 3 | 4 | Project : BCM2707 5 | Module : CRYPTO wrapper hardware header 6 | File : $RCSfile: cryptohw.h,v $ 7 | Revision : $Revision: 1.2 $ 8 | 9 | FILE DESCRIPTION 10 | Definition of bits within CRYPTO hardware registers. 11 | =============================================================================*/ 12 | 13 | #ifndef CRYPTOHW_H 14 | #define CRYPTOHW_H 15 | 16 | #define CRYPTO_READFIELD(_w,_f) (((unsigned long)(_w) / _f) & (_f##_MASK)) 17 | 18 | enum 19 | { 20 | // BCM2707 has no crypto hardware but supports RNG interrupt 21 | // CRYPTO_ISR_RNG_INT = (1 << 2), 22 | CRYPTO_ISR_PKA_INT = (1 << 1), 23 | CRYPTO_ISR_SPU_INT = (1 << 0), 24 | 25 | // CRYPTO_IMR_RNG_INT_EN = (1 << 2), 26 | CRYPTO_IMR_PKA_INT_EN = (1 << 1), 27 | CRYPTO_IMR_SPU_INT_EN = (1 << 0), 28 | 29 | CRYPTO_CLK_CFG_PKA_CLK = (1 << 8), 30 | CRYPTO_CLK_CFG_PKA_CLK_MASK = 3, 31 | CRYPTO_CLK_CFG_PKA_CLK_FULL = 0, 32 | CRYPTO_CLK_CFG_PKA_CLK_HALF = 1, 33 | CRYPTO_CLK_CFG_PKA_CLK_THIRD = 2, 34 | CRYPTO_CLK_CFG_PKA_CLK_DISABLED = 3, 35 | 36 | CRYPTO_CLK_CFG_SPU_CLK = (1 << 4), 37 | CRYPTO_CLK_CFG_SPU_CLK_MASK = 3, 38 | CRYPTO_CLK_CFG_SPU_CLK_FULL = 0, 39 | CRYPTO_CLK_CFG_SPU_CLK_HALF = 1, 40 | CRYPTO_CLK_CFG_SPU_CLK_THIRD = 2, 41 | CRYPTO_CLK_CFG_SPU_CLK_DISABLED = 3, 42 | 43 | CRYPTO_CLK_CFG_OTP_CLKDIV = (1 << 0), 44 | CRYPTO_CLK_CFG_OTP_CLKDIV_MASK = 0xf, 45 | 46 | CRYPTO_CLK_CFG_OTP_CLKDIV_2 = 0x0, 47 | CRYPTO_CLK_CFG_OTP_CLKDIV_4 = 0x1, 48 | CRYPTO_CLK_CFG_OTP_CLKDIV_6 = 0x2, 49 | CRYPTO_CLK_CFG_OTP_CLKDIV_8 = 0x3, 50 | CRYPTO_CLK_CFG_OTP_CLKDIV_10 = 0x4, 51 | CRYPTO_CLK_CFG_OTP_CLKDIV_12 = 0x5, 52 | CRYPTO_CLK_CFG_OTP_CLKDIV_14 = 0x6, 53 | CRYPTO_CLK_CFG_OTP_CLKDIV_16 = 0x7, 54 | CRYPTO_CLK_CFG_OTP_CLKDIV_18 = 0x8, 55 | CRYPTO_CLK_CFG_OTP_CLKDIV_20 = 0x9, 56 | CRYPTO_CLK_CFG_OTP_CLKDIV_22 = 0xa, 57 | CRYPTO_CLK_CFG_OTP_CLKDIV_24 = 0xb, 58 | CRYPTO_CLK_CFG_OTP_CLKDIV_26 = 0xc, 59 | CRYPTO_CLK_CFG_OTP_CLKDIV_28 = 0xd, 60 | CRYPTO_CLK_CFG_OTP_CLKDIV_30 = 0xe, 61 | CRYPTO_CLK_CFG_OTP_CLKDIV_32 = 0xf, 62 | 63 | CRYPTO_SIMCTRL_DEBUG = (1 << 0), 64 | CRYPTO_SIMCTRL_SECURE = (1 << 1) 65 | }; 66 | 67 | #endif 68 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/tectl.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define TE_BASE 0x7e20e000 3 | #define TE_APB_ID 0x00746563 4 | #define TE_0C HW_REGISTER_RW( 0x7e20e000 ) 5 | #define TE_0C_MASK 0xffffffff 6 | #define TE_0C_WIDTH 32 7 | #define TE_0VSWIDTH HW_REGISTER_RW( 0x7e20e004 ) 8 | #define TE_0VSWIDTH_MASK 0xffffffff 9 | #define TE_0VSWIDTH_WIDTH 32 10 | #define TE_0TIMER HW_REGISTER_RW( 0x7e20e008 ) 11 | #define TE_0TIMER_MASK 0xffffffff 12 | #define TE_0TIMER_WIDTH 32 13 | #define TE_1C HW_REGISTER_RW( 0x7e20e00c ) 14 | #define TE_1C_MASK 0xffffffff 15 | #define TE_1C_WIDTH 32 16 | #define TE_1VSWIDTH HW_REGISTER_RW( 0x7e20e010 ) 17 | #define TE_1VSWIDTH_MASK 0xffffffff 18 | #define TE_1VSWIDTH_WIDTH 32 19 | #define TE_1TIMER HW_REGISTER_RW( 0x7e20e014 ) 20 | #define TE_1TIMER_MASK 0xffffffff 21 | #define TE_1TIMER_WIDTH 32 22 | #define TE_2C HW_REGISTER_RW( 0x7e20e018 ) 23 | #define TE_2C_MASK 0xffffffff 24 | #define TE_2C_WIDTH 32 25 | #define TE_2VSWIDTH HW_REGISTER_RW( 0x7e20e01c ) 26 | #define TE_2VSWIDTH_MASK 0xffffffff 27 | #define TE_2VSWIDTH_WIDTH 32 28 | #define TE_2TIMER HW_REGISTER_RW( 0x7e20e020 ) 29 | #define TE_2TIMER_MASK 0xffffffff 30 | #define TE_2TIMER_WIDTH 32 31 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/ccp2tx_a0.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define CCP2TX_BASE 0x7e001000 3 | #define CCP2TX_APB_ID 0x63637032 4 | #define CCP2TX_TC HW_REGISTER_RW( 0x7e001000 ) 5 | #define CCP2TX_TC_MASK 0xffffffff 6 | #define CCP2TX_TC_WIDTH 32 7 | #define CCP2TX_TS HW_REGISTER_RW( 0x7e001004 ) 8 | #define CCP2TX_TS_MASK 0xffffffff 9 | #define CCP2TX_TS_WIDTH 32 10 | #define CCP2TX_TPC HW_REGISTER_RW( 0x7e001008 ) 11 | #define CCP2TX_TPC_MASK 0xffffffff 12 | #define CCP2TX_TPC_WIDTH 32 13 | #define CCP2TX_TSC HW_REGISTER_RW( 0x7e00100c ) 14 | #define CCP2TX_TSC_MASK 0xffffffff 15 | #define CCP2TX_TSC_WIDTH 32 16 | #define CCP2TX_TIC HW_REGISTER_RW( 0x7e001010 ) 17 | #define CCP2TX_TIC_MASK 0xffffffff 18 | #define CCP2TX_TIC_WIDTH 32 19 | #define CCP2TX_TTC HW_REGISTER_RW( 0x7e001014 ) 20 | #define CCP2TX_TTC_MASK 0xffffffff 21 | #define CCP2TX_TTC_WIDTH 32 22 | #define CCP2TX_TBA HW_REGISTER_RW( 0x7e001018 ) 23 | #define CCP2TX_TBA_MASK 0xffffffff 24 | #define CCP2TX_TBA_WIDTH 32 25 | #define CCP2TX_TDL HW_REGISTER_RW( 0x7e00101c ) 26 | #define CCP2TX_TDL_MASK 0xffffffff 27 | #define CCP2TX_TDL_WIDTH 32 28 | #define CCP2TX_TD HW_REGISTER_RW( 0x7e001020 ) 29 | #define CCP2TX_TD_MASK 0xffffffff 30 | #define CCP2TX_TD_WIDTH 32 31 | -------------------------------------------------------------------------------- /arm_chainloader/lib_armv6/arm_strlen.s: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2006 Apple Computer, Inc. All rights reserved. 3 | * 4 | * @APPLE_LICENSE_HEADER_START@ 5 | * 6 | * This file contains Original Code and/or Modifications of Original Code 7 | * as defined in and that are subject to the Apple Public Source License 8 | * Version 2.0 (the 'License'). You may not use this file except in 9 | * compliance with the License. Please obtain a copy of the License at 10 | * http://www.opensource.apple.com/apsl/ and read it before using this 11 | * file. 12 | * 13 | * The Original Code and all software distributed under the License are 14 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER 15 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, 16 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, 17 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. 18 | * Please see the License for the specific language governing rights and 19 | * limitations under the License. 20 | * 21 | * @APPLE_LICENSE_HEADER_END@ 22 | */ 23 | 24 | .text 25 | .align 2 26 | 27 | .globl strlen 28 | /* size_t strlen(const char *s); */ 29 | strlen: 30 | /* save the original pointer */ 31 | mov r12, r0 32 | 33 | /* see if the string is aligned */ 34 | ands r3, r0, #3 35 | 36 | /* load the first word, address rounded down */ 37 | bic r0, r0, #3 38 | ldr r2, [r0], #4 39 | 40 | /* skip the next part if the string is already aligned */ 41 | beq Laligned 42 | 43 | Lunaligned: 44 | /* unaligned pointer, mask out the bytes that we've read that we should be ignoring */ 45 | cmp r3, #2 46 | orr r2, r2, #0x000000ff 47 | orrge r2, r2, #0x0000ff00 48 | orrgt r2, r2, #0x00ff0000 49 | 50 | Laligned: 51 | /* load 0x01010101 into r1 */ 52 | mov r1, #0x01 53 | orr r1, r1, r1, lsl #8 54 | orr r1, r1, r1, lsl #16 55 | 56 | Laligned_loop: 57 | /* ((x - 0x01010101) & ~x & 0x80808080) == hasnull(word) */ 58 | sub r3, r2, r1 /* x - 0x01010101 */ 59 | bic r3, r3, r2 /* above & ~x */ 60 | tst r3, r1, lsl #7 /* above & 0x80808080 */ 61 | ldreq r2, [r0], #4 /* load next word */ 62 | beq Laligned_loop 63 | 64 | /* we found a nullbyte */ 65 | /* r0 (ptr) has overshot by up to 4 bytes, so subtract off until we find a nullbyte */ 66 | sub r0, r0, #1 67 | tst r2, #0x000000ff 68 | subeq r0, r0, #1 69 | tstne r2, #0x0000ff00 70 | subeq r0, r0, #1 71 | tstne r2, #0x00ff0000 72 | subeq r0, r0, #1 73 | 74 | Lexit: 75 | /* len = ptr - original pointer */ 76 | sub r0, r0, r12 77 | bx lr 78 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/otp.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define OTP_BASE 0x7e20f000 3 | #define OTP_APB_ID 0x206f7470 4 | #define OTP_BOOTMODE_REG HW_REGISTER_RW( 0x7e20f000 ) 5 | #define OTP_BOOTMODE_REG_MASK 0xffffffff 6 | #define OTP_BOOTMODE_REG_WIDTH 32 7 | #define OTP_CONFIG_REG HW_REGISTER_RW( 0x7e20f004 ) 8 | #define OTP_CONFIG_REG_MASK 0x00000007 9 | #define OTP_CONFIG_REG_WIDTH 3 10 | #define OTP_CTRL_LO_REG HW_REGISTER_RW( 0x7e20f008 ) 11 | #define OTP_CTRL_LO_REG_MASK 0xffffffff 12 | #define OTP_CTRL_LO_REG_WIDTH 32 13 | #define OTP_CTRL_HI_REG HW_REGISTER_RW( 0x7e20f00c ) 14 | #define OTP_CTRL_HI_REG_MASK 0x0000ffff 15 | #define OTP_CTRL_HI_REG_WIDTH 16 16 | #define OTP_STATUS_REG HW_REGISTER_RO( 0x7e20f010 ) 17 | #define OTP_STATUS_REG_MASK 0xffffffff 18 | #define OTP_STATUS_REG_WIDTH 32 19 | #define OTP_BITSEL_REG HW_REGISTER_RW( 0x7e20f014 ) 20 | #define OTP_BITSEL_REG_MASK 0x0000001f 21 | #define OTP_BITSEL_REG_WIDTH 5 22 | #define OTP_DATA_REG HW_REGISTER_RW( 0x7e20f018 ) 23 | #define OTP_DATA_REG_MASK 0x0000001f 24 | #define OTP_DATA_REG_WIDTH 5 25 | #define OTP_ADDR_REG HW_REGISTER_RW( 0x7e20f01c ) 26 | #define OTP_ADDR_REG_MASK 0x0000001f 27 | #define OTP_ADDR_REG_WIDTH 5 28 | #define OTP_WRITE_DATA_READ_REG HW_REGISTER_RW( 0x7e20f020 ) 29 | #define OTP_WRITE_DATA_READ_REG_MASK 0xffffffff 30 | #define OTP_WRITE_DATA_READ_REG_WIDTH 32 31 | #define OTP_INIT_STATUS_REG HW_REGISTER_RW( 0x7e20f024 ) 32 | #define OTP_INIT_STATUS_REG_MASK 0xffffffff 33 | #define OTP_INIT_STATUS_REG_WIDTH 32 34 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/peri_image_arb_ctrl.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define PIARBCTL_BASE 0x7e80a000 3 | #define PIARBCTL_CAM HW_REGISTER_RW( 0x7e80a000 ) 4 | #define PIARBCTL_CAM_MASK 0x0000ffff 5 | #define PIARBCTL_CAM_WIDTH 16 6 | #define PIARBCTL_CAM_RESET 0000000000 7 | #define PIARBCTL_CAM_CHANNEL_INIBIT_BITS 15:8 8 | #define PIARBCTL_CAM_CHANNEL_INIBIT_SET 0x0000ff00 9 | #define PIARBCTL_CAM_CHANNEL_INIBIT_CLR 0xffff00ff 10 | #define PIARBCTL_CAM_CHANNEL_INIBIT_MSB 15 11 | #define PIARBCTL_CAM_CHANNEL_INIBIT_LSB 8 12 | #define PIARBCTL_CAM_CHANNEL_INIBIT_RESET 0x0 13 | #define PIARBCTL_CAM_ALGORITHM_BITS 7:6 14 | #define PIARBCTL_CAM_ALGORITHM_SET 0x000000c0 15 | #define PIARBCTL_CAM_ALGORITHM_CLR 0xffffff3f 16 | #define PIARBCTL_CAM_ALGORITHM_MSB 7 17 | #define PIARBCTL_CAM_ALGORITHM_LSB 6 18 | #define PIARBCTL_CAM_ALGORITHM_RESET 0x0 19 | #define PIARBCTL_CAM_THRESHOLD_BITS 5:4 20 | #define PIARBCTL_CAM_THRESHOLD_SET 0x00000030 21 | #define PIARBCTL_CAM_THRESHOLD_CLR 0xffffffcf 22 | #define PIARBCTL_CAM_THRESHOLD_MSB 5 23 | #define PIARBCTL_CAM_THRESHOLD_LSB 4 24 | #define PIARBCTL_CAM_THRESHOLD_RESET 0x0 25 | #define PIARBCTL_CAM_DELAY_BITS 3:2 26 | #define PIARBCTL_CAM_DELAY_SET 0x0000000c 27 | #define PIARBCTL_CAM_DELAY_CLR 0xfffffff3 28 | #define PIARBCTL_CAM_DELAY_MSB 3 29 | #define PIARBCTL_CAM_DELAY_LSB 2 30 | #define PIARBCTL_CAM_DELAY_RESET 0x0 31 | #define PIARBCTL_CAM_LIMIT_BITS 1:0 32 | #define PIARBCTL_CAM_LIMIT_SET 0x00000003 33 | #define PIARBCTL_CAM_LIMIT_CLR 0xfffffffc 34 | #define PIARBCTL_CAM_LIMIT_MSB 1 35 | #define PIARBCTL_CAM_LIMIT_LSB 0 36 | #define PIARBCTL_CAM_LIMIT_RESET 0x0 37 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/i2c0.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define I2C0_BASE 0x7e205000 3 | #define I2C0_C HW_REGISTER_RW( 0x7e205000 ) 4 | #define I2C0_C_MASK 0x00008701 5 | #define I2C0_C_WIDTH 16 6 | #define I2C0_C_RESET 0000000000 7 | #define I2C0_S HW_REGISTER_RW( 0x7e205004 ) 8 | #define I2C0_S_MASK 0xffffffff 9 | #define I2C0_S_WIDTH 32 10 | #define I2C0_S_RESET 0x00000050 11 | #define I2C0_DLEN HW_REGISTER_RW( 0x7e205008 ) 12 | #define I2C0_DLEN_MASK 0x0000ffff 13 | #define I2C0_DLEN_WIDTH 16 14 | #define I2C0_DLEN_RESET 0000000000 15 | #define I2C0_A HW_REGISTER_RW( 0x7e20500c ) 16 | #define I2C0_A_MASK 0x0000007f 17 | #define I2C0_A_WIDTH 7 18 | #define I2C0_A_RESET 0000000000 19 | #define I2C0_FIFO HW_REGISTER_RW( 0x7e205010 ) 20 | #define I2C0_FIFO_MASK 0x000000ff 21 | #define I2C0_FIFO_WIDTH 8 22 | #define I2C0_FIFO_RESET 0000000000 23 | #define I2C0_DIV HW_REGISTER_RW( 0x7e205014 ) 24 | #define I2C0_DIV_MASK 0x0000ffff 25 | #define I2C0_DIV_WIDTH 16 26 | #define I2C0_DIV_RESET 0x000005dc 27 | #define I2C0_DEL HW_REGISTER_RW( 0x7e205018 ) 28 | #define I2C0_DEL_MASK 0xffffffff 29 | #define I2C0_DEL_WIDTH 32 30 | #define I2C0_DEL_RESET 0x00300030 31 | #define I2C0_CLKT HW_REGISTER_RW( 0x7e20501c ) 32 | #define I2C0_CLKT_MASK 0x0000ffff 33 | #define I2C0_CLKT_WIDTH 16 34 | #define I2C0_CLKT_RESET 0x00000040 35 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/i2c1.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define I2C1_BASE 0x7e804000 3 | #define I2C1_C HW_REGISTER_RW( 0x7e804000 ) 4 | #define I2C1_C_MASK 0x00008701 5 | #define I2C1_C_WIDTH 16 6 | #define I2C1_C_RESET 0000000000 7 | #define I2C1_S HW_REGISTER_RW( 0x7e804004 ) 8 | #define I2C1_S_MASK 0xffffffff 9 | #define I2C1_S_WIDTH 32 10 | #define I2C1_S_RESET 0x00000050 11 | #define I2C1_DLEN HW_REGISTER_RW( 0x7e804008 ) 12 | #define I2C1_DLEN_MASK 0x0000ffff 13 | #define I2C1_DLEN_WIDTH 16 14 | #define I2C1_DLEN_RESET 0000000000 15 | #define I2C1_A HW_REGISTER_RW( 0x7e80400c ) 16 | #define I2C1_A_MASK 0x0000007f 17 | #define I2C1_A_WIDTH 7 18 | #define I2C1_A_RESET 0000000000 19 | #define I2C1_FIFO HW_REGISTER_RW( 0x7e804010 ) 20 | #define I2C1_FIFO_MASK 0x000000ff 21 | #define I2C1_FIFO_WIDTH 8 22 | #define I2C1_FIFO_RESET 0000000000 23 | #define I2C1_DIV HW_REGISTER_RW( 0x7e804014 ) 24 | #define I2C1_DIV_MASK 0x0000ffff 25 | #define I2C1_DIV_WIDTH 16 26 | #define I2C1_DIV_RESET 0x000005dc 27 | #define I2C1_DEL HW_REGISTER_RW( 0x7e804018 ) 28 | #define I2C1_DEL_MASK 0xffffffff 29 | #define I2C1_DEL_WIDTH 32 30 | #define I2C1_DEL_RESET 0x00300030 31 | #define I2C1_CLKT HW_REGISTER_RW( 0x7e80401c ) 32 | #define I2C1_CLKT_MASK 0x0000ffff 33 | #define I2C1_CLKT_WIDTH 16 34 | #define I2C1_CLKT_RESET 0x00000040 35 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/i2c2.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define I2C2_BASE 0x7e805000 3 | #define I2C2_C HW_REGISTER_RW( 0x7e805000 ) 4 | #define I2C2_C_MASK 0x00008701 5 | #define I2C2_C_WIDTH 16 6 | #define I2C2_C_RESET 0000000000 7 | #define I2C2_S HW_REGISTER_RW( 0x7e805004 ) 8 | #define I2C2_S_MASK 0xffffffff 9 | #define I2C2_S_WIDTH 32 10 | #define I2C2_S_RESET 0x00000050 11 | #define I2C2_DLEN HW_REGISTER_RW( 0x7e805008 ) 12 | #define I2C2_DLEN_MASK 0x0000ffff 13 | #define I2C2_DLEN_WIDTH 16 14 | #define I2C2_DLEN_RESET 0000000000 15 | #define I2C2_A HW_REGISTER_RW( 0x7e80500c ) 16 | #define I2C2_A_MASK 0x0000007f 17 | #define I2C2_A_WIDTH 7 18 | #define I2C2_A_RESET 0000000000 19 | #define I2C2_FIFO HW_REGISTER_RW( 0x7e805010 ) 20 | #define I2C2_FIFO_MASK 0x000000ff 21 | #define I2C2_FIFO_WIDTH 8 22 | #define I2C2_FIFO_RESET 0000000000 23 | #define I2C2_DIV HW_REGISTER_RW( 0x7e805014 ) 24 | #define I2C2_DIV_MASK 0x0000ffff 25 | #define I2C2_DIV_WIDTH 16 26 | #define I2C2_DIV_RESET 0x000005dc 27 | #define I2C2_DEL HW_REGISTER_RW( 0x7e805018 ) 28 | #define I2C2_DEL_MASK 0xffffffff 29 | #define I2C2_DEL_WIDTH 32 30 | #define I2C2_DEL_RESET 0x00300030 31 | #define I2C2_CLKT HW_REGISTER_RW( 0x7e80501c ) 32 | #define I2C2_CLKT_MASK 0x0000ffff 33 | #define I2C2_CLKT_WIDTH 16 34 | #define I2C2_CLKT_RESET 0x00000040 35 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/hdcp.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define HDCP_BASE 0x7e809000 3 | #define HDCP_APB_ID 0x48444350 4 | #define HDCP_KEY_CTL HW_REGISTER_RW( 0x7e809000 ) 5 | #define HDCP_KEY_CTL_MASK 0x00000007 6 | #define HDCP_KEY_CTL_WIDTH 3 7 | #define HDCP_KEY_CTL_RESET 0000000000 8 | #define HDCP_KEY_CTL_START_BITS 0:0 9 | #define HDCP_KEY_CTL_START_SET 0x00000001 10 | #define HDCP_KEY_CTL_START_CLR 0xfffffffe 11 | #define HDCP_KEY_CTL_START_MSB 0 12 | #define HDCP_KEY_CTL_START_LSB 0 13 | #define HDCP_KEY_CTL_START_RESET 0x0 14 | #define HDCP_KEY_CTL_DONE_BITS 1:1 15 | #define HDCP_KEY_CTL_DONE_SET 0x00000002 16 | #define HDCP_KEY_CTL_DONE_CLR 0xfffffffd 17 | #define HDCP_KEY_CTL_DONE_MSB 1 18 | #define HDCP_KEY_CTL_DONE_LSB 1 19 | #define HDCP_KEY_CTL_DONE_RESET 0x0 20 | #define HDCP_KEY_CTL_DISHDCP_BITS 2:2 21 | #define HDCP_KEY_CTL_DISHDCP_SET 0x00000004 22 | #define HDCP_KEY_CTL_DISHDCP_CLR 0xfffffffb 23 | #define HDCP_KEY_CTL_DISHDCP_MSB 2 24 | #define HDCP_KEY_CTL_DISHDCP_LSB 2 25 | #define HDCP_KEY_CTL_DISHDCP_RESET 0x0 26 | #define HDCP_KEY_ADR HW_REGISTER_RW( 0x7e809004 ) 27 | #define HDCP_KEY_ADR_MASK 0x000000ff 28 | #define HDCP_KEY_ADR_WIDTH 8 29 | #define HDCP_KEY_ADR_RESET 0000000000 30 | #define HDCP_KEY_KY0 HW_REGISTER_RW( 0x7e809008 ) 31 | #define HDCP_KEY_KY0_MASK 0xffffffff 32 | #define HDCP_KEY_KY0_WIDTH 32 33 | #define HDCP_KEY_KY0_RESET 0000000000 34 | #define HDCP_KEY_KY1 HW_REGISTER_RW( 0x7e80900c ) 35 | #define HDCP_KEY_KY1_MASK 0x00ffffff 36 | #define HDCP_KEY_KY1_WIDTH 24 37 | #define HDCP_KEY_KY1_RESET 0000000000 38 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | 2 | TARGET_BOOTCODE = bootcode.bin 3 | 4 | # 5 | # when building bootcode.bin, always ensure start.s is at the top, providing 6 | # the 0x200 byte long header and some init code. 7 | # 8 | SRCS = \ 9 | start.s \ 10 | romstage.c \ 11 | sdram.c \ 12 | arm_monitor.cc \ 13 | trap.c \ 14 | lib/xprintf.c \ 15 | lib/panic.c \ 16 | lib/udelay.c \ 17 | lib/memcpy.c \ 18 | lib/cxx_runtime.c \ 19 | drivers/IODevice.cc \ 20 | drivers/BCM2708PowerManagement.cc \ 21 | drivers/BCM2708UsbPhy.cc \ 22 | drivers/BCM2708ArmControl.cc \ 23 | drivers/BCM2708ClockDomains.cc \ 24 | drivers/BCM2708Gpio.cc \ 25 | BCM2708PlatformStartup.cc 26 | 27 | ARCH = vc4 28 | 29 | BUILD_DIR = build 30 | TARGET_BUILD_DIR = $(BUILD_DIR)/$(ARCH)-objects 31 | PRODUCT_DIRECTORY = $(BUILD_DIR) 32 | 33 | NO_COLOR="" 34 | OK_COLOR="" 35 | ERROR_COLOR="" 36 | WARN_COLOR="" 37 | 38 | .PHONY: default all clean create_build_directory device 39 | 40 | default: $(TARGET_BOOTCODE) 41 | 42 | OBJ := $(addprefix $(TARGET_BUILD_DIR)/, $(addsuffix .o, $(basename $(SRCS)))) 43 | 44 | # the cross compiler should already be in your path 45 | CROSS_COMPILE ?= vc4-elf- 46 | CC = $(CROSS_COMPILE)gcc 47 | CXX = $(CROSS_COMPILE)g++ 48 | AS = $(CC) 49 | OBJCOPY = $(CROSS_COMPILE)objcopy 50 | LINKFLAGS = -nostdlib -nostartfiles -Wl,--build-id=none -T linker.lds 51 | 52 | CFLAGS = -c -nostdlib -Wno-multichar -std=c11 -fsingle-precision-constant -Wdouble-promotion -D__VIDEOCORE4__ -I./vc4_include/ -I./ 53 | ASFLAGS = -c -nostdlib -x assembler-with-cpp -D__VIDEOCORE4__ -I./vc4_include/ -I./ 54 | CXXFLAGS = -c -nostdlib -Wno-multichar -std=c++11 -fno-exceptions -fno-rtti -D__VIDEOCORE4__ -I./vc4_include/ -I./ 55 | 56 | HEADERS := \ 57 | $(shell find . -type f -name '*.h') \ 58 | $(shell find . -type f -name '*.hpp') 59 | 60 | create_build_directory: 61 | @mkdir -p $(TARGET_BUILD_DIR) 62 | @mkdir -p $(PRODUCT_DIRECTORY) 63 | 64 | CREATE_SUBDIR = \ 65 | @DIR="$(dir $@)"; \ 66 | if [ ! -d $$DIR ]; then mkdir -p $$DIR; fi 67 | 68 | 69 | # 70 | # rules to build c/asm files. 71 | # 72 | $(TARGET_BUILD_DIR)/%.o: %.c $(HEADERS) 73 | $(CREATE_SUBDIR) 74 | @echo $(WARN_COLOR)CC $(NO_COLOR) $@ 75 | @$(CC) $(CFLAGS) $< -o $@ 76 | 77 | $(TARGET_BUILD_DIR)/%.o: %.cc $(HEADERS) 78 | $(CREATE_SUBDIR) 79 | @echo $(WARN_COLOR)CXX $(NO_COLOR) $@ 80 | @$(CXX) $(CXXFLAGS) $< -o $@ 81 | 82 | $(TARGET_BUILD_DIR)/%.o: %.s $(HEADERS) 83 | $(CREATE_SUBDIR) 84 | @echo $(WARN_COLOR)AS $(NO_COLOR) $@ 85 | @$(AS) $(ASFLAGS) $< -o $@ 86 | 87 | .PRECIOUS: $(OBJ) 88 | 89 | $(TARGET_BOOTCODE): create_build_directory $(OBJ) 90 | @echo $(WARN_COLOR)LD $(NO_COLOR) $@.elf 91 | @$(CC) $(LINKFLAGS) $(OBJ) -o $(PRODUCT_DIRECTORY)/$@.elf 92 | @echo $(WARN_COLOR)OBJ$(NO_COLOR) $@ 93 | @$(OBJCOPY) -O binary $(PRODUCT_DIRECTORY)/$@.elf $(PRODUCT_DIRECTORY)/$@ 94 | 95 | clean: 96 | @echo $(ERROR_COLOR)CLEAN$(NO_COLOR) 97 | @-rm -rf ./$(BUILD_DIR) 98 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/cpg.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define CPG_BASE 0x7e211000 3 | #define CPG_APB_ID 0x67706320 4 | #define CPG_Config HW_REGISTER_RW( 0x7e211000 ) 5 | #define CPG_Config_MASK 0xffffffff 6 | #define CPG_Config_WIDTH 32 7 | #define CPG_IntStatus HW_REGISTER_RW( 0x7e211004 ) 8 | #define CPG_IntStatus_MASK 0xffffffff 9 | #define CPG_IntStatus_WIDTH 32 10 | #define CPG_Trigger HW_REGISTER_RW( 0x7e211008 ) 11 | #define CPG_Trigger_MASK 0x00000003 12 | #define CPG_Trigger_WIDTH 2 13 | #define CPG_Param0 HW_REGISTER_RW( 0x7e211010 ) 14 | #define CPG_Param0_MASK 0xffffffff 15 | #define CPG_Param0_WIDTH 32 16 | #define CPG_Param1 HW_REGISTER_RW( 0x7e211014 ) 17 | #define CPG_Param1_MASK 0xffffffff 18 | #define CPG_Param1_WIDTH 32 19 | #define CPG_Param2 HW_REGISTER_RW( 0x7e211018 ) 20 | #define CPG_Param2_MASK 0xffffffff 21 | #define CPG_Param2_WIDTH 32 22 | #define CPG_Param3 HW_REGISTER_RW( 0x7e21101c ) 23 | #define CPG_Param3_MASK 0xffffffff 24 | #define CPG_Param3_WIDTH 32 25 | #define CPG_Debug0 HW_REGISTER_RW( 0x7e211040 ) 26 | #define CPG_Debug0_MASK 0xffffffff 27 | #define CPG_Debug0_WIDTH 32 28 | #define CPG_Debug1 HW_REGISTER_RW( 0x7e211044 ) 29 | #define CPG_Debug1_MASK 0xffffffff 30 | #define CPG_Debug1_WIDTH 32 31 | #define CPG_Debug2 HW_REGISTER_RW( 0x7e211048 ) 32 | #define CPG_Debug2_MASK 0xffffffff 33 | #define CPG_Debug2_WIDTH 32 34 | #define CPG_Debug3 HW_REGISTER_RW( 0x7e21104c ) 35 | #define CPG_Debug3_MASK 0xffffffff 36 | #define CPG_Debug3_WIDTH 32 37 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/jpeg_top.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define JP_BASE 0x7e005000 3 | #define JP_APB_ID 0x4a504547 4 | #define JP_CTRL HW_REGISTER_RW( 0x7e005000 ) 5 | #define JP_ICST HW_REGISTER_RW( 0x7e005004 ) 6 | #define JP_MCTRL HW_REGISTER_RW( 0x7e005008 ) 7 | #define JP_DCCTRL HW_REGISTER_RW( 0x7e00500c ) 8 | #define JP_CBA HW_REGISTER_RW( 0x7e005010 ) 9 | #define JP_NCB HW_REGISTER_RW( 0x7e005014 ) 10 | #define JP_SDA HW_REGISTER_RW( 0x7e005018 ) 11 | #define JP_NSB HW_REGISTER_RW( 0x7e00501c ) 12 | #define JP_SBO HW_REGISTER_RW( 0x7e005020 ) 13 | #define JP_MOP HW_REGISTER_RW( 0x7e005024 ) 14 | #define JP_HADDR HW_REGISTER_RW( 0x7e005028 ) 15 | #define JP_HWDATA HW_REGISTER_RW( 0x7e00502c ) 16 | #define JP_MADDR HW_REGISTER_RW( 0x7e005030 ) 17 | #define JP_MWDATA HW_REGISTER_RW( 0x7e005034 ) 18 | #define JP_OADDR HW_REGISTER_RW( 0x7e005038 ) 19 | #define JP_OWDATA HW_REGISTER_RW( 0x7e00503c ) 20 | #define JP_QADDR HW_REGISTER_RW( 0x7e005040 ) 21 | #define JP_QWDATA HW_REGISTER_RW( 0x7e005044 ) 22 | #define JP_QCTRL HW_REGISTER_RW( 0x7e005048 ) 23 | #define JP_C0BA HW_REGISTER_RW( 0x7e00504c ) 24 | #define JP_C1BA HW_REGISTER_RW( 0x7e005050 ) 25 | #define JP_C2BA HW_REGISTER_RW( 0x7e005054 ) 26 | #define JP_C0S HW_REGISTER_RW( 0x7e005058 ) 27 | #define JP_C1S HW_REGISTER_RW( 0x7e00505c ) 28 | #define JP_C2S HW_REGISTER_RW( 0x7e005060 ) 29 | #define JP_C0W HW_REGISTER_RW( 0x7e005064 ) 30 | #define JP_C1W HW_REGISTER_RW( 0x7e005068 ) 31 | #define JP_C2W HW_REGISTER_RW( 0x7e00506c ) 32 | -------------------------------------------------------------------------------- /drivers/BCM2708ClockDomains.cc: -------------------------------------------------------------------------------- 1 | /* 2 | * VideoCore4_Drivers 3 | * Copyright (c) 2017 Kristina Brooks 4 | * 5 | * PLL VCOs and their channels. 6 | */ 7 | 8 | #include 9 | 10 | /* 11 | PLL/Channel tree: 12 | |-XOSC 13 | |-PLLA 14 | |-CORE 15 | |-PER 16 | |-CCP2 17 | |-DSI0 18 | |-PLLB 19 | |-ARM 20 | |-ARM Clock (CM_ARM*) 21 | |-SP0 (???) 22 | |-SP1 (???) 23 | |-SP2 (???) 24 | |-PLLC 25 | |-CORE0 26 | |-CORE1 27 | |-PER 28 | |-CORE2 (???) 29 | |-PLLD 30 | |-DSI0 31 | |-DSI1 32 | |-CORE 33 | |-PER 34 | |-PLLH 35 | |-AUX 36 | |-PIX 37 | |-RCAL 38 | |-STS 39 | */ 40 | 41 | /*********************************************************************** 42 | * 43 | * Common VCO stuff. 44 | * 45 | ***********************************************************************/ 46 | 47 | void BCM2708VCO::setDigValues() { 48 | IODriverLog("setting DIG values for this VCO ..."); 49 | 50 | uint32_t dig0 = dig[0], 51 | dig1 = dig[1], 52 | dig2 = dig[2], 53 | dig3 = dig[3]; 54 | 55 | /* 0xAA covers all possible HOLD bits in CM_PLLx regs */ 56 | *cmPllCtrl = CM_PASSWORD | 0xAA; 57 | 58 | dig[3] = A2W_PASSWORD | (dig3); 59 | dig[2] = A2W_PASSWORD | (dig2 & 0xFFEFFBFE); 60 | dig[1] = A2W_PASSWORD | (dig1 & ~(1 << 14)); 61 | dig[0] = A2W_PASSWORD | (dig0); 62 | 63 | *ctrl = A2W_PASSWORD | 0x20000 | *ctrl; 64 | 65 | dig3 |= 0x42; 66 | 67 | dig[3] = A2W_PASSWORD | (dig3); 68 | dig[2] = A2W_PASSWORD | (dig2); 69 | dig[1] = A2W_PASSWORD | (dig1); 70 | dig[0] = A2W_PASSWORD | (dig0); 71 | } 72 | 73 | void BCM2708VCO::dumpDigValues() { 74 | IODriverLog("DIG0: 0x%X, DIG1: 0x%X, DIG2: 0x%X, DIG3: 0x%X", 75 | dig[0], 76 | dig[1], 77 | dig[2], 78 | dig[3]); 79 | } 80 | 81 | /*********************************************************************** 82 | * 83 | * PLL VCOs for specific PLLs. 84 | * 85 | ***********************************************************************/ 86 | 87 | struct BCM2708PLLB : BCM2708VCO { 88 | IODriverConstructor(BCM2708PLLB); 89 | 90 | /* 91 | * Working: DIG0: 0xAAA030, DIG1: 0x403A, DIG2: 0x402401, DIG3: 0x2 92 | */ 93 | 94 | virtual void init() override { 95 | ctrl = RegToRef(A2W_PLLB_CTRL); 96 | ana = RegToRef(A2W_PLLB_ANA0); 97 | dig = RegToRef(A2W_PLLB_DIG0); 98 | cmPllCtrl = RegToRef(CM_PLLB); 99 | 100 | IODriverLog("PLLB VCO registered"); 101 | 102 | setTag('PLLB'); 103 | } 104 | }; 105 | IODriverCreateSingletonInstance(BCM2708PLLB); 106 | 107 | /*********************************************************************** 108 | * 109 | * ARM Clock. 110 | * 111 | ***********************************************************************/ 112 | 113 | struct BCM2708ClockDomain : IODevice { 114 | volatile uint32_t* cmDiv; 115 | volatile uint32_t* cmCtrl; 116 | }; 117 | 118 | struct BCM2708ArmClockDomain : BCM2708ClockDomain { 119 | 120 | }; 121 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/rng_a0.h: -------------------------------------------------------------------------------- 1 | #ifndef __BCM2708A0__ 2 | 3 | // This file was generated by the create_regs script 4 | #define RNG_BASE 0x7e104000 5 | #define RNG_APB_ID 0x20726e67 6 | #define RNG_CTRL HW_REGISTER_RW( 0x7e104000 ) 7 | #define RNG_CTRL_MASK 0xffffffff 8 | #define RNG_CTRL_WIDTH 32 9 | #define RNG_STATUS HW_REGISTER_RW( 0x7e104004 ) 10 | #define RNG_STATUS_MASK 0xffffffff 11 | #define RNG_STATUS_WIDTH 32 12 | #define RNG_DATA HW_REGISTER_RW( 0x7e104008 ) 13 | #define RNG_DATA_MASK 0xffffffff 14 | #define RNG_DATA_WIDTH 32 15 | #define RNG_FF_THRESHOLD HW_REGISTER_RW( 0x7e10400c ) 16 | #define RNG_FF_THRESHOLD_MASK 0xffffffff 17 | #define RNG_FF_THRESHOLD_WIDTH 32 18 | #define RNG_INT_MASK HW_REGISTER_RW( 0x7e104010 ) 19 | #define RNG_INT_MASK_MASK 0xffffffff 20 | #define RNG_INT_MASK_WIDTH 32 21 | 22 | #else 23 | 24 | // This file was generated by the create_regs script 25 | #define RNG_BASE 0x7ee03000 26 | #define RNG_APB_ID 0x20726e67 27 | #define RNG_CTRL HW_REGISTER_RW( 0x7ee03000 ) 28 | #define RNG_CTRL_MASK 0xffffffff 29 | #define RNG_CTRL_WIDTH 32 30 | #define RNG_STATUS HW_REGISTER_RW( 0x7ee03004 ) 31 | #define RNG_STATUS_MASK 0xffffffff 32 | #define RNG_STATUS_WIDTH 32 33 | #define RNG_DATA HW_REGISTER_RW( 0x7ee03008 ) 34 | #define RNG_DATA_MASK 0xffffffff 35 | #define RNG_DATA_WIDTH 32 36 | #define RNG_FF_THRESHOLD HW_REGISTER_RW( 0x7ee0300c ) 37 | #define RNG_FF_THRESHOLD_MASK 0xffffffff 38 | #define RNG_FF_THRESHOLD_WIDTH 32 39 | #define RNG_INT_MASK HW_REGISTER_RW( 0x7ee03010 ) 40 | #define RNG_INT_MASK_MASK 0xffffffff 41 | #define RNG_INT_MASK_WIDTH 32 42 | 43 | #endif 44 | -------------------------------------------------------------------------------- /drivers/BCM2708UsbPhy.cc: -------------------------------------------------------------------------------- 1 | /* 2 | * VideoCore4_Drivers 3 | * Copyright (c) 2017 Authors of rpi-open-firmware 4 | * 5 | * USB PHY initialization driver. 6 | */ 7 | 8 | #include 9 | #include 10 | #define FLAG_BUSY (1 << 31) 11 | 12 | struct BCM2708UsbPhy : IODevice { 13 | IODriverConstructor(BCM2708UsbPhy); 14 | 15 | void wait() { 16 | while(USB_GMDIOCSR & FLAG_BUSY); 17 | } 18 | 19 | void write_bare(int reg, uint16_t value, int type) { 20 | reg &= 0x1F; 21 | 22 | /* precede MDIO access */ 23 | USB_GMDIOGEN = 0xFFFFFFFF; 24 | wait(); 25 | 26 | /* write the actual value, with flags */ 27 | USB_GMDIOGEN = type | (reg << 18) | value; 28 | wait(); 29 | 30 | /* dummy write due to errata; see BCM2835 peripheral manual */ 31 | USB_GMDIOGEN = 0; 32 | wait(); 33 | } 34 | 35 | uint16_t usb_read(int reg) { 36 | write_bare(reg, 0, 0x60020000); 37 | return USB_MDIO_CSR & 0xFFFFF; 38 | } 39 | 40 | virtual void usb_write(int reg, uint16_t value) { 41 | write_bare(reg, value, 0x50020000); 42 | } 43 | 44 | virtual void start() override { 45 | IODriverLog("starting ..."); 46 | 47 | /* enable clock */ 48 | A2W_XOSC_CTRL |= A2W_PASSWORD | A2W_XOSC_CTRL_USBEN_SET; 49 | while(!(A2W_XOSC_CTRL & A2W_XOSC_CTRL_USBOK_SET)); 50 | 51 | CM_TDCLKEN |= CM_PASSWORD | CM_TDCLKEN_USBDFT_SET; 52 | 53 | /* the LAN_RUN pin is GPIO6 according to the schematic */ 54 | /* edit: it's different between models. 55 | * see https://github.com/raspberrypi/firmware/blob/master/extra/dt-blob.dts#L711 56 | * e.g. on the RPi 2B it's pin 31 57 | */ 58 | 59 | unsigned int ra = GP_FSEL3; 60 | ra &= ~(7 << 3); 61 | ra |= 1 << 3; 62 | GP_FSEL3 = ra; 63 | 64 | udelay(300); 65 | GP_CLR0 = (1 << 31); 66 | udelay(300); 67 | GP_SET0 = (1 << 31); 68 | udelay(300); 69 | 70 | IODriverLog("LAN reset"); 71 | 72 | USB_GMDIOCSR = (1 << 18); 73 | 74 | usb_write(0x15, 272 /* devmode ? 4369 : 272*/); 75 | usb_write(0x19, 0x4); 76 | usb_write(0x18, 0x10); 77 | usb_write(0x1D, 0x4); 78 | usb_write(0x17, 5682); 79 | 80 | while((usb_read(0x1B) & (1 << 7)) != 0); 81 | 82 | USB_GVBUSDRV &= ~(1 << 7); 83 | 84 | usb_write(0x1E, 0x8000); 85 | 86 | usb_write(0x1D, 0x5000); 87 | usb_write(0x19, 0xC004); 88 | usb_write(0x20, 0x1C2F); 89 | usb_write(0x22, 0x0100); 90 | usb_write(0x24, 0x0010); 91 | usb_write(0x19, 0x0004); 92 | 93 | USB_GVBUSDRV = USB_GVBUSDRV & 0xFFF0FFFF | 0xD0000; 94 | udelay(300); 95 | mmio_write32(0x7E980400 + 3084, 0x20402700); 96 | udelay(300); 97 | mmio_write32(0x7E980400, 1); 98 | udelay(300); 99 | mmio_write32(0x7E980404, 0xBB80); 100 | udelay(300); 101 | 102 | IODriverLog("started"); 103 | 104 | IODevice::start(); 105 | } 106 | 107 | virtual void init() override { 108 | setName("BCM2708UsbPhy"); 109 | setTag('USBP'); 110 | } 111 | }; 112 | 113 | IODriverCreateSingletonInstance(BCM2708UsbPhy); 114 | 115 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/fatfs/diskio.h: -------------------------------------------------------------------------------- 1 | /*-----------------------------------------------------------------------/ 2 | / Low level disk interface modlue include file (C)ChaN, 2014 / 3 | /-----------------------------------------------------------------------*/ 4 | 5 | #ifndef _DISKIO_DEFINED 6 | #define _DISKIO_DEFINED 7 | 8 | #ifdef __cplusplus 9 | extern "C" { 10 | #endif 11 | 12 | #include "integer.h" 13 | 14 | 15 | /* Status of Disk Functions */ 16 | typedef BYTE DSTATUS; 17 | 18 | /* Results of Disk Functions */ 19 | typedef enum { 20 | RES_OK = 0, /* 0: Successful */ 21 | RES_ERROR, /* 1: R/W Error */ 22 | RES_WRPRT, /* 2: Write Protected */ 23 | RES_NOTRDY, /* 3: Not Ready */ 24 | RES_PARERR /* 4: Invalid Parameter */ 25 | } DRESULT; 26 | 27 | 28 | /*---------------------------------------*/ 29 | /* Prototypes for disk control functions */ 30 | 31 | 32 | DSTATUS disk_initialize (BYTE pdrv); 33 | DSTATUS disk_status (BYTE pdrv); 34 | DRESULT disk_read (BYTE pdrv, BYTE* buff, DWORD sector, UINT count); 35 | DRESULT disk_write (BYTE pdrv, const BYTE* buff, DWORD sector, UINT count); 36 | DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void* buff); 37 | 38 | 39 | /* Disk Status Bits (DSTATUS) */ 40 | 41 | #define STA_NOINIT 0x01 /* Drive not initialized */ 42 | #define STA_NODISK 0x02 /* No medium in the drive */ 43 | #define STA_PROTECT 0x04 /* Write protected */ 44 | 45 | 46 | /* Command code for disk_ioctrl fucntion */ 47 | 48 | /* Generic command (Used by FatFs) */ 49 | #define CTRL_SYNC 0 /* Complete pending write process (needed at _FS_READONLY == 0) */ 50 | #define GET_SECTOR_COUNT 1 /* Get media size (needed at _USE_MKFS == 1) */ 51 | #define GET_SECTOR_SIZE 2 /* Get sector size (needed at _MAX_SS != _MIN_SS) */ 52 | #define GET_BLOCK_SIZE 3 /* Get erase block size (needed at _USE_MKFS == 1) */ 53 | #define CTRL_TRIM 4 /* Inform device that the data on the block of sectors is no longer used (needed at _USE_TRIM == 1) */ 54 | 55 | /* Generic command (Not used by FatFs) */ 56 | #define CTRL_POWER 5 /* Get/Set power status */ 57 | #define CTRL_LOCK 6 /* Lock/Unlock media removal */ 58 | #define CTRL_EJECT 7 /* Eject media */ 59 | #define CTRL_FORMAT 8 /* Create physical format on the media */ 60 | 61 | /* MMC/SDC specific ioctl command */ 62 | #define MMC_GET_TYPE 10 /* Get card type */ 63 | #define MMC_GET_CSD 11 /* Get CSD */ 64 | #define MMC_GET_CID 12 /* Get CID */ 65 | #define MMC_GET_OCR 13 /* Get OCR */ 66 | #define MMC_GET_SDSTAT 14 /* Get SD status */ 67 | #define ISDIO_READ 55 /* Read data form SD iSDIO register */ 68 | #define ISDIO_WRITE 56 /* Write data to SD iSDIO register */ 69 | #define ISDIO_MRITE 57 /* Masked write data to SD iSDIO register */ 70 | 71 | /* ATA/CF specific ioctl command */ 72 | #define ATA_GET_REV 20 /* Get F/W revision */ 73 | #define ATA_GET_MODEL 21 /* Get model name */ 74 | #define ATA_GET_SN 22 /* Get serial number */ 75 | 76 | #ifdef __cplusplus 77 | } 78 | #endif 79 | 80 | #endif 81 | -------------------------------------------------------------------------------- /arm_chainloader/Makefile: -------------------------------------------------------------------------------- 1 | 2 | TARGET_ARM_CHAINLOADER = arm_chainloader.bin 3 | 4 | SRCS = \ 5 | start.s \ 6 | lib_armv6/arm_bcopy.s \ 7 | lib_armv6/arm_bzero.s \ 8 | lib_armv6/arm_locore.s \ 9 | lib_armv6/arm_strlen.s \ 10 | lib_armv6/arm_memcmp.s \ 11 | lib_armv6/string_misc.c \ 12 | drivers/uart.c \ 13 | drivers/cprman.cc \ 14 | drivers/libfdt/fdt.c \ 15 | drivers/libfdt/fdt_ro.c \ 16 | drivers/libfdt/fdt_wip.c \ 17 | drivers/libfdt/fdt_rw.c \ 18 | drivers/libfdt/fdt_strerror.c \ 19 | drivers/fatfs/ff.c \ 20 | drivers/sdhost_impl.cc \ 21 | drivers/mbr_disk.cc \ 22 | drivers/mailbox.cc \ 23 | ../lib/xprintf.c \ 24 | ../lib/panic.c \ 25 | ../lib/udelay.c \ 26 | ../lib/cxx_runtime.c \ 27 | ../lib/tlsf/tlsf.c \ 28 | loader.cc \ 29 | trap.cc \ 30 | main.c 31 | 32 | ARCH = armv6zk 33 | 34 | BUILD_DIR = build 35 | TARGET_BUILD_DIR = $(BUILD_DIR)/$(ARCH)-objects 36 | PRODUCT_DIRECTORY = $(BUILD_DIR) 37 | 38 | NO_COLOR="" 39 | OK_COLOR="" 40 | ERROR_COLOR="" 41 | WARN_COLOR="" 42 | 43 | .PHONY: default all clean create_build_directory device 44 | 45 | default: $(TARGET_ARM_CHAINLOADER) 46 | 47 | OBJ := $(addprefix $(TARGET_BUILD_DIR)/, $(addsuffix .o, $(basename $(SRCS)))) 48 | 49 | CROSS_COMPILE ?= arm-none-eabi- 50 | CC = $(CROSS_COMPILE)gcc 51 | CXX = $(CROSS_COMPILE)gcc 52 | AS = $(CC) 53 | OBJCOPY = $(CROSS_COMPILE)objcopy 54 | LINKFLAGS = -nostdlib -march=$(ARCH) -Wl,--build-id=none -T linker.lds 55 | COMMON_FLAGS = -c -nostdlib -nostartfiles -ffreestanding -march=$(ARCH) -I../ -I./ -I./drivers/libfdt/ \ 56 | -mfpu=vfp -mfloat-abi=hard -mtune=arm1176jzf-s 57 | 58 | CFLAGS = $(COMMON_FLAGS) -std=c11 59 | CXXFLAGS = $(COMMON_FLAGS) -std=c++11 -fno-exceptions -fno-rtti 60 | ASFLAGS = $(COMMON_FLAGS) -x assembler-with-cpp 61 | 62 | HEADERS := \ 63 | $(shell find . -type f -name '*.h') \ 64 | $(shell find . -type f -name '*.hpp') 65 | 66 | create_build_directory: 67 | @mkdir -p $(TARGET_BUILD_DIR) 68 | @mkdir -p $(PRODUCT_DIRECTORY) 69 | 70 | CREATE_SUBDIR = \ 71 | @DIR="$(dir $@)"; \ 72 | if [ ! -d $$DIR ]; then mkdir -p $$DIR; fi 73 | 74 | # 75 | # rules to build c/asm files. 76 | # 77 | $(TARGET_BUILD_DIR)/%.o: %.c $(HEADERS) 78 | $(CREATE_SUBDIR) 79 | @echo $(WARN_COLOR)CC $(NO_COLOR) $@ 80 | @$(CC) $(CFLAGS) $< -o $@ 81 | 82 | $(TARGET_BUILD_DIR)/%.o: %.cc $(HEADERS) 83 | $(CREATE_SUBDIR) 84 | @echo $(WARN_COLOR)CXX $(NO_COLOR) $@ 85 | @$(CXX) $(CXXFLAGS) $< -o $@ 86 | 87 | $(TARGET_BUILD_DIR)/%.o: %.s $(HEADERS) 88 | $(CREATE_SUBDIR) 89 | @echo $(WARN_COLOR)AS $(NO_COLOR) $@ 90 | @$(AS) $(ASFLAGS) $< -o $@ 91 | 92 | .PRECIOUS: $(OBJ) 93 | 94 | $(TARGET_ARM_CHAINLOADER): create_build_directory $(OBJ) 95 | @echo $(WARN_COLOR)LD $(NO_COLOR) $@.elf 96 | @$(CC) $(LINKFLAGS) $(OBJ) -o $(PRODUCT_DIRECTORY)/$@.elf -lgcc 97 | @echo $(WARN_COLOR)OBJ$(NO_COLOR) $@ 98 | @$(OBJCOPY) -O binary $(PRODUCT_DIRECTORY)/$@.elf $(PRODUCT_DIRECTORY)/$@ 99 | 100 | clean: 101 | @echo $(ERROR_COLOR)CLEAN$(NO_COLOR) 102 | @-rm -rf ./$(BUILD_DIR) 103 | -------------------------------------------------------------------------------- /hardware.h: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | Glue code for Broadcom's register definitions as well as certain registers 17 | that are missing from the release. This is also used by ARM. 18 | 19 | =============================================================================*/ 20 | 21 | #pragma once 22 | 23 | #define VC4_PERIPH_BASE 0x7E000000 24 | #define ARM_PERIPH_BASE 0x3F000000 25 | 26 | #define VC4_TO_ARM_PERIPH(addr) ((addr - VC4_PERIPH_BASE) + ARM_PERIPH_BASE) 27 | 28 | #define VC4_CPUID_BCM2709_PLUS 0x40 29 | 30 | #ifdef __arm__ 31 | #define HW_REGISTER_RW(addr) (*(volatile unsigned int *)(VC4_TO_ARM_PERIPH(addr))) 32 | #define HW_REGISTER_RO(addr) (*(const volatile unsigned int *)(VC4_TO_ARM_PERIPH(addr))) 33 | #else 34 | #define HW_REGISTER_RW(addr) (*(volatile unsigned int *)(addr)) 35 | #define HW_REGISTER_RO(addr) (*(const volatile unsigned int *)(addr)) 36 | #endif 37 | 38 | #define mmio_read32(addr) HW_REGISTER_RW(addr) 39 | #define mmio_write32(addr, value) (HW_REGISTER_RW(addr) = value) 40 | 41 | #include "broadcom/hardware_vc4.h" 42 | 43 | /* 44 | * this is not included by hardware_vc4.h 45 | */ 46 | #include "broadcom/bcm2708_chip/aux_io.h" 47 | #include "broadcom/bcm2708_chip/testbus.h" 48 | 49 | #define RAM_SIZE_1GB 0 50 | #define RAM_SIZE_512MB 1 51 | #define RAM_SIZE_256MB 2 52 | #define RAM_SIZE_128MB 3 53 | #define RAM_SIZE_UNKNOWN 4 54 | 55 | /* 56 | * LPDDR mode registers. 57 | */ 58 | #define LPDDR2_MR_DEVICE_INFO 0 59 | #define LPDDR2_MR_DEVICE_FEATURE_1 1 60 | #define LPDDR2_MR_DEVICE_FEATURE_2 2 61 | #define LPDDR2_MR_IO_CONFIG 3 62 | #define LPDDR2_MR_TEMPERATURE 4 63 | #define LPDDR2_MR_MANUFACTURER_ID 5 64 | #define LPDDR2_MR_REV_1 6 65 | #define LPDDR2_MR_REV_2 7 66 | #define LPDDR2_MR_METRICS 8 67 | #define LPDDR2_MR_CALIBRATION 10 68 | 69 | #define CM_SRC_GND 0 70 | #define CM_SRC_OSC 1 71 | #define CM_SRC_TESTDEBUG0 2 72 | #define CM_SRC_TESTDEBUG1 3 73 | #define CM_SRC_PLLA_CORE 4 74 | #define CM_SRC_PLLA_PER 4 75 | #define CM_SRC_PLLC_CORE0 5 76 | #define CM_SRC_PLLC_PER 5 77 | #define CM_SRC_PLLC_CORE1 8 78 | #define CM_SRC_PLLD_CORE 6 79 | #define CM_SRC_PLLD_PER 6 80 | #define CM_SRC_PLLH_AUX 7 81 | #define CM_SRC_PLLC_CORE1 8 82 | #define CM_SRC_PLLC_CORE2 9 83 | 84 | typedef struct { 85 | uint32_t sdram_size; 86 | uint32_t vpu_cpuid; 87 | uint32_t reserved[3]; 88 | } firmware_arm_data_t; 89 | 90 | #ifdef __arm__ 91 | extern firmware_arm_data_t g_FirmwareData; 92 | #endif -------------------------------------------------------------------------------- /arm_chainloader/drivers/libfdt/fdt_empty_tree.c: -------------------------------------------------------------------------------- 1 | /* 2 | * libfdt - Flat Device Tree manipulation 3 | * Copyright (C) 2012 David Gibson, IBM Corporation. 4 | * 5 | * libfdt is dual licensed: you can use it either under the terms of 6 | * the GPL, or the BSD license, at your option. 7 | * 8 | * a) This library is free software; you can redistribute it and/or 9 | * modify it under the terms of the GNU General Public License as 10 | * published by the Free Software Foundation; either version 2 of the 11 | * License, or (at your option) any later version. 12 | * 13 | * This library is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU General Public 19 | * License along with this library; if not, write to the Free 20 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 21 | * MA 02110-1301 USA 22 | * 23 | * Alternatively, 24 | * 25 | * b) Redistribution and use in source and binary forms, with or 26 | * without modification, are permitted provided that the following 27 | * conditions are met: 28 | * 29 | * 1. Redistributions of source code must retain the above 30 | * copyright notice, this list of conditions and the following 31 | * disclaimer. 32 | * 2. Redistributions in binary form must reproduce the above 33 | * copyright notice, this list of conditions and the following 34 | * disclaimer in the documentation and/or other materials 35 | * provided with the distribution. 36 | * 37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 38 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 39 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 40 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 42 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 43 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 44 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 45 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 46 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 47 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 48 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 49 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 50 | */ 51 | #include "libfdt_env.h" 52 | 53 | #include 54 | #include 55 | 56 | #include "libfdt_internal.h" 57 | 58 | int fdt_create_empty_tree(void *buf, int bufsize) 59 | { 60 | int err; 61 | 62 | err = fdt_create(buf, bufsize); 63 | if (err) 64 | return err; 65 | 66 | err = fdt_finish_reservemap(buf); 67 | if (err) 68 | return err; 69 | 70 | err = fdt_begin_node(buf, ""); 71 | if (err) 72 | return err; 73 | 74 | err = fdt_end_node(buf); 75 | if (err) 76 | return err; 77 | 78 | err = fdt_finish(buf); 79 | if (err) 80 | return err; 81 | 82 | return fdt_open_into(buf, buf, bufsize); 83 | } 84 | 85 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/pixel_valve0.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define PIXELVALVE0_BASE 0x7e206000 3 | #define PIXELVALVE0_APB_ID 0x70697876 4 | #define PIXELVALVE0_C HW_REGISTER_RW( 0x7e206000 ) 5 | #define PIXELVALVE0_C_MASK 0x00ffffff 6 | #define PIXELVALVE0_C_WIDTH 24 7 | #define PIXELVALVE0_VC HW_REGISTER_RW( 0x7e206004 ) 8 | #define PIXELVALVE0_VC_MASK 0x007fffff 9 | #define PIXELVALVE0_VC_WIDTH 23 10 | #define PIXELVALVE0_VSYNCD_EVEN HW_REGISTER_RW( 0x7e206008 ) 11 | #define PIXELVALVE0_VSYNCD_EVEN_MASK 0x0001ffff 12 | #define PIXELVALVE0_VSYNCD_EVEN_WIDTH 17 13 | #define PIXELVALVE0_HORZA HW_REGISTER_RW( 0x7e20600c ) 14 | #define PIXELVALVE0_HORZA_MASK 0xffffffff 15 | #define PIXELVALVE0_HORZA_WIDTH 32 16 | #define PIXELVALVE0_HORZB HW_REGISTER_RW( 0x7e206010 ) 17 | #define PIXELVALVE0_HORZB_MASK 0xffffffff 18 | #define PIXELVALVE0_HORZB_WIDTH 32 19 | #define PIXELVALVE0_VERTA HW_REGISTER_RW( 0x7e206014 ) 20 | #define PIXELVALVE0_VERTA_MASK 0xffffffff 21 | #define PIXELVALVE0_VERTA_WIDTH 32 22 | #define PIXELVALVE0_VERTB HW_REGISTER_RW( 0x7e206018 ) 23 | #define PIXELVALVE0_VERTB_MASK 0xffffffff 24 | #define PIXELVALVE0_VERTB_WIDTH 32 25 | #define PIXELVALVE0_VERTA_EVEN HW_REGISTER_RW( 0x7e20601c ) 26 | #define PIXELVALVE0_VERTA_EVEN_MASK 0xffffffff 27 | #define PIXELVALVE0_VERTA_EVEN_WIDTH 32 28 | #define PIXELVALVE0_VERTB_EVEN HW_REGISTER_RW( 0x7e206020 ) 29 | #define PIXELVALVE0_VERTB_EVEN_MASK 0xffffffff 30 | #define PIXELVALVE0_VERTB_EVEN_WIDTH 32 31 | #define PIXELVALVE0_INTEN HW_REGISTER_RW( 0x7e206024 ) 32 | #define PIXELVALVE0_INTEN_MASK 0x000003ff 33 | #define PIXELVALVE0_INTEN_WIDTH 10 34 | #define PIXELVALVE0_INTSTAT HW_REGISTER_RW( 0x7e206028 ) 35 | #define PIXELVALVE0_INTSTAT_MASK 0x000003ff 36 | #define PIXELVALVE0_INTSTAT_WIDTH 10 37 | #define PIXELVALVE0_STAT HW_REGISTER_RW( 0x7e20602c ) 38 | #define PIXELVALVE0_STAT_MASK 0x000003ff 39 | #define PIXELVALVE0_STAT_WIDTH 10 40 | #define PIXELVALVE0_DSI_HACT_ACT HW_REGISTER_RW( 0x7e206030 ) 41 | #define PIXELVALVE0_DSI_HACT_ACT_MASK 0x0000ffff 42 | #define PIXELVALVE0_DSI_HACT_ACT_WIDTH 16 43 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/pixel_valve1.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define PIXELVALVE1_BASE 0x7e207000 3 | #define PIXELVALVE1_APB_ID 0x70697876 4 | #define PIXELVALVE1_C HW_REGISTER_RW( 0x7e207000 ) 5 | #define PIXELVALVE1_C_MASK 0x00ffffff 6 | #define PIXELVALVE1_C_WIDTH 24 7 | #define PIXELVALVE1_VC HW_REGISTER_RW( 0x7e207004 ) 8 | #define PIXELVALVE1_VC_MASK 0x007fffff 9 | #define PIXELVALVE1_VC_WIDTH 23 10 | #define PIXELVALVE1_VSYNCD_EVEN HW_REGISTER_RW( 0x7e207008 ) 11 | #define PIXELVALVE1_VSYNCD_EVEN_MASK 0x0001ffff 12 | #define PIXELVALVE1_VSYNCD_EVEN_WIDTH 17 13 | #define PIXELVALVE1_HORZA HW_REGISTER_RW( 0x7e20700c ) 14 | #define PIXELVALVE1_HORZA_MASK 0xffffffff 15 | #define PIXELVALVE1_HORZA_WIDTH 32 16 | #define PIXELVALVE1_HORZB HW_REGISTER_RW( 0x7e207010 ) 17 | #define PIXELVALVE1_HORZB_MASK 0xffffffff 18 | #define PIXELVALVE1_HORZB_WIDTH 32 19 | #define PIXELVALVE1_VERTA HW_REGISTER_RW( 0x7e207014 ) 20 | #define PIXELVALVE1_VERTA_MASK 0xffffffff 21 | #define PIXELVALVE1_VERTA_WIDTH 32 22 | #define PIXELVALVE1_VERTB HW_REGISTER_RW( 0x7e207018 ) 23 | #define PIXELVALVE1_VERTB_MASK 0xffffffff 24 | #define PIXELVALVE1_VERTB_WIDTH 32 25 | #define PIXELVALVE1_VERTA_EVEN HW_REGISTER_RW( 0x7e20701c ) 26 | #define PIXELVALVE1_VERTA_EVEN_MASK 0xffffffff 27 | #define PIXELVALVE1_VERTA_EVEN_WIDTH 32 28 | #define PIXELVALVE1_VERTB_EVEN HW_REGISTER_RW( 0x7e207020 ) 29 | #define PIXELVALVE1_VERTB_EVEN_MASK 0xffffffff 30 | #define PIXELVALVE1_VERTB_EVEN_WIDTH 32 31 | #define PIXELVALVE1_INTEN HW_REGISTER_RW( 0x7e207024 ) 32 | #define PIXELVALVE1_INTEN_MASK 0x000003ff 33 | #define PIXELVALVE1_INTEN_WIDTH 10 34 | #define PIXELVALVE1_INTSTAT HW_REGISTER_RW( 0x7e207028 ) 35 | #define PIXELVALVE1_INTSTAT_MASK 0x000003ff 36 | #define PIXELVALVE1_INTSTAT_WIDTH 10 37 | #define PIXELVALVE1_STAT HW_REGISTER_RW( 0x7e20702c ) 38 | #define PIXELVALVE1_STAT_MASK 0x000003ff 39 | #define PIXELVALVE1_STAT_WIDTH 10 40 | #define PIXELVALVE1_DSI_HACT_ACT HW_REGISTER_RW( 0x7e207030 ) 41 | #define PIXELVALVE1_DSI_HACT_ACT_MASK 0x0000ffff 42 | #define PIXELVALVE1_DSI_HACT_ACT_WIDTH 16 43 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/pixel_valve2.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define PIXELVALVE2_BASE 0x7e807000 3 | #define PIXELVALVE2_APB_ID 0x70697876 4 | #define PIXELVALVE2_C HW_REGISTER_RW( 0x7e807000 ) 5 | #define PIXELVALVE2_C_MASK 0x00ffffff 6 | #define PIXELVALVE2_C_WIDTH 24 7 | #define PIXELVALVE2_VC HW_REGISTER_RW( 0x7e807004 ) 8 | #define PIXELVALVE2_VC_MASK 0x007fffff 9 | #define PIXELVALVE2_VC_WIDTH 23 10 | #define PIXELVALVE2_VSYNCD_EVEN HW_REGISTER_RW( 0x7e807008 ) 11 | #define PIXELVALVE2_VSYNCD_EVEN_MASK 0x0001ffff 12 | #define PIXELVALVE2_VSYNCD_EVEN_WIDTH 17 13 | #define PIXELVALVE2_HORZA HW_REGISTER_RW( 0x7e80700c ) 14 | #define PIXELVALVE2_HORZA_MASK 0xffffffff 15 | #define PIXELVALVE2_HORZA_WIDTH 32 16 | #define PIXELVALVE2_HORZB HW_REGISTER_RW( 0x7e807010 ) 17 | #define PIXELVALVE2_HORZB_MASK 0xffffffff 18 | #define PIXELVALVE2_HORZB_WIDTH 32 19 | #define PIXELVALVE2_VERTA HW_REGISTER_RW( 0x7e807014 ) 20 | #define PIXELVALVE2_VERTA_MASK 0xffffffff 21 | #define PIXELVALVE2_VERTA_WIDTH 32 22 | #define PIXELVALVE2_VERTB HW_REGISTER_RW( 0x7e807018 ) 23 | #define PIXELVALVE2_VERTB_MASK 0xffffffff 24 | #define PIXELVALVE2_VERTB_WIDTH 32 25 | #define PIXELVALVE2_VERTA_EVEN HW_REGISTER_RW( 0x7e80701c ) 26 | #define PIXELVALVE2_VERTA_EVEN_MASK 0xffffffff 27 | #define PIXELVALVE2_VERTA_EVEN_WIDTH 32 28 | #define PIXELVALVE2_VERTB_EVEN HW_REGISTER_RW( 0x7e807020 ) 29 | #define PIXELVALVE2_VERTB_EVEN_MASK 0xffffffff 30 | #define PIXELVALVE2_VERTB_EVEN_WIDTH 32 31 | #define PIXELVALVE2_INTEN HW_REGISTER_RW( 0x7e807024 ) 32 | #define PIXELVALVE2_INTEN_MASK 0x000003ff 33 | #define PIXELVALVE2_INTEN_WIDTH 10 34 | #define PIXELVALVE2_INTSTAT HW_REGISTER_RW( 0x7e807028 ) 35 | #define PIXELVALVE2_INTSTAT_MASK 0x000003ff 36 | #define PIXELVALVE2_INTSTAT_WIDTH 10 37 | #define PIXELVALVE2_STAT HW_REGISTER_RW( 0x7e80702c ) 38 | #define PIXELVALVE2_STAT_MASK 0x000003ff 39 | #define PIXELVALVE2_STAT_WIDTH 10 40 | #define PIXELVALVE2_DSI_HACT_ACT HW_REGISTER_RW( 0x7e807030 ) 41 | #define PIXELVALVE2_DSI_HACT_ACT_MASK 0x0000ffff 42 | #define PIXELVALVE2_DSI_HACT_ACT_WIDTH 16 43 | -------------------------------------------------------------------------------- /trap.c: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | VideoCoreIV second level exception handlers. 17 | 18 | =============================================================================*/ 19 | 20 | #include 21 | #include 22 | #include 23 | #include 24 | #include 25 | 26 | static const char* g_ExceptionNames[] = { VC4_EXC_NAMES }; 27 | 28 | static const char* exception_name(uint32_t n) { 29 | if (n >= (sizeof(g_ExceptionNames)/4)) 30 | return "unknown"; 31 | return g_ExceptionNames[n]; 32 | } 33 | 34 | #define REGISTER_FORMAT_STRING(prefix) \ 35 | prefix " r0: 0x%08x r1: 0x%08x r2: 0x%08x r3: 0x%08x\n" \ 36 | prefix " r4: 0x%08x r5: 0x%08x r6: 0x%08x r7: 0x%08x\n" \ 37 | prefix " r8: 0x%08x r9: 0x%08x r10: 0x%08x r11: 0x%08x\n" \ 38 | prefix " r12: 0x%08x r13: 0x%08x r14: 0x%08x r15: 0x%08x\n" \ 39 | prefix " pc: 0x%08x lr: 0x%08x sr: 0x%08x\n" 40 | 41 | static void print_vpu_state(vc4_saved_state_t* pcb) { 42 | printf("VPU registers:\n"); 43 | 44 | printf( 45 | REGISTER_FORMAT_STRING(" "), 46 | pcb->r0, 47 | pcb->r1, 48 | pcb->r2, 49 | pcb->r3, 50 | pcb->r4, 51 | pcb->r5, 52 | pcb->r6, 53 | pcb->r7, 54 | pcb->r8, 55 | pcb->r9, 56 | pcb->r10, 57 | pcb->r11, 58 | pcb->r12, 59 | pcb->r13, 60 | pcb->r14, 61 | pcb->r15, 62 | pcb->pc, 63 | pcb->lr, 64 | pcb->sr 65 | ); 66 | 67 | printf("Exception info (IC0):\n"); 68 | 69 | printf( 70 | " src0: 0x%08x src1: 0x%08x vaddr: 0x%08x\n" 71 | " C: 0x%08x S: 0x%08x\n", 72 | IC0_SRC0, 73 | IC0_SRC1, 74 | IC0_VADDR, 75 | IC0_C, 76 | IC0_S 77 | ); 78 | 79 | printf("Exception info (IC1):\n"); 80 | 81 | printf( 82 | " src0: 0x%08x src1: 0x%08x vaddr: 0x%08x\n" 83 | " C: 0x%08x S: 0x%08x\n", 84 | IC1_SRC0, 85 | IC1_SRC1, 86 | IC1_VADDR, 87 | IC1_C, 88 | IC1_S 89 | ); 90 | } 91 | 92 | void sleh_fatal(vc4_saved_state_t* pcb, uint32_t n) { 93 | printf("Fatal VPU Exception: %s\n", exception_name(n)); 94 | 95 | print_vpu_state(pcb); 96 | 97 | printf("We are hanging here ...\n"); 98 | 99 | hang_cpu(); 100 | } 101 | 102 | extern void arm_monitor_interrupt(); 103 | 104 | void sleh_irq(vc4_saved_state_t* pcb, uint32_t tp) { 105 | uint32_t status = IC0_S; 106 | uint32_t source = status & 0xFF; 107 | 108 | printf("VPU Received interrupt from source %d\n", source); 109 | 110 | if (source == INTERRUPT_ARM) { 111 | arm_monitor_interrupt(); 112 | } else { 113 | print_vpu_state(pcb); 114 | panic("unknown interrupt source!"); 115 | } 116 | } 117 | -------------------------------------------------------------------------------- /arm_chainloader/lib_armv6/string_misc.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 1999 Apple Computer, Inc. All rights reserved. 3 | * 4 | * @APPLE_LICENSE_HEADER_START@ 5 | * 6 | * The contents of this file constitute Original Code as defined in and 7 | * are subject to the Apple Public Source License Version 1.1 (the 8 | * "License"). You may not use this file except in compliance with the 9 | * License. Please obtain a copy of the License at 10 | * http://www.apple.com/publicsource and read it before using this file. 11 | * 12 | * This Original Code and all software distributed under the License are 13 | * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER 14 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, 15 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, 16 | * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the 17 | * License for the specific language governing rights and limitations 18 | * under the License. 19 | * 20 | * @APPLE_LICENSE_HEADER_END@ 21 | */ 22 | /* 23 | * Copyright (c) 1990, 1993 24 | * The Regents of the University of California. All rights reserved. 25 | * 26 | * This code is derived from software contributed to Berkeley by 27 | * Chris Torek. 28 | * 29 | * Redistribution and use in source and binary forms, with or without 30 | * modification, are permitted provided that the following conditions 31 | * are met: 32 | * 1. Redistributions of source code must retain the above copyright 33 | * notice, this list of conditions and the following disclaimer. 34 | * 2. Redistributions in binary form must reproduce the above copyright 35 | * notice, this list of conditions and the following disclaimer in the 36 | * documentation and/or other materials provided with the distribution. 37 | * 3. All advertising materials mentioning features or use of this software 38 | * must display the following acknowledgement: 39 | * This product includes software developed by the University of 40 | * California, Berkeley and its contributors. 41 | * 4. Neither the name of the University nor the names of its contributors 42 | * may be used to endorse or promote products derived from this software 43 | * without specific prior written permission. 44 | * 45 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 46 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 47 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 48 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 49 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 50 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 51 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 52 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 53 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 54 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 55 | * SUCH DAMAGE. 56 | */ 57 | 58 | #include 59 | 60 | void * 61 | memchr(s, c, n) 62 | const void *s; 63 | register unsigned char c; 64 | register size_t n; 65 | { 66 | if (n != 0) { 67 | register const unsigned char *p = s; 68 | 69 | do { 70 | if (*p++ == c) 71 | return ((void *)(p - 1)); 72 | } while (--n != 0); 73 | } 74 | return (NULL); 75 | } 76 | 77 | 78 | size_t 79 | strnlen(const char *s, size_t maxlen) 80 | { 81 | size_t len; 82 | 83 | for (len = 0; len < maxlen; len++, s++) { 84 | if (!*s) 85 | break; 86 | } 87 | return (len); 88 | } -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/fpga_microblaze.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define FPGA_MB_BASE 0x7e20b700 3 | #define FPGA_MB_XSYS_BUILD_NUM HW_REGISTER_RO( 0x7e20b700 ) 4 | #define FPGA_MB_XSYS_BUILD_NUM_MASK 0xffffffff 5 | #define FPGA_MB_XSYS_BUILD_NUM_WIDTH 32 6 | #define FPGA_MB_XC0_BUILD_NUM HW_REGISTER_RO( 0x7e20b704 ) 7 | #define FPGA_MB_XC0_BUILD_NUM_MASK 0xffffffff 8 | #define FPGA_MB_XC0_BUILD_NUM_WIDTH 32 9 | #define FPGA_MB_XC1_BUILD_NUM HW_REGISTER_RO( 0x7e20b708 ) 10 | #define FPGA_MB_XC1_BUILD_NUM_MASK 0xffffffff 11 | #define FPGA_MB_XC1_BUILD_NUM_WIDTH 32 12 | #define FPGA_MB_XPERI_BUILD_NUM HW_REGISTER_RO( 0x7e20b70c ) 13 | #define FPGA_MB_XPERI_BUILD_NUM_MASK 0xffffffff 14 | #define FPGA_MB_XPERI_BUILD_NUM_WIDTH 32 15 | #define FPGA_MB_XH264_BUILD_NUM HW_REGISTER_RO( 0x7e20b710 ) 16 | #define FPGA_MB_XH264_BUILD_NUM_MASK 0xffffffff 17 | #define FPGA_MB_XH264_BUILD_NUM_WIDTH 32 18 | #define FPGA_MB_XV3D_BUILD_NUM HW_REGISTER_RO( 0x7e20b714 ) 19 | #define FPGA_MB_XV3D_BUILD_NUM_MASK 0xffffffff 20 | #define FPGA_MB_XV3D_BUILD_NUM_WIDTH 32 21 | #define FPGA_MB_XSLC1_BUILD_NUM HW_REGISTER_RO( 0x7e20b718 ) 22 | #define FPGA_MB_XSLC1_BUILD_NUM_MASK 0xffffffff 23 | #define FPGA_MB_XSLC1_BUILD_NUM_WIDTH 32 24 | #define FPGA_MB_XSLC2_BUILD_NUM HW_REGISTER_RO( 0x7e20b71c ) 25 | #define FPGA_MB_XSLC2_BUILD_NUM_MASK 0xffffffff 26 | #define FPGA_MB_XSLC2_BUILD_NUM_WIDTH 32 27 | #define FPGA_MB_XSLC3_BUILD_NUM HW_REGISTER_RO( 0x7e20b720 ) 28 | #define FPGA_MB_XSLC3_BUILD_NUM_MASK 0xffffffff 29 | #define FPGA_MB_XSLC3_BUILD_NUM_WIDTH 32 30 | #define FPGA_MB_CORE_CLK_FREQ HW_REGISTER_RO( 0x7e20b724 ) 31 | #define FPGA_MB_CORE_CLK_FREQ_MASK 0xffffffff 32 | #define FPGA_MB_CORE_CLK_FREQ_WIDTH 32 33 | #define FPGA_MB_SDC_CLK_FREQ HW_REGISTER_RO( 0x7e20b728 ) 34 | #define FPGA_MB_SDC_CLK_FREQ_MASK 0xffffffff 35 | #define FPGA_MB_SDC_CLK_FREQ_WIDTH 32 36 | #define FPGA_MB_SDC_H264_FREQ HW_REGISTER_RO( 0x7e20b72c ) 37 | #define FPGA_MB_SDC_H264_FREQ_MASK 0xffffffff 38 | #define FPGA_MB_SDC_H264_FREQ_WIDTH 32 39 | #define FPGA_MB_SDC_V3D_FREQ HW_REGISTER_RO( 0x7e20b730 ) 40 | #define FPGA_MB_SDC_V3D_FREQ_MASK 0xffffffff 41 | #define FPGA_MB_SDC_V3D_FREQ_WIDTH 32 42 | #define FPGA_MB_SDC_ISP_FREQ HW_REGISTER_RO( 0x7e20b734 ) 43 | #define FPGA_MB_SDC_ISP_FREQ_MASK 0xffffffff 44 | #define FPGA_MB_SDC_ISP_FREQ_WIDTH 32 45 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/libfdt/fdt_addresses.c: -------------------------------------------------------------------------------- 1 | /* 2 | * libfdt - Flat Device Tree manipulation 3 | * Copyright (C) 2014 David Gibson 4 | * 5 | * libfdt is dual licensed: you can use it either under the terms of 6 | * the GPL, or the BSD license, at your option. 7 | * 8 | * a) This library is free software; you can redistribute it and/or 9 | * modify it under the terms of the GNU General Public License as 10 | * published by the Free Software Foundation; either version 2 of the 11 | * License, or (at your option) any later version. 12 | * 13 | * This library is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU General Public 19 | * License along with this library; if not, write to the Free 20 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 21 | * MA 02110-1301 USA 22 | * 23 | * Alternatively, 24 | * 25 | * b) Redistribution and use in source and binary forms, with or 26 | * without modification, are permitted provided that the following 27 | * conditions are met: 28 | * 29 | * 1. Redistributions of source code must retain the above 30 | * copyright notice, this list of conditions and the following 31 | * disclaimer. 32 | * 2. Redistributions in binary form must reproduce the above 33 | * copyright notice, this list of conditions and the following 34 | * disclaimer in the documentation and/or other materials 35 | * provided with the distribution. 36 | * 37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 38 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 39 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 40 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 42 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 43 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 44 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 45 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 46 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 47 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 48 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 49 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 50 | */ 51 | #include "libfdt_env.h" 52 | 53 | #include 54 | #include 55 | 56 | #include "libfdt_internal.h" 57 | 58 | int fdt_address_cells(const void *fdt, int nodeoffset) 59 | { 60 | const fdt32_t *ac; 61 | int val; 62 | int len; 63 | 64 | ac = fdt_getprop(fdt, nodeoffset, "#address-cells", &len); 65 | if (!ac) 66 | return 2; 67 | 68 | if (len != sizeof(*ac)) 69 | return -FDT_ERR_BADNCELLS; 70 | 71 | val = fdt32_to_cpu(*ac); 72 | if ((val <= 0) || (val > FDT_MAX_NCELLS)) 73 | return -FDT_ERR_BADNCELLS; 74 | 75 | return val; 76 | } 77 | 78 | int fdt_size_cells(const void *fdt, int nodeoffset) 79 | { 80 | const fdt32_t *sc; 81 | int val; 82 | int len; 83 | 84 | sc = fdt_getprop(fdt, nodeoffset, "#size-cells", &len); 85 | if (!sc) 86 | return 2; 87 | 88 | if (len != sizeof(*sc)) 89 | return -FDT_ERR_BADNCELLS; 90 | 91 | val = fdt32_to_cpu(*sc); 92 | if ((val < 0) || (val > FDT_MAX_NCELLS)) 93 | return -FDT_ERR_BADNCELLS; 94 | 95 | return val; 96 | } 97 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/cpi.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define CPI_BASE 0x7e800000 3 | #define CPI_APB_ID 0x20637069 4 | #define CPI_CPIS HW_REGISTER_RW( 0x7e800000 ) 5 | #define CPI_CPIS_MASK 0xc0000007 6 | #define CPI_CPIS_WIDTH 32 7 | #define CPI_CPIS__MSB 31 8 | #define CPI_CPIS__LSB 0 9 | #define CPI_CPIR HW_REGISTER_RW( 0x7e800004 ) 10 | #define CPI_CPIR_MASK 0xffffffff 11 | #define CPI_CPIR_WIDTH 32 12 | #define CPI_CPIR__MSB 31 13 | #define CPI_CPIR__LSB 0 14 | #define CPI_CPIF HW_REGISTER_RW( 0x7e800008 ) 15 | #define CPI_CPIF_MASK 0xffffffff 16 | #define CPI_CPIF_WIDTH 32 17 | #define CPI_CPIF__MSB 31 18 | #define CPI_CPIF__LSB 0 19 | #define CPI_CPIW HW_REGISTER_RW( 0x7e80000c ) 20 | #define CPI_CPIW_MASK 0xffffffff 21 | #define CPI_CPIW_WIDTH 32 22 | #define CPI_CPIW__MSB 31 23 | #define CPI_CPIW__LSB 0 24 | #define CPI_CPIWVC HW_REGISTER_RW( 0x7e800010 ) 25 | #define CPI_CPIWVC_MASK 0xffffffff 26 | #define CPI_CPIWVC_WIDTH 32 27 | #define CPI_CPIWVC__MSB 31 28 | #define CPI_CPIWVC__LSB 0 29 | #define CPI_CPIWVS HW_REGISTER_RW( 0x7e800014 ) 30 | #define CPI_CPIWVS_MASK 0xffffffff 31 | #define CPI_CPIWVS_WIDTH 32 32 | #define CPI_CPIWVS__MSB 31 33 | #define CPI_CPIWVS__LSB 0 34 | #define CPI_CPIWHC HW_REGISTER_RW( 0x7e800018 ) 35 | #define CPI_CPIWHC_MASK 0xffffffff 36 | #define CPI_CPIWHC_WIDTH 32 37 | #define CPI_CPIWHC__MSB 31 38 | #define CPI_CPIWHC__LSB 0 39 | #define CPI_CPIWHS HW_REGISTER_RW( 0x7e80001c ) 40 | #define CPI_CPIWHS_MASK 0xffffffff 41 | #define CPI_CPIWHS_WIDTH 32 42 | #define CPI_CPIWHS__MSB 31 43 | #define CPI_CPIWHS__LSB 0 44 | #define CPI_CPIB HW_REGISTER_RW( 0x7e800020 ) 45 | #define CPI_CPIB_MASK 0xffffffff 46 | #define CPI_CPIB_WIDTH 32 47 | #define CPI_CPIB__MSB 31 48 | #define CPI_CPIB__LSB 0 49 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/sdc_dq_front.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define DPHY_CSR_BASE 0x7ee07000 3 | #define DPHY_CSR_DQ_REV_ID HW_REGISTER_RW( 0x7ee07000 ) 4 | #define DPHY_CSR_GLBL_DQ_DLL_RESET HW_REGISTER_RW( 0x7ee07004 ) 5 | #define DPHY_CSR_GLBL_DQ_DLL_RECALIBRATE HW_REGISTER_RW( 0x7ee07008 ) 6 | #define DPHY_CSR_GLBL_DQ_DLL_CNTRL HW_REGISTER_RW( 0x7ee0700c ) 7 | #define DPHY_CSR_GLBL_DQ_DLL_PHASE_LD_VL HW_REGISTER_RW( 0x7ee07010 ) 8 | #define DPHY_CSR_GLBL_DQ_MSTR_DLL_BYP_EN HW_REGISTER_RW( 0x7ee07014 ) 9 | #define DPHY_CSR_GLBL_MSTR_DLL_LOCK_STAT HW_REGISTER_RW( 0x7ee07018 ) 10 | #define DPHY_CSR_BYTE0_SLAVE_DLL_OFFSET HW_REGISTER_RW( 0x7ee0701c ) 11 | #define DPHY_CSR_BYTE1_SLAVE_DLL_OFFSET HW_REGISTER_RW( 0x7ee07020 ) 12 | #define DPHY_CSR_BYTE2_SLAVE_DLL_OFFSET HW_REGISTER_RW( 0x7ee07024 ) 13 | #define DPHY_CSR_BYTE3_SLAVE_DLL_OFFSET HW_REGISTER_RW( 0x7ee07028 ) 14 | #define DPHY_CSR_BYTE0_MASTER_DLL_OUTPUT HW_REGISTER_RW( 0x7ee0702c ) 15 | #define DPHY_CSR_BYTE1_MASTER_DLL_OUTPUT HW_REGISTER_RW( 0x7ee07030 ) 16 | #define DPHY_CSR_BYTE2_MASTER_DLL_OUTPUT HW_REGISTER_RW( 0x7ee07034 ) 17 | #define DPHY_CSR_BYTE3_MASTER_DLL_OUTPUT HW_REGISTER_RW( 0x7ee07038 ) 18 | #define DPHY_CSR_NORM_READ_DQS_GATE_CTRL HW_REGISTER_RW( 0x7ee0703c ) 19 | #define DPHY_CSR_BOOT_READ_DQS_GATE_CTRL HW_REGISTER_RW( 0x7ee07040 ) 20 | #define DPHY_CSR_PHY_FIFO_PNTRS HW_REGISTER_RW( 0x7ee07044 ) 21 | #define DPHY_CSR_DQ_PHY_MISC_CTRL HW_REGISTER_RW( 0x7ee07048 ) 22 | #define DPHY_CSR_DQ_PAD_DRV_SLEW_CTRL HW_REGISTER_RW( 0x7ee0704c ) 23 | #define DPHY_CSR_DQ_PAD_MISC_CTRL HW_REGISTER_RW( 0x7ee07050 ) 24 | #define DPHY_CSR_DQ_PVT_COMP_CTRL HW_REGISTER_RW( 0x7ee07054 ) 25 | #define DPHY_CSR_DQ_PVT_COMP_OVERRD_CTRL HW_REGISTER_RW( 0x7ee07058 ) 26 | #define DPHY_CSR_DQ_PVT_COMP_STATUS HW_REGISTER_RW( 0x7ee0705c ) 27 | #define DPHY_CSR_DQ_PVT_COMP_DEBUG HW_REGISTER_RW( 0x7ee07060 ) 28 | #define DPHY_CSR_DQ_PHY_READ_CTRL HW_REGISTER_RW( 0x7ee07064 ) 29 | #define DPHY_CSR_DQ_PHY_READ_STATUS HW_REGISTER_RW( 0x7ee07068 ) 30 | #define DPHY_CSR_DQ_SPR_RW HW_REGISTER_RW( 0x7ee0706c ) 31 | #define DPHY_CSR_DQ_SPR1_RO HW_REGISTER_RW( 0x7ee07070 ) 32 | #define DPHY_CSR_DQ_SPR_RO HW_REGISTER_RW( 0x7ee07074 ) 33 | #define DPHY_CSR_CRC_CTRL HW_REGISTER_RW( 0x7ee07800 ) 34 | #define DPHY_CSR_CRC_CTRL_MASK 0x00000111 35 | #define DPHY_CSR_CRC_CTRL_WIDTH 9 36 | #define DPHY_CSR_CRC_CTRL_RESET 0000000000 37 | #define DPHY_CSR_CRC_DATA HW_REGISTER_RW( 0x7ee07804 ) 38 | #define DPHY_CSR_CRC_DATA_MASK 0x0fffffff 39 | #define DPHY_CSR_CRC_DATA_WIDTH 28 40 | #define DPHY_CSR_CRC_DATA_RESET 0000000000 41 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/sdc_addr_front.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define APHY_CSR_BASE 0x7ee06000 3 | #define APHY_CSR_ADDR_REV_ID HW_REGISTER_RW( 0x7ee06000 ) 4 | #define APHY_CSR_GLBL_ADDR_DLL_RESET HW_REGISTER_RW( 0x7ee06004 ) 5 | #define APHY_CSR_GLBL_ADDR_DLL_RECAL HW_REGISTER_RW( 0x7ee06008 ) 6 | #define APHY_CSR_GLBL_ADDR_DLL_CNTRL HW_REGISTER_RW( 0x7ee0600c ) 7 | #define APHY_CSR_GLBL_ADDR_DLL_PH_LD_VAL HW_REGISTER_RW( 0x7ee06010 ) 8 | #define APHY_CSR_ADDR_MASTER_DLL_OUTPUT HW_REGISTER_RW( 0x7ee06014 ) 9 | #define APHY_CSR_ADDR_SLAVE_DLL_OFFSET HW_REGISTER_RW( 0x7ee06018 ) 10 | #define APHY_CSR_GLBL_ADR_MSTR_DLL_BYPEN HW_REGISTER_RW( 0x7ee0601c ) 11 | #define APHY_CSR_GLBL_ADR_DLL_LOCK_STAT HW_REGISTER_RW( 0x7ee06020 ) 12 | #define APHY_CSR_DDR_PLL_GLOBAL_RESET HW_REGISTER_RW( 0x7ee06024 ) 13 | #define APHY_CSR_DDR_PLL_POST_DIV_RESET HW_REGISTER_RW( 0x7ee06028 ) 14 | #define APHY_CSR_DDR_PLL_VCO_FREQ_CNTRL0 HW_REGISTER_RW( 0x7ee0602c ) 15 | #define APHY_CSR_DDR_PLL_VCO_FREQ_CNTRL1 HW_REGISTER_RW( 0x7ee06030 ) 16 | #define APHY_CSR_DDR_PLL_MDIV_VALUE HW_REGISTER_RW( 0x7ee06034 ) 17 | #define APHY_CSR_DDR_PLL_CONFIG_CNTRL HW_REGISTER_RW( 0x7ee06038 ) 18 | #define APHY_CSR_DDR_PLL_MISC_CNTRL HW_REGISTER_RW( 0x7ee0603c ) 19 | #define APHY_CSR_DDR_PLL_SPRDSPECT_CTRL0 HW_REGISTER_RW( 0x7ee06040 ) 20 | #define APHY_CSR_DDR_PLL_SPRDSPECT_CTRL1 HW_REGISTER_RW( 0x7ee06044 ) 21 | #define APHY_CSR_DDR_PLL_LOCK_STATUS HW_REGISTER_RW( 0x7ee06048 ) 22 | #define APHY_CSR_DDR_PLL_HOLD_CH HW_REGISTER_RW( 0x7ee0604c ) 23 | #define APHY_CSR_DDR_PLL_ENABLE_CH HW_REGISTER_RW( 0x7ee06050 ) 24 | #define APHY_CSR_DDR_PLL_BYPASS HW_REGISTER_RW( 0x7ee06054 ) 25 | #define APHY_CSR_DDR_PLL_PWRDWN HW_REGISTER_RW( 0x7ee06058 ) 26 | #define APHY_CSR_DDR_PLL_CH0_DESKEW_CTRL HW_REGISTER_RW( 0x7ee0605c ) 27 | #define APHY_CSR_DDR_PLL_CH1_DESKEW_CTRL HW_REGISTER_RW( 0x7ee06060 ) 28 | #define APHY_CSR_DDR_PLL_DESKEW_STATUS HW_REGISTER_RW( 0x7ee06064 ) 29 | #define APHY_CSR_ADDR_PAD_DRV_SLEW_CTRL HW_REGISTER_RW( 0x7ee06068 ) 30 | #define APHY_CSR_ADDR_PAD_MISC_CTRL HW_REGISTER_RW( 0x7ee0606c ) 31 | #define APHY_CSR_ADDR_PVT_COMP_CTRL HW_REGISTER_RW( 0x7ee06070 ) 32 | #define APHY_CSR_ADDR_PVT_COMP_OVRD_CTRL HW_REGISTER_RW( 0x7ee06074 ) 33 | #define APHY_CSR_ADDR_PVT_COMP_STATUS HW_REGISTER_RW( 0x7ee06078 ) 34 | #define APHY_CSR_ADDR_PVT_COMP_DEBUG HW_REGISTER_RW( 0x7ee0607c ) 35 | #define APHY_CSR_PHY_BIST_CNTRL_SPR HW_REGISTER_RW( 0x7ee06080 ) 36 | #define APHY_CSR_PHY_BIST_CA_CRC_SPR HW_REGISTER_RW( 0x7ee06084 ) 37 | #define APHY_CSR_ADDR_SPR0_RW HW_REGISTER_RW( 0x7ee06088 ) 38 | #define APHY_CSR_ADDR_SPR1_RO HW_REGISTER_RW( 0x7ee0608c ) 39 | #define APHY_CSR_ADDR_SPR_RO HW_REGISTER_RW( 0x7ee06090 ) 40 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/libfdt/fdt_strerror.c: -------------------------------------------------------------------------------- 1 | /* 2 | * libfdt - Flat Device Tree manipulation 3 | * Copyright (C) 2006 David Gibson, IBM Corporation. 4 | * 5 | * libfdt is dual licensed: you can use it either under the terms of 6 | * the GPL, or the BSD license, at your option. 7 | * 8 | * a) This library is free software; you can redistribute it and/or 9 | * modify it under the terms of the GNU General Public License as 10 | * published by the Free Software Foundation; either version 2 of the 11 | * License, or (at your option) any later version. 12 | * 13 | * This library is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU General Public 19 | * License along with this library; if not, write to the Free 20 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 21 | * MA 02110-1301 USA 22 | * 23 | * Alternatively, 24 | * 25 | * b) Redistribution and use in source and binary forms, with or 26 | * without modification, are permitted provided that the following 27 | * conditions are met: 28 | * 29 | * 1. Redistributions of source code must retain the above 30 | * copyright notice, this list of conditions and the following 31 | * disclaimer. 32 | * 2. Redistributions in binary form must reproduce the above 33 | * copyright notice, this list of conditions and the following 34 | * disclaimer in the documentation and/or other materials 35 | * provided with the distribution. 36 | * 37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 38 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 39 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 40 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 42 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 43 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 44 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 45 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 46 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 47 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 48 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 49 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 50 | */ 51 | #include "libfdt_env.h" 52 | 53 | #include 54 | #include 55 | 56 | #include "libfdt_internal.h" 57 | 58 | struct fdt_errtabent { 59 | const char *str; 60 | }; 61 | 62 | #define FDT_ERRTABENT(val) \ 63 | [(val)] = { .str = #val, } 64 | 65 | static struct fdt_errtabent fdt_errtable[] = { 66 | FDT_ERRTABENT(FDT_ERR_NOTFOUND), 67 | FDT_ERRTABENT(FDT_ERR_EXISTS), 68 | FDT_ERRTABENT(FDT_ERR_NOSPACE), 69 | 70 | FDT_ERRTABENT(FDT_ERR_BADOFFSET), 71 | FDT_ERRTABENT(FDT_ERR_BADPATH), 72 | FDT_ERRTABENT(FDT_ERR_BADSTATE), 73 | 74 | FDT_ERRTABENT(FDT_ERR_TRUNCATED), 75 | FDT_ERRTABENT(FDT_ERR_BADMAGIC), 76 | FDT_ERRTABENT(FDT_ERR_BADVERSION), 77 | FDT_ERRTABENT(FDT_ERR_BADSTRUCTURE), 78 | FDT_ERRTABENT(FDT_ERR_BADLAYOUT), 79 | }; 80 | #define FDT_ERRTABSIZE (sizeof(fdt_errtable) / sizeof(fdt_errtable[0])) 81 | 82 | const char *fdt_strerror(int errval) 83 | { 84 | if (errval > 0) 85 | return ""; 86 | else if (errval == 0) 87 | return ""; 88 | else if (errval > -FDT_ERRTABSIZE) { 89 | const char *s = fdt_errtable[-errval].str; 90 | 91 | if (s) 92 | return s; 93 | } 94 | 95 | return ""; 96 | } 97 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/libfdt/libfdt_internal.h: -------------------------------------------------------------------------------- 1 | #ifndef _LIBFDT_INTERNAL_H 2 | #define _LIBFDT_INTERNAL_H 3 | /* 4 | * libfdt - Flat Device Tree manipulation 5 | * Copyright (C) 2006 David Gibson, IBM Corporation. 6 | * 7 | * libfdt is dual licensed: you can use it either under the terms of 8 | * the GPL, or the BSD license, at your option. 9 | * 10 | * a) This library is free software; you can redistribute it and/or 11 | * modify it under the terms of the GNU General Public License as 12 | * published by the Free Software Foundation; either version 2 of the 13 | * License, or (at your option) any later version. 14 | * 15 | * This library is distributed in the hope that it will be useful, 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 | * GNU General Public License for more details. 19 | * 20 | * You should have received a copy of the GNU General Public 21 | * License along with this library; if not, write to the Free 22 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 23 | * MA 02110-1301 USA 24 | * 25 | * Alternatively, 26 | * 27 | * b) Redistribution and use in source and binary forms, with or 28 | * without modification, are permitted provided that the following 29 | * conditions are met: 30 | * 31 | * 1. Redistributions of source code must retain the above 32 | * copyright notice, this list of conditions and the following 33 | * disclaimer. 34 | * 2. Redistributions in binary form must reproduce the above 35 | * copyright notice, this list of conditions and the following 36 | * disclaimer in the documentation and/or other materials 37 | * provided with the distribution. 38 | * 39 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 40 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 41 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 42 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 43 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 44 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 46 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 47 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 48 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 49 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 50 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 51 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 52 | */ 53 | #include 54 | 55 | #define FDT_ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1)) 56 | #define FDT_TAGALIGN(x) (FDT_ALIGN((x), FDT_TAGSIZE)) 57 | 58 | #define FDT_CHECK_HEADER(fdt) \ 59 | { \ 60 | int __err; \ 61 | if ((__err = fdt_check_header(fdt)) != 0) \ 62 | return __err; \ 63 | } 64 | 65 | int _fdt_check_node_offset(const void *fdt, int offset); 66 | int _fdt_check_prop_offset(const void *fdt, int offset); 67 | const char *_fdt_find_string(const char *strtab, int tabsize, const char *s); 68 | int _fdt_node_end_offset(void *fdt, int nodeoffset); 69 | 70 | static inline const void *_fdt_offset_ptr(const void *fdt, int offset) 71 | { 72 | return (const char *)fdt + fdt_off_dt_struct(fdt) + offset; 73 | } 74 | 75 | static inline void *_fdt_offset_ptr_w(void *fdt, int offset) 76 | { 77 | return (void *)(uintptr_t)_fdt_offset_ptr(fdt, offset); 78 | } 79 | 80 | static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int n) 81 | { 82 | const struct fdt_reserve_entry *rsv_table = 83 | (const struct fdt_reserve_entry *) 84 | ((const char *)fdt + fdt_off_mem_rsvmap(fdt)); 85 | 86 | return rsv_table + n; 87 | } 88 | static inline struct fdt_reserve_entry *_fdt_mem_rsv_w(void *fdt, int n) 89 | { 90 | return (void *)(uintptr_t)_fdt_mem_rsv(fdt, n); 91 | } 92 | 93 | #define FDT_SW_MAGIC (~FDT_MAGIC) 94 | 95 | #endif /* _LIBFDT_INTERNAL_H */ 96 | -------------------------------------------------------------------------------- /arm_chainloader/start.s: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | ARM entry point. 17 | 18 | This is where all cores start. For RPi1, only one core starts so we can jump 19 | straight to the main bootloader. For later models, the first core jumps to the 20 | bootloader. The other cores wait until SMP is enabled by the kernel later in 21 | the boot process. 22 | 23 | =============================================================================*/ 24 | 25 | #include "memory_map.h" 26 | 27 | .arch_extension sec 28 | 29 | .text 30 | .globl _start 31 | _start: 32 | /* vectors */ 33 | b _common_start /* reset */ 34 | b _fleh_undef /* undefined */ 35 | b _secure_monitor /* swi/smc */ 36 | b _fleh_prefabt /* prefetch abort */ 37 | b _fleh_dataabt /* data abort */ 38 | b _fleh_addrexc /* reserved */ 39 | b _fleh_irq /* irq */ 40 | b _fleh_fiq /* fiq */ 41 | 42 | .globl g_FirmwareData 43 | g_FirmwareData: 44 | .long 0 /* SDRAM capacity */ 45 | .long 0 /* VPU CPUID */ 46 | .long 0 /* Reserved */ 47 | .long 0 /* Reserved */ 48 | .long 0 /* Reserved */ 49 | 50 | #define SaveRegisters() \ 51 | mov sp, #(MEM_STACK_END); \ 52 | stmea sp, {r0-lr}^; \ 53 | str lr, [sp, #60]; \ 54 | mrs r0, spsr; \ 55 | str r0, [sp, #64]; \ 56 | mov r0, sp 57 | 58 | _fleh_undef: 59 | SaveRegisters() 60 | b sleh_undef 61 | 62 | _fleh_prefabt: 63 | SaveRegisters() 64 | b sleh_prefabt 65 | 66 | _fleh_dataabt: 67 | SaveRegisters() 68 | b sleh_dataabt 69 | 70 | _fleh_addrexc: 71 | SaveRegisters() 72 | b sleh_addrexc 73 | 74 | _fleh_irq: 75 | SaveRegisters() 76 | b sleh_irq 77 | 78 | _fleh_fiq: 79 | SaveRegisters() 80 | b sleh_fiq 81 | 82 | _secure_monitor: 83 | mrc p15, 0, r0, c1, c1, 0 84 | //bic r0, r0, #0x4a /* clear IRQ, EA, nET */ 85 | orr r0, r0, #1 /* set NS */ 86 | mcr p15, 0, r0, c1, c1, 0 87 | 88 | //mov r0, #((1 << 7) | (1 << 8) | (1 << 6)) /* mask IRQ, AA and FIQ */ 89 | //orr r0, r0, #0x1a /* switch to hypervisor mode */ 90 | //msr spsr_cxfs, r0 91 | 92 | movs pc, lr 93 | 94 | _common_start: 95 | /* 96 | * read MIDR, see if this is an ARMv6 system, if it is, just 97 | * assume single core (BCM2708) and not bother doing SMP stuff. 98 | */ 99 | mrc p15, 0, r0, c0, c0, 0 100 | lsr r0, #16 101 | and r0, #0xF 102 | cmp r0, #0x7 103 | mov r12, #0 104 | beq L_finish_init 105 | 106 | L_armv7_or_higher: 107 | /* 108 | * okay, we're an ARMv7 or an ARMv8. 109 | */ 110 | mrc p15, 0, r0, c0, c0, 5 // read MPIDR 111 | and r3, r0, #0xc0000000 // multiprocessing extensions and 112 | teq r3, #0x80000000 // not part of a uniprocessor system? 113 | bne L_setup_monitor // no, assume UP 114 | ands r0, r0, #0x03 // CPU 0? 115 | bne L_deadloop // if not, spin. 116 | 117 | L_setup_monitor: 118 | adr r1, _start 119 | //mcr p15, 0, r1, c12, c0, 1 /* MVBAR */ 120 | //mcr p15, 0, r1, c7, c5, 4 /* ISB (ARMv6 compatible way) */ 121 | 122 | mrc p15, 0, r0, c1, c1, 0 123 | orr r0, r0, #1 /* set NS */ 124 | mcr p15, 0, r0, c1, c1, 0 125 | 126 | mov r12, #1 127 | //smc 0 128 | 129 | L_finish_init: 130 | /* enable instruction cache */ 131 | //mrc p15, 0, r0, c1, c0, 0 132 | //orr r0, r0, #(1<<12) 133 | //mcr p15, 0, r0, c1, c0, 0 134 | 135 | mov sp, #(MEM_STACK_END) 136 | mov r0, r12 137 | b main 138 | 139 | L_deadloop: 140 | cpsie if 141 | wfi 142 | b L_deadloop 143 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Minimal Raspberry Pi VPU firmware 2 | 3 | `rpi-open-firmware` is a small firmware for the [RPi VPU](https://en.wikipedia.org/wiki/VideoCore), capable of initializing UART, VPU PLL (PLLC), and ARM itself. It's intended as a libre replacement for the stock `bootcode.bin` normally loaded from the SD card. A UART cable is highly recommended for the time being, though not strictly necessary. Additionally, there is a second-stage chainloader running on ARM capable of initializing eMMC, FAT, and the Linux kernel. 4 | 5 | See [issue #31](https://github.com/christinaa/rpi-open-firmware/issues/31) for a compatibility table and related discourse. 6 | 7 | Technical discussion occurs in `#raspberrypi-internals` on [Freenode](http://webchat.freenode.net/?channels=#raspberrypi-internals). Please come on IRC before randomly hacking on the codebase :-) 8 | 9 | All Broadcom headers are licensed under 3-Clause BSD License while our code is under GPLv2+. See `LICENSE` for more information. Various external projects are mirrored under a mix of GPL-compatible licenses. 10 | 11 | ## Is this project dead or abandoned? 12 | 13 | It's not dead and not abandoned in a conventional sense. 14 | 15 | However, it is on an indefinite hold. I wrote a detailed explanation [in issue #37](https://github.com/christinaa/rpi-open-firmware/issues/37) of its current situation. 16 | 17 | ## Building 18 | 19 | As a prerequisite, Julian Brown's [VC4 toolchain](https://github.com/itszor/vc4-toolchain) is necessary as well as the `arm-none-eabi-` toolchain (Debian package `gcc-arm-none-eabi`). You can tweak the VC4 toolchain path in `CROSS_COMPILE` in `Makefile` and the ARM path in `arm_chainloader/Makefile` if necessary. Contributors should not commit their personal paths. After configuration, run `buildall.sh`. The binary is at `build/bootcode.bin`, ready to be copied to an SD card. 20 | 21 | ### Building on macOS 22 | 23 | macOS compilation is similar to GNU/Linux, save platform errata described here. Instructions to build the ARM toolchain are [here](https://launchpadlibrarian.net/287100910/How-to-build-toolchain.pdf). Due to symlinking by default, GCC must be installed manually, and, an older version of guile is necessary (homebrew packages `gcc-6` and `guile18`, respectively). Finally, set the environment variable `LIBRARY_PATH` to `/lib:/lib64` when running `buildall.sh. 24 | 25 | ## Technical Details 26 | The firmware is split into two parts, one running on the VC4 and the other on ARM. The VC4 part initializes PLLC and moves VPU over to it, and then brings up UART. It performs SDRAM initialization, mapping it to `0xC0000000` (uncached alias). Next, ARM is initialized, and the embedded bootloader is mapped to ARM address `0x0`. `arm_chainloader` is then executed. 27 | 28 | The ARM chainloader initializes the eMMC controller and accesses the FAT boot partition. From here, it chainloads the Linux kernel (other payloads likely do not work due to mailbox usage). 29 | 30 | ## Does it boot Linux? 31 | 32 | Yes, with some conditions. You can boot a very minimal version of Linux without the firmware and get it to work with UART and eMMC. Support for USB, DMA, and Ethernet are in the works, which will be sufficient for certain headless systems. Still, many other peripherals require bringup, such as video. Additionally, drivers for power management need to written. 33 | 34 | ## Thanks To 35 | * **[Herman Hermitage](https://github.com/hermanhermitage)** for his VC4 documentation and for helping determine suitable ARM PLL configurations. 36 | * **[Julian Brown](https://github.com/itszor)** for reviewing the code and for his awesome VC4 toolchain. 37 | * **[Alyssa Rosenzweig](https://github.com/bobbybee)** for her contributions to the firmware especially in areas of Linux bringup and early ARM side initialization, as well as fixing mailbox support. 38 | * **[David Given](https://github.com/davidgiven)** for his initial LLVM project used as the base for the initial LLVM toolchain before moving to GCC. 39 | * **[Scott Mansell](https://github.com/phire)** for reviewing the code. 40 | * **[Broadcom](https://github.com/broadcom)** for their header release. 41 | * Various other people not mentioned here. 42 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/libfdt/fdt.h: -------------------------------------------------------------------------------- 1 | #ifndef _FDT_H 2 | #define _FDT_H 3 | /* 4 | * libfdt - Flat Device Tree manipulation 5 | * Copyright (C) 2006 David Gibson, IBM Corporation. 6 | * Copyright 2012 Kim Phillips, Freescale Semiconductor. 7 | * 8 | * libfdt is dual licensed: you can use it either under the terms of 9 | * the GPL, or the BSD license, at your option. 10 | * 11 | * a) This library is free software; you can redistribute it and/or 12 | * modify it under the terms of the GNU General Public License as 13 | * published by the Free Software Foundation; either version 2 of the 14 | * License, or (at your option) any later version. 15 | * 16 | * This library is distributed in the hope that it will be useful, 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 | * GNU General Public License for more details. 20 | * 21 | * You should have received a copy of the GNU General Public 22 | * License along with this library; if not, write to the Free 23 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 24 | * MA 02110-1301 USA 25 | * 26 | * Alternatively, 27 | * 28 | * b) Redistribution and use in source and binary forms, with or 29 | * without modification, are permitted provided that the following 30 | * conditions are met: 31 | * 32 | * 1. Redistributions of source code must retain the above 33 | * copyright notice, this list of conditions and the following 34 | * disclaimer. 35 | * 2. Redistributions in binary form must reproduce the above 36 | * copyright notice, this list of conditions and the following 37 | * disclaimer in the documentation and/or other materials 38 | * provided with the distribution. 39 | * 40 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 41 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 42 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 43 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 44 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 45 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 46 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 47 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 48 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 49 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 50 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 51 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 52 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 | */ 54 | 55 | #ifndef __ASSEMBLY__ 56 | 57 | struct fdt_header { 58 | fdt32_t magic; /* magic word FDT_MAGIC */ 59 | fdt32_t totalsize; /* total size of DT block */ 60 | fdt32_t off_dt_struct; /* offset to structure */ 61 | fdt32_t off_dt_strings; /* offset to strings */ 62 | fdt32_t off_mem_rsvmap; /* offset to memory reserve map */ 63 | fdt32_t version; /* format version */ 64 | fdt32_t last_comp_version; /* last compatible version */ 65 | 66 | /* version 2 fields below */ 67 | fdt32_t boot_cpuid_phys; /* Which physical CPU id we're 68 | booting on */ 69 | /* version 3 fields below */ 70 | fdt32_t size_dt_strings; /* size of the strings block */ 71 | 72 | /* version 17 fields below */ 73 | fdt32_t size_dt_struct; /* size of the structure block */ 74 | }; 75 | 76 | struct fdt_reserve_entry { 77 | fdt64_t address; 78 | fdt64_t size; 79 | }; 80 | 81 | struct fdt_node_header { 82 | fdt32_t tag; 83 | char name[0]; 84 | }; 85 | 86 | struct fdt_property { 87 | fdt32_t tag; 88 | fdt32_t len; 89 | fdt32_t nameoff; 90 | char data[0]; 91 | }; 92 | 93 | #endif /* !__ASSEMBLY */ 94 | 95 | #define FDT_MAGIC 0xd00dfeed /* 4: version, 4: total size */ 96 | #define FDT_TAGSIZE sizeof(fdt32_t) 97 | 98 | #define FDT_BEGIN_NODE 0x1 /* Start node: full name */ 99 | #define FDT_END_NODE 0x2 /* End node */ 100 | #define FDT_PROP 0x3 /* Property: name off, 101 | size, content */ 102 | #define FDT_NOP 0x4 /* nop */ 103 | #define FDT_END 0x9 104 | 105 | #define FDT_V1_SIZE (7*sizeof(fdt32_t)) 106 | #define FDT_V2_SIZE (FDT_V1_SIZE + sizeof(fdt32_t)) 107 | #define FDT_V3_SIZE (FDT_V2_SIZE + sizeof(fdt32_t)) 108 | #define FDT_V16_SIZE FDT_V3_SIZE 109 | #define FDT_V17_SIZE (FDT_V16_SIZE + sizeof(fdt32_t)) 110 | 111 | #endif /* _FDT_H */ 112 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/libfdt/libfdt_env.h: -------------------------------------------------------------------------------- 1 | #ifndef _LIBFDT_ENV_H 2 | #define _LIBFDT_ENV_H 3 | /* 4 | * libfdt - Flat Device Tree manipulation 5 | * Copyright (C) 2006 David Gibson, IBM Corporation. 6 | * Copyright 2012 Kim Phillips, Freescale Semiconductor. 7 | * 8 | * libfdt is dual licensed: you can use it either under the terms of 9 | * the GPL, or the BSD license, at your option. 10 | * 11 | * a) This library is free software; you can redistribute it and/or 12 | * modify it under the terms of the GNU General Public License as 13 | * published by the Free Software Foundation; either version 2 of the 14 | * License, or (at your option) any later version. 15 | * 16 | * This library is distributed in the hope that it will be useful, 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 | * GNU General Public License for more details. 20 | * 21 | * You should have received a copy of the GNU General Public 22 | * License along with this library; if not, write to the Free 23 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 24 | * MA 02110-1301 USA 25 | * 26 | * Alternatively, 27 | * 28 | * b) Redistribution and use in source and binary forms, with or 29 | * without modification, are permitted provided that the following 30 | * conditions are met: 31 | * 32 | * 1. Redistributions of source code must retain the above 33 | * copyright notice, this list of conditions and the following 34 | * disclaimer. 35 | * 2. Redistributions in binary form must reproduce the above 36 | * copyright notice, this list of conditions and the following 37 | * disclaimer in the documentation and/or other materials 38 | * provided with the distribution. 39 | * 40 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 41 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 42 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 43 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 44 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 45 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 46 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 47 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 48 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 49 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 50 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 51 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 52 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 | */ 54 | 55 | #include 56 | #include 57 | #include 58 | 59 | #ifdef __CHECKER__ 60 | #define __force __attribute__((force)) 61 | #define __bitwise __attribute__((bitwise)) 62 | #else 63 | #define __force 64 | #define __bitwise 65 | #endif 66 | 67 | typedef uint16_t __bitwise fdt16_t; 68 | typedef uint32_t __bitwise fdt32_t; 69 | typedef uint64_t __bitwise fdt64_t; 70 | 71 | #define EXTRACT_BYTE(x, n) ((unsigned long long)((uint8_t *)&x)[n]) 72 | #define CPU_TO_FDT16(x) ((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1)) 73 | #define CPU_TO_FDT32(x) ((EXTRACT_BYTE(x, 0) << 24) | (EXTRACT_BYTE(x, 1) << 16) | \ 74 | (EXTRACT_BYTE(x, 2) << 8) | EXTRACT_BYTE(x, 3)) 75 | #define CPU_TO_FDT64(x) ((EXTRACT_BYTE(x, 0) << 56) | (EXTRACT_BYTE(x, 1) << 48) | \ 76 | (EXTRACT_BYTE(x, 2) << 40) | (EXTRACT_BYTE(x, 3) << 32) | \ 77 | (EXTRACT_BYTE(x, 4) << 24) | (EXTRACT_BYTE(x, 5) << 16) | \ 78 | (EXTRACT_BYTE(x, 6) << 8) | EXTRACT_BYTE(x, 7)) 79 | 80 | static inline uint16_t fdt16_to_cpu(fdt16_t x) 81 | { 82 | return (__force uint16_t)CPU_TO_FDT16(x); 83 | } 84 | static inline fdt16_t cpu_to_fdt16(uint16_t x) 85 | { 86 | return (__force fdt16_t)CPU_TO_FDT16(x); 87 | } 88 | 89 | static inline uint32_t fdt32_to_cpu(fdt32_t x) 90 | { 91 | return (__force uint32_t)CPU_TO_FDT32(x); 92 | } 93 | static inline fdt32_t cpu_to_fdt32(uint32_t x) 94 | { 95 | return (__force fdt32_t)CPU_TO_FDT32(x); 96 | } 97 | 98 | static inline uint64_t fdt64_to_cpu(fdt64_t x) 99 | { 100 | return (__force uint64_t)CPU_TO_FDT64(x); 101 | } 102 | static inline fdt64_t cpu_to_fdt64(uint64_t x) 103 | { 104 | return (__force fdt64_t)CPU_TO_FDT64(x); 105 | } 106 | #undef CPU_TO_FDT64 107 | #undef CPU_TO_FDT32 108 | #undef CPU_TO_FDT16 109 | #undef EXTRACT_BYTE 110 | 111 | #endif /* _LIBFDT_ENV_H */ 112 | -------------------------------------------------------------------------------- /arm_chainloader/lib_armv6/arm_memcmp.s: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2009 Apple Inc. All rights reserved. 3 | * 4 | * @APPLE_LICENSE_HEADER_START@ 5 | * 6 | * This file contains Original Code and/or Modifications of Original Code 7 | * as defined in and that are subject to the Apple Public Source License 8 | * Version 2.0 (the 'License'). You may not use this file except in 9 | * compliance with the License. Please obtain a copy of the License at 10 | * http://www.opensource.apple.com/apsl/ and read it before using this 11 | * file. 12 | * 13 | * The Original Code and all software distributed under the License are 14 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER 15 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, 16 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, 17 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. 18 | * Please see the License for the specific language governing rights and 19 | * limitations under the License. 20 | * 21 | * @APPLE_LICENSE_HEADER_END@ 22 | */ 23 | 24 | // ARM Assembly implementation of memcmp( ) from 25 | // Uses Thumb2 if it is available, otherwise generates ARM code. 26 | // 27 | // -- Stephen Canon, August 2009 28 | // 29 | // The basic idea is to use word compares instead of byte compares as long as 30 | // at least four bytes remain to be compared. However, because memcmp( ) 31 | // compares the buffers as though they were big-endian unsigned integers, we 32 | // need to byte-reverse each word before comparing them. 33 | // 34 | // If the buffers are not word aligned, or they are shorter than four bytes, 35 | // we just use a simple byte comparison loop instead. 36 | // 37 | // int bcmp(void *src1, void *src2, size_t length); 38 | // int memcmp(void *src1, void *src2, size_t length); 39 | 40 | .text 41 | .syntax unified 42 | .code 32 43 | .globl bcmp 44 | .globl memcmp 45 | .align 3 46 | bcmp: 47 | memcmp: 48 | 49 | #define _ARM_ARCH_6 50 | 51 | #ifdef _ARM_ARCH_6 52 | subs ip, r2, #4 // if length < 4 53 | bmi L_useByteCompares // jump to the byte comparison loop 54 | 55 | orr r3, r0, r1 // if the buffers are 56 | tst r3, #3 // not word aligned 57 | bne L_useByteCompares // jump to the byte comparison loop 58 | 59 | .align 3 60 | L_wordCompare: // Here we know that both buffers are word 61 | ldr r2, [r0], #4 // aligned, and (length - 4) > 0, so at least 62 | ldr r3, [r1], #4 // four bytes remain to be compared. We load 63 | subs ip, #4 // a word from each buffer, and byte reverse 64 | bmi L_lastWord // the loaded words. We also decrement the 65 | rev r2, r2 // length by four and jump out of this loop if 66 | rev r3, r3 // the result is negative. Then we compare the 67 | cmp r2, r3 // reversed words, and continue the loop only 68 | beq L_wordCompare // if they are equal. 69 | L_wordsUnequal: 70 | ite hi // If the words compared unequal, return +/- 1 71 | movhi r0, #1 // according to the result of the comparison. 72 | movls r0, #-1 // 73 | bx lr // 74 | L_lastWord: 75 | rev r2, r2 // If we just loaded the last complete words 76 | rev r3, r3 // from the buffers, byte-reverse them and 77 | cmp r2, r3 // compare. If they are unequal, jump to the 78 | bne L_wordsUnequal // return path. 79 | add r2, ip, #4 // Otherwise, fall into the cleanup code. 80 | #endif // _ARM_ARCH_6 81 | 82 | L_useByteCompares: 83 | tst r2, r2 // If the length is exactly zero 84 | beq L_returnZero // avoid doing any loads and return zero. 85 | mov r3, r0 86 | .align 3 87 | L_byteCompareLoop: 88 | ldrb r0, [r3], #1 // Load a byte from each buffer, and decrement 89 | ldrb ip, [r1], #1 // the length by one. If the decremented 90 | subs r2, #1 // length is zero, exit the loop. Otherwise 91 | beq L_lastByte // subtract the loaded bytes; if their 92 | subs r0, ip // difference is zero, continue the comparison 93 | beq L_byteCompareLoop // loop. Otherwise, return their difference. 94 | bx lr 95 | L_returnZero: 96 | mov r0, ip 97 | L_lastByte: 98 | sub r0, ip // Return the difference of the final bytes 99 | bx lr 100 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/libfdt/fdt_wip.c: -------------------------------------------------------------------------------- 1 | /* 2 | * libfdt - Flat Device Tree manipulation 3 | * Copyright (C) 2006 David Gibson, IBM Corporation. 4 | * 5 | * libfdt is dual licensed: you can use it either under the terms of 6 | * the GPL, or the BSD license, at your option. 7 | * 8 | * a) This library is free software; you can redistribute it and/or 9 | * modify it under the terms of the GNU General Public License as 10 | * published by the Free Software Foundation; either version 2 of the 11 | * License, or (at your option) any later version. 12 | * 13 | * This library is distributed in the hope that it will be useful, 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 | * GNU General Public License for more details. 17 | * 18 | * You should have received a copy of the GNU General Public 19 | * License along with this library; if not, write to the Free 20 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 21 | * MA 02110-1301 USA 22 | * 23 | * Alternatively, 24 | * 25 | * b) Redistribution and use in source and binary forms, with or 26 | * without modification, are permitted provided that the following 27 | * conditions are met: 28 | * 29 | * 1. Redistributions of source code must retain the above 30 | * copyright notice, this list of conditions and the following 31 | * disclaimer. 32 | * 2. Redistributions in binary form must reproduce the above 33 | * copyright notice, this list of conditions and the following 34 | * disclaimer in the documentation and/or other materials 35 | * provided with the distribution. 36 | * 37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 38 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 39 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 40 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 42 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 43 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 44 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 45 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 46 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 47 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 48 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 49 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 50 | */ 51 | #include "libfdt_env.h" 52 | 53 | #include 54 | #include 55 | 56 | #include "libfdt_internal.h" 57 | 58 | int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset, 59 | const char *name, int namelen, 60 | uint32_t idx, const void *val, 61 | int len) 62 | { 63 | void *propval; 64 | int proplen; 65 | 66 | propval = fdt_getprop_namelen_w(fdt, nodeoffset, name, namelen, 67 | &proplen); 68 | if (!propval) 69 | return proplen; 70 | 71 | if (proplen < (len + idx)) 72 | return -FDT_ERR_NOSPACE; 73 | 74 | memcpy((char *)propval + idx, val, len); 75 | return 0; 76 | } 77 | 78 | int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name, 79 | const void *val, int len) 80 | { 81 | const void *propval; 82 | int proplen; 83 | 84 | propval = fdt_getprop(fdt, nodeoffset, name, &proplen); 85 | if (! propval) 86 | return proplen; 87 | 88 | if (proplen != len) 89 | return -FDT_ERR_NOSPACE; 90 | 91 | return fdt_setprop_inplace_namelen_partial(fdt, nodeoffset, name, 92 | strlen(name), 0, 93 | val, len); 94 | } 95 | 96 | static void _fdt_nop_region(void *start, int len) 97 | { 98 | fdt32_t *p; 99 | 100 | for (p = start; (char *)p < ((char *)start + len); p++) 101 | *p = cpu_to_fdt32(FDT_NOP); 102 | } 103 | 104 | int fdt_nop_property(void *fdt, int nodeoffset, const char *name) 105 | { 106 | struct fdt_property *prop; 107 | int len; 108 | 109 | prop = fdt_get_property_w(fdt, nodeoffset, name, &len); 110 | if (! prop) 111 | return len; 112 | 113 | _fdt_nop_region(prop, len + sizeof(*prop)); 114 | 115 | return 0; 116 | } 117 | 118 | int _fdt_node_end_offset(void *fdt, int offset) 119 | { 120 | int depth = 0; 121 | 122 | while ((offset >= 0) && (depth >= 0)) 123 | offset = fdt_next_node(fdt, offset, &depth); 124 | 125 | return offset; 126 | } 127 | 128 | int fdt_nop_node(void *fdt, int nodeoffset) 129 | { 130 | int endoffset; 131 | 132 | endoffset = _fdt_node_end_offset(fdt, nodeoffset); 133 | if (endoffset < 0) 134 | return endoffset; 135 | 136 | _fdt_nop_region(fdt_offset_ptr_w(fdt, nodeoffset, 0), 137 | endoffset - nodeoffset); 138 | return 0; 139 | } 140 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/vpu_arb_ctrl.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define VPU_ARB_CTRL_BASE 0x7ee04000 3 | #define VPU_ARB_CTRL_UC HW_REGISTER_RW( 0x7ee04000 ) 4 | #define VPU_ARB_CTRL_UC_MASK 0x0000ffff 5 | #define VPU_ARB_CTRL_UC_WIDTH 16 6 | #define VPU_ARB_CTRL_UC_RESET 0000000000 7 | #define VPU_ARB_CTRL_UC_CHANNEL_INIBIT_BITS 15:8 8 | #define VPU_ARB_CTRL_UC_CHANNEL_INIBIT_SET 0x0000ff00 9 | #define VPU_ARB_CTRL_UC_CHANNEL_INIBIT_CLR 0xffff00ff 10 | #define VPU_ARB_CTRL_UC_CHANNEL_INIBIT_MSB 15 11 | #define VPU_ARB_CTRL_UC_CHANNEL_INIBIT_LSB 8 12 | #define VPU_ARB_CTRL_UC_CHANNEL_INIBIT_RESET 0x0 13 | #define VPU_ARB_CTRL_UC_ALGORITHM_BITS 7:6 14 | #define VPU_ARB_CTRL_UC_ALGORITHM_SET 0x000000c0 15 | #define VPU_ARB_CTRL_UC_ALGORITHM_CLR 0xffffff3f 16 | #define VPU_ARB_CTRL_UC_ALGORITHM_MSB 7 17 | #define VPU_ARB_CTRL_UC_ALGORITHM_LSB 6 18 | #define VPU_ARB_CTRL_UC_ALGORITHM_RESET 0x0 19 | #define VPU_ARB_CTRL_UC_THRESHOLD_BITS 5:4 20 | #define VPU_ARB_CTRL_UC_THRESHOLD_SET 0x00000030 21 | #define VPU_ARB_CTRL_UC_THRESHOLD_CLR 0xffffffcf 22 | #define VPU_ARB_CTRL_UC_THRESHOLD_MSB 5 23 | #define VPU_ARB_CTRL_UC_THRESHOLD_LSB 4 24 | #define VPU_ARB_CTRL_UC_THRESHOLD_RESET 0x0 25 | #define VPU_ARB_CTRL_UC_DELAY_BITS 3:2 26 | #define VPU_ARB_CTRL_UC_DELAY_SET 0x0000000c 27 | #define VPU_ARB_CTRL_UC_DELAY_CLR 0xfffffff3 28 | #define VPU_ARB_CTRL_UC_DELAY_MSB 3 29 | #define VPU_ARB_CTRL_UC_DELAY_LSB 2 30 | #define VPU_ARB_CTRL_UC_DELAY_RESET 0x0 31 | #define VPU_ARB_CTRL_UC_LIMIT_BITS 1:0 32 | #define VPU_ARB_CTRL_UC_LIMIT_SET 0x00000003 33 | #define VPU_ARB_CTRL_UC_LIMIT_CLR 0xfffffffc 34 | #define VPU_ARB_CTRL_UC_LIMIT_MSB 1 35 | #define VPU_ARB_CTRL_UC_LIMIT_LSB 0 36 | #define VPU_ARB_CTRL_UC_LIMIT_RESET 0x0 37 | #define VPU_ARB_CTRL_L2 HW_REGISTER_RW( 0x7ee04004 ) 38 | #define VPU_ARB_CTRL_L2_MASK 0x0000ffff 39 | #define VPU_ARB_CTRL_L2_WIDTH 16 40 | #define VPU_ARB_CTRL_L2_RESET 0000000000 41 | #define VPU_ARB_CTRL_L2_CHANNEL_INIBIT_BITS 15:8 42 | #define VPU_ARB_CTRL_L2_CHANNEL_INIBIT_SET 0x0000ff00 43 | #define VPU_ARB_CTRL_L2_CHANNEL_INIBIT_CLR 0xffff00ff 44 | #define VPU_ARB_CTRL_L2_CHANNEL_INIBIT_MSB 15 45 | #define VPU_ARB_CTRL_L2_CHANNEL_INIBIT_LSB 8 46 | #define VPU_ARB_CTRL_L2_CHANNEL_INIBIT_RESET 0x0 47 | #define VPU_ARB_CTRL_L2_ALGORITHM_BITS 7:6 48 | #define VPU_ARB_CTRL_L2_ALGORITHM_SET 0x000000c0 49 | #define VPU_ARB_CTRL_L2_ALGORITHM_CLR 0xffffff3f 50 | #define VPU_ARB_CTRL_L2_ALGORITHM_MSB 7 51 | #define VPU_ARB_CTRL_L2_ALGORITHM_LSB 6 52 | #define VPU_ARB_CTRL_L2_ALGORITHM_RESET 0x0 53 | #define VPU_ARB_CTRL_L2_THRESHOLD_BITS 5:4 54 | #define VPU_ARB_CTRL_L2_THRESHOLD_SET 0x00000030 55 | #define VPU_ARB_CTRL_L2_THRESHOLD_CLR 0xffffffcf 56 | #define VPU_ARB_CTRL_L2_THRESHOLD_MSB 5 57 | #define VPU_ARB_CTRL_L2_THRESHOLD_LSB 4 58 | #define VPU_ARB_CTRL_L2_THRESHOLD_RESET 0x0 59 | #define VPU_ARB_CTRL_L2_DELAY_BITS 3:2 60 | #define VPU_ARB_CTRL_L2_DELAY_SET 0x0000000c 61 | #define VPU_ARB_CTRL_L2_DELAY_CLR 0xfffffff3 62 | #define VPU_ARB_CTRL_L2_DELAY_MSB 3 63 | #define VPU_ARB_CTRL_L2_DELAY_LSB 2 64 | #define VPU_ARB_CTRL_L2_DELAY_RESET 0x0 65 | #define VPU_ARB_CTRL_L2_LIMIT_BITS 1:0 66 | #define VPU_ARB_CTRL_L2_LIMIT_SET 0x00000003 67 | #define VPU_ARB_CTRL_L2_LIMIT_CLR 0xfffffffc 68 | #define VPU_ARB_CTRL_L2_LIMIT_MSB 1 69 | #define VPU_ARB_CTRL_L2_LIMIT_LSB 0 70 | #define VPU_ARB_CTRL_L2_LIMIT_RESET 0x0 71 | -------------------------------------------------------------------------------- /arm_chainloader/lib_armv6/arm_bzero.s: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2006, 2009 Apple Inc. All rights reserved. 3 | * 4 | * @APPLE_LICENSE_HEADER_START@ 5 | * 6 | * This file contains Original Code and/or Modifications of Original Code 7 | * as defined in and that are subject to the Apple Public Source License 8 | * Version 2.0 (the 'License'). You may not use this file except in 9 | * compliance with the License. Please obtain a copy of the License at 10 | * http://www.opensource.apple.com/apsl/ and read it before using this 11 | * file. 12 | * 13 | * The Original Code and all software distributed under the License are 14 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER 15 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, 16 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, 17 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. 18 | * Please see the License for the specific language governing rights and 19 | * limitations under the License. 20 | * 21 | * @APPLE_LICENSE_HEADER_END@ 22 | */ 23 | 24 | /* 25 | * A reasonably well-optimized bzero/memset. Should work equally well on arm11 and arm9 based 26 | * cores. 27 | * 28 | * The algorithm is to align the destination pointer on a 32 byte boundary and then 29 | * blast data 64 bytes at a time, in two stores of 32 bytes per loop. 30 | */ 31 | .text 32 | .align 2 33 | 34 | .globl memset 35 | /* void *memset(void *ptr, int c, size_t len); */ 36 | memset: 37 | /* move len into r1, unpack c into r2 */ 38 | mov r3, r2 39 | and r1, r1, #0xff 40 | orr r1, r1, r1, lsl #8 41 | orr r2, r1, r1, lsl #16 42 | mov r1, r3 43 | b Lbzeroengine 44 | 45 | .globl bzero 46 | /* void bzero(void *ptr, size_t len); */ 47 | bzero: 48 | /* zero out r2 so we can be just like memset(0) */ 49 | mov r2, #0 50 | 51 | Lbzeroengine: 52 | /* move the base pointer into r12 and leave r0 alone so that we return the original pointer */ 53 | mov r12, r0 54 | 55 | /* copy r2 into r3 for 64-bit stores */ 56 | mov r3, r2 57 | 58 | /* check for zero len */ 59 | cmp r1, #0 60 | bxeq lr 61 | 62 | /* fall back to a bytewise store for less than 32 bytes */ 63 | cmp r1, #32 64 | blt L_bytewise 65 | 66 | /* check for 32 byte unaligned ptr */ 67 | tst r12, #0x1f 68 | bne L_unaligned 69 | 70 | /* make sure we have more than 64 bytes to zero */ 71 | cmp r1, #64 72 | blt L_lessthan64aligned 73 | 74 | /* >= 64 bytes of len, 32 byte aligned */ 75 | L_64ormorealigned: 76 | 77 | /* we need some registers, avoid r7 (frame pointer) and r9 (thread register) */ 78 | stmfd sp!, { r4-r6, r8, r10-r11 } 79 | mov r4, r2 80 | mov r5, r2 81 | mov r6, r2 82 | mov r8, r2 83 | mov r10, r2 84 | mov r11, r2 85 | 86 | /* pre-subtract 64 from the len to avoid an extra compare in the loop */ 87 | sub r1, r1, #64 88 | 89 | L_64loop: 90 | stmia r12!, { r2-r6, r8, r10-r11 } 91 | subs r1, r1, #64 92 | stmia r12!, { r2-r6, r8, r10-r11 } 93 | bge L_64loop 94 | 95 | /* restore the saved regs */ 96 | ldmfd sp!, { r4-r6, r8, r10-r11 } 97 | 98 | /* check for completion (had previously subtracted an extra 64 from len) */ 99 | adds r1, r1, #64 100 | bxeq lr 101 | 102 | L_lessthan64aligned: 103 | /* do we have 16 or more bytes left */ 104 | cmp r1, #16 105 | stmgeia r12!, { r2-r3 } 106 | stmgeia r12!, { r2-r3 } 107 | subges r1, r1, #16 108 | bgt L_lessthan64aligned 109 | bxeq lr 110 | 111 | L_lessthan16aligned: 112 | /* store 0 to 15 bytes */ 113 | mov r1, r1, lsl #28 /* move the remaining len bits [3:0] to the flags area of cpsr */ 114 | msr cpsr_f, r1 115 | 116 | stmmiia r12!, { r2-r3 } /* n is set, store 8 bytes */ 117 | streq r2, [r12], #4 /* z is set, store 4 bytes */ 118 | strcsh r2, [r12], #2 /* c is set, store 2 bytes */ 119 | strvsb r2, [r12], #1 /* v is set, store 1 byte */ 120 | bx lr 121 | 122 | L_bytewise: 123 | /* bytewise copy, 2 bytes at a time, alignment not guaranteed */ 124 | subs r1, r1, #2 125 | strb r2, [r12], #1 126 | strplb r2, [r12], #1 127 | bhi L_bytewise 128 | bx lr 129 | 130 | L_unaligned: 131 | /* unaligned on 32 byte boundary, store 1-15 bytes until we're 16 byte aligned */ 132 | mov r3, r12, lsl #28 133 | rsb r3, r3, #0x00000000 134 | msr cpsr_f, r3 135 | 136 | strvsb r2, [r12], #1 /* v is set, unaligned in the 1s column */ 137 | strcsh r2, [r12], #2 /* c is set, unaligned in the 2s column */ 138 | streq r2, [r12], #4 /* z is set, unaligned in the 4s column */ 139 | strmi r2, [r12], #4 /* n is set, unaligned in the 8s column */ 140 | strmi r2, [r12], #4 141 | 142 | subs r1, r1, r3, lsr #28 143 | bxeq lr 144 | 145 | /* we had previously trashed r3, restore it */ 146 | mov r3, r2 147 | 148 | /* now make sure we're 32 byte aligned */ 149 | tst r12, #(1 << 4) 150 | stmneia r12!, { r2-r3 } 151 | stmneia r12!, { r2-r3 } 152 | subnes r1, r1, #16 153 | 154 | /* we're now aligned, check for >= 64 bytes left */ 155 | cmp r1, #64 156 | bge L_64ormorealigned 157 | b L_lessthan64aligned -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/tempsens.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define TS_BASE 0x7e212000 3 | #define TS_APB_ID 0x7473656e 4 | #define TS_TSENSCTL HW_REGISTER_RW( 0x7e212000 ) 5 | #define TS_TSENSCTL_MASK 0x07ffffff 6 | #define TS_TSENSCTL_WIDTH 27 7 | #define TS_TSENSCTL_RESET 0000000000 8 | #define TS_TSENSCTL_PRWDW_BITS 0:0 9 | #define TS_TSENSCTL_PRWDW_SET 0x00000001 10 | #define TS_TSENSCTL_PRWDW_CLR 0xfffffffe 11 | #define TS_TSENSCTL_PRWDW_MSB 0 12 | #define TS_TSENSCTL_PRWDW_LSB 0 13 | #define TS_TSENSCTL_RSTB_BITS 1:1 14 | #define TS_TSENSCTL_RSTB_SET 0x00000002 15 | #define TS_TSENSCTL_RSTB_CLR 0xfffffffd 16 | #define TS_TSENSCTL_RSTB_MSB 1 17 | #define TS_TSENSCTL_RSTB_LSB 1 18 | #define TS_TSENSCTL_CTRL_BITS 4:2 19 | #define TS_TSENSCTL_CTRL_SET 0x0000001c 20 | #define TS_TSENSCTL_CTRL_CLR 0xffffffe3 21 | #define TS_TSENSCTL_CTRL_MSB 4 22 | #define TS_TSENSCTL_CTRL_LSB 2 23 | #define TS_TSENSCTL_EN_INT_BITS 5:5 24 | #define TS_TSENSCTL_EN_INT_SET 0x00000020 25 | #define TS_TSENSCTL_EN_INT_CLR 0xffffffdf 26 | #define TS_TSENSCTL_EN_INT_MSB 5 27 | #define TS_TSENSCTL_EN_INT_LSB 5 28 | #define TS_TSENSCTL_DIRECT_BITS 6:6 29 | #define TS_TSENSCTL_DIRECT_SET 0x00000040 30 | #define TS_TSENSCTL_DIRECT_CLR 0xffffffbf 31 | #define TS_TSENSCTL_DIRECT_MSB 6 32 | #define TS_TSENSCTL_DIRECT_LSB 6 33 | #define TS_TSENSCTL_CLR_INT_BITS 7:7 34 | #define TS_TSENSCTL_CLR_INT_SET 0x00000080 35 | #define TS_TSENSCTL_CLR_INT_CLR 0xffffff7f 36 | #define TS_TSENSCTL_CLR_INT_MSB 7 37 | #define TS_TSENSCTL_CLR_INT_LSB 7 38 | #define TS_TSENSCTL_THOLD_BITS 17:8 39 | #define TS_TSENSCTL_THOLD_SET 0x0003ff00 40 | #define TS_TSENSCTL_THOLD_CLR 0xfffc00ff 41 | #define TS_TSENSCTL_THOLD_MSB 17 42 | #define TS_TSENSCTL_THOLD_LSB 8 43 | #define TS_TSENSCTL_RSTDELAY_BITS 25:18 44 | #define TS_TSENSCTL_RSTDELAY_SET 0x03fc0000 45 | #define TS_TSENSCTL_RSTDELAY_CLR 0xfc03ffff 46 | #define TS_TSENSCTL_RSTDELAY_MSB 25 47 | #define TS_TSENSCTL_RSTDELAY_LSB 18 48 | #define TS_TSENSCTL_REGULEN_BITS 26:26 49 | #define TS_TSENSCTL_REGULEN_SET 0x04000000 50 | #define TS_TSENSCTL_REGULEN_CLR 0xfbffffff 51 | #define TS_TSENSCTL_REGULEN_MSB 26 52 | #define TS_TSENSCTL_REGULEN_LSB 26 53 | #define TS_TSENSSTAT HW_REGISTER_RW( 0x7e212004 ) 54 | #define TS_TSENSSTAT_MASK 0x00000fff 55 | #define TS_TSENSSTAT_WIDTH 12 56 | #define TS_TSENSSTAT_RESET 0000000000 57 | #define TS_TSENSSTAT_DATA_BITS 9:0 58 | #define TS_TSENSSTAT_DATA_SET 0x000003ff 59 | #define TS_TSENSSTAT_DATA_CLR 0xfffffc00 60 | #define TS_TSENSSTAT_DATA_MSB 9 61 | #define TS_TSENSSTAT_DATA_LSB 0 62 | #define TS_TSENSSTAT_VALID_BITS 10:10 63 | #define TS_TSENSSTAT_VALID_SET 0x00000400 64 | #define TS_TSENSSTAT_VALID_CLR 0xfffffbff 65 | #define TS_TSENSSTAT_VALID_MSB 10 66 | #define TS_TSENSSTAT_VALID_LSB 10 67 | #define TS_TSENSSTAT_INTERUPT_BITS 11:11 68 | #define TS_TSENSSTAT_INTERUPT_SET 0x00000800 69 | #define TS_TSENSSTAT_INTERUPT_CLR 0xfffff7ff 70 | #define TS_TSENSSTAT_INTERUPT_MSB 11 71 | #define TS_TSENSSTAT_INTERUPT_LSB 11 72 | -------------------------------------------------------------------------------- /start.s: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | Entry. 17 | 18 | A small explanation. The ROM loads bootcode.bin at 0x80000000 and jumps to 19 | 0x80000200. This region corresponds to L1/L2 cached IO and cache is never 20 | evicted as long as we don't touch memory above that. This gives us 128KB 21 | of memory at startup. 22 | 23 | Exception names are from the public release from: 24 | brcm_usrlib\dag\vmcsx\vcfw\rtos\none\rtos_none.c 25 | 26 | =============================================================================*/ 27 | 28 | .text 29 | 30 | empty_space: 31 | .space 0x200 32 | 33 | /* MMIO-mapped registers for the interrupt table */ 34 | 35 | .set IC0_BASE, 0x7e002000 36 | .set IC0_VADDR, 0x7e002030 37 | 38 | .set IC1_BASE, 0x7e002800 39 | .set IC1_VADDR, 0x7e002830 40 | 41 | /* main entry point */ 42 | 43 | .globl _start 44 | .align 2 45 | _start: 46 | version r0 47 | mov r5, r0 48 | 49 | /* vectors */ 50 | mov r3, #0x1B000 51 | mov r1, r3 52 | 53 | /* 54 | * populate the exception vector table using PC relative labels 55 | * so the code isnt position dependent 56 | */ 57 | .macro RegExceptionHandler label, exception_number 58 | lea r2, fleh_\label 59 | st r2, (r1) 60 | add r1, #4 61 | .endm 62 | 63 | RegExceptionHandler zero, #0 64 | RegExceptionHandler misaligned, #1 65 | RegExceptionHandler dividebyzero, #2 66 | RegExceptionHandler undefinedinstruction, #3 67 | RegExceptionHandler forbiddeninstruction, #4 68 | RegExceptionHandler illegalmemory, #5 69 | RegExceptionHandler buserror, #6 70 | RegExceptionHandler floatingpoint, #7 71 | RegExceptionHandler isp, #8 72 | RegExceptionHandler dummy, #9 73 | RegExceptionHandler icache, #10 74 | RegExceptionHandler veccore, #11 75 | RegExceptionHandler badl2alias, #12 76 | RegExceptionHandler breakpoint, #13 77 | RegExceptionHandler unknown, #14 78 | RegExceptionHandler unknown, #15 79 | RegExceptionHandler unknown, #16 80 | RegExceptionHandler unknown, #17 81 | RegExceptionHandler unknown, #18 82 | RegExceptionHandler unknown, #19 83 | RegExceptionHandler unknown, #20 84 | RegExceptionHandler unknown, #21 85 | RegExceptionHandler unknown, #22 86 | RegExceptionHandler unknown, #23 87 | RegExceptionHandler unknown, #24 88 | RegExceptionHandler unknown, #25 89 | RegExceptionHandler unknown, #26 90 | RegExceptionHandler unknown, #27 91 | RegExceptionHandler unknown, #28 92 | RegExceptionHandler unknown, #29 93 | RegExceptionHandler unknown, #30 94 | RegExceptionHandler unknown, #31 95 | 96 | add r1, r3, #128 97 | lea r2, fleh_irq 98 | add r4, r3, #572 99 | 100 | L_setup_hw_irq: 101 | st r2, (r1) 102 | add r1, #4 103 | ble r1, r4, L_setup_hw_irq 104 | 105 | /* 106 | * load the interrupt and normal stack pointers. these 107 | * are chosen to be near the top of the available cache memory 108 | */ 109 | 110 | mov r28, #0x1D000 111 | mov sp, #0x1C000 112 | 113 | /* jump to C code */ 114 | mov r0, r5 115 | lea r1, _start 116 | 117 | bl _main 118 | 119 | /************************************************************ 120 | * Exception Handling 121 | ************************************************************/ 122 | 123 | .macro SaveRegsLower 124 | stm lr, (--sp) 125 | stm r0-r5, (--sp) 126 | .endm 127 | 128 | .macro SaveRegsUpper 129 | stm r6-r15, (--sp) 130 | stm r16-r23, (--sp) 131 | .endm 132 | 133 | .macro SaveRegsAll 134 | SaveRegsLower 135 | SaveRegsUpper 136 | .endm 137 | 138 | fatal_exception: 139 | SaveRegsUpper 140 | mov r0, sp 141 | b sleh_fatal 142 | 143 | .macro ExceptionHandler label, exception_number 144 | fleh_\label: 145 | SaveRegsLower 146 | mov r1, \exception_number 147 | b fatal_exception 148 | .endm 149 | 150 | ExceptionHandler zero, #0 151 | ExceptionHandler misaligned, #1 152 | ExceptionHandler dividebyzero, #2 153 | ExceptionHandler undefinedinstruction, #3 154 | ExceptionHandler forbiddeninstruction, #4 155 | ExceptionHandler illegalmemory, #5 156 | ExceptionHandler buserror, #6 157 | ExceptionHandler floatingpoint, #7 158 | ExceptionHandler isp, #8 159 | ExceptionHandler dummy, #9 160 | ExceptionHandler icache, #10 161 | ExceptionHandler veccore, #11 162 | ExceptionHandler badl2alias, #12 163 | ExceptionHandler breakpoint, #13 164 | ExceptionHandler unknown, #14 165 | 166 | fleh_irq: 167 | SaveRegsAll 168 | 169 | /* top of savearea */ 170 | mov r0, sp 171 | mov r1, r29 172 | bl sleh_irq 173 | 174 | return_from_exception: 175 | ldm r16-r23, (sp++) 176 | ldm r6-r15, (sp++) 177 | ldm r0-r5, (sp++) 178 | ld lr, (sp++) 179 | rti 180 | 181 | /* include chainloader */ 182 | 183 | .align 2 184 | .globl L_arm_code_start 185 | L_arm_code_start: 186 | 187 | .incbin "arm_chainloader/build/arm_chainloader.bin" 188 | 189 | .globl L_arm_code_end 190 | L_arm_code_end: 191 | -------------------------------------------------------------------------------- /arm_chainloader/drivers/fatfs/option/syscall.c: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------*/ 2 | /* Sample code of OS dependent controls for FatFs */ 3 | /* (C)ChaN, 2014 */ 4 | /*------------------------------------------------------------------------*/ 5 | 6 | 7 | #include "../ff.h" 8 | 9 | 10 | #if _FS_REENTRANT 11 | /*------------------------------------------------------------------------*/ 12 | /* Create a Synchronization Object 13 | /*------------------------------------------------------------------------*/ 14 | /* This function is called in f_mount() function to create a new 15 | / synchronization object, such as semaphore and mutex. When a 0 is returned, 16 | / the f_mount() function fails with FR_INT_ERR. 17 | */ 18 | 19 | int ff_cre_syncobj ( /* 1:Function succeeded, 0:Could not create the sync object */ 20 | BYTE vol, /* Corresponding volume (logical drive number) */ 21 | _SYNC_t *sobj /* Pointer to return the created sync object */ 22 | ) 23 | { 24 | int ret; 25 | 26 | 27 | *sobj = CreateMutex(NULL, FALSE, NULL); /* Win32 */ 28 | ret = (int)(*sobj != INVALID_HANDLE_VALUE); 29 | 30 | // *sobj = SyncObjects[vol]; /* uITRON (give a static sync object) */ 31 | // ret = 1; /* The initial value of the semaphore must be 1. */ 32 | 33 | // *sobj = OSMutexCreate(0, &err); /* uC/OS-II */ 34 | // ret = (int)(err == OS_NO_ERR); 35 | 36 | // *sobj = xSemaphoreCreateMutex(); /* FreeRTOS */ 37 | // ret = (int)(*sobj != NULL); 38 | 39 | return ret; 40 | } 41 | 42 | 43 | 44 | /*------------------------------------------------------------------------*/ 45 | /* Delete a Synchronization Object */ 46 | /*------------------------------------------------------------------------*/ 47 | /* This function is called in f_mount() function to delete a synchronization 48 | / object that created with ff_cre_syncobj() function. When a 0 is returned, 49 | / the f_mount() function fails with FR_INT_ERR. 50 | */ 51 | 52 | int ff_del_syncobj ( /* 1:Function succeeded, 0:Could not delete due to any error */ 53 | _SYNC_t sobj /* Sync object tied to the logical drive to be deleted */ 54 | ) 55 | { 56 | int ret; 57 | 58 | 59 | ret = CloseHandle(sobj); /* Win32 */ 60 | 61 | // ret = 1; /* uITRON (nothing to do) */ 62 | 63 | // OSMutexDel(sobj, OS_DEL_ALWAYS, &err); /* uC/OS-II */ 64 | // ret = (int)(err == OS_NO_ERR); 65 | 66 | // vSemaphoreDelete(sobj); /* FreeRTOS */ 67 | // ret = 1; 68 | 69 | return ret; 70 | } 71 | 72 | 73 | 74 | /*------------------------------------------------------------------------*/ 75 | /* Request Grant to Access the Volume */ 76 | /*------------------------------------------------------------------------*/ 77 | /* This function is called on entering file functions to lock the volume. 78 | / When a 0 is returned, the file function fails with FR_TIMEOUT. 79 | */ 80 | 81 | int ff_req_grant ( /* 1:Got a grant to access the volume, 0:Could not get a grant */ 82 | _SYNC_t sobj /* Sync object to wait */ 83 | ) 84 | { 85 | int ret; 86 | 87 | ret = (int)(WaitForSingleObject(sobj, _FS_TIMEOUT) == WAIT_OBJECT_0); /* Win32 */ 88 | 89 | // ret = (int)(wai_sem(sobj) == E_OK); /* uITRON */ 90 | 91 | // OSMutexPend(sobj, _FS_TIMEOUT, &err)); /* uC/OS-II */ 92 | // ret = (int)(err == OS_NO_ERR); 93 | 94 | // ret = (int)(xSemaphoreTake(sobj, _FS_TIMEOUT) == pdTRUE); /* FreeRTOS */ 95 | 96 | return ret; 97 | } 98 | 99 | 100 | 101 | /*------------------------------------------------------------------------*/ 102 | /* Release Grant to Access the Volume */ 103 | /*------------------------------------------------------------------------*/ 104 | /* This function is called on leaving file functions to unlock the volume. 105 | */ 106 | 107 | void ff_rel_grant ( 108 | _SYNC_t sobj /* Sync object to be signaled */ 109 | ) 110 | { 111 | ReleaseMutex(sobj); /* Win32 */ 112 | 113 | // sig_sem(sobj); /* uITRON */ 114 | 115 | // OSMutexPost(sobj); /* uC/OS-II */ 116 | 117 | // xSemaphoreGive(sobj); /* FreeRTOS */ 118 | } 119 | 120 | #endif 121 | 122 | 123 | 124 | 125 | #if _USE_LFN == 3 /* LFN with a working buffer on the heap */ 126 | /*------------------------------------------------------------------------*/ 127 | /* Allocate a memory block */ 128 | /*------------------------------------------------------------------------*/ 129 | /* If a NULL is returned, the file function fails with FR_NOT_ENOUGH_CORE. 130 | */ 131 | 132 | void* ff_memalloc ( /* Returns pointer to the allocated memory block */ 133 | UINT msize /* Number of bytes to allocate */ 134 | ) 135 | { 136 | return malloc(msize); /* Allocate a new memory block with POSIX API */ 137 | } 138 | 139 | 140 | /*------------------------------------------------------------------------*/ 141 | /* Free a memory block */ 142 | /*------------------------------------------------------------------------*/ 143 | 144 | void ff_memfree ( 145 | void* mblock /* Pointer to the memory block to free */ 146 | ) 147 | { 148 | free(mblock); /* Discard the memory block with POSIX API */ 149 | } 150 | 151 | #endif 152 | -------------------------------------------------------------------------------- /romstage.c: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | VideoCoreIV first stage bootloader. 17 | 18 | =============================================================================*/ 19 | 20 | #include 21 | #include 22 | 23 | uint32_t g_CPUID; 24 | 25 | #define UART_IBRD (UART_BASE+0x24) 26 | #define UART_FBRD (UART_BASE+0x28) 27 | #define UART_LCRH (UART_BASE+0x2C) 28 | #define UART_CR (UART_BASE+0x30) 29 | #define UART_ICR (UART_BASE+0x44) 30 | 31 | void uart_putc(unsigned int ch) { 32 | while(UART_MSR & 0x20); 33 | UART_RBRTHRDLL = ch; 34 | } 35 | 36 | void uart_init(void) { 37 | unsigned int ra = GP_FSEL1; 38 | ra &= ~(7 << 12); 39 | ra |= 4 << 12; 40 | ra &= ~(7 << 15); 41 | ra |= 4 << 15; 42 | GP_FSEL1 = ra; 43 | 44 | mmio_write32(UART_CR, 0); 45 | 46 | GP_PUD = 0; 47 | udelay(150); 48 | GP_PUDCLK0 = (1 << 14) | (1 << 15); 49 | udelay(150); 50 | GP_PUDCLK0 = 0; 51 | 52 | CM_UARTDIV = CM_PASSWORD | 0x6666; 53 | CM_UARTCTL = CM_PASSWORD | CM_SRC_OSC | CM_UARTCTL_FRAC_SET | CM_UARTCTL_ENAB_SET; 54 | 55 | mmio_write32(UART_ICR, 0x7FF); 56 | mmio_write32(UART_IBRD, 1); 57 | mmio_write32(UART_FBRD, 40); 58 | mmio_write32(UART_LCRH, 0x70); 59 | mmio_write32(UART_CR, 0x301); 60 | } 61 | 62 | void switch_vpu_to_pllc() { 63 | A2W_XOSC_CTRL |= A2W_PASSWORD | A2W_XOSC_CTRL_PLLCEN_SET; 64 | 65 | A2W_PLLC_FRAC = A2W_PASSWORD | 87380; 66 | A2W_PLLC_CTRL = A2W_PASSWORD | 52 | 0x1000; 67 | 68 | A2W_PLLC_ANA3 = A2W_PASSWORD | 0x100; 69 | A2W_PLLC_ANA2 = A2W_PASSWORD | 0x0; 70 | A2W_PLLC_ANA1 = A2W_PASSWORD | 0x144000; 71 | A2W_PLLC_ANA0 = A2W_PASSWORD | 0x0; 72 | 73 | CM_PLLC = CM_PASSWORD | CM_PLLC_DIGRST_SET; 74 | 75 | /* hold all */ 76 | CM_PLLC = CM_PASSWORD | CM_PLLC_DIGRST_SET | 77 | CM_PLLC_HOLDPER_SET | CM_PLLC_HOLDCORE2_SET | 78 | CM_PLLC_HOLDCORE1_SET | CM_PLLC_HOLDCORE0_SET; 79 | 80 | A2W_PLLC_DIG3 = A2W_PASSWORD | 0x0; 81 | A2W_PLLC_DIG2 = A2W_PASSWORD | 0x400000; 82 | A2W_PLLC_DIG1 = A2W_PASSWORD | 0x5; 83 | A2W_PLLC_DIG0 = A2W_PASSWORD | 52 | 0x555000; 84 | 85 | A2W_PLLC_CTRL = A2W_PASSWORD | 52 | 0x1000 | A2W_PLLC_CTRL_PRSTN_SET; 86 | 87 | A2W_PLLC_DIG3 = A2W_PASSWORD | 0x42; 88 | A2W_PLLC_DIG2 = A2W_PASSWORD | 0x500401; 89 | A2W_PLLC_DIG1 = A2W_PASSWORD | 0x4005; 90 | A2W_PLLC_DIG0 = A2W_PASSWORD | 52 | 0x555000; 91 | 92 | A2W_PLLC_CORE0 = A2W_PASSWORD | 2; 93 | 94 | CM_PLLC = CM_PASSWORD | CM_PLLC_DIGRST_SET | 95 | CM_PLLC_HOLDPER_SET | CM_PLLC_HOLDCORE2_SET | 96 | CM_PLLC_HOLDCORE1_SET | CM_PLLC_HOLDCORE0_SET | CM_PLLC_LOADCORE0_SET; 97 | 98 | CM_PLLC = CM_PASSWORD | CM_PLLC_DIGRST_SET | 99 | CM_PLLC_HOLDPER_SET | CM_PLLC_HOLDCORE2_SET | 100 | CM_PLLC_HOLDCORE1_SET | CM_PLLC_HOLDCORE0_SET; 101 | 102 | CM_PLLC = CM_PASSWORD | CM_PLLC_DIGRST_SET | 103 | CM_PLLC_HOLDPER_SET | CM_PLLC_HOLDCORE2_SET | 104 | CM_PLLC_HOLDCORE1_SET; 105 | 106 | CM_VPUCTL = CM_PASSWORD | CM_VPUCTL_FRAC_SET | CM_SRC_OSC | CM_VPUCTL_GATE_SET; 107 | CM_VPUDIV = CM_PASSWORD | (4 << 12); 108 | CM_VPUCTL = CM_PASSWORD | CM_SRC_PLLC_CORE0 | CM_VPUCTL_GATE_SET; 109 | CM_VPUCTL = CM_PASSWORD | CM_SRC_PLLC_CORE0 | CM_VPUCTL_GATE_SET | 0x10; /* ENAB */ 110 | 111 | CM_TIMERDIV = CM_PASSWORD | (19 << 12) | 819; 112 | CM_TIMERCTL = CM_PASSWORD | CM_SRC_OSC | 0x10; 113 | } 114 | 115 | void set_interrupt(int intno, bool enable, int core) { 116 | int base = (core == 0) ? IC0_BASE : IC1_BASE; 117 | 118 | int offset = 0x10 + ((intno >> 3) << 2); 119 | uint32_t slot = 0xF << ((intno & 7) << 2); 120 | 121 | uint32_t v = mmio_read32(base + offset) & ~slot; 122 | mmio_write32(base + offset, enable ? v | slot : v); 123 | } 124 | 125 | extern void sdram_init(); 126 | extern void arm_init(); 127 | extern void monitor_start(); 128 | extern void PEStartPlatform(); 129 | 130 | int _main(unsigned int cpuid, unsigned int load_address) { 131 | switch_vpu_to_pllc(); 132 | 133 | uart_init(); 134 | 135 | for(int i = 0; i < 64; ++i) { 136 | set_interrupt(i, (i != (125 - 64)) && (i != (121 - 64)) && (i != (120 - 64)) && (i != (73 - 64)) && (i != (96 - 64)), 0); 137 | set_interrupt(i, 0, 1); 138 | } 139 | 140 | IC0_VADDR = 0x1B000; 141 | IC1_VADDR = 0x1B000; 142 | 143 | __asm__ volatile("ei"); 144 | 145 | printf( 146 | "Booting Raspberry Pi....\n" 147 | "Copyright 2016-2017 rpi-open-firmware authors \n" 148 | "BUILDATE : %s %s \n", 149 | __DATE__, __TIME__ 150 | ); 151 | 152 | g_CPUID = cpuid; 153 | 154 | __cxx_init(); 155 | 156 | /* bring up SDRAM */ 157 | sdram_init(); 158 | printf("SDRAM initialization completed successfully!\n"); 159 | 160 | PEStartPlatform(); 161 | 162 | /* start vpu monitor */ 163 | monitor_start(); 164 | 165 | panic("main exiting!"); 166 | } 167 | -------------------------------------------------------------------------------- /arm_chainloader/loader.cc: -------------------------------------------------------------------------------- 1 | /*============================================================================= 2 | Copyright (C) 2016-2017 Authors of rpi-open-firmware 3 | All rights reserved. 4 | 5 | This program is free software; you can redistribute it and/or 6 | modify it under the terms of the GNU General Public License 7 | as published by the Free Software Foundation; either version 2 8 | of the License, or (at your option) any later version. 9 | 10 | This program is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | FILE DESCRIPTION 16 | Second stage bootloader. 17 | 18 | =============================================================================*/ 19 | 20 | #include 21 | #include 22 | #include 23 | #include 24 | #include 25 | #include 26 | #include 27 | 28 | #define logf(fmt, ...) printf("[LDR:%s]: " fmt, __FUNCTION__, ##__VA_ARGS__); 29 | 30 | FATFS g_BootVolumeFs; 31 | 32 | #define ROOT_VOLUME_PREFIX "0:" 33 | #define DTB_LOAD_ADDRESS 0xF000000 34 | #define KERNEL_LOAD_ADDRESS 0x2000000 35 | 36 | typedef void (*linux_t)(uint32_t, uint32_t, void*); 37 | 38 | static_assert((MEM_USABLE_START+0x800000) < KERNEL_LOAD_ADDRESS, 39 | "memory layout would not allow for kernel to be loaded at KERNEL_LOAD_ADDRESS, please check memory_map.h"); 40 | 41 | struct LoaderImpl { 42 | inline bool file_exists(const char* path) { 43 | return f_stat(path, NULL) == FR_OK; 44 | } 45 | 46 | size_t read_file(const char* path, uint8_t*& dest, bool should_alloc = true) { 47 | /* ensure file exists first */ 48 | if(!file_exists(path)) 49 | panic("attempted to read %s, but it does not exist", path); 50 | 51 | /* read entire file into buffer */ 52 | FIL fp; 53 | f_open(&fp, path, FA_READ); 54 | 55 | unsigned int len = f_size(&fp); 56 | 57 | if(should_alloc) { 58 | /* 59 | * since this can be used for strings, there's no harm in reserving an 60 | * extra byte for the null terminator and appending it. 61 | */ 62 | uint8_t* buffer = new uint8_t[len + 1]; 63 | dest = buffer; 64 | buffer[len] = 0; 65 | } 66 | 67 | logf("%s: reading %d bytes to 0x%X (allocated=%d) ...\n", path, len, (unsigned int)dest, should_alloc); 68 | 69 | f_read(&fp, dest, len, &len); 70 | f_close(&fp); 71 | 72 | return len; 73 | } 74 | 75 | uint8_t* load_fdt(const char* filename, uint8_t* cmdline) { 76 | /* read device tree blob */ 77 | uint8_t* fdt = reinterpret_cast(DTB_LOAD_ADDRESS); 78 | size_t sz = read_file(filename, fdt, false); 79 | logf("FDT loaded at %X\n", (unsigned int) fdt); 80 | 81 | void* v_fdt = reinterpret_cast(fdt); 82 | 83 | int res; 84 | 85 | if ((res = fdt_check_header(v_fdt)) != 0) { 86 | panic("fdt blob invalid, fdt_check_header returned %d", res); 87 | } 88 | 89 | /* pass in command line args */ 90 | res = fdt_open_into(v_fdt, v_fdt, sz + 4096); 91 | 92 | int node = fdt_path_offset(v_fdt, "/chosen"); 93 | if (node < 0) 94 | panic("no chosen node in fdt"); 95 | 96 | res = fdt_setprop(v_fdt, node, "bootargs", cmdline, strlen((char*) cmdline) + 1); 97 | 98 | /* pass in a memory map, skipping first meg for bootcode */ 99 | int memory = fdt_path_offset(v_fdt, "/memory"); 100 | if(memory < 0) 101 | panic("no memory node in fdt"); 102 | 103 | /* start the memory map at 1M/16 and grow continuous for 256M 104 | * TODO: does this disrupt I/O? */ 105 | 106 | char dtype[] = "memory"; 107 | uint8_t memmap[] = { 0x00, 0x00, 0x01, 0x00, 0x30, 0x00, 0x00, 0x00 }; 108 | res = fdt_setprop(v_fdt, memory, "reg", (void*) memmap, sizeof(memmap)); 109 | 110 | logf("(valid) fdt loaded at 0x%X\n", (unsigned int)fdt); 111 | 112 | return fdt; 113 | } 114 | 115 | void teardown_hardware() { 116 | BlockDevice* bd = get_sdhost_device(); 117 | if (bd) 118 | bd->stop(); 119 | } 120 | 121 | LoaderImpl() { 122 | logf("Mounting boot partitiion ...\n"); 123 | FRESULT r = f_mount(&g_BootVolumeFs, ROOT_VOLUME_PREFIX, 1); 124 | if (r != FR_OK) { 125 | panic("failed to mount boot partition, error: %d", (int)r); 126 | } 127 | logf("Boot partition mounted!\n"); 128 | 129 | /* read the command-line null-terminated */ 130 | uint8_t* cmdline; 131 | size_t cmdlen = read_file("cmdline.txt", cmdline); 132 | 133 | logf("kernel cmdline: %s\n", cmdline); 134 | 135 | /* load flat device tree */ 136 | uint8_t* fdt = load_fdt("rpi.dtb", cmdline); 137 | 138 | /* once the fdt contains the cmdline, it is not needed */ 139 | delete[] cmdline; 140 | 141 | /* read the kernel as a function pointer at fixed address */ 142 | uint8_t* zImage = reinterpret_cast(KERNEL_LOAD_ADDRESS); 143 | linux_t kernel = reinterpret_cast(zImage); 144 | 145 | size_t ksize = read_file("zImage", zImage, false); 146 | logf("zImage loaded at 0x%X\n", (unsigned int)kernel); 147 | 148 | /* flush the cache */ 149 | logf("Flushing....\n") 150 | for (uint8_t* i = zImage; i < zImage + ksize; i += 32) { 151 | __asm__ __volatile__ ("mcr p15,0,%0,c7,c10,1" : : "r" (i) : "memory"); 152 | } 153 | 154 | /* the eMMC card in particular needs to be reset */ 155 | teardown_hardware(); 156 | 157 | /* fire away -- this should never return */ 158 | logf("Jumping to the Linux kernel...\n"); 159 | kernel(0, ~0, fdt); 160 | } 161 | }; 162 | 163 | static LoaderImpl STATIC_APP g_Loader {}; 164 | -------------------------------------------------------------------------------- /broadcom/bcm2708_chip/clkman_image.h: -------------------------------------------------------------------------------- 1 | // This file was generated by the create_regs script 2 | #define CMI_PASSWORD 0x5a000000 3 | #define CMI_BASE 0x7e802000 4 | #define CMI_APB_ID 0x00636d69 5 | #define CMI_CAM0 HW_REGISTER_RW( 0x7e802000 ) 6 | #define CMI_CAM0_MASK 0x0000003f 7 | #define CMI_CAM0_WIDTH 6 8 | #define CMI_CAM0_RESET 0000000000 9 | #define CMI_CAM0_RX1SRC_BITS 5:4 10 | #define CMI_CAM0_RX1SRC_SET 0x00000030 11 | #define CMI_CAM0_RX1SRC_CLR 0xffffffcf 12 | #define CMI_CAM0_RX1SRC_MSB 5 13 | #define CMI_CAM0_RX1SRC_LSB 4 14 | #define CMI_CAM0_RX0SRC_BITS 3:2 15 | #define CMI_CAM0_RX0SRC_SET 0x0000000c 16 | #define CMI_CAM0_RX0SRC_CLR 0xfffffff3 17 | #define CMI_CAM0_RX0SRC_MSB 3 18 | #define CMI_CAM0_RX0SRC_LSB 2 19 | #define CMI_CAM0_HSSRC_BITS 1:0 20 | #define CMI_CAM0_HSSRC_SET 0x00000003 21 | #define CMI_CAM0_HSSRC_CLR 0xfffffffc 22 | #define CMI_CAM0_HSSRC_MSB 1 23 | #define CMI_CAM0_HSSRC_LSB 0 24 | #define CMI_CAM1 HW_REGISTER_RW( 0x7e802004 ) 25 | #define CMI_CAM1_MASK 0x000003ff 26 | #define CMI_CAM1_WIDTH 10 27 | #define CMI_CAM1_RESET 0000000000 28 | #define CMI_CAM1_RX3SRC_BITS 9:8 29 | #define CMI_CAM1_RX3SRC_SET 0x00000300 30 | #define CMI_CAM1_RX3SRC_CLR 0xfffffcff 31 | #define CMI_CAM1_RX3SRC_MSB 9 32 | #define CMI_CAM1_RX3SRC_LSB 8 33 | #define CMI_CAM1_RX2SRC_BITS 7:6 34 | #define CMI_CAM1_RX2SRC_SET 0x000000c0 35 | #define CMI_CAM1_RX2SRC_CLR 0xffffff3f 36 | #define CMI_CAM1_RX2SRC_MSB 7 37 | #define CMI_CAM1_RX2SRC_LSB 6 38 | #define CMI_CAM1_RX1SRC_BITS 5:4 39 | #define CMI_CAM1_RX1SRC_SET 0x00000030 40 | #define CMI_CAM1_RX1SRC_CLR 0xffffffcf 41 | #define CMI_CAM1_RX1SRC_MSB 5 42 | #define CMI_CAM1_RX1SRC_LSB 4 43 | #define CMI_CAM1_RX0SRC_BITS 3:2 44 | #define CMI_CAM1_RX0SRC_SET 0x0000000c 45 | #define CMI_CAM1_RX0SRC_CLR 0xfffffff3 46 | #define CMI_CAM1_RX0SRC_MSB 3 47 | #define CMI_CAM1_RX0SRC_LSB 2 48 | #define CMI_CAM1_HSSRC_BITS 1:0 49 | #define CMI_CAM1_HSSRC_SET 0x00000003 50 | #define CMI_CAM1_HSSRC_CLR 0xfffffffc 51 | #define CMI_CAM1_HSSRC_MSB 1 52 | #define CMI_CAM1_HSSRC_LSB 0 53 | #define CMI_CAMTEST HW_REGISTER_RW( 0x7e802008 ) 54 | #define CMI_CAMTEST_MASK 0x0000001f 55 | #define CMI_CAMTEST_WIDTH 5 56 | #define CMI_CAMTEST_RESET 0000000000 57 | #define CMI_CAMTEST_ENAB_BITS 4:4 58 | #define CMI_CAMTEST_ENAB_SET 0x00000010 59 | #define CMI_CAMTEST_ENAB_CLR 0xffffffef 60 | #define CMI_CAMTEST_ENAB_MSB 4 61 | #define CMI_CAMTEST_ENAB_LSB 4 62 | #define CMI_CAMTEST_SRC_BITS 3:0 63 | #define CMI_CAMTEST_SRC_SET 0x0000000f 64 | #define CMI_CAMTEST_SRC_CLR 0xfffffff0 65 | #define CMI_CAMTEST_SRC_MSB 3 66 | #define CMI_CAMTEST_SRC_LSB 0 67 | #define CMI_USBCTL HW_REGISTER_RW( 0x7e802010 ) 68 | #define CMI_USBCTL_MASK 0x00000040 69 | #define CMI_USBCTL_WIDTH 7 70 | #define CMI_USBCTL_RESET 0x00000040 71 | #define CMI_USBCTL_GATE_BITS 6:6 72 | #define CMI_USBCTL_GATE_SET 0x00000040 73 | #define CMI_USBCTL_GATE_CLR 0xffffffbf 74 | #define CMI_USBCTL_GATE_MSB 6 75 | #define CMI_USBCTL_GATE_LSB 6 76 | --------------------------------------------------------------------------------