├── Firmware ├── Compiled │ ├── DC29Artist2.uf2 │ ├── DC29Creator2.uf2 │ ├── DC29Goon2.uf2 │ ├── DC29Human3.uf2 │ ├── DC29Press2.uf2 │ ├── DC29Speaker2.uf2 │ ├── DC29Vendor2.uf2 │ ├── Instructions.txt │ └── dc29boot.hex └── Source │ ├── DC29 │ ├── DC29.componentinfo.xml │ ├── DC29.cproj │ ├── atmel_devices_cdc.cat │ ├── atmel_devices_cdc.inf │ ├── jlink.config │ └── src │ │ ├── ASF │ │ ├── common │ │ │ ├── boards │ │ │ │ └── board.h │ │ │ ├── services │ │ │ │ ├── sleepmgr │ │ │ │ │ ├── samd │ │ │ │ │ │ ├── sleepmgr.c │ │ │ │ │ │ └── sleepmgr.h │ │ │ │ │ └── sleepmgr.h │ │ │ │ └── usb │ │ │ │ │ ├── class │ │ │ │ │ ├── cdc │ │ │ │ │ │ ├── device │ │ │ │ │ │ │ ├── udi_cdc.c │ │ │ │ │ │ │ └── udi_cdc.h │ │ │ │ │ │ └── usb_protocol_cdc.h │ │ │ │ │ ├── composite │ │ │ │ │ │ └── device │ │ │ │ │ │ │ ├── udi_composite_conf.h │ │ │ │ │ │ │ └── udi_composite_desc.c │ │ │ │ │ └── hid │ │ │ │ │ │ ├── device │ │ │ │ │ │ ├── kbd │ │ │ │ │ │ │ ├── example │ │ │ │ │ │ │ │ └── samd21j18a_samd21_xplained_pro │ │ │ │ │ │ │ │ │ └── ui.c │ │ │ │ │ │ │ ├── udi_hid_kbd.c │ │ │ │ │ │ │ └── udi_hid_kbd.h │ │ │ │ │ │ ├── udi_hid.c │ │ │ │ │ │ └── udi_hid.h │ │ │ │ │ │ └── usb_protocol_hid.h │ │ │ │ │ ├── udc │ │ │ │ │ ├── udc.c │ │ │ │ │ ├── udc.h │ │ │ │ │ ├── udc_desc.h │ │ │ │ │ ├── udd.h │ │ │ │ │ └── udi.h │ │ │ │ │ ├── usb_atmel.h │ │ │ │ │ └── usb_protocol.h │ │ │ └── utils │ │ │ │ ├── interrupt.h │ │ │ │ ├── interrupt │ │ │ │ ├── interrupt_sam_nvic.c │ │ │ │ └── interrupt_sam_nvic.h │ │ │ │ └── parts.h │ │ ├── common2 │ │ │ └── services │ │ │ │ └── delay │ │ │ │ ├── delay.h │ │ │ │ └── sam0 │ │ │ │ ├── systick_counter.c │ │ │ │ └── systick_counter.h │ │ ├── sam0 │ │ │ ├── boards │ │ │ │ └── samd21_xplained_pro │ │ │ │ │ ├── board_init.c │ │ │ │ │ └── samd21_xplained_pro.h │ │ │ ├── drivers │ │ │ │ ├── extint │ │ │ │ │ ├── extint.h │ │ │ │ │ ├── extint_callback.c │ │ │ │ │ ├── extint_callback.h │ │ │ │ │ └── extint_sam_d_r_h │ │ │ │ │ │ └── extint.c │ │ │ │ ├── nvm │ │ │ │ │ ├── nvm.c │ │ │ │ │ ├── nvm.h │ │ │ │ │ └── quick_start_basic │ │ │ │ │ │ └── qs_nvm_basic.h │ │ │ │ ├── port │ │ │ │ │ ├── port.c │ │ │ │ │ ├── port.h │ │ │ │ │ └── quick_start │ │ │ │ │ │ └── qs_port_basic.h │ │ │ │ ├── rtc │ │ │ │ │ ├── rtc_count.h │ │ │ │ │ ├── rtc_count_interrupt.h │ │ │ │ │ ├── rtc_sam_d_r_h │ │ │ │ │ │ ├── rtc_count.c │ │ │ │ │ │ └── rtc_count_interrupt.c │ │ │ │ │ └── rtc_tamper.h │ │ │ │ ├── sercom │ │ │ │ │ ├── sercom.c │ │ │ │ │ ├── sercom.h │ │ │ │ │ ├── sercom_interrupt.c │ │ │ │ │ ├── sercom_interrupt.h │ │ │ │ │ ├── sercom_pinout.h │ │ │ │ │ └── usart │ │ │ │ │ │ ├── quick_start │ │ │ │ │ │ └── qs_usart_basic_use.h │ │ │ │ │ │ ├── quick_start_callback │ │ │ │ │ │ └── qs_usart_callback.h │ │ │ │ │ │ ├── quick_start_dma │ │ │ │ │ │ └── qs_usart_dma_use.h │ │ │ │ │ │ ├── quick_start_lin │ │ │ │ │ │ └── qs_lin.h │ │ │ │ │ │ ├── usart.c │ │ │ │ │ │ ├── usart.h │ │ │ │ │ │ ├── usart_interrupt.c │ │ │ │ │ │ └── usart_interrupt.h │ │ │ │ ├── system │ │ │ │ │ ├── clock │ │ │ │ │ │ ├── clock.h │ │ │ │ │ │ ├── clock_samd21_r21_da_ha1 │ │ │ │ │ │ │ ├── clock.c │ │ │ │ │ │ │ ├── clock_config_check.h │ │ │ │ │ │ │ ├── clock_feature.h │ │ │ │ │ │ │ └── gclk.c │ │ │ │ │ │ └── gclk.h │ │ │ │ │ ├── interrupt │ │ │ │ │ │ ├── system_interrupt.c │ │ │ │ │ │ ├── system_interrupt.h │ │ │ │ │ │ └── system_interrupt_samd21 │ │ │ │ │ │ │ └── system_interrupt_features.h │ │ │ │ │ ├── pinmux │ │ │ │ │ │ ├── pinmux.c │ │ │ │ │ │ ├── pinmux.h │ │ │ │ │ │ └── quick_start │ │ │ │ │ │ │ └── qs_pinmux_basic.h │ │ │ │ │ ├── power │ │ │ │ │ │ └── power_sam_d_r_h │ │ │ │ │ │ │ └── power.h │ │ │ │ │ ├── reset │ │ │ │ │ │ └── reset_sam_d_r_h │ │ │ │ │ │ │ └── reset.h │ │ │ │ │ ├── system.c │ │ │ │ │ └── system.h │ │ │ │ ├── tc │ │ │ │ │ ├── tc.h │ │ │ │ │ └── tc_sam_d_r_h │ │ │ │ │ │ └── tc.c │ │ │ │ ├── tcc │ │ │ │ │ ├── quick_start │ │ │ │ │ │ └── qs_tcc_basic.h │ │ │ │ │ ├── quick_start_buffering │ │ │ │ │ │ └── qs_tcc_buffering.h │ │ │ │ │ ├── quick_start_dma │ │ │ │ │ │ └── qs_tcc_dma.h │ │ │ │ │ ├── tcc.c │ │ │ │ │ └── tcc.h │ │ │ │ └── usb │ │ │ │ │ ├── stack_interface │ │ │ │ │ ├── usb_device_udd.c │ │ │ │ │ ├── usb_dual.c │ │ │ │ │ └── usb_dual.h │ │ │ │ │ ├── usb.h │ │ │ │ │ └── usb_sam_d_r │ │ │ │ │ └── usb.c │ │ │ ├── services │ │ │ │ └── eeprom │ │ │ │ │ └── emulator │ │ │ │ │ └── rwwee_array │ │ │ │ │ ├── quick_start │ │ │ │ │ └── qs_emulator_basic.h │ │ │ │ │ ├── rww_eeprom.c │ │ │ │ │ └── rww_eeprom.h │ │ │ └── utils │ │ │ │ ├── cmsis │ │ │ │ └── samd21 │ │ │ │ │ ├── include │ │ │ │ │ ├── component │ │ │ │ │ │ ├── ac.h │ │ │ │ │ │ ├── adc.h │ │ │ │ │ │ ├── dac.h │ │ │ │ │ │ ├── dmac.h │ │ │ │ │ │ ├── dsu.h │ │ │ │ │ │ ├── eic.h │ │ │ │ │ │ ├── evsys.h │ │ │ │ │ │ ├── evsys_variant_d.h │ │ │ │ │ │ ├── gclk.h │ │ │ │ │ │ ├── hmatrixb.h │ │ │ │ │ │ ├── i2s.h │ │ │ │ │ │ ├── mtb.h │ │ │ │ │ │ ├── nvmctrl.h │ │ │ │ │ │ ├── nvmctrl_variant_d.h │ │ │ │ │ │ ├── pac.h │ │ │ │ │ │ ├── pm.h │ │ │ │ │ │ ├── pm_variant_d.h │ │ │ │ │ │ ├── port.h │ │ │ │ │ │ ├── rtc.h │ │ │ │ │ │ ├── sercom.h │ │ │ │ │ │ ├── sysctrl.h │ │ │ │ │ │ ├── tc.h │ │ │ │ │ │ ├── tcc.h │ │ │ │ │ │ ├── tcc_lighting.h │ │ │ │ │ │ ├── tcc_variant_d.h │ │ │ │ │ │ ├── usb.h │ │ │ │ │ │ └── wdt.h │ │ │ │ │ ├── instance │ │ │ │ │ │ ├── ac.h │ │ │ │ │ │ ├── ac1.h │ │ │ │ │ │ ├── adc.h │ │ │ │ │ │ ├── dac.h │ │ │ │ │ │ ├── dmac.h │ │ │ │ │ │ ├── dsu.h │ │ │ │ │ │ ├── eic.h │ │ │ │ │ │ ├── evsys.h │ │ │ │ │ │ ├── evsys_variant_d.h │ │ │ │ │ │ ├── gclk.h │ │ │ │ │ │ ├── i2s.h │ │ │ │ │ │ ├── mtb.h │ │ │ │ │ │ ├── nvmctrl.h │ │ │ │ │ │ ├── nvmctrl_variant_d.h │ │ │ │ │ │ ├── pac0.h │ │ │ │ │ │ ├── pac1.h │ │ │ │ │ │ ├── pac2.h │ │ │ │ │ │ ├── pm.h │ │ │ │ │ │ ├── port.h │ │ │ │ │ │ ├── port_variant_d.h │ │ │ │ │ │ ├── rtc.h │ │ │ │ │ │ ├── sbmatrix.h │ │ │ │ │ │ ├── sercom0.h │ │ │ │ │ │ ├── sercom1.h │ │ │ │ │ │ ├── sercom2.h │ │ │ │ │ │ ├── sercom3.h │ │ │ │ │ │ ├── sercom4.h │ │ │ │ │ │ ├── sercom5.h │ │ │ │ │ │ ├── sysctrl.h │ │ │ │ │ │ ├── tc3.h │ │ │ │ │ │ ├── tc4.h │ │ │ │ │ │ ├── tc5.h │ │ │ │ │ │ ├── tc6.h │ │ │ │ │ │ ├── tc7.h │ │ │ │ │ │ ├── tcc0.h │ │ │ │ │ │ ├── tcc1.h │ │ │ │ │ │ ├── tcc2.h │ │ │ │ │ │ ├── tcc3.h │ │ │ │ │ │ ├── usb.h │ │ │ │ │ │ └── wdt.h │ │ │ │ │ ├── pio │ │ │ │ │ │ ├── samd21e15a.h │ │ │ │ │ │ ├── samd21e15b.h │ │ │ │ │ │ ├── samd21e15bu.h │ │ │ │ │ │ ├── samd21e15l.h │ │ │ │ │ │ ├── samd21e16a.h │ │ │ │ │ │ ├── samd21e16b.h │ │ │ │ │ │ ├── samd21e16bu.h │ │ │ │ │ │ ├── samd21e16l.h │ │ │ │ │ │ ├── samd21e17a.h │ │ │ │ │ │ ├── samd21e17d.h │ │ │ │ │ │ ├── samd21e17du.h │ │ │ │ │ │ ├── samd21e17l.h │ │ │ │ │ │ ├── samd21e18a.h │ │ │ │ │ │ ├── samd21g15a.h │ │ │ │ │ │ ├── samd21g15b.h │ │ │ │ │ │ ├── samd21g15l.h │ │ │ │ │ │ ├── samd21g16a.h │ │ │ │ │ │ ├── samd21g16b.h │ │ │ │ │ │ ├── samd21g16l.h │ │ │ │ │ │ ├── samd21g17a.h │ │ │ │ │ │ ├── samd21g17au.h │ │ │ │ │ │ ├── samd21g17d.h │ │ │ │ │ │ ├── samd21g17l.h │ │ │ │ │ │ ├── samd21g18a.h │ │ │ │ │ │ ├── samd21g18au.h │ │ │ │ │ │ ├── samd21j15a.h │ │ │ │ │ │ ├── samd21j15b.h │ │ │ │ │ │ ├── samd21j16a.h │ │ │ │ │ │ ├── samd21j16b.h │ │ │ │ │ │ ├── samd21j17a.h │ │ │ │ │ │ ├── samd21j17d.h │ │ │ │ │ │ └── samd21j18a.h │ │ │ │ │ ├── samd21.h │ │ │ │ │ ├── samd21e15a.h │ │ │ │ │ ├── samd21e15b.h │ │ │ │ │ ├── samd21e15bu.h │ │ │ │ │ ├── samd21e15l.h │ │ │ │ │ ├── samd21e16a.h │ │ │ │ │ ├── samd21e16b.h │ │ │ │ │ ├── samd21e16bu.h │ │ │ │ │ ├── samd21e16l.h │ │ │ │ │ ├── samd21e17a.h │ │ │ │ │ ├── samd21e17d.h │ │ │ │ │ ├── samd21e17du.h │ │ │ │ │ ├── samd21e17l.h │ │ │ │ │ ├── samd21e18a.h │ │ │ │ │ ├── samd21g15a.h │ │ │ │ │ ├── samd21g15b.h │ │ │ │ │ ├── samd21g15l.h │ │ │ │ │ ├── samd21g16a.h │ │ │ │ │ ├── samd21g16b.h │ │ │ │ │ ├── samd21g16l.h │ │ │ │ │ ├── samd21g17a.h │ │ │ │ │ ├── samd21g17au.h │ │ │ │ │ ├── samd21g17d.h │ │ │ │ │ ├── samd21g17l.h │ │ │ │ │ ├── samd21g18a.h │ │ │ │ │ ├── samd21g18au.h │ │ │ │ │ ├── samd21j15a.h │ │ │ │ │ ├── samd21j15b.h │ │ │ │ │ ├── samd21j16a.h │ │ │ │ │ ├── samd21j16b.h │ │ │ │ │ ├── samd21j17a.h │ │ │ │ │ ├── samd21j17d.h │ │ │ │ │ └── samd21j18a.h │ │ │ │ │ └── source │ │ │ │ │ ├── gcc │ │ │ │ │ └── startup_samd21.c │ │ │ │ │ ├── system_samd21.c │ │ │ │ │ └── system_samd21.h │ │ │ │ ├── compiler.h │ │ │ │ ├── header_files │ │ │ │ └── io.h │ │ │ │ ├── linker_scripts │ │ │ │ └── samd21 │ │ │ │ │ └── gcc │ │ │ │ │ └── samd21j18a_flash.ld │ │ │ │ ├── make │ │ │ │ └── Makefile.sam.in │ │ │ │ ├── preprocessor │ │ │ │ ├── mrecursion.h │ │ │ │ ├── mrepeat.h │ │ │ │ ├── preprocessor.h │ │ │ │ ├── stringz.h │ │ │ │ └── tpaste.h │ │ │ │ ├── status_codes.h │ │ │ │ └── syscalls │ │ │ │ └── gcc │ │ │ │ └── syscalls.c │ │ └── thirdparty │ │ │ ├── CMSIS │ │ │ ├── ATMEL-disclaimer.txt │ │ │ ├── CMSIS_END_USER_LICENCE_AGREEMENT.pdf │ │ │ ├── Include │ │ │ │ ├── arm_math.h │ │ │ │ ├── cmsis_compiler.h │ │ │ │ ├── cmsis_gcc.h │ │ │ │ ├── cmsis_version.h │ │ │ │ ├── core_cm0plus.h │ │ │ │ └── mpu_armv7.h │ │ │ ├── Lib │ │ │ │ ├── GCC │ │ │ │ │ └── libarm_cortexM0l_math.a │ │ │ │ └── license.txt │ │ │ └── README.txt │ │ │ └── qtouch │ │ │ └── devspecific │ │ │ └── sam0 │ │ │ └── samd │ │ │ ├── include │ │ │ └── touch_api_SAMD.h │ │ │ └── lib │ │ │ └── gcc │ │ │ └── libsamd21_qt_gcc.a │ │ ├── asf.h │ │ ├── comms.c │ │ ├── comms.h │ │ ├── config │ │ ├── conf_board.h │ │ ├── conf_clocks.h │ │ ├── conf_extint.h │ │ ├── conf_rwwee.h │ │ ├── conf_sleepmgr.h │ │ ├── conf_usb.h │ │ └── touch_config_samd.h │ │ ├── games.c │ │ ├── games.h │ │ ├── keys.c │ │ ├── keys.h │ │ ├── main.c │ │ ├── main.h │ │ ├── pwm.c │ │ ├── pwm.h │ │ ├── qtouch │ │ ├── QDebugSettings.h │ │ └── touch.c │ │ ├── samd21g16b_flash.ld │ │ ├── serialconsole.c │ │ ├── serialconsole.h │ │ └── ui.h │ └── Defcon29.atsln ├── Hardware ├── Defcon29-TopAssembly.png ├── Defcon29BOM.pdf ├── Defcon29BadgeTypes.jpg ├── Defcon29Schematic.pdf └── Keycaps │ ├── Keycap-Bottom-Artist.stl │ ├── Keycap-Bottom-Creator.stl │ ├── Keycap-Bottom-Goon.stl │ ├── Keycap-Bottom-Human.stl │ ├── Keycap-Bottom-Press.stl │ ├── Keycap-Bottom-Speaker.stl │ ├── Keycap-Bottom-Vendor.stl │ ├── Keycap-Source-FreeCad.FCStd │ └── Keycap-Top.stl ├── LICENSE └── README.md /Firmware/Compiled/DC29Artist2.uf2: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/compukidmike/Defcon29/fe3f758ca3042aed0a1d83115eccb93215fc643d/Firmware/Compiled/DC29Artist2.uf2 -------------------------------------------------------------------------------- /Firmware/Compiled/DC29Creator2.uf2: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/compukidmike/Defcon29/fe3f758ca3042aed0a1d83115eccb93215fc643d/Firmware/Compiled/DC29Creator2.uf2 -------------------------------------------------------------------------------- /Firmware/Compiled/DC29Goon2.uf2: -------------------------------------------------------------------------------- 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https://raw.githubusercontent.com/compukidmike/Defcon29/fe3f758ca3042aed0a1d83115eccb93215fc643d/Firmware/Compiled/DC29Speaker2.uf2 -------------------------------------------------------------------------------- /Firmware/Compiled/DC29Vendor2.uf2: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/compukidmike/Defcon29/fe3f758ca3042aed0a1d83115eccb93215fc643d/Firmware/Compiled/DC29Vendor2.uf2 -------------------------------------------------------------------------------- /Firmware/Compiled/Instructions.txt: -------------------------------------------------------------------------------- 1 | The dc29boot.hex is the bootloader. It requires a SWD programmer connected to the Tag-Connect port on the badge. This only needs to be done once on a new chip. 2 | The .uf2 files can be flashed with just a USB cable. Hold the bottom-right button when connecting the USB cable. The badge will enter the bootloader (top-left LED will blink red). It will appear as a mass storage device on your computer. You can then drag/drop the new uf2 firmware file onto it. The badge will automatically reboot when the update is complete. 3 | NOTE: flashing new firmware will NOT reset your challenge/game status (unless you create custom firmware to overwrite the EEPROM). -------------------------------------------------------------------------------- /Firmware/Source/DC29/DC29.componentinfo.xml: -------------------------------------------------------------------------------- 1 |  2 | 3 | 4 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/atmel_devices_cdc.cat: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/compukidmike/Defcon29/fe3f758ca3042aed0a1d83115eccb93215fc643d/Firmware/Source/DC29/atmel_devices_cdc.cat -------------------------------------------------------------------------------- /Firmware/Source/DC29/jlink.config: -------------------------------------------------------------------------------- 1 | [BREAKPOINTS] 2 | ForceImpTypeAny = 0 3 | ShowInfoWin = 1 4 | EnableFlashBP = 2 5 | BPDuringExecution = 0 6 | [CFI] 7 | CFISize = 0x00 8 | CFIAddr = 0x00 9 | [CPU] 10 | MonModeVTableAddr = 0xFFFFFFFF 11 | MonModeDebug = 0 12 | MaxNumAPs = 0 13 | LowPowerHandlingMode = 0 14 | OverrideMemMap = 0 15 | AllowSimulation = 1 16 | ScriptFile="" 17 | [FLASH] 18 | CacheExcludeSize = 0x00 19 | CacheExcludeAddr = 0x00 20 | MinNumBytesFlashDL = 0 21 | SkipProgOnCRCMatch = 1 22 | VerifyDownload = 1 23 | AllowCaching = 1 24 | EnableFlashDL = 2 25 | Override = 0 26 | Device="ARM7" 27 | [GENERAL] 28 | WorkRAMSize = 0x00 29 | WorkRAMAddr = 0x00 30 | RAMUsageLimit = 0x00 31 | [SWO] 32 | SWOLogFile="" 33 | [MEM] 34 | RdOverrideOrMask = 0x00 35 | RdOverrideAndMask = 0xFFFFFFFF 36 | RdOverrideAddr = 0xFFFFFFFF 37 | WrOverrideOrMask = 0x00 38 | WrOverrideAndMask = 0xFFFFFFFF 39 | WrOverrideAddr = 0xFFFFFFFF 40 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/common/services/sleepmgr/samd/sleepmgr.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Chip-specific sleep manager configuration 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #include 37 | #include 38 | 39 | #if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__) 40 | 41 | uint8_t sleepmgr_locks[SLEEPMGR_NR_OF_MODES]; 42 | 43 | #endif /* CONFIG_SLEEPMGR_ENABLE */ 44 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/common/services/sleepmgr/samd/sleepmgr.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Chip-specific sleep manager configuration 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef SAM_SLEEPMGR_INCLUDED 38 | #define SAM_SLEEPMGR_INCLUDED 39 | 40 | #ifdef __cplusplus 41 | extern "C" { 42 | #endif 43 | 44 | #include 45 | #include 46 | #include 47 | #include "system.h" 48 | 49 | /** 50 | * \weakgroup sleepmgr_group 51 | * @{ 52 | */ 53 | 54 | enum sleepmgr_mode { 55 | /** Active mode. */ 56 | SLEEPMGR_ACTIVE = 0, 57 | 58 | /** 59 | * Idle 0 mode. 60 | * Potential Wake Up sources: Synchronous(APB, AHB), asynchronous. 61 | */ 62 | SLEEPMGR_IDLE_0, 63 | 64 | /** 65 | * Idle 1 mode. 66 | * Potential Wake Up sources: Synchronous (APB), asynchronous 67 | */ 68 | SLEEPMGR_IDLE_1, 69 | 70 | /** 71 | * Idle 2 mode. 72 | * Potential Wake Up sources: Asynchronous 73 | */ 74 | SLEEPMGR_IDLE_2, 75 | 76 | /** 77 | * Standby mode. 78 | * Potential Wake Up sources: Asynchronous 79 | */ 80 | SLEEPMGR_STANDBY, 81 | 82 | SLEEPMGR_NR_OF_MODES, 83 | }; 84 | 85 | /** 86 | * \internal 87 | * \name Internal arrays 88 | * @{ 89 | */ 90 | #if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__) 91 | /** Sleep mode lock counters */ 92 | extern uint8_t sleepmgr_locks[]; 93 | #endif /* CONFIG_SLEEPMGR_ENABLE */ 94 | /** @} */ 95 | 96 | static inline void sleepmgr_sleep(const enum sleepmgr_mode sleep_mode) 97 | { 98 | Assert(sleep_mode != SLEEPMGR_ACTIVE); 99 | #ifdef CONFIG_SLEEPMGR_ENABLE 100 | cpu_irq_disable(); 101 | 102 | /* Enter the sleep mode. */ 103 | system_set_sleepmode((enum system_sleepmode)(sleep_mode - 1)); 104 | cpu_irq_enable(); 105 | system_sleep(); 106 | #else 107 | UNUSED(sleep_mode); 108 | cpu_irq_enable(); 109 | #endif /* CONFIG_SLEEPMGR_ENABLE */ 110 | } 111 | 112 | /** @} */ 113 | 114 | #ifdef __cplusplus 115 | } 116 | #endif 117 | 118 | #endif /* SAM_SLEEPMGR_INCLUDED */ 119 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/common/services/usb/class/composite/device/udi_composite_conf.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Descriptors for an USB Composite Device MSC and HID mouse 5 | * 6 | * Copyright (c) 2009-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef _UDI_COMPOSITE_CONF_H_ 38 | #define _UDI_COMPOSITE_CONF_H_ 39 | 40 | #endif // _UDI_COMPOSITE_CONF_H_ 41 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/common/services/usb/class/hid/device/kbd/example/samd21j18a_samd21_xplained_pro/ui.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief User Interface 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #include 38 | #include "ui.h" 39 | 40 | //! Sequence process running each \c SEQUENCE_PERIOD ms 41 | #define SEQUENCE_PERIOD 150 42 | 43 | //! Wakeup, ignore button change until button is back to default state 44 | //static bool btn_wakeup = false; 45 | /* 46 | static struct { 47 | bool b_modifier; 48 | bool b_down; 49 | uint8_t value; 50 | } ui_sequence[] = { 51 | // Display windows menu 52 | {true,true,HID_MODIFIER_LEFT_UI}, 53 | {true,false,HID_MODIFIER_LEFT_UI}, 54 | 55 | };*/ 56 | 57 | /* Interrupt on "pin change" from push button to do wakeup on USB 58 | * Note: 59 | * This interrupt is enable when the USB host enable remote wakeup feature 60 | * This interrupt wakeup the CPU if this one is in idle mode 61 | */ 62 | static void ui_wakeup_handler(void) 63 | { 64 | /* It is a wakeup then send wakeup USB */ 65 | udc_remotewakeup(); 66 | LED_On(LED_0_PIN); 67 | } 68 | 69 | 70 | void ui_init(void) 71 | { 72 | struct extint_chan_conf config_extint_chan; 73 | 74 | extint_chan_get_config_defaults(&config_extint_chan); 75 | 76 | config_extint_chan.gpio_pin = BUTTON_0_EIC_PIN; 77 | config_extint_chan.gpio_pin_mux = BUTTON_0_EIC_MUX; 78 | config_extint_chan.gpio_pin_pull = EXTINT_PULL_UP; 79 | config_extint_chan.filter_input_signal = true; 80 | config_extint_chan.detection_criteria = EXTINT_DETECT_FALLING; 81 | extint_chan_set_config(BUTTON_0_EIC_LINE, &config_extint_chan); 82 | extint_register_callback(ui_wakeup_handler, BUTTON_0_EIC_LINE, 83 | EXTINT_CALLBACK_TYPE_DETECT); 84 | extint_chan_enable_callback(BUTTON_0_EIC_LINE,EXTINT_CALLBACK_TYPE_DETECT); 85 | 86 | /* Initialize LEDs */ 87 | LED_Off(LED_0_PIN); 88 | } 89 | 90 | void ui_powerdown(void) 91 | { 92 | LED_Off(LED_0_PIN); 93 | } 94 | 95 | 96 | void ui_wakeup_enable(void) 97 | { 98 | extint_chan_enable_callback(BUTTON_0_EIC_LINE,EXTINT_CALLBACK_TYPE_DETECT); 99 | } 100 | 101 | void ui_wakeup_disable(void) 102 | { 103 | extint_chan_disable_callback(BUTTON_0_EIC_LINE,EXTINT_CALLBACK_TYPE_DETECT); 104 | } 105 | 106 | void ui_wakeup(void) 107 | { 108 | LED_On(LED_0_PIN); 109 | } 110 | 111 | void ui_process(uint16_t framenumber) 112 | { 113 | 114 | } 115 | 116 | void ui_kbd_led(uint8_t value) 117 | { 118 | UNUSED(value); 119 | } 120 | 121 | /** 122 | * \defgroup UI User Interface 123 | * 124 | * Human interface on SAMD21-XPlain: 125 | * - LED0 blinks when USB host has checked and enabled HID Keyboard interface 126 | * - The SW0 opens a notepad application on Windows O.S. 127 | * and sends key sequence "Atmel ARM" 128 | * - Only SW0 will generate a wakeup to USB Host in remote wakeup mode. 129 | * 130 | */ 131 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/common/services/usb/class/hid/device/udi_hid.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief USB Device Human Interface Device (HID) interface definitions. 5 | * 6 | * Copyright (c) 2009-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef _UDI_HID_H_ 38 | #define _UDI_HID_H_ 39 | 40 | #include "conf_usb.h" 41 | #include "usb_protocol.h" 42 | #include "usb_protocol_hid.h" 43 | #include "udd.h" 44 | 45 | #ifdef __cplusplus 46 | extern "C" { 47 | #endif 48 | 49 | /** 50 | * \ingroup udi_group 51 | * \defgroup udi_hid_group USB Device Interface (UDI) for Human Interface Device (HID) 52 | * 53 | * Common library for all Human Interface Device (HID) implementation. 54 | * 55 | * @{ 56 | */ 57 | 58 | /** 59 | * \brief Decode HID setup request 60 | * 61 | * \param rate Pointer on rate of current HID interface 62 | * \param protocol Pointer on protocol of current HID interface 63 | * \param report_desc Pointer on report descriptor of current HID interface 64 | * \param set_report Pointer on set_report callback of current HID interface 65 | * 66 | * \return \c 1 if function was successfully done, otherwise \c 0. 67 | */ 68 | bool udi_hid_setup( uint8_t *rate, uint8_t *protocol, uint8_t *report_desc, bool (*setup_report)(void) ); 69 | 70 | //@} 71 | 72 | #ifdef __cplusplus 73 | } 74 | #endif 75 | #endif // _UDI_HID_H_ 76 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/common/services/usb/udc/udc_desc.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Common API for USB Device Interface 5 | * 6 | * Copyright (c) 2009-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef _UDC_DESC_H_ 38 | #define _UDC_DESC_H_ 39 | 40 | #include "conf_usb.h" 41 | #include "usb_protocol.h" 42 | #include "udi.h" 43 | 44 | #ifdef __cplusplus 45 | extern "C" { 46 | #endif 47 | 48 | /** 49 | * \ingroup udc_group 50 | * \defgroup udc_desc_group USB Device Descriptor 51 | * 52 | * @{ 53 | */ 54 | 55 | /** 56 | * \brief Defines the memory's location of USB descriptors 57 | * 58 | * By default the Descriptor is stored in RAM 59 | * (UDC_DESC_STORAGE is defined empty). 60 | * 61 | * If you have need to free RAM space, 62 | * it is possible to put descriptor in flash in following case: 63 | * - USB driver authorize flash transfer (USBB on UC3 and USB on Mega) 64 | * - USB Device is not high speed (UDC no need to change USB descriptors) 65 | * 66 | * For UC3 application used "const". 67 | * 68 | * For Mega application used "code". 69 | */ 70 | #define UDC_DESC_STORAGE 71 | // Descriptor storage in internal RAM 72 | #if (defined UDC_DATA_USE_HRAM_SUPPORT) 73 | # if defined(__GNUC__) 74 | # define UDC_DATA(x) COMPILER_WORD_ALIGNED __attribute__((__section__(".data_hram0"))) 75 | # define UDC_BSS(x) COMPILER_ALIGNED(x) __attribute__((__section__(".bss_hram0"))) 76 | # elif defined(__ICCAVR32__) 77 | # define UDC_DATA(x) COMPILER_ALIGNED(x) __data32 78 | # define UDC_BSS(x) COMPILER_ALIGNED(x) __data32 79 | # endif 80 | #else 81 | # define UDC_DATA(x) COMPILER_ALIGNED(x) 82 | # define UDC_BSS(x) COMPILER_ALIGNED(x) 83 | #endif 84 | 85 | 86 | 87 | /** 88 | * \brief Configuration descriptor and UDI link for one USB speed 89 | */ 90 | typedef struct { 91 | //! USB configuration descriptor 92 | usb_conf_desc_t UDC_DESC_STORAGE *desc; 93 | //! Array of UDI API pointer 94 | udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis; 95 | } udc_config_speed_t; 96 | 97 | 98 | /** 99 | * \brief All information about the USB Device 100 | */ 101 | typedef struct { 102 | //! USB device descriptor for low or full speed 103 | usb_dev_desc_t UDC_DESC_STORAGE *confdev_lsfs; 104 | //! USB configuration descriptor and UDI API pointers for low or full speed 105 | udc_config_speed_t UDC_DESC_STORAGE *conf_lsfs; 106 | #ifdef USB_DEVICE_HS_SUPPORT 107 | //! USB device descriptor for high speed 108 | usb_dev_desc_t UDC_DESC_STORAGE *confdev_hs; 109 | //! USB device qualifier, only use in high speed mode 110 | usb_dev_qual_desc_t UDC_DESC_STORAGE *qualifier; 111 | //! USB configuration descriptor and UDI API pointers for high speed 112 | udc_config_speed_t UDC_DESC_STORAGE *conf_hs; 113 | #endif 114 | usb_dev_bos_desc_t UDC_DESC_STORAGE *conf_bos; 115 | } udc_config_t; 116 | 117 | //! Global variables of USB Device Descriptor and UDI links 118 | extern UDC_DESC_STORAGE udc_config_t udc_config; 119 | 120 | //@} 121 | 122 | #ifdef __cplusplus 123 | } 124 | #endif 125 | #endif // _UDC_DESC_H_ 126 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/common/services/usb/udc/udi.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Common API for USB Device Interface 5 | * 6 | * Copyright (c) 2009-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef _UDI_H_ 38 | #define _UDI_H_ 39 | 40 | #include "conf_usb.h" 41 | #include "usb_protocol.h" 42 | 43 | #ifdef __cplusplus 44 | extern "C" { 45 | #endif 46 | 47 | /** 48 | * \ingroup usb_device_group 49 | * \defgroup udi_group USB Device Interface (UDI) 50 | * The UDI provides a common API for all classes, 51 | * and this is used by UDC for the main control of USB Device interface. 52 | * @{ 53 | */ 54 | 55 | /** 56 | * \brief UDI API. 57 | * 58 | * The callbacks within this structure are called only by 59 | * USB Device Controller (UDC) 60 | * 61 | * The udc_get_interface_desc() can be use by UDI to know the interface descriptor 62 | * selected by UDC. 63 | */ 64 | typedef struct { 65 | /** 66 | * \brief Enable the interface. 67 | * 68 | * This function is called when the host selects a configuration 69 | * to which this interface belongs through a Set Configuration 70 | * request, and when the host selects an alternate setting of 71 | * this interface through a Set Interface request. 72 | * 73 | * \return \c 1 if function was successfully done, otherwise \c 0. 74 | */ 75 | bool(*enable) (void); 76 | 77 | /** 78 | * \brief Disable the interface. 79 | * 80 | * This function is called when this interface is currently 81 | * active, and 82 | * - the host selects any configuration through a Set 83 | * Configuration request, or 84 | * - the host issues a USB reset, or 85 | * - the device is detached from the host (i.e. Vbus is no 86 | * longer present) 87 | */ 88 | void (*disable) (void); 89 | 90 | /** 91 | * \brief Handle a control request directed at an interface. 92 | * 93 | * This function is called when this interface is currently 94 | * active and the host sends a SETUP request 95 | * with this interface as the recipient. 96 | * 97 | * Use udd_g_ctrlreq to decode and response to SETUP request. 98 | * 99 | * \return \c 1 if this interface supports the SETUP request, otherwise \c 0. 100 | */ 101 | bool(*setup) (void); 102 | 103 | /** 104 | * \brief Returns the current setting of the selected interface. 105 | * 106 | * This function is called when UDC when know alternate setting of selected interface. 107 | * 108 | * \return alternate setting of selected interface 109 | */ 110 | uint8_t(*getsetting) (void); 111 | 112 | /** 113 | * \brief To signal that a SOF is occurred 114 | */ 115 | void(*sof_notify) (void); 116 | } udi_api_t; 117 | 118 | //@} 119 | 120 | #ifdef __cplusplus 121 | } 122 | #endif 123 | #endif // _UDI_H_ 124 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/common/utils/interrupt.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Global interrupt management for 8- and 32-bit AVR 5 | * 6 | * Copyright (c) 2010-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #ifndef UTILS_INTERRUPT_H 37 | #define UTILS_INTERRUPT_H 38 | 39 | #include 40 | 41 | #if XMEGA || MEGA 42 | # include "interrupt/interrupt_avr8.h" 43 | #elif UC3 44 | # include "interrupt/interrupt_avr32.h" 45 | #elif SAM || SAMB 46 | # include "interrupt/interrupt_sam_nvic.h" 47 | #else 48 | # error Unsupported device. 49 | #endif 50 | 51 | /** 52 | * \defgroup interrupt_group Global interrupt management 53 | * 54 | * This is a driver for global enabling and disabling of interrupts. 55 | * 56 | * @{ 57 | */ 58 | 59 | #if defined(__DOXYGEN__) 60 | /** 61 | * \def CONFIG_INTERRUPT_FORCE_INTC 62 | * \brief Force usage of the ASF INTC driver 63 | * 64 | * Predefine this symbol when preprocessing to force the use of the ASF INTC driver. 65 | * This is useful to ensure compatibility across compilers and shall be used only when required 66 | * by the application needs. 67 | */ 68 | # define CONFIG_INTERRUPT_FORCE_INTC 69 | #endif 70 | 71 | //! \name Global interrupt flags 72 | //@{ 73 | /** 74 | * \typedef irqflags_t 75 | * \brief Type used for holding state of interrupt flag 76 | */ 77 | 78 | /** 79 | * \def cpu_irq_enable 80 | * \brief Enable interrupts globally 81 | */ 82 | 83 | /** 84 | * \def cpu_irq_disable 85 | * \brief Disable interrupts globally 86 | */ 87 | 88 | /** 89 | * \fn irqflags_t cpu_irq_save(void) 90 | * \brief Get and clear the global interrupt flags 91 | * 92 | * Use in conjunction with \ref cpu_irq_restore. 93 | * 94 | * \return Current state of interrupt flags. 95 | * 96 | * \note This function leaves interrupts disabled. 97 | */ 98 | 99 | /** 100 | * \fn void cpu_irq_restore(irqflags_t flags) 101 | * \brief Restore global interrupt flags 102 | * 103 | * Use in conjunction with \ref cpu_irq_save. 104 | * 105 | * \param flags State to set interrupt flag to. 106 | */ 107 | 108 | /** 109 | * \fn bool cpu_irq_is_enabled_flags(irqflags_t flags) 110 | * \brief Check if interrupts are globally enabled in supplied flags 111 | * 112 | * \param flags Currents state of interrupt flags. 113 | * 114 | * \return True if interrupts are enabled. 115 | */ 116 | 117 | /** 118 | * \def cpu_irq_is_enabled 119 | * \brief Check if interrupts are globally enabled 120 | * 121 | * \return True if interrupts are enabled. 122 | */ 123 | //@} 124 | 125 | //! @} 126 | 127 | /** 128 | * \ingroup interrupt_group 129 | * \defgroup interrupt_deprecated_group Deprecated interrupt definitions 130 | */ 131 | 132 | #endif /* UTILS_INTERRUPT_H */ 133 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/common/utils/interrupt/interrupt_sam_nvic.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Global interrupt management for SAM D20, SAM3 and SAM4 (NVIC based) 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #include "interrupt_sam_nvic.h" 38 | 39 | #if !defined(__DOXYGEN__) 40 | /* Deprecated - global flag to determine the global interrupt state. Required by 41 | * QTouch library, however new applications should use cpu_irq_is_enabled() 42 | * which probes the true global interrupt state from the CPU special registers. 43 | */ 44 | volatile bool g_interrupt_enabled = true; 45 | #endif 46 | 47 | void cpu_irq_enter_critical(void) 48 | { 49 | if (cpu_irq_critical_section_counter == 0) { 50 | if (cpu_irq_is_enabled()) { 51 | cpu_irq_disable(); 52 | cpu_irq_prev_interrupt_state = true; 53 | } else { 54 | /* Make sure the to save the prev state as false */ 55 | cpu_irq_prev_interrupt_state = false; 56 | } 57 | 58 | } 59 | 60 | cpu_irq_critical_section_counter++; 61 | } 62 | 63 | void cpu_irq_leave_critical(void) 64 | { 65 | /* Check if the user is trying to leave a critical section when not in a critical section */ 66 | Assert(cpu_irq_critical_section_counter > 0); 67 | 68 | cpu_irq_critical_section_counter--; 69 | 70 | /* Only enable global interrupts when the counter reaches 0 and the state of the global interrupt flag 71 | was enabled when entering critical state */ 72 | if ((cpu_irq_critical_section_counter == 0) && (cpu_irq_prev_interrupt_state)) { 73 | cpu_irq_enable(); 74 | } 75 | } 76 | 77 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/common2/services/delay/delay.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Common Delay Service 5 | * 6 | * Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #ifndef DELAY_H_INCLUDED 37 | #define DELAY_H_INCLUDED 38 | 39 | #ifdef __cplusplus 40 | extern "C" { 41 | #endif 42 | 43 | /** 44 | * @defgroup group_common_services_delay Busy-Wait Delay Routines 45 | * 46 | * This module provides simple loop-based delay routines for those 47 | * applications requiring a brief wait during execution. Common for 48 | * API ver. 2. 49 | * 50 | * @{ 51 | */ 52 | 53 | #ifdef SYSTICK_MODE 54 | #include "sam0/systick_counter.h" 55 | #endif 56 | #ifdef CYCLE_MODE 57 | #include "sam0/cycle_counter.h" 58 | #endif 59 | 60 | void delay_init(void); 61 | 62 | /** 63 | * \def delay_s 64 | * \brief Delay in at least specified number of seconds. 65 | * \param delay Delay in seconds 66 | */ 67 | #define delay_s(delay) ((delay) ? cpu_delay_s(delay) : cpu_delay_us(1)) 68 | 69 | /** 70 | * \def delay_ms 71 | * \brief Delay in at least specified number of milliseconds. 72 | * \param delay Delay in milliseconds 73 | */ 74 | #define delay_ms(delay) ((delay) ? cpu_delay_ms(delay) : cpu_delay_us(1)) 75 | 76 | /** 77 | * \def delay_us 78 | * \brief Delay in at least specified number of microseconds. 79 | * \param delay Delay in microseconds 80 | */ 81 | #define delay_us(delay) ((delay) ? cpu_delay_us(delay) : cpu_delay_us(1)) 82 | 83 | #ifdef __cplusplus 84 | } 85 | #endif 86 | 87 | /** 88 | * @} 89 | */ 90 | 91 | #endif /* DELAY_H_INCLUDED */ 92 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/common2/services/delay/sam0/systick_counter.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief ARM functions for busy-wait delay loops 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #include "delay.h" 38 | 39 | /** 40 | * Value used to calculate ms delay. Default to be used with a 8MHz clock; 41 | */ 42 | static uint32_t cycles_per_ms = 8000000UL / 1000; 43 | static uint32_t cycles_per_us = 8000000UL / 1000000; 44 | 45 | /** 46 | * \brief Initialize the delay driver. 47 | * 48 | * This must be called during start up to initialize the delay routine with 49 | * the current used main clock. It must run any time the main CPU clock is changed. 50 | */ 51 | void delay_init(void) 52 | { 53 | cycles_per_ms = system_gclk_gen_get_hz(0); 54 | cycles_per_ms /= 1000; 55 | cycles_per_us = cycles_per_ms / 1000; 56 | 57 | SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk; 58 | } 59 | 60 | /** 61 | * \brief Delay loop to delay at least n number of microseconds 62 | * 63 | * \param n Number of microseconds to wait 64 | */ 65 | void delay_cycles_us( 66 | uint32_t n) 67 | { 68 | while (n--) { 69 | /* Devide up to blocks of 10u */ 70 | delay_cycles(cycles_per_us); 71 | } 72 | } 73 | 74 | /** 75 | * \brief Delay loop to delay at least n number of milliseconds 76 | * 77 | * \param n Number of milliseconds to wait 78 | */ 79 | void delay_cycles_ms( 80 | uint32_t n) 81 | { 82 | while (n--) { 83 | /* Devide up to blocks of 1ms */ 84 | delay_cycles(cycles_per_ms); 85 | } 86 | } 87 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/common2/services/delay/sam0/systick_counter.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief ARM functions for busy-wait delay loops 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #ifndef CYCLE_COUNTER_H_INCLUDED 37 | #define CYCLE_COUNTER_H_INCLUDED 38 | 39 | #include 40 | #include 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /** 47 | * \name Convenience functions for busy-wait delay loops 48 | * 49 | * @{ 50 | */ 51 | 52 | /** 53 | * \brief Delay loop to delay n number of cycles 54 | * Delay program execution for at least the specified number of CPU cycles. 55 | * 56 | * \param n Number of cycles to delay 57 | */ 58 | static inline void delay_cycles( 59 | const uint32_t n) 60 | { 61 | if (n > 0) { 62 | SysTick->LOAD = n; 63 | SysTick->VAL = 0; 64 | 65 | while (!(SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk)) { 66 | }; 67 | } 68 | } 69 | 70 | void delay_cycles_us(uint32_t n); 71 | 72 | void delay_cycles_ms(uint32_t n); 73 | 74 | /** 75 | * \brief Delay program execution for at least the specified number of microseconds. 76 | * 77 | * \param delay number of microseconds to wait 78 | */ 79 | #define cpu_delay_us(delay) delay_cycles_us(delay) 80 | 81 | /** 82 | * \brief Delay program execution for at least the specified number of milliseconds. 83 | * 84 | * \param delay number of milliseconds to wait 85 | */ 86 | #define cpu_delay_ms(delay) delay_cycles_ms(delay) 87 | 88 | /** 89 | * \brief Delay program execution for at least the specified number of seconds. 90 | * 91 | * \param delay number of seconds to wait 92 | */ 93 | #define cpu_delay_s(delay) delay_cycles_ms(1000 * delay) 94 | 95 | /** 96 | * @} 97 | */ 98 | 99 | #ifdef __cplusplus 100 | } 101 | #endif 102 | 103 | #endif /* CYCLE_COUNTER_H_INCLUDED */ 104 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/boards/samd21_xplained_pro/board_init.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM D21 Xplained Pro board initialization 5 | * 6 | * Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #include 38 | #include 39 | #include 40 | #include 41 | 42 | #if defined(__GNUC__) 43 | void board_init(void) WEAK __attribute__((alias("system_board_init"))); 44 | #elif defined(__ICCARM__) 45 | void board_init(void); 46 | # pragma weak board_init=system_board_init 47 | #endif 48 | 49 | void system_board_init(void) 50 | { 51 | struct port_config pin_conf; 52 | port_get_config_defaults(&pin_conf); 53 | 54 | /* Configure LEDs as outputs, turn them off */ 55 | pin_conf.direction = PORT_PIN_DIR_OUTPUT; 56 | port_pin_set_config(LED_0_PIN, &pin_conf); 57 | port_pin_set_output_level(LED_0_PIN, LED_0_INACTIVE); 58 | 59 | /* Set buttons as inputs */ 60 | pin_conf.direction = PORT_PIN_DIR_INPUT; 61 | pin_conf.input_pull = PORT_PIN_PULL_UP; 62 | port_pin_set_config(BUTTON_0_PIN, &pin_conf); 63 | 64 | #ifdef CONF_BOARD_AT86RFX 65 | port_get_config_defaults(&pin_conf); 66 | pin_conf.direction = PORT_PIN_DIR_OUTPUT; 67 | port_pin_set_config(AT86RFX_SPI_SCK, &pin_conf); 68 | port_pin_set_config(AT86RFX_SPI_MOSI, &pin_conf); 69 | port_pin_set_config(AT86RFX_SPI_CS, &pin_conf); 70 | port_pin_set_config(AT86RFX_RST_PIN, &pin_conf); 71 | port_pin_set_config(AT86RFX_SLP_PIN, &pin_conf); 72 | port_pin_set_output_level(AT86RFX_SPI_SCK, true); 73 | port_pin_set_output_level(AT86RFX_SPI_MOSI, true); 74 | port_pin_set_output_level(AT86RFX_SPI_CS, true); 75 | port_pin_set_output_level(AT86RFX_RST_PIN, true); 76 | port_pin_set_output_level(AT86RFX_SLP_PIN, true); 77 | pin_conf.direction = PORT_PIN_DIR_INPUT; 78 | port_pin_set_config(AT86RFX_SPI_MISO, &pin_conf); 79 | #endif 80 | } 81 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/extint/extint_callback.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM External Interrupt Driver 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #ifndef EXTINT_CALLBACK_H_INCLUDED 37 | #define EXTINT_CALLBACK_H_INCLUDED 38 | 39 | #include 40 | 41 | #ifdef __cplusplus 42 | extern "C" { 43 | #endif 44 | 45 | /** 46 | * \addtogroup asfdoc_sam0_extint_group 47 | * 48 | * @{ 49 | */ 50 | 51 | /** \name Callback Configuration and Initialization 52 | * @{ 53 | */ 54 | 55 | /** Enum for the possible callback types for the EXTINT module. */ 56 | enum extint_callback_type 57 | { 58 | /** Callback type for when an external interrupt detects the configured 59 | * channel criteria (i.e. edge or level detection) 60 | */ 61 | EXTINT_CALLBACK_TYPE_DETECT, 62 | }; 63 | 64 | enum status_code extint_register_callback( 65 | const extint_callback_t callback, 66 | const uint8_t channel, 67 | const enum extint_callback_type type); 68 | 69 | enum status_code extint_unregister_callback( 70 | const extint_callback_t callback, 71 | const uint8_t channel, 72 | const enum extint_callback_type type); 73 | 74 | uint8_t extint_get_current_channel(void); 75 | 76 | /** @} */ 77 | 78 | /** \name Callback Enabling and Disabling (Channel) 79 | * @{ 80 | */ 81 | 82 | enum status_code extint_chan_enable_callback( 83 | const uint8_t channel, 84 | const enum extint_callback_type type); 85 | 86 | enum status_code extint_chan_disable_callback( 87 | const uint8_t channel, 88 | const enum extint_callback_type type); 89 | 90 | /** @} */ 91 | 92 | /** @} */ 93 | 94 | #ifdef __cplusplus 95 | } 96 | #endif 97 | 98 | #endif 99 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/port/port.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM GPIO Port Driver 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #include 37 | 38 | /** 39 | * \brief Writes a Port pin configuration to the hardware module. 40 | * 41 | * Writes out a given configuration of a Port pin configuration to the hardware 42 | * module. 43 | * 44 | * \note If the pin direction is set as an output, the pull-up/pull-down input 45 | * configuration setting is ignored. 46 | * 47 | * \param[in] gpio_pin Index of the GPIO pin to configure 48 | * \param[in] config Configuration settings for the pin 49 | */ 50 | void port_pin_set_config( 51 | const uint8_t gpio_pin, 52 | const struct port_config *const config) 53 | { 54 | /* Sanity check arguments */ 55 | Assert(config); 56 | 57 | struct system_pinmux_config pinmux_config; 58 | system_pinmux_get_config_defaults(&pinmux_config); 59 | 60 | pinmux_config.mux_position = SYSTEM_PINMUX_GPIO; 61 | pinmux_config.direction = (enum system_pinmux_pin_dir)config->direction; 62 | pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->input_pull; 63 | pinmux_config.powersave = config->powersave; 64 | 65 | system_pinmux_pin_set_config(gpio_pin, &pinmux_config); 66 | } 67 | 68 | /** 69 | * \brief Writes a Port group configuration group to the hardware module. 70 | * 71 | * Writes out a given configuration of a Port group configuration to the 72 | * hardware module. 73 | * 74 | * \note If the pin direction is set as an output, the pull-up/pull-down input 75 | * configuration setting is ignored. 76 | * 77 | * \param[out] port Base of the PORT module to write to 78 | * \param[in] mask Mask of the port pin(s) to configure 79 | * \param[in] config Configuration settings for the pin group 80 | */ 81 | void port_group_set_config( 82 | PortGroup *const port, 83 | const uint32_t mask, 84 | const struct port_config *const config) 85 | { 86 | /* Sanity check arguments */ 87 | Assert(port); 88 | Assert(config); 89 | 90 | struct system_pinmux_config pinmux_config; 91 | system_pinmux_get_config_defaults(&pinmux_config); 92 | 93 | pinmux_config.mux_position = SYSTEM_PINMUX_GPIO; 94 | pinmux_config.direction = (enum system_pinmux_pin_dir)config->direction; 95 | pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->input_pull; 96 | pinmux_config.powersave = config->powersave; 97 | 98 | system_pinmux_group_set_config(port, mask, &pinmux_config); 99 | } 100 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/port/quick_start/qs_port_basic.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM GPIO Port Driver Quick Start 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | /** 35 | * \page asfdoc_sam0_port_basic_use_case Quick Start Guide for PORT - Basic 36 | * 37 | * In this use case, the PORT module is configured for: 38 | * \li One pin in input mode, with pull-up enabled 39 | * \li One pin in output mode 40 | * 41 | * This use case sets up the PORT to read the current state of a GPIO pin set as 42 | * an input, and mirrors the opposite logical state on a pin configured as an 43 | * output. 44 | * 45 | * \section asfdoc_sam0_port_basic_use_case_setup Setup 46 | * 47 | * \subsection asfdoc_sam0_port_basic_use_case_setup_prereq Prerequisites 48 | * There are no special setup requirements for this use-case. 49 | * 50 | * \subsection asfdoc_sam0_port_basic_use_case_setup_code Code 51 | * Copy-paste the following setup code to your user application: 52 | * \snippet qs_port_basic.c setup 53 | * 54 | * Add to user application initialization (typically the start of \c main()): 55 | * \snippet qs_port_basic.c setup_init 56 | * 57 | * \subsection asfdoc_sam0_port_basic_use_case_setup_flow Workflow 58 | * -# Create a PORT module pin configuration struct, which can be filled out to 59 | * adjust the configuration of a single port pin. 60 | * \snippet qs_port_basic.c setup_1 61 | * -# Initialize the pin configuration struct with the module's default values. 62 | * \snippet qs_port_basic.c setup_2 63 | * \note This should always be performed before using the configuration 64 | * struct to ensure that all values are initialized to known default 65 | * settings. 66 | * 67 | * -# Adjust the configuration struct to request an input pin. 68 | * \snippet qs_port_basic.c setup_3 69 | * -# Configure push button pin with the initialized pin configuration struct, to enable 70 | * the input sampler on the pin. 71 | * \snippet qs_port_basic.c setup_4 72 | * -# Adjust the configuration struct to request an output pin. 73 | * \snippet qs_port_basic.c setup_5 74 | * \note The existing configuration struct may be re-used, as long as any 75 | * values that have been altered from the default settings are taken 76 | * into account by the user application. 77 | * 78 | * -# Configure LED pin with the initialized pin configuration struct, to enable 79 | * the output driver on the pin. 80 | * \snippet qs_port_basic.c setup_6 81 | * 82 | * \section asfdoc_sam0_port_basic_use_case_use_main Use Case 83 | * 84 | * \subsection asfdoc_sam0_port_basic_use_case_code Code 85 | * Copy-paste the following code to your user application: 86 | * \snippet qs_port_basic.c main 87 | * 88 | * \subsection asfdoc_sam0_port_basic_use_case_flow Workflow 89 | * -# Read in the current input sampler state of push button pin, which has been 90 | * configured as an input in the use-case setup code. 91 | * \snippet qs_port_basic.c main_1 92 | * -# Write the inverted pin level state to LED pin, which has been configured as 93 | * an output in the use-case setup code. 94 | * \snippet qs_port_basic.c main_2 95 | */ 96 | /* 97 | * Support and FAQ: visit Microchip Support 98 | */ 99 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/rtc/rtc_count_interrupt.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM RTC Driver (Count Interrupt Mode) 5 | * 6 | * Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef RTC_COUNT_INTERRUPT_H_INCLUDED 38 | #define RTC_COUNT_INTERRUPT_H_INCLUDED 39 | 40 | #include "rtc_count.h" 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /** 47 | * \addtogroup asfdoc_sam0_rtc_count_group 48 | * @{ 49 | */ 50 | 51 | /** 52 | * \name Callbacks 53 | * @{ 54 | */ 55 | enum status_code rtc_count_register_callback( 56 | struct rtc_module *const module, 57 | rtc_count_callback_t callback, 58 | enum rtc_count_callback callback_type); 59 | 60 | enum status_code rtc_count_unregister_callback( 61 | struct rtc_module *const module, 62 | enum rtc_count_callback callback_type); 63 | 64 | void rtc_count_enable_callback( 65 | struct rtc_module *const module, 66 | enum rtc_count_callback callback_type); 67 | 68 | void rtc_count_disable_callback( 69 | struct rtc_module *const module, 70 | enum rtc_count_callback callback_type); 71 | 72 | /** @} */ 73 | 74 | /** @} */ 75 | 76 | #ifdef __cplusplus 77 | } 78 | #endif 79 | 80 | #endif /* RTC_COUNT_INTERRUPT_H_INCLUDED */ 81 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/sercom/sercom.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM Serial Peripheral Interface Driver 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef SERCOM_H_INCLUDED 38 | #define SERCOM_H_INCLUDED 39 | 40 | #include 41 | #include 42 | #include 43 | #include 44 | #include "sercom_pinout.h" 45 | 46 | #ifdef __cplusplus 47 | extern "C" { 48 | #endif 49 | 50 | /* SERCOM modules should share same slow GCLK channel ID */ 51 | #define SERCOM_GCLK_ID SERCOM0_GCLK_ID_SLOW 52 | 53 | #if (0x1ff >= REV_SERCOM) 54 | # define FEATURE_SERCOM_SYNCBUSY_SCHEME_VERSION_1 55 | #elif (0x400 >= REV_SERCOM) 56 | # define FEATURE_SERCOM_SYNCBUSY_SCHEME_VERSION_2 57 | #else 58 | # error "Unknown SYNCBUSY scheme for this SERCOM revision" 59 | #endif 60 | 61 | /** 62 | * \brief sercom asynchronous operation mode 63 | * 64 | * Select sercom asynchronous operation mode 65 | */ 66 | enum sercom_asynchronous_operation_mode { 67 | SERCOM_ASYNC_OPERATION_MODE_ARITHMETIC = 0, 68 | SERCOM_ASYNC_OPERATION_MODE_FRACTIONAL, 69 | }; 70 | 71 | /** 72 | * \brief sercom asynchronous samples per bit 73 | * 74 | * Select number of samples per bit 75 | */ 76 | enum sercom_asynchronous_sample_num { 77 | SERCOM_ASYNC_SAMPLE_NUM_3 = 3, 78 | SERCOM_ASYNC_SAMPLE_NUM_8 = 8, 79 | SERCOM_ASYNC_SAMPLE_NUM_16 = 16, 80 | }; 81 | 82 | enum status_code sercom_set_gclk_generator( 83 | const enum gclk_generator generator_source, 84 | const bool force_change); 85 | 86 | enum status_code _sercom_get_sync_baud_val( 87 | const uint32_t baudrate, 88 | const uint32_t external_clock, 89 | uint16_t *const baudval); 90 | 91 | enum status_code _sercom_get_async_baud_val( 92 | const uint32_t baudrate, 93 | const uint32_t peripheral_clock, 94 | uint16_t *const baudval, 95 | enum sercom_asynchronous_operation_mode mode, 96 | enum sercom_asynchronous_sample_num sample_num); 97 | 98 | uint32_t _sercom_get_default_pad( 99 | Sercom *const sercom_module, 100 | const uint8_t pad); 101 | 102 | uint8_t _sercom_get_sercom_inst_index( 103 | Sercom *const sercom_instance); 104 | #ifdef __cplusplus 105 | } 106 | #endif 107 | 108 | #endif //__SERCOM_H_INCLUDED 109 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/sercom/sercom_interrupt.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM Serial Peripheral Interface Driver 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #include "sercom_interrupt.h" 37 | 38 | void *_sercom_instances[SERCOM_INST_NUM]; 39 | 40 | /** Save status of initialized handlers */ 41 | static bool _handler_table_initialized = false; 42 | 43 | /** Void pointers for saving device instance structures */ 44 | static void (*_sercom_interrupt_handlers[SERCOM_INST_NUM])(const uint8_t instance); 45 | 46 | /** 47 | * \internal 48 | * Default interrupt handler. 49 | * 50 | * \param[in] instance SERCOM instance used. 51 | */ 52 | static void _sercom_default_handler( 53 | const uint8_t instance) 54 | { 55 | Assert(false); 56 | } 57 | 58 | /** 59 | * \internal 60 | * Saves the given callback handler. 61 | * 62 | * \param[in] instance Instance index. 63 | * \param[in] interrupt_handler Pointer to instance callback handler. 64 | */ 65 | void _sercom_set_handler( 66 | const uint8_t instance, 67 | const sercom_handler_t interrupt_handler) 68 | { 69 | /* Initialize handlers with default handler and device instances with 0 */ 70 | if (_handler_table_initialized == false) { 71 | for (uint32_t i = 0; i < SERCOM_INST_NUM; i++) { 72 | _sercom_interrupt_handlers[i] = &_sercom_default_handler; 73 | _sercom_instances[i] = NULL; 74 | } 75 | 76 | _handler_table_initialized = true; 77 | } 78 | 79 | /* Save interrupt handler */ 80 | _sercom_interrupt_handlers[instance] = interrupt_handler; 81 | } 82 | 83 | 84 | /** \internal 85 | * Converts a given SERCOM index to its interrupt vector index. 86 | */ 87 | #define _SERCOM_INTERRUPT_VECT_NUM(n, unused) \ 88 | SYSTEM_INTERRUPT_MODULE_SERCOM##n, 89 | 90 | /** \internal 91 | * Generates a SERCOM interrupt handler function for a given SERCOM index. 92 | */ 93 | #define _SERCOM_INTERRUPT_HANDLER(n, unused) \ 94 | void SERCOM##n##_Handler(void) \ 95 | { \ 96 | _sercom_interrupt_handlers[n](n); \ 97 | } 98 | 99 | /** 100 | * \internal 101 | * Returns the system interrupt vector. 102 | * 103 | * \param[in] sercom_instance Instance pointer 104 | * 105 | * \return Enum of system interrupt vector 106 | * \retval SYSTEM_INTERRUPT_MODULE_SERCOM0 107 | * \retval SYSTEM_INTERRUPT_MODULE_SERCOM1 108 | * \retval SYSTEM_INTERRUPT_MODULE_SERCOM2 109 | * \retval SYSTEM_INTERRUPT_MODULE_SERCOM3 110 | * \retval SYSTEM_INTERRUPT_MODULE_SERCOM4 111 | * \retval SYSTEM_INTERRUPT_MODULE_SERCOM5 112 | * \retval SYSTEM_INTERRUPT_MODULE_SERCOM6 113 | * \retval SYSTEM_INTERRUPT_MODULE_SERCOM7 114 | */ 115 | enum system_interrupt_vector _sercom_get_interrupt_vector( 116 | Sercom *const sercom_instance) 117 | { 118 | const uint8_t sercom_int_vectors[SERCOM_INST_NUM] = 119 | { 120 | MREPEAT(SERCOM_INST_NUM, _SERCOM_INTERRUPT_VECT_NUM, ~) 121 | }; 122 | 123 | /* Retrieve the index of the SERCOM being requested */ 124 | uint8_t instance_index = _sercom_get_sercom_inst_index(sercom_instance); 125 | 126 | /* Get the vector number from the lookup table for the requested SERCOM */ 127 | return (enum system_interrupt_vector)sercom_int_vectors[instance_index]; 128 | } 129 | 130 | /** Auto-generate a set of interrupt handlers for each SERCOM in the device */ 131 | MREPEAT(SERCOM_INST_NUM, _SERCOM_INTERRUPT_HANDLER, ~) 132 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/sercom/sercom_interrupt.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM Serial Peripheral Interface Driver 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #ifndef SERCOM_INTERRUPT_H_INCLUDED 37 | #define SERCOM_INTERRUPT_H_INCLUDED 38 | 39 | #include "sercom.h" 40 | #include 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /* Look-up table for device instances */ 47 | extern void *_sercom_instances[SERCOM_INST_NUM]; 48 | 49 | typedef void (*sercom_handler_t)(uint8_t instance); 50 | 51 | enum system_interrupt_vector _sercom_get_interrupt_vector( 52 | Sercom *const sercom_instance); 53 | 54 | void _sercom_set_handler( 55 | const uint8_t instance, 56 | const sercom_handler_t interrupt_handler); 57 | 58 | #ifdef __cplusplus 59 | } 60 | #endif 61 | 62 | #endif /* SERCOM_INTERRUPT_H_INCLUDED */ 63 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/sercom/usart/quick_start_lin/qs_lin.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM USART LIN Quick Start 5 | * 6 | * Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | /** 35 | * \page asfdoc_sam0_sercom_usart_lin_use_case Quick Start Guide for SERCOM USART LIN 36 | * 37 | * The supported board list: 38 | * - SAMC21 Xplained Pro 39 | * 40 | * This quick start will set up LIN frame format transmission according to your 41 | * configuration \c CONF_LIN_NODE_TYPE. 42 | * For LIN master, it will send LIN command after startup. 43 | * For LIN salve, once received a format from LIN master with ID \c LIN_ID_FIELD_VALUE, 44 | * it will reply four data bytes plus a checksum. 45 | * 46 | * \section asfdoc_sam0_sercom_usart_lin_use_case_setup Setup 47 | * 48 | * \subsection asfdoc_sam0_sercom_usart_lin_use_case_prereq Prerequisites 49 | * When verify data transmission between LIN master and slave, two boards are needed: 50 | * one is for LIN master and the other is for LIN slave. 51 | * connect LIN master LIN PIN with LIN slave LIN PIN. 52 | * 53 | * \subsection asfdoc_sam0_usart_lin_use_case_setup_code Code 54 | * Add to the main application source file, outside of any functions: 55 | * \snippet qs_lin.c module_var 56 | * 57 | * Copy-paste the following setup code to your user application: 58 | * \snippet qs_lin.c setup 59 | * 60 | * Add to user application initialization (typically the start of \c main()): 61 | * \snippet qs_lin.c setup_init 62 | * 63 | * \subsection asfdoc_sam0_usart_lin_use_case_setup_flow Workflow 64 | * -# Create USART CDC and LIN module software instance structure for the USART module to store 65 | * the USART driver state while it is in use. 66 | * \snippet qs_lin.c module_inst 67 | * -# Define LIN ID field for header format. 68 | * \snippet qs_lin.c lin_id 69 | * \note The ID \c LIN_ID_FIELD_VALUE is eight bits as [P1,P0,ID5...ID0], when it's 0x64, the 70 | * data field length is four bytes plus a checksum byte. 71 | * 72 | * -# Define LIN RX/TX buffer. 73 | * \snippet qs_lin.c lin_buffer 74 | * \note For \c tx_buffer and \c rx_buffer, the last byte is for checksum. 75 | * 76 | * -# Configure the USART CDC for output message. 77 | * \snippet qs_lin.c CDC_setup 78 | * 79 | * -# Configure the USART LIN module. 80 | * \snippet qs_lin.c lin_setup 81 | * \note The LIN frame format can be configured as master or slave, refer to \c CONF_LIN_NODE_TYPE . 82 | * 83 | * \section asfdoc_sam0_usart_lin_use_case_main Use Case 84 | * 85 | * \subsection asfdoc_sam0_usart_lin_use_case_main_code Code 86 | * Copy-paste the following code to your user application: 87 | * \snippet qs_lin.c main_setup 88 | * 89 | * \subsection asfdoc_sam0_usart_lin_use_case_main_flow Workflow 90 | * -# Set up USART LIN module. 91 | * \snippet qs_lin.c configure_lin 92 | * -# For LIN master, sending LIN command. For LIN slaver, start reading data . 93 | * \snippet qs_lin.c lin_master_cmd 94 | */ 95 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/system/clock/clock.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM Clock Driver 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #ifndef SYSTEM_CLOCK_H_INCLUDED 37 | #define SYSTEM_CLOCK_H_INCLUDED 38 | 39 | #include 40 | #include 41 | #include 42 | 43 | #endif /* SYSTEM_CLOCK_H_INCLUDED */ 44 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/system/pinmux/quick_start/qs_pinmux_basic.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM PINMUX Driver Quick Start 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | /** 35 | * \page asfdoc_sam0_system_pinmux_basic_use_case Quick Start Guide for SYSTEM PINMUX - Basic 36 | * 37 | * In this use case, the PINMUX module is configured for: 38 | * \li One pin in input mode, with pull-up enabled, connected to the GPIO 39 | * module 40 | * \li Sampling mode of the pin changed to sample on demand 41 | * 42 | * This use case sets up the PINMUX to configure a physical I/O pin set as 43 | * an input with pull-up and changes the sampling mode of the pin to reduce 44 | * power by only sampling the physical pin state when the user application 45 | * attempts to read it. 46 | * 47 | * \section asfdoc_sam0_system_pinmux_basic_use_case_setup Setup 48 | * 49 | * \subsection asfdoc_sam0_system_pinmux_basic_use_case_setup_prereq Prerequisites 50 | * There are no special setup requirements for this use-case. 51 | * 52 | * \subsection asfdoc_sam0_system_pinmux_basic_use_case_setup_code Code 53 | * Copy-paste the following setup code to your application: 54 | * \snippet qs_pinmux_basic.c setup 55 | * 56 | * \subsection asfdoc_sam0_system_pinmux_basic_use_case_setup_flow Workflow 57 | * -# Create a PINMUX module pin configuration struct, which can be filled out 58 | * to adjust the configuration of a single port pin. 59 | * \snippet qs_pinmux_basic.c pinmux_config 60 | * -# Initialize the pin configuration struct with the module's default values. 61 | * \snippet qs_pinmux_basic.c pinmux_config_defaults 62 | * \note This should always be performed before using the configuration 63 | * struct to ensure that all values are initialized to known default 64 | * settings. 65 | * 66 | * -# Adjust the configuration struct to request an input pin with pull-up 67 | * connected to the GPIO peripheral. 68 | * \snippet qs_pinmux_basic.c pinmux_update_config_values 69 | * -# Configure GPIO10 with the initialized pin configuration struct, to enable 70 | * the input sampler on the pin. 71 | * \snippet qs_pinmux_basic.c pinmux_set_config 72 | * 73 | * \section asfdoc_sam0_system_pinmux_basic_use_case_use_main Use Case 74 | * 75 | * \subsection asfdoc_sam0_system_pinmux_basic_use_case_code Code 76 | * Copy-paste the following code to your user application: 77 | * \snippet qs_pinmux_basic.c main 78 | * 79 | * \subsection asfdoc_sam0_system_pinmux_basic_use_case_flow Workflow 80 | 81 | * -# Adjust the configuration of the pin to enable on-demand sampling mode. 82 | * \snippet qs_pinmux_basic.c pinmux_change_input_sampling 83 | */ 84 | /* 85 | * Support and FAQ: visit Microchip Support 86 | */ 87 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/system/reset/reset_sam_d_r_h/reset.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM Reset related functionality 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #ifndef RESET_H_INCLUDED 37 | #define RESET_H_INCLUDED 38 | 39 | #include 40 | 41 | #ifdef __cplusplus 42 | extern "C" { 43 | #endif 44 | 45 | /** 46 | * \addtogroup asfdoc_sam0_system_group 47 | * @{ 48 | */ 49 | 50 | /** 51 | * \brief Reset causes of the system. 52 | * 53 | * List of possible reset causes of the system. 54 | */ 55 | enum system_reset_cause { 56 | /** The system was last reset by a software reset */ 57 | SYSTEM_RESET_CAUSE_SOFTWARE = PM_RCAUSE_SYST, 58 | /** The system was last reset by the watchdog timer */ 59 | SYSTEM_RESET_CAUSE_WDT = PM_RCAUSE_WDT, 60 | /** The system was last reset because the external reset line was pulled low */ 61 | SYSTEM_RESET_CAUSE_EXTERNAL_RESET = PM_RCAUSE_EXT, 62 | /** The system was last reset by the BOD33 */ 63 | SYSTEM_RESET_CAUSE_BOD33 = PM_RCAUSE_BOD33, 64 | /** The system was last reset by the BOD12 */ 65 | SYSTEM_RESET_CAUSE_BOD12 = PM_RCAUSE_BOD12, 66 | /** The system was last reset by the POR (Power on reset) */ 67 | SYSTEM_RESET_CAUSE_POR = PM_RCAUSE_POR, 68 | }; 69 | 70 | 71 | /** 72 | * \name Reset Control 73 | * @{ 74 | */ 75 | 76 | /** 77 | * \brief Reset the MCU. 78 | * 79 | * Resets the MCU and all associated peripherals and registers, except RTC, all 32KHz sources, 80 | * WDT (if ALWAYSON is set) and GCLK (if WRTLOCK is set). 81 | * 82 | */ 83 | static inline void system_reset(void) 84 | { 85 | NVIC_SystemReset(); 86 | } 87 | 88 | /** 89 | * \brief Return the reset cause. 90 | * 91 | * Retrieves the cause of the last system reset. 92 | * 93 | * \return An enum value indicating the cause of the last system reset. 94 | */ 95 | static inline enum system_reset_cause system_get_reset_cause(void) 96 | { 97 | return (enum system_reset_cause)PM->RCAUSE.reg; 98 | } 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | /** @} */ 105 | #ifdef __cplusplus 106 | } 107 | #endif 108 | 109 | #endif /* RESET_H_INCLUDED */ 110 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/system/system.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM System related functionality 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #include 38 | 39 | /** 40 | * \internal 41 | * Dummy initialization function, used as a weak alias target for the various 42 | * init functions called by \ref system_init(). 43 | */ 44 | void _system_dummy_init(void); 45 | void _system_dummy_init(void) 46 | { 47 | return; 48 | } 49 | 50 | #if !defined(__DOXYGEN__) 51 | # if defined(__GNUC__) 52 | void system_clock_init(void) WEAK __attribute__((alias("_system_dummy_init"))); 53 | void system_board_init(void) WEAK __attribute__((alias("_system_dummy_init"))); 54 | void _system_events_init(void) WEAK __attribute__((alias("_system_dummy_init"))); 55 | void _system_extint_init(void) WEAK __attribute__((alias("_system_dummy_init"))); 56 | void _system_divas_init(void) WEAK __attribute__((alias("_system_dummy_init"))); 57 | # elif defined(__ICCARM__) 58 | void system_clock_init(void); 59 | void system_board_init(void); 60 | void _system_events_init(void); 61 | void _system_extint_init(void); 62 | void _system_divas_init(void); 63 | # pragma weak system_clock_init=_system_dummy_init 64 | # pragma weak system_board_init=_system_dummy_init 65 | # pragma weak _system_events_init=_system_dummy_init 66 | # pragma weak _system_extint_init=_system_dummy_init 67 | # pragma weak _system_divas_init=_system_dummy_init 68 | # endif 69 | #endif 70 | 71 | /** 72 | * \brief Initialize system 73 | * 74 | * This function will call the various initialization functions within the 75 | * system namespace. If a given optional system module is not available, the 76 | * associated call will effectively be a NOP (No Operation). 77 | * 78 | * Currently the following initialization functions are supported: 79 | * - System clock initialization (via the SYSTEM CLOCK sub-module) 80 | * - Board hardware initialization (via the Board module) 81 | * - Event system driver initialization (via the EVSYS module) 82 | * - External Interrupt driver initialization (via the EXTINT module) 83 | */ 84 | void system_init(void) 85 | { 86 | /* Configure GCLK and clock sources according to conf_clocks.h */ 87 | system_clock_init(); 88 | 89 | /* Initialize board hardware */ 90 | system_board_init(); 91 | 92 | /* Initialize EVSYS hardware */ 93 | _system_events_init(); 94 | 95 | /* Initialize External hardware */ 96 | _system_extint_init(); 97 | 98 | /* Initialize DIVAS hardware */ 99 | _system_divas_init(); 100 | } 101 | 102 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/usb/stack_interface/usb_dual.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM USB Dual Role driver file. 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #include 37 | #include "usb_dual.h" 38 | 39 | #ifndef UDD_ENABLE 40 | # define udc_start() 41 | # define udc_stop() 42 | #else 43 | #include 44 | #endif 45 | 46 | #ifndef UHD_ENABLE 47 | # define uhc_start(void) 48 | # define uhc_stop(b_id_stop) 49 | #else 50 | #include 51 | #endif 52 | 53 | /* State of USB dual role initialization */ 54 | static bool _initialized = false; 55 | 56 | #define _usb_is_id_device() port_pin_get_input_level(USB_ID_PIN) 57 | 58 | #if USB_ID_EIC 59 | static void usb_id_handler(void); 60 | 61 | /** 62 | * \name USB ID PAD management 63 | * 64 | * @{ 65 | */ 66 | 67 | /** 68 | * USB ID pin configuration 69 | */ 70 | static void usb_id_config(void) 71 | { 72 | struct extint_chan_conf eint_chan_conf; 73 | extint_chan_get_config_defaults(&eint_chan_conf); 74 | 75 | eint_chan_conf.gpio_pin = USB_ID_PIN; 76 | eint_chan_conf.gpio_pin_mux = USB_ID_EIC_MUX; 77 | eint_chan_conf.detection_criteria = EXTINT_DETECT_BOTH; 78 | eint_chan_conf.filter_input_signal = true; 79 | 80 | extint_chan_disable_callback(USB_ID_EIC_LINE, 81 | EXTINT_CALLBACK_TYPE_DETECT); 82 | extint_chan_set_config(USB_ID_EIC_LINE, &eint_chan_conf); 83 | extint_register_callback(usb_id_handler, 84 | USB_ID_EIC_LINE, 85 | EXTINT_CALLBACK_TYPE_DETECT); 86 | extint_chan_enable_callback(USB_ID_EIC_LINE, 87 | EXTINT_CALLBACK_TYPE_DETECT); 88 | } 89 | 90 | /** 91 | * USB ID pin change handler 92 | */ 93 | static void usb_id_handler(void) 94 | { 95 | extint_chan_disable_callback(USB_ID_EIC_LINE, 96 | EXTINT_CALLBACK_TYPE_DETECT); 97 | if (_usb_is_id_device()) { 98 | uhc_stop(false); 99 | UHC_MODE_CHANGE(false); 100 | udc_start(); 101 | } else { 102 | udc_stop(); 103 | UHC_MODE_CHANGE(true); 104 | uhc_start(); 105 | } 106 | extint_chan_enable_callback(USB_ID_EIC_LINE, 107 | EXTINT_CALLBACK_TYPE_DETECT); 108 | } 109 | #endif 110 | /** @} */ 111 | 112 | /** 113 | * \brief Initialize the USB peripheral and set right role according to ID pin 114 | * 115 | * \return \c true if the ID pin management has been started, otherwise \c false. 116 | */ 117 | bool usb_dual_enable(void) 118 | { 119 | if (_initialized) { 120 | return false; // Dual role already initialized 121 | } 122 | 123 | #if USB_ID_EIC 124 | _initialized = true; 125 | 126 | struct port_config pin_conf; 127 | port_get_config_defaults(&pin_conf); 128 | 129 | /* Set USB ID Pin as inputs */ 130 | pin_conf.direction = PORT_PIN_DIR_INPUT; 131 | pin_conf.input_pull = PORT_PIN_PULL_UP; 132 | port_pin_set_config(USB_ID_PIN, &pin_conf); 133 | 134 | usb_id_config(); 135 | if (_usb_is_id_device()) { 136 | UHC_MODE_CHANGE(false); 137 | udc_start(); 138 | } else { 139 | UHC_MODE_CHANGE(true); 140 | uhc_start(); 141 | } 142 | 143 | /** 144 | * End of host or device startup, 145 | * the current mode selected is already started now 146 | */ 147 | return true; // ID pin management has been enabled 148 | #else 149 | return false; // ID pin management has not been enabled 150 | #endif 151 | } 152 | 153 | /** 154 | * \brief Deinitialize the dual role driver 155 | */ 156 | void usb_dual_disable(void) 157 | { 158 | if (!_initialized) { 159 | return; // Dual role not initialized 160 | } 161 | _initialized = false; 162 | 163 | #if USB_ID_EIC 164 | extint_chan_disable_callback(USB_ID_EIC_LINE, 165 | EXTINT_CALLBACK_TYPE_DETECT); 166 | #endif 167 | } 168 | 169 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/drivers/usb/stack_interface/usb_dual.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM USB Dual Role driver header file. 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef _USB_DUAL_H_ 38 | #define _USB_DUAL_H_ 39 | 40 | #include "compiler.h" 41 | #include "preprocessor.h" 42 | 43 | /* Get USB pads pins configuration in board configuration */ 44 | #include "conf_board.h" 45 | #include "board.h" 46 | #include "extint.h" 47 | #include "port.h" 48 | 49 | #ifdef __cplusplus 50 | extern "C" { 51 | #endif 52 | 53 | /** 54 | * \ingroup usb_group 55 | * \defgroup usb_dual_group USB dual role driver 56 | * USB low-level driver for dual role features 57 | * 58 | * @{ 59 | */ 60 | 61 | bool usb_dual_enable(void); 62 | void usb_dual_disable(void); 63 | 64 | /** 65 | * @name USB ID pin management 66 | * 67 | * The ID pin come from the USB connector (A and B receptable) and 68 | * allows to select the USB mode between host or device. 69 | * The ID pin can be managed through EIC pin. 70 | * This feature is optional, and it is enabled if USB_ID_PIN 71 | * is defined in board.h and CONF_BOARD_USB_ID_DETECT defined in 72 | * conf_board.h. 73 | * 74 | * @{ 75 | */ 76 | #define USB_ID_DETECT (defined(CONF_BOARD_USB_ID_DETECT)) 77 | #define USB_ID_EIC (defined(USB_ID_PIN) && USB_ID_DETECT) 78 | /** @} */ 79 | 80 | /** 81 | * @name USB Vbus management 82 | * 83 | * The VBus line can be monitored through a EIC pin and 84 | * a basic resistor voltage divider. 85 | * This feature is optional, and it is enabled if USB_VBUS_PIN 86 | * is defined in board.h and CONF_BOARD_USB_VBUS_DETECT defined in 87 | * conf_board.h. 88 | * 89 | * @{ 90 | */ 91 | #define USB_VBUS_DETECT (defined(CONF_BOARD_USB_VBUS_DETECT)) 92 | #define USB_VBUS_EIC (defined(USB_VBUS_PIN) && USB_VBUS_DETECT) 93 | /** @} */ 94 | 95 | /** @} */ 96 | 97 | #ifdef __cplusplus 98 | } 99 | #endif 100 | 101 | #endif // _USB_DUAL_H_ 102 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/services/eeprom/emulator/rwwee_array/quick_start/qs_emulator_basic.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM RWW EEPROM Emulator Service Quick Start 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | /** 35 | * \page asfdoc_sam0_rww_eeprom_basic_use_case Quick Start Guide for the Emulated RWW EEPROM Module - Basic Use Case 36 | * 37 | * In this use case, the RWW EEPROM emulator module is configured, and a sample page 38 | * is read and written. The first byte of the first RWW EEPROM page is toggled, 39 | * and a LED is turned ON or OFF to reflect the new state. Each time the device 40 | * is reset, the LED should toggle to a different state to indicate correct 41 | * non-volatile storage and retrieval. 42 | * 43 | * 44 | * \section asfdoc_sam0_rww_eeprom_basic_use_case_setup Setup 45 | * 46 | * \subsection asfdoc_sam0_rww_eeprom_basic_use_case_setup_prereq Prerequisites 47 | * There are no special setup requirements for this use-case. 48 | * 49 | * \subsection asfdoc_sam0_rww_eeprom_basic_use_case_setup_code Code 50 | * Copy-paste the following setup code to your user application: 51 | * \snippet qs_emulator_basic.c setup 52 | * 53 | * Add to user application initialization (typically the start of \c main()): 54 | * \snippet qs_emulator_basic.c setup_init 55 | * 56 | * \subsection asfdoc_sam0_rww_eeprom_basic_use_case_setup_flow Workflow 57 | * -# Attempt to initialize the RWW EEPROM emulator service, storing the error code 58 | * from the initialization function into a temporary variable. 59 | * \snippet qs_emulator_basic.c init_eeprom_service 60 | * -# Check if the emulator service failed to initialize for any other reason; 61 | * if so, assume the emulator physical memory is unformatted or corrupt and 62 | * erase/re-try initialization. 63 | * \snippet qs_emulator_basic.c check_re-init 64 | * 65 | * Config BOD to give an early warning to prevent data loss. 66 | * \snippet qs_emulator_basic.c setup_bod 67 | * 68 | * \section asfdoc_sam0_rww_eeprom_basic_use_case_main Use Case 69 | * 70 | * \subsection asfdoc_sam0_rww_eeprom_basic_use_case_main_code Code 71 | * Copy-paste the following code to your user application: 72 | * \snippet qs_emulator_basic.c main 73 | * 74 | * \subsection asfdoc_sam0_rww_eeprom_basic_use_case_main_flow Workflow 75 | * -# Create a buffer to hold a single emulated RWW EEPROM page of memory, and read 76 | * out logical RWW EEPROM page zero into it. 77 | * \snippet qs_emulator_basic.c read_page 78 | * -# Toggle the first byte of the read page. 79 | * \snippet qs_emulator_basic.c toggle_first_byte 80 | * -# Output the toggled LED state onto the board LED. 81 | * \snippet qs_emulator_basic.c set_led 82 | * -# Write the modified page back to logical RWW EEPROM page zero, flushing the 83 | * internal emulator write cache afterwards to ensure it is immediately 84 | * written to physical non-volatile memory. 85 | * \snippet qs_emulator_basic.c write_page 86 | * -# Modify data and write back to logical EEPROM page zero. 87 | * The data is not committed and should call \c rww_eeprom_emulator_commit_page_buffer 88 | * to ensure that any outstanding cache data is fully written to prevent data loss 89 | * when detecting a BOD early warning. 90 | * \snippet qs_emulator_basic.c write_page_not_commit 91 | */ 92 | /* 93 | * Support and FAQ: visit Microchip Support 94 | */ 95 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/component/pac.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Component description for PAC 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_PAC_COMPONENT_ 35 | #define _SAMD21_PAC_COMPONENT_ 36 | 37 | /* ========================================================================== */ 38 | /** SOFTWARE API DEFINITION FOR PAC */ 39 | /* ========================================================================== */ 40 | /** \addtogroup SAMD21_PAC Peripheral Access Controller */ 41 | /*@{*/ 42 | 43 | #define PAC_U2211 44 | #define REV_PAC 0x101 45 | 46 | /* -------- PAC_WPCLR : (PAC Offset: 0x0) (R/W 32) Write Protection Clear -------- */ 47 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 48 | typedef union { 49 | struct { 50 | uint32_t :1; /*!< bit: 0 Reserved */ 51 | uint32_t WP:31; /*!< bit: 1..31 Write Protection Clear */ 52 | } bit; /*!< Structure used for bit access */ 53 | uint32_t reg; /*!< Type used for register access */ 54 | } PAC_WPCLR_Type; 55 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 56 | 57 | #define PAC_WPCLR_OFFSET 0x0 /**< \brief (PAC_WPCLR offset) Write Protection Clear */ 58 | #define PAC_WPCLR_RESETVALUE 0x00000000ul /**< \brief (PAC_WPCLR reset_value) Write Protection Clear */ 59 | 60 | #define PAC_WPCLR_WP_Pos 1 /**< \brief (PAC_WPCLR) Write Protection Clear */ 61 | #define PAC_WPCLR_WP_Msk (0x7FFFFFFFul << PAC_WPCLR_WP_Pos) 62 | #define PAC_WPCLR_WP(value) (PAC_WPCLR_WP_Msk & ((value) << PAC_WPCLR_WP_Pos)) 63 | #define PAC_WPCLR_MASK 0xFFFFFFFEul /**< \brief (PAC_WPCLR) MASK Register */ 64 | 65 | /* -------- PAC_WPSET : (PAC Offset: 0x4) (R/W 32) Write Protection Set -------- */ 66 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 67 | typedef union { 68 | struct { 69 | uint32_t :1; /*!< bit: 0 Reserved */ 70 | uint32_t WP:31; /*!< bit: 1..31 Write Protection Set */ 71 | } bit; /*!< Structure used for bit access */ 72 | uint32_t reg; /*!< Type used for register access */ 73 | } PAC_WPSET_Type; 74 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 75 | 76 | #define PAC_WPSET_OFFSET 0x4 /**< \brief (PAC_WPSET offset) Write Protection Set */ 77 | #define PAC_WPSET_RESETVALUE 0x00000000ul /**< \brief (PAC_WPSET reset_value) Write Protection Set */ 78 | 79 | #define PAC_WPSET_WP_Pos 1 /**< \brief (PAC_WPSET) Write Protection Set */ 80 | #define PAC_WPSET_WP_Msk (0x7FFFFFFFul << PAC_WPSET_WP_Pos) 81 | #define PAC_WPSET_WP(value) (PAC_WPSET_WP_Msk & ((value) << PAC_WPSET_WP_Pos)) 82 | #define PAC_WPSET_MASK 0xFFFFFFFEul /**< \brief (PAC_WPSET) MASK Register */ 83 | 84 | /** \brief PAC hardware registers */ 85 | #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 86 | typedef struct { 87 | __IO PAC_WPCLR_Type WPCLR; /**< \brief Offset: 0x0 (R/W 32) Write Protection Clear */ 88 | __IO PAC_WPSET_Type WPSET; /**< \brief Offset: 0x4 (R/W 32) Write Protection Set */ 89 | } Pac; 90 | #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 91 | 92 | /*@}*/ 93 | 94 | #endif /* _SAMD21_PAC_COMPONENT_ */ 95 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/ac.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for AC 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_AC_INSTANCE_ 35 | #define _SAMD21_AC_INSTANCE_ 36 | 37 | /* ========== Register definition for AC peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_AC_CTRLA (0x42004400U) /**< \brief (AC) Control A */ 40 | #define REG_AC_CTRLB (0x42004401U) /**< \brief (AC) Control B */ 41 | #define REG_AC_EVCTRL (0x42004402U) /**< \brief (AC) Event Control */ 42 | #define REG_AC_INTENCLR (0x42004404U) /**< \brief (AC) Interrupt Enable Clear */ 43 | #define REG_AC_INTENSET (0x42004405U) /**< \brief (AC) Interrupt Enable Set */ 44 | #define REG_AC_INTFLAG (0x42004406U) /**< \brief (AC) Interrupt Flag Status and Clear */ 45 | #define REG_AC_STATUSA (0x42004408U) /**< \brief (AC) Status A */ 46 | #define REG_AC_STATUSB (0x42004409U) /**< \brief (AC) Status B */ 47 | #define REG_AC_STATUSC (0x4200440AU) /**< \brief (AC) Status C */ 48 | #define REG_AC_WINCTRL (0x4200440CU) /**< \brief (AC) Window Control */ 49 | #define REG_AC_COMPCTRL0 (0x42004410U) /**< \brief (AC) Comparator Control 0 */ 50 | #define REG_AC_COMPCTRL1 (0x42004414U) /**< \brief (AC) Comparator Control 1 */ 51 | #define REG_AC_SCALER0 (0x42004420U) /**< \brief (AC) Scaler 0 */ 52 | #define REG_AC_SCALER1 (0x42004421U) /**< \brief (AC) Scaler 1 */ 53 | #else 54 | #define REG_AC_CTRLA (*(RwReg8 *)0x42004400U) /**< \brief (AC) Control A */ 55 | #define REG_AC_CTRLB (*(WoReg8 *)0x42004401U) /**< \brief (AC) Control B */ 56 | #define REG_AC_EVCTRL (*(RwReg16*)0x42004402U) /**< \brief (AC) Event Control */ 57 | #define REG_AC_INTENCLR (*(RwReg8 *)0x42004404U) /**< \brief (AC) Interrupt Enable Clear */ 58 | #define REG_AC_INTENSET (*(RwReg8 *)0x42004405U) /**< \brief (AC) Interrupt Enable Set */ 59 | #define REG_AC_INTFLAG (*(RwReg8 *)0x42004406U) /**< \brief (AC) Interrupt Flag Status and Clear */ 60 | #define REG_AC_STATUSA (*(RoReg8 *)0x42004408U) /**< \brief (AC) Status A */ 61 | #define REG_AC_STATUSB (*(RoReg8 *)0x42004409U) /**< \brief (AC) Status B */ 62 | #define REG_AC_STATUSC (*(RoReg8 *)0x4200440AU) /**< \brief (AC) Status C */ 63 | #define REG_AC_WINCTRL (*(RwReg8 *)0x4200440CU) /**< \brief (AC) Window Control */ 64 | #define REG_AC_COMPCTRL0 (*(RwReg *)0x42004410U) /**< \brief (AC) Comparator Control 0 */ 65 | #define REG_AC_COMPCTRL1 (*(RwReg *)0x42004414U) /**< \brief (AC) Comparator Control 1 */ 66 | #define REG_AC_SCALER0 (*(RwReg8 *)0x42004420U) /**< \brief (AC) Scaler 0 */ 67 | #define REG_AC_SCALER1 (*(RwReg8 *)0x42004421U) /**< \brief (AC) Scaler 1 */ 68 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 69 | 70 | /* ========== Instance parameters for AC peripheral ========== */ 71 | #define AC_CMP_NUM 2 // Number of comparators 72 | #define AC_GCLK_ID_ANA 32 // Index of Generic Clock for analog 73 | #define AC_GCLK_ID_DIG 31 // Index of Generic Clock for digital 74 | #define AC_NUM_CMP 2 75 | #define AC_PAIRS 1 // Number of pairs of comparators 76 | 77 | #endif /* _SAMD21_AC_INSTANCE_ */ 78 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/ac1.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for AC1 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_AC1_INSTANCE_ 35 | #define _SAMD21_AC1_INSTANCE_ 36 | 37 | /* ========== Register definition for AC1 peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_AC1_CTRLA (0x42005400U) /**< \brief (AC1) Control A */ 40 | #define REG_AC1_CTRLB (0x42005401U) /**< \brief (AC1) Control B */ 41 | #define REG_AC1_EVCTRL (0x42005402U) /**< \brief (AC1) Event Control */ 42 | #define REG_AC1_INTENCLR (0x42005404U) /**< \brief (AC1) Interrupt Enable Clear */ 43 | #define REG_AC1_INTENSET (0x42005405U) /**< \brief (AC1) Interrupt Enable Set */ 44 | #define REG_AC1_INTFLAG (0x42005406U) /**< \brief (AC1) Interrupt Flag Status and Clear */ 45 | #define REG_AC1_STATUSA (0x42005408U) /**< \brief (AC1) Status A */ 46 | #define REG_AC1_STATUSB (0x42005409U) /**< \brief (AC1) Status B */ 47 | #define REG_AC1_STATUSC (0x4200540AU) /**< \brief (AC1) Status C */ 48 | #define REG_AC1_WINCTRL (0x4200540CU) /**< \brief (AC1) Window Control */ 49 | #define REG_AC1_COMPCTRL0 (0x42005410U) /**< \brief (AC1) Comparator Control 0 */ 50 | #define REG_AC1_COMPCTRL1 (0x42005414U) /**< \brief (AC1) Comparator Control 1 */ 51 | #define REG_AC1_SCALER0 (0x42005420U) /**< \brief (AC1) Scaler 0 */ 52 | #define REG_AC1_SCALER1 (0x42005421U) /**< \brief (AC1) Scaler 1 */ 53 | #else 54 | #define REG_AC1_CTRLA (*(RwReg8 *)0x42005400U) /**< \brief (AC1) Control A */ 55 | #define REG_AC1_CTRLB (*(WoReg8 *)0x42005401U) /**< \brief (AC1) Control B */ 56 | #define REG_AC1_EVCTRL (*(RwReg16*)0x42005402U) /**< \brief (AC1) Event Control */ 57 | #define REG_AC1_INTENCLR (*(RwReg8 *)0x42005404U) /**< \brief (AC1) Interrupt Enable Clear */ 58 | #define REG_AC1_INTENSET (*(RwReg8 *)0x42005405U) /**< \brief (AC1) Interrupt Enable Set */ 59 | #define REG_AC1_INTFLAG (*(RwReg8 *)0x42005406U) /**< \brief (AC1) Interrupt Flag Status and Clear */ 60 | #define REG_AC1_STATUSA (*(RoReg8 *)0x42005408U) /**< \brief (AC1) Status A */ 61 | #define REG_AC1_STATUSB (*(RoReg8 *)0x42005409U) /**< \brief (AC1) Status B */ 62 | #define REG_AC1_STATUSC (*(RoReg8 *)0x4200540AU) /**< \brief (AC1) Status C */ 63 | #define REG_AC1_WINCTRL (*(RwReg8 *)0x4200540CU) /**< \brief (AC1) Window Control */ 64 | #define REG_AC1_COMPCTRL0 (*(RwReg *)0x42005410U) /**< \brief (AC1) Comparator Control 0 */ 65 | #define REG_AC1_COMPCTRL1 (*(RwReg *)0x42005414U) /**< \brief (AC1) Comparator Control 1 */ 66 | #define REG_AC1_SCALER0 (*(RwReg8 *)0x42005420U) /**< \brief (AC1) Scaler 0 */ 67 | #define REG_AC1_SCALER1 (*(RwReg8 *)0x42005421U) /**< \brief (AC1) Scaler 1 */ 68 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 69 | 70 | /* ========== Instance parameters for AC1 peripheral ========== */ 71 | #define AC1_CMP_NUM 2 // Number of comparators 72 | #define AC1_GCLK_ID_ANA 32 // Index of Generic Clock for analog 73 | #define AC1_GCLK_ID_DIG 31 // Index of Generic Clock for digital 74 | #define AC1_NUM_CMP 2 75 | #define AC1_PAIRS 1 // Number of pairs of comparators 76 | 77 | #endif /* _SAMD21_AC1_INSTANCE_ */ 78 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/dac.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for DAC 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_DAC_INSTANCE_ 35 | #define _SAMD21_DAC_INSTANCE_ 36 | 37 | /* ========== Register definition for DAC peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_DAC_CTRLA (0x42004800U) /**< \brief (DAC) Control A */ 40 | #define REG_DAC_CTRLB (0x42004801U) /**< \brief (DAC) Control B */ 41 | #define REG_DAC_EVCTRL (0x42004802U) /**< \brief (DAC) Event Control */ 42 | #define REG_DAC_INTENCLR (0x42004804U) /**< \brief (DAC) Interrupt Enable Clear */ 43 | #define REG_DAC_INTENSET (0x42004805U) /**< \brief (DAC) Interrupt Enable Set */ 44 | #define REG_DAC_INTFLAG (0x42004806U) /**< \brief (DAC) Interrupt Flag Status and Clear */ 45 | #define REG_DAC_STATUS (0x42004807U) /**< \brief (DAC) Status */ 46 | #define REG_DAC_DATA (0x42004808U) /**< \brief (DAC) Data */ 47 | #define REG_DAC_DATABUF (0x4200480CU) /**< \brief (DAC) Data Buffer */ 48 | #else 49 | #define REG_DAC_CTRLA (*(RwReg8 *)0x42004800U) /**< \brief (DAC) Control A */ 50 | #define REG_DAC_CTRLB (*(RwReg8 *)0x42004801U) /**< \brief (DAC) Control B */ 51 | #define REG_DAC_EVCTRL (*(RwReg8 *)0x42004802U) /**< \brief (DAC) Event Control */ 52 | #define REG_DAC_INTENCLR (*(RwReg8 *)0x42004804U) /**< \brief (DAC) Interrupt Enable Clear */ 53 | #define REG_DAC_INTENSET (*(RwReg8 *)0x42004805U) /**< \brief (DAC) Interrupt Enable Set */ 54 | #define REG_DAC_INTFLAG (*(RwReg8 *)0x42004806U) /**< \brief (DAC) Interrupt Flag Status and Clear */ 55 | #define REG_DAC_STATUS (*(RoReg8 *)0x42004807U) /**< \brief (DAC) Status */ 56 | #define REG_DAC_DATA (*(RwReg16*)0x42004808U) /**< \brief (DAC) Data */ 57 | #define REG_DAC_DATABUF (*(RwReg16*)0x4200480CU) /**< \brief (DAC) Data Buffer */ 58 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 59 | 60 | /* ========== Instance parameters for DAC peripheral ========== */ 61 | #define DAC_DMAC_ID_EMPTY 40 // Index of DMAC EMPTY trigger 62 | #define DAC_GCLK_ID 33 // Index of Generic Clock 63 | 64 | #endif /* _SAMD21_DAC_INSTANCE_ */ 65 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/eic.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for EIC 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_EIC_INSTANCE_ 35 | #define _SAMD21_EIC_INSTANCE_ 36 | 37 | /* ========== Register definition for EIC peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_EIC_CTRL (0x40001800U) /**< \brief (EIC) Control */ 40 | #define REG_EIC_STATUS (0x40001801U) /**< \brief (EIC) Status */ 41 | #define REG_EIC_NMICTRL (0x40001802U) /**< \brief (EIC) Non-Maskable Interrupt Control */ 42 | #define REG_EIC_NMIFLAG (0x40001803U) /**< \brief (EIC) Non-Maskable Interrupt Flag Status and Clear */ 43 | #define REG_EIC_EVCTRL (0x40001804U) /**< \brief (EIC) Event Control */ 44 | #define REG_EIC_INTENCLR (0x40001808U) /**< \brief (EIC) Interrupt Enable Clear */ 45 | #define REG_EIC_INTENSET (0x4000180CU) /**< \brief (EIC) Interrupt Enable Set */ 46 | #define REG_EIC_INTFLAG (0x40001810U) /**< \brief (EIC) Interrupt Flag Status and Clear */ 47 | #define REG_EIC_WAKEUP (0x40001814U) /**< \brief (EIC) Wake-Up Enable */ 48 | #define REG_EIC_CONFIG0 (0x40001818U) /**< \brief (EIC) Configuration 0 */ 49 | #define REG_EIC_CONFIG1 (0x4000181CU) /**< \brief (EIC) Configuration 1 */ 50 | #else 51 | #define REG_EIC_CTRL (*(RwReg8 *)0x40001800U) /**< \brief (EIC) Control */ 52 | #define REG_EIC_STATUS (*(RoReg8 *)0x40001801U) /**< \brief (EIC) Status */ 53 | #define REG_EIC_NMICTRL (*(RwReg8 *)0x40001802U) /**< \brief (EIC) Non-Maskable Interrupt Control */ 54 | #define REG_EIC_NMIFLAG (*(RwReg8 *)0x40001803U) /**< \brief (EIC) Non-Maskable Interrupt Flag Status and Clear */ 55 | #define REG_EIC_EVCTRL (*(RwReg *)0x40001804U) /**< \brief (EIC) Event Control */ 56 | #define REG_EIC_INTENCLR (*(RwReg *)0x40001808U) /**< \brief (EIC) Interrupt Enable Clear */ 57 | #define REG_EIC_INTENSET (*(RwReg *)0x4000180CU) /**< \brief (EIC) Interrupt Enable Set */ 58 | #define REG_EIC_INTFLAG (*(RwReg *)0x40001810U) /**< \brief (EIC) Interrupt Flag Status and Clear */ 59 | #define REG_EIC_WAKEUP (*(RwReg *)0x40001814U) /**< \brief (EIC) Wake-Up Enable */ 60 | #define REG_EIC_CONFIG0 (*(RwReg *)0x40001818U) /**< \brief (EIC) Configuration 0 */ 61 | #define REG_EIC_CONFIG1 (*(RwReg *)0x4000181CU) /**< \brief (EIC) Configuration 1 */ 62 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 63 | 64 | /* ========== Instance parameters for EIC peripheral ========== */ 65 | #define EIC_CONFIG_NUM 2 // Number of CONFIG registers 66 | #define EIC_GCLK_ID 5 // Index of Generic Clock 67 | 68 | #endif /* _SAMD21_EIC_INSTANCE_ */ 69 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/gclk.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for GCLK 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_GCLK_INSTANCE_ 35 | #define _SAMD21_GCLK_INSTANCE_ 36 | 37 | /* ========== Register definition for GCLK peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_GCLK_CTRL (0x40000C00U) /**< \brief (GCLK) Control */ 40 | #define REG_GCLK_STATUS (0x40000C01U) /**< \brief (GCLK) Status */ 41 | #define REG_GCLK_CLKCTRL (0x40000C02U) /**< \brief (GCLK) Generic Clock Control */ 42 | #define REG_GCLK_GENCTRL (0x40000C04U) /**< \brief (GCLK) Generic Clock Generator Control */ 43 | #define REG_GCLK_GENDIV (0x40000C08U) /**< \brief (GCLK) Generic Clock Generator Division */ 44 | #else 45 | #define REG_GCLK_CTRL (*(RwReg8 *)0x40000C00U) /**< \brief (GCLK) Control */ 46 | #define REG_GCLK_STATUS (*(RoReg8 *)0x40000C01U) /**< \brief (GCLK) Status */ 47 | #define REG_GCLK_CLKCTRL (*(RwReg16*)0x40000C02U) /**< \brief (GCLK) Generic Clock Control */ 48 | #define REG_GCLK_GENCTRL (*(RwReg *)0x40000C04U) /**< \brief (GCLK) Generic Clock Generator Control */ 49 | #define REG_GCLK_GENDIV (*(RwReg *)0x40000C08U) /**< \brief (GCLK) Generic Clock Generator Division */ 50 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 51 | 52 | /* ========== Instance parameters for GCLK peripheral ========== */ 53 | #define GCLK_GENDIV_BITS 16 54 | #define GCLK_GEN_NUM 9 // Number of Generic Clock Generators 55 | #define GCLK_GEN_NUM_MSB 8 // Number of Generic Clock Generators - 1 56 | #define GCLK_GEN_SOURCE_NUM_MSB 8 // Number of Generic Clock Sources - 1 57 | #define GCLK_NUM 37 // Number of Generic Clock Users 58 | #define GCLK_SOURCE_DFLL48M 7 // DFLL48M output 59 | #define GCLK_SOURCE_FDPLL 8 // FDPLL output 60 | #define GCLK_SOURCE_GCLKGEN1 2 // Generic clock generator 1 output 61 | #define GCLK_SOURCE_GCLKIN 1 // Generator input pad 62 | #define GCLK_SOURCE_NUM 9 // Number of Generic Clock Sources 63 | #define GCLK_SOURCE_OSCULP32K 3 // OSCULP32K oscillator output 64 | #define GCLK_SOURCE_OSC8M 6 // OSC8M oscillator output 65 | #define GCLK_SOURCE_OSC32K 4 // OSC32K oscillator outpur 66 | #define GCLK_SOURCE_XOSC 0 // XOSC oscillator output 67 | #define GCLK_SOURCE_XOSC32K 5 // XOSC32K oscillator output 68 | 69 | #endif /* _SAMD21_GCLK_INSTANCE_ */ 70 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/i2s.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for I2S 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_I2S_INSTANCE_ 35 | #define _SAMD21_I2S_INSTANCE_ 36 | 37 | /* ========== Register definition for I2S peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_I2S_CTRLA (0x42005000U) /**< \brief (I2S) Control A */ 40 | #define REG_I2S_CLKCTRL0 (0x42005004U) /**< \brief (I2S) Clock Unit 0 Control */ 41 | #define REG_I2S_CLKCTRL1 (0x42005008U) /**< \brief (I2S) Clock Unit 1 Control */ 42 | #define REG_I2S_INTENCLR (0x4200500CU) /**< \brief (I2S) Interrupt Enable Clear */ 43 | #define REG_I2S_INTENSET (0x42005010U) /**< \brief (I2S) Interrupt Enable Set */ 44 | #define REG_I2S_INTFLAG (0x42005014U) /**< \brief (I2S) Interrupt Flag Status and Clear */ 45 | #define REG_I2S_SYNCBUSY (0x42005018U) /**< \brief (I2S) Synchronization Status */ 46 | #define REG_I2S_SERCTRL0 (0x42005020U) /**< \brief (I2S) Serializer 0 Control */ 47 | #define REG_I2S_SERCTRL1 (0x42005024U) /**< \brief (I2S) Serializer 1 Control */ 48 | #define REG_I2S_DATA0 (0x42005030U) /**< \brief (I2S) Data 0 */ 49 | #define REG_I2S_DATA1 (0x42005034U) /**< \brief (I2S) Data 1 */ 50 | #else 51 | #define REG_I2S_CTRLA (*(RwReg8 *)0x42005000U) /**< \brief (I2S) Control A */ 52 | #define REG_I2S_CLKCTRL0 (*(RwReg *)0x42005004U) /**< \brief (I2S) Clock Unit 0 Control */ 53 | #define REG_I2S_CLKCTRL1 (*(RwReg *)0x42005008U) /**< \brief (I2S) Clock Unit 1 Control */ 54 | #define REG_I2S_INTENCLR (*(RwReg16*)0x4200500CU) /**< \brief (I2S) Interrupt Enable Clear */ 55 | #define REG_I2S_INTENSET (*(RwReg16*)0x42005010U) /**< \brief (I2S) Interrupt Enable Set */ 56 | #define REG_I2S_INTFLAG (*(RwReg16*)0x42005014U) /**< \brief (I2S) Interrupt Flag Status and Clear */ 57 | #define REG_I2S_SYNCBUSY (*(RoReg16*)0x42005018U) /**< \brief (I2S) Synchronization Status */ 58 | #define REG_I2S_SERCTRL0 (*(RwReg *)0x42005020U) /**< \brief (I2S) Serializer 0 Control */ 59 | #define REG_I2S_SERCTRL1 (*(RwReg *)0x42005024U) /**< \brief (I2S) Serializer 1 Control */ 60 | #define REG_I2S_DATA0 (*(RwReg *)0x42005030U) /**< \brief (I2S) Data 0 */ 61 | #define REG_I2S_DATA1 (*(RwReg *)0x42005034U) /**< \brief (I2S) Data 1 */ 62 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 63 | 64 | /* ========== Instance parameters for I2S peripheral ========== */ 65 | #define I2S_CLK_NUM 2 // Number of clock units 66 | #define I2S_DMAC_ID_RX_0 41 67 | #define I2S_DMAC_ID_RX_1 42 68 | #define I2S_DMAC_ID_RX_LSB 41 69 | #define I2S_DMAC_ID_RX_MSB 42 70 | #define I2S_DMAC_ID_RX_SIZE 2 71 | #define I2S_DMAC_ID_TX_0 43 72 | #define I2S_DMAC_ID_TX_1 44 73 | #define I2S_DMAC_ID_TX_LSB 43 74 | #define I2S_DMAC_ID_TX_MSB 44 75 | #define I2S_DMAC_ID_TX_SIZE 2 76 | #define I2S_GCLK_ID_0 35 77 | #define I2S_GCLK_ID_1 36 78 | #define I2S_GCLK_ID_LSB 35 79 | #define I2S_GCLK_ID_MSB 36 80 | #define I2S_GCLK_ID_SIZE 2 81 | #define I2S_MAX_SLOTS 8 // Max number of data slots in frame 82 | #define I2S_SER_NUM 2 // Number of serializers 83 | 84 | #endif /* _SAMD21_I2S_INSTANCE_ */ 85 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/nvmctrl.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for NVMCTRL 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_NVMCTRL_INSTANCE_ 35 | #define _SAMD21_NVMCTRL_INSTANCE_ 36 | 37 | /* ========== Register definition for NVMCTRL peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_NVMCTRL_CTRLA (0x41004000U) /**< \brief (NVMCTRL) Control A */ 40 | #define REG_NVMCTRL_CTRLB (0x41004004U) /**< \brief (NVMCTRL) Control B */ 41 | #define REG_NVMCTRL_PARAM (0x41004008U) /**< \brief (NVMCTRL) NVM Parameter */ 42 | #define REG_NVMCTRL_INTENCLR (0x4100400CU) /**< \brief (NVMCTRL) Interrupt Enable Clear */ 43 | #define REG_NVMCTRL_INTENSET (0x41004010U) /**< \brief (NVMCTRL) Interrupt Enable Set */ 44 | #define REG_NVMCTRL_INTFLAG (0x41004014U) /**< \brief (NVMCTRL) Interrupt Flag Status and Clear */ 45 | #define REG_NVMCTRL_STATUS (0x41004018U) /**< \brief (NVMCTRL) Status */ 46 | #define REG_NVMCTRL_ADDR (0x4100401CU) /**< \brief (NVMCTRL) Address */ 47 | #define REG_NVMCTRL_LOCK (0x41004020U) /**< \brief (NVMCTRL) Lock Section */ 48 | #else 49 | #define REG_NVMCTRL_CTRLA (*(RwReg16*)0x41004000U) /**< \brief (NVMCTRL) Control A */ 50 | #define REG_NVMCTRL_CTRLB (*(RwReg *)0x41004004U) /**< \brief (NVMCTRL) Control B */ 51 | #define REG_NVMCTRL_PARAM (*(RwReg *)0x41004008U) /**< \brief (NVMCTRL) NVM Parameter */ 52 | #define REG_NVMCTRL_INTENCLR (*(RwReg8 *)0x4100400CU) /**< \brief (NVMCTRL) Interrupt Enable Clear */ 53 | #define REG_NVMCTRL_INTENSET (*(RwReg8 *)0x41004010U) /**< \brief (NVMCTRL) Interrupt Enable Set */ 54 | #define REG_NVMCTRL_INTFLAG (*(RwReg8 *)0x41004014U) /**< \brief (NVMCTRL) Interrupt Flag Status and Clear */ 55 | #define REG_NVMCTRL_STATUS (*(RwReg16*)0x41004018U) /**< \brief (NVMCTRL) Status */ 56 | #define REG_NVMCTRL_ADDR (*(RwReg *)0x4100401CU) /**< \brief (NVMCTRL) Address */ 57 | #define REG_NVMCTRL_LOCK (*(RwReg16*)0x41004020U) /**< \brief (NVMCTRL) Lock Section */ 58 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 59 | 60 | /* ========== Instance parameters for NVMCTRL peripheral ========== */ 61 | #define NVMCTRL_AUX0_ADDRESS 0x00804000 62 | #define NVMCTRL_AUX1_ADDRESS 0x00806000 63 | #define NVMCTRL_AUX2_ADDRESS 0x00808000 64 | #define NVMCTRL_AUX3_ADDRESS 0x0080A000 65 | #define NVMCTRL_CLK_AHB_ID 4 // Index of AHB Clock in PM.AHBMASK register 66 | #define NVMCTRL_FACTORY_WORD_IMPLEMENTED_MASK 0xC0000007FFFFFFFF 67 | #define NVMCTRL_FLASH_SIZE 65536 68 | #define NVMCTRL_LOCKBIT_ADDRESS 0x00802000 69 | #define NVMCTRL_PAGE_HW 32 70 | #define NVMCTRL_PAGE_SIZE 64 71 | #define NVMCTRL_PAGE_W 16 72 | #define NVMCTRL_PMSB 3 73 | #define NVMCTRL_PSZ_BITS 6 74 | #define NVMCTRL_ROW_PAGES 4 75 | #define NVMCTRL_ROW_SIZE 256 76 | #define NVMCTRL_USER_PAGE_ADDRESS 0x00800000 77 | #define NVMCTRL_USER_PAGE_OFFSET 0x00800000 78 | #define NVMCTRL_USER_WORD_IMPLEMENTED_MASK 0xC01FFFFFFFFFFFFF 79 | #define NVMCTRL_RWWEE_PAGES 32 // Page size 80 | #define NVMCTRL_RWW_EEPROM_ADDR 0x00400000 // Start address of the RWW EEPROM area 81 | 82 | #endif /* _SAMD21_NVMCTRL_INSTANCE_ */ 83 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/nvmctrl_variant_d.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for NVMCTRL 5 | * 6 | * Copyright (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_NVMCTRL_INSTANCE_ 35 | #define _SAMD21_NVMCTRL_INSTANCE_ 36 | 37 | /* ========== Register definition for NVMCTRL peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_NVMCTRL_CTRLA (0x41004000U) /**< \brief (NVMCTRL) Control A */ 40 | #define REG_NVMCTRL_CTRLB (0x41004004U) /**< \brief (NVMCTRL) Control B */ 41 | #define REG_NVMCTRL_PARAM (0x41004008U) /**< \brief (NVMCTRL) NVM Parameter */ 42 | #define REG_NVMCTRL_INTENCLR (0x4100400CU) /**< \brief (NVMCTRL) Interrupt Enable Clear */ 43 | #define REG_NVMCTRL_INTENSET (0x41004010U) /**< \brief (NVMCTRL) Interrupt Enable Set */ 44 | #define REG_NVMCTRL_INTFLAG (0x41004014U) /**< \brief (NVMCTRL) Interrupt Flag Status and Clear */ 45 | #define REG_NVMCTRL_STATUS (0x41004018U) /**< \brief (NVMCTRL) Status */ 46 | #define REG_NVMCTRL_ADDR (0x4100401CU) /**< \brief (NVMCTRL) Address */ 47 | #define REG_NVMCTRL_LOCK (0x41004020U) /**< \brief (NVMCTRL) Lock Section */ 48 | #else 49 | #define REG_NVMCTRL_CTRLA (*(RwReg16*)0x41004000U) /**< \brief (NVMCTRL) Control A */ 50 | #define REG_NVMCTRL_CTRLB (*(RwReg *)0x41004004U) /**< \brief (NVMCTRL) Control B */ 51 | #define REG_NVMCTRL_PARAM (*(RwReg *)0x41004008U) /**< \brief (NVMCTRL) NVM Parameter */ 52 | #define REG_NVMCTRL_INTENCLR (*(RwReg8 *)0x4100400CU) /**< \brief (NVMCTRL) Interrupt Enable Clear */ 53 | #define REG_NVMCTRL_INTENSET (*(RwReg8 *)0x41004010U) /**< \brief (NVMCTRL) Interrupt Enable Set */ 54 | #define REG_NVMCTRL_INTFLAG (*(RwReg8 *)0x41004014U) /**< \brief (NVMCTRL) Interrupt Flag Status and Clear */ 55 | #define REG_NVMCTRL_STATUS (*(RwReg16*)0x41004018U) /**< \brief (NVMCTRL) Status */ 56 | #define REG_NVMCTRL_ADDR (*(RwReg *)0x4100401CU) /**< \brief (NVMCTRL) Address */ 57 | #define REG_NVMCTRL_LOCK (*(RwReg16*)0x41004020U) /**< \brief (NVMCTRL) Lock Section */ 58 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 59 | 60 | /* ========== Instance parameters for NVMCTRL peripheral ========== */ 61 | #define NVMCTRL_AUX0_ADDRESS 0x00804000 62 | #define NVMCTRL_AUX1_ADDRESS 0x00806000 63 | #define NVMCTRL_AUX2_ADDRESS 0x00808000 64 | #define NVMCTRL_AUX3_ADDRESS 0x0080A000 65 | #define NVMCTRL_CLK_AHB_ID 4 // Index of AHB Clock in PM.AHBMASK register 66 | #define NVMCTRL_FACTORY_WORD_IMPLEMENTED_MASK 0xC0000007FFFFFFFF 67 | #define NVMCTRL_FLASH_SIZE 131072 68 | #define NVMCTRL_LOCKBIT_ADDRESS 0x00802000 69 | #define NVMCTRL_PAGE_HW 32 70 | #define NVMCTRL_PAGE_SIZE 64 71 | #define NVMCTRL_PAGE_W 16 72 | #define NVMCTRL_PMSB 3 73 | #define NVMCTRL_PSZ_BITS 6 74 | #define NVMCTRL_ROW_PAGES 4 75 | #define NVMCTRL_ROW_SIZE 256 76 | #define NVMCTRL_USER_PAGE_ADDRESS 0x00800000 77 | #define NVMCTRL_USER_PAGE_OFFSET 0x00800000 78 | #define NVMCTRL_USER_WORD_IMPLEMENTED_MASK 0xC01FFFFFFFFFFFFF 79 | #define NVMCTRL_RWWEE_PAGES 64 // Page size 80 | #define NVMCTRL_RWW_EEPROM_ADDR 0x00400000 // Start address of the RWW EEPROM area 81 | 82 | #endif /* _SAMD21_NVMCTRL_INSTANCE_ */ 83 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/pac0.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for PAC0 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_PAC0_INSTANCE_ 35 | #define _SAMD21_PAC0_INSTANCE_ 36 | 37 | /* ========== Register definition for PAC0 peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_PAC0_WPCLR (0x40000000U) /**< \brief (PAC0) Write Protection Clear */ 40 | #define REG_PAC0_WPSET (0x40000004U) /**< \brief (PAC0) Write Protection Set */ 41 | #else 42 | #define REG_PAC0_WPCLR (*(RwReg *)0x40000000U) /**< \brief (PAC0) Write Protection Clear */ 43 | #define REG_PAC0_WPSET (*(RwReg *)0x40000004U) /**< \brief (PAC0) Write Protection Set */ 44 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 45 | 46 | /* ========== Instance parameters for PAC0 peripheral ========== */ 47 | #define PAC0_WPROT_DEFAULT_VAL 0x00000000 // PAC protection mask at reset 48 | 49 | #endif /* _SAMD21_PAC0_INSTANCE_ */ 50 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/pac1.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for PAC1 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_PAC1_INSTANCE_ 35 | #define _SAMD21_PAC1_INSTANCE_ 36 | 37 | /* ========== Register definition for PAC1 peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_PAC1_WPCLR (0x41000000U) /**< \brief (PAC1) Write Protection Clear */ 40 | #define REG_PAC1_WPSET (0x41000004U) /**< \brief (PAC1) Write Protection Set */ 41 | #else 42 | #define REG_PAC1_WPCLR (*(RwReg *)0x41000000U) /**< \brief (PAC1) Write Protection Clear */ 43 | #define REG_PAC1_WPSET (*(RwReg *)0x41000004U) /**< \brief (PAC1) Write Protection Set */ 44 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 45 | 46 | /* ========== Instance parameters for PAC1 peripheral ========== */ 47 | #define PAC1_WPROT_DEFAULT_VAL 0x00000002 // PAC protection mask at reset 48 | 49 | #endif /* _SAMD21_PAC1_INSTANCE_ */ 50 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/pac2.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for PAC2 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_PAC2_INSTANCE_ 35 | #define _SAMD21_PAC2_INSTANCE_ 36 | 37 | /* ========== Register definition for PAC2 peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_PAC2_WPCLR (0x42000000U) /**< \brief (PAC2) Write Protection Clear */ 40 | #define REG_PAC2_WPSET (0x42000004U) /**< \brief (PAC2) Write Protection Set */ 41 | #else 42 | #define REG_PAC2_WPCLR (*(RwReg *)0x42000000U) /**< \brief (PAC2) Write Protection Clear */ 43 | #define REG_PAC2_WPSET (*(RwReg *)0x42000004U) /**< \brief (PAC2) Write Protection Set */ 44 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 45 | 46 | /* ========== Instance parameters for PAC2 peripheral ========== */ 47 | #define PAC2_WPROT_DEFAULT_VAL 0x00800000 // PAC protection mask at reset 48 | 49 | #endif /* _SAMD21_PAC2_INSTANCE_ */ 50 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/pm.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for PM 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_PM_INSTANCE_ 35 | #define _SAMD21_PM_INSTANCE_ 36 | 37 | /* ========== Register definition for PM peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_PM_CTRL (0x40000400U) /**< \brief (PM) Control */ 40 | #define REG_PM_SLEEP (0x40000401U) /**< \brief (PM) Sleep Mode */ 41 | #define REG_PM_EXTCTRL (0x40000402U) /**< \brief (PM) External Reset Controller */ 42 | #define REG_PM_CPUSEL (0x40000408U) /**< \brief (PM) CPU Clock Select */ 43 | #define REG_PM_APBASEL (0x40000409U) /**< \brief (PM) APBA Clock Select */ 44 | #define REG_PM_APBBSEL (0x4000040AU) /**< \brief (PM) APBB Clock Select */ 45 | #define REG_PM_APBCSEL (0x4000040BU) /**< \brief (PM) APBC Clock Select */ 46 | #define REG_PM_AHBMASK (0x40000414U) /**< \brief (PM) AHB Mask */ 47 | #define REG_PM_APBAMASK (0x40000418U) /**< \brief (PM) APBA Mask */ 48 | #define REG_PM_APBBMASK (0x4000041CU) /**< \brief (PM) APBB Mask */ 49 | #define REG_PM_APBCMASK (0x40000420U) /**< \brief (PM) APBC Mask */ 50 | #define REG_PM_INTENCLR (0x40000434U) /**< \brief (PM) Interrupt Enable Clear */ 51 | #define REG_PM_INTENSET (0x40000435U) /**< \brief (PM) Interrupt Enable Set */ 52 | #define REG_PM_INTFLAG (0x40000436U) /**< \brief (PM) Interrupt Flag Status and Clear */ 53 | #define REG_PM_RCAUSE (0x40000438U) /**< \brief (PM) Reset Cause */ 54 | #else 55 | #define REG_PM_CTRL (*(RwReg8 *)0x40000400U) /**< \brief (PM) Control */ 56 | #define REG_PM_SLEEP (*(RwReg8 *)0x40000401U) /**< \brief (PM) Sleep Mode */ 57 | #define REG_PM_EXTCTRL (*(RwReg8 *)0x40000402U) /**< \brief (PM) External Reset Controller */ 58 | #define REG_PM_CPUSEL (*(RwReg8 *)0x40000408U) /**< \brief (PM) CPU Clock Select */ 59 | #define REG_PM_APBASEL (*(RwReg8 *)0x40000409U) /**< \brief (PM) APBA Clock Select */ 60 | #define REG_PM_APBBSEL (*(RwReg8 *)0x4000040AU) /**< \brief (PM) APBB Clock Select */ 61 | #define REG_PM_APBCSEL (*(RwReg8 *)0x4000040BU) /**< \brief (PM) APBC Clock Select */ 62 | #define REG_PM_AHBMASK (*(RwReg *)0x40000414U) /**< \brief (PM) AHB Mask */ 63 | #define REG_PM_APBAMASK (*(RwReg *)0x40000418U) /**< \brief (PM) APBA Mask */ 64 | #define REG_PM_APBBMASK (*(RwReg *)0x4000041CU) /**< \brief (PM) APBB Mask */ 65 | #define REG_PM_APBCMASK (*(RwReg *)0x40000420U) /**< \brief (PM) APBC Mask */ 66 | #define REG_PM_INTENCLR (*(RwReg8 *)0x40000434U) /**< \brief (PM) Interrupt Enable Clear */ 67 | #define REG_PM_INTENSET (*(RwReg8 *)0x40000435U) /**< \brief (PM) Interrupt Enable Set */ 68 | #define REG_PM_INTFLAG (*(RwReg8 *)0x40000436U) /**< \brief (PM) Interrupt Flag Status and Clear */ 69 | #define REG_PM_RCAUSE (*(RoReg8 *)0x40000438U) /**< \brief (PM) Reset Cause */ 70 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 71 | 72 | /* ========== Instance parameters for PM peripheral ========== */ 73 | #define PM_CTRL_MCSEL_DFLL48M 3 74 | #define PM_CTRL_MCSEL_GCLK 0 75 | #define PM_CTRL_MCSEL_OSC8M 1 76 | #define PM_CTRL_MCSEL_XOSC 2 77 | #define PM_PM_CLK_APB_NUM 2 78 | 79 | #endif /* _SAMD21_PM_INSTANCE_ */ 80 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/instance/wdt.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Instance description for WDT 5 | * 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | 34 | #ifndef _SAMD21_WDT_INSTANCE_ 35 | #define _SAMD21_WDT_INSTANCE_ 36 | 37 | /* ========== Register definition for WDT peripheral ========== */ 38 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 39 | #define REG_WDT_CTRL (0x40001000U) /**< \brief (WDT) Control */ 40 | #define REG_WDT_CONFIG (0x40001001U) /**< \brief (WDT) Configuration */ 41 | #define REG_WDT_EWCTRL (0x40001002U) /**< \brief (WDT) Early Warning Interrupt Control */ 42 | #define REG_WDT_INTENCLR (0x40001004U) /**< \brief (WDT) Interrupt Enable Clear */ 43 | #define REG_WDT_INTENSET (0x40001005U) /**< \brief (WDT) Interrupt Enable Set */ 44 | #define REG_WDT_INTFLAG (0x40001006U) /**< \brief (WDT) Interrupt Flag Status and Clear */ 45 | #define REG_WDT_STATUS (0x40001007U) /**< \brief (WDT) Status */ 46 | #define REG_WDT_CLEAR (0x40001008U) /**< \brief (WDT) Clear */ 47 | #else 48 | #define REG_WDT_CTRL (*(RwReg8 *)0x40001000U) /**< \brief (WDT) Control */ 49 | #define REG_WDT_CONFIG (*(RwReg8 *)0x40001001U) /**< \brief (WDT) Configuration */ 50 | #define REG_WDT_EWCTRL (*(RwReg8 *)0x40001002U) /**< \brief (WDT) Early Warning Interrupt Control */ 51 | #define REG_WDT_INTENCLR (*(RwReg8 *)0x40001004U) /**< \brief (WDT) Interrupt Enable Clear */ 52 | #define REG_WDT_INTENSET (*(RwReg8 *)0x40001005U) /**< \brief (WDT) Interrupt Enable Set */ 53 | #define REG_WDT_INTFLAG (*(RwReg8 *)0x40001006U) /**< \brief (WDT) Interrupt Flag Status and Clear */ 54 | #define REG_WDT_STATUS (*(RoReg8 *)0x40001007U) /**< \brief (WDT) Status */ 55 | #define REG_WDT_CLEAR (*(WoReg8 *)0x40001008U) /**< \brief (WDT) Clear */ 56 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 57 | 58 | /* ========== Instance parameters for WDT peripheral ========== */ 59 | #define WDT_GCLK_ID 3 // Index of Generic Clock 60 | 61 | #endif /* _SAMD21_WDT_INSTANCE_ */ 62 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/include/samd21.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Top header file for SAMD21 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef _SAMD21_ 38 | #define _SAMD21_ 39 | 40 | /** 41 | * \defgroup SAMD21_definitions SAMD21 Device Definitions 42 | * \brief SAMD21 CMSIS Definitions. 43 | */ 44 | 45 | #if defined(__SAMD21E15A__) || defined(__ATSAMD21E15A__) 46 | #include "samd21e15a.h" 47 | #elif defined(__SAMD21E16A__) || defined(__ATSAMD21E16A__) 48 | #include "samd21e16a.h" 49 | #elif defined(__SAMD21E17A__) || defined(__ATSAMD21E17A__) 50 | #include "samd21e17a.h" 51 | #elif defined(__SAMD21E18A__) || defined(__ATSAMD21E18A__) 52 | #include "samd21e18a.h" 53 | #elif defined(__SAMD21G15A__) || defined(__ATSAMD21G15A__) 54 | #include "samd21g15a.h" 55 | #elif defined(__SAMD21G16A__) || defined(__ATSAMD21G16A__) 56 | #include "samd21g16a.h" 57 | #elif defined(__SAMD21G17A__) || defined(__ATSAMD21G17A__) 58 | #include "samd21g17a.h" 59 | #elif defined(__SAMD21G17AU__) || defined(__ATSAMD21G17AU__) 60 | #include "samd21g17au.h" 61 | #elif defined(__SAMD21G18A__) || defined(__ATSAMD21G18A__) 62 | #include "samd21g18a.h" 63 | #elif defined (__SAMD21G18AU__) || defined(__ATSAMD21G18AU__) 64 | #include "samd21g18au.h" 65 | #elif defined(__SAMD21J15A__) || defined(__ATSAMD21J15A__) 66 | #include "samd21j15a.h" 67 | #elif defined(__SAMD21J16A__) || defined(__ATSAMD21J16A__) 68 | #include "samd21j16a.h" 69 | #elif defined(__SAMD21J17A__) || defined(__ATSAMD21J17A__) 70 | #include "samd21j17a.h" 71 | #elif defined(__SAMD21J18A__) || defined(__ATSAMD21J18A__) 72 | #include "samd21j18a.h" 73 | #elif defined(__SAMD21E15B__) || defined(__ATSAMD21E15B__) 74 | #include "samd21e15b.h" 75 | #elif defined(__SAMD21E15BU__) || defined(__ATSAMD21E15BU__) 76 | #include "samd21e15bu.h" 77 | #elif defined(__SAMD21E15L__) || defined(__ATSAMD21E15L__) 78 | #include "samd21e15l.h" 79 | #elif defined(__SAMD21E16B__) || defined(__ATSAMD21E16B__) 80 | #include "samd21e16b.h" 81 | #elif defined(__SAMD21E16BU__) || defined(__ATSAMD21E16BU__) 82 | #include "samd21e16bu.h" 83 | #elif defined(__SAMD21E16L__) || defined(__ATSAMD21E16L__) 84 | #include "samd21e16l.h" 85 | #elif defined(__SAMD21G15B__) || defined(__ATSAMD21G15B__) 86 | #include "samd21g15b.h" 87 | #elif defined(__SAMD21G15L__) || defined(__ATSAMD21G15L__) 88 | #include "samd21g15l.h" 89 | #elif defined(__SAMD21G16B__) || defined(__ATSAMD21G16B__) 90 | #include "samd21g16b.h" 91 | #elif defined(__SAMD21G16L__) || defined(__ATSAMD21G16L__) 92 | #include "samd21g16l.h" 93 | #elif defined(__SAMD21J15B__) || defined(__ATSAMD21J15B__) 94 | #include "samd21j15b.h" 95 | #elif defined(__SAMD21J16B__) || defined(__ATSAMD21J16B__) 96 | #include "samd21j16b.h" 97 | #elif defined(__SAMD21E17D__) || defined(__ATSAMD21E17D__) 98 | #include "samd21e17d.h" 99 | #elif defined(__SAMD21E17DU__) || defined(__ATSAMD21E17DU__) 100 | #include "samd21e17du.h" 101 | #elif defined(__SAMD21E17L__) || defined(__ATSAMD21E17L__) 102 | #include "samd21e17l.h" 103 | #elif defined(__SAMD21G17D__) || defined(__ATSAMD21G17D__) 104 | #include "samd21g17d.h" 105 | #elif defined(__SAMD21G17L__) || defined(__ATSAMD21G17L__) 106 | #include "samd21g17l.h" 107 | #elif defined(__SAMD21J17D__) || defined(__ATSAMD21J17D__) 108 | #include "samd21j17d.h" 109 | #else 110 | #error Library does not support the specified device. 111 | #endif 112 | 113 | #endif /* _SAMD21_ */ 114 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Low-level initialization functions called upon chip startup. 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #include "samd21.h" 38 | 39 | /** 40 | * Initial system clock frequency. The System RC Oscillator (RCSYS) provides 41 | * the source for the main clock at chip startup. 42 | */ 43 | #define __SYSTEM_CLOCK (1000000) 44 | 45 | uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/ 46 | 47 | /** 48 | * Initialize the system 49 | * 50 | * @brief Setup the microcontroller system. 51 | * Initialize the System and update the SystemCoreClock variable. 52 | */ 53 | void SystemInit(void) 54 | { 55 | // Keep the default device state after reset 56 | SystemCoreClock = __SYSTEM_CLOCK; 57 | return; 58 | } 59 | 60 | /** 61 | * Update SystemCoreClock variable 62 | * 63 | * @brief Updates the SystemCoreClock with current core Clock 64 | * retrieved from cpu registers. 65 | */ 66 | void SystemCoreClockUpdate(void) 67 | { 68 | // Not implemented 69 | SystemCoreClock = __SYSTEM_CLOCK; 70 | return; 71 | } 72 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/cmsis/samd21/source/system_samd21.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Low-level initialization functions called upon chip startup 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef _SYSTEM_SAMD21_H_INCLUDED_ 38 | #define _SYSTEM_SAMD21_H_INCLUDED_ 39 | 40 | #ifdef __cplusplus 41 | extern "C" { 42 | #endif 43 | 44 | #include 45 | 46 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 47 | 48 | void SystemInit(void); 49 | void SystemCoreClockUpdate(void); 50 | 51 | #ifdef __cplusplus 52 | } 53 | #endif 54 | 55 | #endif /* SYSTEM_SAMD21_H_INCLUDED */ 56 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/header_files/io.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Arch file for SAM0. 5 | * 6 | * This file defines common SAM0 series. 7 | * 8 | * Copyright (c) 2012-2020 Microchip Technology Inc. and its subsidiaries. 9 | * 10 | * \asf_license_start 11 | * 12 | * \page License 13 | * 14 | * Subject to your compliance with these terms, you may use Microchip 15 | * software and any derivatives exclusively with Microchip products. 16 | * It is your responsibility to comply with third party license terms applicable 17 | * to your use of third party software (including open source software) that 18 | * may accompany Microchip software. 19 | * 20 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 21 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 22 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 23 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 24 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 25 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 26 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 27 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 28 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 29 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 30 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 31 | * 32 | * \asf_license_stop 33 | * 34 | */ 35 | /* 36 | * Support and FAQ: visit Microchip Support 37 | */ 38 | 39 | #ifndef _SAM_IO_ 40 | #define _SAM_IO_ 41 | 42 | #include 43 | #include 44 | #include 45 | 46 | /* SAM D20 family */ 47 | #if (SAMD20) 48 | # include "samd20.h" 49 | #endif 50 | 51 | #if (SAMD21) 52 | # include "samd21.h" 53 | #endif 54 | 55 | #if (SAMR21) 56 | # include "samr21.h" 57 | #endif 58 | 59 | #if (SAMD09) 60 | # include "samd09.h" 61 | #endif 62 | 63 | #if (SAMD10) 64 | # include "samd10.h" 65 | #endif 66 | 67 | #if (SAMD11) 68 | # include "samd11.h" 69 | #endif 70 | 71 | #if (SAML21) 72 | # include "saml21.h" 73 | #endif 74 | 75 | #if (SAMR30) 76 | # include "samr30.h" 77 | #endif 78 | 79 | #if (SAMR34) 80 | # include "samr34.h" 81 | #endif 82 | 83 | #if (WLR089) 84 | # include "wlr089.h" 85 | #endif 86 | 87 | #if (SAMR35) 88 | # include "samr35.h" 89 | #endif 90 | 91 | #if (SAML22) 92 | # include "saml22.h" 93 | #endif 94 | 95 | #if (SAMDA1) 96 | # include "samda1.h" 97 | #endif 98 | 99 | #if (SAMC20) 100 | # include "samc20.h" 101 | #endif 102 | 103 | #if (SAMC21) 104 | # include "samc21.h" 105 | #endif 106 | 107 | #if (SAMHA1) 108 | # include "samha1.h" 109 | #endif 110 | 111 | #if (SAMHA0) 112 | # include "samha0.h" 113 | #endif 114 | 115 | #if (SAMB11) 116 | # include "samb11.h" 117 | #endif 118 | 119 | #endif /* _SAM_IO_ */ 120 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/preprocessor/preprocessor.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Preprocessor utils. 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef _PREPROCESSOR_H_ 38 | #define _PREPROCESSOR_H_ 39 | 40 | #include "tpaste.h" 41 | #include "stringz.h" 42 | #include "mrepeat.h" 43 | #include "mrecursion.h" 44 | 45 | #endif // _PREPROCESSOR_H_ 46 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/preprocessor/stringz.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Preprocessor stringizing utils. 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef _STRINGZ_H_ 38 | #define _STRINGZ_H_ 39 | 40 | /** 41 | * \defgroup group_sam0_utils_stringz Preprocessor - Stringize 42 | * 43 | * \ingroup group_sam0_utils 44 | * 45 | * @{ 46 | */ 47 | 48 | /** \brief Stringize. 49 | * 50 | * Stringize a preprocessing token, this token being allowed to be \#defined. 51 | * 52 | * May be used only within macros with the token passed as an argument if the 53 | * token is \#defined. 54 | * 55 | * For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN) 56 | * and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to 57 | * writing "A0". 58 | */ 59 | #define STRINGZ(x) #x 60 | 61 | /** \brief Absolute stringize. 62 | * 63 | * Stringize a preprocessing token, this token being allowed to be \#defined. 64 | * 65 | * No restriction of use if the token is \#defined. 66 | * 67 | * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is 68 | * equivalent to writing "A0". 69 | */ 70 | #define ASTRINGZ(x) STRINGZ(x) 71 | 72 | /** @} */ 73 | 74 | #endif // _STRINGZ_H_ 75 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/preprocessor/tpaste.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Preprocessor token pasting utils. 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef _TPASTE_H_ 38 | #define _TPASTE_H_ 39 | 40 | /** 41 | * \defgroup group_sam0_utils_tpaste Preprocessor - Token Paste 42 | * 43 | * \ingroup group_sam0_utils 44 | * 45 | * @{ 46 | */ 47 | 48 | /** \name Token Paste 49 | * 50 | * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. 51 | * 52 | * May be used only within macros with the tokens passed as arguments if the tokens are \#defined. 53 | * 54 | * For example, writing TPASTE2(U, WIDTH) within a macro \#defined by 55 | * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is 56 | * equivalent to writing U32. 57 | * 58 | * @{ */ 59 | #define TPASTE2( a, b) a##b 60 | #define TPASTE3( a, b, c) a##b##c 61 | #define TPASTE4( a, b, c, d) a##b##c##d 62 | #define TPASTE5( a, b, c, d, e) a##b##c##d##e 63 | #define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f 64 | #define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g 65 | #define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h 66 | #define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i 67 | #define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j 68 | /** @} */ 69 | 70 | /** \name Absolute Token Paste 71 | * 72 | * Paste N preprocessing tokens together, these tokens being allowed to be \#defined. 73 | * 74 | * No restriction of use if the tokens are \#defined. 75 | * 76 | * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined 77 | * as 32 is equivalent to writing U32. 78 | * 79 | * @{ */ 80 | #define ATPASTE2( a, b) TPASTE2( a, b) 81 | #define ATPASTE3( a, b, c) TPASTE3( a, b, c) 82 | #define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d) 83 | #define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e) 84 | #define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f) 85 | #define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g) 86 | #define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h) 87 | #define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i) 88 | #define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j) 89 | /** @} */ 90 | 91 | /** @} */ 92 | 93 | #endif // _TPASTE_H_ 94 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/sam0/utils/syscalls/gcc/syscalls.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Syscalls for SAM0 (GCC). 5 | * 6 | * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #include 38 | #include 39 | #include 40 | #include 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | #undef errno 47 | extern int errno; 48 | extern int _end; 49 | 50 | extern caddr_t _sbrk(int incr); 51 | extern int link(char *old, char *new); 52 | extern int _close(int file); 53 | extern int _fstat(int file, struct stat *st); 54 | extern int _isatty(int file); 55 | extern int _lseek(int file, int ptr, int dir); 56 | extern void _exit(int status); 57 | extern void _kill(int pid, int sig); 58 | extern int _getpid(void); 59 | 60 | extern caddr_t _sbrk(int incr) 61 | { 62 | static unsigned char *heap = NULL; 63 | unsigned char *prev_heap; 64 | 65 | if (heap == NULL) { 66 | heap = (unsigned char *)&_end; 67 | } 68 | prev_heap = heap; 69 | 70 | heap += incr; 71 | 72 | return (caddr_t) prev_heap; 73 | } 74 | 75 | extern int link(char *old, char *new) 76 | { 77 | return -1; 78 | } 79 | 80 | extern int _close(int file) 81 | { 82 | return -1; 83 | } 84 | 85 | extern int _fstat(int file, struct stat *st) 86 | { 87 | st->st_mode = S_IFCHR; 88 | 89 | return 0; 90 | } 91 | 92 | extern int _isatty(int file) 93 | { 94 | return 1; 95 | } 96 | 97 | extern int _lseek(int file, int ptr, int dir) 98 | { 99 | return 0; 100 | } 101 | 102 | extern void _exit(int status) 103 | { 104 | asm("BKPT #0"); 105 | for (;;); 106 | } 107 | 108 | extern void _kill(int pid, int sig) 109 | { 110 | return; 111 | } 112 | 113 | extern int _getpid(void) 114 | { 115 | return -1; 116 | } 117 | 118 | #ifdef __cplusplus 119 | } 120 | #endif 121 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/thirdparty/CMSIS/ATMEL-disclaimer.txt: -------------------------------------------------------------------------------- 1 | /* 2 | * Only the CMSIS required parts for ASF are included here, go to the below 3 | * address for the full package: 4 | * http://www.arm.com/products/processors/cortex-m/cortex-microcontroller-software-interface-standard.php 5 | * 6 | * The library file thirdparty/CMSIS/Lib/GCC/libarm_cortexM4lf_math_softfp.a was generated by ATMEL, which 7 | * is support -mfloat-abi=softfp compiler flag, and this is also the default selection for device that 8 | * have FPU module and enabled. 9 | * If customer want to use -mfloat-abi=hard compiler flag, the project compile/link flag and link library 10 | * should be manual modified. The library thirdparty/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a is used for 11 | * -mfloat-abi=hard configration. 12 | * 13 | * __CORTEX_SC is not defined for cortex-m0+, and may cause compiler warning, so the include file 14 | * thirdparty/CMSIS/Include/core_cmInstr.h was modified to void such warning. 15 | * Modified from: 16 | * #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) 17 | * to: 18 | * #if (__CORTEX_M >= 0x03) || ((defined(__CORTEX_SC)) && (__CORTEX_SC >= 300)) 19 | * 20 | */ 21 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/thirdparty/CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/compukidmike/Defcon29/fe3f758ca3042aed0a1d83115eccb93215fc643d/Firmware/Source/DC29/src/ASF/thirdparty/CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.pdf -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/thirdparty/CMSIS/Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.4.0 5 | * @date 19. April 2017 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2017 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/thirdparty/CMSIS/Lib/GCC/libarm_cortexM0l_math.a: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/compukidmike/Defcon29/fe3f758ca3042aed0a1d83115eccb93215fc643d/Firmware/Source/DC29/src/ASF/thirdparty/CMSIS/Lib/GCC/libarm_cortexM0l_math.a -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/thirdparty/CMSIS/Lib/license.txt: -------------------------------------------------------------------------------- 1 | All pre-build libraries contained in the folders "ARM" and "GCC" 2 | are guided by the following license: 3 | 4 | Copyright (C) 2009-2014 ARM Limited. 5 | All rights reserved. 6 | 7 | Redistribution and use in source and binary forms, with or without 8 | modification, are permitted provided that the following conditions are met: 9 | - Redistributions of source code must retain the above copyright 10 | notice, this list of conditions and the following disclaimer. 11 | - Redistributions in binary form must reproduce the above copyright 12 | notice, this list of conditions and the following disclaimer in the 13 | documentation and/or other materials provided with the distribution. 14 | - Neither the name of ARM nor the names of its contributors may be used 15 | to endorse or promote products derived from this software without 16 | specific prior written permission. 17 | 18 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 22 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 | POSSIBILITY OF SUCH DAMAGE. 29 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/thirdparty/CMSIS/README.txt: -------------------------------------------------------------------------------- 1 | * ------------------------------------------------------------------- 2 | * Copyright (C) 2011-2014 ARM Limited. All rights reserved. 3 | * 4 | * Date: 17 February 2014 5 | * Revision: V4.00 6 | * 7 | * Project: Cortex Microcontroller Software Interface Standard (CMSIS) 8 | * Title: Release Note for CMSIS 9 | * 10 | * ------------------------------------------------------------------- 11 | 12 | 13 | NOTE - Open the index.html file to access CMSIS documentation 14 | 15 | 16 | The Cortex Microcontroller Software Interface Standard (CMSIS) provides a single standard across all 17 | Cortex-Mx processor series vendors. It enables code re-use and code sharing across software projects 18 | and reduces time-to-market for new embedded applications. 19 | 20 | CMSIS is released under the terms of the end user license agreement ("CMSIS_END_USER_LICENCE_AGREEMENT.pdf"). 21 | Any user of the software package is bound to the terms and conditions of the end user license agreement. 22 | 23 | 24 | You will find the following sub-directories: 25 | 26 | Documentation - Contains CMSIS documentation. 27 | 28 | DSP_Lib - MDK project files, Examples and source files etc.. to build the 29 | CMSIS DSP Software Library for Cortex-M0, Cortex-M3, Cortex-M4 processors. 30 | 31 | Include - CMSIS Core Support and CMSIS DSP Include Files. 32 | 33 | Lib - CMSIS DSP Libraries. 34 | 35 | RTOS - CMSIS RTOS API template header file. 36 | 37 | Driver - CMSIS Peripheral Driver Interface. 38 | 39 | Pack - CMSIS Software Packs. 40 | Mechanism to install software, device support, APIs, and example projects. 41 | 42 | SVD - CMSIS SVD Schema files and Conversion Utility. 43 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ASF/thirdparty/qtouch/devspecific/sam0/samd/lib/gcc/libsamd21_qt_gcc.a: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/compukidmike/Defcon29/fe3f758ca3042aed0a1d83115eccb93215fc643d/Firmware/Source/DC29/src/ASF/thirdparty/qtouch/devspecific/sam0/samd/lib/gcc/libsamd21_qt_gcc.a -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/asf.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Autogenerated API include file for the Atmel Software Framework (ASF) 5 | * 6 | * Copyright (c) 2012 Atmel Corporation. All rights reserved. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Redistribution and use in source and binary forms, with or without 13 | * modification, are permitted provided that the following conditions are met: 14 | * 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, 19 | * this list of conditions and the following disclaimer in the documentation 20 | * and/or other materials provided with the distribution. 21 | * 22 | * 3. The name of Atmel may not be used to endorse or promote products derived 23 | * from this software without specific prior written permission. 24 | * 25 | * 4. This software may only be redistributed and used in connection with an 26 | * Atmel microcontroller product. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 | * POSSIBILITY OF SUCH DAMAGE. 39 | * 40 | * \asf_license_stop 41 | * 42 | */ 43 | 44 | #ifndef ASF_H 45 | #define ASF_H 46 | 47 | /* 48 | * This file includes all API header files for the selected drivers from ASF. 49 | * Note: There might be duplicate includes required by more than one driver. 50 | * 51 | * The file is automatically generated and will be re-written when 52 | * running the ASF driver selector tool. Any changes will be discarded. 53 | */ 54 | 55 | // From module: Common SAM0 compiler driver 56 | #include 57 | #include 58 | 59 | // From module: Delay routines 60 | #include 61 | 62 | // From module: EXTINT - External Interrupt (Callback APIs) 63 | #include 64 | #include 65 | 66 | // From module: Generic board support 67 | #include 68 | 69 | // From module: Interrupt management - SAM implementation 70 | #include 71 | 72 | // From module: NVM - Non-Volatile Memory 73 | #include 74 | 75 | // From module: PORT - GPIO Pin Control 76 | #include 77 | 78 | // From module: Part identification macros 79 | #include 80 | 81 | // From module: QTouch Library for SAMD20/D21 82 | #include 83 | 84 | // From module: RTC - Real Time Counter in Count Mode (Callback APIs) 85 | #include 86 | #include 87 | #include 88 | 89 | // From module: Read While Write EEPROM Emulator Service 90 | #include 91 | 92 | // From module: SAM D21/R21/D11/L21/DA1/L22 USB Dual role interface 93 | #include 94 | 95 | // From module: SERCOM Callback API 96 | #include 97 | #include 98 | 99 | // From module: SERCOM USART - Serial Communications (Callback APIs) 100 | #include 101 | #include 102 | 103 | // From module: SYSTEM - Clock Management for SAMD21/R21/DA/HA 104 | #include 105 | #include 106 | 107 | // From module: SYSTEM - Core System Driver 108 | #include 109 | 110 | // From module: SYSTEM - I/O Pin Multiplexer 111 | #include 112 | 113 | // From module: SYSTEM - Interrupt Driver 114 | #include 115 | 116 | // From module: SYSTEM - Power Management for SAM D20/D21/R21/D09/D10/D11/DA/HA 117 | #include 118 | 119 | // From module: SYSTEM - Reset Management for SAM D20/D21/R21/D09/D10/D11/DA/HA 120 | #include 121 | 122 | // From module: Sleep manager - SAMD implementation 123 | #include 124 | #include 125 | 126 | // From module: TC - Timer Counter (Polled APIs) 127 | #include 128 | 129 | // From module: TCC - Timer Counter for Control Applications (Polled APIs) 130 | #include 131 | 132 | // From module: USB - Universal Serial Bus 133 | #include 134 | 135 | // From module: USB CDC Protocol 136 | #include 137 | 138 | // From module: USB Device CDC (Composite Device) 139 | #include 140 | 141 | // From module: USB Device Stack Core (Common API) 142 | #include 143 | #include 144 | 145 | #endif // ASF_H 146 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/comms.h: -------------------------------------------------------------------------------- 1 | /* 2 | * comms.h 3 | * 4 | * Author: compukidmike 5 | */ 6 | 7 | 8 | #ifndef COMMS_H_ 9 | #define COMMS_H_ 10 | 11 | #include "main.h" 12 | 13 | 14 | void usart_top_read_callback(struct usart_module *const usart_module); 15 | void usart_top_write_callback(struct usart_module *const usart_module); 16 | void usart_right_read_callback(struct usart_module *const usart_module); 17 | void usart_right_write_callback(struct usart_module *const usart_module); 18 | void usart_bottom_read_callback(struct usart_module *const usart_module); 19 | void usart_bottom_write_callback(struct usart_module *const usart_module); 20 | void usart_left_read_callback(struct usart_module *const usart_module); 21 | void usart_left_write_callback(struct usart_module *const usart_module); 22 | void usart_usba_read_callback(struct usart_module *const usart_module); 23 | void usart_usba_write_callback(struct usart_module *const usart_module); 24 | void usart_usbc_read_callback(struct usart_module *const usart_module); 25 | void usart_usbc_write_callback(struct usart_module *const usart_module); 26 | 27 | void usart_top_error_callback(struct usart_module *const usart_module); 28 | void usart_right_error_callback(struct usart_module *const usart_module); 29 | void usart_bottom_error_callback(struct usart_module *const usart_module); 30 | void usart_left_error_callback(struct usart_module *const usart_module); 31 | void usart_usbc_error_callback(struct usart_module *const usart_module); 32 | void usart_usba_error_callback(struct usart_module *const usart_module); 33 | 34 | 35 | 36 | void configure_usart(void); 37 | void configure_usart_top_default(void); 38 | void configure_usart_top_usb(void); 39 | void disable_usart_top(void); 40 | void configure_usart_callbacks(void); 41 | 42 | void check_comms(void); 43 | void send_hello(uint8_t port); 44 | void send_challenge_status(uint8_t port); 45 | void usart_rx_handler(uint8_t port, uint8_t data); 46 | void get_badge_count(void); 47 | void send_simon_game_packet(uint16_t badge, uint8_t button); 48 | void send_simon_button_packet(uint16_t badge, uint8_t button); 49 | void send_simon_game_over(uint16_t score); 50 | void send_heartbeats(void); 51 | void disable_usarts(void); 52 | 53 | volatile uint32_t uart_event; 54 | 55 | 56 | //! [module_inst] 57 | struct usart_module usart_top_instance; 58 | struct usart_module usart_right_instance; 59 | struct usart_module usart_bottom_instance; 60 | struct usart_module usart_left_instance; 61 | struct usart_module usart_usba_instance; 62 | struct usart_module usart_usbc_instance; 63 | //! [module_inst] 64 | 65 | //! [rx_buffer_var] 66 | #define RX_BUFFER_LENGTH 10 67 | 68 | #define RX_HEARTBEAT_INTERVAL 500 69 | #define RX_HEARTBEAT_TIMEOUT 1000 70 | 71 | #endif /* COMMS_H_ */ -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/config/conf_board.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM D21 Xplained Pro board configuration. 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef CONF_BOARD_H_INCLUDED 38 | #define CONF_BOARD_H_INCLUDED 39 | 40 | /* Enable USB VBUS detect */ 41 | //#define CONF_BOARD_USB_VBUS_DETECT 42 | 43 | #endif /* CONF_BOARD_H_INCLUDED */ 44 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/config/conf_extint.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief SAM D21 External Interrupt Driver Configuration Header 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #ifndef CONF_EXTINT_H_INCLUDED 37 | #define CONF_EXTINT_H_INCLUDED 38 | 39 | # define EXTINT_CLOCK_SOURCE GCLK_GENERATOR_0 40 | 41 | #endif 42 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/config/conf_rwwee.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief RWW EEPROM Service Configuration Header 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | #ifndef CONF_RWWEE_H_INCLUDED 37 | #define CONF_RWWEE_H_INCLUDED 38 | 39 | #define CONF_LOGICAL_PAGE_NUM_IN_ROW RWWEE_LOGICAL_PAGE_NUM_1 40 | #define CONF_PAGE_CHECKSUM_ENABLE false 41 | 42 | #endif 43 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/config/conf_sleepmgr.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Sleep manager configuration 5 | * 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef CONF_SLEEPMGR_H_INCLUDED 38 | #define CONF_SLEEPMGR_H_INCLUDED 39 | 40 | #define CONFIG_SLEEPMGR_ENABLE 41 | 42 | #endif /* CONF_SLEEPMGR_H_INCLUDED */ 43 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/games.h: -------------------------------------------------------------------------------- 1 | /* 2 | * games.h 3 | * 4 | * Author: compukidmike 5 | */ 6 | 7 | 8 | #ifndef GAMES_H_ 9 | #define GAMES_H_ 10 | 11 | #include "main.h" 12 | 13 | #define SEQUENCE_TIME_1 420 14 | #define SEQUENCE_TIME_2 320 15 | #define SEQUENCE_TIME_3 220 16 | 17 | #define SIMON_BUTTON_TIMEOUT 3000 18 | 19 | /* 20 | Simon Colors 21 | ______ ______ 22 | | | | 23 | |Green | Red | 24 | |______|______| 25 | | | | 26 | |Yellow| Blue | 27 | |______|______| 28 | 29 | */ 30 | 31 | bool new_connection; 32 | bool old_connection; 33 | bool simon_start_tune; 34 | bool game_over_tune; 35 | bool challenge_section_finish; 36 | bool new_signal_share; 37 | 38 | void run_games(void); 39 | void simon_game_over(uint16_t score); 40 | void new_connection_tune(void); 41 | void play_sounds(void); 42 | 43 | #endif /* GAMES_H_ */ -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/keys.c: -------------------------------------------------------------------------------- 1 | /* 2 | * keys.c 3 | * 4 | * Author: compukidmike 5 | */ 6 | 7 | #include "keys.h" 8 | #include "udi_hid_kbd.h" 9 | 10 | extern uint8_t keymap[231]; 11 | extern uint8_t keymaplength; 12 | extern uint8_t keymapstarts[6]; 13 | 14 | extern bool wait_for_sof; 15 | 16 | extern volatile uint32_t millis; 17 | 18 | extern bool udi_hid_kbd_b_report_trans_ongoing; 19 | 20 | uint32_t lastUSBSendTime = 0; 21 | 22 | void get_keymap(void){ 23 | rww_eeprom_emulator_read_buffer(EEP_KEY_MAP, keymap, 231); 24 | 25 | keymaplength = keymap[0]; 26 | keymapstarts[0] = 1; 27 | for(int x=1; x0xFFFF are reserved for Atmel Kits. 48 | * Values from 0x0000->0xEFFF are available for other projects. 49 | */ 50 | //! @{ 51 | 52 | #define QT8 0xF001 53 | #define QT16 0xF002 54 | #define QM64 0xF003 55 | #define UC3L_EK_REV2 0xF005 56 | #define SAMD20_XPLAINED_PRO_SELFCAP_EXT 0xF010 57 | #define SAMD20_XPLAINED_PRO_MUTLCAP_EXT 0xF011 58 | 59 | //! @} 60 | 61 | /*! \name Interface constants. 62 | */ 63 | //! @{ 64 | 65 | #define TWI 1 66 | #define SPI1W 2 67 | #define SPI2W 3 68 | #define UART 4 69 | 70 | //! @} 71 | 72 | //---------- Edit Project Info ------------- 73 | 74 | /*! \name Select the type of interface to use for the debug protocol. 75 | * \brief Comment out the interface not used. 76 | * Only one interface should be active. 77 | */ 78 | //! @{ 79 | 80 | //#define QDEBUG_SPI 81 | //#define QDEBUG_TWI 82 | //#define QDEBUG_SERIAL 83 | #define QDEBUG_BITBANG_SPI 84 | #define QDEBUG_SPI_BB 85 | 86 | // The definitions below should not clash with the SNS/SNSK port pins 87 | #define QDEBUG_SPI_BB_SS_PIN 31 88 | #define QDEBUG_SPI_BB_SCK_PIN 23 89 | #define QDEBUG_SPI_BB_MOSI_PIN 22 90 | #define QDEBUG_SPI_BB_MISO_PIN 16 91 | 92 | #define QDEBUG_SPI_BB_SS_PORT B 93 | #define QDEBUG_SPI_BB_SCK_PORT B 94 | #define QDEBUG_SPI_BB_MOSI_PORT B 95 | #define QDEBUG_SPI_BB_MISO_PORT B 96 | 97 | //! @} 98 | 99 | /*! \name Set up project info. 100 | */ 101 | //! @{ 102 | 103 | #define PROJECT_ID SAMD20_XPLAINED_PRO_SELFCAP_EXT 104 | #define INTERFACE SPI2W 105 | 106 | //! @} 107 | 108 | #ifdef __cplusplus 109 | } 110 | #endif 111 | 112 | #endif /* QDEBUG_SETTINGS_H */ 113 | 114 | -------------------------------------------------------------------------------- /Firmware/Source/DC29/src/ui.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Common User Interface for HID Keyboard application 5 | * 6 | * Copyright (c) 2009-2018 Microchip Technology Inc. and its subsidiaries. 7 | * 8 | * \asf_license_start 9 | * 10 | * \page License 11 | * 12 | * Subject to your compliance with these terms, you may use Microchip 13 | * software and any derivatives exclusively with Microchip products. 14 | * It is your responsibility to comply with third party license terms applicable 15 | * to your use of third party software (including open source software) that 16 | * may accompany Microchip software. 17 | * 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 29 | * 30 | * \asf_license_stop 31 | * 32 | */ 33 | /* 34 | * Support and FAQ: visit Microchip Support 35 | */ 36 | 37 | #ifndef _UI_H_ 38 | #define _UI_H_ 39 | 40 | //! \brief Initializes the user interface 41 | void ui_init(void); 42 | 43 | //! \brief Enters the user interface in power down mode 44 | void ui_powerdown(void); 45 | 46 | //! \brief Enables the asynchronous interrupts of the user interface 47 | void ui_wakeup_enable(void); 48 | 49 | //! \brief Disables the asynchronous interrupts of the user interface 50 | void ui_wakeup_disable(void); 51 | 52 | //! \brief Exits the user interface of power down mode 53 | void ui_wakeup(void); 54 | 55 | /*! \brief This process is called each 1ms 56 | * It is called only if the USB interface is enabled. 57 | * 58 | * \param framenumber Current frame number 59 | */ 60 | void ui_process(uint16_t framenumber); 61 | 62 | /*! \brief Turn on or off the keyboard LEDs 63 | */ 64 | void ui_kbd_led(uint8_t value); 65 | 66 | #endif // _UI_H_ 67 | -------------------------------------------------------------------------------- /Firmware/Source/Defcon29.atsln: -------------------------------------------------------------------------------- 1 |  2 | Microsoft Visual Studio Solution File, Format Version 12.00 3 | # Atmel Studio Solution File, Format Version 11.00 4 | VisualStudioVersion = 14.0.23107.0 5 | MinimumVisualStudioVersion = 10.0.40219.1 6 | Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "DC29", "DC29\DC29.cproj", "{9DFB6B3A-7F1D-41B6-A65C-7177EB0DA650}" 7 | EndProject 8 | Global 9 | GlobalSection(SolutionConfigurationPlatforms) = preSolution 10 | Debug|ARM = Debug|ARM 11 | Release|ARM = Release|ARM 12 | EndGlobalSection 13 | GlobalSection(ProjectConfigurationPlatforms) = postSolution 14 | {9DFB6B3A-7F1D-41B6-A65C-7177EB0DA650}.Debug|ARM.ActiveCfg = Debug|ARM 15 | {9DFB6B3A-7F1D-41B6-A65C-7177EB0DA650}.Debug|ARM.Build.0 = Debug|ARM 16 | {9DFB6B3A-7F1D-41B6-A65C-7177EB0DA650}.Release|ARM.ActiveCfg = Release|ARM 17 | {9DFB6B3A-7F1D-41B6-A65C-7177EB0DA650}.Release|ARM.Build.0 = Release|ARM 18 | EndGlobalSection 19 | GlobalSection(SolutionProperties) = preSolution 20 | HideSolutionNode = FALSE 21 | EndGlobalSection 22 | EndGlobal 23 | -------------------------------------------------------------------------------- /Hardware/Defcon29-TopAssembly.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/compukidmike/Defcon29/fe3f758ca3042aed0a1d83115eccb93215fc643d/Hardware/Defcon29-TopAssembly.png -------------------------------------------------------------------------------- /Hardware/Defcon29BOM.pdf: -------------------------------------------------------------------------------- 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-------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2021 compukidmike 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # DEF CON 29 Badge 2 | by MK Factor 3 | 4 | ![alt text](https://github.com/compukidmike/Defcon29/blob/main/Hardware/Defcon29BadgeTypes.jpg "Badge Types") 5 | 6 | Here's the code and some design files for the DEF CON 29 badge. Feel free to modify and share to your heart's content. 7 | 8 | Compiled .uf2 files can be found under Firmware/Compiled. These are the firmware files that were released during the con that fix the 31-character issue. To put them on your badge, hold the bottom-right button when plugging it into your computer. The badge will start up in bootloader mode and will appear as a mass storage device. Drag/Drop or Copy/Paste the new .uf2 file onto the badge. It will apply the new firmware and automatcially restart. 9 | 10 | NOTE: Flashing new firmware should not reset your challenge/game stats. They are stored in a separate EEPROM location in flash. 11 | 12 | To generate your own .uf2 files, take the compiled .hex file and use the UF2 converter uf2conv.py available from https://github.com/microsoft/uf2/ (in the utils directory). 13 | 14 | I wrote the code in ~~Atmel~~Microchip Studio 7.0 and used the ASF Framework. The install files for the version I used is available on the DEF CON Media Server 15 | https://media.defcon.org/DEF%20CON%2029/DEF%20CON%2029%20badge/ 16 | 17 | The main microcontroller is an ATSAMD21G16B. It has 64KB of flash and 8KB of RAM. The first 8KB of flash is used for the bootloader, leaving 56KB for the main program. The bootloader is write protected by internal fuses in the microcontroller. If you want to remove it, you'll need to use an SWD programmer or write your own program that unlocks the booloader section and erases/overwrites it. Do this at your own risk. 18 | 19 | Pull requests *may* be merged if they add functionality while retaining all original functionality. If you make something cool that doesn't fit this description, let me know and I'll try to add it to the list here. 20 | 21 | ## Cool Things Other People Have Made For The Badge ## 22 | (I have not verified/tested any of these. Use at your own risk) 23 | * Music - https://github.com/duck-37/dc29-badge-stuff 24 | --------------------------------------------------------------------------------